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[refactor][boot2_iap] add bl702 hal wrapper and cmake flag for boot2

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This commit is contained in:
jzlv 2021-07-26 15:31:38 +08:00
parent 1d485a83af
commit ff131e47a3
20 changed files with 1355 additions and 623 deletions
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194
drivers/bl702_driver/blsp_boot2_iap_flash.ld Normal file
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@ -0,0 +1,194 @@
/****************************************************************************************
* @file map.txt
*
* @brief This file is the map file (gnuarm or armgcc).
*
* Copyright (C) BouffaloLab 2018
*
****************************************************************************************
*/
/* configure the CPU type */
OUTPUT_ARCH( "riscv" )
/* link with the standard c library */
INPUT(-lc)
/* link with the standard GCC library */
INPUT(-lgcc)
/* configure the entry point */
ENTRY(_enter)
StackSize = 0x1000; /* 4KB */
HeapSize = 0x1000; /* 4KB */
PROVIDE(__boot2_pass_param_addr = 0x4202F000);/* 0x42020000 + 60 * 1024 */
MEMORY
{
xip_memory (rx) : ORIGIN = 0x23000000, LENGTH = 64K
itcm_memory (rx) : ORIGIN = 0x22014000, LENGTH = 16K
dtcm_memory (rx) : ORIGIN = 0x42018000, LENGTH = 32K
ram_memory (!rx) : ORIGIN = 0x42020000, LENGTH = 60K
}
SECTIONS
{
PROVIDE(__metal_chicken_bit = 0);
.text :
{
. = ALIGN(4);
__text_code_start__ = .;
KEEP (*(.text.metal.init.enter))
KEEP (*(SORT_NONE(.init)))
/* section information for finsh shell */
. = ALIGN(4);
_shell_command_start = .;
KEEP(*(shellCommand))
_shell_command_end = .;
*(EXCLUDE_FILE ( *bl702_uart.c.obj* *hal_uart.c.obj* ) .text*)
*(.rodata)
*(.rodata.*)
*(.srodata)
*(.srodata.*)
. = ALIGN(4);
__text_code_end__ = .;
} > xip_memory
. = ALIGN(4);
__itcm_load_addr = .;
.itcm_region : AT (__itcm_load_addr)
{
. = ALIGN(4);
__tcm_code_start__ = .;
*(.tcm_code)
*(.tcm_const)
*(.sclock_rlt_code)
*(.sclock_rlt_const)
*bl602_romapi.o(.text)
*bl602_romapi.o(.text.*)
*bl602_romapi.o(.rodata)
*bl602_romapi.o(.rodata.*)
*bl602_romapi.o(.srodata)
*bl602_romapi.o(.srodata.*)
*bl702_uart.c.obj* (.text*)
*hal_uart.c.obj* (.text*)
. = ALIGN(4);
__tcm_code_end__ = .;
} > itcm_memory
__dtcm_load_addr = __itcm_load_addr + SIZEOF(.itcm_region);
.dtcm_region : AT (__dtcm_load_addr)
{
. = ALIGN(4);
__tcm_data_start__ = .;
*(.tcm_data)
/* *finger_print.o(.data*) */
. = ALIGN(4);
__tcm_data_end__ = .;
} > dtcm_memory
/* .heap_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of heap sections, and assign
* values to heap symbols later */
.heap_dummy (NOLOAD):
{
. = ALIGN(0x4);
. = . + HeapSize;
. = ALIGN(0x4);
} > dtcm_memory
__HeapBase = ORIGIN(dtcm_memory) + LENGTH(dtcm_memory) - StackSize - HeapSize;
__HeapSize = HeapSize;
__HeapLimit = __HeapBase + __HeapSize;
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__HeapBase >= __tcm_data_end__, "region RAM overflowed with stack")
/*************************************************************************/
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy (NOLOAD):
{
. = ALIGN(0x4);
. = . + StackSize;
. = ALIGN(0x4);
} > dtcm_memory
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(dtcm_memory) + LENGTH(dtcm_memory);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __tcm_data_end__, "region RAM overflowed with stack")
/*************************************************************************/
__system_ram_load_addr = __dtcm_load_addr + SIZEOF(.dtcm_region);
.system_ram_data_region : AT (__system_ram_load_addr)
{
. = ALIGN(4);
__system_ram_data_start__ = .;
*(.system_ram)
. = ALIGN(4);
__system_ram_data_end__ = .;
} > ram_memory
__ram_load_addr = __system_ram_load_addr + SIZEOF(.system_ram_data_region);
/* Data section */
RAM_DATA : AT (__ram_load_addr)
{
. = ALIGN(4);
__ram_data_start__ = .;
PROVIDE( __global_pointer$ = . + 0x800 );
*(.data)
*(.data.*)
*(.sdata)
*(.sdata.*)
*(.sdata2)
*(.sdata2.*)
. = ALIGN(4);
__ram_data_end__ = .;
} > ram_memory
.bss (NOLOAD) :
{
. = ALIGN(4);
__bss_start__ = .;
*(.bss*)
*(.sbss*)
*(COMMON)
. = ALIGN(4);
__bss_end__ = .;
} > ram_memory
.noinit_data (NOLOAD) :
{
. = ALIGN(4);
__noinit_data_start__ = .;
*(.noinit_data*)
. = ALIGN(4);
__noinit_data_end__ = .;
} > ram_memory
}

3
drivers/bl702_driver/cpu_flags.cmake
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@ -6,4 +6,5 @@ SET(MABI "ilp32f")
list(APPEND GLOBAL_C_FLAGS -march=${MARCH} -mabi=${MABI}) list(APPEND GLOBAL_C_FLAGS -march=${MARCH} -mabi=${MABI})
list(APPEND GLOBAL_LD_FLAGS -march=${MARCH} -mabi=${MABI}) list(APPEND GLOBAL_LD_FLAGS -march=${MARCH} -mabi=${MABI})
SET(LINKER_SCRIPT ${CMAKE_CURRENT_LIST_DIR}/bl702_flash.ld) SET(LINKER_SCRIPT ${CMAKE_CURRENT_LIST_DIR}/bl702_flash.ld)
SET(BOOT2_LINKER_SCRIPT ${CMAKE_CURRENT_LIST_DIR}/blsp_boot2_iap_flash.ld)

101
drivers/bl702_driver/hal_drv/inc/hal_boot2.h Normal file
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@ -0,0 +1,101 @@
/**
* *****************************************************************************
* @file hal_boot2_custom.h
* @version 0.1
* @date 2021-07-17
* @brief
* *****************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* *****************************************************************************
*/
#ifndef __HAL_BOOT2_H__
#define __HAL_BOOT2_H__
#include "drv_device.h"
#include "bl702_sflash.h"
#include "bl702_glb.h"
#define HAL_EFUSE_CPU_MAX 2
#define HAL_EFUSE_PK_HASH_SIZE 256 / 8
#define BL_TCM_BASE BL702_TCM_BASE
#define BL_SYS_CLK_PLL GLB_SYS_CLK_DLL144M
#define BL_SFLASH_CLK GLB_SFLASH_CLK_72M
#define HAL_PLL_CFG_MAGICCODE "PCFG"
#define BL_FLASH_XIP_BASE BL702_FLASH_XIP_BASE
#define FLASH_NOT_DETECT 0x10
typedef struct
{
uint8_t encrypted[HAL_EFUSE_CPU_MAX];
uint8_t sign[HAL_EFUSE_CPU_MAX];
uint8_t hbn_check_sign;
uint8_t rsvd[3];
uint8_t chip_id[8];
uint8_t pk_hash_cpu0[HAL_EFUSE_PK_HASH_SIZE];
uint8_t pk_hash_cpu1[HAL_EFUSE_PK_HASH_SIZE];
} boot_efuse_hw_config;
typedef struct
{
uint8_t xtal_type;
uint8_t pll_clk;
uint8_t hclk_div;
uint8_t bclk_div;
uint8_t flash_clk_type;
uint8_t flash_clk_div;
uint8_t rsvd[2];
} hal_sys_clk_config;
typedef struct
{
uint32_t magicCode; /*'PCFG'*/
hal_sys_clk_config cfg;
uint32_t crc32;
} hal_pll_config;
typedef struct
{
uint32_t magicCode; /*'FCFG'*/
SPI_Flash_Cfg_Type cfg;
uint32_t crc32;
} hal_flash_config;
uint32_t hal_boot2_custom(void);
void hal_reset_sec_eng(void);
void hal_sw_system_reset(void);
int32_t hal_pll_init(hal_pll_config *pll_cfg);
void hal_hbn_set_status_flag(uint32_t flag);
uint32_t hal_hbn_get_status_flag(void);
uint8_t *hal_hbn_get_user_specified_fw(void);
void hal_hbn_clr_user_specified_fw(void);
void efuse_get_boot2_cfg(boot_efuse_hw_config *g_efuse_cfg);
int32_t flash_get_clk_cfg(hal_pll_config *cfg);
#endif

149
drivers/bl702_driver/hal_drv/src/hal_boot2.c Normal file
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@ -0,0 +1,149 @@
#include "hal_boot2.h"
#include "bl702_ef_ctrl.h"
#include "bl702_hbn.h"
#include "bl702_glb.h"
#include "bl702_xip_sflash.h"
/**
* @brief boot2 custom
*
* @param None
* @return uint32
*/
uint32_t hal_boot2_custom(void)
{
return 0;
}
/**
* @brief reset sec eng clock
*
* @return
*/
void hal_reset_sec_eng(void)
{
GLB_AHB_Slave1_Reset(BL_AHB_SLAVE1_SEC);
}
/**
* @brief system soft reset
*
* @return
*/
void hal_sw_system_reset(void)
{
GLB_SW_System_Reset();
}
/**
* @brief system soft reset
*
* @param pll_cfg
* @return
*/
int32_t ATTR_TCM_SECTION hal_pll_init(hal_pll_config *pll_cfg)
{
/* PLL config */
if (pll_cfg->cfg.xtal_type > 0) {
/* use xtal in aon to config PLL */
GLB_Set_System_CLK(pll_cfg->cfg.xtal_type, pll_cfg->cfg.pll_clk);
GLB_Set_System_CLK_Div(pll_cfg->cfg.hclk_div, pll_cfg->cfg.bclk_div);
GLB_Set_SF_CLK(1, (GLB_SFLASH_CLK_Type)pll_cfg->cfg.flash_clk_type, pll_cfg->cfg.flash_clk_div);
} else {
return -1;
}
return 0;
}
/**
* @brief get efuse Boot2 config
*
* @param g_efuse_cfg
* @param
* @param
* @return None
*/
void efuse_get_boot2_cfg(boot_efuse_hw_config *g_efuse_cfg)
{
uint32_t tmp;
HBN_Set_ROOT_CLK_Sel(HBN_ROOT_CLK_XTAL);
/* Get sign and aes type*/
EF_Ctrl_Read_Secure_Boot((EF_Ctrl_Sign_Type *)g_efuse_cfg->sign, (EF_Ctrl_SF_AES_Type *)g_efuse_cfg->encrypted);
/* Get hash:aes key slot 0 and slot1*/
EF_Ctrl_Read_AES_Key(0, (uint32_t *)g_efuse_cfg->pk_hash_cpu0, 8);
EF_Ctrl_Read_Chip_ID(g_efuse_cfg->chip_id);
/* Get HBN check sign config */
EF_Ctrl_Read_Sw_Usage(0, &tmp);
g_efuse_cfg->hbn_check_sign = (tmp >> 22) & 0x01;
GLB_Set_System_CLK_Div(0, 1);
HBN_Set_ROOT_CLK_Sel(HBN_ROOT_CLK_DLL);
}
/**
* @brief
*
* @param flag
* @param
* @param
* @return
*/
void hal_hbn_set_status_flag(uint32_t flag)
{
HBN_Set_Status_Flag(flag);
}
/**
* @brief
*
* @param
* @param
* @param
* @return flag
*/
uint32_t hal_hbn_get_status_flag(void)
{
return HBN_Get_Status_Flag();
}
/**
* @brief
*
* @param
* @param
* @param
* @return user define flag
*/
uint8_t *hal_hbn_get_user_specified_fw(void)
{
return (uint8_t *)(HBN_BASE + HBN_RSV0_OFFSET);
}
/**
* @brief clr user define flag
*
* @param
* @param
* @param
* @return
*/
void hal_hbn_clr_user_specified_fw(void)
{
uint32_t *p = (uint32_t *)(HBN_BASE + HBN_RSV0_OFFSET);
*p = 0;
}
/**
* @brief flash_get_clk_cfg
*
* @return 0
*/
int32_t ATTR_TCM_SECTION flash_get_clk_cfg(hal_pll_config *cfg)
{
L1C_Cache_Flush(0xf);
XIP_SFlash_Read_Via_Cache_Need_Lock(8 + sizeof(hal_flash_config) + BL_FLASH_XIP_BASE, (uint8_t *)cfg, sizeof(hal_pll_config));
L1C_Cache_Flush(0x0);
return 0;
}

4
examples/boot2_iap/CMakeLists.txt
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@ -4,7 +4,9 @@ list(APPEND TARGET_REQUIRED_SRCS blsp_common.c blsp_media_boot.c )
list(APPEND TARGET_REQUIRED_SRCS blsp_boot_parser.c blsp_boot_decompress.c blsp_port.c ) list(APPEND TARGET_REQUIRED_SRCS blsp_boot_parser.c blsp_boot_decompress.c blsp_port.c )
list(APPEND TARGET_REQUIRED_SRCS bflb_eflash_loader_uart.c ) #bflb_eflash_loader_gpio.c list(APPEND TARGET_REQUIRED_SRCS bflb_eflash_loader_uart.c ) #bflb_eflash_loader_gpio.c
list(APPEND TARGET_REQUIRED_SRCS bflb_eflash_loader_cmds.c ) list(APPEND TARGET_REQUIRED_SRCS bflb_eflash_loader_cmds.c )
SET(LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/blsp_boot2_iap_flash.ld) SET(LINKER_SCRIPT ${BOOT2_LINKER_SCRIPT})
set(mains blsp_boot2_iap.c) set(mains blsp_boot2_iap.c)
generate_bin() generate_bin()

12
examples/boot2_iap/bflb_eflash_loader.h
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@ -128,18 +128,6 @@ typedef enum tag_eflash_loader_error_code_t {
#define MAXOF(a, b) ((a) > (b) ? (a) : (b)) #define MAXOF(a, b) ((a) > (b) ? (a) : (b))
#define OFFSET(TYPE, MEMBER) ((uint32_t)(&(((TYPE *)0)->MEMBER))) #define OFFSET(TYPE, MEMBER) ((uint32_t)(&(((TYPE *)0)->MEMBER)))
#ifndef EFLASH_LOADER_FAST
#define bflb_eflash_loader_printf(...) //bflb_platform_printf(__VA_ARGS__)
#define bflb_eflash_loader_printe(...) //bflb_platform_printf(__VA_ARGS__)
#define bflb_eflash_loader_printd(...) //bflb_platform_printf(__VA_ARGS__)
#else
#define bflb_eflash_loader_printf(...) //bflb_platform_printf(__VA_ARGS__)
#define bflb_eflash_loader_printe(...) //bflb_platform_printf(__VA_ARGS__)
#define bflb_eflash_loader_printd(...) //bflb_platform_printf(__VA_ARGS__)
#endif
#define bflb_eflash_loader_printw(...) //bflb_platform_printf(__VA_ARGS__)
#define bflb_eflash_loader_printx(...) //bflb_platform_printx(__VA_ARGS__)
/*read data buffer from flash or boot interface*/ /*read data buffer from flash or boot interface*/
extern volatile uint32_t g_rx_buf_index; extern volatile uint32_t g_rx_buf_index;

431
examples/boot2_iap/bflb_eflash_loader_cmds.c
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@ -42,10 +42,9 @@
#include "softcrc.h" #include "softcrc.h"
#include "bflb_platform.h" #include "bflb_platform.h"
#include "partition.h" #include "partition.h"
#include "bl702_sec_eng.h"
#include "hal_flash.h" #include "hal_flash.h"
#include "bl702_hbn.h" #include "hal_sec_hash.h"
#include "bl702_glb.h" #include "blsp_media_boot.h"
/*for mass read comamnd(flash read and efuse read) is only valid for UART /*for mass read comamnd(flash read and efuse read) is only valid for UART
this is due to ack buffer is g_eflash_loader_readbuf */ this is due to ack buffer is g_eflash_loader_readbuf */
@ -58,8 +57,24 @@ uint32_t g_sha_tmp_buf[16] = { 0 };
uint32_t g_padding[16] = { 0 }; uint32_t g_padding[16] = { 0 };
uint32_t g_sha_in_buf[(BFLB_EFLASH_LOADER_READBUF_SIZE + 3) / 4] = { 0 }; uint32_t g_sha_in_buf[(BFLB_EFLASH_LOADER_READBUF_SIZE + 3) / 4] = { 0 };
static uint32_t g_eflash_loader_error = 0; static uint32_t g_eflash_loader_error = 0;
extern struct device *download_uart; static struct image_cfg_t image_cfg;
static struct bootrom_img_ctrl_t img_ctrl;
static struct segment_header_t segment_hdr;
uint32_t eflash_loader_cmd_ack_buf[16];
extern struct device *download_uart;
extern struct device *dev_check_hash;
/*for bl602*/
static int32_t bflb_bootrom_cmd_get_bootinfo(uint16_t cmd, uint8_t *data, uint16_t len);
static int32_t bflb_bootrom_cmd_load_bootheader(uint16_t cmd, uint8_t *data, uint16_t len);
static int32_t bflb_bootrom_cmd_load_segheader(uint16_t cmd, uint8_t *data, uint16_t len);
static int32_t bflb_bootrom_cmd_load_segdata(uint16_t cmd, uint8_t *data, uint16_t len);
static int32_t bflb_bootrom_cmd_check_img(uint16_t cmd, uint8_t *data, uint16_t len);
static int32_t bflb_bootrom_cmd_run(uint16_t cmd, uint8_t *data, uint16_t len);
static void bflb_bootrom_cmd_ack(uint32_t result);
/* for bl702 */
static int32_t bflb_eflash_loader_cmd_read_jedec_id(uint16_t cmd, uint8_t *data, uint16_t len); static int32_t bflb_eflash_loader_cmd_read_jedec_id(uint16_t cmd, uint8_t *data, uint16_t len);
static int32_t bflb_eflash_loader_cmd_reset(uint16_t cmd, uint8_t *data, uint16_t len); static int32_t bflb_eflash_loader_cmd_reset(uint16_t cmd, uint8_t *data, uint16_t len);
static int32_t bflb_eflash_loader_cmd_erase_flash(uint16_t cmd, uint8_t *data, uint16_t len); static int32_t bflb_eflash_loader_cmd_erase_flash(uint16_t cmd, uint8_t *data, uint16_t len);
@ -73,6 +88,15 @@ static int32_t bflb_eflash_loader_cmd_xip_read_flash_start(uint16_t cmd, uint8_t
static int32_t bflb_eflash_loader_cmd_xip_read_flash_finish(uint16_t cmd, uint8_t *data, uint16_t len); static int32_t bflb_eflash_loader_cmd_xip_read_flash_finish(uint16_t cmd, uint8_t *data, uint16_t len);
static const struct eflash_loader_cmd_cfg_t eflash_loader_cmds[] = { static const struct eflash_loader_cmd_cfg_t eflash_loader_cmds[] = {
/*for bl602*/
{ BFLB_EFLASH_LOADER_CMD_GET_BOOTINFO, EFLASH_LOADER_CMD_ENABLE, bflb_bootrom_cmd_get_bootinfo },
{ BFLB_EFLASH_LOADER_CMD_LOAD_BOOTHEADER, EFLASH_LOADER_CMD_ENABLE, bflb_bootrom_cmd_load_bootheader },
{ BFLB_EFLASH_LOADER_CMD_LOAD_SEGHEADER, EFLASH_LOADER_CMD_ENABLE, bflb_bootrom_cmd_load_segheader },
{ BFLB_EFLASH_LOADER_CMD_LOAD_SEGDATA, EFLASH_LOADER_CMD_ENABLE, bflb_bootrom_cmd_load_segdata },
{ BFLB_EFLASH_LOADER_CMD_CHECK_IMG, EFLASH_LOADER_CMD_ENABLE, bflb_bootrom_cmd_check_img },
{ BFLB_EFLASH_LOADER_CMD_RUN, EFLASH_LOADER_CMD_ENABLE, bflb_bootrom_cmd_run },
/* for bl702 */
{ BFLB_EFLASH_LOADER_CMD_RESET, EFLASH_LOADER_CMD_ENABLE, bflb_eflash_loader_cmd_reset }, { BFLB_EFLASH_LOADER_CMD_RESET, EFLASH_LOADER_CMD_ENABLE, bflb_eflash_loader_cmd_reset },
{ BFLB_EFLASH_LOADER_CMD_FLASH_ERASE, EFLASH_LOADER_CMD_ENABLE, bflb_eflash_loader_cmd_erase_flash }, { BFLB_EFLASH_LOADER_CMD_FLASH_ERASE, EFLASH_LOADER_CMD_ENABLE, bflb_eflash_loader_cmd_erase_flash },
{ BFLB_EFLASH_LOADER_CMD_FLASH_WRITE, EFLASH_LOADER_CMD_ENABLE, bflb_eflash_loader_cmd_write_flash }, { BFLB_EFLASH_LOADER_CMD_FLASH_WRITE, EFLASH_LOADER_CMD_ENABLE, bflb_eflash_loader_cmd_write_flash },
@ -86,11 +110,342 @@ static const struct eflash_loader_cmd_cfg_t eflash_loader_cmds[] = {
{ BFLB_EFLASH_LOADER_CMD_FLASH_READ_JEDECID, EFLASH_LOADER_CMD_ENABLE, bflb_eflash_loader_cmd_read_jedec_id }, { BFLB_EFLASH_LOADER_CMD_FLASH_READ_JEDECID, EFLASH_LOADER_CMD_ENABLE, bflb_eflash_loader_cmd_read_jedec_id },
}; };
/* ack host with command process result */
static void bflb_bootrom_cmd_ack(uint32_t result)
{
if (result == 0) {
/*OK*/
eflash_loader_cmd_ack_buf[0] = BFLB_BOOTROM_CMD_ACK;
bflb_eflash_loader_uart_send((uint32_t *)eflash_loader_cmd_ack_buf, 2);
return;
} else {
/* FL+Error code(2bytes) */
eflash_loader_cmd_ack_buf[0] = BFLB_BOOTROM_CMD_NACK | ((result << 16) & 0xffff0000);
bflb_eflash_loader_uart_send(eflash_loader_cmd_ack_buf, 4);
}
}
/* for bl602 eflash loader */
static int32_t bflb_bootrom_cmd_get_bootinfo(uint16_t cmd, uint8_t *data, uint16_t len)
{
/*OK(2)+len(2)+bootrom version(4)+OTP(16)*/
uint8_t *bootinfo = (uint8_t *)eflash_loader_cmd_ack_buf;
uint8_t otp_cfg[16] = { 0 };
MSG("get bootinfo\r\n");
eflash_loader_cmd_ack_buf[0] = BFLB_BOOTROM_CMD_ACK;
bootinfo[2] = 0x14;
bootinfo[3] = 00;
*((uint32_t *)(bootinfo + 4)) = BFLB_BOOTROM_VERSION;
memcpy(bootinfo + 8, &otp_cfg, 16);
bflb_eflash_loader_uart_send(eflash_loader_cmd_ack_buf, bootinfo[2] + 4);
return BFLB_EFLASH_LOADER_SUCCESS;
}
int32_t bflb_bootrom_parse_bootheader(uint8_t *data)
{
struct bootheader_t *header = (struct bootheader_t *)data;
uint32_t crc;
uint32_t crcpass = 0;
if (header->bootcfg.bval.crc_ignore == 1 && header->crc32 == BOOTROM_DEADBEEF_VAL) {
crcpass = 1;
} else {
crc = BFLB_Soft_CRC32((uint8_t *)header, sizeof(struct bootheader_t) - sizeof(header->crc32));
if (header->crc32 == crc) {
crcpass = 1;
}
}
if (crcpass) {
if (header->bootcfg.bval.notload_in_bootrom) {
return BFLB_EFLASH_LOADER_IMG_BOOTHEADER_NOT_LOAD_ERROR;
}
/* for boot2, one CPU only */
/*get which CPU's img it is*/
if (0 == memcmp((void *)&header->magiccode, "BFNP", sizeof(header->magiccode))) {
//current_cpu=i;
img_ctrl.pkhash_src = 0; //boot_cpu_cfg[i].pkhash_src;
} else {
return BFLB_EFLASH_LOADER_IMG_BOOTHEADER_MAGIC_ERROR;
}
image_cfg.entrypoint = 0;
/* set image valid 0 as default */
image_cfg.img_valid = 0;
/* deal with pll config */
//bflb_bootrom_clk_set_from_user(&header->clkCfg,1);
/* encrypt and sign */
image_cfg.encrypt_type = header->bootcfg.bval.encrypt_type;
image_cfg.sign_type = header->bootcfg.bval.sign;
image_cfg.key_sel = header->bootcfg.bval.key_sel;
/* xip relative */
image_cfg.no_segment = header->bootcfg.bval.no_segment;
image_cfg.cache_select = header->bootcfg.bval.cache_select;
image_cfg.aes_region_lock = header->bootcfg.bval.aes_region_lock;
image_cfg.halt_ap = header->bootcfg.bval.halt_ap;
image_cfg.cache_way_disable = header->bootcfg.bval.cache_way_disable;
image_cfg.hash_ignore = header->bootcfg.bval.hash_ignore;
/* firmware len*/
image_cfg.img_segment_info.segment_cnt = header->img_segment_info.segment_cnt;
/*boot entry and flash offset */
image_cfg.entrypoint = header->bootentry;
image_cfg.img_start.flashoffset = header->img_start.flashoffset;
if (image_cfg.img_segment_info.segment_cnt == 0) {
return BFLB_EFLASH_LOADER_IMG_SEGMENT_CNT_ERROR;
}
/*clear segment_cnt*/
img_ctrl.segment_cnt = 0;
} else {
return BFLB_EFLASH_LOADER_IMG_BOOTHEADER_CRC_ERROR;
}
return BFLB_EFLASH_LOADER_SUCCESS;
}
static int32_t bflb_bootrom_cmd_load_bootheader(uint16_t cmd, uint8_t *data, uint16_t len)
{
int32_t ret = BFLB_EFLASH_LOADER_SUCCESS;
MSG("load bootheader\r\n");
if (len != sizeof(struct bootheader_t)) {
ret = BFLB_EFLASH_LOADER_IMG_BOOTHEADER_LEN_ERROR;
} else {
ret = bflb_bootrom_parse_bootheader(data);
if (BFLB_EFLASH_LOADER_SUCCESS == ret) {
if (image_cfg.sign_type) {
img_ctrl.state = BOOTROM_IMG_PK;
} else if (image_cfg.encrypt_type) {
img_ctrl.state = BOOTROM_IMG_AESIV;
} else {
img_ctrl.state = BOOTROM_IMG_SEGHEADER;
}
}
}
bflb_bootrom_cmd_ack(ret);
return ret;
}
static int32_t bflb_bootrom_is_boot_dst_valid(uint32_t addr, uint32_t len)
{
return 1;
}
int32_t bflb_bootrom_parse_seg_header(uint8_t *data)
{
struct segment_header_t *hdr;
hdr = (struct segment_header_t *)data;
if (hdr->crc32 == BFLB_Soft_CRC32(hdr, sizeof(struct segment_header_t) - 4)) {
memcpy(&segment_hdr, hdr, sizeof(struct segment_header_t));
if (bflb_bootrom_is_boot_dst_valid(segment_hdr.destaddr, segment_hdr.len) == 1) {
return BFLB_EFLASH_LOADER_SUCCESS;
} else {
return BFLB_EFLASH_LOADER_IMG_SECTIONHEADER_DST_ERROR;
}
} else {
return BFLB_EFLASH_LOADER_IMG_SECTIONHEADER_CRC_ERROR;
}
}
static int32_t bflb_bootrom_cmd_load_segheader(uint16_t cmd, uint8_t *data, uint16_t len)
{
int32_t ret = BFLB_EFLASH_LOADER_SUCCESS;
uint8_t *segdatainfo = (uint8_t *)eflash_loader_cmd_ack_buf;
MSG("load SegHdr\r\n");
if (img_ctrl.state != BOOTROM_IMG_SEGHEADER) {
ret = BFLB_EFLASH_LOADER_CMD_SEQ_ERROR;
} else {
if (len != sizeof(struct segment_header_t)) {
ret = BFLB_EFLASH_LOADER_IMG_SECTIONHEADER_LEN_ERROR;
} else {
memset(&segment_hdr, 0, sizeof(struct segment_header_t));
img_ctrl.segdata_recv_len = 0;
ret = bflb_bootrom_parse_seg_header(data);
if (ret == BFLB_EFLASH_LOADER_SUCCESS) {
//bflb_bootrom_printe("dest=%08x,len=%d\r\n",segment_hdr.destaddr,segment_hdr.len);
img_ctrl.state = BOOTROM_IMG_SEGDATA;
}
}
}
/* if segheader is encrypted, then ack segment len*/
if (ret == BFLB_EFLASH_LOADER_SUCCESS) {
/*ack segdata len*/
eflash_loader_cmd_ack_buf[0] = BFLB_BOOTROM_CMD_ACK;
segdatainfo[2] = sizeof(segment_hdr);
segdatainfo[3] = 0x00;
memcpy(&segdatainfo[4], (void *)&segment_hdr, sizeof(segment_hdr));
bflb_eflash_loader_uart_send(eflash_loader_cmd_ack_buf, segdatainfo[2] + 4);
} else {
bflb_bootrom_cmd_ack(ret);
}
return ret;
}
static int32_t bflb_bootrom_cmd_load_segdata(uint16_t cmd, uint8_t *data, uint16_t len)
{
int32_t ret = BFLB_EFLASH_LOADER_SUCCESS;
MSG("load SegData\r\n");
if (img_ctrl.state != BOOTROM_IMG_SEGDATA) {
ret = BFLB_EFLASH_LOADER_CMD_SEQ_ERROR;
goto finished;
}
if (image_cfg.encrypt_type && len % 16 != 0) {
ret = BFLB_EFLASH_LOADER_IMG_SECTIONDATA_LEN_ERROR;
//bflb_bootrom_printe("len error,len=%d\r\n",len);
goto finished;
}
if (img_ctrl.segdata_recv_len + len > segment_hdr.len) {
ret = BFLB_EFLASH_LOADER_IMG_SECTIONDATA_TLEN_ERROR;
//bflb_bootrom_printe("tlen error,receive=%d,indicator=%d\r\n",
//img_ctrl.segdata_recv_len+len,segment_hdr.len);
goto finished;
}
/*no encryption,copy directlly */
ARCH_MemCpy_Fast((void *)segment_hdr.destaddr, data, len);
MSG("segment_hdr.destaddr 0x%08x, len %d,data %02x %02x %02x %02x \r\n", segment_hdr.destaddr, len, data[0], data[1], data[2], data[3]);
img_ctrl.segdata_recv_len += len;
segment_hdr.destaddr += len;
if (img_ctrl.segdata_recv_len >= segment_hdr.len) {
/*finish loading one segment*/
img_ctrl.segment_cnt++;
if (img_ctrl.segment_cnt == image_cfg.img_segment_info.segment_cnt) {
img_ctrl.state = BOOTROM_IMG_CHECK;
} else {
img_ctrl.state = BOOTROM_IMG_SEGHEADER;
}
}
finished:
bflb_bootrom_cmd_ack(ret);
return ret;
}
static int32_t bflb_bootrom_cmd_check_img(uint16_t cmd, uint8_t *data, uint16_t len)
{
int32_t ret = BFLB_EFLASH_LOADER_SUCCESS;
MSG("check img\r\n");
if (img_ctrl.state != BOOTROM_IMG_CHECK) {
ret = BFLB_EFLASH_LOADER_IMG_HALFBAKED_ERROR;
bflb_bootrom_cmd_ack(ret);
return ret;
}
/*default,set state to BOOTROM_IMG_BOOTHEADER*/
img_ctrl.state = BOOTROM_IMG_BOOTHEADER;
/*finally, check hash and signature*/
ret = BFLB_EFLASH_LOADER_SUCCESS; //bflb_bootrom_check_hash();
if (ret == BFLB_EFLASH_LOADER_SUCCESS) {
ret = BFLB_EFLASH_LOADER_SUCCESS; //bflb_bootrom_check_signature();
bflb_bootrom_cmd_ack(ret);
if (ret == BFLB_EFLASH_LOADER_SUCCESS) {
img_ctrl.state = BOOTROM_IMG_RUN;
image_cfg.img_valid = 1;
}
} else {
bflb_bootrom_cmd_ack(ret);
}
return ret;
}
static void bflb_eflash_loader_exit_delay_us(uint32_t cnt)
{
volatile uint32_t i = (32 / 5) * cnt;
while (i--)
;
}
static void bflb_eflash_loader_jump_entry(void)
{
pentry_t pentry = 0;
/* deal NP's entry point */
if (image_cfg.img_valid) {
pentry = (pentry_t)image_cfg.entrypoint;
MSG("image_cfg.entrypoint 0x%08x\r\n", image_cfg.entrypoint);
if (pentry != NULL) {
pentry();
}
}
/*if cann't jump(open jtag only?),stay here */
while (1) {
/*use soft delay only */
bflb_eflash_loader_exit_delay_us(100);
}
}
static int32_t bflb_bootrom_cmd_run(uint16_t cmd, uint8_t *data, uint16_t len)
{
int32_t ret = BFLB_EFLASH_LOADER_SUCCESS;
MSG("run\r\n");
if (img_ctrl.state != BOOTROM_IMG_RUN) {
ret = BFLB_EFLASH_LOADER_CMD_SEQ_ERROR;
bflb_bootrom_cmd_ack(ret);
return ret;
}
bflb_bootrom_cmd_ack(ret);
//bflb_eflash_loader_usart_if_wait_tx_idle(BFLB_BOOTROM_IF_TX_IDLE_TIMEOUT);
bflb_platform_delay_ms(BFLB_BOOTROM_IF_TX_IDLE_TIMEOUT);
/* get msp and pc value */
MSG("image_cfg.img_valid %d\r\n", image_cfg.img_valid);
if (image_cfg.img_valid) {
if (image_cfg.entrypoint == 0) {
if (image_cfg.img_start.ramaddr != 0) {
image_cfg.entrypoint = image_cfg.img_start.ramaddr;
} else {
image_cfg.entrypoint = BL_TCM_BASE;
}
}
}
MSG("jump\r\n");
/*jump to entry */
bflb_eflash_loader_jump_entry();
return ret;
}
/* int boot command control */ /* int boot command control */
void bflb_eflash_loader_cmd_init() void bflb_eflash_loader_cmd_init()
{ {
g_eflash_loader_error = BFLB_EFLASH_LOADER_SUCCESS; g_eflash_loader_error = BFLB_EFLASH_LOADER_SUCCESS;
//download_uart = device_find("download_uart");
} }
/* ack host with command process result */ /* ack host with command process result */
@ -112,7 +467,7 @@ static int32_t bflb_eflash_loader_cmd_read_jedec_id(uint16_t cmd, uint8_t *data,
{ {
uint8_t *ackdata = (uint8_t *)eflash_loader_cmd_mass_ack_buf; uint8_t *ackdata = (uint8_t *)eflash_loader_cmd_mass_ack_buf;
bflb_eflash_loader_printf("JID\n"); MSG("JID\n");
eflash_loader_cmd_mass_ack_buf[0] = BFLB_EFLASH_LOADER_CMD_ACK; eflash_loader_cmd_mass_ack_buf[0] = BFLB_EFLASH_LOADER_CMD_ACK;
/*ack read jedec ID */ /*ack read jedec ID */
@ -129,17 +484,17 @@ static int32_t bflb_eflash_loader_cmd_reset(uint16_t cmd, uint8_t *data, uint16_
pt_table_set_iap_para(&p_iap_param); pt_table_set_iap_para(&p_iap_param);
pt_table_dump(); pt_table_dump();
bflb_eflash_loader_printf("RST\n"); MSG("RST\n");
bflb_eflash_loader_cmd_ack(ret); bflb_eflash_loader_cmd_ack(ret);
bflb_eflash_loader_usart_wait_tx_idle(BFLB_EFLASH_LOADER_IF_TX_IDLE_TIMEOUT); bflb_eflash_loader_usart_wait_tx_idle(BFLB_EFLASH_LOADER_IF_TX_IDLE_TIMEOUT);
/* add for bl702, will impact on boot pin read */ /* add for bl702, will impact on boot pin read */
HBN_Set_Status_Flag(0x594c440B); hal_hbn_set_status_flag(0x594c440B);
/* FPGA POR RST NOT work,so add system reset */ /* FPGA POR RST NOT work,so add system reset */
bflb_platform_delay_us(10); bflb_platform_delay_us(10);
GLB_SW_System_Reset(); hal_sw_system_reset();
return ret; return ret;
} }
@ -149,7 +504,7 @@ static int32_t bflb_eflash_loader_cmd_erase_flash(uint16_t cmd, uint8_t *data, u
int32_t ret = BFLB_EFLASH_LOADER_SUCCESS; int32_t ret = BFLB_EFLASH_LOADER_SUCCESS;
uint32_t startaddr, endaddr; uint32_t startaddr, endaddr;
bflb_eflash_loader_printf("E\n"); MSG("E\n");
if (len != 8) { if (len != 8) {
ret = BFLB_EFLASH_LOADER_FLASH_ERASE_PARA_ERROR; ret = BFLB_EFLASH_LOADER_FLASH_ERASE_PARA_ERROR;
@ -162,10 +517,10 @@ static int32_t bflb_eflash_loader_cmd_erase_flash(uint16_t cmd, uint8_t *data, u
p_iap_param.iap_img_len = endaddr - startaddr + 1; p_iap_param.iap_img_len = endaddr - startaddr + 1;
bflb_eflash_loader_printd("from%08xto%08x\n", p_iap_param.iap_start_addr, p_iap_param.iap_start_addr + p_iap_param.iap_img_len - 1); MSG("from%08xto%08x\n", p_iap_param.iap_start_addr, p_iap_param.iap_start_addr + p_iap_param.iap_img_len - 1);
if (SUCCESS != flash_erase_xip(p_iap_param.iap_start_addr, p_iap_param.iap_img_len)) { if (SUCCESS != flash_erase(p_iap_param.iap_start_addr, p_iap_param.iap_img_len)) {
bflb_eflash_loader_printe("fail\n"); MSG("fail\n");
ret = BFLB_EFLASH_LOADER_FLASH_ERASE_ERROR; ret = BFLB_EFLASH_LOADER_FLASH_ERASE_ERROR;
} }
} }
@ -179,25 +534,23 @@ static int32_t ATTR_TCM_SECTION bflb_eflash_loader_cmd_write_flash(uint16_t cmd,
int32_t ret = BFLB_EFLASH_LOADER_SUCCESS; int32_t ret = BFLB_EFLASH_LOADER_SUCCESS;
uint32_t write_len; uint32_t write_len;
//bflb_eflash_loader_printf("W\n"); MSG("W\n");
if (len <= 4) { if (len <= 4) {
ret = BFLB_EFLASH_LOADER_FLASH_WRITE_PARA_ERROR; ret = BFLB_EFLASH_LOADER_FLASH_WRITE_PARA_ERROR;
} else { } else {
//memcpy(&startaddr,data,4); //memcpy(&startaddr,data,4);
write_len = len - 4; write_len = len - 4;
//MSG("to%08x,%d\n",p_iap_param.iap_write_addr,write_len); MSG("to%08x,%d\n", p_iap_param.iap_write_addr, write_len);
bflb_platform_clear_time();
if (p_iap_param.iap_write_addr < 0xffffffff) { if (p_iap_param.iap_write_addr < 0xffffffff) {
bflb_eflash_loader_cmd_ack(ret); if (SUCCESS != flash_write(p_iap_param.iap_write_addr, data + 4, write_len)) {
if (SUCCESS != flash_write_xip(p_iap_param.iap_write_addr, data + 4, write_len)) {
/*error , response again with error */ /*error , response again with error */
bflb_eflash_loader_printe("fail\r\n"); MSG("fail\r\n");
ret = BFLB_EFLASH_LOADER_FLASH_WRITE_ERROR; ret = BFLB_EFLASH_LOADER_FLASH_WRITE_ERROR;
g_eflash_loader_error = ret; g_eflash_loader_error = ret;
} else { } else {
bflb_eflash_loader_cmd_ack(ret);
p_iap_param.iap_write_addr += write_len; p_iap_param.iap_write_addr += write_len;
//bflb_eflash_loader_printe("Write suss\r\n"); //bflb_eflash_loader_printe("Write suss\r\n");
return BFLB_EFLASH_LOADER_SUCCESS; return BFLB_EFLASH_LOADER_SUCCESS;
@ -205,8 +558,7 @@ static int32_t ATTR_TCM_SECTION bflb_eflash_loader_cmd_write_flash(uint16_t cmd,
} else { } else {
ret = BFLB_EFLASH_LOADER_FLASH_WRITE_ADDR_ERROR; ret = BFLB_EFLASH_LOADER_FLASH_WRITE_ADDR_ERROR;
} }
MSG("%d\n", bflb_platform_get_time_us());
bflb_eflash_loader_printd("%d\n", bflb_platform_get_time_us());
} }
bflb_eflash_loader_cmd_ack(ret); bflb_eflash_loader_cmd_ack(ret);
@ -230,7 +582,7 @@ static int32_t bflb_eflash_loader_cmd_xip_read_flash_finish(uint16_t cmd, uint8_
{ {
int32_t ret = BFLB_EFLASH_LOADER_SUCCESS; int32_t ret = BFLB_EFLASH_LOADER_SUCCESS;
//bflb_eflash_loader_printf("exit\n"); MSG("exit\n");
bflb_eflash_loader_cmd_ack(ret); bflb_eflash_loader_cmd_ack(ret);
return ret; return ret;
} }
@ -244,11 +596,11 @@ static int32_t bflb_eflash_loader_cmd_xip_readSha_flash(uint16_t cmd, uint8_t *d
{ {
int32_t ret = BFLB_EFLASH_LOADER_SUCCESS; int32_t ret = BFLB_EFLASH_LOADER_SUCCESS;
uint32_t startaddr, read_len; uint32_t startaddr, read_len;
SEC_Eng_SHA256_Ctx sha_ctx; //SEC_Eng_SHA256_Ctx sha_ctx;
SEC_ENG_SHA_ID_Type shaId = SEC_ENG_SHA_ID0; //SEC_ENG_SHA_ID_Type shaId = SEC_ENG_SHA_ID0;
uint16_t sha_len = 32; uint16_t sha_len = 32;
uint8_t *ackdata = (uint8_t *)eflash_loader_cmd_mass_ack_buf; uint8_t *ackdata = (uint8_t *)eflash_loader_cmd_mass_ack_buf;
bflb_eflash_loader_printf("XRSha\n"); MSG("XRSha\n");
if (len != 8) { if (len != 8) {
ret = BFLB_EFLASH_LOADER_FLASH_WRITE_PARA_ERROR; ret = BFLB_EFLASH_LOADER_FLASH_WRITE_PARA_ERROR;
@ -256,33 +608,38 @@ static int32_t bflb_eflash_loader_cmd_xip_readSha_flash(uint16_t cmd, uint8_t *d
} else { } else {
startaddr = p_iap_param.iap_start_addr; startaddr = p_iap_param.iap_start_addr;
read_len = p_iap_param.iap_img_len; read_len = p_iap_param.iap_img_len;
bflb_eflash_loader_printd("from%08x,%d\n", startaddr, read_len); MSG("from%08x,%d\n", startaddr, read_len);
//MSG("!!!Be careful that SHA input data should locate at OCRAM \n"); //MSG("!!!Be careful that SHA input data should locate at OCRAM \n");
/* Init SHA and input SHA temp buffer for scattered data and g_padding buffer */ /* Init SHA and input SHA temp buffer for scattered data and g_padding buffer */
Sec_Eng_SHA256_Init(&sha_ctx, shaId, SEC_ENG_SHA256, g_sha_tmp_buf, g_padding); //Sec_Eng_SHA256_Init(&sha_ctx, shaId, SEC_ENG_SHA256, g_sha_tmp_buf, g_padding);
Sec_Eng_SHA_Start(shaId); //Sec_Eng_SHA_Start(shaId);
device_open(dev_check_hash, 0);
while (read_len > 0) { while (read_len > 0) {
if (read_len > BFLB_EFLASH_LOADER_READBUF_SIZE) { if (read_len > BFLB_EFLASH_LOADER_READBUF_SIZE) {
flash_read_xip(startaddr, (uint8_t *)g_sha_in_buf, BFLB_EFLASH_LOADER_READBUF_SIZE); blsp_mediaboot_read(startaddr, (uint8_t *)g_sha_in_buf, BFLB_EFLASH_LOADER_READBUF_SIZE);
/*cal sha here*/ /*cal sha here*/
Sec_Eng_SHA256_Update(&sha_ctx, shaId, (uint8_t *)g_sha_in_buf, BFLB_EFLASH_LOADER_READBUF_SIZE); //Sec_Eng_SHA256_Update(&sha_ctx, shaId, (uint8_t *)g_sha_in_buf, BFLB_EFLASH_LOADER_READBUF_SIZE);
device_write(dev_check_hash, 0, g_sha_in_buf, BFLB_EFLASH_LOADER_READBUF_SIZE);
read_len -= BFLB_EFLASH_LOADER_READBUF_SIZE; read_len -= BFLB_EFLASH_LOADER_READBUF_SIZE;
startaddr += BFLB_EFLASH_LOADER_READBUF_SIZE; startaddr += BFLB_EFLASH_LOADER_READBUF_SIZE;
} else { } else {
flash_read_xip(startaddr, (uint8_t *)g_sha_in_buf, read_len); blsp_mediaboot_read(startaddr, (uint8_t *)g_sha_in_buf, read_len);
/*cal sha here*/ /*cal sha here*/
Sec_Eng_SHA256_Update(&sha_ctx, shaId, (uint8_t *)g_sha_in_buf, read_len); //Sec_Eng_SHA256_Update(&sha_ctx, shaId, (uint8_t *)g_sha_in_buf, read_len);
device_write(dev_check_hash, 0, g_sha_in_buf, read_len);
read_len -= read_len; read_len -= read_len;
startaddr += read_len; startaddr += read_len;
} }
} }
Sec_Eng_SHA256_Finish(&sha_ctx, shaId, &ackdata[4]); //Sec_Eng_SHA256_Finish(&sha_ctx, shaId, &ackdata[4]);
device_read(dev_check_hash, 0, &ackdata[4], 0);
device_close(dev_check_hash);
for (sha_len = 0; sha_len < 32; sha_len++) { for (sha_len = 0; sha_len < 32; sha_len++) {
bflb_eflash_loader_printf("\r\n"); MSG("\r\n");
bflb_eflash_loader_printx(ackdata[4 + sha_len]); MSG("%02x ", ackdata[4 + sha_len]);
} }
sha_len = 32; sha_len = 32;
@ -299,7 +656,7 @@ static int32_t bflb_eflash_loader_cmd_xip_readSha_flash(uint16_t cmd, uint8_t *d
static int32_t bflb_eflash_loader_cmd_write_flash_check(uint16_t cmd, uint8_t *data, uint16_t len) static int32_t bflb_eflash_loader_cmd_write_flash_check(uint16_t cmd, uint8_t *data, uint16_t len)
{ {
bflb_eflash_loader_printf("WC\n"); MSG("WC\n");
bflb_eflash_loader_cmd_ack(g_eflash_loader_error); bflb_eflash_loader_cmd_ack(g_eflash_loader_error);

150
examples/boot2_iap/bflb_eflash_loader_cmds.h
View File

@ -37,6 +37,7 @@
#define __BFLB_EFLASH_LOADER_CMDS_H__ #define __BFLB_EFLASH_LOADER_CMDS_H__
#include "stdint.h" #include "stdint.h"
#include "hal_boot2.h"
#define BFLB_EFLASH_LOADER_CMD_GET_BOOTINFO 0x0010 #define BFLB_EFLASH_LOADER_CMD_GET_BOOTINFO 0x0010
#define BFLB_EFLASH_LOADER_CMD_LOAD_BOOTHEADER 0x0011 #define BFLB_EFLASH_LOADER_CMD_LOAD_BOOTHEADER 0x0011
@ -92,6 +93,13 @@
#define BFLB_EFLASH_LOADER_AES_TYPE BFLB_CRYPT_TYPE_AES_CBC #define BFLB_EFLASH_LOADER_AES_TYPE BFLB_CRYPT_TYPE_AES_CBC
#define BFLB_EFLASH_LOADER_HASH_SIZE 256 / 8 #define BFLB_EFLASH_LOADER_HASH_SIZE 256 / 8
#define BFLB_BOOTROM_CMD_ACK 0x00004B4F
#define BFLB_BOOTROM_CMD_NACK 0x00004C46
#define BFLB_BOOTROM_VERSION 0x01000000
#define BOOTROM_DEADBEEF_VAL 0xdeadbeef
#define BFLB_BOOTROM_IF_TX_IDLE_TIMEOUT 40 /*ms*/
void bflb_eflash_loader_cmd_init(void); void bflb_eflash_loader_cmd_init(void);
void bflb_eflash_loader_cmd_disable(uint8_t cmdid); void bflb_eflash_loader_cmd_disable(uint8_t cmdid);
void bflb_eflash_loader_cmd_enable(uint8_t cmdid); void bflb_eflash_loader_cmd_enable(uint8_t cmdid);
@ -105,4 +113,146 @@ struct eflash_loader_cmd_cfg_t {
pfun_cmd_process cmd_process; pfun_cmd_process cmd_process;
}; };
__PACKED_STRUCT boot_flash_cfg_t
{
uint32_t magiccode; /*'FCFG'*/
SPI_Flash_Cfg_Type cfg;
uint32_t crc32;
};
__PACKED_STRUCT sys_clk_cfg_t
{
uint8_t xtal_type;
uint8_t pll_clk;
uint8_t hclk_div;
uint8_t bclk_div;
uint8_t flash_clk_type;
uint8_t flash_clk_div;
uint8_t rsvd[2];
};
__PACKED_STRUCT boot_clk_cfg_t
{
uint32_t magiccode; /*'PCFG'*/
struct sys_clk_cfg_t cfg;
uint32_t crc32;
};
__PACKED_STRUCT bootheader_t
{
uint32_t magiccode; /*'BFXP'*/
uint32_t rivison;
struct boot_flash_cfg_t flashCfg;
struct boot_clk_cfg_t clkCfg;
__PACKED_UNION
{
__PACKED_STRUCT
{
uint32_t sign : 2; /* [1: 0] for sign*/
uint32_t encrypt_type : 2; /* [3: 2] for encrypt */
uint32_t key_sel : 2; /* [5: 4] for key sel in boot interface*/
uint32_t rsvd6_7 : 2; /* [7: 6] for encrypt*/
uint32_t no_segment : 1; /* [8] no segment info */
uint32_t cache_select : 1; /* [9] for cache */
uint32_t notload_in_bootrom : 1; /* [10] not load this img in bootrom */
uint32_t aes_region_lock : 1; /* [11] aes region lock */
uint32_t cache_way_disable : 4; /* [15: 12] cache way disable info*/
uint32_t crc_ignore : 1; /* [16] ignore crc */
uint32_t hash_ignore : 1; /* [17] hash crc */
uint32_t halt_ap : 1; /* [18] halt ap */
uint32_t rsvd19_31 : 13; /* [31:19] rsvd */
}
bval;
uint32_t wval;
}
bootcfg;
__PACKED_UNION
{
uint32_t segment_cnt;
uint32_t img_len;
}
img_segment_info;
uint32_t bootentry; /* entry point of the image*/
__PACKED_UNION
{
uint32_t ramaddr;
uint32_t flashoffset;
}
img_start;
uint8_t hash[256 / 8];
uint32_t rsv1;
uint32_t rsv2;
uint32_t crc32;
};
__PACKED_STRUCT image_cfg_t
{
uint8_t encrypt_type;
uint8_t sign_type;
uint8_t key_sel;
uint8_t img_valid;
uint8_t no_segment;
uint8_t cache_select;
uint8_t cache_way_disable;
uint8_t hash_ignore;
uint8_t aes_region_lock;
uint8_t halt_ap;
uint8_t r[2];
__PACKED_UNION
{
uint32_t segment_cnt;
uint32_t img_len;
}
img_segment_info;
uint32_t mspval;
uint32_t entrypoint;
__PACKED_UNION
{
uint32_t ramaddr;
uint32_t flashoffset;
}
img_start;
uint32_t sig_len;
uint32_t sig_len2;
uint32_t deallen;
uint32_t maxinputlen;
};
__PACKED_STRUCT bootrom_img_ctrl_t
{
uint8_t segment_cnt;
uint8_t state;
uint8_t pkhash_src;
uint8_t rvsd;
uint32_t segdata_recv_len;
};
__PACKED_STRUCT segment_header_t
{
uint32_t destaddr;
uint32_t len;
uint32_t rsv;
uint32_t crc32;
};
typedef enum tag_bootrom_img_state_t {
BOOTROM_IMG_BOOTHEADER = 0,
BOOTROM_IMG_PK,
BOOTROM_IMG_SIGNATURE,
BOOTROM_IMG_AESIV,
BOOTROM_IMG_SEGHEADER,
BOOTROM_IMG_SEGDATA,
BOOTROM_IMG_CHECK,
BOOTROM_IMG_RUN,
} bootrom_img_state_t;
#endif #endif

42
examples/boot2_iap/bflb_eflash_loader_uart.c
View File

@ -65,11 +65,11 @@ static void ATTR_TCM_SECTION uart0_irq_callback(struct device *dev, void *args,
if (state == UART_EVENT_RX_FIFO) { if (state == UART_EVENT_RX_FIFO) {
//g_rx_buf_len += device_read(download_uart,0,buf,BFLB_EFLASH_LOADER_READBUF_SIZE-g_rx_buf_len); //g_rx_buf_len += device_read(download_uart,0,buf,BFLB_EFLASH_LOADER_READBUF_SIZE-g_rx_buf_len);
BL702_MemCpy(buf + g_rx_buf_len, args, size); arch_memcpy(buf + g_rx_buf_len, args, size);
g_rx_buf_len += size; g_rx_buf_len += size;
} else if (state == UART_EVENT_RTO) { } else if (state == UART_EVENT_RTO) {
//g_rx_buf_len += device_read(download_uart,0,buf,BFLB_EFLASH_LOADER_READBUF_SIZE-g_rx_buf_len); //g_rx_buf_len += device_read(download_uart,0,buf,BFLB_EFLASH_LOADER_READBUF_SIZE-g_rx_buf_len);
BL702_MemCpy(buf + g_rx_buf_len, args, size); arch_memcpy(buf + g_rx_buf_len, args, size);
g_rx_buf_len += size; g_rx_buf_len += size;
} }
} }
@ -80,7 +80,7 @@ static void bflb_eflash_loader_usart_if_init(uint32_t bdrate)
download_uart = device_find("download_uart"); download_uart = device_find("download_uart");
if (download_uart) { if (download_uart) {
UART_DEV(download_uart)->fifo_threshold = 16; UART_DEV(download_uart)->fifo_threshold = 16;
device_open(download_uart, DEVICE_OFLAG_STREAM_TX); device_open(download_uart, DEVICE_OFLAG_STREAM_TX);
} }
} }
@ -114,8 +114,9 @@ static uint32_t *bflb_eflash_loader_usart_if_receive(uint32_t *recv_len, uint16_
{ {
uint8_t *buf = (uint8_t *)g_eflash_loader_readbuf[g_rx_buf_index]; uint8_t *buf = (uint8_t *)g_eflash_loader_readbuf[g_rx_buf_index];
uint16_t datalen = 0; uint16_t datalen = 0;
uint64_t time_now;
bflb_platform_clear_time(); time_now = bflb_platform_get_time_ms();
do { do {
if (g_rx_buf_len >= 4) { if (g_rx_buf_len >= 4) {
@ -137,7 +138,7 @@ static uint32_t *bflb_eflash_loader_usart_if_receive(uint32_t *recv_len, uint16_
} }
} }
} }
} while (bflb_platform_get_time_ms() < timeout); } while (bflb_platform_get_time_ms() - time_now < timeout);
*recv_len = 0; *recv_len = 0;
return NULL; return NULL;
@ -167,8 +168,7 @@ int32_t bflb_eflash_loader_uart_handshake_poll()
uint32_t handshake_count = 0; uint32_t handshake_count = 0;
uint32_t rcv_buf_len = 0; uint32_t rcv_buf_len = 0;
//rcv_buf_len = UART_ReceiveData(g_uart_if_id,buf,128); //rcv_buf_len = UART_ReceiveData(g_uart_if_id,buf,128);
struct device *download_uart = device_find("download_uart"); //struct device *download_uart = device_find("download_uart");
if (download_uart) { if (download_uart) {
rcv_buf_len = device_read(download_uart, 0, buf, 128); rcv_buf_len = device_read(download_uart, 0, buf, 128);
} }
@ -190,10 +190,10 @@ int32_t bflb_eflash_loader_uart_handshake_poll()
if (handshake_count >= BFLB_EFLASH_LAODER_HAND_SHAKE_SUSS_COUNT) { if (handshake_count >= BFLB_EFLASH_LAODER_HAND_SHAKE_SUSS_COUNT) {
//reinit uart //reinit uart
bflb_eflash_loader_printf("handshake %d 0x55 rcv\r\n", handshake_count); MSG("handshake %d 0x55 rcv\r\n", handshake_count);
} else { } else {
//bflb_eflash_loader_printf("handshake err\r\n"); MSG("handshake err\r\n");
return BFLB_EFLASH_LOADER_HANDSHAKE_FAIL; return BFLB_EFLASH_LOADER_HANDSHAKE_FAIL;
} }
@ -203,7 +203,7 @@ int32_t bflb_eflash_loader_uart_handshake_poll()
/* consume the remaining bytes when shake hand(0x55) if needed */ /* consume the remaining bytes when shake hand(0x55) if needed */
rcv_buf_len = device_read(download_uart, 0, buf, 128); //UART_ReceiveData(g_uart_if_id,buf,128); rcv_buf_len = device_read(download_uart, 0, buf, 128); //UART_ReceiveData(g_uart_if_id,buf,128);
bflb_eflash_loader_printf("bflb_eflash_loader_usart_if_receive len %d\r\n", rcv_buf_len); MSG("bflb_eflash_loader_usart_if_receive len %d\r\n", rcv_buf_len);
/*init rx info */ /*init rx info */
g_rx_buf_index = 0; g_rx_buf_index = 0;
g_rx_buf_len = 0; g_rx_buf_len = 0;
@ -234,11 +234,11 @@ int32_t bflb_eflash_loader_uart_change_rate(uint32_t oldval, uint32_t newval)
{ {
uint32_t b = (uint32_t)((g_detected_baudrate * 1.0 * newval) / oldval); uint32_t b = (uint32_t)((g_detected_baudrate * 1.0 * newval) / oldval);
bflb_eflash_loader_printf("BDR:"); //MSG("BDR:");
bflb_eflash_loader_printx(oldval); //MSG(oldval);
bflb_eflash_loader_printx(newval); //MSG(newval);
bflb_eflash_loader_printx(g_detected_baudrate); //MSG(g_detected_baudrate);
bflb_eflash_loader_printx(b); //MSG(b);
bflb_eflash_loader_usart_if_wait_tx_idle(BFLB_EFLASH_LOADER_IF_TX_IDLE_TIMEOUT); bflb_eflash_loader_usart_if_wait_tx_idle(BFLB_EFLASH_LOADER_IF_TX_IDLE_TIMEOUT);
@ -268,7 +268,7 @@ void bflb_eflash_loader_main()
uint8_t err_cnt = 0; uint8_t err_cnt = 0;
uint8_t to_cnt = 0; uint8_t to_cnt = 0;
bflb_eflash_loader_printf("bflb_eflash_loader_main\r\n"); MSG("bflb_eflash_loader_main\r\n");
pt_table_dump(); pt_table_dump();
pt_table_get_iap_para(&p_iap_param); pt_table_get_iap_para(&p_iap_param);
bflb_eflash_loader_cmd_init(); bflb_eflash_loader_cmd_init();
@ -287,14 +287,14 @@ void bflb_eflash_loader_main()
} while (to_cnt < 2 && total_len <= 0); } while (to_cnt < 2 && total_len <= 0);
if (to_cnt >= 2 || total_len <= 0) { if (to_cnt >= 2 || total_len <= 0) {
bflb_eflash_loader_printf("rcv err break\r\n"); MSG("rcv err break\r\n");
break; break;
} }
//bflb_eflash_loader_printf("Recv\r\n"); MSG("Recv\r\n");
//eflash_loader_dump_data(recv_buf,total_len); //eflash_loader_dump_data(recv_buf,total_len);
cmd_len = recv_buf[2] + (recv_buf[3] << 8); cmd_len = recv_buf[2] + (recv_buf[3] << 8);
bflb_eflash_loader_printf("cmd_len %d\r\n", cmd_len); MSG("cmd_len %d\r\n", cmd_len);
/* Check checksum*/ /* Check checksum*/
if (recv_buf[1] != 0) { if (recv_buf[1] != 0) {
@ -306,7 +306,7 @@ void bflb_eflash_loader_main()
if ((tmp & 0xff) != recv_buf[1]) { if ((tmp & 0xff) != recv_buf[1]) {
/* FL+Error code(2bytes) */ /* FL+Error code(2bytes) */
bflb_eflash_loader_printf("Checksum error %02x\r\n", tmp & 0xff); MSG("Checksum error %02x\r\n", tmp & 0xff);
g_eflash_loader_cmd_ack_buf[0] = BFLB_EFLASH_LOADER_CMD_NACK | ((BFLB_EFLASH_LOADER_CMD_CRC_ERROR << 16) & 0xffff0000); g_eflash_loader_cmd_ack_buf[0] = BFLB_EFLASH_LOADER_CMD_NACK | ((BFLB_EFLASH_LOADER_CMD_CRC_ERROR << 16) & 0xffff0000);
bflb_eflash_loader_uart_send(g_eflash_loader_cmd_ack_buf, 4); bflb_eflash_loader_uart_send(g_eflash_loader_cmd_ack_buf, 4);
continue; continue;
@ -316,7 +316,7 @@ void bflb_eflash_loader_main()
ret = bflb_eflash_loader_cmd_process(recv_buf[0], recv_buf + 4, cmd_len); ret = bflb_eflash_loader_cmd_process(recv_buf[0], recv_buf + 4, cmd_len);
if (ret != BFLB_EFLASH_LOADER_SUCCESS) { if (ret != BFLB_EFLASH_LOADER_SUCCESS) {
bflb_eflash_loader_printf(" CMD Pro Ret %d\r\n", ret); MSG(" CMD Pro Ret %d\r\n", ret);
err_cnt++; err_cnt++;

155
examples/boot2_iap/blsp_boot2_iap.c
View File

@ -45,6 +45,7 @@
#include "bflb_eflash_loader_uart.h" #include "bflb_eflash_loader_uart.h"
#include "hal_uart.h" #include "hal_uart.h"
#include "hal_flash.h" #include "hal_flash.h"
#include "hal_boot2.h"
#include "blsp_version.h" #include "blsp_version.h"
/** @addtogroup BL606_BLSP_Boot2 /** @addtogroup BL606_BLSP_Boot2
@ -96,8 +97,6 @@ boot_efuse_hw_config g_efuse_cfg;
uint8_t g_ps_mode = BFLB_PSM_ACTIVE; uint8_t g_ps_mode = BFLB_PSM_ACTIVE;
uint8_t g_cpu_count; uint8_t g_cpu_count;
uint32_t g_user_hash_ignored = 0; uint32_t g_user_hash_ignored = 0;
int32_t blsp_boot2_get_clk_cfg(boot_clk_config *cfg);
void blsp_boot2_get_efuse_cfg(boot_efuse_hw_config *g_efuse_cfg);
/*@} end of group BLSP_BOOT2_Global_Variables */ /*@} end of group BLSP_BOOT2_Global_Variables */
@ -181,7 +180,7 @@ static int BLSP_Boot2_Check_XZ_FW(pt_table_id_type activeID, pt_table_stuff_conf
if(blsp_boot2_verify_xz_header(buf) == 1) if(blsp_boot2_verify_xz_header(buf) == 1)
{ {
MSG_DBG("XZ image\r\n"); MSG("XZ image\r\n");
if(BFLB_BOOT2_SUCCESS == blsp_boot2_update_fw(activeID, ptStuff, ptEntry)) if(BFLB_BOOT2_SUCCESS == blsp_boot2_update_fw(activeID, ptStuff, ptEntry))
{ {
@ -220,7 +219,7 @@ static int blsp_boot2_do_fw_copy(pt_table_id_type active_id, pt_table_stuff_conf
uint32_t deal_len = 0; uint32_t deal_len = 0;
uint32_t cur_len = 0; uint32_t cur_len = 0;
if (SUCCESS != flash_erase_xip(dest_address, dest_max_size)) { if (SUCCESS != flash_erase(dest_address, dest_max_size)) {
MSG_ERR("Erase flash fail"); MSG_ERR("Erase flash fail");
return BFLB_BOOT2_FLASH_ERASE_ERROR; return BFLB_BOOT2_FLASH_ERASE_ERROR;
} }
@ -237,7 +236,7 @@ static int blsp_boot2_do_fw_copy(pt_table_id_type active_id, pt_table_stuff_conf
return BFLB_BOOT2_FLASH_READ_ERROR; return BFLB_BOOT2_FLASH_READ_ERROR;
} }
if (SUCCESS != flash_write_xip(dest_address, g_boot2_read_buf, cur_len)) { if (SUCCESS != flash_write(dest_address, g_boot2_read_buf, cur_len)) {
MSG_ERR("Write flash fail"); MSG_ERR("Write flash fail");
return BFLB_BOOT2_FLASH_WRITE_ERROR; return BFLB_BOOT2_FLASH_WRITE_ERROR;
} }
@ -269,10 +268,10 @@ static int blsp_boot2_deal_one_fw(pt_table_id_type active_id, pt_table_stuff_con
uint32_t ret; uint32_t ret;
if (fw_name != NULL) { if (fw_name != NULL) {
MSG_DBG("Get FW:%s\r\n", fw_name); MSG("Get FW:%s\r\n", fw_name);
ret = pt_table_get_active_entries_by_name(pt_stuff, fw_name, pt_entry); ret = pt_table_get_active_entries_by_name(pt_stuff, fw_name, pt_entry);
} else { } else {
MSG_DBG("Get FW ID:%d\r\n", type); MSG("Get FW ID:%d\r\n", type);
ret = pt_table_get_active_entries_by_id(pt_stuff, type, pt_entry); ret = pt_table_get_active_entries_by_id(pt_stuff, type, pt_entry);
} }
@ -280,7 +279,7 @@ static int blsp_boot2_deal_one_fw(pt_table_id_type active_id, pt_table_stuff_con
MSG_ERR("Entry not found\r\n"); MSG_ERR("Entry not found\r\n");
} else { } else {
blsp_dump_pt_entry(pt_entry); blsp_dump_pt_entry(pt_entry);
MSG_DBG("Check Img\r\n"); MSG("Check Img\r\n");
//if(BLSP_Boot2_Check_XZ_FW(activeID,ptStuff,ptEntry)==1){ //if(BLSP_Boot2_Check_XZ_FW(activeID,ptStuff,ptEntry)==1){
//return 0; //return 0;
@ -324,6 +323,40 @@ static int32_t blsp_boot2_rollback_ptentry(pt_table_id_type active_id, pt_table_
} }
#endif #endif
/****************************************************************************/ /**
* @brief Boot2 get mfg start up request
*
* @param activeID: Active partition table ID
* @param ptStuff: Pointer of partition table stuff
* @param ptEntry: Pointer of active entry
*
* @return 0 for partition table changed,need re-parse,1 for partition table or entry parsed successfully
*
*******************************************************************************/
static void blsp_boot2_get_mfg_startreq(pt_table_id_type active_id, pt_table_stuff_config *pt_stuff, pt_table_entry_config *pt_entry, uint8_t *user_fw_name)
{
uint32_t ret;
uint32_t len = 0;
uint8_t tmp[16 + 1] = { 0 };
ret = pt_table_get_active_entries_by_name(pt_stuff, (uint8_t *)"mfg", pt_entry);
if (PT_ERROR_SUCCESS == ret) {
MSG("XIP_SFlash_Read_Need_Lock_Ext:%08x,", pt_entry->start_address[0] + MFG_START_REQUEST_OFFSET);
flash_read(pt_entry->start_address[0] + MFG_START_REQUEST_OFFSET, tmp, sizeof(tmp) - 1);
MSG("%s\r\n", tmp);
if (tmp[0] == '0' || tmp[0] == '1') {
len = strlen((char *)tmp);
if (len < 9) {
arch_memcpy(user_fw_name, tmp, len);
MSG("%s", tmp);
}
}
} else {
MSG("MFG not found\r\n");
}
}
/*@} end of group BLSP_BOOT2_Private_Functions */ /*@} end of group BLSP_BOOT2_Private_Functions */
/** @defgroup BLSP_BOOT2_Public_Functions /** @defgroup BLSP_BOOT2_Public_Functions
@ -346,48 +379,49 @@ int main(void)
/* Init to zero incase only one cpu boot up*/ /* Init to zero incase only one cpu boot up*/
pt_table_entry_config pt_entry[BFLB_BOOT2_CPU_MAX] = { 0 }; pt_table_entry_config pt_entry[BFLB_BOOT2_CPU_MAX] = { 0 };
uint32_t boot_header_addr[BFLB_BOOT2_CPU_MAX] = { 0 }; uint32_t boot_header_addr[BFLB_BOOT2_CPU_MAX] = { 0 };
uint8_t boot_rollback[BFLB_BOOT2_CPU_MAX] = { 0 }; uint8_t boot_need_rollback[BFLB_BOOT2_CPU_MAX] = { 0 };
uint8_t pt_parsed = 1; uint8_t pt_parsed = 1;
uint8_t user_fw_name[9] = { 0 };
#ifdef BLSP_BOOT2_ROLLBACK #ifdef BLSP_BOOT2_ROLLBACK
uint8_t roll_backed = 0; uint8_t roll_backed = 0;
#endif #endif
uint8_t temp_mode = 0; uint8_t mfg_mode_flag = 0;
//boot_clk_config clk_cfg; //boot_clk_config clk_cfg;
uint8_t flash_cfg_buf[4 + sizeof(SPI_Flash_Cfg_Type) + 4] = { 0 }; uint8_t flash_cfg_buf[4 + sizeof(SPI_Flash_Cfg_Type) + 4] = { 0 };
bflb_eflash_loader_uart_init();
bflb_platform_init(0); bflb_platform_init(0);
hal_boot2_custom();
bflb_eflash_loader_uart_init();
blsp_boot2_pll_init();
flash_init(); flash_init();
bflb_platform_print_set(blsp_boot2_get_log_disable_flag()); bflb_platform_print_set(blsp_boot2_get_log_disable_flag());
bflb_platform_deinit_time(); bflb_platform_deinit_time();
if (blsp_boot2_get_feature_flag() == BLSP_BOOT2_CP_FLAG) { if (blsp_boot2_get_feature_flag() == BLSP_BOOT2_CP_FLAG) {
MSG_DBG("BLSP_Boot2_CP:%s,%s\r\n", __DATE__, __TIME__); MSG("BLSP_Boot2_CP:%s,%s\r\n", __DATE__, __TIME__);
} else if (blsp_boot2_get_feature_flag() == BLSP_BOOT2_MP_FLAG) { } else if (blsp_boot2_get_feature_flag() == BLSP_BOOT2_MP_FLAG) {
MSG_DBG("BLSP_Boot2_MC:%s,%s\r\n", __DATE__, __TIME__); MSG("BLSP_Boot2_MC:%s,%s\r\n", __DATE__, __TIME__);
} else { } else {
MSG_DBG("BLSP_Boot2_SP:%s,%s\r\n", __DATE__, __TIME__); MSG("BLSP_Boot2_SP:%s,%s\r\n", __DATE__, __TIME__);
} }
#ifdef BL_SDK_VER #ifdef BL_SDK_VER
MSG_DBG("SDK:%s\r\n", BL_SDK_VER); MSG("SDK:%s\r\n", BL_SDK_VER);
#else #else
MSG_DBG("MCU SDK:%s\r\n", MCU_SDK_VERSION); MSG("MCU SDK:%s\r\n", MCU_SDK_VERSION);
MSG_DBG("BSP Driver:%s\r\n", BSP_DRIVER_VERSION); MSG("BSP Driver:%s\r\n", BSP_DRIVER_VERSION);
MSG_DBG("BSP Common:%s\r\n", BSP_COMMON_VERSION); MSG("BSP Common:%s\r\n", BSP_COMMON_VERSION);
#endif #endif
if (blsp_boot2_dump_critical_flag()) { if (blsp_boot2_dump_critical_flag()) {
//blsp_dump_data(&clk_cfg,16); //blsp_dump_data(&clk_cfg,16);
} }
MSG_DBG("Get efuse config\r\n"); MSG("Get efuse config\r\n");
blsp_boot2_get_efuse_cfg(&g_efuse_cfg); efuse_get_boot2_cfg(&g_efuse_cfg);
/* Reset Sec_Eng for using */ /* Reset Sec_Eng for using */
blsp_boot2_reset_sec_eng(); hal_reset_sec_eng();
if (blsp_boot2_get_feature_flag() != BLSP_BOOT2_SP_FLAG) { if (blsp_boot2_get_feature_flag() != BLSP_BOOT2_SP_FLAG) {
/* Get cpu count info */ /* Get cpu count info */
g_cpu_count = blsp_boot2_get_cpu_count(); g_cpu_count = blsp_boot2_get_cpu_count();
@ -399,17 +433,17 @@ int main(void)
g_ps_mode = blsp_read_power_save_mode(); g_ps_mode = blsp_read_power_save_mode();
/* Get User specified FW */ /* Get User specified FW */
//ARCH_MemCpy_Fast(userFwName,blsp_get_user_specified_fw(),4); arch_memcpy(user_fw_name, hal_hbn_get_user_specified_fw(), 4);
if (blsp_boot2_8m_support_flag()) { if (blsp_boot2_8m_support_flag()) {
/* Set flash operation function, read via sbus */ /* Set flash operation function, read via sbus */
pt_table_set_flash_operation(flash_erase_xip, flash_write_xip, flash_read_xip); pt_table_set_flash_operation(flash_erase, flash_write, flash_read);
} else { } else {
/* Set flash operation function, read via xip */ /* Set flash operation function, read via xip */
pt_table_set_flash_operation(flash_erase_xip, flash_write_xip, flash_read_xip); pt_table_set_flash_operation(flash_erase, flash_write, flash_read);
} }
while (1) { while (1) {
temp_mode = 0; mfg_mode_flag = 0;
do { do {
active_id = pt_table_get_active_partition_need_lock(pt_table_stuff); active_id = pt_table_get_active_partition_need_lock(pt_table_stuff);
@ -418,15 +452,43 @@ int main(void)
blsp_boot2_on_error("No valid PT\r\n"); blsp_boot2_on_error("No valid PT\r\n");
} }
MSG_DBG("Active PT:%d,%d\r\n", active_id, pt_table_stuff[active_id].pt_table.age); MSG("Active PT:%d,%d\r\n", active_id, pt_table_stuff[active_id].pt_table.age);
pt_parsed = blsp_boot2_deal_one_fw(active_id, &pt_table_stuff[active_id], &pt_entry[0], NULL, PT_ENTRY_FW_CPU0); blsp_boot2_get_mfg_startreq(active_id, &pt_table_stuff[active_id], &pt_entry[0], user_fw_name);
if (pt_parsed == 0) { /* Get entry and boot */
continue; if (user_fw_name[0] == '0') {
g_user_hash_ignored = 1;
pt_parsed = blsp_boot2_deal_one_fw(active_id, &pt_table_stuff[active_id], &pt_entry[0], &user_fw_name[1], PT_ENTRY_FW_CPU0);
if (pt_parsed == 0) {
continue;
} else {
hal_hbn_clr_user_specified_fw();
}
mfg_mode_flag = 1;
user_fw_name[0] = 0;
} else if (user_fw_name[0] == '1' && g_cpu_count > 1) {
g_user_hash_ignored = 1;
pt_parsed = blsp_boot2_deal_one_fw(active_id, &pt_table_stuff[active_id], &pt_entry[1], &user_fw_name[1], PT_ENTRY_FW_CPU1);
if (pt_parsed == 0) {
continue;
} else {
hal_hbn_clr_user_specified_fw();
}
mfg_mode_flag = 1;
user_fw_name[0] = 0;
} else {
pt_parsed = blsp_boot2_deal_one_fw(active_id, &pt_table_stuff[active_id], &pt_entry[0], NULL, PT_ENTRY_FW_CPU0);
if (pt_parsed == 0) {
continue;
}
if (g_cpu_count > 1) {
pt_parsed = blsp_boot2_deal_one_fw(active_id, &pt_table_stuff[active_id], &pt_entry[1], NULL, PT_ENTRY_FW_CPU1);
if (pt_parsed == 0) {
continue;
}
}
} }
pt_parsed = 1;
} while (pt_parsed == 0); } while (pt_parsed == 0);
/* Pass data to App*/ /* Pass data to App*/
@ -439,32 +501,29 @@ int main(void)
/* Pass flash config */ /* Pass flash config */
if (pt_entry[0].start_address[pt_entry[0].active_index] != 0) { if (pt_entry[0].start_address[pt_entry[0].active_index] != 0) {
XIP_SFlash_Read_Via_Cache_Need_Lock(BLSP_BOOT2_XIP_BASE + pt_entry[0].start_address[pt_entry[0].active_index] + 8, flash_cfg_buf, sizeof(flash_cfg_buf)); flash_read(BLSP_BOOT2_XIP_BASE + pt_entry[0].start_address[pt_entry[0].active_index] + 8, flash_cfg_buf, sizeof(flash_cfg_buf));
/* Include magic and CRC32 */ /* Include magic and CRC32 */
blsp_boot2_pass_parameter(flash_cfg_buf, sizeof(flash_cfg_buf)); blsp_boot2_pass_parameter(flash_cfg_buf, sizeof(flash_cfg_buf));
} }
MSG_DBG("Boot start\r\n"); MSG("Boot start\r\n");
for (i = 0; i < g_cpu_count; i++) { for (i = 0; i < g_cpu_count; i++) {
boot_header_addr[i] = pt_entry[i].start_address[pt_entry[i].active_index]; boot_header_addr[i] = pt_entry[i].start_address[pt_entry[i].active_index];
} }
#ifdef BLSP_BOOT2_ROLLBACK #ifdef BLSP_BOOT2_ROLLBACK
/* mfg mode do not need roll back */
/* Test mode is not need roll back */ if (roll_backed == 0 && mfg_mode_flag == 0) {
if (roll_backed == 0 && temp_mode == 0) { ret = blsp_mediaboot_main(boot_header_addr, boot_need_rollback, 1);
ret = blsp_mediaboot_main(boot_header_addr, boot_rollback, 1);
} else { } else {
ret = blsp_mediaboot_main(boot_header_addr, boot_rollback, 0); ret = blsp_mediaboot_main(boot_header_addr, boot_need_rollback, 0);
} }
#else #else
ret = blsp_mediaboot_main(boot_header_addr, boot_rollback, 0); ret = blsp_mediaboot_main(boot_header_addr, boot_need_rollback, 0);
#endif #endif
/* Fail in temp mode,continue to boot normal image */ if (mfg_mode_flag == 1) {
if (temp_mode == 1) {
continue; continue;
} }
@ -475,12 +534,12 @@ int main(void)
break; break;
} }
MSG_DBG("Boot return %d\r\n", ret); MSG("Boot return %d\r\n", ret);
MSG_DBG("Check Rollback\r\n"); MSG("Check Rollback\r\n");
for (i = 0; i < g_cpu_count; i++) { for (i = 0; i < g_cpu_count; i++) {
if (boot_rollback[i] != 0) { if (boot_need_rollback[i] != 0) {
MSG_DBG("Rollback %d\r\n", i); MSG("Rollback %d\r\n", i);
if (BFLB_BOOT2_SUCCESS == blsp_boot2_rollback_ptentry(active_id, &pt_table_stuff[active_id], &pt_entry[i])) { if (BFLB_BOOT2_SUCCESS == blsp_boot2_rollback_ptentry(active_id, &pt_table_stuff[active_id], &pt_entry[i])) {
roll_backed = 1; roll_backed = 1;

10
examples/boot2_iap/blsp_boot_decompress.c
View File

@ -113,7 +113,7 @@ static int32_t blsp_boot2_fw_decompress(uint32_t src_address, uint32_t dest_addr
*p_dest_size = 0; *p_dest_size = 0;
if (dest_max_size > 0) { if (dest_max_size > 0) {
flash_erase_xip(dest_address, dest_max_size); flash_erase(dest_address, dest_max_size);
} }
xz_crc32_init(); xz_crc32_init();
@ -139,7 +139,7 @@ static int32_t blsp_boot2_fw_decompress(uint32_t src_address, uint32_t dest_addr
while (1) { while (1) {
if (b.in_pos == b.in_size) { if (b.in_pos == b.in_size) {
MSG_DBG("XZ Feeding\r\n"); MSG("XZ Feeding\r\n");
if (BFLB_BOOT2_SUCCESS != blsp_mediaboot_read(src_address, g_boot2_read_buf, sizeof(g_boot2_read_buf))) { if (BFLB_BOOT2_SUCCESS != blsp_mediaboot_read(src_address, g_boot2_read_buf, sizeof(g_boot2_read_buf))) {
MSG_ERR("Read XZFW fail\r\n"); MSG_ERR("Read XZFW fail\r\n");
@ -158,10 +158,10 @@ static int32_t blsp_boot2_fw_decompress(uint32_t src_address, uint32_t dest_addr
// msg = "Write error\n"; // msg = "Write error\n";
// goto error; // goto error;
//} //}
MSG_DBG("XZ outputing\r\n"); MSG("XZ outputing\r\n");
if (dest_max_size > 0) { if (dest_max_size > 0) {
flash_write_xip(dest_address, g_xz_output, sizeof(g_xz_output)); flash_write(dest_address, g_xz_output, sizeof(g_xz_output));
} }
dest_address += sizeof(g_xz_output); dest_address += sizeof(g_xz_output);
@ -180,7 +180,7 @@ static int32_t blsp_boot2_fw_decompress(uint32_t src_address, uint32_t dest_addr
//} //}
if (b.out_pos > 0) { if (b.out_pos > 0) {
if (dest_max_size > 0) { if (dest_max_size > 0) {
flash_write_xip(dest_address, g_xz_output, b.out_pos); flash_write(dest_address, g_xz_output, b.out_pos);
} }
dest_address += b.out_pos; dest_address += b.out_pos;

117
examples/boot2_iap/blsp_boot_parser.c
View File

@ -40,6 +40,9 @@
#include "blsp_boot_parser.h" #include "blsp_boot_parser.h"
#include "softcrc.h" #include "softcrc.h"
#include "blsp_port.h" #include "blsp_port.h"
#include "hal_sec_hash.h"
//#include "hal_sec_eng.h"
#include "hal_sec_ecdsa.h"
/** @addtogroup BL606_BLSP_Boot2 /** @addtogroup BL606_BLSP_Boot2
* @{ * @{
@ -64,9 +67,9 @@
/** @defgroup BLSP_BOOT_PARSER_Private_Variables /** @defgroup BLSP_BOOT_PARSER_Private_Variables
* @{ * @{
*/ */
static uint32_t g_sha_tmp_buf[16] = { 0 }; //static uint32_t g_sha_tmp_buf[16] = { 0 };
static uint32_t g_padding[16] = { 0 }; //static uint32_t g_padding[16] = { 0 };
SEC_Eng_SHA256_Ctx g_sha_ctx; //SEC_Eng_SHA256_Ctx g_sha_ctx;
extern uint32_t g_user_hash_ignored; extern uint32_t g_user_hash_ignored;
/*@} end of group BLSP_BOOT_PARSER_Private_Variables */ /*@} end of group BLSP_BOOT_PARSER_Private_Variables */
@ -92,6 +95,8 @@ extern uint32_t g_user_hash_ignored;
* @{ * @{
*/ */
struct device *dev_check_hash;
/****************************************************************************/ /** /****************************************************************************/ /**
* @brief Check if the input public key is the same as burned in the efuse * @brief Check if the input public key is the same as burned in the efuse
* *
@ -131,7 +136,7 @@ static uint32_t blsp_boot_parse_is_pkhash_valid(uint8_t cpu_type, uint8_t *pkhas
* @return boot_error_code type * @return boot_error_code type
* *
*******************************************************************************/ *******************************************************************************/
int32_t blsp_boot_parse_bootheader(boot_image_config *g_boot_img_cfg, uint8_t *data) int32_t blsp_boot_parse_bootheader(boot_image_config *boot_img_cfg, uint8_t *data)
{ {
boot_header_config *header = (boot_header_config *)data; boot_header_config *header = (boot_header_config *)data;
uint32_t crc; uint32_t crc;
@ -140,7 +145,7 @@ int32_t blsp_boot_parse_bootheader(boot_image_config *g_boot_img_cfg, uint8_t *d
uint32_t *phash = (uint32_t *)header->hash; uint32_t *phash = (uint32_t *)header->hash;
if (header->bootCfg.bval.crcIgnore == 1 && header->crc32 == BFLB_BOOT2_DEADBEEF_VAL) { if (header->bootCfg.bval.crcIgnore == 1 && header->crc32 == BFLB_BOOT2_DEADBEEF_VAL) {
MSG_DBG("Crc ignored\r\n"); MSG("Crc ignored\r\n");
crc_pass = 1; crc_pass = 1;
} else { } else {
crc = BFLB_Soft_CRC32((uint8_t *)header, sizeof(boot_header_config) - sizeof(header->crc32)); crc = BFLB_Soft_CRC32((uint8_t *)header, sizeof(boot_header_config) - sizeof(header->crc32));
@ -172,72 +177,80 @@ int32_t blsp_boot_parse_bootheader(boot_image_config *g_boot_img_cfg, uint8_t *d
return BFLB_BOOT2_IMG_BOOTHEADER_MAGIC_ERROR; return BFLB_BOOT2_IMG_BOOTHEADER_MAGIC_ERROR;
} }
g_boot_img_cfg->cpu_type = i; boot_img_cfg->cpu_type = i;
g_boot_img_cfg->entry_point = 0; boot_img_cfg->entry_point = 0;
/* Set image valid 0 as default */ /* Set image valid 0 as default */
g_boot_img_cfg->img_valid = 0; boot_img_cfg->img_valid = 0;
/* Deal with pll config */ /* Deal with pll config */
/* Encrypt and sign */ /* Encrypt and sign */
g_boot_img_cfg->encrypt_type = header->bootCfg.bval.encrypt_type; boot_img_cfg->encrypt_type = header->bootCfg.bval.encrypt_type;
g_boot_img_cfg->sign_type = header->bootCfg.bval.sign; boot_img_cfg->sign_type = header->bootCfg.bval.sign;
g_boot_img_cfg->key_sel = header->bootCfg.bval.key_sel; boot_img_cfg->key_sel = header->bootCfg.bval.key_sel;
/* Xip relative */ /* Xip relative */
g_boot_img_cfg->no_segment = header->bootCfg.bval.no_segment; boot_img_cfg->no_segment = header->bootCfg.bval.no_segment;
g_boot_img_cfg->cache_enable = header->bootCfg.bval.cache_enable; boot_img_cfg->cache_enable = header->bootCfg.bval.cache_enable;
g_boot_img_cfg->aes_region_lock = header->bootCfg.bval.aes_region_lock; boot_img_cfg->aes_region_lock = header->bootCfg.bval.aes_region_lock;
g_boot_img_cfg->halt_cpu1 = header->bootCfg.bval.halt_cpu1; boot_img_cfg->halt_cpu1 = header->bootCfg.bval.halt_cpu1;
g_boot_img_cfg->cache_way_disable = header->bootCfg.bval.cache_way_disable; boot_img_cfg->cache_way_disable = header->bootCfg.bval.cache_way_disable;
g_boot_img_cfg->hash_ignore = header->bootCfg.bval.hash_ignore; boot_img_cfg->hash_ignore = header->bootCfg.bval.hash_ignore;
/* Firmware len*/ /* Firmware len*/
g_boot_img_cfg->img_segment_info.img_len = header->img_segment_info.img_len; boot_img_cfg->img_segment_info.img_len = header->img_segment_info.img_len;
/* Boot entry and flash offset */ /* Boot entry and flash offset */
g_boot_img_cfg->entry_point = header->bootEntry; boot_img_cfg->entry_point = header->bootEntry;
g_boot_img_cfg->img_start.flash_offset = header->img_start.flash_offset; boot_img_cfg->img_start.flash_offset = header->img_start.flash_offset;
MSG_DBG("sign %d,encrypt:%d\r\n", g_boot_img_cfg->sign_type, MSG("sign %d,encrypt:%d\r\n", boot_img_cfg->sign_type,
g_boot_img_cfg->encrypt_type); boot_img_cfg->encrypt_type);
/* Check encrypt and sign match*/ /* Check encrypt and sign match*/
if (g_efuse_cfg.encrypted[i] != 0) { if (g_efuse_cfg.encrypted[i] != 0) {
if (g_boot_img_cfg->encrypt_type == 0) { if (boot_img_cfg->encrypt_type == 0) {
MSG_ERR("Encrypt not fit\r\n"); MSG_ERR("Encrypt not fit\r\n");
return BFLB_BOOT2_IMG_BOOTHEADER_ENCRYPT_NOTFIT; return BFLB_BOOT2_IMG_BOOTHEADER_ENCRYPT_NOTFIT;
} }
} }
if (g_efuse_cfg.sign[i] ^ g_boot_img_cfg->sign_type) { if (g_efuse_cfg.sign[i] ^ boot_img_cfg->sign_type) {
MSG_ERR("sign not fit\r\n"); MSG_ERR("sign not fit\r\n");
g_boot_img_cfg->sign_type = g_efuse_cfg.sign[i]; boot_img_cfg->sign_type = g_efuse_cfg.sign[i];
return BFLB_BOOT2_IMG_BOOTHEADER_SIGN_NOTFIT; return BFLB_BOOT2_IMG_BOOTHEADER_SIGN_NOTFIT;
} }
if (g_ps_mode == BFLB_PSM_HBN && (!g_efuse_cfg.hbn_check_sign)) { if (g_ps_mode == BFLB_PSM_HBN && (!g_efuse_cfg.hbn_check_sign)) {
/* In HBN Mode, if user select to ignore hash and sign*/ /* In HBN Mode, if user select to ignore hash and sign*/
g_boot_img_cfg->hash_ignore = 1; boot_img_cfg->hash_ignore = 1;
} else if ((g_boot_img_cfg->hash_ignore == 1 && *phash != BFLB_BOOT2_DEADBEEF_VAL) || } else if ((boot_img_cfg->hash_ignore == 1 && *phash != BFLB_BOOT2_DEADBEEF_VAL) ||
g_efuse_cfg.sign[i] != 0) { g_efuse_cfg.sign[i] != 0) {
/* If signed or user not really want to ignore, hash can't be ignored*/ /* If signed or user not really want to ignore, hash can't be ignored*/
g_boot_img_cfg->hash_ignore = 0; boot_img_cfg->hash_ignore = 0;
} }
if (g_user_hash_ignored) { if (g_user_hash_ignored) {
g_boot_img_cfg->hash_ignore = 1; boot_img_cfg->hash_ignore = 1;
} }
ARCH_MemCpy_Fast(g_boot_img_cfg->img_hash, header->hash, sizeof(header->hash)); ARCH_MemCpy_Fast(boot_img_cfg->img_hash, header->hash, sizeof(header->hash));
if (g_boot_img_cfg->img_segment_info.img_len == 0) { if (boot_img_cfg->img_segment_info.img_len == 0) {
return BFLB_BOOT2_IMG_SEGMENT_CNT_ERROR; return BFLB_BOOT2_IMG_SEGMENT_CNT_ERROR;
} }
/* Start hash here*/ /* Start hash here*/
Sec_Eng_SHA256_Init(&g_sha_ctx, SEC_ENG_SHA_ID0, SEC_ENG_SHA256, g_sha_tmp_buf, g_padding); //Sec_Eng_SHA256_Init(&g_sha_ctx, SEC_ENG_SHA_ID0, SEC_ENG_SHA256, g_sha_tmp_buf, g_padding);
Sec_Eng_SHA_Start(SEC_ENG_SHA_ID0); //Sec_Eng_SHA_Start(SEC_ENG_SHA_ID0);
sec_hash_sha256_register(SEC_HASH0_INDEX,"dev_check_hash");
dev_check_hash = device_find("dev_check_hash");
if(dev_check_hash){
device_open(dev_check_hash, 0);
}else{
MSG_ERR("hash dev open err\r\n");
return BFLB_BOOT2_FAIL;
}
} else { } else {
MSG_ERR("bootheader crc error\r\n"); MSG_ERR("bootheader crc error\r\n");
@ -262,14 +275,19 @@ int32_t blsp_boot_parse_pkey(boot_image_config *g_boot_img_cfg, uint8_t *data, u
{ {
boot_pk_config *cfg = (boot_pk_config *)data; boot_pk_config *cfg = (boot_pk_config *)data;
uint32_t pk_hash[BFLB_BOOT2_PK_HASH_SIZE / 4]; uint32_t pk_hash[BFLB_BOOT2_PK_HASH_SIZE / 4];
if (cfg->crc32 == BFLB_Soft_CRC32((uint8_t *)cfg, sizeof(boot_pk_config) - 4)) { if (cfg->crc32 == BFLB_Soft_CRC32((uint8_t *)cfg, sizeof(boot_pk_config) - 4)) {
/* Check public key with data info in OTP*/ /* Check public key with data info in OTP*/
Sec_Eng_SHA256_Update(&g_sha_ctx, SEC_ENG_SHA_ID0, data, BFLB_BOOT2_ECC_KEYXSIZE + BFLB_BOOT2_ECC_KEYYSIZE); //Sec_Eng_SHA256_Update(&g_sha_ctx, SEC_ENG_SHA_ID0, data, BFLB_BOOT2_ECC_KEYXSIZE + BFLB_BOOT2_ECC_KEYYSIZE);
Sec_Eng_SHA256_Finish(&g_sha_ctx, SEC_ENG_SHA_ID0, (uint8_t *)pk_hash); //Sec_Eng_SHA256_Finish(&g_sha_ctx, SEC_ENG_SHA_ID0, (uint8_t *)pk_hash);
Sec_Eng_SHA256_Init(&g_sha_ctx, SEC_ENG_SHA_ID0, SEC_ENG_SHA256, g_sha_tmp_buf, g_padding); //Sec_Eng_SHA256_Init(&g_sha_ctx, SEC_ENG_SHA_ID0, SEC_ENG_SHA256, g_sha_tmp_buf, g_padding);
Sec_Eng_SHA_Start(SEC_ENG_SHA_ID0); //Sec_Eng_SHA_Start(SEC_ENG_SHA_ID0);
device_write(dev_check_hash, 0, data, BFLB_BOOT2_ECC_KEYXSIZE + BFLB_BOOT2_ECC_KEYYSIZE);
device_read(dev_check_hash,0,pk_hash,0);
device_open(dev_check_hash, 0);
/* Check pk is valid */ /* Check pk is valid */
if (own == 1) { if (own == 1) {
@ -348,7 +366,8 @@ int32_t blsp_boot_parse_aesiv(boot_image_config *g_boot_img_cfg, uint8_t *data)
/* Update image hash */ /* Update image hash */
if (!g_boot_img_cfg->hash_ignore) { if (!g_boot_img_cfg->hash_ignore) {
Sec_Eng_SHA256_Update(&g_sha_ctx, SEC_ENG_SHA_ID0, data, sizeof(boot_aes_config)); //Sec_Eng_SHA256_Update(&g_sha_ctx, SEC_ENG_SHA_ID0, data, sizeof(boot_aes_config));
device_write(dev_check_hash, 0, data, sizeof(boot_aes_config));
} }
} else { } else {
MSG_ERR("AES IV crc error\r\n"); MSG_ERR("AES IV crc error\r\n");
@ -358,7 +377,6 @@ int32_t blsp_boot_parse_aesiv(boot_image_config *g_boot_img_cfg, uint8_t *data)
return BFLB_BOOT2_SUCCESS; return BFLB_BOOT2_SUCCESS;
} }
#if 0
/****************************************************************************//** /****************************************************************************//**
* @brief Check signature is valid * @brief Check signature is valid
* *
@ -371,9 +389,9 @@ int32_t blsp_boot_parser_check_signature(boot_image_config *g_boot_img_cfg)
{ {
int32_t ret = 0; int32_t ret = 0;
uint64_t startTime = 0; uint64_t startTime = 0;
BFLB_ECDSA_Handle_t ecdsaHandle; sec_ecdsa_handle_t ecdsaHandle;
MSG_DBG("%d,%d\r\n", g_ps_mode, g_efuse_cfg.hbn_check_sign); MSG("%d,%d\r\n", g_ps_mode, g_efuse_cfg.hbn_check_sign);
if(g_ps_mode == BFLB_PSM_HBN && (!g_efuse_cfg.hbn_check_sign)) if(g_ps_mode == BFLB_PSM_HBN && (!g_efuse_cfg.hbn_check_sign))
{ {
@ -382,13 +400,13 @@ int32_t blsp_boot_parser_check_signature(boot_image_config *g_boot_img_cfg)
if(g_boot_img_cfg->sign_type) if(g_boot_img_cfg->sign_type)
{ {
MSG_DBG("Check sig1\r\n"); MSG("Check sig1\r\n");
startTime = bflb_platform_get_time_ms(); startTime = bflb_platform_get_time_ms();
bflb_ecdsa_init(&ecdsaHandle, ECP_SECP256R1); sec_ecdsa_init(&ecdsaHandle, ECP_SECP256R1);
ecdsaHandle.publicKeyx = (uint32_t *)g_boot_img_cfg->eckye_x; ecdsaHandle.publicKeyx = (uint32_t *)g_boot_img_cfg->eckye_x;
ecdsaHandle.publicKeyy = (uint32_t *)g_boot_img_cfg->eckey_y; ecdsaHandle.publicKeyy = (uint32_t *)g_boot_img_cfg->eckey_y;
bflb_ecdsa_verify(&ecdsaHandle, (uint32_t *)g_boot_img_cfg->img_hash, sizeof(g_boot_img_cfg->img_hash) / 4, sec_ecdsa_verify(&ecdsaHandle, (uint32_t *)g_boot_img_cfg->img_hash, sizeof(g_boot_img_cfg->img_hash) / 4,
(uint32_t *)g_boot_img_cfg->signature, (uint32_t *)&g_boot_img_cfg->signature[32]); (uint32_t *)g_boot_img_cfg->signature, (uint32_t *)&g_boot_img_cfg->signature[32]);
//ret=bflb_ecdsa_verify(0,(uint32_t *)g_boot_img_cfg->img_hash,sizeof(g_boot_img_cfg->img_hash), //ret=bflb_ecdsa_verify(0,(uint32_t *)g_boot_img_cfg->img_hash,sizeof(g_boot_img_cfg->img_hash),
@ -400,14 +418,13 @@ int32_t blsp_boot_parser_check_signature(boot_image_config *g_boot_img_cfg)
return BFLB_BOOT2_IMG_SIGN_ERROR; return BFLB_BOOT2_IMG_SIGN_ERROR;
} }
MSG_DBG("Time=%d ms\r\n", (unsigned int)(bflb_platform_get_time_ms() - startTime)); MSG("Time=%d ms\r\n", (unsigned int)(bflb_platform_get_time_ms() - startTime));
} }
MSG_DBG("Success\r\n"); MSG("Success\r\n");
return BFLB_BOOT2_SUCCESS; return BFLB_BOOT2_SUCCESS;
} }
#endif
/****************************************************************************/ /** /****************************************************************************/ /**
* @brief Check hash is valid * @brief Check hash is valid
@ -422,7 +439,9 @@ int32_t blsp_boot_parser_check_hash(boot_image_config *g_boot_img_cfg)
uint32_t img_hash_cal[BFLB_BOOT2_HASH_SIZE / 4]; uint32_t img_hash_cal[BFLB_BOOT2_HASH_SIZE / 4];
if (!g_boot_img_cfg->hash_ignore) { if (!g_boot_img_cfg->hash_ignore) {
Sec_Eng_SHA256_Finish(&g_sha_ctx, SEC_ENG_SHA_ID0, (uint8_t *)img_hash_cal); //Sec_Eng_SHA256_Finish(&g_sha_ctx, SEC_ENG_SHA_ID0, (uint8_t *)img_hash_cal);
device_read(dev_check_hash,0,img_hash_cal,0);
device_close(dev_check_hash);
if (memcmp(img_hash_cal, g_boot_img_cfg->img_hash, if (memcmp(img_hash_cal, g_boot_img_cfg->img_hash,
sizeof(g_boot_img_cfg->img_hash)) != 0) { sizeof(g_boot_img_cfg->img_hash)) != 0) {
@ -431,7 +450,7 @@ int32_t blsp_boot_parser_check_hash(boot_image_config *g_boot_img_cfg)
blsp_dump_data(g_boot_img_cfg->img_hash, BFLB_BOOT2_HASH_SIZE); blsp_dump_data(g_boot_img_cfg->img_hash, BFLB_BOOT2_HASH_SIZE);
return BFLB_BOOT2_IMG_HASH_ERROR; return BFLB_BOOT2_IMG_HASH_ERROR;
} else { } else {
MSG_DBG("Success\r\n"); MSG("Success\r\n");
} }
} }

2
examples/boot2_iap/blsp_boot_parser.h
View File

@ -71,7 +71,7 @@ int32_t blsp_boot_parse_bootheader(boot_image_config *g_boot_img_cfg, uint8_t *d
int32_t blsp_boot_parse_pkey(boot_image_config *g_boot_img_cfg, uint8_t *data, uint8_t own); int32_t blsp_boot_parse_pkey(boot_image_config *g_boot_img_cfg, uint8_t *data, uint8_t own);
int32_t blsp_boot_parse_signature(boot_image_config *g_boot_img_cfg, uint8_t *data, uint8_t own); int32_t blsp_boot_parse_signature(boot_image_config *g_boot_img_cfg, uint8_t *data, uint8_t own);
int32_t blsp_boot_parse_aesiv(boot_image_config *g_boot_img_cfg, uint8_t *data); int32_t blsp_boot_parse_aesiv(boot_image_config *g_boot_img_cfg, uint8_t *data);
//int32_t blsp_boot_parser_check_signature(boot_image_config *g_boot_img_cfg); int32_t blsp_boot_parser_check_signature(boot_image_config *g_boot_img_cfg);
int32_t blsp_boot_parser_check_hash(boot_image_config *g_boot_img_cfg); int32_t blsp_boot_parser_check_hash(boot_image_config *g_boot_img_cfg);
/*@} end of group BLSP_BOOT_PARSER_Public_Functions */ /*@} end of group BLSP_BOOT_PARSER_Public_Functions */

47
examples/boot2_iap/blsp_bootinfo.h
View File

@ -38,6 +38,8 @@
#include "stdint.h" #include "stdint.h"
#include "blsp_port.h" #include "blsp_port.h"
#include "hal_flash.h"
#include "hal_boot2.h"
/** @addtogroup BL606_BLSP_Boot2 /** @addtogroup BL606_BLSP_Boot2
* @{ * @{
@ -63,10 +65,10 @@
/* Image owner type */ /* Image owner type */
#define BFLB_BOOT2_CPU_0 0 #define BFLB_BOOT2_CPU_0 0
#define BFLB_BOOT2_CPU_1 1 #define BFLB_BOOT2_CPU_1 1
#define BFLB_BOOT2_CPU_MAX 2 #define BFLB_BOOT2_CPU_MAX HAL_EFUSE_CPU_MAX
/* Public key hash size */ /* Public key hash size */
#define BFLB_BOOT2_PK_HASH_SIZE 256 / 8 #define BFLB_BOOT2_PK_HASH_SIZE HAL_EFUSE_PK_HASH_SIZE
#define BFLB_BOOT2_HASH_SIZE 256 / 8 #define BFLB_BOOT2_HASH_SIZE 256 / 8
/* Public key type */ /* Public key type */
#define BFLB_BOOT2_ECC_KEYXSIZE 256 / 8 #define BFLB_BOOT2_ECC_KEYXSIZE 256 / 8
@ -134,49 +136,12 @@ typedef enum {
} boot_error_code; } boot_error_code;
typedef struct
{
uint8_t encrypted[BFLB_BOOT2_CPU_MAX];
uint8_t sign[BFLB_BOOT2_CPU_MAX];
uint8_t hbn_check_sign;
uint8_t rsvd[3];
uint8_t chip_id[8];
uint8_t pk_hash_cpu0[BFLB_BOOT2_PK_HASH_SIZE];
uint8_t pk_hash_cpu1[BFLB_BOOT2_PK_HASH_SIZE];
} boot_efuse_hw_config;
typedef struct
{
uint32_t magicCode; /*'FCFG'*/
SPI_Flash_Cfg_Type cfg;
uint32_t crc32;
} boot_flash_config;
typedef struct
{
uint8_t xtal_type;
uint8_t pll_clk;
uint8_t hclk_div;
uint8_t bclk_div;
uint8_t flash_clk_type;
uint8_t flash_clk_div;
uint8_t rsvd[2];
} boot_sys_clk_config;
typedef struct
{
uint32_t magicCode; /*'PCFG'*/
boot_sys_clk_config cfg;
uint32_t crc32;
} boot_clk_config;
typedef struct typedef struct
{ {
uint32_t magicCode; /*'BFXP'*/ uint32_t magicCode; /*'BFXP'*/
uint32_t rivison; uint32_t rivison;
boot_flash_config flash_cfg; hal_flash_config flash_cfg;
boot_clk_config clk_cfg; hal_pll_config clk_cfg;
__PACKED_UNION __PACKED_UNION
{ {
__PACKED_STRUCT __PACKED_STRUCT

10
examples/boot2_iap/blsp_common.c
View File

@ -43,6 +43,7 @@
#include "blsp_common.h" #include "blsp_common.h"
#include "blsp_media_boot.h" #include "blsp_media_boot.h"
#include "hal_flash.h" #include "hal_flash.h"
#include "hal_boot2.h"
#include "bflb_eflash_loader.h" #include "bflb_eflash_loader.h"
/** @addtogroup BL606_BLSP_Boot2 /** @addtogroup BL606_BLSP_Boot2
@ -75,7 +76,6 @@
* @{ * @{
*/ */
int32_t blsp_boot2_set_encrypt(uint8_t index, boot_image_config *g_boot_img_cfg); int32_t blsp_boot2_set_encrypt(uint8_t index, boot_image_config *g_boot_img_cfg);
int32_t blsp_boot2_set_cache(uint8_t cont_read, SPI_Flash_Cfg_Type *flash_cfg, boot_image_config *g_boot_img_cfg);
/*@} end of group BLSP_COMMON_Global_Variables */ /*@} end of group BLSP_COMMON_Global_Variables */
@ -112,13 +112,13 @@ void blsp_dump_data(void *datain, int len)
for (i = 0; i < len; i++) { for (i = 0; i < len; i++) {
if (i % 16 == 0 && i != 0) { if (i % 16 == 0 && i != 0) {
bflb_eflash_loader_printf("\r\n"); MSG("\r\n");
} }
bflb_eflash_loader_printf("%02x ", data[i]); MSG("%02x ", data[i]);
} }
bflb_eflash_loader_printf("\r\n"); MSG("\r\n");
} }
/****************************************************************************/ /** /****************************************************************************/ /**
@ -132,7 +132,7 @@ void blsp_dump_data(void *datain, int len)
int32_t blsp_mediaboot_pre_jump(void) int32_t blsp_mediaboot_pre_jump(void)
{ {
/* Sec eng deinit*/ /* Sec eng deinit*/
blsp_boot2_reset_sec_eng(); hal_reset_sec_eng();
/* Platform deinit */ /* Platform deinit */
bflb_platform_deinit(); bflb_platform_deinit();

1
examples/boot2_iap/blsp_common.h
View File

@ -70,7 +70,6 @@
* @{ * @{
*/ */
void blsp_dump_data(void *datain, int len); void blsp_dump_data(void *datain, int len);
void blsp_fix_invalid_msp_pc(void);
void blsp_boot2_jump_entry(void); void blsp_boot2_jump_entry(void);
int32_t blsp_mediaboot_pre_jump(void); int32_t blsp_mediaboot_pre_jump(void);
uint8_t blsp_boot2_get_feature_flag(void); uint8_t blsp_boot2_get_feature_flag(void);

136
examples/boot2_iap/blsp_media_boot.c
View File

@ -44,6 +44,7 @@
#include "blsp_media_boot.h" #include "blsp_media_boot.h"
#include "softcrc.h" #include "softcrc.h"
#include "bflb_eflash_loader_uart.h" #include "bflb_eflash_loader_uart.h"
//#include "hal_sec_eng.h"
/** @addtogroup BL606_BLSP_Boot2 /** @addtogroup BL606_BLSP_Boot2
* @{ * @{
@ -74,7 +75,7 @@
/** @defgroup BLSP_MEDIA_BOOT_Global_Variables /** @defgroup BLSP_MEDIA_BOOT_Global_Variables
* @{ * @{
*/ */
extern SEC_Eng_SHA256_Ctx g_sha_ctx; //extern SEC_Eng_SHA256_Ctx g_sha_ctx;
/*@} end of group BLSP_MEDIA_BOOT_Global_Variables */ /*@} end of group BLSP_MEDIA_BOOT_Global_Variables */
@ -94,6 +95,8 @@ extern SEC_Eng_SHA256_Ctx g_sha_ctx;
* @{ * @{
*/ */
extern struct device *dev_check_hash;
/****************************************************************************/ /** /****************************************************************************/ /**
* @brief Media boot calculate hash * @brief Media boot calculate hash
* *
@ -133,7 +136,8 @@ static int32_t blsp_mediaboot_cal_hash(uint32_t start_addr, uint32_t total_len)
} }
/* Update hash*/ /* Update hash*/
Sec_Eng_SHA256_Update(&g_sha_ctx, SEC_ENG_SHA_ID0, (uint8_t *)g_boot2_read_buf, read_len); //Sec_Eng_SHA256_Update(&g_sha_ctx, SEC_ENG_SHA_ID0, (uint8_t *)g_boot2_read_buf, read_len);
device_write(dev_check_hash, 0, g_boot2_read_buf, read_len);
//blsp_dump_data((uint8_t *)g_boot2_read_buf,readLen); //blsp_dump_data((uint8_t *)g_boot2_read_buf,readLen);
addr += read_len; addr += read_len;
@ -152,8 +156,7 @@ static int32_t blsp_mediaboot_cal_hash(uint32_t start_addr, uint32_t total_len)
* @return BL_Err_Type * @return BL_Err_Type
* *
*******************************************************************************/ *******************************************************************************/
#if 0 static int32_t blsp_mediaboot_read_signaure(uint32_t addr, uint32_t *len)
static int32_t BLSP_MediaBoot_Read_Signaure(uint32_t addr, uint32_t *len)
{ {
int32_t ret = BFLB_BOOT2_SUCCESS; int32_t ret = BFLB_BOOT2_SUCCESS;
uint32_t sig_len = 0; uint32_t sig_len = 0;
@ -189,7 +192,6 @@ static int32_t BLSP_MediaBoot_Read_Signaure(uint32_t addr, uint32_t *len)
return ret; return ret;
} }
#endif
/****************************************************************************/ /** /****************************************************************************/ /**
* @brief Media boot parse one firmware * @brief Media boot parse one firmware
* *
@ -204,10 +206,10 @@ static int32_t blsp_mediaboot_parse_one_fw(boot_image_config *boot_img_cfg, uint
{ {
uint32_t addr = boot_header_addr; uint32_t addr = boot_header_addr;
int32_t ret; int32_t ret;
// uint32_t sig_len=0; uint32_t sig_len=0;
/* Read boot header*/ /* Read boot header*/
MSG_DBG("R header from %08x\r\n", addr); MSG("R header from %08x\r\n", addr);
ret = blsp_mediaboot_read(addr, g_boot2_read_buf, sizeof(boot_header_config)); ret = blsp_mediaboot_read(addr, g_boot2_read_buf, sizeof(boot_header_config));
if (ret != BFLB_BOOT2_SUCCESS) { if (ret != BFLB_BOOT2_SUCCESS) {
@ -227,15 +229,103 @@ static int32_t blsp_mediaboot_parse_one_fw(boot_image_config *boot_img_cfg, uint
/* Due to OTA, the flash_offset is changed, so copy from partition info */ /* Due to OTA, the flash_offset is changed, so copy from partition info */
boot_img_cfg->img_start.flash_offset = img_addr; boot_img_cfg->img_start.flash_offset = img_addr;
/* If sign enable,get pk key and signature*/
if(boot_img_cfg->sign_type){
/* Read public key */
MSG("R PK\r\n");
ret=blsp_mediaboot_read(addr,g_boot2_read_buf,sizeof(boot_pk_config));
if(ret!=BFLB_BOOT2_SUCCESS){
return ret;
}
if(blsp_boot2_dump_critical_flag()){
blsp_dump_data(g_boot2_read_buf,sizeof(boot_pk_config));
}
addr+=sizeof(boot_pk_config);
ret=blsp_boot_parse_pkey(boot_img_cfg,(uint8_t *)g_boot2_read_buf,1);
if(ret!=BFLB_BOOT2_SUCCESS){
return ret;
}
#ifdef BOOT2_MC
/* Read public key 2*/
MSG("R PK2\r\n");
ret=blsp_mediaboot_read(addr,g_boot2_read_buf,sizeof(boot_pk_config));
if(ret!=BFLB_BOOT2_SUCCESS){
return ret;
}
if(blsp_boot2_dump_critical_flag()){
blsp_dump_data(g_boot2_read_buf,sizeof(boot_pk_config));
}
addr+=sizeof(boot_pk_config);
ret=blsp_boot_parse_pkey(boot_img_cfg,(uint8_t *)g_boot2_read_buf,0);
if(ret!=BFLB_BOOT2_SUCCESS){
return ret;
}
#endif
/* Read signature*/
MSG_DBG("R SIG1\r\n");
blsp_mediaboot_read_signaure(addr,&sig_len);
if(ret!=BFLB_BOOT2_SUCCESS){
return ret;
}
if(blsp_boot2_dump_critical_flag()){
blsp_dump_data(g_boot2_read_buf,sig_len);
}
/*len+data+crc*/
addr+=sizeof(sig_len);
addr+=(sig_len+4);
ret=blsp_boot_parse_signature(boot_img_cfg,(uint8_t *)g_boot2_read_buf,1);
if(ret!=BFLB_BOOT2_SUCCESS){
return ret;
}
#ifdef BOOT2_MC
/* Read signature2*/
MSG_DBG("R SIG2\r\n");
blsp_mediaboot_read_signaure(addr,&sig_len);
if(ret!=BFLB_BOOT2_SUCCESS){
return ret;
}
if(blsp_boot2_dump_critical_flag()){
blsp_dump_data(g_boot2_read_buf,sig_len);
}
/*len+data+crc*/
addr+=sizeof(sig_len);
addr+=(sig_len+4);
ret=blsp_boot_parse_signature(boot_img_cfg,(uint8_t *)g_boot2_read_buf,0);
if(ret!=BFLB_BOOT2_SUCCESS){
return ret;
}
#endif
}
/* If encrypt enable,get AES key*/
if(boot_img_cfg->encrypt_type){
/* Read aes iv*/
MSG_DBG("R IV\r\n");
ret=blsp_mediaboot_read(addr,g_boot2_read_buf,sizeof(boot_aes_config));
if(ret!=BFLB_BOOT2_SUCCESS){
return ret;
}
if(blsp_boot2_dump_critical_flag()){
blsp_dump_data(g_boot2_read_buf,sizeof(boot_aes_config));
}
addr+=sizeof(boot_aes_config);
ret=blsp_boot_parse_aesiv(boot_img_cfg,(uint8_t *)g_boot2_read_buf);
if(ret!=BFLB_BOOT2_SUCCESS){
return ret;
}
}
if (boot_img_cfg->no_segment) { if (boot_img_cfg->no_segment) {
/* Flash image */ /* Flash image */
if (!boot_img_cfg->hash_ignore) { if (!boot_img_cfg->hash_ignore) {
MSG_DBG("Cal hash\r\n"); MSG("Cal hash\r\n");
ret = blsp_mediaboot_cal_hash(img_addr, ret = blsp_mediaboot_cal_hash(img_addr,
boot_img_cfg->img_segment_info.img_len); boot_img_cfg->img_segment_info.img_len);
if (ret != BFLB_BOOT2_SUCCESS) { if (ret != BFLB_BOOT2_SUCCESS) {
MSG_ERR("blsp cal hash err\r\n");
return ret; return ret;
} }
@ -246,10 +336,10 @@ static int32_t blsp_mediaboot_parse_one_fw(boot_image_config *boot_img_cfg, uint
} }
} }
// ret=blsp_boot_parser_check_signature(g_boot_img_cfg); ret=blsp_boot_parser_check_signature(boot_img_cfg);
// if(ret!=BFLB_BOOT2_SUCCESS){ if(ret!=BFLB_BOOT2_SUCCESS){
// return ret; return ret;
// } }
boot_img_cfg->img_valid = 1; boot_img_cfg->img_valid = 1;
} else { } else {
boot_img_cfg->img_valid = 0; boot_img_cfg->img_valid = 0;
@ -276,7 +366,7 @@ static int32_t blsp_mediaboot_parse_one_fw(boot_image_config *boot_img_cfg, uint
*******************************************************************************/ *******************************************************************************/
int32_t ATTR_TCM_SECTION blsp_mediaboot_read(uint32_t addr, uint8_t *data, uint32_t len) int32_t ATTR_TCM_SECTION blsp_mediaboot_read(uint32_t addr, uint8_t *data, uint32_t len)
{ {
XIP_SFlash_Read_Via_Cache_Need_Lock(BLSP_BOOT2_XIP_BASE + addr, data, len); flash_read(BLSP_BOOT2_XIP_BASE + addr, data, len);
return BFLB_BOOT2_SUCCESS; return BFLB_BOOT2_SUCCESS;
} }
@ -291,13 +381,13 @@ int32_t ATTR_TCM_SECTION blsp_mediaboot_read(uint32_t addr, uint8_t *data, uint3
* @return BL_Err_Type * @return BL_Err_Type
* *
*******************************************************************************/ *******************************************************************************/
int32_t blsp_mediaboot_main(uint32_t cpu_boot_header_addr[BFLB_BOOT2_CPU_MAX], uint8_t cpu_roll_back[BFLB_BOOT2_CPU_MAX], uint8_t roll_back) int32_t blsp_mediaboot_main(uint32_t cpu_boot_header_addr[BFLB_BOOT2_CPU_MAX], uint8_t cpu_roll_back[BFLB_BOOT2_CPU_MAX],uint8_t roll_back)
{ {
int32_t ret; int32_t ret;
uint32_t i = 0; uint32_t i = 0;
uint32_t valid_img_found = 0; uint32_t valid_img_found = 0;
uint32_t boot_header_addr[BFLB_BOOT2_CPU_MAX]; uint32_t boot_header_addr[BFLB_BOOT2_CPU_MAX];
MSG_DBG("Media boot main\r\n"); MSG("Media boot main\r\n");
/* Reset some parameters*/ /* Reset some parameters*/
for (i = 0; i < BFLB_BOOT2_CPU_MAX; i++) { for (i = 0; i < BFLB_BOOT2_CPU_MAX; i++) {
@ -328,8 +418,8 @@ int32_t blsp_mediaboot_main(uint32_t cpu_boot_header_addr[BFLB_BOOT2_CPU_MAX], u
if (valid_img_found != g_cpu_count && 1 == roll_back) { if (valid_img_found != g_cpu_count && 1 == roll_back) {
/* For CP and DP, found CPU0 image is taken as correct when the other not found, others as wrong and try to rollback */ /* For CP and DP, found CPU0 image is taken as correct when the other not found, others as wrong and try to rollback */
if (boot_header_addr[1] == 0 && valid_img_found == 1) { if (cpu_roll_back[0] == 0 && valid_img_found == 1) {
MSG_DBG("Found One img Only\r\n"); MSG("Found One img Only\r\n");
} else { } else {
MSG_ERR("Image roll back\r\n"); MSG_ERR("Image roll back\r\n");
return BFLB_BOOT2_IMG_Roll_Back; return BFLB_BOOT2_IMG_Roll_Back;
@ -368,15 +458,13 @@ int32_t blsp_mediaboot_main(uint32_t cpu_boot_header_addr[BFLB_BOOT2_CPU_MAX], u
g_boot_img_cfg[1].cache_way_disable = 0xf; g_boot_img_cfg[1].cache_way_disable = 0xf;
} }
MSG_DBG("%08x,%08x\r\n", g_boot_img_cfg[0].msp_val, g_boot_img_cfg[0].entry_point); MSG("%08x,%08x\r\n", g_boot_img_cfg[0].msp_val, g_boot_img_cfg[0].entry_point);
MSG_DBG("%08x,%08x\r\n", g_boot_img_cfg[1].msp_val, g_boot_img_cfg[1].entry_point); MSG("%08x,%08x\r\n", g_boot_img_cfg[1].msp_val, g_boot_img_cfg[1].entry_point);
MSG_DBG("%08x,%08x\r\n", g_boot_img_cfg[0].img_start.flash_offset, g_boot_img_cfg[0].cache_way_disable); MSG("%08x,%08x\r\n", g_boot_img_cfg[0].img_start.flash_offset, g_boot_img_cfg[0].cache_way_disable);
MSG_DBG("%08x,%08x\r\n", g_boot_img_cfg[1].img_start.flash_offset, g_boot_img_cfg[1].cache_way_disable); MSG("%08x,%08x\r\n", g_boot_img_cfg[1].img_start.flash_offset, g_boot_img_cfg[1].cache_way_disable);
MSG_DBG("CPU Count %d,%d\r\n", g_cpu_count, g_boot_img_cfg[0].halt_cpu1); MSG("CPU Count %d,%d\r\n", g_cpu_count, g_boot_img_cfg[0].halt_cpu1);
blsp_boot2_show_timer(); blsp_boot2_show_timer();
/* Fix invalid pc and msp */
blsp_fix_invalid_msp_pc();
if (BFLB_EFLASH_LOADER_HANDSHAKE_SUSS == bflb_eflash_loader_uart_handshake_poll()) { if (BFLB_EFLASH_LOADER_HANDSHAKE_SUSS == bflb_eflash_loader_uart_handshake_poll()) {
bflb_eflash_loader_main(); bflb_eflash_loader_main();

4
examples/boot2_iap/blsp_media_boot.h
View File

@ -39,7 +39,7 @@
#include "stdint.h" #include "stdint.h"
#include "stdio.h" #include "stdio.h"
#include "string.h" #include "string.h"
#include "blsp_bootinfo.h"
/** @addtogroup BL606_BLSP_Boot2 /** @addtogroup BL606_BLSP_Boot2
* @{ * @{
*/ */
@ -72,7 +72,7 @@
int32_t blsp_mediaboot_read(uint32_t addr, uint8_t *data, uint32_t len); int32_t blsp_mediaboot_read(uint32_t addr, uint8_t *data, uint32_t len);
//uint32_t BLSP_MediaBoot_Get_Flash_Cfg(uint32_t bootheaderAddr); //uint32_t BLSP_MediaBoot_Get_Flash_Cfg(uint32_t bootheaderAddr);
//int32_t BLSP_MediaBoot_Cache_Enable(uint8_t contRead); //int32_t BLSP_MediaBoot_Cache_Enable(uint8_t contRead);
int32_t blsp_mediaboot_main(uint32_t cpu_boot_header_addr[BFLB_BOOT2_CPU_MAX], uint8_t cpu_roll_back[BFLB_BOOT2_CPU_MAX], uint8_t roll_back); int32_t blsp_mediaboot_main(uint32_t cpu_boot_header_addr[BFLB_BOOT2_CPU_MAX], uint8_t cpu_roll_back[BFLB_BOOT2_CPU_MAX],uint8_t roll_back);
void blsp_boot2_show_timer(void); void blsp_boot2_show_timer(void);
//int32_t ATTR_TCM_SECTION BLSP_MediaBoot_Set_Encrypt(uint8_t index,boot_image_config *g_boot_img_cfg); //int32_t ATTR_TCM_SECTION BLSP_MediaBoot_Set_Encrypt(uint8_t index,boot_image_config *g_boot_img_cfg);

376
examples/boot2_iap/blsp_port.c
View File

@ -43,135 +43,9 @@
#include "blsp_common.h" #include "blsp_common.h"
#include "blsp_media_boot.h" #include "blsp_media_boot.h"
#include "tzc_sec_reg.h" #include "tzc_sec_reg.h"
#include "hal_boot2.h"
/** @addtogroup BL606_BLSP_Boot2 extern uint32_t __boot2_pass_param_addr;
* @{
*/
/** @addtogroup BLSP_PORT
* @{
*/
/** @defgroup BLSP_PORT_Private_Macros
* @{
*/
/*@} end of group BLSP_PORT_Private_Macros */
/** @defgroup BLSP_PORT_Private_Types
* @{
*/
/*@} end of group BLSP_PORT_Private_Types */
/** @defgroup BLSP_PORT_Private_Variables
* @{
*/
/*@} end of group BLSP_PORT_Private_Variables */
/** @defgroup BLSP_PORT_Global_Variables
* @{
*/
/*@} end of group BLSP_PORT_Global_Variables */
/** @defgroup BLSP_PORT_Private_Fun_Declaration
* @{
*/
/*@} end of group BLSP_PORT_Private_Fun_Declaration */
/** @defgroup BLSP_PORT_Private_Functions_User_Define
* @{
*/
/*@} end of group BLSP_PORT_Private_Functions_User_Define */
/** @defgroup BLSP_PORT_Private_Functions
* @{
*/
/*@} end of group BLSP_PORT_Private_Functions */
/** @defgroup BLSP_PORT_Public_Functions
* @{
*/
/****************************************************************************/ /**
* @brief Boot2 init timer for cal boot time
*
* @param None
*
* @return None
*
*******************************************************************************/
void blsp_boot2_init_timer(void)
{
TIMER_CFG_Type timer_cfg = {
TIMER_CH0, /* timer channel 0 */
TIMER_CLKSRC_FCLK, /* timer clock source:bus clock */
TIMER_PRELOAD_TRIG_NONE, /* reaload on comaparator 2 */
TIMER_COUNT_FREERUN, /* preload when match occur */
159, /* clock divider */
0xfffffffe, /* match value 0 */
0xfffffffe, /* match value 1 */
0xfffffffe, /* match value 2 */
0, /* preload value */
};
/* Disable all interrupt */
TIMER_IntMask(timer_cfg.timerCh, TIMER_INT_ALL, MASK);
/* Disable timer before config */
TIMER_Disable(timer_cfg.timerCh);
/* Timer init with default configuration */
TIMER_Init(&timer_cfg);
/* Enable timer */
TIMER_Enable(timer_cfg.timerCh);
}
/****************************************************************************/ /**
* @brief Boot2 Disable other CPU cache
*
* @param None
*
* @return None
*
*******************************************************************************/
void blsp_boot2_disable_other_cache(void)
{
}
/****************************************************************************/ /**
* @brief Boot2 Flash Boot2 cache
*
* @param None
*
* @return None
*
*******************************************************************************/
void blsp_boot2_flush_xip_cache()
{
L1C_Cache_Flush(0xf);
}
/****************************************************************************/ /**
* @brief Boot2 Get fw clock config
*
* @param cfg: Clock config pointer
*
* @return boot_error_code
*
*******************************************************************************/
int32_t ATTR_TCM_SECTION blsp_boot2_get_clk_cfg(boot_clk_config *cfg)
{
XIP_SFlash_Read_Via_Cache_Need_Lock(8 + sizeof(boot_flash_config) + BLSP_BOOT2_XIP_BASE,
(uint8_t *)cfg, sizeof(boot_clk_config));
return BFLB_BOOT2_SUCCESS;
}
/****************************************************************************/ /** /****************************************************************************/ /**
* @brief Boot2 show timer for cal boot time * @brief Boot2 show timer for cal boot time
@ -186,60 +60,6 @@ void blsp_boot2_show_timer(void)
MSG("Counter value=%d\n", (unsigned int)bflb_platform_get_time_ms()); MSG("Counter value=%d\n", (unsigned int)bflb_platform_get_time_ms());
} }
/****************************************************************************/ /**
* @brief Boot2 get efuse config security
*
* @param None
*
* @return None
*
*******************************************************************************/
void ATTR_TCM_SECTION blsp_boot2_get_efuse_cfg(boot_efuse_hw_config *g_efuse_cfg)
{
uint32_t tmp;
HBN_Set_ROOT_CLK_Sel(HBN_ROOT_CLK_XTAL);
/* Get sign and aes type*/
EF_Ctrl_Read_Secure_Boot((EF_Ctrl_Sign_Type *)g_efuse_cfg->sign, (EF_Ctrl_SF_AES_Type *)g_efuse_cfg->encrypted);
/* Get hash:aes key slot 0 and slot1*/
EF_Ctrl_Read_AES_Key(0, (uint32_t *)g_efuse_cfg->pk_hash_cpu0, 8);
EF_Ctrl_Read_Chip_ID(g_efuse_cfg->chip_id);
/* Get HBN check sign config */
EF_Ctrl_Read_Sw_Usage(0, &tmp);
g_efuse_cfg->hbn_check_sign = (tmp >> 22) & 0x01;
GLB_Set_System_CLK_Div(0, 1);
HBN_Set_ROOT_CLK_Sel(HBN_ROOT_CLK_DLL);
}
/****************************************************************************/ /**
* @brief Boot2 reset sec_eng module
*
* @param None
*
* @return None
*
*******************************************************************************/
void blsp_boot2_reset_sec_eng(void)
{
GLB_AHB_Slave1_Reset(BL_AHB_SLAVE1_SEC);
}
/****************************************************************************/ /**
* @brief Boot2 init sec_eng PKA module
*
* @param None
*
* @return None
*
*******************************************************************************/
void BLSP_Boot2_Init_Sec_Eng_PKA(void)
{
Sec_Eng_PKA_Reset();
Sec_Eng_PKA_BigEndian_Enable();
}
/****************************************************************************/ /** /****************************************************************************/ /**
* @brief Boot2 get cpu count info * @brief Boot2 get cpu count info
* *
@ -263,7 +83,7 @@ uint32_t blsp_boot2_get_cpu_count(void)
*******************************************************************************/ *******************************************************************************/
uint8_t blsp_read_power_save_mode(void) uint8_t blsp_read_power_save_mode(void)
{ {
if (HBN_Get_Status_Flag() == HBN_STATUS_WAKEUP_FLAG) { if (hal_hbn_get_status_flag() == HBN_STATUS_WAKEUP_FLAG) {
return BFLB_PSM_HBN; return BFLB_PSM_HBN;
} else { } else {
return BFLB_PSM_ACTIVE; return BFLB_PSM_ACTIVE;
@ -282,10 +102,12 @@ uint8_t blsp_read_power_save_mode(void)
void blsp_boot2_pass_parameter(void *data, uint32_t len) void blsp_boot2_pass_parameter(void *data, uint32_t len)
{ {
static uint8_t *p_parameter = NULL; static uint8_t *p_parameter = NULL;
MSG("boot2_pass_param_addr %08x\r\n", &__boot2_pass_param_addr);
if (len == 0) { if (len == 0) {
GLB_Set_EM_Sel(0); //GLB_Set_EM_Sel(0); //system init has done
p_parameter = (uint8_t *)(0x42020000 + 60 * 1024); //p_parameter = (uint8_t *)(0x42020000 + 60 * 1024);
//p_parameter = (uint8_t *)(0x42030000+103*1024);
p_parameter = (uint8_t *)&__boot2_pass_param_addr;
return; return;
} }
@ -293,47 +115,6 @@ void blsp_boot2_pass_parameter(void *data, uint32_t len)
p_parameter += len; p_parameter += len;
} }
/****************************************************************************/ /**
* @brief Boot2 Get XIP offset
*
* @param None
*
* @return XIP offset
*
*******************************************************************************/
uint32_t blsp_boot2_get_xip_offset(void)
{
return SF_Ctrl_Get_Flash_Image_Offset();
}
/****************************************************************************/ /**
* @brief Get User specified firmware to boot up
*
* @param None
*
* @return User specified firmware name
*
*******************************************************************************/
uint8_t *blsp_get_user_specified_fw(void)
{
return (uint8_t *)(HBN_BASE + HBN_RSV0_OFFSET);
}
/****************************************************************************/ /**
* @brief Clear User specified firmware to boot up
*
* @param None
*
* @return None
*
*******************************************************************************/
void blsp_clr_user_specified_fw(void)
{
uint32_t *p = (uint32_t *)(HBN_BASE + HBN_RSV0_OFFSET);
*p = 0;
}
/****************************************************************************/ /** /****************************************************************************/ /**
* @brief Release other CPU * @brief Release other CPU
* *
@ -384,124 +165,6 @@ int32_t ATTR_TCM_SECTION blsp_boot2_set_encrypt(uint8_t index, boot_image_config
return BFLB_BOOT2_SUCCESS; return BFLB_BOOT2_SUCCESS;
} }
/****************************************************************************/ /**
* @brief Media boot set cache according to image config
*
* @param None
*
* @return BL_Err_Type
*
*******************************************************************************/
int32_t ATTR_TCM_SECTION blsp_boot2_set_cache(uint8_t cont_read, SPI_Flash_Cfg_Type *flash_cfg, boot_image_config *g_boot_img_cfg)
{
uint32_t tmp[1];
uint32_t stat;
/* To make it simple, exit cont read anyway */
SF_Ctrl_Set_Owner(SF_CTRL_OWNER_SAHB);
SFlash_Reset_Continue_Read(flash_cfg);
if (flash_cfg->cReadSupport == 0) {
cont_read = 0;
}
if (cont_read == 1) {
stat = SFlash_Read(flash_cfg, flash_cfg->ioMode & 0xf, 1, 0x00000000, (uint8_t *)tmp, sizeof(tmp));
if (SUCCESS != stat) {
return BFLB_BOOT2_FAIL;
}
}
/* Set default value */
L1C_Cache_Enable_Set(0xf);
if (g_boot_img_cfg[0].cache_enable) {
if ((g_boot_img_cfg[0].entry_point & 0xFF000000) == BLSP_BOOT2_XIP_BASE) {
SF_Ctrl_Set_Flash_Image_Offset(g_boot_img_cfg[0].img_start.flash_offset);
SFlash_Cache_Read_Enable(flash_cfg, flash_cfg->ioMode & 0xf, cont_read, g_boot_img_cfg[0].cache_way_disable);
} else {
}
}
return BFLB_BOOT2_SUCCESS;
}
/****************************************************************************/ /**
* @brief Check if MSP is valid
*
* @param msp_val: MSP value
*
* @return 1 for valid and 0 for invalid
*
*******************************************************************************/
int32_t blsp_is_msp_valid(uint32_t msp_val)
{
if (msp_val > BL702_WRAM_BASE && msp_val <= BL702_WRAM_END) {
return 1;
} else if (msp_val > BL702_WRAM_REMAP0_BASE && msp_val <= BL702_WRAM_REMAP0_END) {
return 1;
} else if (msp_val > BL702_WRAM_REMAP1_BASE && msp_val <= BL702_WRAM_REMAP1_END) {
return 1;
} else if (msp_val > BL702_WRAM_REMAP2_BASE && msp_val <= BL702_WRAM_REMAP2_END) {
return 1;
} else if (msp_val > BL702_TCM_BASE && msp_val <= BL702_TCM_END) {
return 1;
} else if (msp_val > BL702_TCM_REMAP0_BASE && msp_val <= BL702_TCM_REMAP0_END) {
return 1;
} else if (msp_val > BL702_TCM_REMAP1_BASE && msp_val <= BL702_TCM_REMAP1_END) {
return 1;
} else if (msp_val > BL702_TCM_REMAP2_BASE && msp_val <= BL702_TCM_REMAP2_END) {
return 1;
}
return 0;
}
/****************************************************************************/ /**
* @brief Check if PC is valid
*
* @param pcVal: PC value
*
* @return 1 for valid and 0 for invalid
*
*******************************************************************************/
int32_t blsp_is_pc_valid(uint32_t pc_val)
{
/* Check XIP memory */
if (pc_val >= BL702_FLASH_XIP_BASE && pc_val < BL702_FLASH_XIP_END) {
return 1;
} else if (pc_val >= BL702_FLASH_XIP_REMAP0_BASE && pc_val < BL702_FLASH_XIP_REMAP0_END) {
return 1;
} else if (pc_val >= BL702_FLASH_XIP_REMAP1_BASE && pc_val < BL702_FLASH_XIP_REMAP1_END) {
return 1;
} else if (pc_val >= BL702_FLASH_XIP_REMAP2_BASE && pc_val < BL702_FLASH_XIP_REMAP2_END) {
return 1;
}
/* Check RAM memory */
if (pc_val >= BL702_WRAM_BASE && pc_val < BL702_WRAM_END) {
return 1;
} else if (pc_val >= BL702_WRAM_REMAP0_BASE && pc_val < BL702_WRAM_REMAP0_END) {
return 1;
} else if (pc_val >= BL702_WRAM_REMAP1_BASE && pc_val < BL702_WRAM_REMAP1_END) {
return 1;
} else if (pc_val >= BL702_WRAM_REMAP2_BASE && pc_val < BL702_WRAM_REMAP2_END) {
return 1;
} else if (pc_val >= BL702_TCM_BASE && pc_val < BL702_TCM_END) {
return 1;
} else if (pc_val >= BL702_TCM_REMAP0_BASE && pc_val < BL702_TCM_REMAP0_END) {
return 1;
} else if (pc_val >= BL702_TCM_REMAP1_BASE && pc_val < BL702_TCM_REMAP1_END) {
return 1;
} else if (pc_val >= BL702_TCM_REMAP2_BASE && pc_val < BL702_TCM_REMAP2_END) {
return 1;
}
return 0;
}
/****************************************************************************/ /** /****************************************************************************/ /**
* @brief Security boot finished * @brief Security boot finished
* *
@ -522,26 +185,27 @@ void ATTR_TCM_SECTION blsp_sboot_finish(void)
} }
/****************************************************************************/ /** /****************************************************************************/ /**
* @brief Fix MSP and PC,if they are invalid * @brief blsp_boot2_pll_init
* *
* @param None * @param None
* *
* @return None * @return None
* *
*******************************************************************************/ *******************************************************************************/
void blsp_fix_invalid_msp_pc(void) void ATTR_TCM_SECTION blsp_boot2_pll_init(void)
{ {
uint32_t i = 0; int32_t ret;
hal_pll_config clk_cfg;
for (i = 0; i < BFLB_BOOT2_CPU_MAX; i++) { flash_get_clk_cfg(&clk_cfg);
if (!blsp_is_msp_valid(g_boot_img_cfg[i].msp_val)) {
g_boot_img_cfg[i].msp_val = 0;
}
if (!blsp_is_pc_valid(g_boot_img_cfg[i].entry_point)) { clk_cfg.cfg.pll_clk = BL_SYS_CLK_PLL;
g_boot_img_cfg[i].entry_point = 0; clk_cfg.cfg.hclk_div = 0;
} clk_cfg.cfg.bclk_div = 1;
} clk_cfg.cfg.flash_clk_type = BL_SFLASH_CLK;
clk_cfg.cfg.flash_clk_div = 1;
ret = hal_pll_init(&clk_cfg);
MSG("hal_pll_init %d\r\n", ret);
} }
typedef void (*pFunc)(void); typedef void (*pFunc)(void);

34
examples/boot2_iap/blsp_port.h
View File

@ -37,16 +37,18 @@
#define __BLSP_PORT_H__ #define __BLSP_PORT_H__
#include "stdint.h" #include "stdint.h"
#include "bl702_glb.h" #include "misc.h"
#include "bl702_aon.h" #include "hal_flash.h"
#include "bl702_hbn.h" //#include "bl702_glb.h"
#include "bl702_ef_ctrl.h" //#include "bl702_aon.h"
#include "bl702_sflash.h" //#include "bl702_hbn.h"
#include "bl702_xip_sflash.h" //#include "bl702_ef_ctrl.h"
#include "bl702_xip_sflash_ext.h" //#include "bl702_sflash.h"
#include "bl702_sf_cfg.h" //#include "bl702_xip_sflash.h"
#include "bl702_timer.h" //#include "bl702_xip_sflash_ext.h"
#include "bl702_sec_eng.h" //#include "bl702_sf_cfg.h"
//#include "bl702_timer.h"
//#include "bl702_sec_eng.h"
//#include "bflb_ecdsa.h" //#include "bflb_ecdsa.h"
/** @addtogroup BL606_BLSP_Boot2 /** @addtogroup BL606_BLSP_Boot2
@ -74,8 +76,8 @@
#define BFLB_BOOT2_CPU1_APP_MSP_ADDR (0) #define BFLB_BOOT2_CPU1_APP_MSP_ADDR (0)
#define BFLB_BOOT2_CPU1_DBG_INFO_ADDR (0) #define BFLB_BOOT2_CPU1_DBG_INFO_ADDR (0)
#define MFG_START_REQUEST_OFFSET ((4 + 184) * 1024) #define MFG_START_REQUEST_OFFSET ((4 + 184) * 1024)
#define BLSP_BOOT2_XIP_BASE BL702_FLASH_XIP_BASE #define BLSP_BOOT2_XIP_BASE BL_FLASH_XIP_BASE
#define ARCH_Delay_MS BL702_Delay_MS //#define ARCH_Delay_MS BL702_Delay_MS
/*@} end of group BLSP_PORT_Public_Constants */ /*@} end of group BLSP_PORT_Public_Constants */
@ -88,21 +90,15 @@
/** @defgroup BLSP_PORT_Public_Functions /** @defgroup BLSP_PORT_Public_Functions
* @{ * @{
*/ */
void blsp_boot2_init_timer(void);
void blsp_boot2_disable_other_cache(void);
void blsp_boot2_flush_xip_cache(void);
void blsp_boot2_show_timer(void); void blsp_boot2_show_timer(void);
void blsp_boot2_reset_sec_eng(void);
void blsp_boot2_init_sec_eng_pka(void); void blsp_boot2_init_sec_eng_pka(void);
uint32_t blsp_boot2_get_cpu_count(void); uint32_t blsp_boot2_get_cpu_count(void);
uint8_t blsp_read_power_save_mode(void); uint8_t blsp_read_power_save_mode(void);
void blsp_boot2_pass_parameter(void *data, uint32_t len); void blsp_boot2_pass_parameter(void *data, uint32_t len);
uint32_t blsp_boot2_get_xip_offset();
uint8_t *blsp_get_user_specified_fw(void);
void blsp_clr_user_specified_fw(void);
void blsp_boot2_releae_other_cpu(void); void blsp_boot2_releae_other_cpu(void);
int32_t blsp_is_msp_valid(uint32_t msp_val); int32_t blsp_is_msp_valid(uint32_t msp_val);
int32_t blsp_is_pc_valid(uint32_t pc_val); int32_t blsp_is_pc_valid(uint32_t pc_val);
void blsp_boot2_pll_init(void);
void ATTR_TCM_SECTION blsp_sboot_finish(void); void ATTR_TCM_SECTION blsp_sboot_finish(void);
; ;
void blsp_fix_invalid_msp_pc(void); void blsp_fix_invalid_msp_pc(void);