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[feat][ef_ctrl] add ef_ctrl lhal driver

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This commit is contained in:
jzlv 2022-11-25 19:47:54 +08:00
parent 3c19b600a0
commit f13440fc48
42 changed files with 2539 additions and 863 deletions
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15
drivers/lhal/CMakeLists.txt
View File

@ -1,6 +1,12 @@
sdk_generate_library()
if(NOT CONFIG_ROMAPI)
sdk_library_add_sources(src/bflb_common.c)
else()
if((NOT ("${CHIP}" STREQUAL "bl602")) AND (NOT ("${CHIP}" STREQUAL "bl702")))
sdk_library_add_sources(src/bflb_common.c)
endif()
endif()
sdk_library_add_sources(src/bflb_adc.c)
if((NOT ("${CHIP}" STREQUAL "bl702l")))
@ -12,7 +18,7 @@ sdk_library_add_sources(src/bflb_emac.c)
endif()
sdk_library_add_sources(src/bflb_gpio.c)
sdk_library_add_sources(src/bflb_i2c.c)
if((NOT ("${CHIP}" STREQUAL "bl602")) AND (NOT ("${CHIP}" STREQUAL "bl702")))
if((NOT ("${CHIP}" STREQUAL "bl628")))
sdk_library_add_sources(src/bflb_ir.c)
endif()
sdk_library_add_sources(src/bflb_uart.c)
@ -26,7 +32,10 @@ sdk_library_add_sources(src/bflb_timer.c)
sdk_library_add_sources(src/bflb_wdg.c)
sdk_library_add_sources(src/bflb_cks.c)
sdk_library_add_sources(src/bflb_mjpeg.c)
# sdk_library_add_sources(src/bflb_clock.c)
if("${CHIP}" STREQUAL "bl628")
sdk_library_add_sources(src/bflb_clock.c)
endif()
sdk_library_add_sources(src/bflb_ef_ctrl.c)
if(("${CHIP}" STREQUAL "bl702") OR ("${CHIP}" STREQUAL "bl602"))
sdk_library_add_sources(src/bflb_pwm_v1.c)
@ -74,4 +83,4 @@ sdk_add_compile_definitions(-DCPU_${CPU_ID_NAME})
endif()
sdk_add_static_library(src/pka/libpka.a)
# add_subdirectory(src/pka)
#add_subdirectory(src/pka)

21
drivers/lhal/config/bl602/device_table.c
View File

@ -19,6 +19,13 @@ struct bflb_device_s bl602_device_table[] = {
.sub_idx = 0,
.dev_type = BFLB_DEVICE_TYPE_DAC,
.user_data = NULL },
{ .name = "ef_ctrl",
.reg_base = EF_CTRL_BASE,
.irq_num = 0xff,
.idx = 0,
.sub_idx = 0,
.dev_type = BFLB_DEVICE_TYPE_EF_CTRL,
.user_data = NULL },
{ .name = "gpio",
.reg_base = GLB_BASE,
.irq_num = BL602_IRQ_GPIO_INT0,
@ -169,6 +176,20 @@ struct bflb_device_s bl602_device_table[] = {
.sub_idx = 0,
.dev_type = BFLB_DEVICE_TYPE_TIMER,
.user_data = NULL },
{ .name = "irtx",
.reg_base = IR_BASE,
.irq_num = BL602_IRQ_IRTX,
.idx = 0,
.sub_idx = 0,
.dev_type = BFLB_DEVICE_TYPE_IR,
.user_data = NULL },
{ .name = "irrx",
.reg_base = IR_BASE,
.irq_num = BL602_IRQ_IRRX,
.idx = 0,
.sub_idx = 0,
.dev_type = BFLB_DEVICE_TYPE_IR,
.user_data = NULL },
};
struct bflb_device_s *bflb_device_get_by_name(const char *name)

7
drivers/lhal/config/bl616/device_table.c
View File

@ -19,6 +19,13 @@ struct bflb_device_s bl616_device_table[] = {
.sub_idx = 0,
.dev_type = BFLB_DEVICE_TYPE_DAC,
.user_data = NULL },
{ .name = "ef_ctrl",
.reg_base = EF_CTRL_BASE,
.irq_num = 0xff,
.idx = 0,
.sub_idx = 0,
.dev_type = BFLB_DEVICE_TYPE_EF_CTRL,
.user_data = NULL },
{ .name = "gpio",
.reg_base = GLB_BASE,
.irq_num = BL616_IRQ_GPIO_INT0,

28
drivers/lhal/config/bl702/device_table.c
View File

@ -19,6 +19,13 @@ struct bflb_device_s bl702_device_table[] = {
.sub_idx = 0,
.dev_type = BFLB_DEVICE_TYPE_DAC,
.user_data = NULL },
{ .name = "ef_ctrl",
.reg_base = EF_CTRL_BASE,
.irq_num = 0xff,
.idx = 0,
.sub_idx = 0,
.dev_type = BFLB_DEVICE_TYPE_EF_CTRL,
.user_data = NULL },
{ .name = "gpio",
.reg_base = GLB_BASE,
.irq_num = BL702_IRQ_GPIO_INT0,
@ -176,6 +183,27 @@ struct bflb_device_s bl702_device_table[] = {
.sub_idx = 0,
.dev_type = BFLB_DEVICE_TYPE_TIMER,
.user_data = NULL },
{ .name = "irtx",
.reg_base = IR_BASE,
.irq_num = BL702_IRQ_IRTX,
.idx = 0,
.sub_idx = 0,
.dev_type = BFLB_DEVICE_TYPE_IR,
.user_data = NULL },
{ .name = "irrx",
.reg_base = IR_BASE,
.irq_num = BL702_IRQ_IRRX,
.idx = 0,
.sub_idx = 0,
.dev_type = BFLB_DEVICE_TYPE_IR,
.user_data = NULL },
{ .name = "kys0",
.reg_base = KYS_BASE,
.irq_num = BL702_IRQ_KYS,
.idx = 0,
.sub_idx = 0,
.dev_type = BFLB_DEVICE_TYPE_KYS,
.user_data = NULL },
};
struct bflb_device_s *bflb_device_get_by_name(const char *name)

7
drivers/lhal/config/bl808/device_table.c
View File

@ -23,6 +23,13 @@ struct bflb_device_s bl808_device_table[] = {
.sub_idx = 0,
.dev_type = BFLB_DEVICE_TYPE_DAC,
.user_data = NULL },
{ .name = "ef_ctrl",
.reg_base = EF_CTRL_BASE,
.irq_num = 0xff,
.idx = 0,
.sub_idx = 0,
.dev_type = BFLB_DEVICE_TYPE_EF_CTRL,
.user_data = NULL },
{ .name = "gpio",
.reg_base = GLB_BASE,
#if defined(CPU_M0)

2
drivers/lhal/include/arch/risc-v/t-head/rv_Sv39.c
View File

@ -75,8 +75,6 @@ int RV_Sv39_Create_PageMapping(Sv39_PTE_cfg_t *cfg, uintptr_t *tlb_index, volati
volatile uint64_t *ttb1 = NULL;
volatile uint64_t *ttb2 = NULL;
/* TODO: check parameters */
if (Sv39_PTE_LOC_JTLB == cfg->where) {
t0 = cfg->va;
smeh = ((t0 >> 12) << SMEH_VPN_OFFSET) | cfg->size | cfg->asid;

8
drivers/lhal/include/bflb_core.h
View File

@ -63,6 +63,12 @@ void assert_func(uint8_t *file, uint32_t line, uint8_t *function, uint8_t *strin
#define BFLB_DEVICE_TYPE_PKA 32
#define BFLB_DEVICE_TYPE_CKS 33
#define BFLB_DEVICE_TYPE_MJPEG 34
#define BFLB_DEVICE_TYPE_KYS 35
#define BFLB_DEVICE_TYPE_DBI 36
#define BFLB_DEVICE_TYPE_PEC 37
#define BFLB_DEVICE_TYPE_WDT 38
#define BFLB_DEVICE_TYPE_EF_CTRL 39
#define BFLB_DEVICE_TYPE_SDIO3 40
struct bflb_device_s {
const char *name;
@ -86,4 +92,4 @@ void bflb_device_set_userdata(struct bflb_device_s *device, void *user_data);
}
#endif
#endif
#endif

49
drivers/lhal/include/bflb_ef_ctrl.h Normal file
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@ -0,0 +1,49 @@
#ifndef _BFLB_EF_CTRL_H
#define _BFLB_EF_CTRL_H
#include "bflb_core.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Efuse common trim config definition
*/
typedef struct
{
char *name; /*!< trim anme */
uint16_t en_addr; /*!< enable address */
uint16_t parity_addr; /*!< parity address */
uint16_t value_addr; /*!< value address */
uint16_t value_len; /*!< value length */
} bflb_ef_ctrl_com_trim_cfg;
/**
* @brief Efuse common trim type definition
*/
typedef struct
{
uint8_t en; /*!< Enable status */
uint8_t parity; /*!< Trim parity */
uint8_t empty; /*!< Trim empty */
uint8_t len; /*!< Trim value len in bit */
uint32_t value; /*!< Trim value */
} bflb_ef_ctrl_com_trim_type;
uint32_t bflb_ef_ctrl_get_common_trim_list(const bflb_ef_ctrl_com_trim_cfg **trim_list);
int bflb_ef_ctrl_autoload_done(struct bflb_device_s *dev);
void bflb_ef_ctrl_write_direct(struct bflb_device_s *dev, uint32_t offset, uint32_t *pword, uint32_t count, uint8_t program);
void bflb_ef_ctrl_read_direct(struct bflb_device_s *dev, uint32_t offset, uint32_t *pword, uint32_t count, uint8_t reload);
void bflb_ef_ctrl_read_common_trim(struct bflb_device_s *dev, char *name, bflb_ef_ctrl_com_trim_type *trim, uint8_t reload);
void bflb_ef_ctrl_write_common_trim(struct bflb_device_s *dev, char *name, uint32_t value, uint8_t program);
uint8_t bflb_ef_ctrl_is_all_bits_zero(uint32_t val, uint8_t start, uint8_t len);
uint32_t bflb_ef_ctrl_get_byte_zero_cnt(uint8_t val);
uint8_t bflb_ef_ctrl_get_trim_parity(uint32_t val, uint8_t len);
#ifdef __cplusplus
}
#endif
#endif

2
drivers/lhal/include/bflb_efuse.h
View File

@ -17,4 +17,4 @@ void bflb_efuse_read_aes_key(uint8_t index, uint8_t *data, uint32_t len);
}
#endif
#endif
#endif

303
drivers/lhal/include/hardware/ef_ctrl_reg.h Normal file
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@ -0,0 +1,303 @@
/**
******************************************************************************
* @file ef_ctrl_reg.h
* @version V1.0
* @date 2022-10-20
* @brief This file is the description of.IP register
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
#ifndef __HARDWARE_EF_CTRL_H__
#define __HARDWARE_EF_CTRL_H__
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Register offsets *********************************************************/
#define EF_CTRL_EF_IF_CTRL_0_OFFSET (0x800) /* efuse control */
#define EF_CTRL_EF_IF_CYC_0_OFFSET (0x804) /* efuse cycle config 0 */
#define EF_CTRL_EF_IF_CYC_1_OFFSET (0x808) /* efuse cycle config 1 */
#define EF_CTRL_EF_IF_0_MANUAL_OFFSET (0x80C) /* efuse manual config 1 */
#define EF_CTRL_EF_IF_0_STATUS_OFFSET (0x810) /* efuse status */
#define EF_CTRL_EF_IF_CFG_0_OFFSET (0x814) /* efuse config 0 */
/* 0x800 :efuse control */
#define EF_CTRL_EF_IF_0_AUTOLOAD_P1_DONE EF_CTRL_EF_IF_0_AUTOLOAD_P1_DONE
#define EF_CTRL_EF_IF_0_AUTOLOAD_P1_DONE_POS (0U)
#define EF_CTRL_EF_IF_0_AUTOLOAD_P1_DONE_LEN (1U)
#define EF_CTRL_EF_IF_0_AUTOLOAD_P1_DONE_MASK (((1U << EF_CTRL_EF_IF_0_AUTOLOAD_P1_DONE_LEN) - 1) << EF_CTRL_EF_IF_0_AUTOLOAD_P1_DONE_POS)
#define EF_CTRL_EF_IF_0_AUTOLOAD_P1_DONE_UMASK (~(((1U << EF_CTRL_EF_IF_0_AUTOLOAD_P1_DONE_LEN) - 1) << EF_CTRL_EF_IF_0_AUTOLOAD_P1_DONE_POS))
#define EF_CTRL_EF_IF_0_AUTOLOAD_DONE EF_CTRL_EF_IF_0_AUTOLOAD_DONE
#define EF_CTRL_EF_IF_0_AUTOLOAD_DONE_POS (1U)
#define EF_CTRL_EF_IF_0_AUTOLOAD_DONE_LEN (1U)
#define EF_CTRL_EF_IF_0_AUTOLOAD_DONE_MASK (((1U << EF_CTRL_EF_IF_0_AUTOLOAD_DONE_LEN) - 1) << EF_CTRL_EF_IF_0_AUTOLOAD_DONE_POS)
#define EF_CTRL_EF_IF_0_AUTOLOAD_DONE_UMASK (~(((1U << EF_CTRL_EF_IF_0_AUTOLOAD_DONE_LEN) - 1) << EF_CTRL_EF_IF_0_AUTOLOAD_DONE_POS))
//#define EF_CTRL_EF_IF_0_BUSY EF_CTRL_EF_IF_0_BUSY
#define EF_CTRL_EF_IF_0_BUSY_POS (2U)
#define EF_CTRL_EF_IF_0_BUSY_LEN (1U)
#define EF_CTRL_EF_IF_0_BUSY_MASK (((1U << EF_CTRL_EF_IF_0_BUSY_LEN) - 1) << EF_CTRL_EF_IF_0_BUSY_POS)
#define EF_CTRL_EF_IF_0_BUSY_UMASK (~(((1U << EF_CTRL_EF_IF_0_BUSY_LEN) - 1) << EF_CTRL_EF_IF_0_BUSY_POS))
#define EF_CTRL_EF_IF_0_RW EF_CTRL_EF_IF_0_RW
#define EF_CTRL_EF_IF_0_RW_POS (3U)
#define EF_CTRL_EF_IF_0_RW_LEN (1U)
#define EF_CTRL_EF_IF_0_RW_MASK (((1U << EF_CTRL_EF_IF_0_RW_LEN) - 1) << EF_CTRL_EF_IF_0_RW_POS)
#define EF_CTRL_EF_IF_0_RW_UMASK (~(((1U << EF_CTRL_EF_IF_0_RW_LEN) - 1) << EF_CTRL_EF_IF_0_RW_POS))
#define EF_CTRL_EF_IF_0_TRIG EF_CTRL_EF_IF_0_TRIG
#define EF_CTRL_EF_IF_0_TRIG_POS (4U)
#define EF_CTRL_EF_IF_0_TRIG_LEN (1U)
#define EF_CTRL_EF_IF_0_TRIG_MASK (((1U << EF_CTRL_EF_IF_0_TRIG_LEN) - 1) << EF_CTRL_EF_IF_0_TRIG_POS)
#define EF_CTRL_EF_IF_0_TRIG_UMASK (~(((1U << EF_CTRL_EF_IF_0_TRIG_LEN) - 1) << EF_CTRL_EF_IF_0_TRIG_POS))
#define EF_CTRL_EF_IF_0_MANUAL_EN EF_CTRL_EF_IF_0_MANUAL_EN
#define EF_CTRL_EF_IF_0_MANUAL_EN_POS (5U)
#define EF_CTRL_EF_IF_0_MANUAL_EN_LEN (1U)
#define EF_CTRL_EF_IF_0_MANUAL_EN_MASK (((1U << EF_CTRL_EF_IF_0_MANUAL_EN_LEN) - 1) << EF_CTRL_EF_IF_0_MANUAL_EN_POS)
#define EF_CTRL_EF_IF_0_MANUAL_EN_UMASK (~(((1U << EF_CTRL_EF_IF_0_MANUAL_EN_LEN) - 1) << EF_CTRL_EF_IF_0_MANUAL_EN_POS))
#define EF_CTRL_EF_IF_0_CYC_MODIFY EF_CTRL_EF_IF_0_CYC_MODIFY
#define EF_CTRL_EF_IF_0_CYC_MODIFY_POS (6U)
#define EF_CTRL_EF_IF_0_CYC_MODIFY_LEN (1U)
#define EF_CTRL_EF_IF_0_CYC_MODIFY_MASK (((1U << EF_CTRL_EF_IF_0_CYC_MODIFY_LEN) - 1) << EF_CTRL_EF_IF_0_CYC_MODIFY_POS)
#define EF_CTRL_EF_IF_0_CYC_MODIFY_UMASK (~(((1U << EF_CTRL_EF_IF_0_CYC_MODIFY_LEN) - 1) << EF_CTRL_EF_IF_0_CYC_MODIFY_POS))
#if defined(BL702) || defined(BL602) || defined(BL702L)
#define EF_CTRL_EF_CLK_SAHB_DATA_SEL EF_CTRL_EF_CLK_SAHB_DATA_SEL
#define EF_CTRL_EF_CLK_SAHB_DATA_SEL_POS (7U)
#define EF_CTRL_EF_CLK_SAHB_DATA_SEL_LEN (1U)
#define EF_CTRL_EF_CLK_SAHB_DATA_SEL_MASK (((1U << EF_CTRL_EF_CLK_SAHB_DATA_SEL_LEN) - 1) << EF_CTRL_EF_CLK_SAHB_DATA_SEL_POS)
#define EF_CTRL_EF_CLK_SAHB_DATA_SEL_UMASK (~(((1U << EF_CTRL_EF_CLK_SAHB_DATA_SEL_LEN) - 1) << EF_CTRL_EF_CLK_SAHB_DATA_SEL_POS))
#endif
#define EF_CTRL_EF_IF_PROT_CODE_CTRL EF_CTRL_EF_IF_PROT_CODE_CTRL
#define EF_CTRL_EF_IF_PROT_CODE_CTRL_POS (8U)
#define EF_CTRL_EF_IF_PROT_CODE_CTRL_LEN (8U)
#define EF_CTRL_EF_IF_PROT_CODE_CTRL_MASK (((1U << EF_CTRL_EF_IF_PROT_CODE_CTRL_LEN) - 1) << EF_CTRL_EF_IF_PROT_CODE_CTRL_POS)
#define EF_CTRL_EF_IF_PROT_CODE_CTRL_UMASK (~(((1U << EF_CTRL_EF_IF_PROT_CODE_CTRL_LEN) - 1) << EF_CTRL_EF_IF_PROT_CODE_CTRL_POS))
#define EF_CTRL_EF_IF_POR_DIG EF_CTRL_EF_IF_POR_DIG
#define EF_CTRL_EF_IF_POR_DIG_POS (16U)
#define EF_CTRL_EF_IF_POR_DIG_LEN (1U)
#define EF_CTRL_EF_IF_POR_DIG_MASK (((1U << EF_CTRL_EF_IF_POR_DIG_LEN) - 1) << EF_CTRL_EF_IF_POR_DIG_POS)
#define EF_CTRL_EF_IF_POR_DIG_UMASK (~(((1U << EF_CTRL_EF_IF_POR_DIG_LEN) - 1) << EF_CTRL_EF_IF_POR_DIG_POS))
#if defined(BL702) || defined(BL602) || defined(BL702L)
#define EF_CTRL_EF_CLK_SAHB_DATA_GATE EF_CTRL_EF_CLK_SAHB_DATA_GATE
#define EF_CTRL_EF_CLK_SAHB_DATA_GATE_POS (17U)
#define EF_CTRL_EF_CLK_SAHB_DATA_GATE_LEN (1U)
#define EF_CTRL_EF_CLK_SAHB_DATA_GATE_MASK (((1U << EF_CTRL_EF_CLK_SAHB_DATA_GATE_LEN) - 1) << EF_CTRL_EF_CLK_SAHB_DATA_GATE_POS)
#define EF_CTRL_EF_CLK_SAHB_DATA_GATE_UMASK (~(((1U << EF_CTRL_EF_CLK_SAHB_DATA_GATE_LEN) - 1) << EF_CTRL_EF_CLK_SAHB_DATA_GATE_POS))
#else
#define EF_CTRL_EF_PCLK_FORCE_ON EF_CTRL_EF_PCLK_FORCE_ON
#define EF_CTRL_EF_PCLK_FORCE_ON_POS (17U)
#define EF_CTRL_EF_PCLK_FORCE_ON_LEN (1U)
#define EF_CTRL_EF_PCLK_FORCE_ON_MASK (((1U << EF_CTRL_EF_PCLK_FORCE_ON_LEN) - 1) << EF_CTRL_EF_PCLK_FORCE_ON_POS)
#define EF_CTRL_EF_PCLK_FORCE_ON_UMASK (~(((1U << EF_CTRL_EF_PCLK_FORCE_ON_LEN) - 1) << EF_CTRL_EF_PCLK_FORCE_ON_POS))
#endif
#define EF_CTRL_EF_IF_AUTO_RD_EN EF_CTRL_EF_IF_AUTO_RD_EN
#define EF_CTRL_EF_IF_AUTO_RD_EN_POS (18U)
#define EF_CTRL_EF_IF_AUTO_RD_EN_LEN (1U)
#define EF_CTRL_EF_IF_AUTO_RD_EN_MASK (((1U << EF_CTRL_EF_IF_AUTO_RD_EN_LEN) - 1) << EF_CTRL_EF_IF_AUTO_RD_EN_POS)
#define EF_CTRL_EF_IF_AUTO_RD_EN_UMASK (~(((1U << EF_CTRL_EF_IF_AUTO_RD_EN_LEN) - 1) << EF_CTRL_EF_IF_AUTO_RD_EN_POS))
#define EF_CTRL_EF_IF_CYC_MODIFY_LOCK EF_CTRL_EF_IF_CYC_MODIFY_LOCK
#define EF_CTRL_EF_IF_CYC_MODIFY_LOCK_POS (19U)
#define EF_CTRL_EF_IF_CYC_MODIFY_LOCK_LEN (1U)
#define EF_CTRL_EF_IF_CYC_MODIFY_LOCK_MASK (((1U << EF_CTRL_EF_IF_CYC_MODIFY_LOCK_LEN) - 1) << EF_CTRL_EF_IF_CYC_MODIFY_LOCK_POS)
#define EF_CTRL_EF_IF_CYC_MODIFY_LOCK_UMASK (~(((1U << EF_CTRL_EF_IF_CYC_MODIFY_LOCK_LEN) - 1) << EF_CTRL_EF_IF_CYC_MODIFY_LOCK_POS))
#define EF_CTRL_EF_IF_0_INT EF_CTRL_EF_IF_0_INT
#define EF_CTRL_EF_IF_0_INT_POS (20U)
#define EF_CTRL_EF_IF_0_INT_LEN (1U)
#define EF_CTRL_EF_IF_0_INT_MASK (((1U << EF_CTRL_EF_IF_0_INT_LEN) - 1) << EF_CTRL_EF_IF_0_INT_POS)
#define EF_CTRL_EF_IF_0_INT_UMASK (~(((1U << EF_CTRL_EF_IF_0_INT_LEN) - 1) << EF_CTRL_EF_IF_0_INT_POS))
#define EF_CTRL_EF_IF_0_INT_CLR EF_CTRL_EF_IF_0_INT_CLR
#define EF_CTRL_EF_IF_0_INT_CLR_POS (21U)
#define EF_CTRL_EF_IF_0_INT_CLR_LEN (1U)
#define EF_CTRL_EF_IF_0_INT_CLR_MASK (((1U << EF_CTRL_EF_IF_0_INT_CLR_LEN) - 1) << EF_CTRL_EF_IF_0_INT_CLR_POS)
#define EF_CTRL_EF_IF_0_INT_CLR_UMASK (~(((1U << EF_CTRL_EF_IF_0_INT_CLR_LEN) - 1) << EF_CTRL_EF_IF_0_INT_CLR_POS))
#define EF_CTRL_EF_IF_0_INT_SET EF_CTRL_EF_IF_0_INT_SET
#define EF_CTRL_EF_IF_0_INT_SET_POS (22U)
#define EF_CTRL_EF_IF_0_INT_SET_LEN (1U)
#define EF_CTRL_EF_IF_0_INT_SET_MASK (((1U << EF_CTRL_EF_IF_0_INT_SET_LEN) - 1) << EF_CTRL_EF_IF_0_INT_SET_POS)
#define EF_CTRL_EF_IF_0_INT_SET_UMASK (~(((1U << EF_CTRL_EF_IF_0_INT_SET_LEN) - 1) << EF_CTRL_EF_IF_0_INT_SET_POS))
#define EF_CTRL_EF_IF_PROT_CODE_CYC EF_CTRL_EF_IF_PROT_CODE_CYC
#define EF_CTRL_EF_IF_PROT_CODE_CYC_POS (24U)
#define EF_CTRL_EF_IF_PROT_CODE_CYC_LEN (8U)
#define EF_CTRL_EF_IF_PROT_CODE_CYC_MASK (((1U << EF_CTRL_EF_IF_PROT_CODE_CYC_LEN) - 1) << EF_CTRL_EF_IF_PROT_CODE_CYC_POS)
#define EF_CTRL_EF_IF_PROT_CODE_CYC_UMASK (~(((1U << EF_CTRL_EF_IF_PROT_CODE_CYC_LEN) - 1) << EF_CTRL_EF_IF_PROT_CODE_CYC_POS))
/* 0x80C : ef_if_0_manual, 606P and 808 manual config is the same but not need witch clock */
#if defined(BL702) || defined(BL602) || defined(BL702L) || defined(BL606P) || defined(BL808)
#define EF_CTRL_EF_IF_0_MANUAL_OFFSET (0x80C)
#define EF_CTRL_EF_IF_A EF_CTRL_EF_IF_A
#define EF_CTRL_EF_IF_A_POS (0U)
#define EF_CTRL_EF_IF_A_LEN (10U)
#define EF_CTRL_EF_IF_A_MASK (((1U << EF_CTRL_EF_IF_A_LEN) - 1) << EF_CTRL_EF_IF_A_POS)
#define EF_CTRL_EF_IF_A_UMASK (~(((1U << EF_CTRL_EF_IF_A_LEN) - 1) << EF_CTRL_EF_IF_A_POS))
#define EF_CTRL_EF_IF_PD EF_CTRL_EF_IF_PD
#define EF_CTRL_EF_IF_PD_POS (10U)
#define EF_CTRL_EF_IF_PD_LEN (1U)
#define EF_CTRL_EF_IF_PD_MASK (((1U << EF_CTRL_EF_IF_PD_LEN) - 1) << EF_CTRL_EF_IF_PD_POS)
#define EF_CTRL_EF_IF_PD_UMASK (~(((1U << EF_CTRL_EF_IF_PD_LEN) - 1) << EF_CTRL_EF_IF_PD_POS))
#define EF_CTRL_EF_IF_PS EF_CTRL_EF_IF_PS
#define EF_CTRL_EF_IF_PS_POS (11U)
#define EF_CTRL_EF_IF_PS_LEN (1U)
#define EF_CTRL_EF_IF_PS_MASK (((1U << EF_CTRL_EF_IF_PS_LEN) - 1) << EF_CTRL_EF_IF_PS_POS)
#define EF_CTRL_EF_IF_PS_UMASK (~(((1U << EF_CTRL_EF_IF_PS_LEN) - 1) << EF_CTRL_EF_IF_PS_POS))
#define EF_CTRL_EF_IF_STROBE EF_CTRL_EF_IF_STROBE
#define EF_CTRL_EF_IF_STROBE_POS (12U)
#define EF_CTRL_EF_IF_STROBE_LEN (1U)
#define EF_CTRL_EF_IF_STROBE_MASK (((1U << EF_CTRL_EF_IF_STROBE_LEN) - 1) << EF_CTRL_EF_IF_STROBE_POS)
#define EF_CTRL_EF_IF_STROBE_UMASK (~(((1U << EF_CTRL_EF_IF_STROBE_LEN) - 1) << EF_CTRL_EF_IF_STROBE_POS))
#define EF_CTRL_EF_IF_PGENB EF_CTRL_EF_IF_PGENB
#define EF_CTRL_EF_IF_PGENB_POS (13U)
#define EF_CTRL_EF_IF_PGENB_LEN (1U)
#define EF_CTRL_EF_IF_PGENB_MASK (((1U << EF_CTRL_EF_IF_PGENB_LEN) - 1) << EF_CTRL_EF_IF_PGENB_POS)
#define EF_CTRL_EF_IF_PGENB_UMASK (~(((1U << EF_CTRL_EF_IF_PGENB_LEN) - 1) << EF_CTRL_EF_IF_PGENB_POS))
#define EF_CTRL_EF_IF_LOAD EF_CTRL_EF_IF_LOAD
#define EF_CTRL_EF_IF_LOAD_POS (14U)
#define EF_CTRL_EF_IF_LOAD_LEN (1U)
#define EF_CTRL_EF_IF_LOAD_MASK (((1U << EF_CTRL_EF_IF_LOAD_LEN) - 1) << EF_CTRL_EF_IF_LOAD_POS)
#define EF_CTRL_EF_IF_LOAD_UMASK (~(((1U << EF_CTRL_EF_IF_LOAD_LEN) - 1) << EF_CTRL_EF_IF_LOAD_POS))
#define EF_CTRL_EF_IF_CSB EF_CTRL_EF_IF_CSB
#define EF_CTRL_EF_IF_CSB_POS (15U)
#define EF_CTRL_EF_IF_CSB_LEN (1U)
#define EF_CTRL_EF_IF_CSB_MASK (((1U << EF_CTRL_EF_IF_CSB_LEN) - 1) << EF_CTRL_EF_IF_CSB_POS)
#define EF_CTRL_EF_IF_CSB_UMASK (~(((1U << EF_CTRL_EF_IF_CSB_LEN) - 1) << EF_CTRL_EF_IF_CSB_POS))
#define EF_CTRL_EF_IF_0_Q EF_CTRL_EF_IF_0_Q
#define EF_CTRL_EF_IF_0_Q_POS (16U)
#define EF_CTRL_EF_IF_0_Q_LEN (8U)
#define EF_CTRL_EF_IF_0_Q_MASK (((1U << EF_CTRL_EF_IF_0_Q_LEN) - 1) << EF_CTRL_EF_IF_0_Q_POS)
#define EF_CTRL_EF_IF_0_Q_UMASK (~(((1U << EF_CTRL_EF_IF_0_Q_LEN) - 1) << EF_CTRL_EF_IF_0_Q_POS))
#define EF_CTRL_EF_IF_PROT_CODE_MANUAL EF_CTRL_EF_IF_PROT_CODE_MANUAL
#define EF_CTRL_EF_IF_PROT_CODE_MANUAL_POS (24U)
#define EF_CTRL_EF_IF_PROT_CODE_MANUAL_LEN (8U)
#define EF_CTRL_EF_IF_PROT_CODE_MANUAL_MASK (((1U << EF_CTRL_EF_IF_PROT_CODE_MANUAL_LEN) - 1) << EF_CTRL_EF_IF_PROT_CODE_MANUAL_POS)
#define EF_CTRL_EF_IF_PROT_CODE_MANUAL_UMASK (~(((1U << EF_CTRL_EF_IF_PROT_CODE_MANUAL_LEN) - 1) << EF_CTRL_EF_IF_PROT_CODE_MANUAL_POS))
#else
/* 0x80C : ef_if_0_manual_0 */
#define EF_CTRL_EF_IF_0_MANUAL_0_OFFSET (0x80C)
#define EF_CTRL_EF_IF_A EF_CTRL_EF_IF_A
#define EF_CTRL_EF_IF_A_POS (0U)
#define EF_CTRL_EF_IF_A_LEN (12U)
#define EF_CTRL_EF_IF_A_MASK (((1U << EF_CTRL_EF_IF_A_LEN) - 1) << EF_CTRL_EF_IF_A_POS)
#define EF_CTRL_EF_IF_A_UMASK (~(((1U << EF_CTRL_EF_IF_A_LEN) - 1) << EF_CTRL_EF_IF_A_POS))
#define EF_CTRL_EF_IF_PD EF_CTRL_EF_IF_PD
#define EF_CTRL_EF_IF_PD_POS (18U)
#define EF_CTRL_EF_IF_PD_LEN (1U)
#define EF_CTRL_EF_IF_PD_MASK (((1U << EF_CTRL_EF_IF_PD_LEN) - 1) << EF_CTRL_EF_IF_PD_POS)
#define EF_CTRL_EF_IF_PD_UMASK (~(((1U << EF_CTRL_EF_IF_PD_LEN) - 1) << EF_CTRL_EF_IF_PD_POS))
#define EF_CTRL_EF_IF_PS EF_CTRL_EF_IF_PS
#define EF_CTRL_EF_IF_PS_POS (19U)
#define EF_CTRL_EF_IF_PS_LEN (1U)
#define EF_CTRL_EF_IF_PS_MASK (((1U << EF_CTRL_EF_IF_PS_LEN) - 1) << EF_CTRL_EF_IF_PS_POS)
#define EF_CTRL_EF_IF_PS_UMASK (~(((1U << EF_CTRL_EF_IF_PS_LEN) - 1) << EF_CTRL_EF_IF_PS_POS))
#define EF_CTRL_EF_IF_STROBE EF_CTRL_EF_IF_STROBE
#define EF_CTRL_EF_IF_STROBE_POS (20U)
#define EF_CTRL_EF_IF_STROBE_LEN (1U)
#define EF_CTRL_EF_IF_STROBE_MASK (((1U << EF_CTRL_EF_IF_STROBE_LEN) - 1) << EF_CTRL_EF_IF_STROBE_POS)
#define EF_CTRL_EF_IF_STROBE_UMASK (~(((1U << EF_CTRL_EF_IF_STROBE_LEN) - 1) << EF_CTRL_EF_IF_STROBE_POS))
#define EF_CTRL_EF_IF_PGENB EF_CTRL_EF_IF_PGENB
#define EF_CTRL_EF_IF_PGENB_POS (21U)
#define EF_CTRL_EF_IF_PGENB_LEN (1U)
#define EF_CTRL_EF_IF_PGENB_MASK (((1U << EF_CTRL_EF_IF_PGENB_LEN) - 1) << EF_CTRL_EF_IF_PGENB_POS)
#define EF_CTRL_EF_IF_PGENB_UMASK (~(((1U << EF_CTRL_EF_IF_PGENB_LEN) - 1) << EF_CTRL_EF_IF_PGENB_POS))
#define EF_CTRL_EF_IF_LOAD EF_CTRL_EF_IF_LOAD
#define EF_CTRL_EF_IF_LOAD_POS (22U)
#define EF_CTRL_EF_IF_LOAD_LEN (1U)
#define EF_CTRL_EF_IF_LOAD_MASK (((1U << EF_CTRL_EF_IF_LOAD_LEN) - 1) << EF_CTRL_EF_IF_LOAD_POS)
#define EF_CTRL_EF_IF_LOAD_UMASK (~(((1U << EF_CTRL_EF_IF_LOAD_LEN) - 1) << EF_CTRL_EF_IF_LOAD_POS))
#define EF_CTRL_EF_IF_CSB EF_CTRL_EF_IF_CSB
#define EF_CTRL_EF_IF_CSB_POS (23U)
#define EF_CTRL_EF_IF_CSB_LEN (1U)
#define EF_CTRL_EF_IF_CSB_MASK (((1U << EF_CTRL_EF_IF_CSB_LEN) - 1) << EF_CTRL_EF_IF_CSB_POS)
#define EF_CTRL_EF_IF_CSB_UMASK (~(((1U << EF_CTRL_EF_IF_CSB_LEN) - 1) << EF_CTRL_EF_IF_CSB_POS))
#define EF_CTRL_EF_IF_PROT_CODE_MANUAL EF_CTRL_EF_IF_PROT_CODE_MANUAL
#define EF_CTRL_EF_IF_PROT_CODE_MANUAL_POS (24U)
#define EF_CTRL_EF_IF_PROT_CODE_MANUAL_LEN (8U)
#define EF_CTRL_EF_IF_PROT_CODE_MANUAL_MASK (((1U << EF_CTRL_EF_IF_PROT_CODE_MANUAL_LEN) - 1) << EF_CTRL_EF_IF_PROT_CODE_MANUAL_POS)
#define EF_CTRL_EF_IF_PROT_CODE_MANUAL_UMASK (~(((1U << EF_CTRL_EF_IF_PROT_CODE_MANUAL_LEN) - 1) << EF_CTRL_EF_IF_PROT_CODE_MANUAL_POS))
#endif
#if defined(BL606P) || defined(BL808)
/* 0x900 : ef_if_ctrl_1 */
#define EF_CTRL_EF_IF_CTRL_1_OFFSET (0x900)
#define EF_CTRL_EF_IF_1_BUSY EF_CTRL_EF_IF_1_BUSY
#define EF_CTRL_EF_IF_1_BUSY_POS (2U)
#define EF_CTRL_EF_IF_1_BUSY_LEN (1U)
#define EF_CTRL_EF_IF_1_BUSY_MASK (((1U << EF_CTRL_EF_IF_1_BUSY_LEN) - 1) << EF_CTRL_EF_IF_1_BUSY_POS)
#define EF_CTRL_EF_IF_1_BUSY_UMASK (~(((1U << EF_CTRL_EF_IF_1_BUSY_LEN) - 1) << EF_CTRL_EF_IF_1_BUSY_POS))
#define EF_CTRL_EF_IF_1_RW EF_CTRL_EF_IF_1_RW
#define EF_CTRL_EF_IF_1_RW_POS (3U)
#define EF_CTRL_EF_IF_1_RW_LEN (1U)
#define EF_CTRL_EF_IF_1_RW_MASK (((1U << EF_CTRL_EF_IF_1_RW_LEN) - 1) << EF_CTRL_EF_IF_1_RW_POS)
#define EF_CTRL_EF_IF_1_RW_UMASK (~(((1U << EF_CTRL_EF_IF_1_RW_LEN) - 1) << EF_CTRL_EF_IF_1_RW_POS))
#define EF_CTRL_EF_IF_1_TRIG EF_CTRL_EF_IF_1_TRIG
#define EF_CTRL_EF_IF_1_TRIG_POS (4U)
#define EF_CTRL_EF_IF_1_TRIG_LEN (1U)
#define EF_CTRL_EF_IF_1_TRIG_MASK (((1U << EF_CTRL_EF_IF_1_TRIG_LEN) - 1) << EF_CTRL_EF_IF_1_TRIG_POS)
#define EF_CTRL_EF_IF_1_TRIG_UMASK (~(((1U << EF_CTRL_EF_IF_1_TRIG_LEN) - 1) << EF_CTRL_EF_IF_1_TRIG_POS))
#define EF_CTRL_EF_IF_1_MANUAL_EN EF_CTRL_EF_IF_1_MANUAL_EN
#define EF_CTRL_EF_IF_1_MANUAL_EN_POS (5U)
#define EF_CTRL_EF_IF_1_MANUAL_EN_LEN (1U)
#define EF_CTRL_EF_IF_1_MANUAL_EN_MASK (((1U << EF_CTRL_EF_IF_1_MANUAL_EN_LEN) - 1) << EF_CTRL_EF_IF_1_MANUAL_EN_POS)
#define EF_CTRL_EF_IF_1_MANUAL_EN_UMASK (~(((1U << EF_CTRL_EF_IF_1_MANUAL_EN_LEN) - 1) << EF_CTRL_EF_IF_1_MANUAL_EN_POS))
#define EF_CTRL_EF_IF_1_CYC_MODIFY EF_CTRL_EF_IF_1_CYC_MODIFY
#define EF_CTRL_EF_IF_1_CYC_MODIFY_POS (6U)
#define EF_CTRL_EF_IF_1_CYC_MODIFY_LEN (1U)
#define EF_CTRL_EF_IF_1_CYC_MODIFY_MASK (((1U << EF_CTRL_EF_IF_1_CYC_MODIFY_LEN) - 1) << EF_CTRL_EF_IF_1_CYC_MODIFY_POS)
#define EF_CTRL_EF_IF_1_CYC_MODIFY_UMASK (~(((1U << EF_CTRL_EF_IF_1_CYC_MODIFY_LEN) - 1) << EF_CTRL_EF_IF_1_CYC_MODIFY_POS))
#define EF_CTRL_EF_IF_1_INT EF_CTRL_EF_IF_1_INT
#define EF_CTRL_EF_IF_1_INT_POS (20U)
#define EF_CTRL_EF_IF_1_INT_LEN (1U)
#define EF_CTRL_EF_IF_1_INT_MASK (((1U << EF_CTRL_EF_IF_1_INT_LEN) - 1) << EF_CTRL_EF_IF_1_INT_POS)
#define EF_CTRL_EF_IF_1_INT_UMASK (~(((1U << EF_CTRL_EF_IF_1_INT_LEN) - 1) << EF_CTRL_EF_IF_1_INT_POS))
#define EF_CTRL_EF_IF_1_INT_CLR EF_CTRL_EF_IF_1_INT_CLR
#define EF_CTRL_EF_IF_1_INT_CLR_POS (21U)
#define EF_CTRL_EF_IF_1_INT_CLR_LEN (1U)
#define EF_CTRL_EF_IF_1_INT_CLR_MASK (((1U << EF_CTRL_EF_IF_1_INT_CLR_LEN) - 1) << EF_CTRL_EF_IF_1_INT_CLR_POS)
#define EF_CTRL_EF_IF_1_INT_CLR_UMASK (~(((1U << EF_CTRL_EF_IF_1_INT_CLR_LEN) - 1) << EF_CTRL_EF_IF_1_INT_CLR_POS))
#define EF_CTRL_EF_IF_1_INT_SET EF_CTRL_EF_IF_1_INT_SET
#define EF_CTRL_EF_IF_1_INT_SET_POS (22U)
#define EF_CTRL_EF_IF_1_INT_SET_LEN (1U)
#define EF_CTRL_EF_IF_1_INT_SET_MASK (((1U << EF_CTRL_EF_IF_1_INT_SET_LEN) - 1) << EF_CTRL_EF_IF_1_INT_SET_POS)
#define EF_CTRL_EF_IF_1_INT_SET_UMASK (~(((1U << EF_CTRL_EF_IF_1_INT_SET_LEN) - 1) << EF_CTRL_EF_IF_1_INT_SET_POS))
/* 0x904 : ef_if_1_manual */
#define EF_CTRL_EF_IF_1_MANUAL_OFFSET (0x904)
#define EF_CTRL_EF_IF_1_Q EF_CTRL_EF_IF_1_Q
#define EF_CTRL_EF_IF_1_Q_POS (16U)
#define EF_CTRL_EF_IF_1_Q_LEN (8U)
#define EF_CTRL_EF_IF_1_Q_MASK (((1U << EF_CTRL_EF_IF_1_Q_LEN) - 1) << EF_CTRL_EF_IF_1_Q_POS)
#define EF_CTRL_EF_IF_1_Q_UMASK (~(((1U << EF_CTRL_EF_IF_1_Q_LEN) - 1) << EF_CTRL_EF_IF_1_Q_POS))
/* 0x908 : ef_if_1_status */
#define EF_CTRL_EF_IF_1_STATUS_OFFSET (0x908)
#define EF_CTRL_EF_IF_1_STATUS EF_CTRL_EF_IF_1_STATUS
#define EF_CTRL_EF_IF_1_STATUS_POS (0U)
#define EF_CTRL_EF_IF_1_STATUS_LEN (32U)
#define EF_CTRL_EF_IF_1_STATUS_MASK (((1U << EF_CTRL_EF_IF_1_STATUS_LEN) - 1) << EF_CTRL_EF_IF_1_STATUS_POS)
#define EF_CTRL_EF_IF_1_STATUS_UMASK (~(((1U << EF_CTRL_EF_IF_1_STATUS_LEN) - 1) << EF_CTRL_EF_IF_1_STATUS_POS))
#endif
#endif /* __HARDWARE_EF_CTRL_H__ */

925
drivers/lhal/src/bflb_ef_ctrl.c Normal file
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@ -0,0 +1,925 @@
#include "bflb_ef_ctrl.h"
#include "hardware/ef_ctrl_reg.h"
#define EF_CTRL_EFUSE_CYCLE_PROTECT (0xbf << 24)
#define EF_CTRL_EFUSE_CTRL_PROTECT (0xbf << 8)
#define EF_CTRL_OP_MODE_AUTO 0
#define EF_CTRL_PARA_DFT 0
#if defined(BL702) || defined(BL602) || defined(BL702L)
#define EF_CTRL_EF_CLK 0
#define EF_CTRL_SAHB_CLK 1
#endif
#define EF_CTRL_DFT_TIMEOUT_VAL (160 * 1000)
#if defined(BL702) || defined(BL602) || defined(BL702L)
#define EF_CTRL_EFUSE_R0_SIZE 128
#elif defined(BL606P) || defined(BL808)
#define EF_CTRL_EFUSE_R0_SIZE 128
#define EF_CTRL_EFUSE_R1_SIZE 128
#elif defined(BL616) || defined(BL628)
#define EF_CTRL_EFUSE_R0_SIZE 512
#else
#define EF_CTRL_EFUSE_R0_SIZE 128
#endif
#ifndef BOOTROM
#define EF_CTRL_LOAD_BEFORE_READ_R0 bflb_ef_ctrl_load_efuse_r0(dev)
#define EF_CTRL_LOAD_BEFORE_READ_R1 bflb_ef_ctrl_load_efuse_r1(dev)
#else
#define EF_CTRL_LOAD_BEFORE_READ_R0
#define EF_CTRL_LOAD_BEFORE_READ_R1
#endif
#define EF_CTRL_DATA0_CLEAR bflb_ef_ctrl_clear_data_reg0(dev)
#define EF_CTRL_DATA1_CLEAR bflb_ef_ctrl_clear_data_reg1(dev)
static int ATTR_TCM_SECTION bflb_ef_ctrl_busy(struct bflb_device_s *dev);
#if defined(BL702) || defined(BL602) || defined(BL702L)
extern void bflb_efuse_switch_cpu_clock_save(void);
extern void bflb_efuse_switch_cpu_clock_restore(void);
#endif
/****************************************************************************/ /**
* @brief Switch efuse region 0 control to AHB clock
*
* @param dev ef control device pointer
*
* @return None
*
*******************************************************************************/
static void ATTR_TCM_SECTION bflb_ef_ctrl_switch_ahb_clk_r0(struct bflb_device_s *dev)
{
uint32_t reg_val;
uint32_t timeout = EF_CTRL_DFT_TIMEOUT_VAL;
while (bflb_ef_ctrl_busy(dev) == 1) {
timeout--;
if (timeout == 0) {
break;
}
}
reg_val = (EF_CTRL_EFUSE_CTRL_PROTECT) |
(EF_CTRL_OP_MODE_AUTO << EF_CTRL_EF_IF_0_MANUAL_EN_POS) |
(EF_CTRL_PARA_DFT << EF_CTRL_EF_IF_0_CYC_MODIFY_POS) |
#if defined(BL702) || defined(BL602) || defined(BL702L)
(EF_CTRL_SAHB_CLK << EF_CTRL_EF_CLK_SAHB_DATA_SEL_POS) |
#endif
(1 << EF_CTRL_EF_IF_AUTO_RD_EN_POS) |
(0 << EF_CTRL_EF_IF_POR_DIG_POS) |
(1 << EF_CTRL_EF_IF_0_INT_CLR_POS) |
(0 << EF_CTRL_EF_IF_0_RW_POS) |
(0 << EF_CTRL_EF_IF_0_TRIG_POS);
putreg32(reg_val, dev->reg_base + EF_CTRL_EF_IF_CTRL_0_OFFSET);
/* Add delay for CLK to be stable */
bflb_mtimer_delay_us(4);
}
/****************************************************************************/ /**
* @brief Switch efuse region 1 control to AHB clock
*
* @param dev ef control device pointer
*
* @return None
*
*******************************************************************************/
#ifdef EF_CTRL_EFUSE_R1_SIZE
static void ATTR_TCM_SECTION bflb_ef_ctrl_switch_ahb_clk_r1(struct bflb_device_s *dev)
{
uint32_t reg_val;
uint32_t timeout = EF_CTRL_DFT_TIMEOUT_VAL;
while (bflb_ef_ctrl_busy(dev) == 1) {
timeout--;
if (timeout == 0) {
break;
}
}
/* Note:ef_if_ctrl_1 has no EF_CTRL_EF_CLK_SAHB_DATA_SEL_POS bit as ef_if_ctrl_0,
so we select it(them) in ef_if_ctrl_0 */
reg_val = (EF_CTRL_EFUSE_CTRL_PROTECT) |
(EF_CTRL_OP_MODE_AUTO << EF_CTRL_EF_IF_0_MANUAL_EN_POS) |
(EF_CTRL_PARA_DFT << EF_CTRL_EF_IF_0_CYC_MODIFY_POS) |
(1 << EF_CTRL_EF_IF_AUTO_RD_EN_POS) |
(0 << EF_CTRL_EF_IF_POR_DIG_POS) |
(1 << EF_CTRL_EF_IF_0_INT_CLR_POS) |
(0 << EF_CTRL_EF_IF_0_RW_POS) |
(0 << EF_CTRL_EF_IF_0_TRIG_POS);
putreg32(reg_val, dev->reg_base + EF_CTRL_EF_IF_CTRL_0_OFFSET);
reg_val = (EF_CTRL_EFUSE_CTRL_PROTECT) |
(EF_CTRL_OP_MODE_AUTO << EF_CTRL_EF_IF_1_MANUAL_EN_POS) |
(EF_CTRL_PARA_DFT << EF_CTRL_EF_IF_1_CYC_MODIFY_POS) |
(1 << EF_CTRL_EF_IF_1_INT_CLR_POS) |
(0 << EF_CTRL_EF_IF_1_RW_POS) |
(0 << EF_CTRL_EF_IF_1_TRIG_POS);
putreg32(reg_val, dev->reg_base + EF_CTRL_EF_IF_CTRL_1_OFFSET);
/* Add delay for CLK to be stable */
bflb_mtimer_delay_us(4);
}
#endif
/****************************************************************************/ /**
* @brief Program efuse region 0
*
* @param dev ef control device pointer
*
* @return None
*
*******************************************************************************/
static void ATTR_TCM_SECTION bflb_ef_ctrl_program_efuse_r0(struct bflb_device_s *dev)
{
uint32_t reg_val;
/* Select auto mode and select ef clock */
reg_val = (EF_CTRL_EFUSE_CTRL_PROTECT) |
(EF_CTRL_OP_MODE_AUTO << EF_CTRL_EF_IF_0_MANUAL_EN_POS) |
(EF_CTRL_PARA_DFT << EF_CTRL_EF_IF_0_CYC_MODIFY_POS) |
#if defined(BL702) || defined(BL602) || defined(BL702L)
(EF_CTRL_EF_CLK << EF_CTRL_EF_CLK_SAHB_DATA_SEL_POS) |
#endif
(1 << EF_CTRL_EF_IF_AUTO_RD_EN_POS) |
(0 << EF_CTRL_EF_IF_POR_DIG_POS) |
(1 << EF_CTRL_EF_IF_0_INT_CLR_POS) |
(0 << EF_CTRL_EF_IF_0_RW_POS) |
(0 << EF_CTRL_EF_IF_0_TRIG_POS);
putreg32(reg_val, dev->reg_base + EF_CTRL_EF_IF_CTRL_0_OFFSET);
/* Program */
reg_val = (EF_CTRL_EFUSE_CTRL_PROTECT) |
(EF_CTRL_OP_MODE_AUTO << EF_CTRL_EF_IF_0_MANUAL_EN_POS) |
(EF_CTRL_PARA_DFT << EF_CTRL_EF_IF_0_CYC_MODIFY_POS) |
#if defined(BL702) || defined(BL602) || defined(BL702L)
(EF_CTRL_EF_CLK << EF_CTRL_EF_CLK_SAHB_DATA_SEL_POS) |
#endif
(1 << EF_CTRL_EF_IF_AUTO_RD_EN_POS) |
(1 << EF_CTRL_EF_IF_POR_DIG_POS) |
(1 << EF_CTRL_EF_IF_0_INT_CLR_POS) |
(1 << EF_CTRL_EF_IF_0_RW_POS) |
(0 << EF_CTRL_EF_IF_0_TRIG_POS);
putreg32(reg_val, dev->reg_base + EF_CTRL_EF_IF_CTRL_0_OFFSET);
/* Add delay for POR to be stable */
bflb_mtimer_delay_us(4);
/* Trigger */
reg_val = (EF_CTRL_EFUSE_CTRL_PROTECT) |
(EF_CTRL_OP_MODE_AUTO << EF_CTRL_EF_IF_0_MANUAL_EN_POS) |
(EF_CTRL_PARA_DFT << EF_CTRL_EF_IF_0_CYC_MODIFY_POS) |
#if defined(BL702) || defined(BL602) || defined(BL702L)
(EF_CTRL_EF_CLK << EF_CTRL_EF_CLK_SAHB_DATA_SEL_POS) |
#endif
(1 << EF_CTRL_EF_IF_AUTO_RD_EN_POS) |
(1 << EF_CTRL_EF_IF_POR_DIG_POS) |
(1 << EF_CTRL_EF_IF_0_INT_CLR_POS) |
(1 << EF_CTRL_EF_IF_0_RW_POS) |
(1 << EF_CTRL_EF_IF_0_TRIG_POS);
putreg32(reg_val, dev->reg_base + EF_CTRL_EF_IF_CTRL_0_OFFSET);
}
/****************************************************************************/ /**
* @brief Program efuse region 1
*
* @param dev ef control device pointer
*
* @return None
*
*******************************************************************************/
#ifdef EF_CTRL_EFUSE_R1_SIZE
static void ATTR_TCM_SECTION bflb_ef_ctrl_program_efuse_r1(struct bflb_device_s *dev)
{
uint32_t reg_val;
/* Select auto mode and select ef clock */
/* Note:ef_if_ctrl_1 has no EF_CTRL_EF_CLK_SAHB_DATA_SEL_POS bit as ef_if_ctrl_0,
so we select it(them) in ef_if_ctrl_0 */
reg_val = (EF_CTRL_EFUSE_CTRL_PROTECT) |
(EF_CTRL_OP_MODE_AUTO << EF_CTRL_EF_IF_0_MANUAL_EN_POS) |
(EF_CTRL_PARA_DFT << EF_CTRL_EF_IF_0_CYC_MODIFY_POS) |
(1 << EF_CTRL_EF_IF_AUTO_RD_EN_POS) |
(0 << EF_CTRL_EF_IF_POR_DIG_POS) |
(1 << EF_CTRL_EF_IF_0_INT_CLR_POS) |
(0 << EF_CTRL_EF_IF_0_RW_POS) |
(0 << EF_CTRL_EF_IF_0_TRIG_POS);
putreg32(reg_val, dev->reg_base + EF_CTRL_EF_IF_CTRL_0_OFFSET);
reg_val = (EF_CTRL_EFUSE_CTRL_PROTECT) |
(EF_CTRL_OP_MODE_AUTO << EF_CTRL_EF_IF_1_MANUAL_EN_POS) |
(EF_CTRL_PARA_DFT << EF_CTRL_EF_IF_1_CYC_MODIFY_POS) |
(1 << EF_CTRL_EF_IF_1_INT_CLR_POS) |
(0 << EF_CTRL_EF_IF_1_RW_POS) |
(0 << EF_CTRL_EF_IF_1_TRIG_POS);
putreg32(reg_val, dev->reg_base + EF_CTRL_EF_IF_CTRL_1_OFFSET);
/* Program */
/* Note:ef_if_ctrl_1 has no EF_CTRL_EF_CLK_SAHB_DATA_SEL_POS bit as ef_if_ctrl_0,
so we select it(them) in ef_if_ctrl_0 */
reg_val = (EF_CTRL_EFUSE_CTRL_PROTECT) |
(EF_CTRL_OP_MODE_AUTO << EF_CTRL_EF_IF_0_MANUAL_EN_POS) |
(EF_CTRL_PARA_DFT << EF_CTRL_EF_IF_0_CYC_MODIFY_POS) |
(1 << EF_CTRL_EF_IF_AUTO_RD_EN_POS) |
(1 << EF_CTRL_EF_IF_POR_DIG_POS) |
(1 << EF_CTRL_EF_IF_0_INT_CLR_POS) |
(0 << EF_CTRL_EF_IF_0_RW_POS) |
(0 << EF_CTRL_EF_IF_0_TRIG_POS);
putreg32(reg_val, dev->reg_base + EF_CTRL_EF_IF_CTRL_0_OFFSET);
/* Add delay for POR to be stable */
bflb_mtimer_delay_us(4);
reg_val = (EF_CTRL_EFUSE_CTRL_PROTECT) |
(EF_CTRL_OP_MODE_AUTO << EF_CTRL_EF_IF_1_MANUAL_EN_POS) |
(EF_CTRL_PARA_DFT << EF_CTRL_EF_IF_1_CYC_MODIFY_POS) |
(1 << EF_CTRL_EF_IF_1_INT_CLR_POS) |
(1 << EF_CTRL_EF_IF_1_RW_POS) |
(0 << EF_CTRL_EF_IF_1_TRIG_POS);
putreg32(reg_val, dev->reg_base + EF_CTRL_EF_IF_CTRL_1_OFFSET);
reg_val = (EF_CTRL_EFUSE_CTRL_PROTECT) |
(EF_CTRL_OP_MODE_AUTO << EF_CTRL_EF_IF_1_MANUAL_EN_POS) |
(EF_CTRL_PARA_DFT << EF_CTRL_EF_IF_1_CYC_MODIFY_POS) |
(1 << EF_CTRL_EF_IF_1_INT_CLR_POS) |
(1 << EF_CTRL_EF_IF_1_RW_POS) |
(1 << EF_CTRL_EF_IF_1_TRIG_POS);
putreg32(reg_val, dev->reg_base + EF_CTRL_EF_IF_CTRL_1_OFFSET);
}
#endif
/****************************************************************************/ /**
* @brief Clear efuse region 0 data register
*
* @param dev ef control device pointer
*
* @return None
*
*******************************************************************************/
static void ATTR_TCM_SECTION bflb_ef_ctrl_clear_data_reg0(struct bflb_device_s *dev)
{
uint32_t *pefuse_start = (uint32_t *)(dev->reg_base + 0x00);
uint32_t i = 0;
/* Switch to AHB clock */
bflb_ef_ctrl_switch_ahb_clk_r0(dev);
/* Clear data */
for (i = 0; i < EF_CTRL_EFUSE_R0_SIZE / 4; i++) {
pefuse_start[i] = 0;
}
}
/****************************************************************************/ /**
* @brief Clear efuse region 1 data register
*
* @param dev ef control device pointer
*
* @return None
*
*******************************************************************************/
#ifdef EF_CTRL_EFUSE_R1_SIZE
static void ATTR_TCM_SECTION bflb_ef_ctrl_clear_data_reg1(struct bflb_device_s *dev)
{
uint32_t *pefuse_start = (uint32_t *)(dev->reg_base + EF_CTRL_EFUSE_R0_SIZE);
uint32_t i = 0;
/* Switch to AHB clock */
bflb_ef_ctrl_switch_ahb_clk_r1(dev);
/* Clear data */
for (i = 0; i < EF_CTRL_EFUSE_R1_SIZE / 4; i++) {
pefuse_start[i] = 0;
}
}
#endif
/****************************************************************************/ /**
* @brief Load efuse region 0
*
* @param dev ef control device pointer
*
* @return None
*
*******************************************************************************/
static void ATTR_TCM_SECTION bflb_ef_ctrl_load_efuse_r0(struct bflb_device_s *dev)
{
uint32_t reg_val;
uint32_t timeout = EF_CTRL_DFT_TIMEOUT_VAL;
EF_CTRL_DATA0_CLEAR;
/* Trigger read */
reg_val = (EF_CTRL_EFUSE_CTRL_PROTECT) |
(EF_CTRL_OP_MODE_AUTO << EF_CTRL_EF_IF_0_MANUAL_EN_POS) |
(EF_CTRL_PARA_DFT << EF_CTRL_EF_IF_0_CYC_MODIFY_POS) |
#if defined(BL702) || defined(BL602) || defined(BL702L)
(EF_CTRL_EF_CLK << EF_CTRL_EF_CLK_SAHB_DATA_SEL_POS) |
#endif
(1 << EF_CTRL_EF_IF_AUTO_RD_EN_POS) |
(0 << EF_CTRL_EF_IF_POR_DIG_POS) |
(1 << EF_CTRL_EF_IF_0_INT_CLR_POS) |
(0 << EF_CTRL_EF_IF_0_RW_POS) |
(0 << EF_CTRL_EF_IF_0_TRIG_POS);
putreg32(reg_val, dev->reg_base + EF_CTRL_EF_IF_CTRL_0_OFFSET);
reg_val = (EF_CTRL_EFUSE_CTRL_PROTECT) |
(EF_CTRL_OP_MODE_AUTO << EF_CTRL_EF_IF_0_MANUAL_EN_POS) |
(EF_CTRL_PARA_DFT << EF_CTRL_EF_IF_0_CYC_MODIFY_POS) |
#if defined(BL702) || defined(BL602) || defined(BL702L)
(EF_CTRL_EF_CLK << EF_CTRL_EF_CLK_SAHB_DATA_SEL_POS) |
#endif
(1 << EF_CTRL_EF_IF_AUTO_RD_EN_POS) |
(0 << EF_CTRL_EF_IF_POR_DIG_POS) |
(1 << EF_CTRL_EF_IF_0_INT_CLR_POS) |
(0 << EF_CTRL_EF_IF_0_RW_POS) |
(1 << EF_CTRL_EF_IF_0_TRIG_POS);
putreg32(reg_val, dev->reg_base + EF_CTRL_EF_IF_CTRL_0_OFFSET);
bflb_mtimer_delay_us(10);
/* Wait for efuse control idle */
do {
reg_val = getreg32(dev->reg_base + EF_CTRL_EF_IF_CTRL_0_OFFSET);
timeout--;
if (timeout == 0) {
break;
}
} while ((reg_val & EF_CTRL_EF_IF_0_BUSY_MASK) || (!(reg_val & EF_CTRL_EF_IF_0_AUTOLOAD_DONE_MASK)));
/* Switch to AHB clock */
reg_val = (EF_CTRL_EFUSE_CTRL_PROTECT) |
(EF_CTRL_OP_MODE_AUTO << EF_CTRL_EF_IF_0_MANUAL_EN_POS) |
(EF_CTRL_PARA_DFT << EF_CTRL_EF_IF_0_CYC_MODIFY_POS) |
#if defined(BL702) || defined(BL602) || defined(BL702L)
(EF_CTRL_EF_CLK << EF_CTRL_EF_CLK_SAHB_DATA_SEL_POS) |
#endif
(1 << EF_CTRL_EF_IF_AUTO_RD_EN_POS) |
(0 << EF_CTRL_EF_IF_POR_DIG_POS) |
(1 << EF_CTRL_EF_IF_0_INT_CLR_POS) |
(0 << EF_CTRL_EF_IF_0_RW_POS) |
(0 << EF_CTRL_EF_IF_0_TRIG_POS);
putreg32(reg_val, dev->reg_base + EF_CTRL_EF_IF_CTRL_0_OFFSET);
}
/****************************************************************************/ /**
* @brief Load efuse region 0
*
* @param dev ef control device pointer
*
* @return None
*
*******************************************************************************/
#ifdef EF_CTRL_EFUSE_R1_SIZE
static void ATTR_TCM_SECTION bflb_ef_ctrl_load_efuse_r1(struct bflb_device_s *dev)
{
uint32_t reg_val;
EF_CTRL_DATA1_CLEAR;
/* Trigger read */
/* Note:ef_if_ctrl_1 has no EF_CTRL_EF_CLK_SAHB_DATA_SEL_POS bit as ef_if_ctrl_0,
so we select it(them) in ef_if_ctrl_0 */
reg_val = (EF_CTRL_EFUSE_CTRL_PROTECT) |
(EF_CTRL_OP_MODE_AUTO << EF_CTRL_EF_IF_0_MANUAL_EN_POS) |
(EF_CTRL_PARA_DFT << EF_CTRL_EF_IF_0_CYC_MODIFY_POS) |
(1 << EF_CTRL_EF_IF_AUTO_RD_EN_POS) |
(0 << EF_CTRL_EF_IF_POR_DIG_POS) |
(1 << EF_CTRL_EF_IF_0_INT_CLR_POS) |
(0 << EF_CTRL_EF_IF_0_RW_POS) |
(0 << EF_CTRL_EF_IF_0_TRIG_POS);
putreg32(reg_val, dev->reg_base + EF_CTRL_EF_IF_CTRL_0_OFFSET);
reg_val = (EF_CTRL_EFUSE_CTRL_PROTECT) |
(EF_CTRL_OP_MODE_AUTO << EF_CTRL_EF_IF_1_MANUAL_EN_POS) |
(EF_CTRL_PARA_DFT << EF_CTRL_EF_IF_1_CYC_MODIFY_POS) |
(1 << EF_CTRL_EF_IF_1_INT_CLR_POS) |
(0 << EF_CTRL_EF_IF_1_RW_POS) |
(0 << EF_CTRL_EF_IF_1_TRIG_POS);
putreg32(reg_val, dev->reg_base + EF_CTRL_EF_IF_CTRL_1_OFFSET);
reg_val = (EF_CTRL_EFUSE_CTRL_PROTECT) |
(EF_CTRL_OP_MODE_AUTO << EF_CTRL_EF_IF_1_MANUAL_EN_POS) |
(EF_CTRL_PARA_DFT << EF_CTRL_EF_IF_1_CYC_MODIFY_POS) |
(1 << EF_CTRL_EF_IF_1_INT_CLR_POS) |
(0 << EF_CTRL_EF_IF_1_RW_POS) |
(1 << EF_CTRL_EF_IF_1_TRIG_POS);
putreg32(reg_val, dev->reg_base + EF_CTRL_EF_IF_CTRL_1_OFFSET);
bflb_mtimer_delay_us(10);
/* Wait for efuse control idle */
do {
reg_val = getreg32(dev->reg_base + EF_CTRL_EF_IF_CTRL_1_OFFSET);
} while (reg_val & EF_CTRL_EF_IF_1_BUSY_MASK);
do {
reg_val = getreg32(dev->reg_base + EF_CTRL_EF_IF_CTRL_0_OFFSET);
} while (!(reg_val & EF_CTRL_EF_IF_0_AUTOLOAD_DONE_MASK));
/* Switch to AHB clock since often read efuse data after load */
/* Note:ef_if_ctrl_1 has no EF_CTRL_EF_CLK_SAHB_DATA_SEL_POS bit as ef_if_ctrl_0,
so we select it(them) in ef_if_ctrl_0 */
reg_val = (EF_CTRL_EFUSE_CTRL_PROTECT) |
(EF_CTRL_OP_MODE_AUTO << EF_CTRL_EF_IF_0_MANUAL_EN_POS) |
(EF_CTRL_PARA_DFT << EF_CTRL_EF_IF_0_CYC_MODIFY_POS) |
(1 << EF_CTRL_EF_IF_AUTO_RD_EN_POS) |
(0 << EF_CTRL_EF_IF_POR_DIG_POS) |
(1 << EF_CTRL_EF_IF_0_INT_CLR_POS) |
(0 << EF_CTRL_EF_IF_0_RW_POS) |
(0 << EF_CTRL_EF_IF_0_TRIG_POS);
putreg32(reg_val, dev->reg_base + EF_CTRL_EF_IF_CTRL_0_OFFSET);
reg_val = (EF_CTRL_EFUSE_CTRL_PROTECT) |
(EF_CTRL_OP_MODE_AUTO << EF_CTRL_EF_IF_1_MANUAL_EN_POS) |
(EF_CTRL_PARA_DFT << EF_CTRL_EF_IF_1_CYC_MODIFY_POS) |
(1 << EF_CTRL_EF_IF_1_INT_CLR_POS) |
(0 << EF_CTRL_EF_IF_1_RW_POS) |
(0 << EF_CTRL_EF_IF_1_TRIG_POS);
putreg32(reg_val, dev->reg_base + EF_CTRL_EF_IF_CTRL_1_OFFSET);
}
#endif
/****************************************************************************/ /**
* @brief Check efuse busy status
*
* @param dev ef control device pointer
*
* @return 1 for busy 0 for not
*
*******************************************************************************/
static int ATTR_TCM_SECTION bflb_ef_ctrl_busy(struct bflb_device_s *dev)
{
uint32_t reg_val;
reg_val = getreg32(dev->reg_base + EF_CTRL_EF_IF_CTRL_0_OFFSET);
if (reg_val & EF_CTRL_EF_IF_0_BUSY_MASK) {
return 1;
}
return 0;
}
/****************************************************************************/ /**
* @brief Check efuse auto load done
*
* @param dev ef control device pointer
*
* @return 1 for auto load done 0 for not
*
*******************************************************************************/
int ATTR_TCM_SECTION bflb_ef_ctrl_autoload_done(struct bflb_device_s *dev)
{
uint32_t reg_val;
if (dev == NULL) {
dev = bflb_device_get_by_name("ef_ctrl");
}
/* Switch to AHB clock */
bflb_ef_ctrl_switch_ahb_clk_r0(dev);
reg_val = getreg32(dev->reg_base + EF_CTRL_EF_IF_CTRL_0_OFFSET);
if (reg_val & EF_CTRL_EF_IF_0_AUTOLOAD_DONE_MASK) {
return 1;
}
return 0;
}
/****************************************************************************/ /**
* @brief write data to efuse
*
* @param dev ef control device pointer
* @param offset: offset of efuse address to write
* @param pword: data pointer to buffer which is aligned to word
* @param count: count of data in words to write
* @param program: 1 for program to efuse,0 for not program now
*
* @return None
*
*******************************************************************************/
void ATTR_TCM_SECTION bflb_ef_ctrl_write_direct(struct bflb_device_s *dev, uint32_t offset, uint32_t *pword, uint32_t count, uint8_t program)
{
uint32_t *pefuse_start = NULL;
uint32_t region0_count = 0, region1_count = 0;
uint32_t total_size = EF_CTRL_EFUSE_R0_SIZE;
uintptr_t irq_stat;
#ifdef EF_CTRL_EFUSE_R1_SIZE
total_size += EF_CTRL_EFUSE_R1_SIZE;
#else
(void)region1_count;
#endif
if (offset > total_size || (offset + count * 4) > total_size || pword == NULL) {
return;
}
if (offset < EF_CTRL_EFUSE_R0_SIZE) {
if (offset + count * 4 <= EF_CTRL_EFUSE_R0_SIZE) {
region0_count = count;
} else {
region0_count = (EF_CTRL_EFUSE_R0_SIZE - offset) / 4;
region1_count = (offset + count * 4 - EF_CTRL_EFUSE_R0_SIZE) / 4;
}
} else {
region1_count = count;
}
if (dev == NULL) {
dev = bflb_device_get_by_name("ef_ctrl");
}
pefuse_start = (uint32_t *)(dev->reg_base + offset);
irq_stat = bflb_irq_save();
#if defined(BL702) || defined(BL602) || defined(BL702L)
extern void bflb_efuse_switch_cpu_clock_save(void);
bflb_efuse_switch_cpu_clock_save();
#endif
if (region0_count > 0) {
/* Switch to AHB clock */
bflb_ef_ctrl_switch_ahb_clk_r0(dev);
arch_memcpy4(pefuse_start, pword, region0_count);
pefuse_start += region0_count;
pword += region0_count;
if (program) {
bflb_ef_ctrl_program_efuse_r0(dev);
bflb_mtimer_delay_us(100);
}
}
#ifdef EF_CTRL_EFUSE_R1_SIZE
if (region1_count > 0) {
/* Switch to AHB clock */
bflb_ef_ctrl_switch_ahb_clk_r1(dev);
/* Add delay for CLK to be stable */
bflb_mtimer_delay_us(4);
arch_memcpy4(pefuse_start, pword, region1_count);
if (program) {
bflb_ef_ctrl_program_efuse_r1(dev);
bflb_mtimer_delay_us(100);
}
}
#endif
#if defined(BL702) || defined(BL602) || defined(BL702L)
bflb_efuse_switch_cpu_clock_restore();
#endif
bflb_irq_restore(irq_stat);
}
/****************************************************************************/ /**
* @brief Read data from efuse
*
* @param dev ef control device pointer
* @param offset: offset of efuse address to read
* @param pword: data pointer to buffer which is aligned to word
* @param count: count of data in words to read
* @param reload: 1 for reload before read,0 for not
*
* @return None
*
*******************************************************************************/
void ATTR_TCM_SECTION bflb_ef_ctrl_read_direct(struct bflb_device_s *dev, uint32_t offset, uint32_t *pword, uint32_t count, uint8_t reload)
{
uint32_t *pefuse_start = NULL;
uint32_t region0_count = 0, region1_count = 0;
uint32_t total_size = EF_CTRL_EFUSE_R0_SIZE;
uintptr_t irq_stat;
#ifdef EF_CTRL_EFUSE_R1_SIZE
total_size += EF_CTRL_EFUSE_R1_SIZE;
#else
(void)region1_count;
#endif
if (offset > total_size || (offset + count * 4) > total_size || pword == NULL) {
return;
}
if (offset < EF_CTRL_EFUSE_R0_SIZE) {
if (offset + count * 4 <= EF_CTRL_EFUSE_R0_SIZE) {
region0_count = count;
} else {
region0_count = (EF_CTRL_EFUSE_R0_SIZE - offset) / 4;
region1_count = (offset + count * 4 - EF_CTRL_EFUSE_R0_SIZE) / 4;
}
} else {
region1_count = count;
}
if (dev == NULL) {
dev = bflb_device_get_by_name("ef_ctrl");
}
pefuse_start = (uint32_t *)(dev->reg_base + offset);
irq_stat = bflb_irq_save();
#if defined(BL702) || defined(BL602) || defined(BL702L)
bflb_efuse_switch_cpu_clock_save();
#endif
if (region0_count > 0) {
if (reload) {
bflb_ef_ctrl_load_efuse_r0(dev);
} else {
bflb_ef_ctrl_switch_ahb_clk_r0(dev);
}
arch_memcpy4(pword, pefuse_start, region0_count);
pword += region0_count;
pefuse_start += region0_count;
}
#ifdef EF_CTRL_EFUSE_R1_SIZE
if (region1_count > 0) {
if (reload) {
bflb_ef_ctrl_load_efuse_r1(dev);
} else {
bflb_ef_ctrl_switch_ahb_clk_r1(dev);
}
arch_memcpy4(pword, pefuse_start, region0_count);
}
#endif
#if defined(BL702) || defined(BL602) || defined(BL702L)
bflb_efuse_switch_cpu_clock_restore();
#endif
bflb_irq_restore(irq_stat);
}
/****************************************************************************/ /**
* @brief Efuse read common trim value
*
* @param dev ef control device pointer
* @param name: Trim name
* @param trim: Trim data pointer
* @param reload: Reload efuse data before read
* @return None
*
*******************************************************************************/
void ATTR_TCM_SECTION bflb_ef_ctrl_read_common_trim(struct bflb_device_s *dev, char *name, bflb_ef_ctrl_com_trim_type *trim, uint8_t reload)
{
uint32_t reg_val;
uint32_t i = 0;
const bflb_ef_ctrl_com_trim_cfg *trim_list = NULL;
uint32_t trim_list_len;
uintptr_t irq_stat;
if (dev == NULL) {
dev = bflb_device_get_by_name("ef_ctrl");
}
irq_stat = bflb_irq_save();
#if defined(BL702) || defined(BL602) || defined(BL702L)
bflb_efuse_switch_cpu_clock_save();
#endif
if (reload) {
/* Trigger read data from efuse */
bflb_ef_ctrl_load_efuse_r0(dev);
#ifdef EF_CTRL_EFUSE_R1_SIZE
bflb_ef_ctrl_load_efuse_r1(dev);
#endif
}
trim->en = 0;
trim->parity = 0;
trim->empty = 1;
trim->len = 0;
trim_list_len = bflb_ef_ctrl_get_common_trim_list(&trim_list);
for (i = 0; i < trim_list_len; i++) {
if (memcmp(name, trim_list[i].name, strlen(name)) == 0) {
/* switch clock */
if (trim_list[i].en_addr <= EF_CTRL_EFUSE_R0_SIZE) {
/* Switch to AHB clock */
bflb_ef_ctrl_switch_ahb_clk_r0(dev);
}
#ifdef EF_CTRL_EFUSE_R1_SIZE
if (trim_list[i].en_addr > EF_CTRL_EFUSE_R0_SIZE) {
/* Switch to AHB clock */
bflb_ef_ctrl_switch_ahb_clk_r1(dev);
}
#endif
trim->len = trim_list[i].value_len;
reg_val = getreg32(dev->reg_base + (trim_list[i].en_addr / 32) * 4);
if (reg_val & (1 << (trim_list[i].en_addr % 32))) {
trim->en = 1;
}
reg_val = getreg32(dev->reg_base + (trim_list[i].parity_addr / 32) * 4);
if (reg_val & (1 << (trim_list[i].parity_addr % 32))) {
trim->parity = 1;
}
if (((trim_list[i].value_addr % 32) + trim_list[i].value_len) > 32) {
uint64_t tmpval64 = (uint64_t)getreg32(dev->reg_base + (trim_list[i].value_addr / 32) * 4);
tmpval64 |= (((uint64_t)getreg32(dev->reg_base + (trim_list[i].value_addr / 32) * 4 + 4)) << 32);
tmpval64 = tmpval64 >> (trim_list[i].value_addr % 32);
trim->value = (uint32_t)(tmpval64 & (((uint64_t)1 << trim_list[i].value_len) - 1));
} else {
reg_val = getreg32(dev->reg_base + (trim_list[i].value_addr / 32) * 4);
reg_val = reg_val >> (trim_list[i].value_addr % 32);
trim->value = reg_val & ((1 << trim_list[i].value_len) - 1);
}
if (trim->en == 0 && trim->parity == 0 && trim->value == 0) {
trim->empty = 1;
} else {
trim->empty = 0;
}
break;
}
}
#if defined(BL702) || defined(BL602) || defined(BL702L)
bflb_efuse_switch_cpu_clock_restore();
#endif
bflb_irq_restore(irq_stat);
}
/****************************************************************************/ /**
* @brief Efuse write common trim value
*
* @param dev ef control device pointer
* @param name: Trim name
* @param trim: Trim data pointer
* @param program: program to efuse entity or not
*
* @return None
*
*******************************************************************************/
void ATTR_TCM_SECTION bflb_ef_ctrl_write_common_trim(struct bflb_device_s *dev, char *name, uint32_t value, uint8_t program)
{
uint32_t reg_val;
uint32_t i = 0;
uint8_t parity = 0;
const bflb_ef_ctrl_com_trim_cfg *trim_list = NULL;
uint32_t trim_list_len;
uintptr_t irq_stat;
if (dev == NULL) {
dev = bflb_device_get_by_name("ef_ctrl");
}
trim_list_len = bflb_ef_ctrl_get_common_trim_list(&trim_list);
irq_stat = bflb_irq_save();
for (i = 0; i < trim_list_len; i++) {
if (memcmp(name, trim_list[i].name, strlen(name)) == 0) {
#if defined(BL702) || defined(BL602) || defined(BL702L)
bflb_efuse_switch_cpu_clock_save();
#endif
/* switch clock */
if (trim_list[i].en_addr <= EF_CTRL_EFUSE_R0_SIZE) {
/* Switch to AHB clock */
bflb_ef_ctrl_switch_ahb_clk_r0(dev);
}
#ifdef EF_CTRL_EFUSE_R1_SIZE
if (trim_list[i].en_addr > EF_CTRL_EFUSE_R0_SIZE) {
/* Switch to AHB clock */
bflb_ef_ctrl_switch_ahb_clk_r1(dev);
}
#endif
reg_val = getreg32(dev->reg_base + (trim_list[i].en_addr / 32) * 4);
reg_val |= (1 << (trim_list[i].en_addr % 32));
putreg32(dev->reg_base + (trim_list[i].en_addr / 32) * 4, reg_val);
parity = bflb_ef_ctrl_get_trim_parity(value, trim_list[i].value_len);
if (parity) {
reg_val = getreg32(dev->reg_base + (trim_list[i].parity_addr / 32) * 4);
reg_val |= (1 << (trim_list[i].parity_addr % 32));
putreg32(dev->reg_base + (trim_list[i].parity_addr / 32) * 4, reg_val);
}
if (((trim_list[i].value_addr % 32) + trim_list[i].value_len) > 32) {
reg_val = getreg32(dev->reg_base + (trim_list[i].value_addr / 32) * 4);
reg_val |= (value << (trim_list[i].value_addr % 32));
putreg32(dev->reg_base + (trim_list[i].value_addr / 32) * 4, reg_val);
reg_val = getreg32(dev->reg_base + (trim_list[i].value_addr / 32) * 4) + 4;
reg_val |= (value >> (32 - (trim_list[i].value_addr % 32)));
putreg32(dev->reg_base + (trim_list[i].value_addr / 32) * 4 + 4, reg_val);
} else {
reg_val = getreg32(dev->reg_base + (trim_list[i].value_addr / 32) * 4);
reg_val |= (value << (trim_list[i].value_addr % 32));
putreg32(dev->reg_base + (trim_list[i].value_addr / 32) * 4, reg_val);
}
if (program) {
/* program */
if (trim_list[i].en_addr <= EF_CTRL_EFUSE_R0_SIZE) {
bflb_ef_ctrl_program_efuse_r0(dev);
}
#ifdef EF_CTRL_EFUSE_R1_SIZE
if (trim_list[i].en_addr > EF_CTRL_EFUSE_R0_SIZE) {
bflb_ef_ctrl_program_efuse_r1(dev);
}
#endif
}
#if defined(BL702) || defined(BL602) || defined(BL702L)
bflb_efuse_switch_cpu_clock_restore();
#endif
break;
}
}
bflb_irq_restore(irq_stat);
}
/****************************************************************************/ /**
* @brief Whether a value bits is all zero
*
* @param val: value to check
* @param start: start bit
* @param len: total length of bits to check
*
* @return 1 for all bits zero 0 for others
*
*******************************************************************************/
uint8_t ATTR_TCM_SECTION bflb_ef_ctrl_is_all_bits_zero(uint32_t val, uint8_t start, uint8_t len)
{
uint32_t mask = 0;
val = (val >> start);
if (len >= 32) {
mask = 0xffffffff;
} else {
mask = (1 << len) - 1;
}
if ((val & mask) == 0) {
return 1;
} else {
return 0;
}
}
/****************************************************************************/ /**
* @brief Efuse Ctrl get zero bit count
*
* @param val: Value to count
*
* @return Zero bit count
*
*******************************************************************************/
uint32_t ATTR_TCM_SECTION bflb_ef_ctrl_get_byte_zero_cnt(uint8_t val)
{
uint32_t cnt = 0;
uint32_t i = 0;
for (i = 0; i < 8; i++) {
if ((val & (1 << i)) == 0) {
cnt += 1;
}
}
return cnt;
}
/****************************************************************************/ /**
* @brief Analog Trim parity calculate
*
* @param val: Value of efuse trim data
* @param len: Length of bit to calculate
*
* @return Parity bit value
*
*******************************************************************************/
uint8_t ATTR_CLOCK_SECTION bflb_ef_ctrl_get_trim_parity(uint32_t val, uint8_t len)
{
uint8_t cnt = 0;
uint8_t i = 0;
for (i = 0; i < len; i++) {
if (val & (1 << i)) {
cnt++;
}
}
return cnt & 0x01;
}

2
drivers/soc/bl602/CMakeLists.txt
View File

@ -13,7 +13,7 @@ endif()
sdk_library_add_sources(bl602_std/src/bl602_aon.c)
sdk_library_add_sources(bl602_std/src/bl602_common.c)
sdk_library_add_sources(bl602_std/src/bl602_clock.c)
sdk_library_add_sources(bl602_std/src/bl602_ef_ctrl.c)
sdk_library_add_sources(bl602_std/src/bl602_ef_cfg.c)
sdk_library_add_sources(bl602_std/src/bl602_glb.c)
sdk_library_add_sources(bl602_std/src/bl602_hbn.c)
sdk_library_add_sources(bl602_std/src/bl602_l1c.c)

1
drivers/soc/bl602/bl602_std/include/bl602_aon.h
View File

@ -40,7 +40,6 @@
#include "glb_reg.h"
#include "hbn_reg.h"
#include "pds_reg.h"
#include "bl602_ef_ctrl.h"
#include "bl602_common.h"
/** @addtogroup BL602_Peripheral_Driver

97
drivers/soc/bl602/bl602_std/include/bl602_ef_cfg.h Normal file
View File

@ -0,0 +1,97 @@
/**
******************************************************************************
* @file bl602_ef_ctrl.h
* @version V1.0
* @date
* @brief This file is the standard driver header file
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
#ifndef __BL602_EF_CFG_H__
#define __BL602_EF_CFG_H__
#include "ef_ctrl_reg.h"
#include "bl602_common.h"
/** @addtogroup BL602_Peripheral_Driver
* @{
*/
/** @addtogroup EF_CTRL
* @{
*/
/** @defgroup EF_CTRL_Public_Types
* @{
*/
/**
* @brief Efuse Ctrl key slot type definition
*/
typedef struct {
uint32_t rsvd : 19; /*!< Reserved */
uint32_t chip_ver : 3; /*!< chip revision */
uint32_t customerID : 2; /*!< Efuse customer ID information */
uint32_t rsvd_info : 3; /*!< Efuse device info extension: 1:BL602C, 2:BL602L, 3:BL602E */
uint32_t memoryInfo : 2; /*!< Efuse memory info 0:no memory, 1:1MB flash, 2:2MB flash */
uint32_t coreInfo : 1; /*!< Efuse reserved */
uint32_t mcuInfo : 1; /*!< Efuse mcu info 0:wifi, 1:mcu */
uint32_t pinInfo : 1; /*!< Efuse pin info 0:QFN32, 1:QFN40 */
} bflb_efuse_device_info_type;
/*@} end of group EF_CTRL_Public_Types */
/** @defgroup EF_CTRL_Public_Constants
* @{
*/
/*@} end of group EF_CTRL_Public_Constants */
/** @defgroup EF_CTRL_Public_Macros
* @{
*/
/*@} end of group EF_CTRL_Public_Macros */
/** @defgroup EF_CTRL_Public_Functions
* @{
*/
void bflb_efuse_switch_cpu_clock_save(void);
void bflb_efuse_switch_cpu_clock_restore(void);
void bflb_ef_ctrl_get_device_info(bflb_efuse_device_info_type *deviceInfo);
uint32_t bflb_ef_ctrl_get_common_trim_list(const bflb_ef_ctrl_com_trim_cfg **trim_list);
/*@} end of group EF_CTRL_Public_Functions */
/*@} end of group EF_CTRL */
/*@} end of group BL602_Peripheral_Driver */
#endif /* __BL602_EF_CFG_H__ */

1
drivers/soc/bl602/bl602_std/include/bl602_glb.h
View File

@ -44,7 +44,6 @@
#include "bl602_sf_ctrl.h"
#include "bl602_sf_cfg.h"
#include "bl602_aon.h"
#include "bl602_ef_ctrl.h"
#include "bl602_pds.h"
#include "bl602_common.h"

1
drivers/soc/bl602/bl602_std/include/bl602_pds.h
View File

@ -37,7 +37,6 @@
#define __BL602_PDS_H__
#include "pds_reg.h"
#include "bl602_ef_ctrl.h"
#include "bl602_aon.h"
#include "bl602_hbn.h"
#include "bl602_sflash.h"

1
drivers/soc/bl602/bl602_std/include/bl602_romdriver.h
View File

@ -43,6 +43,7 @@
#include "bl602_xip_sflash.h"
#include "bl602_sflash.h"
#include "bl602_sf_ctrl.h"
#include "bl602_ef_ctrl.h"
// #include "bl602_sec_eng.h"
// #include "softcrc.h"

237
drivers/soc/bl602/bl602_std/src/bl602_ef_cfg.c Normal file
View File

@ -0,0 +1,237 @@
/**
******************************************************************************
* @file bl602_ef_cfg.c
* @version V1.0
* @date
* @brief This file is the standard driver c file
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
#include "string.h"
#include "bflb_ef_ctrl.h"
#include "bl602_ef_cfg.h"
#include "bl602_glb.h"
/** @addtogroup BL702_Peripheral_Driver
* @{
*/
/** @addtogroup SEC_EF_CTRL
* @{
*/
/** @defgroup SEC_EF_CTRL_Private_Macros
* @{
*/
/*@} end of group SEC_EF_CTRL_Private_Macros */
/** @defgroup SEC_EF_CTRL_Private_Types
* @{
*/
/*@} end of group SEC_EF_CTRL_Private_Types */
/** @defgroup SEC_EF_CTRL_Private_Variables
* @{
*/
static bflb_ef_ctrl_com_trim_cfg trim_list[] = {
{
.name = "rc32m",
.en_addr = 0x78 * 8 + 1,
.parity_addr = 0x78 * 8 + 0,
.value_addr = 0x7C * 8 + 4,
.value_len = 8,
},
{
.name = "rc32k",
.en_addr = 0xEC * 8 + 19,
.parity_addr = 0xEC * 8 + 18,
.value_addr = 0xEC * 8 + 8,
.value_len = 10,
},
{
.name = "gpadc_gain",
.en_addr = 0xF0 * 8 + 27,
.parity_addr = 0xF0 * 8 + 26,
.value_addr = 0xF0 * 8 + 14,
.value_len = 12,
},
{
.name = "tsen",
.en_addr = 0xF0 * 8 + 13,
.parity_addr = 0xF0 * 8 + 12,
.value_addr = 0xF0 * 8 + 0,
.value_len = 12,
}
};
#define EF_CTRL_DEVICE_INFO_OFFSET 0x18
/* 0x14 : ef_wifi_mac_low */
#define EF_DATA_EF_WIFI_MAC_LOW_OFFSET (0x14)
/* 0x18 : ef_wifi_mac_high */
#define EF_DATA_EF_WIFI_MAC_HIGH_OFFSET (0x18)
/* 0x1C : ef_key_slot_0_w0 */
#define EF_DATA_EF_KEY_SLOT_0_W0_OFFSET (0x1C)
/* 0x20 : ef_key_slot_0_w1 */
#define EF_DATA_EF_KEY_SLOT_0_W1_OFFSET (0x20)
/* 0x24 : ef_key_slot_0_w2 */
#define EF_DATA_EF_KEY_SLOT_0_W2_OFFSET (0x24)
/* 0x28 : ef_key_slot_0_w3 */
#define EF_DATA_EF_KEY_SLOT_0_W3_OFFSET (0x28)
/* 0x2C : ef_key_slot_1_w0 */
#define EF_DATA_EF_KEY_SLOT_1_W0_OFFSET (0x2C)
/* 0x30 : ef_key_slot_1_w1 */
#define EF_DATA_EF_KEY_SLOT_1_W1_OFFSET (0x30)
/* 0x34 : ef_key_slot_1_w2 */
#define EF_DATA_EF_KEY_SLOT_1_W2_OFFSET (0x34)
/* 0x38 : ef_key_slot_1_w3 */
#define EF_DATA_EF_KEY_SLOT_1_W3_OFFSET (0x38)
/* 0x3C : ef_key_slot_2_w0 */
#define EF_DATA_EF_KEY_SLOT_2_W0_OFFSET (0x3C)
/* 0x40 : ef_key_slot_2_w1 */
#define EF_DATA_EF_KEY_SLOT_2_W1_OFFSET (0x40)
/* 0x44 : ef_key_slot_2_w2 */
#define EF_DATA_EF_KEY_SLOT_2_W2_OFFSET (0x44)
/* 0x48 : ef_key_slot_2_w3 */
#define EF_DATA_EF_KEY_SLOT_2_W3_OFFSET (0x48)
/* 0x4C : ef_key_slot_3_w0 */
#define EF_DATA_EF_KEY_SLOT_3_W0_OFFSET (0x4C)
/* 0x50 : ef_key_slot_3_w1 */
#define EF_DATA_EF_KEY_SLOT_3_W1_OFFSET (0x50)
/* 0x54 : ef_key_slot_3_w2 */
#define EF_DATA_EF_KEY_SLOT_3_W2_OFFSET (0x54)
/* 0x58 : ef_key_slot_3_w3 */
#define EF_DATA_EF_KEY_SLOT_3_W3_OFFSET (0x58)
/* 0x5C : ef_key_slot_4_w0 */
#define EF_DATA_EF_KEY_SLOT_4_W0_OFFSET (0x5C)
/* 0x60 : ef_key_slot_4_w1 */
#define EF_DATA_EF_KEY_SLOT_4_W1_OFFSET (0x60)
/* 0x64 : ef_key_slot_4_w2 */
#define EF_DATA_EF_KEY_SLOT_4_W2_OFFSET (0x64)
/* 0x68 : ef_key_slot_4_w3 */
#define EF_DATA_EF_KEY_SLOT_4_W3_OFFSET (0x68)
/* 0x6C : ef_key_slot_5_w0 */
#define EF_DATA_EF_KEY_SLOT_5_W0_OFFSET (0x6C)
/* 0x70 : ef_key_slot_5_w1 */
#define EF_DATA_EF_KEY_SLOT_5_W1_OFFSET (0x70)
/* 0x74 : ef_key_slot_5_w2 */
#define EF_DATA_EF_KEY_SLOT_5_W2_OFFSET (0x74)
/* 0x78 : ef_key_slot_5_w3 */
#define EF_DATA_EF_KEY_SLOT_5_W3_OFFSET (0x78)
static GLB_ROOT_CLK_Type rtClk;
static uint8_t bdiv, hdiv;
/*@} end of group SEC_EF_CTRL_Private_Variables */
/** @defgroup SEC_EF_CTRL_Global_Variables
* @{
*/
/*@} end of group SEC_EF_CTRL_Global_Variables */
/** @defgroup SEC_EF_CTRL_Private_Fun_Declaration
* @{
*/
/*@} end of group SEC_EF_CTRL_Private_Fun_Declaration */
/** @defgroup SEC_EF_CTRL_Private_Functions
* @{
*/
/****************************************************************************/ /**
* @brief Efuse read write switch clock save
*
* @param deviceInfo: info pointer
*
* @return None
*
*******************************************************************************/
void ATTR_TCM_SECTION bflb_efuse_switch_cpu_clock_save(void)
{
/* all API should be place at tcm section */
bdiv = GLB_Get_BCLK_Div();
hdiv = GLB_Get_HCLK_Div();
rtClk = GLB_Get_Root_CLK_Sel();
HBN_Set_ROOT_CLK_Sel(HBN_ROOT_CLK_RC32M);
GLB_Set_System_CLK_Div(0, 0);
}
/****************************************************************************/ /**
* @brief Efuse read write switch clock restore
*
* @param deviceInfo: info pointer
*
* @return None
*
*******************************************************************************/
void ATTR_TCM_SECTION bflb_efuse_switch_cpu_clock_restore(void)
{
/* all API should be place at tcm section */
GLB_Set_System_CLK_Div(hdiv, bdiv);
HBN_Set_ROOT_CLK_Sel(rtClk);
}
/****************************************************************************/ /**
* @brief Efuse read device info
*
* @param deviceInfo: info pointer
*
* @return None
*
*******************************************************************************/
void bflb_ef_ctrl_get_device_info(bflb_efuse_device_info_type *deviceInfo)
{
uint32_t *p = (uint32_t *)deviceInfo;
bflb_ef_ctrl_read_direct(NULL, EF_CTRL_DEVICE_INFO_OFFSET, p, 1, 1);
}
/****************************************************************************/ /**
* @brief Efuse get trim list
*
* @param trim_list: Trim list pointer
*
* @return Trim list count
*
*******************************************************************************/
uint32_t bflb_ef_ctrl_get_common_trim_list(const bflb_ef_ctrl_com_trim_cfg **ptrim_list)
{
*ptrim_list = &trim_list[0];
return sizeof(trim_list) / sizeof(trim_list[0]);
}
/*@} end of group SEC_EF_CTRL_Public_Functions */
/*@} end of group SEC_EF_CTRL */
/*@} end of group BL702_Peripheral_Driver */

59
drivers/soc/bl602/port/bl602_efuse.c
View File

@ -1,19 +1,18 @@
#include "bflb_efuse.h"
#include "bl602_ef_ctrl.h"
#include "bflb_ef_ctrl.h"
#include "bl602_ef_cfg.h"
float bflb_efuse_get_adc_trim(void)
{
Efuse_ADC_Gain_Coeff_Type trim;
bflb_ef_ctrl_com_trim_type trim;
uint32_t tmp;
float coe = 1.0;
EF_Ctrl_Read_ADC_Gain_Trim(&trim);
if (trim.adcGainCoeffEn) {
if (trim.adcGainCoeffParity == EF_Ctrl_Get_Trim_Parity(trim.adcGainCoeff, 12)) {
tmp = trim.adcGainCoeff;
bflb_ef_ctrl_read_common_trim(NULL, "gpadc_gain", &trim, 1);
if (trim.en) {
if (trim.parity == bflb_ef_ctrl_get_trim_parity(trim.value, trim.len)) {
tmp = trim.value;
if (tmp & 0x800) {
tmp = ~tmp;
tmp += 1;
@ -30,12 +29,12 @@ float bflb_efuse_get_adc_trim(void)
uint32_t bflb_efuse_get_adc_tsen_trim(void)
{
Efuse_TSEN_Refcode_Corner_Type trim;
bflb_ef_ctrl_com_trim_type trim;
EF_Ctrl_Read_TSEN_Trim(&trim);
if (trim.tsenRefcodeCornerEn) {
if (trim.tsenRefcodeCornerParity == EF_Ctrl_Get_Trim_Parity(trim.tsenRefcodeCorner, 12)) {
return trim.tsenRefcodeCorner;
bflb_ef_ctrl_read_common_trim(NULL,"tsen", &trim,1);
if (trim.en) {
if (trim.parity == bflb_ef_ctrl_get_trim_parity(trim.value, trim.len)) {
return trim.value;
}
}
@ -44,10 +43,40 @@ uint32_t bflb_efuse_get_adc_tsen_trim(void)
void bflb_efuse_write_aes_key(uint8_t index, uint8_t *data, uint32_t len)
{
EF_Ctrl_Write_AES_Key(index, (uint32_t *)data, len, 1);
bflb_ef_ctrl_write_direct(NULL, 0x1C + index * 4, (uint32_t *)data, len, 1);
}
void bflb_efuse_lock_aes_key_write(uint8_t index)
{
uint32_t lock = 0;
if (index > 5) {
return;
}
/* write lock */
if (index <= 3) {
lock |= (1 << (index + 19));
} else {
lock |= (1 << (index + 19));
lock |= (1 << (index - 4 + 13));
}
bflb_ef_ctrl_write_direct(NULL, 0x7c, (uint32_t *)lock, 1, 1);
}
void bflb_efuse_lock_aes_key_read(uint8_t index)
{
uint32_t lock = 0;
if (index > 5) {
return;
}
/* read lock */
lock |= (1 << (index + 26));
bflb_ef_ctrl_write_direct(NULL, 0x7c, (uint32_t *)lock, 1, 1);
}
void bflb_efuse_read_aes_key(uint8_t index, uint8_t *data, uint32_t len)
{
EF_Ctrl_Read_AES_Key(index, (uint32_t *)data, len);
bflb_ef_ctrl_read_direct(NULL, 0x1C + index * 4, (uint32_t *)data, len, 1);
}

4
drivers/soc/bl602/startup/system_bl602.c
View File

@ -28,10 +28,6 @@ void SystemInit(void)
uint32_t *p;
uint8_t i;
uint32_t tmpVal = 0;
uint8_t flashCfg = 0;
uint8_t psramCfg = 0;
uint8_t isInternalFlash = 0;
uint8_t isInternalPsram = 0;
/* global IRQ disable */
__disable_irq();

1
drivers/soc/bl616/CMakeLists.txt
View File

@ -14,7 +14,6 @@ sdk_add_compile_definitions(-DBFLB_USE_ROM_DRIVER)
else()
sdk_library_add_sources(bl616_std/src/bl616_aon.c)
sdk_library_add_sources(bl616_std/src/bl616_clock.c)
sdk_library_add_sources(bl616_std/src/bl616_ef_ctrl.c)
sdk_library_add_sources(bl616_std/src/bl616_glb_gpio.c)
sdk_library_add_sources(bl616_std/src/bl616_glb.c)
sdk_library_add_sources(bl616_std/src/bl616_hbn.c)

2
drivers/soc/bl616/bl616_std/include/bl616_aon.h
View File

@ -40,7 +40,7 @@
#include "glb_reg.h"
#include "hbn_reg.h"
#include "pds_reg.h"
#include "bl616_ef_ctrl.h"
#include "bl616_ef_cfg.h"
#include "bl616_common.h"
/** @addtogroup BL616_Peripheral_Driver

14
drivers/soc/bl616/bl616_std/include/bl616_ef_cfg.h
View File

@ -51,6 +51,15 @@
* @{
*/
typedef struct
{
uint32_t rsvd : 22; /*!< Reserved */
uint32_t deviceInfo : 2; /*!< Efuse device information */
uint32_t psramInfo : 2; /*!< Efuse psram info 0:no psram, 1:WB 4MB*/
uint32_t memoryInfo : 3; /*!< Efuse memory info 0:no memory, 8:1MB flash */
uint32_t chipInfo : 3; /*!< Efuse chip revision */
} bflb_efuse_device_info_type;
/*@} end of group EF_CTRL_Public_Types */
/** @defgroup EF_CTRL_Public_Constants
@ -68,10 +77,7 @@
/** @defgroup EF_CTRL_Public_Functions
* @{
*/
void EF_Ctrl_Read_Device_Info(Efuse_Device_Info_Type *deviceInfo);
uint8_t EF_Ctrl_Is_MAC_Address_Slot_Empty(uint8_t slot, uint8_t reload);
BL_Err_Type EF_Ctrl_Write_MAC_Address_Opt(uint8_t slot, uint8_t mac[6], uint8_t program);
BL_Err_Type EF_Ctrl_Read_MAC_Address_Opt(uint8_t slot, uint8_t mac[6], uint8_t reload);
void bflb_ef_ctrl_get_device_info(bflb_efuse_device_info_type *deviceInfo);
/*@} end of group EF_CTRL_Public_Functions */

1
drivers/soc/bl616/bl616_std/include/bl616_glb.h
View File

@ -45,7 +45,6 @@
#include "bl616_sf_ctrl.h"
#include "bl616_sf_cfg.h"
#include "bl616_aon.h"
#include "bl616_ef_ctrl.h"
#include "bl616_pds.h"
#include "bl616_common.h"

1
drivers/soc/bl616/bl616_std/include/bl616_glb_gpio.h
View File

@ -44,7 +44,6 @@
#include "bl616_sf_ctrl.h"
// #include "bl616_sf_cfg.h"
#include "bl616_aon.h"
#include "bl616_ef_ctrl.h"
#include "bl616_pds.h"
#include "bl616_common.h"

1
drivers/soc/bl616/bl616_std/include/bl616_pds.h
View File

@ -38,7 +38,6 @@
#include "pds_reg.h"
#include "glb_reg.h"
#include "bl616_ef_ctrl.h"
#include "bl616_clock.h"
#include "bl616_aon.h"
#include "bl616_hbn.h"

1
drivers/soc/bl616/bl616_std/include/bl616_romapi_patch.h
View File

@ -39,7 +39,6 @@
#include "bl616_pds.h"
#include "bl616_sflash.h"
#include "bl616_xip_sflash.h"
#include "bl616_ef_ctrl.h"
#include "bl616_clock.h"
// #include "bl616_uart.h"

300
drivers/soc/bl616/bl616_std/src/bl616_ef_cfg.c
View File

@ -35,9 +35,8 @@
*/
#include "string.h"
#include "bl616_ef_ctrl.h"
#include "bflb_ef_ctrl.h"
#include "bl616_ef_cfg.h"
#include "ef_data_reg.h"
/** @addtogroup BL616_Peripheral_Driver
* @{
@ -50,7 +49,6 @@
/** @defgroup SEC_EF_CTRL_Private_Macros
* @{
*/
#define EF_CTRL_LOAD_BEFORE_READ_R0 EF_Ctrl_Load_Efuse_R0()
/*@} end of group SEC_EF_CTRL_Private_Macros */
@ -63,7 +61,7 @@
/** @defgroup SEC_EF_CTRL_Private_Variables
* @{
*/
static Efuse_Common_Trim_Cfg trim_lit[] = {
static const bflb_ef_ctrl_com_trim_cfg trim_list[] = {
{
.name = "ldo15",
.en_addr = 0x68 * 8 + 31,
@ -303,6 +301,61 @@ static Efuse_Common_Trim_Cfg trim_lit[] = {
.value_len = 6,
}
};
#define EF_CTRL_DEVICE_INFO_OFFSET 0x18
/* 0x14 : ef_wifi_mac_low */
#define EF_DATA_EF_WIFI_MAC_LOW_OFFSET (0x14)
/* 0x18 : ef_wifi_mac_high */
#define EF_DATA_EF_WIFI_MAC_HIGH_OFFSET (0x18)
/* 0x1C : ef_key_slot_0_w0 */
#define EF_DATA_EF_KEY_SLOT_0_W0_OFFSET (0x1C)
/* 0x20 : ef_key_slot_0_w1 */
#define EF_DATA_EF_KEY_SLOT_0_W1_OFFSET (0x20)
/* 0x24 : ef_key_slot_0_w2 */
#define EF_DATA_EF_KEY_SLOT_0_W2_OFFSET (0x24)
/* 0x28 : ef_key_slot_0_w3 */
#define EF_DATA_EF_KEY_SLOT_0_W3_OFFSET (0x28)
/* 0x2C : ef_key_slot_1_w0 */
#define EF_DATA_EF_KEY_SLOT_1_W0_OFFSET (0x2C)
/* 0x30 : ef_key_slot_1_w1 */
#define EF_DATA_EF_KEY_SLOT_1_W1_OFFSET (0x30)
/* 0x34 : ef_key_slot_1_w2 */
#define EF_DATA_EF_KEY_SLOT_1_W2_OFFSET (0x34)
/* 0x38 : ef_key_slot_1_w3 */
#define EF_DATA_EF_KEY_SLOT_1_W3_OFFSET (0x38)
/* 0x3C : ef_key_slot_2_w0 */
#define EF_DATA_EF_KEY_SLOT_2_W0_OFFSET (0x3C)
/* 0x40 : ef_key_slot_2_w1 */
#define EF_DATA_EF_KEY_SLOT_2_W1_OFFSET (0x40)
/* 0x44 : ef_key_slot_2_w2 */
#define EF_DATA_EF_KEY_SLOT_2_W2_OFFSET (0x44)
/* 0x48 : ef_key_slot_2_w3 */
#define EF_DATA_EF_KEY_SLOT_2_W3_OFFSET (0x48)
/* 0x4C : ef_key_slot_3_w0 */
#define EF_DATA_EF_KEY_SLOT_3_W0_OFFSET (0x4C)
/* 0x50 : ef_key_slot_3_w1 */
#define EF_DATA_EF_KEY_SLOT_3_W1_OFFSET (0x50)
/* 0x54 : ef_key_slot_3_w2 */
#define EF_DATA_EF_KEY_SLOT_3_W2_OFFSET (0x54)
/* 0x58 : ef_key_slot_3_w3 */
#define EF_DATA_EF_KEY_SLOT_3_W3_OFFSET (0x58)
/* 0x5C : ef_sw_usage_0 */
#define EF_DATA_EF_SW_USAGE_0_OFFSET (0x5C)
/* 0x60 : ef_sw_usage_1 */
#define EF_DATA_EF_SW_USAGE_1_OFFSET (0x60)
/* 0x64 : ef_sw_usage_2 */
#define EF_DATA_EF_SW_USAGE_2_OFFSET (0x64)
/* 0x68 : ef_sw_usage_3 */
#define EF_DATA_EF_SW_USAGE_3_OFFSET (0x68)
/* 0x6C : ef_key_slot_11_w0 */
#define EF_DATA_EF_KEY_SLOT_11_W0_OFFSET (0x6C)
/* 0x70 : ef_key_slot_11_w1 */
#define EF_DATA_EF_KEY_SLOT_11_W1_OFFSET (0x70)
/* 0x74 : ef_key_slot_11_w2 */
#define EF_DATA_EF_KEY_SLOT_11_W2_OFFSET (0x74)
/* 0x78 : ef_key_slot_11_w3 */
#define EF_DATA_EF_KEY_SLOT_11_W3_OFFSET (0x78)
/*@} end of group SEC_EF_CTRL_Private_Variables */
/** @defgroup SEC_EF_CTRL_Global_Variables
@ -321,28 +374,6 @@ static Efuse_Common_Trim_Cfg trim_lit[] = {
* @{
*/
/****************************************************************************/ /**
* @brief Efuse get zero bit count
*
* @param val: Value to count
*
* @return Zero bit count
*
*******************************************************************************/
static uint32_t EF_Cfg_Get_Byte_Zero_Cnt(uint8_t val)
{
uint32_t cnt = 0;
uint32_t i = 0;
for (i = 0; i < 8; i++) {
if ((val & (1 << i)) == 0) {
cnt += 1;
}
}
return cnt;
}
/****************************************************************************/ /**
* @brief Efuse read device info
*
@ -351,16 +382,11 @@ static uint32_t EF_Cfg_Get_Byte_Zero_Cnt(uint8_t val)
* @return None
*
*******************************************************************************/
void EF_Ctrl_Read_Device_Info(Efuse_Device_Info_Type *deviceInfo)
void bflb_ef_ctrl_get_device_info(bflb_efuse_device_info_type *deviceInfo)
{
uint32_t tmpVal;
uint32_t *p = (uint32_t *)deviceInfo;
/* Trigger read data from efuse */
EF_CTRL_LOAD_BEFORE_READ_R0;
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_EF_WIFI_MAC_HIGH);
*p = tmpVal;
bflb_ef_ctrl_read_direct(NULL, EF_CTRL_DEVICE_INFO_OFFSET, p, 1, 1);
}
/****************************************************************************/ /**
@ -371,100 +397,10 @@ void EF_Ctrl_Read_Device_Info(Efuse_Device_Info_Type *deviceInfo)
* @return Trim list count
*
*******************************************************************************/
uint32_t EF_Ctrl_Get_Common_Trim_List(Efuse_Common_Trim_Cfg **trim_list)
uint32_t bflb_ef_ctrl_get_common_trim_list(const bflb_ef_ctrl_com_trim_cfg **ptrim_list)
{
*trim_list = &trim_lit[0];
return sizeof(trim_lit) / sizeof(trim_lit[0]);
}
/****************************************************************************/ /**
* @brief Efuse read common trim value
*
* @param name: Trim name
* @param trim: Trim data pointer
* @param reload: Reload efuse data before read
* @return None
*
*******************************************************************************/
void EF_Ctrl_Read_Common_Trim(char *name, Efuse_Common_Trim_Type *trim, uint8_t reload)
{
uint32_t tmpVal;
uint32_t i = 0;
if (reload) {
/* Trigger read data from efuse */
EF_CTRL_LOAD_BEFORE_READ_R0;
}
trim->en = 0;
trim->parity = 0;
trim->empty = 1;
trim->len = 0;
for (i = 0; i < sizeof(trim_lit) / sizeof(trim_lit[0]); i++) {
if (memcmp(name, trim_lit[i].name, strlen(name)) == 0) {
trim->len = trim_lit[i].value_len;
tmpVal = BL_RD_WORD(EF_DATA_BASE + (trim_lit[i].en_addr / 32) * 4);
if (tmpVal & (1 << (trim_lit[i].en_addr % 32))) {
trim->en = 1;
}
tmpVal = BL_RD_WORD(EF_DATA_BASE + (trim_lit[i].parity_addr / 32) * 4);
if (tmpVal & (1 << (trim_lit[i].parity_addr % 32))) {
trim->parity = 1;
}
tmpVal = BL_RD_WORD(EF_DATA_BASE + (trim_lit[i].value_addr / 32) * 4);
tmpVal = tmpVal >> (trim_lit[i].value_addr % 32);
trim->value = tmpVal & ((1 << trim_lit[i].value_len) - 1);
if (trim->en == 0 && trim->parity == 0 && trim->value == 0) {
trim->empty = 1;
} else {
trim->empty = 0;
}
}
}
}
/****************************************************************************/ /**
* @brief Efuse write common trim value
*
* @param name: Trim name
* @param trim: Trim data pointer
* @param program: program to efuse entity or not
*
* @return None
*
*******************************************************************************/
void EF_Ctrl_Write_Common_Trim(char *name, uint32_t value, uint8_t program)
{
uint32_t tmpVal;
uint32_t i = 0;
uint8_t parity = 0;
/* Switch to AHB clock */
EF_Ctrl_Sw_AHB_Clk_0();
for (i = 0; i < sizeof(trim_lit) / sizeof(trim_lit[0]); i++) {
if (memcmp(name, trim_lit[i].name, strlen(name)) == 0) {
tmpVal = BL_RD_WORD(EF_DATA_BASE + (trim_lit[i].en_addr / 32) * 4);
tmpVal |= (1 << (trim_lit[i].en_addr % 32));
BL_WR_WORD(EF_DATA_BASE + (trim_lit[i].en_addr / 32) * 4, tmpVal);
parity = EF_Ctrl_Get_Trim_Parity(value, trim_lit[i].value_len);
if (parity) {
tmpVal = BL_RD_WORD(EF_DATA_BASE + (trim_lit[i].parity_addr / 32) * 4);
tmpVal |= (1 << (trim_lit[i].parity_addr % 32));
BL_WR_WORD(EF_DATA_BASE + (trim_lit[i].parity_addr / 32) * 4, tmpVal);
}
tmpVal = BL_RD_WORD(EF_DATA_BASE + (trim_lit[i].value_addr / 32) * 4);
tmpVal |= (value << (trim_lit[i].value_addr % 32));
BL_WR_WORD(EF_DATA_BASE + (trim_lit[i].value_addr / 32) * 4, tmpVal);
}
}
if (program) {
EF_Ctrl_Program_Efuse_0();
}
*ptrim_list = &trim_list[0];
return sizeof(trim_list) / sizeof(trim_list[0]);
}
/****************************************************************************/ /**
@ -482,39 +418,18 @@ uint8_t EF_Ctrl_Is_MAC_Address_Slot_Empty(uint8_t slot, uint8_t reload)
uint32_t part1Empty = 0, part2Empty = 0;
if (slot == 0) {
/* Switch to AHB clock */
EF_Ctrl_Sw_AHB_Clk_0();
if (reload) {
EF_CTRL_LOAD_BEFORE_READ_R0;
}
tmp1 = BL_RD_REG(EF_DATA_BASE, EF_DATA_EF_WIFI_MAC_LOW);
tmp2 = BL_RD_REG(EF_DATA_BASE, EF_DATA_EF_WIFI_MAC_HIGH);
bflb_ef_ctrl_read_direct(NULL, EF_DATA_EF_WIFI_MAC_LOW_OFFSET, &tmp1, 1, reload);
bflb_ef_ctrl_read_direct(NULL, EF_DATA_EF_WIFI_MAC_HIGH_OFFSET, &tmp2, 1, reload);
} else if (slot == 1) {
/* Switch to AHB clock */
EF_Ctrl_Sw_AHB_Clk_0();
if (reload) {
EF_CTRL_LOAD_BEFORE_READ_R0;
}
tmp1 = BL_RD_REG(EF_DATA_BASE, EF_DATA_EF_SW_USAGE_2);
tmp2 = BL_RD_REG(EF_DATA_BASE, EF_DATA_EF_SW_USAGE_3);
bflb_ef_ctrl_read_direct(NULL, EF_DATA_EF_SW_USAGE_2_OFFSET, &tmp1, 1, reload);
bflb_ef_ctrl_read_direct(NULL, EF_DATA_EF_SW_USAGE_3_OFFSET, &tmp2, 1, reload);
} else if (slot == 2) {
/* Switch to AHB clock */
EF_Ctrl_Sw_AHB_Clk_0();
if (reload) {
EF_CTRL_LOAD_BEFORE_READ_R0;
}
tmp1 = BL_RD_REG(EF_DATA_BASE, EF_DATA_EF_KEY_SLOT_11_W1);
tmp2 = BL_RD_REG(EF_DATA_BASE, EF_DATA_EF_KEY_SLOT_11_W2);
bflb_ef_ctrl_read_direct(NULL, EF_DATA_EF_KEY_SLOT_11_W1_OFFSET, &tmp1, 1, reload);
bflb_ef_ctrl_read_direct(NULL, EF_DATA_EF_KEY_SLOT_11_W2_OFFSET, &tmp2, 1, reload);
}
part1Empty = (EF_Ctrl_Is_All_Bits_Zero(tmp1, 0, 32));
part2Empty = (EF_Ctrl_Is_All_Bits_Zero(tmp2, 0, 22));
part1Empty = (bflb_ef_ctrl_is_all_bits_zero(tmp1, 0, 32));
part2Empty = (bflb_ef_ctrl_is_all_bits_zero(tmp2, 0, 22));
return (part1Empty && part2Empty);
}
@ -533,7 +448,7 @@ BL_Err_Type EF_Ctrl_Write_MAC_Address_Opt(uint8_t slot, uint8_t mac[6], uint8_t
{
uint8_t *maclow = (uint8_t *)mac;
uint8_t *machigh = (uint8_t *)(mac + 4);
uint32_t tmpVal;
uint32_t tmpval;
uint32_t i = 0, cnt;
if (slot >= 3) {
@ -542,43 +457,38 @@ BL_Err_Type EF_Ctrl_Write_MAC_Address_Opt(uint8_t slot, uint8_t mac[6], uint8_t
/* Change to local order */
for (i = 0; i < 3; i++) {
tmpVal = mac[i];
tmpval = mac[i];
mac[i] = mac[5 - i];
mac[5 - i] = tmpVal;
mac[5 - i] = tmpval;
}
/* Switch to AHB clock */
EF_Ctrl_Sw_AHB_Clk_0();
/* The low 32 bits */
tmpval = BL_RDWD_FRM_BYTEP(maclow);
if (slot == 0) {
BL_WR_REG(EF_DATA_BASE, EF_DATA_EF_WIFI_MAC_LOW, BL_RDWD_FRM_BYTEP(maclow));
bflb_ef_ctrl_write_direct(NULL, EF_DATA_EF_WIFI_MAC_LOW_OFFSET, &tmpval, 1, program);
} else if (slot == 1) {
BL_WR_REG(EF_DATA_BASE, EF_DATA_EF_SW_USAGE_2, BL_RDWD_FRM_BYTEP(maclow));
bflb_ef_ctrl_write_direct(NULL, EF_DATA_EF_SW_USAGE_2_OFFSET, &tmpval, 1, program);
} else if (slot == 2) {
BL_WR_REG(EF_DATA_BASE, EF_DATA_EF_KEY_SLOT_11_W1, BL_RDWD_FRM_BYTEP(maclow));
bflb_ef_ctrl_write_direct(NULL, EF_DATA_EF_KEY_SLOT_11_W1_OFFSET, &tmpval, 1, program);
}
/* The high 16 bits */
tmpVal = machigh[0] + (machigh[1] << 8);
tmpval = machigh[0] + (machigh[1] << 8);
cnt = 0;
for (i = 0; i < 6; i++) {
cnt += EF_Cfg_Get_Byte_Zero_Cnt(mac[i]);
cnt += bflb_ef_ctrl_get_byte_zero_cnt(mac[i]);
}
tmpVal |= ((cnt & 0x3f) << 16);
tmpval |= ((cnt & 0x3f) << 16);
if (slot == 0) {
BL_WR_REG(EF_DATA_BASE, EF_DATA_EF_WIFI_MAC_HIGH, tmpVal);
bflb_ef_ctrl_write_direct(NULL, EF_DATA_EF_WIFI_MAC_HIGH_OFFSET, &tmpval, 1, program);
} else if (slot == 1) {
BL_WR_REG(EF_DATA_BASE, EF_DATA_EF_SW_USAGE_3, tmpVal);
bflb_ef_ctrl_write_direct(NULL, EF_DATA_EF_SW_USAGE_3_OFFSET, &tmpval, 1, program);
} else if (slot == 2) {
BL_WR_REG(EF_DATA_BASE, EF_DATA_EF_KEY_SLOT_11_W2, tmpVal);
}
if (program) {
EF_Ctrl_Program_Efuse_0();
bflb_ef_ctrl_write_direct(NULL, EF_DATA_EF_KEY_SLOT_11_W2_OFFSET, &tmpval, 1, program);
}
return SUCCESS;
@ -598,7 +508,7 @@ BL_Err_Type EF_Ctrl_Read_MAC_Address_Opt(uint8_t slot, uint8_t mac[6], uint8_t r
{
uint8_t *maclow = (uint8_t *)mac;
uint8_t *machigh = (uint8_t *)(mac + 4);
uint32_t tmpVal = 0;
uint32_t tmpval = 0;
uint32_t i = 0;
uint32_t cnt = 0;
@ -606,45 +516,39 @@ BL_Err_Type EF_Ctrl_Read_MAC_Address_Opt(uint8_t slot, uint8_t mac[6], uint8_t r
return ERROR;
}
/* Trigger read data from efuse */
if (reload) {
EF_CTRL_LOAD_BEFORE_READ_R0;
if (slot == 0) {
bflb_ef_ctrl_read_direct(NULL, EF_DATA_EF_WIFI_MAC_LOW_OFFSET, &tmpval, 1, reload);
} else if (slot == 1) {
bflb_ef_ctrl_read_direct(NULL, EF_DATA_EF_SW_USAGE_2_OFFSET, &tmpval, 1, reload);
} else if (slot == 2) {
bflb_ef_ctrl_read_direct(NULL, EF_DATA_EF_KEY_SLOT_11_W1_OFFSET, &tmpval, 1, reload);
}
BL_WRWD_TO_BYTEP(maclow, tmpval);
if (slot == 0) {
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_EF_WIFI_MAC_LOW);
bflb_ef_ctrl_read_direct(NULL, EF_DATA_EF_WIFI_MAC_HIGH_OFFSET, &tmpval, 1, reload);
} else if (slot == 1) {
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_EF_SW_USAGE_2);
bflb_ef_ctrl_read_direct(NULL, EF_DATA_EF_SW_USAGE_3_OFFSET, &tmpval, 1, reload);
} else if (slot == 2) {
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_EF_KEY_SLOT_11_W1);
bflb_ef_ctrl_read_direct(NULL, EF_DATA_EF_KEY_SLOT_11_W2_OFFSET, &tmpval, 1, reload);
}
BL_WRWD_TO_BYTEP(maclow, tmpVal);
if (slot == 0) {
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_EF_WIFI_MAC_HIGH);
} else if (slot == 1) {
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_EF_SW_USAGE_3);
} else if (slot == 2) {
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_EF_KEY_SLOT_11_W2);
}
machigh[0] = tmpVal & 0xff;
machigh[1] = (tmpVal >> 8) & 0xff;
machigh[0] = tmpval & 0xff;
machigh[1] = (tmpval >> 8) & 0xff;
/* Check parity */
for (i = 0; i < 6; i++) {
cnt += EF_Cfg_Get_Byte_Zero_Cnt(mac[i]);
cnt += bflb_ef_ctrl_get_byte_zero_cnt(mac[i]);
}
if ((cnt & 0x3f) == ((tmpVal >> 16) & 0x3f)) {
if ((cnt & 0x3f) == ((tmpval >> 16) & 0x3f)) {
/* Change to network order */
for (i = 0; i < 3; i++) {
tmpVal = mac[i];
tmpval = mac[i];
mac[i] = mac[5 - i];
mac[5 - i] = tmpVal;
mac[5 - i] = tmpval;
}
return SUCCESS;
} else {
return ERROR;

73
drivers/soc/bl616/port/bl616_efuse.c
View File

@ -1,18 +1,20 @@
#include "bflb_ef_ctrl.h"
#include "bflb_efuse.h"
#include "bl616_ef_ctrl.h"
float bflb_efuse_get_adc_trim(void)
{
Efuse_ADC_Gain_Coeff_Type trim;
bflb_ef_ctrl_com_trim_type trim;
uint32_t tmp;
float coe = 1.0;
EF_Ctrl_Read_ADC_Gain_Trim(&trim);
//EF_Ctrl_Read_ADC_Gain_Trim(&trim);
bflb_ef_ctrl_read_common_trim(NULL, "gpadc_gain", &trim, 1);
if (trim.adcGainCoeffEn) {
if (trim.adcGainCoeffParity == EF_Ctrl_Get_Trim_Parity(trim.adcGainCoeff, 12)) {
tmp = trim.adcGainCoeff;
if (trim.en) {
if (trim.parity == bflb_ef_ctrl_get_trim_parity(trim.value, trim.len)) {
tmp = trim.value;
if (tmp & 0x800) {
tmp = ~tmp;
@ -30,12 +32,13 @@ float bflb_efuse_get_adc_trim(void)
uint32_t bflb_efuse_get_adc_tsen_trim(void)
{
Efuse_TSEN_Refcode_Corner_Type trim;
bflb_ef_ctrl_com_trim_type trim;
EF_Ctrl_Read_TSEN_Trim(&trim);
if (trim.tsenRefcodeCornerEn) {
if (trim.tsenRefcodeCornerParity == EF_Ctrl_Get_Trim_Parity(trim.tsenRefcodeCorner, 12)) {
return trim.tsenRefcodeCorner;
//EF_Ctrl_Read_TSEN_Trim(&trim);
bflb_ef_ctrl_read_common_trim(NULL, "tsen", &trim, 1);
if (trim.en) {
if (trim.parity == bflb_ef_ctrl_get_trim_parity(trim.value, trim.len)) {
return trim.value;
}
}
@ -44,10 +47,56 @@ uint32_t bflb_efuse_get_adc_tsen_trim(void)
void bflb_efuse_write_aes_key(uint8_t index, uint8_t *data, uint32_t len)
{
EF_Ctrl_Write_AES_Key(index, (uint32_t *)data, len, 1);
if ((index <= 3) || (index == 11)) {
index = ((index == 11) ? 5 : index);
/* Every key is 4 words len*/
bflb_ef_ctrl_write_direct(NULL, 0x1C + index * 4, (uint32_t *)data, len, 1);
} else if ((index < 11) && (index > 3)) {
index = index - 4;
/* Every key is 4 words len*/
bflb_ef_ctrl_write_direct(NULL, 0x80 + index * 4, (uint32_t *)data, len, 1);
}
}
void bflb_efuse_lock_aes_key_write(uint8_t index)
{
uint32_t lock = 0;
if ((index <= 3) || (index == 11)) {
index = ((index == 11) ? 8 : index);
lock |= (1 << (index + 17));
bflb_ef_ctrl_write_direct(NULL, 0x7c, (uint32_t *)lock, 1, 1);
} else if ((index < 11) && (index > 3)) {
index = index - 4;
lock |= (1 << (index + 15));
bflb_ef_ctrl_write_direct(NULL, 0xfc, (uint32_t *)lock, 1, 1);
}
}
void bflb_efuse_lock_aes_key_read(uint8_t index)
{
uint32_t lock = 0;
if ((index <= 3) || (index == 11)) {
index = ((index == 11) ? 4 : index);
lock |= (1 << (index + 27));
bflb_ef_ctrl_write_direct(NULL, 0x7c, (uint32_t *)lock, 1, 1);
} else if ((index < 11) && (index > 3)) {
index = index - 4;
lock |= (1 << (index + 25));
bflb_ef_ctrl_write_direct(NULL, 0xfc, (uint32_t *)lock, 1, 1);
}
}
void bflb_efuse_read_aes_key(uint8_t index, uint8_t *data, uint32_t len)
{
EF_Ctrl_Read_AES_Key(index, (uint32_t *)data, len);
if ((index <= 3) || (index == 11)) {
index = ((index == 11) ? 5 : index);
/* Every key is 4 words len*/
bflb_ef_ctrl_read_direct(NULL, 0x1C + index * 4, (uint32_t *)data, len, 1);
} else if ((index < 11) && (index > 3)) {
index = index - 4;
/* Every key is 4 words len*/
bflb_ef_ctrl_read_direct(NULL, 0x80 + index * 4, (uint32_t *)data, len, 1);
}
}

2
drivers/soc/bl702/CMakeLists.txt
View File

@ -13,7 +13,7 @@ endif()
sdk_library_add_sources(bl702_std/src/bl702_aon.c)
sdk_library_add_sources(bl702_std/src/bl702_common.c)
sdk_library_add_sources(bl702_std/src/bl702_clock.c)
sdk_library_add_sources(bl702_std/src/bl702_ef_ctrl.c)
sdk_library_add_sources(bl702_std/src/bl702_ef_cfg.c)
sdk_library_add_sources(bl702_std/src/bl702_glb.c)
sdk_library_add_sources(bl702_std/src/bl702_hbn.c)
sdk_library_add_sources(bl702_std/src/bl702_l1c.c)

1
drivers/soc/bl702/bl702_std/include/bl702_aon.h
View File

@ -40,7 +40,6 @@
#include "glb_reg.h"
#include "hbn_reg.h"
#include "pds_reg.h"
#include "bl702_ef_ctrl.h"
#include "bl702_common.h"
/** @addtogroup BL702_Peripheral_Driver

94
drivers/soc/bl702/bl702_std/include/bl702_ef_cfg.h Normal file
View File

@ -0,0 +1,94 @@
/**
******************************************************************************
* @file bl702_ef_cfg.h
* @version V1.0
* @date
* @brief This file is the standard driver header file
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
#ifndef __BL702_EF_CFG_H__
#define __BL702_EF_CFG_H__
#include "bflb_ef_ctrl.h"
#include "bl702_common.h"
/** @addtogroup BL702_Peripheral_Driver
* @{
*/
/** @addtogroup EF_CTRL
* @{
*/
/** @defgroup EF_CTRL_Public_Types
* @{
*/
/**
* @brief Efuse analog device info type definition
*/
typedef struct
{
uint32_t rsvd_21_0 : 22; /*!< Reserved */
uint32_t sf_swap_cfg : 2; /*!< 0:swap none, 1:swap SF2_CS & SF2_IO2, 2:swap SF2_IO0 & SF2_IO3, 3:swap both */
uint32_t psram_cfg : 2; /*!< 0:no psram, 1:2MB psram, 2:external psram, 3:reserved */
uint32_t flash_cfg : 3; /*!< 0:external flash SF2, 1:0.5MB flash, 2:1MB flash, 3:external flash SF1 */
uint32_t rsvd_29 : 1; /*!< Reserved */
uint32_t pkg_info : 2; /*!< 0:QFN32, 1:QFN40, 2:QFN48, 3:reserved */
} bflb_efuse_device_info_type;
/*@} end of group EF_CTRL_Public_Types */
/** @defgroup EF_CTRL_Public_Constants
* @{
*/
/*@} end of group EF_CTRL_Public_Constants */
/** @defgroup EF_CTRL_Public_Macros
* @{
*/
/*@} end of group EF_CTRL_Public_Macros */
/** @defgroup EF_CTRL_Public_Functions
* @{
*/
void bflb_efuse_switch_cpu_clock_save(void);
void bflb_efuse_switch_cpu_clock_restore(void);
void bflb_ef_ctrl_get_device_info(bflb_efuse_device_info_type *deviceInfo);
uint32_t bflb_ef_ctrl_get_common_trim_list(const bflb_ef_ctrl_com_trim_cfg **trim_list);
/*@} end of group EF_CTRL_Public_Functions */
/*@} end of group EF_CTRL */
/*@} end of group BL702_Peripheral_Driver */
#endif /* __BL702_EF_CFG_H__ */

237
drivers/soc/bl702/bl702_std/src/bl702_ef_cfg.c Normal file
View File

@ -0,0 +1,237 @@
/**
******************************************************************************
* @file bl702_ef_ctrl.c
* @version V1.0
* @date
* @brief This file is the standard driver c file
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2020 Bouffalo Lab</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of Bouffalo Lab nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
#include "string.h"
#include "bflb_ef_ctrl.h"
#include "bl702_ef_cfg.h"
#include "bl702_glb.h"
/** @addtogroup BL702_Peripheral_Driver
* @{
*/
/** @addtogroup SEC_EF_CTRL
* @{
*/
/** @defgroup SEC_EF_CTRL_Private_Macros
* @{
*/
/*@} end of group SEC_EF_CTRL_Private_Macros */
/** @defgroup SEC_EF_CTRL_Private_Types
* @{
*/
/*@} end of group SEC_EF_CTRL_Private_Types */
/** @defgroup SEC_EF_CTRL_Private_Variables
* @{
*/
static const bflb_ef_ctrl_com_trim_cfg trim_list[] = {
{
.name = "rc32m",
.en_addr = 0x78 * 8 + 1,
.parity_addr = 0x78 * 8 + 0,
.value_addr = 0x7C * 8 + 4,
.value_len = 8,
},
{
.name = "rc32k",
.en_addr = 0xEC * 8 + 19,
.parity_addr = 0xEC * 8 + 18,
.value_addr = 0xEC * 8 + 8,
.value_len = 10,
},
{
.name = "gpadc_gain",
.en_addr = 0xF0 * 8 + 27,
.parity_addr = 0xF0 * 8 + 26,
.value_addr = 0xF0 * 8 + 14,
.value_len = 12,
},
{
.name = "tsen",
.en_addr = 0xF0 * 8 + 13,
.parity_addr = 0xF0 * 8 + 12,
.value_addr = 0xF0 * 8 + 0,
.value_len = 12,
}
};
#define EF_CTRL_DEVICE_INFO_OFFSET 0x74
/* 0x14 : ef_wifi_mac_low */
#define EF_DATA_EF_WIFI_MAC_LOW_OFFSET (0x14)
/* 0x18 : ef_wifi_mac_high */
#define EF_DATA_EF_WIFI_MAC_HIGH_OFFSET (0x18)
/* 0x1C : ef_key_slot_0_w0 */
#define EF_DATA_EF_KEY_SLOT_0_W0_OFFSET (0x1C)
/* 0x20 : ef_key_slot_0_w1 */
#define EF_DATA_EF_KEY_SLOT_0_W1_OFFSET (0x20)
/* 0x24 : ef_key_slot_0_w2 */
#define EF_DATA_EF_KEY_SLOT_0_W2_OFFSET (0x24)
/* 0x28 : ef_key_slot_0_w3 */
#define EF_DATA_EF_KEY_SLOT_0_W3_OFFSET (0x28)
/* 0x2C : ef_key_slot_1_w0 */
#define EF_DATA_EF_KEY_SLOT_1_W0_OFFSET (0x2C)
/* 0x30 : ef_key_slot_1_w1 */
#define EF_DATA_EF_KEY_SLOT_1_W1_OFFSET (0x30)
/* 0x34 : ef_key_slot_1_w2 */
#define EF_DATA_EF_KEY_SLOT_1_W2_OFFSET (0x34)
/* 0x38 : ef_key_slot_1_w3 */
#define EF_DATA_EF_KEY_SLOT_1_W3_OFFSET (0x38)
/* 0x3C : ef_key_slot_2_w0 */
#define EF_DATA_EF_KEY_SLOT_2_W0_OFFSET (0x3C)
/* 0x40 : ef_key_slot_2_w1 */
#define EF_DATA_EF_KEY_SLOT_2_W1_OFFSET (0x40)
/* 0x44 : ef_key_slot_2_w2 */
#define EF_DATA_EF_KEY_SLOT_2_W2_OFFSET (0x44)
/* 0x48 : ef_key_slot_2_w3 */
#define EF_DATA_EF_KEY_SLOT_2_W3_OFFSET (0x48)
/* 0x4C : ef_key_slot_3_w0 */
#define EF_DATA_EF_KEY_SLOT_3_W0_OFFSET (0x4C)
/* 0x50 : ef_key_slot_3_w1 */
#define EF_DATA_EF_KEY_SLOT_3_W1_OFFSET (0x50)
/* 0x54 : ef_key_slot_3_w2 */
#define EF_DATA_EF_KEY_SLOT_3_W2_OFFSET (0x54)
/* 0x58 : ef_key_slot_3_w3 */
#define EF_DATA_EF_KEY_SLOT_3_W3_OFFSET (0x58)
/* 0x5C : ef_key_slot_4_w0 */
#define EF_DATA_EF_KEY_SLOT_4_W0_OFFSET (0x5C)
/* 0x60 : ef_key_slot_4_w1 */
#define EF_DATA_EF_KEY_SLOT_4_W1_OFFSET (0x60)
/* 0x64 : ef_key_slot_4_w2 */
#define EF_DATA_EF_KEY_SLOT_4_W2_OFFSET (0x64)
/* 0x68 : ef_key_slot_4_w3 */
#define EF_DATA_EF_KEY_SLOT_4_W3_OFFSET (0x68)
/* 0x6C : ef_key_slot_5_w0 */
#define EF_DATA_EF_KEY_SLOT_5_W0_OFFSET (0x6C)
/* 0x70 : ef_key_slot_5_w1 */
#define EF_DATA_EF_KEY_SLOT_5_W1_OFFSET (0x70)
/* 0x74 : ef_key_slot_5_w2 */
#define EF_DATA_EF_KEY_SLOT_5_W2_OFFSET (0x74)
/* 0x78 : ef_key_slot_5_w3 */
#define EF_DATA_EF_KEY_SLOT_5_W3_OFFSET (0x78)
static GLB_ROOT_CLK_Type rtClk;
static uint8_t bdiv, hdiv;
/*@} end of group SEC_EF_CTRL_Private_Variables */
/** @defgroup SEC_EF_CTRL_Global_Variables
* @{
*/
/*@} end of group SEC_EF_CTRL_Global_Variables */
/** @defgroup SEC_EF_CTRL_Private_Fun_Declaration
* @{
*/
/*@} end of group SEC_EF_CTRL_Private_Fun_Declaration */
/** @defgroup SEC_EF_CTRL_Private_Functions
* @{
*/
/****************************************************************************/ /**
* @brief Efuse read write switch clock save
*
* @param deviceInfo: info pointer
*
* @return None
*
*******************************************************************************/
void ATTR_TCM_SECTION bflb_efuse_switch_cpu_clock_save(void)
{
/* all API should be place at tcm section */
bdiv = GLB_Get_BCLK_Div();
hdiv = GLB_Get_HCLK_Div();
rtClk = GLB_Get_Root_CLK_Sel();
HBN_Set_ROOT_CLK_Sel(HBN_ROOT_CLK_RC32M);
GLB_Set_System_CLK_Div(0, 0);
}
/****************************************************************************/ /**
* @brief Efuse read write switch clock restore
*
* @param deviceInfo: info pointer
*
* @return None
*
*******************************************************************************/
void ATTR_TCM_SECTION bflb_efuse_switch_cpu_clock_restore(void)
{
/* all API should be place at tcm section */
GLB_Set_System_CLK_Div(hdiv, bdiv);
HBN_Set_ROOT_CLK_Sel(rtClk);
}
/****************************************************************************/ /**
* @brief Efuse read device info
*
* @param deviceInfo: info pointer
*
* @return None
*
*******************************************************************************/
void bflb_ef_ctrl_get_device_info(bflb_efuse_device_info_type *deviceInfo)
{
uint32_t *p = (uint32_t *)deviceInfo;
bflb_ef_ctrl_read_direct(NULL, EF_CTRL_DEVICE_INFO_OFFSET, p, 1, 1);
}
/****************************************************************************/ /**
* @brief Efuse get trim list
*
* @param trim_list: Trim list pointer
*
* @return Trim list count
*
*******************************************************************************/
uint32_t bflb_ef_ctrl_get_common_trim_list(const bflb_ef_ctrl_com_trim_cfg **ptrim_list)
{
*ptrim_list = &trim_list[0];
return sizeof(trim_list) / sizeof(trim_list[0]);
}
/*@} end of group SEC_EF_CTRL_Public_Functions */
/*@} end of group SEC_EF_CTRL */
/*@} end of group BL702_Peripheral_Driver */

64
drivers/soc/bl702/bl702_std/src/bl702_romapi.c
View File

@ -53,44 +53,44 @@ __ALWAYS_INLINE ATTR_TCM_SECTION void BL702_Delay_MS(uint32_t cnt)
RomDriver_BL702_Delay_MS(cnt);
}
// __ALWAYS_INLINE ATTR_TCM_SECTION void *BL702_MemCpy(void *dst, const void *src, uint32_t n)
// {
// return RomDriver_BL702_MemCpy(dst, src, n);
// }
__ALWAYS_INLINE ATTR_TCM_SECTION void *BL702_MemCpy(void *dst, const void *src, uint32_t n)
{
return RomDriver_BL702_MemCpy(dst, src, n);
}
// __ALWAYS_INLINE ATTR_TCM_SECTION
// uint32_t *
// BL702_MemCpy4(uint32_t *dst, const uint32_t *src, uint32_t n)
// {
// return RomDriver_BL702_MemCpy4(dst, src, n);
// }
__ALWAYS_INLINE ATTR_TCM_SECTION
uint32_t *
BL702_MemCpy4(uint32_t *dst, const uint32_t *src, uint32_t n)
{
return RomDriver_BL702_MemCpy4(dst, src, n);
}
// __ALWAYS_INLINE ATTR_TCM_SECTION
// void* BL702_MemCpy_Fast(void *pdst, const void *psrc, uint32_t n) {
// return RomDriver_BL702_MemCpy_Fast(pdst, psrc, n);
// }
__ALWAYS_INLINE ATTR_TCM_SECTION
void* BL702_MemCpy_Fast(void *pdst, const void *psrc, uint32_t n) {
return RomDriver_BL702_MemCpy_Fast(pdst, psrc, n);
}
// __ALWAYS_INLINE ATTR_TCM_SECTION void *ARCH_MemCpy_Fast(void *pdst, const void *psrc, uint32_t n)
// {
// return RomDriver_ARCH_MemCpy_Fast(pdst, psrc, n);
// }
__ALWAYS_INLINE ATTR_TCM_SECTION void *ARCH_MemCpy_Fast(void *pdst, const void *psrc, uint32_t n)
{
return RomDriver_ARCH_MemCpy_Fast(pdst, psrc, n);
}
// __ALWAYS_INLINE ATTR_TCM_SECTION void *BL702_MemSet(void *s, uint8_t c, uint32_t n)
// {
// return RomDriver_BL702_MemSet(s, c, n);
// }
__ALWAYS_INLINE ATTR_TCM_SECTION void *BL702_MemSet(void *s, uint8_t c, uint32_t n)
{
return RomDriver_BL702_MemSet(s, c, n);
}
// __ALWAYS_INLINE ATTR_TCM_SECTION
// uint32_t *
// BL702_MemSet4(uint32_t *dst, const uint32_t val, uint32_t n)
// {
// return RomDriver_BL702_MemSet4(dst, val, n);
// }
__ALWAYS_INLINE ATTR_TCM_SECTION
uint32_t *
BL702_MemSet4(uint32_t *dst, const uint32_t val, uint32_t n)
{
return RomDriver_BL702_MemSet4(dst, val, n);
}
// __ALWAYS_INLINE ATTR_TCM_SECTION int BL702_MemCmp(const void *s1, const void *s2, uint32_t n)
// {
// return RomDriver_BL702_MemCmp(s1, s2, n);
// }
__ALWAYS_INLINE ATTR_TCM_SECTION int BL702_MemCmp(const void *s1, const void *s2, uint32_t n)
{
return RomDriver_BL702_MemCmp(s1, s2, n);
}
__ALWAYS_INLINE ATTR_TCM_SECTION
uint32_t

59
drivers/soc/bl702/port/bl702_efuse.c
View File

@ -1,19 +1,18 @@
#include "bflb_efuse.h"
#include "bl702_ef_ctrl.h"
#include "bflb_ef_ctrl.h"
#include "bl702_ef_cfg.h"
float bflb_efuse_get_adc_trim(void)
{
Efuse_ADC_Gain_Coeff_Type trim;
bflb_ef_ctrl_com_trim_type trim;
uint32_t tmp;
float coe = 1.0;
EF_Ctrl_Read_ADC_Gain_Trim(&trim);
if (trim.adcGainCoeffEn) {
if (trim.adcGainCoeffParity == EF_Ctrl_Get_Trim_Parity(trim.adcGainCoeff, 12)) {
tmp = trim.adcGainCoeff;
bflb_ef_ctrl_read_common_trim(NULL, "gpadc_gain", &trim, 1);
if (trim.en) {
if (trim.parity == bflb_ef_ctrl_get_trim_parity(trim.value, trim.len)) {
tmp = trim.value;
if (tmp & 0x800) {
tmp = ~tmp;
tmp += 1;
@ -30,12 +29,12 @@ float bflb_efuse_get_adc_trim(void)
uint32_t bflb_efuse_get_adc_tsen_trim(void)
{
Efuse_TSEN_Refcode_Corner_Type trim;
bflb_ef_ctrl_com_trim_type trim;
EF_Ctrl_Read_TSEN_Trim(&trim);
if (trim.tsenRefcodeCornerEn) {
if (trim.tsenRefcodeCornerParity == EF_Ctrl_Get_Trim_Parity(trim.tsenRefcodeCorner, 12)) {
return trim.tsenRefcodeCorner;
bflb_ef_ctrl_read_common_trim(NULL,"tsen", &trim,1);
if (trim.en) {
if (trim.parity == bflb_ef_ctrl_get_trim_parity(trim.value, trim.len)) {
return trim.value;
}
}
@ -44,10 +43,40 @@ uint32_t bflb_efuse_get_adc_tsen_trim(void)
void bflb_efuse_write_aes_key(uint8_t index, uint8_t *data, uint32_t len)
{
EF_Ctrl_Write_AES_Key(index, (uint32_t *)data, len, 1);
bflb_ef_ctrl_write_direct(NULL, 0x1C + index * 4, (uint32_t *)data, len, 1);
}
void bflb_efuse_lock_aes_key_write(uint8_t index)
{
uint32_t lock = 0;
if (index > 5) {
return;
}
/* write lock */
if (index <= 3) {
lock |= (1 << (index + 19));
} else {
lock |= (1 << (index + 19));
lock |= (1 << (index - 4 + 13));
}
bflb_ef_ctrl_write_direct(NULL, 0x7c, (uint32_t *)lock, 1, 1);
}
void bflb_efuse_lock_aes_key_read(uint8_t index)
{
uint32_t lock = 0;
if (index > 5) {
return;
}
/* read lock */
lock |= (1 << (index + 26));
bflb_ef_ctrl_write_direct(NULL, 0x7c, (uint32_t *)lock, 1, 1);
}
void bflb_efuse_read_aes_key(uint8_t index, uint8_t *data, uint32_t len)
{
EF_Ctrl_Read_AES_Key(index, (uint32_t *)data, len);
bflb_ef_ctrl_read_direct(NULL, 0x1C + index * 4, (uint32_t *)data, len, 1);
}

1
drivers/soc/bl808/CMakeLists.txt
View File

@ -10,7 +10,6 @@ sdk_library_add_sources(startup/${CPU_ID}/interrupt.c)
sdk_library_add_sources(bl808_std/src/bl808_aon.c)
sdk_library_add_sources(bl808_std/src/bl808_clock.c)
sdk_library_add_sources(bl808_std/src/bl808_common.c)
sdk_library_add_sources(bl808_std/src/bl808_ef_ctrl.c)
sdk_library_add_sources(bl808_std/src/bl808_ef_cfg.c)
sdk_library_add_sources(bl808_std/src/bl808_glb.c)
sdk_library_add_sources(bl808_std/src/bl808_hbn.c)

152
drivers/soc/bl808/bl808_std/include/bl808_ef_cfg.h
View File

@ -60,139 +60,7 @@ typedef struct
uint8_t memoryInfo; /*!< Efuse memory info 0:no memory, 8:1MB flash */
uint8_t psramInfo; /*!< Efuse psram info 0:no psram, 1:WB 4MB, 2:UHS 32MB, 3:UHS 64MB, 4:WB 32MB */
uint8_t deviceInfo; /*!< Efuse device information */
} Efuse_Chip_Info_Type;
/**
* @brief Efuse analog ldo15rf vout sel aon type definition
*/
typedef struct
{
uint32_t trimLDO15RFVoutAon : 3; /*!< Efuse analog trim:ldo15rf_vout_sel_aon */
uint32_t trimLDO15RFVoutAonParity : 1; /*!< Efuse analog trim:ldo15rf_vout_sel_aon_parity */
uint32_t trimLDO15RFVoutAonEn : 1; /*!< Efuse analog trim:ldo15rf_vout_sel_aon_en */
uint32_t reserved : 27; /*!< Efuse analog trim:reserved */
} Efuse_Ana_LDO15RF_Vout_Sel_Type;
/**
* @brief Efuse analog rcal iptat code type definition
*/
typedef struct
{
uint32_t trimRcalIptatCode : 5; /*!< Efuse analog trim:rcal_iptat_code */
uint32_t trimRcalIptatCodeParity : 1; /*!< Efuse analog trim:rcal_iptat_code_parity */
uint32_t trimRcalIptatCodeEn : 1; /*!< Efuse analog trim:rcal_iptat_code_en */
uint32_t reserved : 25; /*!< Efuse analog trim:reserved */
} Efuse_Ana_Rcal_Iptat_Code_Type;
/**
* @brief Efuse analog rcal icx code type definition
*/
typedef struct
{
uint32_t trimRcalIcxCode : 6; /*!< Efuse analog trim:rcal_icx_code */
uint32_t trimRcalIcxCodeParity : 1; /*!< Efuse analog trim:rcal_icx_code_parity */
uint32_t trimRcalIcxCodeEn : 1; /*!< Efuse analog trim:rcal_icx_code_en */
uint32_t reserved : 24; /*!< Efuse analog trim:reserved */
} Efuse_Ana_Rcal_Icx_Code_Type;
/**
* @brief Efuse analog LDO28CIS vout trim type definition
*/
typedef struct
{
uint32_t trimLDO28CISVout : 4; /*!< Efuse analog trim:ldo28cis_vout_trim */
uint32_t trimLDO28CISVoutParity : 1; /*!< Efuse analog trim:ldo28cis_vout_trim_parity */
uint32_t trimLDO28CISVoutEn : 1; /*!< Efuse analog trim:ldo28cis_vout_trim_en */
uint32_t reserved : 26; /*!< Efuse analog trim:reserved */
} Efuse_Ana_LDO28CIS_Vout_Trim_Type;
/**
* @brief Efuse analog LDO15CIS vout trim type definition
*/
typedef struct
{
uint32_t trimLDO15CISVout : 4; /*!< Efuse analog trim:ldo15cis_vout_trim */
uint32_t trimLDO15CISVoutParity : 1; /*!< Efuse analog trim:ldo15cis_vout_trim_parity */
uint32_t trimLDO15CISVoutEn : 1; /*!< Efuse analog trim:ldo15cis_vout_trim_en */
uint32_t reserved : 26; /*!< Efuse analog trim:reserved */
} Efuse_Ana_LDO15CIS_Vout_Trim_Type;
/**
* @brief Efuse analog LDO12UHS vout trim type definition
*/
typedef struct
{
uint32_t trimLDO12UHSVout : 4; /*!< Efuse analog trim:ldo12uhs_vout_trim */
uint32_t trimLDO12UHSVoutParity : 1; /*!< Efuse analog trim:ldo12uhs_vout_trim_parity */
uint32_t trimLDO12UHSVoutEn : 1; /*!< Efuse analog trim:ldo12uhs_vout_trim_en */
uint32_t reserved : 26; /*!< Efuse analog trim:reserved */
} Efuse_Ana_LDO12UHS_Vout_Trim_Type;
/**
* @brief Efuse analog xtal capcode 1 inout type definition
*/
typedef struct
{
uint32_t trimXtalCapcode1 : 6; /*!< Efuse analog trim:ctal_capcode_1_inout */
uint32_t trimXtalCapcode1Parity : 1; /*!< Efuse analog trim:ctal_capcode_1_inout_parity */
uint32_t trimXtalCapcode1En : 1; /*!< Efuse analog trim:ctal_capcode_1_inout_en */
uint32_t reserved : 24; /*!< Efuse analog trim:reserved */
} Efuse_Ana_Xtal_Capcode_1_Type;
/**
* @brief Efuse analog xtal capcode 2 inout type definition
*/
typedef struct
{
uint32_t trimXtalCapcode2 : 6; /*!< Efuse analog trim:ctal_capcode_2_inout */
uint32_t trimXtalCapcode2Parity : 1; /*!< Efuse analog trim:ctal_capcode_2_inout_parity */
uint32_t trimXtalCapcode2En : 1; /*!< Efuse analog trim:ctal_capcode_2_inout_en */
uint32_t reserved : 24; /*!< Efuse analog trim:reserved */
} Efuse_Ana_Xtal_Capcode_2_Type;
/**
* @brief Efuse analog xtal capcode 3 inout type definition
*/
typedef struct
{
uint32_t trimXtalCapcode3 : 6; /*!< Efuse analog trim:ctal_capcode_3_inout */
uint32_t trimXtalCapcode3Parity : 1; /*!< Efuse analog trim:ctal_capcode_3_inout_parity */
uint32_t trimXtalCapcode3En : 1; /*!< Efuse analog trim:ctal_capcode_3_inout_en */
uint32_t reserved : 24; /*!< Efuse analog trim:reserved */
} Efuse_Ana_Xtal_Capcode_3_Type;
/**
* @brief Efuse analog gauge vpack offset type definition
*/
typedef struct
{
uint32_t trimGaugeVpackOffset : 16; /*!< Efuse analog trim:gauge_vpack_offset */
uint32_t trimGaugeVpackOffsetParity : 1; /*!< Efuse analog trim:gauge_vpack_offset_parity */
uint32_t trimGaugeVpackOffsetEn : 1; /*!< Efuse analog trim:gauge_vpack_offset_en */
uint32_t reserved : 14; /*!< Efuse analog trim:reserved */
} Efuse_Ana_Gauge_Vpack_Offset_Type;
/**
* @brief Efuse analog gauge vtemp offset type definition
*/
typedef struct
{
uint32_t trimGaugeVtempOffset : 16; /*!< Efuse analog trim:gauge_vtemp_offset */
uint32_t trimGaugeVtempOffsetParity : 1; /*!< Efuse analog trim:gauge_vtemp_offset_parity */
uint32_t trimGaugeVtempOffsetEn : 1; /*!< Efuse analog trim:gauge_vtemp_offset_en */
uint32_t reserved : 14; /*!< Efuse analog trim:reserved */
} Efuse_Ana_Gauge_Vtemp_Offset_Type;
/**
* @brief Efuse psram trim type definition
*/
typedef struct
{
uint32_t psramTrim : 11; /*!< Efuse analog trim:psram trim date */
uint32_t psramTrimParity : 1; /*!< Efuse analog trim:psram trim_parity */
uint32_t psramTrimEn : 1; /*!< Efuse analog trim:psram trim_en */
uint32_t reserved : 19; /*!< Efuse analog trim:reserved */
} Efuse_Psram_Trim_Type;
} bflb_efuse_device_info_type;
/*@} end of group EF_CTRL_Public_Types */
@ -211,23 +79,7 @@ typedef struct
/** @defgroup EF_CTRL_Public_Functions
* @{
*/
void EF_Ctrl_Get_Chip_Info(Efuse_Chip_Info_Type *chipInfo);
void EF_Ctrl_Read_LDO15RF_Vout_Sel(Efuse_Ana_LDO15RF_Vout_Sel_Type *trim);
void EF_Ctrl_Read_Rcal_Iptat_Code(Efuse_Ana_Rcal_Iptat_Code_Type *trim);
void EF_Ctrl_Read_Rcal_Icx_Code(Efuse_Ana_Rcal_Icx_Code_Type *trim);
void EF_Ctrl_Read_LDO28CIS_Vout_Trim(Efuse_Ana_LDO28CIS_Vout_Trim_Type *trim);
void EF_Ctrl_Read_LDO15CIS_Vout_Trim(Efuse_Ana_LDO15CIS_Vout_Trim_Type *trim);
void EF_Ctrl_Read_LDO12UHS_Vout_Trim(Efuse_Ana_LDO12UHS_Vout_Trim_Type *trim);
void EF_Ctrl_Read_Xtal_Capcode1_Inout(Efuse_Ana_Xtal_Capcode_1_Type *trim);
void EF_Ctrl_Read_Xtal_Capcode2_Inout(Efuse_Ana_Xtal_Capcode_2_Type *trim);
void EF_Ctrl_Read_Xtal_Capcode3_Inout(Efuse_Ana_Xtal_Capcode_3_Type *trim);
void EF_Ctrl_Read_Gauge_Vpack_Offset(Efuse_Ana_Gauge_Vpack_Offset_Type *trim);
void EF_Ctrl_Read_Gauge_Vtemp_Offset(Efuse_Ana_Gauge_Vtemp_Offset_Type *trim);
void EF_Ctrl_Read_Psram_Trim(Efuse_Psram_Trim_Type *trim);
void EF_Ctrl_Write_Psram_Trim(Efuse_Psram_Trim_Type *trim, uint8_t program);
uint8_t EF_Ctrl_Is_MAC_Address_Slot_Empty(uint8_t slot, uint8_t reload);
BL_Err_Type EF_Ctrl_Write_MAC_Address_Opt(uint8_t slot, uint8_t mac[6], uint8_t program);
BL_Err_Type EF_Ctrl_Read_MAC_Address_Opt(uint8_t slot, uint8_t mac[6], uint8_t reload);
void bflb_ef_ctrl_get_device_info(bflb_efuse_device_info_type *deviceInfo);
/*@} end of group EF_CTRL_Public_Functions */

1
drivers/soc/bl808/bl808_std/include/bl808_glb.h
View File

@ -45,7 +45,6 @@
#include "bl808_sf_ctrl.h"
#include "bl808_sf_cfg.h"
#include "bl808_aon.h"
#include "bl808_ef_ctrl.h"
#include "bl808_pds.h"
#include "bl808_common.h"

1
drivers/soc/bl808/bl808_std/include/bl808_glb_gpio.h
View File

@ -44,7 +44,6 @@
#include "bl808_sf_ctrl.h"
#include "bl808_sf_cfg.h"
#include "bl808_aon.h"
#include "bl808_ef_ctrl.h"
#include "bl808_pds.h"
#include "bl808_common.h"

1
drivers/soc/bl808/bl808_std/include/bl808_pds.h
View File

@ -38,7 +38,6 @@
#include "pds_reg.h"
#include "glb_reg.h"
#include "bl808_ef_ctrl.h"
#include "bl808_clock.h"
#include "bl808_aon.h"
#include "bl808_hbn.h"

548
drivers/soc/bl808/bl808_std/src/bl808_ef_cfg.c
View File

@ -35,10 +35,8 @@
*/
#include "string.h"
#include "bl808_ef_ctrl.h"
#include "bflb_ef_ctrl.h"
#include "bl808_ef_cfg.h"
#include "ef_data_0_reg.h"
#include "ef_data_1_reg.h"
/** @addtogroup BL808_Peripheral_Driver
* @{
@ -51,8 +49,91 @@
/** @defgroup SEC_EF_CTRL_Private_Macros
* @{
*/
#define EF_CTRL_LOAD_BEFORE_READ_R0 EF_Ctrl_Load_Efuse_R0()
#define EF_CTRL_LOAD_BEFORE_READ_R1 EF_Ctrl_Load_Efuse_R1()
static const bflb_ef_ctrl_com_trim_cfg trim_list[] = {
{
.name = "rc32m",
.en_addr = 0x78 * 8 + 1,
.parity_addr = 0x78 * 8 + 0,
.value_addr = 0x7C * 8 + 4,
.value_len = 8,
},
{
.name = "rc32k",
.en_addr = 0xEC * 8 + 19,
.parity_addr = 0xEC * 8 + 18,
.value_addr = 0xEC * 8 + 8,
.value_len = 10,
},
{
.name = "gpadc_gain",
.en_addr = 0xF0 * 8 + 27,
.parity_addr = 0xF0 * 8 + 26,
.value_addr = 0xF0 * 8 + 14,
.value_len = 12,
},
{
.name = "tsen",
.en_addr = 0xF0 * 8 + 13,
.parity_addr = 0xF0 * 8 + 12,
.value_addr = 0xF0 * 8 + 0,
.value_len = 12,
}
};
#define EF_DATA_EF_CFG_0_OFFSET (0x0)
/* 0x14 : ef_wifi_mac_low */
#define EF_DATA_EF_WIFI_MAC_LOW_OFFSET (0x14)
/* 0x18 : ef_wifi_mac_high */
#define EF_DATA_EF_WIFI_MAC_HIGH_OFFSET (0x18)
/* 0x1C : ef_key_slot_0_w0 */
#define EF_DATA_EF_KEY_SLOT_0_W0_OFFSET (0x1C)
/* 0x20 : ef_key_slot_0_w1 */
#define EF_DATA_EF_KEY_SLOT_0_W1_OFFSET (0x20)
/* 0x24 : ef_key_slot_0_w2 */
#define EF_DATA_EF_KEY_SLOT_0_W2_OFFSET (0x24)
/* 0x28 : ef_key_slot_0_w3 */
#define EF_DATA_EF_KEY_SLOT_0_W3_OFFSET (0x28)
/* 0x2C : ef_key_slot_1_w0 */
#define EF_DATA_EF_KEY_SLOT_1_W0_OFFSET (0x2C)
/* 0x30 : ef_key_slot_1_w1 */
#define EF_DATA_EF_KEY_SLOT_1_W1_OFFSET (0x30)
/* 0x34 : ef_key_slot_1_w2 */
#define EF_DATA_EF_KEY_SLOT_1_W2_OFFSET (0x34)
/* 0x38 : ef_key_slot_1_w3 */
#define EF_DATA_EF_KEY_SLOT_1_W3_OFFSET (0x38)
/* 0x3C : ef_key_slot_2_w0 */
#define EF_DATA_EF_KEY_SLOT_2_W0_OFFSET (0x3C)
/* 0x40 : ef_key_slot_2_w1 */
#define EF_DATA_EF_KEY_SLOT_2_W1_OFFSET (0x40)
/* 0x44 : ef_key_slot_2_w2 */
#define EF_DATA_EF_KEY_SLOT_2_W2_OFFSET (0x44)
/* 0x48 : ef_key_slot_2_w3 */
#define EF_DATA_EF_KEY_SLOT_2_W3_OFFSET (0x48)
/* 0x4C : ef_key_slot_3_w0 */
#define EF_DATA_EF_KEY_SLOT_3_W0_OFFSET (0x4C)
/* 0x50 : ef_key_slot_3_w1 */
#define EF_DATA_EF_KEY_SLOT_3_W1_OFFSET (0x50)
/* 0x54 : ef_key_slot_3_w2 */
#define EF_DATA_EF_KEY_SLOT_3_W2_OFFSET (0x54)
/* 0x58 : ef_key_slot_3_w3 */
#define EF_DATA_EF_KEY_SLOT_3_W3_OFFSET (0x58)
/* 0x5C : ef_sw_usage_0 */
#define EF_DATA_EF_SW_USAGE_0_OFFSET (0x5C)
/* 0x60 : ef_sw_usage_1 */
#define EF_DATA_EF_SW_USAGE_1_OFFSET (0x60)
/* 0x64 : ef_sw_usage_2 */
#define EF_DATA_EF_SW_USAGE_2_OFFSET (0x64)
/* 0x68 : ef_sw_usage_3 */
#define EF_DATA_EF_SW_USAGE_3_OFFSET (0x68)
/* 0x6C : ef_key_slot_11_w0 */
#define EF_DATA_EF_KEY_SLOT_11_W0_OFFSET (0x6C)
/* 0x70 : ef_key_slot_11_w1 */
#define EF_DATA_EF_KEY_SLOT_11_W1_OFFSET (0x70)
/* 0x74 : ef_key_slot_11_w2 */
#define EF_DATA_EF_KEY_SLOT_11_W2_OFFSET (0x74)
/* 0x78 : ef_key_slot_11_w3 */
#define EF_DATA_EF_KEY_SLOT_11_W3_OFFSET (0x78)
/*@} end of group SEC_EF_CTRL_Private_Macros */
@ -85,338 +166,42 @@
*/
/****************************************************************************/ /**
* @brief Efuse get zero bit count
* @brief Efuse read device info
*
* @param val: Value to count
*
* @return Zero bit count
*
*******************************************************************************/
static uint32_t EF_Cfg_Get_Byte_Zero_Cnt(uint8_t val)
{
uint32_t cnt = 0;
uint32_t i = 0;
for (i = 0; i < 8; i++) {
if ((val & (1 << i)) == 0) {
cnt += 1;
}
}
return cnt;
}
/****************************************************************************/ /**
* @brief Efuse get chip info
*
* @param chipInfo: info pointer
* @param deviceInfo: info pointer
*
* @return None
*
*******************************************************************************/
void EF_Ctrl_Get_Chip_Info(Efuse_Chip_Info_Type *chipInfo)
void bflb_ef_ctrl_get_device_info(bflb_efuse_device_info_type *chipInfo)
{
uint32_t tmpVal;
uint32_t tmpval;
/* Trigger read data from efuse */
EF_CTRL_LOAD_BEFORE_READ_R0;
//tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_WIFI_MAC_HIGH);
bflb_ef_ctrl_read_direct(NULL, EF_DATA_EF_WIFI_MAC_HIGH_OFFSET, &tmpval, 1, 1);
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_WIFI_MAC_HIGH);
chipInfo->chipInfo = (tmpVal>>29)&0x7;
chipInfo->memoryInfo = (tmpVal>>27)&0x3;
chipInfo->psramInfo = (tmpVal>>25)&0x3;
chipInfo->deviceInfo = (tmpVal>>22)&0x7;
chipInfo->chipInfo = (tmpval >> 29) & 0x7;
chipInfo->memoryInfo = (tmpval >> 27) & 0x3;
chipInfo->psramInfo = (tmpval >> 25) & 0x3;
chipInfo->deviceInfo = (tmpval >> 22) & 0x7;
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_CFG_0);
chipInfo->psramInfo |= ((tmpVal>>20)&0x1) << 2;
bflb_ef_ctrl_read_direct(NULL, EF_DATA_EF_CFG_0_OFFSET, &tmpval, 1, 1);
chipInfo->psramInfo |= ((tmpval >> 20) & 0x1) << 2;
}
/****************************************************************************/ /**
* @brief Efuse read xtal trim rc32m configuration
* @brief Efuse get trim list
*
* @param trim: Trim data pointer
* @param trim_list: Trim list pointer
*
* @return None
* @return Trim list count
*
*******************************************************************************/
void EF_Ctrl_Read_LDO15RF_Vout_Sel(Efuse_Ana_LDO15RF_Vout_Sel_Type *trim)
uint32_t bflb_ef_ctrl_get_common_trim_list(const bflb_ef_ctrl_com_trim_cfg **ptrim_list)
{
uint32_t tmpVal;
/* Trigger read data from efuse */
EF_CTRL_LOAD_BEFORE_READ_R0;
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_SW_USAGE_3);
trim->trimLDO15RFVoutAon = (tmpVal >> 27) & 0x07;
trim->trimLDO15RFVoutAonParity = (tmpVal >> 30) & 0x01;
trim->trimLDO15RFVoutAonEn = (tmpVal >> 31) & 0x01;
}
/****************************************************************************/ /**
* @brief Efuse read rcal iptat code configuration
*
* @param trim: Trim data pointer
*
* @return None
*
*******************************************************************************/
void EF_Ctrl_Read_Rcal_Iptat_Code(Efuse_Ana_Rcal_Iptat_Code_Type *trim)
{
uint32_t tmpVal;
/* Trigger read data from efuse */
EF_CTRL_LOAD_BEFORE_READ_R0;
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_SW_USAGE_3);
trim->trimRcalIptatCode = (tmpVal >> 22) & 0x1f;
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_KEY_SLOT_11_W2);
trim->trimRcalIptatCodeParity = (tmpVal >> 30) & 0x01;
trim->trimRcalIptatCodeEn = (tmpVal >> 31) & 0x01;
}
/****************************************************************************/ /**
* @brief Efuse read rcal icx code configuration
*
* @param trim: Trim data pointer
*
* @return None
*
*******************************************************************************/
void EF_Ctrl_Read_Rcal_Icx_Code(Efuse_Ana_Rcal_Icx_Code_Type *trim)
{
uint32_t tmpVal;
/* Trigger read data from efuse */
EF_CTRL_LOAD_BEFORE_READ_R0;
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_KEY_SLOT_11_W2);
trim->trimRcalIcxCode = (tmpVal >> 22) & 0x3f;
trim->trimRcalIcxCodeParity = (tmpVal >> 28) & 0x01;
trim->trimRcalIcxCodeEn = (tmpVal >> 29) & 0x01;
}
/****************************************************************************/ /**
* @brief Efuse read LDO28CIS vout trim configuration
*
* @param trim: Trim data pointer
*
* @return None
*
*******************************************************************************/
void EF_Ctrl_Read_LDO28CIS_Vout_Trim(Efuse_Ana_LDO28CIS_Vout_Trim_Type *trim)
{
uint32_t tmpVal;
/* Trigger read data from efuse */
EF_CTRL_LOAD_BEFORE_READ_R0;
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_KEY_SLOT_11_W3);
trim->trimLDO28CISVout = (tmpVal >> 8) & 0xf;
trim->trimLDO28CISVoutParity = (tmpVal >> 12) & 0x01;
trim->trimLDO28CISVoutEn = (tmpVal >> 13) & 0x01;
}
/****************************************************************************/ /**
* @brief Efuse read LDO15CIS vout trim configuration
*
* @param trim: Trim data pointer
*
* @return None
*
*******************************************************************************/
void EF_Ctrl_Read_LDO15CIS_Vout_Trim(Efuse_Ana_LDO15CIS_Vout_Trim_Type *trim)
{
uint32_t tmpVal;
/* Trigger read data from efuse */
EF_CTRL_LOAD_BEFORE_READ_R0;
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_KEY_SLOT_11_W3);
trim->trimLDO15CISVout = (tmpVal >> 8) & 0xf;
trim->trimLDO15CISVoutParity = (tmpVal >> 12) & 0x01;
trim->trimLDO15CISVoutEn = (tmpVal >> 13) & 0x01;
}
/****************************************************************************/ /**
* @brief Efuse read LDO12UHS vout trim configuration
*
* @param trim: Trim data pointer
*
* @return None
*
*******************************************************************************/
void EF_Ctrl_Read_LDO12UHS_Vout_Trim(Efuse_Ana_LDO12UHS_Vout_Trim_Type *trim)
{
uint32_t tmpVal;
/* Trigger read data from efuse */
EF_CTRL_LOAD_BEFORE_READ_R1;
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_1_EF_KEY_SLOT_10_W3);
trim->trimLDO12UHSVout = (tmpVal >> 20) & 0xf;
trim->trimLDO12UHSVoutParity = (tmpVal >> 24) & 0x01;
trim->trimLDO12UHSVoutEn = (tmpVal >> 25) & 0x01;
}
/****************************************************************************/ /**
* @brief Efuse read xtal capcode 1 inout configuration
*
* @param trim: Trim data pointer
*
* @return None
*
*******************************************************************************/
void EF_Ctrl_Read_Xtal_Capcode1_Inout(Efuse_Ana_Xtal_Capcode_1_Type *trim)
{
uint32_t tmpVal;
/* Trigger read data from efuse */
EF_CTRL_LOAD_BEFORE_READ_R1;
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_1_EF_KEY_SLOT_10_W3);
trim->trimXtalCapcode1 = (tmpVal >> 0) & 0x3f;
trim->trimXtalCapcode1Parity = (tmpVal >> 6) & 0x01;
trim->trimXtalCapcode1En = (tmpVal >> 7) & 0x01;
}
/****************************************************************************/ /**
* @brief Efuse read xtal capcode 2 inout configuration
*
* @param trim: Trim data pointer
*
* @return None
*
*******************************************************************************/
void EF_Ctrl_Read_Xtal_Capcode2_Inout(Efuse_Ana_Xtal_Capcode_2_Type *trim)
{
uint32_t tmpVal;
/* Trigger read data from efuse */
EF_CTRL_LOAD_BEFORE_READ_R1;
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_1_EF_DAT_1_RSVD_1);
trim->trimXtalCapcode2 = (tmpVal >> 26) & 0x3f;
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_1_EF_DAT_1_RSVD_0);
trim->trimXtalCapcode2Parity = (tmpVal >> 30) & 0x01;
trim->trimXtalCapcode2En = (tmpVal >> 31) & 0x01;
}
/****************************************************************************/ /**
* @brief Efuse read xtal capcode 3 inout configuration
*
* @param trim: Trim data pointer
*
* @return None
*
*******************************************************************************/
void EF_Ctrl_Read_Xtal_Capcode3_Inout(Efuse_Ana_Xtal_Capcode_3_Type *trim)
{
uint32_t tmpVal;
/* Trigger read data from efuse */
EF_CTRL_LOAD_BEFORE_READ_R1;
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_1_EF_DAT_1_RSVD_1);
trim->trimXtalCapcode3 = (tmpVal >> 20) & 0x3f;
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_1_EF_DAT_1_RSVD_0);
trim->trimXtalCapcode3Parity = (tmpVal >> 28) & 0x01;
trim->trimXtalCapcode3En = (tmpVal >> 29) & 0x01;
}
/****************************************************************************/ /**
* @brief Efuse read gauge vpack offset configuration
*
* @param trim: Trim data pointer
*
* @return None
*
*******************************************************************************/
void EF_Ctrl_Read_Gauge_Vpack_Offset(Efuse_Ana_Gauge_Vpack_Offset_Type *trim)
{
uint32_t tmpVal;
/* Trigger read data from efuse */
EF_CTRL_LOAD_BEFORE_READ_R1;
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_1_EF_DAT_1_RSVD_1);
trim->trimGaugeVpackOffset = (tmpVal >> 2) & 0xffff;
trim->trimGaugeVpackOffsetParity = (tmpVal >> 18) & 0x01;
trim->trimGaugeVpackOffsetEn = (tmpVal >> 19) & 0x01;
}
/****************************************************************************/ /**
* @brief Efuse read gauge vtemp offset configuration
*
* @param trim: Trim data pointer
*
* @return None
*
*******************************************************************************/
void EF_Ctrl_Read_Gauge_Vtemp_Offset(Efuse_Ana_Gauge_Vtemp_Offset_Type *trim)
{
uint32_t tmpVal;
/* Trigger read data from efuse */
EF_CTRL_LOAD_BEFORE_READ_R1;
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_1_EF_DAT_1_RSVD_2);
trim->trimGaugeVtempOffset = (tmpVal >> 16) & 0xffff;
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_1_EF_DAT_1_RSVD_1);
trim->trimGaugeVtempOffsetParity = (tmpVal >> 0) & 0x01;
trim->trimGaugeVtempOffsetEn = (tmpVal >> 1) & 0x01;
}
/****************************************************************************/ /**
* @brief Efuse read psram trim configuration
*
* @param trim: Trim data pointer
*
* @return None
*
*******************************************************************************/
void EF_Ctrl_Read_Psram_Trim(Efuse_Psram_Trim_Type *trim)
{
uint32_t tmpVal;
/* Trigger read data from efuse */
EF_CTRL_LOAD_BEFORE_READ_R1;
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_1_EF_KEY_SLOT_10_W2);
trim->psramTrim = (tmpVal >> 0) & 0x7ff;
trim->psramTrimParity = (tmpVal >> 11) & 0x01;
trim->psramTrimEn = (tmpVal >> 12) & 0x01;
}
/****************************************************************************/ /**
* @brief Efuse write psram trim configuration
*
* @param trim: Trim data pointer
* @param program: program to efuse entity or not
*
* @return None
*
*******************************************************************************/
void EF_Ctrl_Write_Psram_Trim(Efuse_Psram_Trim_Type *trim, uint8_t program)
{
uint32_t tmpVal;
/* Switch to AHB clock */
EF_Ctrl_Sw_AHB_Clk_1();
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_1_EF_KEY_SLOT_10_W2);
tmpVal |= (trim->psramTrim<<0);
tmpVal |= (trim->psramTrimParity<<11);
tmpVal |= (trim->psramTrimEn<<12);
BL_WR_REG(EF_DATA_BASE, EF_DATA_1_EF_KEY_SLOT_10_W2, tmpVal);
if (program) {
EF_Ctrl_Program_Efuse_1();
}
*ptrim_list = &trim_list[0];
return sizeof(trim_list) / sizeof(trim_list[0]);
}
/****************************************************************************/ /**
@ -430,44 +215,24 @@ void EF_Ctrl_Write_Psram_Trim(Efuse_Psram_Trim_Type *trim, uint8_t program)
*******************************************************************************/
uint8_t EF_Ctrl_Is_MAC_Address_Slot_Empty(uint8_t slot, uint8_t reload)
{
uint32_t tmp1 = 0xffffffff, tmp2 = 0xffffffff;
uint32_t part1Empty = 0, part2Empty = 0;
#if 0
uint32_t tmp1 = 0xffffffff, tmp2 = 0xffffffff;
if (slot == 0) {
/* Switch to AHB clock */
EF_Ctrl_Sw_AHB_Clk_0();
if (reload) {
EF_CTRL_LOAD_BEFORE_READ_R0;
}
tmp1 = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_WIFI_MAC_LOW);
tmp2 = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_WIFI_MAC_HIGH);
bflb_ef_ctrl_read_direct(NULL,EF_DATA_EF_WIFI_MAC_LOW_OFFSET,&tmp1,1,reload);
bflb_ef_ctrl_read_direct(NULL,EF_DATA_EF_WIFI_MAC_HIGH_OFFSET,&tmp2,1,reload);
} else if (slot == 1) {
/* Switch to AHB clock */
EF_Ctrl_Sw_AHB_Clk_0();
if (reload) {
EF_CTRL_LOAD_BEFORE_READ_R0;
}
tmp1 = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_SW_USAGE_2);
tmp2 = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_SW_USAGE_3);
bflb_ef_ctrl_read_direct(NULL,EF_DATA_EF_SW_USAGE_2_OFFSET,&tmp1,1,reload);
bflb_ef_ctrl_read_direct(NULL,EF_DATA_EF_SW_USAGE_3_OFFSET,&tmp2,1,reload);
} else if (slot == 2) {
/* Switch to AHB clock */
EF_Ctrl_Sw_AHB_Clk_0();
if (reload) {
EF_CTRL_LOAD_BEFORE_READ_R0;
}
tmp1 = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_KEY_SLOT_11_W1);
tmp2 = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_KEY_SLOT_11_W2);
bflb_ef_ctrl_read_direct(NULL,EF_DATA_EF_KEY_SLOT_11_W1_OFFSET,&tmp1,1,reload);
bflb_ef_ctrl_read_direct(NULL,EF_DATA_EF_KEY_SLOT_11_W2_OFFSET,&tmp2,1,reload);
}
part1Empty = (EF_Ctrl_Is_All_Bits_Zero(tmp1, 0, 32));
part2Empty = (EF_Ctrl_Is_All_Bits_Zero(tmp2, 0, 22));
part1Empty = (bflb_ef_ctrl_is_all_bits_zero(tmp1, 0, 32));
part2Empty = (bflb_ef_ctrl_is_all_bits_zero(tmp2, 0, 22));
#endif
return (part1Empty && part2Empty);
}
@ -483,9 +248,10 @@ uint8_t EF_Ctrl_Is_MAC_Address_Slot_Empty(uint8_t slot, uint8_t reload)
*******************************************************************************/
BL_Err_Type EF_Ctrl_Write_MAC_Address_Opt(uint8_t slot, uint8_t mac[6], uint8_t program)
{
#if 0
uint8_t *maclow = (uint8_t *)mac;
uint8_t *machigh = (uint8_t *)(mac + 4);
uint32_t tmpVal;
uint32_t tmpval;
uint32_t i = 0, cnt;
if (slot >= 3) {
@ -494,45 +260,40 @@ BL_Err_Type EF_Ctrl_Write_MAC_Address_Opt(uint8_t slot, uint8_t mac[6], uint8_t
/* Change to local order */
for (i = 0; i < 3; i++) {
tmpVal = mac[i];
tmpval = mac[i];
mac[i] = mac[5 - i];
mac[5 - i] = tmpVal;
mac[5 - i] = tmpval;
}
/* Switch to AHB clock */
EF_Ctrl_Sw_AHB_Clk_0();
/* The low 32 bits */
tmpval=BL_RDWD_FRM_BYTEP(maclow);
if (slot == 0) {
BL_WR_REG(EF_DATA_BASE, EF_DATA_0_EF_WIFI_MAC_LOW, BL_RDWD_FRM_BYTEP(maclow));
bflb_ef_ctrl_write_direct(NULL,EF_DATA_EF_WIFI_MAC_LOW_OFFSET,&tmpval,1,program);
} else if (slot == 1) {
BL_WR_REG(EF_DATA_BASE, EF_DATA_0_EF_SW_USAGE_2, BL_RDWD_FRM_BYTEP(maclow));
bflb_ef_ctrl_write_direct(NULL,EF_DATA_EF_SW_USAGE_2_OFFSET,&tmpval,1,program);
} else if (slot == 2) {
BL_WR_REG(EF_DATA_BASE, EF_DATA_0_EF_KEY_SLOT_11_W1, BL_RDWD_FRM_BYTEP(maclow));
bflb_ef_ctrl_write_direct(NULL,EF_DATA_EF_KEY_SLOT_11_W1_OFFSET,&tmpval,1,program);
}
/* The high 16 bits */
tmpVal = machigh[0] + (machigh[1] << 8);
tmpval = machigh[0] + (machigh[1] << 8);
cnt = 0;
for (i = 0; i < 6; i++) {
cnt += EF_Cfg_Get_Byte_Zero_Cnt(mac[i]);
cnt += bflb_ef_ctrl_get_byte_zero_cnt(mac[i]);
}
tmpVal |= ((cnt & 0x3f) << 16);
tmpval |= ((cnt & 0x3f) << 16);
if (slot == 0) {
BL_WR_REG(EF_DATA_BASE, EF_DATA_0_EF_WIFI_MAC_HIGH, tmpVal);
bflb_ef_ctrl_write_direct(NULL,EF_DATA_EF_WIFI_MAC_HIGH_OFFSET,&tmpval,1,program);
} else if (slot == 1) {
BL_WR_REG(EF_DATA_BASE, EF_DATA_0_EF_SW_USAGE_3, tmpVal);
bflb_ef_ctrl_write_direct(NULL,EF_DATA_EF_SW_USAGE_3_OFFSET,&tmpval,1,program);
} else if (slot == 2) {
BL_WR_REG(EF_DATA_BASE, EF_DATA_0_EF_KEY_SLOT_11_W2, tmpVal);
bflb_ef_ctrl_write_direct(NULL,EF_DATA_EF_KEY_SLOT_11_W2_OFFSET,&tmpval,1,program);
}
if (program) {
EF_Ctrl_Program_Efuse_0();
}
#endif
return SUCCESS;
}
@ -548,9 +309,10 @@ BL_Err_Type EF_Ctrl_Write_MAC_Address_Opt(uint8_t slot, uint8_t mac[6], uint8_t
*******************************************************************************/
BL_Err_Type EF_Ctrl_Read_MAC_Address_Opt(uint8_t slot, uint8_t mac[6], uint8_t reload)
{
#if 0
uint8_t *maclow = (uint8_t *)mac;
uint8_t *machigh = (uint8_t *)(mac + 4);
uint32_t tmpVal = 0;
uint32_t tmpval = 0;
uint32_t i = 0;
uint32_t cnt = 0;
@ -558,49 +320,45 @@ BL_Err_Type EF_Ctrl_Read_MAC_Address_Opt(uint8_t slot, uint8_t mac[6], uint8_t r
return ERROR;
}
/* Trigger read data from efuse */
if (reload) {
EF_CTRL_LOAD_BEFORE_READ_R0;
if (slot == 0) {
bflb_ef_ctrl_read_direct(NULL,EF_DATA_EF_WIFI_MAC_LOW_OFFSET,&tmpval,1,reload);
} else if (slot == 1) {
bflb_ef_ctrl_read_direct(NULL,EF_DATA_EF_SW_USAGE_2_OFFSET,&tmpval,1,reload);
} else if (slot == 2) {
bflb_ef_ctrl_read_direct(NULL,EF_DATA_EF_KEY_SLOT_11_W1_OFFSET,&tmpval,1,reload);
}
BL_WRWD_TO_BYTEP(maclow, tmpval);
if (slot == 0) {
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_WIFI_MAC_LOW);
bflb_ef_ctrl_read_direct(NULL,EF_DATA_EF_WIFI_MAC_HIGH_OFFSET,&tmpval,1,reload);
} else if (slot == 1) {
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_SW_USAGE_2);
bflb_ef_ctrl_read_direct(NULL,EF_DATA_EF_SW_USAGE_3_OFFSET,&tmpval,1,reload);
} else if (slot == 2) {
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_KEY_SLOT_11_W1);
bflb_ef_ctrl_read_direct(NULL,EF_DATA_EF_KEY_SLOT_11_W2_OFFSET,&tmpval,1,reload);
}
BL_WRWD_TO_BYTEP(maclow, tmpVal);
if (slot == 0) {
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_WIFI_MAC_HIGH);
} else if (slot == 1) {
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_SW_USAGE_3);
} else if (slot == 2) {
tmpVal = BL_RD_REG(EF_DATA_BASE, EF_DATA_0_EF_KEY_SLOT_11_W2);
}
machigh[0] = tmpVal & 0xff;
machigh[1] = (tmpVal >> 8) & 0xff;
machigh[0] = tmpval & 0xff;
machigh[1] = (tmpval >> 8) & 0xff;
/* Check parity */
for (i = 0; i < 6; i++) {
cnt += EF_Cfg_Get_Byte_Zero_Cnt(mac[i]);
cnt += bflb_ef_ctrl_get_byte_zero_cnt(mac[i]);
}
if ((cnt & 0x3f) == ((tmpVal >> 16) & 0x3f)) {
if ((cnt & 0x3f) == ((tmpval >> 16) & 0x3f)) {
/* Change to network order */
for (i = 0; i < 3; i++) {
tmpVal = mac[i];
tmpval = mac[i];
mac[i] = mac[5 - i];
mac[5 - i] = tmpVal;
mac[5 - i] = tmpval;
}
return SUCCESS;
} else {
return ERROR;
}
#endif
return SUCCESS;
}
/*@} end of group SEC_EF_CTRL_Public_Functions */

77
drivers/soc/bl808/port/bl808_efuse.c
View File

@ -1,18 +1,18 @@
#include "bflb_efuse.h"
#include "bl808_ef_ctrl.h"
#include "bflb_ef_ctrl.h"
float bflb_efuse_get_adc_trim(void)
{
Efuse_ADC_Gain_Coeff_Type trim;
bflb_ef_ctrl_com_trim_type trim;
uint32_t tmp;
float coe = 1.0;
EF_Ctrl_Read_ADC_Gain_Trim(&trim);
//EF_Ctrl_Read_ADC_Gain_Trim(&trim);
bflb_ef_ctrl_read_common_trim(NULL, "gpadc_gain", &trim, 1);
if (trim.adcGainCoeffEn) {
if (trim.adcGainCoeffParity == EF_Ctrl_Get_Trim_Parity(trim.adcGainCoeff, 12)) {
tmp = trim.adcGainCoeff;
if (trim.en) {
if (trim.parity == bflb_ef_ctrl_get_trim_parity(trim.value, trim.len)) {
tmp = trim.value;
if (tmp & 0x800) {
tmp = ~tmp;
@ -30,12 +30,13 @@ float bflb_efuse_get_adc_trim(void)
uint32_t bflb_efuse_get_adc_tsen_trim(void)
{
Efuse_TSEN_Refcode_Corner_Type trim;
bflb_ef_ctrl_com_trim_type trim;
EF_Ctrl_Read_TSEN_Trim(&trim);
if (trim.tsenRefcodeCornerEn) {
if (trim.tsenRefcodeCornerParity == EF_Ctrl_Get_Trim_Parity(trim.tsenRefcodeCorner, 12)) {
return trim.tsenRefcodeCorner;
//EF_Ctrl_Read_TSEN_Trim(&trim);
bflb_ef_ctrl_read_common_trim(NULL, "tsen", &trim, 1);
if (trim.en) {
if (trim.parity == bflb_ef_ctrl_get_trim_parity(trim.value, trim.len)) {
return trim.value;
}
}
@ -44,10 +45,56 @@ uint32_t bflb_efuse_get_adc_tsen_trim(void)
void bflb_efuse_write_aes_key(uint8_t index, uint8_t *data, uint32_t len)
{
EF_Ctrl_Write_AES_Key(index, (uint32_t *)data, len, 1);
if ((index <= 3) || (index == 11)) {
index = ((index == 11) ? 5 : index);
/* Every key is 4 words len*/
bflb_ef_ctrl_write_direct(NULL, 0x1C + index * 4, (uint32_t *)data, len, 1);
} else if ((index < 11) && (index > 3)) {
index = index - 4;
/* Every key is 4 words len*/
bflb_ef_ctrl_write_direct(NULL, 0x80 + index * 4, (uint32_t *)data, len, 1);
}
}
void bflb_efuse_lock_aes_key_write(uint8_t index)
{
uint32_t lock = 0;
if ((index <= 3) || (index == 11)) {
index = ((index == 11) ? 8 : index);
lock |= (1 << (index + 17));
bflb_ef_ctrl_write_direct(NULL, 0x7c, (uint32_t *)lock, 1, 1);
} else if ((index < 11) && (index > 3)) {
index = index - 4;
lock |= (1 << (index + 15));
bflb_ef_ctrl_write_direct(NULL, 0xfc, (uint32_t *)lock, 1, 1);
}
}
void bflb_efuse_lock_aes_key_read(uint8_t index)
{
uint32_t lock = 0;
if ((index <= 3) || (index == 11)) {
index = ((index == 11) ? 4 : index);
lock |= (1 << (index + 27));
bflb_ef_ctrl_write_direct(NULL, 0x7c, (uint32_t *)lock, 1, 1);
} else if ((index < 11) && (index > 3)) {
index = index - 4;
lock |= (1 << (index + 25));
bflb_ef_ctrl_write_direct(NULL, 0xfc, (uint32_t *)lock, 1, 1);
}
}
void bflb_efuse_read_aes_key(uint8_t index, uint8_t *data, uint32_t len)
{
EF_Ctrl_Read_AES_Key(index, (uint32_t *)data, len);
}
if ((index <= 3) || (index == 11)) {
index = ((index == 11) ? 5 : index);
/* Every key is 4 words len*/
bflb_ef_ctrl_read_direct(NULL, 0x1C + index * 4, (uint32_t *)data, len, 1);
} else if ((index < 11) && (index > 3)) {
index = index - 4;
/* Every key is 4 words len*/
bflb_ef_ctrl_read_direct(NULL, 0x80 + index * 4, (uint32_t *)data, len, 1);
}
}