CloudEdge/bl_mcu_sdk
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[fix] fix typos

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This commit is contained in:
jzlv 2023-01-11 20:22:31 +08:00
parent 15f764ee5e
commit daef36c40e
1 changed files with 11 additions and 11 deletions
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22
drivers/lhal/config/bl808/bl808_irq.h
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@ -120,14 +120,14 @@
#define BL808_IRQ_DMA2_INT5 (BL808_IRQ_NUM_BASE + 29) #define BL808_IRQ_DMA2_INT5 (BL808_IRQ_NUM_BASE + 29)
#define BL808_IRQ_DMA2_INT6 (BL808_IRQ_NUM_BASE + 30) #define BL808_IRQ_DMA2_INT6 (BL808_IRQ_NUM_BASE + 30)
#define BL808_IRQ_DMA2_INT7 (BL808_IRQ_NUM_BASE + 31) #define BL808_IRQ_DMA2_INT7 (BL808_IRQ_NUM_BASE + 31)
#define BL808_IRQ_SDH_MMC1 (BL808_IRQ_NUM_BASE + 32) #define BL808_IRQ_D0_RESERVED6 (BL808_IRQ_NUM_BASE + 32)
#define BL808_IRQ_SDH_MMC3 (BL808_IRQ_NUM_BASE + 33) #define BL808_IRQ_D0_RESERVED7 (BL808_IRQ_NUM_BASE + 33)
#define BL808_IRQ_SDH2PMU_WAKEUP1 (BL808_IRQ_NUM_BASE + 34) #define BL808_IRQ_D0_RESERVED8 (BL808_IRQ_NUM_BASE + 34)
#define BL808_IRQ_SDH2PMU_WAKEUP3 (BL808_IRQ_NUM_BASE + 35) #define BL808_IRQ_D0_RESERVED9 (BL808_IRQ_NUM_BASE + 35)
#define BL808_IRQ_EMAC2 (BL808_IRQ_NUM_BASE + 36) #define BL808_IRQ_D0_RESERVED10 (BL808_IRQ_NUM_BASE + 36)
#define BL808_IRQ_MIPI_CSI (BL808_IRQ_NUM_BASE + 37) #define BL808_IRQ_MIPI_CSI (BL808_IRQ_NUM_BASE + 37)
#define BL808_IRQ_IPC_D0 (BL808_IRQ_NUM_BASE + 38) #define BL808_IRQ_IPC_D0 (BL808_IRQ_NUM_BASE + 38)
#define BL808_IRQ_APU (BL808_IRQ_NUM_BASE + 39) #define BL808_IRQ_D0_RESERVED11 (BL808_IRQ_NUM_BASE + 39)
#define BL808_IRQ_MJDEC (BL808_IRQ_NUM_BASE + 40) #define BL808_IRQ_MJDEC (BL808_IRQ_NUM_BASE + 40)
#define BL808_IRQ_DVP2BUS_INT4 (BL808_IRQ_NUM_BASE + 41) #define BL808_IRQ_DVP2BUS_INT4 (BL808_IRQ_NUM_BASE + 41)
#define BL808_IRQ_DVP2BUS_INT5 (BL808_IRQ_NUM_BASE + 42) #define BL808_IRQ_DVP2BUS_INT5 (BL808_IRQ_NUM_BASE + 42)
@ -138,17 +138,17 @@
#define BL808_IRQ_DISPLAY (BL808_IRQ_NUM_BASE + 47) #define BL808_IRQ_DISPLAY (BL808_IRQ_NUM_BASE + 47)
#define BL808_IRQ_PWM (BL808_IRQ_NUM_BASE + 48) #define BL808_IRQ_PWM (BL808_IRQ_NUM_BASE + 48)
#define BL808_IRQ_SEOF_INT3 (BL808_IRQ_NUM_BASE + 49) #define BL808_IRQ_SEOF_INT3 (BL808_IRQ_NUM_BASE + 49)
#define BL808_IRQ_RESERVED1 (BL808_IRQ_NUM_BASE + 50) #define BL808_IRQ_D0_RESERVED12 (BL808_IRQ_NUM_BASE + 50)
#define BL808_IRQ_RESERVED2 (BL808_IRQ_NUM_BASE + 51) #define BL808_IRQ_D0_RESERVED13 (BL808_IRQ_NUM_BASE + 51)
#define BL808_IRQ_OSD (BL808_IRQ_NUM_BASE + 52) #define BL808_IRQ_OSD (BL808_IRQ_NUM_BASE + 52)
#define BL808_IRQ_DBI (BL808_IRQ_NUM_BASE + 53) #define BL808_IRQ_DBI (BL808_IRQ_NUM_BASE + 53)
#define BL808_IRQ_D0_RESERVED6 (BL808_IRQ_NUM_BASE + 54) #define BL808_IRQ_D0_RESERVED14 (BL808_IRQ_NUM_BASE + 54)
#define BL808_IRQ_OSDA_BUS_DRAIN (BL808_IRQ_NUM_BASE + 55) #define BL808_IRQ_OSDA_BUS_DRAIN (BL808_IRQ_NUM_BASE + 55)
#define BL808_IRQ_OSDB_BUS_DRAIN (BL808_IRQ_NUM_BASE + 56) #define BL808_IRQ_OSDB_BUS_DRAIN (BL808_IRQ_NUM_BASE + 56)
#define BL808_IRQ_OSD_PB (BL808_IRQ_NUM_BASE + 57) #define BL808_IRQ_OSD_PB (BL808_IRQ_NUM_BASE + 57)
#define BL808_IRQ_D0_RESERVED7 (BL808_IRQ_NUM_BASE + 58) #define BL808_IRQ_D0_RESERVED15 (BL808_IRQ_NUM_BASE + 58)
#define BL808_IRQ_MIPI_DSI (BL808_IRQ_NUM_BASE + 59) #define BL808_IRQ_MIPI_DSI (BL808_IRQ_NUM_BASE + 59)
#define BL808_IRQ_D0_RESERVED8 (BL808_IRQ_NUM_BASE + 60) #define BL808_IRQ_D0_RESERVED16 (BL808_IRQ_NUM_BASE + 60)
#define BL808_IRQ_TIMER0 (BL808_IRQ_NUM_BASE + 61) #define BL808_IRQ_TIMER0 (BL808_IRQ_NUM_BASE + 61)
#define BL808_IRQ_TIMER1 (BL808_IRQ_NUM_BASE + 62) #define BL808_IRQ_TIMER1 (BL808_IRQ_NUM_BASE + 62)
#define BL808_IRQ_WDT (BL808_IRQ_NUM_BASE + 63) #define BL808_IRQ_WDT (BL808_IRQ_NUM_BASE + 63)