[fix] fix some definitions

This commit is contained in:
jzlv 2021-04-27 12:38:10 +08:00
parent a64ead12b0
commit d98495bbb4
11 changed files with 142 additions and 62 deletions

View File

@ -215,7 +215,7 @@ void bl_show_info(void)
MSG(" |____/ \\___/ \\__,_|_| |_| \\__,_|_|\\___/|_|\\__,_|_.__/ \r\n");
MSG("\r\n");
MSG("Build:%s,%s\r\n",__TIME__,__DATE__);
MSG("2016 - 2030 Copyright by bouffalolab team\r\n");
MSG("Copyright (c) 2021 Bouffalolab team\r\n");
#if 0
MSG("root clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_ROOT_CLOCK)/1000000);

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@ -10,7 +10,8 @@
#define BSP_USING_I2C0
#define BSP_USING_I2S0
#define BSP_USING_USB
#define BSP_USING_PWM0
#define BSP_USING_PWM_CH2
#define BSP_USING_TIMER
/* ----------------------*/
@ -36,6 +37,10 @@
#define BSP_USING_DMA0_CH6
#endif
#ifdef BSP_USING_TIMER
#define BSP_USING_TIMER_CH0
//#define BSP_USING_TIMER_CH1
#endif
/* PERIPHERAL CONFIG */
#if defined(BSP_USING_ADC0)
@ -93,7 +98,7 @@
#define SPI0_CONFIG \
{ \
.id = 0, \
.clk = 18000000,\
.clk = 36000000,\
.mode = SPI_MASTER_MODE, \
.direction = SPI_MSB_BYTE0_DIRECTION_FIRST, \
.clk_polaraity = SPI_POLARITY_LOW, \
@ -104,11 +109,11 @@
#endif
#endif
#if defined(BSP_USING_PWM0)
#ifndef PWM_CONFIG_0
#define PWM_CONFIG_0 \
#if defined(BSP_USING_PWM_CH2)
#ifndef PWM_CH2_CONFIG
#define PWM_CH2_CONFIG \
{ \
.pin = GPIO_PIN_22, \
.ch = 2, \
.frequency = 1000000, \
.dutyCycle = 0, \
}
@ -275,4 +280,29 @@
#endif
#endif
#if defined (BSP_USING_TIMER_CH0)
#ifndef TIMER_CH0_CONFIG
#define TIMER_CH0_CONFIG \
{ \
.id = 0, \
.ch = 0, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP0, \
}
#endif
#endif
#if defined (BSP_USING_TIMER_CH1)
#ifndef TIMER_CH1_CONFIG
#define TIMER_CH1_CONFIG \
{ \
.id = 0, \
.ch = 1, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP0, \
}
#endif
#endif
#endif

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@ -39,11 +39,11 @@
// <q> GPIO3 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_RX//GPIO_FUN_UART1_RX//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio3 function
#define CONFIG_GPIO3_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO3_FUNC GPIO_FUN_I2S
// <q> GPIO4 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio4 function
#define CONFIG_GPIO4_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO4_FUNC GPIO_FUN_I2S
// <q> GPIO5 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_CTS//GPIO_FUN_UART1_CTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio5 function
@ -51,7 +51,7 @@
// <q> GPIO6 <2> [GPIO_FUN_UNUSED//GPIO_FUN_CLK_OUT//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_TX//GPIO_FUN_UART1_TX//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio6 function
#define CONFIG_GPIO6_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO6_FUNC GPIO_FUN_CLK_OUT
// <q> GPIO7 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RX//GPIO_FUN_UART1_RX//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio7 function
@ -91,7 +91,7 @@
// <q> GPIO16 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio16 function
#define CONFIG_GPIO16_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO16_FUNC GPIO_FUN_I2C
// <q> GPIO17 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio17 function
@ -99,19 +99,19 @@
// <q> GPIO18 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio18 function
#define CONFIG_GPIO18_FUNC GPIO_FUN_UART1_TX
#define CONFIG_GPIO18_FUNC GPIO_FUN_UNUSED
// <q> GPIO19 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio19 function
#define CONFIG_GPIO19_FUNC GPIO_FUN_UART1_RX
#define CONFIG_GPIO19_FUNC GPIO_FUN_SPI
// <q> GPIO20 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio20 function
#define CONFIG_GPIO20_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO20_FUNC GPIO_FUN_SPI
// <q> GPIO21 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio21 function
#define CONFIG_GPIO21_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO21_FUNC GPIO_FUN_SPI
// <q> GPIO22 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio22 function
@ -143,11 +143,11 @@
// <q> GPIO29 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio29 function
#define CONFIG_GPIO29_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO29_FUNC GPIO_FUN_I2S
// <q> GPIO30 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio30 function
#define CONFIG_GPIO30_FUNC GPIO_FUN_UNUSED
#define CONFIG_GPIO30_FUNC GPIO_FUN_I2S
// <q> GPIO31 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC]
// <i> config gpio31 function

View File

@ -238,7 +238,7 @@ void bl_show_info(void)
MSG(" |____/ \\___/ \\__,_|_| |_| \\__,_|_|\\___/|_|\\__,_|_.__/ \r\n");
MSG("\r\n");
MSG("Build:%s,%s\r\n",__TIME__,__DATE__);
MSG("2016 - 2030 Copyright by bouffalolab team\r\n");
MSG("Copyright (c) 2021 Bouffalolab team\r\n");
#if 0
MSG("root clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_ROOT_CLOCK)/1000000);

View File

@ -33,7 +33,8 @@
#define BSP_USING_I2C0
#define BSP_USING_I2S0
#define BSP_USING_USB
#define BSP_USING_PWM0
#define BSP_USING_PWM_CH2
#define BSP_USING_TIMER
/* ----------------------*/
@ -59,6 +60,10 @@
#define BSP_USING_DMA0_CH6
#endif
#ifdef BSP_USING_TIMER
#define BSP_USING_TIMER_CH0
//#define BSP_USING_TIMER_CH1
#endif
/* PERIPHERAL CONFIG */
#if defined(BSP_USING_ADC0)
@ -127,9 +132,9 @@
#endif
#endif
#if defined(BSP_USING_PWM0)
#ifndef PWM_CONFIG_0
#define PWM_CONFIG_0 \
#if defined(BSP_USING_PWM_CH2)
#ifndef PWM_CH2_CONFIG
#define PWM_CH2_CONFIG \
{ \
.ch = 2, \
.frequency = 1000000, \
@ -298,4 +303,29 @@
#endif
#endif
#if defined (BSP_USING_TIMER_CH0)
#ifndef TIMER_CH0_CONFIG
#define TIMER_CH0_CONFIG \
{ \
.id = 0, \
.ch = 0, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP0, \
}
#endif
#endif
#if defined (BSP_USING_TIMER_CH1)
#ifndef TIMER_CH1_CONFIG
#define TIMER_CH1_CONFIG \
{ \
.id = 0, \
.ch = 1, \
.cnt_mode = TIMER_CNT_PRELOAD, \
.pl_trig_src = TIMER_PL_TRIG_COMP0, \
}
#endif
#endif
#endif

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@ -94,7 +94,7 @@ BL_Err_Type SPI_ReadWriteByte(uint8_t *txBuff, uint8_t *rxBuff, uint32_t length)
// dma_reload(dma_ch4, (uint32_t)DMA_ADDR_SPI_RDR, (uint32_t)rxBuff, length);
// dma_channel_start(dma_ch3);
// dma_channel_start(dma_ch4);
// while (device_control(dma_ch3, DMA_CHANNEL_GET_STATUS_CMD, NULL) || device_control(dma_ch4, DMA_CHANNEL_GET_STATUS_CMD, NULL))
// while (device_control(dma_ch3, DMA_CHANNEL_GET_STATUS, NULL) || device_control(dma_ch4, DMA_CHANNEL_GET_STATUS, NULL))
// {
// }
// MSG("SPI_DMA_test 2\r\n");
@ -122,7 +122,7 @@ BL_Err_Type SPI_ReadWriteByte(uint8_t *txBuff, uint8_t *rxBuff, uint32_t length)
dma_reload(dma_ch4, (uint32_t)DMA_ADDR_SPI_RDR, (uint32_t)rxBuff, length);
dma_channel_start(dma_ch3);
dma_channel_start(dma_ch4);
while(device_control(dma_ch3,DMA_CHANNEL_GET_STATUS_CMD,NULL)||device_control(dma_ch4,DMA_CHANNEL_GET_STATUS_CMD,NULL))
while(device_control(dma_ch3,DMA_CHANNEL_GET_STATUS,NULL)||device_control(dma_ch4,DMA_CHANNEL_GET_STATUS,NULL))
{
}
dma_channel_stop(dma_ch3);
@ -144,13 +144,13 @@ static void SD_SPI_SetSpeed(uint8_t mode)
{
switch (mode){
case (0):
device_control(spi0, DEVICE_CTRL_SPI_CONFIG_CLOCK_CMD,(void*)(300 * 1000));
device_control(spi0, DEVICE_CTRL_SPI_CONFIG_CLOCK,(void*)(300 * 1000));
break;
case (1):
device_control(spi0, DEVICE_CTRL_SPI_CONFIG_CLOCK_CMD,(void*)(18 * 1000 * 1000));
device_control(spi0, DEVICE_CTRL_SPI_CONFIG_CLOCK,(void*)(18 * 1000 * 1000));
break;
case (2):
device_control(spi0, DEVICE_CTRL_SPI_CONFIG_CLOCK_CMD,(void*)(40 * 1000 * 1000));
device_control(spi0, DEVICE_CTRL_SPI_CONFIG_CLOCK,(void*)(40 * 1000 * 1000));
break;
default:
break;

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@ -79,7 +79,7 @@ void uart1_init(void)
{
device_open(uart1, DEVICE_OFLAG_DMA_TX | DEVICE_OFLAG_INT_RX); //uart0 tx dma mode
device_set_callback(uart1, uart_irq_callback);
device_control(uart1, DEVICE_CTRL_SET_INT, (void *)(UART_RX_FIFO_IT | UART_RTO_IT | UART_RX_FER_IT));
device_control(uart1, DEVICE_CTRL_SET_INT, (void *)(UART_RX_FIFO_IT | UART_RTO_IT));
}
dma_register(DMA0_CH2_INDEX, "ch2", DEVICE_OFLAG_RDWR);
@ -90,7 +90,7 @@ void uart1_init(void)
//device_set_callback(dma_ch2, NULL);
//device_control(dma_ch2, DEVICE_CTRL_SET_INT, NULL);
}
device_control(uart1, DEVICE_CTRL_UART_ATTACH_TX_DMA, dma_ch2);
//device_control(uart1, DEVICE_CTRL_ATTACH_TX_DMA, dma_ch2);
}
@ -123,19 +123,27 @@ void uart1_config(uint32_t baudrate, uart_databits_t databits, uart_parity_t par
void uart1_dtr_init(void)
{
gpio_set_mode(GPIO_PIN_21, GPIO_OUTPUT_MODE);
gpio_set_mode(GPIO_PIN_22, GPIO_OUTPUT_MODE);
}
void uart1_rts_init(void)
{
gpio_set_mode(GPIO_PIN_20, GPIO_OUTPUT_MODE);
gpio_set_mode(GPIO_PIN_21, GPIO_OUTPUT_MODE);
}
void uart1_dtr_deinit(void)
{
gpio_set_mode(GPIO_PIN_22, GPIO_INPUT_MODE);
}
void uart1_rts_deinit(void)
{
gpio_set_mode(GPIO_PIN_21, GPIO_INPUT_MODE);
}
void dtr_pin_set(uint8_t status)
{
gpio_write(GPIO_PIN_21, status);
gpio_write(GPIO_PIN_22, status);
}
void rts_pin_set(uint8_t status)
{
gpio_write(GPIO_PIN_20, status);
gpio_write(GPIO_PIN_21, status);
}
void ringbuffer_lock()
{
@ -180,7 +188,9 @@ static dma_lli_ctrl_t uart_lli_list =
void uart_send_from_ringbuffer(void)
{
if (!device_control(dma_ch2, DMA_CHANNEL_GET_STATUS_CMD, NULL))
if(Ring_Buffer_Get_Length(&usb_rx_rb))
{
if (!device_control(dma_ch2, DMA_CHANNEL_GET_STATUS, NULL))
{
uint32_t avalibleCnt = Ring_Buffer_Read(&usb_rx_rb, src_buffer, UART_TX_DMA_SIZE);
@ -189,9 +199,10 @@ void uart_send_from_ringbuffer(void)
dma_channel_stop(dma_ch2);
uart_dma_ctrl_cfg.bits.TransferSize = avalibleCnt;
memcpy(&uart_lli_list.cfg, &uart_dma_ctrl_cfg, sizeof(dma_control_data_t));
device_control(dma_ch2,DMA_CHANNEL_UPDATE_CMD,(void*)((uint32_t)&uart_lli_list));
device_control(dma_ch2,DMA_CHANNEL_UPDATE,(void*)((uint32_t)&uart_lli_list));
dma_channel_start(dma_ch2);
//device_write(uart1, 0, src_buffer, avalibleCnt);
}
}
}
}

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@ -34,6 +34,8 @@ void uart1_init(void);
void uart1_config(uint32_t baudrate,uart_databits_t databits,uart_parity_t parity,uart_stopbits_t stopbits);
void uart1_dtr_init(void);
void uart1_rts_init(void);
void uart1_dtr_deinit(void);
void uart1_rts_deinit(void);
void dtr_pin_set(uint8_t status);
void rts_pin_set(uint8_t status);
void uart_ringbuffer_init(void);

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@ -46,7 +46,14 @@
#define DEVICE_CTRL_SUSPEND 0x05 /* suspend device */
#define DEVICE_CTRL_CONFIG 0x06 /* config device */
#define DEVICE_CTRL_GET_CONFIG 0x07 /* get device configuration */
#define DEVICE_CTRL_ATTACH_TX_DMA 0x08
#define DEVICE_CTRL_ATTACH_RX_DMA 0x09
#define DEVICE_CTRL_TX_DMA_SUSPEND 0x0a
#define DEVICE_CTRL_RX_DMA_SUSPEND 0x0b
#define DEVICE_CTRL_TX_DMA_RESUME 0x0c
#define DEVICE_CTRL_RX_DMA_RESUME 0x0d
#define DEVICE_CTRL_RESVD1 0x0E
#define DEVICE_CTRL_RESVD2 0x0F
/*
* POSIX Error codes
*/

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@ -150,7 +150,7 @@
*/
#define FF_FS_RPATH 0
#define FF_FS_RPATH 2
/* This option configures support for relative path.
/
/ 0: Disable relative path and remove related functions.
@ -163,12 +163,12 @@
/ Drive/Volume Configurations
/---------------------------------------------------------------------------*/
#define FF_VOLUMES 3
#define FF_VOLUMES 6
/* Number of volumes (logical drives) to be used. (1-10) */
#define FF_STR_VOLUME_ID 0
#define FF_VOLUME_STRS "RAM","NAND","CF","SD","SD2","USB","USB2","USB3"
#define FF_STR_VOLUME_ID 1
#define FF_VOLUME_STRS "sd2","sd","ram","nand","cg","usb",
/* FF_STR_VOLUME_ID switches support for volume ID in arbitrary strings.
/ When FF_STR_VOLUME_ID is set to 1 or 2, arbitrary strings can be used as drive
/ number in the path name. FF_VOLUME_STRS defines the volume ID strings for each

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@ -470,13 +470,13 @@ struct usb_desc_header {
uint8_t bDescriptorType; /**< descriptor type */
};
#define USB_DEVICE_DESCRIPTOR_INIT(bcdUSB,idVendor,idProduct,bcdDevice,bNumConfigurations) \
#define USB_DEVICE_DESCRIPTOR_INIT(bcdUSB,bDeviceClass,bDeviceSubClass,bDeviceProtocol,idVendor,idProduct,bcdDevice,bNumConfigurations) \
0x12, /* bLength */ \
USB_DESCRIPTOR_TYPE_DEVICE, /* bDescriptorType */ \
WBVAL(bcdUSB), /* bcdUSB */ \
0x00, /* bDeviceClass */ \
0x00, /* bDeviceSubClass */ \
0x00, /* bDeviceProtocol */ \
bDeviceClass, /* bDeviceClass */ \
bDeviceSubClass, /* bDeviceSubClass */ \
bDeviceProtocol, /* bDeviceProtocol */ \
0x40, /* bMaxPacketSize */ \
WBVAL(idVendor), /* idVendor */ \
WBVAL(idProduct), /* idProduct */ \