[update][ble_pds] update ble pds param
This commit is contained in:
parent
1f4fd9061d
commit
b25a219f83
@ -22,15 +22,13 @@ NOTES
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#include "uuid.h"
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#include "ble_peripheral_tp_server.h"
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#include "log.h"
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#include "hal_clock.h"
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#define BLE_CONN_PDS 0
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extern bool pds_start;
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static void ble_tp_connected(struct bt_conn *conn, u8_t err);
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static void ble_tp_disconnected(struct bt_conn *conn, u8_t reason);
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static void ble_param_updated(struct bt_conn *conn, u16_t interval,u16_t latency, u16_t timeout);
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static void ble_param_updated(struct bt_conn *conn, u16_t interval, u16_t latency, u16_t timeout);
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static struct bt_conn *ble_tp_conn;
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#if !defined(CONFIG_BT_OAD_SERVER)
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@ -72,15 +70,15 @@ NAME
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*/
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static void ble_tp_connected(struct bt_conn *conn, u8_t err)
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{
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#if !defined(CONFIG_BT_OAD_SERVER)
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#if !defined(CONFIG_BT_OAD_SERVER)
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int tx_octets = 0x00fb;
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int tx_time = 0x0848;
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int ret = -1;
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#endif
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#endif
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#if (BLE_CONN_PDS)
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struct bt_le_conn_param param;
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#endif
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#if XTAL_32K_TYPE == EXTERNAL_XTAL_32K
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struct bt_le_conn_param param;
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#endif
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if (err) {
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return;
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@ -88,24 +86,21 @@ static void ble_tp_connected(struct bt_conn *conn, u8_t err)
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BT_WARN("Tp connected");
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ble_tp_conn = conn;
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pds_start = false;
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pds_start = false;
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#if (BLE_CONN_PDS)
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param.interval_min = param.interval_max = 0x320;
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#if XTAL_32K_TYPE == EXTERNAL_XTAL_32K
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param.interval_min = param.interval_max = 0x320;
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param.latency = 0;
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param.timeout = 0x05dc;
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ret = bt_conn_le_param_update(ble_tp_conn, ¶m);
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if (ret)
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{
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BT_WARN("conn update failed (err %d)\r\n", ret);
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}
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else
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{
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BT_WARN("conn update initiated\r\n");
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}
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#endif
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if (ret) {
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BT_WARN("conn update failed (err %d)\r\n", ret);
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} else {
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BT_WARN("conn update initiated\r\n");
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}
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#endif
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#if !defined(CONFIG_BT_OAD_SERVER)
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#if !defined(CONFIG_BT_OAD_SERVER)
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//set data length after connected.
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ret = bt_le_set_data_len(ble_tp_conn, tx_octets, tx_time);
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@ -124,8 +119,7 @@ static void ble_tp_connected(struct bt_conn *conn, u8_t err)
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} else {
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BT_WARN("ble tp exchange mtu size failure, err: %d", ret);
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}
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#endif
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#endif
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}
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/*************************************************************************
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@ -143,6 +137,9 @@ static void ble_tp_disconnected(struct bt_conn *conn, u8_t reason)
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}
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ble_tp_conn = NULL;
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extern int ble_start_adv(void);
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ble_start_adv();
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pds_start = true;
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}
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/*************************************************************************
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@ -151,21 +148,16 @@ NAME
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*/
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static void ble_param_updated(struct bt_conn *conn, u16_t interval,
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u16_t latency, u16_t timeout)
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u16_t latency, u16_t timeout)
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{
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BT_WARN("LE conn param updated: int 0x%04x lat %d to %d \r\n", interval, latency, timeout);
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#if (BLE_CONN_PDS)
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if( interval > 80)
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{
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#if XTAL_32K_TYPE == EXTERNAL_XTAL_32K
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if (interval > 80) {
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pds_start = true;
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} else {
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pds_start = false;
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}
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else
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{
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pds_start = false;
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}
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#endif
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#endif
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}
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/*************************************************************************
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@ -278,7 +270,6 @@ static void ble_tp_notify_ccc_changed(const struct bt_gatt_attr *attr, u16_t val
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BT_WARN("ccc:value=[%d]", value);
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if (value == BT_GATT_CCC_NOTIFY) {
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if (xTaskCreate(ble_tp_notify_task, (char *)"bletp", 512, NULL, 15, &ble_tp_task_h) == pdPASS) {
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created_tp_task = 1;
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BT_WARN("Create throughput tx task success");
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@ -30,6 +30,9 @@
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#include "ble_peripheral_tp_server.h"
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#include "ble_lib_api.h"
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#include "hci_driver.h"
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#include "bl702_sec_eng.h"
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#include "hal_clock.h"
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#include "bl702_romdriver.h"
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#if defined(CONFIG_BT_OAD_SERVER)
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#include "oad_main.h"
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@ -62,6 +65,8 @@ extern uint32_t __system_ram_data_end__;
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#define TCM_DATA_START __tcm_data_start__
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#define TCM_DATA_END __tcm_data_start__
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#define MASK_DEBUG_MSG 0
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extern uint8_t _heap_start;
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extern uint8_t _heap_size; // @suppress("Type cannot be resolved")
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extern uint8_t _heap2_start;
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@ -69,13 +74,15 @@ extern uint8_t _heap2_size; // @suppress("Type cannot be resolved")
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static HeapRegion_t xHeapRegions[] = {
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{ &_heap_start, (unsigned int)&_heap_size },
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{ &_heap2_start, (unsigned int) &_heap2_size },
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{ &_heap2_start, (unsigned int)&_heap2_size },
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{ NULL, 0 }, /* Terminates the array. */
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{ NULL, 0 } /* Terminates the array. */
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};
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bool pds_start = false;
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#define TIME_5MS_IN_32768CYCLE (164) // (45000/(1000000/32768))
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bool wfi_in = false;
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#define TIME_5MS_IN_32768CYCLE (164) // (45000/(1000000/32768))
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void bl_pds_restore(void);
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//For test
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@ -85,13 +92,91 @@ extern int32_t rwip_get_sleep_stat_cnt(void);
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uint8_t sharedBuf[16];
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void user_vAssertCalled(void) __attribute__((weak, alias("vAssertCalled")));
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static void ATTR_PDS_RAM_SECTION bl702_low_power_config(void)
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{
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uint8_t i;
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static uint32_t regValue = 0;
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// Power off DLL
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GLB_Power_Off_DLL();
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// Disable secure engine
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Sec_Eng_Trng_Disable();
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SEC_Eng_Turn_Off_Sec_Ring();
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// Disable Zigbee clock
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GLB_Set_MAC154_ZIGBEE_CLK(0);
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// Set GPIO to High-Z state
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for (i = 0; i <= 37; i++) {
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// jtag pins
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#if 0
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if((i == 0) || (i == 1) || (i == 2) || (i == 9)){
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continue;
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}
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#endif
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// uart pins
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if ((i == 14) || (i == 15)) {
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continue;
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}
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// flash pins
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if ((i >= 23) && (i <= 28)) {
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continue;
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}
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GLB_GPIO_Set_HZ(i);
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}
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if (regValue == 0) {
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// Gate peripheral clock
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for (i = 0; i <= 31; i++) {
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if (i == BL_AHB_SLAVE1_GLB) {
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continue;
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}
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if (i == BL_AHB_SLAVE1_MIX) {
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continue;
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}
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if (i == BL_AHB_SLAVE1_EFUSE) {
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continue;
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}
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if (i == BL_AHB_SLAVE1_L1C) {
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continue;
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}
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if (i == BL_AHB_SLAVE1_SFC) {
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continue;
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}
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if (i == BL_AHB_SLAVE1_PDS_HBN_AON_HBNRAM) {
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continue;
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}
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if (i == BL_AHB_SLAVE1_UART0) {
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continue;
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}
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if (i == BL_AHB_SLAVE1_TMR) {
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continue;
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}
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GLB_AHB_Slave1_Clock_Gate(1, i);
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regValue = BL_RD_REG(GLB_BASE, GLB_CGEN_CFG1);
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}
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} else {
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BL_WR_REG(GLB_BASE, GLB_CGEN_CFG1, regValue);
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}
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}
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void vApplicationIdleHook(void)
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{
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if(!pds_start){
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if (!wfi_in) {
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__asm volatile(
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" wfi "
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);
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" wfi ");
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/*empty*/
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}
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}
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@ -175,7 +260,7 @@ void vApplicationGetTimerTaskMemory(StaticTask_t **ppxTimerTaskTCBBuffer, StackT
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extern bool le_check_valid_scan(void);
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extern bool le_check_valid_conn(void);
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//Allocate retention memory
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void *bl_alloc_retmem(size_t xWantedSize )
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void *bl_alloc_retmem(size_t xWantedSize)
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{
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return pvPortMalloc(xWantedSize);
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}
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@ -193,7 +278,7 @@ void bflb_load_hbn_ram(void)
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}
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// can be placed in flash, here placed in pds section to reduce fast boot time
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void ATTR_PDS_RAM_SECTION user_pds_restore_tcm(void)
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static void ATTR_PDS_RAM_SECTION user_pds_restore_tcm(void)
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{
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uint32_t src = 0;
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uint32_t dst = 0;
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@ -209,16 +294,108 @@ void ATTR_PDS_RAM_SECTION user_pds_restore_tcm(void)
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src += 4;
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dst += 4;
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}
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}
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/**
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* @brief gate all clock but CPU and ble
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*
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*/
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static void ATTR_HBN_RAM_SECTION system_clock_gate(void)
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{
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uint32_t tmpVal;
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tmpVal = BL_RD_REG(GLB_BASE, GLB_CGEN_CFG1);
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tmpVal &= (~(1 << BL_AHB_SLAVE1_GPIP)); //2
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tmpVal &= (~(1 << BL_AHB_SLAVE1_SEC_DBG)); //3
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tmpVal &= (~(1 << BL_AHB_SLAVE1_SEC)); //4
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tmpVal &= (~(1 << BL_AHB_SLAVE1_TZ1)); //5
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tmpVal &= (~(1 << BL_AHB_SLAVE1_TZ2)); //6
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tmpVal &= (~(1 << BL_AHB_SLAVE1_DMA)); //12
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tmpVal &= (~(1 << BL_AHB_SLAVE1_EMAC)); //13
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// tmpVal &= (~(1 << BL_AHB_SLAVE1_UART0));//14
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tmpVal &= (~(1 << BL_AHB_SLAVE1_UART1)); //15
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tmpVal &= (~(1 << BL_AHB_SLAVE1_SPI)); //16
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tmpVal &= (~(1 << BL_AHB_SLAVE1_I2C)); //17
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tmpVal &= (~(1 << BL_AHB_SLAVE1_PWM));
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tmpVal &= (~(1 << BL_AHB_SLAVE1_IRR));
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tmpVal &= (~(1 << BL_AHB_SLAVE1_CKS));
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tmpVal &= (~(1 << BL_AHB_SLAVE1_QDEC));
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tmpVal &= (~(1 << BL_AHB_SLAVE1_KYS));
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tmpVal &= (~(1 << BL_AHB_SLAVE1_I2S));
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tmpVal &= (~(1 << BL_AHB_SLAVE1_USB));
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tmpVal &= (~(1 << BL_AHB_SLAVE1_CAM));
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tmpVal &= (~(1 << BL_AHB_SLAVE1_MJPEG));
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BL_WR_REG(GLB_BASE, GLB_CGEN_CFG1, tmpVal);
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tmpVal = BL_RD_REG(GLB_BASE, GLB_CGEN_CFG0);
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tmpVal &= (~(1 << 1)); //SDU clock gating
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tmpVal &= (~(1 << 2)); //SEC clock gating
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tmpVal &= (~(1 << 3)); //DMA clock gating
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tmpVal &= (~(1 << 4)); //CCI clock gating
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BL_WR_REG(GLB_BASE, GLB_CGEN_CFG0, tmpVal);
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}
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static BL_Err_Type ATTR_HBN_RAM_SECTION check_xtal_power_on(void)
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{
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uint32_t tmpVal = 0;
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uint32_t timeOut = 0;
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tmpVal = BL_RD_REG(AON_BASE, AON_TSEN);
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/* Polling for ready */
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while ((!BL_IS_REG_BIT_SET(tmpVal, AON_XTAL_RDY)) && (timeOut < 120)) {
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RomDriver_BL702_Delay_US(10);
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timeOut++;
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tmpVal = BL_RD_REG(AON_BASE, AON_TSEN);
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}
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if (timeOut >= 120) {
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return TIMEOUT;
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}
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return SUCCESS;
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}
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// can be placed in flash, here placed in pds section to reduce fast boot time
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void ATTR_PDS_RAM_SECTION user_pds_recovery_board(void)
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static void ATTR_PDS_RAM_SECTION user_pds_recovery_board(void)
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{
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extern void board_init(void);
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extern void system_clock_init(void);
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board_init();
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system_clock_init();
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uint32_t tmpVal;
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system_clock_gate();
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tmpVal = BL_RD_REG(GLB_BASE, GLB_CGEN_CFG2);
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tmpVal &= (~(1 << 0)); //ZIGBEE clock gating
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tmpVal &= (~(1 << 4)); //BLE clock gating
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BL_WR_REG(GLB_BASE, GLB_CGEN_CFG2, tmpVal);
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#if XTAL_TYPE != INTERNAL_RC_32M
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check_xtal_power_on();
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#endif
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RomDriver_HBN_Set_ROOT_CLK_Sel(HBN_ROOT_CLK_XTAL);
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SystemCoreClockSet(32000000);
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}
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void ATTR_PDS_RAM_SECTION user_pds_recovery_hardware(void)
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{
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user_pds_recovery_board();
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user_pds_restore_tcm();
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#if MASK_DEBUG_MSG == 0
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/* UART_IO recovery */
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GLB_GPIO_Cfg_Type gpio_cfg;
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gpio_cfg.drive = 0;
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gpio_cfg.smtCtrl = 1;
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gpio_cfg.gpioMode = GPIO_MODE_AF;
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gpio_cfg.pullType = GPIO_PULL_UP;
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gpio_cfg.gpioPin = GLB_GPIO_PIN_14;
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gpio_cfg.gpioFun = GPIO_FUN_UART;
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GLB_UART_Fun_Sel((GLB_GPIO_PIN_14 % 8), (GPIO_FUN_UART0_TX & 0x07));
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GLB_UART_Fun_Sel((GLB_GPIO_PIN_15 % 8), (GPIO_FUN_UART0_RX & 0x07));
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GLB_GPIO_Init(&gpio_cfg);
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gpio_cfg.gpioPin = GLB_GPIO_PIN_15;
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GLB_GPIO_Init(&gpio_cfg);
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#endif
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}
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void enter_sleep(uint32_t pdsSleepCycles)
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@ -226,25 +403,26 @@ void enter_sleep(uint32_t pdsSleepCycles)
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uint32_t actualSleepDuration_ms;
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uint32_t mtimerClkCfg;
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uint32_t ulCurrentTimeHigh, ulCurrentTimeLow;
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volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( configCLINT_BASE_ADDRESS + 0xBFFC );
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volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCLINT_BASE_ADDRESS + 0xBFF8 );
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volatile uint32_t *const pulTimeHigh = (volatile uint32_t *const)(configCLINT_BASE_ADDRESS + 0xBFFC);
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volatile uint32_t *const pulTimeLow = (volatile uint32_t *const)(configCLINT_BASE_ADDRESS + 0xBFF8);
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extern volatile uint64_t * const pullMachineTimerCompareRegister;
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extern volatile uint64_t *const pullMachineTimerCompareRegister;
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extern const size_t uxTimerIncrementsForOneTick;
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extern void vPortSetupTimerInterrupt(void);
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mtimerClkCfg = *(volatile uint32_t *)0x40000090; // store mtimer clock
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mtimerClkCfg = *(volatile uint32_t *)0x40000090; // store mtimer clock
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*pullMachineTimerCompareRegister -= (uxTimerIncrementsForOneTick + 1); // avoid mtimer interrupt pending
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*(volatile uint8_t *)0x02800407 = 0;
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do
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{
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do {
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ulCurrentTimeHigh = *pulTimeHigh;
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ulCurrentTimeLow = *pulTimeLow;
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} while( ulCurrentTimeHigh != *pulTimeHigh );
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} while (ulCurrentTimeHigh != *pulTimeHigh);
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wfi_in = true;
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actualSleepDuration_ms = hal_pds_enter_with_time_compensation(PM_PDS_LEVEL_31, pdsSleepCycles);
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wfi_in = false;
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*(volatile uint32_t *)0x40000090 = mtimerClkCfg;
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@ -255,12 +433,10 @@ void enter_sleep(uint32_t pdsSleepCycles)
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*(volatile uint8_t *)0x02800407 = 1;
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vTaskStepTick(actualSleepDuration_ms);
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}
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void vApplicationSleep( TickType_t xExpectedIdleTime_ms)
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void vApplicationSleep(TickType_t xExpectedIdleTime_ms)
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{
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int32_t bleSleepDuration_32768cycles = 0;
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int32_t expectedIdleTime_32768cycles = 0;
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eSleepModeStatus eSleepStatus;
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@ -269,60 +445,48 @@ void vApplicationSleep( TickType_t xExpectedIdleTime_ms)
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if (pds_start == 0 || le_check_valid_scan())
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return;
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|
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if(xExpectedIdleTime_ms + xTaskGetTickCount() == portMAX_DELAY){
|
||||
if (xExpectedIdleTime_ms + xTaskGetTickCount() == portMAX_DELAY) {
|
||||
freertos_max_idle = true;
|
||||
}else{
|
||||
} else {
|
||||
xExpectedIdleTime_ms -= 1;
|
||||
expectedIdleTime_32768cycles = 32768 * xExpectedIdleTime_ms / 1000;
|
||||
}
|
||||
|
||||
if((!freertos_max_idle)&&(expectedIdleTime_32768cycles < TIME_5MS_IN_32768CYCLE)){
|
||||
if ((!freertos_max_idle) && (expectedIdleTime_32768cycles < TIME_5MS_IN_32768CYCLE)) {
|
||||
return;
|
||||
}
|
||||
|
||||
eSleepStatus = eTaskConfirmSleepModeStatus();
|
||||
if(eSleepStatus == eAbortSleep || ble_controller_sleep_is_ongoing())
|
||||
{
|
||||
if (eSleepStatus == eAbortSleep || ble_controller_sleep_is_ongoing()) {
|
||||
return;
|
||||
}
|
||||
bleSleepDuration_32768cycles = ble_controller_sleep();
|
||||
|
||||
|
||||
if(bleSleepDuration_32768cycles < TIME_5MS_IN_32768CYCLE)
|
||||
{
|
||||
if (bleSleepDuration_32768cycles < TIME_5MS_IN_32768CYCLE) {
|
||||
return;
|
||||
}
|
||||
else
|
||||
{
|
||||
} else {
|
||||
MSG("Sleep_cycles=%ld,state_cnt=%d\r\n", bleSleepDuration_32768cycles, rwip_get_sleep_stat_cnt());
|
||||
|
||||
uint32_t reduceSleepTime;
|
||||
SPI_Flash_Cfg_Type *flashCfg;
|
||||
uint32_t len;
|
||||
extern BL_Err_Type flash_get_cfg(uint8_t **cfg_addr, uint32_t *len);
|
||||
flash_get_cfg((uint8_t**)&flashCfg,&len);
|
||||
uint8_t ioMode = flashCfg->ioMode & 0xF;
|
||||
extern BL_Err_Type flash_get_cfg(uint8_t * *cfg_addr, uint32_t * len);
|
||||
flash_get_cfg((uint8_t **)&flashCfg, &len);
|
||||
uint8_t ioMode = flashCfg->ioMode & 0xF;
|
||||
uint8_t contRead = flashCfg->cReadSupport;
|
||||
uint8_t cpuClk = GLB_Get_Root_CLK_Sel();
|
||||
if(ioMode == 4 && contRead == 1 && cpuClk == GLB_ROOT_CLK_XTAL)
|
||||
{
|
||||
reduceSleepTime = 100;
|
||||
if (ioMode == 4 && contRead == 1 && cpuClk == GLB_ROOT_CLK_XTAL) {
|
||||
reduceSleepTime = 100;
|
||||
} else if (ioMode == 1 && contRead == 0 && cpuClk == GLB_ROOT_CLK_XTAL) {
|
||||
reduceSleepTime = 130;
|
||||
} else {
|
||||
reduceSleepTime = 130;
|
||||
}
|
||||
else if(ioMode == 1 && contRead == 0 && cpuClk == GLB_ROOT_CLK_XTAL)
|
||||
{
|
||||
reduceSleepTime = 130;
|
||||
}
|
||||
else
|
||||
{
|
||||
reduceSleepTime = 130;
|
||||
}
|
||||
if(eSleepStatus == eStandardSleep && ((!freertos_max_idle) && (expectedIdleTime_32768cycles < bleSleepDuration_32768cycles)))
|
||||
{
|
||||
enter_sleep( expectedIdleTime_32768cycles - reduceSleepTime);
|
||||
}
|
||||
else
|
||||
{
|
||||
enter_sleep( bleSleepDuration_32768cycles - reduceSleepTime);
|
||||
|
||||
if (eSleepStatus == eStandardSleep && ((!freertos_max_idle) && (expectedIdleTime_32768cycles < bleSleepDuration_32768cycles))) {
|
||||
enter_sleep(expectedIdleTime_32768cycles - reduceSleepTime);
|
||||
} else {
|
||||
enter_sleep(bleSleepDuration_32768cycles - reduceSleepTime);
|
||||
}
|
||||
|
||||
bl_pds_restore();
|
||||
@ -331,6 +495,7 @@ void vApplicationSleep( TickType_t xExpectedIdleTime_ms)
|
||||
|
||||
void bl_pds_restore(void)
|
||||
{
|
||||
#if MASK_DEBUG_MSG == 0
|
||||
struct device *uart = device_find("debug_log");
|
||||
if (uart) {
|
||||
device_close(uart);
|
||||
@ -338,9 +503,8 @@ void bl_pds_restore(void)
|
||||
device_set_callback(uart, NULL);
|
||||
device_control(uart, DEVICE_CTRL_CLR_INT, (void *)(UART_RX_FIFO_IT));
|
||||
}
|
||||
|
||||
HBN_Set_XCLK_CLK_Sel(HBN_XCLK_CLK_XTAL);
|
||||
|
||||
#endif
|
||||
bl702_low_power_config();
|
||||
ble_controller_sleep_restore();
|
||||
}
|
||||
|
||||
@ -359,7 +523,6 @@ int ble_start_adv(void)
|
||||
};
|
||||
|
||||
return bt_le_adv_start(&adv_param, adv_data, ARRAY_SIZE(adv_data), NULL, 0);
|
||||
|
||||
}
|
||||
|
||||
#if defined(CONFIG_BT_OAD_SERVER)
|
||||
@ -384,6 +547,7 @@ void bt_enable_cb(int err)
|
||||
MSG("Start adv\r\n");
|
||||
ble_start_adv();
|
||||
MSG("Advertising.........\r\n");
|
||||
bl702_low_power_config();
|
||||
pds_start = true;
|
||||
}
|
||||
|
||||
@ -418,24 +582,28 @@ int main(void)
|
||||
uint32_t tmpVal = 0;
|
||||
|
||||
bflb_load_hbn_ram();
|
||||
bflb_platform_print_set(MASK_DEBUG_MSG);
|
||||
bflb_platform_init(0);
|
||||
HBN_Set_Ldo11_Rt_Vout(HBN_LDO_LEVEL_1P00V);
|
||||
HBN_Set_Ldo11_Soc_Vout(HBN_LDO_LEVEL_1P00V);
|
||||
user_pds_recovery_board();
|
||||
|
||||
HBN_Clear_RTC_Counter();
|
||||
HBN_Enable_RTC_Counter();
|
||||
pm_set_tcm_recovery_callback(user_pds_restore_tcm);
|
||||
pm_set_board_recovery_callback(user_pds_recovery_board);
|
||||
pm_set_hardware_recovery_callback(user_pds_recovery_hardware);
|
||||
|
||||
HBN_Set_XCLK_CLK_Sel(HBN_XCLK_CLK_XTAL);
|
||||
|
||||
//Set capcode
|
||||
//Set capcode
|
||||
tmpVal = BL_RD_REG(AON_BASE, AON_XTAL_CFG);
|
||||
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, AON_XTAL_CAPCODE_IN_AON, 33);
|
||||
tmpVal = BL_SET_REG_BITS_VAL(tmpVal, AON_XTAL_CAPCODE_OUT_AON, 33);
|
||||
BL_WR_REG(AON_BASE, AON_XTAL_CFG, tmpVal);
|
||||
|
||||
ble_controller_set_tx_pwr(0);
|
||||
|
||||
vPortDefineHeapRegions(xHeapRegions);
|
||||
|
||||
MSG("[OS] ble_init_task.....\r\n");
|
||||
xTaskCreate( ble_init_task, "ble_init_task", 512,NULL, 15, (TaskHandle_t * const)&ble_init_task_h);
|
||||
xTaskCreate(ble_init_task, "ble_init_task", 512, NULL, 15, (TaskHandle_t *const) & ble_init_task_h);
|
||||
|
||||
vTaskStartScheduler();
|
||||
|
||||
|
Reference in New Issue
Block a user