[update][ble_pds] update ble pds param

examples/ble/ble_pds/ble_peripheral_tp_server.c

@@ -22,15 +22,13 @@ NOTES
 #include "uuid.h"
 #include "ble_peripheral_tp_server.h"
 #include "log.h"
+#include "hal_clock.h"
 
-
-#define BLE_CONN_PDS     0
 extern bool pds_start;
 
 static void ble_tp_connected(struct bt_conn *conn, u8_t err);
 static void ble_tp_disconnected(struct bt_conn *conn, u8_t reason);
-static void ble_param_updated(struct bt_conn *conn, u16_t interval,u16_t latency, u16_t timeout);
+static void ble_param_updated(struct bt_conn *conn, u16_t interval, u16_t latency, u16_t timeout);
-
 
 static struct bt_conn *ble_tp_conn;
 #if !defined(CONFIG_BT_OAD_SERVER)
@@ -72,15 +70,15 @@ NAME
 */
 static void ble_tp_connected(struct bt_conn *conn, u8_t err)
 {
-    #if !defined(CONFIG_BT_OAD_SERVER)
+#if !defined(CONFIG_BT_OAD_SERVER)
     int tx_octets = 0x00fb;
     int tx_time = 0x0848;
     int ret = -1;
-    #endif
+#endif
 
-	#if (BLE_CONN_PDS)
+#if XTAL_32K_TYPE == EXTERNAL_XTAL_32K
     struct bt_le_conn_param param;
-	#endif
+#endif
 
     if (err) {
         return;
@@ -90,22 +88,19 @@ static void ble_tp_connected(struct bt_conn *conn, u8_t err)
     ble_tp_conn = conn;
     pds_start = false;
 
-	#if (BLE_CONN_PDS)
+#if XTAL_32K_TYPE == EXTERNAL_XTAL_32K
     param.interval_min = param.interval_max = 0x320;
     param.latency = 0;
     param.timeout = 0x05dc;
     ret = bt_conn_le_param_update(ble_tp_conn, &param);
-    if (ret) 
+    if (ret) {
-    {
         BT_WARN("conn update failed (err %d)\r\n", ret);
-	} 
+    } else {
-	else 
-	{
         BT_WARN("conn update initiated\r\n");
     }
-	#endif
+#endif
 
-    #if !defined(CONFIG_BT_OAD_SERVER)
+#if !defined(CONFIG_BT_OAD_SERVER)
     //set data length after connected.
     ret = bt_le_set_data_len(ble_tp_conn, tx_octets, tx_time);
 
@@ -124,8 +119,7 @@ static void ble_tp_connected(struct bt_conn *conn, u8_t err)
     } else {
         BT_WARN("ble tp exchange mtu size failure, err: %d", ret);
     }
-    #endif
+#endif
-    
 }
 
 /*************************************************************************
@@ -143,6 +137,9 @@ static void ble_tp_disconnected(struct bt_conn *conn, u8_t reason)
     }
 
     ble_tp_conn = NULL;
+    extern int ble_start_adv(void);
+    ble_start_adv();
+    pds_start = true;
 }
 
 /*************************************************************************
@@ -154,18 +151,13 @@ static void ble_param_updated(struct bt_conn *conn, u16_t interval,
                               u16_t latency, u16_t timeout)
 {
     BT_WARN("LE conn param updated: int 0x%04x lat %d to %d \r\n", interval, latency, timeout);
-	#if (BLE_CONN_PDS)
+#if XTAL_32K_TYPE == EXTERNAL_XTAL_32K
-    if( interval > 80)
+    if (interval > 80) {
-    {
         pds_start = true;
-    }
+    } else {
-	else
-	{
         pds_start = false;
-		 	
     }
-	#endif
+#endif
-	
 }
 
 /*************************************************************************
@@ -278,7 +270,6 @@ static void ble_tp_notify_ccc_changed(const struct bt_gatt_attr *attr, u16_t val
     BT_WARN("ccc:value=[%d]", value);
 
     if (value == BT_GATT_CCC_NOTIFY) {
-
         if (xTaskCreate(ble_tp_notify_task, (char *)"bletp", 512, NULL, 15, &ble_tp_task_h) == pdPASS) {
             created_tp_task = 1;
             BT_WARN("Create throughput tx task success");

examples/ble/ble_pds/main.c

@@ -30,6 +30,9 @@
 #include "ble_peripheral_tp_server.h"
 #include "ble_lib_api.h"
 #include "hci_driver.h"
+#include "bl702_sec_eng.h"
+#include "hal_clock.h"
+#include "bl702_romdriver.h"
 
 #if defined(CONFIG_BT_OAD_SERVER)
 #include "oad_main.h"
@@ -62,6 +65,8 @@ extern uint32_t __system_ram_data_end__;
 #define TCM_DATA_START __tcm_data_start__
 #define TCM_DATA_END   __tcm_data_start__
 
+#define MASK_DEBUG_MSG 0
+
 extern uint8_t _heap_start;
 extern uint8_t _heap_size; // @suppress("Type cannot be resolved")
 extern uint8_t _heap2_start;
@@ -69,12 +74,14 @@ extern uint8_t _heap2_size; // @suppress("Type cannot be resolved")
 
 static HeapRegion_t xHeapRegions[] = {
     { &_heap_start, (unsigned int)&_heap_size },
-    { &_heap2_start, (unsigned int) &_heap2_size },
+    { &_heap2_start, (unsigned int)&_heap2_size },
     { NULL, 0 }, /* Terminates the array. */
     { NULL, 0 }  /* Terminates the array. */
 };
 
 bool pds_start = false;
+bool wfi_in = false;
+
 #define TIME_5MS_IN_32768CYCLE (164) // (45000/(1000000/32768))
 void bl_pds_restore(void);
 
@@ -85,13 +92,91 @@ extern int32_t rwip_get_sleep_stat_cnt(void);
 uint8_t sharedBuf[16];
 void user_vAssertCalled(void) __attribute__((weak, alias("vAssertCalled")));
 
+static void ATTR_PDS_RAM_SECTION bl702_low_power_config(void)
+{
+    uint8_t i;
+    static uint32_t regValue = 0;
+
+    // Power off DLL
+    GLB_Power_Off_DLL();
+
+    // Disable secure engine
+    Sec_Eng_Trng_Disable();
+    SEC_Eng_Turn_Off_Sec_Ring();
+
+    // Disable Zigbee clock
+    GLB_Set_MAC154_ZIGBEE_CLK(0);
+
+    // Set GPIO to High-Z state
+    for (i = 0; i <= 37; i++) {
+// jtag pins
+#if 0
+        if((i == 0) || (i == 1) || (i == 2) || (i == 9)){
+            continue;
+        }
+#endif
+
+        // uart pins
+        if ((i == 14) || (i == 15)) {
+            continue;
+        }
+        // flash pins
+        if ((i >= 23) && (i <= 28)) {
+            continue;
+        }
+
+        GLB_GPIO_Set_HZ(i);
+    }
+
+    if (regValue == 0) {
+        // Gate peripheral clock
+        for (i = 0; i <= 31; i++) {
+            if (i == BL_AHB_SLAVE1_GLB) {
+                continue;
+            }
+
+            if (i == BL_AHB_SLAVE1_MIX) {
+                continue;
+            }
+
+            if (i == BL_AHB_SLAVE1_EFUSE) {
+                continue;
+            }
+
+            if (i == BL_AHB_SLAVE1_L1C) {
+                continue;
+            }
+
+            if (i == BL_AHB_SLAVE1_SFC) {
+                continue;
+            }
+
+            if (i == BL_AHB_SLAVE1_PDS_HBN_AON_HBNRAM) {
+                continue;
+            }
+
+            if (i == BL_AHB_SLAVE1_UART0) {
+                continue;
+            }
+
+            if (i == BL_AHB_SLAVE1_TMR) {
+                continue;
+            }
+
+            GLB_AHB_Slave1_Clock_Gate(1, i);
+            regValue = BL_RD_REG(GLB_BASE, GLB_CGEN_CFG1);
+        }
+
+    } else {
+        BL_WR_REG(GLB_BASE, GLB_CGEN_CFG1, regValue);
+    }
+}
+
 void vApplicationIdleHook(void)
 {
-
+    if (!wfi_in) {
-    if(!pds_start){
         __asm volatile(
-                "   wfi     "
+            "   wfi     ");
-        );
         /*empty*/
     }
 }
@@ -175,7 +260,7 @@ void vApplicationGetTimerTaskMemory(StaticTask_t **ppxTimerTaskTCBBuffer, StackT
 extern bool le_check_valid_scan(void);
 extern bool le_check_valid_conn(void);
 //Allocate retention memory
-void *bl_alloc_retmem(size_t xWantedSize )
+void *bl_alloc_retmem(size_t xWantedSize)
 {
     return pvPortMalloc(xWantedSize);
 }
@@ -193,7 +278,7 @@ void bflb_load_hbn_ram(void)
 }
 
 // can be placed in flash, here placed in pds section to reduce fast boot time
-void ATTR_PDS_RAM_SECTION user_pds_restore_tcm(void)
+static void ATTR_PDS_RAM_SECTION user_pds_restore_tcm(void)
 {
     uint32_t src = 0;
     uint32_t dst = 0;
@@ -209,16 +294,108 @@ void ATTR_PDS_RAM_SECTION user_pds_restore_tcm(void)
         src += 4;
         dst += 4;
     }
+}
 
+/**
+ * @brief gate all clock but CPU and ble
+ *
+ */
+static void ATTR_HBN_RAM_SECTION system_clock_gate(void)
+{
+    uint32_t tmpVal;
+    tmpVal = BL_RD_REG(GLB_BASE, GLB_CGEN_CFG1);
+    tmpVal &= (~(1 << BL_AHB_SLAVE1_GPIP));    //2
+    tmpVal &= (~(1 << BL_AHB_SLAVE1_SEC_DBG)); //3
+    tmpVal &= (~(1 << BL_AHB_SLAVE1_SEC));     //4
+    tmpVal &= (~(1 << BL_AHB_SLAVE1_TZ1));     //5
+    tmpVal &= (~(1 << BL_AHB_SLAVE1_TZ2));     //6
+    tmpVal &= (~(1 << BL_AHB_SLAVE1_DMA));     //12
+    tmpVal &= (~(1 << BL_AHB_SLAVE1_EMAC));    //13
+    // tmpVal &= (~(1 << BL_AHB_SLAVE1_UART0));//14
+    tmpVal &= (~(1 << BL_AHB_SLAVE1_UART1)); //15
+    tmpVal &= (~(1 << BL_AHB_SLAVE1_SPI));   //16
+    tmpVal &= (~(1 << BL_AHB_SLAVE1_I2C));   //17
+    tmpVal &= (~(1 << BL_AHB_SLAVE1_PWM));
+    tmpVal &= (~(1 << BL_AHB_SLAVE1_IRR));
+    tmpVal &= (~(1 << BL_AHB_SLAVE1_CKS));
+    tmpVal &= (~(1 << BL_AHB_SLAVE1_QDEC));
+    tmpVal &= (~(1 << BL_AHB_SLAVE1_KYS));
+    tmpVal &= (~(1 << BL_AHB_SLAVE1_I2S));
+    tmpVal &= (~(1 << BL_AHB_SLAVE1_USB));
+    tmpVal &= (~(1 << BL_AHB_SLAVE1_CAM));
+    tmpVal &= (~(1 << BL_AHB_SLAVE1_MJPEG));
+
+    BL_WR_REG(GLB_BASE, GLB_CGEN_CFG1, tmpVal);
+
+    tmpVal = BL_RD_REG(GLB_BASE, GLB_CGEN_CFG0);
+    tmpVal &= (~(1 << 1)); //SDU clock gating
+    tmpVal &= (~(1 << 2)); //SEC clock gating
+    tmpVal &= (~(1 << 3)); //DMA clock gating
+    tmpVal &= (~(1 << 4)); //CCI clock gating
+    BL_WR_REG(GLB_BASE, GLB_CGEN_CFG0, tmpVal);
+}
+
+static BL_Err_Type ATTR_HBN_RAM_SECTION check_xtal_power_on(void)
+{
+    uint32_t tmpVal = 0;
+    uint32_t timeOut = 0;
+
+    tmpVal = BL_RD_REG(AON_BASE, AON_TSEN);
+
+    /* Polling for ready */
+    while ((!BL_IS_REG_BIT_SET(tmpVal, AON_XTAL_RDY)) && (timeOut < 120)) {
+        RomDriver_BL702_Delay_US(10);
+        timeOut++;
+        tmpVal = BL_RD_REG(AON_BASE, AON_TSEN);
+    }
+
+    if (timeOut >= 120) {
+        return TIMEOUT;
+    }
+
+    return SUCCESS;
 }
 
 // can be placed in flash, here placed in pds section to reduce fast boot time
-void ATTR_PDS_RAM_SECTION user_pds_recovery_board(void)
+static void ATTR_PDS_RAM_SECTION user_pds_recovery_board(void)
 {
-    extern void board_init(void);
+    uint32_t tmpVal;
-	extern void system_clock_init(void);
+
-    board_init();
+    system_clock_gate();
-    system_clock_init();
+
+    tmpVal = BL_RD_REG(GLB_BASE, GLB_CGEN_CFG2);
+    tmpVal &= (~(1 << 0)); //ZIGBEE clock gating
+    tmpVal &= (~(1 << 4)); //BLE clock gating
+    BL_WR_REG(GLB_BASE, GLB_CGEN_CFG2, tmpVal);
+
+#if XTAL_TYPE != INTERNAL_RC_32M
+    check_xtal_power_on();
+#endif
+    RomDriver_HBN_Set_ROOT_CLK_Sel(HBN_ROOT_CLK_XTAL);
+    SystemCoreClockSet(32000000);
+}
+
+void ATTR_PDS_RAM_SECTION user_pds_recovery_hardware(void)
+{
+    user_pds_recovery_board();
+    user_pds_restore_tcm();
+
+#if MASK_DEBUG_MSG == 0
+    /* UART_IO recovery */
+    GLB_GPIO_Cfg_Type gpio_cfg;
+
+    gpio_cfg.drive = 0;
+    gpio_cfg.smtCtrl = 1;
+    gpio_cfg.gpioMode = GPIO_MODE_AF;
+    gpio_cfg.pullType = GPIO_PULL_UP;
+    gpio_cfg.gpioPin = GLB_GPIO_PIN_14;
+    gpio_cfg.gpioFun = GPIO_FUN_UART;
+    GLB_UART_Fun_Sel((GLB_GPIO_PIN_14 % 8), (GPIO_FUN_UART0_TX & 0x07));
+    GLB_UART_Fun_Sel((GLB_GPIO_PIN_15 % 8), (GPIO_FUN_UART0_RX & 0x07));
+    GLB_GPIO_Init(&gpio_cfg);
+    gpio_cfg.gpioPin = GLB_GPIO_PIN_15;
+    GLB_GPIO_Init(&gpio_cfg);
+#endif
 }
 
 void enter_sleep(uint32_t pdsSleepCycles)
@@ -226,10 +403,10 @@ void enter_sleep(uint32_t pdsSleepCycles)
     uint32_t actualSleepDuration_ms;
     uint32_t mtimerClkCfg;
     uint32_t ulCurrentTimeHigh, ulCurrentTimeLow;
-    volatile uint32_t * const pulTimeHigh = ( volatile uint32_t * const ) ( configCLINT_BASE_ADDRESS + 0xBFFC );
+    volatile uint32_t *const pulTimeHigh = (volatile uint32_t *const)(configCLINT_BASE_ADDRESS + 0xBFFC);
-    volatile uint32_t * const pulTimeLow = ( volatile uint32_t * const ) ( configCLINT_BASE_ADDRESS + 0xBFF8 );
+    volatile uint32_t *const pulTimeLow = (volatile uint32_t *const)(configCLINT_BASE_ADDRESS + 0xBFF8);
 
-    extern volatile uint64_t * const pullMachineTimerCompareRegister;
+    extern volatile uint64_t *const pullMachineTimerCompareRegister;
     extern const size_t uxTimerIncrementsForOneTick;
     extern void vPortSetupTimerInterrupt(void);
 
@@ -238,13 +415,14 @@ void enter_sleep(uint32_t pdsSleepCycles)
     *pullMachineTimerCompareRegister -= (uxTimerIncrementsForOneTick + 1); // avoid mtimer interrupt pending
     *(volatile uint8_t *)0x02800407 = 0;
 
-    do
+    do {
-    {
         ulCurrentTimeHigh = *pulTimeHigh;
         ulCurrentTimeLow = *pulTimeLow;
-    } while( ulCurrentTimeHigh != *pulTimeHigh );
+    } while (ulCurrentTimeHigh != *pulTimeHigh);
 
+    wfi_in = true;
     actualSleepDuration_ms = hal_pds_enter_with_time_compensation(PM_PDS_LEVEL_31, pdsSleepCycles);
+    wfi_in = false;
 
     *(volatile uint32_t *)0x40000090 = mtimerClkCfg;
 
@@ -255,12 +433,10 @@ void enter_sleep(uint32_t pdsSleepCycles)
     *(volatile uint8_t *)0x02800407 = 1;
 
     vTaskStepTick(actualSleepDuration_ms);
-
 }
 
-void vApplicationSleep( TickType_t xExpectedIdleTime_ms)
+void vApplicationSleep(TickType_t xExpectedIdleTime_ms)
 {
-
     int32_t bleSleepDuration_32768cycles = 0;
     int32_t expectedIdleTime_32768cycles = 0;
     eSleepModeStatus eSleepStatus;
@@ -269,60 +445,48 @@ void vApplicationSleep( TickType_t xExpectedIdleTime_ms)
     if (pds_start == 0 || le_check_valid_scan())
         return;
 
-    if(xExpectedIdleTime_ms + xTaskGetTickCount() == portMAX_DELAY){
+    if (xExpectedIdleTime_ms + xTaskGetTickCount() == portMAX_DELAY) {
         freertos_max_idle = true;
-    }else{
+    } else {
         xExpectedIdleTime_ms -= 1;
         expectedIdleTime_32768cycles = 32768 * xExpectedIdleTime_ms / 1000;
     }
 
-    if((!freertos_max_idle)&&(expectedIdleTime_32768cycles < TIME_5MS_IN_32768CYCLE)){
+    if ((!freertos_max_idle) && (expectedIdleTime_32768cycles < TIME_5MS_IN_32768CYCLE)) {
         return;
     }
 
     eSleepStatus = eTaskConfirmSleepModeStatus();
-    if(eSleepStatus == eAbortSleep || ble_controller_sleep_is_ongoing())
+    if (eSleepStatus == eAbortSleep || ble_controller_sleep_is_ongoing()) {
-    {
         return;
     }
     bleSleepDuration_32768cycles = ble_controller_sleep();
 
-
+    if (bleSleepDuration_32768cycles < TIME_5MS_IN_32768CYCLE) {
-    if(bleSleepDuration_32768cycles < TIME_5MS_IN_32768CYCLE)
-    {
         return;
-    }
+    } else {
-    else
-    {
         MSG("Sleep_cycles=%ld,state_cnt=%d\r\n", bleSleepDuration_32768cycles, rwip_get_sleep_stat_cnt());
 
         uint32_t reduceSleepTime;
         SPI_Flash_Cfg_Type *flashCfg;
         uint32_t len;
-		extern BL_Err_Type flash_get_cfg(uint8_t **cfg_addr, uint32_t *len);
+        extern BL_Err_Type flash_get_cfg(uint8_t * *cfg_addr, uint32_t * len);
-        flash_get_cfg((uint8_t**)&flashCfg,&len);
+        flash_get_cfg((uint8_t **)&flashCfg, &len);
         uint8_t ioMode = flashCfg->ioMode & 0xF;
         uint8_t contRead = flashCfg->cReadSupport;
         uint8_t cpuClk = GLB_Get_Root_CLK_Sel();
-        if(ioMode == 4 && contRead == 1  && cpuClk == GLB_ROOT_CLK_XTAL)
+        if (ioMode == 4 && contRead == 1 && cpuClk == GLB_ROOT_CLK_XTAL) {
-        {
             reduceSleepTime = 100;
-        }
+        } else if (ioMode == 1 && contRead == 0 && cpuClk == GLB_ROOT_CLK_XTAL) {
-        else if(ioMode == 1 && contRead == 0  && cpuClk == GLB_ROOT_CLK_XTAL)
+            reduceSleepTime = 130;
-        {
+        } else {
             reduceSleepTime = 130;
         }
-        else
+
-        {
+        if (eSleepStatus == eStandardSleep && ((!freertos_max_idle) && (expectedIdleTime_32768cycles < bleSleepDuration_32768cycles))) {
-           reduceSleepTime = 130;
+            enter_sleep(expectedIdleTime_32768cycles - reduceSleepTime);
-        }
+        } else {
-        if(eSleepStatus == eStandardSleep && ((!freertos_max_idle) && (expectedIdleTime_32768cycles < bleSleepDuration_32768cycles)))
+            enter_sleep(bleSleepDuration_32768cycles - reduceSleepTime);
-        {
-           enter_sleep( expectedIdleTime_32768cycles - reduceSleepTime);
-        }
-        else
-        {
-           enter_sleep( bleSleepDuration_32768cycles - reduceSleepTime);
         }
 
         bl_pds_restore();
@@ -331,6 +495,7 @@ void vApplicationSleep( TickType_t xExpectedIdleTime_ms)
 
 void bl_pds_restore(void)
 {
+#if MASK_DEBUG_MSG == 0
     struct device *uart = device_find("debug_log");
     if (uart) {
         device_close(uart);
@@ -338,9 +503,8 @@ void bl_pds_restore(void)
         device_set_callback(uart, NULL);
         device_control(uart, DEVICE_CTRL_CLR_INT, (void *)(UART_RX_FIFO_IT));
     }
-
+#endif
-    HBN_Set_XCLK_CLK_Sel(HBN_XCLK_CLK_XTAL);
+    bl702_low_power_config();
-
     ble_controller_sleep_restore();
 }
 
@@ -359,7 +523,6 @@ int ble_start_adv(void)
     };
 
     return bt_le_adv_start(&adv_param, adv_data, ARRAY_SIZE(adv_data), NULL, 0);
-
 }
 
 #if defined(CONFIG_BT_OAD_SERVER)
@@ -384,6 +547,7 @@ void bt_enable_cb(int err)
     MSG("Start adv\r\n");
     ble_start_adv();
     MSG("Advertising.........\r\n");
+    bl702_low_power_config();
     pds_start = true;
 }
 
@@ -418,13 +582,15 @@ int main(void)
     uint32_t tmpVal = 0;
 
     bflb_load_hbn_ram();
+    bflb_platform_print_set(MASK_DEBUG_MSG);
     bflb_platform_init(0);
+    HBN_Set_Ldo11_Rt_Vout(HBN_LDO_LEVEL_1P00V);
+    HBN_Set_Ldo11_Soc_Vout(HBN_LDO_LEVEL_1P00V);
+    user_pds_recovery_board();
+
     HBN_Clear_RTC_Counter();
     HBN_Enable_RTC_Counter();
-    pm_set_tcm_recovery_callback(user_pds_restore_tcm);
+    pm_set_hardware_recovery_callback(user_pds_recovery_hardware);
-    pm_set_board_recovery_callback(user_pds_recovery_board);
-
-    HBN_Set_XCLK_CLK_Sel(HBN_XCLK_CLK_XTAL);
 
     //Set capcode
     tmpVal = BL_RD_REG(AON_BASE, AON_XTAL_CFG);
@@ -432,10 +598,12 @@ int main(void)
     tmpVal = BL_SET_REG_BITS_VAL(tmpVal, AON_XTAL_CAPCODE_OUT_AON, 33);
     BL_WR_REG(AON_BASE, AON_XTAL_CFG, tmpVal);
 
+    ble_controller_set_tx_pwr(0);
+
     vPortDefineHeapRegions(xHeapRegions);
 
     MSG("[OS] ble_init_task.....\r\n");
-    xTaskCreate( ble_init_task, "ble_init_task",  512,NULL,    15,    (TaskHandle_t * const)&ble_init_task_h);
+    xTaskCreate(ble_init_task, "ble_init_task", 512, NULL, 15, (TaskHandle_t *const) & ble_init_task_h);
 
     vTaskStartScheduler();