commit a2fca7a36d21fc9517fb31dafafc03f92fbf859b Author: jzlv Date: Tue Apr 13 19:23:11 2021 +0800 first commit diff --git a/.cproject b/.cproject new file mode 100644 index 00000000..12c85d88 --- /dev/null +++ b/.cproject @@ -0,0 +1,179 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + make + BOARD=bl706_iot + APP=helloworld + true + false + true + + + make + clean + true + false + true + + + make + INTERFACE=jlink + download + true + false + true + + + + \ No newline at end of file diff --git a/.gitignore b/.gitignore new file mode 100644 index 00000000..7628a207 --- /dev/null +++ b/.gitignore @@ -0,0 +1,23 @@ +out/* +build/* +.vscode/settings.json +.settings + +**/.cdk +**/Lst +**/Obj + +examples/**/*.mk +examples/**/*.cdkws +!examples/bl_mcu_sdk.cdkws +examples/**/*.mk +examples/**/*.bat +examples/**/cdk/*.txt + +tools/bflb_flash_tool/chips/bl702/eflash_loader/eflash_loader_cfg.ini +tools/bflb_flash_tool/chips/bl702/img_create_mcu/bootinfo.bin +tools/bflb_flash_tool/chips/bl702/img_create_mcu/img.bin +tools/bflb_flash_tool/chips/bl702/img_create_mcu/whole_img.bin +tools/bflb_flash_tool/chips/bl702/img_create_mcu/whole_img.pack +tools/bflb_flash_tool/img/project.bin +tools/bflb_flash_tool/log/* \ No newline at end of file diff --git a/.project b/.project new file mode 100644 index 00000000..ea32820e --- /dev/null +++ b/.project @@ -0,0 +1,27 @@ + + + bl_mcu_sdk + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.core.ccnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + diff --git a/CMakeLists.txt b/CMakeLists.txt new file mode 100644 index 00000000..7b69b573 --- /dev/null +++ b/CMakeLists.txt @@ -0,0 +1,23 @@ +cmake_minimum_required(VERSION 3.10) +set(CMAKE_TOOLCHAIN_FILE ${CMAKE_SOURCE_DIR}/tools/cmake/riscv64-unknown-elf-gcc.cmake) +include(${CMAKE_SOURCE_DIR}/tools/cmake/compiler_flags.cmake) +include(${CMAKE_SOURCE_DIR}/tools/cmake/tools.cmake) + +PROJECT(${BOARD} C CXX ASM) + +include_directories(${CMAKE_SOURCE_DIR}/common/misc) +include_directories(${CMAKE_SOURCE_DIR}/bsp/bsp_common/platform) +include_directories(${CMAKE_SOURCE_DIR}/bsp/board/${BOARD}) + +add_subdirectory(common) +add_subdirectory(components/fatfs) +add_subdirectory(components/usb_stack) +add_subdirectory(drivers/${mcu}_driver) + +if(${SUPPORT_SHELL} STREQUAL "ENABLE") +add_subdirectory(components/shell) +else() +endif() + +search_application(${CMAKE_SOURCE_DIR}/examples) + diff --git a/Jlink_bl_mcu_sdk.launch b/Jlink_bl_mcu_sdk.launch new file mode 100644 index 00000000..df2b3c46 --- /dev/null +++ b/Jlink_bl_mcu_sdk.launch @@ -0,0 +1,82 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/LICENSE b/LICENSE new file mode 100644 index 00000000..85f48b21 --- /dev/null +++ b/LICENSE @@ -0,0 +1,202 @@ + + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + + TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + + 1. 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However, in accepting such obligations, You may act only + on Your own behalf and on Your sole responsibility, not on behalf + of any other Contributor, and only if You agree to indemnify, + defend, and hold each Contributor harmless for any liability + incurred by, or claims asserted against, such Contributor by reason + of your accepting any such warranty or additional liability. + + END OF TERMS AND CONDITIONS + + APPENDIX: How to apply the Apache License to your work. + + To apply the Apache License to your work, attach the following + boilerplate notice, with the fields enclosed by brackets "[]" + replaced with your own identifying information. (Don't include + the brackets!) The text should be enclosed in the appropriate + comment syntax for the file format. We also recommend that a + file or class name and description of purpose be included on the + same "printed page" as the copyright notice for easier + identification within third-party archives. + + Copyright [2020] [BOUFFALO LAB (NANJING) CO., LTD.] + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. \ No newline at end of file diff --git a/Makefile b/Makefile new file mode 100644 index 00000000..99bcf1eb --- /dev/null +++ b/Makefile @@ -0,0 +1,24 @@ +BOARD?=bl706_iot +APP?=helloworld +CHIP?=bl702 +INTERFACE?=jlink +BAUDRATE ?=12000 + +export BOARD +export APP +# The command to remove a file. +RM = cmake -E rm -rf + +build: + cmake -E make_directory build + cmake -E copy project.build build + make -C ./build -f ./project.build + +download: + ./tools/bflb_flash_tool/bflb_mcu_tool --chipname=$(CHIP) --interface=$(INTERFACE) --baudrate=$(BAUDRATE) + +clean: + $(RM) out + $(RM) build +.PHONY:build clean download + diff --git a/Preload.cmake b/Preload.cmake new file mode 100644 index 00000000..6c16e991 --- /dev/null +++ b/Preload.cmake @@ -0,0 +1 @@ +set(CMAKE_GENERATOR "Unix Makefiles" CACHE INTERNAL "" FORCE) \ No newline at end of file diff --git a/README.md b/README.md new file mode 100644 index 00000000..d8b27add --- /dev/null +++ b/README.md @@ -0,0 +1,117 @@ +# 简介 + +**bl mcu sdk** 是博流智能科技团队专为 BL602/BL604,BL702/BL704/BL706 以及未来其他系列芯片提供的 MCU 软件开发包。 + +## 代码框架 + +``` + +bl_mcu_sdk +├── bsp +│ ├── board +│ │ ├── bl706_avb +│ │ ├── bl706_iot +│ │ └── bl602_xxx +│ └── bsp_common +├── common +│ ├── device +│ ├── libc +│ ├── list +│ ├── memheap +│ ├── misc +│ ├── partition +│ ├── ring_buffer +│ └── soft_crc +├── components +│ ├── fatfs +│ ├── freertos +│ ├── shell +│ └── usb_stack +├── docs +│ ├── bl70x_docs +│ ├── development_guide +├── drivers +│ ├── bl602_driver +│ └── bl702_driver +├── examples +│ ├── adc +│ ├── audio +│ ├── camera +│ ├── coremark +│ ├── dac +│ ├── dhrystone +│ ├── dma +│ ├── gpio +│ ├── hellowd +│ ├── i2c +│ ├── i2s +│ ├── memheap +│ ├── spi +│ ├── uart +│ └── usb +├── out +└── tools + ├── bflb_flash_tool + ├── cdk_flashloader + ├── cmake + └── openocd + +``` + +- bsp 存放板级相关的配置文件和驱动。 +- common 存放一些常见的函数库 +- components 存放第三方库 +- drivers 存放芯片外设驱动库 +- examples 存放外设 demo +- out 存放目标文件输出路径 +- tools 存放一些工具包 + +# 资源 + +## 硬件资源 + +- BL706 IOT 开发板 +- BL706 AVB 开发板 + +## 芯片手册 + +[芯片参考手册](https://dev.bouffalolab.com/media/upload/doc/BL702_BL704_706_RM_zh_CN_1.1.pdf)|[芯片数据手册](https://dev.bouffalolab.com/media/upload/doc/BL702_BL704_BL706_DS_zh_CN_Combo_1.7.pdf) + +更多资料请访问 BouffaloLab 开发者网站: [https://dev.bouffalolab.com/](https://dev.bouffalolab.com/) + +## 文档教程 + +[bl mcu sdk 文档教程](http://bouffalolab.gitee.io/bl_mcu_sdk) + +## 视频教程 + +- [五分钟带你了解 RISC-V 的指令集架构](https://www.bilibili.com/video/BV1aA411L77o) +- [BL706 开发板基于 Eclipse 的环境搭建](https://www.bilibili.com/video/BV1HK4y1o7P1) +- [BL706 开发板基于 CDK 的环境搭建](https://www.bilibili.com/video/BV14U4y1h7d2) + +## 工具 + +- [Eclipse](https://dev.bouffalolab.com/media/upload/download/BouffaloLab_eclipse_x86_64_win.zip) Windows 下 eclipse 开发免安装包 +- [CDK](https://occ.t-head.cn/development/activities/cdk) ，平头哥剑池 CDK 集成开发环境，建议使用 CDK v2.8.4 以上版本 +- [cmake 3.19](https://cmake.org/files/v3.19/) ， cmake 编译工具，建议使用 cmake v3.19 以上版本 +- [J-Link v10](https://www.segger.com/downloads/jlink)， J-Link 调试器，用于在线调试芯片，建议使用 J-Link V10 以上版本硬件，软件驱动建议使用 V6.98 版本 + +博流提供的图形化烧写工具： +- [Bouffalo Lab Dev Cube For Windows](https://dev.bouffalolab.com/media/upload/download/BouffaloLabDevCube-1.5.0-win32.zip) +- [Bouffalo Lab Dev Cube For Ubuntu](https://dev.bouffalolab.com/media/upload/download/bouffalo_build_tool_for_ubuntu_v1.0.0.rar) + +## 论坛 + +博流开发者交流论坛: [https://bbs.bouffalolab.com/](https://bbs.bouffalolab.com/) + +# 许可协议 + +**bl mcu sdk** 完全开源，遵循 Apache License 2.0 开源许可协议，可以免费在商业产品中使用，并且不需要公开私有代码。 + +``` +/* + * Copyright (c) 2021 Bouffalolab team + * + * SPDX-License-Identifier: Apache-2.0 + */ + ``` \ No newline at end of file diff --git a/bl_mcu_flash.launch b/bl_mcu_flash.launch new file mode 100644 index 00000000..11865fe3 --- /dev/null +++ b/bl_mcu_flash.launch @@ -0,0 +1,62 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/bsp/board/bl706_avb/bl702_config.h b/bsp/board/bl706_avb/bl702_config.h new file mode 100644 index 00000000..d241ede9 --- /dev/null +++ b/bsp/board/bl706_avb/bl702_config.h @@ -0,0 +1,7 @@ +#ifndef __BL702_CONFIG_H__ +#define __BL702_CONFIG_H__ + +#include "peripheral_config.h" +#include "clock_config.h" + +#endif \ No newline at end of file diff --git a/bsp/board/bl706_avb/board.c b/bsp/board/bl706_avb/board.c new file mode 100644 index 00000000..ac592708 --- /dev/null +++ b/bsp/board/bl706_avb/board.c @@ -0,0 +1,235 @@ +#include "hal_gpio.h" +#include "hal_clock.h" +#include "bl702_glb.h" +#include "pinmux_config.h" + +struct pin_mux_cfg +{ + uint8_t pin; + uint16_t func; +}; + +static const struct pin_mux_cfg af_pin_table[] = +{ + { + .pin = GPIO_PIN_0, + .func = CONFIG_GPIO0_FUNC + }, + { + .pin = GPIO_PIN_1, + .func = CONFIG_GPIO1_FUNC + }, + { + .pin = GPIO_PIN_2, + .func = CONFIG_GPIO2_FUNC + }, + { + .pin = GPIO_PIN_3, + .func = CONFIG_GPIO3_FUNC + }, + { + .pin = GPIO_PIN_4, + .func = CONFIG_GPIO4_FUNC + }, + { + .pin = GPIO_PIN_5, + .func = CONFIG_GPIO5_FUNC + }, + { + .pin = GPIO_PIN_6, + .func = CONFIG_GPIO6_FUNC + }, + { + .pin = GPIO_PIN_7, + .func = CONFIG_GPIO7_FUNC + }, + { + .pin = GPIO_PIN_8, + .func = CONFIG_GPIO8_FUNC + }, + { + .pin = GPIO_PIN_9, + .func = CONFIG_GPIO9_FUNC + }, + { + .pin = GPIO_PIN_10, + .func = CONFIG_GPIO10_FUNC + }, + { + .pin = GPIO_PIN_11, + .func = CONFIG_GPIO11_FUNC + }, + { + .pin = GPIO_PIN_12, + .func = CONFIG_GPIO12_FUNC + }, + { + .pin = GPIO_PIN_13, + .func = CONFIG_GPIO13_FUNC + }, + { + .pin = GPIO_PIN_14, + .func = CONFIG_GPIO14_FUNC + }, + { + .pin = GPIO_PIN_15, + .func = CONFIG_GPIO15_FUNC + }, + { + .pin = GPIO_PIN_16, + .func = CONFIG_GPIO16_FUNC + }, + { + .pin = GPIO_PIN_17, + .func = CONFIG_GPIO17_FUNC + }, + { + .pin = GPIO_PIN_18, + .func = CONFIG_GPIO18_FUNC + }, + { + .pin = GPIO_PIN_19, + .func = CONFIG_GPIO19_FUNC + }, + { + .pin = GPIO_PIN_20, + .func = CONFIG_GPIO20_FUNC + }, + { + .pin = GPIO_PIN_21, + .func = CONFIG_GPIO21_FUNC + }, + { + .pin = GPIO_PIN_22, + .func = CONFIG_GPIO22_FUNC + }, + { + .pin = GPIO_PIN_23, + .func = CONFIG_GPIO23_FUNC + }, + { + .pin = GPIO_PIN_24, + .func = CONFIG_GPIO24_FUNC + }, + { + .pin = GPIO_PIN_25, + .func = CONFIG_GPIO25_FUNC + }, + { + .pin = GPIO_PIN_26, + .func = CONFIG_GPIO26_FUNC + }, + { + .pin = GPIO_PIN_27, + .func = CONFIG_GPIO27_FUNC + }, + { + .pin = GPIO_PIN_28, + .func = CONFIG_GPIO28_FUNC + }, + { + .pin = GPIO_PIN_29, + .func = CONFIG_GPIO29_FUNC + }, + { + .pin = GPIO_PIN_30, + .func = CONFIG_GPIO30_FUNC + }, + { + .pin = GPIO_PIN_31, + .func = CONFIG_GPIO31_FUNC + }, + { + .pin = GPIO_PIN_32, + .func = CONFIG_GPIO32_FUNC + }, + { + .pin = GPIO_PIN_33, + .func = CONFIG_GPIO33_FUNC + }, + { + .pin = GPIO_PIN_34, + .func = CONFIG_GPIO34_FUNC + }, + { + .pin = GPIO_PIN_35, + .func = CONFIG_GPIO35_FUNC + }, + { + .pin = GPIO_PIN_36, + .func = CONFIG_GPIO36_FUNC + }, + { + .pin = GPIO_PIN_37, + .func = CONFIG_GPIO37_FUNC + } + +}; + +static void board_pin_mux_init(void) +{ + GLB_GPIO_Cfg_Type gpio_cfg; + + gpio_cfg.drive = 0; + gpio_cfg.smtCtrl = 1; + gpio_cfg.gpioMode = GPIO_MODE_AF; + gpio_cfg.pullType = GPIO_PULL_UP; + + for (int i = 0; i < sizeof(af_pin_table)/sizeof(af_pin_table[0]); i++) + { + gpio_cfg.gpioPin = af_pin_table[i].pin; + gpio_cfg.gpioFun = af_pin_table[i].func; + + if(af_pin_table[i].func == GPIO_FUN_UNUSED) + { + continue; + } + else if(af_pin_table[i].func == GPIO_FUN_PWM) + { + gpio_cfg.pullType = GPIO_PULL_DOWN; + } + else if((af_pin_table[i].func & 0x70) == 0x70) + { + gpio_cfg.gpioFun = GPIO_FUN_UART; + uint8_t sig = af_pin_table[i].func & 0x07; + GLB_UART_Fun_Sel((gpio_cfg.gpioPin % 8), sig); + } + GLB_GPIO_Init(&gpio_cfg); + } + +} + +static void board_clock_init(void) +{ + system_clock_init(); + peripheral_clock_init(); +} + +void bl_show_info(void) +{ + MSG(" ____ __ __ _ _ _ \r\n"); + MSG(" | _ \\ / _|/ _| | | | | | | \r\n"); + MSG(" | |_) | ___ _ _| |_| |_ __ _| | ___ | | __ _| |__ \r\n"); + MSG(" | _ < / _ \\| | | | _| _/ _` | |/ _ \\| |/ _` | '_ \\ \r\n"); + MSG(" | |_) | (_) | |_| | | | || (_| | | (_) | | (_| | |_) |\r\n"); + MSG(" |____/ \\___/ \\__,_|_| |_| \\__,_|_|\\___/|_|\\__,_|_.__/ \r\n"); + MSG("\r\n"); + MSG("Build:%s,%s\r\n",__TIME__,__DATE__); + MSG("2016 - 2030 Copyright by bouffalolab team\r\n"); + +#if 0 + MSG("root clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_ROOT_CLOCK)/1000000); + MSG("fclk clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_FCLK)/1000000); + MSG("bclk clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_BCLK)/1000000); + + MSG("uart clock:%dM\r\n",peripheral_clock_get(PERIPHERAL_CLOCK_UART)/1000000); + MSG("spi clock:%dM\r\n",peripheral_clock_get(PERIPHERAL_CLOCK_SPI)/1000000); + MSG("i2c clock:%dM\r\n",peripheral_clock_get(PERIPHERAL_CLOCK_I2C)/1000000); +#endif +} + +void board_init(void) +{ + board_clock_init(); + board_pin_mux_init(); +} \ No newline at end of file diff --git a/bsp/board/bl706_avb/clock_config.h b/bsp/board/bl706_avb/clock_config.h new file mode 100644 index 00000000..f9d414b1 --- /dev/null +++ b/bsp/board/bl706_avb/clock_config.h @@ -0,0 +1,44 @@ +#ifndef _CLOCK_CONFIG_H +#define _CLOCK_CONFIG_H + +#define BSP_ROOT_CLOCK_SOURCE ROOT_CLOCK_SOURCE_DLL_144M + +#if defined(BSP_ROOT_CLOCK_SOURCE) +#define BSP_HCLK_DIV 0 +#define BSP_BCLK_DIV 1 +#endif + +#if defined(BSP_USING_UART0)||defined(BSP_USING_UART1) +#define BSP_UART_CLOCK_SOURCE ROOT_CLOCK_SOURCE_DLL_96M +#define BSP_UART_CLOCK_DIV 0 +#endif +#if defined(BSP_USING_I2C0) +#define BSP_I2C_CLOCK_SOURCE ROOT_CLOCK_SOURCE_DLL_BCLK +#define BSP_I2C_CLOCK_DIV 0 +#endif +#if defined(BSP_USING_SPI0) +#define BSP_SPI_CLOCK_SOURCE ROOT_CLOCK_SOURCE_DLL_BCLK +#define BSP_SPI_CLOCK_DIV 0 +#endif +#if defined(BSP_USING_PWM) +#define BSP_PWM_CLOCK_SOURCE ROOT_CLOCK_SOURCE_DLL_XCLK +#define BSP_PWM_CLOCK_DIV 0 +#endif +#if defined(BSP_USING_IR) +#define BSP_IR_CLOCK_SOURCE ROOT_CLOCK_SOURCE_DLL_XCLK +#define BSP_IR_CLOCK_DIV 0 +#endif +#if defined(BSP_USING_I2S0) +#define BSP_I2S_CLOCK_SOURCE ROOT_CLOCK_SOURCE_DLL_XCLK +#define BSP_I2S_CLOCK_DIV 0 +#endif +#if defined(BSP_USING_ADC0) +#define BSP_ADC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_DLL_XCLK +#define BSP_ADC_CLOCK_DIV 0 +#endif +#if defined(BSP_USING_DAC0) +#define BSP_DAC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_DLL_XCLK +#define BSP_DAC_CLOCK_DIV 0 +#endif + +#endif \ No newline at end of file diff --git a/bsp/board/bl706_avb/peripheral_config.h b/bsp/board/bl706_avb/peripheral_config.h new file mode 100644 index 00000000..ed56edbe --- /dev/null +++ b/bsp/board/bl706_avb/peripheral_config.h @@ -0,0 +1,278 @@ +#ifndef _PERIPHERAL_CONFIG_H_ +#define _PERIPHERAL_CONFIG_H_ + +/* PERIPHERAL USING LIST */ +#define BSP_USING_ADC0 +#define BSP_USING_DAC0 +#define BSP_USING_UART0 +#define BSP_USING_UART1 +#define BSP_USING_SPI0 +#define BSP_USING_I2C0 +#define BSP_USING_I2S0 +#define BSP_USING_USB +#define BSP_USING_PWM0 +/* ----------------------*/ + + +/* PERIPHERAL With DMA LIST */ + +#define BSP_USING_DMA0_CH0 +#define BSP_USING_DMA0_CH1 + +#ifdef BSP_USING_UART1 +#define BSP_USING_DMA0_CH2 +#endif + +#ifdef BSP_USING_SPI0 +#define BSP_USING_DMA0_CH3 +#define BSP_USING_DMA0_CH4 +#endif + +#ifdef BSP_USING_I2S0 +#define BSP_USING_DMA0_CH2 +#endif + +#ifdef BSP_USING_DAC0 +#define BSP_USING_DMA0_CH6 +#endif + + +/* PERIPHERAL CONFIG */ +#if defined(BSP_USING_ADC0) +#ifndef ADC_CONFIG +#define ADC_CONFIG \ +{ \ + .clk = ADC_CLK_500KHZ,\ + .vref = ADC_VREF_3P2V,\ + .resWidth = ADC_DATA_WIDTH_16_WITH_256_AVERAGE,\ +} +#endif +#endif + +#if defined(BSP_USING_DAC0) +#ifndef DAC_CONFIG +#define DAC_CONFIG \ +{ \ + .clk = DAC_CLK_500KHZ,\ + .pin.dac0 = GLB_GPIO_PIN_11,\ + .pin.pin_num = 1,\ +} +#endif +#endif + +#if defined(BSP_USING_UART0) +#ifndef UART0_CONFIG +#define UART0_CONFIG \ +{ \ + .id = 0, \ + .baudrate = 2000000,\ + .databits = UART_DATA_LEN_8, \ + .stopbits = UART_STOP_ONE, \ + .parity = UART_PAR_NONE, \ + .fifo_threshold = 1, \ +} +#endif +#endif + +#if defined(BSP_USING_UART1) +#ifndef UART1_CONFIG +#define UART1_CONFIG \ +{ \ + .id = 1, \ + .baudrate = 2000000,\ + .databits = UART_DATA_LEN_8, \ + .stopbits = UART_STOP_ONE, \ + .parity = UART_PAR_NONE, \ + .fifo_threshold = 64, \ +} +#endif +#endif + +#if defined(BSP_USING_SPI0) +#ifndef SPI0_CONFIG +#define SPI0_CONFIG \ +{ \ + .id = 0, \ + .clk = 18000000,\ + .mode = SPI_MASTER_MODE, \ + .direction = SPI_MSB_BYTE0_DIRECTION_FIRST, \ + .clk_polaraity = SPI_POLARITY_LOW, \ + .clk_phase = SPI_PHASE_1EDGE, \ + .datasize = SPI_DATASIZE_8BIT, \ + .fifo_threshold = 1, \ +} +#endif +#endif + +#if defined(BSP_USING_PWM0) +#ifndef PWM_CONFIG_0 +#define PWM_CONFIG_0 \ +{ \ + .pin = GPIO_PIN_22, \ + .frequency = 1000000, \ + .dutyCycle = 0, \ +} +#endif +#endif + +#if defined(BSP_USING_I2S0) +#ifndef I2S0_CONFIG +#define I2S0_CONFIG \ +{ \ + .id = 0, \ + .iis_mode = I2S_MODE_MASTER,\ + .interface_mode = I2S_MODE_LEFT, \ + .sampl_freq_hz = 16*1000, \ + .channel_num = I2S_FS_CHANNELS_NUM_MONO, \ + .frame_size = I2S_FRAME_LEN_16, \ + .data_size = I2S_DATA_LEN_16, \ + .fifo_threshold = 8, \ +} +#endif +#endif + +#if defined(BSP_USING_DMA0_CH0) +#ifndef DMA0_CH0_CONFIG +#define DMA0_CH0_CONFIG \ +{ \ + .id = 0, \ + .ch = 0,\ + .direction = DMA_MEMORY_TO_MEMORY,\ + .transfer_mode = DMA_LLI_ONCE_MODE, \ + .src_req = DMA_REQUEST_NONE, \ + .dst_req = DMA_REQUEST_NONE, \ + .src_width = DMA_TRANSFER_WIDTH_32BIT , \ + .dst_width = DMA_TRANSFER_WIDTH_32BIT , \ +} +#endif +#endif + +#if defined(BSP_USING_DMA0_CH1) +#ifndef DMA0_CH1_CONFIG +#define DMA0_CH1_CONFIG \ +{ \ + .id = 0, \ + .ch = 1,\ + .direction = DMA_MEMORY_TO_MEMORY, \ + .transfer_mode = DMA_LLI_ONCE_MODE, \ + .src_req = DMA_REQUEST_NONE, \ + .dst_req = DMA_REQUEST_NONE, \ + .src_width = DMA_TRANSFER_WIDTH_16BIT , \ + .dst_width = DMA_TRANSFER_WIDTH_16BIT , \ +} +#endif +#endif + +#if defined(BSP_USING_DMA0_CH2) +#ifndef DMA0_CH2_CONFIG +#define DMA0_CH2_CONFIG \ +{ \ + .id = 0, \ + .ch = 2,\ + .direction = DMA_MEMORY_TO_PERIPH, \ + .transfer_mode = DMA_LLI_ONCE_MODE, \ + .src_req = DMA_REQUEST_NONE, \ + .dst_req = DMA_REQUEST_UART1_TX, \ + .src_width = DMA_TRANSFER_WIDTH_8BIT , \ + .dst_width = DMA_TRANSFER_WIDTH_8BIT , \ +} +#endif +#endif + + +#if defined(BSP_USING_DMA0_CH3) +#ifndef DMA0_CH3_CONFIG +#define DMA0_CH3_CONFIG \ +{ \ + .id = 0, \ + .ch = 3,\ + .direction = DMA_MEMORY_TO_PERIPH, \ + .transfer_mode = DMA_LLI_ONCE_MODE, \ + .src_req = DMA_REQUEST_NONE, \ + .dst_req = DMA_REQUEST_SPI0_TX, \ + .src_width = DMA_TRANSFER_WIDTH_8BIT , \ + .dst_width = DMA_TRANSFER_WIDTH_8BIT , \ +} +#endif +#endif + +#if defined(BSP_USING_DMA0_CH4) +#ifndef DMA0_CH4_CONFIG +#define DMA0_CH4_CONFIG \ +{ \ + .id = 0, \ + .ch = 4,\ + .direction = DMA_PERIPH_TO_MEMORY, \ + .transfer_mode = DMA_LLI_ONCE_MODE, \ + .src_req = DMA_REQUEST_SPI0_RX, \ + .dst_req = DMA_REQUEST_NONE, \ + .src_width = DMA_TRANSFER_WIDTH_8BIT , \ + .dst_width = DMA_TRANSFER_WIDTH_8BIT , \ +} +#endif +#endif + + +#if defined(BSP_USING_DMA0_CH5) +#ifndef DMA0_CH5_CONFIG +#define DMA0_CH5_CONFIG \ +{ \ + .id = 0, \ + .ch = 5,\ + .direction = DMA_MEMORY_TO_PERIPH, \ + .transfer_mode = DMA_LLI_CYCLE_MODE, \ + .src_req = DMA_REQUEST_NONE, \ + .dst_req = DMA_REQUEST_I2S_TX, \ + .src_width = DMA_TRANSFER_WIDTH_16BIT , \ + .dst_width = DMA_TRANSFER_WIDTH_16BIT , \ +} +#endif +#endif + +#if defined(BSP_USING_DMA0_CH6) +#ifndef DMA0_CH6_CONFIG +#define DMA0_CH6_CONFIG \ +{ \ + .id = 0, \ + .ch = 6,\ + .direction = DMA_MEMORY_TO_PERIPH, \ + .transfer_mode = DMA_LLI_CYCLE_MODE, \ + .src_req = DMA_REQUEST_NONE, \ + .dst_req = DMA_REQUEST_I2S_TX, \ + .src_width = DMA_TRANSFER_WIDTH_16BIT , \ + .dst_width = DMA_TRANSFER_WIDTH_16BIT , \ +} +#endif +#endif + + +#if defined(BSP_USING_DMA0_CH7) +#ifndef DMA0_CH7_CONFIG +#define DMA0_CH7_CONFIG \ +{ \ + .id = 0, \ + .ch = 0,\ + .direction = DMA_MEMORY_TO_MEMORY,\ + .transfer_mode = DMA_LLI_ONCE_MODE, \ + .src_req = DMA_REQUEST_NONE, \ + .dst_req = DMA_REQUEST_NONE, \ + .src_width = DMA_TRANSFER_WIDTH_32BIT , \ + .dst_width = DMA_TRANSFER_WIDTH_32BIT , \ +} +#endif +#endif + + + +#if defined(BSP_USING_I2C0) +#ifndef I2C0_CONFIG +#define I2C0_CONFIG \ +{ \ + .id = 0, \ + .mode = I2C_HW_MODE,\ + .phase = 15, \ +} +#endif +#endif + +#endif diff --git a/bsp/board/bl706_avb/pinmux_config.h b/bsp/board/bl706_avb/pinmux_config.h new file mode 100644 index 00000000..047fa999 --- /dev/null +++ b/bsp/board/bl706_avb/pinmux_config.h @@ -0,0 +1,180 @@ +/** + * @file pinmux_config.h + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ +#ifndef _PINMUX_CONFIG_H +#define _PINMUX_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// GPIO0 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio0 function +#define CONFIG_GPIO0_FUNC GPIO_FUN_UNUSED + +// GPIO1 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_CTS//GPIO_FUN_UART1_CTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio1 function +#define CONFIG_GPIO1_FUNC GPIO_FUN_UNUSED + +// GPIO2 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_TX//GPIO_FUN_UART1_TX//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio2 function +#define CONFIG_GPIO2_FUNC GPIO_FUN_UNUSED + +// GPIO3 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_RX//GPIO_FUN_UART1_RX//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio3 function +#define CONFIG_GPIO3_FUNC GPIO_FUN_UNUSED + +// GPIO4 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio4 function +#define CONFIG_GPIO4_FUNC GPIO_FUN_UNUSED + +// GPIO5 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_CTS//GPIO_FUN_UART1_CTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio5 function +#define CONFIG_GPIO5_FUNC GPIO_FUN_UNUSED + +// GPIO6 <2> [GPIO_FUN_UNUSED//GPIO_FUN_CLK_OUT//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_TX//GPIO_FUN_UART1_TX//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio6 function +#define CONFIG_GPIO6_FUNC GPIO_FUN_UNUSED + +// GPIO7 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RX//GPIO_FUN_UART1_RX//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio7 function +#define CONFIG_GPIO7_FUNC GPIO_FUN_USB + +// GPIO8 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio8 function +#define CONFIG_GPIO8_FUNC GPIO_FUN_USB + +// GPIO9 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio9 function +#define CONFIG_GPIO9_FUNC GPIO_FUN_UNUSED + +// GPIO10 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio10 function +#define CONFIG_GPIO10_FUNC GPIO_FUN_UNUSED + +// GPIO11 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio11 function +#define CONFIG_GPIO11_FUNC GPIO_FUN_UNUSED + +// GPIO12 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio12 function +#define CONFIG_GPIO12_FUNC GPIO_FUN_UNUSED + +// GPIO13 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio13 function +#define CONFIG_GPIO13_FUNC GPIO_FUN_UNUSED + +// GPIO14 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio14 function +#define CONFIG_GPIO14_FUNC GPIO_FUN_UART0_TX + +// GPIO15 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio15 function +#define CONFIG_GPIO15_FUNC GPIO_FUN_UART0_RX + +// GPIO16 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio16 function +#define CONFIG_GPIO16_FUNC GPIO_FUN_UNUSED + +// GPIO17 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio17 function +#define CONFIG_GPIO17_FUNC GPIO_FUN_UNUSED + +// GPIO18 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio18 function +#define CONFIG_GPIO18_FUNC GPIO_FUN_UART1_TX + +// GPIO19 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio19 function +#define CONFIG_GPIO19_FUNC GPIO_FUN_UART1_RX + +// GPIO20 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio20 function +#define CONFIG_GPIO20_FUNC GPIO_FUN_UNUSED + +// GPIO21 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio21 function +#define CONFIG_GPIO21_FUNC GPIO_FUN_UNUSED + +// GPIO22 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio22 function +#define CONFIG_GPIO22_FUNC GPIO_FUN_UNUSED + +// GPIO23 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio23 function +#define CONFIG_GPIO23_FUNC GPIO_FUN_UNUSED + +// GPIO24 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio24 function +#define CONFIG_GPIO24_FUNC GPIO_FUN_UNUSED + +// GPIO25 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio25 function +#define CONFIG_GPIO25_FUNC GPIO_FUN_UNUSED + +// GPIO26 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio26 function +#define CONFIG_GPIO26_FUNC GPIO_FUN_UNUSED + +// GPIO27 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio27 function +#define CONFIG_GPIO27_FUNC GPIO_FUN_UNUSED + +// GPIO28 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio28 function +#define CONFIG_GPIO28_FUNC GPIO_FUN_UNUSED + +// GPIO29 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio29 function +#define CONFIG_GPIO29_FUNC GPIO_FUN_UNUSED + +// GPIO30 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio30 function +#define CONFIG_GPIO30_FUNC GPIO_FUN_UNUSED + +// GPIO31 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio31 function +#define CONFIG_GPIO31_FUNC GPIO_FUN_UNUSED + +// GPIO32 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio32 function +#define CONFIG_GPIO32_FUNC GPIO_FUN_UNUSED + +// GPIO33 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio33 function +#define CONFIG_GPIO33_FUNC GPIO_FUN_UNUSED + +// GPIO34 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio34 function +#define CONFIG_GPIO34_FUNC GPIO_FUN_UNUSED + +// GPIO35 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio35 function +#define CONFIG_GPIO35_FUNC GPIO_FUN_UNUSED + +// GPIO36 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio36 function +#define CONFIG_GPIO36_FUNC GPIO_FUN_UNUSED + +// GPIO37 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio37 function +#define CONFIG_GPIO37_FUNC GPIO_FUN_UNUSED + +#endif diff --git a/bsp/board/bl706_iot/bl702_config.h b/bsp/board/bl706_iot/bl702_config.h new file mode 100644 index 00000000..766085fc --- /dev/null +++ b/bsp/board/bl706_iot/bl702_config.h @@ -0,0 +1,30 @@ +/** + * @file bl702_config.h + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ + +#ifndef __BL702_CONFIG_H__ +#define __BL702_CONFIG_H__ + +#include "peripheral_config.h" +#include "clock_config.h" + +#endif \ No newline at end of file diff --git a/bsp/board/bl706_iot/board.c b/bsp/board/bl706_iot/board.c new file mode 100644 index 00000000..03181750 --- /dev/null +++ b/bsp/board/bl706_iot/board.c @@ -0,0 +1,258 @@ +/** + * @file board.c + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ + +#include "hal_gpio.h" +#include "hal_clock.h" +#include "bl702_glb.h" +#include "pinmux_config.h" + +struct pin_mux_cfg +{ + uint8_t pin; + uint16_t func; +}; + +static const struct pin_mux_cfg af_pin_table[] = +{ + { + .pin = GPIO_PIN_0, + .func = CONFIG_GPIO0_FUNC + }, + { + .pin = GPIO_PIN_1, + .func = CONFIG_GPIO1_FUNC + }, + { + .pin = GPIO_PIN_2, + .func = CONFIG_GPIO2_FUNC + }, + { + .pin = GPIO_PIN_3, + .func = CONFIG_GPIO3_FUNC + }, + { + .pin = GPIO_PIN_4, + .func = CONFIG_GPIO4_FUNC + }, + { + .pin = GPIO_PIN_5, + .func = CONFIG_GPIO5_FUNC + }, + { + .pin = GPIO_PIN_6, + .func = CONFIG_GPIO6_FUNC + }, + { + .pin = GPIO_PIN_7, + .func = CONFIG_GPIO7_FUNC + }, + { + .pin = GPIO_PIN_8, + .func = CONFIG_GPIO8_FUNC + }, + { + .pin = GPIO_PIN_9, + .func = CONFIG_GPIO9_FUNC + }, + { + .pin = GPIO_PIN_10, + .func = CONFIG_GPIO10_FUNC + }, + { + .pin = GPIO_PIN_11, + .func = CONFIG_GPIO11_FUNC + }, + { + .pin = GPIO_PIN_12, + .func = CONFIG_GPIO12_FUNC + }, + { + .pin = GPIO_PIN_13, + .func = CONFIG_GPIO13_FUNC + }, + { + .pin = GPIO_PIN_14, + .func = CONFIG_GPIO14_FUNC + }, + { + .pin = GPIO_PIN_15, + .func = CONFIG_GPIO15_FUNC + }, + { + .pin = GPIO_PIN_16, + .func = CONFIG_GPIO16_FUNC + }, + { + .pin = GPIO_PIN_17, + .func = CONFIG_GPIO17_FUNC + }, + { + .pin = GPIO_PIN_18, + .func = CONFIG_GPIO18_FUNC + }, + { + .pin = GPIO_PIN_19, + .func = CONFIG_GPIO19_FUNC + }, + { + .pin = GPIO_PIN_20, + .func = CONFIG_GPIO20_FUNC + }, + { + .pin = GPIO_PIN_21, + .func = CONFIG_GPIO21_FUNC + }, + { + .pin = GPIO_PIN_22, + .func = CONFIG_GPIO22_FUNC + }, + { + .pin = GPIO_PIN_23, + .func = CONFIG_GPIO23_FUNC + }, + { + .pin = GPIO_PIN_24, + .func = CONFIG_GPIO24_FUNC + }, + { + .pin = GPIO_PIN_25, + .func = CONFIG_GPIO25_FUNC + }, + { + .pin = GPIO_PIN_26, + .func = CONFIG_GPIO26_FUNC + }, + { + .pin = GPIO_PIN_27, + .func = CONFIG_GPIO27_FUNC + }, + { + .pin = GPIO_PIN_28, + .func = CONFIG_GPIO28_FUNC + }, + { + .pin = GPIO_PIN_29, + .func = CONFIG_GPIO29_FUNC + }, + { + .pin = GPIO_PIN_30, + .func = CONFIG_GPIO30_FUNC + }, + { + .pin = GPIO_PIN_31, + .func = CONFIG_GPIO31_FUNC + }, + { + .pin = GPIO_PIN_32, + .func = CONFIG_GPIO32_FUNC + }, + { + .pin = GPIO_PIN_33, + .func = CONFIG_GPIO33_FUNC + }, + { + .pin = GPIO_PIN_34, + .func = CONFIG_GPIO34_FUNC + }, + { + .pin = GPIO_PIN_35, + .func = CONFIG_GPIO35_FUNC + }, + { + .pin = GPIO_PIN_36, + .func = CONFIG_GPIO36_FUNC + }, + { + .pin = GPIO_PIN_37, + .func = CONFIG_GPIO37_FUNC + } + +}; + +static void board_pin_mux_init(void) +{ + GLB_GPIO_Cfg_Type gpio_cfg; + + gpio_cfg.drive = 0; + gpio_cfg.smtCtrl = 1; + gpio_cfg.gpioMode = GPIO_MODE_AF; + gpio_cfg.pullType = GPIO_PULL_UP; + + for (int i = 0; i < sizeof(af_pin_table)/sizeof(af_pin_table[0]); i++) + { + gpio_cfg.gpioPin = af_pin_table[i].pin; + gpio_cfg.gpioFun = af_pin_table[i].func; + + if(af_pin_table[i].func == GPIO_FUN_UNUSED) + { + continue; + } + else if(af_pin_table[i].func == GPIO_FUN_PWM) + { + gpio_cfg.pullType = GPIO_PULL_DOWN; + } + else if((af_pin_table[i].func & 0x70) == 0x70) + { + gpio_cfg.gpioFun = GPIO_FUN_UART; + uint8_t sig = af_pin_table[i].func & 0x07; + GLB_UART_Fun_Sel((gpio_cfg.gpioPin % 8), sig); + } + GLB_GPIO_Init(&gpio_cfg); + } + +} + +static void board_clock_init(void) +{ + system_clock_init(); + peripheral_clock_init(); +} + +void bl_show_info(void) +{ + MSG(" ____ __ __ _ _ _ \r\n"); + MSG(" | _ \\ / _|/ _| | | | | | | \r\n"); + MSG(" | |_) | ___ _ _| |_| |_ __ _| | ___ | | __ _| |__ \r\n"); + MSG(" | _ < / _ \\| | | | _| _/ _` | |/ _ \\| |/ _` | '_ \\ \r\n"); + MSG(" | |_) | (_) | |_| | | | || (_| | | (_) | | (_| | |_) |\r\n"); + MSG(" |____/ \\___/ \\__,_|_| |_| \\__,_|_|\\___/|_|\\__,_|_.__/ \r\n"); + MSG("\r\n"); + MSG("Build:%s,%s\r\n",__TIME__,__DATE__); + MSG("2016 - 2030 Copyright by bouffalolab team\r\n"); + +#if 0 + MSG("root clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_ROOT_CLOCK)/1000000); + MSG("fclk clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_FCLK)/1000000); + MSG("bclk clock:%dM\r\n",system_clock_get(SYSTEM_CLOCK_BCLK)/1000000); + + MSG("uart clock:%dM\r\n",peripheral_clock_get(PERIPHERAL_CLOCK_UART)/1000000); + MSG("spi clock:%dM\r\n",peripheral_clock_get(PERIPHERAL_CLOCK_SPI)/1000000); + MSG("i2c clock:%dM\r\n",peripheral_clock_get(PERIPHERAL_CLOCK_I2C)/1000000); +#endif +} + +void board_init(void) +{ + board_clock_init(); + board_pin_mux_init(); +} \ No newline at end of file diff --git a/bsp/board/bl706_iot/clock_config.h b/bsp/board/bl706_iot/clock_config.h new file mode 100644 index 00000000..14365b4c --- /dev/null +++ b/bsp/board/bl706_iot/clock_config.h @@ -0,0 +1,67 @@ +/** + * @file clock_config.h + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ + +#ifndef _CLOCK_CONFIG_H +#define _CLOCK_CONFIG_H + +#define BSP_ROOT_CLOCK_SOURCE ROOT_CLOCK_SOURCE_DLL_144M + +#if defined(BSP_ROOT_CLOCK_SOURCE) +#define BSP_HCLK_DIV 0 +#define BSP_BCLK_DIV 1 +#endif + +#if defined(BSP_USING_UART0)||defined(BSP_USING_UART1) +#define BSP_UART_CLOCK_SOURCE ROOT_CLOCK_SOURCE_DLL_96M +#define BSP_UART_CLOCK_DIV 0 +#endif +#if defined(BSP_USING_I2C0) +#define BSP_I2C_CLOCK_SOURCE ROOT_CLOCK_SOURCE_DLL_BCLK +#define BSP_I2C_CLOCK_DIV 0 +#endif +#if defined(BSP_USING_SPI0) +#define BSP_SPI_CLOCK_SOURCE ROOT_CLOCK_SOURCE_DLL_BCLK +#define BSP_SPI_CLOCK_DIV 0 +#endif +#if defined(BSP_USING_PWM) +#define BSP_PWM_CLOCK_SOURCE ROOT_CLOCK_SOURCE_DLL_XCLK +#define BSP_PWM_CLOCK_DIV 0 +#endif +#if defined(BSP_USING_IR) +#define BSP_IR_CLOCK_SOURCE ROOT_CLOCK_SOURCE_DLL_XCLK +#define BSP_IR_CLOCK_DIV 0 +#endif +#if defined(BSP_USING_I2S0) +#define BSP_I2S_CLOCK_SOURCE ROOT_CLOCK_SOURCE_DLL_XCLK +#define BSP_I2S_CLOCK_DIV 0 +#endif +#if defined(BSP_USING_ADC0) +#define BSP_ADC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_DLL_XCLK +#define BSP_ADC_CLOCK_DIV 0 +#endif +#if defined(BSP_USING_DAC0) +#define BSP_DAC_CLOCK_SOURCE ROOT_CLOCK_SOURCE_DLL_XCLK +#define BSP_DAC_CLOCK_DIV 0 +#endif + +#endif \ No newline at end of file diff --git a/bsp/board/bl706_iot/peripheral_config.h b/bsp/board/bl706_iot/peripheral_config.h new file mode 100644 index 00000000..5bd50fe4 --- /dev/null +++ b/bsp/board/bl706_iot/peripheral_config.h @@ -0,0 +1,301 @@ +/** + * @file peripheral_config.h + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ + +#ifndef _PERIPHERAL_CONFIG_H_ +#define _PERIPHERAL_CONFIG_H_ + +/* PERIPHERAL USING LIST */ +#define BSP_USING_ADC0 +#define BSP_USING_DAC0 +#define BSP_USING_UART0 +#define BSP_USING_UART1 +#define BSP_USING_SPI0 +#define BSP_USING_I2C0 +#define BSP_USING_I2S0 +#define BSP_USING_USB +#define BSP_USING_PWM0 +/* ----------------------*/ + + +/* PERIPHERAL With DMA LIST */ + +#define BSP_USING_DMA0_CH0 +#define BSP_USING_DMA0_CH1 + +#ifdef BSP_USING_UART1 +#define BSP_USING_DMA0_CH2 +#endif + +#ifdef BSP_USING_SPI0 +#define BSP_USING_DMA0_CH3 +#define BSP_USING_DMA0_CH4 +#endif + +#ifdef BSP_USING_I2S0 +#define BSP_USING_DMA0_CH2 +#endif + +#ifdef BSP_USING_DAC0 +#define BSP_USING_DMA0_CH6 +#endif + + +/* PERIPHERAL CONFIG */ +#if defined(BSP_USING_ADC0) +#ifndef ADC_CONFIG +#define ADC_CONFIG \ +{ \ + .clk = ADC_CLK_500KHZ,\ + .vref = ADC_VREF_3P2V,\ + .resWidth = ADC_DATA_WIDTH_16_WITH_256_AVERAGE,\ +} +#endif +#endif + +#if defined(BSP_USING_DAC0) +#ifndef DAC_CONFIG +#define DAC_CONFIG \ +{ \ + .clk = DAC_CLK_500KHZ,\ + .pin.dac0 = GLB_GPIO_PIN_11,\ + .pin.pin_num = 1,\ +} +#endif +#endif + +#if defined(BSP_USING_UART0) +#ifndef UART0_CONFIG +#define UART0_CONFIG \ +{ \ + .id = 0, \ + .baudrate = 2000000,\ + .databits = UART_DATA_LEN_8, \ + .stopbits = UART_STOP_ONE, \ + .parity = UART_PAR_NONE, \ + .fifo_threshold = 1, \ +} +#endif +#endif + +#if defined(BSP_USING_UART1) +#ifndef UART1_CONFIG +#define UART1_CONFIG \ +{ \ + .id = 1, \ + .baudrate = 2000000,\ + .databits = UART_DATA_LEN_8, \ + .stopbits = UART_STOP_ONE, \ + .parity = UART_PAR_NONE, \ + .fifo_threshold = 64, \ +} +#endif +#endif + +#if defined(BSP_USING_SPI0) +#ifndef SPI0_CONFIG +#define SPI0_CONFIG \ +{ \ + .id = 0, \ + .clk = 18000000,\ + .mode = SPI_MASTER_MODE, \ + .direction = SPI_MSB_BYTE0_DIRECTION_FIRST, \ + .clk_polaraity = SPI_POLARITY_LOW, \ + .clk_phase = SPI_PHASE_1EDGE, \ + .datasize = SPI_DATASIZE_8BIT, \ + .fifo_threshold = 1, \ +} +#endif +#endif + +#if defined(BSP_USING_PWM0) +#ifndef PWM_CONFIG_0 +#define PWM_CONFIG_0 \ +{ \ + .ch = 2, \ + .frequency = 1000000, \ + .dutyCycle = 0, \ +} +#endif +#endif + +#if defined(BSP_USING_I2S0) +#ifndef I2S0_CONFIG +#define I2S0_CONFIG \ +{ \ + .id = 0, \ + .iis_mode = I2S_MODE_MASTER,\ + .interface_mode = I2S_MODE_LEFT, \ + .sampl_freq_hz = 16*1000, \ + .channel_num = I2S_FS_CHANNELS_NUM_MONO, \ + .frame_size = I2S_FRAME_LEN_16, \ + .data_size = I2S_DATA_LEN_16, \ + .fifo_threshold = 8, \ +} +#endif +#endif + +#if defined(BSP_USING_DMA0_CH0) +#ifndef DMA0_CH0_CONFIG +#define DMA0_CH0_CONFIG \ +{ \ + .id = 0, \ + .ch = 0,\ + .direction = DMA_MEMORY_TO_MEMORY,\ + .transfer_mode = DMA_LLI_ONCE_MODE, \ + .src_req = DMA_REQUEST_NONE, \ + .dst_req = DMA_REQUEST_NONE, \ + .src_width = DMA_TRANSFER_WIDTH_32BIT , \ + .dst_width = DMA_TRANSFER_WIDTH_32BIT , \ +} +#endif +#endif + +#if defined(BSP_USING_DMA0_CH1) +#ifndef DMA0_CH1_CONFIG +#define DMA0_CH1_CONFIG \ +{ \ + .id = 0, \ + .ch = 1,\ + .direction = DMA_MEMORY_TO_MEMORY, \ + .transfer_mode = DMA_LLI_ONCE_MODE, \ + .src_req = DMA_REQUEST_NONE, \ + .dst_req = DMA_REQUEST_NONE, \ + .src_width = DMA_TRANSFER_WIDTH_16BIT , \ + .dst_width = DMA_TRANSFER_WIDTH_16BIT , \ +} +#endif +#endif + +#if defined(BSP_USING_DMA0_CH2) +#ifndef DMA0_CH2_CONFIG +#define DMA0_CH2_CONFIG \ +{ \ + .id = 0, \ + .ch = 2,\ + .direction = DMA_MEMORY_TO_PERIPH, \ + .transfer_mode = DMA_LLI_ONCE_MODE, \ + .src_req = DMA_REQUEST_NONE, \ + .dst_req = DMA_REQUEST_UART1_TX, \ + .src_width = DMA_TRANSFER_WIDTH_8BIT , \ + .dst_width = DMA_TRANSFER_WIDTH_8BIT , \ +} +#endif +#endif + + +#if defined(BSP_USING_DMA0_CH3) +#ifndef DMA0_CH3_CONFIG +#define DMA0_CH3_CONFIG \ +{ \ + .id = 0, \ + .ch = 3,\ + .direction = DMA_MEMORY_TO_PERIPH, \ + .transfer_mode = DMA_LLI_ONCE_MODE, \ + .src_req = DMA_REQUEST_NONE, \ + .dst_req = DMA_REQUEST_SPI0_TX, \ + .src_width = DMA_TRANSFER_WIDTH_8BIT , \ + .dst_width = DMA_TRANSFER_WIDTH_8BIT , \ +} +#endif +#endif + +#if defined(BSP_USING_DMA0_CH4) +#ifndef DMA0_CH4_CONFIG +#define DMA0_CH4_CONFIG \ +{ \ + .id = 0, \ + .ch = 4,\ + .direction = DMA_PERIPH_TO_MEMORY, \ + .transfer_mode = DMA_LLI_ONCE_MODE, \ + .src_req = DMA_REQUEST_SPI0_RX, \ + .dst_req = DMA_REQUEST_NONE, \ + .src_width = DMA_TRANSFER_WIDTH_8BIT , \ + .dst_width = DMA_TRANSFER_WIDTH_8BIT , \ +} +#endif +#endif + + +#if defined(BSP_USING_DMA0_CH5) +#ifndef DMA0_CH5_CONFIG +#define DMA0_CH5_CONFIG \ +{ \ + .id = 0, \ + .ch = 5,\ + .direction = DMA_MEMORY_TO_PERIPH, \ + .transfer_mode = DMA_LLI_CYCLE_MODE, \ + .src_req = DMA_REQUEST_NONE, \ + .dst_req = DMA_REQUEST_I2S_TX, \ + .src_width = DMA_TRANSFER_WIDTH_16BIT , \ + .dst_width = DMA_TRANSFER_WIDTH_16BIT , \ +} +#endif +#endif + +#if defined(BSP_USING_DMA0_CH6) +#ifndef DMA0_CH6_CONFIG +#define DMA0_CH6_CONFIG \ +{ \ + .id = 0, \ + .ch = 6,\ + .direction = DMA_MEMORY_TO_PERIPH, \ + .transfer_mode = DMA_LLI_CYCLE_MODE, \ + .src_req = DMA_REQUEST_NONE, \ + .dst_req = DMA_REQUEST_I2S_TX, \ + .src_width = DMA_TRANSFER_WIDTH_16BIT , \ + .dst_width = DMA_TRANSFER_WIDTH_16BIT , \ +} +#endif +#endif + + +#if defined(BSP_USING_DMA0_CH7) +#ifndef DMA0_CH7_CONFIG +#define DMA0_CH7_CONFIG \ +{ \ + .id = 0, \ + .ch = 0,\ + .direction = DMA_MEMORY_TO_MEMORY,\ + .transfer_mode = DMA_LLI_ONCE_MODE, \ + .src_req = DMA_REQUEST_NONE, \ + .dst_req = DMA_REQUEST_NONE, \ + .src_width = DMA_TRANSFER_WIDTH_32BIT , \ + .dst_width = DMA_TRANSFER_WIDTH_32BIT , \ +} +#endif +#endif + + + +#if defined(BSP_USING_I2C0) +#ifndef I2C0_CONFIG +#define I2C0_CONFIG \ +{ \ + .id = 0, \ + .mode = I2C_HW_MODE,\ + .phase = 15, \ +} +#endif +#endif + +#endif diff --git a/bsp/board/bl706_iot/pinmux_config.h b/bsp/board/bl706_iot/pinmux_config.h new file mode 100644 index 00000000..990d562c --- /dev/null +++ b/bsp/board/bl706_iot/pinmux_config.h @@ -0,0 +1,180 @@ +/** + * @file pinmux_config.h + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ +#ifndef _PINMUX_CONFIG_H +#define _PINMUX_CONFIG_H + +// <<< Use Configuration Wizard in Context Menu >>> + +// GPIO0 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio0 function +#define CONFIG_GPIO0_FUNC GPIO_FUN_UNUSED + +// GPIO1 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_CTS//GPIO_FUN_UART1_CTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio1 function +#define CONFIG_GPIO1_FUNC GPIO_FUN_UNUSED + +// GPIO2 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_TX//GPIO_FUN_UART1_TX//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio2 function +#define CONFIG_GPIO2_FUNC GPIO_FUN_UNUSED + +// GPIO3 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_RX//GPIO_FUN_UART1_RX//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio3 function +#define CONFIG_GPIO3_FUNC GPIO_FUN_UNUSED + +// GPIO4 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio4 function +#define CONFIG_GPIO4_FUNC GPIO_FUN_UNUSED + +// GPIO5 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_CTS//GPIO_FUN_UART1_CTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio5 function +#define CONFIG_GPIO5_FUNC GPIO_FUN_UNUSED + +// GPIO6 <2> [GPIO_FUN_UNUSED//GPIO_FUN_CLK_OUT//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_UART0_TX//GPIO_FUN_UART1_TX//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio6 function +#define CONFIG_GPIO6_FUNC GPIO_FUN_UNUSED + +// GPIO7 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RX//GPIO_FUN_UART1_RX//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio7 function +#define CONFIG_GPIO7_FUNC GPIO_FUN_USB + +// GPIO8 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio8 function +#define CONFIG_GPIO8_FUNC GPIO_FUN_USB + +// GPIO9 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio9 function +#define CONFIG_GPIO9_FUNC GPIO_FUN_UNUSED + +// GPIO10 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio10 function +#define CONFIG_GPIO10_FUNC GPIO_FUN_UNUSED + +// GPIO11 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio11 function +#define CONFIG_GPIO11_FUNC GPIO_FUN_UNUSED + +// GPIO12 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio12 function +#define CONFIG_GPIO12_FUNC GPIO_FUN_UNUSED + +// GPIO13 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio13 function +#define CONFIG_GPIO13_FUNC GPIO_FUN_UNUSED + +// GPIO14 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio14 function +#define CONFIG_GPIO14_FUNC GPIO_FUN_UART0_TX + +// GPIO15 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio15 function +#define CONFIG_GPIO15_FUNC GPIO_FUN_UART0_RX + +// GPIO16 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio16 function +#define CONFIG_GPIO16_FUNC GPIO_FUN_UNUSED + +// GPIO17 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio17 function +#define CONFIG_GPIO17_FUNC GPIO_FUN_UNUSED + +// GPIO18 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio18 function +#define CONFIG_GPIO18_FUNC GPIO_FUN_UART1_TX + +// GPIO19 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio19 function +#define CONFIG_GPIO19_FUNC GPIO_FUN_UART1_RX + +// GPIO20 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio20 function +#define CONFIG_GPIO20_FUNC GPIO_FUN_UNUSED + +// GPIO21 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio21 function +#define CONFIG_GPIO21_FUNC GPIO_FUN_UNUSED + +// GPIO22 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio22 function +#define CONFIG_GPIO22_FUNC GPIO_FUN_PWM + +// GPIO23 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio23 function +#define CONFIG_GPIO23_FUNC GPIO_FUN_UNUSED + +// GPIO24 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio24 function +#define CONFIG_GPIO24_FUNC GPIO_FUN_UNUSED + +// GPIO25 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio25 function +#define CONFIG_GPIO25_FUNC GPIO_FUN_UNUSED + +// GPIO26 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio26 function +#define CONFIG_GPIO26_FUNC GPIO_FUN_UNUSED + +// GPIO27 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio27 function +#define CONFIG_GPIO27_FUNC GPIO_FUN_UNUSED + +// GPIO28 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio28 function +#define CONFIG_GPIO28_FUNC GPIO_FUN_UNUSED + +// GPIO29 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio29 function +#define CONFIG_GPIO29_FUNC GPIO_FUN_UNUSED + +// GPIO30 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio30 function +#define CONFIG_GPIO30_FUNC GPIO_FUN_UNUSED + +// GPIO31 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio31 function +#define CONFIG_GPIO31_FUNC GPIO_FUN_UNUSED + +// GPIO32 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio32 function +#define CONFIG_GPIO32_FUNC GPIO_FUN_UNUSED + +// GPIO33 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio33 function +#define CONFIG_GPIO33_FUNC GPIO_FUN_UNUSED + +// GPIO34 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio34 function +#define CONFIG_GPIO34_FUNC GPIO_FUN_UNUSED + +// GPIO35 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio35 function +#define CONFIG_GPIO35_FUNC GPIO_FUN_UNUSED + +// GPIO36 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio36 function +#define CONFIG_GPIO36_FUNC GPIO_FUN_UNUSED + +// GPIO37 <2> [GPIO_FUN_UNUSED//GPIO_FUN_I2S//GPIO_FUN_SPI//GPIO_FUN_I2C//GPIO_FUN_PWM//GPIO_FUN_CAM//GPIO_FUN_USB//GPIO_FUN_UART0_RTS//GPIO_FUN_UART1_RTS//GPIO_FUN_ETHER_MAC//GPIO_FUN_QDEC] +// config gpio37 function +#define CONFIG_GPIO37_FUNC GPIO_FUN_UNUSED + +#endif diff --git a/bsp/bsp_common/audio/audio_core.c b/bsp/bsp_common/audio/audio_core.c new file mode 100644 index 00000000..27ac7266 --- /dev/null +++ b/bsp/bsp_common/audio/audio_core.c @@ -0,0 +1,78 @@ +/** + * @file audio_proto.c + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ +#include "drv_device.h" +#include "audio_core.h" +#include "hal_dma.h" + +volatile int (*buffer_ready_callback_func)(char bufIndex); +volatile audio_core_t * audio_core_cfg_store; +volatile int bufferIndex = 0; + +void audio_core_transfer_done(struct device *dev, void *args, uint32_t size, uint32_t state){ + + if(!state){ + if(buffer_ready_callback_func){ + buffer_ready_callback_func(bufferIndex); + } + + if(bufferIndex){ + bufferIndex = 0; + device_write(audio_core_cfg_store->audio_device,0,audio_core_cfg_store->buff1,audio_core_cfg->buff_size); + }else{ + bufferIndex = 1; + device_write(audio_core_cfg_store->audio_device,0,audio_core_cfg_store->buff2,audio_core_cfg->buff_size); + } + } +} + +int audio_core_init(audio_core_t * audio_core_cfg){ + + if(audio_core_cfg->audio_dma == NULL || + audio_core_cfg->buff_size == NULL|| + audio_core_cfg->buff1 == NULL || + audio_core_cfg->buff2 == NULL){ + return -1; + } + + + memset(audio_core_cfg->buff1,0,audio_core_cfg->buff_size); + memset(audio_core_cfg->buff2,0,audio_core_cfg->buff_size); + + device_control(audio_core_cfg->audio_device,DEVICE_CTRL_ATTACH_TX_DMA,(void*)audio_core_cfg->audio_dma); + + device_set_callback(audio_core_cfg->audio_dma, audio_core_transfer_done); + + buffer_ready_callback_func = audio_core_cfg->buffer_ready_callback; + audio_core_cfg_store = audio_core_cfg; + + device_control(audio_core_cfg->audio_dma, DEVICE_CTRL_SET_INT, NULL); + +} + +int audio_core_start(void){ + device_write(audio_core_cfg_store->audio_device,0,audio_core_cfg_store->buff1,audio_core_cfg_store->buff_size); +} + +int audio_core_stop(void){ + dma_channel_stop(audio_core_cfg_store->audio_dma); +} + diff --git a/bsp/bsp_common/audio/audio_core.h b/bsp/bsp_common/audio/audio_core.h new file mode 100644 index 00000000..997e02a2 --- /dev/null +++ b/bsp/bsp_common/audio/audio_core.h @@ -0,0 +1,45 @@ +/** + * @file audio_core.h + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ + +#ifndef __AUDIO_PROTO__ +#define __AUDIO_PROTO__ + +#include "misc.h" + +typedef struct{ + + uint8_t *buff1; + uint8_t *buff2; + uint32_t buff_size; + + struct device * audio_dma; + struct device * audio_device; + + int (*buffer_ready_callback)(char bufIndex); + +}audio_core_t; + +int audio_core_init(audio_core_t * audio_core_cfg); +int audio_core_start(void); +int audio_core_stop(void); +#endif \ No newline at end of file diff --git a/bsp/bsp_common/audio/bl_audio_structure.md b/bsp/bsp_common/audio/bl_audio_structure.md new file mode 100644 index 00000000..86497707 --- /dev/null +++ b/bsp/bsp_common/audio/bl_audio_structure.md @@ -0,0 +1,42 @@ +# bl音频协议框架 + +## 核心音频播放组件 + +如下图所示 + +[![c1Q8qe.jpg](https://z3.ax1x.com/2021/04/06/c1Q8qe.jpg)](https://imgtu.com/i/c1Q8qe) + + +整体框架分为两个部分，一个部分是由核心组件提供的双缓存结构，另一个部分是用户的实际使用代码。 + +**核心组件需要两个构件** + +1 双缓存，用户需要在自己的应用中开辟两块长度相同的内存块，将其指针传入核心组件。 + +2 dma组件，用户需要将配置好了的 dma device 指针传入核心组件，此dma的作用是将设备的数据通过P->M写回Buffer 或者 将数据通过M->P写入Device。搬运的request需要在device的配置参数中给定。 + + + +**核心组件后的运行逻辑** + +当用户打开音频构架的核心组件代码后 +组件会首先初始化Buffer1和Buffer2的内容，初始化为0，并且立即打开DMA搬运。 +当DMA搬运结束，会触发Buffer_Ready中断回调。 + +在录音的应用下 + +打开核心组件后，DMA会根据Device的DMA Request，把录音数据搬运到Buffer1和Buffer2，用户需要做的是在Buffer_Ready中断回调发生后，将对应Buffer取出来，保存、或者通过下文提到的协议发送。 + +在播放音频的应用下 + +打开核心组件后，DMA会立即播放Buffer1和Buffer2的数据，但是因为最开始的时候已经初始化Buffer数据为0，所以不会有任何声音播放。用户需要在Buffer_Ready中断回调发生后，以合适的方式，将需要播放的PCM音频数据更新到Buffer中（此过程必须在下一个Buffer消耗完成之前，否则会产生问题），如果在buffer2的数据消耗结束之前还没能完成buffer1的数据更新，那么需要考虑如何加快数据更新速度，或者增加Buffer的size以提供更多操作时间。 + + +## 2 通讯协议约定 + +当用户代码部分需要与外界进行通讯时，需要统一规范一个交互的协议，这样不同的音频应用可以兼容相同的audio_cube。 + +1 传输音频文件流（目前仅支持wav格式播放） +2 每次传输的字节数，使用规范的约定字节数 +3 是否支持校验 +4 播放/暂停 停止 音量调整的固定协议 \ No newline at end of file diff --git a/bsp/bsp_common/audio/wav_info_parser.c b/bsp/bsp_common/audio/wav_info_parser.c new file mode 100644 index 00000000..8cf00117 --- /dev/null +++ b/bsp/bsp_common/audio/wav_info_parser.c @@ -0,0 +1,76 @@ +/** + * @file wav_info_parser.c + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ + +#include "wav_info_parser.h" + +/* get File pointer from top of file*/ +int wav_data_parser(uint8_t buff[1024], wav_information_t *wav_information) +{ + uint32_t offset=0; + uint32_t chunk_id; + + /* RIFF WAVE Chunk */ + chunk_id = ((chunk_riff_t *)&buff[offset])->chunk_id; + if(chunk_id == 0x46464952) + { + wav_information->chunk_riff_offset = offset; + wav_information->chunk_riff = *((chunk_riff_t *)&buff[offset]); + offset += sizeof(chunk_riff_t); + }else{ + wav_information->chunk_riff_offset = -1; + return 1; + } + /* Format Chunk */ + chunk_id = ((chunk_format_t *)&buff[offset])->chunk_id; + if(chunk_id == 0x20746D66 && offset<1000) /* fmt */ + { + wav_information->chunk_format_offset = offset; + wav_information->chunk_format = *((chunk_format_t *)&buff[offset]); + offset += ((chunk_format_t*)&buff[offset])->chunk_size + 8; + }else + { + wav_information->chunk_format_offset = -1; + return 1; + } + /* Fact/list Chunk */ + chunk_id = ((chunk_fact_t *)&buff[offset])->chunk_id; + if((chunk_id == 0X74636166 || chunk_id == 0X5453494C) && offset<1000) /*fact or list*/ + { + wav_information->chunk_fact_offset = offset; + wav_information->chunk_fact = *((chunk_fact_t *)&buff[offset]); + offset += ((chunk_fact_t*)&buff[offset])->chunk_size + 8; + }else{ + wav_information->chunk_fact_offset = -1; + } + /* Data Chunk */ + chunk_id = ((chunk_data_t *)&buff[offset])->chunk_id; + if(chunk_id == 0X61746164 && offset<1000 ) + { + wav_information->chunk_data_offset = offset; + wav_information->chunk_data = *((chunk_data_t *)&buff[offset]); + }else{ + wav_information->chunk_data_offset = -1; + return 1; + } + return 0; +} \ No newline at end of file diff --git a/bsp/bsp_common/audio/wav_info_parser.h b/bsp/bsp_common/audio/wav_info_parser.h new file mode 100644 index 00000000..608401c5 --- /dev/null +++ b/bsp/bsp_common/audio/wav_info_parser.h @@ -0,0 +1,89 @@ +/** + * @file wav_info_parser.h + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ + +#ifndef __WAV_INFO_PARSER__ +#define __WAV_INFO_PARSER__ + +#include "bl_common.h" + +/* RIFF (RIFF WAVE Chunk) */ +typedef struct __attribute__((packed)) +{ + uint32_t chunk_id; + uint32_t chunk_size; + uint32_t format; +}chunk_riff_t ; + +/* fmt (Format Chunk)*/ +typedef struct __attribute__((packed)) +{ + uint32_t chunk_id; + uint32_t chunk_size ; + uint16_t audio_format; + uint16_t num_of_channels; + uint32_t sample_rate; + uint32_t byte_rate; + uint16_t block_align; + uint16_t bits_per_sample; +}chunk_format_t; + +//fact (Fact Chunk) +typedef struct __attribute__((packed)) +{ + uint32_t chunk_id; + uint32_t chunk_size ; + uint32_t data_fact_size; +}chunk_fact_t; + +//data (Data Chunk) +typedef struct __attribute__((packed)) +{ + uint32_t chunk_id; + uint32_t chunk_size ; +}chunk_data_t; + +// +typedef enum +{ + CHUNK_RIFF, + CHUNK_FORMAT, + CHUNK_FACT, + CHUNK_DATA, +}mav_chunk_t; + +//.wav information +typedef struct +{ + int chunk_riff_offset; + chunk_riff_t chunk_riff; + int chunk_format_offset; + chunk_format_t chunk_format; + int chunk_fact_offset; + chunk_fact_t chunk_fact; + int chunk_data_offset; + chunk_data_t chunk_data; +}wav_information_t; + +int wav_data_parser(uint8_t buff[1024], wav_information_t *wav_information); + +#endif \ No newline at end of file diff --git a/bsp/bsp_common/es8388/bsp_es8388.c b/bsp/bsp_common/es8388/bsp_es8388.c new file mode 100644 index 00000000..51f6fc55 --- /dev/null +++ b/bsp/bsp_common/es8388/bsp_es8388.c @@ -0,0 +1,482 @@ +/** + * @file bsp_es8388.c + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ + +#include "bflb_platform.h" +#include "hal_i2c.h" +#include "bsp_es8388.h" + +/** @addtogroup BL702_STD_PERIPH_DRIVER + * @{ + */ + +/** @addtogroup ES8388 + * @{ + */ + +/** @defgroup ES8388_Private_Macros + * @{ + */ + +#define ES8388_I2C_SLAVE_ADDR 0x10 + +/*@} end of group ES8388_Private_Macros */ + +/** @defgroup ES8388_Private_Types + * @{ + */ + +/*@} end of group ES8388_Private_Types */ + +/** @defgroup ES8388_Private_Variables + * @{ + */ + +/*@} end of group ES8388_Private_Variables */ + +/** @defgroup ES8388_Global_Variables + * @{ + */ + +/*@} end of group ES8388_Global_Variables */ + +/** @defgroup ES8388_Private_Fun_Declaration + * @{ + */ + +/*@} end of group ES8388_Private_Fun_Declaration */ + +/** @defgroup ES8388_Private_Functions_User_Define + * @{ + */ + +/*@} end of group ES8388_Private_Functions_User_Define */ + +/** @defgroup ES8388_Private_Functions + * @{ + */ + +struct device *es8388_i2c = NULL; + +/****************************************************************************//** + * @brief ES8388 write register + * + * @param addr: Register address + * @param data: data + * + * @return None + * +*******************************************************************************/ +BL_Err_Type ES8388_Write_Reg(uint8_t addr, uint8_t data) +{ + i2c_msg_t msg1; + + msg1.slaveaddr = ES8388_I2C_SLAVE_ADDR, + msg1.len = 1, + msg1.buf = &data; + msg1.flags = SUB_ADDR_1BYTE | I2C_WR; + msg1.subaddr = addr; + bflb_platform_delay_ms(10); + return i2c_transfer(es8388_i2c, &msg1, 1); + +} + +/****************************************************************************//** + * @brief ES8388_Read_Reg + * + * @param addr: Register address + * @param rdata: data + * + * @return None + * +*******************************************************************************/ +BL_Err_Type ES8388_Read_Reg(uint8_t addr, uint8_t* rdata) +{ + i2c_msg_t msg1; + msg1.len = 1, + msg1.buf = rdata; + msg1.subaddr = addr; + msg1.slaveaddr = ES8388_I2C_SLAVE_ADDR, + msg1.flags = SUB_ADDR_1BYTE | I2C_RD; + return i2c_transfer(es8388_i2c, &msg1, 1); + +} + +/****************************************************************************//** + * @brief ES8388 codec mode + * + * @param cfg: None + * + * @return None + * +*******************************************************************************/ +void ES8388_Codec_Mode(ES8388_Cfg_Type * cfg){ + uint8_t tempVal = 0; + + ES8388_Write_Reg(0x01,0x58);//power down whole chip analog + ES8388_Write_Reg(0x01,0x50);//power up whole chip analog + + ES8388_Write_Reg(0x02,0xf3);//power down ADC/DAC and reset ADC/DAC state machine + ES8388_Write_Reg(0x02,0xf0);//power on ADC/DAC + + ES8388_Write_Reg(0x2B,0x80);//set internal ADC and DAC use sanme LRCK clock + + ES8388_Write_Reg(0x00,0x36);//ADC clock is same as DAC . DACMCLK is the chip master clock source + + if(cfg->role == ES8388_MASTER){ + ES8388_Write_Reg(0x08,0x80); + }else{ + ES8388_Write_Reg(0x08,0x00); + } + + ES8388_Write_Reg(0x04,0x00);//power up dac + + ES8388_Write_Reg(0x05,0x00);//stop lowpower mode + ES8388_Write_Reg(0x06,0xc3);//stop lowpower mode + + if(cfg->mic_input_mode == ES8388_SINGLE_ENDED_MIC){ + /* + * default set LINPUT1 and RINPUT1 as single ended mic input + * if user want to use LINPUT2 and RINPUT2 as input + * please set 0x0a register as 0x50 + */ + ES8388_Write_Reg(0x0A,0x00);//select lin1 and rin1 as micphone input + }else{ + /* + * defualt select LIN1 and RIN1 as Mic diff input + * if user want to use LIN2 and RIN2 as input + * please set 0x0b register as 0x82 + */ + ES8388_Write_Reg(0x0A,0xf0);//set micphone input as difference mode + ES8388_Write_Reg(0x0B,0x02);//set LIN1 and RIN1 as micphone different input + } + + tempVal = cfg->data_width; + tempVal <<= 2; + tempVal |= cfg->i2s_frame; + + ES8388_Write_Reg(0x0C,tempVal); //ADC I2S Format sel as i2s_frame , data len as data_width + + tempVal = cfg->data_width; + tempVal <<= 2; + tempVal |= cfg->i2s_frame; + tempVal <<= 1; + + ES8388_Write_Reg(0x17,tempVal); //DAC I2S Format sel as i2s_frame , data len as data_width + + /* when work in master mode , BCLK is devided form MCLK + * default divider is 256 , see datasheet reigster 13 + */ + if(cfg->role == ES8388_MASTER){ + ES8388_Write_Reg(0x0d,0x02);//ADCLRCK = MCLK/256 + ES8388_Write_Reg(0x18,0x02);//DACLRCK = MCLK/256 + } + + /*set ADC/DAC default volume as 0 db */ + ES8388_Write_Reg(0x10,0x00);//LADC volume as 0db + ES8388_Write_Reg(0x11,0x00);//RADC volume as 0db + ES8388_Write_Reg(0x1A,0x00);//LDAC volume as 0db + ES8388_Write_Reg(0x1B,0x00);//RDAC volume as 0db + + tempVal = cfg->mic_pga; + tempVal <<=4 ; + tempVal |= cfg->mic_pga; + + ES8388_Write_Reg(0x09,tempVal);//set ADC PGA as mic pga + + /*ADC ALC default Setting */ + ES8388_Write_Reg(0x12,0xE2); + ES8388_Write_Reg(0x13,0xC0); + ES8388_Write_Reg(0x14,0x12); + ES8388_Write_Reg(0x15,0x06); + ES8388_Write_Reg(0x16,0xC3); + + /*Mixer setting for LDAC to LOUT and RDAC TO ROUT + * default close mixer + */ + ES8388_Write_Reg(0x27,0xB8); + ES8388_Write_Reg(0x2A,0xB8); + + ES8388_Write_Reg(0x02,0x00);//startup FSM and DLL + bflb_platform_delay_ms(500); + + /* set LOUT1 ROUT1 LOUT2 ROUT2 volume */ + ES8388_Write_Reg(0x2e,0x1E); + ES8388_Write_Reg(0x2f,0x1E); + ES8388_Write_Reg(0x30,0x1E); + ES8388_Write_Reg(0x31,0x1E); + + //ES8388_Write_Reg(0x04,0x3C);//enable LOUT & ROUT + ES8388_Write_Reg(0x04,0x24); + ES8388_Write_Reg(0x26,0x01); + ES8388_Write_Reg(0x03,0x09);//power up ADC Enable LIN &RIN. + +} + + +/****************************************************************************//** + * @brief ES8388 recording mode + * + * @param cfg: None + * + * @return None + * +*******************************************************************************/ +void ES8388_Recording_Mode(ES8388_Cfg_Type * cfg){ + uint8_t tempVal = 0; + MSG("RECORDING\r\n"); + ES8388_Write_Reg(0x01,0x58);//power down whole chip analog + ES8388_Write_Reg(0x01,0x50);//power up whole chip analog + + ES8388_Write_Reg(0x02,0xf3);//power down ADC/DAC and reset ADC/DAC state machine + ES8388_Write_Reg(0x02,0xf0);//power on ADC/DAC + ES8388_Write_Reg(0x2B,0x80);//set internal ADC and DAC use the same LRCK clock + ES8388_Write_Reg(0x00,0x16);//ADC clock is same as DAC. use ADC MCLK as internal MCLK + + if(cfg->role == ES8388_MASTER){ + ES8388_Write_Reg(0x08,0x80); + }else{ + ES8388_Write_Reg(0x08,0x00); + } + + ES8388_Write_Reg(0x04,0xc0); + ES8388_Write_Reg(0x05,0x00); + ES8388_Write_Reg(0x06,0xc3); + + if(cfg->mic_input_mode == ES8388_SINGLE_ENDED_MIC){ + /* + * default set LINPUT1 and RINPUT1 as single ended mic input + * if user want to use LINPUT2 and RINPUT2 as input + * please set 0x0a register as 0x50 + */ + //ES8388_Write_Reg(0x0A,0x00);//select lin1 and rin1 as micphone input + ES8388_Write_Reg(0x0A,0xf8); + ES8388_Write_Reg(0x0B,0x88); //analog mono mix to left ADC + //ES8388_Write_Reg(0x0B,0x90); //analog mono mix to right ADC + }else{ + /* + * defualt select LIN1 and RIN1 as Mic diff input + * if user want to use LIN2 and RIN2 as input + * please set 0x0b register as 0x82 + */ + //ES8388_Write_Reg(0x0A,0xf0);//set micphone input as difference mode + //ES8388_Write_Reg(0x0B,0x02);//set LIN1 and RIN1 as micphone different input + ES8388_Write_Reg(0x0A,0xf8); // Fixed stereo problems + ES8388_Write_Reg(0x0B,0x82); // stereo + } + + tempVal = cfg->data_width; + tempVal <<= 2; + tempVal |= cfg->i2s_frame; + + ES8388_Write_Reg(0x0C,tempVal); //ADC I2S Format sel as i2s_frame , data len as data_width + + ES8388_Write_Reg(0x0d,0x02);//ADC LRCK = MCLK/256 + + ES8388_Write_Reg(0x10,0x00);//ADC VOLUME = 0 DB + ES8388_Write_Reg(0x11,0x00);//set ADC VOLUME as 0 DB + + tempVal = cfg->mic_pga; + tempVal <<= 4; + tempVal |= cfg->mic_pga; + + ES8388_Write_Reg(0x09,tempVal);//MIC PGA SEL + + ES8388_Write_Reg(0x12,0xe2);//MIC ALC SETTING + + ES8388_Write_Reg(0x13,0xc0); + ES8388_Write_Reg(0x14,0x12); + ES8388_Write_Reg(0x15,0x06); + ES8388_Write_Reg(0x16,0xc3); + + ES8388_Write_Reg(0x02,0x55); //startup FSM and DLL + ES8388_Write_Reg(0x03,0x09); //power up adc , enable LIN and RIN +} + + +/****************************************************************************//** + * @brief ES8388 Playback mode + * + * @param cfg: None + * + * @return None + * +*******************************************************************************/ +void ES8388_Playback_Mode(ES8388_Cfg_Type * cfg){ + uint8_t tempVal = 0; + + ES8388_Write_Reg(0x00,0x80); //Reset control port register to default + ES8388_Write_Reg(0x00,0x06); //Close reset + bflb_platform_delay_ms(10); + ES8388_Write_Reg(0x02,0xF3); //Stop STM, DLL and digital block + + if(cfg->role == ES8388_MASTER){ + ES8388_Write_Reg(0x08,0x80); + }else{ + ES8388_Write_Reg(0x08,0x00); + } + + ES8388_Write_Reg(0x2B,0x80); //Set ADC and DAC have the same LRCK + ES8388_Write_Reg(0x00,0x05); //Start up reference + ES8388_Write_Reg(0x01,0x40); //Start up reference + bflb_platform_delay_ms(30); + ES8388_Write_Reg(0x03,0x00); //Power on ADC and LIN/RIN input + ES8388_Write_Reg(0x04,0x3F); //Power on DAC and LOUT/ROUT input + + + /* Set ADC */ + ES8388_Write_Reg(0x09,0x77); //MicBoost PGA = +21dB + ES8388_Write_Reg(0x0A,0xF0); //Differential input + ES8388_Write_Reg(0x0B,0x02); //Select LIN1 and RIN1 as differential input pairs + + tempVal = cfg->data_width; + tempVal <<= 2; + tempVal |= cfg->i2s_frame; + + ES8388_Write_Reg(0x0C,tempVal); //ADC I2S Format sel as i2s_frame , data len as data_width + + ES8388_Write_Reg(0x0D,0x04); //MCLK / LRCK = 512 + ES8388_Write_Reg(0x10,0x00); //LADC volume = 0dB + ES8388_Write_Reg(0x11,0x00); //RADC volume = 0dB + ES8388_Write_Reg(0x12,0xE2); //ALC enable, PGA Max.Gain = 23.5dB, Min.Gain = 0dB + ES8388_Write_Reg(0x13,0xC0); //ALC target = -4.5dB, ALC hold time = 0 ms + ES8388_Write_Reg(0x14,0x12); //Decay time = 820us, attack time = 416us + ES8388_Write_Reg(0x15,0x06); //ALC mode + ES8388_Write_Reg(0x16,0xC3); //Nose gate =-40.5dB, NGG = 0x01(mute ADC) + + tempVal = cfg->data_width; + tempVal <<= 2; + tempVal |= cfg->i2s_frame; + tempVal <<= 1; + + ES8388_Write_Reg(0x18,0x04); //MCLK / LRCK = 512 + ES8388_Write_Reg(0x1A,0x00); //LDAC volume = 0dB + ES8388_Write_Reg(0x1B,0x00); //RDAC volume = 0dB + ES8388_Write_Reg(0x26,0x00); //Setup mixer + ES8388_Write_Reg(0x27,0xB8); //Setup mixer + ES8388_Write_Reg(0x28,0x38); //Setup mixer + ES8388_Write_Reg(0x29,0x38); //Setup mixer + ES8388_Write_Reg(0x2A,0xB8); //Setup mixer + ES8388_Write_Reg(0x2E,0x1E); //Set Lout/Rout volume:0dB + ES8388_Write_Reg(0x2F,0x1E); //Set Lout/Rout volume:0dB + ES8388_Write_Reg(0x30,0x1E); //Set Lout/Rout volume:0dB + ES8388_Write_Reg(0x31,0x1E); //Set Lout/Rout volume:0dB + ES8388_Write_Reg(0x02,0x00); //Power up DEM and STM + +} + +/****************************************************************************//** + * @brief ES8388_I2C_Init + * + * @param None + * + * @return None + * +*******************************************************************************/ +int ES8388_Set_Voice_Volume(int volume) +{ + int res; + if (volume < 0) + volume = 0; + else if (volume > 100) + volume = 100; + volume /= 3; + res = ES8388_Write_Reg(0x2e, volume); + res |= ES8388_Write_Reg(0x2f, volume); + res |= ES8388_Write_Reg(0x30, volume); + res |= ES8388_Write_Reg(0x31, volume); + return res; +} + + +/****************************************************************************//** + * @brief ES8388_I2C_Init + * + * @param None + * + * @return None + * +*******************************************************************************/ +void ES8388_I2C_Init(void) +{ + i2c_register(I2C0_INDEX, "i2c", DEVICE_OFLAG_RDWR); + es8388_i2c = device_find("i2c"); + if(es8388_i2c){ + device_open(es8388_i2c, 0); + } +} + + +/****************************************************************************//** + * @brief ES8388_Reg_Dump + * + * @param None + * + * @return None + * +*******************************************************************************/ +BL_Err_Type ES8388_Reg_Dump(void) +{ + int i; + uint8_t tmp; + + for (i = 0; i < 0X3F; i++) { + if(ES8388_Read_Reg(i,&tmp) != SUCCESS) + bflb_platform_printf("iic read err\r\n"); + bflb_platform_printf("Reg[%02x]=%02x \n", i,tmp); + } + return SUCCESS; +} + + +/*@} end of group ES8388_Private_Functions */ + +/** @defgroup ES8388_Public_Functions + * @{ + */ + +/****************************************************************************//** + * @brief ES8388 Init function + * + * @param cfg: None + * + * @return None + * +*******************************************************************************/ +void ES8388_Init(ES8388_Cfg_Type * cfg){ + + ES8388_I2C_Init(); + + switch(cfg -> work_mode){ + case ES8388_CODEC_MDOE: ES8388_Codec_Mode(cfg);break; + case ES8388_RECORDING_MODE:ES8388_Recording_Mode(cfg);break; + case ES8388_PLAY_BACK_MODE:ES8388_Playback_Mode(cfg);break; + default:break; + } + +} + +/*@} end of group ES8388_Public_Functions */ + +/*@} end of group ES8388 */ + +/*@} end of group BL702_STD_PERIPH_DRIVER */ diff --git a/bsp/bsp_common/es8388/bsp_es8388.h b/bsp/bsp_common/es8388/bsp_es8388.h new file mode 100644 index 00000000..f7526d09 --- /dev/null +++ b/bsp/bsp_common/es8388/bsp_es8388.h @@ -0,0 +1,192 @@ +/** + * @file bsp_es8388.h + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ + +#ifndef __ES8388_H__ +#define __ES8388_H__ + +#include "bflb_platform.h" + +/** @addtogroup BL702_STD_PERIPH_DRIVER + * @{ + */ + +/** @addtogroup ES8388 + * @{ + */ + +/** @defgroup ES8388_Public_Types + * @{ + */ + +/** + * @brief ES8388 Role Matser Or Slave + */ +typedef enum { + ES8388_MASTER, /*!< Master Mode */ + ES8388_SLAVE, /*!< Slave Mode */ +}ES8388_Role_Type; + +/** + * @brief ES8388 Work Mode + */ +typedef enum { + ES8388_CODEC_MDOE, /*!< ES8388 work at codec mode */ + ES8388_RECORDING_MODE, /*!< ES8388 work at recording mode */ + ES8388_PLAY_BACK_MODE, /*!< ES8388 work at paly back mode */ + ES8388_BY_PASS_MODE, /*!< ES8388 work at by pass mode */ +}ES8388_Work_Mode; + +/** + * @brief ES8388 Microphone input type + */ +typedef enum { + ES8388_SINGLE_ENDED_MIC, /*!< Mic Single Input Mode */ + ES8388_DIFF_ENDED_MIC, /*!< Mic Different Input Mode */ +}ES8388_MIC_Input_Type; + +/** + * @brief ES8388 Microphone pga sel type + */ +typedef enum { + ES8388_MIC_PGA_0DB, /*!< Mic PGA as 0db */ + ES8388_MIC_PGA_3DB, /*!< Mic PGA as 3db */ + ES8388_MIC_PGA_6DB, /*!< Mic PGA as 6db */ + ES8388_MIC_PGA_9DB, /*!< Mic PGA as 9db */ + ES8388_MIC_PGA_12DB, /*!< Mic PGA as 12db */ + ES8388_MIC_PGA_15DB, /*!< Mic PGA as 15db */ + ES8388_MIC_PGA_18DB, /*!< Mic PGA as 18db */ + ES8388_MIC_PGA_21DB, /*!< Mic PGA as 21db */ + ES8388_MIC_PGA_24DB, /*!< Mic PGA as 24db */ +}ES8388_MIC_Input_PGA_Type; + +/** + * @brief ES8388 I2S Frame Type + */ +typedef enum { + ES8388_STD_I2S_FRAME, /*!< Standard I2S Frame */ + ES8388_LEFT_JUSTIFY_FRAME, /*!< Left Justify Frame */ + ES8388_RIGHT_JUSTIFY_FRAME, /*!< Right Justify Frame */ + ES8388_DSP_FRAME, /*!< DSP Frame */ +}ES8388_I2S_Frame_Type; + +/** + * @brief ES8388 I2S Data Len Type + */ +typedef enum { + ES8388_DATA_LEN_24, /*!< I2S Auido Data Len 24 */ + ES8388_DATA_LEN_20, /*!< I2S Auido Data Len 20 */ + ES8388_DATA_LEN_18, /*!< I2S Auido Data Len 18 */ + ES8388_DATA_LEN_16, /*!< I2S Auido Data Len 16 */ + ES8388_DATA_LEN_32, /*!< I2S Auido Data Len 32 */ +}ES8388_I2S_Data_Width; + +/** + * @brief ES8388_Cfg_Type + */ +typedef struct { + ES8388_Work_Mode work_mode; /*!< ES8388 work mode */ + ES8388_Role_Type role; /*!< ES8388 role */ + ES8388_MIC_Input_Type mic_input_mode; /*!< ES8388 mic input mode */ + ES8388_MIC_Input_PGA_Type mic_pga; /*!< ES8388 mic PGA */ + ES8388_I2S_Frame_Type i2s_frame; /*!< ES8388 I2S frame */ + ES8388_I2S_Data_Width data_width; /*!< ES8388 I2S dataWitdh */ +}ES8388_Cfg_Type; + +/*@} end of group ES8388_Public_Types */ + +/** @defgroup ES8388_Public_Constants + * @{ + */ + +/** @defgroup ES8388_ROLE_TYPE + * @{ + */ +#define IS_ES8388_ROLE_TYPE(type) (((type) == ES8388_MASTER) || \ + ((type) == ES8388_SLAVE)) + +/** @defgroup ES8388_WORK_MODE + * @{ + */ +#define IS_ES8388_WORK_MODE(type) (((type) == ES8388_CODEC_MDOE) || \ + ((type) == ES8388_RECORDING_MODE) || \ + ((type) == ES8388_PLAY_BACK_MODE) || \ + ((type) == ES8388_BY_PASS_MODE)) + +/** @defgroup ES8388_MIC_INPUT_TYPE + * @{ + */ +#define IS_ES8388_MIC_INPUT_TYPE(type) (((type) == ES8388_SINGLE_ENDED_MIC) || \ + ((type) == ES8388_DIFF_ENDED_MIC)) + +/** @defgroup ES8388_MIC_INPUT_PGA_TYPE + * @{ + */ +#define IS_ES8388_MIC_INPUT_PGA_TYPE(type) (((type) == ES8388_MIC_PGA_0DB) || \ + ((type) == ES8388_MIC_PGA_3DB) || \ + ((type) == ES8388_MIC_PGA_6DB) || \ + ((type) == ES8388_MIC_PGA_9DB) || \ + ((type) == ES8388_MIC_PGA_12DB) || \ + ((type) == ES8388_MIC_PGA_15DB) || \ + ((type) == ES8388_MIC_PGA_18DB) || \ + ((type) == ES8388_MIC_PGA_21DB) || \ + ((type) == ES8388_MIC_PGA_24DB)) + +/** @defgroup ES8388_I2S_FRAME_TYPE + * @{ + */ +#define IS_ES8388_I2S_FRAME_TYPE(type) (((type) == ES8388_STD_I2S_FRAME) || \ + ((type) == ES8388_LEFT_JUSTIFY_FRAME) || \ + ((type) == ES8388_RIGHT_JUSTIFY_FRAME) || \ + ((type) == ES8388_DSP_FRAME)) + +/** @defgroup ES8388_I2S_DATA_WIDTH + * @{ + */ +#define IS_ES8388_I2S_DATA_WIDTH(type) (((type) == ES8388_DATA_LEN_24) || \ + ((type) == ES8388_DATA_LEN_20) || \ + ((type) == ES8388_DATA_LEN_18) || \ + ((type) == ES8388_DATA_LEN_16) || \ + ((type) == ES8388_DATA_LEN_32)) + +/*@} end of group ES8388_Public_Constants */ + +/** @defgroup ES8388_Public_Macros + * @{ + */ + +/*@} end of group ES8388_Public_Macros */ + +/** @defgroup ES8388_Public_Functions + * @{ + */ +void ES8388_Init(ES8388_Cfg_Type * cfg); +BL_Err_Type ES8388_Reg_Dump(void); +int ES8388_Set_Voice_Volume(int volume); + +/*@} end of group ES8388_Public_Functions */ + +/*@} end of group ES8388 */ + +/*@} end of group BL702_STD_PERIPH_DRIVER */ + +#endif /* __ES8388_H__ */ diff --git a/bsp/bsp_common/fatfs/fatfs_sdio_sd.c b/bsp/bsp_common/fatfs/fatfs_sdio_sd.c new file mode 100644 index 00000000..8c99e73d --- /dev/null +++ b/bsp/bsp_common/fatfs/fatfs_sdio_sd.c @@ -0,0 +1,160 @@ +/** + * @file fatfs_sdio_sd.c + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ + +/*-----------------------------------------------------------------------*/ +/* Low level disk I/O module skeleton for FatFs (C)ChaN, 2019 */ +/*-----------------------------------------------------------------------*/ +/* If a working storage control module is available, it should be */ +/* attached to the FatFs via a glue function rather than modifying it. */ +/* This is an example of glue functions to attach various exsisting */ +/* storage control modules to the FatFs module with a defined API. */ +/*-----------------------------------------------------------------------*/ + +#include "ff.h" /* Obtains integer types */ +#include "diskio.h" /* Declarations of disk functions */ +#include "bsp_sdio_sdcard.h" +#include "bflb_platform.h" + +static sd_card_t gSDCardInfo; + +int RAM_disk_status() +{ + return 0; +} + +int MMC_disk_status() +{ + return 0; +} + +int USB_disk_status() +{ + return 0; +} + +int RAM_disk_initialize() +{ + return 0; +} + +int MMC_disk_initialize() +{ + static uint8_t inited=0; + + if(inited==0){ + if(SDH_Init(SDH_DATA_BUS_WIDTH_4BITS,&gSDCardInfo)==SD_OK){ + inited=1; + return 0; + }else { + return -1; + } + } + return 0; +} + +int USB_disk_initialize() +{ + return 0; +} + +int RAM_disk_read(BYTE* buff, LBA_t sector, UINT count) +{ + return 0; +} + +int MMC_disk_read(BYTE* buff, LBA_t sector, UINT count) +{ + if(SD_OK==SDH_ReadMultiBlocks(buff,sector,gSDCardInfo.blockSize,count)){ + return 0; + }else { + return -1; + } +} + +int USB_disk_read(BYTE* buff, LBA_t sector, UINT count) +{ + return 0; +} + +int RAM_disk_write(const BYTE* buff, LBA_t sector, UINT count) +{ + return 0; +} + +int MMC_disk_write(const BYTE* buff, LBA_t sector, UINT count) +{ + if(SD_OK==SDH_WriteMultiBlocks((uint8_t *)buff,sector,gSDCardInfo.blockSize,count)){ + return 0; + }else { + return -1; + } +} + +int USB_disk_write(const BYTE* buff, LBA_t sector, UINT count) +{ + return 0; +} + +int RAM_disk_ioctl(BYTE cmd, void* buff) +{ + return 0; +} + +int MMC_disk_ioctl(BYTE cmd, void* buff) +{ + switch (cmd) + { + // Get R/W sector size (WORD) + case GET_SECTOR_SIZE : + *(WORD * )buff = gSDCardInfo.blockSize; + break; + // Get erase block size in unit of sector (DWORD) + case GET_BLOCK_SIZE : + *(DWORD * )buff = 1; + break; + + case GET_SECTOR_COUNT: + *(DWORD * )buff = gSDCardInfo.blockCount; + break; + case CTRL_SYNC : + break; + default: + break; + } + return 0; +} + +int USB_disk_ioctl(BYTE cmd, void* buff) +{ + return 0; +} + +DWORD get_fattime(void) { + return ((DWORD)(2015 - 1980) << 25) /* Year 2015 */ + | ((DWORD)1 << 21) /* Month 1 */ + | ((DWORD)1 << 16) /* Mday 1 */ + | ((DWORD)0 << 11) /* Hour 0 */ + | ((DWORD)0 << 5) /* Min 0 */ + | ((DWORD)0 >> 1); /* Sec 0 */ +} + diff --git a/bsp/bsp_common/fatfs/fatfs_spi_sd.c b/bsp/bsp_common/fatfs/fatfs_spi_sd.c new file mode 100644 index 00000000..24d20c0e --- /dev/null +++ b/bsp/bsp_common/fatfs/fatfs_spi_sd.c @@ -0,0 +1,110 @@ +/** + * @file fatfs_spi_sd.c + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ + +#include "diskio.h" +#include "bsp_spi_sd.h" +const char * FR_Table[]= +{ + "FR_OK：成功", /* (0) Succeeded */ + "FR_DISK_ERR：底层硬件错误", /* (1) A hard error occurred in the low level disk I/O layer */ + "FR_INT_ERR：断言失败", /* (2) Assertion failed */ + "FR_NOT_READY：物理驱动没有工作", /* (3) The physical drive cannot work */ + "FR_NO_FILE：文件不存在", /* (4) Could not find the file */ + "FR_NO_PATH：路径不存在", /* (5) Could not find the path */ + "FR_INVALID_NAME：无效文件名", /* (6) The path name format is invalid */ + "FR_DENIED：由于禁止访问或者目录已满访问被拒绝", /* (7) Access denied due to prohibited access or directory full */ + "FR_EXIST：文件已经存在", /* (8) Access denied due to prohibited access */ + "FR_INVALID_OBJECT：文件或者目录对象无效", /* (9) The file/directory object is invalid */ + "FR_WRITE_PROTECTED：物理驱动被写保护", /* (10) The physical drive is write protected */ + "FR_INVALID_DRIVE：逻辑驱动号无效", /* (11) The logical drive number is invalid */ + "FR_NOT_ENABLED：卷中无工作区", /* (12) The volume has no work area */ + "FR_NO_FILESYSTEM：没有有效的FAT卷", /* (13) There is no valid FAT volume */ + "FR_MKFS_ABORTED：由于参数错误f_mkfs()被终止", /* (14) The f_mkfs() aborted due to any parameter error */ + "FR_TIMEOUT：在规定的时间内无法获得访问卷的许可", /* (15) Could not get a grant to access the volume within defined period */ + "FR_LOCKED：由于文件共享策略操作被拒绝", /* (16) The operation is rejected according to the file sharing policy */ + "FR_NOT_ENOUGH_CORE：无法分配长文件名工作区", /* (17) LFN working buffer could not be allocated */ + "FR_TOO_MANY_OPEN_FILES：当前打开的文件数大于_FS_SHARE", /* (18) Number of open files > _FS_SHARE */ + "FR_INVALID_PARAMETER：参数无效" /* (19) Given parameter is invalid */ +}; + +int sd_disk_status(void) +{ + return 0; +} +int sd_disk_initialize(void) +{ + return SD_Init(&SD_CardInfo); +} +int sd_disk_read(BYTE *buff, LBA_t sector, UINT count) +{ + return SD_ReadBlock(sector, buff, count); +} +int sd_disk_write(const BYTE *buff, LBA_t sector, UINT count) +{ + return SD_WriteBlock(sector, (BYTE *)buff, count); +} +int sd_disk_ioctl(BYTE cmd, void *buff) +{ + int result = 0; + switch (cmd) + { + case CTRL_SYNC: + result = RES_OK; + break; + case GET_SECTOR_SIZE: + *(DWORD *)buff = SD_CardInfo.CardBlockSize; + result = RES_OK; + break; + case GET_BLOCK_SIZE: + *(WORD *)buff = SD_CardInfo.CardBlockSize; + result = RES_OK; + break; + case GET_SECTOR_COUNT: + *(DWORD *)buff = SD_CardInfo.CardCapacity / SD_CardInfo.CardBlockSize; + result = RES_OK; + break; + default: + result = RES_PARERR; + break; + } + return result; +} + +DSTATUS Translate_Result_Code(int result) +{ + + // MSG("%s\r\n",FR_Table[result]); + return result; +} +FATFS_DiskioDriverTypeDef pNewDiskioDriver; + +void fatfs_sd_driver_register(void) +{ + pNewDiskioDriver.MMC_disk_status = sd_disk_status; + pNewDiskioDriver.MMC_disk_initialize = sd_disk_initialize; + pNewDiskioDriver.MMC_disk_write = sd_disk_write; + pNewDiskioDriver.MMC_disk_read = sd_disk_read; + pNewDiskioDriver.MMC_disk_ioctl = sd_disk_ioctl; + pNewDiskioDriver.Translate_Result_Code = Translate_Result_Code; + disk_driver_callback_init(&pNewDiskioDriver); +} \ No newline at end of file diff --git a/bsp/bsp_common/il9431/bsp_il9431.c b/bsp/bsp_common/il9431/bsp_il9431.c new file mode 100644 index 00000000..eccec603 --- /dev/null +++ b/bsp/bsp_common/il9431/bsp_il9431.c @@ -0,0 +1,515 @@ +/** + * @file bsp_il9431.c + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ + +#include "bsp_il9431.h" +#include "hal_spi.h" + +/** @addtogroup BL702_Peripheral_Case + * @{ + */ + +/** @addtogroup TFT_LCD + * @{ + */ + +/** @defgroup TFT_LCD_Private_Macros + * @{ + */ + +/*@} end of group TFT_LCD_Private_Macros */ + +/** @defgroup TFT_LCD_Private_Types + * @{ + */ + +/*@} end of group TFT_LCD_Private_Types */ + +/** @defgroup TFT_LCD_Private_Variables + * @{ + */ + +/*@} end of group TFT_LCD_Private_Variables */ + +/** @defgroup TFT_LCD_Global_Variables + * @{ + */ + +/*@} end of group TFT_LCD_Global_Variables */ + +/** @defgroup TFT_LCD_Private_Fun_Declaration + * @{ + */ + +/*@} end of group TFT_LCD_Private_Fun_Declaration */ + +/** @defgroup TFT_LCD_Private_Functions + * @{ + */ +struct device* spi_lcd; + +/*@} end of group TFT_LCD_Private_Functions */ + +/** @defgroup TFT_LCD_Public_Functions + * @{ + */ +void spi_lcd_init(void) +{ + spi_register(SPI0_INDEX,"spi_lcd",DEVICE_OFLAG_RDWR); + gpio_set_mode(LCD_CS_PIN,GPIO_OUTPUT_MODE); + gpio_set_mode(LCD_DC_PIN,GPIO_OUTPUT_MODE); + gpio_write(LCD_CS_PIN,1); //CS1 + gpio_write(LCD_DC_PIN,1);//DC + spi_lcd = device_find("spi_lcd"); + if(spi_lcd) + { + device_open(spi_lcd,DEVICE_OFLAG_STREAM_TX|DEVICE_OFLAG_STREAM_RX); + + } +} +/****************************************************************************//** + * @brief LCD write command + * + * @param command: Command to write + * + * @return None + * +*******************************************************************************/ +void LCD_WR_Cmd(uint8_t command) +{ + CS1_LOW; + DC_LOW; + spi_transmit(spi_lcd,&command,1,SPI_TRANSFER_TYPE_8BIT); + CS1_HIGH; +} + + +/****************************************************************************//** + * @brief LCD write 8-bit data + * + * @param data: 8-bit data to write + * + * @return None + * +*******************************************************************************/ +void LCD_WR_Byte(uint8_t data) +{ + CS1_LOW; + DC_HIGH; + spi_transmit(spi_lcd,&data,1,SPI_TRANSFER_TYPE_8BIT); + CS1_HIGH; +} + + +/****************************************************************************//** + * @brief LCD write 16-bit data + * + * @param data: 16-bit data to write + * + * @return None + * +*******************************************************************************/ +void LCD_WR_HalfWord(uint16_t data) +{ + CS1_LOW; + DC_HIGH; + spi_transmit(spi_lcd,&data,1,SPI_TRANSFER_TYPE_16BIT); + CS1_HIGH; +} + + +/****************************************************************************//** + * @brief LCD write 32-bit data + * + * @param data: 32-bit data to write + * + * @return None + * +*******************************************************************************/ +void LCD_WR_Word(uint32_t data) +{ + CS1_LOW; + DC_HIGH; + spi_transmit(spi_lcd,&data,1,SPI_TRANSFER_TYPE_32BIT); + CS1_HIGH; +} + + +/****************************************************************************//** + * @brief LCD set address + * + * @param x1: Coordinate x start + * @param y1: Coordinate y start + * @param x2: Coordinate x end + * @param y2: Coordinate y end + * + * @return None + * +*******************************************************************************/ +void LCD_Set_Addr(uint32_t x1,uint32_t y1,uint32_t x2,uint32_t y2) +{ + LCD_WR_Cmd(0x2a); + LCD_WR_Word(x2<<24 | (x2<<8&0xff0000) | (x1<<8&0xff00) | (x1>>8&0xff)); + + LCD_WR_Cmd(0x2b); + LCD_WR_Word(y2<<24 | (y2<<8&0xff0000) | (y1<<8&0xff00) | (y1>>8&0xff)); + + LCD_WR_Cmd(0x2C); +} + + +/****************************************************************************//** + * @brief SPI LCD init + * + * @param None + * + * @return None + * +*******************************************************************************/ +void LCD_Init(void) +{ + spi_lcd_init(); + + LCD_WR_Cmd(0x11); /* Exit sleep */ + bflb_platform_delay_ms(60); + + LCD_WR_Cmd(0xcf); + LCD_WR_HalfWord(0xd900); + LCD_WR_Byte(0X30); + + LCD_WR_Cmd(0xed); + LCD_WR_Word(0x81120364); + + LCD_WR_Cmd(0xe8); + LCD_WR_HalfWord(0x1085); + LCD_WR_Byte(0x78); + + LCD_WR_Cmd(0xcb); + LCD_WR_Word(0x34002c39); + LCD_WR_Byte(0x02); + + LCD_WR_Cmd(0xf7); + LCD_WR_Byte(0x20); + + LCD_WR_Cmd(0xea); + LCD_WR_HalfWord(0x0000); + + LCD_WR_Cmd(0xc0); /* Power control */ + LCD_WR_Byte(0x23); /* VRH[5:0] */ + LCD_WR_Cmd(0xc1); /* Power control */ + LCD_WR_Byte(0x12); /* SAP[2:0];BT[3:0] */ + LCD_WR_Cmd(0xc2); + LCD_WR_Byte(0x11); + LCD_WR_Cmd(0xC5); /* VCM control */ + LCD_WR_HalfWord(0x3040); + LCD_WR_Cmd(0xc7); /* VCM control2 */ + LCD_WR_Byte(0xa9); + LCD_WR_Cmd(0x3a); + LCD_WR_Byte(0x55); + LCD_WR_Cmd(0x36); /* Memory Access Control */ + LCD_WR_Byte(0x08); + LCD_WR_Cmd(0xb1); /* Frame Rate Control */ + LCD_WR_HalfWord(0x1800); + LCD_WR_Cmd(0xb6); /* Display Function Control */ + LCD_WR_HalfWord(0xa20a); + LCD_WR_Cmd(0xf2); /* 3Gamma Function Disable */ + LCD_WR_Byte(0x00); + LCD_WR_Cmd(0xf7); + LCD_WR_Byte(0x20); + LCD_WR_Cmd(0x26); /* Gamma curve selected */ + LCD_WR_Byte(0x01); + LCD_WR_Cmd(0xe0); /* Set Gamma */ + LCD_WR_Word(0x0b23241f); + LCD_WR_Word(0xd850080f); + LCD_WR_Word(0x000a083b); + LCD_WR_HalfWord(0x0000); + LCD_WR_Byte(0x00); + LCD_WR_Cmd(0Xe1); /* Set Gamma */ + LCD_WR_Word(0x041c1b00); + LCD_WR_Word(0x272f0710); + LCD_WR_Word(0x0f150744); + LCD_WR_HalfWord(0x3f3f); + LCD_WR_Byte(0x1f); + LCD_WR_Cmd(0x29); /* Display on */ +} + + +/****************************************************************************//** + * @brief LCD clear display + * + * @param color: Color to fill + * + * @return None + * +*******************************************************************************/ +void LCD_Clear(uint16_t color) +{ + uint16_t i,j; + LCD_Set_Addr(0,0,LCD_W-1,LCD_H-1); + for(i=0;i absY){ + for(i=0;i0){ + LCD_DrawPoint(x1+i,y1+temp,color); + }else{ + LCD_DrawPoint(x1-i,y1+temp,color); + } + } + } + else{ + for(i=0;i0){ + LCD_DrawPoint(x1+temp,y1+i,color); + }else{ + LCD_DrawPoint(x1+temp,y1-i,color); + } + } + } +} + + +/****************************************************************************//** + * @brief LCD draw rectangle + * + * @param x1: Coordinate x start + * @param y1: Coordinate y start + * @param x2: Coordinate x end + * @param y2: Coordinate y end + * @param color: Color of the rectangle + * + * @return None + * +*******************************************************************************/ +void LCD_DrawRectangle(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t color) +{ + LCD_DrawLine(x1,y1,x2,y1,color); + LCD_DrawLine(x2,y1,x2,y2,color); + LCD_DrawLine(x2,y2,x1,y2,color); + LCD_DrawLine(x1,y2,x1,y1,color); +} + + +/****************************************************************************//** + * @brief LCD draw circle + * + * @param x: Center coordinate x + * @param y: Center coordinate y + * @param r: Radius + * @param color: Color of the circle + * + * @return None + * +*******************************************************************************/ +void LCD_DrawCircle(uint16_t x,uint16_t y,uint16_t r,uint16_t color) +{ + int a = 0,b; + int di; + b = r; + di = 3-(r<<1); + while(a <= b) + { + LCD_DrawPoint(x-b,y-a,color); + LCD_DrawPoint(x+b,y-a,color); + LCD_DrawPoint(x-a,y+b,color); + LCD_DrawPoint(x-b,y-a,color); + LCD_DrawPoint(x-a,y-b,color); + LCD_DrawPoint(x+b,y+a,color); + LCD_DrawPoint(x+a,y-b,color); + LCD_DrawPoint(x+a,y+b,color); + LCD_DrawPoint(x-b,y+a,color); + a++; + if(di<0){ + di += 4*a+6; + }else{ + di += 10+4*(a-b); + b--; + } + LCD_DrawPoint(x+a,y+b,color); + } +} + + +/****************************************************************************//** + * @brief LCD fill the area with color + * + * @param x1: Coordinate x start + * @param y1: Coordinate y start + * @param x2: Coordinate x end + * @param y2: Coordinate y end + * @param color: Color to fill + * + * @return None + * +*******************************************************************************/ +void LCD_DrawArea(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t color) +{ + uint16_t i,j; + LCD_Set_Addr(x1,y1,x2,y2); + for(i=y1;i<=y2;i++) + { + for(j=x1;j<=x2;j++)LCD_WR_HalfWord(color); + } +} + + +/****************************************************************************//** + * @brief LCD draw picture + * + * @param x1: Coordinate x start + * @param y1: Coordinate y start + * @param x2: Coordinate x end + * @param y2: Coordinate y end + * @param picture: Color array of the picture + * + * @return None + * +*******************************************************************************/ +void LCD_DrawPicture(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t* picture) +{ + uint32_t i; + LCD_Set_Addr(x1,y1,x2,y2); + for(i=0;i>3)<<3|(g>>5)|(g>>2)<<13|(b>>3)<<8)&0xffff) +/* Calculate 32-bit or 16-bit absolute value */ +#define ABS32(value) ((value^(value>>31))-(value>>31)) +#define ABS16(value) ((value^(value>>15))-(value>>15)) + +/*@} end of group TFT_LCD_Public_Macros */ + +/** @defgroup TFT_LCD_Public_Functions + * @{ + */ + +/** + * @brief Tft_lcd Functions + */ +void LCD_WR_Cmd(uint8_t command); +void LCD_WR_Byte(uint8_t data); +void LCD_WR_HalfWord(uint16_t data); +void LCD_WR_Word(uint32_t data); +void LCD_Set_Addr(uint32_t x1,uint32_t y1,uint32_t x2,uint32_t y2); +void LCD_Init(void); +void LCD_Clear(uint16_t color); +void LCD_DrawPoint(uint16_t x,uint16_t y,uint16_t color); +void LCD_DrawLine(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t color); +void LCD_DrawRectangle(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t color); +void LCD_DrawCircle(uint16_t x,uint16_t y,uint16_t r,uint16_t color); +void LCD_DrawArea(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t color); +void LCD_DrawPicture(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,uint16_t* picture); +// void LCD_UartDrawPicture(uint16_t x1,uint16_t y1,uint16_t x2,uint16_t y2,UART_ID_Type uartId); +void LCD_DrawChinese(uint16_t x,uint16_t y,uint8_t* character,uint16_t bColor,uint16_t cColor); + +/*@} end of group TFT_LCD_Public_Functions */ + +/*@} end of group TFT_LCD */ + +/*@} end of group BL702_Peripheral_Driver */ + +#endif /* __TFT_LCD_H__ */ diff --git a/bsp/bsp_common/platform/bflb_platform.c b/bsp/bsp_common/platform/bflb_platform.c new file mode 100644 index 00000000..aaeec362 --- /dev/null +++ b/bsp/bsp_common/platform/bflb_platform.c @@ -0,0 +1,251 @@ +/** + * @file bflb_platform.c + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ + +#include "hal_uart.h" +#include "hal_mtimer.h" +#include "drv_mmheap.h" +#include "ring_buffer.h" +#include "drv_shell.h" +extern uint32_t _HeapBase; +extern uint32_t _HeapSize; + +static uint8_t uart_dbg_disable=0; + +#ifdef SHELL_SUPPORT +Shell shell; +char shellBuffer[512]; + +void uart0_irq_callback(struct device *dev, void *args, uint32_t size, uint32_t state) +{ + uint8_t data; + + if (state == UART_EVENT_RX_FIFO) + { + data = *(uint8_t *)args; + shellHandler(&shell, data); + } +} + +void userShellWrite(char data) +{ + struct device *uart = device_find("debug_log"); + device_write(uart, 0, (uint8_t *)&data, 1); +} + +void shell_init(void) +{ + + shell.write = userShellWrite; + shellInit(&shell, shellBuffer, 512); +} +#else +void uart0_irq_callback(struct device *dev, void *args, uint32_t size, uint32_t state) +{ + if (state == UART_EVENT_RX_FIFO) + { + + } +} +#endif + +__WEAK__ void board_init(void) +{ + +} +__WEAK__ void bl_show_info(void) +{ + +} + +void bflb_platform_init(uint32_t baudrate) +{ + disable_irq(); + + board_init(); + + mtimer_init(); + + if(!uart_dbg_disable){ + uart_register(UART0_INDEX, "debug_log", DEVICE_OFLAG_RDWR); + struct device *uart = device_find("debug_log"); + + if (uart) + { + device_open(uart, DEVICE_OFLAG_STREAM_TX | DEVICE_OFLAG_INT_RX); + device_set_callback(uart, uart0_irq_callback); + device_control(uart, DEVICE_CTRL_SET_INT, (void *)(UART_RX_FIFO_IT)); + } + + bl_show_info(); + } + +#ifdef SHELL_SUPPORT + shell_init(); +#endif + + if (!mmheap_init_with_pool(&_HeapBase, (size_t)&_HeapSize)) + { + MSG("dynamic memory init success,heap size = 0x%x \r\n", &_HeapSize); + } + else + { + MSG("dynamic memory init error\r\n"); + } + + enable_irq(); +} + +void bflb_platform_printf(char *fmt, ...) +{ + struct device *uart = device_find("debug_log"); + char print_buf[128]; + va_list ap; + + if(!uart_dbg_disable){ + va_start(ap, fmt); + vsnprintf(print_buf, sizeof(print_buf) - 1, fmt, ap); + va_end(ap); + + device_write(uart, 0, (uint8_t *)print_buf, strlen(print_buf)); + } +} + +void bflb_platform_print_set(uint8_t disable) +{ + uart_dbg_disable=disable; +} +void bflb_platform_dump(uint8_t *data, uint32_t len) +{ + uint32_t i = 0; + + if(!uart_dbg_disable){ + for (i = 0; i < len; i++) + { + if (i % 16 == 0) + { + bflb_platform_printf("\r\n"); + } + bflb_platform_printf("%02x ", data[i]); + } + bflb_platform_printf("\r\n"); + } +} + +void bflb_platform_init_time() +{ + mtimer_init(); +} + +void bflb_platform_deinit_time() +{ + mtimer_deinit(); +} + +void bflb_platform_set_alarm_time(uint64_t time,void( *interruptFun )( void )) +{ + mtimer_set_alarm_time(time,interruptFun); +} + +void bflb_platform_clear_time() +{ + mtimer_clear_time(); +} + +void bflb_platform_start_time() +{ + mtimer_start(); +} + +void bflb_platform_stop_time() +{ + mtimer_stop(); +} + +uint64_t bflb_platform_get_time_ms() +{ + return mtimer_get_time_ms(); +} + +uint64_t bflb_platform_get_time_us() +{ + return mtimer_get_time_us(); +} + +void bflb_platform_delay_ms(uint32_t ms) +{ + mtimer_delay_ms(ms); +} +void bflb_platform_delay_us(uint32_t us) +{ + mtimer_delay_us(us); +} + +void bflb_print_device_list(void){ + struct device *dev; + dlist_t *node; + uint8_t device_index=0; + + MSG("Device List Print\r\n"); + + dlist_for_each(node, device_get_list_header()) + { + dev = dlist_entry(node, struct device, list); + + MSG("Index %d\r\nDevice Name = %s \r\n",device_index,dev->name); + + switch(dev->type){ + + case DEVICE_CLASS_GPIO: + MSG("Device Type = %s \r\n","GPIO");break; + case DEVICE_CLASS_UART: + MSG("Device Type = %s \r\n","UART");break; + case DEVICE_CLASS_SPI: + MSG("Device Type = %s \r\n","SPI");break; + case DEVICE_CLASS_I2C: + MSG("Device Type = %s \r\n","I2C");break; + case DEVICE_CLASS_ADC: + MSG("Device Type = %s \r\n","ADC");break; + case DEVICE_CLASS_DMA: + MSG("Device Type = %s \r\n","DMA");break; + case DEVICE_CLASS_TIMER: + MSG("Device Type = %s \r\n","TIMER");break; + case DEVICE_CLASS_PWM: + MSG("Device Type = %s \r\n","PWM");break; + case DEVICE_CLASS_SDIO: + MSG("Device Type = %s \r\n","SDIO");break; + case DEVICE_CLASS_USB: + MSG("Device Type = %s \r\n","USB");break; + case DEVICE_CLASS_I2S: + MSG("Device Type = %s \r\n","I2S");break; + case DEVICE_CLASS_CAMERA: + MSG("Device Type = %s \r\n","CAMERA");break; + case DEVICE_CLASS_NONE: break; + default : break; + } + + MSG("Device Handle = 0x%x \r\n",dev); + MSG("---------------------\r\n",dev); + + device_index++; + } +} \ No newline at end of file diff --git a/bsp/bsp_common/platform/bflb_platform.h b/bsp/bsp_common/platform/bflb_platform.h new file mode 100644 index 00000000..d908d464 --- /dev/null +++ b/bsp/bsp_common/platform/bflb_platform.h @@ -0,0 +1,95 @@ +/** + * @file bflb_platform.h + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ + +#ifndef _BFLB_PLATFORM_H +#define _BFLB_PLATFORM_H + +#include "misc.h" + +#define MSG(a,...) bflb_platform_printf(a,##__VA_ARGS__) +#define MSG_ERR(a,...) bflb_platform_printf(a,##__VA_ARGS__) +#define BL_CASE_FAIL {MSG(" Case Fail\r\n");while(1){bflb_platform_delay_ms(1);}} +#define BL_CASE_SUCCESS {MSG(" Case Success\r\n");while(1){bflb_platform_delay_ms(1);}} + +/* compatible with old version */ +#ifndef DBG_TAG +#define DBG_TAG "DEBUG" +#endif + +/* + * The color for terminal (foreground) + * BLACK 30 + * RED 31 + * GREEN 32 + * YELLOW 33 + * BLUE 34 + * PURPLE 35 + * CYAN 36 + * WHITE 37 + */ +#define _DBG_COLOR(n) bflb_platform_printf("\033["#n"m") +#define _DBG_LOG_HDR(lvl_name, color_n) \ + bflb_platform_printf("\033["#color_n"m["lvl_name"/"DBG_TAG"] ") +#define _DBG_LOG_X_END \ + bflb_platform_printf("\033[0m\n") + +#define dbg_log_line(lvl, color_n, fmt, ...) \ + do \ + { \ + _DBG_LOG_HDR(lvl, color_n); \ + bflb_platform_printf(fmt, ##__VA_ARGS__); \ + _DBG_LOG_X_END; \ + } \ + while (0) + +#define LOG_D(fmt, ...) dbg_log_line("D", 0, fmt, ##__VA_ARGS__) +#define LOG_I(fmt, ...) dbg_log_line("I", 35, fmt, ##__VA_ARGS__) +#define LOG_W(fmt, ...) dbg_log_line("W", 33, fmt, ##__VA_ARGS__) +#define LOG_E(fmt, ...) dbg_log_line("E", 31, fmt, ##__VA_ARGS__) +#define LOG_RAW(...) bflb_platform_printf(__VA_ARGS__) + +#ifdef DEBUG +void check_failed(uint8_t *file, uint32_t line); +#define CHECK_PARAM(expr) ((expr) ? (void)0 : check_failed((uint8_t *)__FILE__, __LINE__)) +#else +#define CHECK_PARAM(expr) ((void)0) +#endif /* DEBUG */ + +void bflb_platform_init(uint32_t baudrate); +void bflb_platform_printf(char *fmt,...); +void bflb_platform_dump(uint8_t *data, uint32_t len); + +void bflb_platform_init_time(void); +void bflb_platform_clear_time(void); +uint64_t bflb_platform_get_time_ms(void); +uint64_t bflb_platform_get_time_us(void); +void bflb_platform_start_time(void); +void bflb_platform_stop_time(void); +void bflb_platform_set_alarm_time(uint64_t time,void( *interruptFun )( void )); +void bflb_platform_deinit_time(void); +void bflb_platform_delay_ms(uint32_t ms); +void bflb_platform_delay_us(uint32_t us); + +void bflb_print_device_list(void); + +#endif \ No newline at end of file diff --git a/bsp/bsp_common/spi_sd/bsp_spi_sd.c b/bsp/bsp_common/spi_sd/bsp_spi_sd.c new file mode 100644 index 00000000..d5ea9c9f --- /dev/null +++ b/bsp/bsp_common/spi_sd/bsp_spi_sd.c @@ -0,0 +1,970 @@ +/** + * @file bsp_spi_sd.c + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ + +#include "hal_spi.h" +#include "hal_gpio.h" +#include "hal_dma.h" +#include "bl702_spi.h" +#include "bsp_spi_sd.h" + +struct device* spi0; +struct device* dma_ch3; +struct device* dma_ch4; + +SD_CardInfoTypedef SD_CardInfo = {0}; + + +uint8_t SD_SPI_Init(void) +{ + spi_register(0,"spi0",DEVICE_OFLAG_RDWR); + dma_register(DMA0_CH3_INDEX, "ch3", DEVICE_OFLAG_RDWR); + dma_register(DMA0_CH4_INDEX, "ch4", DEVICE_OFLAG_RDWR); + gpio_set_mode(SPI_PIN_CS,GPIO_OUTPUT_MODE); + gpio_write(SPI_PIN_CS,1); + spi0 = device_find("spi0"); + if(spi0) + { + device_open(spi0,DEVICE_OFLAG_DMA_TX|DEVICE_OFLAG_DMA_RX); + } + + dma_ch3 = device_find("ch3"); + if (dma_ch3) + { + ((dma_device_t*)dma_ch3)->direction = DMA_MEMORY_TO_PERIPH; + ((dma_device_t*)dma_ch3)->transfer_mode = DMA_LLI_ONCE_MODE; + ((dma_device_t*)dma_ch3)->src_req = DMA_REQUEST_NONE; + ((dma_device_t*)dma_ch3)->dst_req = DMA_REQUEST_SPI0_TX; + ((dma_device_t*)dma_ch3)->src_width = DMA_TRANSFER_WIDTH_8BIT; + ((dma_device_t*)dma_ch3)->dst_width = DMA_TRANSFER_WIDTH_8BIT; + device_open(dma_ch3, 0); + device_set_callback(dma_ch3, NULL); + device_control(dma_ch3, DEVICE_CTRL_SET_INT, NULL); + } + + dma_ch4 = device_find("ch4"); + if (dma_ch4) + { + ((dma_device_t*)dma_ch4)->direction = DMA_PERIPH_TO_MEMORY; + ((dma_device_t*)dma_ch4)->transfer_mode = DMA_LLI_ONCE_MODE; + ((dma_device_t*)dma_ch4)->src_req = DMA_REQUEST_SPI0_RX; + ((dma_device_t*)dma_ch4)->dst_req = DMA_REQUEST_NONE; + ((dma_device_t*)dma_ch4)->src_width = DMA_TRANSFER_WIDTH_8BIT ; + ((dma_device_t*)dma_ch4)->dst_width = DMA_TRANSFER_WIDTH_8BIT ; + device_open(dma_ch4, 0); + device_set_callback(dma_ch4, NULL); + device_control(dma_ch4, DEVICE_CTRL_SET_INT, NULL); + } + + return SUCCESS; +} + +BL_Err_Type SPI_ReadWriteByte(uint8_t *txBuff, uint8_t *rxBuff, uint32_t length) +{ + static SPI_FifoCfg_Type SPI_fifoconfig={ + .txFifoThreshold = 1, + .rxFifoThreshold = 1, + .txFifoDmaEnable = ENABLE, + .rxFifoDmaEnable = ENABLE, + }; + + // DMA自动与手动无法同时使用，DmaEnable开启后，一旦进行手动发送，之后DMA发送就会卡死 + // test code： + // MSG("SPI_DMA_test 1\r\n"); + // dma_reload(dma_ch3, (uint32_t)txBuff, (uint32_t)DMA_ADDR_SPI_TDR, length); + // dma_reload(dma_ch4, (uint32_t)DMA_ADDR_SPI_RDR, (uint32_t)rxBuff, length); + // dma_channel_start(dma_ch3); + // dma_channel_start(dma_ch4); + // while (device_control(dma_ch3, DMA_CHANNEL_GET_STATUS_CMD, NULL) || device_control(dma_ch4, DMA_CHANNEL_GET_STATUS_CMD, NULL)) + // { + // } + // MSG("SPI_DMA_test 2\r\n"); + // spi_transmit_receive(spi0,txBuff,rxBuff,length,SPI_DATASIZE_8BIT); + // MSG("SPI_DMA_test 3\r\n"); + + if(length<500) + { + if(SPI_fifoconfig.txFifoDmaEnable == ENABLE || SPI_fifoconfig.rxFifoDmaEnable == ENABLE) + { + SPI_fifoconfig.txFifoDmaEnable = DISABLE; + SPI_fifoconfig.rxFifoDmaEnable = DISABLE; + SPI_FifoConfig(SPI_ID_0,&SPI_fifoconfig); + } + spi_transmit_receive(spi0,txBuff,rxBuff,length,SPI_DATASIZE_8BIT); + } + else{ + if(SPI_fifoconfig.txFifoDmaEnable == DISABLE || SPI_fifoconfig.rxFifoDmaEnable == DISABLE) + { + SPI_fifoconfig.txFifoDmaEnable = ENABLE; + SPI_fifoconfig.rxFifoDmaEnable = ENABLE; + SPI_FifoConfig(SPI_ID_0,&SPI_fifoconfig); + } + dma_reload(dma_ch3, (uint32_t)txBuff, (uint32_t)DMA_ADDR_SPI_TDR, length); + dma_reload(dma_ch4, (uint32_t)DMA_ADDR_SPI_RDR, (uint32_t)rxBuff, length); + dma_channel_start(dma_ch3); + dma_channel_start(dma_ch4); + while(device_control(dma_ch3,DMA_CHANNEL_GET_STATUS_CMD,NULL)||device_control(dma_ch4,DMA_CHANNEL_GET_STATUS_CMD,NULL)) + { + } + dma_channel_stop(dma_ch3); + dma_channel_stop(dma_ch4); + } + + return SUCCESS; +} +void SPI_CS_WriteBit(uint8_t bit) +{ + gpio_write(SPI_PIN_CS,bit); +} +/**************************************************************************** + * @brief SPI_SetSpeed + * + * +*******************************************************************************/ +static void SD_SPI_SetSpeed(uint8_t mode) +{ + switch (mode){ + case (0): + device_control(spi0, DEVICE_CTRL_SPI_CONFIG_CLOCK_CMD,(void*)(300 * 1000)); + break; + case (1): + device_control(spi0, DEVICE_CTRL_SPI_CONFIG_CLOCK_CMD,(void*)(18 * 1000 * 1000)); + break; + case (2): + device_control(spi0, DEVICE_CTRL_SPI_CONFIG_CLOCK_CMD,(void*)(40 * 1000 * 1000)); + break; + default: + break; + } +} + +/**************************************************************************** + * @brief SPI_CS_WriteBit + * + * +*******************************************************************************/ +// static void SPI_CS_WriteBit(uint8_t bit) +// { +// GLB_GPIO_Write(SPI_PIN_CS, bit); +// } + +/****************************************************************************/ /** + * @brief SD_GetResponse + * + * +*******************************************************************************/ +static BL_Err_Type SD_GetResponse(uint8_t Response) +{ + uint8_t rx; + uint8_t t_0xFF = 0xFF; + uint16_t Count = 0xFFFE; + do{ + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + Count--; + } while (rx != Response && Count); + + if (Count == 0) + return ERROR; + else + return SUCCESS; +} + +/**************************************************************************** + * @brief SD_SendCommand + * + * +*******************************************************************************/ +static uint8_t SD_SendCommand(uint8_t cmd, uint32_t arg, uint8_t crc) +{ + uint8_t rx; + uint8_t t_0xFF = 0xFF; + uint8_t rxbuff[6]; + uint8_t txbuff[6]; + uint8_t retry = 0; + + SPI_CS_WriteBit(1); + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + + SPI_CS_WriteBit(0); + SD_GetResponse(0xFF); + + txbuff[0] = cmd | 0x40; + txbuff[1] = (uint8_t)(arg >> 24); + txbuff[2] = (uint8_t)(arg >> 16); + txbuff[3] = (uint8_t)(arg >> 8); + txbuff[4] = (uint8_t)(arg); + txbuff[5] = (uint8_t)(crc); + + SPI_ReadWriteByte(txbuff, rxbuff, 6); + + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + + do{ + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + retry++; + } while (rx == 0xFF && retry < 20); + + //MSG("CMD%d :%d num:%d\r\n",cmd,rx,retry); + SPI_CS_WriteBit(1); + SPI_ReadWriteByte(&t_0xFF, &retry, 1); + + return rx; +} + +/**************************************************************************** + * @brief SD_SendCommand_NoDeassert + * + * +*******************************************************************************/ +static uint8_t SD_SendCommand_NoDeassert(uint8_t cmd, uint32_t arg, uint8_t crc) +{ + uint8_t rx; + uint8_t t_0xFF = 0xFF; + uint8_t rxbuff[6]; + uint8_t txbuff[6]; + uint8_t retry = 0; + + SPI_CS_WriteBit(1); + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + + SPI_CS_WriteBit(0); + SD_GetResponse(0xFF); + + txbuff[0] = cmd | 0x40; + txbuff[1] = (uint8_t)(arg >> 24); + txbuff[2] = (uint8_t)(arg >> 16); + txbuff[3] = (uint8_t)(arg >> 8); + txbuff[4] = (uint8_t)(arg); + txbuff[5] = (uint8_t)(crc); + + SPI_ReadWriteByte(txbuff, rxbuff, 6); + + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + + do{ + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + retry++; + } while (rx == 0xFF && retry < 20); + + //MSG("CMD%d :%d num:%d\r\n",cmd,rx,retry); + + return rx; +} + +/**************************************************************************** + * @brief SD_Idle_Sta + * + * +*******************************************************************************/ +static BL_Err_Type SD_Idle_Sta(void) +{ + uint16_t i; + uint8_t rx = 0; + uint8_t t_0xFF = 0xFF; + uint8_t retry = 0; + + SPI_CS_WriteBit(1); + + for (i = 0; i < 10; i++) + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + + do + { + rx = SD_SendCommand(CMD0, 0, 0x95); + retry++; + } while (rx != MSD_IN_IDLE_STATE && retry < 100); + + if (retry >= 100) + { + //MSG("SD IDLE err:%d\r\n",rx); + return ERROR; + } + else + { + //MSG("SD IDLE success\r\n"); + return SUCCESS; + } +} + + +/****************************************************************************/ /** + * @brief SD_ReceiveData + * + * + * +*******************************************************************************/ +uint8_t SD_ReceiveData(uint8_t *data, uint16_t len, uint8_t release) +{ + uint8_t rx; + uint8_t t_0xFF = 0xFF; + uint16_t i; + + SPI_CS_WriteBit(0); + /* get token */ + if (SD_GetResponse(0xFE)) + { + SPI_CS_WriteBit(1); + MSG("sd receive err: no token\r\n"); + return ERROR; + } + else + { + //MSG("sd get token\r\n"); + } + + for (i = 0; i < len; i++) + { + SPI_ReadWriteByte(&t_0xFF, data + i, 1); + } + /* two dummy CRC */ + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + /* */ + if (release) + SPI_CS_WriteBit(1); + + return SUCCESS; +} + +/****************************************************************************/ /** + * @brief SD_SendBlock + * + * + * +*******************************************************************************/ +uint8_t SD_SendBlock(uint8_t *buf, uint8_t cmd) +{ + uint8_t rx; + uint8_t rxbuff[512]; + uint8_t t_0xFF = 0xFF; + uint16_t i; + /* Waiti for free */ + if (SD_GetResponse(0xFF)) + { + SPI_CS_WriteBit(1); + return ERROR; + } + + /* send token */ + SPI_ReadWriteByte(&cmd, &rx, 1); + + if (cmd != 0xFD) + { + /* send block data */ + SPI_ReadWriteByte(buf, rxbuff, 512); + /* two dummy CRC */ + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + /* 8 clock */ + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + + if ((rx & 0x1F) != 0x05) + { + //MSG("sd send err:%d\r\n",rx,1); + SPI_CS_WriteBit(1); + return rx; + } + i = 0; + do + { + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + i++; + } while (rx != 0xFF && i <= 0xFFFE); + } + return 0; +} + +/****************************************************************************/ /** + * @brief SD_GetCID + * + * +*******************************************************************************/ +// static uint8_t SD_GetCID(uint8_t *cid_data) +// { +// uint8_t rx, i; +// rx = SD_SendCommand(CMD10, 0, 0xFF); +// if (rx) +// { +// MSG("get CID err:%d\r\n", rx); +// return rx; +// } +// SD_ReceiveData(cid_data, 16, RELEASE); +// MSG("sd cid:"); +// for (i = 0; i < 16; i++) +// MSG("%02X ", cid_data[i]); +// MSG("end\r\n"); + +// return SUCCESS; +// } + +// /**************************************************************************** +// * @brief SD_GetCSD +// * +// * +// *******************************************************************************/ +// static uint8_t SD_GetCSD(uint8_t *sid_data) +// { +// uint8_t rx, i; +// rx = SD_SendCommand(CMD9, 0, 0xFF); +// if (rx) +// { +// MSG("get CSD err: CMD9 %d\r\n", rx); +// return rx; +// } +// SD_ReceiveData(sid_data, 16, RELEASE); + +// MSG("sd sid:"); +// for (i = 0; i < 16; i++) +// MSG("%02X ", sid_data[i]); +// MSG("end\r\n"); + +// return SUCCESS; +// } + +// /****************************************************************************/ /** +// * @brief SD_GetCapacity +// * +// * +// *******************************************************************************/ +// uint64_t SD_GetCapacity() +// { +// uint8_t csd[16] = {0}; +// uint8_t r1; +// uint16_t i; +// uint64_t Capacity, temp; + +// if (SD_GetCSD(csd) != 0) +// return ERROR; +// /* SDHC */ +// if ((csd[0] & 0xC0) == 0x40) +// { +// Capacity = (uint64_t)csd[9]; +// Capacity += ((uint64_t)csd[8]) << 8; +// Capacity += ((uint64_t)csd[7] & 0x3F) << 16; +// Capacity = (Capacity + 1) << 9; /* sector */ +// //Capacity*=512; /* KByte */ +// MSG("SDHC capacity:%lld MByte\r\n", Capacity / 1024); +// } +// else +// { +// i = csd[6] & 0x03; +// i <<= 8; +// i += csd[7]; +// i <<= 2; +// i += ((csd[8] & 0xc0) >> 6); +// /*C_SIZE_MULT */ +// r1 = csd[9] & 0x03; +// r1 <<= 1; +// r1 += ((csd[10] & 0x80) >> 7); +// r1 += 2; +// temp = 1; +// while (r1) +// { +// temp *= 2; +// r1--; +// } +// Capacity = ((uint64_t)(i + 1)) * ((uint64_t)temp); +// /* READ_BL_LEN */ +// i = csd[5] & 0x0f; +// /* BLOCK_LEN */ +// temp = 1; +// while (i) +// { +// temp *= 2; +// i--; +// } +// /* The final result */ +// Capacity *= (uint64_t)temp; //字节为单位 +// MSG("SD capacity:%u MByte\r\n", Capacity / 1024 / 1024); +// } +// return (uint32_t)Capacity; +// } + +/****************************************************************************/ /** + * @brief SD_Get_CardInfo + * + * +*******************************************************************************/ +uint8_t SD_Get_CardInfo(SD_CardInfoTypedef *pCardInfo) +{ + uint8_t rx,t_0xFF; + uint32_t tmp = 0; + /* get cid */ + rx = SD_SendCommand(CMD10, 0, 0xFF); + if (rx) + return 1; + SD_ReceiveData(pCardInfo->SD_cid.CID, 16, RELEASE); + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + /* get csd */ + rx = SD_SendCommand(CMD9, 0, 0xFF); + if (rx) + return 1; + SD_ReceiveData(pCardInfo->SD_csd.CSD, 16, RELEASE); + + /* Byte 0 */ + tmp = pCardInfo->SD_csd.CSD[0]; + pCardInfo->SD_csd.CSDStruct = (uint8_t)((tmp & 0xC0) >> 6); + pCardInfo->SD_csd.SysSpecVersion = (uint8_t)((tmp & 0x3C) >> 2); + pCardInfo->SD_csd.Reserved1 = tmp & 0x03; + /* Byte 1 */ + tmp = pCardInfo->SD_csd.CSD[1]; + pCardInfo->SD_csd.TAAC = (uint8_t)tmp; + /* Byte 2 */ + tmp = pCardInfo->SD_csd.CSD[2]; + pCardInfo->SD_csd.NSAC = (uint8_t)tmp; + /* Byte 3 */ + tmp = pCardInfo->SD_csd.CSD[3]; + pCardInfo->SD_csd.MaxBusClkFrec = (uint8_t)tmp; + /* Byte 4 */ + tmp = pCardInfo->SD_csd.CSD[4] ; + pCardInfo->SD_csd.CardComdClasses = (uint16_t)(tmp << 4); + /* Byte 5 */ + tmp = pCardInfo->SD_csd.CSD[5]; + pCardInfo->SD_csd.CardComdClasses |= (uint16_t)((tmp & 0xF0) >> 4); + pCardInfo->SD_csd.RdBlockLen = (uint8_t)(tmp & 0x0F); + /* Byte 6 */ + tmp = pCardInfo->SD_csd.CSD[6]; + pCardInfo->SD_csd.PartBlockRead = (uint8_t)((tmp & 0x80) >> 7); + pCardInfo->SD_csd.WrBlockMisalign = (uint8_t)((tmp & 0x40) >> 6); + pCardInfo->SD_csd.RdBlockMisalign = (uint8_t)((tmp & 0x20) >> 5); + pCardInfo->SD_csd.DSRImpl = (uint8_t)((tmp & 0x10) >> 4); + pCardInfo->SD_csd.Reserved2 = 0; /*!< Reserved */ + + if ((pCardInfo->CardType == SD_TYPE_V1) || (pCardInfo->CardType == SD_TYPE_V2)) + { + pCardInfo->SD_csd.DeviceSize = (tmp & 0x03) << 10; + /* Byte 7 */ + tmp = pCardInfo->SD_csd.CSD[7] ; + pCardInfo->SD_csd.DeviceSize |= (tmp) << 2; + /* Byte 8 */ + tmp = pCardInfo->SD_csd.CSD[8] ; + pCardInfo->SD_csd.DeviceSize |= (tmp & 0xC0) >> 6; + pCardInfo->SD_csd.MaxRdCurrentVDDMin = (tmp & 0x38) >> 3; + pCardInfo->SD_csd.MaxRdCurrentVDDMax = (tmp & 0x07); + /* Byte 9 */ + tmp = pCardInfo->SD_csd.CSD[9] ; + pCardInfo->SD_csd.MaxWrCurrentVDDMin = (tmp & 0xE0) >> 5; + pCardInfo->SD_csd.MaxWrCurrentVDDMax = (tmp & 0x1C) >> 2; + pCardInfo->SD_csd.DeviceSizeMul = (tmp & 0x03) << 1; + /* Byte 10 */ + tmp = pCardInfo->SD_csd.CSD[10] ; + pCardInfo->SD_csd.DeviceSizeMul |= (tmp & 0x80) >> 7; + + pCardInfo->CardCapacity = (pCardInfo->SD_csd.DeviceSize + 1); + pCardInfo->CardCapacity *= (1 << (pCardInfo->SD_csd.DeviceSizeMul + 2)); + pCardInfo->CardBlockSize = 1 << (pCardInfo->SD_csd.RdBlockLen); + pCardInfo->CardCapacity *= pCardInfo->CardBlockSize; + } + else if (pCardInfo->CardType == SD_TYPE_V2HC) + { + /* Byte 7 */ + tmp = pCardInfo->SD_csd.CSD[7] ; + pCardInfo->SD_csd.DeviceSize = (tmp & 0x3F) << 16; + /* Byte 8 */ + tmp = pCardInfo->SD_csd.CSD[8] ; + pCardInfo->SD_csd.DeviceSize |= (tmp << 8); + /* Byte 9 */ + tmp = pCardInfo->SD_csd.CSD[9]; + pCardInfo->SD_csd.DeviceSize |= (tmp); + /* Byte 10 */ + tmp = pCardInfo->SD_csd.CSD[10] ; + + pCardInfo->CardCapacity = (uint64_t)((((uint64_t)pCardInfo->SD_csd.DeviceSize + 1)) * 512 * 1024); + pCardInfo->CardBlockSize = 512; + } + else + { + /* Not supported card type */ + } + pCardInfo->SD_csd.EraseGrSize = (tmp & 0x40) >> 6; + pCardInfo->SD_csd.EraseGrMul = (tmp & 0x3F) << 1; + /* Byte 11 */ + tmp = pCardInfo->SD_csd.CSD[11]; + pCardInfo->SD_csd.EraseGrMul |= (tmp & 0x80) >> 7; + pCardInfo->SD_csd.WrProtectGrSize = (tmp & 0x7F); + /* Byte 12 */ + tmp = pCardInfo->SD_csd.CSD[12]; + pCardInfo->SD_csd.WrProtectGrEnable = (tmp & 0x80) >> 7; + pCardInfo->SD_csd.ManDeflECC = (tmp & 0x60) >> 5; + pCardInfo->SD_csd.WrSpeedFact = (tmp & 0x1C) >> 2; + pCardInfo->SD_csd.MaxWrBlockLen = (tmp & 0x03) << 2; + /* Byte 13 */ + tmp = pCardInfo->SD_csd.CSD[13]; + pCardInfo->SD_csd.MaxWrBlockLen |= (tmp & 0xC0) >> 6; + pCardInfo->SD_csd.WriteBlockPaPartial = (tmp & 0x20) >> 5; + pCardInfo->SD_csd.Reserved3 = 0; + pCardInfo->SD_csd.ContentProtectAppli = (tmp & 0x01); + /* Byte 14 */ + tmp = pCardInfo->SD_csd.CSD[14] ; + pCardInfo->SD_csd.FileFormatGrouop = (tmp & 0x80) >> 7; + pCardInfo->SD_csd.CopyFlag = (tmp & 0x40) >> 6; + pCardInfo->SD_csd.PermWrProtect = (tmp & 0x20) >> 5; + pCardInfo->SD_csd.TempWrProtect = (tmp & 0x10) >> 4; + pCardInfo->SD_csd.FileFormat = (tmp & 0x0C) >> 2; + pCardInfo->SD_csd.ECC = (tmp & 0x03); + /* Byte 15 */ + tmp = pCardInfo->SD_csd.CSD[15]; + pCardInfo->SD_csd.CSD_CRC = (tmp & 0xFE) >> 1; + pCardInfo->SD_csd.Reserved4 = 1; + + /* Byte 0 */ + tmp = pCardInfo->SD_cid.CID[0] ; + pCardInfo->SD_cid.ManufacturerID = tmp; + /* Byte 1 */ + tmp = pCardInfo->SD_cid.CID[1]; + pCardInfo->SD_cid.OEM_AppliID = tmp << 8; + /* Byte 2 */ + tmp = pCardInfo->SD_cid.CID[2]; + pCardInfo->SD_cid.OEM_AppliID |= tmp; + /* Byte 3 */ + tmp = pCardInfo->SD_cid.CID[3]; + pCardInfo->SD_cid.ProdName1 = tmp << 24; + /* Byte 4 */ + tmp = pCardInfo->SD_cid.CID[4]; + pCardInfo->SD_cid.ProdName1 |= tmp << 16; + /* Byte 5 */ + tmp = pCardInfo->SD_cid.CID[5]; + pCardInfo->SD_cid.ProdName1 |= tmp << 8; + /* Byte 6 */ + tmp = pCardInfo->SD_cid.CID[6]; + pCardInfo->SD_cid.ProdName1 |= tmp; + /* Byte 7 */ + tmp = pCardInfo->SD_cid.CID[7]; + pCardInfo->SD_cid.ProdName2 = tmp; + /* Byte 8 */ + tmp = pCardInfo->SD_cid.CID[8] ; + pCardInfo->SD_cid.ProdRev = tmp; + /* Byte 9 */ + tmp = pCardInfo->SD_cid.CID[9]; + pCardInfo->SD_cid.ProdSN = tmp << 24; + /* Byte 10 */ + tmp = pCardInfo->SD_cid.CID[10]; + pCardInfo->SD_cid.ProdSN |= tmp << 16; + /* Byte 11 */ + tmp = pCardInfo->SD_cid.CID[11]; + pCardInfo->SD_cid.ProdSN |= tmp << 8; + /* Byte 12 */ + tmp = pCardInfo->SD_cid.CID[12]; + pCardInfo->SD_cid.ProdSN |= tmp; + /* Byte 13 */ + tmp = pCardInfo->SD_cid.CID[13]; + pCardInfo->SD_cid.Reserved1 |= (tmp & 0xF0) >> 4; + pCardInfo->SD_cid.ManufactDate = (tmp & 0x0F) << 8; + /* Byte 14 */ + tmp = pCardInfo->SD_cid.CID[14]; + pCardInfo->SD_cid.ManufactDate |= tmp; + /* Byte 15 */ + tmp = pCardInfo->SD_cid.CID[16]; + pCardInfo->SD_cid.CID_CRC = (tmp & 0xFE) >> 1; + pCardInfo->SD_cid.Reserved2 = 1; + return 0; +} + +/****************************************************************************/ /** + * @brief SD_ReadSingleBlock + * + * +*******************************************************************************/ +uint8_t SD_ReadBlock(uint32_t sector, uint8_t *buffer, uint32_t num) +{ + uint8_t rx; + uint8_t t_0xFF; + SPI_CS_WriteBit(0); + /* sector to byte */ + if (SD_CardInfo.CardType != SD_TYPE_V2HC){ + sector = sector << 9; + } + if (num == 1){ + rx = SD_SendCommand(CMD17, sector, 0); + if (rx) + { + MSG("SD CMD17 err:%02X\r\n", rx); + return rx; + } + rx = SD_ReceiveData(buffer, 512, RELEASE); + if (rx != 0) + { + MSG("SD sing read err:%02X\r\n", rx); + return rx; + } + } + else{ + rx = SD_SendCommand(CMD18, sector, 0); + if (rx) + { + MSG("SD CMD18 err:%02X\r\n", rx); + return rx; + } + while (num--) + { + rx = SD_ReceiveData(buffer, 512, NO_RELEASE); + if (rx != 0) + { + MSG("SD read err:%02X\r\n", rx); + return rx; + } + buffer += 512; + } + rx = SD_SendCommand(CMD12, 0, 0); + SPI_CS_WriteBit(1); + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + } + return SUCCESS; +} +/****************************************************************************/ /** + * @brief SD_WriteSingleBlock + * + * +*******************************************************************************/ +uint8_t SD_WriteBlock(uint32_t sector, uint8_t *data, uint32_t num) +{ + uint8_t rx; + uint8_t t_0xFF; + + /* sector to byte */ + if (SD_CardInfo.CardType != SD_TYPE_V2HC){ + sector = sector << 9; + } + + if (SD_GetResponse(0xFF)){ + return 1; + } + if (num == 1){ + rx = SD_SendCommand(CMD24, sector, 1); + if (rx) + { + MSG("SD CMD24 err:%d\r\n", rx); + return rx; + } + SPI_CS_WriteBit(0); + rx = SD_SendBlock(data, 0xFE); + if (rx) + { + MSG("write err\r\n"); + SPI_CS_WriteBit(0); + return rx; + } + } + else if (num > 1){ + if (SD_CardInfo.CardType != SD_TYPE_MMC) + { + rx = SD_SendCommand(CMD55, 0, 1); + if (rx == 0) + rx = SD_SendCommand(ACMD23, num, 1); + if (rx != 0) + { + MSG("SD ACMD23 err:%d\r\n", rx); + return rx; + } + } + rx = SD_SendCommand(CMD25, sector, 1); + if (rx != 0) + { + MSG("SD ACMD25 err:%d\r\n", rx); + return rx; + } + SPI_CS_WriteBit(0); + do + { + rx = SD_SendBlock(data, 0xFC); + data += 512; + } while (--num && rx == 0); + rx = SD_SendBlock(data, 0xFD); + } + SPI_CS_WriteBit(1); + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + return 0; +} +/****************************************************************************/ /** + * @brief SD init + * + * + * + * +*******************************************************************************/ +uint8_t SD_Init(SD_CardInfoTypedef *pCardInfo) +{ + uint8_t rx; + uint8_t t_0xFF = 0xFF; + //uint8_t txbuff[6]; + uint8_t rxbuff[6]; + uint16_t retry = 0,i; + + SD_SPI_Init(); + + SPI_CS_WriteBit(1); + /* low speed */ + SD_SPI_SetSpeed(0); + + if (SD_Idle_Sta()) + { + MSG("SD IDLE err:%d\r\n", rx); + return ERROR; + } + else + { + MSG("SD IDLE success\r\n"); + } + + /* send CMD8 */ + rx = SD_SendCommand_NoDeassert(CMD8, 0x1aa, 0x87); + /* sd card v1.0 */ + if (rx == 0x05) + { + + pCardInfo->CardType = SD_TYPE_V1; + SPI_CS_WriteBit(1); + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + /* send CMD55+CMD41 sd init */ + do + { + rx = SD_SendCommand(CMD55, 0, 0); + if (rx != 0x01) + { + MSG("sdv1 CMD55 err:%d\r\n", rx); + return rx; + } + rx = SD_SendCommand(ACMD41, 0, 0); + retry++; + + } while (rx != 0x00 && retry < 100); + + /* mmc card init */ + if (retry >= 100) + { + retry = 0; + do + { + rx = SD_SendCommand(CMD1, 0, 0); + retry++; + } while (rx != 0x00 && retry < 100); + + if (retry >= 100) + { + MSG("sdv2 CMD1 timeout err:%d\r\n", rx); + return ERROR; + } + else + { + pCardInfo->CardType = SD_TYPE_MMC; + } + } + /* high speed */ + SD_SPI_SetSpeed(1); + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + + /* set sector size */ + rx = SD_SendCommand(CMD16, 512, 0xff); + if (rx != 0x00) + { + MSG("sdv1 CMD16 err:%d\r\n", rx); + return rx; + } + } + /* sd card v2.0 */ + else if (rx == 0x01) + { + + SPI_ReadWriteByte(&t_0xFF, rxbuff + 0, 1); + SPI_ReadWriteByte(&t_0xFF, rxbuff + 1, 1); + SPI_ReadWriteByte(&t_0xFF, rxbuff + 2, 1); + SPI_ReadWriteByte(&t_0xFF, rxbuff + 3, 1); + + SPI_CS_WriteBit(1); + /* next 8 clocks */ + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + /* 2.7V - 3.6V */ + if (rxbuff[2] == 0x01 && rxbuff[3] == 0xAA) + { + retry = 0; + do + { + rx = SD_SendCommand(CMD55, 0, 0); + if (rx != 0x01) + { + MSG("sdv2 CMD55 err:%d\r\n", rx); + return rx; + } + rx = SD_SendCommand(ACMD41, 0x40000000, 0); + retry++; + if (retry > 200) + { + MSG("sdv2 CMD41 timeout err:%d\r\n", rx); + return rx; + } + } while (rx != 0); + /* send CMD58 */ + rx = SD_SendCommand_NoDeassert(CMD58, 0, 0); + if (rx != 0X00) + { + MSG("sdv2 CMD58 err:%d\r\n", rx); + return rx; + } + /* get OCR */ + SPI_ReadWriteByte(&t_0xFF, rxbuff + 0, 1); + SPI_ReadWriteByte(&t_0xFF, rxbuff + 1, 1); + SPI_ReadWriteByte(&t_0xFF, rxbuff + 2, 1); + SPI_ReadWriteByte(&t_0xFF, rxbuff + 3, 1); + + SPI_CS_WriteBit(1); + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + /* bit32 CCS: 1-SDHC 0-SD2.0 */ + if (rxbuff[0] & 0x40) + { + pCardInfo->CardType = SD_TYPE_V2HC; + MSG("sdv2hc success\r\n"); + } + else + { + pCardInfo->CardType = SD_TYPE_V2; + MSG("sdv2.0 success\r\n"); + } + + /* set sector size */ + rx = SD_SendCommand(CMD16, 512, 0xff); + if (rx != 0x00) + MSG("sdv1 CMD16 err:%d\r\n", rx); + /* high speed */ + SD_SPI_SetSpeed(1); + SPI_ReadWriteByte(&t_0xFF, &rx, 1); + } + } + else + { + return 1; + } + MSG("sd init success\r\n"); + + SD_Get_CardInfo(pCardInfo); + + MSG(" sd csd:"); + for (i = 0; i < 4; i++) + MSG("%X ", pCardInfo->SD_csd.CSD[i]); + MSG("end\r\n sd cid:"); + for (i = 0; i < 4; i++) + MSG("%X ", pCardInfo->SD_cid.CID[i]); + MSG("end\r\n"); + MSG("SDHC CardBlockSize:%d Byte\r\n", (pCardInfo->CardBlockSize)); + MSG("SDHC CardCapacity:%lld MByte\r\n", (SD_CardInfo.CardCapacity/1024/1024)); + + return 0; +} diff --git a/bsp/bsp_common/spi_sd/bsp_spi_sd.h b/bsp/bsp_common/spi_sd/bsp_spi_sd.h new file mode 100644 index 00000000..07696194 --- /dev/null +++ b/bsp/bsp_common/spi_sd/bsp_spi_sd.h @@ -0,0 +1,149 @@ +/** + * @file bsp_spi_sd.h + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ + +#ifndef __SPI_SD_H__ +#define __SPI_SD_H__ + +#define SPI_PIN_CS GPIO_PIN_10 + +//SD传输数据结束后是否释放总线宏定义 +#define NO_RELEASE 0 +#define RELEASE 1 +// SD卡类型定义 +#define SD_TYPE_MMC 0 +#define SD_TYPE_V1 1 +#define SD_TYPE_V2 2 +#define SD_TYPE_V2HC 4 + +#define CMD0 0 // Resets the SD memory card. +#define CMD1 1 // Sends host capacity support information and activates the card's initialization process. +#define CMD8 8 // Sends SD Memory Card interface condition, which includes host supply voltage information and asks the card whether card supports voltage. +#define CMD9 9 // Addressed card sends its card specific data (CSD) on the CMD line. +#define CMD10 10 // Addressed card sends its card identification (CID) on the CMD line. +#define CMD12 12 // Forces the card to stop transmission. +#define CMD16 16 // Sets the block length (in bytes for SDSC) for all following block commands (read, write, lock). + // Default block length is fixed to 512 Bytes. Not effective for SDHS and SDXC +#define CMD17 17 // Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of fixed 512 bytes in case of SDHC and SDXC +#define CMD18 18 // Continuously transfers data blocks from card to host until interrupted by STOP_TRANSMISSION command +#define ACMD23 23 // Specify block count for CMD18 and CMD25 +#define CMD24 24 // Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of fixed 512 bytes in case of SDHC and SDXC. +#define CMD25 25 // Continuously writes blocks of data until a STOP_TRANSMISSION follows. +#define ACMD41 41 // +#define CMD55 55 // Indicates to the card that the next command is an application specific command rather than a standard command. +#define CMD58 58 // get OCR +#define CMD59 59 // enable/disable crc + +//数据写入回应字意义 +#define MSD_DATA_OK 0x05 +#define MSD_DATA_CRC_ERROR 0x0B +#define MSD_DATA_WRITE_ERROR 0x0D +#define MSD_DATA_OTHER_ERROR 0xFF +//SD卡回应标记字 +#define MSD_RESPONSE_NO_ERROR 0x00 // Card state is ready +#define MSD_IN_IDLE_STATE 0x01 // Card is in identification state +#define MSD_ERASE_RESET 0x02 // Card is in standby state +#define MSD_ILLEGAL_COMMAND 0x04 // Card is in transfer state +#define MSD_COM_CRC_ERROR 0x08 // Card is sending an operation +#define MSD_ERASE_SEQUENCE_ERROR 0x10 // Card is receiving operation information +#define MSD_ADDRESS_ERROR 0x20 // Card is in programming state +#define MSD_PARAMETER_ERROR 0x40 // Card is disconnected +#define MSD_RESPONSE_FAILURE 0xFF // Card is in error state + +typedef struct +{ + uint8_t CSD[16]; /*!< SD card specific data table */ + uint8_t CSDStruct; /*!< CSD structure */ + uint8_t SysSpecVersion; /*!< System specification version */ + uint8_t Reserved1; /*!< Reserved */ + uint8_t TAAC; /*!< Data read access time 1 */ + uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ + uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ + uint16_t CardComdClasses; /*!< Card command classes */ + uint8_t RdBlockLen; /*!< Max. read data block length */ + uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ + uint8_t WrBlockMisalign; /*!< Write block misalignment */ + uint8_t RdBlockMisalign; /*!< Read block misalignment */ + uint8_t DSRImpl; /*!< DSR implemented */ + uint8_t Reserved2; /*!< Reserved */ + uint32_t DeviceSize; /*!< Device Size */ + uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ + uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ + uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ + uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ + uint8_t DeviceSizeMul; /*!< Device size multiplier */ + uint8_t EraseGrSize; /*!< Erase group size */ + uint8_t EraseGrMul; /*!< Erase group size multiplier */ + uint8_t WrProtectGrSize; /*!< Write protect group size */ + uint8_t WrProtectGrEnable; /*!< Write protect group enable */ + uint8_t ManDeflECC; /*!< Manufacturer default ECC */ + uint8_t WrSpeedFact; /*!< Write speed factor */ + uint8_t MaxWrBlockLen; /*!< Max. write data block length */ + uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ + uint8_t Reserved3; /*!< Reserved */ + uint8_t ContentProtectAppli; /*!< Content protection application */ + uint8_t FileFormatGrouop; /*!< File format group */ + uint8_t CopyFlag; /*!< Copy flag (OTP) */ + uint8_t PermWrProtect; /*!< Permanent write protection */ + uint8_t TempWrProtect; /*!< Temporary write protection */ + uint8_t FileFormat; /*!< File format */ + uint8_t ECC; /*!< ECC code */ + uint8_t CSD_CRC; /*!< CSD CRC */ + uint8_t Reserved4; /*!< Always 1 */ + +} SD_CSDTypedef; + +typedef struct +{ + uint8_t CID[16]; /*!< SD card identification number table */ + uint8_t ManufacturerID; /*!< Manufacturer ID */ + uint16_t OEM_AppliID; /*!< OEM/Application ID */ + uint32_t ProdName1; /*!< Product Name part1 */ + uint8_t ProdName2; /*!< Product Name part2 */ + uint8_t ProdRev; /*!< Product Revision */ + uint32_t ProdSN; /*!< Product Serial Number */ + uint8_t Reserved1; /*!< Reserved1 */ + uint16_t ManufactDate; /*!< Manufacturing Date */ + uint8_t CID_CRC; /*!< CID CRC */ + uint8_t Reserved2; /*!< Always 1 */ + +} SD_CIDTypedef; + +typedef struct SD_CardInfoTypedef +{ + SD_CSDTypedef SD_csd; /*!< SD card specific data register */ + SD_CIDTypedef SD_cid; /*!< SD card identification number register */ + uint64_t CardCapacity; /*!< Card capacity */ + uint32_t CardBlockSize; /*!< Card block size */ + uint16_t RCA; /*!< SD relative card address */ + uint8_t CardType; /*!< SD card type */ +} SD_CardInfoTypedef; + +extern SD_CardInfoTypedef SD_CardInfo; + +uint8_t SD_Init(SD_CardInfoTypedef *pCardInfo); +uint8_t SD_Get_CardInfo(SD_CardInfoTypedef *pCardInfo); + +uint8_t SD_ReadBlock(uint32_t sector, uint8_t *buffer, uint32_t num); +uint8_t SD_WriteBlock(uint32_t sector, uint8_t *buffer, uint32_t num); + +#endif \ No newline at end of file diff --git a/bsp/bsp_common/usb/uart_interface.c b/bsp/bsp_common/usb/uart_interface.c new file mode 100644 index 00000000..a14ca40d --- /dev/null +++ b/bsp/bsp_common/usb/uart_interface.c @@ -0,0 +1,197 @@ +/** + * @file uart_interface.c + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ + +#include "hal_gpio.h" +#include "uart_interface.h" +#include "hal_usb.h" +#include "hal_dma.h" + +#define USB_OUT_RINGBUFFER_SIZE (8 * 1024) +#define UART_RX_RINGBUFFER_SIZE (8 * 1024) +#define UART_TX_DMA_SIZE (4095) + +uint8_t usb_rx_mem[USB_OUT_RINGBUFFER_SIZE] __attribute__((section(".system_ram"))); +uint8_t uart_rx_mem[UART_RX_RINGBUFFER_SIZE] __attribute__((section(".system_ram"))); + +uint8_t src_buffer[UART_TX_DMA_SIZE] __attribute__((section(".tcm_code"))); + +struct device* uart1; +struct device* dma_ch2; + +Ring_Buffer_Type usb_rx_rb; +Ring_Buffer_Type uart1_rx_rb; + +void uart_irq_callback(struct device *dev, void *args, uint32_t size, uint32_t state) +{ + if (state == UART_EVENT_RX_FIFO) + { + if (size && size < Ring_Buffer_Get_Empty_Length(&uart1_rx_rb)) + { + Ring_Buffer_Write(&uart1_rx_rb, (uint8_t *)args, size); + } + else + { + MSG("RF\r\n"); + } + } + else if (state == UART_EVENT_RTO) + { + if (size && size < Ring_Buffer_Get_Empty_Length(&uart1_rx_rb)) + { + Ring_Buffer_Write(&uart1_rx_rb, (uint8_t *)args, size); + } + else + { + MSG("RTO\r\n"); + } + } + else if (state == UART_RX_FER_IT) + { + MSG("ov\r\n"); + } +} +void uart1_init(void) +{ + uart_register(UART1_INDEX, "uart1", DEVICE_OFLAG_RDWR); + uart1 = device_find("uart1"); + + if (uart1) + { + device_open(uart1, DEVICE_OFLAG_DMA_TX | DEVICE_OFLAG_INT_RX); //uart0 tx dma mode + device_set_callback(uart1, uart_irq_callback); + device_control(uart1, DEVICE_CTRL_SET_INT, (void *)(UART_RX_FIFO_IT | UART_RTO_IT | UART_RX_FER_IT)); + } + + dma_register(DMA0_CH2_INDEX, "ch2", DEVICE_OFLAG_RDWR); + dma_ch2 = device_find("ch2"); + if (dma_ch2) + { + device_open(dma_ch2, 0); + //device_set_callback(dma_ch2, NULL); + //device_control(dma_ch2, DEVICE_CTRL_SET_INT, NULL); + } + device_control(uart1, DEVICE_CTRL_UART_ATTACH_TX_DMA, dma_ch2); + +} + +void uart1_config(uint32_t baudrate, uart_databits_t databits, uart_parity_t parity, uart_stopbits_t stopbits) +{ + uart_param_cfg_t cfg; + cfg.baudrate = baudrate; + cfg.stopbits = stopbits; + cfg.parity = parity; + + if (databits == 5) + { + cfg.databits = UART_DATA_LEN_5; + } + else if (databits == 6) + { + cfg.databits = UART_DATA_LEN_6; + } + else if (databits == 7) + { + cfg.databits = UART_DATA_LEN_7; + } + else if (databits == 8) + { + cfg.databits = UART_DATA_LEN_8; + } + + device_control(uart1, DEVICE_CTRL_CONFIG, &cfg); +} + +void uart1_dtr_init(void) +{ + gpio_set_mode(GPIO_PIN_21, GPIO_OUTPUT_MODE); +} +void uart1_rts_init(void) +{ + gpio_set_mode(GPIO_PIN_20, GPIO_OUTPUT_MODE); +} +void dtr_pin_set(uint8_t status) +{ + gpio_write(GPIO_PIN_21, status); +} +void rts_pin_set(uint8_t status) +{ + gpio_write(GPIO_PIN_20, status); +} +void ringbuffer_lock() +{ + disable_irq(); +} +void ringbuffer_unlock() +{ + enable_irq(); +} + +void uart_ringbuffer_init(void) +{ + /* init mem for ring_buffer */ + memset(usb_rx_mem, 0, USB_OUT_RINGBUFFER_SIZE); + memset(uart_rx_mem, 0, UART_RX_RINGBUFFER_SIZE); + + /* init ring_buffer */ + Ring_Buffer_Init(&usb_rx_rb, usb_rx_mem, USB_OUT_RINGBUFFER_SIZE, ringbuffer_lock, ringbuffer_unlock); + Ring_Buffer_Init(&uart1_rx_rb, uart_rx_mem, UART_RX_RINGBUFFER_SIZE, ringbuffer_lock, ringbuffer_unlock); +} + +static dma_control_data_t uart_dma_ctrl_cfg = +{ + .bits.fix_cnt = 0, + .bits.dst_min_mode = 0, + .bits.dst_add_mode = 0, + .bits.SI = 1, + .bits.DI = 0, + .bits.SWidth = DMA_TRANSFER_WIDTH_8BIT, + .bits.DWidth = DMA_TRANSFER_WIDTH_8BIT, + .bits.SBSize = 0, + .bits.DBSize = 0, + .bits.I = 0, + .bits.TransferSize = 4095 +}; +static dma_lli_ctrl_t uart_lli_list = +{ + .src_addr = (uint32_t)src_buffer, + .dst_addr = DMA_ADDR_UART1_TDR, + .nextlli = 0 +}; + +void uart_send_from_ringbuffer(void) +{ + if (!device_control(dma_ch2, DMA_CHANNEL_GET_STATUS_CMD, NULL)) + { + uint32_t avalibleCnt = Ring_Buffer_Read(&usb_rx_rb, src_buffer, UART_TX_DMA_SIZE); + + if (avalibleCnt) + { + dma_channel_stop(dma_ch2); + uart_dma_ctrl_cfg.bits.TransferSize = avalibleCnt; + memcpy(&uart_lli_list.cfg, &uart_dma_ctrl_cfg, sizeof(dma_control_data_t)); + device_control(dma_ch2,DMA_CHANNEL_UPDATE_CMD,(void*)((uint32_t)&uart_lli_list)); + dma_channel_start(dma_ch2); + //device_write(uart1, 0, src_buffer, avalibleCnt); + } + } +} \ No newline at end of file diff --git a/bsp/bsp_common/usb/uart_interface.h b/bsp/bsp_common/usb/uart_interface.h new file mode 100644 index 00000000..9fc5e095 --- /dev/null +++ b/bsp/bsp_common/usb/uart_interface.h @@ -0,0 +1,41 @@ +/** + * @file uart_interface.h + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ + +#ifndef __UART_IF_H__ +#define __UART_IF_H__ + +#include "hal_uart.h" +#include "ring_buffer.h" + +extern Ring_Buffer_Type usb_rx_rb; +extern Ring_Buffer_Type uart1_rx_rb; + +void uart1_init(void); +void uart1_config(uint32_t baudrate,uart_databits_t databits,uart_parity_t parity,uart_stopbits_t stopbits); +void uart1_dtr_init(void); +void uart1_rts_init(void); +void dtr_pin_set(uint8_t status); +void rts_pin_set(uint8_t status); +void uart_ringbuffer_init(void); +void uart_send_from_ringbuffer(void); +#endif \ No newline at end of file diff --git a/bsp/bsp_common/usb/usb_dc.c b/bsp/bsp_common/usb/usb_dc.c new file mode 100644 index 00000000..38fdcea1 --- /dev/null +++ b/bsp/bsp_common/usb/usb_dc.c @@ -0,0 +1,116 @@ +/** + * @file usb_dc.c + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ + +#include "hal_usb.h" +#include "stdbool.h" +#include "usbd_core.h" + +struct device *usb; + +static void usb_dc_event_callback(struct device *dev, void *args, uint32_t size, uint32_t state) +{ + switch (state) + { + case USB_DC_EVENT_ERROR: + break; + case USB_DC_EVENT_RESET: + { + struct usbd_endpoint_cfg ep_cfg[2]; + ep_cfg[0].ep_addr = USB_CONTROL_IN_EP0; + ep_cfg[0].ep_mps = USB_CTRL_EP_MPS; + ep_cfg[0].ep_type = USBD_EP_TYPE_BULK; + ep_cfg[1].ep_addr = USB_CONTROL_OUT_EP0; + ep_cfg[1].ep_mps = USB_CTRL_EP_MPS; + ep_cfg[1].ep_type = USBD_EP_TYPE_BULK; + usbd_ep_open(&ep_cfg[0]); + usbd_ep_open(&ep_cfg[1]); + usbd_set_address(0); + + usbd_event_notify_handler(USB_EVENT_RESET,NULL); + } + break; + case USB_DC_EVENT_SOF: + break; + case USB_DC_EVENT_SETUP_NOTIFY: + usbd_event_notify_handler(USB_EVENT_SETUP_NOTIFY,NULL); + break; + case USB_DC_EVENT_EP0_IN_NOTIFY: + usbd_event_notify_handler(USB_EVENT_EP0_IN_NOTIFY,NULL); + break; + case USB_DC_EVENT_EP0_OUT_NOTIFY: + usbd_event_notify_handler(USB_EVENT_EP0_OUT_NOTIFY,NULL); + break; + case USB_DC_EVENT_EP_IN_NOTIFY: + usbd_event_notify_handler(USB_EVENT_EP_IN_NOTIFY,args); + break; + case USB_DC_EVENT_EP_OUT_NOTIFY: + usbd_event_notify_handler(USB_EVENT_EP_OUT_NOTIFY,args); + break; + default: + break; + } +} +struct device* usb_dc_init(void) +{ + usb_dc_register(USB_INDEX, "usb", DEVICE_OFLAG_RDWR); + usb = device_find("usb"); + device_set_callback(usb,usb_dc_event_callback); + device_open(usb, 0); + return usb; +} + +int usbd_set_address(const uint8_t addr) +{ + return device_control(usb,DEVICE_CTRL_USB_DC_SET_ADDR,(void*)(uint32_t)addr); +} + +int usbd_ep_open(const struct usbd_endpoint_cfg *ep_cfg) +{ + return usb_dc_ep_open(usb,(const struct usb_dc_ep_cfg*)ep_cfg); +} +int usbd_ep_close(const uint8_t ep) +{ + return 0; +} +int usbd_ep_set_stall(const uint8_t ep) +{ + return device_control(usb,DEVICE_CTRL_USB_DC_SET_STALL,(void*)(uint32_t)ep); +} +int usbd_ep_clear_stall(const uint8_t ep) +{ + return device_control(usb,DEVICE_CTRL_USB_DC_CLR_STALL,(void*)(uint32_t)ep); +} +int usbd_ep_is_stalled(const uint8_t ep, uint8_t *stalled) +{ + return usb_dc_ep_is_stalled(usb,ep,stalled); +} + +int usbd_ep_write(const uint8_t ep, const uint8_t *data, uint32_t data_len, uint32_t *ret_bytes) +{ + return usb_dc_ep_write(usb,ep,data,data_len,ret_bytes); +} + +int usbd_ep_read(const uint8_t ep, uint8_t *data, uint32_t max_data_len,uint32_t *read_bytes) +{ + return usb_dc_ep_read(usb,ep,data,max_data_len,read_bytes); +} diff --git a/common/CMakeLists.txt b/common/CMakeLists.txt new file mode 100644 index 00000000..8ca766d2 --- /dev/null +++ b/common/CMakeLists.txt @@ -0,0 +1,64 @@ +################# Add global include ################# +list(APPEND ADD_INCLUDE +"${CMAKE_CURRENT_SOURCE_DIR}/libc/inc" +"${CMAKE_CURRENT_SOURCE_DIR}/ring_buffer" +"${CMAKE_CURRENT_SOURCE_DIR}/soft_crc" +"${CMAKE_CURRENT_SOURCE_DIR}/memheap" +"${CMAKE_CURRENT_SOURCE_DIR}/libc/inc/arm_gcc" +"${CMAKE_CURRENT_SOURCE_DIR}/libc/inc/bits" +"${CMAKE_CURRENT_SOURCE_DIR}/libc/inc/sys" +"${CMAKE_CURRENT_SOURCE_DIR}/misc" +"${CMAKE_CURRENT_SOURCE_DIR}/list" +"${CMAKE_CURRENT_SOURCE_DIR}/device" +) +####################################################### + +################# Add private include ################# +# list(APPEND ADD_PRIVATE_INCLUDE +# ) +####################################################### + +############## Add current dir source files ########### +file(GLOB_RECURSE sources +"${CMAKE_CURRENT_SOURCE_DIR}/libc/src/*.c" +"${CMAKE_CURRENT_SOURCE_DIR}/ring_buffer/*.c" +"${CMAKE_CURRENT_SOURCE_DIR}/soft_crc/*.c" +"${CMAKE_CURRENT_SOURCE_DIR}/memheap/*.c" +"${CMAKE_CURRENT_SOURCE_DIR}/misc/*.c" +"${CMAKE_CURRENT_SOURCE_DIR}/device/*.c" +"${CMAKE_CURRENT_SOURCE_DIR}/partition/*.c" +) + +#aux_source_directory(. sources) +list(APPEND ADD_SRCS ${sources}) +list(REMOVE_ITEM ADD_SRCS "${CMAKE_CURRENT_SOURCE_DIR}/libc/src/strtox.c" "${CMAKE_CURRENT_SOURCE_DIR}/libc/src/atox.c") +####################################################### + +########### Add required/dependent components ######### +#list(APPEND ADD_REQUIREMENTS BSP_${BOARD}_Driver) +####################################################### + +############ Add static libs ########################## +# if(CONFIG_COMPONENT1_INCLUDE_STATIC_LIB) +# list(APPEND ADD_STATIC_LIB "lib/libtest.a") +# endif() +####################################################### + +############ Add dynamic libs ######################### +# list(APPEND ADD_DYNAMIC_LIB "lib/arch/v831/libmaix_nn.so" +# "lib/arch/v831/libmaix_cam.so" +# ) +####################################################### + +############ Add global compile option ################ +#add components denpend on this component +# list(APPEND ADD_DEFINITIONS -D${BOARD} -DARCH_RISCV) +####################################################### + +############ Add private compile option ################ +#add compile option for this component that won't affect other modules +#list(APPEND ADD_DEFINITIONS_PRIVATE -D${BOARD}_DRIVER) +####################################################### + + +generate_library() diff --git a/common/device/drv_device.c b/common/device/drv_device.c new file mode 100644 index 00000000..20fa9b9c --- /dev/null +++ b/common/device/drv_device.c @@ -0,0 +1,330 @@ +/** + * @file drv_device.c + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ +#include "drv_device.h" +#include "string.h" + +#define dev_open (dev->open) +#define dev_close (dev->close) +#define dev_read (dev->read) +#define dev_write (dev->write) +#define dev_control (dev->control) + +dlist_t device_head = DLIST_OBJECT_INIT(device_head); +/** + * This function will copy string no more than n bytes. + * + * @param dst the string to copy + * @param src the string to be copied + * @param n the maximum copied length + * + * @return the result + */ +static char *device_strncpy(char *dst, const char *src, uint32_t n) +{ + if (n != 0) + { + char *d = dst; + const char *s = src; + + do + { + if ((*d++ = *s++) == 0) + { + /* NUL pad the remaining n-1 bytes */ + while (--n != 0) + *d++ = 0; + break; + } + } while (--n != 0); + } + + return (dst); +} +/** + * This function will compare string no more than n bytes. + * + * @param dst the string to copy + * @param src the string to be copied + * @param n the maximum copied length + * + * @return the result + */ +static int32_t device_strncmp(const char *cs, const char *ct, uint32_t count) +{ + signed char __res = 0; + + while (count) + { + if ((__res = *cs - *ct++) != 0 || !*cs++) + break; + count--; + } + + return __res; +} +/** + * This function registers a device driver with specified name. + * + * @param dev the pointer of device driver structure + * @param name the device driver's name + * @param flags the capabilities flag of device + * + * @return the error code, DEVICE_EOK on initialization successfully. + */ +int device_register(struct device *dev, const char *name, uint16_t flag) +{ +#define OBJECT_DEVICE_TYPE 0 +#define OBJECT_FLAG_DEFAULT 0 + + dlist_t *node; + + dlist_for_each(node, &device_head) + { + struct device *dev_obj; + dev_obj = dlist_entry(node, struct device, list); + if (dev_obj == dev) + { + return -DEVICE_EEXIST; + } + } + + dev->oflag = flag; + device_strncpy(dev->name, name, NAME_MAX); + + dlist_insert_after(&device_head, &(dev->list)); + dev->status = DEVICE_REGISTERED; + return DEVICE_EOK; +} +/** + * This function get device list header + * + * @param None + * + * @return device header + */ +dlist_t * device_get_list_header(void){ + return &device_head; +} +/** + * This function unregisters a device driver with specified name. + * + * @param dev the pointer of device driver structure + * @param name the device driver's name + * @param flags the capabilities flag of device + * + * @return the error code, DEVICE_EOK on initialization successfully. + */ +int device_unregister(const char *name) +{ + struct device* dev = device_find(name); + if(!dev) + return -DEVICE_ENODEV; + /* remove from old list */ + dlist_remove(&(dev->list)); + return DEVICE_EOK; +} + + + +/** + * This function finds a device driver by specified name. + * + * @param name the device driver's name + * + * @return the registered device driver on successful, or NULL on failure. + */ +struct device *device_find(const char *name) +{ + struct device *dev; + dlist_t *node; + + dlist_for_each(node, &device_head) + { + dev = dlist_entry(node, struct device, list); + if (device_strncmp(dev->name, name, NAME_MAX) == 0) + { + return dev; + } + } + return NULL; +} + +/** + * This function will open a device + * + * @param dev the pointer of device driver structure + * @param oflag the flags for device open + * + * @return the result + */ +int device_open(struct device *dev, uint16_t oflag) +{ + int retval = DEVICE_EOK; + + if ((dev->status == DEVICE_REGISTERED) || (dev->status == DEVICE_CLOSED)) + { + if (dev_open != NULL) + { + retval = dev_open(dev, oflag); + dev->status = DEVICE_OPENED; + dev->oflag |= oflag; + } + } + else + { + retval = -DEVICE_EFAULT; + } + return retval; +} +/** + * This function will close a device + * + * @param dev the pointer of device driver structure + * + * @return the result + */ +int device_close(struct device *dev) +{ + int retval = DEVICE_EOK; + + if (dev->status == DEVICE_OPENED) + { + if (dev_close != NULL) + { + retval = dev_close(dev); + dev->status = DEVICE_CLOSED; + dev->oflag = 0; + } + } + else + { + retval = -DEVICE_EFAULT; + } + return retval; +} +/** + * This function will perform a variety of control functions on devices. + * + * @param dev the pointer of device driver structure + * @param cmd the command sent to device + * @param arg the argument of command + * + * @return the result + */ +int device_control(struct device *dev, int cmd, void *args) +{ + int retval = DEVICE_EOK; + + if (dev->status >= DEVICE_REGISTERED) + { + if (dev_control != NULL) + { + retval = dev_control(dev, cmd, args); + } + } + else + { + retval = -DEVICE_EFAULT; + } + return retval; +} +/** + * This function will write some data to a device. + * + * @param dev the pointer of device driver structure + * @param pos the position of written + * @param buffer the data buffer to be written to device + * @param size the size of buffer + * + * @return the actually written size on successful, otherwise negative returned. + */ +int device_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size) +{ + int retval = DEVICE_EOK; + + if (dev->status == DEVICE_OPENED) + { + if (dev_write != NULL) + { + retval = dev_write(dev, pos, buffer, size); + } + } + else + { + retval = -DEVICE_EFAULT; + } + return retval; +} +/** + * This function will read some data from a device. + * + * @param dev the pointer of device driver structure + * @param pos the position of reading + * @param buffer the data buffer to save read data + * @param size the size of buffer + * + * @return the actually read size on successful, otherwise negative returned. + */ +int device_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size) +{ + int retval = DEVICE_EOK; + + if (dev->status == DEVICE_OPENED) + { + if (dev_read != NULL) + { + retval = dev_read(dev, pos, buffer, size); + } + } + else + { + retval = -DEVICE_EFAULT; + } + return retval; +} +/** + * This function will read some data from a device. + * + * @param dev the pointer of device driver structure + * @param pos the position of reading + * @param buffer the data buffer to save read data + * @param size the size of buffer + * + * @return the actually read size on successful, otherwise negative returned. + */ +int device_set_callback(struct device *dev, void (*callback)(struct device *dev, void *args, uint32_t size, uint32_t event)) +{ + int retval = DEVICE_EOK; + + if (dev->status > DEVICE_UNREGISTER) + { + if (callback != NULL) + { + dev->callback = callback; + } + } + else + { + retval = -DEVICE_EFAULT; + } + return retval; +} \ No newline at end of file diff --git a/common/device/drv_device.h b/common/device/drv_device.h new file mode 100644 index 00000000..b13f96fb --- /dev/null +++ b/common/device/drv_device.h @@ -0,0 +1,129 @@ +/** + * @file drv_device.h + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ +#ifndef __DRV_DEVICE_H__ +#define __DRV_DEVICE_H__ + +#include "drv_list.h" +#include "bflb_platform.h" + +#define NAME_MAX 10 /* max device name*/ + +#define DEVICE_OFLAG_RDONLY 0x1000 /* open with read only */ +#define DEVICE_OFLAG_WRONLY 0x2000 /* open with write only */ +#define DEVICE_OFLAG_RDWR 0x3000 /* open with read and write */ + +#define DEVICE_OFLAG_STREAM_TX 0x001 /* open with poll tx */ +#define DEVICE_OFLAG_STREAM_RX 0x002 /* open with poll rx */ +#define DEVICE_OFLAG_INT_TX 0x004 /* open with interrupt tx */ +#define DEVICE_OFLAG_INT_RX 0x008 /* open with interrupt rx */ +#define DEVICE_OFLAG_DMA_TX 0x010 /* open with dma tx */ +#define DEVICE_OFLAG_DMA_RX 0x020 /* open with dma rx */ + +#define DEVICE_CTRL_SET_INT 0x01 /* set interrupt */ +#define DEVICE_CTRL_CLR_INT 0x02 /* clear interrupt */ +#define DEVICE_CTRL_GET_INT 0x03 /* get interrupt status*/ +#define DEVICE_CTRL_RESUME 0x04 /* resume device */ +#define DEVICE_CTRL_SUSPEND 0x05 /* suspend device */ +#define DEVICE_CTRL_CONFIG 0x06 /* config device */ +#define DEVICE_CTRL_GET_CONFIG 0x07 /* get device configuration */ + +/* + * POSIX Error codes + */ + +#define DEVICE_EOK 0 +#define DEVICE_EFAULT 14 /* Bad address */ +#define DEVICE_EEXIST 17 /* device exists */ +#define DEVICE_ENODEV 19 /* No such device */ +#define DEVICE_EINVAL 22 /* Invalid argument */ +#define DEVICE_ENOSPACE 23 /* No more Device for Allocate */ +#define __ASSERT_PRINT(fmt, ...) bflb_platform_printf(fmt, ##__VA_ARGS__) + +#define __ASSERT_LOC(test) \ + __ASSERT_PRINT("ASSERTION FAIL [%s] @ %s:%d\n", \ + #test, \ + __FILE__, __LINE__) + +#define DEVICE_ASSERT(test, fmt, ...) \ + do { \ + if (!(test)) { \ + __ASSERT_LOC(test); \ + __ASSERT_PRINT(fmt, ##__VA_ARGS__); \ + } \ + } while (0) + + +enum device_class_type +{ + DEVICE_CLASS_NONE = 0, + DEVICE_CLASS_GPIO, + DEVICE_CLASS_UART, + DEVICE_CLASS_SPI, + DEVICE_CLASS_I2C, + DEVICE_CLASS_ADC, + DEVICE_CLASS_DMA, + DEVICE_CLASS_TIMER, + DEVICE_CLASS_PWM, + DEVICE_CLASS_SDIO, + DEVICE_CLASS_USB, + DEVICE_CLASS_I2S, + DEVICE_CLASS_CAMERA, + DEVICE_CLASS_SEC_HASH, +} ; + +enum device_status_type +{ + DEVICE_UNREGISTER = 0, + DEVICE_REGISTERED, + DEVICE_OPENED, + DEVICE_CLOSED +} ; + +struct device +{ + char name[NAME_MAX]; /*name of device */ + dlist_t list; /*list node of device */ + enum device_status_type status; /*status of device */ + enum device_class_type type; /*type of device */ + uint16_t oflag; /*oflag of device */ + + int (*open)(struct device *dev, uint16_t oflag); + int (*close)(struct device *dev); + int (*control)(struct device *dev, int cmd, void *args); + int (*write)(struct device *dev, uint32_t pos, const void *buffer, uint32_t size); + int (*read)(struct device *dev, uint32_t pos, void *buffer, uint32_t size); + void (*callback)(struct device *dev, void *args, uint32_t size, uint32_t event); + void *handle; +}; + +int device_register(struct device *dev, const char *name, uint16_t flag); +int device_unregister(const char *name); +struct device *device_find(const char *name); +int device_open(struct device *dev, uint16_t oflag); +int device_close(struct device *dev); +int device_control(struct device *dev, int cmd, void *args); +int device_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size); +int device_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size); +int device_set_callback(struct device *dev, void (*callback)(struct device *dev, void *args, uint32_t size, uint32_t event)); +dlist_t * device_get_list_header(void); +#endif \ No newline at end of file diff --git a/common/libc/LICENSE b/common/libc/LICENSE new file mode 100644 index 00000000..79a98597 --- /dev/null +++ b/common/libc/LICENSE @@ -0,0 +1,62 @@ +Some files are derived from files copyrighted by the Regents of The +University of California, and are available under the following +license: + +Note: The advertising clause in the license appearing on BSD Unix +files was officially rescinded by the Director of the Office of +Technology Licensing of the University of California on July 22 +1999. He states that clause 3 is "hereby deleted in its entirety." + + * Copyright (c) + * The Regents of the University of California. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the University of + * California, Berkeley and its contributors. + * 4. Neither the name of the University nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + + ----- + +For all remaining files, the following license applies: + + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * Any copyright notice(s) and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. diff --git a/common/libc/README b/common/libc/README new file mode 100644 index 00000000..de1c3db6 --- /dev/null +++ b/common/libc/README @@ -0,0 +1,8 @@ +This is a subset of klibc (http://www.kernel.org/pub/linux/libs/klibc/) +which is itself a subset of standard C library functions. + +The provided functions are those which can be safely used in the SDK +environment. + +The included code was extracted from klibc version 1.5.15 without any +of the GPL licensed parts. See the LICENSE file for details. diff --git a/common/libc/inc/arm_gcc/compat_attribute.h b/common/libc/inc/arm_gcc/compat_attribute.h new file mode 100644 index 00000000..a6e34f72 --- /dev/null +++ b/common/libc/inc/arm_gcc/compat_attribute.h @@ -0,0 +1,28 @@ + + + +#ifndef _COMPAT_ATTRIBUTE_H_ +#define _COMPAT_ATTRIBUTE_H_ + +#define __DEPRECATED__(x) __attribute__((deprecated(x))) +#define __PACKED__ __attribute__ ((packed)) + +#define __PACKED_START__ +#define __PACKED_END__ __PACKED__ + +#define __UNUSED__ __attribute__((unused)) +#define __MAY_ALIAS__ __attribute__((may_alias)) + +#define __ALIGNED__(y) __attribute__((aligned(y))) +#define __SECTION__(y) __attribute__((section(#y))) + +#define __FORCED_INLINE__ inline __attribute__((always_inline)) +#define __NOINLINE__ __attribute__((noinline)) + +#define __WEAK__ __attribute__((weak)) +#define __INTERRUPT__ __attribute__((interrupt)) +#define __USED__ __attribute__((used)) +#define __NAKED__ __attribute__((naked)) + +#define __VISIBILITY__ __attribute__((visibility("default"))) +#endif /* _COMPAT_ATTRIBUTE_H_ */ diff --git a/common/libc/inc/arm_gcc/compat_compiler.h b/common/libc/inc/arm_gcc/compat_compiler.h new file mode 100644 index 00000000..659944ac --- /dev/null +++ b/common/libc/inc/arm_gcc/compat_compiler.h @@ -0,0 +1,6 @@ + + +#ifndef _COMPAT_COMPILER_H_ +#define _COMPAT_COMPILER_H_ +#endif /* _COMPAT_COMPILER_H_ */ + diff --git a/common/libc/inc/arm_gcc/compat_errno.h b/common/libc/inc/arm_gcc/compat_errno.h new file mode 100644 index 00000000..a40123a4 --- /dev/null +++ b/common/libc/inc/arm_gcc/compat_errno.h @@ -0,0 +1,9 @@ + + +#ifndef _COMPAT_ERRNO_H_ +#define _COMPAT_ERRNO_H_ + + +#include + +#endif /* _COMPAT_ERRNO_H_ */ diff --git a/common/libc/inc/arm_gcc/compat_param.h b/common/libc/inc/arm_gcc/compat_param.h new file mode 100644 index 00000000..cb7ae8fc --- /dev/null +++ b/common/libc/inc/arm_gcc/compat_param.h @@ -0,0 +1,6 @@ +#ifndef _COMPAT_PARAM_H +#define _COMPAT_PARAM_H + +#include /* need this to define BSD */ + +#endif /* _COMPAT_PARAM_H */ diff --git a/common/libc/inc/arm_gcc/compat_time.h b/common/libc/inc/arm_gcc/compat_time.h new file mode 100644 index 00000000..ad6513af --- /dev/null +++ b/common/libc/inc/arm_gcc/compat_time.h @@ -0,0 +1,10 @@ + + + +#ifndef _COMPAT_TIME_H_ +#define _COMPAT_TIME_H_ + + +#include + +#endif /* _COMPAT_TIME_H_ */ diff --git a/common/libc/inc/bits/ctype_base.h b/common/libc/inc/bits/ctype_base.h new file mode 100644 index 00000000..87a497da --- /dev/null +++ b/common/libc/inc/bits/ctype_base.h @@ -0,0 +1,29 @@ + +namespace std _GLIBCXX_VISIBILITY(default) +{ +_GLIBCXX_BEGIN_NAMESPACE_VERSION + + /// @brief Base class for ctype. + struct ctype_base + { + // Non-standard typedefs. + typedef const int* __to_type; + + // NB: Offsets into ctype::_M_table force a particular size + // on the mask type. Because of this, we don't use an enum. + typedef char mask; + static const mask upper = _U; + static const mask lower = _L; + static const mask alpha = _U | _L; + static const mask digit = _N; + static const mask xdigit = _X | _N; + static const mask space = _S; + static const mask print = _P | _U | _L | _N | _B; + static const mask graph = _P | _U | _L | _N; + static const mask cntrl = _C; + static const mask punct = _P; + static const mask alnum = _U | _L | _N; + }; + +_GLIBCXX_END_NAMESPACE_VERSION +} // namespace diff --git a/common/libc/inc/ctype.h b/common/libc/inc/ctype.h new file mode 100644 index 00000000..f4433195 --- /dev/null +++ b/common/libc/inc/ctype.h @@ -0,0 +1,140 @@ +/* + * ctype.h + * + * This assumes ISO 8859-1, being a reasonable superset of ASCII. + */ + +#ifndef _CTYPE_H +#define _CTYPE_H + +#include +#include + +#define _U (1 << 0) +#define _L (1 << 1) +#define _N (1 << 2) +#define _S (1 << 3) +#define _P (1 << 4) +#define _C (1 << 5) +#define _X (1 << 6) +#define _B (1 << 7) + +/* + * This relies on the following definitions: + * + * cntrl = !print + * alpha = upper|lower + * graph = punct|alpha|digit + * blank = '\t' || ' ' (per POSIX requirement) + */ +enum { + __ctype_upper = _U, + __ctype_lower = _L, + __ctype_digit = _N, + __ctype_xdigit = _S, + __ctype_space = _P, + __ctype_print = _C, + __ctype_punct = _X, + __ctype_cntrl = _B +}; + +__extern int isalnum(int); +__extern int isalpha(int); +__extern int isascii(int); +__extern int isblank(int); +__extern int iscntrl(int); +__extern int isdigit(int); +__extern int isgraph(int); +__extern int islower(int); +__extern int isprint(int); +__extern int ispunct(int); +__extern int isspace(int); +__extern int isupper(int); +__extern int isxdigit(int); +__extern int toupper(int); +__extern int tolower(int); + +extern const unsigned char __ctypes[]; + +__must_inline int __ctype_isalnum(int __c) +{ + return __ctypes[__c + 1] & + (__ctype_upper | __ctype_lower | __ctype_digit); +} + +__must_inline int __ctype_isalpha(int __c) +{ + return __ctypes[__c + 1] & (__ctype_upper | __ctype_lower); +} + +__must_inline int __ctype_isascii(int __c) +{ + return !(__c & ~0x7f); +} + +__must_inline int __ctype_isblank(int __c) +{ + return (__c == '\t') || (__c == ' '); +} + +__must_inline int __ctype_iscntrl(int __c) +{ + return __ctypes[__c + 1] & __ctype_cntrl; +} + +__must_inline int __ctype_isdigit(int __c) +{ + return ((unsigned)__c - '0') <= 9; +} + +__must_inline int __ctype_isgraph(int __c) +{ + return __ctypes[__c + 1] & + (__ctype_upper | __ctype_lower | __ctype_digit | __ctype_punct); +} + +__must_inline int __ctype_islower(int __c) +{ + return __ctypes[__c + 1] & __ctype_lower; +} + +__must_inline int __ctype_isprint(int __c) +{ + return __ctypes[__c + 1] & __ctype_print; +} + +__must_inline int __ctype_ispunct(int __c) +{ + return __ctypes[__c + 1] & __ctype_punct; +} + +__must_inline int __ctype_isspace(int __c) +{ + return __ctypes[__c + 1] & __ctype_space; +} + +__must_inline int __ctype_isupper(int __c) +{ + return __ctypes[__c + 1] & __ctype_upper; +} + +__must_inline int __ctype_isxdigit(int __c) +{ + return __ctypes[__c + 1] & __ctype_xdigit; +} + +/* Note: this is decimal, not hex, to avoid accidental promotion to unsigned */ +#define _toupper(__c) ((__c) & ~32) +#define _tolower(__c) ((__c) | 32) + +__must_inline int __ctype_toupper(int __c) +{ + return __ctype_islower(__c) ? _toupper(__c) : __c; +} + +__must_inline int __ctype_tolower(int __c) +{ + return __ctype_isupper(__c) ? _tolower(__c) : __c; +} + +#endif /* _CTYPE_H */ diff --git a/common/libc/inc/extern.h b/common/libc/inc/extern.h new file mode 100644 index 00000000..47c3e848 --- /dev/null +++ b/common/libc/inc/extern.h @@ -0,0 +1,16 @@ +/* + * klibc/extern.h + */ + +#ifndef _EXTERN_H +#define _EXTERN_H + +#ifdef __cplusplus +#define __extern extern "C" +#else +#define __extern extern +#endif + +#define __alias(x) __attribute__((weak, alias(x))) + +#endif /* _EXTERN_H */ diff --git a/common/libc/inc/fnmatch.h b/common/libc/inc/fnmatch.h new file mode 100644 index 00000000..1a62f778 --- /dev/null +++ b/common/libc/inc/fnmatch.h @@ -0,0 +1,15 @@ +#ifndef _FNMATCH_H +#define _FNMATCH_H + +#include + +#define FNM_NOMATCH 1 + +#define FNM_PATHNAME 1 +#define FNM_FILE_NAME FNM_PATHNAME +#define FNM_NOESCAPE 2 +#define FNM_PERIOD 4 + +__extern int fnmatch(const char *, const char *, int); + +#endif /* _FNMATCH_H */ diff --git a/common/libc/inc/inttypes.h b/common/libc/inc/inttypes.h new file mode 100644 index 00000000..69a73225 --- /dev/null +++ b/common/libc/inc/inttypes.h @@ -0,0 +1,227 @@ +/* + * inttypes.h + */ + +#ifndef _INTTYPES_H +#define _INTTYPES_H + +#include +#include +#include +#include + +static __inline intmax_t imaxabs(intmax_t __n) +{ + return (__n < (intmax_t) 0) ? -__n : __n; +} + +__extern intmax_t strtoimax(const char *, char **, int); +__extern uintmax_t strtoumax(const char *, char **, int); + +/* extensions */ +__extern intmax_t strntoimax(const char *, char **, int, size_t); +__extern uintmax_t strntoumax(const char *, char **, int, size_t); + +#if !defined(__cplusplus) || defined(__STDC_FORMAT_MACROS) + +#define PRId8 "d" +#define PRId16 "d" +#define PRId32 "d" +#define PRId64 __PRI64_RANK "d" + +#define PRIdLEAST8 "d" +#define PRIdLEAST16 "d" +#define PRIdLEAST32 "d" +#define PRIdLEAST64 __PRI64_RANK "d" + +#define PRIdFAST8 "d" +#define PRIdFAST16 __PRIFAST_RANK "d" +#define PRIdFAST32 __PRIFAST_RANK "d" +#define PRIdFAST64 __PRI64_RANK "d" + +#define PRIdMAX __PRI64_RANK "d" +#define PRIdPTR __PRIPTR_RANK "d" + +#define PRIi8 "i" +#define PRIi16 "i" +#define PRIi32 "i" +#define PRIi64 __PRI64_RANK "i" + +#define PRIiLEAST8 "i" +#define PRIiLEAST16 "i" +#define PRIiLEAST32 "i" +#define PRIiLEAST64 __PRI64_RANK "i" + +#define PRIiFAST8 "i" +#define PRIiFAST16 __PRIFAST_RANK "i" +#define PRIiFAST32 __PRIFAST_RANK "i" +#define PRIiFAST64 __PRI64_RANK "i" + +#define PRIiMAX __PRI64_RANK "i" +#define PRIiPTR __PRIPTR_RANK "i" + +#define PRIo8 "o" +#define PRIo16 "o" +#define PRIo32 "o" +#define PRIo64 __PRI64_RANK "o" + +#define PRIoLEAST8 "o" +#define PRIoLEAST16 "o" +#define PRIoLEAST32 "o" +#define PRIoLEAST64 __PRI64_RANK "o" + +#define PRIoFAST8 "o" +#define PRIoFAST16 __PRIFAST_RANK "o" +#define PRIoFAST32 __PRIFAST_RANK "o" +#define PRIoFAST64 __PRI64_RANK "o" + +#define PRIoMAX __PRI64_RANK "o" +#define PRIoPTR __PRIPTR_RANK "o" + +#define PRIu8 "u" +#define PRIu16 "u" +#define PRIu32 "u" +#define PRIu64 __PRI64_RANK "u" + +#define PRIuLEAST8 "u" +#define PRIuLEAST16 "u" +#define PRIuLEAST32 "u" +#define PRIuLEAST64 __PRI64_RANK "u" + +#define PRIuFAST8 "u" +#define PRIuFAST16 __PRIFAST_RANK "u" +#define PRIuFAST32 __PRIFAST_RANK "u" +#define PRIuFAST64 __PRI64_RANK "u" + +#define PRIuMAX __PRI64_RANK "u" +#define PRIuPTR __PRIPTR_RANK "u" + +#define PRIx8 "x" +#define PRIx16 "x" +#define PRIx32 "x" +#define PRIx64 __PRI64_RANK "x" + +#define PRIxLEAST8 "x" +#define PRIxLEAST16 "x" +#define PRIxLEAST32 "x" +#define PRIxLEAST64 __PRI64_RANK "x" + +#define PRIxFAST8 "x" +#define PRIxFAST16 __PRIFAST_RANK "x" +#define PRIxFAST32 __PRIFAST_RANK "x" +#define PRIxFAST64 __PRI64_RANK "x" + +#define PRIxMAX __PRI64_RANK "x" +#define PRIxPTR __PRIPTR_RANK "x" + +#define PRIX8 "X" +#define PRIX16 "X" +#define PRIX32 "X" +#define PRIX64 __PRI64_RANK "X" + +#define PRIXLEAST8 "X" +#define PRIXLEAST16 "X" +#define PRIXLEAST32 "X" +#define PRIXLEAST64 __PRI64_RANK "X" + +#define PRIXFAST8 "X" +#define PRIXFAST16 __PRIFAST_RANK "X" +#define PRIXFAST32 __PRIFAST_RANK "X" +#define PRIXFAST64 __PRI64_RANK "X" + +#define PRIXMAX __PRI64_RANK "X" +#define PRIXPTR __PRIPTR_RANK "X" + +#define SCNd8 "hhd" +#define SCNd16 "hd" +#define SCNd32 "d" +#define SCNd64 __PRI64_RANK "d" + +#define SCNdLEAST8 "hhd" +#define SCNdLEAST16 "hd" +#define SCNdLEAST32 "d" +#define SCNdLEAST64 __PRI64_RANK "d" + +#define SCNdFAST8 "hhd" +#define SCNdFAST16 __PRIFAST_RANK "d" +#define SCNdFAST32 __PRIFAST_RANK "d" +#define SCNdFAST64 __PRI64_RANK "d" + +#define SCNdMAX __PRI64_RANK "d" +#define SCNdPTR __PRIPTR_RANK "d" + +#define SCNi8 "hhi" +#define SCNi16 "hi" +#define SCNi32 "i" +#define SCNi64 __PRI64_RANK "i" + +#define SCNiLEAST8 "hhi" +#define SCNiLEAST16 "hi" +#define SCNiLEAST32 "i" +#define SCNiLEAST64 __PRI64_RANK "i" + +#define SCNiFAST8 "hhi" +#define SCNiFAST16 __PRIFAST_RANK "i" +#define SCNiFAST32 __PRIFAST_RANK "i" +#define SCNiFAST64 __PRI64_RANK "i" + +#define SCNiMAX __PRI64_RANK "i" +#define SCNiPTR __PRIPTR_RANK "i" + +#define SCNo8 "hho" +#define SCNo16 "ho" +#define SCNo32 "o" +#define SCNo64 __PRI64_RANK "o" + +#define SCNoLEAST8 "hho" +#define SCNoLEAST16 "ho" +#define SCNoLEAST32 "o" +#define SCNoLEAST64 __PRI64_RANK "o" + +#define SCNoFAST8 "hho" +#define SCNoFAST16 __PRIFAST_RANK "o" +#define SCNoFAST32 __PRIFAST_RANK "o" +#define SCNoFAST64 __PRI64_RANK "o" + +#define SCNoMAX __PRI64_RANK "o" +#define SCNoPTR __PRIPTR_RANK "o" + +#define SCNu8 "hhu" +#define SCNu16 "hu" +#define SCNu32 "u" +#define SCNu64 __PRI64_RANK "u" + +#define SCNuLEAST8 "hhu" +#define SCNuLEAST16 "hu" +#define SCNuLEAST32 "u" +#define SCNuLEAST64 __PRI64_RANK "u" + +#define SCNuFAST8 "hhu" +#define SCNuFAST16 __PRIFAST_RANK "u" +#define SCNuFAST32 __PRIFAST_RANK "u" +#define SCNuFAST64 __PRI64_RANK "u" + +#define SCNuMAX __PRI64_RANK "u" +#define SCNuPTR __PRIPTR_RANK "u" + +#define SCNx8 "hhx" +#define SCNx16 "hx" +#define SCNx32 "x" +#define SCNx64 __PRI64_RANK "x" + +#define SCNxLEAST8 "hhx" +#define SCNxLEAST16 "hx" +#define SCNxLEAST32 "x" +#define SCNxLEAST64 __PRI64_RANK "x" + +#define SCNxFAST8 "hhx" +#define SCNxFAST16 __PRIFAST_RANK "x" +#define SCNxFAST32 __PRIFAST_RANK "x" +#define SCNxFAST64 __PRI64_RANK "x" + +#define SCNxMAX __PRI64_RANK "x" +#define SCNxPTR __PRIPTR_RANK "x" + +#endif + +#endif /* _INTTYPES_H */ diff --git a/common/libc/inc/libc_compiler.h b/common/libc/inc/libc_compiler.h new file mode 100644 index 00000000..7e59ed42 --- /dev/null +++ b/common/libc/inc/libc_compiler.h @@ -0,0 +1,109 @@ +/* + * libc compiler.h + * + * Various compiler features + */ + +#ifndef _LIBC_COMPILER_H +#define _LIBC_COMPILER_H + +/* Specific calling conventions */ +/* __cdecl is used when we want varadic and non-varadic functions to have + the same binary calling convention. */ +#ifdef __i386__ +# ifdef __GNUC__ +# define __cdecl __attribute__((cdecl,regparm(0))) +# else + /* Most other C compilers have __cdecl as a keyword */ +# endif +#else +# define __cdecl /* Meaningless on non-i386 */ +#endif + +/* How to declare a function that *must* be inlined */ +/* Use "extern inline" even in the gcc3+ case to avoid warnings in ctype.h */ +#ifdef __GNUC__ +# if __GNUC__ >= 3 +# ifdef __GNUC_STDC_INLINE__ +# define __must_inline extern __inline__ \ + __attribute__((__gnu_inline__,__always_inline__)) +# else +# define __must_inline extern __inline__ __attribute__((__always_inline__)) +# endif +# else +# define __must_inline extern __inline__ +# endif +#else +# define __must_inline __inline /* Just hope this works... */ +# define __inline inline +#endif + +/* How to declare a function that does not return */ +#ifdef __GNUC__ +# define __noreturn void __attribute__((noreturn)) +#else +# define __noreturn void +#endif + +/* "const" function: + + Many functions do not examine any values except their arguments, + and have no effects except the return value. Basically this is + just slightly more strict class than the `pure' attribute above, + since function is not allowed to read global memory. + + Note that a function that has pointer arguments and examines the + data pointed to must _not_ be declared `const'. Likewise, a + function that calls a non-`const' function usually must not be + `const'. It does not make sense for a `const' function to return + `void'. +*/ +#ifdef __GNUC__ +# define __constfunc __attribute__((const)) +#else +# define __constfunc +#endif +#undef __attribute_const__ +#define __attribute_const__ __constfunc + +/* "pure" function: + + Many functions have no effects except the return value and their + return value depends only on the parameters and/or global + variables. Such a function can be subject to common subexpression + elimination and loop optimization just as an arithmetic operator + would be. These functions should be declared with the attribute + `pure'. +*/ +#ifdef __GNUC__ +# define __purefunc __attribute__((pure)) +#else +# define __purefunc +#endif +#undef __attribute_pure__ +#define __attribute_pure__ __purefunc + +/* Format attribute */ +#ifdef __GNUC__ +# define __formatfunc(t,f,a) __attribute__((format(t,f,a))) +#else +# define __formatfunc(t,f,a) +#endif + +/* malloc() function (returns unaliased pointer) */ +#if defined(__GNUC__) && (__GNUC__ >= 3) +# define __mallocfunc __attribute__((malloc)) +#else +# define __mallocfunc +#endif + +/* likely/unlikely */ +#if defined(__GNUC__) && (__GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 95)) +# define __likely(x) __builtin_expect(!!(x), 1) +# define __unlikely(x) __builtin_expect(!!(x), 0) +#else +# define __likely(x) (!!(x)) +# define __unlikely(x) (!!(x)) +#endif + +#endif diff --git a/common/libc/inc/limits.h b/common/libc/inc/limits.h new file mode 100644 index 00000000..69ed4aaa --- /dev/null +++ b/common/libc/inc/limits.h @@ -0,0 +1,53 @@ +/* + * limits.h + */ + +#ifndef _LIMITS_H +#define _LIMITS_H + +#define CHAR_BIT 8 +#define SHRT_BIT 16 +#define INT_BIT 32 +#define LONGLONG_BIT 64 + +#define SCHAR_MIN (-128) +#define SCHAR_MAX 127 +#define UCHAR_MAX 255 + +#ifdef __CHAR_UNSIGNED__ +# define CHAR_MIN 0 +# define CHAR_MAX UCHAR_MAX +#else +# define CHAR_MIN SCHAR_MIN +# define CHAR_MAX SCHAR_MAX +#endif + +#define SHRT_MIN (-32768) +#define SHRT_MAX 32767 +#define USHRT_MAX 65535 + + +#define INT_MIN (-2147483647-1) +#define INT_MAX 2147483647 +#define UINT_MAX 4294967295U + +#if __riscv_xlen == 64 +# define LONG_BIT 64 + +# define LONG_MIN (-9223372036854775807LL-1) +# define LONG_MAX 9223372036854775807LL +# define ULONG_MAX 18446744073709551615ULL +#else +# define LONG_BIT 32 + +# define LONG_MIN (-2147483647L-1) +# define LONG_MAX 2147483647L +# define ULONG_MAX 4294967295UL +#endif + +#define LONGLONG_MIN (-9223372036854775807LL-1) +#define LONGLONG_MAX 9223372036854775807LL +#define ULONGLONG_MAX 18446744073709551615ULL + + +#endif /* _LIMITS_H */ diff --git a/common/libc/inc/stdarg.h b/common/libc/inc/stdarg.h new file mode 100644 index 00000000..cc324b82 --- /dev/null +++ b/common/libc/inc/stdarg.h @@ -0,0 +1,14 @@ +/* + * stdarg.h + * + * This is just a wrapper for the gcc one, but defines va_copy() + * even if gcc doesn't. + */ + +/* Note: the _STDARG_H macro belongs to the gcc header... */ +#include_next + +/* Older gcc considers this an extension, so it's double underbar only */ +#ifndef va_copy +#define va_copy(d,s) __va_copy(d,s) +#endif diff --git a/common/libc/inc/stdbool.h b/common/libc/inc/stdbool.h new file mode 100644 index 00000000..ad98632b --- /dev/null +++ b/common/libc/inc/stdbool.h @@ -0,0 +1,14 @@ +/* + * stdbool.h + */ + +#ifndef _STDBOOL_H +#define _STDBOOL_H + +#ifndef __cplusplus +#define bool _Bool +#define true 1 +#define false 0 +#endif + +#endif /* _STDBOOL_H */ diff --git a/common/libc/inc/stddef.h b/common/libc/inc/stddef.h new file mode 100644 index 00000000..c607e692 --- /dev/null +++ b/common/libc/inc/stddef.h @@ -0,0 +1,29 @@ +/* + * stddef.h + */ + +#ifndef _STDDEF_H +#define _STDDEF_H + +#define _SIZE_T +typedef unsigned long size_t; + +#define _PTRDIFF_T +typedef signed int ptrdiff_t; + +#ifndef __ICCARM__ +#define _WINT_T +typedef signed int wint_t; +#endif + +#undef NULL +#ifdef __cplusplus +# define NULL 0 +#else +# define NULL ((void *)0) +#endif + +#undef offsetof +#define offsetof(t,m) ((size_t)&((t *)0)->m) + +#endif /* _STDDEF_H */ diff --git a/common/libc/inc/stdint.h b/common/libc/inc/stdint.h new file mode 100644 index 00000000..56c97cef --- /dev/null +++ b/common/libc/inc/stdint.h @@ -0,0 +1,163 @@ +/* + * stdint.h + */ + +#ifndef _STDINT_H +#define _STDINT_H + +typedef signed char int8_t; +typedef short int int16_t; +typedef int int32_t; +typedef long long int int64_t; + +typedef unsigned char uint8_t; +typedef unsigned short int uint16_t; +typedef unsigned int uint32_t; +typedef unsigned long long int uint64_t; + +typedef int int_fast16_t; +typedef int int_fast32_t; + +typedef unsigned int uint_fast16_t; +typedef unsigned int uint_fast32_t; + +#if __riscv_xlen == 32 + typedef int intptr_t; + typedef unsigned int uintptr_t; + +#define __INT64_C(c) c ## LL +#define __UINT64_C(c) c ## ULL +#elif __riscv_xlen == 64 + typedef long long intptr_t; + typedef unsigned long long uintptr_t; +#else +# error "unsupported __riscv_xlen" +#endif + +#define __PRI64_RANK "ll" +#define __PRIFAST_RANK "" +#define __PRIPTR_RANK "" +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; +typedef int32_t int_least32_t; +typedef int64_t int_least64_t; + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; +typedef uint32_t uint_least32_t; +typedef uint64_t uint_least64_t; + +typedef int8_t int_fast8_t; +typedef int64_t int_fast64_t; + +typedef uint8_t uint_fast8_t; +typedef uint64_t uint_fast64_t; + +typedef int64_t intmax_t; +typedef uint64_t uintmax_t; + +#if !defined(__cplusplus) || defined(__STDC_LIMIT_MACROS) + +#define INT8_MIN (-128) +#define INT16_MIN (-32768) +#define INT32_MIN (-2147483647-1) +#define INT64_MIN (__INT64_C(-9223372036854775807)-1) + +#define INT8_MAX (127) +#define INT16_MAX (32767) +#define INT32_MAX (2147483647) +#define INT64_MAX (__INT64_C(9223372036854775807)) + +#define UINT8_MAX (255U) +#define UINT16_MAX (65535U) +#define UINT32_MAX (4294967295U) +#define UINT64_MAX (__UINT64_C(18446744073709551615)) + +#define INT_LEAST8_MIN INT8_MIN +#define INT_LEAST16_MIN INT16_MIN +#define INT_LEAST32_MIN INT32_MIN +#define INT_LEAST64_MIN INT64_MIN + +#define INT_LEAST8_MAX INT8_MAX +#define INT_LEAST16_MAX INT16_MAX +#define INT_LEAST32_MAX INT32_MAX +#define INT_LEAST64_MAX INT64_MAX + +#define UINT_LEAST8_MAX UINT8_MAX +#define UINT_LEAST16_MAX UINT16_MAX +#define UINT_LEAST32_MAX UINT32_MAX +#define UINT_LEAST64_MAX UINT64_MAX + +#define INT_FAST8_MIN INT8_MIN +#define INT_FAST64_MIN INT64_MIN + +#define INT_FAST8_MAX INT8_MAX +#define INT_FAST64_MAX INT64_MAX + +#define UINT_FAST8_MAX UINT8_MAX +#define UINT_FAST64_MAX UINT64_MAX + +#define INTMAX_MIN INT64_MIN +#define INTMAX_MAX INT64_MAX +#define UINTMAX_MAX UINT64_MAX + +#define INT_FAST16_MIN INT32_MIN +#define INT_FAST32_MIN INT32_MIN +#define INT_FAST16_MAX INT32_MAX +#define INT_FAST32_MAX INT32_MAX +#define UINT_FAST16_MAX UINT32_MAX +#define UINT_FAST32_MAX UINT32_MAX + +#define INTPTR_MIN INT32_MIN +#define INTPTR_MAX INT32_MAX +#define UINTPTR_MAX UINT32_MAX + +#define PTRDIFF_MIN INT32_MIN +#define PTRDIFF_MAX INT32_MAX + +#endif + +#if !defined(__cplusplus) || defined(__STDC_CONSTANT_MACROS) + +#define INT8_C(c) c +#define INT16_C(c) c +#define INT32_C(c) c +#define INT64_C(c) __INT64_C(c) + +#define UINT8_C(c) c ## U +#define UINT16_C(c) c ## U +#define UINT32_C(c) c ## U +#define UINT64_C(c) __UINT64_C(c) + +#define INT_LEAST8_C(c) INT8_C(c) +#define INT_LEAST16_C(c) INT16_C(c) +#define INT_LEAST32_C(c) INT32_C(c) +#define INT_LEAST64_C(c) INT64_C(c) + +#define UINT_LEAST8_C(c) UINT8_C(c) +#define UINT_LEAST16_C(c) UINT16_C(c) +#define UINT_LEAST32_C(c) UINT32_C(c) +#define UINT_LEAST64_C(c) UINT64_C(c) + +#define INT_FAST8_C(c) INT8_C(c) +#define INT_FAST64_C(c) INT64_C(c) + +#define UINT_FAST8_C(c) UINT8_C(c) +#define UINT_FAST64_C(c) UINT64_C(c) + +#define INTMAX_C(c) INT64_C(c) +#define UINTMAX_C(c) UINT64_C(c) + +#define INT_FAST16_C(c) INT32_C(c) +#define INT_FAST32_C(c) INT32_C(c) + +#define UINT_FAST16_C(c) UINT32_C(c) +#define UINT_FAST32_C(c) UINT32_C(c) + +#define INTPTR_C(c) INT32_C(c) +#define UINTPTR_C(c) UINT32_C(c) +#define PTRDIFF_C(c) INT32_C(c) + +#endif + +#endif /* _STDINT_H */ diff --git a/common/libc/inc/stdio.h b/common/libc/inc/stdio.h new file mode 100644 index 00000000..3ac51bf1 --- /dev/null +++ b/common/libc/inc/stdio.h @@ -0,0 +1,24 @@ +/* + * stdio.h + */ + +#ifndef _STDIO_H +#define _STDIO_H + +#include +#include +#include + +/* The actual IO functions are not included. */ +#if __riscv_xlen == 64 +# include_next +#else +__extern int sprintf(char *, const char *, ...); +__extern int vsprintf(char *, const char *, va_list); +__extern int snprintf(char *__restrict, size_t, const char *__restrict, ...); +__extern int vsnprintf(char *, size_t, const char *, va_list); +__extern int sscanf(const char *, const char *, ...); +__extern int vsscanf(const char *, const char *, va_list); +#endif /* __riscv_xlen == 64 */ + +#endif /* _STDIO_H */ diff --git a/common/libc/inc/stdlib.h b/common/libc/inc/stdlib.h new file mode 100644 index 00000000..a6ba2e01 --- /dev/null +++ b/common/libc/inc/stdlib.h @@ -0,0 +1,62 @@ +/* + * stdlib.h + */ + +#ifndef _STDLIB_H +#define _STDLIB_H + +#include +#include +#include + +#define EXIT_FAILURE 1 +#define EXIT_SUCCESS 0 + +static __inline int abs(int __n) +{ + return (__n < 0) ? -__n : __n; +} + +#if __riscv_xlen == 64 +# include_next +__extern long jrand48(unsigned short *); +#else +__extern int atoi(const char *); +__extern double atof(const char *); +__extern long atol(const char *); +__extern long long atoll(const char *); +static __inline long labs(long __n) +{ + return (__n < 0L) ? -__n : __n; +} + +static __inline long long llabs(long long __n) +{ + return (__n < 0LL) ? -__n : __n; +} + +__extern long strtol(const char *, char **, int); +__extern long long strtoll(const char *, char **, int); +__extern unsigned long strtoul(const char *, char **, int); +__extern unsigned long long strtoull(const char *, char **, int); + +typedef int (*__comparefunc_t) (const void *, const void *); +__extern void *bsearch(const void *, const void *, size_t, size_t, + __comparefunc_t); +__extern void qsort(void *, size_t, size_t, __comparefunc_t); + +__extern long jrand48(unsigned short *); +__extern long mrand48(void); +__extern long nrand48(unsigned short *); +__extern long lrand48(void); +__extern unsigned short *seed48(unsigned short *); +__extern void srand48(long); + +#define RAND_MAX 0x7fffffff +__extern int rand(void); +__extern void srand(unsigned int __s); +__extern long random(void); +__extern void srandom(unsigned int __s); +#endif /* __riscv_xlen == 64 */ + +#endif /* _STDLIB_H */ diff --git a/common/libc/inc/string.h b/common/libc/inc/string.h new file mode 100644 index 00000000..3785ab7f --- /dev/null +++ b/common/libc/inc/string.h @@ -0,0 +1,52 @@ +/* + * string.h + */ + +#ifndef _STRING_H +#define _STRING_H + +#include +#include +#include +#if __riscv_xlen == 64 +__extern void memswap(void *m1, void *m2, size_t n); +__extern void *memmem(const void *haystack, size_t n, const void *needle, size_t m); +__extern char *strtok_r(char *, const char *, char **); +__extern char *strsep(char **, const char *); +# include_next +#else +__extern void *memccpy(void *, const void *, int, size_t); +__extern void *memchr(const void *, int, size_t); +__extern void *memrchr(const void *, int, size_t); +__extern int memcmp(const void *, const void *, size_t); +__extern void *memcpy(void *, const void *, size_t); +__extern void *memmove(void *, const void *, size_t); +__extern void *memset(void *, int, size_t); +__extern void *memmem(const void *, size_t, const void *, size_t); +__extern void memswap(void *, void *, size_t); +__extern void bzero(void *, size_t); +__extern int strcasecmp(const char *, const char *); +__extern int strncasecmp(const char *, const char *, size_t); +__extern char *strcat(char *, const char *); +__extern char *strchr(const char *, int); +__extern char *strrchr(const char *, int); +__extern int strcmp(const char *, const char *); +__extern char *strcpy(char *, const char *); +__extern size_t strcspn(const char *, const char *); +__extern size_t strlen(const char *); +__extern size_t strnlen(const char *, size_t); +__extern char *strncat(char *, const char *, size_t); +__extern size_t strlcat(char *, const char *, size_t); +__extern int strncmp(const char *, const char *, size_t); +__extern char *strncpy(char *, const char *, size_t); +__extern size_t strlcpy(char *, const char *, size_t); +__extern char *strpbrk(const char *, const char *); +__extern char *strsep(char **, const char *); +__extern size_t strspn(const char *, const char *); +__extern char *strstr(const char *, const char *); +__extern char *strtok(char *, const char *); +__extern char *strtok_r(char *, const char *, char **); +char *index(const char *s, int c); +#endif /* __riscv_xlen == 64 */ + +#endif /* _STRING_H */ diff --git a/common/libc/inc/sys/types.h b/common/libc/inc/sys/types.h new file mode 100644 index 00000000..4e776586 --- /dev/null +++ b/common/libc/inc/sys/types.h @@ -0,0 +1,97 @@ +/* + * sys/types.h + */ + +#ifndef _SYS_TYPES_H +#define _SYS_TYPES_H + +#include +#include + +#define _SSIZE_T +typedef ptrdiff_t ssize_t; + +#undef NULL +#if defined(__cplusplus) +#define NULL 0 +#else +#define NULL ((void *)0) +#endif + +typedef int daddr_t; +typedef char *caddr_t; + +/* BSD */ +typedef unsigned char u_char; +typedef unsigned short u_short; +typedef unsigned int u_int; +typedef unsigned long u_long; + +/* SysV */ +typedef unsigned char unchar; +typedef unsigned short ushort; +typedef unsigned int uint; +typedef unsigned long ulong; + +/* More BSD */ +typedef uint8_t u_int8_t; +typedef uint16_t u_int16_t; +typedef uint32_t u_int32_t; +typedef uint64_t u_int64_t; + +/* Time related */ +typedef signed int sbintime_t; + +/* Required by cyassl build */ +typedef long off_t; +typedef short dev_t; +typedef unsigned short ino_t; +typedef unsigned short nlink_t; +typedef unsigned short uid_t; +typedef unsigned short mode_t; +typedef unsigned short gid_t; +typedef signed char pid_t; +typedef unsigned long useconds_t; + +/* + * Some headers seem to require this... + */ +#ifndef BITS_PER_LONG +# define BITS_PER_LONG 32 +#endif + +/* + * The following FD_SET macros were added to solve the issue where the + * lwip/sockets.h saw different sys/types.h files when built, and when its + * header files sys/sockets file was included by the SDK. + */ +/* + * Select uses bit masks of file descriptors in longs. + * These macros manipulate such bit fields (the filesystem macros use chars). + * FD_SETSIZE may be defined by the user, but the default here + * should be >= NOFILE (param.h). + */ +#ifndef FD_SET +#ifndef FD_SETSIZE +#define FD_SETSIZE 64 +#endif +#define FD_SET(n, p) ((p)->fd_bits[(n)/8] |= (1 << ((n) & 7))) +#define FD_CLR(n, p) ((p)->fd_bits[(n)/8] &= ~(1 << ((n) & 7))) +#define FD_ISSET(n, p) ((p)->fd_bits[(n)/8] & (1 << ((n) & 7))) +#define FD_ZERO(p) memset((void *)(p), 0, sizeof(*(p))) + +typedef struct fd_set { + unsigned char fd_bits[(FD_SETSIZE + 7) / 8]; +} fd_set; +#endif /* FD_SET */ + +#ifndef __ICCARM__ +/* wmsdk: Added from sys/times.h and machine/types.h */ +#define _CLOCK_T_ unsigned long /* clock() */ +#ifndef __clock_t_defined +typedef _CLOCK_T_ clock_t; +#define __clock_t_defined +#endif +#endif + +#endif /* _SYS_TYPES_H */ diff --git a/common/libc/src/atof.c b/common/libc/src/atof.c new file mode 100644 index 00000000..97b074d9 --- /dev/null +++ b/common/libc/src/atof.c @@ -0,0 +1,102 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * atof.c + * + * The atof() function + */ + +#include +#include +#include +#include +#include + +static inline int digitval(int ch) +{ + if (ch >= '0' && ch <= '9') { + return ch - '0'; + } else if (ch >= 'A' && ch <= 'Z') { + return ch - 'A' + 10; + } else if (ch >= 'a' && ch <= 'z') { + return ch - 'a' + 10; + } else { + return -1; + } +} + +double strntof(const char *nptr, char **endptr, int base, size_t n) +{ + int minus = 0; + double v = 0.0, m = 0.0, divisor = 1.0; + int d; + + while (n && isspace((unsigned char)*nptr)) { + nptr++; + n--; + } + + /* Single optional + or - */ + if (n) { + char c = *nptr; + if (c == '-' || c == '+') { + minus = (c == '-'); + nptr++; + n--; + } + } + + if (base == 0) { + if (n >= 2 && nptr[0] == '0' && + (nptr[1] == 'x' || nptr[1] == 'X')) { + n -= 2; + nptr += 2; + base = 16; + } else if (n >= 1 && nptr[0] == '0') { + n--; + nptr++; + base = 8; + } else { + base = 10; + } + } else if (base == 16) { + if (n >= 2 && nptr[0] == '0' && + (nptr[1] == 'x' || nptr[1] == 'X')) { + n -= 2; + nptr += 2; + } + } + + while (n && (d = digitval(*nptr)) >= 0 && d < base) { + v = v * base + d; + n--; + nptr++; + } + + if (*nptr == '.') { + n--; + nptr++; + while (n && (d = digitval(*nptr)) >= 0 && d < base) { + m = m * base + d; + n--; + nptr++; + divisor *= 10.0; + } + } + + if (endptr) + *endptr = (char *)nptr; + + v = v + (m / divisor); + + return minus ? -v : v; +} + + +double atof(const char *nptr) +{ + return strntof(nptr, NULL, 0, strlen(nptr)); +} + diff --git a/common/libc/src/atoi.c b/common/libc/src/atoi.c new file mode 100644 index 00000000..fd655c3d --- /dev/null +++ b/common/libc/src/atoi.c @@ -0,0 +1,7 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#define TYPE int +#define NAME atoi +#include "atox.c" diff --git a/common/libc/src/atol.c b/common/libc/src/atol.c new file mode 100644 index 00000000..36f331ab --- /dev/null +++ b/common/libc/src/atol.c @@ -0,0 +1,7 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#define TYPE long +#define NAME atol +#include "atox.c" diff --git a/common/libc/src/atoll.c b/common/libc/src/atoll.c new file mode 100644 index 00000000..25df79e1 --- /dev/null +++ b/common/libc/src/atoll.c @@ -0,0 +1,3 @@ +#define TYPE long long +#define NAME atoll +#include "atox.c" diff --git a/common/libc/src/atox.c b/common/libc/src/atox.c new file mode 100644 index 00000000..9f95d5d2 --- /dev/null +++ b/common/libc/src/atox.c @@ -0,0 +1,19 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * atox.c + * + * atoi(), atol(), atoll() + */ + +#include +#include +#include +//#include + +TYPE NAME(const char *nptr) +{ + return (TYPE) strntoumax(nptr, (char **)NULL, 10, ~(size_t) 0); +} diff --git a/common/libc/src/bsearch.c b/common/libc/src/bsearch.c new file mode 100644 index 00000000..69c3b405 --- /dev/null +++ b/common/libc/src/bsearch.c @@ -0,0 +1,31 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * bsearch.c + */ + +#include + +void *bsearch(const void *key, const void *base, size_t nmemb, + size_t size, int (*cmp) (const void *, const void *)) +{ + while (nmemb) { + size_t mididx = nmemb / 2; + const void *midobj = (const unsigned char *) base + + mididx * size; + int diff = cmp(key, midobj); + + if (diff == 0) + return (void *)midobj; + + if (diff > 0) { + base = (const unsigned char *) midobj + size; + nmemb -= mididx + 1; + } else + nmemb = mididx; + } + + return NULL; +} diff --git a/common/libc/src/common.c b/common/libc/src/common.c new file mode 100644 index 00000000..b8834be4 --- /dev/null +++ b/common/libc/src/common.c @@ -0,0 +1,25 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +//#include + +void __assert_func(const char *file, int line, + const char *func, const char *failedexpr) +{ +#if 0 + printf("assertion \"%s\" failed: file \"%s\", line %d%s%s\n", + failedexpr, file, line, func ? ", function: " : "", + func ? func : ""); + + /* Ensure that nothing runs after this */ + while (1) + ; +#endif +} + +float strtof(const char *nptr, char **endptr) +{ +// printf("Float print not supported yet!\r\n"); + return 0; +} diff --git a/common/libc/src/ctype_isalnum.c b/common/libc/src/ctype_isalnum.c new file mode 100644 index 00000000..201e9352 --- /dev/null +++ b/common/libc/src/ctype_isalnum.c @@ -0,0 +1,6 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#include "ctypefunc.h" +CTYPEFUNC(isalnum) diff --git a/common/libc/src/ctype_isalpha.c b/common/libc/src/ctype_isalpha.c new file mode 100644 index 00000000..6a7e70c4 --- /dev/null +++ b/common/libc/src/ctype_isalpha.c @@ -0,0 +1,6 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#include "ctypefunc.h" +CTYPEFUNC(isalpha) diff --git a/common/libc/src/ctype_isascii.c b/common/libc/src/ctype_isascii.c new file mode 100644 index 00000000..d56c8a95 --- /dev/null +++ b/common/libc/src/ctype_isascii.c @@ -0,0 +1,6 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#include "ctypefunc.h" +CTYPEFUNC(isascii) diff --git a/common/libc/src/ctype_isblank.c b/common/libc/src/ctype_isblank.c new file mode 100644 index 00000000..4dcc47a2 --- /dev/null +++ b/common/libc/src/ctype_isblank.c @@ -0,0 +1,6 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#include "ctypefunc.h" +CTYPEFUNC(isblank) diff --git a/common/libc/src/ctype_iscntrl.c b/common/libc/src/ctype_iscntrl.c new file mode 100644 index 00000000..98eda158 --- /dev/null +++ b/common/libc/src/ctype_iscntrl.c @@ -0,0 +1,6 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#include "ctypefunc.h" +CTYPEFUNC(iscntrl) diff --git a/common/libc/src/ctype_isdigit.c b/common/libc/src/ctype_isdigit.c new file mode 100644 index 00000000..222c6006 --- /dev/null +++ b/common/libc/src/ctype_isdigit.c @@ -0,0 +1,6 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#include "ctypefunc.h" +CTYPEFUNC(isdigit) diff --git a/common/libc/src/ctype_isgraph.c b/common/libc/src/ctype_isgraph.c new file mode 100644 index 00000000..8b417663 --- /dev/null +++ b/common/libc/src/ctype_isgraph.c @@ -0,0 +1,6 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#include "ctypefunc.h" +CTYPEFUNC(isgraph) diff --git a/common/libc/src/ctype_islower.c b/common/libc/src/ctype_islower.c new file mode 100644 index 00000000..796205c2 --- /dev/null +++ b/common/libc/src/ctype_islower.c @@ -0,0 +1,6 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#include "ctypefunc.h" +CTYPEFUNC(islower) diff --git a/common/libc/src/ctype_isprint.c b/common/libc/src/ctype_isprint.c new file mode 100644 index 00000000..495d8f5d --- /dev/null +++ b/common/libc/src/ctype_isprint.c @@ -0,0 +1,6 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#include "ctypefunc.h" +CTYPEFUNC(isprint) diff --git a/common/libc/src/ctype_ispunct.c b/common/libc/src/ctype_ispunct.c new file mode 100644 index 00000000..97dc64f2 --- /dev/null +++ b/common/libc/src/ctype_ispunct.c @@ -0,0 +1,6 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#include "ctypefunc.h" +CTYPEFUNC(ispunct) diff --git a/common/libc/src/ctype_isspace.c b/common/libc/src/ctype_isspace.c new file mode 100644 index 00000000..2b3b5dc0 --- /dev/null +++ b/common/libc/src/ctype_isspace.c @@ -0,0 +1,6 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#include "ctypefunc.h" +CTYPEFUNC(isspace) diff --git a/common/libc/src/ctype_isupper.c b/common/libc/src/ctype_isupper.c new file mode 100644 index 00000000..f6f7173b --- /dev/null +++ b/common/libc/src/ctype_isupper.c @@ -0,0 +1,6 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#include "ctypefunc.h" +CTYPEFUNC(isupper) diff --git a/common/libc/src/ctype_isxdigit.c b/common/libc/src/ctype_isxdigit.c new file mode 100644 index 00000000..9b4db7c6 --- /dev/null +++ b/common/libc/src/ctype_isxdigit.c @@ -0,0 +1,6 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#include "ctypefunc.h" +CTYPEFUNC(isxdigit) diff --git a/common/libc/src/ctype_tolower.c b/common/libc/src/ctype_tolower.c new file mode 100644 index 00000000..7a5fd834 --- /dev/null +++ b/common/libc/src/ctype_tolower.c @@ -0,0 +1,6 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#include "ctypefunc.h" +CTYPEFUNC(tolower) diff --git a/common/libc/src/ctype_toupper.c b/common/libc/src/ctype_toupper.c new file mode 100644 index 00000000..56878d6f --- /dev/null +++ b/common/libc/src/ctype_toupper.c @@ -0,0 +1,6 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#include "ctypefunc.h" +CTYPEFUNC(toupper) diff --git a/common/libc/src/ctypefunc.h b/common/libc/src/ctypefunc.h new file mode 100644 index 00000000..f9e247df --- /dev/null +++ b/common/libc/src/ctypefunc.h @@ -0,0 +1,13 @@ +/* + * ctype/ctype.h + * + * Common header for out-of-line ctype functions + */ + +#define __CTYPE_NO_INLINE +#include + +#define CTYPEFUNC(X) \ + int X(int c) { \ + return __ctype_##X(c); \ + } diff --git a/common/libc/src/ctypes.c b/common/libc/src/ctypes.c new file mode 100644 index 00000000..45754480 --- /dev/null +++ b/common/libc/src/ctypes.c @@ -0,0 +1,288 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * ctypes.c + * + * This is the array that defines classes. + * This assumes ISO 8859-1. + */ + +#include + +const unsigned char __ctypes[257] = { + 0, /* EOF */ + + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl | __ctype_space, /* BS */ + __ctype_cntrl | __ctype_space, /* TAB */ + __ctype_cntrl | __ctype_space, /* LF */ + __ctype_cntrl | __ctype_space, /* VT */ + __ctype_cntrl | __ctype_space, /* FF */ + __ctype_cntrl | __ctype_space, /* CR */ + __ctype_cntrl, /* control character */ + + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + + __ctype_print | __ctype_space, /* space */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + + __ctype_print | __ctype_digit | __ctype_xdigit, /* digit */ + __ctype_print | __ctype_digit | __ctype_xdigit, /* digit */ + __ctype_print | __ctype_digit | __ctype_xdigit, /* digit */ + __ctype_print | __ctype_digit | __ctype_xdigit, /* digit */ + __ctype_print | __ctype_digit | __ctype_xdigit, /* digit */ + __ctype_print | __ctype_digit | __ctype_xdigit, /* digit */ + __ctype_print | __ctype_digit | __ctype_xdigit, /* digit */ + __ctype_print | __ctype_digit | __ctype_xdigit, /* digit */ + __ctype_print | __ctype_digit | __ctype_xdigit, /* digit */ + __ctype_print | __ctype_digit | __ctype_xdigit, /* digit */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_upper | __ctype_xdigit, /* A-F */ + __ctype_print | __ctype_upper | __ctype_xdigit, /* A-F */ + __ctype_print | __ctype_upper | __ctype_xdigit, /* A-F */ + __ctype_print | __ctype_upper | __ctype_xdigit, /* A-F */ + __ctype_print | __ctype_upper | __ctype_xdigit, /* A-F */ + __ctype_print | __ctype_upper | __ctype_xdigit, /* A-F */ + __ctype_print | __ctype_upper, /* G-Z */ + __ctype_print | __ctype_upper, /* G-Z */ + __ctype_print | __ctype_upper, /* G-Z */ + __ctype_print | __ctype_upper, /* G-Z */ + __ctype_print | __ctype_upper, /* G-Z */ + __ctype_print | __ctype_upper, /* G-Z */ + __ctype_print | __ctype_upper, /* G-Z */ + __ctype_print | __ctype_upper, /* G-Z */ + __ctype_print | __ctype_upper, /* G-Z */ + + __ctype_print | __ctype_upper, /* G-Z */ + __ctype_print | __ctype_upper, /* G-Z */ + __ctype_print | __ctype_upper, /* G-Z */ + __ctype_print | __ctype_upper, /* G-Z */ + __ctype_print | __ctype_upper, /* G-Z */ + __ctype_print | __ctype_upper, /* G-Z */ + __ctype_print | __ctype_upper, /* G-Z */ + __ctype_print | __ctype_upper, /* G-Z */ + __ctype_print | __ctype_upper, /* G-Z */ + __ctype_print | __ctype_upper, /* G-Z */ + __ctype_print | __ctype_upper, /* G-Z */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_lower | __ctype_xdigit, /* a-f */ + __ctype_print | __ctype_lower | __ctype_xdigit, /* a-f */ + __ctype_print | __ctype_lower | __ctype_xdigit, /* a-f */ + __ctype_print | __ctype_lower | __ctype_xdigit, /* a-f */ + __ctype_print | __ctype_lower | __ctype_xdigit, /* a-f */ + __ctype_print | __ctype_lower | __ctype_xdigit, /* a-f */ + __ctype_print | __ctype_lower, /* g-z */ + __ctype_print | __ctype_lower, /* g-z */ + __ctype_print | __ctype_lower, /* g-z */ + __ctype_print | __ctype_lower, /* g-z */ + __ctype_print | __ctype_lower, /* g-z */ + __ctype_print | __ctype_lower, /* g-z */ + __ctype_print | __ctype_lower, /* g-z */ + __ctype_print | __ctype_lower, /* g-z */ + __ctype_print | __ctype_lower, /* g-z */ + + __ctype_print | __ctype_lower, /* g-z */ + __ctype_print | __ctype_lower, /* g-z */ + __ctype_print | __ctype_lower, /* g-z */ + __ctype_print | __ctype_lower, /* g-z */ + __ctype_print | __ctype_lower, /* g-z */ + __ctype_print | __ctype_lower, /* g-z */ + __ctype_print | __ctype_lower, /* g-z */ + __ctype_print | __ctype_lower, /* g-z */ + __ctype_print | __ctype_lower, /* g-z */ + __ctype_print | __ctype_lower, /* g-z */ + __ctype_print | __ctype_lower, /* g-z */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_cntrl, /* control character */ + + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + __ctype_cntrl, /* control character */ + + __ctype_print | __ctype_space, /* NBSP */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_punct, /* punctuation */ + + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_upper, /* upper accented */ + __ctype_print | __ctype_lower, /* lower accented */ + + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_punct, /* punctuation */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ + __ctype_print | __ctype_lower, /* lower accented */ +}; diff --git a/common/libc/src/fnmatch.c b/common/libc/src/fnmatch.c new file mode 100644 index 00000000..a7773308 --- /dev/null +++ b/common/libc/src/fnmatch.c @@ -0,0 +1,76 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * fnmatch.c + * + * Original implementation by Kay Sievers, modified by H. Peter Anvin. + */ + +#include + +int fnmatch(const char *p, const char *s, int flags) +{ + if (flags & FNM_PATHNAME && *s == '/') + return (*p != '/') || fnmatch(p+1, s+1, flags); + if (flags & FNM_PERIOD && *s == '.') + return (*p != '.') || fnmatch(p+1, s+1, flags); + + flags &= ~FNM_PERIOD; /* Only applies at beginning */ + + if (!(flags & FNM_NOESCAPE) && *p == '\\') { + p++; + return (*p != *s) || fnmatch(p+1, s+1, flags); + } + + if (*s == '\0') { + while (*p == '*') + p++; + return (*p != '\0'); + } + + switch (*p) { + case '[': + { + int not_mark = 0; + p++; + if (*p == '!') { + not_mark = 1; + p++; + } + while ((*p != '\0') && (*p != ']')) { + int match = 0; + if (p[1] == '-') { + if ((*s >= *p) && (*s <= p[2])) + match = 1; + p += 3; + } else { + match = (*p == *s); + p++; + } + if (match ^ not_mark) { + while ((*p != '\0') && (*p != ']')) + p++; + if (*p == ']') + return fnmatch(p+1, s+1, flags); + } + } + } + break; + case '*': + if (fnmatch(p, s+1, flags)) + return fnmatch(p+1, s, flags); + return 0; + case '\0': + if (*s == '\0') { + return 0; + } + break; + default: + if ((*p == *s) || (*p == '?')) + return fnmatch(p+1, s+1, flags); + break; + } + return 1; +} diff --git a/common/libc/src/jrand48.c b/common/libc/src/jrand48.c new file mode 100644 index 00000000..f9c12179 --- /dev/null +++ b/common/libc/src/jrand48.c @@ -0,0 +1,28 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * jrand48.c + */ + +#include +#include + +long jrand48(unsigned short xsubi[3]) +{ + uint64_t x; + + /* The xsubi[] array is littleendian by spec */ + x = (uint64_t) (uint16_t) xsubi[0] + + ((uint64_t) (uint16_t) xsubi[1] << 16) + + ((uint64_t) (uint16_t) xsubi[2] << 32); + + x = (0x5deece66dULL * x) + 0xb; + + xsubi[0] = (unsigned short)(uint16_t) x; + xsubi[1] = (unsigned short)(uint16_t) (x >> 16); + xsubi[2] = (unsigned short)(uint16_t) (x >> 32); + + return (long)(int32_t) (x >> 16); +} diff --git a/common/libc/src/lrand48.c b/common/libc/src/lrand48.c new file mode 100644 index 00000000..7c4f5235 --- /dev/null +++ b/common/libc/src/lrand48.c @@ -0,0 +1,27 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * lrand48.c + */ + +#include +#include + +unsigned short __rand48_seed[3]; /* Common with mrand48.c, srand48.c */ + +long lrand48(void) +{ + return (uint32_t) jrand48(__rand48_seed) >> 1; +} + +int rand(void) +{ + return (int)lrand48(); +} + +long random(void) +{ + return lrand48(); +} diff --git a/common/libc/src/memccpy.c b/common/libc/src/memccpy.c new file mode 100644 index 00000000..49790774 --- /dev/null +++ b/common/libc/src/memccpy.c @@ -0,0 +1,27 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * memccpy.c + * + * memccpy() + */ + +#include +#include + +void *memccpy(void *dst, const void *src, int c, size_t n) +{ + char *q = (char *)dst; + const char *p = (char *)src; + char ch; + + while (n--) { + *q++ = ch = *p++; + if (ch == (char)c) + return q; + } + + return NULL; /* No instance of "c" found */ +} diff --git a/common/libc/src/memchr.c b/common/libc/src/memchr.c new file mode 100644 index 00000000..ec8dbea2 --- /dev/null +++ b/common/libc/src/memchr.c @@ -0,0 +1,23 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * memchr.c + */ + +#include +#include + +void *memchr(const void *s, int c, size_t n) +{ + const unsigned char *sp = (unsigned char *)s; + + while (n--) { + if (*sp == (unsigned char)c) + return (void *)sp; + sp++; + } + + return NULL; +} diff --git a/common/libc/src/memcmp.c b/common/libc/src/memcmp.c new file mode 100644 index 00000000..3133aa00 --- /dev/null +++ b/common/libc/src/memcmp.c @@ -0,0 +1,23 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * memcmp.c + */ + +#include + +int memcmp(const void *s1, const void *s2, size_t n) +{ + const unsigned char *c1 = (unsigned char *)s1, *c2 = (unsigned char *)s2; + int d = 0; + + while (n--) { + d = (int)*c1++ - (int)*c2++; + if (d) + break; + } + + return d; +} diff --git a/common/libc/src/memcpy.c b/common/libc/src/memcpy.c new file mode 100644 index 00000000..8df627ed --- /dev/null +++ b/common/libc/src/memcpy.c @@ -0,0 +1,16 @@ +/* + * memcpy.c + */ + +#include +#include + +void *memcpy(void *dst, const void *src, size_t n) +{ + const char *p = (char *)src; + char *q = (char *)dst; + while (n--) { + *q++ = *p++; + } + return dst; +} diff --git a/common/libc/src/memmem.c b/common/libc/src/memmem.c new file mode 100644 index 00000000..385620b7 --- /dev/null +++ b/common/libc/src/memmem.c @@ -0,0 +1,56 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * memmem.c + * + * Find a byte string inside a longer byte string + * + * This uses the "Not So Naive" algorithm, a very simple but + * usually effective algorithm, see: + * + * http://www-igm.univ-mlv.fr/~lecroq/string/ + */ + +#include + +void *memmem(const void *haystack, size_t n, const void *needle, size_t m) +{ + const unsigned char *y = (const unsigned char *)haystack; + const unsigned char *x = (const unsigned char *)needle; + + size_t j, k, l; + + if (m > n || !m || !n) + return NULL; + + if (1 != m) { + if (x[0] == x[1]) { + k = 2; + l = 1; + } else { + k = 1; + l = 2; + } + + j = 0; + while (j <= n - m) { + if (x[1] != y[j + 1]) { + j += k; + } else { + if (!memcmp(x + 2, y + j + 2, m - 2) + && x[0] == y[j]) + return (void *)&y[j]; + j += l; + } + } + } else + do { + if (*y == *x) + return (void *)y; + y++; + } while (--n); + + return NULL; +} diff --git a/common/libc/src/memrchr.c b/common/libc/src/memrchr.c new file mode 100644 index 00000000..6a9b8e7e --- /dev/null +++ b/common/libc/src/memrchr.c @@ -0,0 +1,23 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * memrchr.c + */ + +#include +#include + +void *memrchr(const void *s, int c, size_t n) +{ + const unsigned char *sp = (const unsigned char *)s + n - 1; + + while (n--) { + if (*sp == (unsigned char)c) + return (void *)sp; + sp--; + } + + return NULL; +} diff --git a/common/libc/src/memset.c b/common/libc/src/memset.c new file mode 100644 index 00000000..ff5fa22b --- /dev/null +++ b/common/libc/src/memset.c @@ -0,0 +1,16 @@ +/* + * memset.c + */ + +#include +#include + +void *memset(void *dst, int c, size_t n) +{ + char *q = (char *)dst; + while (n--) { + *q++ = c; + __asm volatile ("":::"memory"); + } + return dst; +} diff --git a/common/libc/src/memswap.c b/common/libc/src/memswap.c new file mode 100644 index 00000000..495085d1 --- /dev/null +++ b/common/libc/src/memswap.c @@ -0,0 +1,28 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * memswap() + * + * Swaps the contents of two nonoverlapping memory areas. + * This really could be done faster... + */ + +#include + +void memswap(void *m1, void *m2, size_t n) +{ + char *p = (char *)m1; + char *q = (char *)m2; + char tmp; + + while (n--) { + tmp = *p; + *p = *q; + *q = tmp; + + p++; + q++; + } +} diff --git a/common/libc/src/mrand48.c b/common/libc/src/mrand48.c new file mode 100644 index 00000000..b3195bbd --- /dev/null +++ b/common/libc/src/mrand48.c @@ -0,0 +1,18 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * mrand48.c + */ + +#include +#include + +/* Common with lrand48.c, srand48.c */ +extern unsigned short __rand48_seed[3]; + +long mrand48(void) +{ + return jrand48(__rand48_seed); +} diff --git a/common/libc/src/nrand48.c b/common/libc/src/nrand48.c new file mode 100644 index 00000000..c50e5dda --- /dev/null +++ b/common/libc/src/nrand48.c @@ -0,0 +1,15 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * nrand48.c + */ + +#include +#include + +long nrand48(unsigned short xsubi[3]) +{ + return (long)((uint32_t) jrand48(xsubi) >> 1); +} diff --git a/common/libc/src/qsort.c b/common/libc/src/qsort.c new file mode 100644 index 00000000..02ca044d --- /dev/null +++ b/common/libc/src/qsort.c @@ -0,0 +1,52 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * qsort.c + * + * This is actually combsort. It's an O(n log n) algorithm with + * simplicity/small code size being its main virtue. + */ + +#include +#include +#include +#include +//#include + +static __inline size_t newgap(size_t gap) +{ + gap = (gap * 10) / 13; + if (gap == 9 || gap == 10) + gap = 11; + + if (gap < 1) + gap = 1; + return gap; +} + +void qsort(void *base, size_t nmemb, size_t size, + int (*compar) (const void *, const void *)) +{ + size_t gap = nmemb; + size_t i, j; + char *p1, *p2; + int swapped; + + if (!nmemb) + return; + + do { + gap = newgap(gap); + swapped = 0; + + for (i = 0, p1 = (char*)base; i < nmemb - gap; i++, p1 += size) { + j = i + gap; + if (compar(p1, p2 = (char *)base + j * size) > 0) { + memswap(p1, p2, size); + swapped = 1; + } + } + } while (gap > 1 || swapped); +} diff --git a/common/libc/src/seed48.c b/common/libc/src/seed48.c new file mode 100644 index 00000000..357f3bf1 --- /dev/null +++ b/common/libc/src/seed48.c @@ -0,0 +1,22 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * seed48.c + */ + +#include +#include +#include + +extern unsigned short __rand48_seed[3]; + +unsigned short *seed48(unsigned short int xsubi[3]) +{ + static unsigned short oldseed[3]; + memcpy(oldseed, __rand48_seed, sizeof __rand48_seed); + memcpy(__rand48_seed, xsubi, sizeof __rand48_seed); + + return oldseed; +} diff --git a/common/libc/src/snprintf.c b/common/libc/src/snprintf.c new file mode 100644 index 00000000..06c35552 --- /dev/null +++ b/common/libc/src/snprintf.c @@ -0,0 +1,21 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * snprintf.c + */ + +#include +#include + +int snprintf(char *buffer, size_t n, const char *format, ...) +{ + va_list ap; + int rv; + + va_start(ap, format); + rv = vsnprintf(buffer, n, format, ap); + va_end(ap); + return rv; +} diff --git a/common/libc/src/sprintf.c b/common/libc/src/sprintf.c new file mode 100644 index 00000000..8145d362 --- /dev/null +++ b/common/libc/src/sprintf.c @@ -0,0 +1,22 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * sprintf.c + */ + +#include +#include + +int sprintf(char *buffer, const char *format, ...) +{ + va_list ap; + int rv; + + va_start(ap, format); + rv = vsnprintf(buffer, (~(unsigned int) 0)>>1, format, ap); + va_end(ap); + + return rv; +} diff --git a/common/libc/src/srand48.c b/common/libc/src/srand48.c new file mode 100644 index 00000000..f3412c32 --- /dev/null +++ b/common/libc/src/srand48.c @@ -0,0 +1,30 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * srand48.c + */ + +#include +#include + +/* Common with mrand48.c, lrand48.c */ +extern unsigned short __rand48_seed[3]; + +void srand48(long seedval) +{ + __rand48_seed[0] = 0x330e; + __rand48_seed[1] = (unsigned short)seedval; + __rand48_seed[2] = (unsigned short)((uint32_t) seedval >> 16); +} + +void srand(unsigned int __s) +{ + srand48(__s); +} + +void srandom(unsigned int __s) +{ + srand48(__s); +} diff --git a/common/libc/src/sscanf.c b/common/libc/src/sscanf.c new file mode 100644 index 00000000..e6ac85bd --- /dev/null +++ b/common/libc/src/sscanf.c @@ -0,0 +1,22 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * sscanf() + */ + +#include +#include + +int sscanf(const char *str, const char *format, ...) +{ + va_list ap; + int rv; + + va_start(ap, format); + rv = vsscanf(str, format, ap); + va_end(ap); + + return rv; +} diff --git a/common/libc/src/stdlib.c b/common/libc/src/stdlib.c new file mode 100644 index 00000000..8e31fa6f --- /dev/null +++ b/common/libc/src/stdlib.c @@ -0,0 +1,31 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + * + * This functions implement WMSDK specific memory allocator routines. + */ + +#include +#include +#include + +#ifndef BFLB_IN_BENCHMARK +void *malloc(size_t size) +{ + return NULL; +} + +void free(void *ptr) +{ +} +#endif + +void *calloc(size_t nmemb, size_t size) +{ + return NULL; +} + +void *realloc(void *ptr, size_t size) +{ + return NULL; +} diff --git a/common/libc/src/strcasecmp.c b/common/libc/src/strcasecmp.c new file mode 100644 index 00000000..7d42cc5e --- /dev/null +++ b/common/libc/src/strcasecmp.c @@ -0,0 +1,28 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strcasecmp.c + */ + +#include +#include + +int strcasecmp(const char *s1, const char *s2) +{ + const unsigned char *c1 = (const unsigned char *)s1; + const unsigned char *c2 = (const unsigned char *)s2; + unsigned char ch; + int d = 0; + + while (1) { + /* toupper() expects an unsigned char (implicitly cast to int) + as input, and returns an int, which is exactly what we want. */ + d = toupper(ch = *c1++) - toupper(*c2++); + if (d || !ch) + break; + } + + return d; +} diff --git a/common/libc/src/strcat.c b/common/libc/src/strcat.c new file mode 100644 index 00000000..0cd9377b --- /dev/null +++ b/common/libc/src/strcat.c @@ -0,0 +1,15 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strcat.c + */ + +#include + +char *strcat(char *dst, const char *src) +{ + strcpy(strchr(dst, '\0'), src); + return dst; +} diff --git a/common/libc/src/strchr.c b/common/libc/src/strchr.c new file mode 100644 index 00000000..a9e99881 --- /dev/null +++ b/common/libc/src/strchr.c @@ -0,0 +1,22 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strchr.c + */ + +#include +#include + +__WEAK__ +char *strchr(const char *s, int c) +{ + while (*s != (char)c) { + if (!*s) + return NULL; + s++; + } + + return (char *)s; +} diff --git a/common/libc/src/strcmp.c b/common/libc/src/strcmp.c new file mode 100644 index 00000000..b74373ff --- /dev/null +++ b/common/libc/src/strcmp.c @@ -0,0 +1,29 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strcmp.c + */ + +#include + +#ifdef BFLB_IN_BENCHMARK +int bflb_strcmp(const char *s1, const char *s2) +#else +int strcmp(const char *s1, const char *s2) +#endif +{ + const unsigned char *c1 = (const unsigned char *)s1; + const unsigned char *c2 = (const unsigned char *)s2; + unsigned char ch; + int d = 0; + + while (1) { + d = (int)(ch = *c1++) - (int)*c2++; + if (d || !ch) + break; + } + + return d; +} diff --git a/common/libc/src/strcpy.c b/common/libc/src/strcpy.c new file mode 100644 index 00000000..68f291ae --- /dev/null +++ b/common/libc/src/strcpy.c @@ -0,0 +1,24 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strcpy.c + * + * strcpy() + */ + +#include + +char *strcpy(char *dst, const char *src) +{ + char *q = dst; + const char *p = src; + char ch; + + do { + *q++ = ch = *p++; + } while (ch); + + return dst; +} diff --git a/common/libc/src/strcspn.c b/common/libc/src/strcspn.c new file mode 100644 index 00000000..b0cd78a8 --- /dev/null +++ b/common/libc/src/strcspn.c @@ -0,0 +1,16 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strcspn + */ + +#include + +#include "strxspn.h" + +size_t strcspn(const char *s, const char *reject) +{ + return __strxspn(s, reject, 1); +} diff --git a/common/libc/src/strlcat.c b/common/libc/src/strlcat.c new file mode 100644 index 00000000..7c0c6ad7 --- /dev/null +++ b/common/libc/src/strlcat.c @@ -0,0 +1,34 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strlcat.c + */ + +#include + +size_t strlcat(char *dst, const char *src, size_t size) +{ + size_t bytes = 0; + char *q = dst; + const char *p = src; + char ch; + + while (bytes < size && *q) { + q++; + bytes++; + } + if (bytes == size) + return (bytes + strlen(src)); + + while ((ch = *p++)) { + if (bytes + 1 < size) + *q++ = ch; + + bytes++; + } + + *q = '\0'; + return bytes; +} diff --git a/common/libc/src/strlcpy.c b/common/libc/src/strlcpy.c new file mode 100644 index 00000000..a1ca46e4 --- /dev/null +++ b/common/libc/src/strlcpy.c @@ -0,0 +1,30 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strlcpy.c + */ + +#include + +size_t strlcpy(char *dst, const char *src, size_t size) +{ + size_t bytes = 0; + char *q = dst; + const char *p = src; + char ch; + + while ((ch = *p++)) { + if (bytes + 1 < size) + *q++ = ch; + + bytes++; + } + + /* If size == 0 there is no space for a final null... */ + if (size) + *q = '\0'; + + return bytes; +} diff --git a/common/libc/src/strlen.c b/common/libc/src/strlen.c new file mode 100644 index 00000000..bf567988 --- /dev/null +++ b/common/libc/src/strlen.c @@ -0,0 +1,17 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strlen() + */ + +#include + +size_t strlen(const char *s) +{ + const char *ss = s; + while (*ss) + ss++; + return ss - s; +} diff --git a/common/libc/src/strncasecmp.c b/common/libc/src/strncasecmp.c new file mode 100644 index 00000000..b480b865 --- /dev/null +++ b/common/libc/src/strncasecmp.c @@ -0,0 +1,28 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strncasecmp.c + */ + +#include +#include + +int strncasecmp(const char *s1, const char *s2, size_t n) +{ + const unsigned char *c1 = (const unsigned char *)s1; + const unsigned char *c2 = (const unsigned char *)s2; + unsigned char ch; + int d = 0; + + while (n--) { + /* toupper() expects an unsigned char (implicitly cast to int) + as input, and returns an int, which is exactly what we want. */ + d = toupper(ch = *c1++) - toupper(*c2++); + if (d || !ch) + break; + } + + return d; +} diff --git a/common/libc/src/strncat.c b/common/libc/src/strncat.c new file mode 100644 index 00000000..e9a7f934 --- /dev/null +++ b/common/libc/src/strncat.c @@ -0,0 +1,25 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strncat.c + */ + +#include + +char *strncat(char *dst, const char *src, size_t n) +{ + char *q = strchr(dst, '\0'); + const char *p = src; + char ch; + + while (n--) { + *q++ = ch = *p++; + if (!ch) + return dst; + } + *q = '\0'; + + return dst; +} diff --git a/common/libc/src/strncmp.c b/common/libc/src/strncmp.c new file mode 100644 index 00000000..ffa85547 --- /dev/null +++ b/common/libc/src/strncmp.c @@ -0,0 +1,25 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strncmp.c + */ + +#include + +int strncmp(const char *s1, const char *s2, size_t n) +{ + const unsigned char *c1 = (const unsigned char *)s1; + const unsigned char *c2 = (const unsigned char *)s2; + unsigned char ch; + int d = 0; + + while (n--) { + d = (int)(ch = *c1++) - (int)*c2++; + if (d || !ch) + break; + } + + return d; +} diff --git a/common/libc/src/strncpy.c b/common/libc/src/strncpy.c new file mode 100644 index 00000000..6ae3f466 --- /dev/null +++ b/common/libc/src/strncpy.c @@ -0,0 +1,28 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strncpy.c + */ + +#include + +char *strncpy(char *dst, const char *src, size_t n) +{ + char *q = dst; + const char *p = src; + char ch; + + while (n) { + n--; + *q++ = ch = *p++; + if (!ch) + break; + } + + /* The specs say strncpy() fills the entire buffer with NUL. Sigh. */ + memset(q, 0, n); + + return dst; +} diff --git a/common/libc/src/strnlen.c b/common/libc/src/strnlen.c new file mode 100644 index 00000000..fb60071d --- /dev/null +++ b/common/libc/src/strnlen.c @@ -0,0 +1,22 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strnlen() + */ + +#include + +size_t strnlen(const char *s, size_t maxlen) +{ + const char *ss = s; + + /* Important: the maxlen test must precede the reference through ss; + since the byte beyond the maximum may segfault */ + while ((maxlen > 0) && *ss) { + ss++; + maxlen--; + } + return ss - s; +} diff --git a/common/libc/src/strntoimax.c b/common/libc/src/strntoimax.c new file mode 100644 index 00000000..e9187b80 --- /dev/null +++ b/common/libc/src/strntoimax.c @@ -0,0 +1,18 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strntoimax.c + * + * strntoimax() + */ + +#include +#include +//#include + +intmax_t strntoimax(const char *nptr, char **endptr, int base, size_t n) +{ + return (intmax_t) strntoumax(nptr, endptr, base, n); +} diff --git a/common/libc/src/strntoumax.c b/common/libc/src/strntoumax.c new file mode 100644 index 00000000..b66450f7 --- /dev/null +++ b/common/libc/src/strntoumax.c @@ -0,0 +1,81 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strntoumax.c + * + * The strntoumax() function and associated + */ + +#include +#include +#include +#include + +static __inline int digitval(int ch) +{ + if (ch >= '0' && ch <= '9') { + return ch - '0'; + } else if (ch >= 'A' && ch <= 'Z') { + return ch - 'A' + 10; + } else if (ch >= 'a' && ch <= 'z') { + return ch - 'a' + 10; + } else { + return -1; + } +} + +uintmax_t strntoumax(const char *nptr, char **endptr, int base, size_t n) +{ + int minus = 0; + uintmax_t v = 0; + int d; + + while (n && isspace((unsigned char)*nptr)) { + nptr++; + n--; + } + + /* Single optional + or - */ + if (n) { + char c = *nptr; + if (c == '-' || c == '+') { + minus = (c == '-'); + nptr++; + n--; + } + } + + if (base == 0) { + if (n >= 2 && nptr[0] == '0' && + (nptr[1] == 'x' || nptr[1] == 'X')) { + n -= 2; + nptr += 2; + base = 16; + } else if (n >= 1 && nptr[0] == '0') { + n--; + nptr++; + base = 8; + } else { + base = 10; + } + } else if (base == 16) { + if (n >= 2 && nptr[0] == '0' && + (nptr[1] == 'x' || nptr[1] == 'X')) { + n -= 2; + nptr += 2; + } + } + + while (n && (d = digitval(*nptr)) >= 0 && d < base) { + v = v * base + d; + n--; + nptr++; + } + + if (endptr) + *endptr = (char *)nptr; + + return minus ? -v : v; +} diff --git a/common/libc/src/strpbrk.c b/common/libc/src/strpbrk.c new file mode 100644 index 00000000..2c8d2b40 --- /dev/null +++ b/common/libc/src/strpbrk.c @@ -0,0 +1,18 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strpbrk + */ + +#include + +#include "strxspn.h" + +char *strpbrk(const char *s, const char *accept) +{ + const char *ss = s + __strxspn(s, accept, 1); + + return *ss ? (char *)ss : NULL; +} diff --git a/common/libc/src/strrchr.c b/common/libc/src/strrchr.c new file mode 100644 index 00000000..4bbae0c1 --- /dev/null +++ b/common/libc/src/strrchr.c @@ -0,0 +1,22 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strrchr.c + */ + +#include + +char *strrchr(const char *s, int c) +{ + const char *found = NULL; + + while (*s) { + if (*s == (char)c) + found = s; + s++; + } + + return (char *)found; +} diff --git a/common/libc/src/strsep.c b/common/libc/src/strsep.c new file mode 100644 index 00000000..417e8e1a --- /dev/null +++ b/common/libc/src/strsep.c @@ -0,0 +1,25 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strsep.c + */ + +#include + +char *strsep(char **stringp, const char *delim) +{ + char *s = *stringp; + char *e; + + if (!s) + return NULL; + + e = strpbrk(s, delim); + if (e) + *e++ = '\0'; + + *stringp = e; + return s; +} diff --git a/common/libc/src/strspn.c b/common/libc/src/strspn.c new file mode 100644 index 00000000..cfa708b3 --- /dev/null +++ b/common/libc/src/strspn.c @@ -0,0 +1,16 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strspn + */ + +#include + +#include "strxspn.h" + +size_t strspn(const char *s, const char *accept) +{ + return __strxspn(s, accept, 0); +} diff --git a/common/libc/src/strstr.c b/common/libc/src/strstr.c new file mode 100644 index 00000000..762c5ff3 --- /dev/null +++ b/common/libc/src/strstr.c @@ -0,0 +1,16 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strstr.c + */ + +#include +//#include + +char *strstr(const char *haystack, const char *needle) +{ + return (char *)memmem(haystack, strlen(haystack), needle, + strlen(needle)); +} diff --git a/common/libc/src/strtoimax.c b/common/libc/src/strtoimax.c new file mode 100644 index 00000000..ba4bd1e6 --- /dev/null +++ b/common/libc/src/strtoimax.c @@ -0,0 +1,7 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#define TYPE intmax_t +#define NAME strtoimax +#include "strtox.c" diff --git a/common/libc/src/strtok.c b/common/libc/src/strtok.c new file mode 100644 index 00000000..9f730953 --- /dev/null +++ b/common/libc/src/strtok.c @@ -0,0 +1,16 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strtok.c + */ + +#include + +char *strtok(char *s, const char *delim) +{ + static char *holder; + + return strtok_r(s, delim, &holder); +} diff --git a/common/libc/src/strtok_r.c b/common/libc/src/strtok_r.c new file mode 100644 index 00000000..be63d04d --- /dev/null +++ b/common/libc/src/strtok_r.c @@ -0,0 +1,17 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#include + +char *strtok_r(char *s, const char *delim, char **holder) +{ + if (s) + *holder = s; + + do { + s = strsep(holder, delim); + } while (s && !*s); + + return s; +} diff --git a/common/libc/src/strtol.c b/common/libc/src/strtol.c new file mode 100644 index 00000000..773db454 --- /dev/null +++ b/common/libc/src/strtol.c @@ -0,0 +1,7 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#define TYPE signed long +#define NAME strtol +#include "strtox.c" diff --git a/common/libc/src/strtoll.c b/common/libc/src/strtoll.c new file mode 100644 index 00000000..ef19ae87 --- /dev/null +++ b/common/libc/src/strtoll.c @@ -0,0 +1,7 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#define TYPE signed long long +#define NAME strtoll +#include "strtox.c" diff --git a/common/libc/src/strtoul.c b/common/libc/src/strtoul.c new file mode 100644 index 00000000..1ee24f34 --- /dev/null +++ b/common/libc/src/strtoul.c @@ -0,0 +1,7 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#define TYPE unsigned long +#define NAME strtoul +#include "strtox.c" diff --git a/common/libc/src/strtoull.c b/common/libc/src/strtoull.c new file mode 100644 index 00000000..0bcf8026 --- /dev/null +++ b/common/libc/src/strtoull.c @@ -0,0 +1,7 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#define TYPE unsigned long long +#define NAME strtoull +#include "strtox.c" diff --git a/common/libc/src/strtoumax.c b/common/libc/src/strtoumax.c new file mode 100644 index 00000000..37cad718 --- /dev/null +++ b/common/libc/src/strtoumax.c @@ -0,0 +1,7 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +#define TYPE uintmax_t +#define NAME strtoumax +#include "strtox.c" diff --git a/common/libc/src/strtox.c b/common/libc/src/strtox.c new file mode 100644 index 00000000..df1746f7 --- /dev/null +++ b/common/libc/src/strtox.c @@ -0,0 +1,19 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strtox.c + * + * strto...() functions, by macro definition + */ + +#include +#include +#include +#include + +WEAK TYPE NAME(const char *nptr, char **endptr, int base) +{ + return (TYPE) strntoumax(nptr, endptr, base, ~(size_t) 0); +} diff --git a/common/libc/src/strxspn.c b/common/libc/src/strxspn.c new file mode 100644 index 00000000..f4969c56 --- /dev/null +++ b/common/libc/src/strxspn.c @@ -0,0 +1,33 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * strpbrk + */ + +#include +#include +#include +#include +#include "strxspn.h" + +size_t __strxspn(const char *s, const char *map, int parity) +{ + char matchmap[UCHAR_MAX + 1]; + size_t n = 0; + + /* Create bitmap */ + memset(matchmap, 0, sizeof matchmap); + while (*map) + matchmap[(unsigned char)*map++] = 1; + + /* Make sure the null character never matches */ + matchmap[0] = parity; + + /* Calculate span length */ + while (matchmap[(unsigned char)*s++] ^ parity) + n++; + + return n; +} diff --git a/common/libc/src/strxspn.h b/common/libc/src/strxspn.h new file mode 100644 index 00000000..ce56ff29 --- /dev/null +++ b/common/libc/src/strxspn.h @@ -0,0 +1,12 @@ +/* + * strxspn.h + */ + +#ifndef STRXSPN_H +#define STRXSPN_H + +#include + +extern size_t __strxspn(const char *s, const char *map, int parity); + +#endif diff --git a/common/libc/src/vsnprintf.c b/common/libc/src/vsnprintf.c new file mode 100644 index 00000000..782181f4 --- /dev/null +++ b/common/libc/src/vsnprintf.c @@ -0,0 +1,821 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * vsnprintf.c + * + * vsnprintf(), from which the rest of the printf() + * family is built + */ + +#include +#include +#include +#include +#include +#include + +enum flag { + FL_ZERO = 0x01, /* Zero modifier */ + FL_MINUS = 0x02, /* Minus modifier */ + FL_PLUS = 0x04, /* Plus modifier */ + FL_TICK = 0x08, /* ' modifier */ + FL_SPACE = 0x10, /* Space modifier */ + FL_HASH = 0x20, /* # modifier */ + FL_SIGNED = 0x40, /* Number is signed */ + FL_UPPER = 0x80 /* Upper case digits */ +}; + +/* These may have to be adjusted on certain implementations */ +enum ranks { + rank_char = -2, + rank_short = -1, + rank_int = 0, + rank_long = 1, + rank_longlong = 2 +}; + +#define MIN_RANK rank_char +#define MAX_RANK rank_longlong + +#define INTMAX_RANK rank_longlong +#define SIZE_T_RANK rank_long +#define PTRDIFF_T_RANK rank_long + +#define EMIT(x) { if (o < n) { *q++ = (x); } o++; } +static size_t +format_int(char *q, size_t n, uintmax_t val, unsigned int flags, + int base, int width, int prec) +{ + char *qq; + size_t o = 0, oo; + static const char lcdigits[] = "0123456789abcdef"; + static const char ucdigits[] = "0123456789ABCDEF"; + const char *digits; + uintmax_t tmpval; + int minus = 0; + int ndigits = 0, nchars; + int tickskip, b4tick; + + /* Select type of digits */ + digits = (flags & FL_UPPER) ? ucdigits : lcdigits; + + /* If signed, separate out the minus */ + if (flags & FL_SIGNED && (intmax_t) val < 0) { + minus = 1; + val = (uintmax_t) (-(intmax_t) val); + } + + /* Count the number of digits needed. This returns zero for 0. */ + tmpval = val; + while (tmpval) { + tmpval /= base; + ndigits++; + } + + /* Adjust ndigits for size of output */ + + if (flags & FL_HASH && base == 8) { + if (prec < ndigits + 1) + prec = ndigits + 1; + } + + if (ndigits < prec) { + ndigits = prec; /* Mandatory number padding */ + } else if (val == 0) { + ndigits = 1; /* Zero still requires space */ + } + + /* For ', figure out what the skip should be */ + if (flags & FL_TICK) { + tickskip = (base == 16) ? 4 : 3; + } else { + tickskip = ndigits; /* No tick marks */ + } + + /* Tick marks aren't digits, but generated by the number converter */ + ndigits += (ndigits - 1) / tickskip; + + /* Now compute the number of nondigits */ + nchars = ndigits; + + if (minus || (flags & (FL_PLUS | FL_SPACE))) + nchars++; /* Need space for sign */ + if ((flags & FL_HASH) && base == 16) { + nchars += 2; /* Add 0x for hex */ + } + + /* Emit early space padding */ + if (!(flags & (FL_MINUS | FL_ZERO)) && width > nchars) { + while (width > nchars) { + EMIT(' '); + width--; + } + } + + /* Emit nondigits */ + if (minus) { + EMIT('-'); + } else if (flags & FL_PLUS) { + EMIT('+'); + } else if (flags & FL_SPACE) { + EMIT(' '); + } + + if ((flags & FL_HASH) && base == 16) { + EMIT('0'); + EMIT((flags & FL_UPPER) ? 'X' : 'x'); + } + + /* Emit zero padding */ + if ((flags & (FL_MINUS | FL_ZERO)) == FL_ZERO && width > ndigits) { + while (width > nchars) { + EMIT('0'); + width--; + } + } + + /* Generate the number. This is done from right to left. */ + q += ndigits; /* Advance the pointer to end of number */ + o += ndigits; + qq = q; + oo = o; /* Temporary values */ + + b4tick = tickskip; + while (ndigits > 0) { + if (!b4tick--) { + qq--; + oo--; + ndigits--; + if (oo < n) + *qq = '_'; + b4tick = tickskip - 1; + } + qq--; + oo--; + ndigits--; + if (oo < n) + *qq = digits[val % base]; + val /= base; + } + + /* Emit late space padding */ + while ((flags & FL_MINUS) && width > nchars) { + EMIT(' '); + width--; + } + + return o; +} + +#ifdef BFLB_PRINT_FLOAT_SUPPORT + +#define ZEROPAD (1<<0) /* Pad with zero */ +#define SIGN (1<<1) /* Unsigned/signed long */ +#define PLUS (1<<2) /* Show plus */ +#define SPACE (1<<3) /* Spacer */ +#define LEFT (1<<4) /* Left justified */ +#define HEX_PREP (1<<5) /* 0x */ +#define UPPERCASE (1<<6) /* 'ABCDEF' */ + +#include +#define CVTBUFSIZE 80 + +static char *cvt(double arg, int ndigits, int *decpt, int *sign, char *buf, int eflag) +{ + int r2; + double fi, fj; + char *p, *p1; + + if (ndigits < 0) ndigits = 0; + if (ndigits >= CVTBUFSIZE - 1) ndigits = CVTBUFSIZE - 2; + r2 = 0; + *sign = 0; + p = &buf[0]; + if (arg < 0) + { + *sign = 1; + arg = -arg; + } + arg = modf(arg, &fi); + p1 = &buf[CVTBUFSIZE]; + + if (fi != 0) + { + p1 = &buf[CVTBUFSIZE]; + while (fi != 0) + { + fj = modf(fi / 10, &fi); + *--p1 = (int)((fj + 0.03) * 10) + '0'; + r2++; + } + while (p1 < &buf[CVTBUFSIZE]) *p++ = *p1++; + } + else if (arg > 0) + { + while ((fj = arg * 10) < 1) + { + arg = fj; + r2--; + } + } + p1 = &buf[ndigits]; + if (eflag == 0) p1 += r2; + *decpt = r2; + if (p1 < &buf[0]) + { + buf[0] = '\0'; + return buf; + } + while (p <= p1 && p < &buf[CVTBUFSIZE]) + { + arg *= 10; + arg = modf(arg, &fj); + *p++ = (int) fj + '0'; + } + if (p1 >= &buf[CVTBUFSIZE]) + { + buf[CVTBUFSIZE - 1] = '\0'; + return buf; + } + p = p1; + *p1 += 5; + while (*p1 > '9') + { + *p1 = '0'; + if (p1 > buf) + ++*--p1; + else + { + *p1 = '1'; + (*decpt)++; + if (eflag == 0) + { + if (p > buf) *p = '0'; + p++; + } + } + } + *p = '\0'; + return buf; +} + +char *ecvtbuf(double arg, int ndigits, int *decpt, int *sign, char *buf) +{ + return cvt(arg, ndigits, decpt, sign, buf, 1); +} + +char *fcvtbuf(double arg, int ndigits, int *decpt, int *sign, char *buf) +{ + return cvt(arg, ndigits, decpt, sign, buf, 0); +} + +static void ee_bufcpy(char *d, char *s, int count); + +void ee_bufcpy(char *pd, char *ps, int count) { + char *pe=ps+count; + while (ps!=pe) + *pd++=*ps++; +} + +static void parse_float(double value, char *buffer, char fmt, int precision) +{ + int decpt, sign, exp, pos; + char *digits = NULL; + char cvtbuf[80]; + int capexp = 0; + int magnitude; + + if (fmt == 'G' || fmt == 'E') + { + capexp = 1; + fmt += 'a' - 'A'; + } + + if (fmt == 'g') + { + digits = ecvtbuf(value, precision, &decpt, &sign, cvtbuf); + magnitude = decpt - 1; + if (magnitude < -4 || magnitude > precision - 1) + { + fmt = 'e'; + precision -= 1; + } + else + { + fmt = 'f'; + precision -= decpt; + } + } + + if (fmt == 'e') + { + digits = ecvtbuf(value, precision + 1, &decpt, &sign, cvtbuf); + + if (sign) *buffer++ = '-'; + *buffer++ = *digits; + if (precision > 0) *buffer++ = '.'; + ee_bufcpy(buffer, digits + 1, precision); + buffer += precision; + *buffer++ = capexp ? 'E' : 'e'; + + if (decpt == 0) + { + if (value == 0.0) + exp = 0; + else + exp = -1; + } + else + exp = decpt - 1; + + if (exp < 0) + { + *buffer++ = '-'; + exp = -exp; + } + else + *buffer++ = '+'; + + buffer[2] = (exp % 10) + '0'; + exp = exp / 10; + buffer[1] = (exp % 10) + '0'; + exp = exp / 10; + buffer[0] = (exp % 10) + '0'; + buffer += 3; + } + else if (fmt == 'f') + { + digits = fcvtbuf(value, precision, &decpt, &sign, cvtbuf); + if (sign) *buffer++ = '-'; + if (*digits) + { + if (decpt <= 0) + { + *buffer++ = '0'; + *buffer++ = '.'; + for (pos = 0; pos < -decpt; pos++) *buffer++ = '0'; + while (*digits) *buffer++ = *digits++; + } + else + { + pos = 0; + while (*digits) + { + if (pos++ == decpt) *buffer++ = '.'; + *buffer++ = *digits++; + } + } + } + else + { + *buffer++ = '0'; + if (precision > 0) + { + *buffer++ = '.'; + for (pos = 0; pos < precision; pos++) *buffer++ = '0'; + } + } + } + + *buffer = '\0'; +} + +static void decimal_point(char *buffer) +{ + while (*buffer) + { + if (*buffer == '.') return; + if (*buffer == 'e' || *buffer == 'E') break; + buffer++; + } + + if (*buffer) + { + int n = strnlen(buffer,256); + while (n > 0) + { + buffer[n + 1] = buffer[n]; + n--; + } + + *buffer = '.'; + } + else + { + *buffer++ = '.'; + *buffer = '\0'; + } +} + +static void cropzeros(char *buffer) +{ + char *stop; + + while (*buffer && *buffer != '.') buffer++; + if (*buffer++) + { + while (*buffer && *buffer != 'e' && *buffer != 'E') buffer++; + stop = buffer--; + while (*buffer == '0') buffer--; + if (*buffer == '.') buffer--; + while (buffer!=stop) + *++buffer=0; + } +} + +static char *flt(char *str, double num, int size, int precision, char fmt, int flags) +{ + char tmp[80]; + char c, sign; + int n, i; + + // Left align means no zero padding + if (flags & LEFT) flags &= ~ZEROPAD; + + // Determine padding and sign char + c = (flags & ZEROPAD) ? '0' : ' '; + sign = 0; + if (flags & SIGN) + { + if (num < 0.0) + { + sign = '-'; + num = -num; + size--; + } + else if (flags & PLUS) + { + sign = '+'; + size--; + } + else if (flags & SPACE) + { + sign = ' '; + size--; + } + } + + // Compute the precision value + if (precision < 0) + precision = 6; // Default precision: 6 + + // Convert floating point number to text + parse_float(num, tmp, fmt, precision); + + if ((flags & HEX_PREP) && precision == 0) decimal_point(tmp); + if (fmt == 'g' && !(flags & HEX_PREP)) cropzeros(tmp); + + n = strnlen(tmp,256); + + // Output number with alignment and padding + size -= n; + if (!(flags & (ZEROPAD | LEFT))) while (size-- > 0) *str++ = ' '; + if (sign) *str++ = sign; + if (!(flags & LEFT)) while (size-- > 0) *str++ = c; + for (i = 0; i < n; i++) *str++ = tmp[i]; + while (size-- > 0) *str++ = ' '; + + return str; +} +#endif + +int vsnprintf(char *buffer, size_t n, const char *format, va_list ap) +{ + const char *p = format; + char ch; + char *q = buffer; + size_t o = 0; /* Number of characters output */ + uintmax_t val = 0; + int rank = rank_int; /* Default rank */ + int width = 0; + int prec = -1; + int base; + size_t sz; + unsigned int flags = 0; + enum { + st_normal, /* Ground state */ + st_flags, /* Special flags */ + st_width, /* Field width */ + st_prec, /* Field precision */ + st_modifiers /* Length or conversion modifiers */ + } state = st_normal; + const char *sarg; /* %s string argument */ + char carg; /* %c char argument */ + int slen; /* String length */ + + while ((ch = *p++)) { + switch (state) { + case st_normal: + if (ch == '%') { + state = st_flags; + flags = 0; + rank = rank_int; + width = 0; + prec = -1; + } else { + EMIT(ch); + } + break; + + case st_flags: + switch (ch) { + case '-': + flags |= FL_MINUS; + break; + case '+': + flags |= FL_PLUS; + break; + case '\'': + flags |= FL_TICK; + break; + case ' ': + flags |= FL_SPACE; + break; + case '#': + flags |= FL_HASH; + break; + case '0': + flags |= FL_ZERO; + break; + default: + state = st_width; + p--; /* Process this character again */ + break; + } + break; + + case st_width: + if (ch >= '0' && ch <= '9') { + width = width * 10 + (ch - '0'); + } else if (ch == '*') { + width = va_arg(ap, int); + if (width < 0) { + width = -width; + flags |= FL_MINUS; + } + } else if (ch == '.') { + prec = 0; /* Precision given */ + state = st_prec; + } else { + state = st_modifiers; + p--; /* Process this character again */ + } + break; + + case st_prec: + if (ch >= '0' && ch <= '9') { + prec = prec * 10 + (ch - '0'); + } else if (ch == '*') { + prec = va_arg(ap, int); + if (prec < 0) + prec = -1; + } else { + state = st_modifiers; + p--; /* Process this character again */ + } + break; + + case st_modifiers: + switch (ch) { + /* Length modifiers - nonterminal sequences */ + case 'h': + rank--; /* Shorter rank */ + break; + case 'l': + rank++; /* Longer rank */ + break; + case 'j': + rank = INTMAX_RANK; + break; + case 'z': + rank = SIZE_T_RANK; + break; + case 't': + rank = PTRDIFF_T_RANK; + break; + case 'L': + case 'q': + rank += 2; + break; + default: + /* Output modifiers - terminal sequences */ + + /* Next state will be normal */ + state = st_normal; + + /* Canonicalize rank */ + if (rank < MIN_RANK) + rank = MIN_RANK; + else if (rank > MAX_RANK) + rank = MAX_RANK; + + switch (ch) { + case 'P': /* Upper case pointer */ + flags |= FL_UPPER; + __attribute__ ((fallthrough)); + /* fall through */ + case 'p': /* Pointer */ + base = 16; + prec = (CHAR_BIT*sizeof(void *)+3)/4; + flags |= FL_HASH; + val = (uintmax_t)(uintptr_t) + va_arg(ap, void *); + goto is_integer; + + case 'd': /* Signed decimal output */ + case 'i': + base = 10; + flags |= FL_SIGNED; + switch (rank) { + case rank_char: + /* Yes, all these casts are + needed... */ + val = (uintmax_t)(intmax_t) + (signed char) + va_arg(ap, signed int); + break; + case rank_short: + val = (uintmax_t)(intmax_t) + (signed short) + va_arg(ap, signed int); + break; + case rank_int: + val = (uintmax_t)(intmax_t) + va_arg(ap, signed int); + break; + case rank_long: + val = (uintmax_t)(intmax_t) + va_arg(ap, signed long); + break; + case rank_longlong: + val = (uintmax_t)(intmax_t) + va_arg(ap, + signed long long); + break; + default: + break; + } + goto is_integer; + case 'o': /* Octal */ + base = 8; + goto is_unsigned; + case 'u': /* Unsigned decimal */ + base = 10; + goto is_unsigned; + case 'X': /* Upper case hexadecimal */ + flags |= FL_UPPER; + __attribute__ ((fallthrough)); + /* fall through */ + case 'x': /* Hexadecimal */ + base = 16; + goto is_unsigned; + + is_unsigned: + switch (rank) { + case rank_char: + val = (uintmax_t) + (unsigned char) + va_arg(ap, unsigned + int); + break; + case rank_short: + val = (uintmax_t) + (unsigned short) + va_arg(ap, unsigned + int); + break; + case rank_int: + val = (uintmax_t) + va_arg(ap, unsigned + int); + break; + case rank_long: + val = (uintmax_t) + va_arg(ap, unsigned + long); + break; + case rank_longlong: + val = (uintmax_t) + va_arg(ap, unsigned + long long); + break; + default: + break; + } + /* fall through */ + + is_integer: + sz = format_int(q, (o < n) ? n - o : 0, + val, flags, base, + width, prec); + q += sz; + o += sz; + break; + + case 'c': /* Character */ + carg = (char)va_arg(ap, int); + sarg = &carg; + slen = 1; + goto is_string; + case 's': /* String */ + sarg = va_arg(ap, const char *); + sarg = sarg ? sarg : "(null)"; + slen = strlen(sarg); + goto is_string; + + is_string: + { + char sch; + int i; + + if (prec != -1 && slen > prec) + slen = prec; + + if (width > slen + && !(flags & FL_MINUS)) { + char pad = + (flags & FL_ZERO) ? + '0' : ' '; + while (width > slen) { + EMIT(pad); + width--; + } + } + for (i = slen; i; i--) { + sch = *sarg++; + EMIT(sch); + } + if (width > slen + && (flags & FL_MINUS)) { + while (width > slen) { + EMIT(' '); + width--; + } + } + } + break; + + case 'n': + { + /* Output the number of + characters written */ + + switch (rank) { + case rank_char: + *va_arg(ap, + signed char *) + = o; + break; + case rank_short: + *va_arg(ap, + signed short *) + = o; + break; + case rank_int: + *va_arg(ap, + signed int *) + = o; + break; + case rank_long: + *va_arg(ap, + signed long *) + = o; + break; + case rank_longlong: + *va_arg(ap, + signed long long *) + = o; + break; + default: + break; + } + } + break; + #ifdef BFLB_PRINT_FLOAT_SUPPORT + case 'f': + { + q = flt(q, va_arg(ap, double), width, prec, ch, SIGN); + continue; + } + #endif + + default: /* Anything else, including % */ + EMIT(ch); + break; + } + } + default: + break; + } + } + + /* Null-terminate the string */ + if (o < n) + *q = '\0'; /* No overflow */ + else if (n > 0) + buffer[n - 1] = '\0'; /* Overflow - terminate at end of buffer */ + + return o; +} diff --git a/common/libc/src/vsprintf.c b/common/libc/src/vsprintf.c new file mode 100644 index 00000000..2ceaf27c --- /dev/null +++ b/common/libc/src/vsprintf.c @@ -0,0 +1,15 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * vsprintf.c + */ + +#include +#include + +int vsprintf(char *buffer, const char *format, va_list ap) +{ + return vsnprintf(buffer, (~(unsigned int) 0)>>1, format, ap); +} diff --git a/common/libc/src/vsscanf.c b/common/libc/src/vsscanf.c new file mode 100644 index 00000000..942e9eb2 --- /dev/null +++ b/common/libc/src/vsscanf.c @@ -0,0 +1,418 @@ +/* + * Derived from: + * http://www.kernel.org/pub/linux/libs/klibc/ + */ +/* + * vsscanf.c + * + * vsscanf(), from which the rest of the scanf() + * family is built + */ + +#include +#include +#include +#include +#include +#include +#include +//#include +#include + +#ifndef LONG_BIT +#define LONG_BIT (CHAR_BIT*sizeof(long)) +#endif + +enum flag { + FL_SPLAT = 0x01, /* Drop the value, do not assign */ + FL_INV = 0x02, /* Character-set with inverse */ + FL_WIDTH = 0x04, /* Field width specified */ + FL_MINUS = 0x08, /* Negative number */ +}; + +enum ranks { + rank_char = -2, + rank_short = -1, + rank_int = 0, + rank_long = 1, + rank_longlong = 2, + rank_ptr = INT_MAX /* Special value used for pointers */ +}; + +#define MIN_RANK rank_char +#define MAX_RANK rank_longlong + +#define INTMAX_RANK rank_longlong +#define SIZE_T_RANK rank_long +#define PTRDIFF_T_RANK rank_long + +enum bail { + bail_none = 0, /* No error condition */ + bail_eof, /* Hit EOF */ + bail_err /* Conversion mismatch */ +}; + +static __inline const char *skipspace(const char *p) +{ + while (isspace((unsigned char)*p)) + p++; + return p; +} + +#undef set_bit +static __inline void set_bit(unsigned long *bitmap, unsigned int bit) +{ + bitmap[bit / LONG_BIT] |= 1UL << (bit % LONG_BIT); +} + +#undef test_bit +static __inline int test_bit(unsigned long *bitmap, unsigned int bit) +{ + return (int)(bitmap[bit / LONG_BIT] >> (bit % LONG_BIT)) & 1; +} + +int vsscanf(const char *buffer, const char *format, va_list ap) +{ + const char *p = format; + char ch; + unsigned char uc; + const char *q = buffer; + const char *qq; + uintmax_t val = 0; + int rank = rank_int; /* Default rank */ + unsigned int width = UINT_MAX; + int base; + unsigned int flags = 0; + enum { + st_normal, /* Ground state */ + st_flags, /* Special flags */ + st_width, /* Field width */ + st_modifiers, /* Length or conversion modifiers */ + st_match_init, /* Initial state of %[ sequence */ + st_match, /* Main state of %[ sequence */ + st_match_range, /* After - in a %[ sequence */ + } state = st_normal; + char *sarg = NULL; /* %s %c or %[ string argument */ + enum bail bail = bail_none; + __UNUSED__ int sign; + int converted = 0; /* Successful conversions */ + unsigned long matchmap[((1 << CHAR_BIT) + (LONG_BIT - 1)) / LONG_BIT]; + int matchinv = 0; /* Is match map inverted? */ + unsigned char range_start = 0; + + while ((ch = *p++) && !bail) { + switch (state) { + case st_normal: + if (ch == '%') { + state = st_flags; + flags = 0; + rank = rank_int; + width = UINT_MAX; + } else if (isspace((unsigned char)ch)) { + q = skipspace(q); + } else { + if (*q == ch) + q++; + else + bail = bail_err; /* Match failure */ + } + break; + + case st_flags: + switch (ch) { + case '*': + flags |= FL_SPLAT; + break; + case '0': + case '1': + case '2': + case '3': + case '4': + case '5': + case '6': + case '7': + case '8': + case '9': + width = (ch - '0'); + state = st_width; + flags |= FL_WIDTH; + break; + default: + state = st_modifiers; + p--; /* Process this character again */ + break; + } + break; + + case st_width: + if (ch >= '0' && ch <= '9') { + width = width * 10 + (ch - '0'); + } else { + state = st_modifiers; + p--; /* Process this character again */ + } + break; + + case st_modifiers: + switch (ch) { + /* Length modifiers - nonterminal sequences */ + case 'h': + rank--; /* Shorter rank */ + break; + case 'l': + rank++; /* Longer rank */ + break; + case 'j': + rank = INTMAX_RANK; + break; + case 'z': + rank = SIZE_T_RANK; + break; + case 't': + rank = PTRDIFF_T_RANK; + break; + case 'L': + case 'q': + rank = rank_longlong; /* long double/long long */ + break; + + default: + /* Output modifiers - terminal sequences */ + /* Next state will be normal */ + state = st_normal; + + /* Canonicalize rank */ + if (rank < MIN_RANK) + rank = MIN_RANK; + else if (rank > MAX_RANK) + rank = MAX_RANK; + + switch (ch) { + case 'P': /* Upper case pointer */ + case 'p': /* Pointer */ + rank = rank_ptr; + base = 0; + sign = 0; + goto scan_int; + + case 'i': /* Base-independent integer */ + base = 0; + sign = 1; + goto scan_int; + + case 'd': /* Decimal integer */ + base = 10; + sign = 1; + goto scan_int; + + case 'o': /* Octal integer */ + base = 8; + sign = 0; + goto scan_int; + + case 'u': /* Unsigned decimal integer */ + base = 10; + sign = 0; + goto scan_int; + + case 'x': /* Hexadecimal integer */ + case 'X': + base = 16; + sign = 0; + goto scan_int; + + case 'n': /* # of characters consumed */ + val = (q - buffer); + goto set_integer; + + scan_int: + q = skipspace(q); + if (!*q) { + bail = bail_eof; + break; + } + val = + strntoumax(q, (char **)&qq, base, + width); + if (qq == q) { + bail = bail_err; + break; + } + q = qq; + if (!(flags & FL_SPLAT)) + converted++; + /* fall through */ + + set_integer: + if (!(flags & FL_SPLAT)) { + switch (rank) { + case rank_char: + *va_arg(ap, + unsigned char *) + = val; + break; + case rank_short: + *va_arg(ap, + unsigned short + *) = val; + break; + case rank_int: + *va_arg(ap, + unsigned int *) + = val; + break; + case rank_long: + *va_arg(ap, + unsigned long *) + = val; + break; + case rank_longlong: + *va_arg(ap, + unsigned long + long *) = val; + break; + case rank_ptr: + *va_arg(ap, void **) = + (void *) + (uintptr_t)val; + break; + default: + break; + } + } + break; + + case 'c': /* Character */ + /* Default width == 1 */ + width = (flags & FL_WIDTH) ? width : 1; + if (flags & FL_SPLAT) { + while (width--) { + if (!*q) { + bail = bail_eof; + break; + } + } + } else { + sarg = va_arg(ap, char *); + while (width--) { + if (!*q) { + bail = bail_eof; + break; + } + *sarg++ = *q++; + } + if (!bail) + converted++; + } + break; + + case 's': /* String */ + uc = 1; /* Anything nonzero */ + if (flags & FL_SPLAT) { + while (width-- && (uc = *q) && + !isspace(uc)) { + q++; + } + } else { + char *sp; + sp = sarg = va_arg(ap, char *); + while (width-- && (uc = *q) && + !isspace(uc)) { + *sp++ = uc; + q++; + } + if (sarg != sp) { + /* Terminate output */ + *sp = '\0'; + converted++; + } + } + if (!uc) + bail = bail_eof; + break; + + case '[': /* Character range */ + sarg = (flags & FL_SPLAT) ? NULL + : va_arg(ap, char *); + state = st_match_init; + matchinv = 0; + memset(matchmap, 0, sizeof matchmap); + break; + + case '%': /* %% sequence */ + if (*q == '%') + q++; + else + bail = bail_err; + break; + + default: /* Anything else */ + /* Unknown sequence */ + bail = bail_err; + break; + } + } + break; + + case st_match_init: /* Initial state for %[ match */ + if (ch == '^' && !(flags & FL_INV)) { + matchinv = 1; + } else { + set_bit(matchmap, (unsigned char)ch); + state = st_match; + } + break; + + case st_match: /* Main state for %[ match */ + if (ch == ']') { + goto match_run; + } else if (ch == '-') { + range_start = (unsigned char)ch; + state = st_match_range; + } else { + set_bit(matchmap, (unsigned char)ch); + } + break; + + case st_match_range: /* %[ match after - */ + if (ch == ']') { + /* - was last character */ + set_bit(matchmap, (unsigned char)'-'); + goto match_run; + } else { + int i; + for (i = range_start; i < (unsigned char)ch; + i++) + set_bit(matchmap, i); + state = st_match; + } + break; + + match_run: /* Match expression finished */ + qq = q; + uc = 1; /* Anything nonzero */ + while (width && (uc = *q) + && test_bit(matchmap, uc)^matchinv) { + if (sarg) + *sarg++ = uc; + q++; + } + if (q != qq && sarg) { + *sarg = '\0'; + converted++; + } else { + bail = bail_err; + } + if (!uc) + bail = bail_eof; + break; + default: + break; + } + } + + if (bail == bail_eof && !converted) + converted = -1; /* Return EOF (-1) */ + + return converted; +} diff --git a/common/list/drv_list.h b/common/list/drv_list.h new file mode 100644 index 00000000..2ad8ef0f --- /dev/null +++ b/common/list/drv_list.h @@ -0,0 +1,468 @@ +/** + * @file drv_list.h + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ +#ifndef __DRV_LIST_H__ +#define __DRV_LIST_H__ + +#include "string.h" +#include "stdint.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * container_of - return the member address of ptr, if the type of ptr is the + * struct type. + */ +#define container_of(ptr, type, member) \ + ((type *)((char *)(ptr) - (unsigned long)(&((type *)0)->member))) + + +/** + * Double List structure + */ +struct dlist_node +{ + struct dlist_node *next; /**< point to next node. */ + struct dlist_node *prev; /**< point to prev node. */ +}; +typedef struct dlist_node dlist_t; /**< Type for lists. */ + + +/** + * @brief initialize a list + * + * @param l list to be initialized + */ +static inline void dlist_init(dlist_t *l) +{ + l->next = l->prev = l; +} + +/** + * @brief insert a node after a list + * + * @param l list to insert it + * @param n new node to be inserted + */ +static inline void dlist_insert_after(dlist_t *l, dlist_t *n) +{ + l->next->prev = n; + n->next = l->next; + + l->next = n; + n->prev = l; +} + +/** + * @brief insert a node before a list + * + * @param n new node to be inserted + * @param l list to insert it + */ +static inline void dlist_insert_before(dlist_t *l, dlist_t *n) +{ + l->prev->next = n; + n->prev = l->prev; + + l->prev = n; + n->next = l; +} + +/** + * @brief remove node from list. + * @param n the node to remove from the list. + */ +static inline void dlist_remove(dlist_t *n) +{ + n->next->prev = n->prev; + n->prev->next = n->next; + + n->next = n->prev = n; +} + +/** + * @brief move node from list. + * @param n the node to remove from the list. + */ +static inline void dlist_move_head(dlist_t *l, dlist_t *n) +{ + dlist_remove(n); + dlist_insert_after(l,n); +} + +/** + * @brief move node from list. + * @param n the node to remove from the list. + */ +static inline void dlist_move_tail(dlist_t *l, dlist_t *n) +{ + dlist_remove(n); + dlist_insert_before(l,n); +} + +/** + * @brief tests whether a list is empty + * @param l the list to test. + */ +static inline int dlist_isempty(const dlist_t *l) +{ + return l->next == l; +} + +/** + * @brief get the list length + * @param l the list to get. + */ +static inline unsigned int dlist_len(const dlist_t *l) +{ + unsigned int len = 0; + const dlist_t *p = l; + while (p->next != l) + { + p = p->next; + len ++; + } + + return len; +} + +/** + * @brief initialize a dlist object + */ +#define DLIST_OBJECT_INIT(object) { &(object), &(object) } +/** + * @brief initialize a dlist object + */ +#define DLIST_DEFINE(list) \ + dlist_t list = { &(list), &(list) } + +/** + * dlist_first_entry - get the first element from a list + * @ptr: the list head to take the element from. + * @type: the type of the struct this is embedded in. + * @member: the name of the list_struct within the struct. + * + * Note, that list is expected to be not empty. + */ +#define dlist_first_entry(ptr, type, member) \ + dlist_entry((ptr)->next, type, member) +/** + * dlist_first_entry_or_null - get the first element from a list + * @ptr: the list head to take the element from. + * @type: the type of the struct this is embedded in. + * @member: the name of the list_struct within the struct. + * + * Note, that list is expected to be not empty. + */ +#define dlist_first_entry_or_null(ptr, type, member) \ + (dlist_isempty(ptr) ? NULL : dlist_first_entry(ptr, type, member)) + +/** + * @brief get the struct for this entry + * @param node the entry point + * @param type the type of structure + * @param member the name of list in structure + */ +#define dlist_entry(node, type, member) \ + container_of(node, type, member) + +/** + * dlist_for_each - iterate over a list + * @pos: the dlist_t * to use as a loop cursor. + * @head: the head for your list. + */ +#define dlist_for_each(pos, head) \ + for (pos = (head)->next; pos != (head); pos = pos->next) + +/** + * dlist_for_each_prev - iterate over a list + * @pos: the dlist_t * to use as a loop cursor. + * @head: the head for your list. + */ +#define dlist_for_each_prev(pos, head) \ + for (pos = (head)->prev; pos != (head); pos = pos->prev) + +/** + * dlist_for_each_safe - iterate over a list safe against removal of list entry + * @pos: the dlist_t * to use as a loop cursor. + * @n: another dlist_t * to use as temporary storage + * @head: the head for your list. + */ +#define dlist_for_each_safe(pos, n, head) \ + for (pos = (head)->next, n = pos->next; pos != (head); \ + pos = n, n = pos->next) + +#define dlist_for_each_prev_safe(pos, n, head) \ + for (pos = (head)->prev, n = pos->prev; pos != (head); \ + pos = n, n = pos->prev) +/** + * dlist_for_each_entry - iterate over list of given type + * @pos: the type * to use as a loop cursor. + * @head: the head for your list. + * @member: the name of the list_struct within the struct. + */ +#define dlist_for_each_entry(pos, head, member) \ + for (pos = dlist_entry((head)->next, typeof(*pos), member); \ + &pos->member != (head); \ + pos = dlist_entry(pos->member.next, typeof(*pos), member)) + +/** + * dlist_for_each_entry_reverse - iterate over list of given type + * @pos: the type * to use as a loop cursor. + * @head: the head for your list. + * @member: the name of the list_struct within the struct. + */ +#define dlist_for_each_entry_reverse(pos, head, member) \ + for (pos = dlist_entry((head)->prev, typeof(*pos), member); \ + &pos->member != (head); \ + pos = dlist_entry(pos->member.prev, typeof(*pos), member)) + +/** + * dlist_for_each_entry_safe - iterate over list of given type safe against removal of list entry + * @pos: the type * to use as a loop cursor. + * @n: another type * to use as temporary storage + * @head: the head for your list. + * @member: the name of the list_struct within the struct. + */ +#define dlist_for_each_entry_safe(pos, n, head, member) \ + for (pos = dlist_entry((head)->next, typeof(*pos), member), \ + n = dlist_entry(pos->member.next, typeof(*pos), member); \ + &pos->member != (head); \ + pos = n, n = dlist_entry(n->member.next, typeof(*n), member)) + +/** + * dlist_for_each_entry_safe - iterate over list of given type safe against removal of list entry + * @pos: the type * to use as a loop cursor. + * @n: another type * to use as temporary storage + * @head: the head for your list. + * @member: the name of the list_struct within the struct. + */ +#define dlist_for_each_entry_safe_reverse(pos, n, head, member) \ + for (pos = dlist_entry((head)->prev, typeof(*pos), field), \ + n = dlist_entry(pos->member.prev, typeof(*pos), member); \ + &pos->member != (head); \ + pos = n, n = dlist_entry(pos->member.prev, typeof(*pos), member)) + +/** + * Single List structure + */ +struct slist_node +{ + struct slist_node *next; /**< point to next node. */ +}; +typedef struct slist_node slist_t; /**< Type for single list. */ + + +/** + * @brief initialize a single list + * + * @param l the single list to be initialized + */ +static inline void slist_init(slist_t *l) +{ + l->next = NULL; +} + +static inline void slist_add_head(slist_t *l, slist_t *n) +{ + n->next = l->next; + l->next = n; +} + +static inline void slist_add_tail(slist_t *l, slist_t *n) +{ + while (l->next) l = l->next; + + /* append the node to the tail */ + l->next = n; + n->next = NULL; +} + +static inline void slist_insert(slist_t *l, slist_t *next, slist_t *n) +{ + if (!next) + { + slist_add_tail(next, l); + return; + } + + while (l->next) + { + if (l->next == next) + { + l->next = n; + n->next = next; + } + + l = l->next; + } +} + +static inline slist_t *slist_remove(slist_t *l, slist_t *n) +{ + /* remove slist head */ + while (l->next && l->next != n) l = l->next; + + /* remove node */ + if (l->next != (slist_t *)0) l->next = l->next->next; + + return l; +} + +static inline unsigned int slist_len(const slist_t *l) +{ + unsigned int len = 0; + const slist_t *list = l->next; + while (list != NULL) + { + list = list->next; + len ++; + } + + return len; +} + +static inline unsigned int slist_contains(slist_t *l, slist_t *n) +{ + while (l->next) + { + if (l->next == n) + { + return 0; + } + + l = l->next; + } + + return 1; +} + +static inline slist_t *slist_head(slist_t *l) +{ + return l->next; +} + +static inline slist_t *slist_tail(slist_t *l) +{ + while (l->next) l = l->next; + + return l; +} + +static inline slist_t *slist_next(slist_t *n) +{ + return n->next; +} + +static inline int slist_isempty(slist_t *l) +{ + return l->next == NULL; +} + +/** + * @brief initialize a slist object + */ +#define SLIST_OBJECT_INIT(object) { NULL } + +/** + * @brief initialize a slist object + */ +#define SLIST_DEFINE(slist) \ + slist_t slist = { NULL } + +/** + * @brief get the struct for this single list node + * @param node the entry point + * @param type the type of structure + * @param member the name of list in structure + */ +#define slist_entry(node, type, member) \ + container_of(node, type, member) + +/** + * slist_first_entry - get the first element from a slist + * @ptr: the slist head to take the element from. + * @type: the type of the struct this is embedded in. + * @member: the name of the slist_struct within the struct. + * + * Note, that slist is expected to be not empty. + */ +#define slist_first_entry(ptr, type, member) \ + slist_entry((ptr)->next, type, member) + +/** + * slist_tail_entry - get the tail element from a slist + * @ptr: the slist head to take the element from. + * @type: the type of the struct this is embedded in. + * @member: the name of the slist_struct within the struct. + * + * Note, that slist is expected to be not empty. + */ +#define slist_tail_entry(ptr, type, member) \ + slist_entry(slist_tail(ptr), type, member) + +/** + * slist_first_entry_or_null - get the first element from a slist + * @ptr: the slist head to take the element from. + * @type: the type of the struct this is embedded in. + * @member: the name of the slist_struct within the struct. + * + * Note, that slist is expected to be not empty. + */ +#define slist_first_entry_or_null(ptr, type, member) \ + (slist_isempty(ptr) ? NULL : slist_first_entry(ptr, type, member)) + +/** + * slist_for_each - iterate over a single list + * @pos: the slist_t * to use as a loop cursor. + * @head: the head for your single list. + */ +#define slist_for_each(pos, head) \ + for (pos = (head)->next; pos != NULL; pos = pos->next) + +#define slist_for_each_safe(pos, next, head) \ + for (pos = (head)->next, next = pos->next; pos; \ + pos = next, next = pos->next) + +/** + * slist_for_each_entry - iterate over single list of given type + * @pos: the type * to use as a loop cursor. + * @head: the head for your single list. + * @member: the name of the list_struct within the struct. + */ +#define slist_for_each_entry(pos, head, member) \ + for (pos = slist_entry((head)->next, typeof(*pos), member); \ + &pos->member != (NULL); \ + pos = slist_entry(pos->member.next, typeof(*pos), member)) + +#define slist_for_each_entry_safe(pos, n, head, member) \ + for (pos = slist_entry((head)->next, typeof(*pos), member), \ + n = slist_entry(pos->member.next, typeof(*pos), member); \ + &pos->member != (NULL); \ + pos = n, n = slist_entry(pos->member.next, typeof(*pos), member)) + +#ifdef __cplusplus +} +#endif + +#endif \ No newline at end of file diff --git a/common/memheap/drv_mmheap.c b/common/memheap/drv_mmheap.c new file mode 100644 index 00000000..f88f8cc7 --- /dev/null +++ b/common/memheap/drv_mmheap.c @@ -0,0 +1,768 @@ +/** + * @file drv_mmheap.c + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ +#include "drv_mmheap.h" + +mmheap_ctl_t mmheap_ctl; + +static int generic_fls(uint32_t x) +{ + int r = 32; + if (!x) + return 0; + + if (!(x & 0xffff0000u)) { + x <<= 16; + r -= 16; + } + if (!(x & 0xff000000u)) { + x <<= 8; + r -= 8; + } + if (!(x & 0xf0000000u)) { + x <<= 4; + r -= 4; + } + if (!(x & 0xc0000000u)) { + x <<= 2; + r -= 2; + } + if (!(x & 0x80000000u)) { + x <<= 1; + r -= 1; + } + return r; +} + +static int __ffs(uint32_t word) +{ + return generic_fls(word & (~word + 1)) - 1; +} + +static int __fls(uint32_t word) +{ + return generic_fls(word) - 1; +} + +static inline size_t blk_size(const mmheap_blk_t *blk) +{ + return blk->size & MMHEAP_BLOCK_SIZE_MASK; +} + +static inline void blk_set_size(mmheap_blk_t *blk, size_t size) +{ + blk->size = size | (blk->size & MMHEAP_BLOCK_STATE_MASK); +} + +static inline int blk_is_last(const mmheap_blk_t* blk) +{ + return blk_size(blk) == 0; +} + +static inline int blk_is_free(const mmheap_blk_t *blk) +{ + return blk->size & MMHEAP_BLOCK_CURR_FREE; +} + +static inline void blk_set_free(mmheap_blk_t *blk) +{ + blk->size |= MMHEAP_BLOCK_CURR_FREE; +} + +static inline void blk_set_used(mmheap_blk_t *blk) +{ + blk->size &= ~MMHEAP_BLOCK_CURR_FREE; +} + +static inline int blk_is_prev_free(const mmheap_blk_t *blk) +{ + return blk->size & MMHEAP_BLOCK_PREV_FREE; +} + +static inline void blk_set_prev_free(mmheap_blk_t *blk) +{ + blk->size |= MMHEAP_BLOCK_PREV_FREE; +} + +static void blk_set_prev_used(mmheap_blk_t *blk) +{ + blk->size &= ~MMHEAP_BLOCK_PREV_FREE; +} + +static inline mmheap_blk_t *blk_from_ptr(const void *ptr) +{ + return (mmheap_blk_t *)((uint32_t)ptr - MMHEAP_BLK_START_OFFSET); +} + +static inline void *blk_to_ptr(const mmheap_blk_t *blk) +{ + return (void *)((uint32_t)blk + MMHEAP_BLK_START_OFFSET); +} + +/* Return location of next block after block of given size. */ +static inline mmheap_blk_t *offset_to_blk(const void *ptr, int diff) +{ + return (mmheap_blk_t *)((uint32_t)ptr + diff); +} + +/* Return location of previous block. */ +static inline mmheap_blk_t *blk_prev(const mmheap_blk_t *blk) +{ + return blk->prev_phys_blk; +} + +/* Return location of next existing block. */ +static mmheap_blk_t *blk_next(const mmheap_blk_t *blk) +{ + mmheap_blk_t *next_blk; + + next_blk = offset_to_blk(blk_to_ptr(blk), blk_size(blk) - MMHEAP_BLK_HEADER_OVERHEAD); + return next_blk; +} + +/* Link a new block with its physical neighbor, return the neighbor. */ +static mmheap_blk_t *blk_link_next(mmheap_blk_t *blk) +{ + mmheap_blk_t *next_blk; + + next_blk = blk_next(blk); + next_blk->prev_phys_blk = blk; + return next_blk; +} + +static void blk_mark_as_free(mmheap_blk_t *blk) +{ + mmheap_blk_t *next_blk; + + /* Link the block to the next block, first. */ + next_blk = blk_link_next(blk); + blk_set_prev_free(next_blk); + blk_set_free(blk); +} + +static void blk_mark_as_used(mmheap_blk_t *blk) +{ + mmheap_blk_t *next_blk; + + next_blk = blk_next(blk); + blk_set_prev_used(next_blk); + blk_set_used(blk); +} + +static inline size_t align_up(size_t x, size_t align) +{ + return (x + (align - 1)) & ~(align - 1); +} + +static inline size_t align_down(size_t x, size_t align) +{ + return x - (x & (align - 1)); +} + +static inline void *align_ptr(const void *ptr, size_t align) +{ + return (void *)(((uint32_t)ptr + (align -1)) & ~(align -1)); +} + +/* +** Adjust an allocation size to be aligned to word size, and no smaller +** than internal minimum. +*/ +static size_t adjust_request_size(size_t size, size_t align) +{ + size_t adjust_size = 0; + + if (!size) { + return 0; + } + + adjust_size = align_up(size, align); + if (adjust_size > MMHEAP_BLK_SIZE_MAX) { + return 0; + } + + /* aligned sized must not exceed block_size_max or we'll go out of bounds on sl_bitmap */ + return adjust_size > MMHEAP_BLK_SIZE_MIN ? adjust_size : MMHEAP_BLK_SIZE_MIN; +} + +/* +** TLSF utility functions. In most cases, these are direct translations of +** the documentation found in the white paper. +*/ +static void mapping_insert(size_t size, int *fli, int *sli) +{ + int fl, sl; + + if (size < MMHEAP_SMALL_BLOCK_SIZE) { + /* Store small blocks in first list. */ + fl = 0; + sl = (int)size / (MMHEAP_SMALL_BLOCK_SIZE / MMHEAP_SL_INDEX_COUNT); + } else { + fl = __fls(size); + sl = ((int)size >> (fl - MMHEAP_SL_INDEX_COUNT_LOG2)) ^ (1 << MMHEAP_SL_INDEX_COUNT_LOG2); + fl -= (MMHEAP_FL_INDEX_SHIFT - 1); + } + *fli = fl; + *sli = sl; +} + +/* This version rounds up to the next block size (for allocations) */ +static void mapping_search(size_t size, int *fli, int *sli) +{ + size_t round; + + if (size >= MMHEAP_SMALL_BLOCK_SIZE) { + round = (1 << (__fls(size) - MMHEAP_SL_INDEX_COUNT_LOG2)) - 1; + size += round; + } + mapping_insert(size, fli, sli); +} + +static mmheap_blk_t *blk_search_suitable(int *fli, int *sli) +{ + int fl, sl; + uint32_t sl_map, fl_map; + + fl = *fli; + sl = *sli; + + /* + ** First, search for a block in the list associated with the given + ** fl/sl index. + */ + sl_map = mmheap_ctl.sl_bitmap[fl] & (~0U << sl); + if (!sl_map) { + /* No block exists. Search in the next largest first-level list. */ + fl_map = mmheap_ctl.fl_bitmap & (~0U << (fl + 1)); + if (!fl_map) { + /* No free blocks available, memory has been exhausted. */ + return 0; + } + + fl = __ffs(fl_map); + *fli = fl; + sl_map = mmheap_ctl.sl_bitmap[fl]; + } + sl = __ffs(sl_map); + *sli = sl; + + /* Return the first block in the free list. */ + return mmheap_ctl.blocks[fl][sl]; +} + +/* Insert a free block into the free block list. */ +static void insert_free_block(mmheap_blk_t *blk, int fl, int sl) +{ + mmheap_blk_t *curr; + + curr = mmheap_ctl.blocks[fl][sl]; + blk->next_free = curr; + blk->prev_free = &mmheap_ctl.block_null; + curr->prev_free = blk; + + /* + ** Insert the new block at the head of the list, and mark the first- + ** and second-level bitmaps appropriately. + */ + mmheap_ctl.blocks[fl][sl] = blk; + mmheap_ctl.fl_bitmap |= (1 << fl); + mmheap_ctl.sl_bitmap[fl] |= (1 << sl); +} + +/* Remove a free block from the free list.*/ +static void remove_free_block(mmheap_blk_t *blk, int fl, int sl) +{ + mmheap_blk_t *prev_blk; + mmheap_blk_t *next_blk; + + prev_blk = blk->prev_free; + next_blk = blk->next_free; + next_blk->prev_free = prev_blk; + prev_blk->next_free = next_blk; + + /* If this block is the head of the free list, set new head. */ + if (mmheap_ctl.blocks[fl][sl] == blk) { + mmheap_ctl.blocks[fl][sl] = next_blk; + + /* If the new head is null, clear the bitmap. */ + if (next_blk == &mmheap_ctl.block_null) { + mmheap_ctl.sl_bitmap[fl] &= ~(1 << sl); + + /* If the second bitmap is now empty, clear the fl bitmap. */ + if (!mmheap_ctl.sl_bitmap[fl]) { + mmheap_ctl.fl_bitmap &= ~(1 << fl); + } + } + } +} + +/* Remove a given block from the free list. */ +static void blk_remove(mmheap_blk_t *blk) +{ + int fl, sl; + + mapping_insert(blk_size(blk), &fl, &sl); + remove_free_block(blk, fl, sl); +} + +/* Insert a given block into the free list. */ +static void blk_insert(mmheap_blk_t *blk) +{ + int fl, sl; + + mapping_insert(blk_size(blk), &fl, &sl); + insert_free_block(blk, fl, sl); +} + +static int blk_can_split(mmheap_blk_t *blk, size_t size) +{ + return blk_size(blk) >= sizeof(mmheap_blk_t) + size; +} + +/* Split a block into two, the second of which is free. */ +static mmheap_blk_t *blk_split(mmheap_blk_t *blk, size_t size) +{ + mmheap_blk_t *remaining; + size_t remain_size; + + /* Calculate the amount of space left in the remaining block. */ + remaining = offset_to_blk(blk_to_ptr(blk), size - MMHEAP_BLK_HEADER_OVERHEAD); + remain_size = blk_size(blk) - (size + MMHEAP_BLK_HEADER_OVERHEAD); + + blk_set_size(remaining, remain_size); + + blk_set_size(blk, size); + blk_mark_as_free(remaining); + + return remaining; +} + +/* Absorb a free block's storage into an adjacent previous free block. */ +static mmheap_blk_t *blk_absorb(mmheap_blk_t *prev_blk, mmheap_blk_t *blk) +{ + prev_blk->size += blk_size(blk) + MMHEAP_BLK_HEADER_OVERHEAD; + blk_link_next(prev_blk); + return prev_blk; +} + +/* Merge a just-freed block with an adjacent previous free block. */ +static mmheap_blk_t *blk_merge_prev(mmheap_blk_t *blk) +{ + mmheap_blk_t *prev_blk; + + if (blk_is_prev_free(blk)) { + prev_blk = blk_prev(blk); + blk_remove(prev_blk); + blk = blk_absorb(prev_blk, blk); + } + + return blk; +} + +/* Merge a just-freed block with an adjacent free block. */ +static mmheap_blk_t *blk_merge_next(mmheap_blk_t *blk) +{ + mmheap_blk_t *next_blk; + + next_blk = blk_next(blk); + if (blk_is_free(next_blk)) { + blk_remove(next_blk); + blk = blk_absorb(blk, next_blk); + } + + return blk; +} + +/* Trim any trailing block space off the end of a block, return to pool. */ +static void blk_trim_free(mmheap_blk_t *blk, size_t size) +{ + mmheap_blk_t *remaining_blk; + + if (blk_can_split(blk, size)) { + remaining_blk = blk_split(blk, size); + blk_link_next(blk); + blk_set_prev_free(remaining_blk); + blk_insert(remaining_blk); + } +} + +/* Trim any trailing block space off the end of a used block, return to pool. */ +static void blk_trim_used(mmheap_blk_t *blk, size_t size) +{ + mmheap_blk_t *remaining_blk; + + if (blk_can_split(blk, size)) { + /* If the next block is free, we must coalesce. */ + remaining_blk = blk_split(blk, size); + blk_set_prev_used(remaining_blk); + + remaining_blk = blk_merge_next(remaining_blk); + blk_insert(remaining_blk); + } +} + +static mmheap_blk_t *blk_trim_free_leading(mmheap_blk_t *blk, size_t size) +{ + mmheap_blk_t *remaining_blk; + + remaining_blk = blk; + if (blk_can_split(blk, size)) { + /* We want the 2nd block. */ + remaining_blk = blk_split(blk, size - MMHEAP_BLK_HEADER_OVERHEAD); + blk_set_prev_free(remaining_blk); + + blk_link_next(blk); + blk_insert(blk); + } + + return remaining_blk; +} + +static mmheap_blk_t *blk_locate_free(size_t size) +{ + int fl = 0, sl = 0; + mmheap_blk_t *blk = NULL; + + if (!size) { + return NULL; + } + + mapping_search(size, &fl, &sl); + + /* + ** mapping_search can futz with the size, so for excessively large sizes it can sometimes wind up + ** with indices that are off the end of the block array. + ** So, we protect against that here, since this is the only callsite of mapping_search. + ** Note that we don't need to check sl, since it comes from a modulo operation that guarantees it's always in range. + */ + if (fl < MMHEAP_FL_INDEX_COUNT) { + blk = blk_search_suitable(&fl, &sl); + } + + if (blk) { + remove_free_block(blk, fl, sl); + } + + return blk; +} + +static void *blk_prepare_used(mmheap_blk_t *blk, size_t size) +{ + if (!blk) { + return NULL; + } + blk_trim_free(blk, size); + blk_mark_as_used(blk); + return blk_to_ptr(blk); +} + +static void control_construct(void) +{ + int i, j; + + mmheap_ctl.pool_cnt = 0u; + for (i = 0; i < MMHEAP_POOL_MAX; ++i) { + mmheap_ctl.pool_start[i] = (void *)NULL; + } + + mmheap_ctl.block_null.next_free = &mmheap_ctl.block_null; + mmheap_ctl.block_null.prev_free = &mmheap_ctl.block_null; + + mmheap_ctl.fl_bitmap = 0; + for (i = 0; i < MMHEAP_FL_INDEX_COUNT; ++i) { + mmheap_ctl.sl_bitmap[i] = 0; + for (j = 0; j < MMHEAP_SL_INDEX_COUNT; ++j) { + mmheap_ctl.blocks[i][j] = &mmheap_ctl.block_null; + } + } +} + +static inline int mmheap_pool_is_full(void) +{ + return mmheap_ctl.pool_cnt == MMHEAP_POOL_MAX; +} + +static int mmheap_pool_is_exist(void *pool_start) +{ + int i = 0; + + for (i = 0; i < mmheap_ctl.pool_cnt; ++i) { + if (mmheap_ctl.pool_start[i] == pool_start) { + return 1; + } + } + return 0; +} + +static inline void mmheap_pool_record(void *pool_start) +{ + mmheap_ctl.pool_start[mmheap_ctl.pool_cnt++] = pool_start; +} + +static void mmheap_pool_unrecord(void *pool_start) +{ + int i = 0; + + for (i = 0; i < mmheap_ctl.pool_cnt; ++i) { + if (mmheap_ctl.pool_start[i] == pool_start) { + break; + } + } + if (i != mmheap_ctl.pool_cnt - 1) { + mmheap_ctl.pool_start[i] = mmheap_ctl.pool_start[mmheap_ctl.pool_cnt - 1]; + } + --mmheap_ctl.pool_cnt; +} + + +int mmheap_init_with_pool(void *pool_start, size_t pool_size) +{ + control_construct(); + + return mmheap_pool_add(pool_start, pool_size); +} + +void *mmheap_alloc(size_t size) +{ + size_t adjust_size; + mmheap_blk_t *blk; + + adjust_size = adjust_request_size(size, MMHEAP_ALIGN_SIZE); + blk = blk_locate_free(adjust_size); + if (!blk) { + return NULL; + } + + return blk_prepare_used(blk, adjust_size); +} + +void *mmheap_calloc(size_t num, size_t size) +{ + void *ptr; + + ptr = mmheap_alloc(num * size); + if (ptr) { + memset(ptr, 0, num * size); + } + + return ptr; +} + +void *mmheap_aligned_alloc(size_t size, size_t align) +{ + mmheap_blk_t *blk; + void *ptr, *aligned, *next_aligned; + size_t adjust_size, aligned_size; + size_t gap_minimum, size_with_gap, gap, gap_remain, offset; + + adjust_size = adjust_request_size(size, MMHEAP_ALIGN_SIZE); + gap_minimum = sizeof(mmheap_blk_t); + size_with_gap = adjust_request_size(adjust_size + align + gap_minimum, align); + aligned_size = (adjust_size && align > MMHEAP_ALIGN_SIZE) ? size_with_gap : adjust_size; + + blk = blk_locate_free(aligned_size); + if (!blk) { + return NULL; + } + + ptr = blk_to_ptr(blk); + aligned = align_ptr(ptr, align); + gap = (size_t)((uint32_t)aligned - (uint32_t)ptr); + + if (gap && gap < gap_minimum) { + gap_remain = gap_minimum - gap; + offset = gap_remain > align ? gap_remain : align; + next_aligned = (void *)((uint32_t)aligned + offset); + + aligned = align_ptr(next_aligned, align); + gap = (size_t)((uint32_t)aligned - (uint32_t)ptr); + } + + if (gap) { + blk = blk_trim_free_leading(blk, gap); + } + + return blk_prepare_used(blk, adjust_size); +} + +void mmheap_free(void *ptr) +{ + mmheap_blk_t *blk; + + if (!ptr) { + return; + } + + blk = blk_from_ptr(ptr); + blk_mark_as_free(blk); + blk = blk_merge_prev(blk); + blk = blk_merge_next(blk); + blk_insert(blk); +} + +void *mmheap_realloc(void *ptr, size_t size) +{ + void *p = 0; + mmheap_blk_t *curr_blk, *next_blk; + size_t curr_size, combined_size, adjust_size, min_size; + + if (ptr && size == 0) { + mmheap_free(ptr); + return NULL; + } + + if (!ptr) { + return mmheap_alloc(size); + } + + curr_blk = blk_from_ptr(ptr); + next_blk = blk_next(curr_blk); + + curr_size = blk_size(curr_blk); + combined_size = curr_size + blk_size(next_blk) + MMHEAP_BLK_HEADER_OVERHEAD; + adjust_size = adjust_request_size(size, MMHEAP_ALIGN_SIZE); + + if (adjust_size > curr_size && (!blk_is_free(next_blk) || adjust_size > combined_size)) { + p = mmheap_alloc(size); + if (p) { + min_size = curr_size < size ? curr_size : size; + memcpy(p, ptr, min_size); + mmheap_free(ptr); + } + } else { + if (adjust_size > curr_size) { + blk_merge_next(curr_blk); + blk_mark_as_used(curr_blk); + } + + blk_trim_used(curr_blk, adjust_size); + p = ptr; + } + + return p; +} + +int mmheap_pool_add(void *pool_start, size_t pool_size) +{ + mmheap_blk_t *curr_blk; + mmheap_blk_t *next_blk; + size_t size_aligned; + + if (mmheap_pool_is_full()) { + return MEMHEAP_STATUS_OVERFLOW; + } + + if (mmheap_pool_is_exist(pool_start)) { + return MEMHEAP_STATUS_ALREADY_EXIST; + } + + size_aligned = align_down(pool_size - 2 * MMHEAP_BLK_HEADER_OVERHEAD, MMHEAP_ALIGN_SIZE); + + if (((uint32_t)pool_start % MMHEAP_ALIGN_SIZE) != 0u) { + return MEMHEAP_STATUS_INVALID_ADDR; + } + + if (size_aligned < MMHEAP_BLK_SIZE_MIN || + size_aligned > MMHEAP_BLK_SIZE_MAX) { + return MEMHEAP_STATUS_INVALID_SIZE; + } + + /* + ** Create the main free block. Offset the start of the block slightly + ** so that the prev_phys_block field falls outside of the pool - + ** it will never be used. + */ + curr_blk = offset_to_blk(pool_start, -MMHEAP_BLK_HEADER_OVERHEAD); + blk_set_size(curr_blk, size_aligned); + blk_set_free(curr_blk); + blk_set_prev_used(curr_blk); + blk_insert(curr_blk); + + /* Split the block to create a zero-size sentinel block. */ + next_blk = blk_link_next(curr_blk); + blk_set_size(next_blk, 0); + blk_set_used(next_blk); + blk_set_prev_free(next_blk); + + mmheap_pool_record(pool_start); + + return MEMHEAP_STATUS_OK; +} + + int mmheap_pool_rmv(void *pool_start) +{ + int fl = 0, sl = 0; + mmheap_blk_t *blk; + + if (!mmheap_pool_is_exist(pool_start)) { + return MEMHEAP_STATUS_ALREADY_NOT_EXIST; + } + + blk = offset_to_blk(pool_start, -MMHEAP_BLK_HEADER_OVERHEAD); + mapping_insert(blk_size(blk), &fl, &sl); + remove_free_block(blk, fl, sl); + + mmheap_pool_unrecord(pool_start); + return MEMHEAP_STATUS_OK; +} + + int mmheap_pool_check(void *pool_start, mmheap_info_t *info) +{ + mmheap_blk_t* blk; + + memset(info, 0, sizeof(mmheap_info_t)); + + blk = offset_to_blk(pool_start, -MMHEAP_BLK_HEADER_OVERHEAD); + + while (blk && !blk_is_last(blk)) { + if (blk_is_free(blk)) { + info->free += blk_size(blk); + } else { + info->used += blk_size(blk); + } + blk = blk_next(blk); + } + + return MEMHEAP_STATUS_OK; +} + + +int mmheap_check(mmheap_info_t *info) +{ + int i; + int err; + mmheap_info_t pool_info; + + memset(info, 0, sizeof(mmheap_info_t)); + + for (i = 0; i < mmheap_ctl.pool_cnt; ++i) { + err = mmheap_pool_check(mmheap_ctl.pool_start[i], &pool_info); + if (err != MEMHEAP_STATUS_OK) { + return err; + } + + info->free += pool_info.free; + info->used += pool_info.used; + } + + return 0; +} diff --git a/common/memheap/drv_mmheap.h b/common/memheap/drv_mmheap.h new file mode 100644 index 00000000..795210a8 --- /dev/null +++ b/common/memheap/drv_mmheap.h @@ -0,0 +1,196 @@ +/** + * @file drv_mmheap.h + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ +#ifndef _DRV_MMHEAP_H_ +#define _DRV_MMHEAP_H_ + +#include "stdint.h" +#include "string.h" + +#define MEMHEAP_STATUS_OK 0 +#define MEMHEAP_STATUS_INVALID_ADDR -1 +#define MEMHEAP_STATUS_INVALID_SIZE -2 +#define MEMHEAP_STATUS_OVERFLOW -3 +#define MEMHEAP_STATUS_ALREADY_NOT_EXIST -4 +#define MEMHEAP_STATUS_ALREADY_EXIST -5 + +/** + * log2 of number of linear subdivisions of block sizes. Larger + * values require more memory in the control structure. Values of + * 4 or 5 are typical. + */ +#define MMHEAP_SL_INDEX_COUNT_LOG2 5 + +/* All allocation sizes and addresses are aligned to 4 bytes. */ +#define MMHEAP_ALIGN_SIZE_LOG2 2 +#define MMHEAP_ALIGN_SIZE (1 << MMHEAP_ALIGN_SIZE_LOG2) + +/* + * We support allocations of sizes up to (1 << MMHEAP_FL_INDEX_MAX) bits. + * However, because we linearly subdivide the second-level lists, and + * our minimum size granularity is 4 bytes, it doesn't make sense to + * create first-level lists for sizes smaller than K_MMHEAP_SL_INDEX_COUNT * 4, + * or (1 << (K_MMHEAP_SL_INDEX_COUNT_LOG2 + 2)) bytes, as there we will be + * trying to split size ranges into more slots than we have available. + * Instead, we calculate the minimum threshold size, and place all + * blocks below that size into the 0th first-level list. + */ +#define MMHEAP_FL_INDEX_MAX 30 +#define MMHEAP_SL_INDEX_COUNT (1 << MMHEAP_SL_INDEX_COUNT_LOG2) +#define MMHEAP_FL_INDEX_SHIFT (MMHEAP_SL_INDEX_COUNT_LOG2 + MMHEAP_ALIGN_SIZE_LOG2) +#define MMHEAP_FL_INDEX_COUNT (MMHEAP_FL_INDEX_MAX - MMHEAP_FL_INDEX_SHIFT + 1) + +#define MMHEAP_SMALL_BLOCK_SIZE (1 << MMHEAP_FL_INDEX_SHIFT) + +#define MMHEAP_BLOCK_CURR_FREE (1 << 0) +#define MMHEAP_BLOCK_PREV_FREE (1 << 1) +#define MMHEAP_BLOCK_SIZE_MASK ~(MMHEAP_BLOCK_CURR_FREE | MMHEAP_BLOCK_PREV_FREE) +#define MMHEAP_BLOCK_STATE_MASK (MMHEAP_BLOCK_CURR_FREE | MMHEAP_BLOCK_PREV_FREE) + +typedef struct +{ + uint32_t used; /* space is used */ + uint32_t free; /* space is free */ +} mmheap_info_t; + +/** + * Block structure. + * + * There are several implementation subtleties involved: + * - The prev_phys_block field is only valid if the previous block is free. + * - The prev_phys_block field is actually stored at the end of the + * previous block. It appears at the beginning of this structure only to + * simplify the implementation. + * - The next_free / prev_free fields are only valid if the block is free. + */ +typedef struct mmheap_blk_st { + struct mmheap_blk_st *prev_phys_blk; + + size_t size; + + struct mmheap_blk_st *next_free; + struct mmheap_blk_st *prev_free; +} mmheap_blk_t; + +/** + * A free block must be large enough to store its header minus the size of + * the prev_phys_block field, and no larger than the number of addressable + * bits for FL_INDEX. + */ +#define MMHEAP_BLK_SIZE_MIN (sizeof(mmheap_blk_t) - sizeof(mmheap_blk_t *)) +#define MMHEAP_BLK_SIZE_MAX (1 << MMHEAP_FL_INDEX_MAX) + +#define MMHEAP_BLK_HEADER_OVERHEAD (sizeof(size_t)) +#define MMHEAP_BLK_START_OFFSET (((uint32_t)&(((mmheap_blk_t *)0)->size))+ sizeof(size_t)) + +#define MMHEAP_POOL_MAX 3 + +/** + * memory heap control + */ +typedef struct +{ + int pool_cnt; + void *pool_start[MMHEAP_POOL_MAX]; + + mmheap_blk_t block_null; /**< Empty lists point at this block to indicate they are free. */ + + uint32_t fl_bitmap; /**< Bitmaps for free lists. */ + uint32_t sl_bitmap[MMHEAP_FL_INDEX_COUNT]; + + mmheap_blk_t *blocks[MMHEAP_FL_INDEX_COUNT][MMHEAP_SL_INDEX_COUNT]; /**< Head of free lists. */ +} mmheap_ctl_t; + +/** + * @brief Add a pool. + * Add addtional pool to the heap. + * + * @attention None + * + * @param[in] pool_start start address of the pool. + * @param[in] pool_size size of the pool. + * + * @return errcode + */ +int mmheap_pool_add(void *pool_start, size_t pool_size); + +/** + * @brief Alloc memory. + * Allocate size bytes and returns a pointer to the allocated memory. + * + * @attention size should no bigger than MMHEAP_BLK_SIZE_MAX. + * + * @param[in] size size of the memory. + * + * @return the pointer to the allocated memory. + */ +void *mmheap_alloc(size_t size); + +void *mmheap_calloc(size_t num, size_t size); + +/** + * @brief Alloc start address aligned memory from the heap. + * Alloc aligned address and specified size memory from the heap. + * + * @attention + * + * @param[in] size size of the memory. + * @param[in] align address align mask of the memory. + * + * @return the pointer to the allocated memory. + */ +void *mmheap_aligned_alloc(size_t size, size_t align); + +/** + * @brief Realloc memory from the heap. + * Change the size of the memory block pointed to by ptr to size bytes. + * + * @attention + *
    + *
  • if ptr is NULL, then the call is equivalent to mmheap_alloc(size), for all values of size. + *
  • if ptr is if size is equal to zero, and ptr is not K_NULL, then the call is equivalent to mmheap_free(ptr). + *
+ * + * @param[in] ptr old pointer to the memory space. + * @param[in] size new size of the memory space. + * + * @return the new pointer to the allocated memory. + */ +void *mmheap_realloc(void *ptr, size_t size); + +/** + * @brief Free the memory. + * Free the memory space pointed to by ptr, which must have been returned by a previous call to mmheap_alloc(), mmheap_aligned_alloc(), or mmheap_realloc(). + * + * @attention + * + * @param[in] ptr pointer to the memory. + * + * @return None. + */ +void mmheap_free(void *ptr); + + +int mmheap_init_with_pool(void *pool_start, size_t pool_size); + + +#endif /* _DRV_MMHEAP_H_ */ \ No newline at end of file diff --git a/common/misc/gcc.h b/common/misc/gcc.h new file mode 100644 index 00000000..0a28471b --- /dev/null +++ b/common/misc/gcc.h @@ -0,0 +1,85 @@ +/** + * @file gcc.h + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ +#ifndef _GCC_H +#define _GCC_H + +/*------------------ RealView Compiler -----------------*/ +#if defined(__GNUC__) + +#define __ASM__ __asm +#define __VOLATILE__ volatile + +#define __INLINE__ inline +#define __STATIC__ static +#define __STATIC_INLINE__ static inline + +#define likely(x) __builtin_expect(!!(x), 1) +#define unlikely(x) __builtin_expect(!!(x), 0) +#define __UNUSED__ __attribute__((__unused__)) +#define __USED__ __attribute__((__used__)) +#define __PACKED__ __attribute__((packed)) +#define __ALIGNED__(x) __attribute__((aligned(x))) +#define __PURE__ __attribute__((__pure__)) +#define __CONST__ __attribute__((__const__)) +#define __NO_RETURN__ __attribute__((__noreturn__)) +#define __NAKED__ __attribute__((naked)) +#define __WEAK__ __attribute__((weak)) +#define SECTION(x) __attribute__((section(x))) +#define __API__ __declspec(dllexport) + +#endif + +#ifdef __GNUC__ + +#define WARN_UNUSED_RET __attribute__ ((warn_unused_result)) +#define WEAK __attribute__ ((weak)) + +#ifndef PACK_START +#define PACK_START +#endif +#ifndef PACK_END +#define PACK_END __attribute__((packed)) +#endif +#define NORETURN __attribute__ ((noreturn)) + +/* alignment value should be a power of 2 */ +#define ALIGN(num, align) MASK(num, (typeof(num))align - 1) + +#define ALIGN_2(num) ALIGN(num, 2) +#define ALIGN_4(num) ALIGN(num, 4) +#define ALIGN_8(num) ALIGN(num, 8) +#define ALIGN_16(num) ALIGN(num, 16) +#define ALIGN_32(num) ALIGN(num, 32) + +#else /* __GNUC__ */ + +#define WARN_UNUSED_RET +#define WEAK __weak + +#define PACK_START __packed +#define PACK_END +#define NORETURN + +#endif /* __GNUC__ */ + +#endif \ No newline at end of file diff --git a/common/misc/misc.c b/common/misc/misc.c new file mode 100644 index 00000000..53bed6c8 --- /dev/null +++ b/common/misc/misc.c @@ -0,0 +1,220 @@ +/** + * @file misc.c + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ +#include "misc.h" + +#ifndef BFLB_USE_ROM_DRIVER +/****************************************************************************/ /** + * @brief Char memcpy + * + * @param dst: Destination + * @param src: Source + * @param n: Count of char + * + * @return Destination pointer + * + *******************************************************************************/ +__WEAK__ +void *ATTR_TCM_SECTION arch_memcpy(void *dst, const void *src, uint32_t n) +{ + const uint8_t *p = src; + uint8_t *q = dst; + + while (n--) + { + *q++ = *p++; + } + return dst; +} + +/****************************************************************************/ /** + * @brief Word memcpy + * + * @param dst: Destination + * @param src: Source + * @param n: Count of words + * + * @return Destination pointer + * + *******************************************************************************/ +__WEAK__ +uint32_t *ATTR_TCM_SECTION arch_memcpy4(uint32_t *dst, const uint32_t *src, uint32_t n) +{ + const uint32_t *p = src; + uint32_t *q = dst; + + while (n--) + { + *q++ = *p++; + } + return dst; +} + +/****************************************************************************/ /** + * @brief Fast memcpy + * + * @param dst: Destination + * @param src: Source + * @param n: Count of bytes + * + * @return Destination pointer + * + *******************************************************************************/ +__WEAK__ +void *ATTR_TCM_SECTION arch_memcpy_fast(void *pdst, const void *psrc, uint32_t n) +{ + uint32_t left, done, i = 0; + uint8_t *dst = (uint8_t *)pdst; + uint8_t *src = (uint8_t *)psrc; + + if (((uint32_t)dst & 0x3) == 0 && ((uint32_t)src & 0x3) == 0) + { + arch_memcpy4((uint32_t *)dst, (const uint32_t *)src, n >> 2); + left = n % 4; + done = n - left; + while (i < left) + { + dst[done + i] = src[done + i]; + i++; + } + } + else + { + memcpy(dst, src, n); + } + return dst; +} + +/****************************************************************************/ /** + * @brief char memset + * + * @param dst: Destination + * @param val: Value to set + * @param n: Count of char + * + * @return Destination pointer + * + *******************************************************************************/ +__WEAK__ +void *ATTR_TCM_SECTION arch_memset(void *s, uint8_t c, uint32_t n) +{ + uint8_t *p = (uint8_t *)s; + + while (n > 0) + { + *p++ = (uint8_t)c; + --n; + } + return s; +} +/****************************************************************************/ /** + * @brief Word memset + * + * @param dst: Destination + * @param val: Value to set + * @param n: Count of words + * + * @return Destination pointer + * + *******************************************************************************/ +__WEAK__ +uint32_t *ATTR_TCM_SECTION arch_memset4(uint32_t *dst, const uint32_t val, uint32_t n) +{ + uint32_t *q = dst; + + while (n--) + { + *q++ = val; + } + return dst; +} + +/****************************************************************************/ /** + * @brief string compare + * + * @param s1: string 1 + * @param s2: string 2 + * @param n: Count of chars + * + * @return compare result + * + *******************************************************************************/ +__WEAK__ +int ATTR_TCM_SECTION arch_memcmp(const void *s1, const void *s2, uint32_t n) +{ + const unsigned char *c1 = s1, *c2 = s2; + int d = 0; + + while (n--) + { + d = (int)*c1++ - (int)*c2++; + if (d) + break; + } + + return d; +} +#endif + +void memcopy_to_fifo(void* fifo_addr,uint8_t* data,uint32_t length) +{ + uint8_t *p = (uint8_t *)fifo_addr; + uint8_t *q = data; + + while (length--) { + *p = *q++; + } +} + +void fifocopy_to_mem(void* fifo_addr,uint8_t* data,uint32_t length) +{ + uint8_t *p = (uint8_t *)fifo_addr; + uint8_t *q = data; + + while (length--) { + *q++ = *p; + } +} + +#ifdef DEBUG +/******************************************************************************* +* @brief Reports the name of the source file and the source line number +* where the CHECK_PARAM error has occurred. + +* @param file: Pointer to the source file name +* @param line: assert_param error line source number + +* @return None +*******************************************************************************/ +void check_failed(uint8_t *file, uint32_t line) +{ + /* Infinite loop */ + while (1) + ; +} +#endif /* DEBUG */ + +/*@} end of group DRIVER_Public_Functions */ + +/*@} end of group DRIVER_COMMON */ + +/*@} end of group BL602_Periph_Driver */ diff --git a/common/misc/misc.h b/common/misc/misc.h new file mode 100644 index 00000000..cafb5d81 --- /dev/null +++ b/common/misc/misc.h @@ -0,0 +1,204 @@ +/** + * @file misc.h + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ +#ifndef _MISC_H +#define _MISC_H + +#include "stdio.h" +#include "stdint.h" +#include "string.h" +#include "stdarg.h" +#include "stdbool.h" +#include "gcc.h" +/*@} end of group COMMON_Public_Types */ + +/** @defgroup COMMON_Public_Constants + * @{ + */ + +/** + * @brief Memory access macro + */ +#define BL_RD_WORD(addr) (*((volatile uint32_t*)(addr))) +#define BL_WR_WORD(addr,val) ((*(volatile uint32_t*)(addr))=(val)) +#define BL_RD_SHORT(addr) (*((volatile uint16_t*)(addr))) +#define BL_WR_SHORT(addr,val) ((*(volatile uint16_t*)(addr))=(val)) +#define BL_RD_BYTE(addr) (*((volatile uint8_t*)(addr))) +#define BL_WR_BYTE(addr,val) ((*(volatile uint8_t*)(addr))=(val)) +#define BL_RDWD_FRM_BYTEP(p) ((p[3]<<24)|(p[2]<<16)|(p[1]<<8)|(p[0])) +#define BL_WRWD_TO_BYTEP(p,val) {p[0]=val&0xff;p[1]=(val>>8)&0xff;p[2]=(val>>16)&0xff;p[3]=(val>>24)&0xff;} +/** + * @brief Register access macro + */ +#define BL_RD_REG16(addr,regname) BL_RD_SHORT(addr+regname##_OFFSET) +#define BL_WR_REG16(addr,regname,val) BL_WR_SHORT(addr+regname##_OFFSET,val) +#define BL_RD_REG(addr,regname) BL_RD_WORD(addr+regname##_OFFSET) +#define BL_WR_REG(addr,regname,val) BL_WR_WORD(addr+regname##_OFFSET,val) +#define BL_SET_REG_BIT(val,bitname) ( (val) |(1U<> bitname##_POS ) +#define BL_SET_REG_BITS_VAL(val,bitname,bitval) ( ((val)&bitname##_UMSK) | ((uint32_t)(bitval)<ptTable; + PtTable_Entry_Config *ptEntries=ptStuff->ptEntries; + uint32_t *pCrc32; + uint32_t entriesLen=sizeof(PtTable_Entry_Config)*ptTable->entryCnt; + + if(ptTable->magicCode==BFLB_PT_MAGIC_CODE){ + if (ptTable->entryCnt > PT_ENTRY_MAX) { + MSG_ERR("PT Entry Count Error\r\n"); + return 0; + } + if(ptTable->crc32!= + BFLB_Soft_CRC32((uint8_t*)ptTable,sizeof(PtTable_Config)-4)){ + MSG_ERR("PT CRC Error\r\n"); + return 0; + } + pCrc32=(uint32_t *)((uintptr_t)ptEntries+entriesLen); + if(*pCrc32!=BFLB_Soft_CRC32((uint8_t*)ptEntries,entriesLen)){ + MSG_ERR("PT Entry CRC Error\r\n"); + return 0; + } + return 1; + } + return 0; +} + +/*@} end of group PARTITION_Private_Functions */ + +/** @defgroup PARTITION_Public_Functions + * @{ + */ + +/****************************************************************************//** + * @brief Register partition flash read write erase fucntion + * + * @param erase: Flash erase function + * @param write: Flash write function + * @param read: Flash read function + * + * @return None + * +*******************************************************************************/ +void PtTable_Set_Flash_Operation(pPtTable_Flash_Erase erase,pPtTable_Flash_Write write,pPtTable_Flash_Read read) +{ + PtTable_Flash_Erase=erase; + PtTable_Flash_Write=write; + PtTable_Flash_Read=read; +} + +/****************************************************************************//** + * @brief Get active partition table whole stuff + * + * @param ptStuff[2]: Partition table stuff pointer + * + * @return Active partition table ID + * +*******************************************************************************/ +PtTable_ID_Type PtTable_Get_Active_Partition_Need_Lock(PtTable_Stuff_Config ptStuff[2]) +{ + uint32_t ptValid[2]={0,0}; + PtTable_ID_Type activePtID; + + if(ptStuff==NULL){ + return PT_TABLE_ID_INVALID; + } + activePtID=PT_TABLE_ID_INVALID; + + PtTable_Flash_Read(BFLB_PT_TABLE0_ADDRESS,(uint8_t *)&ptStuff[0],sizeof(PtTable_Stuff_Config)); + ptValid[0]=PtTable_Valid(&ptStuff[0]); + + PtTable_Flash_Read(BFLB_PT_TABLE1_ADDRESS,(uint8_t *)&ptStuff[1],sizeof(PtTable_Stuff_Config)); + ptValid[1]=PtTable_Valid(&ptStuff[1]); + + if(ptValid[0]==1 && ptValid[1]==1){ + if(ptStuff[0].ptTable.age>=ptStuff[1].ptTable.age){ + activePtID=PT_TABLE_ID_0; + }else{ + activePtID=PT_TABLE_ID_1; + } + }else if(ptValid[0]==1){ + activePtID=PT_TABLE_ID_0; + }else if(ptValid[1]==1){ + activePtID=PT_TABLE_ID_1; + } + return activePtID; +} + +/****************************************************************************//** + * @brief Get partition entry according to entry ID + * + * @param ptStuff: Partition table stuff pointer + * @param type: Type of partition entry + * @param ptEntry: Partition entry pointer to store read data + * + * @return PT_ERROR_SUCCESS or PT_ERROR_ENTRY_NOT_FOUND or PT_ERROR_PARAMETER + * +*******************************************************************************/ +PtTable_Error_Type PtTable_Get_Active_Entries_By_ID(PtTable_Stuff_Config *ptStuff, + PtTable_Entry_Type type, + PtTable_Entry_Config *ptEntry) +{ + uint32_t i=0; + + if(ptStuff==NULL||ptEntry==NULL){ + return PT_ERROR_PARAMETER; + } + for (i=0; i < ptStuff->ptTable.entryCnt; i++) { + if (ptStuff->ptEntries[i].type == type){ + ARCH_MemCpy_Fast(ptEntry,&ptStuff->ptEntries[i],sizeof(PtTable_Entry_Config)); + return PT_ERROR_SUCCESS; + } + } + return PT_ERROR_ENTRY_NOT_FOUND; +} + +/****************************************************************************//** + * @brief Get partition entry according to entry name + * + * @param ptStuff: Partition table stuff pointer + * @param name: Name of partition entry + * @param ptEntry: Partition entry pointer to store read data + * + * @return PT_ERROR_SUCCESS or PT_ERROR_ENTRY_NOT_FOUND or PT_ERROR_PARAMETER + * +*******************************************************************************/ +PtTable_Error_Type PtTable_Get_Active_Entries_By_Name(PtTable_Stuff_Config *ptStuff, + uint8_t *name, + PtTable_Entry_Config *ptEntry) +{ + uint32_t i=0; + uint32_t len=strlen((char *)name); + + if(ptStuff==NULL||ptEntry==NULL){ + return PT_ERROR_PARAMETER; + } + for (i=0; i < ptStuff->ptTable.entryCnt; i++) { + if (strlen((char *)ptStuff->ptEntries[i].name) == len && + memcmp((char *)ptStuff->ptEntries[i].name,(char *)name,len) == 0){ + ARCH_MemCpy_Fast(ptEntry,&ptStuff->ptEntries[i],sizeof(PtTable_Entry_Config)); + return PT_ERROR_SUCCESS; + } + } + return PT_ERROR_ENTRY_NOT_FOUND; +} + +/****************************************************************************//** + * @brief Update partition entry + * + * @param targetTableID: Target partition table to update + * @param ptStuff: Partition table stuff pointer + * @param ptEntry: Partition entry pointer to update + * + * @return Partition update result + * +*******************************************************************************/ +PtTable_Error_Type PtTable_Update_Entry(PtTable_ID_Type targetTableID, + PtTable_Stuff_Config *ptStuff, + PtTable_Entry_Config *ptEntry) +{ + uint32_t i=0; + int32_t ret; + uint32_t writeAddr; + uint32_t entriesLen; + PtTable_Config *ptTable; + PtTable_Entry_Config *ptEntries; + uint32_t *pCrc32; + + if(ptEntry==NULL||ptStuff==NULL){ + return PT_ERROR_PARAMETER; + } + + ptTable=&ptStuff->ptTable; + ptEntries=ptStuff->ptEntries; + + if(targetTableID==PT_TABLE_ID_INVALID){ + return PT_ERROR_TABLE_NOT_VALID; + } + + if(targetTableID==PT_TABLE_ID_0){ + writeAddr=BFLB_PT_TABLE0_ADDRESS; + }else{ + writeAddr=BFLB_PT_TABLE1_ADDRESS; + } + for (i=0; i < ptTable->entryCnt; i++) { + if (ptEntries[i].type == ptEntry->type){ + ARCH_MemCpy_Fast(&ptEntries[i],ptEntry,sizeof(PtTable_Entry_Config)); + break; + } + } + if(i==ptTable->entryCnt){ + /* Not found this entry ,add new one */ + if(ptTable->entryCntentryCnt],ptEntry,sizeof(PtTable_Entry_Config)); + ptTable->entryCnt++; + }else{ + return PT_ERROR_ENTRY_UPDATE_FAIL; + } + } + + /* Prepare write back to flash */ + /* Update age */ + ptTable->age++; + ptTable->crc32=BFLB_Soft_CRC32((uint8_t*)ptTable,sizeof(PtTable_Config)-4); + + /* Update entries CRC */ + entriesLen=ptTable->entryCnt*sizeof(PtTable_Entry_Config); + pCrc32=(uint32_t *)((uintptr_t)ptEntries+entriesLen); + *pCrc32=BFLB_Soft_CRC32((uint8_t *)&ptEntries[0],entriesLen); + + /* Write back to flash */ + /* Erase flash first */ + ret=PtTable_Flash_Erase(writeAddr,writeAddr+sizeof(PtTable_Config)+entriesLen+4-1); + if(ret!=0){ + MSG_ERR("Flash Erase error\r\n"); + return PT_ERROR_FALSH_WRITE; + } + /* Write flash */ + ret=PtTable_Flash_Write(writeAddr,(uint8_t *)ptStuff,sizeof(PtTable_Stuff_Config)); + if(ret!=0){ + MSG_ERR("Flash Write error\r\n"); + return PT_ERROR_FALSH_WRITE; + } + + return PT_ERROR_SUCCESS; +} + +/****************************************************************************//** + * @brief Create partition entry + * + * @param ptID: Partition table ID + * + * @return Partition create result + * +*******************************************************************************/ +PtTable_Error_Type PtTable_Create(PtTable_ID_Type ptID) +{ + uint32_t writeAddr; + int32_t ret; + PtTable_Config ptTable; + + if(ptID==PT_TABLE_ID_INVALID){ + return PT_ERROR_TABLE_NOT_VALID; + } + + if(ptID==PT_TABLE_ID_0){ + writeAddr=BFLB_PT_TABLE0_ADDRESS; + }else{ + writeAddr=BFLB_PT_TABLE1_ADDRESS; + } + + /* Prepare write back to flash */ + ptTable.magicCode=BFLB_PT_MAGIC_CODE; + ptTable.version=0; + ptTable.entryCnt=0; + ptTable.age=0; + ptTable.crc32=BFLB_Soft_CRC32((uint8_t*)&ptTable,sizeof(PtTable_Config)-4); + /* Write back to flash */ + ret=PtTable_Flash_Erase(writeAddr,writeAddr+sizeof(PtTable_Config)-1); + if(ret!=0){ + MSG_ERR("Flash Erase error\r\n"); + return PT_ERROR_FALSH_ERASE; + } + ret=PtTable_Flash_Write(writeAddr,(uint8_t *)&ptTable,sizeof(PtTable_Config)); + if(ret!=0){ + MSG_ERR("Flash Write error\r\n"); + return PT_ERROR_FALSH_WRITE; + } + return PT_ERROR_SUCCESS; +} + +/*@} end of group PARTITION_Public_Functions */ + +/*@} end of group PARTITION */ + +/*@} end of group BFLB_Common_Driver */ diff --git a/common/partition/partition.h b/common/partition/partition.h new file mode 100644 index 00000000..d8b3c3d2 --- /dev/null +++ b/common/partition/partition.h @@ -0,0 +1,177 @@ +/** + * @file partition.h + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ +#ifndef __PARTITION_H__ +#define __PARTITION_H__ + +#include "stdint.h" +#include "string.h" + +/** @addtogroup BFLB_Common_Driver + * @{ + */ + +/** @addtogroup PARTITION + * @{ + */ + +/** @defgroup PARTITION_Public_Types + * @{ + */ + +/** + * @brief Partition table error type definition + */ +typedef enum { + PT_ERROR_SUCCESS, /*!< Partition table error type:success */ + PT_ERROR_TABLE_NOT_VALID, /*!< Partition table error type:table not found */ + PT_ERROR_ENTRY_NOT_FOUND, /*!< Partition table error type:entry not found */ + PT_ERROR_ENTRY_UPDATE_FAIL, /*!< Partition table error type:entry update fail */ + PT_ERROR_CRC32, /*!< Partition table error type:crc32 error */ + PT_ERROR_PARAMETER, /*!< Partition table error type:input parameter error */ + PT_ERROR_FALSH_READ, /*!< Partition table error type:flash read error */ + PT_ERROR_FALSH_WRITE, /*!< Partition table error type:flash write error */ + PT_ERROR_FALSH_ERASE, /*!< Partition table error type:flash erase error */ +}PtTable_Error_Type; + +/** + * @brief Partition id type definition + */ +typedef enum { + PT_TABLE_ID_0, /*!< Partition table ID 0 */ + PT_TABLE_ID_1, /*!< Partition table ID 1 */ + PT_TABLE_ID_INVALID, /*!< Partition table ID invalid */ +}PtTable_ID_Type; + +/** + * @brief Partition id type definition + */ +typedef enum { + PT_ENTRY_FW_CPU0, /*!< Partition entry type:CPU0 firmware */ + PT_ENTRY_FW_CPU1, /*!< Partition entry type:CPU1 firmware */ + PT_ENTRY_MAX=16, /*!< Partition entry type:Max */ +}PtTable_Entry_Type; + +/** + * @brief Partition table config definition + */ +typedef struct { + uint32_t magicCode; /*!< Partition table magic code */ + uint16_t version; /*!< Partition table verdion */ + uint16_t entryCnt; /*!< Partition table entry count */ + uint32_t age; /*!< Partition table age */ + uint32_t crc32; /*!< Partition table CRC32 value */ +}PtTable_Config; + +/** + * @brief Partition table entry config definition + */ +typedef struct { + uint8_t type; /*!< Partition entry type */ + uint8_t device; /*!< Partition entry device */ + uint8_t activeIndex; /*!< Partition entry active index */ + uint8_t name[9]; /*!< Partition entry name */ + uint32_t Address[2]; /*!< Partition entry start address */ + uint32_t maxLen[2]; /*!< Partition entry max length */ + uint32_t len; /*!< Partition entry length */ + uint32_t age; /*!< Partition entry age */ +}PtTable_Entry_Config; + +/** + * @brief Partition table stuff config definition + */ +typedef struct { + PtTable_Config ptTable; /*!< Partition table */ + PtTable_Entry_Config ptEntries[PT_ENTRY_MAX]; /*!< Partition entries */ + uint32_t crc32; /*!< Partition entries crc32 */ +}PtTable_Stuff_Config; + +/*@} end of group PARTITION_Public_Types */ + +/** @defgroup PARTITION_Public_Constants + * @{ + */ + +/** @defgroup PTTABLE_ERROR_TYPE + * @{ + */ +#define IS_PTTABLE_ERROR_TYPE(type) (((type) == PT_ERROR_SUCCESS) || \ + ((type) == PT_ERROR_TABLE_NOT_VALID) || \ + ((type) == PT_ERROR_ENTRY_NOT_FOUND) || \ + ((type) == PT_ERROR_ENTRY_UPDATE_FAIL) || \ + ((type) == PT_ERROR_CRC32) || \ + ((type) == PT_ERROR_PARAMETER) || \ + ((type) == PT_ERROR_FALSH_READ) || \ + ((type) == PT_ERROR_FALSH_WRITE) || \ + ((type) == PT_ERROR_FALSH_ERASE)) + +/** @defgroup PTTABLE_ID_TYPE + * @{ + */ +#define IS_PTTABLE_ID_TYPE(type) (((type) == PT_TABLE_ID_0) || \ + ((type) == PT_TABLE_ID_1) || \ + ((type) == PT_TABLE_ID_INVALID)) + +/** @defgroup PTTABLE_ENTRY_TYPE + * @{ + */ +#define IS_PTTABLE_ENTRY_TYPE(type) (((type) == PT_ENTRY_FW_CPU0) || \ + ((type) == PT_ENTRY_FW_CPU1) || \ + ((type) == PT_ENTRY_MAX)) + +/*@} end of group PARTITION_Public_Constants */ + +/** @defgroup PARTITION_Public_Macros + * @{ + */ +#define BFLB_PT_TABLE0_ADDRESS 0xE000 +#define BFLB_PT_TABLE1_ADDRESS 0xF000 +#define BFLB_PT_MAGIC_CODE 0x54504642 +typedef int (*pPtTable_Flash_Erase)(uint32_t startaddr,uint32_t endaddr); +typedef int (*pPtTable_Flash_Write)(uint32_t addr,uint8_t *data, uint32_t len); +typedef int (*pPtTable_Flash_Read) (uint32_t addr,uint8_t *data, uint32_t len); + +/*@} end of group PARTITION_Public_Macros */ + +/** @defgroup PARTITION_Public_Functions + * @{ + */ +void PtTable_Set_Flash_Operation(pPtTable_Flash_Erase erase,pPtTable_Flash_Write write,pPtTable_Flash_Read read); +PtTable_ID_Type PtTable_Get_Active_Partition_Need_Lock(PtTable_Stuff_Config ptStuff[2]); +PtTable_Error_Type PtTable_Get_Active_Entries_By_ID(PtTable_Stuff_Config *ptStuff, + PtTable_Entry_Type type, +PtTable_Entry_Config *ptEntry); +PtTable_Error_Type PtTable_Get_Active_Entries_By_Name(PtTable_Stuff_Config *ptStuff, + uint8_t *name, +PtTable_Entry_Config *ptEntry); +PtTable_Error_Type PtTable_Update_Entry(PtTable_ID_Type targetTableID, +PtTable_Stuff_Config *ptStuff, + PtTable_Entry_Config *ptEntry); +PtTable_Error_Type PtTable_Create(PtTable_ID_Type ptID); + +/*@} end of group PARTITION_Public_Functions */ + +/*@} end of group PARTITION */ + +/*@} end of group BFLB_Common_Driver */ + +#endif /* __PARTITION_H__ */ diff --git a/common/ring_buffer/ring_buffer.c b/common/ring_buffer/ring_buffer.c new file mode 100644 index 00000000..94182887 --- /dev/null +++ b/common/ring_buffer/ring_buffer.c @@ -0,0 +1,678 @@ +/** + * @file ring_buffer.c + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ +#include "ring_buffer.h" + +/** @addtogroup BL_Common_Component + * @{ + */ + +/** @addtogroup RING_BUFFER + * @{ + */ + +/** @defgroup RING_BUFFER_Private_Macros + * @{ + */ + +/*@} end of group RING_BUFFER_Private_Macros */ + +/** @defgroup RING_BUFFER_Private_Types + * @{ + */ + +/*@} end of group RING_BUFFER_Private_Types */ + +/** @defgroup RING_BUFFER_Private_Fun_Declaration + * @{ + */ + +/*@} end of group RING_BUFFER_Private_Fun_Declaration */ + +/** @defgroup RING_BUFFER_Private_Variables + * @{ + */ + +/*@} end of group RING_BUFFER_Private_Variables */ + +/** @defgroup RING_BUFFER_Global_Variables + * @{ + */ + +/*@} end of group RING_BUFFER_Global_Variables */ + +/** @defgroup RING_BUFFER_Private_Functions + * @{ + */ + +/*@} end of group RING_BUFFER_Private_Functions */ + +/** @defgroup RING_BUFFER_Public_Functions + * @{ + */ + +/****************************************************************************//** + * @brief Ring buffer init function + * + * @param rbType: Ring buffer type structure pointer + * @param buffer: Pointer of ring buffer + * @param size: Size of ring buffer + * @param lockCb: Ring buffer lock callback function pointer + * @param unlockCb: Ring buffer unlock callback function pointer + * + * @return SUCCESS + * +*******************************************************************************/ +BL_Err_Type Ring_Buffer_Init(Ring_Buffer_Type* rbType,uint8_t* buffer,uint32_t size,ringBuffer_Lock_Callback* lockCb,ringBuffer_Lock_Callback* unlockCb) +{ + /* Init ring buffer pointer */ + rbType->pointer = buffer; + + /* Init read/write mirror and index */ + rbType->readMirror = 0; + rbType->readIndex = 0; + rbType->writeMirror = 0; + rbType->writeIndex = 0; + + /* Set ring buffer size */ + rbType->size = size; + + /* Set lock and unlock callback function */ + rbType->lock = lockCb; + rbType->unlock = unlockCb; + + return SUCCESS; +} + + +/****************************************************************************//** + * @brief Ring buffer reset function + * + * @param rbType: Ring buffer type structure pointer + * + * @return SUCCESS + * +*******************************************************************************/ +BL_Err_Type Ring_Buffer_Reset(Ring_Buffer_Type* rbType) +{ + if(rbType->lock != NULL){ + rbType->lock(); + } + + /* Clear read/write mirror and index */ + rbType->readMirror = 0; + rbType->readIndex = 0; + rbType->writeMirror = 0; + rbType->writeIndex = 0; + + if(rbType->unlock != NULL){ + rbType->unlock(); + } + + return SUCCESS; +} + + +/****************************************************************************//** + * @brief Use callback function to write ring buffer function + * + * @param rbType: Ring buffer type structure pointer + * @param length: Length of data want to write + * @param writeCb: Callback function pointer + * @param parameter: Parameter that callback function may use + * + * @return Length of data actually write + * +*******************************************************************************/ +uint32_t Ring_Buffer_Write_Callback(Ring_Buffer_Type* rbType,uint32_t length,ringBuffer_Write_Callback* writeCb,void* parameter) +{ + uint32_t sizeRemained = Ring_Buffer_Get_Empty_Length(rbType); + + if(writeCb == NULL){ + return 0; + } + + if(rbType->lock != NULL){ + rbType->lock(); + } + + /* Ring buffer has no space for new data */ + if(sizeRemained == 0){ + if(rbType->unlock != NULL){ + rbType->unlock(); + } + return 0; + } + + /* Drop part of data when length out of space remained */ + if(length > sizeRemained){ + length = sizeRemained; + } + + /* Get size of space remained in current mirror */ + sizeRemained = rbType->size - rbType->writeIndex; + + if(sizeRemained > length){ + /* Space remained is enough for data in current mirror */ + writeCb(parameter,&rbType->pointer[rbType->writeIndex],length); + rbType->writeIndex += length; + }else{ + /* Data is divided to two parts with different mirror */ + writeCb(parameter,&rbType->pointer[rbType->writeIndex],sizeRemained); + writeCb(parameter,&rbType->pointer[0],length-sizeRemained); + rbType->writeIndex = length-sizeRemained; + rbType->writeMirror = ~rbType->writeMirror; + } + + if(rbType->unlock != NULL){ + rbType->unlock(); + } + return length; +} + + +/****************************************************************************//** + * @brief Copy data from data buffer to ring buffer function + * + * @param parameter: Pointer to source pointer + * @param dest: Ring buffer to write + * @param length: Length of data to write + * + * @return None + * +*******************************************************************************/ +static void Ring_Buffer_Write_Copy(void* parameter,uint8_t* dest,uint32_t length) +{ + uint8_t **src = (uint8_t **)parameter; + + ARCH_MemCpy_Fast(dest,*src,length); + *src += length; +} + + +/****************************************************************************//** + * @brief Write ring buffer function + * + * @param rbType: Ring buffer type structure pointer + * @param data: Data to write + * @param length: Length of data + * + * @return Length of data writted actually + * +*******************************************************************************/ +uint32_t Ring_Buffer_Write(Ring_Buffer_Type* rbType,const uint8_t* data,uint32_t length) +{ + return Ring_Buffer_Write_Callback(rbType,length,Ring_Buffer_Write_Copy,&data); +} + + +/****************************************************************************//** + * @brief Write 1 byte to ring buffer function + * + * @param rbType: Ring buffer type structure pointer + * @param data: Data to write + * + * @return Length of data writted actually + * +*******************************************************************************/ +uint32_t Ring_Buffer_Write_Byte(Ring_Buffer_Type* rbType,const uint8_t data) +{ + if(rbType->lock != NULL){ + rbType->lock(); + } + + /* Ring buffer has no space for new data */ + if(!Ring_Buffer_Get_Empty_Length(rbType)){ + if(rbType->unlock != NULL){ + rbType->unlock(); + } + return 0; + } + + rbType->pointer[rbType->writeIndex] = data; + + /* Judge to change index and mirror */ + if(rbType->writeIndex != (rbType->size-1)){ + rbType->writeIndex++; + }else{ + rbType->writeIndex = 0; + rbType->writeMirror = ~rbType->writeMirror; + } + + if(rbType->unlock != NULL){ + rbType->unlock(); + } + return 1; +} + + +/****************************************************************************//** + * @brief Write ring buffer function, old data will be covered by new data when ring buffer is + * full + * + * @param rbType: Ring buffer type structure pointer + * @param data: Data to write + * @param length: Length of data + * + * @return Length of data writted actually + * +*******************************************************************************/ +uint32_t Ring_Buffer_Write_Force(Ring_Buffer_Type* rbType,const uint8_t* data,uint32_t length) +{ + uint32_t sizeRemained = Ring_Buffer_Get_Empty_Length(rbType); + uint32_t indexRemained = rbType->size - rbType->writeIndex; + + if(rbType->lock != NULL){ + rbType->lock(); + } + + /* Drop extra data when data length is large than size of ring buffer */ + if(length > rbType->size){ + data = &data[length - rbType->size]; + length = rbType->size; + } + + if(indexRemained > length){ + /* Space remained is enough for data in current mirror */ + ARCH_MemCpy_Fast(&rbType->pointer[rbType->writeIndex],data,length); + rbType->writeIndex += length; + + /* Update read index */ + if(length > sizeRemained){ + rbType->readIndex = rbType->writeIndex; + } + }else{ + /* Data is divided to two parts with different mirror */ + ARCH_MemCpy_Fast(&rbType->pointer[rbType->writeIndex],data,indexRemained); + ARCH_MemCpy_Fast(&rbType->pointer[0],&data[indexRemained],length-indexRemained); + rbType->writeIndex = length-indexRemained; + rbType->writeMirror = ~rbType->writeMirror; + + /* Update read index and mirror */ + if(length > sizeRemained){ + rbType->readIndex = rbType->writeIndex; + rbType->readMirror = ~rbType->readMirror; + } + } + + if(rbType->unlock != NULL){ + rbType->unlock(); + } + return length; +} + + +/****************************************************************************//** + * @brief Write 1 byte to ring buffer function, old data will be covered by new data when ring + * buffer is full + * + * @param rbType: Ring buffer type structure pointer + * @param data: Data to write + * + * @return Length of data writted actually + * +*******************************************************************************/ +uint32_t Ring_Buffer_Write_Byte_Force(Ring_Buffer_Type* rbType,const uint8_t data) +{ + Ring_Buffer_Status_Type status = Ring_Buffer_Get_Status(rbType); + + if(rbType->lock != NULL){ + rbType->lock(); + } + + rbType->pointer[rbType->writeIndex] = data; + + /* Judge to change index and mirror */ + if(rbType->writeIndex == rbType->size-1){ + rbType->writeIndex = 0; + rbType->writeMirror = ~rbType->writeMirror; + + /* Update read index and mirror */ + if(status == RING_BUFFER_FULL){ + rbType->readIndex = rbType->writeIndex; + rbType->readMirror = ~rbType->readMirror; + } + }else{ + rbType->writeIndex++; + + /* Update read index */ + if(status == RING_BUFFER_FULL){ + rbType->readIndex = rbType->writeIndex; + } + } + + if(rbType->unlock != NULL){ + rbType->unlock(); + } + return 1; +} + + +/****************************************************************************//** + * @brief Use callback function to read ring buffer function + * + * @param rbType: Ring buffer type structure pointer + * @param length: Length of data want to read + * @param readCb: Callback function pointer + * @param parameter: Parameter that callback function may use + * + * @return Length of data actually read + * +*******************************************************************************/ +uint32_t Ring_Buffer_Read_Callback(Ring_Buffer_Type* rbType,uint32_t length,ringBuffer_Read_Callback* readCb,void* parameter) +{ + uint32_t size = Ring_Buffer_Get_Length(rbType); + + if(readCb == NULL){ + return 0; + } + + if(rbType->lock != NULL){ + rbType->lock(); + } + + /* Ring buffer has no data */ + if(!size){ + if(rbType->unlock != NULL){ + rbType->unlock(); + } + return 0; + } + + /* Ring buffer do not have enough data */ + if(size < length){ + length = size; + } + + /* Get size of space remained in current mirror */ + size = rbType->size - rbType->readIndex; + + if(size > length){ + /* Read all data needed */ + readCb(parameter,&rbType->pointer[rbType->readIndex],length); + rbType->readIndex += length; + }else{ + /* Read two part of data in different mirror */ + readCb(parameter,&rbType->pointer[rbType->readIndex],size); + readCb(parameter,&rbType->pointer[0],length-size); + rbType->readIndex = length-size; + rbType->readMirror = ~rbType->readMirror; + } + + if(rbType->unlock != NULL){ + rbType->unlock(); + } + return length; +} + + +/****************************************************************************//** + * @brief Copy data from ring buffer to data buffer function + * + * @param parameter: Pointer to destination pointer + * @param data: Data buffer to copy + * @param length: Length of data to copy + * + * @return None + * +*******************************************************************************/ +static void Ring_Buffer_Read_Copy(void* parameter,uint8_t* data,uint32_t length) +{ + uint8_t **dest = (uint8_t **)parameter; + + ARCH_MemCpy_Fast(*dest,data,length); + *dest += length; +} + + +/****************************************************************************//** + * @brief Read ring buffer function + * + * @param rbType: Ring buffer type structure pointer + * @param data: Buffer for data read + * @param length: Length of data to read + * + * @return Length of data read actually + * +*******************************************************************************/ +uint32_t Ring_Buffer_Read(Ring_Buffer_Type* rbType,uint8_t* data,uint32_t length) +{ + return Ring_Buffer_Read_Callback(rbType,length,Ring_Buffer_Read_Copy,&data); +} + + +/****************************************************************************//** + * @brief Read 1 byte from ring buffer function + * + * @param rbType: Ring buffer type structure pointer + * @param data: Data read + * + * @return Length of data actually read + * +*******************************************************************************/ +uint32_t Ring_Buffer_Read_Byte(Ring_Buffer_Type* rbType,uint8_t* data) +{ + if(rbType->lock != NULL){ + rbType->lock(); + } + + /* Ring buffer has no data */ + if(!Ring_Buffer_Get_Length(rbType)){ + if(rbType->unlock != NULL){ + rbType->unlock(); + } + return 0; + } + + /* Read data */ + *data = rbType->pointer[rbType->readIndex]; + + /* Update read index and mirror */ + if(rbType->readIndex == rbType->size-1){ + rbType->readIndex = 0; + rbType->readMirror = ~rbType->readMirror; + }else{ + rbType->readIndex++; + } + + if(rbType->unlock != NULL){ + rbType->unlock(); + } + return 1; +} + + +/****************************************************************************//** + * @brief Read ring buffer function, do not remove from buffer actually + * + * @param rbType: Ring buffer type structure pointer + * @param data: Buffer for data read + * @param length: Length of data to read + * + * @return Length of data read actually + * +*******************************************************************************/ +uint32_t Ring_Buffer_Peek(Ring_Buffer_Type* rbType,uint8_t* data,uint32_t length) +{ + uint32_t size = Ring_Buffer_Get_Length(rbType); + + if(rbType->lock != NULL){ + rbType->lock(); + } + + /* Ring buffer has no data */ + if(!size){ + if(rbType->unlock != NULL){ + rbType->unlock(); + } + return 0; + } + + /* Ring buffer do not have enough data */ + if(size < length){ + length = size; + } + + /* Get size of space remained in current mirror */ + size = rbType->size - rbType->readIndex; + + if(size > length){ + /* Read all data needed */ + ARCH_MemCpy_Fast(data,&rbType->pointer[rbType->readIndex],length); + }else{ + /* Read two part of data in different mirror */ + ARCH_MemCpy_Fast(data,&rbType->pointer[rbType->readIndex],size); + ARCH_MemCpy_Fast(&data[size],&rbType->pointer[0],length-size); + } + + if(rbType->unlock != NULL){ + rbType->unlock(); + } + return length; +} + + +/****************************************************************************//** + * @brief Read 1 byte from ring buffer function, do not remove from buffer actually + * + * @param rbType: Ring buffer type structure pointer + * @param data: Data read + * + * @return Length of data actually read + * +*******************************************************************************/ +uint32_t Ring_Buffer_Peek_Byte(Ring_Buffer_Type* rbType,uint8_t* data) +{ + if(rbType->lock != NULL){ + rbType->lock(); + } + + /* Ring buffer has no data */ + if(!Ring_Buffer_Get_Length(rbType)){ + if(rbType->unlock != NULL){ + rbType->unlock(); + } + return 0; + } + + /* Read data */ + *data = rbType->pointer[rbType->readIndex]; + + if(rbType->unlock != NULL){ + rbType->unlock(); + } + return 1; +} + + +/****************************************************************************//** + * @brief Get length of data in ring buffer function + * + * @param rbType: Ring buffer type structure pointer + * + * @return Length of data + * +*******************************************************************************/ +uint32_t Ring_Buffer_Get_Length(Ring_Buffer_Type* rbType) +{ + uint32_t readMirror = 0; + uint32_t writeMirror = 0; + uint32_t readIndex = 0; + uint32_t writeIndex = 0; + uint32_t size = 0; + + if(rbType->lock != NULL){ + rbType->lock(); + } + + readMirror = rbType->readMirror; + writeMirror = rbType->writeMirror; + readIndex = rbType->readIndex; + writeIndex = rbType->writeIndex; + size = rbType->size; + + if(rbType->unlock != NULL){ + rbType->unlock(); + } + + if(readMirror == writeMirror){ + return writeIndex - readIndex; + }else{ + return size - (readIndex - writeIndex); + } +} + + +/****************************************************************************//** + * @brief Get space remained in ring buffer function + * + * @param rbType: Ring buffer type structure pointer + * + * @return Length of space remained + * +*******************************************************************************/ +uint32_t Ring_Buffer_Get_Empty_Length(Ring_Buffer_Type* rbType) +{ + return (rbType->size - Ring_Buffer_Get_Length(rbType)); +} + + +/****************************************************************************//** + * @brief Get ring buffer status function + * + * @param rbType: Ring buffer type structure pointer + * + * @return Status of ring buffer + * +*******************************************************************************/ +Ring_Buffer_Status_Type Ring_Buffer_Get_Status(Ring_Buffer_Type* rbType) +{ + if(rbType->lock != NULL){ + rbType->lock(); + } + + /* Judge empty or full */ + if(rbType->readIndex == rbType->writeIndex){ + if(rbType->readMirror == rbType->writeMirror){ + if(rbType->unlock != NULL){ + rbType->unlock(); + } + return RING_BUFFER_EMPTY; + }else{ + if(rbType->unlock != NULL){ + rbType->unlock(); + } + return RING_BUFFER_FULL; + } + } + if(rbType->unlock != NULL){ + rbType->unlock(); + } + return RING_BUFFER_PARTIAL; +} + + +/*@} end of group RING_BUFFER_Public_Functions */ + +/*@} end of group RING_BUFFER */ + +/*@} end of group BL_Common_Component */ diff --git a/common/ring_buffer/ring_buffer.h b/common/ring_buffer/ring_buffer.h new file mode 100644 index 00000000..ff53b8f6 --- /dev/null +++ b/common/ring_buffer/ring_buffer.h @@ -0,0 +1,115 @@ +/** + * @file ring_buffer.h + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ +#ifndef __RING_BUFFER_H__ +#define __RING_BUFFER_H__ + +#include "misc.h" + +/** @addtogroup BL_Common_Component + * @{ + */ + +/** @addtogroup RING_BUFFER + * @{ + */ + +/** @defgroup RING_BUFFER_Public_Types + * @{ + */ + +/** + * @brief Ring buffer status type definition + */ +typedef enum { + RING_BUFFER_EMPTY, /*!< Ring buffer is empty */ + RING_BUFFER_PARTIAL, /*!< Ring buffer has partial data */ + RING_BUFFER_FULL, /*!< Ring buffer is full */ +}Ring_Buffer_Status_Type; + +/** + * @brief Ring buffer structure definition + */ +typedef struct { + uint8_t* pointer; /*!< Pointer of ring buffer */ + uint8_t readMirror; /*!< Read mirror,used to judge empty or full */ + uint32_t readIndex; /*!< Index of read address */ + uint8_t writeMirror; /*!< Write mirror,used to judge empty or full */ + uint32_t writeIndex; /*!< Index of write address */ + uint32_t size; /*!< Size of ring buffer */ + void (*lock)(void); /*!< Lock ring buffer */ + void (*unlock)(void); /*!< Unlock ring buffer */ +}Ring_Buffer_Type; + +/*@} end of group RING_BUFFER_Public_Types */ + +/** @defgroup RING_BUFFER_Public_Constants + * @{ + */ + +/** @defgroup RING_BUFFER_STATUS_TYPE + * @{ + */ +#define IS_RING_BUFFER_STATUS_TYPE(type) (((type) == RING_BUFFER_EMPTY) || \ + ((type) == RING_BUFFER_PARTIAL) || \ + ((type) == RING_BUFFER_FULL)) + +/*@} end of group RING_BUFFER_Public_Constants */ + +/** @defgroup RING_BUFFER_Public_Macros + * @{ + */ +typedef void (ringBuffer_Lock_Callback)(void); +typedef void (ringBuffer_Read_Callback)(void*,uint8_t*,uint32_t); +typedef void (ringBuffer_Write_Callback)(void*,uint8_t*,uint32_t); + +/*@} end of group RING_BUFFER_Public_Macros */ + +/** @defgroup RING_BUFFER_Public_Functions + * @{ + */ +BL_Err_Type Ring_Buffer_Init(Ring_Buffer_Type* rbType,uint8_t* buffer,uint32_t size,ringBuffer_Lock_Callback* lockCb, + ringBuffer_Lock_Callback* unlockCb); +BL_Err_Type Ring_Buffer_Reset(Ring_Buffer_Type* rbType); +uint32_t Ring_Buffer_Write_Callback(Ring_Buffer_Type* rbType,uint32_t length,ringBuffer_Write_Callback* writeCb, + void* parameter); +uint32_t Ring_Buffer_Write(Ring_Buffer_Type* rbType,const uint8_t* data,uint32_t length); +uint32_t Ring_Buffer_Write_Byte(Ring_Buffer_Type* rbType,const uint8_t data); +uint32_t Ring_Buffer_Write_Force(Ring_Buffer_Type* rbType,const uint8_t* data,uint32_t length); +uint32_t Ring_Buffer_Write_Byte_Force(Ring_Buffer_Type* rbType,const uint8_t data); +uint32_t Ring_Buffer_Read_Callback(Ring_Buffer_Type* rbType,uint32_t length,ringBuffer_Read_Callback* readCb, + void* parameter); +uint32_t Ring_Buffer_Read(Ring_Buffer_Type* rbType,uint8_t* data,uint32_t length); +uint32_t Ring_Buffer_Read_Byte(Ring_Buffer_Type* rbType,uint8_t* data); +uint32_t Ring_Buffer_Peek(Ring_Buffer_Type* rbType,uint8_t* data,uint32_t length); +uint32_t Ring_Buffer_Peek_Byte(Ring_Buffer_Type* rbType,uint8_t* data); +uint32_t Ring_Buffer_Get_Length(Ring_Buffer_Type* rbType); +uint32_t Ring_Buffer_Get_Empty_Length(Ring_Buffer_Type* rbType); +Ring_Buffer_Status_Type Ring_Buffer_Get_Status(Ring_Buffer_Type* rbType); + +/*@} end of group RING_BUFFER_Public_Functions */ + +/*@} end of group RING_BUFFER */ + +/*@} end of group BL_Common_Component */ + +#endif /* __RING_BUFFER_H__ */ diff --git a/common/soft_crc/softcrc.c b/common/soft_crc/softcrc.c new file mode 100644 index 00000000..a5970b8d --- /dev/null +++ b/common/soft_crc/softcrc.c @@ -0,0 +1,189 @@ +/** + * @file softcrc.c + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ +#include "softcrc.h" +#include "misc.h" +// ---------------- POPULAR POLYNOMIALS ---------------- +// CCITT: x^16 + x^12 + x^5 + x^0 (0x1021,init 0x0000) +// CRC-16: x^16 + x^15 + x^2 + x^0 (0x8005,init 0xFFFF) +// we use 0x8005 here and + +const uint8_t chCRCHTalbe[] = +{ +0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, +0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, +0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, +0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, +0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, +0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, +0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, +0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, +0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, +0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, +0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, +0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, +0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, +0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, +0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, +0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, +0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, +0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x00, 0xC1, 0x81, 0x40, +0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, +0x00, 0xC1, 0x81, 0x40, 0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, +0x00, 0xC1, 0x81, 0x40, 0x01, 0xC0, 0x80, 0x41, 0x01, 0xC0, 0x80, 0x41, +0x00, 0xC1, 0x81, 0x40 +}; + +const uint8_t chCRCLTalbe[] = +{ +0x00, 0xC0, 0xC1, 0x01, 0xC3, 0x03, 0x02, 0xC2, 0xC6, 0x06, 0x07, 0xC7, +0x05, 0xC5, 0xC4, 0x04, 0xCC, 0x0C, 0x0D, 0xCD, 0x0F, 0xCF, 0xCE, 0x0E, +0x0A, 0xCA, 0xCB, 0x0B, 0xC9, 0x09, 0x08, 0xC8, 0xD8, 0x18, 0x19, 0xD9, +0x1B, 0xDB, 0xDA, 0x1A, 0x1E, 0xDE, 0xDF, 0x1F, 0xDD, 0x1D, 0x1C, 0xDC, +0x14, 0xD4, 0xD5, 0x15, 0xD7, 0x17, 0x16, 0xD6, 0xD2, 0x12, 0x13, 0xD3, +0x11, 0xD1, 0xD0, 0x10, 0xF0, 0x30, 0x31, 0xF1, 0x33, 0xF3, 0xF2, 0x32, +0x36, 0xF6, 0xF7, 0x37, 0xF5, 0x35, 0x34, 0xF4, 0x3C, 0xFC, 0xFD, 0x3D, +0xFF, 0x3F, 0x3E, 0xFE, 0xFA, 0x3A, 0x3B, 0xFB, 0x39, 0xF9, 0xF8, 0x38, +0x28, 0xE8, 0xE9, 0x29, 0xEB, 0x2B, 0x2A, 0xEA, 0xEE, 0x2E, 0x2F, 0xEF, +0x2D, 0xED, 0xEC, 0x2C, 0xE4, 0x24, 0x25, 0xE5, 0x27, 0xE7, 0xE6, 0x26, +0x22, 0xE2, 0xE3, 0x23, 0xE1, 0x21, 0x20, 0xE0, 0xA0, 0x60, 0x61, 0xA1, +0x63, 0xA3, 0xA2, 0x62, 0x66, 0xA6, 0xA7, 0x67, 0xA5, 0x65, 0x64, 0xA4, +0x6C, 0xAC, 0xAD, 0x6D, 0xAF, 0x6F, 0x6E, 0xAE, 0xAA, 0x6A, 0x6B, 0xAB, +0x69, 0xA9, 0xA8, 0x68, 0x78, 0xB8, 0xB9, 0x79, 0xBB, 0x7B, 0x7A, 0xBA, +0xBE, 0x7E, 0x7F, 0xBF, 0x7D, 0xBD, 0xBC, 0x7C, 0xB4, 0x74, 0x75, 0xB5, +0x77, 0xB7, 0xB6, 0x76, 0x72, 0xB2, 0xB3, 0x73, 0xB1, 0x71, 0x70, 0xB0, +0x50, 0x90, 0x91, 0x51, 0x93, 0x53, 0x52, 0x92, 0x96, 0x56, 0x57, 0x97, +0x55, 0x95, 0x94, 0x54, 0x9C, 0x5C, 0x5D, 0x9D, 0x5F, 0x9F, 0x9E, 0x5E, +0x5A, 0x9A, 0x9B, 0x5B, 0x99, 0x59, 0x58, 0x98, 0x88, 0x48, 0x49, 0x89, +0x4B, 0x8B, 0x8A, 0x4A, 0x4E, 0x8E, 0x8F, 0x4F, 0x8D, 0x4D, 0x4C, 0x8C, +0x44, 0x84, 0x85, 0x45, 0x87, 0x47, 0x46, 0x86, 0x82, 0x42, 0x43, 0x83, +0x41, 0x81, 0x80, 0x40 +}; + +uint16_t BFLB_Soft_CRC16(void * dataIn, uint32_t len) +{ + uint8_t chCRCHi = 0xFF; + uint8_t chCRCLo = 0xFF; + uint16_t wIndex; + uint8_t* data=(uint8_t *) dataIn; + + while (len--){ + wIndex = chCRCLo ^ *data++ ; + chCRCLo = chCRCHi ^ chCRCHTalbe[wIndex]; + chCRCHi = chCRCLTalbe[wIndex] ; + } + + return ((chCRCHi << 8) | chCRCLo) ; +} + +/* +x^32+x^26+x^23+x^22+x^16+x^12+x^11+x^10+x^8+x^7+x^5+x^4+x^2+x+1 +*/ +const uint32_t crc32Tab[256] = { + 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f, + 0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, + 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, 0x1db71064, 0x6ab020f2, + 0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, + 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, + 0xfa0f3d63, 0x8d080df5, 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, + 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, 0x35b5a8fa, 0x42b2986c, + 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59, + 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, + 0xcfba9599, 0xb8bda50f, 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, + 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, 0x76dc4190, 0x01db7106, + 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433, + 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, + 0x91646c97, 0xe6635c01, 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, + 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, 0x65b0d9c6, 0x12b7e950, + 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65, + 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7, + 0xa4d1c46d, 0xd3d6f4fb, 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, + 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, 0x5005713c, 0x270241aa, + 0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, + 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81, + 0xb7bd5c3b, 0xc0ba6cad, 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, + 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, 0xe3630b12, 0x94643b84, + 0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, + 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, + 0x196c3671, 0x6e6b06e7, 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, + 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, 0xd6d6a3e8, 0xa1d1937e, + 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b, + 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, + 0x316e8eef, 0x4669be79, 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, + 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, 0xc5ba3bbe, 0xb2bd0b28, + 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d, + 0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f, + 0x72076785, 0x05005713, 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, + 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, 0x86d3d2d4, 0xf1d4e242, + 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777, + 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69, + 0x616bffd3, 0x166ccf45, 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, + 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, 0xaed16a4a, 0xd9d65adc, + 0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, + 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693, + 0x54de5729, 0x23d967bf, 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, + 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d +}; + +uint32_t BFLB_Soft_CRC32_Table( void *dataIn, uint32_t len) +{ + uint32_t crc=0; + uint8_t *data=(uint8_t *)dataIn; + + crc = crc ^ 0xffffffff; + + while (len--) + crc = crc32Tab[(crc ^ *data++) & 0xFF] ^ (crc >> 8); + + return crc ^ 0xffffffff; +} +#ifndef BFLB_USE_ROM_DRIVER +/****************************************************************************** +* Name: CRC-32 x32+x26+x23+x22+x16+x12+x11+x10+x8+x7+x5+x4+x2+x+1 +* Poly: 0x4C11DB7 +* Init: 0xFFFFFFF +* Refin: True +* Refout: True +* Xorout: 0xFFFFFFF +* Alias: CRC_32/ADCCP +* Use: WinRAR,ect. +*****************************************************************************/ +__WEAK__ +uint32_t ATTR_TCM_SECTION BFLB_Soft_CRC32(void *dataIn, uint32_t len) +{ + uint8_t i; + uint32_t crc = 0xffffffff; // Initial value + uint8_t *data=(uint8_t *)dataIn; + + while(len--){ + crc ^= *data++; // crc ^= *data; data++; + for (i = 0; i < 8; ++i){ + if (crc & 1){ + crc = (crc >> 1) ^ 0xEDB88320;// 0xEDB88320= reverse 0x04C11DB7 + }else{ + crc = (crc >> 1); + } + } + } + return ~crc; +} +#endif diff --git a/common/soft_crc/softcrc.h b/common/soft_crc/softcrc.h new file mode 100644 index 00000000..5d12d164 --- /dev/null +++ b/common/soft_crc/softcrc.h @@ -0,0 +1,31 @@ +/** + * @file softcrc.h + * @brief + * + * Copyright (c) 2021 Bouffalolab team + * + * Licensed to the Apache Software Foundation (ASF) under one or more + * contributor license agreements. See the NOTICE file distributed with + * this work for additional information regarding copyright ownership. The + * ASF licenses this file to you under the Apache License, Version 2.0 (the + * "License"); you may not use this file except in compliance with the + * License. You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the + * License for the specific language governing permissions and limitations + * under the License. + * + */ +#ifndef __SOFTCRC_H__ +#define __SOFTCRC_H__ + +#include "stdint.h" + +uint16_t BFLB_Soft_CRC16 (void *dataIn, uint32_t len); +uint32_t BFLB_Soft_CRC32 (void *dataIn, uint32_t len); + +#endif diff --git a/components/fatfs/CMakeLists.txt b/components/fatfs/CMakeLists.txt new file mode 100644 index 00000000..38a1a11a --- /dev/null +++ b/components/fatfs/CMakeLists.txt @@ -0,0 +1,52 @@ +################# Add global include ################# +list(APPEND ADD_INCLUDE +"${CMAKE_CURRENT_SOURCE_DIR}" +) +####################################################### + +################# Add private include ################# +# list(APPEND ADD_PRIVATE_INCLUDE +# "${CMAKE_SOURCE_DIR}/BSP_Common/ring_buffer" +# "${CMAKE_SOURCE_DIR}/BSP_Driver/BSP_${BOARD}_Driver/StdDriver/Inc" +# "${CMAKE_SOURCE_DIR}/BSP_Driver/BSP_${BOARD}_Driver/StdDriver/Inc" +# "${CMAKE_SOURCE_DIR}/BSP_Driver/BSP_${BOARD}_Driver/Peripherals" +# "${CMAKE_SOURCE_DIR}/BSP_Driver/BSP_${BOARD}_Driver/RISCV/Device/Bouffalo/${BOARD}/Startup" +# "${CMAKE_SOURCE_DIR}/BSP_Driver/BSP_${BOARD}_Driver/RISCV/Core/Include" +# ) +####################################################### + +############## Add current dir source files ########### +file(GLOB_RECURSE sources "${CMAKE_CURRENT_SOURCE_DIR}/*.c") +list(APPEND ADD_SRCS ${sources}) +# aux_source_directory(src ADD_SRCS) +# list(REMOVE_ITEM ADD_SRCS "${CMAKE_CURRENT_SOURCE_DIR}") +####################################################### + +########### Add required/dependent components ######### +#list(APPEND ADD_REQUIREMENTS BSP_${BOARD}_Driver BSP_Common) +####################################################### + +############ Add static libs ########################## +# if(CONFIG_COMPONENT1_INCLUDE_STATIC_LIB) +# list(APPEND ADD_STATIC_LIB "lib/libtest.a") +# endif() +####################################################### + +############ Add dynamic libs ######################### +# list(APPEND ADD_DYNAMIC_LIB "lib/arch/v831/libmaix_nn.so" +# "lib/arch/v831/libmaix_cam.so" +# ) +####################################################### + +############ Add global compile option ################ +#add components denpend on this component +# list(APPEND ADD_DEFINITIONS -DAAAAA222=1 +# -DAAAAA333=1) +####################################################### + +############ Add private compile option ################ +#add compile option for this component that won't affect other modules +# list(APPEND ADD_DEFINITIONS_PRIVATE -DAAAAA=1) +####################################################### + +generate_library() diff --git a/components/fatfs/diskio.c b/components/fatfs/diskio.c new file mode 100644 index 00000000..618ea969 --- /dev/null +++ b/components/fatfs/diskio.c @@ -0,0 +1,293 @@ +/*-----------------------------------------------------------------------*/ +/* Low level disk I/O module skeleton for FatFs (C)ChaN, 2019 */ +/*-----------------------------------------------------------------------*/ +/* If a working storage control module is available, it should be */ +/* attached to the FatFs via a glue function rather than modifying it. */ +/* This is an example of glue functions to attach various exsisting */ +/* storage control modules to the FatFs module with a defined API. */ +/*-----------------------------------------------------------------------*/ + +#include "ff.h" /* Obtains integer types */ +#include "diskio.h" /* Declarations of disk functions */ +#include "stddef.h" + +/* Definitions of physical drive number for each drive */ +#define DEV_RAM 0 /* Example: Map Ramdisk to physical drive 0 */ +#define DEV_MMC 1 /* Example: Map MMC/SD card to physical drive 1 */ +#define DEV_USB 2 /* Example: Map USB MSD to physical drive 2 */ + + +FATFS_DiskioDriverTypeDef pDiskioDriver = { + .RAM_disk_status = NULL, + .MMC_disk_status = NULL, + .USB_disk_status = NULL, + .RAM_disk_initialize = NULL, + .MMC_disk_initialize = NULL, + .USB_disk_initialize = NULL, + .RAM_disk_read = NULL, + .MMC_disk_read = NULL, + .USB_disk_read = NULL, + .RAM_disk_write = NULL, + .MMC_disk_write = NULL, + .USB_disk_write = NULL, + .RAM_disk_ioctl = NULL, + .MMC_disk_ioctl = NULL, + .USB_disk_ioctl = NULL, + .Translate_Result_Code = NULL, +}; + + +/*-----------------------------------------------------------------------*/ +/* init driver callback */ +/*-----------------------------------------------------------------------*/ +void disk_driver_callback_init(FATFS_DiskioDriverTypeDef *pNewDriver) +{ + pDiskioDriver.RAM_disk_status = pNewDriver->RAM_disk_status ; + pDiskioDriver.MMC_disk_status = pNewDriver->MMC_disk_status ; + pDiskioDriver.USB_disk_status = pNewDriver->USB_disk_status ; + pDiskioDriver.RAM_disk_initialize = pNewDriver->RAM_disk_initialize ; + pDiskioDriver.MMC_disk_initialize = pNewDriver->MMC_disk_initialize ; + pDiskioDriver.USB_disk_initialize = pNewDriver->USB_disk_initialize ; + pDiskioDriver.RAM_disk_read = pNewDriver->RAM_disk_read ; + pDiskioDriver.MMC_disk_read = pNewDriver->MMC_disk_read ; + pDiskioDriver.USB_disk_read = pNewDriver->USB_disk_read ; + pDiskioDriver.RAM_disk_write = pNewDriver->RAM_disk_write ; + pDiskioDriver.MMC_disk_write = pNewDriver->MMC_disk_write ; + pDiskioDriver.USB_disk_write = pNewDriver->USB_disk_write ; + pDiskioDriver.RAM_disk_ioctl = pNewDriver->RAM_disk_ioctl ; + pDiskioDriver.MMC_disk_ioctl = pNewDriver->MMC_disk_ioctl ; + pDiskioDriver.USB_disk_ioctl = pNewDriver->USB_disk_ioctl ; + pDiskioDriver.Translate_Result_Code = pNewDriver->Translate_Result_Code ; +} + + + +/*-----------------------------------------------------------------------*/ +/* Get Drive Status */ +/*-----------------------------------------------------------------------*/ + +DSTATUS disk_status ( + BYTE pdrv /* Physical drive nmuber to identify the drive */ +) +{ + DSTATUS stat = STA_NOINIT; + int result = 0; + + switch (pdrv) { + case DEV_RAM : + if(pDiskioDriver.RAM_disk_status){ + result = pDiskioDriver.RAM_disk_status(); + } + break; + + case DEV_MMC : + if(pDiskioDriver.MMC_disk_status){ + result = pDiskioDriver.MMC_disk_status(); + } + break; + + case DEV_USB : + if(pDiskioDriver.USB_disk_status){ + result = pDiskioDriver.USB_disk_status(); + } + break; + + default : + return STA_NOINIT; + } + + /* translate the reslut code here */ + if(pDiskioDriver.Translate_Result_Code){ + stat = pDiskioDriver.Translate_Result_Code(result); + } + + return stat; +} + + + +/*-----------------------------------------------------------------------*/ +/* Inidialize a Drive */ +/*-----------------------------------------------------------------------*/ + +DSTATUS disk_initialize ( + BYTE pdrv /* Physical drive nmuber to identify the drive */ +) +{ + DSTATUS stat = STA_NOINIT; + int result = 0; + + switch (pdrv) { + case DEV_RAM : + if(pDiskioDriver.RAM_disk_initialize){ + result = pDiskioDriver.RAM_disk_initialize(); + } + break; + + case DEV_MMC : + if(pDiskioDriver.MMC_disk_initialize){ + result = pDiskioDriver.MMC_disk_initialize(); + } + break; + + case DEV_USB : + if(pDiskioDriver.USB_disk_initialize){ + result = pDiskioDriver.USB_disk_initialize(); + } + break; + + default : + return STA_NOINIT; + } + + /* translate the reslut code here */ + if(pDiskioDriver.Translate_Result_Code){ + stat = pDiskioDriver.Translate_Result_Code(result); + } + + return stat; +} + + + +/*-----------------------------------------------------------------------*/ +/* Read Sector(s) */ +/*-----------------------------------------------------------------------*/ + +DRESULT disk_read ( + BYTE pdrv, /* Physical drive nmuber to identify the drive */ + BYTE *buff, /* Data buffer to store read data */ + LBA_t sector, /* Start sector in LBA */ + UINT count /* Number of sectors to read */ +) +{ + DSTATUS stat = STA_NOINIT; + int result = 0; + + switch (pdrv) { + case DEV_RAM : + if(pDiskioDriver.RAM_disk_read){ + result = pDiskioDriver.RAM_disk_read(buff, sector, count); + } + break; + + case DEV_MMC : + if(pDiskioDriver.MMC_disk_read){ + result = pDiskioDriver.MMC_disk_read(buff, sector, count); + } + break; + + case DEV_USB : + if(pDiskioDriver.USB_disk_read){ + result = pDiskioDriver.USB_disk_read(buff, sector, count); + } + break; + + default : + return RES_PARERR; + } + + /* translate the reslut code here */ + if(pDiskioDriver.Translate_Result_Code){ + stat = pDiskioDriver.Translate_Result_Code(result); + } + + return stat; +} + + + +/*-----------------------------------------------------------------------*/ +/* Write Sector(s) */ +/*-----------------------------------------------------------------------*/ + +#if FF_FS_READONLY == 0 + +DRESULT disk_write ( + BYTE pdrv, /* Physical drive nmuber to identify the drive */ + const BYTE *buff, /* Data to be written */ + LBA_t sector, /* Start sector in LBA */ + UINT count /* Number of sectors to write */ +) +{ + DSTATUS stat = STA_NOINIT; + int result = 0; + + switch (pdrv) { + case DEV_RAM : + if(pDiskioDriver.RAM_disk_write){ + result = pDiskioDriver.RAM_disk_write(buff, sector, count); + } + break; + + case DEV_MMC : + if(pDiskioDriver.MMC_disk_write){ + result = pDiskioDriver.MMC_disk_write(buff, sector, count); + } + break; + + case DEV_USB : + if(pDiskioDriver.USB_disk_write){ + result = pDiskioDriver.USB_disk_write(buff, sector, count); + } + break; + + default : + return RES_PARERR; + } + + /* translate the reslut code here */ + if(pDiskioDriver.Translate_Result_Code){ + stat = pDiskioDriver.Translate_Result_Code(result); + } + + return stat; +} + +#endif + + +/*-----------------------------------------------------------------------*/ +/* Miscellaneous Functions */ +/*-----------------------------------------------------------------------*/ + +DRESULT disk_ioctl ( + BYTE pdrv, /* Physical drive nmuber (0..) */ + BYTE cmd, /* Control code */ + void *buff /* Buffer to send/receive control data */ +) +{ + DSTATUS stat = STA_NOINIT; + int result = 0; + + switch (pdrv) { + case DEV_RAM : + if(pDiskioDriver.RAM_disk_ioctl){ + result = pDiskioDriver.RAM_disk_ioctl(cmd, buff); + } + break; + + case DEV_MMC : + if(pDiskioDriver.MMC_disk_ioctl){ + result = pDiskioDriver.MMC_disk_ioctl(cmd, buff); + } + break; + + case DEV_USB : + if(pDiskioDriver.USB_disk_ioctl){ + result = pDiskioDriver.USB_disk_ioctl(cmd, buff); + } + break; + + default : + return RES_PARERR; + } + + /* translate the reslut code here */ + if(pDiskioDriver.Translate_Result_Code){ + stat = pDiskioDriver.Translate_Result_Code(result); + } + + return stat; +} + diff --git a/components/fatfs/diskio.h b/components/fatfs/diskio.h new file mode 100644 index 00000000..e4fff87f --- /dev/null +++ b/components/fatfs/diskio.h @@ -0,0 +1,118 @@ +/*-----------------------------------------------------------------------/ +/ Low level disk interface modlue include file (C)ChaN, 2019 / +/-----------------------------------------------------------------------*/ + +#ifndef _DISKIO_DEFINED +#define _DISKIO_DEFINED + +#ifdef __cplusplus +extern "C" { +#endif + +#include "ffconf.h" +#include "ff.h" + +/* Status of Disk Functions */ +typedef BYTE DSTATUS; + +/* Results of Disk Functions */ +typedef enum { + RES_OK = 0, /* 0: Successful */ + RES_ERROR, /* 1: R/W Error */ + RES_WRPRT, /* 2: Write Protected */ + RES_NOTRDY, /* 3: Not Ready */ + RES_PARERR /* 4: Invalid Parameter */ +} DRESULT; + + +/******************user code****************************/ +typedef struct +{ + /* get status */ + int (*RAM_disk_status)(void); + int (*MMC_disk_status)(void); + int (*USB_disk_status)(void); + + /* init */ + int (*RAM_disk_initialize)(void); + int (*MMC_disk_initialize)(void); + int (*USB_disk_initialize)(void); + + /* read */ + int (*RAM_disk_read)(BYTE *buff, LBA_t sector, UINT count); + int (*MMC_disk_read)(BYTE *buff, LBA_t sector, UINT count); + int (*USB_disk_read)(BYTE *buff, LBA_t sector, UINT count); + + /* write */ + int (*RAM_disk_write)(const BYTE *buff, LBA_t sector, UINT count); + int (*MMC_disk_write)(const BYTE *buff, LBA_t sector, UINT count); + int (*USB_disk_write)(const BYTE *buff, LBA_t sector, UINT count); + + /* ioctl */ + int (*RAM_disk_ioctl)(BYTE cmd, void *buff); + int (*MMC_disk_ioctl)(BYTE cmd, void *buff); + int (*USB_disk_ioctl)(BYTE cmd, void *buff); + + /* translate reslut code */ + DSTATUS (*Translate_Result_Code)(int result); +}FATFS_DiskioDriverTypeDef; + +extern FATFS_DiskioDriverTypeDef pDiskioDriver; + +void disk_driver_callback_init(FATFS_DiskioDriverTypeDef *pNewDriver); +/******************user code****************************/ + + +/*---------------------------------------*/ +/* Prototypes for disk control functions */ + + +DSTATUS disk_initialize (BYTE pdrv); +DSTATUS disk_status (BYTE pdrv); +DRESULT disk_read (BYTE pdrv, BYTE* buff, LBA_t sector, UINT count); +DRESULT disk_write (BYTE pdrv, const BYTE* buff, LBA_t sector, UINT count); +DRESULT disk_ioctl (BYTE pdrv, BYTE cmd, void* buff); + + +/* Disk Status Bits (DSTATUS) */ + +#define STA_NOINIT 0x01 /* Drive not initialized */ +#define STA_NODISK 0x02 /* No medium in the drive */ +#define STA_PROTECT 0x04 /* Write protected */ + + +/* Command code for disk_ioctrl fucntion */ + +/* Generic command (Used by FatFs) */ +#define CTRL_SYNC 0 /* Complete pending write process (needed at FF_FS_READONLY == 0) */ +#define GET_SECTOR_COUNT 1 /* Get media size (needed at FF_USE_MKFS == 1) */ +#define GET_SECTOR_SIZE 2 /* Get sector size (needed at FF_MAX_SS != FF_MIN_SS) */ +#define GET_BLOCK_SIZE 3 /* Get erase block size (needed at FF_USE_MKFS == 1) */ +#define CTRL_TRIM 4 /* Inform device that the data on the block of sectors is no longer used (needed at FF_USE_TRIM == 1) */ + +/* Generic command (Not used by FatFs) */ +#define CTRL_POWER 5 /* Get/Set power status */ +#define CTRL_LOCK 6 /* Lock/Unlock media removal */ +#define CTRL_EJECT 7 /* Eject media */ +#define CTRL_FORMAT 8 /* Create physical format on the media */ + +/* MMC/SDC specific ioctl command */ +#define MMC_GET_TYPE 10 /* Get card type */ +#define MMC_GET_CSD 11 /* Get CSD */ +#define MMC_GET_CID 12 /* Get CID */ +#define MMC_GET_OCR 13 /* Get OCR */ +#define MMC_GET_SDSTAT 14 /* Get SD status */ +#define ISDIO_READ 55 /* Read data form SD iSDIO register */ +#define ISDIO_WRITE 56 /* Write data to SD iSDIO register */ +#define ISDIO_MRITE 57 /* Masked write data to SD iSDIO register */ + +/* ATA/CF specific ioctl command */ +#define ATA_GET_REV 20 /* Get F/W revision */ +#define ATA_GET_MODEL 21 /* Get model name */ +#define ATA_GET_SN 22 /* Get serial number */ + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/components/fatfs/ff.c b/components/fatfs/ff.c new file mode 100644 index 00000000..02299f77 --- /dev/null +++ b/components/fatfs/ff.c @@ -0,0 +1,6852 @@ +/*----------------------------------------------------------------------------/ +/ FatFs - Generic FAT Filesystem Module R0.14 / +/-----------------------------------------------------------------------------/ +/ +/ Copyright (C) 2019, ChaN, all right reserved. +/ +/ FatFs module is an open source software. Redistribution and use of FatFs in +/ source and binary forms, with or without modification, are permitted provided +/ that the following condition is met: +/ +/ 1. Redistributions of source code must retain the above copyright notice, +/ this condition and the following disclaimer. +/ +/ This software is provided by the copyright holder and contributors "AS IS" +/ and any warranties related to this software are DISCLAIMED. +/ The copyright owner or contributors be NOT LIABLE for any damages caused +/ by use of this software. +/ +/----------------------------------------------------------------------------*/ + + +#include "ff.h" /* Declarations of FatFs API */ +#include "diskio.h" /* Declarations of device I/O functions */ + + +/*-------------------------------------------------------------------------- + + Module Private Definitions + +---------------------------------------------------------------------------*/ + +#if FF_DEFINED != 86606 /* Revision ID */ +#error Wrong include file (ff.h). +#endif + + +/* Limits and boundaries */ +#define MAX_DIR 0x200000 /* Max size of FAT directory */ +#define MAX_DIR_EX 0x10000000 /* Max size of exFAT directory */ +#define MAX_FAT12 0xFF5 /* Max FAT12 clusters (differs from specs, but right for real DOS/Windows behavior) */ +#define MAX_FAT16 0xFFF5 /* Max FAT16 clusters (differs from specs, but right for real DOS/Windows behavior) */ +#define MAX_FAT32 0x0FFFFFF5 /* Max FAT32 clusters (not specified, practical limit) */ +#define MAX_EXFAT 0x7FFFFFFD /* Max exFAT clusters (differs from specs, implementation limit) */ + + +/* Character code support macros */ +#define IsUpper(c) ((c) >= 'A' && (c) <= 'Z') +#define IsLower(c) ((c) >= 'a' && (c) <= 'z') +#define IsDigit(c) ((c) >= '0' && (c) <= '9') +#define IsSurrogate(c) ((c) >= 0xD800 && (c) <= 0xDFFF) +#define IsSurrogateH(c) ((c) >= 0xD800 && (c) <= 0xDBFF) +#define IsSurrogateL(c) ((c) >= 0xDC00 && (c) <= 0xDFFF) + + +/* Additional file access control and file status flags for internal use */ +#define FA_SEEKEND 0x20 /* Seek to end of the file on file open */ +#define FA_MODIFIED 0x40 /* File has been modified */ +#define FA_DIRTY 0x80 /* FIL.buf[] needs to be written-back */ + + +/* Additional file attribute bits for internal use */ +#define AM_VOL 0x08 /* Volume label */ +#define AM_LFN 0x0F /* LFN entry */ +#define AM_MASK 0x3F /* Mask of defined bits */ + + +/* Name status flags in fn[11] */ +#define NSFLAG 11 /* Index of the name status byte */ +#define NS_LOSS 0x01 /* Out of 8.3 format */ +#define NS_LFN 0x02 /* Force to create LFN entry */ +#define NS_LAST 0x04 /* Last segment */ +#define NS_BODY 0x08 /* Lower case flag (body) */ +#define NS_EXT 0x10 /* Lower case flag (ext) */ +#define NS_DOT 0x20 /* Dot entry */ +#define NS_NOLFN 0x40 /* Do not find LFN */ +#define NS_NONAME 0x80 /* Not followed */ + + +/* exFAT directory entry types */ +#define ET_BITMAP 0x81 /* Allocation bitmap */ +#define ET_UPCASE 0x82 /* Up-case table */ +#define ET_VLABEL 0x83 /* Volume label */ +#define ET_FILEDIR 0x85 /* File and directory */ +#define ET_STREAM 0xC0 /* Stream extension */ +#define ET_FILENAME 0xC1 /* Name extension */ + + +/* FatFs refers the FAT structure as simple byte array instead of structure member +/ because the C structure is not binary compatible between different platforms */ + +#define BS_JmpBoot 0 /* x86 jump instruction (3-byte) */ +#define BS_OEMName 3 /* OEM name (8-byte) */ +#define BPB_BytsPerSec 11 /* Sector size [byte] (WORD) */ +#define BPB_SecPerClus 13 /* Cluster size [sector] (BYTE) */ +#define BPB_RsvdSecCnt 14 /* Size of reserved area [sector] (WORD) */ +#define BPB_NumFATs 16 /* Number of FATs (BYTE) */ +#define BPB_RootEntCnt 17 /* Size of root directory area for FAT [entry] (WORD) */ +#define BPB_TotSec16 19 /* Volume size (16-bit) [sector] (WORD) */ +#define BPB_Media 21 /* Media descriptor byte (BYTE) */ +#define BPB_FATSz16 22 /* FAT size (16-bit) [sector] (WORD) */ +#define BPB_SecPerTrk 24 /* Number of sectors per track for int13h [sector] (WORD) */ +#define BPB_NumHeads 26 /* Number of heads for int13h (WORD) */ +#define BPB_HiddSec 28 /* Volume offset from top of the drive (DWORD) */ +#define BPB_TotSec32 32 /* Volume size (32-bit) [sector] (DWORD) */ +#define BS_DrvNum 36 /* Physical drive number for int13h (BYTE) */ +#define BS_NTres 37 /* WindowsNT error flag (BYTE) */ +#define BS_BootSig 38 /* Extended boot signature (BYTE) */ +#define BS_VolID 39 /* Volume serial number (DWORD) */ +#define BS_VolLab 43 /* Volume label string (8-byte) */ +#define BS_FilSysType 54 /* Filesystem type string (8-byte) */ +#define BS_BootCode 62 /* Boot code (448-byte) */ +#define BS_55AA 510 /* Signature word (WORD) */ + +#define BPB_FATSz32 36 /* FAT32: FAT size [sector] (DWORD) */ +#define BPB_ExtFlags32 40 /* FAT32: Extended flags (WORD) */ +#define BPB_FSVer32 42 /* FAT32: Filesystem version (WORD) */ +#define BPB_RootClus32 44 /* FAT32: Root directory cluster (DWORD) */ +#define BPB_FSInfo32 48 /* FAT32: Offset of FSINFO sector (WORD) */ +#define BPB_BkBootSec32 50 /* FAT32: Offset of backup boot sector (WORD) */ +#define BS_DrvNum32 64 /* FAT32: Physical drive number for int13h (BYTE) */ +#define BS_NTres32 65 /* FAT32: Error flag (BYTE) */ +#define BS_BootSig32 66 /* FAT32: Extended boot signature (BYTE) */ +#define BS_VolID32 67 /* FAT32: Volume serial number (DWORD) */ +#define BS_VolLab32 71 /* FAT32: Volume label string (8-byte) */ +#define BS_FilSysType32 82 /* FAT32: Filesystem type string (8-byte) */ +#define BS_BootCode32 90 /* FAT32: Boot code (420-byte) */ + +#define BPB_ZeroedEx 11 /* exFAT: MBZ field (53-byte) */ +#define BPB_VolOfsEx 64 /* exFAT: Volume offset from top of the drive [sector] (QWORD) */ +#define BPB_TotSecEx 72 /* exFAT: Volume size [sector] (QWORD) */ +#define BPB_FatOfsEx 80 /* exFAT: FAT offset from top of the volume [sector] (DWORD) */ +#define BPB_FatSzEx 84 /* exFAT: FAT size [sector] (DWORD) */ +#define BPB_DataOfsEx 88 /* exFAT: Data offset from top of the volume [sector] (DWORD) */ +#define BPB_NumClusEx 92 /* exFAT: Number of clusters (DWORD) */ +#define BPB_RootClusEx 96 /* exFAT: Root directory start cluster (DWORD) */ +#define BPB_VolIDEx 100 /* exFAT: Volume serial number (DWORD) */ +#define BPB_FSVerEx 104 /* exFAT: Filesystem version (WORD) */ +#define BPB_VolFlagEx 106 /* exFAT: Volume flags (WORD) */ +#define BPB_BytsPerSecEx 108 /* exFAT: Log2 of sector size in unit of byte (BYTE) */ +#define BPB_SecPerClusEx 109 /* exFAT: Log2 of cluster size in unit of sector (BYTE) */ +#define BPB_NumFATsEx 110 /* exFAT: Number of FATs (BYTE) */ +#define BPB_DrvNumEx 111 /* exFAT: Physical drive number for int13h (BYTE) */ +#define BPB_PercInUseEx 112 /* exFAT: Percent in use (BYTE) */ +#define BPB_RsvdEx 113 /* exFAT: Reserved (7-byte) */ +#define BS_BootCodeEx 120 /* exFAT: Boot code (390-byte) */ + +#define DIR_Name 0 /* Short file name (11-byte) */ +#define DIR_Attr 11 /* Attribute (BYTE) */ +#define DIR_NTres 12 /* Lower case flag (BYTE) */ +#define DIR_CrtTime10 13 /* Created time sub-second (BYTE) */ +#define DIR_CrtTime 14 /* Created time (DWORD) */ +#define DIR_LstAccDate 18 /* Last accessed date (WORD) */ +#define DIR_FstClusHI 20 /* Higher 16-bit of first cluster (WORD) */ +#define DIR_ModTime 22 /* Modified time (DWORD) */ +#define DIR_FstClusLO 26 /* Lower 16-bit of first cluster (WORD) */ +#define DIR_FileSize 28 /* File size (DWORD) */ +#define LDIR_Ord 0 /* LFN: LFN order and LLE flag (BYTE) */ +#define LDIR_Attr 11 /* LFN: LFN attribute (BYTE) */ +#define LDIR_Type 12 /* LFN: Entry type (BYTE) */ +#define LDIR_Chksum 13 /* LFN: Checksum of the SFN (BYTE) */ +#define LDIR_FstClusLO 26 /* LFN: MBZ field (WORD) */ +#define XDIR_Type 0 /* exFAT: Type of exFAT directory entry (BYTE) */ +#define XDIR_NumLabel 1 /* exFAT: Number of volume label characters (BYTE) */ +#define XDIR_Label 2 /* exFAT: Volume label (11-WORD) */ +#define XDIR_CaseSum 4 /* exFAT: Sum of case conversion table (DWORD) */ +#define XDIR_NumSec 1 /* exFAT: Number of secondary entries (BYTE) */ +#define XDIR_SetSum 2 /* exFAT: Sum of the set of directory entries (WORD) */ +#define XDIR_Attr 4 /* exFAT: File attribute (WORD) */ +#define XDIR_CrtTime 8 /* exFAT: Created time (DWORD) */ +#define XDIR_ModTime 12 /* exFAT: Modified time (DWORD) */ +#define XDIR_AccTime 16 /* exFAT: Last accessed time (DWORD) */ +#define XDIR_CrtTime10 20 /* exFAT: Created time subsecond (BYTE) */ +#define XDIR_ModTime10 21 /* exFAT: Modified time subsecond (BYTE) */ +#define XDIR_CrtTZ 22 /* exFAT: Created timezone (BYTE) */ +#define XDIR_ModTZ 23 /* exFAT: Modified timezone (BYTE) */ +#define XDIR_AccTZ 24 /* exFAT: Last accessed timezone (BYTE) */ +#define XDIR_GenFlags 33 /* exFAT: General secondary flags (BYTE) */ +#define XDIR_NumName 35 /* exFAT: Number of file name characters (BYTE) */ +#define XDIR_NameHash 36 /* exFAT: Hash of file name (WORD) */ +#define XDIR_ValidFileSize 40 /* exFAT: Valid file size (QWORD) */ +#define XDIR_FstClus 52 /* exFAT: First cluster of the file data (DWORD) */ +#define XDIR_FileSize 56 /* exFAT: File/Directory size (QWORD) */ + +#define SZDIRE 32 /* Size of a directory entry */ +#define DDEM 0xE5 /* Deleted directory entry mark set to DIR_Name[0] */ +#define RDDEM 0x05 /* Replacement of the character collides with DDEM */ +#define LLEF 0x40 /* Last long entry flag in LDIR_Ord */ + +#define FSI_LeadSig 0 /* FAT32 FSI: Leading signature (DWORD) */ +#define FSI_StrucSig 484 /* FAT32 FSI: Structure signature (DWORD) */ +#define FSI_Free_Count 488 /* FAT32 FSI: Number of free clusters (DWORD) */ +#define FSI_Nxt_Free 492 /* FAT32 FSI: Last allocated cluster (DWORD) */ + +#define MBR_Table 446 /* MBR: Offset of partition table in the MBR */ +#define SZ_PTE 16 /* MBR: Size of a partition table entry */ +#define PTE_Boot 0 /* MBR PTE: Boot indicator */ +#define PTE_StHead 1 /* MBR PTE: Start head */ +#define PTE_StSec 2 /* MBR PTE: Start sector */ +#define PTE_StCyl 3 /* MBR PTE: Start cylinder */ +#define PTE_System 4 /* MBR PTE: System ID */ +#define PTE_EdHead 5 /* MBR PTE: End head */ +#define PTE_EdSec 6 /* MBR PTE: End sector */ +#define PTE_EdCyl 7 /* MBR PTE: End cylinder */ +#define PTE_StLba 8 /* MBR PTE: Start in LBA */ +#define PTE_SizLba 12 /* MBR PTE: Size in LBA */ + +#define GPTH_Sign 0 /* GPT: Header signature (8-byte) */ +#define GPTH_Rev 8 /* GPT: Revision (DWORD) */ +#define GPTH_Size 12 /* GPT: Header size (DWORD) */ +#define GPTH_Bcc 16 /* GPT: Header BCC (DWORD) */ +#define GPTH_CurLba 24 /* GPT: Main header LBA (QWORD) */ +#define GPTH_BakLba 32 /* GPT: Backup header LBA (QWORD) */ +#define GPTH_FstLba 40 /* GPT: First LBA for partitions (QWORD) */ +#define GPTH_LstLba 48 /* GPT: Last LBA for partitions (QWORD) */ +#define GPTH_DskGuid 56 /* GPT: Disk GUID (16-byte) */ +#define GPTH_PtOfs 72 /* GPT: Partation table LBA (QWORD) */ +#define GPTH_PtNum 80 /* GPT: Number of table entries (DWORD) */ +#define GPTH_PteSize 84 /* GPT: Size of table entry (DWORD) */ +#define GPTH_PtBcc 88 /* GPT: Partation table BCC (DWORD) */ +#define SZ_GPTE 128 /* GPT: Size of partition table entry */ +#define GPTE_PtGuid 0 /* GPT PTE: Partition type GUID (16-byte) */ +#define GPTE_UpGuid 16 /* GPT PTE: Partition unique GUID (16-byte) */ +#define GPTE_FstLba 32 /* GPT PTE: First LBA (QWORD) */ +#define GPTE_LstLba 40 /* GPT PTE: Last LBA inclusive (QWORD) */ +#define GPTE_Flags 48 /* GPT PTE: Flags (QWORD) */ +#define GPTE_Name 56 /* GPT PTE: Name */ + + +/* Post process on fatal error in the file operations */ +#define ABORT(fs, res) { fp->err = (BYTE)(res); LEAVE_FF(fs, res); } + + +/* Re-entrancy related */ +#if FF_FS_REENTRANT +#if FF_USE_LFN == 1 +#error Static LFN work area cannot be used at thread-safe configuration +#endif +#define LEAVE_FF(fs, res) { unlock_fs(fs, res); return res; } +#else +#define LEAVE_FF(fs, res) return res +#endif + + +/* Definitions of logical drive - physical location conversion */ +#if FF_MULTI_PARTITION +#define LD2PD(vol) VolToPart[vol].pd /* Get physical drive number */ +#define LD2PT(vol) VolToPart[vol].pt /* Get partition index */ +#else +#define LD2PD(vol) (BYTE)(vol) /* Each logical drive is associated with the same physical drive number */ +#define LD2PT(vol) 0 /* Find first valid partition or in SFD */ +#endif + + +/* Definitions of sector size */ +#if (FF_MAX_SS < FF_MIN_SS) || (FF_MAX_SS != 512 && FF_MAX_SS != 1024 && FF_MAX_SS != 2048 && FF_MAX_SS != 4096) || (FF_MIN_SS != 512 && FF_MIN_SS != 1024 && FF_MIN_SS != 2048 && FF_MIN_SS != 4096) +#error Wrong sector size configuration +#endif +#if FF_MAX_SS == FF_MIN_SS +#define SS(fs) ((UINT)FF_MAX_SS) /* Fixed sector size */ +#else +#define SS(fs) ((fs)->ssize) /* Variable sector size */ +#endif + + +/* Timestamp */ +#if FF_FS_NORTC == 1 +#if FF_NORTC_YEAR < 1980 || FF_NORTC_YEAR > 2107 || FF_NORTC_MON < 1 || FF_NORTC_MON > 12 || FF_NORTC_MDAY < 1 || FF_NORTC_MDAY > 31 +#error Invalid FF_FS_NORTC settings +#endif +#define GET_FATTIME() ((DWORD)(FF_NORTC_YEAR - 1980) << 25 | (DWORD)FF_NORTC_MON << 21 | (DWORD)FF_NORTC_MDAY << 16) +#else +#define GET_FATTIME() get_fattime() +#endif + + +/* File lock controls */ +#if FF_FS_LOCK != 0 +#if FF_FS_READONLY +#error FF_FS_LOCK must be 0 at read-only configuration +#endif +typedef struct { + FATFS *fs; /* Object ID 1, volume (NULL:blank entry) */ + DWORD clu; /* Object ID 2, containing directory (0:root) */ + DWORD ofs; /* Object ID 3, offset in the directory */ + WORD ctr; /* Object open counter, 0:none, 0x01..0xFF:read mode open count, 0x100:write mode */ +} FILESEM; +#endif + + +/* SBCS up-case tables (\x80-\xFF) */ +#define TBL_CT437 {0x80,0x9A,0x45,0x41,0x8E,0x41,0x8F,0x80,0x45,0x45,0x45,0x49,0x49,0x49,0x8E,0x8F, \ + 0x90,0x92,0x92,0x4F,0x99,0x4F,0x55,0x55,0x59,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ + 0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ + 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ + 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ + 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} +#define TBL_CT720 {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \ + 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ + 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ + 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ + 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ + 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} +#define TBL_CT737 {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \ + 0x90,0x92,0x92,0x93,0x94,0x95,0x96,0x97,0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87, \ + 0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,0x90,0x91,0xAA,0x92,0x93,0x94,0x95,0x96, \ + 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ + 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0x97,0xEA,0xEB,0xEC,0xE4,0xED,0xEE,0xEF,0xF5,0xF0,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ + 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} +#define TBL_CT771 {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \ + 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ + 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \ + 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ + 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDC,0xDE,0xDE, \ + 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ + 0xF0,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF8,0xFA,0xFA,0xFC,0xFC,0xFE,0xFF} +#define TBL_CT775 {0x80,0x9A,0x91,0xA0,0x8E,0x95,0x8F,0x80,0xAD,0xED,0x8A,0x8A,0xA1,0x8D,0x8E,0x8F, \ + 0x90,0x92,0x92,0xE2,0x99,0x95,0x96,0x97,0x97,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \ + 0xA0,0xA1,0xE0,0xA3,0xA3,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ + 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ + 0xB5,0xB6,0xB7,0xB8,0xBD,0xBE,0xC6,0xC7,0xA5,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE3,0xE8,0xE8,0xEA,0xEA,0xEE,0xED,0xEE,0xEF, \ + 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} +#define TBL_CT850 {0x43,0x55,0x45,0x41,0x41,0x41,0x41,0x43,0x45,0x45,0x45,0x49,0x49,0x49,0x41,0x41, \ + 0x45,0x92,0x92,0x4F,0x4F,0x4F,0x55,0x55,0x59,0x4F,0x55,0x4F,0x9C,0x4F,0x9E,0x9F, \ + 0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ + 0xB0,0xB1,0xB2,0xB3,0xB4,0x41,0x41,0x41,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0x41,0x41,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ + 0xD1,0xD1,0x45,0x45,0x45,0x49,0x49,0x49,0x49,0xD9,0xDA,0xDB,0xDC,0xDD,0x49,0xDF, \ + 0x4F,0xE1,0x4F,0x4F,0x4F,0x4F,0xE6,0xE8,0xE8,0x55,0x55,0x55,0x59,0x59,0xEE,0xEF, \ + 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} +#define TBL_CT852 {0x80,0x9A,0x90,0xB6,0x8E,0xDE,0x8F,0x80,0x9D,0xD3,0x8A,0x8A,0xD7,0x8D,0x8E,0x8F, \ + 0x90,0x91,0x91,0xE2,0x99,0x95,0x95,0x97,0x97,0x99,0x9A,0x9B,0x9B,0x9D,0x9E,0xAC, \ + 0xB5,0xD6,0xE0,0xE9,0xA4,0xA4,0xA6,0xA6,0xA8,0xA8,0xAA,0x8D,0xAC,0xB8,0xAE,0xAF, \ + 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBD,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC6,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ + 0xD1,0xD1,0xD2,0xD3,0xD2,0xD5,0xD6,0xD7,0xB7,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE3,0xD5,0xE6,0xE6,0xE8,0xE9,0xE8,0xEB,0xED,0xED,0xDD,0xEF, \ + 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xEB,0xFC,0xFC,0xFE,0xFF} +#define TBL_CT855 {0x81,0x81,0x83,0x83,0x85,0x85,0x87,0x87,0x89,0x89,0x8B,0x8B,0x8D,0x8D,0x8F,0x8F, \ + 0x91,0x91,0x93,0x93,0x95,0x95,0x97,0x97,0x99,0x99,0x9B,0x9B,0x9D,0x9D,0x9F,0x9F, \ + 0xA1,0xA1,0xA3,0xA3,0xA5,0xA5,0xA7,0xA7,0xA9,0xA9,0xAB,0xAB,0xAD,0xAD,0xAE,0xAF, \ + 0xB0,0xB1,0xB2,0xB3,0xB4,0xB6,0xB6,0xB8,0xB8,0xB9,0xBA,0xBB,0xBC,0xBE,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ + 0xD1,0xD1,0xD3,0xD3,0xD5,0xD5,0xD7,0xD7,0xDD,0xD9,0xDA,0xDB,0xDC,0xDD,0xE0,0xDF, \ + 0xE0,0xE2,0xE2,0xE4,0xE4,0xE6,0xE6,0xE8,0xE8,0xEA,0xEA,0xEC,0xEC,0xEE,0xEE,0xEF, \ + 0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF8,0xFA,0xFA,0xFC,0xFC,0xFD,0xFE,0xFF} +#define TBL_CT857 {0x80,0x9A,0x90,0xB6,0x8E,0xB7,0x8F,0x80,0xD2,0xD3,0xD4,0xD8,0xD7,0x49,0x8E,0x8F, \ + 0x90,0x92,0x92,0xE2,0x99,0xE3,0xEA,0xEB,0x98,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9E, \ + 0xB5,0xD6,0xE0,0xE9,0xA5,0xA5,0xA6,0xA6,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ + 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC7,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ + 0xD0,0xD1,0xD2,0xD3,0xD4,0x49,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE5,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xDE,0xED,0xEE,0xEF, \ + 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} +#define TBL_CT860 {0x80,0x9A,0x90,0x8F,0x8E,0x91,0x86,0x80,0x89,0x89,0x92,0x8B,0x8C,0x98,0x8E,0x8F, \ + 0x90,0x91,0x92,0x8C,0x99,0xA9,0x96,0x9D,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ + 0x86,0x8B,0x9F,0x96,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ + 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ + 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ + 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} +#define TBL_CT861 {0x80,0x9A,0x90,0x41,0x8E,0x41,0x8F,0x80,0x45,0x45,0x45,0x8B,0x8B,0x8D,0x8E,0x8F, \ + 0x90,0x92,0x92,0x4F,0x99,0x8D,0x55,0x97,0x97,0x99,0x9A,0x9D,0x9C,0x9D,0x9E,0x9F, \ + 0xA4,0xA5,0xA6,0xA7,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ + 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ + 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ + 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} +#define TBL_CT862 {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \ + 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ + 0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ + 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ + 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ + 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} +#define TBL_CT863 {0x43,0x55,0x45,0x41,0x41,0x41,0x86,0x43,0x45,0x45,0x45,0x49,0x49,0x8D,0x41,0x8F, \ + 0x45,0x45,0x45,0x4F,0x45,0x49,0x55,0x55,0x98,0x4F,0x55,0x9B,0x9C,0x55,0x55,0x9F, \ + 0xA0,0xA1,0x4F,0x55,0xA4,0xA5,0xA6,0xA7,0x49,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ + 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ + 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ + 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} +#define TBL_CT864 {0x80,0x9A,0x45,0x41,0x8E,0x41,0x8F,0x80,0x45,0x45,0x45,0x49,0x49,0x49,0x8E,0x8F, \ + 0x90,0x92,0x92,0x4F,0x99,0x4F,0x55,0x55,0x59,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ + 0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ + 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ + 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ + 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} +#define TBL_CT865 {0x80,0x9A,0x90,0x41,0x8E,0x41,0x8F,0x80,0x45,0x45,0x45,0x49,0x49,0x49,0x8E,0x8F, \ + 0x90,0x92,0x92,0x4F,0x99,0x4F,0x55,0x55,0x59,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ + 0x41,0x49,0x4F,0x55,0xA5,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ + 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ + 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \ + 0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} +#define TBL_CT866 {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \ + 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ + 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \ + 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ + 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \ + 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \ + 0xF0,0xF0,0xF2,0xF2,0xF4,0xF4,0xF6,0xF6,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF} +#define TBL_CT869 {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \ + 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x86,0x9C,0x8D,0x8F,0x90, \ + 0x91,0x90,0x92,0x95,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \ + 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \ + 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \ + 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xA4,0xA5,0xA6,0xD9,0xDA,0xDB,0xDC,0xA7,0xA8,0xDF, \ + 0xA9,0xAA,0xAC,0xAD,0xB5,0xB6,0xB7,0xB8,0xBD,0xBE,0xC6,0xC7,0xCF,0xCF,0xD0,0xEF, \ + 0xF0,0xF1,0xD1,0xD2,0xD3,0xF5,0xD4,0xF7,0xF8,0xF9,0xD5,0x96,0x95,0x98,0xFE,0xFF} + + +/* DBCS code range |----- 1st byte -----| |----------- 2nd byte -----------| */ +/* <------> <------> <------> <------> <------> */ +#define TBL_DC932 {0x81, 0x9F, 0xE0, 0xFC, 0x40, 0x7E, 0x80, 0xFC, 0x00, 0x00} +#define TBL_DC936 {0x81, 0xFE, 0x00, 0x00, 0x40, 0x7E, 0x80, 0xFE, 0x00, 0x00} +#define TBL_DC949 {0x81, 0xFE, 0x00, 0x00, 0x41, 0x5A, 0x61, 0x7A, 0x81, 0xFE} +#define TBL_DC950 {0x81, 0xFE, 0x00, 0x00, 0x40, 0x7E, 0xA1, 0xFE, 0x00, 0x00} + + +/* Macros for table definitions */ +#define MERGE_2STR(a, b) a ## b +#define MKCVTBL(hd, cp) MERGE_2STR(hd, cp) + + + + +/*-------------------------------------------------------------------------- + + Module Private Work Area + +---------------------------------------------------------------------------*/ +/* Remark: Variables defined here without initial value shall be guaranteed +/ zero/null at start-up. If not, the linker option or start-up routine is +/ not compliance with C standard. */ + +/*--------------------------------*/ +/* File/Volume controls */ +/*--------------------------------*/ + +#if FF_VOLUMES < 1 || FF_VOLUMES > 10 +#error Wrong FF_VOLUMES setting +#endif +static FATFS* FatFs[FF_VOLUMES]; /* Pointer to the filesystem objects (logical drives) */ +static WORD Fsid; /* Filesystem mount ID */ + +#if FF_FS_RPATH != 0 +static BYTE CurrVol; /* Current drive */ +#endif + +#if FF_FS_LOCK != 0 +static FILESEM Files[FF_FS_LOCK]; /* Open object lock semaphores */ +#endif + +#if FF_STR_VOLUME_ID +#ifdef FF_VOLUME_STRS +static const char* const VolumeStr[FF_VOLUMES] = {FF_VOLUME_STRS}; /* Pre-defined volume ID */ +#endif +#endif + +#if FF_LBA64 +#if FF_MIN_GPT > 0x100000000 +#error Wrong FF_MIN_GPT setting +#endif +static const BYTE GUID_MS_Basic[16] = {0xA2,0xA0,0xD0,0xEB,0xE5,0xB9,0x33,0x44,0x87,0xC0,0x68,0xB6,0xB7,0x26,0x99,0xC7}; +#endif + + + +/*--------------------------------*/ +/* LFN/Directory working buffer */ +/*--------------------------------*/ + +#if FF_USE_LFN == 0 /* Non-LFN configuration */ +#if FF_FS_EXFAT +#error LFN must be enabled when enable exFAT +#endif +#define DEF_NAMBUF +#define INIT_NAMBUF(fs) +#define FREE_NAMBUF() +#define LEAVE_MKFS(res) return res + +#else /* LFN configurations */ +#if FF_MAX_LFN < 12 || FF_MAX_LFN > 255 +#error Wrong setting of FF_MAX_LFN +#endif +#if FF_LFN_BUF < FF_SFN_BUF || FF_SFN_BUF < 12 +#error Wrong setting of FF_LFN_BUF or FF_SFN_BUF +#endif +#if FF_LFN_UNICODE < 0 || FF_LFN_UNICODE > 3 +#error Wrong setting of FF_LFN_UNICODE +#endif +static const BYTE LfnOfs[] = {1,3,5,7,9,14,16,18,20,22,24,28,30}; /* FAT: Offset of LFN characters in the directory entry */ +#define MAXDIRB(nc) ((nc + 44U) / 15 * SZDIRE) /* exFAT: Size of directory entry block scratchpad buffer needed for the name length */ + +#if FF_USE_LFN == 1 /* LFN enabled with static working buffer */ +#if FF_FS_EXFAT +static BYTE DirBuf[MAXDIRB(FF_MAX_LFN)]; /* Directory entry block scratchpad buffer */ +#endif +static WCHAR LfnBuf[FF_MAX_LFN + 1]; /* LFN working buffer */ +#define DEF_NAMBUF +#define INIT_NAMBUF(fs) +#define FREE_NAMBUF() +#define LEAVE_MKFS(res) return res + +#elif FF_USE_LFN == 2 /* LFN enabled with dynamic working buffer on the stack */ +#if FF_FS_EXFAT +#define DEF_NAMBUF WCHAR lbuf[FF_MAX_LFN+1]; BYTE dbuf[MAXDIRB(FF_MAX_LFN)]; /* LFN working buffer and directory entry block scratchpad buffer */ +#define INIT_NAMBUF(fs) { (fs)->lfnbuf = lbuf; (fs)->dirbuf = dbuf; } +#define FREE_NAMBUF() +#else +#define DEF_NAMBUF WCHAR lbuf[FF_MAX_LFN+1]; /* LFN working buffer */ +#define INIT_NAMBUF(fs) { (fs)->lfnbuf = lbuf; } +#define FREE_NAMBUF() +#endif +#define LEAVE_MKFS(res) return res + +#elif FF_USE_LFN == 3 /* LFN enabled with dynamic working buffer on the heap */ +#if FF_FS_EXFAT +#define DEF_NAMBUF WCHAR *lfn; /* Pointer to LFN working buffer and directory entry block scratchpad buffer */ +#define INIT_NAMBUF(fs) { lfn = ff_memalloc((FF_MAX_LFN+1)*2 + MAXDIRB(FF_MAX_LFN)); if (!lfn) LEAVE_FF(fs, FR_NOT_ENOUGH_CORE); (fs)->lfnbuf = lfn; (fs)->dirbuf = (BYTE*)(lfn+FF_MAX_LFN+1); } +#define FREE_NAMBUF() ff_memfree(lfn) +#else +#define DEF_NAMBUF WCHAR *lfn; /* Pointer to LFN working buffer */ +#define INIT_NAMBUF(fs) { lfn = ff_memalloc((FF_MAX_LFN+1)*2); if (!lfn) LEAVE_FF(fs, FR_NOT_ENOUGH_CORE); (fs)->lfnbuf = lfn; } +#define FREE_NAMBUF() ff_memfree(lfn) +#endif +#define LEAVE_MKFS(res) { if (!work) ff_memfree(buf); return res; } +#define MAX_MALLOC 0x8000 /* Must be >=FF_MAX_SS */ + +#else +#error Wrong setting of FF_USE_LFN + +#endif /* FF_USE_LFN == 1 */ +#endif /* FF_USE_LFN == 0 */ + + + +/*--------------------------------*/ +/* Code conversion tables */ +/*--------------------------------*/ + +#if FF_CODE_PAGE == 0 /* Run-time code page configuration */ +#define CODEPAGE CodePage +static WORD CodePage; /* Current code page */ +static const BYTE *ExCvt, *DbcTbl; /* Pointer to current SBCS up-case table and DBCS code range table below */ + +static const BYTE Ct437[] = TBL_CT437; +static const BYTE Ct720[] = TBL_CT720; +static const BYTE Ct737[] = TBL_CT737; +static const BYTE Ct771[] = TBL_CT771; +static const BYTE Ct775[] = TBL_CT775; +static const BYTE Ct850[] = TBL_CT850; +static const BYTE Ct852[] = TBL_CT852; +static const BYTE Ct855[] = TBL_CT855; +static const BYTE Ct857[] = TBL_CT857; +static const BYTE Ct860[] = TBL_CT860; +static const BYTE Ct861[] = TBL_CT861; +static const BYTE Ct862[] = TBL_CT862; +static const BYTE Ct863[] = TBL_CT863; +static const BYTE Ct864[] = TBL_CT864; +static const BYTE Ct865[] = TBL_CT865; +static const BYTE Ct866[] = TBL_CT866; +static const BYTE Ct869[] = TBL_CT869; +static const BYTE Dc932[] = TBL_DC932; +static const BYTE Dc936[] = TBL_DC936; +static const BYTE Dc949[] = TBL_DC949; +static const BYTE Dc950[] = TBL_DC950; + +#elif FF_CODE_PAGE < 900 /* Static code page configuration (SBCS) */ +#define CODEPAGE FF_CODE_PAGE +static const BYTE ExCvt[] = MKCVTBL(TBL_CT, FF_CODE_PAGE); + +#else /* Static code page configuration (DBCS) */ +#define CODEPAGE FF_CODE_PAGE +static const BYTE DbcTbl[] = MKCVTBL(TBL_DC, FF_CODE_PAGE); + +#endif + + + + +/*-------------------------------------------------------------------------- + + Module Private Functions + +---------------------------------------------------------------------------*/ + + +/*-----------------------------------------------------------------------*/ +/* Load/Store multi-byte word in the FAT structure */ +/*-----------------------------------------------------------------------*/ + +static WORD ld_word (const BYTE* ptr) /* Load a 2-byte little-endian word */ +{ + WORD rv; + + rv = ptr[1]; + rv = rv << 8 | ptr[0]; + return rv; +} + +static DWORD ld_dword (const BYTE* ptr) /* Load a 4-byte little-endian word */ +{ + DWORD rv; + + rv = ptr[3]; + rv = rv << 8 | ptr[2]; + rv = rv << 8 | ptr[1]; + rv = rv << 8 | ptr[0]; + return rv; +} + +#if FF_FS_EXFAT +static QWORD ld_qword (const BYTE* ptr) /* Load an 8-byte little-endian word */ +{ + QWORD rv; + + rv = ptr[7]; + rv = rv << 8 | ptr[6]; + rv = rv << 8 | ptr[5]; + rv = rv << 8 | ptr[4]; + rv = rv << 8 | ptr[3]; + rv = rv << 8 | ptr[2]; + rv = rv << 8 | ptr[1]; + rv = rv << 8 | ptr[0]; + return rv; +} +#endif + +#if !FF_FS_READONLY +static void st_word (BYTE* ptr, WORD val) /* Store a 2-byte word in little-endian */ +{ + *ptr++ = (BYTE)val; val >>= 8; + *ptr++ = (BYTE)val; +} + +static void st_dword (BYTE* ptr, DWORD val) /* Store a 4-byte word in little-endian */ +{ + *ptr++ = (BYTE)val; val >>= 8; + *ptr++ = (BYTE)val; val >>= 8; + *ptr++ = (BYTE)val; val >>= 8; + *ptr++ = (BYTE)val; +} + +#if FF_FS_EXFAT +static void st_qword (BYTE* ptr, QWORD val) /* Store an 8-byte word in little-endian */ +{ + *ptr++ = (BYTE)val; val >>= 8; + *ptr++ = (BYTE)val; val >>= 8; + *ptr++ = (BYTE)val; val >>= 8; + *ptr++ = (BYTE)val; val >>= 8; + *ptr++ = (BYTE)val; val >>= 8; + *ptr++ = (BYTE)val; val >>= 8; + *ptr++ = (BYTE)val; val >>= 8; + *ptr++ = (BYTE)val; +} +#endif +#endif /* !FF_FS_READONLY */ + + + +/*-----------------------------------------------------------------------*/ +/* String functions */ +/*-----------------------------------------------------------------------*/ + +/* Copy memory to memory */ +static void mem_cpy (void* dst, const void* src, UINT cnt) +{ + BYTE *d = (BYTE*)dst; + const BYTE *s = (const BYTE*)src; + + if (cnt != 0) { + do { + *d++ = *s++; + } while (--cnt); + } +} + + +/* Fill memory block */ +static void mem_set (void* dst, int val, UINT cnt) +{ + BYTE *d = (BYTE*)dst; + + do { + *d++ = (BYTE)val; + } while (--cnt); +} + + +/* Compare memory block */ +static int mem_cmp (const void* dst, const void* src, UINT cnt) /* ZR:same, NZ:different */ +{ + const BYTE *d = (const BYTE *)dst, *s = (const BYTE *)src; + int r = 0; + + do { + r = *d++ - *s++; + } while (--cnt && r == 0); + + return r; +} + + +/* Check if chr is contained in the string */ +static int chk_chr (const char* str, int chr) /* NZ:contained, ZR:not contained */ +{ + while (*str && *str != chr) str++; + return *str; +} + + +/* Test if the byte is DBC 1st byte */ +static int dbc_1st (BYTE c) +{ +#if FF_CODE_PAGE == 0 /* Variable code page */ + if (DbcTbl && c >= DbcTbl[0]) { + if (c <= DbcTbl[1]) return 1; /* 1st byte range 1 */ + if (c >= DbcTbl[2] && c <= DbcTbl[3]) return 1; /* 1st byte range 2 */ + } +#elif FF_CODE_PAGE >= 900 /* DBCS fixed code page */ + if (c >= DbcTbl[0]) { + if (c <= DbcTbl[1]) return 1; + if (c >= DbcTbl[2] && c <= DbcTbl[3]) return 1; + } +#else /* SBCS fixed code page */ + if (c != 0) return 0; /* Always false */ +#endif + return 0; +} + + +/* Test if the byte is DBC 2nd byte */ +static int dbc_2nd (BYTE c) +{ +#if FF_CODE_PAGE == 0 /* Variable code page */ + if (DbcTbl && c >= DbcTbl[4]) { + if (c <= DbcTbl[5]) return 1; /* 2nd byte range 1 */ + if (c >= DbcTbl[6] && c <= DbcTbl[7]) return 1; /* 2nd byte range 2 */ + if (c >= DbcTbl[8] && c <= DbcTbl[9]) return 1; /* 2nd byte range 3 */ + } +#elif FF_CODE_PAGE >= 900 /* DBCS fixed code page */ + if (c >= DbcTbl[4]) { + if (c <= DbcTbl[5]) return 1; + if (c >= DbcTbl[6] && c <= DbcTbl[7]) return 1; + if (c >= DbcTbl[8] && c <= DbcTbl[9]) return 1; + } +#else /* SBCS fixed code page */ + if (c != 0) return 0; /* Always false */ +#endif + return 0; +} + + +#if FF_USE_LFN + +/* Get a Unicode code point from the TCHAR string in defined API encodeing */ +static DWORD tchar2uni ( /* Returns a character in UTF-16 encoding (>=0x10000 on surrogate pair, 0xFFFFFFFF on decode error) */ + const TCHAR** str /* Pointer to pointer to TCHAR string in configured encoding */ +) +{ + DWORD uc; + const TCHAR *p = *str; + +#if FF_LFN_UNICODE == 1 /* UTF-16 input */ + WCHAR wc; + + uc = *p++; /* Get a unit */ + if (IsSurrogate(uc)) { /* Surrogate? */ + wc = *p++; /* Get low surrogate */ + if (!IsSurrogateH(uc) || !IsSurrogateL(wc)) return 0xFFFFFFFF; /* Wrong surrogate? */ + uc = uc << 16 | wc; + } + +#elif FF_LFN_UNICODE == 2 /* UTF-8 input */ + BYTE b; + int nf; + + uc = (BYTE)*p++; /* Get an encoding unit */ + if (uc & 0x80) { /* Multiple byte code? */ + if ((uc & 0xE0) == 0xC0) { /* 2-byte sequence? */ + uc &= 0x1F; nf = 1; + } else { + if ((uc & 0xF0) == 0xE0) { /* 3-byte sequence? */ + uc &= 0x0F; nf = 2; + } else { + if ((uc & 0xF8) == 0xF0) { /* 4-byte sequence? */ + uc &= 0x07; nf = 3; + } else { /* Wrong sequence */ + return 0xFFFFFFFF; + } + } + } + do { /* Get trailing bytes */ + b = (BYTE)*p++; + if ((b & 0xC0) != 0x80) return 0xFFFFFFFF; /* Wrong sequence? */ + uc = uc << 6 | (b & 0x3F); + } while (--nf != 0); + if (uc < 0x80 || IsSurrogate(uc) || uc >= 0x110000) return 0xFFFFFFFF; /* Wrong code? */ + if (uc >= 0x010000) uc = 0xD800DC00 | ((uc - 0x10000) << 6 & 0x3FF0000) | (uc & 0x3FF); /* Make a surrogate pair if needed */ + } + +#elif FF_LFN_UNICODE == 3 /* UTF-32 input */ + uc = (TCHAR)*p++; /* Get a unit */ + if (uc >= 0x110000 || IsSurrogate(uc)) return 0xFFFFFFFF; /* Wrong code? */ + if (uc >= 0x010000) uc = 0xD800DC00 | ((uc - 0x10000) << 6 & 0x3FF0000) | (uc & 0x3FF); /* Make a surrogate pair if needed */ + +#else /* ANSI/OEM input */ + BYTE b; + WCHAR wc; + + wc = (BYTE)*p++; /* Get a byte */ + if (dbc_1st((BYTE)wc)) { /* Is it a DBC 1st byte? */ + b = (BYTE)*p++; /* Get 2nd byte */ + if (!dbc_2nd(b)) return 0xFFFFFFFF; /* Invalid code? */ + wc = (wc << 8) + b; /* Make a DBC */ + } + if (wc != 0) { + wc = ff_oem2uni(wc, CODEPAGE); /* ANSI/OEM ==> Unicode */ + if (wc == 0) return 0xFFFFFFFF; /* Invalid code? */ + } + uc = wc; + +#endif + *str = p; /* Next read pointer */ + return uc; +} + + +/* Output a TCHAR string in defined API encoding */ +static BYTE put_utf ( /* Returns number of encoding units written (0:buffer overflow or wrong encoding) */ + DWORD chr, /* UTF-16 encoded character (Surrogate pair if >=0x10000) */ + TCHAR* buf, /* Output buffer */ + UINT szb /* Size of the buffer */ +) +{ +#if FF_LFN_UNICODE == 1 /* UTF-16 output */ + WCHAR hs, wc; + + hs = (WCHAR)(chr >> 16); + wc = (WCHAR)chr; + if (hs == 0) { /* Single encoding unit? */ + if (szb < 1 || IsSurrogate(wc)) return 0; /* Buffer overflow or wrong code? */ + *buf = wc; + return 1; + } + if (szb < 2 || !IsSurrogateH(hs) || !IsSurrogateL(wc)) return 0; /* Buffer overflow or wrong surrogate? */ + *buf++ = hs; + *buf++ = wc; + return 2; + +#elif FF_LFN_UNICODE == 2 /* UTF-8 output */ + DWORD hc; + + if (chr < 0x80) { /* Single byte code? */ + if (szb < 1) return 0; /* Buffer overflow? */ + *buf = (TCHAR)chr; + return 1; + } + if (chr < 0x800) { /* 2-byte sequence? */ + if (szb < 2) return 0; /* Buffer overflow? */ + *buf++ = (TCHAR)(0xC0 | (chr >> 6 & 0x1F)); + *buf++ = (TCHAR)(0x80 | (chr >> 0 & 0x3F)); + return 2; + } + if (chr < 0x10000) { /* 3-byte sequence? */ + if (szb < 3 || IsSurrogate(chr)) return 0; /* Buffer overflow or wrong code? */ + *buf++ = (TCHAR)(0xE0 | (chr >> 12 & 0x0F)); + *buf++ = (TCHAR)(0x80 | (chr >> 6 & 0x3F)); + *buf++ = (TCHAR)(0x80 | (chr >> 0 & 0x3F)); + return 3; + } + /* 4-byte sequence */ + if (szb < 4) return 0; /* Buffer overflow? */ + hc = ((chr & 0xFFFF0000) - 0xD8000000) >> 6; /* Get high 10 bits */ + chr = (chr & 0xFFFF) - 0xDC00; /* Get low 10 bits */ + if (hc >= 0x100000 || chr >= 0x400) return 0; /* Wrong surrogate? */ + chr = (hc | chr) + 0x10000; + *buf++ = (TCHAR)(0xF0 | (chr >> 18 & 0x07)); + *buf++ = (TCHAR)(0x80 | (chr >> 12 & 0x3F)); + *buf++ = (TCHAR)(0x80 | (chr >> 6 & 0x3F)); + *buf++ = (TCHAR)(0x80 | (chr >> 0 & 0x3F)); + return 4; + +#elif FF_LFN_UNICODE == 3 /* UTF-32 output */ + DWORD hc; + + if (szb < 1) return 0; /* Buffer overflow? */ + if (chr >= 0x10000) { /* Out of BMP? */ + hc = ((chr & 0xFFFF0000) - 0xD8000000) >> 6; /* Get high 10 bits */ + chr = (chr & 0xFFFF) - 0xDC00; /* Get low 10 bits */ + if (hc >= 0x100000 || chr >= 0x400) return 0; /* Wrong surrogate? */ + chr = (hc | chr) + 0x10000; + } + *buf++ = (TCHAR)chr; + return 1; + +#else /* ANSI/OEM output */ + WCHAR wc; + + wc = ff_uni2oem(chr, CODEPAGE); + if (wc >= 0x100) { /* Is this a DBC? */ + if (szb < 2) return 0; + *buf++ = (char)(wc >> 8); /* Store DBC 1st byte */ + *buf++ = (TCHAR)wc; /* Store DBC 2nd byte */ + return 2; + } + if (wc == 0 || szb < 1) return 0; /* Invalid char or buffer overflow? */ + *buf++ = (TCHAR)wc; /* Store the character */ + return 1; +#endif +} +#endif /* FF_USE_LFN */ + + +#if FF_FS_REENTRANT +/*-----------------------------------------------------------------------*/ +/* Request/Release grant to access the volume */ +/*-----------------------------------------------------------------------*/ +static int lock_fs ( /* 1:Ok, 0:timeout */ + FATFS* fs /* Filesystem object */ +) +{ + return ff_req_grant(fs->sobj); +} + + +static void unlock_fs ( + FATFS* fs, /* Filesystem object */ + FRESULT res /* Result code to be returned */ +) +{ + if (fs && res != FR_NOT_ENABLED && res != FR_INVALID_DRIVE && res != FR_TIMEOUT) { + ff_rel_grant(fs->sobj); + } +} + +#endif + + + +#if FF_FS_LOCK != 0 +/*-----------------------------------------------------------------------*/ +/* File lock control functions */ +/*-----------------------------------------------------------------------*/ + +static FRESULT chk_lock ( /* Check if the file can be accessed */ + DIR* dp, /* Directory object pointing the file to be checked */ + int acc /* Desired access type (0:Read mode open, 1:Write mode open, 2:Delete or rename) */ +) +{ + UINT i, be; + + /* Search open object table for the object */ + be = 0; + for (i = 0; i < FF_FS_LOCK; i++) { + if (Files[i].fs) { /* Existing entry */ + if (Files[i].fs == dp->obj.fs && /* Check if the object matches with an open object */ + Files[i].clu == dp->obj.sclust && + Files[i].ofs == dp->dptr) break; + } else { /* Blank entry */ + be = 1; + } + } + if (i == FF_FS_LOCK) { /* The object has not been opened */ + return (!be && acc != 2) ? FR_TOO_MANY_OPEN_FILES : FR_OK; /* Is there a blank entry for new object? */ + } + + /* The object was opened. Reject any open against writing file and all write mode open */ + return (acc != 0 || Files[i].ctr == 0x100) ? FR_LOCKED : FR_OK; +} + + +static int enq_lock (void) /* Check if an entry is available for a new object */ +{ + UINT i; + + for (i = 0; i < FF_FS_LOCK && Files[i].fs; i++) ; + return (i == FF_FS_LOCK) ? 0 : 1; +} + + +static UINT inc_lock ( /* Increment object open counter and returns its index (0:Internal error) */ + DIR* dp, /* Directory object pointing the file to register or increment */ + int acc /* Desired access (0:Read, 1:Write, 2:Delete/Rename) */ +) +{ + UINT i; + + + for (i = 0; i < FF_FS_LOCK; i++) { /* Find the object */ + if (Files[i].fs == dp->obj.fs + && Files[i].clu == dp->obj.sclust + && Files[i].ofs == dp->dptr) break; + } + + if (i == FF_FS_LOCK) { /* Not opened. Register it as new. */ + for (i = 0; i < FF_FS_LOCK && Files[i].fs; i++) ; + if (i == FF_FS_LOCK) return 0; /* No free entry to register (int err) */ + Files[i].fs = dp->obj.fs; + Files[i].clu = dp->obj.sclust; + Files[i].ofs = dp->dptr; + Files[i].ctr = 0; + } + + if (acc >= 1 && Files[i].ctr) return 0; /* Access violation (int err) */ + + Files[i].ctr = acc ? 0x100 : Files[i].ctr + 1; /* Set semaphore value */ + + return i + 1; /* Index number origin from 1 */ +} + + +static FRESULT dec_lock ( /* Decrement object open counter */ + UINT i /* Semaphore index (1..) */ +) +{ + WORD n; + FRESULT res; + + + if (--i < FF_FS_LOCK) { /* Index number origin from 0 */ + n = Files[i].ctr; + if (n == 0x100) n = 0; /* If write mode open, delete the entry */ + if (n > 0) n--; /* Decrement read mode open count */ + Files[i].ctr = n; + if (n == 0) Files[i].fs = 0; /* Delete the entry if open count gets zero */ + res = FR_OK; + } else { + res = FR_INT_ERR; /* Invalid index nunber */ + } + return res; +} + + +static void clear_lock ( /* Clear lock entries of the volume */ + FATFS *fs +) +{ + UINT i; + + for (i = 0; i < FF_FS_LOCK; i++) { + if (Files[i].fs == fs) Files[i].fs = 0; + } +} + +#endif /* FF_FS_LOCK != 0 */ + + + +/*-----------------------------------------------------------------------*/ +/* Move/Flush disk access window in the filesystem object */ +/*-----------------------------------------------------------------------*/ +#if !FF_FS_READONLY +static FRESULT sync_window ( /* Returns FR_OK or FR_DISK_ERR */ + FATFS* fs /* Filesystem object */ +) +{ + FRESULT res = FR_OK; + + + if (fs->wflag) { /* Is the disk access window dirty? */ + if (disk_write(fs->pdrv, fs->win, fs->winsect, 1) == RES_OK) { /* Write it back into the volume */ + fs->wflag = 0; /* Clear window dirty flag */ + if (fs->winsect - fs->fatbase < fs->fsize) { /* Is it in the 1st FAT? */ + if (fs->n_fats == 2) disk_write(fs->pdrv, fs->win, fs->winsect + fs->fsize, 1); /* Reflect it to 2nd FAT if needed */ + } + } else { + res = FR_DISK_ERR; + } + } + return res; +} +#endif + + +static FRESULT move_window ( /* Returns FR_OK or FR_DISK_ERR */ + FATFS* fs, /* Filesystem object */ + LBA_t sect /* Sector LBA to make appearance in the fs->win[] */ +) +{ + FRESULT res = FR_OK; + + + if (sect != fs->winsect) { /* Window offset changed? */ +#if !FF_FS_READONLY + res = sync_window(fs); /* Flush the window */ +#endif + if (res == FR_OK) { /* Fill sector window with new data */ + if (disk_read(fs->pdrv, fs->win, sect, 1) != RES_OK) { + sect = (LBA_t)0 - 1; /* Invalidate window if read data is not valid */ + res = FR_DISK_ERR; + } + fs->winsect = sect; + } + } + return res; +} + + + + +#if !FF_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* Synchronize filesystem and data on the storage */ +/*-----------------------------------------------------------------------*/ + +static FRESULT sync_fs ( /* Returns FR_OK or FR_DISK_ERR */ + FATFS* fs /* Filesystem object */ +) +{ + FRESULT res; + + + res = sync_window(fs); + if (res == FR_OK) { + if (fs->fs_type == FS_FAT32 && fs->fsi_flag == 1) { /* FAT32: Update FSInfo sector if needed */ + /* Create FSInfo structure */ + mem_set(fs->win, 0, sizeof fs->win); + st_word(fs->win + BS_55AA, 0xAA55); + st_dword(fs->win + FSI_LeadSig, 0x41615252); + st_dword(fs->win + FSI_StrucSig, 0x61417272); + st_dword(fs->win + FSI_Free_Count, fs->free_clst); + st_dword(fs->win + FSI_Nxt_Free, fs->last_clst); + /* Write it into the FSInfo sector */ + fs->winsect = fs->volbase + 1; + disk_write(fs->pdrv, fs->win, fs->winsect, 1); + fs->fsi_flag = 0; + } + /* Make sure that no pending write process in the lower layer */ + if (disk_ioctl(fs->pdrv, CTRL_SYNC, 0) != RES_OK) res = FR_DISK_ERR; + } + + return res; +} + +#endif + + + +/*-----------------------------------------------------------------------*/ +/* Get physical sector number from cluster number */ +/*-----------------------------------------------------------------------*/ + +static LBA_t clst2sect ( /* !=0:Sector number, 0:Failed (invalid cluster#) */ + FATFS* fs, /* Filesystem object */ + DWORD clst /* Cluster# to be converted */ +) +{ + clst -= 2; /* Cluster number is origin from 2 */ + if (clst >= fs->n_fatent - 2) return 0; /* Is it invalid cluster number? */ + return fs->database + (LBA_t)fs->csize * clst; /* Start sector number of the cluster */ +} + + + + +/*-----------------------------------------------------------------------*/ +/* FAT access - Read value of a FAT entry */ +/*-----------------------------------------------------------------------*/ + +static DWORD get_fat ( /* 0xFFFFFFFF:Disk error, 1:Internal error, 2..0x7FFFFFFF:Cluster status */ + FFOBJID* obj, /* Corresponding object */ + DWORD clst /* Cluster number to get the value */ +) +{ + UINT wc, bc; + DWORD val; + FATFS *fs = obj->fs; + + + if (clst < 2 || clst >= fs->n_fatent) { /* Check if in valid range */ + val = 1; /* Internal error */ + + } else { + val = 0xFFFFFFFF; /* Default value falls on disk error */ + + switch (fs->fs_type) { + case FS_FAT12 : + bc = (UINT)clst; bc += bc / 2; + if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break; + wc = fs->win[bc++ % SS(fs)]; /* Get 1st byte of the entry */ + if (move_window(fs, fs->fatbase + (bc / SS(fs))) != FR_OK) break; + wc |= fs->win[bc % SS(fs)] << 8; /* Merge 2nd byte of the entry */ + val = (clst & 1) ? (wc >> 4) : (wc & 0xFFF); /* Adjust bit position */ + break; + + case FS_FAT16 : + if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 2))) != FR_OK) break; + val = ld_word(fs->win + clst * 2 % SS(fs)); /* Simple WORD array */ + break; + + case FS_FAT32 : + if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))) != FR_OK) break; + val = ld_dword(fs->win + clst * 4 % SS(fs)) & 0x0FFFFFFF; /* Simple DWORD array but mask out upper 4 bits */ + break; +#if FF_FS_EXFAT + case FS_EXFAT : + if ((obj->objsize != 0 && obj->sclust != 0) || obj->stat == 0) { /* Object except root dir must have valid data length */ + DWORD cofs = clst - obj->sclust; /* Offset from start cluster */ + DWORD clen = (DWORD)((LBA_t)((obj->objsize - 1) / SS(fs)) / fs->csize); /* Number of clusters - 1 */ + + if (obj->stat == 2 && cofs <= clen) { /* Is it a contiguous chain? */ + val = (cofs == clen) ? 0x7FFFFFFF : clst + 1; /* No data on the FAT, generate the value */ + break; + } + if (obj->stat == 3 && cofs < obj->n_cont) { /* Is it in the 1st fragment? */ + val = clst + 1; /* Generate the value */ + break; + } + if (obj->stat != 2) { /* Get value from FAT if FAT chain is valid */ + if (obj->n_frag != 0) { /* Is it on the growing edge? */ + val = 0x7FFFFFFF; /* Generate EOC */ + } else { + if (move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))) != FR_OK) break; + val = ld_dword(fs->win + clst * 4 % SS(fs)) & 0x7FFFFFFF; + } + break; + } + } + /* go to default */ +#endif + default: + val = 1; /* Internal error */ + } + } + + return val; +} + + + + +#if !FF_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* FAT access - Change value of a FAT entry */ +/*-----------------------------------------------------------------------*/ + +static FRESULT put_fat ( /* FR_OK(0):succeeded, !=0:error */ + FATFS* fs, /* Corresponding filesystem object */ + DWORD clst, /* FAT index number (cluster number) to be changed */ + DWORD val /* New value to be set to the entry */ +) +{ + UINT bc; + BYTE *p; + FRESULT res = FR_INT_ERR; + + + if (clst >= 2 && clst < fs->n_fatent) { /* Check if in valid range */ + switch (fs->fs_type) { + case FS_FAT12 : + bc = (UINT)clst; bc += bc / 2; /* bc: byte offset of the entry */ + res = move_window(fs, fs->fatbase + (bc / SS(fs))); + if (res != FR_OK) break; + p = fs->win + bc++ % SS(fs); + *p = (clst & 1) ? ((*p & 0x0F) | ((BYTE)val << 4)) : (BYTE)val; /* Update 1st byte */ + fs->wflag = 1; + res = move_window(fs, fs->fatbase + (bc / SS(fs))); + if (res != FR_OK) break; + p = fs->win + bc % SS(fs); + *p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F)); /* Update 2nd byte */ + fs->wflag = 1; + break; + + case FS_FAT16 : + res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 2))); + if (res != FR_OK) break; + st_word(fs->win + clst * 2 % SS(fs), (WORD)val); /* Simple WORD array */ + fs->wflag = 1; + break; + + case FS_FAT32 : +#if FF_FS_EXFAT + case FS_EXFAT : +#endif + res = move_window(fs, fs->fatbase + (clst / (SS(fs) / 4))); + if (res != FR_OK) break; + if (!FF_FS_EXFAT || fs->fs_type != FS_EXFAT) { + val = (val & 0x0FFFFFFF) | (ld_dword(fs->win + clst * 4 % SS(fs)) & 0xF0000000); + } + st_dword(fs->win + clst * 4 % SS(fs), val); + fs->wflag = 1; + break; + + /* add this for make pass */ + default : + break; + } + } + return res; +} + +#endif /* !FF_FS_READONLY */ + + + + +#if FF_FS_EXFAT && !FF_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* exFAT: Accessing FAT and Allocation Bitmap */ +/*-----------------------------------------------------------------------*/ + +/*--------------------------------------*/ +/* Find a contiguous free cluster block */ +/*--------------------------------------*/ + +static DWORD find_bitmap ( /* 0:Not found, 2..:Cluster block found, 0xFFFFFFFF:Disk error */ + FATFS* fs, /* Filesystem object */ + DWORD clst, /* Cluster number to scan from */ + DWORD ncl /* Number of contiguous clusters to find (1..) */ +) +{ + BYTE bm, bv; + UINT i; + DWORD val, scl, ctr; + + + clst -= 2; /* The first bit in the bitmap corresponds to cluster #2 */ + if (clst >= fs->n_fatent - 2) clst = 0; + scl = val = clst; ctr = 0; + for (;;) { + if (move_window(fs, fs->bitbase + val / 8 / SS(fs)) != FR_OK) return 0xFFFFFFFF; + i = val / 8 % SS(fs); bm = 1 << (val % 8); + do { + do { + bv = fs->win[i] & bm; bm <<= 1; /* Get bit value */ + if (++val >= fs->n_fatent - 2) { /* Next cluster (with wrap-around) */ + val = 0; bm = 0; i = SS(fs); + } + if (bv == 0) { /* Is it a free cluster? */ + if (++ctr == ncl) return scl + 2; /* Check if run length is sufficient for required */ + } else { + scl = val; ctr = 0; /* Encountered a cluster in-use, restart to scan */ + } + if (val == clst) return 0; /* All cluster scanned? */ + } while (bm != 0); + bm = 1; + } while (++i < SS(fs)); + } +} + + +/*----------------------------------------*/ +/* Set/Clear a block of allocation bitmap */ +/*----------------------------------------*/ + +static FRESULT change_bitmap ( + FATFS* fs, /* Filesystem object */ + DWORD clst, /* Cluster number to change from */ + DWORD ncl, /* Number of clusters to be changed */ + int bv /* bit value to be set (0 or 1) */ +) +{ + BYTE bm; + UINT i; + LBA_t sect; + + + clst -= 2; /* The first bit corresponds to cluster #2 */ + sect = fs->bitbase + clst / 8 / SS(fs); /* Sector address */ + i = clst / 8 % SS(fs); /* Byte offset in the sector */ + bm = 1 << (clst % 8); /* Bit mask in the byte */ + for (;;) { + if (move_window(fs, sect++) != FR_OK) return FR_DISK_ERR; + do { + do { + if (bv == (int)((fs->win[i] & bm) != 0)) return FR_INT_ERR; /* Is the bit expected value? */ + fs->win[i] ^= bm; /* Flip the bit */ + fs->wflag = 1; + if (--ncl == 0) return FR_OK; /* All bits processed? */ + } while (bm <<= 1); /* Next bit */ + bm = 1; + } while (++i < SS(fs)); /* Next byte */ + i = 0; + } +} + + +/*---------------------------------------------*/ +/* Fill the first fragment of the FAT chain */ +/*---------------------------------------------*/ + +static FRESULT fill_first_frag ( + FFOBJID* obj /* Pointer to the corresponding object */ +) +{ + FRESULT res; + DWORD cl, n; + + + if (obj->stat == 3) { /* Has the object been changed 'fragmented' in this session? */ + for (cl = obj->sclust, n = obj->n_cont; n; cl++, n--) { /* Create cluster chain on the FAT */ + res = put_fat(obj->fs, cl, cl + 1); + if (res != FR_OK) return res; + } + obj->stat = 0; /* Change status 'FAT chain is valid' */ + } + return FR_OK; +} + + +/*---------------------------------------------*/ +/* Fill the last fragment of the FAT chain */ +/*---------------------------------------------*/ + +static FRESULT fill_last_frag ( + FFOBJID* obj, /* Pointer to the corresponding object */ + DWORD lcl, /* Last cluster of the fragment */ + DWORD term /* Value to set the last FAT entry */ +) +{ + FRESULT res; + + + while (obj->n_frag > 0) { /* Create the chain of last fragment */ + res = put_fat(obj->fs, lcl - obj->n_frag + 1, (obj->n_frag > 1) ? lcl - obj->n_frag + 2 : term); + if (res != FR_OK) return res; + obj->n_frag--; + } + return FR_OK; +} + +#endif /* FF_FS_EXFAT && !FF_FS_READONLY */ + + + +#if !FF_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* FAT handling - Remove a cluster chain */ +/*-----------------------------------------------------------------------*/ + +static FRESULT remove_chain ( /* FR_OK(0):succeeded, !=0:error */ + FFOBJID* obj, /* Corresponding object */ + DWORD clst, /* Cluster to remove a chain from */ + DWORD pclst /* Previous cluster of clst (0 if entire chain) */ +) +{ + FRESULT res = FR_OK; + DWORD nxt; + FATFS *fs = obj->fs; +#if FF_FS_EXFAT || FF_USE_TRIM + DWORD scl = clst, ecl = clst; +#endif +#if FF_USE_TRIM + LBA_t rt[2]; +#endif + + if (clst < 2 || clst >= fs->n_fatent) return FR_INT_ERR; /* Check if in valid range */ + + /* Mark the previous cluster 'EOC' on the FAT if it exists */ + if (pclst != 0 && (!FF_FS_EXFAT || fs->fs_type != FS_EXFAT || obj->stat != 2)) { + res = put_fat(fs, pclst, 0xFFFFFFFF); + if (res != FR_OK) return res; + } + + /* Remove the chain */ + do { + nxt = get_fat(obj, clst); /* Get cluster status */ + if (nxt == 0) break; /* Empty cluster? */ + if (nxt == 1) return FR_INT_ERR; /* Internal error? */ + if (nxt == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error? */ + if (!FF_FS_EXFAT || fs->fs_type != FS_EXFAT) { + res = put_fat(fs, clst, 0); /* Mark the cluster 'free' on the FAT */ + if (res != FR_OK) return res; + } + if (fs->free_clst < fs->n_fatent - 2) { /* Update FSINFO */ + fs->free_clst++; + fs->fsi_flag |= 1; + } +#if FF_FS_EXFAT || FF_USE_TRIM + if (ecl + 1 == nxt) { /* Is next cluster contiguous? */ + ecl = nxt; + } else { /* End of contiguous cluster block */ +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { + res = change_bitmap(fs, scl, ecl - scl + 1, 0); /* Mark the cluster block 'free' on the bitmap */ + if (res != FR_OK) return res; + } +#endif +#if FF_USE_TRIM + rt[0] = clst2sect(fs, scl); /* Start of data area to be freed */ + rt[1] = clst2sect(fs, ecl) + fs->csize - 1; /* End of data area to be freed */ + disk_ioctl(fs->pdrv, CTRL_TRIM, rt); /* Inform storage device that the data in the block may be erased */ +#endif + scl = ecl = nxt; + } +#endif + clst = nxt; /* Next cluster */ + } while (clst < fs->n_fatent); /* Repeat while not the last link */ + +#if FF_FS_EXFAT + /* Some post processes for chain status */ + if (fs->fs_type == FS_EXFAT) { + if (pclst == 0) { /* Has the entire chain been removed? */ + obj->stat = 0; /* Change the chain status 'initial' */ + } else { + if (obj->stat == 0) { /* Is it a fragmented chain from the beginning of this session? */ + clst = obj->sclust; /* Follow the chain to check if it gets contiguous */ + while (clst != pclst) { + nxt = get_fat(obj, clst); + if (nxt < 2) return FR_INT_ERR; + if (nxt == 0xFFFFFFFF) return FR_DISK_ERR; + if (nxt != clst + 1) break; /* Not contiguous? */ + clst++; + } + if (clst == pclst) { /* Has the chain got contiguous again? */ + obj->stat = 2; /* Change the chain status 'contiguous' */ + } + } else { + if (obj->stat == 3 && pclst >= obj->sclust && pclst <= obj->sclust + obj->n_cont) { /* Was the chain fragmented in this session and got contiguous again? */ + obj->stat = 2; /* Change the chain status 'contiguous' */ + } + } + } + } +#endif + return FR_OK; +} + + + + +/*-----------------------------------------------------------------------*/ +/* FAT handling - Stretch a chain or Create a new chain */ +/*-----------------------------------------------------------------------*/ + +static DWORD create_chain ( /* 0:No free cluster, 1:Internal error, 0xFFFFFFFF:Disk error, >=2:New cluster# */ + FFOBJID* obj, /* Corresponding object */ + DWORD clst /* Cluster# to stretch, 0:Create a new chain */ +) +{ + DWORD cs, ncl, scl; + FRESULT res; + FATFS *fs = obj->fs; + + + if (clst == 0) { /* Create a new chain */ + scl = fs->last_clst; /* Suggested cluster to start to find */ + if (scl == 0 || scl >= fs->n_fatent) scl = 1; + } + else { /* Stretch a chain */ + cs = get_fat(obj, clst); /* Check the cluster status */ + if (cs < 2) return 1; /* Test for insanity */ + if (cs == 0xFFFFFFFF) return cs; /* Test for disk error */ + if (cs < fs->n_fatent) return cs; /* It is already followed by next cluster */ + scl = clst; /* Cluster to start to find */ + } + if (fs->free_clst == 0) return 0; /* No free cluster */ + +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { /* On the exFAT volume */ + ncl = find_bitmap(fs, scl, 1); /* Find a free cluster */ + if (ncl == 0 || ncl == 0xFFFFFFFF) return ncl; /* No free cluster or hard error? */ + res = change_bitmap(fs, ncl, 1, 1); /* Mark the cluster 'in use' */ + if (res == FR_INT_ERR) return 1; + if (res == FR_DISK_ERR) return 0xFFFFFFFF; + if (clst == 0) { /* Is it a new chain? */ + obj->stat = 2; /* Set status 'contiguous' */ + } else { /* It is a stretched chain */ + if (obj->stat == 2 && ncl != scl + 1) { /* Is the chain got fragmented? */ + obj->n_cont = scl - obj->sclust; /* Set size of the contiguous part */ + obj->stat = 3; /* Change status 'just fragmented' */ + } + } + if (obj->stat != 2) { /* Is the file non-contiguous? */ + if (ncl == clst + 1) { /* Is the cluster next to previous one? */ + obj->n_frag = obj->n_frag ? obj->n_frag + 1 : 2; /* Increment size of last framgent */ + } else { /* New fragment */ + if (obj->n_frag == 0) obj->n_frag = 1; + res = fill_last_frag(obj, clst, ncl); /* Fill last fragment on the FAT and link it to new one */ + if (res == FR_OK) obj->n_frag = 1; + } + } + } else +#endif + { /* On the FAT/FAT32 volume */ + ncl = 0; + if (scl == clst) { /* Stretching an existing chain? */ + ncl = scl + 1; /* Test if next cluster is free */ + if (ncl >= fs->n_fatent) ncl = 2; + cs = get_fat(obj, ncl); /* Get next cluster status */ + if (cs == 1 || cs == 0xFFFFFFFF) return cs; /* Test for error */ + if (cs != 0) { /* Not free? */ + cs = fs->last_clst; /* Start at suggested cluster if it is valid */ + if (cs >= 2 && cs < fs->n_fatent) scl = cs; + ncl = 0; + } + } + if (ncl == 0) { /* The new cluster cannot be contiguous and find another fragment */ + ncl = scl; /* Start cluster */ + for (;;) { + ncl++; /* Next cluster */ + if (ncl >= fs->n_fatent) { /* Check wrap-around */ + ncl = 2; + if (ncl > scl) return 0; /* No free cluster found? */ + } + cs = get_fat(obj, ncl); /* Get the cluster status */ + if (cs == 0) break; /* Found a free cluster? */ + if (cs == 1 || cs == 0xFFFFFFFF) return cs; /* Test for error */ + if (ncl == scl) return 0; /* No free cluster found? */ + } + } + res = put_fat(fs, ncl, 0xFFFFFFFF); /* Mark the new cluster 'EOC' */ + if (res == FR_OK && clst != 0) { + res = put_fat(fs, clst, ncl); /* Link it from the previous one if needed */ + } + } + + if (res == FR_OK) { /* Update FSINFO if function succeeded. */ + fs->last_clst = ncl; + if (fs->free_clst <= fs->n_fatent - 2) fs->free_clst--; + fs->fsi_flag |= 1; + } else { + ncl = (res == FR_DISK_ERR) ? 0xFFFFFFFF : 1; /* Failed. Generate error status */ + } + + return ncl; /* Return new cluster number or error status */ +} + +#endif /* !FF_FS_READONLY */ + + + + +#if FF_USE_FASTSEEK +/*-----------------------------------------------------------------------*/ +/* FAT handling - Convert offset into cluster with link map table */ +/*-----------------------------------------------------------------------*/ + +static DWORD clmt_clust ( /* <2:Error, >=2:Cluster number */ + FIL* fp, /* Pointer to the file object */ + FSIZE_t ofs /* File offset to be converted to cluster# */ +) +{ + DWORD cl, ncl, *tbl; + FATFS *fs = fp->obj.fs; + + + tbl = fp->cltbl + 1; /* Top of CLMT */ + cl = (DWORD)(ofs / SS(fs) / fs->csize); /* Cluster order from top of the file */ + for (;;) { + ncl = *tbl++; /* Number of cluters in the fragment */ + if (ncl == 0) return 0; /* End of table? (error) */ + if (cl < ncl) break; /* In this fragment? */ + cl -= ncl; tbl++; /* Next fragment */ + } + return cl + *tbl; /* Return the cluster number */ +} + +#endif /* FF_USE_FASTSEEK */ + + + + +/*-----------------------------------------------------------------------*/ +/* Directory handling - Fill a cluster with zeros */ +/*-----------------------------------------------------------------------*/ + +#if !FF_FS_READONLY +static FRESULT dir_clear ( /* Returns FR_OK or FR_DISK_ERR */ + FATFS *fs, /* Filesystem object */ + DWORD clst /* Directory table to clear */ +) +{ + LBA_t sect; + UINT n, szb; + BYTE *ibuf; + + + if (sync_window(fs) != FR_OK) return FR_DISK_ERR; /* Flush disk access window */ + sect = clst2sect(fs, clst); /* Top of the cluster */ + fs->winsect = sect; /* Set window to top of the cluster */ + mem_set(fs->win, 0, sizeof fs->win); /* Clear window buffer */ +#if FF_USE_LFN == 3 /* Quick table clear by using multi-secter write */ + /* Allocate a temporary buffer */ + for (szb = ((DWORD)fs->csize * SS(fs) >= MAX_MALLOC) ? MAX_MALLOC : fs->csize * SS(fs), ibuf = 0; szb > SS(fs) && (ibuf = ff_memalloc(szb)) == 0; szb /= 2) ; + if (szb > SS(fs)) { /* Buffer allocated? */ + mem_set(ibuf, 0, szb); + szb /= SS(fs); /* Bytes -> Sectors */ + for (n = 0; n < fs->csize && disk_write(fs->pdrv, ibuf, sect + n, szb) == RES_OK; n += szb) ; /* Fill the cluster with 0 */ + ff_memfree(ibuf); + } else +#endif + { + ibuf = fs->win; szb = 1; /* Use window buffer (many single-sector writes may take a time) */ + for (n = 0; n < fs->csize && disk_write(fs->pdrv, ibuf, sect + n, szb) == RES_OK; n += szb) ; /* Fill the cluster with 0 */ + } + return (n == fs->csize) ? FR_OK : FR_DISK_ERR; +} +#endif /* !FF_FS_READONLY */ + + + + +/*-----------------------------------------------------------------------*/ +/* Directory handling - Set directory index */ +/*-----------------------------------------------------------------------*/ + +static FRESULT dir_sdi ( /* FR_OK(0):succeeded, !=0:error */ + DIR* dp, /* Pointer to directory object */ + DWORD ofs /* Offset of directory table */ +) +{ + DWORD csz, clst; + FATFS *fs = dp->obj.fs; + + + if (ofs >= (DWORD)((FF_FS_EXFAT && fs->fs_type == FS_EXFAT) ? MAX_DIR_EX : MAX_DIR) || ofs % SZDIRE) { /* Check range of offset and alignment */ + return FR_INT_ERR; + } + dp->dptr = ofs; /* Set current offset */ + clst = dp->obj.sclust; /* Table start cluster (0:root) */ + if (clst == 0 && fs->fs_type >= FS_FAT32) { /* Replace cluster# 0 with root cluster# */ + clst = (DWORD)fs->dirbase; + if (FF_FS_EXFAT) dp->obj.stat = 0; /* exFAT: Root dir has an FAT chain */ + } + + if (clst == 0) { /* Static table (root-directory on the FAT volume) */ + if (ofs / SZDIRE >= fs->n_rootdir) return FR_INT_ERR; /* Is index out of range? */ + dp->sect = fs->dirbase; + + } else { /* Dynamic table (sub-directory or root-directory on the FAT32/exFAT volume) */ + csz = (DWORD)fs->csize * SS(fs); /* Bytes per cluster */ + while (ofs >= csz) { /* Follow cluster chain */ + clst = get_fat(&dp->obj, clst); /* Get next cluster */ + if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */ + if (clst < 2 || clst >= fs->n_fatent) return FR_INT_ERR; /* Reached to end of table or internal error */ + ofs -= csz; + } + dp->sect = clst2sect(fs, clst); + } + dp->clust = clst; /* Current cluster# */ + if (dp->sect == 0) return FR_INT_ERR; + dp->sect += ofs / SS(fs); /* Sector# of the directory entry */ + dp->dir = fs->win + (ofs % SS(fs)); /* Pointer to the entry in the win[] */ + + return FR_OK; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Directory handling - Move directory table index next */ +/*-----------------------------------------------------------------------*/ + +static FRESULT dir_next ( /* FR_OK(0):succeeded, FR_NO_FILE:End of table, FR_DENIED:Could not stretch */ + DIR* dp, /* Pointer to the directory object */ + int stretch /* 0: Do not stretch table, 1: Stretch table if needed */ +) +{ + DWORD ofs, clst; + FATFS *fs = dp->obj.fs; + + + ofs = dp->dptr + SZDIRE; /* Next entry */ + if (ofs >= (DWORD)((FF_FS_EXFAT && fs->fs_type == FS_EXFAT) ? MAX_DIR_EX : MAX_DIR)) dp->sect = 0; /* Disable it if the offset reached the max value */ + if (dp->sect == 0) return FR_NO_FILE; /* Report EOT if it has been disabled */ + + if (ofs % SS(fs) == 0) { /* Sector changed? */ + dp->sect++; /* Next sector */ + + if (dp->clust == 0) { /* Static table */ + if (ofs / SZDIRE >= fs->n_rootdir) { /* Report EOT if it reached end of static table */ + dp->sect = 0; return FR_NO_FILE; + } + } + else { /* Dynamic table */ + if ((ofs / SS(fs) & (fs->csize - 1)) == 0) { /* Cluster changed? */ + clst = get_fat(&dp->obj, dp->clust); /* Get next cluster */ + if (clst <= 1) return FR_INT_ERR; /* Internal error */ + if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */ + if (clst >= fs->n_fatent) { /* It reached end of dynamic table */ +#if !FF_FS_READONLY + if (!stretch) { /* If no stretch, report EOT */ + dp->sect = 0; return FR_NO_FILE; + } + clst = create_chain(&dp->obj, dp->clust); /* Allocate a cluster */ + if (clst == 0) return FR_DENIED; /* No free cluster */ + if (clst == 1) return FR_INT_ERR; /* Internal error */ + if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */ + if (dir_clear(fs, clst) != FR_OK) return FR_DISK_ERR; /* Clean up the stretched table */ + if (FF_FS_EXFAT) dp->obj.stat |= 4; /* exFAT: The directory has been stretched */ +#else + if (!stretch) dp->sect = 0; /* (this line is to suppress compiler warning) */ + dp->sect = 0; return FR_NO_FILE; /* Report EOT */ +#endif + } + dp->clust = clst; /* Initialize data for new cluster */ + dp->sect = clst2sect(fs, clst); + } + } + } + dp->dptr = ofs; /* Current entry */ + dp->dir = fs->win + ofs % SS(fs); /* Pointer to the entry in the win[] */ + + return FR_OK; +} + + + + +#if !FF_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* Directory handling - Reserve a block of directory entries */ +/*-----------------------------------------------------------------------*/ + +static FRESULT dir_alloc ( /* FR_OK(0):succeeded, !=0:error */ + DIR* dp, /* Pointer to the directory object */ + UINT nent /* Number of contiguous entries to allocate */ +) +{ + FRESULT res; + UINT n; + FATFS *fs = dp->obj.fs; + + + res = dir_sdi(dp, 0); + if (res == FR_OK) { + n = 0; + do { + res = move_window(fs, dp->sect); + if (res != FR_OK) break; +#if FF_FS_EXFAT + if ((fs->fs_type == FS_EXFAT) ? (int)((dp->dir[XDIR_Type] & 0x80) == 0) : (int)(dp->dir[DIR_Name] == DDEM || dp->dir[DIR_Name] == 0)) { +#else + if (dp->dir[DIR_Name] == DDEM || dp->dir[DIR_Name] == 0) { +#endif + if (++n == nent) break; /* A block of contiguous free entries is found */ + } else { + n = 0; /* Not a blank entry. Restart to search */ + } + res = dir_next(dp, 1); + } while (res == FR_OK); /* Next entry with table stretch enabled */ + } + + if (res == FR_NO_FILE) res = FR_DENIED; /* No directory entry to allocate */ + return res; +} + +#endif /* !FF_FS_READONLY */ + + + + +/*-----------------------------------------------------------------------*/ +/* FAT: Directory handling - Load/Store start cluster number */ +/*-----------------------------------------------------------------------*/ + +static DWORD ld_clust ( /* Returns the top cluster value of the SFN entry */ + FATFS* fs, /* Pointer to the fs object */ + const BYTE* dir /* Pointer to the key entry */ +) +{ + DWORD cl; + + cl = ld_word(dir + DIR_FstClusLO); + if (fs->fs_type == FS_FAT32) { + cl |= (DWORD)ld_word(dir + DIR_FstClusHI) << 16; + } + + return cl; +} + + +#if !FF_FS_READONLY +static void st_clust ( + FATFS* fs, /* Pointer to the fs object */ + BYTE* dir, /* Pointer to the key entry */ + DWORD cl /* Value to be set */ +) +{ + st_word(dir + DIR_FstClusLO, (WORD)cl); + if (fs->fs_type == FS_FAT32) { + st_word(dir + DIR_FstClusHI, (WORD)(cl >> 16)); + } +} +#endif + + + +#if FF_USE_LFN +/*--------------------------------------------------------*/ +/* FAT-LFN: Compare a part of file name with an LFN entry */ +/*--------------------------------------------------------*/ + +static int cmp_lfn ( /* 1:matched, 0:not matched */ + const WCHAR* lfnbuf, /* Pointer to the LFN working buffer to be compared */ + BYTE* dir /* Pointer to the directory entry containing the part of LFN */ +) +{ + UINT i, s; + WCHAR wc, uc; + + + if (ld_word(dir + LDIR_FstClusLO) != 0) return 0; /* Check LDIR_FstClusLO */ + + i = ((dir[LDIR_Ord] & 0x3F) - 1) * 13; /* Offset in the LFN buffer */ + + for (wc = 1, s = 0; s < 13; s++) { /* Process all characters in the entry */ + uc = ld_word(dir + LfnOfs[s]); /* Pick an LFN character */ + if (wc != 0) { + if (i >= FF_MAX_LFN + 1 || ff_wtoupper(uc) != ff_wtoupper(lfnbuf[i++])) { /* Compare it */ + return 0; /* Not matched */ + } + wc = uc; + } else { + if (uc != 0xFFFF) return 0; /* Check filler */ + } + } + + if ((dir[LDIR_Ord] & LLEF) && wc && lfnbuf[i]) return 0; /* Last segment matched but different length */ + + return 1; /* The part of LFN matched */ +} + + +#if FF_FS_MINIMIZE <= 1 || FF_FS_RPATH >= 2 || FF_USE_LABEL || FF_FS_EXFAT +/*-----------------------------------------------------*/ +/* FAT-LFN: Pick a part of file name from an LFN entry */ +/*-----------------------------------------------------*/ + +static int pick_lfn ( /* 1:succeeded, 0:buffer overflow or invalid LFN entry */ + WCHAR* lfnbuf, /* Pointer to the LFN working buffer */ + BYTE* dir /* Pointer to the LFN entry */ +) +{ + UINT i, s; + WCHAR wc, uc; + + + if (ld_word(dir + LDIR_FstClusLO) != 0) return 0; /* Check LDIR_FstClusLO is 0 */ + + i = ((dir[LDIR_Ord] & ~LLEF) - 1) * 13; /* Offset in the LFN buffer */ + + for (wc = 1, s = 0; s < 13; s++) { /* Process all characters in the entry */ + uc = ld_word(dir + LfnOfs[s]); /* Pick an LFN character */ + if (wc != 0) { + if (i >= FF_MAX_LFN + 1) return 0; /* Buffer overflow? */ + lfnbuf[i++] = wc = uc; /* Store it */ + } else { + if (uc != 0xFFFF) return 0; /* Check filler */ + } + } + + if (dir[LDIR_Ord] & LLEF && wc != 0) { /* Put terminator if it is the last LFN part and not terminated */ + if (i >= FF_MAX_LFN + 1) return 0; /* Buffer overflow? */ + lfnbuf[i] = 0; + } + + return 1; /* The part of LFN is valid */ +} +#endif + + +#if !FF_FS_READONLY +/*-----------------------------------------*/ +/* FAT-LFN: Create an entry of LFN entries */ +/*-----------------------------------------*/ + +static void put_lfn ( + const WCHAR* lfn, /* Pointer to the LFN */ + BYTE* dir, /* Pointer to the LFN entry to be created */ + BYTE ord, /* LFN order (1-20) */ + BYTE sum /* Checksum of the corresponding SFN */ +) +{ + UINT i, s; + WCHAR wc; + + + dir[LDIR_Chksum] = sum; /* Set checksum */ + dir[LDIR_Attr] = AM_LFN; /* Set attribute. LFN entry */ + dir[LDIR_Type] = 0; + st_word(dir + LDIR_FstClusLO, 0); + + i = (ord - 1) * 13; /* Get offset in the LFN working buffer */ + s = wc = 0; + do { + if (wc != 0xFFFF) wc = lfn[i++]; /* Get an effective character */ + st_word(dir + LfnOfs[s], wc); /* Put it */ + if (wc == 0) wc = 0xFFFF; /* Padding characters for following items */ + } while (++s < 13); + if (wc == 0xFFFF || !lfn[i]) ord |= LLEF; /* Last LFN part is the start of LFN sequence */ + dir[LDIR_Ord] = ord; /* Set the LFN order */ +} + +#endif /* !FF_FS_READONLY */ +#endif /* FF_USE_LFN */ + + + +#if FF_USE_LFN && !FF_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* FAT-LFN: Create a Numbered SFN */ +/*-----------------------------------------------------------------------*/ + +static void gen_numname ( + BYTE* dst, /* Pointer to the buffer to store numbered SFN */ + const BYTE* src, /* Pointer to SFN */ + const WCHAR* lfn, /* Pointer to LFN */ + UINT seq /* Sequence number */ +) +{ + BYTE ns[8], c; + UINT i, j; + WCHAR wc; + DWORD sreg; + + + mem_cpy(dst, src, 11); + + if (seq > 5) { /* In case of many collisions, generate a hash number instead of sequential number */ + sreg = seq; + while (*lfn) { /* Create a CRC as hash value */ + wc = *lfn++; + for (i = 0; i < 16; i++) { + sreg = (sreg << 1) + (wc & 1); + wc >>= 1; + if (sreg & 0x10000) sreg ^= 0x11021; + } + } + seq = (UINT)sreg; + } + + /* itoa (hexdecimal) */ + i = 7; + do { + c = (BYTE)((seq % 16) + '0'); + if (c > '9') c += 7; + ns[i--] = c; + seq /= 16; + } while (seq); + ns[i] = '~'; + + /* Append the number to the SFN body */ + for (j = 0; j < i && dst[j] != ' '; j++) { + if (dbc_1st(dst[j])) { + if (j == i - 1) break; + j++; + } + } + do { + dst[j++] = (i < 8) ? ns[i++] : ' '; + } while (j < 8); +} +#endif /* FF_USE_LFN && !FF_FS_READONLY */ + + + +#if FF_USE_LFN +/*-----------------------------------------------------------------------*/ +/* FAT-LFN: Calculate checksum of an SFN entry */ +/*-----------------------------------------------------------------------*/ + +static BYTE sum_sfn ( + const BYTE* dir /* Pointer to the SFN entry */ +) +{ + BYTE sum = 0; + UINT n = 11; + + do { + sum = (sum >> 1) + (sum << 7) + *dir++; + } while (--n); + return sum; +} + +#endif /* FF_USE_LFN */ + + + +#if FF_FS_EXFAT +/*-----------------------------------------------------------------------*/ +/* exFAT: Checksum */ +/*-----------------------------------------------------------------------*/ + +static WORD xdir_sum ( /* Get checksum of the directoly entry block */ + const BYTE* dir /* Directory entry block to be calculated */ +) +{ + UINT i, szblk; + WORD sum; + + + szblk = (dir[XDIR_NumSec] + 1) * SZDIRE; /* Number of bytes of the entry block */ + for (i = sum = 0; i < szblk; i++) { + if (i == XDIR_SetSum) { /* Skip 2-byte sum field */ + i++; + } else { + sum = ((sum & 1) ? 0x8000 : 0) + (sum >> 1) + dir[i]; + } + } + return sum; +} + + + +static WORD xname_sum ( /* Get check sum (to be used as hash) of the file name */ + const WCHAR* name /* File name to be calculated */ +) +{ + WCHAR chr; + WORD sum = 0; + + + while ((chr = *name++) != 0) { + chr = (WCHAR)ff_wtoupper(chr); /* File name needs to be up-case converted */ + sum = ((sum & 1) ? 0x8000 : 0) + (sum >> 1) + (chr & 0xFF); + sum = ((sum & 1) ? 0x8000 : 0) + (sum >> 1) + (chr >> 8); + } + return sum; +} + + +#if !FF_FS_READONLY && FF_USE_MKFS +static DWORD xsum32 ( /* Returns 32-bit checksum */ + BYTE dat, /* Byte to be calculated (byte-by-byte processing) */ + DWORD sum /* Previous sum value */ +) +{ + sum = ((sum & 1) ? 0x80000000 : 0) + (sum >> 1) + dat; + return sum; +} +#endif + + +#if FF_FS_MINIMIZE <= 1 || FF_FS_RPATH >= 2 +/*------------------------------------------------------*/ +/* exFAT: Get object information from a directory block */ +/*------------------------------------------------------*/ + +static void get_xfileinfo ( + BYTE* dirb, /* Pointer to the direcotry entry block 85+C0+C1s */ + FILINFO* fno /* Buffer to store the extracted file information */ +) +{ + WCHAR wc, hs; + UINT di, si, nc; + + /* Get file name from the entry block */ + si = SZDIRE * 2; /* 1st C1 entry */ + nc = 0; hs = 0; di = 0; + while (nc < dirb[XDIR_NumName]) { + if (si >= MAXDIRB(FF_MAX_LFN)) { di = 0; break; } /* Truncated directory block? */ + if ((si % SZDIRE) == 0) si += 2; /* Skip entry type field */ + wc = ld_word(dirb + si); si += 2; nc++; /* Get a character */ + if (hs == 0 && IsSurrogate(wc)) { /* Is it a surrogate? */ + hs = wc; continue; /* Get low surrogate */ + } + wc = put_utf((DWORD)hs << 16 | wc, &fno->fname[di], FF_LFN_BUF - di); /* Store it in API encoding */ + if (wc == 0) { di = 0; break; } /* Buffer overflow or wrong encoding? */ + di += wc; + hs = 0; + } + if (hs != 0) di = 0; /* Broken surrogate pair? */ + if (di == 0) fno->fname[di++] = '?'; /* Inaccessible object name? */ + fno->fname[di] = 0; /* Terminate the name */ + fno->altname[0] = 0; /* exFAT does not support SFN */ + + fno->fattrib = dirb[XDIR_Attr]; /* Attribute */ + fno->fsize = (fno->fattrib & AM_DIR) ? 0 : ld_qword(dirb + XDIR_FileSize); /* Size */ + fno->ftime = ld_word(dirb + XDIR_ModTime + 0); /* Time */ + fno->fdate = ld_word(dirb + XDIR_ModTime + 2); /* Date */ +} + +#endif /* FF_FS_MINIMIZE <= 1 || FF_FS_RPATH >= 2 */ + + +/*-----------------------------------*/ +/* exFAT: Get a directry entry block */ +/*-----------------------------------*/ + +static FRESULT load_xdir ( /* FR_INT_ERR: invalid entry block */ + DIR* dp /* Reading direcotry object pointing top of the entry block to load */ +) +{ + FRESULT res; + UINT i, sz_ent; + BYTE* dirb = dp->obj.fs->dirbuf; /* Pointer to the on-memory direcotry entry block 85+C0+C1s */ + + + /* Load file-directory entry */ + res = move_window(dp->obj.fs, dp->sect); + if (res != FR_OK) return res; + if (dp->dir[XDIR_Type] != ET_FILEDIR) return FR_INT_ERR; /* Invalid order */ + mem_cpy(dirb + 0 * SZDIRE, dp->dir, SZDIRE); + sz_ent = (dirb[XDIR_NumSec] + 1) * SZDIRE; + if (sz_ent < 3 * SZDIRE || sz_ent > 19 * SZDIRE) return FR_INT_ERR; + + /* Load stream-extension entry */ + res = dir_next(dp, 0); + if (res == FR_NO_FILE) res = FR_INT_ERR; /* It cannot be */ + if (res != FR_OK) return res; + res = move_window(dp->obj.fs, dp->sect); + if (res != FR_OK) return res; + if (dp->dir[XDIR_Type] != ET_STREAM) return FR_INT_ERR; /* Invalid order */ + mem_cpy(dirb + 1 * SZDIRE, dp->dir, SZDIRE); + if (MAXDIRB(dirb[XDIR_NumName]) > sz_ent) return FR_INT_ERR; + + /* Load file-name entries */ + i = 2 * SZDIRE; /* Name offset to load */ + do { + res = dir_next(dp, 0); + if (res == FR_NO_FILE) res = FR_INT_ERR; /* It cannot be */ + if (res != FR_OK) return res; + res = move_window(dp->obj.fs, dp->sect); + if (res != FR_OK) return res; + if (dp->dir[XDIR_Type] != ET_FILENAME) return FR_INT_ERR; /* Invalid order */ + if (i < MAXDIRB(FF_MAX_LFN)) mem_cpy(dirb + i, dp->dir, SZDIRE); + } while ((i += SZDIRE) < sz_ent); + + /* Sanity check (do it for only accessible object) */ + if (i <= MAXDIRB(FF_MAX_LFN)) { + if (xdir_sum(dirb) != ld_word(dirb + XDIR_SetSum)) return FR_INT_ERR; + } + return FR_OK; +} + + +/*------------------------------------------------------------------*/ +/* exFAT: Initialize object allocation info with loaded entry block */ +/*------------------------------------------------------------------*/ + +static void init_alloc_info ( + FATFS* fs, /* Filesystem object */ + FFOBJID* obj /* Object allocation information to be initialized */ +) +{ + obj->sclust = ld_dword(fs->dirbuf + XDIR_FstClus); /* Start cluster */ + obj->objsize = ld_qword(fs->dirbuf + XDIR_FileSize); /* Size */ + obj->stat = fs->dirbuf[XDIR_GenFlags] & 2; /* Allocation status */ + obj->n_frag = 0; /* No last fragment info */ +} + + + +#if !FF_FS_READONLY || FF_FS_RPATH != 0 +/*------------------------------------------------*/ +/* exFAT: Load the object's directory entry block */ +/*------------------------------------------------*/ + +static FRESULT load_obj_xdir ( + DIR* dp, /* Blank directory object to be used to access containing direcotry */ + const FFOBJID* obj /* Object with its containing directory information */ +) +{ + FRESULT res; + + /* Open object containing directory */ + dp->obj.fs = obj->fs; + dp->obj.sclust = obj->c_scl; + dp->obj.stat = (BYTE)obj->c_size; + dp->obj.objsize = obj->c_size & 0xFFFFFF00; + dp->obj.n_frag = 0; + dp->blk_ofs = obj->c_ofs; + + res = dir_sdi(dp, dp->blk_ofs); /* Goto object's entry block */ + if (res == FR_OK) { + res = load_xdir(dp); /* Load the object's entry block */ + } + return res; +} +#endif + + +#if !FF_FS_READONLY +/*----------------------------------------*/ +/* exFAT: Store the directory entry block */ +/*----------------------------------------*/ + +static FRESULT store_xdir ( + DIR* dp /* Pointer to the direcotry object */ +) +{ + FRESULT res; + UINT nent; + BYTE* dirb = dp->obj.fs->dirbuf; /* Pointer to the direcotry entry block 85+C0+C1s */ + + /* Create set sum */ + st_word(dirb + XDIR_SetSum, xdir_sum(dirb)); + nent = dirb[XDIR_NumSec] + 1; + + /* Store the direcotry entry block to the directory */ + res = dir_sdi(dp, dp->blk_ofs); + while (res == FR_OK) { + res = move_window(dp->obj.fs, dp->sect); + if (res != FR_OK) break; + mem_cpy(dp->dir, dirb, SZDIRE); + dp->obj.fs->wflag = 1; + if (--nent == 0) break; + dirb += SZDIRE; + res = dir_next(dp, 0); + } + return (res == FR_OK || res == FR_DISK_ERR) ? res : FR_INT_ERR; +} + + + +/*-------------------------------------------*/ +/* exFAT: Create a new directory enrty block */ +/*-------------------------------------------*/ + +static void create_xdir ( + BYTE* dirb, /* Pointer to the direcotry entry block buffer */ + const WCHAR* lfn /* Pointer to the object name */ +) +{ + UINT i; + BYTE nc1, nlen; + WCHAR wc; + + + /* Create file-directory and stream-extension entry */ + mem_set(dirb, 0, 2 * SZDIRE); + dirb[0 * SZDIRE + XDIR_Type] = ET_FILEDIR; + dirb[1 * SZDIRE + XDIR_Type] = ET_STREAM; + + /* Create file-name entries */ + i = SZDIRE * 2; /* Top of file_name entries */ + nlen = nc1 = 0; wc = 1; + do { + dirb[i++] = ET_FILENAME; dirb[i++] = 0; + do { /* Fill name field */ + if (wc != 0 && (wc = lfn[nlen]) != 0) nlen++; /* Get a character if exist */ + st_word(dirb + i, wc); /* Store it */ + i += 2; + } while (i % SZDIRE != 0); + nc1++; + } while (lfn[nlen]); /* Fill next entry if any char follows */ + + dirb[XDIR_NumName] = nlen; /* Set name length */ + dirb[XDIR_NumSec] = 1 + nc1; /* Set secondary count (C0 + C1s) */ + st_word(dirb + XDIR_NameHash, xname_sum(lfn)); /* Set name hash */ +} + +#endif /* !FF_FS_READONLY */ +#endif /* FF_FS_EXFAT */ + + + +#if FF_FS_MINIMIZE <= 1 || FF_FS_RPATH >= 2 || FF_USE_LABEL || FF_FS_EXFAT +/*-----------------------------------------------------------------------*/ +/* Read an object from the directory */ +/*-----------------------------------------------------------------------*/ + +#define DIR_READ_FILE(dp) dir_read(dp, 0) +#define DIR_READ_LABEL(dp) dir_read(dp, 1) + +static FRESULT dir_read ( + DIR* dp, /* Pointer to the directory object */ + int vol /* Filtered by 0:file/directory or 1:volume label */ +) +{ + FRESULT res = FR_NO_FILE; + FATFS *fs = dp->obj.fs; + BYTE attr, b; +#if FF_USE_LFN + BYTE ord = 0xFF, sum = 0xFF; +#endif + + while (dp->sect) { + res = move_window(fs, dp->sect); + if (res != FR_OK) break; + b = dp->dir[DIR_Name]; /* Test for the entry type */ + if (b == 0) { + res = FR_NO_FILE; break; /* Reached to end of the directory */ + } +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { /* On the exFAT volume */ + if (FF_USE_LABEL && vol) { + if (b == ET_VLABEL) break; /* Volume label entry? */ + } else { + if (b == ET_FILEDIR) { /* Start of the file entry block? */ + dp->blk_ofs = dp->dptr; /* Get location of the block */ + res = load_xdir(dp); /* Load the entry block */ + if (res == FR_OK) { + dp->obj.attr = fs->dirbuf[XDIR_Attr] & AM_MASK; /* Get attribute */ + } + break; + } + } + } else +#endif + { /* On the FAT/FAT32 volume */ + dp->obj.attr = attr = dp->dir[DIR_Attr] & AM_MASK; /* Get attribute */ +#if FF_USE_LFN /* LFN configuration */ + if (b == DDEM || b == '.' || (int)((attr & ~AM_ARC) == AM_VOL) != vol) { /* An entry without valid data */ + ord = 0xFF; + } else { + if (attr == AM_LFN) { /* An LFN entry is found */ + if (b & LLEF) { /* Is it start of an LFN sequence? */ + sum = dp->dir[LDIR_Chksum]; + b &= (BYTE)~LLEF; ord = b; + dp->blk_ofs = dp->dptr; + } + /* Check LFN validity and capture it */ + ord = (b == ord && sum == dp->dir[LDIR_Chksum] && pick_lfn(fs->lfnbuf, dp->dir)) ? ord - 1 : 0xFF; + } else { /* An SFN entry is found */ + if (ord != 0 || sum != sum_sfn(dp->dir)) { /* Is there a valid LFN? */ + dp->blk_ofs = 0xFFFFFFFF; /* It has no LFN. */ + } + break; + } + } +#else /* Non LFN configuration */ + if (b != DDEM && b != '.' && attr != AM_LFN && (int)((attr & ~AM_ARC) == AM_VOL) == vol) { /* Is it a valid entry? */ + break; + } +#endif + } + res = dir_next(dp, 0); /* Next entry */ + if (res != FR_OK) break; + } + + if (res != FR_OK) dp->sect = 0; /* Terminate the read operation on error or EOT */ + return res; +} + +#endif /* FF_FS_MINIMIZE <= 1 || FF_USE_LABEL || FF_FS_RPATH >= 2 */ + + + +/*-----------------------------------------------------------------------*/ +/* Directory handling - Find an object in the directory */ +/*-----------------------------------------------------------------------*/ + +static FRESULT dir_find ( /* FR_OK(0):succeeded, !=0:error */ + DIR* dp /* Pointer to the directory object with the file name */ +) +{ + FRESULT res; + FATFS *fs = dp->obj.fs; + BYTE c; +#if FF_USE_LFN + BYTE a, ord, sum; +#endif + + res = dir_sdi(dp, 0); /* Rewind directory object */ + if (res != FR_OK) return res; +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { /* On the exFAT volume */ + BYTE nc; + UINT di, ni; + WORD hash = xname_sum(fs->lfnbuf); /* Hash value of the name to find */ + + while ((res = DIR_READ_FILE(dp)) == FR_OK) { /* Read an item */ +#if FF_MAX_LFN < 255 + if (fs->dirbuf[XDIR_NumName] > FF_MAX_LFN) continue; /* Skip comparison if inaccessible object name */ +#endif + if (ld_word(fs->dirbuf + XDIR_NameHash) != hash) continue; /* Skip comparison if hash mismatched */ + for (nc = fs->dirbuf[XDIR_NumName], di = SZDIRE * 2, ni = 0; nc; nc--, di += 2, ni++) { /* Compare the name */ + if ((di % SZDIRE) == 0) di += 2; + if (ff_wtoupper(ld_word(fs->dirbuf + di)) != ff_wtoupper(fs->lfnbuf[ni])) break; + } + if (nc == 0 && !fs->lfnbuf[ni]) break; /* Name matched? */ + } + return res; + } +#endif + /* On the FAT/FAT32 volume */ +#if FF_USE_LFN + ord = sum = 0xFF; dp->blk_ofs = 0xFFFFFFFF; /* Reset LFN sequence */ +#endif + do { + res = move_window(fs, dp->sect); + if (res != FR_OK) break; + c = dp->dir[DIR_Name]; + if (c == 0) { res = FR_NO_FILE; break; } /* Reached to end of table */ +#if FF_USE_LFN /* LFN configuration */ + dp->obj.attr = a = dp->dir[DIR_Attr] & AM_MASK; + if (c == DDEM || ((a & AM_VOL) && a != AM_LFN)) { /* An entry without valid data */ + ord = 0xFF; dp->blk_ofs = 0xFFFFFFFF; /* Reset LFN sequence */ + } else { + if (a == AM_LFN) { /* An LFN entry is found */ + if (!(dp->fn[NSFLAG] & NS_NOLFN)) { + if (c & LLEF) { /* Is it start of LFN sequence? */ + sum = dp->dir[LDIR_Chksum]; + c &= (BYTE)~LLEF; ord = c; /* LFN start order */ + dp->blk_ofs = dp->dptr; /* Start offset of LFN */ + } + /* Check validity of the LFN entry and compare it with given name */ + ord = (c == ord && sum == dp->dir[LDIR_Chksum] && cmp_lfn(fs->lfnbuf, dp->dir)) ? ord - 1 : 0xFF; + } + } else { /* An SFN entry is found */ + if (ord == 0 && sum == sum_sfn(dp->dir)) break; /* LFN matched? */ + if (!(dp->fn[NSFLAG] & NS_LOSS) && !mem_cmp(dp->dir, dp->fn, 11)) break; /* SFN matched? */ + ord = 0xFF; dp->blk_ofs = 0xFFFFFFFF; /* Reset LFN sequence */ + } + } +#else /* Non LFN configuration */ + dp->obj.attr = dp->dir[DIR_Attr] & AM_MASK; + if (!(dp->dir[DIR_Attr] & AM_VOL) && !mem_cmp(dp->dir, dp->fn, 11)) break; /* Is it a valid entry? */ +#endif + res = dir_next(dp, 0); /* Next entry */ + } while (res == FR_OK); + + return res; +} + + + + +#if !FF_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* Register an object to the directory */ +/*-----------------------------------------------------------------------*/ + +static FRESULT dir_register ( /* FR_OK:succeeded, FR_DENIED:no free entry or too many SFN collision, FR_DISK_ERR:disk error */ + DIR* dp /* Target directory with object name to be created */ +) +{ + FRESULT res; + FATFS *fs = dp->obj.fs; +#if FF_USE_LFN /* LFN configuration */ + UINT n, nlen, nent; + BYTE sn[12], sum; + + + if (dp->fn[NSFLAG] & (NS_DOT | NS_NONAME)) return FR_INVALID_NAME; /* Check name validity */ + for (nlen = 0; fs->lfnbuf[nlen]; nlen++) ; /* Get lfn length */ + +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { /* On the exFAT volume */ + nent = (nlen + 14) / 15 + 2; /* Number of entries to allocate (85+C0+C1s) */ + res = dir_alloc(dp, nent); /* Allocate directory entries */ + if (res != FR_OK) return res; + dp->blk_ofs = dp->dptr - SZDIRE * (nent - 1); /* Set the allocated entry block offset */ + + if (dp->obj.stat & 4) { /* Has the directory been stretched by new allocation? */ + dp->obj.stat &= ~4; + res = fill_first_frag(&dp->obj); /* Fill the first fragment on the FAT if needed */ + if (res != FR_OK) return res; + res = fill_last_frag(&dp->obj, dp->clust, 0xFFFFFFFF); /* Fill the last fragment on the FAT if needed */ + if (res != FR_OK) return res; + if (dp->obj.sclust != 0) { /* Is it a sub-directory? */ + DIR dj; + + res = load_obj_xdir(&dj, &dp->obj); /* Load the object status */ + if (res != FR_OK) return res; + dp->obj.objsize += (DWORD)fs->csize * SS(fs); /* Increase the directory size by cluster size */ + st_qword(fs->dirbuf + XDIR_FileSize, dp->obj.objsize); + st_qword(fs->dirbuf + XDIR_ValidFileSize, dp->obj.objsize); + fs->dirbuf[XDIR_GenFlags] = dp->obj.stat | 1; /* Update the allocation status */ + res = store_xdir(&dj); /* Store the object status */ + if (res != FR_OK) return res; + } + } + + create_xdir(fs->dirbuf, fs->lfnbuf); /* Create on-memory directory block to be written later */ + return FR_OK; + } +#endif + /* On the FAT/FAT32 volume */ + mem_cpy(sn, dp->fn, 12); + if (sn[NSFLAG] & NS_LOSS) { /* When LFN is out of 8.3 format, generate a numbered name */ + dp->fn[NSFLAG] = NS_NOLFN; /* Find only SFN */ + for (n = 1; n < 100; n++) { + gen_numname(dp->fn, sn, fs->lfnbuf, n); /* Generate a numbered name */ + res = dir_find(dp); /* Check if the name collides with existing SFN */ + if (res != FR_OK) break; + } + if (n == 100) return FR_DENIED; /* Abort if too many collisions */ + if (res != FR_NO_FILE) return res; /* Abort if the result is other than 'not collided' */ + dp->fn[NSFLAG] = sn[NSFLAG]; + } + + /* Create an SFN with/without LFNs. */ + nent = (sn[NSFLAG] & NS_LFN) ? (nlen + 12) / 13 + 1 : 1; /* Number of entries to allocate */ + res = dir_alloc(dp, nent); /* Allocate entries */ + if (res == FR_OK && --nent) { /* Set LFN entry if needed */ + res = dir_sdi(dp, dp->dptr - nent * SZDIRE); + if (res == FR_OK) { + sum = sum_sfn(dp->fn); /* Checksum value of the SFN tied to the LFN */ + do { /* Store LFN entries in bottom first */ + res = move_window(fs, dp->sect); + if (res != FR_OK) break; + put_lfn(fs->lfnbuf, dp->dir, (BYTE)nent, sum); + fs->wflag = 1; + res = dir_next(dp, 0); /* Next entry */ + } while (res == FR_OK && --nent); + } + } + +#else /* Non LFN configuration */ + res = dir_alloc(dp, 1); /* Allocate an entry for SFN */ + +#endif + + /* Set SFN entry */ + if (res == FR_OK) { + res = move_window(fs, dp->sect); + if (res == FR_OK) { + mem_set(dp->dir, 0, SZDIRE); /* Clean the entry */ + mem_cpy(dp->dir + DIR_Name, dp->fn, 11); /* Put SFN */ +#if FF_USE_LFN + dp->dir[DIR_NTres] = dp->fn[NSFLAG] & (NS_BODY | NS_EXT); /* Put NT flag */ +#endif + fs->wflag = 1; + } + } + + return res; +} + +#endif /* !FF_FS_READONLY */ + + + +#if !FF_FS_READONLY && FF_FS_MINIMIZE == 0 +/*-----------------------------------------------------------------------*/ +/* Remove an object from the directory */ +/*-----------------------------------------------------------------------*/ + +static FRESULT dir_remove ( /* FR_OK:Succeeded, FR_DISK_ERR:A disk error */ + DIR* dp /* Directory object pointing the entry to be removed */ +) +{ + FRESULT res; + FATFS *fs = dp->obj.fs; +#if FF_USE_LFN /* LFN configuration */ + DWORD last = dp->dptr; + + res = (dp->blk_ofs == 0xFFFFFFFF) ? FR_OK : dir_sdi(dp, dp->blk_ofs); /* Goto top of the entry block if LFN is exist */ + if (res == FR_OK) { + do { + res = move_window(fs, dp->sect); + if (res != FR_OK) break; + if (FF_FS_EXFAT && fs->fs_type == FS_EXFAT) { /* On the exFAT volume */ + dp->dir[XDIR_Type] &= 0x7F; /* Clear the entry InUse flag. */ + } else { /* On the FAT/FAT32 volume */ + dp->dir[DIR_Name] = DDEM; /* Mark the entry 'deleted'. */ + } + fs->wflag = 1; + if (dp->dptr >= last) break; /* If reached last entry then all entries of the object has been deleted. */ + res = dir_next(dp, 0); /* Next entry */ + } while (res == FR_OK); + if (res == FR_NO_FILE) res = FR_INT_ERR; + } +#else /* Non LFN configuration */ + + res = move_window(fs, dp->sect); + if (res == FR_OK) { + dp->dir[DIR_Name] = DDEM; /* Mark the entry 'deleted'.*/ + fs->wflag = 1; + } +#endif + + return res; +} + +#endif /* !FF_FS_READONLY && FF_FS_MINIMIZE == 0 */ + + + +#if FF_FS_MINIMIZE <= 1 || FF_FS_RPATH >= 2 +/*-----------------------------------------------------------------------*/ +/* Get file information from directory entry */ +/*-----------------------------------------------------------------------*/ + +static void get_fileinfo ( + DIR* dp, /* Pointer to the directory object */ + FILINFO* fno /* Pointer to the file information to be filled */ +) +{ + UINT si, di; +#if FF_USE_LFN + BYTE lcf; + WCHAR wc, hs; + FATFS *fs = dp->obj.fs; +#else + TCHAR c; +#endif + + + fno->fname[0] = 0; /* Invaidate file info */ + if (dp->sect == 0) return; /* Exit if read pointer has reached end of directory */ + +#if FF_USE_LFN /* LFN configuration */ +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { /* On the exFAT volume */ + get_xfileinfo(fs->dirbuf, fno); + return; + } else +#endif + { /* On the FAT/FAT32 volume */ + if (dp->blk_ofs != 0xFFFFFFFF) { /* Get LFN if available */ + si = di = hs = 0; + while (fs->lfnbuf[si] != 0) { + wc = fs->lfnbuf[si++]; /* Get an LFN character (UTF-16) */ + if (hs == 0 && IsSurrogate(wc)) { /* Is it a surrogate? */ + hs = wc; continue; /* Get low surrogate */ + } + wc = put_utf((DWORD)hs << 16 | wc, &fno->fname[di], FF_LFN_BUF - di); /* Store it in UTF-16 or UTF-8 encoding */ + if (wc == 0) { di = 0; break; } /* Invalid char or buffer overflow? */ + di += wc; + hs = 0; + } + if (hs != 0) di = 0; /* Broken surrogate pair? */ + fno->fname[di] = 0; /* Terminate the LFN (null string means LFN is invalid) */ + } + } + + si = di = 0; + while (si < 11) { /* Get SFN from SFN entry */ + wc = dp->dir[si++]; /* Get a char */ + if (wc == ' ') continue; /* Skip padding spaces */ + if (wc == RDDEM) wc = DDEM; /* Restore replaced DDEM character */ + if (si == 9 && di < FF_SFN_BUF) fno->altname[di++] = '.'; /* Insert a . if extension is exist */ +#if FF_LFN_UNICODE >= 1 /* Unicode output */ + if (dbc_1st((BYTE)wc) && si != 8 && si != 11 && dbc_2nd(dp->dir[si])) { /* Make a DBC if needed */ + wc = wc << 8 | dp->dir[si++]; + } + wc = ff_oem2uni(wc, CODEPAGE); /* ANSI/OEM -> Unicode */ + if (wc == 0) { di = 0; break; } /* Wrong char in the current code page? */ + wc = put_utf(wc, &fno->altname[di], FF_SFN_BUF - di); /* Store it in Unicode */ + if (wc == 0) { di = 0; break; } /* Buffer overflow? */ + di += wc; +#else /* ANSI/OEM output */ + fno->altname[di++] = (TCHAR)wc; /* Store it without any conversion */ +#endif + } + fno->altname[di] = 0; /* Terminate the SFN (null string means SFN is invalid) */ + + if (fno->fname[0] == 0) { /* If LFN is invalid, altname[] needs to be copied to fname[] */ + if (di == 0) { /* If LFN and SFN both are invalid, this object is inaccesible */ + fno->fname[di++] = '?'; + } else { + for (si = di = 0, lcf = NS_BODY; fno->altname[si]; si++, di++) { /* Copy altname[] to fname[] with case information */ + wc = (WCHAR)fno->altname[si]; + if (wc == '.') lcf = NS_EXT; + if (IsUpper(wc) && (dp->dir[DIR_NTres] & lcf)) wc += 0x20; + fno->fname[di] = (TCHAR)wc; + } + } + fno->fname[di] = 0; /* Terminate the LFN */ + if (!dp->dir[DIR_NTres]) fno->altname[0] = 0; /* Altname is not needed if neither LFN nor case info is exist. */ + } + +#else /* Non-LFN configuration */ + si = di = 0; + while (si < 11) { /* Copy name body and extension */ + c = (TCHAR)dp->dir[si++]; + if (c == ' ') continue; /* Skip padding spaces */ + if (c == RDDEM) c = DDEM; /* Restore replaced DDEM character */ + if (si == 9) fno->fname[di++] = '.';/* Insert a . if extension is exist */ + fno->fname[di++] = c; + } + fno->fname[di] = 0; +#endif + + fno->fattrib = dp->dir[DIR_Attr]; /* Attribute */ + fno->fsize = ld_dword(dp->dir + DIR_FileSize); /* Size */ + fno->ftime = ld_word(dp->dir + DIR_ModTime + 0); /* Time */ + fno->fdate = ld_word(dp->dir + DIR_ModTime + 2); /* Date */ +} + +#endif /* FF_FS_MINIMIZE <= 1 || FF_FS_RPATH >= 2 */ + + + +#if FF_USE_FIND && FF_FS_MINIMIZE <= 1 +/*-----------------------------------------------------------------------*/ +/* Pattern matching */ +/*-----------------------------------------------------------------------*/ + +static DWORD get_achar ( /* Get a character and advances ptr */ + const TCHAR** ptr /* Pointer to pointer to the ANSI/OEM or Unicode string */ +) +{ + DWORD chr; + + +#if FF_USE_LFN && FF_LFN_UNICODE >= 1 /* Unicode input */ + chr = tchar2uni(ptr); + if (chr == 0xFFFFFFFF) chr = 0; /* Wrong UTF encoding is recognized as end of the string */ + chr = ff_wtoupper(chr); + +#else /* ANSI/OEM input */ + chr = (BYTE)*(*ptr)++; /* Get a byte */ + if (IsLower(chr)) chr -= 0x20; /* To upper ASCII char */ +#if FF_CODE_PAGE == 0 + if (ExCvt && chr >= 0x80) chr = ExCvt[chr - 0x80]; /* To upper SBCS extended char */ +#elif FF_CODE_PAGE < 900 + if (chr >= 0x80) chr = ExCvt[chr - 0x80]; /* To upper SBCS extended char */ +#endif +#if FF_CODE_PAGE == 0 || FF_CODE_PAGE >= 900 + if (dbc_1st((BYTE)chr)) { /* Get DBC 2nd byte if needed */ + chr = dbc_2nd((BYTE)**ptr) ? chr << 8 | (BYTE)*(*ptr)++ : 0; + } +#endif + +#endif + return chr; +} + + +static int pattern_matching ( /* 0:not matched, 1:matched */ + const TCHAR* pat, /* Matching pattern */ + const TCHAR* nam, /* String to be tested */ + int skip, /* Number of pre-skip chars (number of ?s) */ + int inf /* Infinite search (* specified) */ +) +{ + const TCHAR *pp, *np; + DWORD pc, nc; + int nm, nx; + + + while (skip--) { /* Pre-skip name chars */ + if (!get_achar(&nam)) return 0; /* Branch mismatched if less name chars */ + } + if (*pat == 0 && inf) return 1; /* (short circuit) */ + + do { + pp = pat; np = nam; /* Top of pattern and name to match */ + for (;;) { + if (*pp == '?' || *pp == '*') { /* Wildcard? */ + nm = nx = 0; + do { /* Analyze the wildcard block */ + if (*pp++ == '?') nm++; else nx = 1; + } while (*pp == '?' || *pp == '*'); + if (pattern_matching(pp, np, nm, nx)) return 1; /* Test new branch (recurs upto number of wildcard blocks in the pattern) */ + nc = *np; break; /* Branch mismatched */ + } + pc = get_achar(&pp); /* Get a pattern char */ + nc = get_achar(&np); /* Get a name char */ + if (pc != nc) break; /* Branch mismatched? */ + if (pc == 0) return 1; /* Branch matched? (matched at end of both strings) */ + } + get_achar(&nam); /* nam++ */ + } while (inf && nc); /* Retry until end of name if infinite search is specified */ + + return 0; +} + +#endif /* FF_USE_FIND && FF_FS_MINIMIZE <= 1 */ + + + +/*-----------------------------------------------------------------------*/ +/* Pick a top segment and create the object name in directory form */ +/*-----------------------------------------------------------------------*/ + +static FRESULT create_name ( /* FR_OK: successful, FR_INVALID_NAME: could not create */ + DIR* dp, /* Pointer to the directory object */ + const TCHAR** path /* Pointer to pointer to the segment in the path string */ +) +{ +#if FF_USE_LFN /* LFN configuration */ + BYTE b, cf; + WCHAR wc, *lfn; + DWORD uc; + UINT i, ni, si, di; + const TCHAR *p; + + + /* Create LFN into LFN working buffer */ + p = *path; lfn = dp->obj.fs->lfnbuf; di = 0; + for (;;) { + uc = tchar2uni(&p); /* Get a character */ + if (uc == 0xFFFFFFFF) return FR_INVALID_NAME; /* Invalid code or UTF decode error */ + if (uc >= 0x10000) lfn[di++] = (WCHAR)(uc >> 16); /* Store high surrogate if needed */ + wc = (WCHAR)uc; + if (wc < ' ' || wc == '/' || wc == '\\') break; /* Break if end of the path or a separator is found */ + if (wc < 0x80 && chk_chr("\"*:<>\?|\x7F", wc)) return FR_INVALID_NAME; /* Reject illegal characters for LFN */ + if (di >= FF_MAX_LFN) return FR_INVALID_NAME; /* Reject too long name */ + lfn[di++] = wc; /* Store the Unicode character */ + } + if (wc < ' ') { /* End of path? */ + cf = NS_LAST; /* Set last segment flag */ + } else { + cf = 0; /* Next segment follows */ + while (*p == '/' || *p == '\\') p++; /* Skip duplicated separators if exist */ + } + *path = p; /* Return pointer to the next segment */ + +#if FF_FS_RPATH != 0 + if ((di == 1 && lfn[di - 1] == '.') || + (di == 2 && lfn[di - 1] == '.' && lfn[di - 2] == '.')) { /* Is this segment a dot name? */ + lfn[di] = 0; + for (i = 0; i < 11; i++) { /* Create dot name for SFN entry */ + dp->fn[i] = (i < di) ? '.' : ' '; + } + dp->fn[i] = cf | NS_DOT; /* This is a dot entry */ + return FR_OK; + } +#endif + while (di) { /* Snip off trailing spaces and dots if exist */ + wc = lfn[di - 1]; + if (wc != ' ' && wc != '.') break; + di--; + } + lfn[di] = 0; /* LFN is created into the working buffer */ + if (di == 0) return FR_INVALID_NAME; /* Reject null name */ + + /* Create SFN in directory form */ + for (si = 0; lfn[si] == ' '; si++) ; /* Remove leading spaces */ + if (si > 0 || lfn[si] == '.') cf |= NS_LOSS | NS_LFN; /* Is there any leading space or dot? */ + while (di > 0 && lfn[di - 1] != '.') di--; /* Find last dot (di<=si: no extension) */ + + mem_set(dp->fn, ' ', 11); + i = b = 0; ni = 8; + for (;;) { + wc = lfn[si++]; /* Get an LFN character */ + if (wc == 0) break; /* Break on end of the LFN */ + if (wc == ' ' || (wc == '.' && si != di)) { /* Remove embedded spaces and dots */ + cf |= NS_LOSS | NS_LFN; + continue; + } + + if (i >= ni || si == di) { /* End of field? */ + if (ni == 11) { /* Name extension overflow? */ + cf |= NS_LOSS | NS_LFN; + break; + } + if (si != di) cf |= NS_LOSS | NS_LFN; /* Name body overflow? */ + if (si > di) break; /* No name extension? */ + si = di; i = 8; ni = 11; b <<= 2; /* Enter name extension */ + continue; + } + + if (wc >= 0x80) { /* Is this a non-ASCII character? */ + cf |= NS_LFN; /* LFN entry needs to be created */ +#if FF_CODE_PAGE == 0 + if (ExCvt) { /* At SBCS */ + wc = ff_uni2oem(wc, CODEPAGE); /* Unicode ==> ANSI/OEM code */ + if (wc & 0x80) wc = ExCvt[wc & 0x7F]; /* Convert extended character to upper (SBCS) */ + } else { /* At DBCS */ + wc = ff_uni2oem(ff_wtoupper(wc), CODEPAGE); /* Unicode ==> Upper convert ==> ANSI/OEM code */ + } +#elif FF_CODE_PAGE < 900 /* SBCS cfg */ + wc = ff_uni2oem(wc, CODEPAGE); /* Unicode ==> ANSI/OEM code */ + if (wc & 0x80) wc = ExCvt[wc & 0x7F]; /* Convert extended character to upper (SBCS) */ +#else /* DBCS cfg */ + wc = ff_uni2oem(ff_wtoupper(wc), CODEPAGE); /* Unicode ==> Upper convert ==> ANSI/OEM code */ +#endif + } + + if (wc >= 0x100) { /* Is this a DBC? */ + if (i >= ni - 1) { /* Field overflow? */ + cf |= NS_LOSS | NS_LFN; + i = ni; continue; /* Next field */ + } + dp->fn[i++] = (BYTE)(wc >> 8); /* Put 1st byte */ + } else { /* SBC */ + if (wc == 0 || chk_chr("+,;=[]", wc)) { /* Replace illegal characters for SFN if needed */ + wc = '_'; cf |= NS_LOSS | NS_LFN;/* Lossy conversion */ + } else { + if (IsUpper(wc)) { /* ASCII upper case? */ + b |= 2; + } + if (IsLower(wc)) { /* ASCII lower case? */ + b |= 1; wc -= 0x20; + } + } + } + dp->fn[i++] = (BYTE)wc; + } + + if (dp->fn[0] == DDEM) dp->fn[0] = RDDEM; /* If the first character collides with DDEM, replace it with RDDEM */ + + if (ni == 8) b <<= 2; /* Shift capital flags if no extension */ + if ((b & 0x0C) == 0x0C || (b & 0x03) == 0x03) cf |= NS_LFN; /* LFN entry needs to be created if composite capitals */ + if (!(cf & NS_LFN)) { /* When LFN is in 8.3 format without extended character, NT flags are created */ + if (b & 0x01) cf |= NS_EXT; /* NT flag (Extension has small capital letters only) */ + if (b & 0x04) cf |= NS_BODY; /* NT flag (Body has small capital letters only) */ + } + + dp->fn[NSFLAG] = cf; /* SFN is created into dp->fn[] */ + + return FR_OK; + + +#else /* FF_USE_LFN : Non-LFN configuration */ + BYTE c, d, *sfn; + UINT ni, si, i; + const char *p; + + /* Create file name in directory form */ + p = *path; sfn = dp->fn; + mem_set(sfn, ' ', 11); + si = i = 0; ni = 8; +#if FF_FS_RPATH != 0 + if (p[si] == '.') { /* Is this a dot entry? */ + for (;;) { + c = (BYTE)p[si++]; + if (c != '.' || si >= 3) break; + sfn[i++] = c; + } + if (c != '/' && c != '\\' && c > ' ') return FR_INVALID_NAME; + *path = p + si; /* Return pointer to the next segment */ + sfn[NSFLAG] = (c <= ' ') ? NS_LAST | NS_DOT : NS_DOT; /* Set last segment flag if end of the path */ + return FR_OK; + } +#endif + for (;;) { + c = (BYTE)p[si++]; /* Get a byte */ + if (c <= ' ') break; /* Break if end of the path name */ + if (c == '/' || c == '\\') { /* Break if a separator is found */ + while (p[si] == '/' || p[si] == '\\') si++; /* Skip duplicated separator if exist */ + break; + } + if (c == '.' || i >= ni) { /* End of body or field overflow? */ + if (ni == 11 || c != '.') return FR_INVALID_NAME; /* Field overflow or invalid dot? */ + i = 8; ni = 11; /* Enter file extension field */ + continue; + } +#if FF_CODE_PAGE == 0 + if (ExCvt && c >= 0x80) { /* Is SBC extended character? */ + c = ExCvt[c & 0x7F]; /* To upper SBC extended character */ + } +#elif FF_CODE_PAGE < 900 + if (c >= 0x80) { /* Is SBC extended character? */ + c = ExCvt[c & 0x7F]; /* To upper SBC extended character */ + } +#endif + if (dbc_1st(c)) { /* Check if it is a DBC 1st byte */ + d = (BYTE)p[si++]; /* Get 2nd byte */ + if (!dbc_2nd(d) || i >= ni - 1) return FR_INVALID_NAME; /* Reject invalid DBC */ + sfn[i++] = c; + sfn[i++] = d; + } else { /* SBC */ + if (chk_chr("\"*+,:;<=>\?[]|\x7F", c)) return FR_INVALID_NAME; /* Reject illegal chrs for SFN */ + if (IsLower(c)) c -= 0x20; /* To upper */ + sfn[i++] = c; + } + } + *path = p + si; /* Return pointer to the next segment */ + if (i == 0) return FR_INVALID_NAME; /* Reject nul string */ + + if (sfn[0] == DDEM) sfn[0] = RDDEM; /* If the first character collides with DDEM, replace it with RDDEM */ + sfn[NSFLAG] = (c <= ' ') ? NS_LAST : 0; /* Set last segment flag if end of the path */ + + return FR_OK; +#endif /* FF_USE_LFN */ +} + + + + +/*-----------------------------------------------------------------------*/ +/* Follow a file path */ +/*-----------------------------------------------------------------------*/ + +static FRESULT follow_path ( /* FR_OK(0): successful, !=0: error code */ + DIR* dp, /* Directory object to return last directory and found object */ + const TCHAR* path /* Full-path string to find a file or directory */ +) +{ + FRESULT res; + BYTE ns; + FATFS *fs = dp->obj.fs; + + +#if FF_FS_RPATH != 0 + if (*path != '/' && *path != '\\') { /* Without heading separator */ + dp->obj.sclust = fs->cdir; /* Start from current directory */ + } else +#endif + { /* With heading separator */ + while (*path == '/' || *path == '\\') path++; /* Strip heading separator */ + dp->obj.sclust = 0; /* Start from root directory */ + } +#if FF_FS_EXFAT + dp->obj.n_frag = 0; /* Invalidate last fragment counter of the object */ +#if FF_FS_RPATH != 0 + if (fs->fs_type == FS_EXFAT && dp->obj.sclust) { /* exFAT: Retrieve the sub-directory's status */ + DIR dj; + + dp->obj.c_scl = fs->cdc_scl; + dp->obj.c_size = fs->cdc_size; + dp->obj.c_ofs = fs->cdc_ofs; + res = load_obj_xdir(&dj, &dp->obj); + if (res != FR_OK) return res; + dp->obj.objsize = ld_dword(fs->dirbuf + XDIR_FileSize); + dp->obj.stat = fs->dirbuf[XDIR_GenFlags] & 2; + } +#endif +#endif + + if ((UINT)*path < ' ') { /* Null path name is the origin directory itself */ + dp->fn[NSFLAG] = NS_NONAME; + res = dir_sdi(dp, 0); + + } else { /* Follow path */ + for (;;) { + res = create_name(dp, &path); /* Get a segment name of the path */ + if (res != FR_OK) break; + res = dir_find(dp); /* Find an object with the segment name */ + ns = dp->fn[NSFLAG]; + if (res != FR_OK) { /* Failed to find the object */ + if (res == FR_NO_FILE) { /* Object is not found */ + if (FF_FS_RPATH && (ns & NS_DOT)) { /* If dot entry is not exist, stay there */ + if (!(ns & NS_LAST)) continue; /* Continue to follow if not last segment */ + dp->fn[NSFLAG] = NS_NONAME; + res = FR_OK; + } else { /* Could not find the object */ + if (!(ns & NS_LAST)) res = FR_NO_PATH; /* Adjust error code if not last segment */ + } + } + break; + } + if (ns & NS_LAST) break; /* Last segment matched. Function completed. */ + /* Get into the sub-directory */ + if (!(dp->obj.attr & AM_DIR)) { /* It is not a sub-directory and cannot follow */ + res = FR_NO_PATH; break; + } +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { /* Save containing directory information for next dir */ + dp->obj.c_scl = dp->obj.sclust; + dp->obj.c_size = ((DWORD)dp->obj.objsize & 0xFFFFFF00) | dp->obj.stat; + dp->obj.c_ofs = dp->blk_ofs; + init_alloc_info(fs, &dp->obj); /* Open next directory */ + } else +#endif + { + dp->obj.sclust = ld_clust(fs, fs->win + dp->dptr % SS(fs)); /* Open next directory */ + } + } + } + + return res; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Get logical drive number from path name */ +/*-----------------------------------------------------------------------*/ + +static int get_ldnumber ( /* Returns logical drive number (-1:invalid drive number or null pointer) */ + const TCHAR** path /* Pointer to pointer to the path name */ +) +{ + const TCHAR *tp, *tt; + TCHAR tc; + int i, vol = -1; +#if FF_STR_VOLUME_ID /* Find string volume ID */ + const char *sp; + char c; +#endif + + tt = tp = *path; + if (!tp) return vol; /* Invalid path name? */ + do tc = *tt++; while ((UINT)tc >= (FF_USE_LFN ? ' ' : '!') && tc != ':'); /* Find a colon in the path */ + + if (tc == ':') { /* DOS/Windows style volume ID? */ + i = FF_VOLUMES; + if (IsDigit(*tp) && tp + 2 == tt) { /* Is there a numeric volume ID + colon? */ + i = (int)*tp - '0'; /* Get the LD number */ + } +#if FF_STR_VOLUME_ID == 1 /* Arbitrary string is enabled */ + else { + i = 0; + do { + sp = VolumeStr[i]; tp = *path; /* This string volume ID and path name */ + do { /* Compare the volume ID with path name */ + c = *sp++; tc = *tp++; + if (IsLower(c)) c -= 0x20; + if (IsLower(tc)) tc -= 0x20; + } while (c && (TCHAR)c == tc); + } while ((c || tp != tt) && ++i < FF_VOLUMES); /* Repeat for each id until pattern match */ + } +#endif + if (i < FF_VOLUMES) { /* If a volume ID is found, get the drive number and strip it */ + vol = i; /* Drive number */ + *path = tt; /* Snip the drive prefix off */ + } + return vol; + } +#if FF_STR_VOLUME_ID == 2 /* Unix style volume ID is enabled */ + if (*tp == '/') { + i = 0; + do { + sp = VolumeStr[i]; tp = *path; /* This string volume ID and path name */ + do { /* Compare the volume ID with path name */ + c = *sp++; tc = *(++tp); + if (IsLower(c)) c -= 0x20; + if (IsLower(tc)) tc -= 0x20; + } while (c && (TCHAR)c == tc); + } while ((c || (tc != '/' && (UINT)tc >= (FF_USE_LFN ? ' ' : '!'))) && ++i < FF_VOLUMES); /* Repeat for each ID until pattern match */ + if (i < FF_VOLUMES) { /* If a volume ID is found, get the drive number and strip it */ + vol = i; /* Drive number */ + *path = tp; /* Snip the drive prefix off */ + return vol; + } + } +#endif + /* No drive prefix is found */ +#if FF_FS_RPATH != 0 + vol = CurrVol; /* Default drive is current drive */ +#else + vol = 0; /* Default drive is 0 */ +#endif + return vol; /* Return the default drive */ +} + + + + +/*-----------------------------------------------------------------------*/ +/* GPT support functions */ +/*-----------------------------------------------------------------------*/ + +#if FF_LBA64 + +/* Calculate CRC32 in byte-by-byte */ + +static DWORD crc32 ( /* Returns next CRC value */ + DWORD crc, /* Current CRC value */ + BYTE d /* A byte to be processed */ +) +{ + BYTE b; + + + for (b = 1; b; b <<= 1) { + crc ^= (d & b) ? 1 : 0; + crc = (crc & 1) ? crc >> 1 ^ 0xEDB88320 : crc >> 1; + } + return crc; +} + + +/* Check validity of GPT header */ + +static int test_gpt_header ( /* 0:Invalid, 1:Valid */ + const BYTE* gpth /* Pointer to the GPT header */ +) +{ + UINT i; + DWORD bcc; + + + if (mem_cmp(gpth + GPTH_Sign, "EFI PART" "\0\0\1\0" "\x5C\0\0", 16)) return 0; /* Check sign, version (1.0) and length (92) */ + for (i = 0, bcc = 0xFFFFFFFF; i < 92; i++) { /* Check header BCC */ + bcc = crc32(bcc, i - GPTH_Bcc < 4 ? 0 : gpth[i]); + } + if (~bcc != ld_dword(gpth + GPTH_Bcc)) return 0; + if (ld_dword(gpth + GPTH_PteSize) != SZ_GPTE) return 0; /* Table entry size (must be SZ_GPTE bytes) */ + if (ld_dword(gpth + GPTH_PtNum) > 128) return 0; /* Table size (must be 128 entries or less) */ + + return 1; +} + +#if !FF_FS_READONLY && FF_USE_MKFS + +/* Generate random value */ +static DWORD make_rand ( + DWORD seed, /* Seed value */ + BYTE* buff, /* Output buffer */ + UINT n /* Data length */ +) +{ + UINT r; + + + if (seed == 0) seed = 1; + do { + for (r = 0; r < 8; r++) seed = seed & 1 ? seed >> 1 ^ 0xA3000000 : seed >> 1; /* Shift 8 bits the 32-bit LFSR */ + *buff++ = (BYTE)seed; + } while (--n); + return seed; +} + +#endif +#endif + + + +/*-----------------------------------------------------------------------*/ +/* Load a sector and check if it is an FAT VBR */ +/*-----------------------------------------------------------------------*/ + +/* Check what the sector is */ + +static UINT check_fs ( /* 0:FAT VBR, 1:exFAT VBR, 2:Valid BS but not FAT, 3:Invalid BS, 4:Disk error */ + FATFS* fs, /* Filesystem object */ + LBA_t sect /* Sector to load and check if it is an FAT-VBR or not */ +) +{ + fs->wflag = 0; fs->winsect = (LBA_t)0 - 1; /* Invaidate window */ + if (move_window(fs, sect) != FR_OK) return 4; /* Load the boot sector */ + + if (ld_word(fs->win + BS_55AA) != 0xAA55) return 3; /* Check boot signature (always here regardless of the sector size) */ + + if (FF_FS_EXFAT && !mem_cmp(fs->win + BS_JmpBoot, "\xEB\x76\x90" "EXFAT ", 11)) return 1; /* Check if exFAT VBR */ + + if (fs->win[BS_JmpBoot] == 0xE9 || fs->win[BS_JmpBoot] == 0xEB || fs->win[BS_JmpBoot] == 0xE8) { /* Valid JumpBoot code? */ + if (!mem_cmp(fs->win + BS_FilSysType, "FAT", 3)) return 0; /* Is it an FAT VBR? */ + if (!mem_cmp(fs->win + BS_FilSysType32, "FAT32", 5)) return 0; /* Is it an FAT32 VBR? */ + } + return 2; /* Valid BS but not FAT */ +} + + +/* Find an FAT volume */ +/* (It supports only generic partitioning rules, MBR, GPT and SFD) */ + +static UINT find_volume ( /* Returns BS status found in the hosting drive */ + FATFS* fs, /* Filesystem object */ + UINT part /* Partition to fined = 0:auto, 1..:forced */ +) +{ + UINT fmt, i; + DWORD mbr_pt[4]; + + + fmt = check_fs(fs, 0); /* Load sector 0 and check if it is an FAT VBR as SFD */ + if (fmt != 2 && (fmt >= 3 || part == 0)) return fmt; /* Returns if it is a FAT VBR as auto scan, not a BS or disk error */ + + /* Sector 0 is not an FAT VBR or forced partition number wants a partition */ + +#if FF_LBA64 + if (fs->win[MBR_Table + PTE_System] == 0xEE) { /* GPT protective MBR? */ + DWORD n_ent, v_ent, ofs; + QWORD pt_lba; + + if (move_window(fs, 1) != FR_OK) return 4; /* Load GPT header sector (next to MBR) */ + if (!test_gpt_header(fs->win)) return 3; /* Check if GPT header is valid */ + n_ent = ld_dword(fs->win + GPTH_PtNum); /* Number of entries */ + pt_lba = ld_qword(fs->win + GPTH_PtOfs); /* Table location */ + for (v_ent = i = 0; i < n_ent; i++) { /* Find FAT partition */ + if (move_window(fs, pt_lba + i * SZ_GPTE / SS(fs)) != FR_OK) return 4; /* PT sector */ + ofs = i * SZ_GPTE % SS(fs); /* Offset in the sector */ + if (!mem_cmp(fs->win + ofs + GPTE_PtGuid, GUID_MS_Basic, 16)) { /* MS basic data partition? */ + v_ent++; + fmt = check_fs(fs, ld_qword(fs->win + ofs + GPTE_FstLba)); /* Load VBR and check status */ + if (part == 0 && fmt <= 1) return fmt; /* Auto search (valid FAT volume found first) */ + if (part != 0 && v_ent == part) return fmt; /* Forced partition order (regardless of it is valid or not) */ + } + } + return 3; /* Not found */ + } +#endif + if (FF_MULTI_PARTITION && part > 4) return 3; /* MBR has 4 partitions max */ + for (i = 0; i < 4; i++) { /* Load partition offset in the MBR */ + mbr_pt[i] = ld_dword(fs->win + MBR_Table + i * SZ_PTE + PTE_StLba); + } + i = part ? part - 1 : 0; /* Table index to find first */ + do { /* Find an FAT volume */ + fmt = mbr_pt[i] ? check_fs(fs, mbr_pt[i]) : 3; /* Check if the partition is FAT */ + } while (part == 0 && fmt >= 2 && ++i < 4); + return fmt; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Determine logical drive number and mount the volume if needed */ +/*-----------------------------------------------------------------------*/ + +static FRESULT mount_volume ( /* FR_OK(0): successful, !=0: an error occurred */ + const TCHAR** path, /* Pointer to pointer to the path name (drive number) */ + FATFS** rfs, /* Pointer to pointer to the found filesystem object */ + BYTE mode /* !=0: Check write protection for write access */ +) +{ + int vol; + DSTATUS stat; + LBA_t bsect; + DWORD tsect, sysect, fasize, nclst, szbfat; + WORD nrsv; + FATFS *fs; + UINT fmt; + + + /* Get logical drive number */ + *rfs = 0; + vol = get_ldnumber(path); + if (vol < 0) return FR_INVALID_DRIVE; + + /* Check if the filesystem object is valid or not */ + fs = FatFs[vol]; /* Get pointer to the filesystem object */ + if (!fs) return FR_NOT_ENABLED; /* Is the filesystem object available? */ +#if FF_FS_REENTRANT + if (!lock_fs(fs)) return FR_TIMEOUT; /* Lock the volume */ +#endif + *rfs = fs; /* Return pointer to the filesystem object */ + + mode &= (BYTE)~FA_READ; /* Desired access mode, write access or not */ + if (fs->fs_type != 0) { /* If the volume has been mounted */ + stat = disk_status(fs->pdrv); + if (!(stat & STA_NOINIT)) { /* and the physical drive is kept initialized */ + if (!FF_FS_READONLY && mode && (stat & STA_PROTECT)) { /* Check write protection if needed */ + return FR_WRITE_PROTECTED; + } + return FR_OK; /* The filesystem object is already valid */ + } + } + + /* The filesystem object is not valid. */ + /* Following code attempts to mount the volume. (find a FAT volume, analyze the BPB and initialize the filesystem object) */ + + fs->fs_type = 0; /* Clear the filesystem object */ + fs->pdrv = LD2PD(vol); /* Volume hosting physical drive */ + stat = disk_initialize(fs->pdrv); /* Initialize the physical drive */ + if (stat & STA_NOINIT) { /* Check if the initialization succeeded */ + return FR_NOT_READY; /* Failed to initialize due to no medium or hard error */ + } + if (!FF_FS_READONLY && mode && (stat & STA_PROTECT)) { /* Check disk write protection if needed */ + return FR_WRITE_PROTECTED; + } +#if FF_MAX_SS != FF_MIN_SS /* Get sector size (multiple sector size cfg only) */ + if (disk_ioctl(fs->pdrv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK) return FR_DISK_ERR; + if (SS(fs) > FF_MAX_SS || SS(fs) < FF_MIN_SS || (SS(fs) & (SS(fs) - 1))) return FR_DISK_ERR; +#endif + + /* Find an FAT volume on the drive */ + fmt = find_volume(fs, LD2PT(vol)); + if (fmt == 4) return FR_DISK_ERR; /* An error occured in the disk I/O layer */ + if (fmt >= 2) return FR_NO_FILESYSTEM; /* No FAT volume is found */ + bsect = fs->winsect; /* Volume location */ + + /* An FAT volume is found (bsect). Following code initializes the filesystem object */ + +#if FF_FS_EXFAT + if (fmt == 1) { + QWORD maxlba; + DWORD so, cv, bcl, i; + + for (i = BPB_ZeroedEx; i < BPB_ZeroedEx + 53 && fs->win[i] == 0; i++) ; /* Check zero filler */ + if (i < BPB_ZeroedEx + 53) return FR_NO_FILESYSTEM; + + if (ld_word(fs->win + BPB_FSVerEx) != 0x100) return FR_NO_FILESYSTEM; /* Check exFAT version (must be version 1.0) */ + + if (1 << fs->win[BPB_BytsPerSecEx] != SS(fs)) { /* (BPB_BytsPerSecEx must be equal to the physical sector size) */ + return FR_NO_FILESYSTEM; + } + + maxlba = ld_qword(fs->win + BPB_TotSecEx) + bsect; /* Last LBA + 1 of the volume */ + if (!FF_LBA64 && maxlba >= 0x100000000) return FR_NO_FILESYSTEM; /* (It cannot be handled in 32-bit LBA) */ + + fs->fsize = ld_dword(fs->win + BPB_FatSzEx); /* Number of sectors per FAT */ + + fs->n_fats = fs->win[BPB_NumFATsEx]; /* Number of FATs */ + if (fs->n_fats != 1) return FR_NO_FILESYSTEM; /* (Supports only 1 FAT) */ + + fs->csize = 1 << fs->win[BPB_SecPerClusEx]; /* Cluster size */ + if (fs->csize == 0) return FR_NO_FILESYSTEM; /* (Must be 1..32768) */ + + nclst = ld_dword(fs->win + BPB_NumClusEx); /* Number of clusters */ + if (nclst > MAX_EXFAT) return FR_NO_FILESYSTEM; /* (Too many clusters) */ + fs->n_fatent = nclst + 2; + + /* Boundaries and Limits */ + fs->volbase = bsect; + fs->database = bsect + ld_dword(fs->win + BPB_DataOfsEx); + fs->fatbase = bsect + ld_dword(fs->win + BPB_FatOfsEx); + if (maxlba < (QWORD)fs->database + nclst * fs->csize) return FR_NO_FILESYSTEM; /* (Volume size must not be smaller than the size requiered) */ + fs->dirbase = ld_dword(fs->win + BPB_RootClusEx); + + /* Get bitmap location and check if it is contiguous (implementation assumption) */ + so = i = 0; + for (;;) { /* Find the bitmap entry in the root directory (in only first cluster) */ + if (i == 0) { + if (so >= fs->csize) return FR_NO_FILESYSTEM; /* Not found? */ + if (move_window(fs, clst2sect(fs, (DWORD)fs->dirbase) + so) != FR_OK) return FR_DISK_ERR; + so++; + } + if (fs->win[i] == ET_BITMAP) break; /* Is it a bitmap entry? */ + i = (i + SZDIRE) % SS(fs); /* Next entry */ + } + bcl = ld_dword(fs->win + i + 20); /* Bitmap cluster */ + if (bcl < 2 || bcl >= fs->n_fatent) return FR_NO_FILESYSTEM; + fs->bitbase = fs->database + fs->csize * (bcl - 2); /* Bitmap sector */ + for (;;) { /* Check if bitmap is contiguous */ + if (move_window(fs, fs->fatbase + bcl / (SS(fs) / 4)) != FR_OK) return FR_DISK_ERR; + cv = ld_dword(fs->win + bcl % (SS(fs) / 4) * 4); + if (cv == 0xFFFFFFFF) break; /* Last link? */ + if (cv != ++bcl) return FR_NO_FILESYSTEM; /* Fragmented? */ + } + +#if !FF_FS_READONLY + fs->last_clst = fs->free_clst = 0xFFFFFFFF; /* Initialize cluster allocation information */ +#endif + fmt = FS_EXFAT; /* FAT sub-type */ + } else +#endif /* FF_FS_EXFAT */ + { + if (ld_word(fs->win + BPB_BytsPerSec) != SS(fs)) return FR_NO_FILESYSTEM; /* (BPB_BytsPerSec must be equal to the physical sector size) */ + + fasize = ld_word(fs->win + BPB_FATSz16); /* Number of sectors per FAT */ + if (fasize == 0) fasize = ld_dword(fs->win + BPB_FATSz32); + fs->fsize = fasize; + + fs->n_fats = fs->win[BPB_NumFATs]; /* Number of FATs */ + if (fs->n_fats != 1 && fs->n_fats != 2) return FR_NO_FILESYSTEM; /* (Must be 1 or 2) */ + fasize *= fs->n_fats; /* Number of sectors for FAT area */ + + fs->csize = fs->win[BPB_SecPerClus]; /* Cluster size */ + if (fs->csize == 0 || (fs->csize & (fs->csize - 1))) return FR_NO_FILESYSTEM; /* (Must be power of 2) */ + + fs->n_rootdir = ld_word(fs->win + BPB_RootEntCnt); /* Number of root directory entries */ + if (fs->n_rootdir % (SS(fs) / SZDIRE)) return FR_NO_FILESYSTEM; /* (Must be sector aligned) */ + + tsect = ld_word(fs->win + BPB_TotSec16); /* Number of sectors on the volume */ + if (tsect == 0) tsect = ld_dword(fs->win + BPB_TotSec32); + + nrsv = ld_word(fs->win + BPB_RsvdSecCnt); /* Number of reserved sectors */ + if (nrsv == 0) return FR_NO_FILESYSTEM; /* (Must not be 0) */ + + /* Determine the FAT sub type */ + sysect = nrsv + fasize + fs->n_rootdir / (SS(fs) / SZDIRE); /* RSV + FAT + DIR */ + if (tsect < sysect) return FR_NO_FILESYSTEM; /* (Invalid volume size) */ + nclst = (tsect - sysect) / fs->csize; /* Number of clusters */ + if (nclst == 0) return FR_NO_FILESYSTEM; /* (Invalid volume size) */ + fmt = 0; + if (nclst <= MAX_FAT32) fmt = FS_FAT32; + if (nclst <= MAX_FAT16) fmt = FS_FAT16; + if (nclst <= MAX_FAT12) fmt = FS_FAT12; + if (fmt == 0) return FR_NO_FILESYSTEM; + + /* Boundaries and Limits */ + fs->n_fatent = nclst + 2; /* Number of FAT entries */ + fs->volbase = bsect; /* Volume start sector */ + fs->fatbase = bsect + nrsv; /* FAT start sector */ + fs->database = bsect + sysect; /* Data start sector */ + if (fmt == FS_FAT32) { + if (ld_word(fs->win + BPB_FSVer32) != 0) return FR_NO_FILESYSTEM; /* (Must be FAT32 revision 0.0) */ + if (fs->n_rootdir != 0) return FR_NO_FILESYSTEM; /* (BPB_RootEntCnt must be 0) */ + fs->dirbase = ld_dword(fs->win + BPB_RootClus32); /* Root directory start cluster */ + szbfat = fs->n_fatent * 4; /* (Needed FAT size) */ + } else { + if (fs->n_rootdir == 0) return FR_NO_FILESYSTEM; /* (BPB_RootEntCnt must not be 0) */ + fs->dirbase = fs->fatbase + fasize; /* Root directory start sector */ + szbfat = (fmt == FS_FAT16) ? /* (Needed FAT size) */ + fs->n_fatent * 2 : fs->n_fatent * 3 / 2 + (fs->n_fatent & 1); + } + if (fs->fsize < (szbfat + (SS(fs) - 1)) / SS(fs)) return FR_NO_FILESYSTEM; /* (BPB_FATSz must not be less than the size needed) */ + +#if !FF_FS_READONLY + /* Get FSInfo if available */ + fs->last_clst = fs->free_clst = 0xFFFFFFFF; /* Initialize cluster allocation information */ + fs->fsi_flag = 0x80; +#if (FF_FS_NOFSINFO & 3) != 3 + if (fmt == FS_FAT32 /* Allow to update FSInfo only if BPB_FSInfo32 == 1 */ + && ld_word(fs->win + BPB_FSInfo32) == 1 + && move_window(fs, bsect + 1) == FR_OK) + { + fs->fsi_flag = 0; + if (ld_word(fs->win + BS_55AA) == 0xAA55 /* Load FSInfo data if available */ + && ld_dword(fs->win + FSI_LeadSig) == 0x41615252 + && ld_dword(fs->win + FSI_StrucSig) == 0x61417272) + { +#if (FF_FS_NOFSINFO & 1) == 0 + fs->free_clst = ld_dword(fs->win + FSI_Free_Count); +#endif +#if (FF_FS_NOFSINFO & 2) == 0 + fs->last_clst = ld_dword(fs->win + FSI_Nxt_Free); +#endif + } + } +#endif /* (FF_FS_NOFSINFO & 3) != 3 */ +#endif /* !FF_FS_READONLY */ + } + + fs->fs_type = (BYTE)fmt;/* FAT sub-type */ + fs->id = ++Fsid; /* Volume mount ID */ +#if FF_USE_LFN == 1 + fs->lfnbuf = LfnBuf; /* Static LFN working buffer */ +#if FF_FS_EXFAT + fs->dirbuf = DirBuf; /* Static directory block scratchpad buuffer */ +#endif +#endif +#if FF_FS_RPATH != 0 + fs->cdir = 0; /* Initialize current directory */ +#endif +#if FF_FS_LOCK != 0 /* Clear file lock semaphores */ + clear_lock(fs); +#endif + return FR_OK; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Check if the file/directory object is valid or not */ +/*-----------------------------------------------------------------------*/ + +static FRESULT validate ( /* Returns FR_OK or FR_INVALID_OBJECT */ + FFOBJID* obj, /* Pointer to the FFOBJID, the 1st member in the FIL/DIR object, to check validity */ + FATFS** rfs /* Pointer to pointer to the owner filesystem object to return */ +) +{ + FRESULT res = FR_INVALID_OBJECT; + + + if (obj && obj->fs && obj->fs->fs_type && obj->id == obj->fs->id) { /* Test if the object is valid */ +#if FF_FS_REENTRANT + if (lock_fs(obj->fs)) { /* Obtain the filesystem object */ + if (!(disk_status(obj->fs->pdrv) & STA_NOINIT)) { /* Test if the phsical drive is kept initialized */ + res = FR_OK; + } else { + unlock_fs(obj->fs, FR_OK); + } + } else { + res = FR_TIMEOUT; + } +#else + if (!(disk_status(obj->fs->pdrv) & STA_NOINIT)) { /* Test if the phsical drive is kept initialized */ + res = FR_OK; + } +#endif + } + *rfs = (res == FR_OK) ? obj->fs : 0; /* Corresponding filesystem object */ + return res; +} + + + + +/*--------------------------------------------------------------------------- + + Public Functions (FatFs API) + +----------------------------------------------------------------------------*/ + + + +/*-----------------------------------------------------------------------*/ +/* Mount/Unmount a Logical Drive */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_mount ( + FATFS* fs, /* Pointer to the filesystem object (NULL:unmount)*/ + const TCHAR* path, /* Logical drive number to be mounted/unmounted */ + BYTE opt /* Mode option 0:Do not mount (delayed mount), 1:Mount immediately */ +) +{ + FATFS *cfs; + int vol; + FRESULT res; + const TCHAR *rp = path; + + + /* Get logical drive number */ + vol = get_ldnumber(&rp); + if (vol < 0) return FR_INVALID_DRIVE; + cfs = FatFs[vol]; /* Pointer to fs object */ + + if (cfs) { +#if FF_FS_LOCK != 0 + clear_lock(cfs); +#endif +#if FF_FS_REENTRANT /* Discard sync object of the current volume */ + if (!ff_del_syncobj(cfs->sobj)) return FR_INT_ERR; +#endif + cfs->fs_type = 0; /* Clear old fs object */ + } + + if (fs) { + fs->fs_type = 0; /* Clear new fs object */ +#if FF_FS_REENTRANT /* Create sync object for the new volume */ + if (!ff_cre_syncobj((BYTE)vol, &fs->sobj)) return FR_INT_ERR; +#endif + } + FatFs[vol] = fs; /* Register new fs object */ + + if (opt == 0) return FR_OK; /* Do not mount now, it will be mounted later */ + + res = mount_volume(&path, &fs, 0); /* Force mounted the volume */ + LEAVE_FF(fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Open or Create a File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_open ( + FIL* fp, /* Pointer to the blank file object */ + const TCHAR* path, /* Pointer to the file name */ + BYTE mode /* Access mode and file open mode flags */ +) +{ + FRESULT res; + DIR dj; + FATFS *fs; +#if !FF_FS_READONLY + DWORD cl, bcs, clst; + LBA_t sc; + FSIZE_t ofs; +#endif + DEF_NAMBUF + + + if (!fp) return FR_INVALID_OBJECT; + + /* Get logical drive number */ + mode &= FF_FS_READONLY ? FA_READ : FA_READ | FA_WRITE | FA_CREATE_ALWAYS | FA_CREATE_NEW | FA_OPEN_ALWAYS | FA_OPEN_APPEND; + res = mount_volume(&path, &fs, mode); + if (res == FR_OK) { + dj.obj.fs = fs; + INIT_NAMBUF(fs); + res = follow_path(&dj, path); /* Follow the file path */ +#if !FF_FS_READONLY /* Read/Write configuration */ + if (res == FR_OK) { + if (dj.fn[NSFLAG] & NS_NONAME) { /* Origin directory itself? */ + res = FR_INVALID_NAME; + } +#if FF_FS_LOCK != 0 + else { + res = chk_lock(&dj, (mode & ~FA_READ) ? 1 : 0); /* Check if the file can be used */ + } +#endif + } + /* Create or Open a file */ + if (mode & (FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)) { + if (res != FR_OK) { /* No file, create new */ + if (res == FR_NO_FILE) { /* There is no file to open, create a new entry */ +#if FF_FS_LOCK != 0 + res = enq_lock() ? dir_register(&dj) : FR_TOO_MANY_OPEN_FILES; +#else + res = dir_register(&dj); +#endif + } + mode |= FA_CREATE_ALWAYS; /* File is created */ + } + else { /* Any object with the same name is already existing */ + if (dj.obj.attr & (AM_RDO | AM_DIR)) { /* Cannot overwrite it (R/O or DIR) */ + res = FR_DENIED; + } else { + if (mode & FA_CREATE_NEW) res = FR_EXIST; /* Cannot create as new file */ + } + } + if (res == FR_OK && (mode & FA_CREATE_ALWAYS)) { /* Truncate the file if overwrite mode */ +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { + /* Get current allocation info */ + fp->obj.fs = fs; + init_alloc_info(fs, &fp->obj); + /* Set directory entry block initial state */ + mem_set(fs->dirbuf + 2, 0, 30); /* Clear 85 entry except for NumSec */ + mem_set(fs->dirbuf + 38, 0, 26); /* Clear C0 entry except for NumName and NameHash */ + fs->dirbuf[XDIR_Attr] = AM_ARC; + st_dword(fs->dirbuf + XDIR_CrtTime, GET_FATTIME()); + fs->dirbuf[XDIR_GenFlags] = 1; + res = store_xdir(&dj); + if (res == FR_OK && fp->obj.sclust != 0) { /* Remove the cluster chain if exist */ + res = remove_chain(&fp->obj, fp->obj.sclust, 0); + fs->last_clst = fp->obj.sclust - 1; /* Reuse the cluster hole */ + } + } else +#endif + { + /* Set directory entry initial state */ + cl = ld_clust(fs, dj.dir); /* Get current cluster chain */ + st_dword(dj.dir + DIR_CrtTime, GET_FATTIME()); /* Set created time */ + dj.dir[DIR_Attr] = AM_ARC; /* Reset attribute */ + st_clust(fs, dj.dir, 0); /* Reset file allocation info */ + st_dword(dj.dir + DIR_FileSize, 0); + fs->wflag = 1; + if (cl != 0) { /* Remove the cluster chain if exist */ + sc = fs->winsect; + res = remove_chain(&dj.obj, cl, 0); + if (res == FR_OK) { + res = move_window(fs, sc); + fs->last_clst = cl - 1; /* Reuse the cluster hole */ + } + } + } + } + } + else { /* Open an existing file */ + if (res == FR_OK) { /* Is the object exsiting? */ + if (dj.obj.attr & AM_DIR) { /* File open against a directory */ + res = FR_NO_FILE; + } else { + if ((mode & FA_WRITE) && (dj.obj.attr & AM_RDO)) { /* Write mode open against R/O file */ + res = FR_DENIED; + } + } + } + } + if (res == FR_OK) { + if (mode & FA_CREATE_ALWAYS) mode |= FA_MODIFIED; /* Set file change flag if created or overwritten */ + fp->dir_sect = fs->winsect; /* Pointer to the directory entry */ + fp->dir_ptr = dj.dir; +#if FF_FS_LOCK != 0 + fp->obj.lockid = inc_lock(&dj, (mode & ~FA_READ) ? 1 : 0); /* Lock the file for this session */ + if (fp->obj.lockid == 0) res = FR_INT_ERR; +#endif + } +#else /* R/O configuration */ + if (res == FR_OK) { + if (dj.fn[NSFLAG] & NS_NONAME) { /* Is it origin directory itself? */ + res = FR_INVALID_NAME; + } else { + if (dj.obj.attr & AM_DIR) { /* Is it a directory? */ + res = FR_NO_FILE; + } + } + } +#endif + + if (res == FR_OK) { +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { + fp->obj.c_scl = dj.obj.sclust; /* Get containing directory info */ + fp->obj.c_size = ((DWORD)dj.obj.objsize & 0xFFFFFF00) | dj.obj.stat; + fp->obj.c_ofs = dj.blk_ofs; + init_alloc_info(fs, &fp->obj); + } else +#endif + { + fp->obj.sclust = ld_clust(fs, dj.dir); /* Get object allocation info */ + fp->obj.objsize = ld_dword(dj.dir + DIR_FileSize); + } +#if FF_USE_FASTSEEK + fp->cltbl = 0; /* Disable fast seek mode */ +#endif + fp->obj.fs = fs; /* Validate the file object */ + fp->obj.id = fs->id; + fp->flag = mode; /* Set file access mode */ + fp->err = 0; /* Clear error flag */ + fp->sect = 0; /* Invalidate current data sector */ + fp->fptr = 0; /* Set file pointer top of the file */ +#if !FF_FS_READONLY +#if !FF_FS_TINY + mem_set(fp->buf, 0, sizeof fp->buf); /* Clear sector buffer */ +#endif + if ((mode & FA_SEEKEND) && fp->obj.objsize > 0) { /* Seek to end of file if FA_OPEN_APPEND is specified */ + fp->fptr = fp->obj.objsize; /* Offset to seek */ + bcs = (DWORD)fs->csize * SS(fs); /* Cluster size in byte */ + clst = fp->obj.sclust; /* Follow the cluster chain */ + for (ofs = fp->obj.objsize; res == FR_OK && ofs > bcs; ofs -= bcs) { + clst = get_fat(&fp->obj, clst); + if (clst <= 1) res = FR_INT_ERR; + if (clst == 0xFFFFFFFF) res = FR_DISK_ERR; + } + fp->clust = clst; + if (res == FR_OK && ofs % SS(fs)) { /* Fill sector buffer if not on the sector boundary */ + sc = clst2sect(fs, clst); + if (sc == 0) { + res = FR_INT_ERR; + } else { + fp->sect = sc + (DWORD)(ofs / SS(fs)); +#if !FF_FS_TINY + if (disk_read(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) res = FR_DISK_ERR; +#endif + } + } + } +#endif + } + + FREE_NAMBUF(); + } + + if (res != FR_OK) fp->obj.fs = 0; /* Invalidate file object on error */ + + LEAVE_FF(fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Read File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_read ( + FIL* fp, /* Pointer to the file object */ + void* buff, /* Pointer to data buffer */ + UINT btr, /* Number of bytes to read */ + UINT* br /* Pointer to number of bytes read */ +) +{ + FRESULT res; + FATFS *fs; + DWORD clst; + LBA_t sect; + FSIZE_t remain; + UINT rcnt, cc, csect; + BYTE *rbuff = (BYTE*)buff; + + + *br = 0; /* Clear read byte counter */ + res = validate(&fp->obj, &fs); /* Check validity of the file object */ + if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res); /* Check validity */ + if (!(fp->flag & FA_READ)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */ + remain = fp->obj.objsize - fp->fptr; + if (btr > remain) btr = (UINT)remain; /* Truncate btr by remaining bytes */ + + for ( ; btr; /* Repeat until btr bytes read */ + btr -= rcnt, *br += rcnt, rbuff += rcnt, fp->fptr += rcnt) { + if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */ + csect = (UINT)(fp->fptr / SS(fs) & (fs->csize - 1)); /* Sector offset in the cluster */ + if (csect == 0) { /* On the cluster boundary? */ + if (fp->fptr == 0) { /* On the top of the file? */ + clst = fp->obj.sclust; /* Follow cluster chain from the origin */ + } else { /* Middle or end of the file */ +#if FF_USE_FASTSEEK + if (fp->cltbl) { + clst = clmt_clust(fp, fp->fptr); /* Get cluster# from the CLMT */ + } else +#endif + { + clst = get_fat(&fp->obj, fp->clust); /* Follow cluster chain on the FAT */ + } + } + if (clst < 2) ABORT(fs, FR_INT_ERR); + if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR); + fp->clust = clst; /* Update current cluster */ + } + sect = clst2sect(fs, fp->clust); /* Get current sector */ + if (sect == 0) ABORT(fs, FR_INT_ERR); + sect += csect; + cc = btr / SS(fs); /* When remaining bytes >= sector size, */ + if (cc > 0) { /* Read maximum contiguous sectors directly */ + if (csect + cc > fs->csize) { /* Clip at cluster boundary */ + cc = fs->csize - csect; + } + if (disk_read(fs->pdrv, rbuff, sect, cc) != RES_OK) ABORT(fs, FR_DISK_ERR); +#if !FF_FS_READONLY && FF_FS_MINIMIZE <= 2 /* Replace one of the read sectors with cached data if it contains a dirty sector */ +#if FF_FS_TINY + if (fs->wflag && fs->winsect - sect < cc) { + mem_cpy(rbuff + ((fs->winsect - sect) * SS(fs)), fs->win, SS(fs)); + } +#else + if ((fp->flag & FA_DIRTY) && fp->sect - sect < cc) { + mem_cpy(rbuff + ((fp->sect - sect) * SS(fs)), fp->buf, SS(fs)); + } +#endif +#endif + rcnt = SS(fs) * cc; /* Number of bytes transferred */ + continue; + } +#if !FF_FS_TINY + if (fp->sect != sect) { /* Load data sector if not in cache */ +#if !FF_FS_READONLY + if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */ + if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); + fp->flag &= (BYTE)~FA_DIRTY; + } +#endif + if (disk_read(fs->pdrv, fp->buf, sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); /* Fill sector cache */ + } +#endif + fp->sect = sect; + } + rcnt = SS(fs) - (UINT)fp->fptr % SS(fs); /* Number of bytes remains in the sector */ + if (rcnt > btr) rcnt = btr; /* Clip it by btr if needed */ +#if FF_FS_TINY + if (move_window(fs, fp->sect) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Move sector window */ + mem_cpy(rbuff, fs->win + fp->fptr % SS(fs), rcnt); /* Extract partial sector */ +#else + mem_cpy(rbuff, fp->buf + fp->fptr % SS(fs), rcnt); /* Extract partial sector */ +#endif + } + + LEAVE_FF(fs, FR_OK); +} + + + + +#if !FF_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* Write File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_write ( + FIL* fp, /* Pointer to the file object */ + const void* buff, /* Pointer to the data to be written */ + UINT btw, /* Number of bytes to write */ + UINT* bw /* Pointer to number of bytes written */ +) +{ + FRESULT res; + FATFS *fs; + DWORD clst; + LBA_t sect; + UINT wcnt, cc, csect; + const BYTE *wbuff = (const BYTE*)buff; + + + *bw = 0; /* Clear write byte counter */ + res = validate(&fp->obj, &fs); /* Check validity of the file object */ + if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res); /* Check validity */ + if (!(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */ + + /* Check fptr wrap-around (file size cannot reach 4 GiB at FAT volume) */ + if ((!FF_FS_EXFAT || fs->fs_type != FS_EXFAT) && (DWORD)(fp->fptr + btw) < (DWORD)fp->fptr) { + btw = (UINT)(0xFFFFFFFF - (DWORD)fp->fptr); + } + + for ( ; btw; /* Repeat until all data written */ + btw -= wcnt, *bw += wcnt, wbuff += wcnt, fp->fptr += wcnt, fp->obj.objsize = (fp->fptr > fp->obj.objsize) ? fp->fptr : fp->obj.objsize) { + if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */ + csect = (UINT)(fp->fptr / SS(fs)) & (fs->csize - 1); /* Sector offset in the cluster */ + if (csect == 0) { /* On the cluster boundary? */ + if (fp->fptr == 0) { /* On the top of the file? */ + clst = fp->obj.sclust; /* Follow from the origin */ + if (clst == 0) { /* If no cluster is allocated, */ + clst = create_chain(&fp->obj, 0); /* create a new cluster chain */ + } + } else { /* On the middle or end of the file */ +#if FF_USE_FASTSEEK + if (fp->cltbl) { + clst = clmt_clust(fp, fp->fptr); /* Get cluster# from the CLMT */ + } else +#endif + { + clst = create_chain(&fp->obj, fp->clust); /* Follow or stretch cluster chain on the FAT */ + } + } + if (clst == 0) break; /* Could not allocate a new cluster (disk full) */ + if (clst == 1) ABORT(fs, FR_INT_ERR); + if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR); + fp->clust = clst; /* Update current cluster */ + if (fp->obj.sclust == 0) fp->obj.sclust = clst; /* Set start cluster if the first write */ + } +#if FF_FS_TINY + if (fs->winsect == fp->sect && sync_window(fs) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Write-back sector cache */ +#else + if (fp->flag & FA_DIRTY) { /* Write-back sector cache */ + if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); + fp->flag &= (BYTE)~FA_DIRTY; + } +#endif + sect = clst2sect(fs, fp->clust); /* Get current sector */ + if (sect == 0) ABORT(fs, FR_INT_ERR); + sect += csect; + cc = btw / SS(fs); /* When remaining bytes >= sector size, */ + if (cc > 0) { /* Write maximum contiguous sectors directly */ + if (csect + cc > fs->csize) { /* Clip at cluster boundary */ + cc = fs->csize - csect; + } + if (disk_write(fs->pdrv, wbuff, sect, cc) != RES_OK) ABORT(fs, FR_DISK_ERR); +#if FF_FS_MINIMIZE <= 2 +#if FF_FS_TINY + if (fs->winsect - sect < cc) { /* Refill sector cache if it gets invalidated by the direct write */ + mem_cpy(fs->win, wbuff + ((fs->winsect - sect) * SS(fs)), SS(fs)); + fs->wflag = 0; + } +#else + if (fp->sect - sect < cc) { /* Refill sector cache if it gets invalidated by the direct write */ + mem_cpy(fp->buf, wbuff + ((fp->sect - sect) * SS(fs)), SS(fs)); + fp->flag &= (BYTE)~FA_DIRTY; + } +#endif +#endif + wcnt = SS(fs) * cc; /* Number of bytes transferred */ + continue; + } +#if FF_FS_TINY + if (fp->fptr >= fp->obj.objsize) { /* Avoid silly cache filling on the growing edge */ + if (sync_window(fs) != FR_OK) ABORT(fs, FR_DISK_ERR); + fs->winsect = sect; + } +#else + if (fp->sect != sect && /* Fill sector cache with file data */ + fp->fptr < fp->obj.objsize && + disk_read(fs->pdrv, fp->buf, sect, 1) != RES_OK) { + ABORT(fs, FR_DISK_ERR); + } +#endif + fp->sect = sect; + } + wcnt = SS(fs) - (UINT)fp->fptr % SS(fs); /* Number of bytes remains in the sector */ + if (wcnt > btw) wcnt = btw; /* Clip it by btw if needed */ +#if FF_FS_TINY + if (move_window(fs, fp->sect) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Move sector window */ + mem_cpy(fs->win + fp->fptr % SS(fs), wbuff, wcnt); /* Fit data to the sector */ + fs->wflag = 1; +#else + mem_cpy(fp->buf + fp->fptr % SS(fs), wbuff, wcnt); /* Fit data to the sector */ + fp->flag |= FA_DIRTY; +#endif + } + + fp->flag |= FA_MODIFIED; /* Set file change flag */ + + LEAVE_FF(fs, FR_OK); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Synchronize the File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_sync ( + FIL* fp /* Pointer to the file object */ +) +{ + FRESULT res; + FATFS *fs; + DWORD tm; + BYTE *dir; + + + res = validate(&fp->obj, &fs); /* Check validity of the file object */ + if (res == FR_OK) { + if (fp->flag & FA_MODIFIED) { /* Is there any change to the file? */ +#if !FF_FS_TINY + if (fp->flag & FA_DIRTY) { /* Write-back cached data if needed */ + if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) LEAVE_FF(fs, FR_DISK_ERR); + fp->flag &= (BYTE)~FA_DIRTY; + } +#endif + /* Update the directory entry */ + tm = GET_FATTIME(); /* Modified time */ +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { + res = fill_first_frag(&fp->obj); /* Fill first fragment on the FAT if needed */ + if (res == FR_OK) { + res = fill_last_frag(&fp->obj, fp->clust, 0xFFFFFFFF); /* Fill last fragment on the FAT if needed */ + } + if (res == FR_OK) { + DIR dj; + DEF_NAMBUF + + INIT_NAMBUF(fs); + res = load_obj_xdir(&dj, &fp->obj); /* Load directory entry block */ + if (res == FR_OK) { + fs->dirbuf[XDIR_Attr] |= AM_ARC; /* Set archive attribute to indicate that the file has been changed */ + fs->dirbuf[XDIR_GenFlags] = fp->obj.stat | 1; /* Update file allocation information */ + st_dword(fs->dirbuf + XDIR_FstClus, fp->obj.sclust); /* Update start cluster */ + st_qword(fs->dirbuf + XDIR_FileSize, fp->obj.objsize); /* Update file size */ + st_qword(fs->dirbuf + XDIR_ValidFileSize, fp->obj.objsize); /* (FatFs does not support Valid File Size feature) */ + st_dword(fs->dirbuf + XDIR_ModTime, tm); /* Update modified time */ + fs->dirbuf[XDIR_ModTime10] = 0; + st_dword(fs->dirbuf + XDIR_AccTime, 0); + res = store_xdir(&dj); /* Restore it to the directory */ + if (res == FR_OK) { + res = sync_fs(fs); + fp->flag &= (BYTE)~FA_MODIFIED; + } + } + FREE_NAMBUF(); + } + } else +#endif + { + res = move_window(fs, fp->dir_sect); + if (res == FR_OK) { + dir = fp->dir_ptr; + dir[DIR_Attr] |= AM_ARC; /* Set archive attribute to indicate that the file has been changed */ + st_clust(fp->obj.fs, dir, fp->obj.sclust); /* Update file allocation information */ + st_dword(dir + DIR_FileSize, (DWORD)fp->obj.objsize); /* Update file size */ + st_dword(dir + DIR_ModTime, tm); /* Update modified time */ + st_word(dir + DIR_LstAccDate, 0); + fs->wflag = 1; + res = sync_fs(fs); /* Restore it to the directory */ + fp->flag &= (BYTE)~FA_MODIFIED; + } + } + } + } + + LEAVE_FF(fs, res); +} + +#endif /* !FF_FS_READONLY */ + + + + +/*-----------------------------------------------------------------------*/ +/* Close File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_close ( + FIL* fp /* Pointer to the file object to be closed */ +) +{ + FRESULT res; + FATFS *fs; + +#if !FF_FS_READONLY + res = f_sync(fp); /* Flush cached data */ + if (res == FR_OK) +#endif + { + res = validate(&fp->obj, &fs); /* Lock volume */ + if (res == FR_OK) { +#if FF_FS_LOCK != 0 + res = dec_lock(fp->obj.lockid); /* Decrement file open counter */ + if (res == FR_OK) fp->obj.fs = 0; /* Invalidate file object */ +#else + fp->obj.fs = 0; /* Invalidate file object */ +#endif +#if FF_FS_REENTRANT + unlock_fs(fs, FR_OK); /* Unlock volume */ +#endif + } + } + return res; +} + + + + +#if FF_FS_RPATH >= 1 +/*-----------------------------------------------------------------------*/ +/* Change Current Directory or Current Drive, Get Current Directory */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_chdrive ( + const TCHAR* path /* Drive number to set */ +) +{ + int vol; + + + /* Get logical drive number */ + vol = get_ldnumber(&path); + if (vol < 0) return FR_INVALID_DRIVE; + CurrVol = (BYTE)vol; /* Set it as current volume */ + + return FR_OK; +} + + + +FRESULT f_chdir ( + const TCHAR* path /* Pointer to the directory path */ +) +{ +#if FF_STR_VOLUME_ID == 2 + UINT i; +#endif + FRESULT res; + DIR dj; + FATFS *fs; + DEF_NAMBUF + + + /* Get logical drive */ + res = mount_volume(&path, &fs, 0); + if (res == FR_OK) { + dj.obj.fs = fs; + INIT_NAMBUF(fs); + res = follow_path(&dj, path); /* Follow the path */ + if (res == FR_OK) { /* Follow completed */ + if (dj.fn[NSFLAG] & NS_NONAME) { /* Is it the start directory itself? */ + fs->cdir = dj.obj.sclust; +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { + fs->cdc_scl = dj.obj.c_scl; + fs->cdc_size = dj.obj.c_size; + fs->cdc_ofs = dj.obj.c_ofs; + } +#endif + } else { + if (dj.obj.attr & AM_DIR) { /* It is a sub-directory */ +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { + fs->cdir = ld_dword(fs->dirbuf + XDIR_FstClus); /* Sub-directory cluster */ + fs->cdc_scl = dj.obj.sclust; /* Save containing directory information */ + fs->cdc_size = ((DWORD)dj.obj.objsize & 0xFFFFFF00) | dj.obj.stat; + fs->cdc_ofs = dj.blk_ofs; + } else +#endif + { + fs->cdir = ld_clust(fs, dj.dir); /* Sub-directory cluster */ + } + } else { + res = FR_NO_PATH; /* Reached but a file */ + } + } + } + FREE_NAMBUF(); + if (res == FR_NO_FILE) res = FR_NO_PATH; +#if FF_STR_VOLUME_ID == 2 /* Also current drive is changed at Unix style volume ID */ + if (res == FR_OK) { + for (i = FF_VOLUMES - 1; i && fs != FatFs[i]; i--) ; /* Set current drive */ + CurrVol = (BYTE)i; + } +#endif + } + + LEAVE_FF(fs, res); +} + + +#if FF_FS_RPATH >= 2 +FRESULT f_getcwd ( + TCHAR* buff, /* Pointer to the directory path */ + UINT len /* Size of buff in unit of TCHAR */ +) +{ + FRESULT res; + DIR dj; + FATFS *fs; + UINT i, n; + DWORD ccl; + TCHAR *tp = buff; +#if FF_VOLUMES >= 2 + UINT vl; +#if FF_STR_VOLUME_ID + const char *vp; +#endif +#endif + FILINFO fno; + DEF_NAMBUF + + + /* Get logical drive */ + buff[0] = 0; /* Set null string to get current volume */ + res = mount_volume((const TCHAR**)&buff, &fs, 0); /* Get current volume */ + if (res == FR_OK) { + dj.obj.fs = fs; + INIT_NAMBUF(fs); + + /* Follow parent directories and create the path */ + i = len; /* Bottom of buffer (directory stack base) */ + if (!FF_FS_EXFAT || fs->fs_type != FS_EXFAT) { /* (Cannot do getcwd on exFAT and returns root path) */ + dj.obj.sclust = fs->cdir; /* Start to follow upper directory from current directory */ + while ((ccl = dj.obj.sclust) != 0) { /* Repeat while current directory is a sub-directory */ + res = dir_sdi(&dj, 1 * SZDIRE); /* Get parent directory */ + if (res != FR_OK) break; + res = move_window(fs, dj.sect); + if (res != FR_OK) break; + dj.obj.sclust = ld_clust(fs, dj.dir); /* Goto parent directory */ + res = dir_sdi(&dj, 0); + if (res != FR_OK) break; + do { /* Find the entry links to the child directory */ + res = DIR_READ_FILE(&dj); + if (res != FR_OK) break; + if (ccl == ld_clust(fs, dj.dir)) break; /* Found the entry */ + res = dir_next(&dj, 0); + } while (res == FR_OK); + if (res == FR_NO_FILE) res = FR_INT_ERR;/* It cannot be 'not found'. */ + if (res != FR_OK) break; + get_fileinfo(&dj, &fno); /* Get the directory name and push it to the buffer */ + for (n = 0; fno.fname[n]; n++) ; /* Name length */ + if (i < n + 1) { /* Insufficient space to store the path name? */ + res = FR_NOT_ENOUGH_CORE; break; + } + while (n) buff[--i] = fno.fname[--n]; /* Stack the name */ + buff[--i] = '/'; + } + } + if (res == FR_OK) { + if (i == len) buff[--i] = '/'; /* Is it the root-directory? */ +#if FF_VOLUMES >= 2 /* Put drive prefix */ + vl = 0; +#if FF_STR_VOLUME_ID >= 1 /* String volume ID */ + for (n = 0, vp = (const char*)VolumeStr[CurrVol]; vp[n]; n++) ; + if (i >= n + 2) { + if (FF_STR_VOLUME_ID == 2) *tp++ = (TCHAR)'/'; + for (vl = 0; vl < n; *tp++ = (TCHAR)vp[vl], vl++) ; + if (FF_STR_VOLUME_ID == 1) *tp++ = (TCHAR)':'; + vl++; + } +#else /* Numeric volume ID */ + if (i >= 3) { + *tp++ = (TCHAR)'0' + CurrVol; + *tp++ = (TCHAR)':'; + vl = 2; + } +#endif + if (vl == 0) res = FR_NOT_ENOUGH_CORE; +#endif + /* Add current directory path */ + if (res == FR_OK) { + do *tp++ = buff[i++]; while (i < len); /* Copy stacked path string */ + } + } + FREE_NAMBUF(); + } + + *tp = 0; + LEAVE_FF(fs, res); +} + +#endif /* FF_FS_RPATH >= 2 */ +#endif /* FF_FS_RPATH >= 1 */ + + + +#if FF_FS_MINIMIZE <= 2 +/*-----------------------------------------------------------------------*/ +/* Seek File Read/Write Pointer */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_lseek ( + FIL* fp, /* Pointer to the file object */ + FSIZE_t ofs /* File pointer from top of file */ +) +{ + FRESULT res; + FATFS *fs; + DWORD clst, bcs; + LBA_t nsect; + FSIZE_t ifptr; +#if FF_USE_FASTSEEK + DWORD cl, pcl, ncl, tcl, tlen, ulen, *tbl; + LBA_t dsc; +#endif + + res = validate(&fp->obj, &fs); /* Check validity of the file object */ + if (res == FR_OK) res = (FRESULT)fp->err; +#if FF_FS_EXFAT && !FF_FS_READONLY + if (res == FR_OK && fs->fs_type == FS_EXFAT) { + res = fill_last_frag(&fp->obj, fp->clust, 0xFFFFFFFF); /* Fill last fragment on the FAT if needed */ + } +#endif + if (res != FR_OK) LEAVE_FF(fs, res); + +#if FF_USE_FASTSEEK + if (fp->cltbl) { /* Fast seek */ + if (ofs == CREATE_LINKMAP) { /* Create CLMT */ + tbl = fp->cltbl; + tlen = *tbl++; ulen = 2; /* Given table size and required table size */ + cl = fp->obj.sclust; /* Origin of the chain */ + if (cl != 0) { + do { + /* Get a fragment */ + tcl = cl; ncl = 0; ulen += 2; /* Top, length and used items */ + do { + pcl = cl; ncl++; + cl = get_fat(&fp->obj, cl); + if (cl <= 1) ABORT(fs, FR_INT_ERR); + if (cl == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR); + } while (cl == pcl + 1); + if (ulen <= tlen) { /* Store the length and top of the fragment */ + *tbl++ = ncl; *tbl++ = tcl; + } + } while (cl < fs->n_fatent); /* Repeat until end of chain */ + } + *fp->cltbl = ulen; /* Number of items used */ + if (ulen <= tlen) { + *tbl = 0; /* Terminate table */ + } else { + res = FR_NOT_ENOUGH_CORE; /* Given table size is smaller than required */ + } + } else { /* Fast seek */ + if (ofs > fp->obj.objsize) ofs = fp->obj.objsize; /* Clip offset at the file size */ + fp->fptr = ofs; /* Set file pointer */ + if (ofs > 0) { + fp->clust = clmt_clust(fp, ofs - 1); + dsc = clst2sect(fs, fp->clust); + if (dsc == 0) ABORT(fs, FR_INT_ERR); + dsc += (DWORD)((ofs - 1) / SS(fs)) & (fs->csize - 1); + if (fp->fptr % SS(fs) && dsc != fp->sect) { /* Refill sector cache if needed */ +#if !FF_FS_TINY +#if !FF_FS_READONLY + if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */ + if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); + fp->flag &= (BYTE)~FA_DIRTY; + } +#endif + if (disk_read(fs->pdrv, fp->buf, dsc, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); /* Load current sector */ +#endif + fp->sect = dsc; + } + } + } + } else +#endif + + /* Normal Seek */ + { +#if FF_FS_EXFAT + if (fs->fs_type != FS_EXFAT && ofs >= 0x100000000) ofs = 0xFFFFFFFF; /* Clip at 4 GiB - 1 if at FATxx */ +#endif + if (ofs > fp->obj.objsize && (FF_FS_READONLY || !(fp->flag & FA_WRITE))) { /* In read-only mode, clip offset with the file size */ + ofs = fp->obj.objsize; + } + ifptr = fp->fptr; + fp->fptr = nsect = 0; + if (ofs > 0) { + bcs = (DWORD)fs->csize * SS(fs); /* Cluster size (byte) */ + if (ifptr > 0 && + (ofs - 1) / bcs >= (ifptr - 1) / bcs) { /* When seek to same or following cluster, */ + fp->fptr = (ifptr - 1) & ~(FSIZE_t)(bcs - 1); /* start from the current cluster */ + ofs -= fp->fptr; + clst = fp->clust; + } else { /* When seek to back cluster, */ + clst = fp->obj.sclust; /* start from the first cluster */ +#if !FF_FS_READONLY + if (clst == 0) { /* If no cluster chain, create a new chain */ + clst = create_chain(&fp->obj, 0); + if (clst == 1) ABORT(fs, FR_INT_ERR); + if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR); + fp->obj.sclust = clst; + } +#endif + fp->clust = clst; + } + if (clst != 0) { + while (ofs > bcs) { /* Cluster following loop */ + ofs -= bcs; fp->fptr += bcs; +#if !FF_FS_READONLY + if (fp->flag & FA_WRITE) { /* Check if in write mode or not */ + if (FF_FS_EXFAT && fp->fptr > fp->obj.objsize) { /* No FAT chain object needs correct objsize to generate FAT value */ + fp->obj.objsize = fp->fptr; + fp->flag |= FA_MODIFIED; + } + clst = create_chain(&fp->obj, clst); /* Follow chain with forceed stretch */ + if (clst == 0) { /* Clip file size in case of disk full */ + ofs = 0; break; + } + } else +#endif + { + clst = get_fat(&fp->obj, clst); /* Follow cluster chain if not in write mode */ + } + if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR); + if (clst <= 1 || clst >= fs->n_fatent) ABORT(fs, FR_INT_ERR); + fp->clust = clst; + } + fp->fptr += ofs; + if (ofs % SS(fs)) { + nsect = clst2sect(fs, clst); /* Current sector */ + if (nsect == 0) ABORT(fs, FR_INT_ERR); + nsect += (DWORD)(ofs / SS(fs)); + } + } + } + if (!FF_FS_READONLY && fp->fptr > fp->obj.objsize) { /* Set file change flag if the file size is extended */ + fp->obj.objsize = fp->fptr; + fp->flag |= FA_MODIFIED; + } + if (fp->fptr % SS(fs) && nsect != fp->sect) { /* Fill sector cache if needed */ +#if !FF_FS_TINY +#if !FF_FS_READONLY + if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */ + if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); + fp->flag &= (BYTE)~FA_DIRTY; + } +#endif + if (disk_read(fs->pdrv, fp->buf, nsect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); /* Fill sector cache */ +#endif + fp->sect = nsect; + } + } + + LEAVE_FF(fs, res); +} + + + +#if FF_FS_MINIMIZE <= 1 +/*-----------------------------------------------------------------------*/ +/* Create a Directory Object */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_opendir ( + DIR* dp, /* Pointer to directory object to create */ + const TCHAR* path /* Pointer to the directory path */ +) +{ + FRESULT res; + FATFS *fs; + DEF_NAMBUF + + + if (!dp) return FR_INVALID_OBJECT; + + /* Get logical drive */ + res = mount_volume(&path, &fs, 0); + if (res == FR_OK) { + dp->obj.fs = fs; + INIT_NAMBUF(fs); + res = follow_path(dp, path); /* Follow the path to the directory */ + if (res == FR_OK) { /* Follow completed */ + if (!(dp->fn[NSFLAG] & NS_NONAME)) { /* It is not the origin directory itself */ + if (dp->obj.attr & AM_DIR) { /* This object is a sub-directory */ +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { + dp->obj.c_scl = dp->obj.sclust; /* Get containing directory inforamation */ + dp->obj.c_size = ((DWORD)dp->obj.objsize & 0xFFFFFF00) | dp->obj.stat; + dp->obj.c_ofs = dp->blk_ofs; + init_alloc_info(fs, &dp->obj); /* Get object allocation info */ + } else +#endif + { + dp->obj.sclust = ld_clust(fs, dp->dir); /* Get object allocation info */ + } + } else { /* This object is a file */ + res = FR_NO_PATH; + } + } + if (res == FR_OK) { + dp->obj.id = fs->id; + res = dir_sdi(dp, 0); /* Rewind directory */ +#if FF_FS_LOCK != 0 + if (res == FR_OK) { + if (dp->obj.sclust != 0) { + dp->obj.lockid = inc_lock(dp, 0); /* Lock the sub directory */ + if (!dp->obj.lockid) res = FR_TOO_MANY_OPEN_FILES; + } else { + dp->obj.lockid = 0; /* Root directory need not to be locked */ + } + } +#endif + } + } + FREE_NAMBUF(); + if (res == FR_NO_FILE) res = FR_NO_PATH; + } + if (res != FR_OK) dp->obj.fs = 0; /* Invalidate the directory object if function faild */ + + LEAVE_FF(fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Close Directory */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_closedir ( + DIR *dp /* Pointer to the directory object to be closed */ +) +{ + FRESULT res; + FATFS *fs; + + + res = validate(&dp->obj, &fs); /* Check validity of the file object */ + if (res == FR_OK) { +#if FF_FS_LOCK != 0 + if (dp->obj.lockid) res = dec_lock(dp->obj.lockid); /* Decrement sub-directory open counter */ + if (res == FR_OK) dp->obj.fs = 0; /* Invalidate directory object */ +#else + dp->obj.fs = 0; /* Invalidate directory object */ +#endif +#if FF_FS_REENTRANT + unlock_fs(fs, FR_OK); /* Unlock volume */ +#endif + } + return res; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Read Directory Entries in Sequence */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_readdir ( + DIR* dp, /* Pointer to the open directory object */ + FILINFO* fno /* Pointer to file information to return */ +) +{ + FRESULT res; + FATFS *fs; + DEF_NAMBUF + + + res = validate(&dp->obj, &fs); /* Check validity of the directory object */ + if (res == FR_OK) { + if (!fno) { + res = dir_sdi(dp, 0); /* Rewind the directory object */ + } else { + INIT_NAMBUF(fs); + res = DIR_READ_FILE(dp); /* Read an item */ + if (res == FR_NO_FILE) res = FR_OK; /* Ignore end of directory */ + if (res == FR_OK) { /* A valid entry is found */ + get_fileinfo(dp, fno); /* Get the object information */ + res = dir_next(dp, 0); /* Increment index for next */ + if (res == FR_NO_FILE) res = FR_OK; /* Ignore end of directory now */ + } + FREE_NAMBUF(); + } + } + LEAVE_FF(fs, res); +} + + + +#if FF_USE_FIND +/*-----------------------------------------------------------------------*/ +/* Find Next File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_findnext ( + DIR* dp, /* Pointer to the open directory object */ + FILINFO* fno /* Pointer to the file information structure */ +) +{ + FRESULT res; + + + for (;;) { + res = f_readdir(dp, fno); /* Get a directory item */ + if (res != FR_OK || !fno || !fno->fname[0]) break; /* Terminate if any error or end of directory */ + if (pattern_matching(dp->pat, fno->fname, 0, 0)) break; /* Test for the file name */ +#if FF_USE_LFN && FF_USE_FIND == 2 + if (pattern_matching(dp->pat, fno->altname, 0, 0)) break; /* Test for alternative name if exist */ +#endif + } + return res; +} + + + +/*-----------------------------------------------------------------------*/ +/* Find First File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_findfirst ( + DIR* dp, /* Pointer to the blank directory object */ + FILINFO* fno, /* Pointer to the file information structure */ + const TCHAR* path, /* Pointer to the directory to open */ + const TCHAR* pattern /* Pointer to the matching pattern */ +) +{ + FRESULT res; + + + dp->pat = pattern; /* Save pointer to pattern string */ + res = f_opendir(dp, path); /* Open the target directory */ + if (res == FR_OK) { + res = f_findnext(dp, fno); /* Find the first item */ + } + return res; +} + +#endif /* FF_USE_FIND */ + + + +#if FF_FS_MINIMIZE == 0 +/*-----------------------------------------------------------------------*/ +/* Get File Status */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_stat ( + const TCHAR* path, /* Pointer to the file path */ + FILINFO* fno /* Pointer to file information to return */ +) +{ + FRESULT res; + DIR dj; + DEF_NAMBUF + + + /* Get logical drive */ + res = mount_volume(&path, &dj.obj.fs, 0); + if (res == FR_OK) { + INIT_NAMBUF(dj.obj.fs); + res = follow_path(&dj, path); /* Follow the file path */ + if (res == FR_OK) { /* Follow completed */ + if (dj.fn[NSFLAG] & NS_NONAME) { /* It is origin directory */ + res = FR_INVALID_NAME; + } else { /* Found an object */ + if (fno) get_fileinfo(&dj, fno); + } + } + FREE_NAMBUF(); + } + + LEAVE_FF(dj.obj.fs, res); +} + + + +#if !FF_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* Get Number of Free Clusters */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_getfree ( + const TCHAR* path, /* Logical drive number */ + DWORD* nclst, /* Pointer to a variable to return number of free clusters */ + FATFS** fatfs /* Pointer to return pointer to corresponding filesystem object */ +) +{ + FRESULT res; + FATFS *fs; + DWORD nfree, clst, stat; + LBA_t sect; + UINT i; + FFOBJID obj; + + + /* Get logical drive */ + res = mount_volume(&path, &fs, 0); + if (res == FR_OK) { + *fatfs = fs; /* Return ptr to the fs object */ + /* If free_clst is valid, return it without full FAT scan */ + if (fs->free_clst <= fs->n_fatent - 2) { + *nclst = fs->free_clst; + } else { + /* Scan FAT to obtain number of free clusters */ + nfree = 0; + if (fs->fs_type == FS_FAT12) { /* FAT12: Scan bit field FAT entries */ + clst = 2; obj.fs = fs; + do { + stat = get_fat(&obj, clst); + if (stat == 0xFFFFFFFF) { res = FR_DISK_ERR; break; } + if (stat == 1) { res = FR_INT_ERR; break; } + if (stat == 0) nfree++; + } while (++clst < fs->n_fatent); + } else { +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { /* exFAT: Scan allocation bitmap */ + BYTE bm; + UINT b; + + clst = fs->n_fatent - 2; /* Number of clusters */ + sect = fs->bitbase; /* Bitmap sector */ + i = 0; /* Offset in the sector */ + do { /* Counts numbuer of bits with zero in the bitmap */ + if (i == 0) { + res = move_window(fs, sect++); + if (res != FR_OK) break; + } + for (b = 8, bm = fs->win[i]; b && clst; b--, clst--) { + if (!(bm & 1)) nfree++; + bm >>= 1; + } + i = (i + 1) % SS(fs); + } while (clst); + } else +#endif + { /* FAT16/32: Scan WORD/DWORD FAT entries */ + clst = fs->n_fatent; /* Number of entries */ + sect = fs->fatbase; /* Top of the FAT */ + i = 0; /* Offset in the sector */ + do { /* Counts numbuer of entries with zero in the FAT */ + if (i == 0) { + res = move_window(fs, sect++); + if (res != FR_OK) break; + } + if (fs->fs_type == FS_FAT16) { + if (ld_word(fs->win + i) == 0) nfree++; + i += 2; + } else { + if ((ld_dword(fs->win + i) & 0x0FFFFFFF) == 0) nfree++; + i += 4; + } + i %= SS(fs); + } while (--clst); + } + } + *nclst = nfree; /* Return the free clusters */ + fs->free_clst = nfree; /* Now free_clst is valid */ + fs->fsi_flag |= 1; /* FAT32: FSInfo is to be updated */ + } + } + + LEAVE_FF(fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Truncate File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_truncate ( + FIL* fp /* Pointer to the file object */ +) +{ + FRESULT res; + FATFS *fs; + DWORD ncl; + + + res = validate(&fp->obj, &fs); /* Check validity of the file object */ + if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res); + if (!(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */ + + if (fp->fptr < fp->obj.objsize) { /* Process when fptr is not on the eof */ + if (fp->fptr == 0) { /* When set file size to zero, remove entire cluster chain */ + res = remove_chain(&fp->obj, fp->obj.sclust, 0); + fp->obj.sclust = 0; + } else { /* When truncate a part of the file, remove remaining clusters */ + ncl = get_fat(&fp->obj, fp->clust); + res = FR_OK; + if (ncl == 0xFFFFFFFF) res = FR_DISK_ERR; + if (ncl == 1) res = FR_INT_ERR; + if (res == FR_OK && ncl < fs->n_fatent) { + res = remove_chain(&fp->obj, ncl, fp->clust); + } + } + fp->obj.objsize = fp->fptr; /* Set file size to current read/write point */ + fp->flag |= FA_MODIFIED; +#if !FF_FS_TINY + if (res == FR_OK && (fp->flag & FA_DIRTY)) { + if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) { + res = FR_DISK_ERR; + } else { + fp->flag &= (BYTE)~FA_DIRTY; + } + } +#endif + if (res != FR_OK) ABORT(fs, res); + } + + LEAVE_FF(fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Delete a File/Directory */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_unlink ( + const TCHAR* path /* Pointer to the file or directory path */ +) +{ + FRESULT res; + DIR dj, sdj; + DWORD dclst = 0; + FATFS *fs; +#if FF_FS_EXFAT + FFOBJID obj; +#endif + DEF_NAMBUF + + + /* Get logical drive */ + res = mount_volume(&path, &fs, FA_WRITE); + if (res == FR_OK) { + dj.obj.fs = fs; + INIT_NAMBUF(fs); + res = follow_path(&dj, path); /* Follow the file path */ + if (FF_FS_RPATH && res == FR_OK && (dj.fn[NSFLAG] & NS_DOT)) { + res = FR_INVALID_NAME; /* Cannot remove dot entry */ + } +#if FF_FS_LOCK != 0 + if (res == FR_OK) res = chk_lock(&dj, 2); /* Check if it is an open object */ +#endif + if (res == FR_OK) { /* The object is accessible */ + if (dj.fn[NSFLAG] & NS_NONAME) { + res = FR_INVALID_NAME; /* Cannot remove the origin directory */ + } else { + if (dj.obj.attr & AM_RDO) { + res = FR_DENIED; /* Cannot remove R/O object */ + } + } + if (res == FR_OK) { +#if FF_FS_EXFAT + obj.fs = fs; + if (fs->fs_type == FS_EXFAT) { + init_alloc_info(fs, &obj); + dclst = obj.sclust; + } else +#endif + { + dclst = ld_clust(fs, dj.dir); + } + if (dj.obj.attr & AM_DIR) { /* Is it a sub-directory? */ +#if FF_FS_RPATH != 0 + if (dclst == fs->cdir) { /* Is it the current directory? */ + res = FR_DENIED; + } else +#endif + { + sdj.obj.fs = fs; /* Open the sub-directory */ + sdj.obj.sclust = dclst; +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { + sdj.obj.objsize = obj.objsize; + sdj.obj.stat = obj.stat; + } +#endif + res = dir_sdi(&sdj, 0); + if (res == FR_OK) { + res = DIR_READ_FILE(&sdj); /* Test if the directory is empty */ + if (res == FR_OK) res = FR_DENIED; /* Not empty? */ + if (res == FR_NO_FILE) res = FR_OK; /* Empty? */ + } + } + } + } + if (res == FR_OK) { + res = dir_remove(&dj); /* Remove the directory entry */ + if (res == FR_OK && dclst != 0) { /* Remove the cluster chain if exist */ +#if FF_FS_EXFAT + res = remove_chain(&obj, dclst, 0); +#else + res = remove_chain(&dj.obj, dclst, 0); +#endif + } + if (res == FR_OK) res = sync_fs(fs); + } + } + FREE_NAMBUF(); + } + + LEAVE_FF(fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Create a Directory */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_mkdir ( + const TCHAR* path /* Pointer to the directory path */ +) +{ + FRESULT res; + DIR dj; + FFOBJID sobj; + FATFS *fs; + DWORD dcl, pcl, tm; + DEF_NAMBUF + + + res = mount_volume(&path, &fs, FA_WRITE); /* Get logical drive */ + if (res == FR_OK) { + dj.obj.fs = fs; + INIT_NAMBUF(fs); + res = follow_path(&dj, path); /* Follow the file path */ + if (res == FR_OK) res = FR_EXIST; /* Name collision? */ + if (FF_FS_RPATH && res == FR_NO_FILE && (dj.fn[NSFLAG] & NS_DOT)) { /* Invalid name? */ + res = FR_INVALID_NAME; + } + if (res == FR_NO_FILE) { /* It is clear to create a new directory */ + sobj.fs = fs; /* New object id to create a new chain */ + dcl = create_chain(&sobj, 0); /* Allocate a cluster for the new directory */ + res = FR_OK; + if (dcl == 0) res = FR_DENIED; /* No space to allocate a new cluster? */ + if (dcl == 1) res = FR_INT_ERR; /* Any insanity? */ + if (dcl == 0xFFFFFFFF) res = FR_DISK_ERR; /* Disk error? */ + tm = GET_FATTIME(); + if (res == FR_OK) { + res = dir_clear(fs, dcl); /* Clean up the new table */ + if (res == FR_OK) { + if (!FF_FS_EXFAT || fs->fs_type != FS_EXFAT) { /* Create dot entries (FAT only) */ + mem_set(fs->win + DIR_Name, ' ', 11); /* Create "." entry */ + fs->win[DIR_Name] = '.'; + fs->win[DIR_Attr] = AM_DIR; + st_dword(fs->win + DIR_ModTime, tm); + st_clust(fs, fs->win, dcl); + mem_cpy(fs->win + SZDIRE, fs->win, SZDIRE); /* Create ".." entry */ + fs->win[SZDIRE + 1] = '.'; pcl = dj.obj.sclust; + st_clust(fs, fs->win + SZDIRE, pcl); + fs->wflag = 1; + } + res = dir_register(&dj); /* Register the object to the parent directoy */ + } + } + if (res == FR_OK) { +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { /* Initialize directory entry block */ + st_dword(fs->dirbuf + XDIR_ModTime, tm); /* Created time */ + st_dword(fs->dirbuf + XDIR_FstClus, dcl); /* Table start cluster */ + st_dword(fs->dirbuf + XDIR_FileSize, (DWORD)fs->csize * SS(fs)); /* Directory size needs to be valid */ + st_dword(fs->dirbuf + XDIR_ValidFileSize, (DWORD)fs->csize * SS(fs)); + fs->dirbuf[XDIR_GenFlags] = 3; /* Initialize the object flag */ + fs->dirbuf[XDIR_Attr] = AM_DIR; /* Attribute */ + res = store_xdir(&dj); + } else +#endif + { + st_dword(dj.dir + DIR_ModTime, tm); /* Created time */ + st_clust(fs, dj.dir, dcl); /* Table start cluster */ + dj.dir[DIR_Attr] = AM_DIR; /* Attribute */ + fs->wflag = 1; + } + if (res == FR_OK) { + res = sync_fs(fs); + } + } else { + remove_chain(&sobj, dcl, 0); /* Could not register, remove the allocated cluster */ + } + } + FREE_NAMBUF(); + } + + LEAVE_FF(fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Rename a File/Directory */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_rename ( + const TCHAR* path_old, /* Pointer to the object name to be renamed */ + const TCHAR* path_new /* Pointer to the new name */ +) +{ + FRESULT res; + DIR djo, djn; + FATFS *fs; + BYTE buf[FF_FS_EXFAT ? SZDIRE * 2 : SZDIRE], *dir; + LBA_t sect; + DEF_NAMBUF + + + get_ldnumber(&path_new); /* Snip the drive number of new name off */ + res = mount_volume(&path_old, &fs, FA_WRITE); /* Get logical drive of the old object */ + if (res == FR_OK) { + djo.obj.fs = fs; + INIT_NAMBUF(fs); + res = follow_path(&djo, path_old); /* Check old object */ + if (res == FR_OK && (djo.fn[NSFLAG] & (NS_DOT | NS_NONAME))) res = FR_INVALID_NAME; /* Check validity of name */ +#if FF_FS_LOCK != 0 + if (res == FR_OK) { + res = chk_lock(&djo, 2); + } +#endif + if (res == FR_OK) { /* Object to be renamed is found */ +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { /* At exFAT volume */ + BYTE nf, nn; + WORD nh; + + mem_cpy(buf, fs->dirbuf, SZDIRE * 2); /* Save 85+C0 entry of old object */ + mem_cpy(&djn, &djo, sizeof djo); + res = follow_path(&djn, path_new); /* Make sure if new object name is not in use */ + if (res == FR_OK) { /* Is new name already in use by any other object? */ + res = (djn.obj.sclust == djo.obj.sclust && djn.dptr == djo.dptr) ? FR_NO_FILE : FR_EXIST; + } + if (res == FR_NO_FILE) { /* It is a valid path and no name collision */ + res = dir_register(&djn); /* Register the new entry */ + if (res == FR_OK) { + nf = fs->dirbuf[XDIR_NumSec]; nn = fs->dirbuf[XDIR_NumName]; + nh = ld_word(fs->dirbuf + XDIR_NameHash); + mem_cpy(fs->dirbuf, buf, SZDIRE * 2); /* Restore 85+C0 entry */ + fs->dirbuf[XDIR_NumSec] = nf; fs->dirbuf[XDIR_NumName] = nn; + st_word(fs->dirbuf + XDIR_NameHash, nh); + if (!(fs->dirbuf[XDIR_Attr] & AM_DIR)) fs->dirbuf[XDIR_Attr] |= AM_ARC; /* Set archive attribute if it is a file */ +/* Start of critical section where an interruption can cause a cross-link */ + res = store_xdir(&djn); + } + } + } else +#endif + { /* At FAT/FAT32 volume */ + mem_cpy(buf, djo.dir, SZDIRE); /* Save directory entry of the object */ + mem_cpy(&djn, &djo, sizeof (DIR)); /* Duplicate the directory object */ + res = follow_path(&djn, path_new); /* Make sure if new object name is not in use */ + if (res == FR_OK) { /* Is new name already in use by any other object? */ + res = (djn.obj.sclust == djo.obj.sclust && djn.dptr == djo.dptr) ? FR_NO_FILE : FR_EXIST; + } + if (res == FR_NO_FILE) { /* It is a valid path and no name collision */ + res = dir_register(&djn); /* Register the new entry */ + if (res == FR_OK) { + dir = djn.dir; /* Copy directory entry of the object except name */ + mem_cpy(dir + 13, buf + 13, SZDIRE - 13); + dir[DIR_Attr] = buf[DIR_Attr]; + if (!(dir[DIR_Attr] & AM_DIR)) dir[DIR_Attr] |= AM_ARC; /* Set archive attribute if it is a file */ + fs->wflag = 1; + if ((dir[DIR_Attr] & AM_DIR) && djo.obj.sclust != djn.obj.sclust) { /* Update .. entry in the sub-directory if needed */ + sect = clst2sect(fs, ld_clust(fs, dir)); + if (sect == 0) { + res = FR_INT_ERR; + } else { +/* Start of critical section where an interruption can cause a cross-link */ + res = move_window(fs, sect); + dir = fs->win + SZDIRE * 1; /* Ptr to .. entry */ + if (res == FR_OK && dir[1] == '.') { + st_clust(fs, dir, djn.obj.sclust); + fs->wflag = 1; + } + } + } + } + } + } + if (res == FR_OK) { + res = dir_remove(&djo); /* Remove old entry */ + if (res == FR_OK) { + res = sync_fs(fs); + } + } +/* End of the critical section */ + } + FREE_NAMBUF(); + } + + LEAVE_FF(fs, res); +} + +#endif /* !FF_FS_READONLY */ +#endif /* FF_FS_MINIMIZE == 0 */ +#endif /* FF_FS_MINIMIZE <= 1 */ +#endif /* FF_FS_MINIMIZE <= 2 */ + + + +#if FF_USE_CHMOD && !FF_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* Change Attribute */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_chmod ( + const TCHAR* path, /* Pointer to the file path */ + BYTE attr, /* Attribute bits */ + BYTE mask /* Attribute mask to change */ +) +{ + FRESULT res; + DIR dj; + FATFS *fs; + DEF_NAMBUF + + + res = mount_volume(&path, &fs, FA_WRITE); /* Get logical drive */ + if (res == FR_OK) { + dj.obj.fs = fs; + INIT_NAMBUF(fs); + res = follow_path(&dj, path); /* Follow the file path */ + if (res == FR_OK && (dj.fn[NSFLAG] & (NS_DOT | NS_NONAME))) res = FR_INVALID_NAME; /* Check object validity */ + if (res == FR_OK) { + mask &= AM_RDO|AM_HID|AM_SYS|AM_ARC; /* Valid attribute mask */ +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { + fs->dirbuf[XDIR_Attr] = (attr & mask) | (fs->dirbuf[XDIR_Attr] & (BYTE)~mask); /* Apply attribute change */ + res = store_xdir(&dj); + } else +#endif + { + dj.dir[DIR_Attr] = (attr & mask) | (dj.dir[DIR_Attr] & (BYTE)~mask); /* Apply attribute change */ + fs->wflag = 1; + } + if (res == FR_OK) { + res = sync_fs(fs); + } + } + FREE_NAMBUF(); + } + + LEAVE_FF(fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Change Timestamp */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_utime ( + const TCHAR* path, /* Pointer to the file/directory name */ + const FILINFO* fno /* Pointer to the timestamp to be set */ +) +{ + FRESULT res; + DIR dj; + FATFS *fs; + DEF_NAMBUF + + + res = mount_volume(&path, &fs, FA_WRITE); /* Get logical drive */ + if (res == FR_OK) { + dj.obj.fs = fs; + INIT_NAMBUF(fs); + res = follow_path(&dj, path); /* Follow the file path */ + if (res == FR_OK && (dj.fn[NSFLAG] & (NS_DOT | NS_NONAME))) res = FR_INVALID_NAME; /* Check object validity */ + if (res == FR_OK) { +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { + st_dword(fs->dirbuf + XDIR_ModTime, (DWORD)fno->fdate << 16 | fno->ftime); + res = store_xdir(&dj); + } else +#endif + { + st_dword(dj.dir + DIR_ModTime, (DWORD)fno->fdate << 16 | fno->ftime); + fs->wflag = 1; + } + if (res == FR_OK) { + res = sync_fs(fs); + } + } + FREE_NAMBUF(); + } + + LEAVE_FF(fs, res); +} + +#endif /* FF_USE_CHMOD && !FF_FS_READONLY */ + + + +#if FF_USE_LABEL +/*-----------------------------------------------------------------------*/ +/* Get Volume Label */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_getlabel ( + const TCHAR* path, /* Logical drive number */ + TCHAR* label, /* Buffer to store the volume label */ + DWORD* vsn /* Variable to store the volume serial number */ +) +{ + FRESULT res; + DIR dj; + FATFS *fs; + UINT si, di; + WCHAR wc; + + /* Get logical drive */ + res = mount_volume(&path, &fs, 0); + + /* Get volume label */ + if (res == FR_OK && label) { + dj.obj.fs = fs; dj.obj.sclust = 0; /* Open root directory */ + res = dir_sdi(&dj, 0); + if (res == FR_OK) { + res = DIR_READ_LABEL(&dj); /* Find a volume label entry */ + if (res == FR_OK) { +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { + WCHAR hs; + + for (si = di = hs = 0; si < dj.dir[XDIR_NumLabel]; si++) { /* Extract volume label from 83 entry */ + wc = ld_word(dj.dir + XDIR_Label + si * 2); + if (hs == 0 && IsSurrogate(wc)) { /* Is the code a surrogate? */ + hs = wc; continue; + } + wc = put_utf((DWORD)hs << 16 | wc, &label[di], 4); + if (wc == 0) { di = 0; break; } + di += wc; + hs = 0; + } + if (hs != 0) di = 0; /* Broken surrogate pair? */ + label[di] = 0; + } else +#endif + { + si = di = 0; /* Extract volume label from AM_VOL entry */ + while (si < 11) { + wc = dj.dir[si++]; +#if FF_USE_LFN && FF_LFN_UNICODE >= 1 /* Unicode output */ + if (dbc_1st((BYTE)wc) && si < 11) wc = wc << 8 | dj.dir[si++]; /* Is it a DBC? */ + wc = ff_oem2uni(wc, CODEPAGE); /* Convert it into Unicode */ + if (wc != 0) wc = put_utf(wc, &label[di], 4); /* Put it in Unicode */ + if (wc == 0) { di = 0; break; } + di += wc; +#else /* ANSI/OEM output */ + label[di++] = (TCHAR)wc; +#endif + } + do { /* Truncate trailing spaces */ + label[di] = 0; + if (di == 0) break; + } while (label[--di] == ' '); + } + } + } + if (res == FR_NO_FILE) { /* No label entry and return nul string */ + label[0] = 0; + res = FR_OK; + } + } + + /* Get volume serial number */ + if (res == FR_OK && vsn) { + res = move_window(fs, fs->volbase); + if (res == FR_OK) { + switch (fs->fs_type) { + case FS_EXFAT: + di = BPB_VolIDEx; break; + + case FS_FAT32: + di = BS_VolID32; break; + + default: + di = BS_VolID; + } + *vsn = ld_dword(fs->win + di); + } + } + + LEAVE_FF(fs, res); +} + + + +#if !FF_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* Set Volume Label */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_setlabel ( + const TCHAR* label /* Volume label to set with heading logical drive number */ +) +{ + FRESULT res; + DIR dj; + FATFS *fs; + BYTE dirvn[22]; + UINT di; + WCHAR wc; + static const char badchr[] = "+.,;=[]/\\\"*:<>\?|\x7F"; /* [0..] for FAT, [7..] for exFAT */ +#if FF_USE_LFN + DWORD dc; +#endif + + /* Get logical drive */ + res = mount_volume(&label, &fs, FA_WRITE); + if (res != FR_OK) LEAVE_FF(fs, res); + +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { /* On the exFAT volume */ + mem_set(dirvn, 0, 22); + di = 0; + while ((UINT)*label >= ' ') { /* Create volume label */ + dc = tchar2uni(&label); /* Get a Unicode character */ + if (dc >= 0x10000) { + if (dc == 0xFFFFFFFF || di >= 10) { /* Wrong surrogate or buffer overflow */ + dc = 0; + } else { + st_word(dirvn + di * 2, (WCHAR)(dc >> 16)); di++; + } + } + if (dc == 0 || chk_chr(badchr + 7, (int)dc) || di >= 11) { /* Check validity of the volume label */ + LEAVE_FF(fs, FR_INVALID_NAME); + } + st_word(dirvn + di * 2, (WCHAR)dc); di++; + } + } else +#endif + { /* On the FAT/FAT32 volume */ + mem_set(dirvn, ' ', 11); + di = 0; + while ((UINT)*label >= ' ') { /* Create volume label */ +#if FF_USE_LFN + dc = tchar2uni(&label); + wc = (dc < 0x10000) ? ff_uni2oem(ff_wtoupper(dc), CODEPAGE) : 0; +#else /* ANSI/OEM input */ + wc = (BYTE)*label++; + if (dbc_1st((BYTE)wc)) wc = dbc_2nd((BYTE)*label) ? wc << 8 | (BYTE)*label++ : 0; + if (IsLower(wc)) wc -= 0x20; /* To upper ASCII characters */ +#if FF_CODE_PAGE == 0 + if (ExCvt && wc >= 0x80) wc = ExCvt[wc - 0x80]; /* To upper extended characters (SBCS cfg) */ +#elif FF_CODE_PAGE < 900 + if (wc >= 0x80) wc = ExCvt[wc - 0x80]; /* To upper extended characters (SBCS cfg) */ +#endif +#endif + if (wc == 0 || chk_chr(badchr + 0, (int)wc) || di >= (UINT)((wc >= 0x100) ? 10 : 11)) { /* Reject invalid characters for volume label */ + LEAVE_FF(fs, FR_INVALID_NAME); + } + if (wc >= 0x100) dirvn[di++] = (BYTE)(wc >> 8); + dirvn[di++] = (BYTE)wc; + } + if (dirvn[0] == DDEM) LEAVE_FF(fs, FR_INVALID_NAME); /* Reject illegal name (heading DDEM) */ + while (di && dirvn[di - 1] == ' ') di--; /* Snip trailing spaces */ + } + + /* Set volume label */ + dj.obj.fs = fs; dj.obj.sclust = 0; /* Open root directory */ + res = dir_sdi(&dj, 0); + if (res == FR_OK) { + res = DIR_READ_LABEL(&dj); /* Get volume label entry */ + if (res == FR_OK) { + if (FF_FS_EXFAT && fs->fs_type == FS_EXFAT) { + dj.dir[XDIR_NumLabel] = (BYTE)di; /* Change the volume label */ + mem_cpy(dj.dir + XDIR_Label, dirvn, 22); + } else { + if (di != 0) { + mem_cpy(dj.dir, dirvn, 11); /* Change the volume label */ + } else { + dj.dir[DIR_Name] = DDEM; /* Remove the volume label */ + } + } + fs->wflag = 1; + res = sync_fs(fs); + } else { /* No volume label entry or an error */ + if (res == FR_NO_FILE) { + res = FR_OK; + if (di != 0) { /* Create a volume label entry */ + res = dir_alloc(&dj, 1); /* Allocate an entry */ + if (res == FR_OK) { + mem_set(dj.dir, 0, SZDIRE); /* Clean the entry */ + if (FF_FS_EXFAT && fs->fs_type == FS_EXFAT) { + dj.dir[XDIR_Type] = ET_VLABEL; /* Create volume label entry */ + dj.dir[XDIR_NumLabel] = (BYTE)di; + mem_cpy(dj.dir + XDIR_Label, dirvn, 22); + } else { + dj.dir[DIR_Attr] = AM_VOL; /* Create volume label entry */ + mem_cpy(dj.dir, dirvn, 11); + } + fs->wflag = 1; + res = sync_fs(fs); + } + } + } + } + } + + LEAVE_FF(fs, res); +} + +#endif /* !FF_FS_READONLY */ +#endif /* FF_USE_LABEL */ + + + +#if FF_USE_EXPAND && !FF_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* Allocate a Contiguous Blocks to the File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_expand ( + FIL* fp, /* Pointer to the file object */ + FSIZE_t fsz, /* File size to be expanded to */ + BYTE opt /* Operation mode 0:Find and prepare or 1:Find and allocate */ +) +{ + FRESULT res; + FATFS *fs; + DWORD n, clst, stcl, scl, ncl, tcl, lclst; + + + res = validate(&fp->obj, &fs); /* Check validity of the file object */ + if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res); + if (fsz == 0 || fp->obj.objsize != 0 || !(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED); +#if FF_FS_EXFAT + if (fs->fs_type != FS_EXFAT && fsz >= 0x100000000) LEAVE_FF(fs, FR_DENIED); /* Check if in size limit */ +#endif + n = (DWORD)fs->csize * SS(fs); /* Cluster size */ + tcl = (DWORD)(fsz / n) + ((fsz & (n - 1)) ? 1 : 0); /* Number of clusters required */ + stcl = fs->last_clst; lclst = 0; + if (stcl < 2 || stcl >= fs->n_fatent) stcl = 2; + +#if FF_FS_EXFAT + if (fs->fs_type == FS_EXFAT) { + scl = find_bitmap(fs, stcl, tcl); /* Find a contiguous cluster block */ + if (scl == 0) res = FR_DENIED; /* No contiguous cluster block was found */ + if (scl == 0xFFFFFFFF) res = FR_DISK_ERR; + if (res == FR_OK) { /* A contiguous free area is found */ + if (opt) { /* Allocate it now */ + res = change_bitmap(fs, scl, tcl, 1); /* Mark the cluster block 'in use' */ + lclst = scl + tcl - 1; + } else { /* Set it as suggested point for next allocation */ + lclst = scl - 1; + } + } + } else +#endif + { + scl = clst = stcl; ncl = 0; + for (;;) { /* Find a contiguous cluster block */ + n = get_fat(&fp->obj, clst); + if (++clst >= fs->n_fatent) clst = 2; + if (n == 1) { res = FR_INT_ERR; break; } + if (n == 0xFFFFFFFF) { res = FR_DISK_ERR; break; } + if (n == 0) { /* Is it a free cluster? */ + if (++ncl == tcl) break; /* Break if a contiguous cluster block is found */ + } else { + scl = clst; ncl = 0; /* Not a free cluster */ + } + if (clst == stcl) { res = FR_DENIED; break; } /* No contiguous cluster? */ + } + if (res == FR_OK) { /* A contiguous free area is found */ + if (opt) { /* Allocate it now */ + for (clst = scl, n = tcl; n; clst++, n--) { /* Create a cluster chain on the FAT */ + res = put_fat(fs, clst, (n == 1) ? 0xFFFFFFFF : clst + 1); + if (res != FR_OK) break; + lclst = clst; + } + } else { /* Set it as suggested point for next allocation */ + lclst = scl - 1; + } + } + } + + if (res == FR_OK) { + fs->last_clst = lclst; /* Set suggested start cluster to start next */ + if (opt) { /* Is it allocated now? */ + fp->obj.sclust = scl; /* Update object allocation information */ + fp->obj.objsize = fsz; + if (FF_FS_EXFAT) fp->obj.stat = 2; /* Set status 'contiguous chain' */ + fp->flag |= FA_MODIFIED; + if (fs->free_clst <= fs->n_fatent - 2) { /* Update FSINFO */ + fs->free_clst -= tcl; + fs->fsi_flag |= 1; + } + } + } + + LEAVE_FF(fs, res); +} + +#endif /* FF_USE_EXPAND && !FF_FS_READONLY */ + + + +#if FF_USE_FORWARD +/*-----------------------------------------------------------------------*/ +/* Forward Data to the Stream Directly */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_forward ( + FIL* fp, /* Pointer to the file object */ + UINT (*func)(const BYTE*,UINT), /* Pointer to the streaming function */ + UINT btf, /* Number of bytes to forward */ + UINT* bf /* Pointer to number of bytes forwarded */ +) +{ + FRESULT res; + FATFS *fs; + DWORD clst; + LBA_t sect; + FSIZE_t remain; + UINT rcnt, csect; + BYTE *dbuf; + + + *bf = 0; /* Clear transfer byte counter */ + res = validate(&fp->obj, &fs); /* Check validity of the file object */ + if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res); + if (!(fp->flag & FA_READ)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */ + + remain = fp->obj.objsize - fp->fptr; + if (btf > remain) btf = (UINT)remain; /* Truncate btf by remaining bytes */ + + for ( ; btf && (*func)(0, 0); /* Repeat until all data transferred or stream goes busy */ + fp->fptr += rcnt, *bf += rcnt, btf -= rcnt) { + csect = (UINT)(fp->fptr / SS(fs) & (fs->csize - 1)); /* Sector offset in the cluster */ + if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */ + if (csect == 0) { /* On the cluster boundary? */ + clst = (fp->fptr == 0) ? /* On the top of the file? */ + fp->obj.sclust : get_fat(&fp->obj, fp->clust); + if (clst <= 1) ABORT(fs, FR_INT_ERR); + if (clst == 0xFFFFFFFF) ABORT(fs, FR_DISK_ERR); + fp->clust = clst; /* Update current cluster */ + } + } + sect = clst2sect(fs, fp->clust); /* Get current data sector */ + if (sect == 0) ABORT(fs, FR_INT_ERR); + sect += csect; +#if FF_FS_TINY + if (move_window(fs, sect) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Move sector window to the file data */ + dbuf = fs->win; +#else + if (fp->sect != sect) { /* Fill sector cache with file data */ +#if !FF_FS_READONLY + if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */ + if (disk_write(fs->pdrv, fp->buf, fp->sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); + fp->flag &= (BYTE)~FA_DIRTY; + } +#endif + if (disk_read(fs->pdrv, fp->buf, sect, 1) != RES_OK) ABORT(fs, FR_DISK_ERR); + } + dbuf = fp->buf; +#endif + fp->sect = sect; + rcnt = SS(fs) - (UINT)fp->fptr % SS(fs); /* Number of bytes remains in the sector */ + if (rcnt > btf) rcnt = btf; /* Clip it by btr if needed */ + rcnt = (*func)(dbuf + ((UINT)fp->fptr % SS(fs)), rcnt); /* Forward the file data */ + if (rcnt == 0) ABORT(fs, FR_INT_ERR); + } + + LEAVE_FF(fs, FR_OK); +} +#endif /* FF_USE_FORWARD */ + + + +#if !FF_FS_READONLY && FF_USE_MKFS +/*-----------------------------------------------------------------------*/ +/* Create an FAT/exFAT volume */ +/*-----------------------------------------------------------------------*/ + +#define N_SEC_TRACK 63 /* Sectors per track for determination of drive CHS */ +#define GPT_ALIGN 0x100000 /* Alignment of partitions in GPT [byte] (>=128KB) */ +#define GPT_ITEMS 128 /* Number of GPT table size (>=128, sector aligned) */ + + +/* Create partitions on the physical drive */ + +static FRESULT create_partition ( + BYTE drv, /* Physical drive number */ + const LBA_t plst[], /* Partition list */ + UINT sys, /* System ID (for only MBR, temp setting) and bit8:GPT */ + BYTE* buf /* Working buffer for a sector */ +) +{ + UINT i, cy; + LBA_t sz_drv; + DWORD sz_drv32, s_lba32, n_lba32; + BYTE *pte, hd, n_hd, sc, n_sc; + + /* Get drive size */ + if (disk_ioctl(drv, GET_SECTOR_COUNT, &sz_drv) != RES_OK) return FR_DISK_ERR; + +#if FF_LBA64 + if (sz_drv >= FF_MIN_GPT) { /* Create partitions in GPT */ + WORD ss; + UINT sz_pt, pi, si, ofs; + DWORD bcc, rnd, align; + QWORD s_lba64, n_lba64, sz_pool, s_bpt; + static const BYTE gpt_mbr[16] = {0x00, 0x00, 0x02, 0x00, 0xEE, 0xFE, 0xFF, 0x00, 0x01, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF}; + +#if FF_MAX_SS != FF_MIN_SS + if (disk_ioctl(drv, GET_SECTOR_SIZE, &ss) != RES_OK) return FR_DISK_ERR; /* Get sector size */ + if (ss > FF_MAX_SS || ss < FF_MIN_SS || (ss & (ss - 1))) return FR_DISK_ERR; +#else + ss = FF_MAX_SS; +#endif + rnd = GET_FATTIME(); /* Random seed */ + align = GPT_ALIGN / ss; /* Partition alignment [sector] */ + sz_pt = GPT_ITEMS * SZ_GPTE / ss; /* Size of PT [sector] */ + s_bpt = sz_drv - sz_pt - 1; /* Backup PT start sector */ + s_lba64 = 2 + sz_pt; /* First allocatable sector */ + sz_pool = s_bpt - s_lba64; /* Size of allocatable area */ + bcc = 0xFFFFFFFF; n_lba64 = 1; + pi = si = 0; /* partition table index, size table index */ + do { + if (pi * SZ_GPTE % ss == 0) mem_set(buf, 0, ss); /* Clean the buffer if needed */ + if (n_lba64 != 0) { /* Is the size table not termintated? */ + s_lba64 = (s_lba64 + align - 1) & ((QWORD)0 - align); /* Align partition start */ + n_lba64 = plst[si++]; /* Get a partition size */ + if (n_lba64 <= 100) { /* Is the size in percentage? */ + n_lba64 = sz_pool * n_lba64 / 100; + n_lba64 = (n_lba64 + align - 1) & ((QWORD)0 - align); /* Align partition end (only if in percentage) */ + } + if (s_lba64 + n_lba64 > s_bpt) { /* Clip at end of the pool */ + n_lba64 = (s_lba64 < s_bpt) ? s_bpt - s_lba64 : 0; + } + } + if (n_lba64 != 0) { /* Add a partition? */ + ofs = pi * SZ_GPTE % ss; + mem_cpy(buf + ofs + GPTE_PtGuid, GUID_MS_Basic, 16); /* Partition GUID (Microsoft Basic Data) */ + rnd = make_rand(rnd, buf + ofs + GPTE_UpGuid, 16); /* Unique partition GUID */ + st_qword(buf + ofs + GPTE_FstLba, s_lba64); /* Partition start LBA */ + st_qword(buf + ofs + GPTE_LstLba, s_lba64 + n_lba64 - 1); /* Partition end LBA */ + s_lba64 += n_lba64; /* Next partition LBA */ + } + if ((pi + 1) * SZ_GPTE % ss == 0) { /* Write the buffer if it is filled up */ + for (i = 0; i < ss; bcc = crc32(bcc, buf[i++])) ; /* Calculate table check sum */ + if (disk_write(drv, buf, 2 + pi * SZ_GPTE / ss, 1) != RES_OK) return FR_DISK_ERR; /* Primary table */ + if (disk_write(drv, buf, s_bpt + pi * SZ_GPTE / ss, 1) != RES_OK) return FR_DISK_ERR; /* Secondary table */ + } + } while (++pi < GPT_ITEMS); + + /* Create primary GPT header */ + mem_set(buf, 0, ss); + mem_cpy(buf + GPTH_Sign, "EFI PART" "\0\0\1\0" "\x5C\0\0", 16); /* Signature, version (1.0) and size (92) */ + st_dword(buf + GPTH_PtBcc, ~bcc); /* Table check sum */ + st_qword(buf + GPTH_CurLba, 1); /* LBA of this header */ + st_qword(buf + GPTH_BakLba, sz_drv - 1); /* LBA of another header */ + st_qword(buf + GPTH_FstLba, 2 + sz_pt); /* LBA of first allocatable sector */ + st_qword(buf + GPTH_LstLba, s_bpt - 1); /* LBA of last allocatable sector */ + st_dword(buf + GPTH_PteSize, SZ_GPTE); /* Size of a table entry */ + st_dword(buf + GPTH_PtNum, GPT_ITEMS); /* Number of table entries */ + st_dword(buf + GPTH_PtOfs, 2); /* LBA of this table */ + rnd = make_rand(rnd, buf + GPTH_DskGuid, 16); /* Disk GUID */ + for (i = 0, bcc= 0xFFFFFFFF; i < 92; bcc = crc32(bcc, buf[i++])) ; /* Calculate header check sum */ + st_dword(buf + GPTH_Bcc, ~bcc); /* Header check sum */ + if (disk_write(drv, buf, 1, 1) != RES_OK) return FR_DISK_ERR; + + /* Create secondary GPT header */ + st_qword(buf + GPTH_CurLba, sz_drv - 1); /* LBA of this header */ + st_qword(buf + GPTH_BakLba, 1); /* LBA of another header */ + st_qword(buf + GPTH_PtOfs, s_bpt); /* LBA of this table */ + st_dword(buf + GPTH_Bcc, 0); + for (i = 0, bcc= 0xFFFFFFFF; i < 92; bcc = crc32(bcc, buf[i++])) ; /* Calculate header check sum */ + st_dword(buf + GPTH_Bcc, ~bcc); /* Header check sum */ + if (disk_write(drv, buf, sz_drv - 1, 1) != RES_OK) return FR_DISK_ERR; + + /* Create protective MBR */ + mem_set(buf, 0, ss); + mem_cpy(buf + MBR_Table, gpt_mbr, 16); /* Create a GPT partition */ + st_word(buf + BS_55AA, 0xAA55); + if (disk_write(drv, buf, 0, 1) != RES_OK) return FR_DISK_ERR; + + } else +#endif + { /* Create partitions in MBR */ + sz_drv32 = (DWORD)sz_drv; + n_sc = N_SEC_TRACK; /* Determine drive CHS without any consideration of the drive geometry */ + for (n_hd = 8; n_hd != 0 && sz_drv32 / n_hd / n_sc > 1024; n_hd *= 2) ; + if (n_hd == 0) n_hd = 255; /* Number of heads needs to be <256 */ + + mem_set(buf, 0, FF_MAX_SS); /* Clear MBR */ + pte = buf + MBR_Table; /* Partition table in the MBR */ + for (i = 0, s_lba32 = n_sc; i < 4 && s_lba32 != 0 && s_lba32 < sz_drv32; i++, s_lba32 += n_lba32) { + n_lba32 = (DWORD)plst[i]; /* Get partition size */ + if (n_lba32 <= 100) n_lba32 = (n_lba32 == 100) ? sz_drv32 : sz_drv32 / 100 * n_lba32; /* Size in percentage? */ + if (s_lba32 + n_lba32 > sz_drv32 || s_lba32 + n_lba32 < s_lba32) n_lba32 = sz_drv32 - s_lba32; /* Clip at drive size */ + if (n_lba32 == 0) break; /* End of table or no sector to allocate? */ + + st_dword(pte + PTE_StLba, s_lba32); /* Start LBA */ + st_dword(pte + PTE_SizLba, n_lba32); /* Number of sectors */ + pte[PTE_System] = (BYTE)sys; /* System type */ + + cy = (UINT)(s_lba32 / n_sc / n_hd); /* Start cylinder */ + hd = (BYTE)(s_lba32 / n_sc % n_hd); /* Start head */ + sc = (BYTE)(s_lba32 % n_sc + 1); /* Start sector */ + pte[PTE_StHead] = hd; + pte[PTE_StSec] = (BYTE)((cy >> 2 & 0xC0) | sc); + pte[PTE_StCyl] = (BYTE)cy; + + cy = (UINT)((s_lba32 + n_lba32 - 1) / n_sc / n_hd); /* End cylinder */ + hd = (BYTE)((s_lba32 + n_lba32 - 1) / n_sc % n_hd); /* End head */ + sc = (BYTE)((s_lba32 + n_lba32 - 1) % n_sc + 1); /* End sector */ + pte[PTE_EdHead] = hd; + pte[PTE_EdSec] = (BYTE)((cy >> 2 & 0xC0) | sc); + pte[PTE_EdCyl] = (BYTE)cy; + + pte += SZ_PTE; /* Next entry */ + } + + st_word(buf + BS_55AA, 0xAA55); /* MBR signature */ + if (disk_write(drv, buf, 0, 1) != RES_OK) return FR_DISK_ERR; /* Write it to the MBR */ + } + + return FR_OK; +} + + + +FRESULT f_mkfs ( + const TCHAR* path, /* Logical drive number */ + const MKFS_PARM* opt, /* Format options */ + void* work, /* Pointer to working buffer (null: use heap memory) */ + UINT len /* Size of working buffer [byte] */ +) +{ + static const WORD cst[] = {1, 4, 16, 64, 256, 512, 0}; /* Cluster size boundary for FAT volume (4Ks unit) */ + static const WORD cst32[] = {1, 2, 4, 8, 16, 32, 0}; /* Cluster size boundary for FAT32 volume (128Ks unit) */ + static const MKFS_PARM defopt = {FM_ANY, 0, 0, 0, 0}; /* Default parameter */ + BYTE fsopt, fsty, sys, *buf, *pte, pdrv, ipart; + WORD ss; /* Sector size */ + DWORD sz_buf, sz_blk, n_clst, pau, nsect, n; + LBA_t sz_vol, b_vol, b_fat, b_data; /* Size of volume, Base LBA of volume, fat, data */ + LBA_t sect, lba[2]; + DWORD sz_rsv, sz_fat, sz_dir, sz_au; /* Size of reserved, fat, dir, data, cluster */ + UINT n_fat, n_root, i; /* Index, Number of FATs and Number of roor dir entries */ + int vol; + DSTATUS ds; + FRESULT fr; + + + /* Check mounted drive and clear work area */ + vol = get_ldnumber(&path); /* Get target logical drive */ + if (vol < 0) return FR_INVALID_DRIVE; + if (FatFs[vol]) FatFs[vol]->fs_type = 0; /* Clear the fs object if mounted */ + pdrv = LD2PD(vol); /* Physical drive */ + ipart = LD2PT(vol); /* Partition (0:create as new, 1..:get from partition table) */ + if (!opt) opt = &defopt; /* Use default parameter if it is not given */ + + /* Get physical drive status (sz_drv, sz_blk, ss) */ + ds = disk_initialize(pdrv); + if (ds & STA_NOINIT) return FR_NOT_READY; + if (ds & STA_PROTECT) return FR_WRITE_PROTECTED; + sz_blk = opt->align; + if (sz_blk == 0 && disk_ioctl(pdrv, GET_BLOCK_SIZE, &sz_blk) != RES_OK) sz_blk = 1; + if (sz_blk == 0 || sz_blk > 0x8000 || (sz_blk & (sz_blk - 1))) sz_blk = 1; +#if FF_MAX_SS != FF_MIN_SS + if (disk_ioctl(pdrv, GET_SECTOR_SIZE, &ss) != RES_OK) return FR_DISK_ERR; + if (ss > FF_MAX_SS || ss < FF_MIN_SS || (ss & (ss - 1))) return FR_DISK_ERR; +#else + ss = FF_MAX_SS; +#endif + /* Options for FAT sub-type and FAT parameters */ + fsopt = opt->fmt & (FM_ANY | FM_SFD); + n_fat = (opt->n_fat >= 1 && opt->n_fat <= 2) ? opt->n_fat : 1; + n_root = (opt->n_root >= 1 && opt->n_root <= 32768 && (opt->n_root % (ss / SZDIRE)) == 0) ? opt->n_root : 512; + sz_au = (opt->au_size <= 0x1000000 && (opt->au_size & (opt->au_size - 1)) == 0) ? opt->au_size : 0; + sz_au /= ss; /* Byte --> Sector */ + + /* Get working buffer */ + sz_buf = len / ss; /* Size of working buffer [sector] */ + if (sz_buf == 0) return FR_NOT_ENOUGH_CORE; + buf = (BYTE*)work; /* Working buffer */ +#if FF_USE_LFN == 3 + if (!buf) buf = ff_memalloc(sz_buf * ss); /* Use heap memory for working buffer */ +#endif + if (!buf) return FR_NOT_ENOUGH_CORE; + + /* Determine where the volume to be located (b_vol, sz_vol) */ + b_vol = sz_vol = 0; + if (FF_MULTI_PARTITION && ipart != 0) { /* Is the volume associated with any specific partition? */ + /* Get partition location from the existing partition table */ + if (disk_read(pdrv, buf, 0, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Load MBR */ + if (ld_word(buf + BS_55AA) != 0xAA55) LEAVE_MKFS(FR_MKFS_ABORTED); /* Check if MBR is valid */ +#if FF_LBA64 + if (buf[MBR_Table + PTE_System] == 0xEE) { /* GPT protective MBR? */ + DWORD n_ent, ofs; + QWORD pt_lba; + + /* Get the partition location from GPT */ + if (disk_read(pdrv, buf, 1, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Load GPT header sector (next to MBR) */ + if (!test_gpt_header(buf)) LEAVE_MKFS(FR_MKFS_ABORTED); /* Check if GPT header is valid */ + n_ent = ld_dword(buf + GPTH_PtNum); /* Number of entries */ + pt_lba = ld_qword(buf + GPTH_PtOfs); /* Table start sector */ + ofs = i = 0; + while (n_ent) { /* Find MS Basic partition with order of ipart */ + if (ofs == 0 && disk_read(pdrv, buf, pt_lba++, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Get PT sector */ + if (!mem_cmp(buf + ofs + GPTE_PtGuid, GUID_MS_Basic, 16) && ++i == ipart) { /* MS basic data partition? */ + b_vol = ld_qword(buf + ofs + GPTE_FstLba); + sz_vol = ld_qword(buf + ofs + GPTE_LstLba) - b_vol + 1; + break; + } + n_ent--; ofs = (ofs + SZ_GPTE) % ss; /* Next entry */ + } + if (n_ent == 0) LEAVE_MKFS(FR_MKFS_ABORTED); /* Partition not found */ + fsopt |= 0x80; /* Partitioning is in GPT */ + } else +#endif + { /* Get the partition location from MBR partition table */ + pte = buf + (MBR_Table + (ipart - 1) * SZ_PTE); + if (ipart > 4 || pte[PTE_System] == 0) LEAVE_MKFS(FR_MKFS_ABORTED); /* No partition? */ + b_vol = ld_dword(pte + PTE_StLba); /* Get volume start sector */ + sz_vol = ld_dword(pte + PTE_SizLba); /* Get volume size */ + } + } else { /* The volume is associated with a physical drive */ + if (disk_ioctl(pdrv, GET_SECTOR_COUNT, &sz_vol) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); + if (!(fsopt & FM_SFD)) { /* To be partitioned? */ + /* Create a single-partition on the drive in this function */ +#if FF_LBA64 + if (sz_vol >= FF_MIN_GPT) { /* Which partition type to create, MBR or GPT? */ + fsopt |= 0x80; /* Partitioning is in GPT */ + b_vol = GPT_ALIGN / ss; sz_vol -= b_vol + GPT_ITEMS * SZ_GPTE / ss + 1; /* Estimated partition offset and size */ + } else +#endif + { /* Partitioning is in MBR */ + if (sz_vol > N_SEC_TRACK) { + b_vol = N_SEC_TRACK; sz_vol -= b_vol; /* Estimated partition offset and size */ + } + } + } + } + if (sz_vol < 128) LEAVE_MKFS(FR_MKFS_ABORTED); /* Check if volume size is >=128s */ + + /* Now start to create a FAT volume at b_vol and sz_vol */ + + do { /* Pre-determine the FAT type */ + if (FF_FS_EXFAT && (fsopt & FM_EXFAT)) { /* exFAT possible? */ + if ((fsopt & FM_ANY) == FM_EXFAT || sz_vol >= 0x4000000 || sz_au > 128) { /* exFAT only, vol >= 64MS or sz_au > 128S ? */ + fsty = FS_EXFAT; break; + } + } +#if FF_LBA64 + if (sz_vol >= 0x100000000) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too large volume for FAT/FAT32 */ +#endif + if (sz_au > 128) sz_au = 128; /* Invalid AU for FAT/FAT32? */ + if (fsopt & FM_FAT32) { /* FAT32 possible? */ + if (!(fsopt & FM_FAT)) { /* no-FAT? */ + fsty = FS_FAT32; break; + } + } + if (!(fsopt & FM_FAT)) LEAVE_MKFS(FR_INVALID_PARAMETER); /* no-FAT? */ + fsty = FS_FAT16; + } while (0); + +#if FF_FS_EXFAT + if (fsty == FS_EXFAT) { /* Create an exFAT volume */ + DWORD szb_bit, szb_case, sum, nb, cl, tbl[3]; + WCHAR ch, si; + UINT j, st; + BYTE b; + + if (sz_vol < 0x1000) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too small volume for exFAT? */ +#if FF_USE_TRIM + lba[0] = b_vol; lba[1] = b_vol + sz_vol - 1; /* Inform storage device that the volume area may be erased */ + disk_ioctl(pdrv, CTRL_TRIM, lba); +#endif + /* Determine FAT location, data location and number of clusters */ + if (sz_au == 0) { /* AU auto-selection */ + sz_au = 8; + if (sz_vol >= 0x80000) sz_au = 64; /* >= 512Ks */ + if (sz_vol >= 0x4000000) sz_au = 256; /* >= 64Ms */ + } + b_fat = b_vol + 32; /* FAT start at offset 32 */ + sz_fat = (DWORD)((sz_vol / sz_au + 2) * 4 + ss - 1) / ss; /* Number of FAT sectors */ + b_data = (b_fat + sz_fat + sz_blk - 1) & ~((LBA_t)sz_blk - 1); /* Align data area to the erase block boundary */ + if (b_data - b_vol >= sz_vol / 2) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too small volume? */ + n_clst = (DWORD)(sz_vol - (b_data - b_vol)) / sz_au; /* Number of clusters */ + if (n_clst <16) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too few clusters? */ + if (n_clst > MAX_EXFAT) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too many clusters? */ + + szb_bit = (n_clst + 7) / 8; /* Size of allocation bitmap */ + tbl[0] = (szb_bit + sz_au * ss - 1) / (sz_au * ss); /* Number of allocation bitmap clusters */ + + /* Create a compressed up-case table */ + sect = b_data + sz_au * tbl[0]; /* Table start sector */ + sum = 0; /* Table checksum to be stored in the 82 entry */ + st = 0; si = 0; i = 0; j = 0; szb_case = 0; + do { + switch (st) { + case 0: + ch = (WCHAR)ff_wtoupper(si); /* Get an up-case char */ + if (ch != si) { + si++; break; /* Store the up-case char if exist */ + } + for (j = 1; (WCHAR)(si + j) && (WCHAR)(si + j) == ff_wtoupper((WCHAR)(si + j)); j++) ; /* Get run length of no-case block */ + if (j >= 128) { + ch = 0xFFFF; st = 2; break; /* Compress the no-case block if run is >= 128 */ + } + st = 1; /* Do not compress short run */ + /* go to next case */ + case 1: + ch = si++; /* Fill the short run */ + if (--j == 0) st = 0; + break; + + default: + ch = (WCHAR)j; si += (WCHAR)j; /* Number of chars to skip */ + st = 0; + } + sum = xsum32(buf[i + 0] = (BYTE)ch, sum); /* Put it into the write buffer */ + sum = xsum32(buf[i + 1] = (BYTE)(ch >> 8), sum); + i += 2; szb_case += 2; + if (si == 0 || i == sz_buf * ss) { /* Write buffered data when buffer full or end of process */ + n = (i + ss - 1) / ss; + if (disk_write(pdrv, buf, sect, n) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); + sect += n; i = 0; + } + } while (si); + tbl[1] = (szb_case + sz_au * ss - 1) / (sz_au * ss); /* Number of up-case table clusters */ + tbl[2] = 1; /* Number of root dir clusters */ + + /* Initialize the allocation bitmap */ + sect = b_data; nsect = (szb_bit + ss - 1) / ss; /* Start of bitmap and number of sectors */ + nb = tbl[0] + tbl[1] + tbl[2]; /* Number of clusters in-use by system */ + do { + mem_set(buf, 0, sz_buf * ss); + for (i = 0; nb >= 8 && i < sz_buf * ss; buf[i++] = 0xFF, nb -= 8) ; + for (b = 1; nb != 0 && i < sz_buf * ss; buf[i] |= b, b <<= 1, nb--) ; + n = (nsect > sz_buf) ? sz_buf : nsect; /* Write the buffered data */ + if (disk_write(pdrv, buf, sect, n) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); + sect += n; nsect -= n; + } while (nsect); + + /* Initialize the FAT */ + sect = b_fat; nsect = sz_fat; /* Start of FAT and number of FAT sectors */ + j = nb = cl = 0; + do { + mem_set(buf, 0, sz_buf * ss); i = 0; /* Clear work area and reset write index */ + if (cl == 0) { /* Set FAT [0] and FAT[1] */ + st_dword(buf + i, 0xFFFFFFF8); i += 4; cl++; + st_dword(buf + i, 0xFFFFFFFF); i += 4; cl++; + } + do { /* Create chains of bitmap, up-case and root dir */ + while (nb != 0 && i < sz_buf * ss) { /* Create a chain */ + st_dword(buf + i, (nb > 1) ? cl + 1 : 0xFFFFFFFF); + i += 4; cl++; nb--; + } + if (nb == 0 && j < 3) nb = tbl[j++]; /* Next chain */ + } while (nb != 0 && i < sz_buf * ss); + n = (nsect > sz_buf) ? sz_buf : nsect; /* Write the buffered data */ + if (disk_write(pdrv, buf, sect, n) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); + sect += n; nsect -= n; + } while (nsect); + + /* Initialize the root directory */ + mem_set(buf, 0, sz_buf * ss); + buf[SZDIRE * 0 + 0] = ET_VLABEL; /* Volume label entry (no label) */ + buf[SZDIRE * 1 + 0] = ET_BITMAP; /* Bitmap entry */ + st_dword(buf + SZDIRE * 1 + 20, 2); /* cluster */ + st_dword(buf + SZDIRE * 1 + 24, szb_bit); /* size */ + buf[SZDIRE * 2 + 0] = ET_UPCASE; /* Up-case table entry */ + st_dword(buf + SZDIRE * 2 + 4, sum); /* sum */ + st_dword(buf + SZDIRE * 2 + 20, 2 + tbl[0]); /* cluster */ + st_dword(buf + SZDIRE * 2 + 24, szb_case); /* size */ + sect = b_data + sz_au * (tbl[0] + tbl[1]); nsect = sz_au; /* Start of the root directory and number of sectors */ + do { /* Fill root directory sectors */ + n = (nsect > sz_buf) ? sz_buf : nsect; + if (disk_write(pdrv, buf, sect, n) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); + mem_set(buf, 0, ss); + sect += n; nsect -= n; + } while (nsect); + + /* Create two set of the exFAT VBR blocks */ + sect = b_vol; + for (n = 0; n < 2; n++) { + /* Main record (+0) */ + mem_set(buf, 0, ss); + mem_cpy(buf + BS_JmpBoot, "\xEB\x76\x90" "EXFAT ", 11); /* Boot jump code (x86), OEM name */ + st_qword(buf + BPB_VolOfsEx, b_vol); /* Volume offset in the physical drive [sector] */ + st_qword(buf + BPB_TotSecEx, sz_vol); /* Volume size [sector] */ + st_dword(buf + BPB_FatOfsEx, (DWORD)(b_fat - b_vol)); /* FAT offset [sector] */ + st_dword(buf + BPB_FatSzEx, sz_fat); /* FAT size [sector] */ + st_dword(buf + BPB_DataOfsEx, (DWORD)(b_data - b_vol)); /* Data offset [sector] */ + st_dword(buf + BPB_NumClusEx, n_clst); /* Number of clusters */ + st_dword(buf + BPB_RootClusEx, 2 + tbl[0] + tbl[1]); /* Root dir cluster # */ + st_dword(buf + BPB_VolIDEx, GET_FATTIME()); /* VSN */ + st_word(buf + BPB_FSVerEx, 0x100); /* Filesystem version (1.00) */ + for (buf[BPB_BytsPerSecEx] = 0, i = ss; i >>= 1; buf[BPB_BytsPerSecEx]++) ; /* Log2 of sector size [byte] */ + for (buf[BPB_SecPerClusEx] = 0, i = sz_au; i >>= 1; buf[BPB_SecPerClusEx]++) ; /* Log2 of cluster size [sector] */ + buf[BPB_NumFATsEx] = 1; /* Number of FATs */ + buf[BPB_DrvNumEx] = 0x80; /* Drive number (for int13) */ + st_word(buf + BS_BootCodeEx, 0xFEEB); /* Boot code (x86) */ + st_word(buf + BS_55AA, 0xAA55); /* Signature (placed here regardless of sector size) */ + for (i = sum = 0; i < ss; i++) { /* VBR checksum */ + if (i != BPB_VolFlagEx && i != BPB_VolFlagEx + 1 && i != BPB_PercInUseEx) sum = xsum32(buf[i], sum); + } + if (disk_write(pdrv, buf, sect++, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); + /* Extended bootstrap record (+1..+8) */ + mem_set(buf, 0, ss); + st_word(buf + ss - 2, 0xAA55); /* Signature (placed at end of sector) */ + for (j = 1; j < 9; j++) { + for (i = 0; i < ss; sum = xsum32(buf[i++], sum)) ; /* VBR checksum */ + if (disk_write(pdrv, buf, sect++, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); + } + /* OEM/Reserved record (+9..+10) */ + mem_set(buf, 0, ss); + for ( ; j < 11; j++) { + for (i = 0; i < ss; sum = xsum32(buf[i++], sum)) ; /* VBR checksum */ + if (disk_write(pdrv, buf, sect++, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); + } + /* Sum record (+11) */ + for (i = 0; i < ss; i += 4) st_dword(buf + i, sum); /* Fill with checksum value */ + if (disk_write(pdrv, buf, sect++, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); + } + + } else +#endif /* FF_FS_EXFAT */ + { /* Create an FAT/FAT32 volume */ + do { + pau = sz_au; + /* Pre-determine number of clusters and FAT sub-type */ + if (fsty == FS_FAT32) { /* FAT32 volume */ + if (pau == 0) { /* AU auto-selection */ + n = (DWORD)sz_vol / 0x20000; /* Volume size in unit of 128KS */ + for (i = 0, pau = 1; cst32[i] && cst32[i] <= n; i++, pau <<= 1) ; /* Get from table */ + } + n_clst = (DWORD)sz_vol / pau; /* Number of clusters */ + sz_fat = (n_clst * 4 + 8 + ss - 1) / ss; /* FAT size [sector] */ + sz_rsv = 32; /* Number of reserved sectors */ + sz_dir = 0; /* No static directory */ + if (n_clst <= MAX_FAT16 || n_clst > MAX_FAT32) LEAVE_MKFS(FR_MKFS_ABORTED); + } else { /* FAT volume */ + if (pau == 0) { /* au auto-selection */ + n = (DWORD)sz_vol / 0x1000; /* Volume size in unit of 4KS */ + for (i = 0, pau = 1; cst[i] && cst[i] <= n; i++, pau <<= 1) ; /* Get from table */ + } + n_clst = (DWORD)sz_vol / pau; + if (n_clst > MAX_FAT12) { + n = n_clst * 2 + 4; /* FAT size [byte] */ + } else { + fsty = FS_FAT12; + n = (n_clst * 3 + 1) / 2 + 3; /* FAT size [byte] */ + } + sz_fat = (n + ss - 1) / ss; /* FAT size [sector] */ + sz_rsv = 1; /* Number of reserved sectors */ + sz_dir = (DWORD)n_root * SZDIRE / ss; /* Root dir size [sector] */ + } + b_fat = b_vol + sz_rsv; /* FAT base */ + b_data = b_fat + sz_fat * n_fat + sz_dir; /* Data base */ + + /* Align data area to erase block boundary (for flash memory media) */ + n = (DWORD)(((b_data + sz_blk - 1) & ~(sz_blk - 1)) - b_data); /* Sectors to next nearest from current data base */ + if (fsty == FS_FAT32) { /* FAT32: Move FAT */ + sz_rsv += n; b_fat += n; + } else { /* FAT: Expand FAT */ + if (n % n_fat) { /* Adjust fractional error if needed */ + n--; sz_rsv++; b_fat++; + } + sz_fat += n / n_fat; + } + + /* Determine number of clusters and final check of validity of the FAT sub-type */ + if (sz_vol < b_data + pau * 16 - b_vol) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too small volume? */ + n_clst = ((DWORD)sz_vol - sz_rsv - sz_fat * n_fat - sz_dir) / pau; + if (fsty == FS_FAT32) { + if (n_clst <= MAX_FAT16) { /* Too few clusters for FAT32? */ + if (sz_au == 0 && (sz_au = pau / 2) != 0) continue; /* Adjust cluster size and retry */ + LEAVE_MKFS(FR_MKFS_ABORTED); + } + } + if (fsty == FS_FAT16) { + if (n_clst > MAX_FAT16) { /* Too many clusters for FAT16 */ + if (sz_au == 0 && (pau * 2) <= 64) { + sz_au = pau * 2; continue; /* Adjust cluster size and retry */ + } + if ((fsopt & FM_FAT32)) { + fsty = FS_FAT32; continue; /* Switch type to FAT32 and retry */ + } + if (sz_au == 0 && (sz_au = pau * 2) <= 128) continue; /* Adjust cluster size and retry */ + LEAVE_MKFS(FR_MKFS_ABORTED); + } + if (n_clst <= MAX_FAT12) { /* Too few clusters for FAT16 */ + if (sz_au == 0 && (sz_au = pau * 2) <= 128) continue; /* Adjust cluster size and retry */ + LEAVE_MKFS(FR_MKFS_ABORTED); + } + } + if (fsty == FS_FAT12 && n_clst > MAX_FAT12) LEAVE_MKFS(FR_MKFS_ABORTED); /* Too many clusters for FAT12 */ + + /* Ok, it is the valid cluster configuration */ + break; + } while (1); + +#if FF_USE_TRIM + lba[0] = b_vol; lba[1] = b_vol + sz_vol - 1; /* Inform storage device that the volume area may be erased */ + disk_ioctl(pdrv, CTRL_TRIM, lba); +#endif + /* Create FAT VBR */ + mem_set(buf, 0, ss); + mem_cpy(buf + BS_JmpBoot, "\xEB\xFE\x90" "MSDOS5.0", 11);/* Boot jump code (x86), OEM name */ + st_word(buf + BPB_BytsPerSec, ss); /* Sector size [byte] */ + buf[BPB_SecPerClus] = (BYTE)pau; /* Cluster size [sector] */ + st_word(buf + BPB_RsvdSecCnt, (WORD)sz_rsv); /* Size of reserved area */ + buf[BPB_NumFATs] = (BYTE)n_fat; /* Number of FATs */ + st_word(buf + BPB_RootEntCnt, (WORD)((fsty == FS_FAT32) ? 0 : n_root)); /* Number of root directory entries */ + if (sz_vol < 0x10000) { + st_word(buf + BPB_TotSec16, (WORD)sz_vol); /* Volume size in 16-bit LBA */ + } else { + st_dword(buf + BPB_TotSec32, (DWORD)sz_vol); /* Volume size in 32-bit LBA */ + } + buf[BPB_Media] = 0xF8; /* Media descriptor byte */ + st_word(buf + BPB_SecPerTrk, 63); /* Number of sectors per track (for int13) */ + st_word(buf + BPB_NumHeads, 255); /* Number of heads (for int13) */ + st_dword(buf + BPB_HiddSec, (DWORD)b_vol); /* Volume offset in the physical drive [sector] */ + if (fsty == FS_FAT32) { + st_dword(buf + BS_VolID32, GET_FATTIME()); /* VSN */ + st_dword(buf + BPB_FATSz32, sz_fat); /* FAT size [sector] */ + st_dword(buf + BPB_RootClus32, 2); /* Root directory cluster # (2) */ + st_word(buf + BPB_FSInfo32, 1); /* Offset of FSINFO sector (VBR + 1) */ + st_word(buf + BPB_BkBootSec32, 6); /* Offset of backup VBR (VBR + 6) */ + buf[BS_DrvNum32] = 0x80; /* Drive number (for int13) */ + buf[BS_BootSig32] = 0x29; /* Extended boot signature */ + mem_cpy(buf + BS_VolLab32, "NO NAME " "FAT32 ", 19); /* Volume label, FAT signature */ + } else { + st_dword(buf + BS_VolID, GET_FATTIME()); /* VSN */ + st_word(buf + BPB_FATSz16, (WORD)sz_fat); /* FAT size [sector] */ + buf[BS_DrvNum] = 0x80; /* Drive number (for int13) */ + buf[BS_BootSig] = 0x29; /* Extended boot signature */ + mem_cpy(buf + BS_VolLab, "NO NAME " "FAT ", 19); /* Volume label, FAT signature */ + } + st_word(buf + BS_55AA, 0xAA55); /* Signature (offset is fixed here regardless of sector size) */ + if (disk_write(pdrv, buf, b_vol, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Write it to the VBR sector */ + + /* Create FSINFO record if needed */ + if (fsty == FS_FAT32) { + disk_write(pdrv, buf, b_vol + 6, 1); /* Write backup VBR (VBR + 6) */ + mem_set(buf, 0, ss); + st_dword(buf + FSI_LeadSig, 0x41615252); + st_dword(buf + FSI_StrucSig, 0x61417272); + st_dword(buf + FSI_Free_Count, n_clst - 1); /* Number of free clusters */ + st_dword(buf + FSI_Nxt_Free, 2); /* Last allocated cluster# */ + st_word(buf + BS_55AA, 0xAA55); + disk_write(pdrv, buf, b_vol + 7, 1); /* Write backup FSINFO (VBR + 7) */ + disk_write(pdrv, buf, b_vol + 1, 1); /* Write original FSINFO (VBR + 1) */ + } + + /* Initialize FAT area */ + mem_set(buf, 0, sz_buf * ss); + sect = b_fat; /* FAT start sector */ + for (i = 0; i < n_fat; i++) { /* Initialize FATs each */ + if (fsty == FS_FAT32) { + st_dword(buf + 0, 0xFFFFFFF8); /* FAT[0] */ + st_dword(buf + 4, 0xFFFFFFFF); /* FAT[1] */ + st_dword(buf + 8, 0x0FFFFFFF); /* FAT[2] (root directory) */ + } else { + st_dword(buf + 0, (fsty == FS_FAT12) ? 0xFFFFF8 : 0xFFFFFFF8); /* FAT[0] and FAT[1] */ + } + nsect = sz_fat; /* Number of FAT sectors */ + do { /* Fill FAT sectors */ + n = (nsect > sz_buf) ? sz_buf : nsect; + if (disk_write(pdrv, buf, sect, (UINT)n) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); + mem_set(buf, 0, ss); /* Rest of FAT all are cleared */ + sect += n; nsect -= n; + } while (nsect); + } + + /* Initialize root directory (fill with zero) */ + nsect = (fsty == FS_FAT32) ? pau : sz_dir; /* Number of root directory sectors */ + do { + n = (nsect > sz_buf) ? sz_buf : nsect; + if (disk_write(pdrv, buf, sect, (UINT)n) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); + sect += n; nsect -= n; + } while (nsect); + } + + /* A FAT volume has been created here */ + + /* Determine system ID in the MBR partition table */ + if (FF_FS_EXFAT && fsty == FS_EXFAT) { + sys = 0x07; /* exFAT */ + } else { + if (fsty == FS_FAT32) { + sys = 0x0C; /* FAT32X */ + } else { + if (sz_vol >= 0x10000) { + sys = 0x06; /* FAT12/16 (large) */ + } else { + sys = (fsty == FS_FAT16) ? 0x04 : 0x01; /* FAT16 : FAT12 */ + } + } + } + + /* Update partition information */ + if (FF_MULTI_PARTITION && ipart != 0) { /* Volume is in the existing partition */ + if (!FF_LBA64 || !(fsopt & 0x80)) { + /* Update system ID in the partition table */ + if (disk_read(pdrv, buf, 0, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Read the MBR */ + buf[MBR_Table + (ipart - 1) * SZ_PTE + PTE_System] = sys; /* Set system ID */ + if (disk_write(pdrv, buf, 0, 1) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); /* Write it back to the MBR */ + } + } else { /* Volume as a new single partition */ + if (!(fsopt & FM_SFD)) { /* Create partition table if not in SFD */ + lba[0] = sz_vol, lba[1] = 0; + fr = create_partition(pdrv, lba, sys, buf); + if (fr != FR_OK) LEAVE_MKFS(fr); + } + } + + if (disk_ioctl(pdrv, CTRL_SYNC, 0) != RES_OK) LEAVE_MKFS(FR_DISK_ERR); + + LEAVE_MKFS(FR_OK); +} + + + + +#if FF_MULTI_PARTITION +/*-----------------------------------------------------------------------*/ +/* Create Partition Table on the Physical Drive */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_fdisk ( + BYTE pdrv, /* Physical drive number */ + const LBA_t ptbl[], /* Pointer to the size table for each partitions */ + void* work /* Pointer to the working buffer (null: use heap memory) */ +) +{ + BYTE *buf = (BYTE*)work; + DSTATUS stat; + + + stat = disk_initialize(pdrv); + if (stat & STA_NOINIT) return FR_NOT_READY; + if (stat & STA_PROTECT) return FR_WRITE_PROTECTED; +#if FF_USE_LFN == 3 + if (!buf) buf = ff_memalloc(FF_MAX_SS); /* Use heap memory for working buffer */ +#endif + if (!buf) return FR_NOT_ENOUGH_CORE; + + LEAVE_MKFS(create_partition(pdrv, ptbl, 0x07, buf)); +} + +#endif /* FF_MULTI_PARTITION */ +#endif /* !FF_FS_READONLY && FF_USE_MKFS */ + + + + +#if FF_USE_STRFUNC +#if FF_USE_LFN && FF_LFN_UNICODE && (FF_STRF_ENCODE < 0 || FF_STRF_ENCODE > 3) +#error Wrong FF_STRF_ENCODE setting +#endif +/*-----------------------------------------------------------------------*/ +/* Get a String from the File */ +/*-----------------------------------------------------------------------*/ + +TCHAR* f_gets ( + TCHAR* buff, /* Pointer to the buffer to store read string */ + int len, /* Size of string buffer (items) */ + FIL* fp /* Pointer to the file object */ +) +{ + int nc = 0; + TCHAR *p = buff; + BYTE s[4]; + UINT rc; + DWORD dc; +#if FF_USE_LFN && FF_LFN_UNICODE && FF_STRF_ENCODE <= 2 + WCHAR wc; +#endif +#if FF_USE_LFN && FF_LFN_UNICODE && FF_STRF_ENCODE == 3 + UINT ct; +#endif + +#if FF_USE_LFN && FF_LFN_UNICODE /* With code conversion (Unicode API) */ + /* Make a room for the character and terminator */ + if (FF_LFN_UNICODE == 1) len -= (FF_STRF_ENCODE == 0) ? 1 : 2; + if (FF_LFN_UNICODE == 2) len -= (FF_STRF_ENCODE == 0) ? 3 : 4; + if (FF_LFN_UNICODE == 3) len -= 1; + while (nc < len) { +#if FF_STRF_ENCODE == 0 /* Read a character in ANSI/OEM */ + f_read(fp, s, 1, &rc); /* Get a code unit */ + if (rc != 1) break; /* EOF? */ + wc = s[0]; + if (dbc_1st((BYTE)wc)) { /* DBC 1st byte? */ + f_read(fp, s, 1, &rc); /* Get DBC 2nd byte */ + if (rc != 1 || !dbc_2nd(s[0])) continue; /* Wrong code? */ + wc = wc << 8 | s[0]; + } + dc = ff_oem2uni(wc, CODEPAGE); /* OEM --> */ + if (dc == 0) continue; +#elif FF_STRF_ENCODE == 1 || FF_STRF_ENCODE == 2 /* Read a character in UTF-16LE/BE */ + f_read(fp, s, 2, &rc); /* Get a code unit */ + if (rc != 2) break; /* EOF? */ + dc = (FF_STRF_ENCODE == 1) ? ld_word(s) : s[0] << 8 | s[1]; + if (IsSurrogateL(dc)) continue; /* Broken surrogate pair? */ + if (IsSurrogateH(dc)) { /* High surrogate? */ + f_read(fp, s, 2, &rc); /* Get low surrogate */ + if (rc != 2) break; /* EOF? */ + wc = (FF_STRF_ENCODE == 1) ? ld_word(s) : s[0] << 8 | s[1]; + if (!IsSurrogateL(wc)) continue; /* Broken surrogate pair? */ + dc = ((dc & 0x3FF) + 0x40) << 10 | (wc & 0x3FF); /* Merge surrogate pair */ + } +#else /* Read a character in UTF-8 */ + f_read(fp, s, 1, &rc); /* Get a code unit */ + if (rc != 1) break; /* EOF? */ + dc = s[0]; + if (dc >= 0x80) { /* Multi-byte sequence? */ + ct = 0; + if ((dc & 0xE0) == 0xC0) { dc &= 0x1F; ct = 1; } /* 2-byte sequence? */ + if ((dc & 0xF0) == 0xE0) { dc &= 0x0F; ct = 2; } /* 3-byte sequence? */ + if ((dc & 0xF8) == 0xF0) { dc &= 0x07; ct = 3; } /* 4-byte sequence? */ + if (ct == 0) continue; + f_read(fp, s, ct, &rc); /* Get trailing bytes */ + if (rc != ct) break; + rc = 0; + do { /* Merge the byte sequence */ + if ((s[rc] & 0xC0) != 0x80) break; + dc = dc << 6 | (s[rc] & 0x3F); + } while (++rc < ct); + if (rc != ct || dc < 0x80 || IsSurrogate(dc) || dc >= 0x110000) continue; /* Wrong encoding? */ + } +#endif + /* A code point is avaialble in dc to be output */ + + if (FF_USE_STRFUNC == 2 && dc == '\r') continue; /* Strip \r off if needed */ +#if FF_LFN_UNICODE == 1 || FF_LFN_UNICODE == 3 /* Output it in UTF-16/32 encoding */ + if (FF_LFN_UNICODE == 1 && dc >= 0x10000) { /* Out of BMP at UTF-16? */ + *p++ = (TCHAR)(0xD800 | ((dc >> 10) - 0x40)); nc++; /* Make and output high surrogate */ + dc = 0xDC00 | (dc & 0x3FF); /* Make low surrogate */ + } + *p++ = (TCHAR)dc; nc++; + if (dc == '\n') break; /* End of line? */ +#elif FF_LFN_UNICODE == 2 /* Output it in UTF-8 encoding */ + if (dc < 0x80) { /* Single byte? */ + *p++ = (TCHAR)dc; + nc++; + if (dc == '\n') break; /* End of line? */ + } else { + if (dc < 0x800) { /* 2-byte sequence? */ + *p++ = (TCHAR)(0xC0 | (dc >> 6 & 0x1F)); + *p++ = (TCHAR)(0x80 | (dc >> 0 & 0x3F)); + nc += 2; + } else { + if (dc < 0x10000) { /* 3-byte sequence? */ + *p++ = (TCHAR)(0xE0 | (dc >> 12 & 0x0F)); + *p++ = (TCHAR)(0x80 | (dc >> 6 & 0x3F)); + *p++ = (TCHAR)(0x80 | (dc >> 0 & 0x3F)); + nc += 3; + } else { /* 4-byte sequence? */ + *p++ = (TCHAR)(0xF0 | (dc >> 18 & 0x07)); + *p++ = (TCHAR)(0x80 | (dc >> 12 & 0x3F)); + *p++ = (TCHAR)(0x80 | (dc >> 6 & 0x3F)); + *p++ = (TCHAR)(0x80 | (dc >> 0 & 0x3F)); + nc += 4; + } + } + } +#endif + } + +#else /* Byte-by-byte read without any conversion (ANSI/OEM API) */ + len -= 1; /* Make a room for the terminator */ + while (nc < len) { + f_read(fp, s, 1, &rc); /* Get a byte */ + if (rc != 1) break; /* EOF? */ + dc = s[0]; + if (FF_USE_STRFUNC == 2 && dc == '\r') continue; + *p++ = (TCHAR)dc; nc++; + if (dc == '\n') break; + } +#endif + + *p = 0; /* Terminate the string */ + return nc ? buff : 0; /* When no data read due to EOF or error, return with error. */ +} + + + + +#if !FF_FS_READONLY +#include +/*-----------------------------------------------------------------------*/ +/* Put a Character to the File (sub-functions) */ +/*-----------------------------------------------------------------------*/ + +/* Putchar output buffer and work area */ + +typedef struct { + FIL *fp; /* Ptr to the writing file */ + int idx, nchr; /* Write index of buf[] (-1:error), number of encoding units written */ +#if FF_USE_LFN && FF_LFN_UNICODE == 1 + WCHAR hs; +#elif FF_USE_LFN && FF_LFN_UNICODE == 2 + BYTE bs[4]; + UINT wi, ct; +#endif + BYTE buf[64]; /* Write buffer */ +} putbuff; + + +/* Buffered write with code conversion */ + +static void putc_bfd (putbuff* pb, TCHAR c) +{ + UINT n; + int i, nc; +#if FF_USE_LFN && FF_LFN_UNICODE + WCHAR hs, wc; +#if FF_LFN_UNICODE == 2 + DWORD dc; + TCHAR *tp; +#endif +#endif + + if (FF_USE_STRFUNC == 2 && c == '\n') { /* LF -> CRLF conversion */ + putc_bfd(pb, '\r'); + } + + i = pb->idx; /* Write index of pb->buf[] */ + if (i < 0) return; + nc = pb->nchr; /* Write unit counter */ + +#if FF_USE_LFN && FF_LFN_UNICODE +#if FF_LFN_UNICODE == 1 /* UTF-16 input */ + if (IsSurrogateH(c)) { /* High surrogate? */ + pb->hs = c; return; /* Save it for next */ + } + hs = pb->hs; pb->hs = 0; + if (hs != 0) { /* There is a leading high surrogate */ + if (!IsSurrogateL(c)) hs = 0; /* Discard high surrogate if not a surrogate pair */ + } else { + if (IsSurrogateL(c)) return; /* Discard stray low surrogate */ + } + wc = c; +#elif FF_LFN_UNICODE == 2 /* UTF-8 input */ + for (;;) { + if (pb->ct == 0) { /* Out of multi-byte sequence? */ + pb->bs[pb->wi = 0] = (BYTE)c; /* Save 1st byte */ + if ((BYTE)c < 0x80) break; /* Single byte? */ + if (((BYTE)c & 0xE0) == 0xC0) pb->ct = 1; /* 2-byte sequence? */ + if (((BYTE)c & 0xF0) == 0xE0) pb->ct = 2; /* 3-byte sequence? */ + if (((BYTE)c & 0xF1) == 0xF0) pb->ct = 3; /* 4-byte sequence? */ + return; + } else { /* In the multi-byte sequence */ + if (((BYTE)c & 0xC0) != 0x80) { /* Broken sequence? */ + pb->ct = 0; continue; + } + pb->bs[++pb->wi] = (BYTE)c; /* Save the trailing byte */ + if (--pb->ct == 0) break; /* End of multi-byte sequence? */ + return; + } + } + tp = (TCHAR*)pb->bs; + dc = tchar2uni(&tp); /* UTF-8 ==> UTF-16 */ + if (dc == 0xFFFFFFFF) return; /* Wrong code? */ + wc = (WCHAR)dc; + hs = (WCHAR)(dc >> 16); +#elif FF_LFN_UNICODE == 3 /* UTF-32 input */ + if (IsSurrogate(c) || c >= 0x110000) return; /* Discard invalid code */ + if (c >= 0x10000) { /* Out of BMP? */ + hs = (WCHAR)(0xD800 | ((c >> 10) - 0x40)); /* Make high surrogate */ + wc = 0xDC00 | (c & 0x3FF); /* Make low surrogate */ + } else { + hs = 0; + wc = (WCHAR)c; + } +#endif + /* A code point in UTF-16 is available in hs and wc */ + +#if FF_STRF_ENCODE == 1 /* Write a code point in UTF-16LE */ + if (hs != 0) { /* Surrogate pair? */ + st_word(&pb->buf[i], hs); + i += 2; + nc++; + } + st_word(&pb->buf[i], wc); + i += 2; +#elif FF_STRF_ENCODE == 2 /* Write a code point in UTF-16BE */ + if (hs != 0) { /* Surrogate pair? */ + pb->buf[i++] = (BYTE)(hs >> 8); + pb->buf[i++] = (BYTE)hs; + nc++; + } + pb->buf[i++] = (BYTE)(wc >> 8); + pb->buf[i++] = (BYTE)wc; +#elif FF_STRF_ENCODE == 3 /* Write a code point in UTF-8 */ + if (hs != 0) { /* 4-byte sequence? */ + nc += 3; + hs = (hs & 0x3FF) + 0x40; + pb->buf[i++] = (BYTE)(0xF0 | hs >> 8); + pb->buf[i++] = (BYTE)(0x80 | (hs >> 2 & 0x3F)); + pb->buf[i++] = (BYTE)(0x80 | (hs & 3) << 4 | (wc >> 6 & 0x0F)); + pb->buf[i++] = (BYTE)(0x80 | (wc & 0x3F)); + } else { + if (wc < 0x80) { /* Single byte? */ + pb->buf[i++] = (BYTE)wc; + } else { + if (wc < 0x800) { /* 2-byte sequence? */ + nc += 1; + pb->buf[i++] = (BYTE)(0xC0 | wc >> 6); + } else { /* 3-byte sequence */ + nc += 2; + pb->buf[i++] = (BYTE)(0xE0 | wc >> 12); + pb->buf[i++] = (BYTE)(0x80 | (wc >> 6 & 0x3F)); + } + pb->buf[i++] = (BYTE)(0x80 | (wc & 0x3F)); + } + } +#else /* Write a code point in ANSI/OEM */ + if (hs != 0) return; + wc = ff_uni2oem(wc, CODEPAGE); /* UTF-16 ==> ANSI/OEM */ + if (wc == 0) return; + if (wc >= 0x100) { + pb->buf[i++] = (BYTE)(wc >> 8); nc++; + } + pb->buf[i++] = (BYTE)wc; +#endif + +#else /* ANSI/OEM input (without re-encoding) */ + pb->buf[i++] = (BYTE)c; +#endif + + if (i >= (int)(sizeof pb->buf) - 4) { /* Write buffered characters to the file */ + f_write(pb->fp, pb->buf, (UINT)i, &n); + i = (n == (UINT)i) ? 0 : -1; + } + pb->idx = i; + pb->nchr = nc + 1; +} + + +/* Flush remaining characters in the buffer */ + +static int putc_flush (putbuff* pb) +{ + UINT nw; + + if ( pb->idx >= 0 /* Flush buffered characters to the file */ + && f_write(pb->fp, pb->buf, (UINT)pb->idx, &nw) == FR_OK + && (UINT)pb->idx == nw) return pb->nchr; + return EOF; +} + + +/* Initialize write buffer */ + +static void putc_init (putbuff* pb, FIL* fp) +{ + mem_set(pb, 0, sizeof (putbuff)); + pb->fp = fp; +} + + + +int f_putc ( + TCHAR c, /* A character to be output */ + FIL* fp /* Pointer to the file object */ +) +{ + putbuff pb; + + + putc_init(&pb, fp); + putc_bfd(&pb, c); /* Put the character */ + return putc_flush(&pb); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Put a String to the File */ +/*-----------------------------------------------------------------------*/ + +int f_puts ( + const TCHAR* str, /* Pointer to the string to be output */ + FIL* fp /* Pointer to the file object */ +) +{ + putbuff pb; + + + putc_init(&pb, fp); + while (*str) putc_bfd(&pb, *str++); /* Put the string */ + return putc_flush(&pb); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Put a Formatted String to the File */ +/*-----------------------------------------------------------------------*/ + +int f_printf ( + FIL* fp, /* Pointer to the file object */ + const TCHAR* fmt, /* Pointer to the format string */ + ... /* Optional arguments... */ +) +{ + va_list arp; + putbuff pb; + BYTE f, r; + UINT i, j, w; + DWORD v; + TCHAR c, d, str[32], *p; + + + putc_init(&pb, fp); + + va_start(arp, fmt); + + for (;;) { + c = *fmt++; + if (c == 0) break; /* End of string */ + if (c != '%') { /* Non escape character */ + putc_bfd(&pb, c); + continue; + } + w = f = 0; + c = *fmt++; + if (c == '0') { /* Flag: '0' padding */ + f = 1; c = *fmt++; + } else { + if (c == '-') { /* Flag: left justified */ + f = 2; c = *fmt++; + } + } + if (c == '*') { /* Minimum width by argument */ + w = va_arg(arp, int); + c = *fmt++; + } else { + while (IsDigit(c)) { /* Minimum width */ + w = w * 10 + c - '0'; + c = *fmt++; + } + } + if (c == 'l' || c == 'L') { /* Type prefix: Size is long int */ + f |= 4; c = *fmt++; + } + if (c == 0) break; + d = c; + if (IsLower(d)) d -= 0x20; + switch (d) { /* Atgument type is... */ + case 'S' : /* String */ + p = va_arg(arp, TCHAR*); + for (j = 0; p[j]; j++) ; + if (!(f & 2)) { /* Right padded */ + while (j++ < w) putc_bfd(&pb, ' ') ; + } + while (*p) putc_bfd(&pb, *p++) ; /* String body */ + while (j++ < w) putc_bfd(&pb, ' ') ; /* Left padded */ + continue; + + case 'C' : /* Character */ + putc_bfd(&pb, (TCHAR)va_arg(arp, int)); continue; + + case 'B' : /* Unsigned binary */ + r = 2; break; + + case 'O' : /* Unsigned octal */ + r = 8; break; + + case 'D' : /* Signed decimal */ + case 'U' : /* Unsigned decimal */ + r = 10; break; + + case 'X' : /* Unsigned hexdecimal */ + r = 16; break; + + default: /* Unknown type (pass-through) */ + putc_bfd(&pb, c); continue; + } + + /* Get an argument and put it in numeral */ + v = (f & 4) ? (DWORD)va_arg(arp, long) : ((d == 'D') ? (DWORD)(long)va_arg(arp, int) : (DWORD)va_arg(arp, unsigned int)); + if (d == 'D' && (v & 0x80000000)) { + v = 0 - v; + f |= 8; + } + i = 0; + do { + d = (TCHAR)(v % r); v /= r; + if (d > 9) d += (c == 'x') ? 0x27 : 0x07; + str[i++] = d + '0'; + } while (v && i < sizeof str / sizeof *str); + if (f & 8) str[i++] = '-'; + j = i; d = (f & 1) ? '0' : ' '; + if (!(f & 2)) { + while (j++ < w) putc_bfd(&pb, d); /* Right pad */ + } + do { + putc_bfd(&pb, str[--i]); /* Number body */ + } while (i); + while (j++ < w) putc_bfd(&pb, d); /* Left pad */ + } + + va_end(arp); + + return putc_flush(&pb); +} + +#endif /* !FF_FS_READONLY */ +#endif /* FF_USE_STRFUNC */ + + + +#if FF_CODE_PAGE == 0 +/*-----------------------------------------------------------------------*/ +/* Set Active Codepage for the Path Name */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_setcp ( + WORD cp /* Value to be set as active code page */ +) +{ + static const WORD validcp[] = { 437, 720, 737, 771, 775, 850, 852, 857, 860, 861, 862, 863, 864, 865, 866, 869, 932, 936, 949, 950, 0}; + static const BYTE* const tables[] = {Ct437, Ct720, Ct737, Ct771, Ct775, Ct850, Ct852, Ct857, Ct860, Ct861, Ct862, Ct863, Ct864, Ct865, Ct866, Ct869, Dc932, Dc936, Dc949, Dc950, 0}; + UINT i; + + + for (i = 0; validcp[i] != 0 && validcp[i] != cp; i++) ; /* Find the code page */ + if (validcp[i] != cp) return FR_INVALID_PARAMETER; /* Not found? */ + + CodePage = cp; + if (cp >= 900) { /* DBCS */ + ExCvt = 0; + DbcTbl = tables[i]; + } else { /* SBCS */ + ExCvt = tables[i]; + DbcTbl = 0; + } + return FR_OK; +} +#endif /* FF_CODE_PAGE == 0 */ + diff --git a/components/fatfs/ff.h b/components/fatfs/ff.h new file mode 100644 index 00000000..52250416 --- /dev/null +++ b/components/fatfs/ff.h @@ -0,0 +1,426 @@ +/*----------------------------------------------------------------------------/ +/ FatFs - Generic FAT Filesystem module R0.14 / +/-----------------------------------------------------------------------------/ +/ +/ Copyright (C) 2019, ChaN, all right reserved. +/ +/ FatFs module is an open source software. Redistribution and use of FatFs in +/ source and binary forms, with or without modification, are permitted provided +/ that the following condition is met: + +/ 1. Redistributions of source code must retain the above copyright notice, +/ this condition and the following disclaimer. +/ +/ This software is provided by the copyright holder and contributors "AS IS" +/ and any warranties related to this software are DISCLAIMED. +/ The copyright owner or contributors be NOT LIABLE for any damages caused +/ by use of this software. +/ +/----------------------------------------------------------------------------*/ + + +#ifndef FF_DEFINED +#define FF_DEFINED 86606 /* Revision ID */ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "ffconf.h" /* FatFs configuration options */ + +#if FF_DEFINED != FFCONF_DEF +#error Wrong configuration file (ffconf.h). +#endif + + +/* Integer types used for FatFs API */ + +#if defined(_WIN32) /* Main development platform */ +#define FF_INTDEF 2 +#include +typedef unsigned __int64 QWORD; +#elif (defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L) || defined(__cplusplus) /* C99 or later */ +#define FF_INTDEF 2 +#include +typedef unsigned int UINT; /* int must be 16-bit or 32-bit */ +typedef unsigned char BYTE; /* char must be 8-bit */ +typedef uint16_t WORD; /* 16-bit unsigned integer */ +typedef uint32_t DWORD; /* 32-bit unsigned integer */ +typedef uint64_t QWORD; /* 64-bit unsigned integer */ +typedef WORD WCHAR; /* UTF-16 character type */ +#else /* Earlier than C99 */ +#define FF_INTDEF 1 +typedef unsigned int UINT; /* int must be 16-bit or 32-bit */ +typedef unsigned char BYTE; /* char must be 8-bit */ +typedef unsigned short WORD; /* 16-bit unsigned integer */ +typedef unsigned long DWORD; /* 32-bit unsigned integer */ +typedef WORD WCHAR; /* UTF-16 character type */ +#endif + + +/* Definitions of volume management */ + +#if FF_MULTI_PARTITION /* Multiple partition configuration */ +typedef struct { + BYTE pd; /* Physical drive number */ + BYTE pt; /* Partition: 0:Auto detect, 1-4:Forced partition) */ +} PARTITION; +extern PARTITION VolToPart[]; /* Volume - Partition mapping table */ +#endif + +#if FF_STR_VOLUME_ID +#ifndef FF_VOLUME_STRS +extern const char* VolumeStr[FF_VOLUMES]; /* User defied volume ID */ +#endif +#endif + + + +/* Type of path name strings on FatFs API */ + +#ifndef _INC_TCHAR +#define _INC_TCHAR + +#if FF_USE_LFN && FF_LFN_UNICODE == 1 /* Unicode in UTF-16 encoding */ +typedef WCHAR TCHAR; +#define _T(x) L ## x +#define _TEXT(x) L ## x +#elif FF_USE_LFN && FF_LFN_UNICODE == 2 /* Unicode in UTF-8 encoding */ +typedef char TCHAR; +#define _T(x) u8 ## x +#define _TEXT(x) u8 ## x +#elif FF_USE_LFN && FF_LFN_UNICODE == 3 /* Unicode in UTF-32 encoding */ +typedef DWORD TCHAR; +#define _T(x) U ## x +#define _TEXT(x) U ## x +#elif FF_USE_LFN && (FF_LFN_UNICODE < 0 || FF_LFN_UNICODE > 3) +#error Wrong FF_LFN_UNICODE setting +#else /* ANSI/OEM code in SBCS/DBCS */ +typedef char TCHAR; +#define _T(x) x +#define _TEXT(x) x +#endif + +#endif + + + +/* Type of file size and LBA variables */ + +#if FF_FS_EXFAT +#if FF_INTDEF != 2 +#error exFAT feature wants C99 or later +#endif +typedef QWORD FSIZE_t; +#if FF_LBA64 +typedef QWORD LBA_t; +#else +typedef DWORD LBA_t; +#endif +#else +#if FF_LBA64 +#error exFAT needs to be enabled when enable 64-bit LBA +#endif +typedef DWORD FSIZE_t; +typedef DWORD LBA_t; +#endif + + + +/* Filesystem object structure (FATFS) */ + +typedef struct { + BYTE fs_type; /* Filesystem type (0:not mounted) */ + BYTE pdrv; /* Associated physical drive */ + BYTE n_fats; /* Number of FATs (1 or 2) */ + BYTE wflag; /* win[] flag (b0:dirty) */ + BYTE fsi_flag; /* FSINFO flags (b7:disabled, b0:dirty) */ + WORD id; /* Volume mount ID */ + WORD n_rootdir; /* Number of root directory entries (FAT12/16) */ + WORD csize; /* Cluster size [sectors] */ +#if FF_MAX_SS != FF_MIN_SS + WORD ssize; /* Sector size (512, 1024, 2048 or 4096) */ +#endif +#if FF_USE_LFN + WCHAR* lfnbuf; /* LFN working buffer */ +#endif +#if FF_FS_EXFAT + BYTE* dirbuf; /* Directory entry block scratchpad buffer for exFAT */ +#endif +#if FF_FS_REENTRANT + FF_SYNC_t sobj; /* Identifier of sync object */ +#endif +#if !FF_FS_READONLY + DWORD last_clst; /* Last allocated cluster */ + DWORD free_clst; /* Number of free clusters */ +#endif +#if FF_FS_RPATH + DWORD cdir; /* Current directory start cluster (0:root) */ +#if FF_FS_EXFAT + DWORD cdc_scl; /* Containing directory start cluster (invalid when cdir is 0) */ + DWORD cdc_size; /* b31-b8:Size of containing directory, b7-b0: Chain status */ + DWORD cdc_ofs; /* Offset in the containing directory (invalid when cdir is 0) */ +#endif +#endif + DWORD n_fatent; /* Number of FAT entries (number of clusters + 2) */ + DWORD fsize; /* Size of an FAT [sectors] */ + LBA_t volbase; /* Volume base sector */ + LBA_t fatbase; /* FAT base sector */ + LBA_t dirbase; /* Root directory base sector/cluster */ + LBA_t database; /* Data base sector */ +#if FF_FS_EXFAT + LBA_t bitbase; /* Allocation bitmap base sector */ +#endif + LBA_t winsect; /* Current sector appearing in the win[] */ + BYTE win[FF_MAX_SS]; /* Disk access window for Directory, FAT (and file data at tiny cfg) */ +} FATFS; + + + +/* Object ID and allocation information (FFOBJID) */ + +typedef struct { + FATFS* fs; /* Pointer to the hosting volume of this object */ + WORD id; /* Hosting volume mount ID */ + BYTE attr; /* Object attribute */ + BYTE stat; /* Object chain status (b1-0: =0:not contiguous, =2:contiguous, =3:fragmented in this session, b2:sub-directory stretched) */ + DWORD sclust; /* Object data start cluster (0:no cluster or root directory) */ + FSIZE_t objsize; /* Object size (valid when sclust != 0) */ +#if FF_FS_EXFAT + DWORD n_cont; /* Size of first fragment - 1 (valid when stat == 3) */ + DWORD n_frag; /* Size of last fragment needs to be written to FAT (valid when not zero) */ + DWORD c_scl; /* Containing directory start cluster (valid when sclust != 0) */ + DWORD c_size; /* b31-b8:Size of containing directory, b7-b0: Chain status (valid when c_scl != 0) */ + DWORD c_ofs; /* Offset in the containing directory (valid when file object and sclust != 0) */ +#endif +#if FF_FS_LOCK + UINT lockid; /* File lock ID origin from 1 (index of file semaphore table Files[]) */ +#endif +} FFOBJID; + + + +/* File object structure (FIL) */ + +typedef struct { + FFOBJID obj; /* Object identifier (must be the 1st member to detect invalid object pointer) */ + BYTE flag; /* File status flags */ + BYTE err; /* Abort flag (error code) */ + FSIZE_t fptr; /* File read/write pointer (Zeroed on file open) */ + DWORD clust; /* Current cluster of fpter (invalid when fptr is 0) */ + LBA_t sect; /* Sector number appearing in buf[] (0:invalid) */ +#if !FF_FS_READONLY + LBA_t dir_sect; /* Sector number containing the directory entry (not used at exFAT) */ + BYTE* dir_ptr; /* Pointer to the directory entry in the win[] (not used at exFAT) */ +#endif +#if FF_USE_FASTSEEK + DWORD* cltbl; /* Pointer to the cluster link map table (nulled on open, set by application) */ +#endif +#if !FF_FS_TINY + BYTE buf[FF_MAX_SS]; /* File private data read/write window */ +#endif +} FIL; + + + +/* Directory object structure (DIR) */ + +typedef struct { + FFOBJID obj; /* Object identifier */ + DWORD dptr; /* Current read/write offset */ + DWORD clust; /* Current cluster */ + LBA_t sect; /* Current sector (0:Read operation has terminated) */ + BYTE* dir; /* Pointer to the directory item in the win[] */ + BYTE fn[12]; /* SFN (in/out) {body[8],ext[3],status[1]} */ +#if FF_USE_LFN + DWORD blk_ofs; /* Offset of current entry block being processed (0xFFFFFFFF:Invalid) */ +#endif +#if FF_USE_FIND + const TCHAR* pat; /* Pointer to the name matching pattern */ +#endif +} DIR; + + + +/* File information structure (FILINFO) */ + +typedef struct { + FSIZE_t fsize; /* File size */ + WORD fdate; /* Modified date */ + WORD ftime; /* Modified time */ + BYTE fattrib; /* File attribute */ +#if FF_USE_LFN + TCHAR altname[FF_SFN_BUF + 1];/* Altenative file name */ + TCHAR fname[FF_LFN_BUF + 1]; /* Primary file name */ +#else + TCHAR fname[12 + 1]; /* File name */ +#endif +} FILINFO; + + + +/* Format parameter structure (MKFS_PARM) */ + +typedef struct { + BYTE fmt; /* Format option (FM_FAT, FM_FAT32, FM_EXFAT and FM_SFD) */ + BYTE n_fat; /* Number of FATs */ + UINT align; /* Data area alignment (sector) */ + UINT n_root; /* Number of root directory entries */ + DWORD au_size; /* Cluster size (byte) */ +} MKFS_PARM; + + + +/* File function return code (FRESULT) */ + +typedef enum { + FR_OK = 0, /* (0) Succeeded */ + FR_DISK_ERR, /* (1) A hard error occurred in the low level disk I/O layer */ + FR_INT_ERR, /* (2) Assertion failed */ + FR_NOT_READY, /* (3) The physical drive cannot work */ + FR_NO_FILE, /* (4) Could not find the file */ + FR_NO_PATH, /* (5) Could not find the path */ + FR_INVALID_NAME, /* (6) The path name format is invalid */ + FR_DENIED, /* (7) Access denied due to prohibited access or directory full */ + FR_EXIST, /* (8) Access denied due to prohibited access */ + FR_INVALID_OBJECT, /* (9) The file/directory object is invalid */ + FR_WRITE_PROTECTED, /* (10) The physical drive is write protected */ + FR_INVALID_DRIVE, /* (11) The logical drive number is invalid */ + FR_NOT_ENABLED, /* (12) The volume has no work area */ + FR_NO_FILESYSTEM, /* (13) There is no valid FAT volume */ + FR_MKFS_ABORTED, /* (14) The f_mkfs() aborted due to any problem */ + FR_TIMEOUT, /* (15) Could not get a grant to access the volume within defined period */ + FR_LOCKED, /* (16) The operation is rejected according to the file sharing policy */ + FR_NOT_ENOUGH_CORE, /* (17) LFN working buffer could not be allocated */ + FR_TOO_MANY_OPEN_FILES, /* (18) Number of open files > FF_FS_LOCK */ + FR_INVALID_PARAMETER /* (19) Given parameter is invalid */ +} FRESULT; + + + +/*--------------------------------------------------------------*/ +/* FatFs module application interface */ + +FRESULT f_open (FIL* fp, const TCHAR* path, BYTE mode); /* Open or create a file */ +FRESULT f_close (FIL* fp); /* Close an open file object */ +FRESULT f_read (FIL* fp, void* buff, UINT btr, UINT* br); /* Read data from the file */ +FRESULT f_write (FIL* fp, const void* buff, UINT btw, UINT* bw); /* Write data to the file */ +FRESULT f_lseek (FIL* fp, FSIZE_t ofs); /* Move file pointer of the file object */ +FRESULT f_truncate (FIL* fp); /* Truncate the file */ +FRESULT f_sync (FIL* fp); /* Flush cached data of the writing file */ +FRESULT f_opendir (DIR* dp, const TCHAR* path); /* Open a directory */ +FRESULT f_closedir (DIR* dp); /* Close an open directory */ +FRESULT f_readdir (DIR* dp, FILINFO* fno); /* Read a directory item */ +FRESULT f_findfirst (DIR* dp, FILINFO* fno, const TCHAR* path, const TCHAR* pattern); /* Find first file */ +FRESULT f_findnext (DIR* dp, FILINFO* fno); /* Find next file */ +FRESULT f_mkdir (const TCHAR* path); /* Create a sub directory */ +FRESULT f_unlink (const TCHAR* path); /* Delete an existing file or directory */ +FRESULT f_rename (const TCHAR* path_old, const TCHAR* path_new); /* Rename/Move a file or directory */ +FRESULT f_stat (const TCHAR* path, FILINFO* fno); /* Get file status */ +FRESULT f_chmod (const TCHAR* path, BYTE attr, BYTE mask); /* Change attribute of a file/dir */ +FRESULT f_utime (const TCHAR* path, const FILINFO* fno); /* Change timestamp of a file/dir */ +FRESULT f_chdir (const TCHAR* path); /* Change current directory */ +FRESULT f_chdrive (const TCHAR* path); /* Change current drive */ +FRESULT f_getcwd (TCHAR* buff, UINT len); /* Get current directory */ +FRESULT f_getfree (const TCHAR* path, DWORD* nclst, FATFS** fatfs); /* Get number of free clusters on the drive */ +FRESULT f_getlabel (const TCHAR* path, TCHAR* label, DWORD* vsn); /* Get volume label */ +FRESULT f_setlabel (const TCHAR* label); /* Set volume label */ +FRESULT f_forward (FIL* fp, UINT(*func)(const BYTE*,UINT), UINT btf, UINT* bf); /* Forward data to the stream */ +FRESULT f_expand (FIL* fp, FSIZE_t fsz, BYTE opt); /* Allocate a contiguous block to the file */ +FRESULT f_mount (FATFS* fs, const TCHAR* path, BYTE opt); /* Mount/Unmount a logical drive */ +FRESULT f_mkfs (const TCHAR* path, const MKFS_PARM* opt, void* work, UINT len); /* Create a FAT volume */ +FRESULT f_fdisk (BYTE pdrv, const LBA_t ptbl[], void* work); /* Divide a physical drive into some partitions */ +FRESULT f_setcp (WORD cp); /* Set current code page */ +int f_putc (TCHAR c, FIL* fp); /* Put a character to the file */ +int f_puts (const TCHAR* str, FIL* cp); /* Put a string to the file */ +int f_printf (FIL* fp, const TCHAR* str, ...); /* Put a formatted string to the file */ +TCHAR* f_gets (TCHAR* buff, int len, FIL* fp); /* Get a string from the file */ + +#define f_eof(fp) ((int)((fp)->fptr == (fp)->obj.objsize)) +#define f_error(fp) ((fp)->err) +#define f_tell(fp) ((fp)->fptr) +#define f_size(fp) ((fp)->obj.objsize) +#define f_rewind(fp) f_lseek((fp), 0) +#define f_rewinddir(dp) f_readdir((dp), 0) +#define f_rmdir(path) f_unlink(path) +#define f_unmount(path) f_mount(0, path, 0) + +#ifndef EOF +#define EOF (-1) +#endif + + + + +/*--------------------------------------------------------------*/ +/* Additional user defined functions */ + +/* RTC function */ +#if !FF_FS_READONLY && !FF_FS_NORTC +DWORD get_fattime (void); +#endif + +/* LFN support functions */ +#if FF_USE_LFN >= 1 /* Code conversion (defined in unicode.c) */ +WCHAR ff_oem2uni (WCHAR oem, WORD cp); /* OEM code to Unicode conversion */ +WCHAR ff_uni2oem (DWORD uni, WORD cp); /* Unicode to OEM code conversion */ +DWORD ff_wtoupper (DWORD uni); /* Unicode upper-case conversion */ +#endif +#if FF_USE_LFN == 3 /* Dynamic memory allocation */ +void* ff_memalloc (UINT msize); /* Allocate memory block */ +void ff_memfree (void* mblock); /* Free memory block */ +#endif + +/* Sync functions */ +#if FF_FS_REENTRANT +int ff_cre_syncobj (BYTE vol, FF_SYNC_t* sobj); /* Create a sync object */ +int ff_req_grant (FF_SYNC_t sobj); /* Lock sync object */ +void ff_rel_grant (FF_SYNC_t sobj); /* Unlock sync object */ +int ff_del_syncobj (FF_SYNC_t sobj); /* Delete a sync object */ +#endif + + + + +/*--------------------------------------------------------------*/ +/* Flags and offset address */ + + +/* File access mode and open method flags (3rd argument of f_open) */ +#define FA_READ 0x01 +#define FA_WRITE 0x02 +#define FA_OPEN_EXISTING 0x00 +#define FA_CREATE_NEW 0x04 +#define FA_CREATE_ALWAYS 0x08 +#define FA_OPEN_ALWAYS 0x10 +#define FA_OPEN_APPEND 0x30 + +/* Fast seek controls (2nd argument of f_lseek) */ +#define CREATE_LINKMAP ((FSIZE_t)0 - 1) + +/* Format options (2nd argument of f_mkfs) */ +#define FM_FAT 0x01 +#define FM_FAT32 0x02 +#define FM_EXFAT 0x04 +#define FM_ANY 0x07 +#define FM_SFD 0x08 + +/* Filesystem type (FATFS.fs_type) */ +#define FS_FAT12 1 +#define FS_FAT16 2 +#define FS_FAT32 3 +#define FS_EXFAT 4 + +/* File attribute bits for directory entry (FILINFO.fattrib) */ +#define AM_RDO 0x01 /* Read only */ +#define AM_HID 0x02 /* Hidden */ +#define AM_SYS 0x04 /* System */ +#define AM_DIR 0x10 /* Directory */ +#define AM_ARC 0x20 /* Archive */ + + +#ifdef __cplusplus +} +#endif + +#endif /* FF_DEFINED */ diff --git a/components/fatfs/ffconf.h b/components/fatfs/ffconf.h new file mode 100644 index 00000000..279011bb --- /dev/null +++ b/components/fatfs/ffconf.h @@ -0,0 +1,298 @@ +/*---------------------------------------------------------------------------/ +/ FatFs Functional Configurations +/---------------------------------------------------------------------------*/ + +#define FFCONF_DEF 86606 /* Revision ID */ + +/*---------------------------------------------------------------------------/ +/ Function Configurations +/---------------------------------------------------------------------------*/ + +#define FF_FS_READONLY 0 +/* This option switches read-only configuration. (0:Read/Write or 1:Read-only) +/ Read-only configuration removes writing API functions, f_write(), f_sync(), +/ f_unlink(), f_mkdir(), f_chmod(), f_rename(), f_truncate(), f_getfree() +/ and optional writing functions as well. */ + + +#define FF_FS_MINIMIZE 0 +/* This option defines minimization level to remove some basic API functions. +/ +/ 0: Basic functions are fully enabled. +/ 1: f_stat(), f_getfree(), f_unlink(), f_mkdir(), f_truncate() and f_rename() +/ are removed. +/ 2: f_opendir(), f_readdir() and f_closedir() are removed in addition to 1. +/ 3: f_lseek() function is removed in addition to 2. */ + + +#define FF_USE_STRFUNC 0 +/* This option switches string functions, f_gets(), f_putc(), f_puts() and f_printf(). +/ +/ 0: Disable string functions. +/ 1: Enable without LF-CRLF conversion. +/ 2: Enable with LF-CRLF conversion. */ + + +#define FF_USE_FIND 0 +/* This option switches filtered directory read functions, f_findfirst() and +/ f_findnext(). (0:Disable, 1:Enable 2:Enable with matching altname[] too) */ + + +#define FF_USE_MKFS 1 +/* This option switches f_mkfs() function. (0:Disable or 1:Enable) */ + + +#define FF_USE_FASTSEEK 1 +/* This option switches fast seek function. (0:Disable or 1:Enable) */ + + +#define FF_USE_EXPAND 0 +/* This option switches f_expand function. (0:Disable or 1:Enable) */ + + +#define FF_USE_CHMOD 0 +/* This option switches attribute manipulation functions, f_chmod() and f_utime(). +/ (0:Disable or 1:Enable) Also FF_FS_READONLY needs to be 0 to enable this option. */ + + +#define FF_USE_LABEL 0 +/* This option switches volume label functions, f_getlabel() and f_setlabel(). +/ (0:Disable or 1:Enable) */ + + +#define FF_USE_FORWARD 0 +/* This option switches f_forward() function. (0:Disable or 1:Enable) */ + + +/*---------------------------------------------------------------------------/ +/ Locale and Namespace Configurations +/---------------------------------------------------------------------------*/ + +#define FF_CODE_PAGE 437 +/* This option specifies the OEM code page to be used on the target system. +/ Incorrect code page setting can cause a file open failure. +/ +/ 437 - U.S. +/ 720 - Arabic +/ 737 - Greek +/ 771 - KBL +/ 775 - Baltic +/ 850 - Latin 1 +/ 852 - Latin 2 +/ 855 - Cyrillic +/ 857 - Turkish +/ 860 - Portuguese +/ 861 - Icelandic +/ 862 - Hebrew +/ 863 - Canadian French +/ 864 - Arabic +/ 865 - Nordic +/ 866 - Russian +/ 869 - Greek 2 +/ 932 - Japanese (DBCS) +/ 936 - Simplified Chinese (DBCS) +/ 949 - Korean (DBCS) +/ 950 - Traditional Chinese (DBCS) +/ 0 - Include all code pages above and configured by f_setcp() +*/ + + +#define FF_USE_LFN 1 +#define FF_MAX_LFN 255 +/* The FF_USE_LFN switches the support for LFN (long file name). +/ +/ 0: Disable LFN. FF_MAX_LFN has no effect. +/ 1: Enable LFN with static working buffer on the BSS. Always NOT thread-safe. +/ 2: Enable LFN with dynamic working buffer on the STACK. +/ 3: Enable LFN with dynamic working buffer on the HEAP. +/ +/ To enable the LFN, ffunicode.c needs to be added to the project. The LFN function +/ requiers certain internal working buffer occupies (FF_MAX_LFN + 1) * 2 bytes and +/ additional (FF_MAX_LFN + 44) / 15 * 32 bytes when exFAT is enabled. +/ The FF_MAX_LFN defines size of the working buffer in UTF-16 code unit and it can +/ be in range of 12 to 255. It is recommended to be set it 255 to fully support LFN +/ specification. +/ When use stack for the working buffer, take care on stack overflow. When use heap +/ memory for the working buffer, memory management functions, ff_memalloc() and +/ ff_memfree() exemplified in ffsystem.c, need to be added to the project. */ + + +#define FF_LFN_UNICODE 0 +/* This option switches the character encoding on the API when LFN is enabled. +/ +/ 0: ANSI/OEM in current CP (TCHAR = char) +/ 1: Unicode in UTF-16 (TCHAR = WCHAR) +/ 2: Unicode in UTF-8 (TCHAR = char) +/ 3: Unicode in UTF-32 (TCHAR = DWORD) +/ +/ Also behavior of string I/O functions will be affected by this option. +/ When LFN is not enabled, this option has no effect. */ + + +#define FF_LFN_BUF 255 +#define FF_SFN_BUF 12 +/* This set of options defines size of file name members in the FILINFO structure +/ which is used to read out directory items. These values should be suffcient for +/ the file names to read. The maximum possible length of the read file name depends +/ on character encoding. When LFN is not enabled, these options have no effect. */ + + +#define FF_STRF_ENCODE 3 +/* When FF_LFN_UNICODE >= 1 with LFN enabled, string I/O functions, f_gets(), +/ f_putc(), f_puts and f_printf() convert the character encoding in it. +/ This option selects assumption of character encoding ON THE FILE to be +/ read/written via those functions. +/ +/ 0: ANSI/OEM in current CP +/ 1: Unicode in UTF-16LE +/ 2: Unicode in UTF-16BE +/ 3: Unicode in UTF-8 +*/ + + +#define FF_FS_RPATH 0 +/* This option configures support for relative path. +/ +/ 0: Disable relative path and remove related functions. +/ 1: Enable relative path. f_chdir() and f_chdrive() are available. +/ 2: f_getcwd() function is available in addition to 1. +*/ + + +/*---------------------------------------------------------------------------/ +/ Drive/Volume Configurations +/---------------------------------------------------------------------------*/ + +#define FF_VOLUMES 3 +/* Number of volumes (logical drives) to be used. (1-10) */ + + +#define FF_STR_VOLUME_ID 0 +#define FF_VOLUME_STRS "RAM","NAND","CF","SD","SD2","USB","USB2","USB3" +/* FF_STR_VOLUME_ID switches support for volume ID in arbitrary strings. +/ When FF_STR_VOLUME_ID is set to 1 or 2, arbitrary strings can be used as drive +/ number in the path name. FF_VOLUME_STRS defines the volume ID strings for each +/ logical drives. Number of items must not be less than FF_VOLUMES. Valid +/ characters for the volume ID strings are A-Z, a-z and 0-9, however, they are +/ compared in case-insensitive. If FF_STR_VOLUME_ID >= 1 and FF_VOLUME_STRS is +/ not defined, a user defined volume string table needs to be defined as: +/ +/ const char* VolumeStr[FF_VOLUMES] = {"ram","flash","sd","usb",... +*/ + + +#define FF_MULTI_PARTITION 0 +/* This option switches support for multiple volumes on the physical drive. +/ By default (0), each logical drive number is bound to the same physical drive +/ number and only an FAT volume found on the physical drive will be mounted. +/ When this function is enabled (1), each logical drive number can be bound to +/ arbitrary physical drive and partition listed in the VolToPart[]. Also f_fdisk() +/ funciton will be available. */ + + +#define FF_MIN_SS 512 +#define FF_MAX_SS 512 +/* This set of options configures the range of sector size to be supported. (512, +/ 1024, 2048 or 4096) Always set both 512 for most systems, generic memory card and +/ harddisk. But a larger value may be required for on-board flash memory and some +/ type of optical media. When FF_MAX_SS is larger than FF_MIN_SS, FatFs is configured +/ for variable sector size mode and disk_ioctl() function needs to implement +/ GET_SECTOR_SIZE command. */ + + +#define FF_LBA64 0 +/* This option switches support for 64-bit LBA. (0:Disable or 1:Enable) +/ To enable the 64-bit LBA, also exFAT needs to be enabled. (FF_FS_EXFAT == 1) */ + + +#define FF_MIN_GPT 0x100000000 +/* Minimum number of sectors to switch GPT format to create partition in f_mkfs and +/ f_fdisk function. 0x100000000 max. This option has no effect when FF_LBA64 == 0. */ + + +#define FF_USE_TRIM 0 +/* This option switches support for ATA-TRIM. (0:Disable or 1:Enable) +/ To enable Trim function, also CTRL_TRIM command should be implemented to the +/ disk_ioctl() function. */ + + + +/*---------------------------------------------------------------------------/ +/ System Configurations +/---------------------------------------------------------------------------*/ + +#define FF_FS_TINY 0 +/* This option switches tiny buffer configuration. (0:Normal or 1:Tiny) +/ At the tiny configuration, size of file object (FIL) is shrinked FF_MAX_SS bytes. +/ Instead of private sector buffer eliminated from the file object, common sector +/ buffer in the filesystem object (FATFS) is used for the file data transfer. */ + + +#define FF_FS_EXFAT 0 +/* This option switches support for exFAT filesystem. (0:Disable or 1:Enable) +/ To enable exFAT, also LFN needs to be enabled. (FF_USE_LFN >= 1) +/ Note that enabling exFAT discards ANSI C (C89) compatibility. */ + + +#define FF_FS_NORTC 1 +#define FF_NORTC_MON 1 +#define FF_NORTC_MDAY 1 +#define FF_NORTC_YEAR 2019 +/* The option FF_FS_NORTC switches timestamp functiton. If the system does not have +/ any RTC function or valid timestamp is not needed, set FF_FS_NORTC = 1 to disable +/ the timestamp function. Every object modified by FatFs will have a fixed timestamp +/ defined by FF_NORTC_MON, FF_NORTC_MDAY and FF_NORTC_YEAR in local time. +/ To enable timestamp function (FF_FS_NORTC = 0), get_fattime() function need to be +/ added to the project to read current time form real-time clock. FF_NORTC_MON, +/ FF_NORTC_MDAY and FF_NORTC_YEAR have no effect. +/ These options have no effect in read-only configuration (FF_FS_READONLY = 1). */ + + +#define FF_FS_NOFSINFO 0 +/* If you need to know correct free space on the FAT32 volume, set bit 0 of this +/ option, and f_getfree() function at first time after volume mount will force +/ a full FAT scan. Bit 1 controls the use of last allocated cluster number. +/ +/ bit0=0: Use free cluster count in the FSINFO if available. +/ bit0=1: Do not trust free cluster count in the FSINFO. +/ bit1=0: Use last allocated cluster number in the FSINFO if available. +/ bit1=1: Do not trust last allocated cluster number in the FSINFO. +*/ + + +#define FF_FS_LOCK 0 +/* The option FF_FS_LOCK switches file lock function to control duplicated file open +/ and illegal operation to open objects. This option must be 0 when FF_FS_READONLY +/ is 1. +/ +/ 0: Disable file lock function. To avoid volume corruption, application program +/ should avoid illegal open, remove and rename to the open objects. +/ >0: Enable file lock function. The value defines how many files/sub-directories +/ can be opened simultaneously under file lock control. Note that the file +/ lock control is independent of re-entrancy. */ + + +/* #include // O/S definitions */ +#define FF_FS_REENTRANT 0 +#define FF_FS_TIMEOUT 1000 +#define FF_SYNC_t HANDLE +/* The option FF_FS_REENTRANT switches the re-entrancy (thread safe) of the FatFs +/ module itself. Note that regardless of this option, file access to different +/ volume is always re-entrant and volume control functions, f_mount(), f_mkfs() +/ and f_fdisk() function, are always not re-entrant. Only file/directory access +/ to the same volume is under control of this function. +/ +/ 0: Disable re-entrancy. FF_FS_TIMEOUT and FF_SYNC_t have no effect. +/ 1: Enable re-entrancy. Also user provided synchronization handlers, +/ ff_req_grant(), ff_rel_grant(), ff_del_syncobj() and ff_cre_syncobj() +/ function, must be added to the project. Samples are available in +/ option/syscall.c. +/ +/ The FF_FS_TIMEOUT defines timeout period in unit of time tick. +/ The FF_SYNC_t defines O/S dependent sync object type. e.g. HANDLE, ID, OS_EVENT*, +/ SemaphoreHandle_t and etc. A header file for O/S definitions needs to be +/ included somewhere in the scope of ff.h. */ + + + +/*--- End of configuration options ---*/ diff --git a/components/fatfs/ffsystem.c b/components/fatfs/ffsystem.c new file mode 100644 index 00000000..b88ce155 --- /dev/null +++ b/components/fatfs/ffsystem.c @@ -0,0 +1,170 @@ +/*------------------------------------------------------------------------*/ +/* Sample Code of OS Dependent Functions for FatFs */ +/* (C)ChaN, 2018 */ +/*------------------------------------------------------------------------*/ + + +#include "ff.h" + + +#if FF_USE_LFN == 3 /* Dynamic memory allocation */ + +/*------------------------------------------------------------------------*/ +/* Allocate a memory block */ +/*------------------------------------------------------------------------*/ + +void* ff_memalloc ( /* Returns pointer to the allocated memory block (null if not enough core) */ + UINT msize /* Number of bytes to allocate */ +) +{ + return malloc(msize); /* Allocate a new memory block with POSIX API */ +} + + +/*------------------------------------------------------------------------*/ +/* Free a memory block */ +/*------------------------------------------------------------------------*/ + +void ff_memfree ( + void* mblock /* Pointer to the memory block to free (nothing to do if null) */ +) +{ + free(mblock); /* Free the memory block with POSIX API */ +} + +#endif + + + +#if FF_FS_REENTRANT /* Mutal exclusion */ + +/*------------------------------------------------------------------------*/ +/* Create a Synchronization Object */ +/*------------------------------------------------------------------------*/ +/* This function is called in f_mount() function to create a new +/ synchronization object for the volume, such as semaphore and mutex. +/ When a 0 is returned, the f_mount() function fails with FR_INT_ERR. +*/ + +//const osMutexDef_t Mutex[FF_VOLUMES]; /* Table of CMSIS-RTOS mutex */ + + +int ff_cre_syncobj ( /* 1:Function succeeded, 0:Could not create the sync object */ + BYTE vol, /* Corresponding volume (logical drive number) */ + FF_SYNC_t* sobj /* Pointer to return the created sync object */ +) +{ + /* Win32 */ + *sobj = CreateMutex(NULL, FALSE, NULL); + return (int)(*sobj != INVALID_HANDLE_VALUE); + + /* uITRON */ +// T_CSEM csem = {TA_TPRI,1,1}; +// *sobj = acre_sem(&csem); +// return (int)(*sobj > 0); + + /* uC/OS-II */ +// OS_ERR err; +// *sobj = OSMutexCreate(0, &err); +// return (int)(err == OS_NO_ERR); + + /* FreeRTOS */ +// *sobj = xSemaphoreCreateMutex(); +// return (int)(*sobj != NULL); + + /* CMSIS-RTOS */ +// *sobj = osMutexCreate(&Mutex[vol]); +// return (int)(*sobj != NULL); +} + + +/*------------------------------------------------------------------------*/ +/* Delete a Synchronization Object */ +/*------------------------------------------------------------------------*/ +/* This function is called in f_mount() function to delete a synchronization +/ object that created with ff_cre_syncobj() function. When a 0 is returned, +/ the f_mount() function fails with FR_INT_ERR. +*/ + +int ff_del_syncobj ( /* 1:Function succeeded, 0:Could not delete due to an error */ + FF_SYNC_t sobj /* Sync object tied to the logical drive to be deleted */ +) +{ + /* Win32 */ + return (int)CloseHandle(sobj); + + /* uITRON */ +// return (int)(del_sem(sobj) == E_OK); + + /* uC/OS-II */ +// OS_ERR err; +// OSMutexDel(sobj, OS_DEL_ALWAYS, &err); +// return (int)(err == OS_NO_ERR); + + /* FreeRTOS */ +// vSemaphoreDelete(sobj); +// return 1; + + /* CMSIS-RTOS */ +// return (int)(osMutexDelete(sobj) == osOK); +} + + +/*------------------------------------------------------------------------*/ +/* Request Grant to Access the Volume */ +/*------------------------------------------------------------------------*/ +/* This function is called on entering file functions to lock the volume. +/ When a 0 is returned, the file function fails with FR_TIMEOUT. +*/ + +int ff_req_grant ( /* 1:Got a grant to access the volume, 0:Could not get a grant */ + FF_SYNC_t sobj /* Sync object to wait */ +) +{ + /* Win32 */ + return (int)(WaitForSingleObject(sobj, FF_FS_TIMEOUT) == WAIT_OBJECT_0); + + /* uITRON */ +// return (int)(wai_sem(sobj) == E_OK); + + /* uC/OS-II */ +// OS_ERR err; +// OSMutexPend(sobj, FF_FS_TIMEOUT, &err)); +// return (int)(err == OS_NO_ERR); + + /* FreeRTOS */ +// return (int)(xSemaphoreTake(sobj, FF_FS_TIMEOUT) == pdTRUE); + + /* CMSIS-RTOS */ +// return (int)(osMutexWait(sobj, FF_FS_TIMEOUT) == osOK); +} + + +/*------------------------------------------------------------------------*/ +/* Release Grant to Access the Volume */ +/*------------------------------------------------------------------------*/ +/* This function is called on leaving file functions to unlock the volume. +*/ + +void ff_rel_grant ( + FF_SYNC_t sobj /* Sync object to be signaled */ +) +{ + /* Win32 */ + ReleaseMutex(sobj); + + /* uITRON */ +// sig_sem(sobj); + + /* uC/OS-II */ +// OSMutexPost(sobj); + + /* FreeRTOS */ +// xSemaphoreGive(sobj); + + /* CMSIS-RTOS */ +// osMutexRelease(sobj); +} + +#endif + diff --git a/components/fatfs/ffunicode.c b/components/fatfs/ffunicode.c new file mode 100644 index 00000000..1196eb34 --- /dev/null +++ b/components/fatfs/ffunicode.c @@ -0,0 +1,15596 @@ +/*------------------------------------------------------------------------*/ +/* Unicode handling functions for FatFs R0.13+ */ +/*------------------------------------------------------------------------*/ +/* This module will occupy a huge memory in the .const section when the / +/ FatFs is configured for LFN with DBCS. If the system has any Unicode / +/ utilitiy for the code conversion, this module should be modified to use / +/ that function to avoid silly memory consumption. / +/-------------------------------------------------------------------------*/ +/* +/ Copyright (C) 2014, ChaN, all right reserved. +/ +/ FatFs module is an open source software. Redistribution and use of FatFs in +/ source and binary forms, with or without modification, are permitted provided +/ that the following condition is met: +/ +/ 1. Redistributions of source code must retain the above copyright notice, +/ this condition and the following disclaimer. +/ +/ This software is provided by the copyright holder and contributors "AS IS" +/ and any warranties related to this software are DISCLAIMED. +/ The copyright owner or contributors be NOT LIABLE for any damages caused +/ by use of this software. +*/ + + +#include "ff.h" + +#if FF_USE_LFN /* This module will be blanked if non-LFN configuration */ + +#define MERGE2(a, b) a ## b +#define CVTBL(tbl, cp) MERGE2(tbl, cp) + + +/*------------------------------------------------------------------------*/ +/* Code Conversion Tables */ +/*------------------------------------------------------------------------*/ + +#if FF_CODE_PAGE == 932 || FF_CODE_PAGE == 0 /* Japanese */ +static const WCHAR uni2oem932[] = { /* Unicode --> Shift_JIS pairs */ + 0x00A7, 0x8198, 0x00A8, 0x814E, 0x00B0, 0x818B, 0x00B1, 0x817D, 0x00B4, 0x814C, 0x00B6, 0x81F7, 0x00D7, 0x817E, 0x00F7, 0x8180, + 0x0391, 0x839F, 0x0392, 0x83A0, 0x0393, 0x83A1, 0x0394, 0x83A2, 0x0395, 0x83A3, 0x0396, 0x83A4, 0x0397, 0x83A5, 0x0398, 0x83A6, + 0x0399, 0x83A7, 0x039A, 0x83A8, 0x039B, 0x83A9, 0x039C, 0x83AA, 0x039D, 0x83AB, 0x039E, 0x83AC, 0x039F, 0x83AD, 0x03A0, 0x83AE, + 0x03A1, 0x83AF, 0x03A3, 0x83B0, 0x03A4, 0x83B1, 0x03A5, 0x83B2, 0x03A6, 0x83B3, 0x03A7, 0x83B4, 0x03A8, 0x83B5, 0x03A9, 0x83B6, + 0x03B1, 0x83BF, 0x03B2, 0x83C0, 0x03B3, 0x83C1, 0x03B4, 0x83C2, 0x03B5, 0x83C3, 0x03B6, 0x83C4, 0x03B7, 0x83C5, 0x03B8, 0x83C6, + 0x03B9, 0x83C7, 0x03BA, 0x83C8, 0x03BB, 0x83C9, 0x03BC, 0x83CA, 0x03BD, 0x83CB, 0x03BE, 0x83CC, 0x03BF, 0x83CD, 0x03C0, 0x83CE, + 0x03C1, 0x83CF, 0x03C3, 0x83D0, 0x03C4, 0x83D1, 0x03C5, 0x83D2, 0x03C6, 0x83D3, 0x03C7, 0x83D4, 0x03C8, 0x83D5, 0x03C9, 0x83D6, + 0x0401, 0x8446, 0x0410, 0x8440, 0x0411, 0x8441, 0x0412, 0x8442, 0x0413, 0x8443, 0x0414, 0x8444, 0x0415, 0x8445, 0x0416, 0x8447, + 0x0417, 0x8448, 0x0418, 0x8449, 0x0419, 0x844A, 0x041A, 0x844B, 0x041B, 0x844C, 0x041C, 0x844D, 0x041D, 0x844E, 0x041E, 0x844F, + 0x041F, 0x8450, 0x0420, 0x8451, 0x0421, 0x8452, 0x0422, 0x8453, 0x0423, 0x8454, 0x0424, 0x8455, 0x0425, 0x8456, 0x0426, 0x8457, + 0x0427, 0x8458, 0x0428, 0x8459, 0x0429, 0x845A, 0x042A, 0x845B, 0x042B, 0x845C, 0x042C, 0x845D, 0x042D, 0x845E, 0x042E, 0x845F, + 0x042F, 0x8460, 0x0430, 0x8470, 0x0431, 0x8471, 0x0432, 0x8472, 0x0433, 0x8473, 0x0434, 0x8474, 0x0435, 0x8475, 0x0436, 0x8477, + 0x0437, 0x8478, 0x0438, 0x8479, 0x0439, 0x847A, 0x043A, 0x847B, 0x043B, 0x847C, 0x043C, 0x847D, 0x043D, 0x847E, 0x043E, 0x8480, + 0x043F, 0x8481, 0x0440, 0x8482, 0x0441, 0x8483, 0x0442, 0x8484, 0x0443, 0x8485, 0x0444, 0x8486, 0x0445, 0x8487, 0x0446, 0x8488, + 0x0447, 0x8489, 0x0448, 0x848A, 0x0449, 0x848B, 0x044A, 0x848C, 0x044B, 0x848D, 0x044C, 0x848E, 0x044D, 0x848F, 0x044E, 0x8490, + 0x044F, 0x8491, 0x0451, 0x8476, 0x2010, 0x815D, 0x2015, 0x815C, 0x2018, 0x8165, 0x2019, 0x8166, 0x201C, 0x8167, 0x201D, 0x8168, + 0x2020, 0x81F5, 0x2021, 0x81F6, 0x2025, 0x8164, 0x2026, 0x8163, 0x2030, 0x81F1, 0x2032, 0x818C, 0x2033, 0x818D, 0x203B, 0x81A6, + 0x2103, 0x818E, 0x2116, 0x8782, 0x2121, 0x8784, 0x212B, 0x81F0, 0x2160, 0x8754, 0x2161, 0x8755, 0x2162, 0x8756, 0x2163, 0x8757, + 0x2164, 0x8758, 0x2165, 0x8759, 0x2166, 0x875A, 0x2167, 0x875B, 0x2168, 0x875C, 0x2169, 0x875D, 0x2170, 0xFA40, 0x2171, 0xFA41, + 0x2172, 0xFA42, 0x2173, 0xFA43, 0x2174, 0xFA44, 0x2175, 0xFA45, 0x2176, 0xFA46, 0x2177, 0xFA47, 0x2178, 0xFA48, 0x2179, 0xFA49, + 0x2190, 0x81A9, 0x2191, 0x81AA, 0x2192, 0x81A8, 0x2193, 0x81AB, 0x21D2, 0x81CB, 0x21D4, 0x81CC, 0x2200, 0x81CD, 0x2202, 0x81DD, + 0x2203, 0x81CE, 0x2207, 0x81DE, 0x2208, 0x81B8, 0x220B, 0x81B9, 0x2211, 0x8794, 0x221A, 0x81E3, 0x221D, 0x81E5, 0x221E, 0x8187, + 0x221F, 0x8798, 0x2220, 0x81DA, 0x2225, 0x8161, 0x2227, 0x81C8, 0x2228, 0x81C9, 0x2229, 0x81BF, 0x222A, 0x81BE, 0x222B, 0x81E7, + 0x222C, 0x81E8, 0x222E, 0x8793, 0x2234, 0x8188, 0x2235, 0x81E6, 0x223D, 0x81E4, 0x2252, 0x81E0, 0x2260, 0x8182, 0x2261, 0x81DF, + 0x2266, 0x8185, 0x2267, 0x8186, 0x226A, 0x81E1, 0x226B, 0x81E2, 0x2282, 0x81BC, 0x2283, 0x81BD, 0x2286, 0x81BA, 0x2287, 0x81BB, + 0x22A5, 0x81DB, 0x22BF, 0x8799, 0x2312, 0x81DC, 0x2460, 0x8740, 0x2461, 0x8741, 0x2462, 0x8742, 0x2463, 0x8743, 0x2464, 0x8744, + 0x2465, 0x8745, 0x2466, 0x8746, 0x2467, 0x8747, 0x2468, 0x8748, 0x2469, 0x8749, 0x246A, 0x874A, 0x246B, 0x874B, 0x246C, 0x874C, + 0x246D, 0x874D, 0x246E, 0x874E, 0x246F, 0x874F, 0x2470, 0x8750, 0x2471, 0x8751, 0x2472, 0x8752, 0x2473, 0x8753, 0x2500, 0x849F, + 0x2501, 0x84AA, 0x2502, 0x84A0, 0x2503, 0x84AB, 0x250C, 0x84A1, 0x250F, 0x84AC, 0x2510, 0x84A2, 0x2513, 0x84AD, 0x2514, 0x84A4, + 0x2517, 0x84AF, 0x2518, 0x84A3, 0x251B, 0x84AE, 0x251C, 0x84A5, 0x251D, 0x84BA, 0x2520, 0x84B5, 0x2523, 0x84B0, 0x2524, 0x84A7, + 0x2525, 0x84BC, 0x2528, 0x84B7, 0x252B, 0x84B2, 0x252C, 0x84A6, 0x252F, 0x84B6, 0x2530, 0x84BB, 0x2533, 0x84B1, 0x2534, 0x84A8, + 0x2537, 0x84B8, 0x2538, 0x84BD, 0x253B, 0x84B3, 0x253C, 0x84A9, 0x253F, 0x84B9, 0x2542, 0x84BE, 0x254B, 0x84B4, 0x25A0, 0x81A1, + 0x25A1, 0x81A0, 0x25B2, 0x81A3, 0x25B3, 0x81A2, 0x25BC, 0x81A5, 0x25BD, 0x81A4, 0x25C6, 0x819F, 0x25C7, 0x819E, 0x25CB, 0x819B, + 0x25CE, 0x819D, 0x25CF, 0x819C, 0x25EF, 0x81FC, 0x2605, 0x819A, 0x2606, 0x8199, 0x2640, 0x818A, 0x2642, 0x8189, 0x266A, 0x81F4, + 0x266D, 0x81F3, 0x266F, 0x81F2, 0x3000, 0x8140, 0x3001, 0x8141, 0x3002, 0x8142, 0x3003, 0x8156, 0x3005, 0x8158, 0x3006, 0x8159, + 0x3007, 0x815A, 0x3008, 0x8171, 0x3009, 0x8172, 0x300A, 0x8173, 0x300B, 0x8174, 0x300C, 0x8175, 0x300D, 0x8176, 0x300E, 0x8177, + 0x300F, 0x8178, 0x3010, 0x8179, 0x3011, 0x817A, 0x3012, 0x81A7, 0x3013, 0x81AC, 0x3014, 0x816B, 0x3015, 0x816C, 0x301D, 0x8780, + 0x301F, 0x8781, 0x3041, 0x829F, 0x3042, 0x82A0, 0x3043, 0x82A1, 0x3044, 0x82A2, 0x3045, 0x82A3, 0x3046, 0x82A4, 0x3047, 0x82A5, + 0x3048, 0x82A6, 0x3049, 0x82A7, 0x304A, 0x82A8, 0x304B, 0x82A9, 0x304C, 0x82AA, 0x304D, 0x82AB, 0x304E, 0x82AC, 0x304F, 0x82AD, + 0x3050, 0x82AE, 0x3051, 0x82AF, 0x3052, 0x82B0, 0x3053, 0x82B1, 0x3054, 0x82B2, 0x3055, 0x82B3, 0x3056, 0x82B4, 0x3057, 0x82B5, + 0x3058, 0x82B6, 0x3059, 0x82B7, 0x305A, 0x82B8, 0x305B, 0x82B9, 0x305C, 0x82BA, 0x305D, 0x82BB, 0x305E, 0x82BC, 0x305F, 0x82BD, + 0x3060, 0x82BE, 0x3061, 0x82BF, 0x3062, 0x82C0, 0x3063, 0x82C1, 0x3064, 0x82C2, 0x3065, 0x82C3, 0x3066, 0x82C4, 0x3067, 0x82C5, + 0x3068, 0x82C6, 0x3069, 0x82C7, 0x306A, 0x82C8, 0x306B, 0x82C9, 0x306C, 0x82CA, 0x306D, 0x82CB, 0x306E, 0x82CC, 0x306F, 0x82CD, + 0x3070, 0x82CE, 0x3071, 0x82CF, 0x3072, 0x82D0, 0x3073, 0x82D1, 0x3074, 0x82D2, 0x3075, 0x82D3, 0x3076, 0x82D4, 0x3077, 0x82D5, + 0x3078, 0x82D6, 0x3079, 0x82D7, 0x307A, 0x82D8, 0x307B, 0x82D9, 0x307C, 0x82DA, 0x307D, 0x82DB, 0x307E, 0x82DC, 0x307F, 0x82DD, + 0x3080, 0x82DE, 0x3081, 0x82DF, 0x3082, 0x82E0, 0x3083, 0x82E1, 0x3084, 0x82E2, 0x3085, 0x82E3, 0x3086, 0x82E4, 0x3087, 0x82E5, + 0x3088, 0x82E6, 0x3089, 0x82E7, 0x308A, 0x82E8, 0x308B, 0x82E9, 0x308C, 0x82EA, 0x308D, 0x82EB, 0x308E, 0x82EC, 0x308F, 0x82ED, + 0x3090, 0x82EE, 0x3091, 0x82EF, 0x3092, 0x82F0, 0x3093, 0x82F1, 0x309B, 0x814A, 0x309C, 0x814B, 0x309D, 0x8154, 0x309E, 0x8155, + 0x30A1, 0x8340, 0x30A2, 0x8341, 0x30A3, 0x8342, 0x30A4, 0x8343, 0x30A5, 0x8344, 0x30A6, 0x8345, 0x30A7, 0x8346, 0x30A8, 0x8347, + 0x30A9, 0x8348, 0x30AA, 0x8349, 0x30AB, 0x834A, 0x30AC, 0x834B, 0x30AD, 0x834C, 0x30AE, 0x834D, 0x30AF, 0x834E, 0x30B0, 0x834F, + 0x30B1, 0x8350, 0x30B2, 0x8351, 0x30B3, 0x8352, 0x30B4, 0x8353, 0x30B5, 0x8354, 0x30B6, 0x8355, 0x30B7, 0x8356, 0x30B8, 0x8357, + 0x30B9, 0x8358, 0x30BA, 0x8359, 0x30BB, 0x835A, 0x30BC, 0x835B, 0x30BD, 0x835C, 0x30BE, 0x835D, 0x30BF, 0x835E, 0x30C0, 0x835F, + 0x30C1, 0x8360, 0x30C2, 0x8361, 0x30C3, 0x8362, 0x30C4, 0x8363, 0x30C5, 0x8364, 0x30C6, 0x8365, 0x30C7, 0x8366, 0x30C8, 0x8367, + 0x30C9, 0x8368, 0x30CA, 0x8369, 0x30CB, 0x836A, 0x30CC, 0x836B, 0x30CD, 0x836C, 0x30CE, 0x836D, 0x30CF, 0x836E, 0x30D0, 0x836F, + 0x30D1, 0x8370, 0x30D2, 0x8371, 0x30D3, 0x8372, 0x30D4, 0x8373, 0x30D5, 0x8374, 0x30D6, 0x8375, 0x30D7, 0x8376, 0x30D8, 0x8377, + 0x30D9, 0x8378, 0x30DA, 0x8379, 0x30DB, 0x837A, 0x30DC, 0x837B, 0x30DD, 0x837C, 0x30DE, 0x837D, 0x30DF, 0x837E, 0x30E0, 0x8380, + 0x30E1, 0x8381, 0x30E2, 0x8382, 0x30E3, 0x8383, 0x30E4, 0x8384, 0x30E5, 0x8385, 0x30E6, 0x8386, 0x30E7, 0x8387, 0x30E8, 0x8388, + 0x30E9, 0x8389, 0x30EA, 0x838A, 0x30EB, 0x838B, 0x30EC, 0x838C, 0x30ED, 0x838D, 0x30EE, 0x838E, 0x30EF, 0x838F, 0x30F0, 0x8390, + 0x30F1, 0x8391, 0x30F2, 0x8392, 0x30F3, 0x8393, 0x30F4, 0x8394, 0x30F5, 0x8395, 0x30F6, 0x8396, 0x30FB, 0x8145, 0x30FC, 0x815B, + 0x30FD, 0x8152, 0x30FE, 0x8153, 0x3231, 0x878A, 0x3232, 0x878B, 0x3239, 0x878C, 0x32A4, 0x8785, 0x32A5, 0x8786, 0x32A6, 0x8787, + 0x32A7, 0x8788, 0x32A8, 0x8789, 0x3303, 0x8765, 0x330D, 0x8769, 0x3314, 0x8760, 0x3318, 0x8763, 0x3322, 0x8761, 0x3323, 0x876B, + 0x3326, 0x876A, 0x3327, 0x8764, 0x332B, 0x876C, 0x3336, 0x8766, 0x333B, 0x876E, 0x3349, 0x875F, 0x334A, 0x876D, 0x334D, 0x8762, + 0x3351, 0x8767, 0x3357, 0x8768, 0x337B, 0x877E, 0x337C, 0x878F, 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0x9AC0, 0xE98F, 0x9AC4, 0x9091, 0x9ACF, 0xE990, 0x9AD1, 0xE991, 0x9AD3, 0xE992, 0x9AD4, 0xE993, 0x9AD8, 0x8D82, 0x9AD9, 0xFBFC, + 0x9ADC, 0xFC40, 0x9ADE, 0xE994, 0x9ADF, 0xE995, 0x9AE2, 0xE996, 0x9AE3, 0xE997, 0x9AE6, 0xE998, 0x9AEA, 0x94AF, 0x9AEB, 0xE99A, + 0x9AED, 0x9545, 0x9AEE, 0xE99B, 0x9AEF, 0xE999, 0x9AF1, 0xE99D, 0x9AF4, 0xE99C, 0x9AF7, 0xE99E, 0x9AFB, 0xE99F, 0x9B06, 0xE9A0, + 0x9B18, 0xE9A1, 0x9B1A, 0xE9A2, 0x9B1F, 0xE9A3, 0x9B22, 0xE9A4, 0x9B23, 0xE9A5, 0x9B25, 0xE9A6, 0x9B27, 0xE9A7, 0x9B28, 0xE9A8, + 0x9B29, 0xE9A9, 0x9B2A, 0xE9AA, 0x9B2E, 0xE9AB, 0x9B2F, 0xE9AC, 0x9B31, 0x9F54, 0x9B32, 0xE9AD, 0x9B3B, 0xE2F6, 0x9B3C, 0x8B53, + 0x9B41, 0x8A40, 0x9B42, 0x8DB0, 0x9B43, 0xE9AF, 0x9B44, 0xE9AE, 0x9B45, 0x96A3, 0x9B4D, 0xE9B1, 0x9B4E, 0xE9B2, 0x9B4F, 0xE9B0, + 0x9B51, 0xE9B3, 0x9B54, 0x9682, 0x9B58, 0xE9B4, 0x9B5A, 0x8B9B, 0x9B6F, 0x9844, 0x9B72, 0xFC42, 0x9B74, 0xE9B5, 0x9B75, 0xFC41, + 0x9B83, 0xE9B7, 0x9B8E, 0x88BC, 0x9B8F, 0xFC43, 0x9B91, 0xE9B8, 0x9B92, 0x95A9, 0x9B93, 0xE9B6, 0x9B96, 0xE9B9, 0x9B97, 0xE9BA, + 0x9B9F, 0xE9BB, 0x9BA0, 0xE9BC, 0x9BA8, 0xE9BD, 0x9BAA, 0x968E, 0x9BAB, 0x8E4C, 0x9BAD, 0x8DF8, 0x9BAE, 0x914E, 0x9BB1, 0xFC44, + 0x9BB4, 0xE9BE, 0x9BB9, 0xE9C1, 0x9BBB, 0xFC45, 0x9BC0, 0xE9BF, 0x9BC6, 0xE9C2, 0x9BC9, 0x8CEF, 0x9BCA, 0xE9C0, 0x9BCF, 0xE9C3, + 0x9BD1, 0xE9C4, 0x9BD2, 0xE9C5, 0x9BD4, 0xE9C9, 0x9BD6, 0x8E49, 0x9BDB, 0x91E2, 0x9BE1, 0xE9CA, 0x9BE2, 0xE9C7, 0x9BE3, 0xE9C6, + 0x9BE4, 0xE9C8, 0x9BE8, 0x8C7E, 0x9BF0, 0xE9CE, 0x9BF1, 0xE9CD, 0x9BF2, 0xE9CC, 0x9BF5, 0x88B1, 0x9C00, 0xFC46, 0x9C04, 0xE9D8, + 0x9C06, 0xE9D4, 0x9C08, 0xE9D5, 0x9C09, 0xE9D1, 0x9C0A, 0xE9D7, 0x9C0C, 0xE9D3, 0x9C0D, 0x8A82, 0x9C10, 0x986B, 0x9C12, 0xE9D6, + 0x9C13, 0xE9D2, 0x9C14, 0xE9D0, 0x9C15, 0xE9CF, 0x9C1B, 0xE9DA, 0x9C21, 0xE9DD, 0x9C24, 0xE9DC, 0x9C25, 0xE9DB, 0x9C2D, 0x9568, + 0x9C2E, 0xE9D9, 0x9C2F, 0x88F1, 0x9C30, 0xE9DE, 0x9C32, 0xE9E0, 0x9C39, 0x8A8F, 0x9C3A, 0xE9CB, 0x9C3B, 0x8956, 0x9C3E, 0xE9E2, + 0x9C46, 0xE9E1, 0x9C47, 0xE9DF, 0x9C48, 0x924C, 0x9C52, 0x9690, 0x9C57, 0x97D8, 0x9C5A, 0xE9E3, 0x9C60, 0xE9E4, 0x9C67, 0xE9E5, + 0x9C76, 0xE9E6, 0x9C78, 0xE9E7, 0x9CE5, 0x92B9, 0x9CE7, 0xE9E8, 0x9CE9, 0x94B5, 0x9CEB, 0xE9ED, 0x9CEC, 0xE9E9, 0x9CF0, 0xE9EA, + 0x9CF3, 0x9650, 0x9CF4, 0x96C2, 0x9CF6, 0x93CE, 0x9D03, 0xE9EE, 0x9D06, 0xE9EF, 0x9D07, 0x93BC, 0x9D08, 0xE9EC, 0x9D09, 0xE9EB, + 0x9D0E, 0x89A8, 0x9D12, 0xE9F7, 0x9D15, 0xE9F6, 0x9D1B, 0x8995, 0x9D1F, 0xE9F4, 0x9D23, 0xE9F3, 0x9D26, 0xE9F1, 0x9D28, 0x8A9B, + 0x9D2A, 0xE9F0, 0x9D2B, 0x8EB0, 0x9D2C, 0x89A7, 0x9D3B, 0x8D83, 0x9D3E, 0xE9FA, 0x9D3F, 0xE9F9, 0x9D41, 0xE9F8, 0x9D44, 0xE9F5, + 0x9D46, 0xE9FB, 0x9D48, 0xE9FC, 0x9D50, 0xEA44, 0x9D51, 0xEA43, 0x9D59, 0xEA45, 0x9D5C, 0x894C, 0x9D5D, 0xEA40, 0x9D5E, 0xEA41, + 0x9D60, 0x8D94, 0x9D61, 0x96B7, 0x9D64, 0xEA42, 0x9D6B, 0xFC48, 0x9D6C, 0x9651, 0x9D6F, 0xEA4A, 0x9D70, 0xFC47, 0x9D72, 0xEA46, + 0x9D7A, 0xEA4B, 0x9D87, 0xEA48, 0x9D89, 0xEA47, 0x9D8F, 0x8C7B, 0x9D9A, 0xEA4C, 0x9DA4, 0xEA4D, 0x9DA9, 0xEA4E, 0x9DAB, 0xEA49, + 0x9DAF, 0xE9F2, 0x9DB2, 0xEA4F, 0x9DB4, 0x92DF, 0x9DB8, 0xEA53, 0x9DBA, 0xEA54, 0x9DBB, 0xEA52, 0x9DC1, 0xEA51, 0x9DC2, 0xEA57, + 0x9DC4, 0xEA50, 0x9DC6, 0xEA55, 0x9DCF, 0xEA56, 0x9DD3, 0xEA59, 0x9DD9, 0xEA58, 0x9DE6, 0xEA5B, 0x9DED, 0xEA5C, 0x9DEF, 0xEA5D, + 0x9DF2, 0x9868, 0x9DF8, 0xEA5A, 0x9DF9, 0x91E9, 0x9DFA, 0x8DEB, 0x9DFD, 0xEA5E, 0x9E19, 0xFC4A, 0x9E1A, 0xEA5F, 0x9E1B, 0xEA60, + 0x9E1E, 0xEA61, 0x9E75, 0xEA62, 0x9E78, 0x8CB2, 0x9E79, 0xEA63, 0x9E7D, 0xEA64, 0x9E7F, 0x8EAD, 0x9E81, 0xEA65, 0x9E88, 0xEA66, + 0x9E8B, 0xEA67, 0x9E8C, 0xEA68, 0x9E91, 0xEA6B, 0x9E92, 0xEA69, 0x9E93, 0x985B, 0x9E95, 0xEA6A, 0x9E97, 0x97ED, 0x9E9D, 0xEA6C, + 0x9E9F, 0x97D9, 0x9EA5, 0xEA6D, 0x9EA6, 0x949E, 0x9EA9, 0xEA6E, 0x9EAA, 0xEA70, 0x9EAD, 0xEA71, 0x9EB8, 0xEA6F, 0x9EB9, 0x8D8D, + 0x9EBA, 0x96CB, 0x9EBB, 0x9683, 0x9EBC, 0x9BF5, 0x9EBE, 0x9F80, 0x9EBF, 0x969B, 0x9EC4, 0x89A9, 0x9ECC, 0xEA73, 0x9ECD, 0x8B6F, + 0x9ECE, 0xEA74, 0x9ECF, 0xEA75, 0x9ED0, 0xEA76, 0x9ED1, 0xFC4B, 0x9ED2, 0x8D95, 0x9ED4, 0xEA77, 0x9ED8, 0xE0D2, 0x9ED9, 0x96D9, + 0x9EDB, 0x91E1, 0x9EDC, 0xEA78, 0x9EDD, 0xEA7A, 0x9EDE, 0xEA79, 0x9EE0, 0xEA7B, 0x9EE5, 0xEA7C, 0x9EE8, 0xEA7D, 0x9EEF, 0xEA7E, + 0x9EF4, 0xEA80, 0x9EF6, 0xEA81, 0x9EF7, 0xEA82, 0x9EF9, 0xEA83, 0x9EFB, 0xEA84, 0x9EFC, 0xEA85, 0x9EFD, 0xEA86, 0x9F07, 0xEA87, + 0x9F08, 0xEA88, 0x9F0E, 0x9343, 0x9F13, 0x8CDB, 0x9F15, 0xEA8A, 0x9F20, 0x916C, 0x9F21, 0xEA8B, 0x9F2C, 0xEA8C, 0x9F3B, 0x9540, + 0x9F3E, 0xEA8D, 0x9F4A, 0xEA8E, 0x9F4B, 0xE256, 0x9F4E, 0xE6D8, 0x9F4F, 0xE8EB, 0x9F52, 0xEA8F, 0x9F54, 0xEA90, 0x9F5F, 0xEA92, + 0x9F60, 0xEA93, 0x9F61, 0xEA94, 0x9F62, 0x97EE, 0x9F63, 0xEA91, 0x9F66, 0xEA95, 0x9F67, 0xEA96, 0x9F6A, 0xEA98, 0x9F6C, 0xEA97, + 0x9F72, 0xEA9A, 0x9F76, 0xEA9B, 0x9F77, 0xEA99, 0x9F8D, 0x97B4, 0x9F95, 0xEA9C, 0x9F9C, 0xEA9D, 0x9F9D, 0xE273, 0x9FA0, 0xEA9E, + 0xF929, 0xFAE0, 0xF9DC, 0xFBE9, 0xFA0E, 0xFA90, 0xFA0F, 0xFA9B, 0xFA10, 0xFA9C, 0xFA11, 0xFAB1, 0xFA12, 0xFAD8, 0xFA13, 0xFAE8, + 0xFA14, 0xFAEA, 0xFA15, 0xFB58, 0xFA16, 0xFB5E, 0xFA17, 0xFB75, 0xFA18, 0xFB7D, 0xFA19, 0xFB7E, 0xFA1A, 0xFB80, 0xFA1B, 0xFB82, + 0xFA1C, 0xFB86, 0xFA1D, 0xFB89, 0xFA1E, 0xFB92, 0xFA1F, 0xFB9D, 0xFA20, 0xFB9F, 0xFA21, 0xFBA0, 0xFA22, 0xFBA9, 0xFA23, 0xFBB1, + 0xFA24, 0xFBB3, 0xFA25, 0xFBB4, 0xFA26, 0xFBB7, 0xFA27, 0xFBD3, 0xFA28, 0xFBDA, 0xFA29, 0xFBEA, 0xFA2A, 0xFBF6, 0xFA2B, 0xFBF7, + 0xFA2C, 0xFBF9, 0xFA2D, 0xFC49, 0xFF01, 0x8149, 0xFF02, 0xFA57, 0xFF03, 0x8194, 0xFF04, 0x8190, 0xFF05, 0x8193, 0xFF06, 0x8195, + 0xFF07, 0xFA56, 0xFF08, 0x8169, 0xFF09, 0x816A, 0xFF0A, 0x8196, 0xFF0B, 0x817B, 0xFF0C, 0x8143, 0xFF0D, 0x817C, 0xFF0E, 0x8144, + 0xFF0F, 0x815E, 0xFF10, 0x824F, 0xFF11, 0x8250, 0xFF12, 0x8251, 0xFF13, 0x8252, 0xFF14, 0x8253, 0xFF15, 0x8254, 0xFF16, 0x8255, + 0xFF17, 0x8256, 0xFF18, 0x8257, 0xFF19, 0x8258, 0xFF1A, 0x8146, 0xFF1B, 0x8147, 0xFF1C, 0x8183, 0xFF1D, 0x8181, 0xFF1E, 0x8184, + 0xFF1F, 0x8148, 0xFF20, 0x8197, 0xFF21, 0x8260, 0xFF22, 0x8261, 0xFF23, 0x8262, 0xFF24, 0x8263, 0xFF25, 0x8264, 0xFF26, 0x8265, + 0xFF27, 0x8266, 0xFF28, 0x8267, 0xFF29, 0x8268, 0xFF2A, 0x8269, 0xFF2B, 0x826A, 0xFF2C, 0x826B, 0xFF2D, 0x826C, 0xFF2E, 0x826D, + 0xFF2F, 0x826E, 0xFF30, 0x826F, 0xFF31, 0x8270, 0xFF32, 0x8271, 0xFF33, 0x8272, 0xFF34, 0x8273, 0xFF35, 0x8274, 0xFF36, 0x8275, + 0xFF37, 0x8276, 0xFF38, 0x8277, 0xFF39, 0x8278, 0xFF3A, 0x8279, 0xFF3B, 0x816D, 0xFF3C, 0x815F, 0xFF3D, 0x816E, 0xFF3E, 0x814F, + 0xFF3F, 0x8151, 0xFF40, 0x814D, 0xFF41, 0x8281, 0xFF42, 0x8282, 0xFF43, 0x8283, 0xFF44, 0x8284, 0xFF45, 0x8285, 0xFF46, 0x8286, + 0xFF47, 0x8287, 0xFF48, 0x8288, 0xFF49, 0x8289, 0xFF4A, 0x828A, 0xFF4B, 0x828B, 0xFF4C, 0x828C, 0xFF4D, 0x828D, 0xFF4E, 0x828E, + 0xFF4F, 0x828F, 0xFF50, 0x8290, 0xFF51, 0x8291, 0xFF52, 0x8292, 0xFF53, 0x8293, 0xFF54, 0x8294, 0xFF55, 0x8295, 0xFF56, 0x8296, + 0xFF57, 0x8297, 0xFF58, 0x8298, 0xFF59, 0x8299, 0xFF5A, 0x829A, 0xFF5B, 0x816F, 0xFF5C, 0x8162, 0xFF5D, 0x8170, 0xFF5E, 0x8160, + 0xFF61, 0x00A1, 0xFF62, 0x00A2, 0xFF63, 0x00A3, 0xFF64, 0x00A4, 0xFF65, 0x00A5, 0xFF66, 0x00A6, 0xFF67, 0x00A7, 0xFF68, 0x00A8, + 0xFF69, 0x00A9, 0xFF6A, 0x00AA, 0xFF6B, 0x00AB, 0xFF6C, 0x00AC, 0xFF6D, 0x00AD, 0xFF6E, 0x00AE, 0xFF6F, 0x00AF, 0xFF70, 0x00B0, + 0xFF71, 0x00B1, 0xFF72, 0x00B2, 0xFF73, 0x00B3, 0xFF74, 0x00B4, 0xFF75, 0x00B5, 0xFF76, 0x00B6, 0xFF77, 0x00B7, 0xFF78, 0x00B8, + 0xFF79, 0x00B9, 0xFF7A, 0x00BA, 0xFF7B, 0x00BB, 0xFF7C, 0x00BC, 0xFF7D, 0x00BD, 0xFF7E, 0x00BE, 0xFF7F, 0x00BF, 0xFF80, 0x00C0, + 0xFF81, 0x00C1, 0xFF82, 0x00C2, 0xFF83, 0x00C3, 0xFF84, 0x00C4, 0xFF85, 0x00C5, 0xFF86, 0x00C6, 0xFF87, 0x00C7, 0xFF88, 0x00C8, + 0xFF89, 0x00C9, 0xFF8A, 0x00CA, 0xFF8B, 0x00CB, 0xFF8C, 0x00CC, 0xFF8D, 0x00CD, 0xFF8E, 0x00CE, 0xFF8F, 0x00CF, 0xFF90, 0x00D0, + 0xFF91, 0x00D1, 0xFF92, 0x00D2, 0xFF93, 0x00D3, 0xFF94, 0x00D4, 0xFF95, 0x00D5, 0xFF96, 0x00D6, 0xFF97, 0x00D7, 0xFF98, 0x00D8, + 0xFF99, 0x00D9, 0xFF9A, 0x00DA, 0xFF9B, 0x00DB, 0xFF9C, 0x00DC, 0xFF9D, 0x00DD, 0xFF9E, 0x00DE, 0xFF9F, 0x00DF, 0xFFE0, 0x8191, + 0xFFE1, 0x8192, 0xFFE2, 0x81CA, 0xFFE3, 0x8150, 0xFFE4, 0xFA55, 0xFFE5, 0x818F, 0, 0 +}; + +static const WCHAR oem2uni932[] = { /* Shift_JIS --> Unicode pairs */ + 0x00A1, 0xFF61, 0x00A2, 0xFF62, 0x00A3, 0xFF63, 0x00A4, 0xFF64, 0x00A5, 0xFF65, 0x00A6, 0xFF66, 0x00A7, 0xFF67, 0x00A8, 0xFF68, + 0x00A9, 0xFF69, 0x00AA, 0xFF6A, 0x00AB, 0xFF6B, 0x00AC, 0xFF6C, 0x00AD, 0xFF6D, 0x00AE, 0xFF6E, 0x00AF, 0xFF6F, 0x00B0, 0xFF70, + 0x00B1, 0xFF71, 0x00B2, 0xFF72, 0x00B3, 0xFF73, 0x00B4, 0xFF74, 0x00B5, 0xFF75, 0x00B6, 0xFF76, 0x00B7, 0xFF77, 0x00B8, 0xFF78, + 0x00B9, 0xFF79, 0x00BA, 0xFF7A, 0x00BB, 0xFF7B, 0x00BC, 0xFF7C, 0x00BD, 0xFF7D, 0x00BE, 0xFF7E, 0x00BF, 0xFF7F, 0x00C0, 0xFF80, + 0x00C1, 0xFF81, 0x00C2, 0xFF82, 0x00C3, 0xFF83, 0x00C4, 0xFF84, 0x00C5, 0xFF85, 0x00C6, 0xFF86, 0x00C7, 0xFF87, 0x00C8, 0xFF88, + 0x00C9, 0xFF89, 0x00CA, 0xFF8A, 0x00CB, 0xFF8B, 0x00CC, 0xFF8C, 0x00CD, 0xFF8D, 0x00CE, 0xFF8E, 0x00CF, 0xFF8F, 0x00D0, 0xFF90, + 0x00D1, 0xFF91, 0x00D2, 0xFF92, 0x00D3, 0xFF93, 0x00D4, 0xFF94, 0x00D5, 0xFF95, 0x00D6, 0xFF96, 0x00D7, 0xFF97, 0x00D8, 0xFF98, + 0x00D9, 0xFF99, 0x00DA, 0xFF9A, 0x00DB, 0xFF9B, 0x00DC, 0xFF9C, 0x00DD, 0xFF9D, 0x00DE, 0xFF9E, 0x00DF, 0xFF9F, 0x8140, 0x3000, + 0x8141, 0x3001, 0x8142, 0x3002, 0x8143, 0xFF0C, 0x8144, 0xFF0E, 0x8145, 0x30FB, 0x8146, 0xFF1A, 0x8147, 0xFF1B, 0x8148, 0xFF1F, + 0x8149, 0xFF01, 0x814A, 0x309B, 0x814B, 0x309C, 0x814C, 0x00B4, 0x814D, 0xFF40, 0x814E, 0x00A8, 0x814F, 0xFF3E, 0x8150, 0xFFE3, + 0x8151, 0xFF3F, 0x8152, 0x30FD, 0x8153, 0x30FE, 0x8154, 0x309D, 0x8155, 0x309E, 0x8156, 0x3003, 0x8157, 0x4EDD, 0x8158, 0x3005, + 0x8159, 0x3006, 0x815A, 0x3007, 0x815B, 0x30FC, 0x815C, 0x2015, 0x815D, 0x2010, 0x815E, 0xFF0F, 0x815F, 0xFF3C, 0x8160, 0xFF5E, + 0x8161, 0x2225, 0x8162, 0xFF5C, 0x8163, 0x2026, 0x8164, 0x2025, 0x8165, 0x2018, 0x8166, 0x2019, 0x8167, 0x201C, 0x8168, 0x201D, + 0x8169, 0xFF08, 0x816A, 0xFF09, 0x816B, 0x3014, 0x816C, 0x3015, 0x816D, 0xFF3B, 0x816E, 0xFF3D, 0x816F, 0xFF5B, 0x8170, 0xFF5D, + 0x8171, 0x3008, 0x8172, 0x3009, 0x8173, 0x300A, 0x8174, 0x300B, 0x8175, 0x300C, 0x8176, 0x300D, 0x8177, 0x300E, 0x8178, 0x300F, + 0x8179, 0x3010, 0x817A, 0x3011, 0x817B, 0xFF0B, 0x817C, 0xFF0D, 0x817D, 0x00B1, 0x817E, 0x00D7, 0x8180, 0x00F7, 0x8181, 0xFF1D, + 0x8182, 0x2260, 0x8183, 0xFF1C, 0x8184, 0xFF1E, 0x8185, 0x2266, 0x8186, 0x2267, 0x8187, 0x221E, 0x8188, 0x2234, 0x8189, 0x2642, + 0x818A, 0x2640, 0x818B, 0x00B0, 0x818C, 0x2032, 0x818D, 0x2033, 0x818E, 0x2103, 0x818F, 0xFFE5, 0x8190, 0xFF04, 0x8191, 0xFFE0, + 0x8192, 0xFFE1, 0x8193, 0xFF05, 0x8194, 0xFF03, 0x8195, 0xFF06, 0x8196, 0xFF0A, 0x8197, 0xFF20, 0x8198, 0x00A7, 0x8199, 0x2606, + 0x819A, 0x2605, 0x819B, 0x25CB, 0x819C, 0x25CF, 0x819D, 0x25CE, 0x819E, 0x25C7, 0x819F, 0x25C6, 0x81A0, 0x25A1, 0x81A1, 0x25A0, + 0x81A2, 0x25B3, 0x81A3, 0x25B2, 0x81A4, 0x25BD, 0x81A5, 0x25BC, 0x81A6, 0x203B, 0x81A7, 0x3012, 0x81A8, 0x2192, 0x81A9, 0x2190, + 0x81AA, 0x2191, 0x81AB, 0x2193, 0x81AC, 0x3013, 0x81B8, 0x2208, 0x81B9, 0x220B, 0x81BA, 0x2286, 0x81BB, 0x2287, 0x81BC, 0x2282, + 0x81BD, 0x2283, 0x81BE, 0x222A, 0x81BF, 0x2229, 0x81C8, 0x2227, 0x81C9, 0x2228, 0x81CA, 0xFFE2, 0x81CB, 0x21D2, 0x81CC, 0x21D4, + 0x81CD, 0x2200, 0x81CE, 0x2203, 0x81DA, 0x2220, 0x81DB, 0x22A5, 0x81DC, 0x2312, 0x81DD, 0x2202, 0x81DE, 0x2207, 0x81DF, 0x2261, + 0x81E0, 0x2252, 0x81E1, 0x226A, 0x81E2, 0x226B, 0x81E3, 0x221A, 0x81E4, 0x223D, 0x81E5, 0x221D, 0x81E6, 0x2235, 0x81E7, 0x222B, + 0x81E8, 0x222C, 0x81F0, 0x212B, 0x81F1, 0x2030, 0x81F2, 0x266F, 0x81F3, 0x266D, 0x81F4, 0x266A, 0x81F5, 0x2020, 0x81F6, 0x2021, + 0x81F7, 0x00B6, 0x81FC, 0x25EF, 0x824F, 0xFF10, 0x8250, 0xFF11, 0x8251, 0xFF12, 0x8252, 0xFF13, 0x8253, 0xFF14, 0x8254, 0xFF15, + 0x8255, 0xFF16, 0x8256, 0xFF17, 0x8257, 0xFF18, 0x8258, 0xFF19, 0x8260, 0xFF21, 0x8261, 0xFF22, 0x8262, 0xFF23, 0x8263, 0xFF24, + 0x8264, 0xFF25, 0x8265, 0xFF26, 0x8266, 0xFF27, 0x8267, 0xFF28, 0x8268, 0xFF29, 0x8269, 0xFF2A, 0x826A, 0xFF2B, 0x826B, 0xFF2C, + 0x826C, 0xFF2D, 0x826D, 0xFF2E, 0x826E, 0xFF2F, 0x826F, 0xFF30, 0x8270, 0xFF31, 0x8271, 0xFF32, 0x8272, 0xFF33, 0x8273, 0xFF34, + 0x8274, 0xFF35, 0x8275, 0xFF36, 0x8276, 0xFF37, 0x8277, 0xFF38, 0x8278, 0xFF39, 0x8279, 0xFF3A, 0x8281, 0xFF41, 0x8282, 0xFF42, + 0x8283, 0xFF43, 0x8284, 0xFF44, 0x8285, 0xFF45, 0x8286, 0xFF46, 0x8287, 0xFF47, 0x8288, 0xFF48, 0x8289, 0xFF49, 0x828A, 0xFF4A, + 0x828B, 0xFF4B, 0x828C, 0xFF4C, 0x828D, 0xFF4D, 0x828E, 0xFF4E, 0x828F, 0xFF4F, 0x8290, 0xFF50, 0x8291, 0xFF51, 0x8292, 0xFF52, + 0x8293, 0xFF53, 0x8294, 0xFF54, 0x8295, 0xFF55, 0x8296, 0xFF56, 0x8297, 0xFF57, 0x8298, 0xFF58, 0x8299, 0xFF59, 0x829A, 0xFF5A, + 0x829F, 0x3041, 0x82A0, 0x3042, 0x82A1, 0x3043, 0x82A2, 0x3044, 0x82A3, 0x3045, 0x82A4, 0x3046, 0x82A5, 0x3047, 0x82A6, 0x3048, + 0x82A7, 0x3049, 0x82A8, 0x304A, 0x82A9, 0x304B, 0x82AA, 0x304C, 0x82AB, 0x304D, 0x82AC, 0x304E, 0x82AD, 0x304F, 0x82AE, 0x3050, + 0x82AF, 0x3051, 0x82B0, 0x3052, 0x82B1, 0x3053, 0x82B2, 0x3054, 0x82B3, 0x3055, 0x82B4, 0x3056, 0x82B5, 0x3057, 0x82B6, 0x3058, + 0x82B7, 0x3059, 0x82B8, 0x305A, 0x82B9, 0x305B, 0x82BA, 0x305C, 0x82BB, 0x305D, 0x82BC, 0x305E, 0x82BD, 0x305F, 0x82BE, 0x3060, + 0x82BF, 0x3061, 0x82C0, 0x3062, 0x82C1, 0x3063, 0x82C2, 0x3064, 0x82C3, 0x3065, 0x82C4, 0x3066, 0x82C5, 0x3067, 0x82C6, 0x3068, + 0x82C7, 0x3069, 0x82C8, 0x306A, 0x82C9, 0x306B, 0x82CA, 0x306C, 0x82CB, 0x306D, 0x82CC, 0x306E, 0x82CD, 0x306F, 0x82CE, 0x3070, + 0x82CF, 0x3071, 0x82D0, 0x3072, 0x82D1, 0x3073, 0x82D2, 0x3074, 0x82D3, 0x3075, 0x82D4, 0x3076, 0x82D5, 0x3077, 0x82D6, 0x3078, + 0x82D7, 0x3079, 0x82D8, 0x307A, 0x82D9, 0x307B, 0x82DA, 0x307C, 0x82DB, 0x307D, 0x82DC, 0x307E, 0x82DD, 0x307F, 0x82DE, 0x3080, + 0x82DF, 0x3081, 0x82E0, 0x3082, 0x82E1, 0x3083, 0x82E2, 0x3084, 0x82E3, 0x3085, 0x82E4, 0x3086, 0x82E5, 0x3087, 0x82E6, 0x3088, + 0x82E7, 0x3089, 0x82E8, 0x308A, 0x82E9, 0x308B, 0x82EA, 0x308C, 0x82EB, 0x308D, 0x82EC, 0x308E, 0x82ED, 0x308F, 0x82EE, 0x3090, + 0x82EF, 0x3091, 0x82F0, 0x3092, 0x82F1, 0x3093, 0x8340, 0x30A1, 0x8341, 0x30A2, 0x8342, 0x30A3, 0x8343, 0x30A4, 0x8344, 0x30A5, + 0x8345, 0x30A6, 0x8346, 0x30A7, 0x8347, 0x30A8, 0x8348, 0x30A9, 0x8349, 0x30AA, 0x834A, 0x30AB, 0x834B, 0x30AC, 0x834C, 0x30AD, + 0x834D, 0x30AE, 0x834E, 0x30AF, 0x834F, 0x30B0, 0x8350, 0x30B1, 0x8351, 0x30B2, 0x8352, 0x30B3, 0x8353, 0x30B4, 0x8354, 0x30B5, + 0x8355, 0x30B6, 0x8356, 0x30B7, 0x8357, 0x30B8, 0x8358, 0x30B9, 0x8359, 0x30BA, 0x835A, 0x30BB, 0x835B, 0x30BC, 0x835C, 0x30BD, + 0x835D, 0x30BE, 0x835E, 0x30BF, 0x835F, 0x30C0, 0x8360, 0x30C1, 0x8361, 0x30C2, 0x8362, 0x30C3, 0x8363, 0x30C4, 0x8364, 0x30C5, + 0x8365, 0x30C6, 0x8366, 0x30C7, 0x8367, 0x30C8, 0x8368, 0x30C9, 0x8369, 0x30CA, 0x836A, 0x30CB, 0x836B, 0x30CC, 0x836C, 0x30CD, + 0x836D, 0x30CE, 0x836E, 0x30CF, 0x836F, 0x30D0, 0x8370, 0x30D1, 0x8371, 0x30D2, 0x8372, 0x30D3, 0x8373, 0x30D4, 0x8374, 0x30D5, + 0x8375, 0x30D6, 0x8376, 0x30D7, 0x8377, 0x30D8, 0x8378, 0x30D9, 0x8379, 0x30DA, 0x837A, 0x30DB, 0x837B, 0x30DC, 0x837C, 0x30DD, + 0x837D, 0x30DE, 0x837E, 0x30DF, 0x8380, 0x30E0, 0x8381, 0x30E1, 0x8382, 0x30E2, 0x8383, 0x30E3, 0x8384, 0x30E4, 0x8385, 0x30E5, + 0x8386, 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0x9DE6, + 0xEA5C, 0x9DED, 0xEA5D, 0x9DEF, 0xEA5E, 0x9DFD, 0xEA5F, 0x9E1A, 0xEA60, 0x9E1B, 0xEA61, 0x9E1E, 0xEA62, 0x9E75, 0xEA63, 0x9E79, + 0xEA64, 0x9E7D, 0xEA65, 0x9E81, 0xEA66, 0x9E88, 0xEA67, 0x9E8B, 0xEA68, 0x9E8C, 0xEA69, 0x9E92, 0xEA6A, 0x9E95, 0xEA6B, 0x9E91, + 0xEA6C, 0x9E9D, 0xEA6D, 0x9EA5, 0xEA6E, 0x9EA9, 0xEA6F, 0x9EB8, 0xEA70, 0x9EAA, 0xEA71, 0x9EAD, 0xEA72, 0x9761, 0xEA73, 0x9ECC, + 0xEA74, 0x9ECE, 0xEA75, 0x9ECF, 0xEA76, 0x9ED0, 0xEA77, 0x9ED4, 0xEA78, 0x9EDC, 0xEA79, 0x9EDE, 0xEA7A, 0x9EDD, 0xEA7B, 0x9EE0, + 0xEA7C, 0x9EE5, 0xEA7D, 0x9EE8, 0xEA7E, 0x9EEF, 0xEA80, 0x9EF4, 0xEA81, 0x9EF6, 0xEA82, 0x9EF7, 0xEA83, 0x9EF9, 0xEA84, 0x9EFB, + 0xEA85, 0x9EFC, 0xEA86, 0x9EFD, 0xEA87, 0x9F07, 0xEA88, 0x9F08, 0xEA89, 0x76B7, 0xEA8A, 0x9F15, 0xEA8B, 0x9F21, 0xEA8C, 0x9F2C, + 0xEA8D, 0x9F3E, 0xEA8E, 0x9F4A, 0xEA8F, 0x9F52, 0xEA90, 0x9F54, 0xEA91, 0x9F63, 0xEA92, 0x9F5F, 0xEA93, 0x9F60, 0xEA94, 0x9F61, + 0xEA95, 0x9F66, 0xEA96, 0x9F67, 0xEA97, 0x9F6C, 0xEA98, 0x9F6A, 0xEA99, 0x9F77, 0xEA9A, 0x9F72, 0xEA9B, 0x9F76, 0xEA9C, 0x9F95, + 0xEA9D, 0x9F9C, 0xEA9E, 0x9FA0, 0xEA9F, 0x582F, 0xEAA0, 0x69C7, 0xEAA1, 0x9059, 0xEAA2, 0x7464, 0xEAA3, 0x51DC, 0xEAA4, 0x7199, + 0xFA40, 0x2170, 0xFA41, 0x2171, 0xFA42, 0x2172, 0xFA43, 0x2173, 0xFA44, 0x2174, 0xFA45, 0x2175, 0xFA46, 0x2176, 0xFA47, 0x2177, + 0xFA48, 0x2178, 0xFA49, 0x2179, 0xFA55, 0xFFE4, 0xFA56, 0xFF07, 0xFA57, 0xFF02, 0xFA5C, 0x7E8A, 0xFA5D, 0x891C, 0xFA5E, 0x9348, + 0xFA5F, 0x9288, 0xFA60, 0x84DC, 0xFA61, 0x4FC9, 0xFA62, 0x70BB, 0xFA63, 0x6631, 0xFA64, 0x68C8, 0xFA65, 0x92F9, 0xFA66, 0x66FB, + 0xFA67, 0x5F45, 0xFA68, 0x4E28, 0xFA69, 0x4EE1, 0xFA6A, 0x4EFC, 0xFA6B, 0x4F00, 0xFA6C, 0x4F03, 0xFA6D, 0x4F39, 0xFA6E, 0x4F56, + 0xFA6F, 0x4F92, 0xFA70, 0x4F8A, 0xFA71, 0x4F9A, 0xFA72, 0x4F94, 0xFA73, 0x4FCD, 0xFA74, 0x5040, 0xFA75, 0x5022, 0xFA76, 0x4FFF, + 0xFA77, 0x501E, 0xFA78, 0x5046, 0xFA79, 0x5070, 0xFA7A, 0x5042, 0xFA7B, 0x5094, 0xFA7C, 0x50F4, 0xFA7D, 0x50D8, 0xFA7E, 0x514A, + 0xFA80, 0x5164, 0xFA81, 0x519D, 0xFA82, 0x51BE, 0xFA83, 0x51EC, 0xFA84, 0x5215, 0xFA85, 0x529C, 0xFA86, 0x52A6, 0xFA87, 0x52C0, + 0xFA88, 0x52DB, 0xFA89, 0x5300, 0xFA8A, 0x5307, 0xFA8B, 0x5324, 0xFA8C, 0x5372, 0xFA8D, 0x5393, 0xFA8E, 0x53B2, 0xFA8F, 0x53DD, + 0xFA90, 0xFA0E, 0xFA91, 0x549C, 0xFA92, 0x548A, 0xFA93, 0x54A9, 0xFA94, 0x54FF, 0xFA95, 0x5586, 0xFA96, 0x5759, 0xFA97, 0x5765, + 0xFA98, 0x57AC, 0xFA99, 0x57C8, 0xFA9A, 0x57C7, 0xFA9B, 0xFA0F, 0xFA9C, 0xFA10, 0xFA9D, 0x589E, 0xFA9E, 0x58B2, 0xFA9F, 0x590B, + 0xFAA0, 0x5953, 0xFAA1, 0x595B, 0xFAA2, 0x595D, 0xFAA3, 0x5963, 0xFAA4, 0x59A4, 0xFAA5, 0x59BA, 0xFAA6, 0x5B56, 0xFAA7, 0x5BC0, + 0xFAA8, 0x752F, 0xFAA9, 0x5BD8, 0xFAAA, 0x5BEC, 0xFAAB, 0x5C1E, 0xFAAC, 0x5CA6, 0xFAAD, 0x5CBA, 0xFAAE, 0x5CF5, 0xFAAF, 0x5D27, + 0xFAB0, 0x5D53, 0xFAB1, 0xFA11, 0xFAB2, 0x5D42, 0xFAB3, 0x5D6D, 0xFAB4, 0x5DB8, 0xFAB5, 0x5DB9, 0xFAB6, 0x5DD0, 0xFAB7, 0x5F21, + 0xFAB8, 0x5F34, 0xFAB9, 0x5F67, 0xFABA, 0x5FB7, 0xFABB, 0x5FDE, 0xFABC, 0x605D, 0xFABD, 0x6085, 0xFABE, 0x608A, 0xFABF, 0x60DE, + 0xFAC0, 0x60D5, 0xFAC1, 0x6120, 0xFAC2, 0x60F2, 0xFAC3, 0x6111, 0xFAC4, 0x6137, 0xFAC5, 0x6130, 0xFAC6, 0x6198, 0xFAC7, 0x6213, + 0xFAC8, 0x62A6, 0xFAC9, 0x63F5, 0xFACA, 0x6460, 0xFACB, 0x649D, 0xFACC, 0x64CE, 0xFACD, 0x654E, 0xFACE, 0x6600, 0xFACF, 0x6615, + 0xFAD0, 0x663B, 0xFAD1, 0x6609, 0xFAD2, 0x662E, 0xFAD3, 0x661E, 0xFAD4, 0x6624, 0xFAD5, 0x6665, 0xFAD6, 0x6657, 0xFAD7, 0x6659, + 0xFAD8, 0xFA12, 0xFAD9, 0x6673, 0xFADA, 0x6699, 0xFADB, 0x66A0, 0xFADC, 0x66B2, 0xFADD, 0x66BF, 0xFADE, 0x66FA, 0xFADF, 0x670E, + 0xFAE0, 0xF929, 0xFAE1, 0x6766, 0xFAE2, 0x67BB, 0xFAE3, 0x6852, 0xFAE4, 0x67C0, 0xFAE5, 0x6801, 0xFAE6, 0x6844, 0xFAE7, 0x68CF, + 0xFAE8, 0xFA13, 0xFAE9, 0x6968, 0xFAEA, 0xFA14, 0xFAEB, 0x6998, 0xFAEC, 0x69E2, 0xFAED, 0x6A30, 0xFAEE, 0x6A6B, 0xFAEF, 0x6A46, + 0xFAF0, 0x6A73, 0xFAF1, 0x6A7E, 0xFAF2, 0x6AE2, 0xFAF3, 0x6AE4, 0xFAF4, 0x6BD6, 0xFAF5, 0x6C3F, 0xFAF6, 0x6C5C, 0xFAF7, 0x6C86, + 0xFAF8, 0x6C6F, 0xFAF9, 0x6CDA, 0xFAFA, 0x6D04, 0xFAFB, 0x6D87, 0xFAFC, 0x6D6F, 0xFB40, 0x6D96, 0xFB41, 0x6DAC, 0xFB42, 0x6DCF, + 0xFB43, 0x6DF8, 0xFB44, 0x6DF2, 0xFB45, 0x6DFC, 0xFB46, 0x6E39, 0xFB47, 0x6E5C, 0xFB48, 0x6E27, 0xFB49, 0x6E3C, 0xFB4A, 0x6EBF, + 0xFB4B, 0x6F88, 0xFB4C, 0x6FB5, 0xFB4D, 0x6FF5, 0xFB4E, 0x7005, 0xFB4F, 0x7007, 0xFB50, 0x7028, 0xFB51, 0x7085, 0xFB52, 0x70AB, + 0xFB53, 0x710F, 0xFB54, 0x7104, 0xFB55, 0x715C, 0xFB56, 0x7146, 0xFB57, 0x7147, 0xFB58, 0xFA15, 0xFB59, 0x71C1, 0xFB5A, 0x71FE, + 0xFB5B, 0x72B1, 0xFB5C, 0x72BE, 0xFB5D, 0x7324, 0xFB5E, 0xFA16, 0xFB5F, 0x7377, 0xFB60, 0x73BD, 0xFB61, 0x73C9, 0xFB62, 0x73D6, + 0xFB63, 0x73E3, 0xFB64, 0x73D2, 0xFB65, 0x7407, 0xFB66, 0x73F5, 0xFB67, 0x7426, 0xFB68, 0x742A, 0xFB69, 0x7429, 0xFB6A, 0x742E, + 0xFB6B, 0x7462, 0xFB6C, 0x7489, 0xFB6D, 0x749F, 0xFB6E, 0x7501, 0xFB6F, 0x756F, 0xFB70, 0x7682, 0xFB71, 0x769C, 0xFB72, 0x769E, + 0xFB73, 0x769B, 0xFB74, 0x76A6, 0xFB75, 0xFA17, 0xFB76, 0x7746, 0xFB77, 0x52AF, 0xFB78, 0x7821, 0xFB79, 0x784E, 0xFB7A, 0x7864, + 0xFB7B, 0x787A, 0xFB7C, 0x7930, 0xFB7D, 0xFA18, 0xFB7E, 0xFA19, 0xFB80, 0xFA1A, 0xFB81, 0x7994, 0xFB82, 0xFA1B, 0xFB83, 0x799B, + 0xFB84, 0x7AD1, 0xFB85, 0x7AE7, 0xFB86, 0xFA1C, 0xFB87, 0x7AEB, 0xFB88, 0x7B9E, 0xFB89, 0xFA1D, 0xFB8A, 0x7D48, 0xFB8B, 0x7D5C, + 0xFB8C, 0x7DB7, 0xFB8D, 0x7DA0, 0xFB8E, 0x7DD6, 0xFB8F, 0x7E52, 0xFB90, 0x7F47, 0xFB91, 0x7FA1, 0xFB92, 0xFA1E, 0xFB93, 0x8301, + 0xFB94, 0x8362, 0xFB95, 0x837F, 0xFB96, 0x83C7, 0xFB97, 0x83F6, 0xFB98, 0x8448, 0xFB99, 0x84B4, 0xFB9A, 0x8553, 0xFB9B, 0x8559, + 0xFB9C, 0x856B, 0xFB9D, 0xFA1F, 0xFB9E, 0x85B0, 0xFB9F, 0xFA20, 0xFBA0, 0xFA21, 0xFBA1, 0x8807, 0xFBA2, 0x88F5, 0xFBA3, 0x8A12, + 0xFBA4, 0x8A37, 0xFBA5, 0x8A79, 0xFBA6, 0x8AA7, 0xFBA7, 0x8ABE, 0xFBA8, 0x8ADF, 0xFBA9, 0xFA22, 0xFBAA, 0x8AF6, 0xFBAB, 0x8B53, + 0xFBAC, 0x8B7F, 0xFBAD, 0x8CF0, 0xFBAE, 0x8CF4, 0xFBAF, 0x8D12, 0xFBB0, 0x8D76, 0xFBB1, 0xFA23, 0xFBB2, 0x8ECF, 0xFBB3, 0xFA24, + 0xFBB4, 0xFA25, 0xFBB5, 0x9067, 0xFBB6, 0x90DE, 0xFBB7, 0xFA26, 0xFBB8, 0x9115, 0xFBB9, 0x9127, 0xFBBA, 0x91DA, 0xFBBB, 0x91D7, + 0xFBBC, 0x91DE, 0xFBBD, 0x91ED, 0xFBBE, 0x91EE, 0xFBBF, 0x91E4, 0xFBC0, 0x91E5, 0xFBC1, 0x9206, 0xFBC2, 0x9210, 0xFBC3, 0x920A, + 0xFBC4, 0x923A, 0xFBC5, 0x9240, 0xFBC6, 0x923C, 0xFBC7, 0x924E, 0xFBC8, 0x9259, 0xFBC9, 0x9251, 0xFBCA, 0x9239, 0xFBCB, 0x9267, + 0xFBCC, 0x92A7, 0xFBCD, 0x9277, 0xFBCE, 0x9278, 0xFBCF, 0x92E7, 0xFBD0, 0x92D7, 0xFBD1, 0x92D9, 0xFBD2, 0x92D0, 0xFBD3, 0xFA27, + 0xFBD4, 0x92D5, 0xFBD5, 0x92E0, 0xFBD6, 0x92D3, 0xFBD7, 0x9325, 0xFBD8, 0x9321, 0xFBD9, 0x92FB, 0xFBDA, 0xFA28, 0xFBDB, 0x931E, + 0xFBDC, 0x92FF, 0xFBDD, 0x931D, 0xFBDE, 0x9302, 0xFBDF, 0x9370, 0xFBE0, 0x9357, 0xFBE1, 0x93A4, 0xFBE2, 0x93C6, 0xFBE3, 0x93DE, + 0xFBE4, 0x93F8, 0xFBE5, 0x9431, 0xFBE6, 0x9445, 0xFBE7, 0x9448, 0xFBE8, 0x9592, 0xFBE9, 0xF9DC, 0xFBEA, 0xFA29, 0xFBEB, 0x969D, + 0xFBEC, 0x96AF, 0xFBED, 0x9733, 0xFBEE, 0x973B, 0xFBEF, 0x9743, 0xFBF0, 0x974D, 0xFBF1, 0x974F, 0xFBF2, 0x9751, 0xFBF3, 0x9755, + 0xFBF4, 0x9857, 0xFBF5, 0x9865, 0xFBF6, 0xFA2A, 0xFBF7, 0xFA2B, 0xFBF8, 0x9927, 0xFBF9, 0xFA2C, 0xFBFA, 0x999E, 0xFBFB, 0x9A4E, + 0xFBFC, 0x9AD9, 0xFC40, 0x9ADC, 0xFC41, 0x9B75, 0xFC42, 0x9B72, 0xFC43, 0x9B8F, 0xFC44, 0x9BB1, 0xFC45, 0x9BBB, 0xFC46, 0x9C00, + 0xFC47, 0x9D70, 0xFC48, 0x9D6B, 0xFC49, 0xFA2D, 0xFC4A, 0x9E19, 0xFC4B, 0x9ED1, 0, 0 +}; +#endif + +#if FF_CODE_PAGE == 936 || FF_CODE_PAGE == 0 /* Simplified Chinese */ +static const WCHAR uni2oem936[] = { /* Unicode --> GBK pairs */ + 0x00A4, 0xA1E8, 0x00A7, 0xA1EC, 0x00A8, 0xA1A7, 0x00B0, 0xA1E3, 0x00B1, 0xA1C0, 0x00B7, 0xA1A4, 0x00D7, 0xA1C1, 0x00E0, 0xA8A4, + 0x00E1, 0xA8A2, 0x00E8, 0xA8A8, 0x00E9, 0xA8A6, 0x00EA, 0xA8BA, 0x00EC, 0xA8AC, 0x00ED, 0xA8AA, 0x00F2, 0xA8B0, 0x00F3, 0xA8AE, + 0x00F7, 0xA1C2, 0x00F9, 0xA8B4, 0x00FA, 0xA8B2, 0x00FC, 0xA8B9, 0x0101, 0xA8A1, 0x0113, 0xA8A5, 0x011B, 0xA8A7, 0x012B, 0xA8A9, + 0x0144, 0xA8BD, 0x0148, 0xA8BE, 0x014D, 0xA8AD, 0x016B, 0xA8B1, 0x01CE, 0xA8A3, 0x01D0, 0xA8AB, 0x01D2, 0xA8AF, 0x01D4, 0xA8B3, + 0x01D6, 0xA8B5, 0x01D8, 0xA8B6, 0x01DA, 0xA8B7, 0x01DC, 0xA8B8, 0x0251, 0xA8BB, 0x0261, 0xA8C0, 0x02C7, 0xA1A6, 0x02C9, 0xA1A5, + 0x02CA, 0xA840, 0x02CB, 0xA841, 0x02D9, 0xA842, 0x0391, 0xA6A1, 0x0392, 0xA6A2, 0x0393, 0xA6A3, 0x0394, 0xA6A4, 0x0395, 0xA6A5, + 0x0396, 0xA6A6, 0x0397, 0xA6A7, 0x0398, 0xA6A8, 0x0399, 0xA6A9, 0x039A, 0xA6AA, 0x039B, 0xA6AB, 0x039C, 0xA6AC, 0x039D, 0xA6AD, + 0x039E, 0xA6AE, 0x039F, 0xA6AF, 0x03A0, 0xA6B0, 0x03A1, 0xA6B1, 0x03A3, 0xA6B2, 0x03A4, 0xA6B3, 0x03A5, 0xA6B4, 0x03A6, 0xA6B5, + 0x03A7, 0xA6B6, 0x03A8, 0xA6B7, 0x03A9, 0xA6B8, 0x03B1, 0xA6C1, 0x03B2, 0xA6C2, 0x03B3, 0xA6C3, 0x03B4, 0xA6C4, 0x03B5, 0xA6C5, + 0x03B6, 0xA6C6, 0x03B7, 0xA6C7, 0x03B8, 0xA6C8, 0x03B9, 0xA6C9, 0x03BA, 0xA6CA, 0x03BB, 0xA6CB, 0x03BC, 0xA6CC, 0x03BD, 0xA6CD, + 0x03BE, 0xA6CE, 0x03BF, 0xA6CF, 0x03C0, 0xA6D0, 0x03C1, 0xA6D1, 0x03C3, 0xA6D2, 0x03C4, 0xA6D3, 0x03C5, 0xA6D4, 0x03C6, 0xA6D5, + 0x03C7, 0xA6D6, 0x03C8, 0xA6D7, 0x03C9, 0xA6D8, 0x0401, 0xA7A7, 0x0410, 0xA7A1, 0x0411, 0xA7A2, 0x0412, 0xA7A3, 0x0413, 0xA7A4, + 0x0414, 0xA7A5, 0x0415, 0xA7A6, 0x0416, 0xA7A8, 0x0417, 0xA7A9, 0x0418, 0xA7AA, 0x0419, 0xA7AB, 0x041A, 0xA7AC, 0x041B, 0xA7AD, + 0x041C, 0xA7AE, 0x041D, 0xA7AF, 0x041E, 0xA7B0, 0x041F, 0xA7B1, 0x0420, 0xA7B2, 0x0421, 0xA7B3, 0x0422, 0xA7B4, 0x0423, 0xA7B5, + 0x0424, 0xA7B6, 0x0425, 0xA7B7, 0x0426, 0xA7B8, 0x0427, 0xA7B9, 0x0428, 0xA7BA, 0x0429, 0xA7BB, 0x042A, 0xA7BC, 0x042B, 0xA7BD, + 0x042C, 0xA7BE, 0x042D, 0xA7BF, 0x042E, 0xA7C0, 0x042F, 0xA7C1, 0x0430, 0xA7D1, 0x0431, 0xA7D2, 0x0432, 0xA7D3, 0x0433, 0xA7D4, + 0x0434, 0xA7D5, 0x0435, 0xA7D6, 0x0436, 0xA7D8, 0x0437, 0xA7D9, 0x0438, 0xA7DA, 0x0439, 0xA7DB, 0x043A, 0xA7DC, 0x043B, 0xA7DD, + 0x043C, 0xA7DE, 0x043D, 0xA7DF, 0x043E, 0xA7E0, 0x043F, 0xA7E1, 0x0440, 0xA7E2, 0x0441, 0xA7E3, 0x0442, 0xA7E4, 0x0443, 0xA7E5, + 0x0444, 0xA7E6, 0x0445, 0xA7E7, 0x0446, 0xA7E8, 0x0447, 0xA7E9, 0x0448, 0xA7EA, 0x0449, 0xA7EB, 0x044A, 0xA7EC, 0x044B, 0xA7ED, + 0x044C, 0xA7EE, 0x044D, 0xA7EF, 0x044E, 0xA7F0, 0x044F, 0xA7F1, 0x0451, 0xA7D7, 0x2010, 0xA95C, 0x2013, 0xA843, 0x2014, 0xA1AA, + 0x2015, 0xA844, 0x2016, 0xA1AC, 0x2018, 0xA1AE, 0x2019, 0xA1AF, 0x201C, 0xA1B0, 0x201D, 0xA1B1, 0x2025, 0xA845, 0x2026, 0xA1AD, + 0x2030, 0xA1EB, 0x2032, 0xA1E4, 0x2033, 0xA1E5, 0x2035, 0xA846, 0x203B, 0xA1F9, 0x20AC, 0x0080, 0x2103, 0xA1E6, 0x2105, 0xA847, + 0x2109, 0xA848, 0x2116, 0xA1ED, 0x2121, 0xA959, 0x2160, 0xA2F1, 0x2161, 0xA2F2, 0x2162, 0xA2F3, 0x2163, 0xA2F4, 0x2164, 0xA2F5, + 0x2165, 0xA2F6, 0x2166, 0xA2F7, 0x2167, 0xA2F8, 0x2168, 0xA2F9, 0x2169, 0xA2FA, 0x216A, 0xA2FB, 0x216B, 0xA2FC, 0x2170, 0xA2A1, + 0x2171, 0xA2A2, 0x2172, 0xA2A3, 0x2173, 0xA2A4, 0x2174, 0xA2A5, 0x2175, 0xA2A6, 0x2176, 0xA2A7, 0x2177, 0xA2A8, 0x2178, 0xA2A9, + 0x2179, 0xA2AA, 0x2190, 0xA1FB, 0x2191, 0xA1FC, 0x2192, 0xA1FA, 0x2193, 0xA1FD, 0x2196, 0xA849, 0x2197, 0xA84A, 0x2198, 0xA84B, + 0x2199, 0xA84C, 0x2208, 0xA1CA, 0x220F, 0xA1C7, 0x2211, 0xA1C6, 0x2215, 0xA84D, 0x221A, 0xA1CC, 0x221D, 0xA1D8, 0x221E, 0xA1DE, + 0x221F, 0xA84E, 0x2220, 0xA1CF, 0x2223, 0xA84F, 0x2225, 0xA1CE, 0x2227, 0xA1C4, 0x2228, 0xA1C5, 0x2229, 0xA1C9, 0x222A, 0xA1C8, + 0x222B, 0xA1D2, 0x222E, 0xA1D3, 0x2234, 0xA1E0, 0x2235, 0xA1DF, 0x2236, 0xA1C3, 0x2237, 0xA1CB, 0x223D, 0xA1D7, 0x2248, 0xA1D6, + 0x224C, 0xA1D5, 0x2252, 0xA850, 0x2260, 0xA1D9, 0x2261, 0xA1D4, 0x2264, 0xA1DC, 0x2265, 0xA1DD, 0x2266, 0xA851, 0x2267, 0xA852, + 0x226E, 0xA1DA, 0x226F, 0xA1DB, 0x2295, 0xA892, 0x2299, 0xA1D1, 0x22A5, 0xA1CD, 0x22BF, 0xA853, 0x2312, 0xA1D0, 0x2460, 0xA2D9, + 0x2461, 0xA2DA, 0x2462, 0xA2DB, 0x2463, 0xA2DC, 0x2464, 0xA2DD, 0x2465, 0xA2DE, 0x2466, 0xA2DF, 0x2467, 0xA2E0, 0x2468, 0xA2E1, + 0x2469, 0xA2E2, 0x2474, 0xA2C5, 0x2475, 0xA2C6, 0x2476, 0xA2C7, 0x2477, 0xA2C8, 0x2478, 0xA2C9, 0x2479, 0xA2CA, 0x247A, 0xA2CB, + 0x247B, 0xA2CC, 0x247C, 0xA2CD, 0x247D, 0xA2CE, 0x247E, 0xA2CF, 0x247F, 0xA2D0, 0x2480, 0xA2D1, 0x2481, 0xA2D2, 0x2482, 0xA2D3, + 0x2483, 0xA2D4, 0x2484, 0xA2D5, 0x2485, 0xA2D6, 0x2486, 0xA2D7, 0x2487, 0xA2D8, 0x2488, 0xA2B1, 0x2489, 0xA2B2, 0x248A, 0xA2B3, + 0x248B, 0xA2B4, 0x248C, 0xA2B5, 0x248D, 0xA2B6, 0x248E, 0xA2B7, 0x248F, 0xA2B8, 0x2490, 0xA2B9, 0x2491, 0xA2BA, 0x2492, 0xA2BB, + 0x2493, 0xA2BC, 0x2494, 0xA2BD, 0x2495, 0xA2BE, 0x2496, 0xA2BF, 0x2497, 0xA2C0, 0x2498, 0xA2C1, 0x2499, 0xA2C2, 0x249A, 0xA2C3, + 0x249B, 0xA2C4, 0x2500, 0xA9A4, 0x2501, 0xA9A5, 0x2502, 0xA9A6, 0x2503, 0xA9A7, 0x2504, 0xA9A8, 0x2505, 0xA9A9, 0x2506, 0xA9AA, + 0x2507, 0xA9AB, 0x2508, 0xA9AC, 0x2509, 0xA9AD, 0x250A, 0xA9AE, 0x250B, 0xA9AF, 0x250C, 0xA9B0, 0x250D, 0xA9B1, 0x250E, 0xA9B2, + 0x250F, 0xA9B3, 0x2510, 0xA9B4, 0x2511, 0xA9B5, 0x2512, 0xA9B6, 0x2513, 0xA9B7, 0x2514, 0xA9B8, 0x2515, 0xA9B9, 0x2516, 0xA9BA, + 0x2517, 0xA9BB, 0x2518, 0xA9BC, 0x2519, 0xA9BD, 0x251A, 0xA9BE, 0x251B, 0xA9BF, 0x251C, 0xA9C0, 0x251D, 0xA9C1, 0x251E, 0xA9C2, + 0x251F, 0xA9C3, 0x2520, 0xA9C4, 0x2521, 0xA9C5, 0x2522, 0xA9C6, 0x2523, 0xA9C7, 0x2524, 0xA9C8, 0x2525, 0xA9C9, 0x2526, 0xA9CA, + 0x2527, 0xA9CB, 0x2528, 0xA9CC, 0x2529, 0xA9CD, 0x252A, 0xA9CE, 0x252B, 0xA9CF, 0x252C, 0xA9D0, 0x252D, 0xA9D1, 0x252E, 0xA9D2, + 0x252F, 0xA9D3, 0x2530, 0xA9D4, 0x2531, 0xA9D5, 0x2532, 0xA9D6, 0x2533, 0xA9D7, 0x2534, 0xA9D8, 0x2535, 0xA9D9, 0x2536, 0xA9DA, + 0x2537, 0xA9DB, 0x2538, 0xA9DC, 0x2539, 0xA9DD, 0x253A, 0xA9DE, 0x253B, 0xA9DF, 0x253C, 0xA9E0, 0x253D, 0xA9E1, 0x253E, 0xA9E2, + 0x253F, 0xA9E3, 0x2540, 0xA9E4, 0x2541, 0xA9E5, 0x2542, 0xA9E6, 0x2543, 0xA9E7, 0x2544, 0xA9E8, 0x2545, 0xA9E9, 0x2546, 0xA9EA, + 0x2547, 0xA9EB, 0x2548, 0xA9EC, 0x2549, 0xA9ED, 0x254A, 0xA9EE, 0x254B, 0xA9EF, 0x2550, 0xA854, 0x2551, 0xA855, 0x2552, 0xA856, + 0x2553, 0xA857, 0x2554, 0xA858, 0x2555, 0xA859, 0x2556, 0xA85A, 0x2557, 0xA85B, 0x2558, 0xA85C, 0x2559, 0xA85D, 0x255A, 0xA85E, + 0x255B, 0xA85F, 0x255C, 0xA860, 0x255D, 0xA861, 0x255E, 0xA862, 0x255F, 0xA863, 0x2560, 0xA864, 0x2561, 0xA865, 0x2562, 0xA866, + 0x2563, 0xA867, 0x2564, 0xA868, 0x2565, 0xA869, 0x2566, 0xA86A, 0x2567, 0xA86B, 0x2568, 0xA86C, 0x2569, 0xA86D, 0x256A, 0xA86E, + 0x256B, 0xA86F, 0x256C, 0xA870, 0x256D, 0xA871, 0x256E, 0xA872, 0x256F, 0xA873, 0x2570, 0xA874, 0x2571, 0xA875, 0x2572, 0xA876, + 0x2573, 0xA877, 0x2581, 0xA878, 0x2582, 0xA879, 0x2583, 0xA87A, 0x2584, 0xA87B, 0x2585, 0xA87C, 0x2586, 0xA87D, 0x2587, 0xA87E, + 0x2588, 0xA880, 0x2589, 0xA881, 0x258A, 0xA882, 0x258B, 0xA883, 0x258C, 0xA884, 0x258D, 0xA885, 0x258E, 0xA886, 0x258F, 0xA887, + 0x2593, 0xA888, 0x2594, 0xA889, 0x2595, 0xA88A, 0x25A0, 0xA1F6, 0x25A1, 0xA1F5, 0x25B2, 0xA1F8, 0x25B3, 0xA1F7, 0x25BC, 0xA88B, + 0x25BD, 0xA88C, 0x25C6, 0xA1F4, 0x25C7, 0xA1F3, 0x25CB, 0xA1F0, 0x25CE, 0xA1F2, 0x25CF, 0xA1F1, 0x25E2, 0xA88D, 0x25E3, 0xA88E, + 0x25E4, 0xA88F, 0x25E5, 0xA890, 0x2605, 0xA1EF, 0x2606, 0xA1EE, 0x2609, 0xA891, 0x2640, 0xA1E2, 0x2642, 0xA1E1, 0x3000, 0xA1A1, + 0x3001, 0xA1A2, 0x3002, 0xA1A3, 0x3003, 0xA1A8, 0x3005, 0xA1A9, 0x3006, 0xA965, 0x3007, 0xA996, 0x3008, 0xA1B4, 0x3009, 0xA1B5, + 0x300A, 0xA1B6, 0x300B, 0xA1B7, 0x300C, 0xA1B8, 0x300D, 0xA1B9, 0x300E, 0xA1BA, 0x300F, 0xA1BB, 0x3010, 0xA1BE, 0x3011, 0xA1BF, + 0x3012, 0xA893, 0x3013, 0xA1FE, 0x3014, 0xA1B2, 0x3015, 0xA1B3, 0x3016, 0xA1BC, 0x3017, 0xA1BD, 0x301D, 0xA894, 0x301E, 0xA895, + 0x3021, 0xA940, 0x3022, 0xA941, 0x3023, 0xA942, 0x3024, 0xA943, 0x3025, 0xA944, 0x3026, 0xA945, 0x3027, 0xA946, 0x3028, 0xA947, + 0x3029, 0xA948, 0x3041, 0xA4A1, 0x3042, 0xA4A2, 0x3043, 0xA4A3, 0x3044, 0xA4A4, 0x3045, 0xA4A5, 0x3046, 0xA4A6, 0x3047, 0xA4A7, + 0x3048, 0xA4A8, 0x3049, 0xA4A9, 0x304A, 0xA4AA, 0x304B, 0xA4AB, 0x304C, 0xA4AC, 0x304D, 0xA4AD, 0x304E, 0xA4AE, 0x304F, 0xA4AF, + 0x3050, 0xA4B0, 0x3051, 0xA4B1, 0x3052, 0xA4B2, 0x3053, 0xA4B3, 0x3054, 0xA4B4, 0x3055, 0xA4B5, 0x3056, 0xA4B6, 0x3057, 0xA4B7, + 0x3058, 0xA4B8, 0x3059, 0xA4B9, 0x305A, 0xA4BA, 0x305B, 0xA4BB, 0x305C, 0xA4BC, 0x305D, 0xA4BD, 0x305E, 0xA4BE, 0x305F, 0xA4BF, + 0x3060, 0xA4C0, 0x3061, 0xA4C1, 0x3062, 0xA4C2, 0x3063, 0xA4C3, 0x3064, 0xA4C4, 0x3065, 0xA4C5, 0x3066, 0xA4C6, 0x3067, 0xA4C7, + 0x3068, 0xA4C8, 0x3069, 0xA4C9, 0x306A, 0xA4CA, 0x306B, 0xA4CB, 0x306C, 0xA4CC, 0x306D, 0xA4CD, 0x306E, 0xA4CE, 0x306F, 0xA4CF, + 0x3070, 0xA4D0, 0x3071, 0xA4D1, 0x3072, 0xA4D2, 0x3073, 0xA4D3, 0x3074, 0xA4D4, 0x3075, 0xA4D5, 0x3076, 0xA4D6, 0x3077, 0xA4D7, + 0x3078, 0xA4D8, 0x3079, 0xA4D9, 0x307A, 0xA4DA, 0x307B, 0xA4DB, 0x307C, 0xA4DC, 0x307D, 0xA4DD, 0x307E, 0xA4DE, 0x307F, 0xA4DF, + 0x3080, 0xA4E0, 0x3081, 0xA4E1, 0x3082, 0xA4E2, 0x3083, 0xA4E3, 0x3084, 0xA4E4, 0x3085, 0xA4E5, 0x3086, 0xA4E6, 0x3087, 0xA4E7, + 0x3088, 0xA4E8, 0x3089, 0xA4E9, 0x308A, 0xA4EA, 0x308B, 0xA4EB, 0x308C, 0xA4EC, 0x308D, 0xA4ED, 0x308E, 0xA4EE, 0x308F, 0xA4EF, + 0x3090, 0xA4F0, 0x3091, 0xA4F1, 0x3092, 0xA4F2, 0x3093, 0xA4F3, 0x309B, 0xA961, 0x309C, 0xA962, 0x309D, 0xA966, 0x309E, 0xA967, + 0x30A1, 0xA5A1, 0x30A2, 0xA5A2, 0x30A3, 0xA5A3, 0x30A4, 0xA5A4, 0x30A5, 0xA5A5, 0x30A6, 0xA5A6, 0x30A7, 0xA5A7, 0x30A8, 0xA5A8, + 0x30A9, 0xA5A9, 0x30AA, 0xA5AA, 0x30AB, 0xA5AB, 0x30AC, 0xA5AC, 0x30AD, 0xA5AD, 0x30AE, 0xA5AE, 0x30AF, 0xA5AF, 0x30B0, 0xA5B0, + 0x30B1, 0xA5B1, 0x30B2, 0xA5B2, 0x30B3, 0xA5B3, 0x30B4, 0xA5B4, 0x30B5, 0xA5B5, 0x30B6, 0xA5B6, 0x30B7, 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0xA3D7, 0xFF38, 0xA3D8, 0xFF39, 0xA3D9, 0xFF3A, 0xA3DA, 0xFF3B, 0xA3DB, 0xFF3C, 0xA3DC, + 0xFF3D, 0xA3DD, 0xFF3E, 0xA3DE, 0xFF3F, 0xA3DF, 0xFF40, 0xA3E0, 0xFF41, 0xA3E1, 0xFF42, 0xA3E2, 0xFF43, 0xA3E3, 0xFF44, 0xA3E4, + 0xFF45, 0xA3E5, 0xFF46, 0xA3E6, 0xFF47, 0xA3E7, 0xFF48, 0xA3E8, 0xFF49, 0xA3E9, 0xFF4A, 0xA3EA, 0xFF4B, 0xA3EB, 0xFF4C, 0xA3EC, + 0xFF4D, 0xA3ED, 0xFF4E, 0xA3EE, 0xFF4F, 0xA3EF, 0xFF50, 0xA3F0, 0xFF51, 0xA3F1, 0xFF52, 0xA3F2, 0xFF53, 0xA3F3, 0xFF54, 0xA3F4, + 0xFF55, 0xA3F5, 0xFF56, 0xA3F6, 0xFF57, 0xA3F7, 0xFF58, 0xA3F8, 0xFF59, 0xA3F9, 0xFF5A, 0xA3FA, 0xFF5B, 0xA3FB, 0xFF5C, 0xA3FC, + 0xFF5D, 0xA3FD, 0xFF5E, 0xA1AB, 0xFFE0, 0xA1E9, 0xFFE1, 0xA1EA, 0xFFE2, 0xA956, 0xFFE3, 0xA3FE, 0xFFE4, 0xA957, 0xFFE5, 0xA3A4, + 0, 0 +}; + +static const WCHAR oem2uni936[] = { /* GBK --> Unicode pairs */ + 0x0080, 0x20AC, 0x8140, 0x4E02, 0x8141, 0x4E04, 0x8142, 0x4E05, 0x8143, 0x4E06, 0x8144, 0x4E0F, 0x8145, 0x4E12, 0x8146, 0x4E17, + 0x8147, 0x4E1F, 0x8148, 0x4E20, 0x8149, 0x4E21, 0x814A, 0x4E23, 0x814B, 0x4E26, 0x814C, 0x4E29, 0x814D, 0x4E2E, 0x814E, 0x4E2F, + 0x814F, 0x4E31, 0x8150, 0x4E33, 0x8151, 0x4E35, 0x8152, 0x4E37, 0x8153, 0x4E3C, 0x8154, 0x4E40, 0x8155, 0x4E41, 0x8156, 0x4E42, + 0x8157, 0x4E44, 0x8158, 0x4E46, 0x8159, 0x4E4A, 0x815A, 0x4E51, 0x815B, 0x4E55, 0x815C, 0x4E57, 0x815D, 0x4E5A, 0x815E, 0x4E5B, + 0x815F, 0x4E62, 0x8160, 0x4E63, 0x8161, 0x4E64, 0x8162, 0x4E65, 0x8163, 0x4E67, 0x8164, 0x4E68, 0x8165, 0x4E6A, 0x8166, 0x4E6B, + 0x8167, 0x4E6C, 0x8168, 0x4E6D, 0x8169, 0x4E6E, 0x816A, 0x4E6F, 0x816B, 0x4E72, 0x816C, 0x4E74, 0x816D, 0x4E75, 0x816E, 0x4E76, + 0x816F, 0x4E77, 0x8170, 0x4E78, 0x8171, 0x4E79, 0x8172, 0x4E7A, 0x8173, 0x4E7B, 0x8174, 0x4E7C, 0x8175, 0x4E7D, 0x8176, 0x4E7F, + 0x8177, 0x4E80, 0x8178, 0x4E81, 0x8179, 0x4E82, 0x817A, 0x4E83, 0x817B, 0x4E84, 0x817C, 0x4E85, 0x817D, 0x4E87, 0x817E, 0x4E8A, + 0x8180, 0x4E90, 0x8181, 0x4E96, 0x8182, 0x4E97, 0x8183, 0x4E99, 0x8184, 0x4E9C, 0x8185, 0x4E9D, 0x8186, 0x4E9E, 0x8187, 0x4EA3, + 0x8188, 0x4EAA, 0x8189, 0x4EAF, 0x818A, 0x4EB0, 0x818B, 0x4EB1, 0x818C, 0x4EB4, 0x818D, 0x4EB6, 0x818E, 0x4EB7, 0x818F, 0x4EB8, + 0x8190, 0x4EB9, 0x8191, 0x4EBC, 0x8192, 0x4EBD, 0x8193, 0x4EBE, 0x8194, 0x4EC8, 0x8195, 0x4ECC, 0x8196, 0x4ECF, 0x8197, 0x4ED0, + 0x8198, 0x4ED2, 0x8199, 0x4EDA, 0x819A, 0x4EDB, 0x819B, 0x4EDC, 0x819C, 0x4EE0, 0x819D, 0x4EE2, 0x819E, 0x4EE6, 0x819F, 0x4EE7, + 0x81A0, 0x4EE9, 0x81A1, 0x4EED, 0x81A2, 0x4EEE, 0x81A3, 0x4EEF, 0x81A4, 0x4EF1, 0x81A5, 0x4EF4, 0x81A6, 0x4EF8, 0x81A7, 0x4EF9, + 0x81A8, 0x4EFA, 0x81A9, 0x4EFC, 0x81AA, 0x4EFE, 0x81AB, 0x4F00, 0x81AC, 0x4F02, 0x81AD, 0x4F03, 0x81AE, 0x4F04, 0x81AF, 0x4F05, + 0x81B0, 0x4F06, 0x81B1, 0x4F07, 0x81B2, 0x4F08, 0x81B3, 0x4F0B, 0x81B4, 0x4F0C, 0x81B5, 0x4F12, 0x81B6, 0x4F13, 0x81B7, 0x4F14, + 0x81B8, 0x4F15, 0x81B9, 0x4F16, 0x81BA, 0x4F1C, 0x81BB, 0x4F1D, 0x81BC, 0x4F21, 0x81BD, 0x4F23, 0x81BE, 0x4F28, 0x81BF, 0x4F29, + 0x81C0, 0x4F2C, 0x81C1, 0x4F2D, 0x81C2, 0x4F2E, 0x81C3, 0x4F31, 0x81C4, 0x4F33, 0x81C5, 0x4F35, 0x81C6, 0x4F37, 0x81C7, 0x4F39, + 0x81C8, 0x4F3B, 0x81C9, 0x4F3E, 0x81CA, 0x4F3F, 0x81CB, 0x4F40, 0x81CC, 0x4F41, 0x81CD, 0x4F42, 0x81CE, 0x4F44, 0x81CF, 0x4F45, + 0x81D0, 0x4F47, 0x81D1, 0x4F48, 0x81D2, 0x4F49, 0x81D3, 0x4F4A, 0x81D4, 0x4F4B, 0x81D5, 0x4F4C, 0x81D6, 0x4F52, 0x81D7, 0x4F54, + 0x81D8, 0x4F56, 0x81D9, 0x4F61, 0x81DA, 0x4F62, 0x81DB, 0x4F66, 0x81DC, 0x4F68, 0x81DD, 0x4F6A, 0x81DE, 0x4F6B, 0x81DF, 0x4F6D, + 0x81E0, 0x4F6E, 0x81E1, 0x4F71, 0x81E2, 0x4F72, 0x81E3, 0x4F75, 0x81E4, 0x4F77, 0x81E5, 0x4F78, 0x81E6, 0x4F79, 0x81E7, 0x4F7A, + 0x81E8, 0x4F7D, 0x81E9, 0x4F80, 0x81EA, 0x4F81, 0x81EB, 0x4F82, 0x81EC, 0x4F85, 0x81ED, 0x4F86, 0x81EE, 0x4F87, 0x81EF, 0x4F8A, + 0x81F0, 0x4F8C, 0x81F1, 0x4F8E, 0x81F2, 0x4F90, 0x81F3, 0x4F92, 0x81F4, 0x4F93, 0x81F5, 0x4F95, 0x81F6, 0x4F96, 0x81F7, 0x4F98, + 0x81F8, 0x4F99, 0x81F9, 0x4F9A, 0x81FA, 0x4F9C, 0x81FB, 0x4F9E, 0x81FC, 0x4F9F, 0x81FD, 0x4FA1, 0x81FE, 0x4FA2, 0x8240, 0x4FA4, + 0x8241, 0x4FAB, 0x8242, 0x4FAD, 0x8243, 0x4FB0, 0x8244, 0x4FB1, 0x8245, 0x4FB2, 0x8246, 0x4FB3, 0x8247, 0x4FB4, 0x8248, 0x4FB6, + 0x8249, 0x4FB7, 0x824A, 0x4FB8, 0x824B, 0x4FB9, 0x824C, 0x4FBA, 0x824D, 0x4FBB, 0x824E, 0x4FBC, 0x824F, 0x4FBD, 0x8250, 0x4FBE, + 0x8251, 0x4FC0, 0x8252, 0x4FC1, 0x8253, 0x4FC2, 0x8254, 0x4FC6, 0x8255, 0x4FC7, 0x8256, 0x4FC8, 0x8257, 0x4FC9, 0x8258, 0x4FCB, + 0x8259, 0x4FCC, 0x825A, 0x4FCD, 0x825B, 0x4FD2, 0x825C, 0x4FD3, 0x825D, 0x4FD4, 0x825E, 0x4FD5, 0x825F, 0x4FD6, 0x8260, 0x4FD9, + 0x8261, 0x4FDB, 0x8262, 0x4FE0, 0x8263, 0x4FE2, 0x8264, 0x4FE4, 0x8265, 0x4FE5, 0x8266, 0x4FE7, 0x8267, 0x4FEB, 0x8268, 0x4FEC, + 0x8269, 0x4FF0, 0x826A, 0x4FF2, 0x826B, 0x4FF4, 0x826C, 0x4FF5, 0x826D, 0x4FF6, 0x826E, 0x4FF7, 0x826F, 0x4FF9, 0x8270, 0x4FFB, + 0x8271, 0x4FFC, 0x8272, 0x4FFD, 0x8273, 0x4FFF, 0x8274, 0x5000, 0x8275, 0x5001, 0x8276, 0x5002, 0x8277, 0x5003, 0x8278, 0x5004, + 0x8279, 0x5005, 0x827A, 0x5006, 0x827B, 0x5007, 0x827C, 0x5008, 0x827D, 0x5009, 0x827E, 0x500A, 0x8280, 0x500B, 0x8281, 0x500E, + 0x8282, 0x5010, 0x8283, 0x5011, 0x8284, 0x5013, 0x8285, 0x5015, 0x8286, 0x5016, 0x8287, 0x5017, 0x8288, 0x501B, 0x8289, 0x501D, + 0x828A, 0x501E, 0x828B, 0x5020, 0x828C, 0x5022, 0x828D, 0x5023, 0x828E, 0x5024, 0x828F, 0x5027, 0x8290, 0x502B, 0x8291, 0x502F, + 0x8292, 0x5030, 0x8293, 0x5031, 0x8294, 0x5032, 0x8295, 0x5033, 0x8296, 0x5034, 0x8297, 0x5035, 0x8298, 0x5036, 0x8299, 0x5037, + 0x829A, 0x5038, 0x829B, 0x5039, 0x829C, 0x503B, 0x829D, 0x503D, 0x829E, 0x503F, 0x829F, 0x5040, 0x82A0, 0x5041, 0x82A1, 0x5042, + 0x82A2, 0x5044, 0x82A3, 0x5045, 0x82A4, 0x5046, 0x82A5, 0x5049, 0x82A6, 0x504A, 0x82A7, 0x504B, 0x82A8, 0x504D, 0x82A9, 0x5050, + 0x82AA, 0x5051, 0x82AB, 0x5052, 0x82AC, 0x5053, 0x82AD, 0x5054, 0x82AE, 0x5056, 0x82AF, 0x5057, 0x82B0, 0x5058, 0x82B1, 0x5059, + 0x82B2, 0x505B, 0x82B3, 0x505D, 0x82B4, 0x505E, 0x82B5, 0x505F, 0x82B6, 0x5060, 0x82B7, 0x5061, 0x82B8, 0x5062, 0x82B9, 0x5063, + 0x82BA, 0x5064, 0x82BB, 0x5066, 0x82BC, 0x5067, 0x82BD, 0x5068, 0x82BE, 0x5069, 0x82BF, 0x506A, 0x82C0, 0x506B, 0x82C1, 0x506D, + 0x82C2, 0x506E, 0x82C3, 0x506F, 0x82C4, 0x5070, 0x82C5, 0x5071, 0x82C6, 0x5072, 0x82C7, 0x5073, 0x82C8, 0x5074, 0x82C9, 0x5075, + 0x82CA, 0x5078, 0x82CB, 0x5079, 0x82CC, 0x507A, 0x82CD, 0x507C, 0x82CE, 0x507D, 0x82CF, 0x5081, 0x82D0, 0x5082, 0x82D1, 0x5083, + 0x82D2, 0x5084, 0x82D3, 0x5086, 0x82D4, 0x5087, 0x82D5, 0x5089, 0x82D6, 0x508A, 0x82D7, 0x508B, 0x82D8, 0x508C, 0x82D9, 0x508E, + 0x82DA, 0x508F, 0x82DB, 0x5090, 0x82DC, 0x5091, 0x82DD, 0x5092, 0x82DE, 0x5093, 0x82DF, 0x5094, 0x82E0, 0x5095, 0x82E1, 0x5096, + 0x82E2, 0x5097, 0x82E3, 0x5098, 0x82E4, 0x5099, 0x82E5, 0x509A, 0x82E6, 0x509B, 0x82E7, 0x509C, 0x82E8, 0x509D, 0x82E9, 0x509E, + 0x82EA, 0x509F, 0x82EB, 0x50A0, 0x82EC, 0x50A1, 0x82ED, 0x50A2, 0x82EE, 0x50A4, 0x82EF, 0x50A6, 0x82F0, 0x50AA, 0x82F1, 0x50AB, + 0x82F2, 0x50AD, 0x82F3, 0x50AE, 0x82F4, 0x50AF, 0x82F5, 0x50B0, 0x82F6, 0x50B1, 0x82F7, 0x50B3, 0x82F8, 0x50B4, 0x82F9, 0x50B5, + 0x82FA, 0x50B6, 0x82FB, 0x50B7, 0x82FC, 0x50B8, 0x82FD, 0x50B9, 0x82FE, 0x50BC, 0x8340, 0x50BD, 0x8341, 0x50BE, 0x8342, 0x50BF, + 0x8343, 0x50C0, 0x8344, 0x50C1, 0x8345, 0x50C2, 0x8346, 0x50C3, 0x8347, 0x50C4, 0x8348, 0x50C5, 0x8349, 0x50C6, 0x834A, 0x50C7, + 0x834B, 0x50C8, 0x834C, 0x50C9, 0x834D, 0x50CA, 0x834E, 0x50CB, 0x834F, 0x50CC, 0x8350, 0x50CD, 0x8351, 0x50CE, 0x8352, 0x50D0, + 0x8353, 0x50D1, 0x8354, 0x50D2, 0x8355, 0x50D3, 0x8356, 0x50D4, 0x8357, 0x50D5, 0x8358, 0x50D7, 0x8359, 0x50D8, 0x835A, 0x50D9, + 0x835B, 0x50DB, 0x835C, 0x50DC, 0x835D, 0x50DD, 0x835E, 0x50DE, 0x835F, 0x50DF, 0x8360, 0x50E0, 0x8361, 0x50E1, 0x8362, 0x50E2, + 0x8363, 0x50E3, 0x8364, 0x50E4, 0x8365, 0x50E5, 0x8366, 0x50E8, 0x8367, 0x50E9, 0x8368, 0x50EA, 0x8369, 0x50EB, 0x836A, 0x50EF, + 0x836B, 0x50F0, 0x836C, 0x50F1, 0x836D, 0x50F2, 0x836E, 0x50F4, 0x836F, 0x50F6, 0x8370, 0x50F7, 0x8371, 0x50F8, 0x8372, 0x50F9, + 0x8373, 0x50FA, 0x8374, 0x50FC, 0x8375, 0x50FD, 0x8376, 0x50FE, 0x8377, 0x50FF, 0x8378, 0x5100, 0x8379, 0x5101, 0x837A, 0x5102, + 0x837B, 0x5103, 0x837C, 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0x9EBA, 0xFC4E, 0x9EBC, 0xFC4F, 0x9EBF, + 0xFC50, 0x9EC0, 0xFC51, 0x9EC1, 0xFC52, 0x9EC2, 0xFC53, 0x9EC3, 0xFC54, 0x9EC5, 0xFC55, 0x9EC6, 0xFC56, 0x9EC7, 0xFC57, 0x9EC8, + 0xFC58, 0x9ECA, 0xFC59, 0x9ECB, 0xFC5A, 0x9ECC, 0xFC5B, 0x9ED0, 0xFC5C, 0x9ED2, 0xFC5D, 0x9ED3, 0xFC5E, 0x9ED5, 0xFC5F, 0x9ED6, + 0xFC60, 0x9ED7, 0xFC61, 0x9ED9, 0xFC62, 0x9EDA, 0xFC63, 0x9EDE, 0xFC64, 0x9EE1, 0xFC65, 0x9EE3, 0xFC66, 0x9EE4, 0xFC67, 0x9EE6, + 0xFC68, 0x9EE8, 0xFC69, 0x9EEB, 0xFC6A, 0x9EEC, 0xFC6B, 0x9EED, 0xFC6C, 0x9EEE, 0xFC6D, 0x9EF0, 0xFC6E, 0x9EF1, 0xFC6F, 0x9EF2, + 0xFC70, 0x9EF3, 0xFC71, 0x9EF4, 0xFC72, 0x9EF5, 0xFC73, 0x9EF6, 0xFC74, 0x9EF7, 0xFC75, 0x9EF8, 0xFC76, 0x9EFA, 0xFC77, 0x9EFD, + 0xFC78, 0x9EFF, 0xFC79, 0x9F00, 0xFC7A, 0x9F01, 0xFC7B, 0x9F02, 0xFC7C, 0x9F03, 0xFC7D, 0x9F04, 0xFC7E, 0x9F05, 0xFC80, 0x9F06, + 0xFC81, 0x9F07, 0xFC82, 0x9F08, 0xFC83, 0x9F09, 0xFC84, 0x9F0A, 0xFC85, 0x9F0C, 0xFC86, 0x9F0F, 0xFC87, 0x9F11, 0xFC88, 0x9F12, + 0xFC89, 0x9F14, 0xFC8A, 0x9F15, 0xFC8B, 0x9F16, 0xFC8C, 0x9F18, 0xFC8D, 0x9F1A, 0xFC8E, 0x9F1B, 0xFC8F, 0x9F1C, 0xFC90, 0x9F1D, + 0xFC91, 0x9F1E, 0xFC92, 0x9F1F, 0xFC93, 0x9F21, 0xFC94, 0x9F23, 0xFC95, 0x9F24, 0xFC96, 0x9F25, 0xFC97, 0x9F26, 0xFC98, 0x9F27, + 0xFC99, 0x9F28, 0xFC9A, 0x9F29, 0xFC9B, 0x9F2A, 0xFC9C, 0x9F2B, 0xFC9D, 0x9F2D, 0xFC9E, 0x9F2E, 0xFC9F, 0x9F30, 0xFCA0, 0x9F31, + 0xFD40, 0x9F32, 0xFD41, 0x9F33, 0xFD42, 0x9F34, 0xFD43, 0x9F35, 0xFD44, 0x9F36, 0xFD45, 0x9F38, 0xFD46, 0x9F3A, 0xFD47, 0x9F3C, + 0xFD48, 0x9F3F, 0xFD49, 0x9F40, 0xFD4A, 0x9F41, 0xFD4B, 0x9F42, 0xFD4C, 0x9F43, 0xFD4D, 0x9F45, 0xFD4E, 0x9F46, 0xFD4F, 0x9F47, + 0xFD50, 0x9F48, 0xFD51, 0x9F49, 0xFD52, 0x9F4A, 0xFD53, 0x9F4B, 0xFD54, 0x9F4C, 0xFD55, 0x9F4D, 0xFD56, 0x9F4E, 0xFD57, 0x9F4F, + 0xFD58, 0x9F52, 0xFD59, 0x9F53, 0xFD5A, 0x9F54, 0xFD5B, 0x9F55, 0xFD5C, 0x9F56, 0xFD5D, 0x9F57, 0xFD5E, 0x9F58, 0xFD5F, 0x9F59, + 0xFD60, 0x9F5A, 0xFD61, 0x9F5B, 0xFD62, 0x9F5C, 0xFD63, 0x9F5D, 0xFD64, 0x9F5E, 0xFD65, 0x9F5F, 0xFD66, 0x9F60, 0xFD67, 0x9F61, + 0xFD68, 0x9F62, 0xFD69, 0x9F63, 0xFD6A, 0x9F64, 0xFD6B, 0x9F65, 0xFD6C, 0x9F66, 0xFD6D, 0x9F67, 0xFD6E, 0x9F68, 0xFD6F, 0x9F69, + 0xFD70, 0x9F6A, 0xFD71, 0x9F6B, 0xFD72, 0x9F6C, 0xFD73, 0x9F6D, 0xFD74, 0x9F6E, 0xFD75, 0x9F6F, 0xFD76, 0x9F70, 0xFD77, 0x9F71, + 0xFD78, 0x9F72, 0xFD79, 0x9F73, 0xFD7A, 0x9F74, 0xFD7B, 0x9F75, 0xFD7C, 0x9F76, 0xFD7D, 0x9F77, 0xFD7E, 0x9F78, 0xFD80, 0x9F79, + 0xFD81, 0x9F7A, 0xFD82, 0x9F7B, 0xFD83, 0x9F7C, 0xFD84, 0x9F7D, 0xFD85, 0x9F7E, 0xFD86, 0x9F81, 0xFD87, 0x9F82, 0xFD88, 0x9F8D, + 0xFD89, 0x9F8E, 0xFD8A, 0x9F8F, 0xFD8B, 0x9F90, 0xFD8C, 0x9F91, 0xFD8D, 0x9F92, 0xFD8E, 0x9F93, 0xFD8F, 0x9F94, 0xFD90, 0x9F95, + 0xFD91, 0x9F96, 0xFD92, 0x9F97, 0xFD93, 0x9F98, 0xFD94, 0x9F9C, 0xFD95, 0x9F9D, 0xFD96, 0x9F9E, 0xFD97, 0x9FA1, 0xFD98, 0x9FA2, + 0xFD99, 0x9FA3, 0xFD9A, 0x9FA4, 0xFD9B, 0x9FA5, 0xFD9C, 0xF92C, 0xFD9D, 0xF979, 0xFD9E, 0xF995, 0xFD9F, 0xF9E7, 0xFDA0, 0xF9F1, + 0xFE40, 0xFA0C, 0xFE41, 0xFA0D, 0xFE42, 0xFA0E, 0xFE43, 0xFA0F, 0xFE44, 0xFA11, 0xFE45, 0xFA13, 0xFE46, 0xFA14, 0xFE47, 0xFA18, + 0xFE48, 0xFA1F, 0xFE49, 0xFA20, 0xFE4A, 0xFA21, 0xFE4B, 0xFA23, 0xFE4C, 0xFA24, 0xFE4D, 0xFA27, 0xFE4E, 0xFA28, 0xFE4F, 0xFA29, + 0, 0 +}; +#endif + +#if FF_CODE_PAGE == 949 || FF_CODE_PAGE == 0 /* Korean */ +static const WCHAR uni2oem949[] = { /* Unicode --> Korean pairs */ + 0x00A1, 0xA2AE, 0x00A4, 0xA2B4, 0x00A7, 0xA1D7, 0x00A8, 0xA1A7, 0x00AA, 0xA8A3, 0x00AD, 0xA1A9, 0x00AE, 0xA2E7, 0x00B0, 0xA1C6, + 0x00B1, 0xA1BE, 0x00B2, 0xA9F7, 0x00B3, 0xA9F8, 0x00B4, 0xA2A5, 0x00B6, 0xA2D2, 0x00B7, 0xA1A4, 0x00B8, 0xA2AC, 0x00B9, 0xA9F6, + 0x00BA, 0xA8AC, 0x00BC, 0xA8F9, 0x00BD, 0xA8F6, 0x00BE, 0xA8FA, 0x00BF, 0xA2AF, 0x00C6, 0xA8A1, 0x00D0, 0xA8A2, 0x00D7, 0xA1BF, + 0x00D8, 0xA8AA, 0x00DE, 0xA8AD, 0x00DF, 0xA9AC, 0x00E6, 0xA9A1, 0x00F0, 0xA9A3, 0x00F7, 0xA1C0, 0x00F8, 0xA9AA, 0x00FE, 0xA9AD, + 0x0111, 0xA9A2, 0x0126, 0xA8A4, 0x0127, 0xA9A4, 0x0131, 0xA9A5, 0x0132, 0xA8A6, 0x0133, 0xA9A6, 0x0138, 0xA9A7, 0x013F, 0xA8A8, + 0x0140, 0xA9A8, 0x0141, 0xA8A9, 0x0142, 0xA9A9, 0x0149, 0xA9B0, 0x014A, 0xA8AF, 0x014B, 0xA9AF, 0x0152, 0xA8AB, 0x0153, 0xA9AB, + 0x0166, 0xA8AE, 0x0167, 0xA9AE, 0x02C7, 0xA2A7, 0x02D0, 0xA2B0, 0x02D8, 0xA2A8, 0x02D9, 0xA2AB, 0x02DA, 0xA2AA, 0x02DB, 0xA2AD, + 0x02DD, 0xA2A9, 0x0391, 0xA5C1, 0x0392, 0xA5C2, 0x0393, 0xA5C3, 0x0394, 0xA5C4, 0x0395, 0xA5C5, 0x0396, 0xA5C6, 0x0397, 0xA5C7, + 0x0398, 0xA5C8, 0x0399, 0xA5C9, 0x039A, 0xA5CA, 0x039B, 0xA5CB, 0x039C, 0xA5CC, 0x039D, 0xA5CD, 0x039E, 0xA5CE, 0x039F, 0xA5CF, + 0x03A0, 0xA5D0, 0x03A1, 0xA5D1, 0x03A3, 0xA5D2, 0x03A4, 0xA5D3, 0x03A5, 0xA5D4, 0x03A6, 0xA5D5, 0x03A7, 0xA5D6, 0x03A8, 0xA5D7, + 0x03A9, 0xA5D8, 0x03B1, 0xA5E1, 0x03B2, 0xA5E2, 0x03B3, 0xA5E3, 0x03B4, 0xA5E4, 0x03B5, 0xA5E5, 0x03B6, 0xA5E6, 0x03B7, 0xA5E7, + 0x03B8, 0xA5E8, 0x03B9, 0xA5E9, 0x03BA, 0xA5EA, 0x03BB, 0xA5EB, 0x03BC, 0xA5EC, 0x03BD, 0xA5ED, 0x03BE, 0xA5EE, 0x03BF, 0xA5EF, + 0x03C0, 0xA5F0, 0x03C1, 0xA5F1, 0x03C3, 0xA5F2, 0x03C4, 0xA5F3, 0x03C5, 0xA5F4, 0x03C6, 0xA5F5, 0x03C7, 0xA5F6, 0x03C8, 0xA5F7, + 0x03C9, 0xA5F8, 0x0401, 0xACA7, 0x0410, 0xACA1, 0x0411, 0xACA2, 0x0412, 0xACA3, 0x0413, 0xACA4, 0x0414, 0xACA5, 0x0415, 0xACA6, + 0x0416, 0xACA8, 0x0417, 0xACA9, 0x0418, 0xACAA, 0x0419, 0xACAB, 0x041A, 0xACAC, 0x041B, 0xACAD, 0x041C, 0xACAE, 0x041D, 0xACAF, + 0x041E, 0xACB0, 0x041F, 0xACB1, 0x0420, 0xACB2, 0x0421, 0xACB3, 0x0422, 0xACB4, 0x0423, 0xACB5, 0x0424, 0xACB6, 0x0425, 0xACB7, + 0x0426, 0xACB8, 0x0427, 0xACB9, 0x0428, 0xACBA, 0x0429, 0xACBB, 0x042A, 0xACBC, 0x042B, 0xACBD, 0x042C, 0xACBE, 0x042D, 0xACBF, + 0x042E, 0xACC0, 0x042F, 0xACC1, 0x0430, 0xACD1, 0x0431, 0xACD2, 0x0432, 0xACD3, 0x0433, 0xACD4, 0x0434, 0xACD5, 0x0435, 0xACD6, + 0x0436, 0xACD8, 0x0437, 0xACD9, 0x0438, 0xACDA, 0x0439, 0xACDB, 0x043A, 0xACDC, 0x043B, 0xACDD, 0x043C, 0xACDE, 0x043D, 0xACDF, + 0x043E, 0xACE0, 0x043F, 0xACE1, 0x0440, 0xACE2, 0x0441, 0xACE3, 0x0442, 0xACE4, 0x0443, 0xACE5, 0x0444, 0xACE6, 0x0445, 0xACE7, + 0x0446, 0xACE8, 0x0447, 0xACE9, 0x0448, 0xACEA, 0x0449, 0xACEB, 0x044A, 0xACEC, 0x044B, 0xACED, 0x044C, 0xACEE, 0x044D, 0xACEF, + 0x044E, 0xACF0, 0x044F, 0xACF1, 0x0451, 0xACD7, 0x2015, 0xA1AA, 0x2018, 0xA1AE, 0x2019, 0xA1AF, 0x201C, 0xA1B0, 0x201D, 0xA1B1, + 0x2020, 0xA2D3, 0x2021, 0xA2D4, 0x2025, 0xA1A5, 0x2026, 0xA1A6, 0x2030, 0xA2B6, 0x2032, 0xA1C7, 0x2033, 0xA1C8, 0x203B, 0xA1D8, + 0x2074, 0xA9F9, 0x207F, 0xA9FA, 0x2081, 0xA9FB, 0x2082, 0xA9FC, 0x2083, 0xA9FD, 0x2084, 0xA9FE, 0x20AC, 0xA2E6, 0x2103, 0xA1C9, + 0x2109, 0xA2B5, 0x2113, 0xA7A4, 0x2116, 0xA2E0, 0x2121, 0xA2E5, 0x2122, 0xA2E2, 0x2126, 0xA7D9, 0x212B, 0xA1CA, 0x2153, 0xA8F7, + 0x2154, 0xA8F8, 0x215B, 0xA8FB, 0x215C, 0xA8FC, 0x215D, 0xA8FD, 0x215E, 0xA8FE, 0x2160, 0xA5B0, 0x2161, 0xA5B1, 0x2162, 0xA5B2, + 0x2163, 0xA5B3, 0x2164, 0xA5B4, 0x2165, 0xA5B5, 0x2166, 0xA5B6, 0x2167, 0xA5B7, 0x2168, 0xA5B8, 0x2169, 0xA5B9, 0x2170, 0xA5A1, + 0x2171, 0xA5A2, 0x2172, 0xA5A3, 0x2173, 0xA5A4, 0x2174, 0xA5A5, 0x2175, 0xA5A6, 0x2176, 0xA5A7, 0x2177, 0xA5A8, 0x2178, 0xA5A9, + 0x2179, 0xA5AA, 0x2190, 0xA1E7, 0x2191, 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0xD783, 0xC59A, + 0xD784, 0xC59B, 0xD785, 0xC59C, 0xD786, 0xC59D, 0xD787, 0xC59E, 0xD788, 0xC8F7, 0xD789, 0xC8F8, 0xD78A, 0xC59F, 0xD78B, 0xC5A0, + 0xD78C, 0xC8F9, 0xD78D, 0xC641, 0xD78E, 0xC642, 0xD78F, 0xC643, 0xD790, 0xC8FA, 0xD791, 0xC644, 0xD792, 0xC645, 0xD793, 0xC646, + 0xD794, 0xC647, 0xD795, 0xC648, 0xD796, 0xC649, 0xD797, 0xC64A, 0xD798, 0xC8FB, 0xD799, 0xC8FC, 0xD79A, 0xC64B, 0xD79B, 0xC8FD, + 0xD79C, 0xC64C, 0xD79D, 0xC8FE, 0xD79E, 0xC64D, 0xD79F, 0xC64E, 0xD7A0, 0xC64F, 0xD7A1, 0xC650, 0xD7A2, 0xC651, 0xD7A3, 0xC652, + 0xF900, 0xCBD0, 0xF901, 0xCBD6, 0xF902, 0xCBE7, 0xF903, 0xCDCF, 0xF904, 0xCDE8, 0xF905, 0xCEAD, 0xF906, 0xCFFB, 0xF907, 0xD0A2, + 0xF908, 0xD0B8, 0xF909, 0xD0D0, 0xF90A, 0xD0DD, 0xF90B, 0xD1D4, 0xF90C, 0xD1D5, 0xF90D, 0xD1D8, 0xF90E, 0xD1DB, 0xF90F, 0xD1DC, + 0xF910, 0xD1DD, 0xF911, 0xD1DE, 0xF912, 0xD1DF, 0xF913, 0xD1E0, 0xF914, 0xD1E2, 0xF915, 0xD1E3, 0xF916, 0xD1E4, 0xF917, 0xD1E5, + 0xF918, 0xD1E6, 0xF919, 0xD1E8, 0xF91A, 0xD1E9, 0xF91B, 0xD1EA, 0xF91C, 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0xF95A, 0xD4E6, 0xF95B, 0xD4FC, 0xF95C, 0xD5A5, 0xF95D, 0xD5AB, 0xF95E, 0xD5AE, 0xF95F, 0xD6B8, + 0xF960, 0xD6CD, 0xF961, 0xD7CB, 0xF962, 0xD7E4, 0xF963, 0xDBC5, 0xF964, 0xDBE4, 0xF965, 0xDCA5, 0xF966, 0xDDA5, 0xF967, 0xDDD5, + 0xF968, 0xDDF4, 0xF969, 0xDEFC, 0xF96A, 0xDEFE, 0xF96B, 0xDFB3, 0xF96C, 0xDFE1, 0xF96D, 0xDFE8, 0xF96E, 0xE0F1, 0xF96F, 0xE1AD, + 0xF970, 0xE1ED, 0xF971, 0xE3F5, 0xF972, 0xE4A1, 0xF973, 0xE4A9, 0xF974, 0xE5AE, 0xF975, 0xE5B1, 0xF976, 0xE5B2, 0xF977, 0xE5B9, + 0xF978, 0xE5BB, 0xF979, 0xE5BC, 0xF97A, 0xE5C4, 0xF97B, 0xE5CE, 0xF97C, 0xE5D0, 0xF97D, 0xE5D2, 0xF97E, 0xE5D6, 0xF97F, 0xE5FA, + 0xF980, 0xE5FB, 0xF981, 0xE5FC, 0xF982, 0xE5FE, 0xF983, 0xE6A1, 0xF984, 0xE6A4, 0xF985, 0xE6A7, 0xF986, 0xE6AD, 0xF987, 0xE6AF, + 0xF988, 0xE6B0, 0xF989, 0xE6B1, 0xF98A, 0xE6B3, 0xF98B, 0xE6B7, 0xF98C, 0xE6B8, 0xF98D, 0xE6BC, 0xF98E, 0xE6C4, 0xF98F, 0xE6C6, + 0xF990, 0xE6C7, 0xF991, 0xE6CA, 0xF992, 0xE6D2, 0xF993, 0xE6D6, 0xF994, 0xE6D9, 0xF995, 0xE6DC, 0xF996, 0xE6DF, 0xF997, 0xE6E1, + 0xF998, 0xE6E4, 0xF999, 0xE6E5, 0xF99A, 0xE6E6, 0xF99B, 0xE6E8, 0xF99C, 0xE6EA, 0xF99D, 0xE6EB, 0xF99E, 0xE6EC, 0xF99F, 0xE6EF, + 0xF9A0, 0xE6F1, 0xF9A1, 0xE6F2, 0xF9A2, 0xE6F5, 0xF9A3, 0xE6F6, 0xF9A4, 0xE6F7, 0xF9A5, 0xE6F9, 0xF9A6, 0xE7A1, 0xF9A7, 0xE7A6, + 0xF9A8, 0xE7A9, 0xF9A9, 0xE7AA, 0xF9AA, 0xE7AC, 0xF9AB, 0xE7AD, 0xF9AC, 0xE7B0, 0xF9AD, 0xE7BF, 0xF9AE, 0xE7C1, 0xF9AF, 0xE7C6, + 0xF9B0, 0xE7C7, 0xF9B1, 0xE7CB, 0xF9B2, 0xE7CD, 0xF9B3, 0xE7CF, 0xF9B4, 0xE7D0, 0xF9B5, 0xE7D3, 0xF9B6, 0xE7DF, 0xF9B7, 0xE7E4, + 0xF9B8, 0xE7E6, 0xF9B9, 0xE7F7, 0xF9BA, 0xE8E7, 0xF9BB, 0xE8E8, 0xF9BC, 0xE8F0, 0xF9BD, 0xE8F1, 0xF9BE, 0xE8F7, 0xF9BF, 0xE8F9, + 0xF9C0, 0xE8FB, 0xF9C1, 0xE8FE, 0xF9C2, 0xE9A7, 0xF9C3, 0xE9AC, 0xF9C4, 0xE9CC, 0xF9C5, 0xE9F7, 0xF9C6, 0xEAC1, 0xF9C7, 0xEAE5, + 0xF9C8, 0xEAF4, 0xF9C9, 0xEAF7, 0xF9CA, 0xEAFC, 0xF9CB, 0xEAFE, 0xF9CC, 0xEBA4, 0xF9CD, 0xEBA7, 0xF9CE, 0xEBA9, 0xF9CF, 0xEBAA, + 0xF9D0, 0xEBBA, 0xF9D1, 0xEBBB, 0xF9D2, 0xEBBD, 0xF9D3, 0xEBC1, 0xF9D4, 0xEBC2, 0xF9D5, 0xEBC6, 0xF9D6, 0xEBC7, 0xF9D7, 0xEBCC, + 0xF9D8, 0xEBCF, 0xF9D9, 0xEBD0, 0xF9DA, 0xEBD1, 0xF9DB, 0xEBD2, 0xF9DC, 0xEBD8, 0xF9DD, 0xECA6, 0xF9DE, 0xECA7, 0xF9DF, 0xECAA, + 0xF9E0, 0xECAF, 0xF9E1, 0xECB0, 0xF9E2, 0xECB1, 0xF9E3, 0xECB2, 0xF9E4, 0xECB5, 0xF9E5, 0xECB8, 0xF9E6, 0xECBA, 0xF9E7, 0xECC0, + 0xF9E8, 0xECC1, 0xF9E9, 0xECC5, 0xF9EA, 0xECC6, 0xF9EB, 0xECC9, 0xF9EC, 0xECCA, 0xF9ED, 0xECD5, 0xF9EE, 0xECDD, 0xF9EF, 0xECDE, + 0xF9F0, 0xECE1, 0xF9F1, 0xECE4, 0xF9F2, 0xECE7, 0xF9F3, 0xECE8, 0xF9F4, 0xECF7, 0xF9F5, 0xECF8, 0xF9F6, 0xECFA, 0xF9F7, 0xEDA1, + 0xF9F8, 0xEDA2, 0xF9F9, 0xEDA3, 0xF9FA, 0xEDEE, 0xF9FB, 0xEEDB, 0xF9FC, 0xF2BD, 0xF9FD, 0xF2FA, 0xF9FE, 0xF3B1, 0xF9FF, 0xF4A7, + 0xFA00, 0xF4EE, 0xFA01, 0xF6F4, 0xFA02, 0xF6F6, 0xFA03, 0xF7B8, 0xFA04, 0xF7C8, 0xFA05, 0xF7D3, 0xFA06, 0xF8DB, 0xFA07, 0xF8F0, + 0xFA08, 0xFAA1, 0xFA09, 0xFAA2, 0xFA0A, 0xFAE6, 0xFA0B, 0xFCA9, 0xFF01, 0xA3A1, 0xFF02, 0xA3A2, 0xFF03, 0xA3A3, 0xFF04, 0xA3A4, + 0xFF05, 0xA3A5, 0xFF06, 0xA3A6, 0xFF07, 0xA3A7, 0xFF08, 0xA3A8, 0xFF09, 0xA3A9, 0xFF0A, 0xA3AA, 0xFF0B, 0xA3AB, 0xFF0C, 0xA3AC, + 0xFF0D, 0xA3AD, 0xFF0E, 0xA3AE, 0xFF0F, 0xA3AF, 0xFF10, 0xA3B0, 0xFF11, 0xA3B1, 0xFF12, 0xA3B2, 0xFF13, 0xA3B3, 0xFF14, 0xA3B4, + 0xFF15, 0xA3B5, 0xFF16, 0xA3B6, 0xFF17, 0xA3B7, 0xFF18, 0xA3B8, 0xFF19, 0xA3B9, 0xFF1A, 0xA3BA, 0xFF1B, 0xA3BB, 0xFF1C, 0xA3BC, + 0xFF1D, 0xA3BD, 0xFF1E, 0xA3BE, 0xFF1F, 0xA3BF, 0xFF20, 0xA3C0, 0xFF21, 0xA3C1, 0xFF22, 0xA3C2, 0xFF23, 0xA3C3, 0xFF24, 0xA3C4, + 0xFF25, 0xA3C5, 0xFF26, 0xA3C6, 0xFF27, 0xA3C7, 0xFF28, 0xA3C8, 0xFF29, 0xA3C9, 0xFF2A, 0xA3CA, 0xFF2B, 0xA3CB, 0xFF2C, 0xA3CC, + 0xFF2D, 0xA3CD, 0xFF2E, 0xA3CE, 0xFF2F, 0xA3CF, 0xFF30, 0xA3D0, 0xFF31, 0xA3D1, 0xFF32, 0xA3D2, 0xFF33, 0xA3D3, 0xFF34, 0xA3D4, + 0xFF35, 0xA3D5, 0xFF36, 0xA3D6, 0xFF37, 0xA3D7, 0xFF38, 0xA3D8, 0xFF39, 0xA3D9, 0xFF3A, 0xA3DA, 0xFF3B, 0xA3DB, 0xFF3C, 0xA1AC, + 0xFF3D, 0xA3DD, 0xFF3E, 0xA3DE, 0xFF3F, 0xA3DF, 0xFF40, 0xA3E0, 0xFF41, 0xA3E1, 0xFF42, 0xA3E2, 0xFF43, 0xA3E3, 0xFF44, 0xA3E4, + 0xFF45, 0xA3E5, 0xFF46, 0xA3E6, 0xFF47, 0xA3E7, 0xFF48, 0xA3E8, 0xFF49, 0xA3E9, 0xFF4A, 0xA3EA, 0xFF4B, 0xA3EB, 0xFF4C, 0xA3EC, + 0xFF4D, 0xA3ED, 0xFF4E, 0xA3EE, 0xFF4F, 0xA3EF, 0xFF50, 0xA3F0, 0xFF51, 0xA3F1, 0xFF52, 0xA3F2, 0xFF53, 0xA3F3, 0xFF54, 0xA3F4, + 0xFF55, 0xA3F5, 0xFF56, 0xA3F6, 0xFF57, 0xA3F7, 0xFF58, 0xA3F8, 0xFF59, 0xA3F9, 0xFF5A, 0xA3FA, 0xFF5B, 0xA3FB, 0xFF5C, 0xA3FC, + 0xFF5D, 0xA3FD, 0xFF5E, 0xA2A6, 0xFFE0, 0xA1CB, 0xFFE1, 0xA1CC, 0xFFE2, 0xA1FE, 0xFFE3, 0xA3FE, 0xFFE5, 0xA1CD, 0xFFE6, 0xA3DC, + 0, 0 +}; + +static const WCHAR oem2uni949[] = { /* Korean --> Unicode pairs */ + 0x8141, 0xAC02, 0x8142, 0xAC03, 0x8143, 0xAC05, 0x8144, 0xAC06, 0x8145, 0xAC0B, 0x8146, 0xAC0C, 0x8147, 0xAC0D, 0x8148, 0xAC0E, + 0x8149, 0xAC0F, 0x814A, 0xAC18, 0x814B, 0xAC1E, 0x814C, 0xAC1F, 0x814D, 0xAC21, 0x814E, 0xAC22, 0x814F, 0xAC23, 0x8150, 0xAC25, + 0x8151, 0xAC26, 0x8152, 0xAC27, 0x8153, 0xAC28, 0x8154, 0xAC29, 0x8155, 0xAC2A, 0x8156, 0xAC2B, 0x8157, 0xAC2E, 0x8158, 0xAC32, + 0x8159, 0xAC33, 0x815A, 0xAC34, 0x8161, 0xAC35, 0x8162, 0xAC36, 0x8163, 0xAC37, 0x8164, 0xAC3A, 0x8165, 0xAC3B, 0x8166, 0xAC3D, + 0x8167, 0xAC3E, 0x8168, 0xAC3F, 0x8169, 0xAC41, 0x816A, 0xAC42, 0x816B, 0xAC43, 0x816C, 0xAC44, 0x816D, 0xAC45, 0x816E, 0xAC46, + 0x816F, 0xAC47, 0x8170, 0xAC48, 0x8171, 0xAC49, 0x8172, 0xAC4A, 0x8173, 0xAC4C, 0x8174, 0xAC4E, 0x8175, 0xAC4F, 0x8176, 0xAC50, + 0x8177, 0xAC51, 0x8178, 0xAC52, 0x8179, 0xAC53, 0x817A, 0xAC55, 0x8181, 0xAC56, 0x8182, 0xAC57, 0x8183, 0xAC59, 0x8184, 0xAC5A, + 0x8185, 0xAC5B, 0x8186, 0xAC5D, 0x8187, 0xAC5E, 0x8188, 0xAC5F, 0x8189, 0xAC60, 0x818A, 0xAC61, 0x818B, 0xAC62, 0x818C, 0xAC63, + 0x818D, 0xAC64, 0x818E, 0xAC65, 0x818F, 0xAC66, 0x8190, 0xAC67, 0x8191, 0xAC68, 0x8192, 0xAC69, 0x8193, 0xAC6A, 0x8194, 0xAC6B, + 0x8195, 0xAC6C, 0x8196, 0xAC6D, 0x8197, 0xAC6E, 0x8198, 0xAC6F, 0x8199, 0xAC72, 0x819A, 0xAC73, 0x819B, 0xAC75, 0x819C, 0xAC76, + 0x819D, 0xAC79, 0x819E, 0xAC7B, 0x819F, 0xAC7C, 0x81A0, 0xAC7D, 0x81A1, 0xAC7E, 0x81A2, 0xAC7F, 0x81A3, 0xAC82, 0x81A4, 0xAC87, + 0x81A5, 0xAC88, 0x81A6, 0xAC8D, 0x81A7, 0xAC8E, 0x81A8, 0xAC8F, 0x81A9, 0xAC91, 0x81AA, 0xAC92, 0x81AB, 0xAC93, 0x81AC, 0xAC95, + 0x81AD, 0xAC96, 0x81AE, 0xAC97, 0x81AF, 0xAC98, 0x81B0, 0xAC99, 0x81B1, 0xAC9A, 0x81B2, 0xAC9B, 0x81B3, 0xAC9E, 0x81B4, 0xACA2, + 0x81B5, 0xACA3, 0x81B6, 0xACA4, 0x81B7, 0xACA5, 0x81B8, 0xACA6, 0x81B9, 0xACA7, 0x81BA, 0xACAB, 0x81BB, 0xACAD, 0x81BC, 0xACAE, + 0x81BD, 0xACB1, 0x81BE, 0xACB2, 0x81BF, 0xACB3, 0x81C0, 0xACB4, 0x81C1, 0xACB5, 0x81C2, 0xACB6, 0x81C3, 0xACB7, 0x81C4, 0xACBA, + 0x81C5, 0xACBE, 0x81C6, 0xACBF, 0x81C7, 0xACC0, 0x81C8, 0xACC2, 0x81C9, 0xACC3, 0x81CA, 0xACC5, 0x81CB, 0xACC6, 0x81CC, 0xACC7, + 0x81CD, 0xACC9, 0x81CE, 0xACCA, 0x81CF, 0xACCB, 0x81D0, 0xACCD, 0x81D1, 0xACCE, 0x81D2, 0xACCF, 0x81D3, 0xACD0, 0x81D4, 0xACD1, + 0x81D5, 0xACD2, 0x81D6, 0xACD3, 0x81D7, 0xACD4, 0x81D8, 0xACD6, 0x81D9, 0xACD8, 0x81DA, 0xACD9, 0x81DB, 0xACDA, 0x81DC, 0xACDB, + 0x81DD, 0xACDC, 0x81DE, 0xACDD, 0x81DF, 0xACDE, 0x81E0, 0xACDF, 0x81E1, 0xACE2, 0x81E2, 0xACE3, 0x81E3, 0xACE5, 0x81E4, 0xACE6, + 0x81E5, 0xACE9, 0x81E6, 0xACEB, 0x81E7, 0xACED, 0x81E8, 0xACEE, 0x81E9, 0xACF2, 0x81EA, 0xACF4, 0x81EB, 0xACF7, 0x81EC, 0xACF8, + 0x81ED, 0xACF9, 0x81EE, 0xACFA, 0x81EF, 0xACFB, 0x81F0, 0xACFE, 0x81F1, 0xACFF, 0x81F2, 0xAD01, 0x81F3, 0xAD02, 0x81F4, 0xAD03, + 0x81F5, 0xAD05, 0x81F6, 0xAD07, 0x81F7, 0xAD08, 0x81F8, 0xAD09, 0x81F9, 0xAD0A, 0x81FA, 0xAD0B, 0x81FB, 0xAD0E, 0x81FC, 0xAD10, + 0x81FD, 0xAD12, 0x81FE, 0xAD13, 0x8241, 0xAD14, 0x8242, 0xAD15, 0x8243, 0xAD16, 0x8244, 0xAD17, 0x8245, 0xAD19, 0x8246, 0xAD1A, + 0x8247, 0xAD1B, 0x8248, 0xAD1D, 0x8249, 0xAD1E, 0x824A, 0xAD1F, 0x824B, 0xAD21, 0x824C, 0xAD22, 0x824D, 0xAD23, 0x824E, 0xAD24, + 0x824F, 0xAD25, 0x8250, 0xAD26, 0x8251, 0xAD27, 0x8252, 0xAD28, 0x8253, 0xAD2A, 0x8254, 0xAD2B, 0x8255, 0xAD2E, 0x8256, 0xAD2F, + 0x8257, 0xAD30, 0x8258, 0xAD31, 0x8259, 0xAD32, 0x825A, 0xAD33, 0x8261, 0xAD36, 0x8262, 0xAD37, 0x8263, 0xAD39, 0x8264, 0xAD3A, + 0x8265, 0xAD3B, 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0xFAB4, 0x99ED, 0xFAB5, 0x9AB8, 0xFAB6, 0x52BE, 0xFAB7, 0x6838, 0xFAB8, 0x5016, + 0xFAB9, 0x5E78, 0xFABA, 0x674F, 0xFABB, 0x8347, 0xFABC, 0x884C, 0xFABD, 0x4EAB, 0xFABE, 0x5411, 0xFABF, 0x56AE, 0xFAC0, 0x73E6, + 0xFAC1, 0x9115, 0xFAC2, 0x97FF, 0xFAC3, 0x9909, 0xFAC4, 0x9957, 0xFAC5, 0x9999, 0xFAC6, 0x5653, 0xFAC7, 0x589F, 0xFAC8, 0x865B, + 0xFAC9, 0x8A31, 0xFACA, 0x61B2, 0xFACB, 0x6AF6, 0xFACC, 0x737B, 0xFACD, 0x8ED2, 0xFACE, 0x6B47, 0xFACF, 0x96AA, 0xFAD0, 0x9A57, + 0xFAD1, 0x5955, 0xFAD2, 0x7200, 0xFAD3, 0x8D6B, 0xFAD4, 0x9769, 0xFAD5, 0x4FD4, 0xFAD6, 0x5CF4, 0xFAD7, 0x5F26, 0xFAD8, 0x61F8, + 0xFAD9, 0x665B, 0xFADA, 0x6CEB, 0xFADB, 0x70AB, 0xFADC, 0x7384, 0xFADD, 0x73B9, 0xFADE, 0x73FE, 0xFADF, 0x7729, 0xFAE0, 0x774D, + 0xFAE1, 0x7D43, 0xFAE2, 0x7D62, 0xFAE3, 0x7E23, 0xFAE4, 0x8237, 0xFAE5, 0x8852, 0xFAE6, 0xFA0A, 0xFAE7, 0x8CE2, 0xFAE8, 0x9249, + 0xFAE9, 0x986F, 0xFAEA, 0x5B51, 0xFAEB, 0x7A74, 0xFAEC, 0x8840, 0xFAED, 0x9801, 0xFAEE, 0x5ACC, 0xFAEF, 0x4FE0, 0xFAF0, 0x5354, + 0xFAF1, 0x593E, 0xFAF2, 0x5CFD, 0xFAF3, 0x633E, 0xFAF4, 0x6D79, 0xFAF5, 0x72F9, 0xFAF6, 0x8105, 0xFAF7, 0x8107, 0xFAF8, 0x83A2, + 0xFAF9, 0x92CF, 0xFAFA, 0x9830, 0xFAFB, 0x4EA8, 0xFAFC, 0x5144, 0xFAFD, 0x5211, 0xFAFE, 0x578B, 0xFBA1, 0x5F62, 0xFBA2, 0x6CC2, + 0xFBA3, 0x6ECE, 0xFBA4, 0x7005, 0xFBA5, 0x7050, 0xFBA6, 0x70AF, 0xFBA7, 0x7192, 0xFBA8, 0x73E9, 0xFBA9, 0x7469, 0xFBAA, 0x834A, + 0xFBAB, 0x87A2, 0xFBAC, 0x8861, 0xFBAD, 0x9008, 0xFBAE, 0x90A2, 0xFBAF, 0x93A3, 0xFBB0, 0x99A8, 0xFBB1, 0x516E, 0xFBB2, 0x5F57, + 0xFBB3, 0x60E0, 0xFBB4, 0x6167, 0xFBB5, 0x66B3, 0xFBB6, 0x8559, 0xFBB7, 0x8E4A, 0xFBB8, 0x91AF, 0xFBB9, 0x978B, 0xFBBA, 0x4E4E, + 0xFBBB, 0x4E92, 0xFBBC, 0x547C, 0xFBBD, 0x58D5, 0xFBBE, 0x58FA, 0xFBBF, 0x597D, 0xFBC0, 0x5CB5, 0xFBC1, 0x5F27, 0xFBC2, 0x6236, + 0xFBC3, 0x6248, 0xFBC4, 0x660A, 0xFBC5, 0x6667, 0xFBC6, 0x6BEB, 0xFBC7, 0x6D69, 0xFBC8, 0x6DCF, 0xFBC9, 0x6E56, 0xFBCA, 0x6EF8, + 0xFBCB, 0x6F94, 0xFBCC, 0x6FE0, 0xFBCD, 0x6FE9, 0xFBCE, 0x705D, 0xFBCF, 0x72D0, 0xFBD0, 0x7425, 0xFBD1, 0x745A, 0xFBD2, 0x74E0, + 0xFBD3, 0x7693, 0xFBD4, 0x795C, 0xFBD5, 0x7CCA, 0xFBD6, 0x7E1E, 0xFBD7, 0x80E1, 0xFBD8, 0x82A6, 0xFBD9, 0x846B, 0xFBDA, 0x84BF, + 0xFBDB, 0x864E, 0xFBDC, 0x865F, 0xFBDD, 0x8774, 0xFBDE, 0x8B77, 0xFBDF, 0x8C6A, 0xFBE0, 0x93AC, 0xFBE1, 0x9800, 0xFBE2, 0x9865, + 0xFBE3, 0x60D1, 0xFBE4, 0x6216, 0xFBE5, 0x9177, 0xFBE6, 0x5A5A, 0xFBE7, 0x660F, 0xFBE8, 0x6DF7, 0xFBE9, 0x6E3E, 0xFBEA, 0x743F, + 0xFBEB, 0x9B42, 0xFBEC, 0x5FFD, 0xFBED, 0x60DA, 0xFBEE, 0x7B0F, 0xFBEF, 0x54C4, 0xFBF0, 0x5F18, 0xFBF1, 0x6C5E, 0xFBF2, 0x6CD3, + 0xFBF3, 0x6D2A, 0xFBF4, 0x70D8, 0xFBF5, 0x7D05, 0xFBF6, 0x8679, 0xFBF7, 0x8A0C, 0xFBF8, 0x9D3B, 0xFBF9, 0x5316, 0xFBFA, 0x548C, + 0xFBFB, 0x5B05, 0xFBFC, 0x6A3A, 0xFBFD, 0x706B, 0xFBFE, 0x7575, 0xFCA1, 0x798D, 0xFCA2, 0x79BE, 0xFCA3, 0x82B1, 0xFCA4, 0x83EF, + 0xFCA5, 0x8A71, 0xFCA6, 0x8B41, 0xFCA7, 0x8CA8, 0xFCA8, 0x9774, 0xFCA9, 0xFA0B, 0xFCAA, 0x64F4, 0xFCAB, 0x652B, 0xFCAC, 0x78BA, + 0xFCAD, 0x78BB, 0xFCAE, 0x7A6B, 0xFCAF, 0x4E38, 0xFCB0, 0x559A, 0xFCB1, 0x5950, 0xFCB2, 0x5BA6, 0xFCB3, 0x5E7B, 0xFCB4, 0x60A3, + 0xFCB5, 0x63DB, 0xFCB6, 0x6B61, 0xFCB7, 0x6665, 0xFCB8, 0x6853, 0xFCB9, 0x6E19, 0xFCBA, 0x7165, 0xFCBB, 0x74B0, 0xFCBC, 0x7D08, + 0xFCBD, 0x9084, 0xFCBE, 0x9A69, 0xFCBF, 0x9C25, 0xFCC0, 0x6D3B, 0xFCC1, 0x6ED1, 0xFCC2, 0x733E, 0xFCC3, 0x8C41, 0xFCC4, 0x95CA, + 0xFCC5, 0x51F0, 0xFCC6, 0x5E4C, 0xFCC7, 0x5FA8, 0xFCC8, 0x604D, 0xFCC9, 0x60F6, 0xFCCA, 0x6130, 0xFCCB, 0x614C, 0xFCCC, 0x6643, + 0xFCCD, 0x6644, 0xFCCE, 0x69A5, 0xFCCF, 0x6CC1, 0xFCD0, 0x6E5F, 0xFCD1, 0x6EC9, 0xFCD2, 0x6F62, 0xFCD3, 0x714C, 0xFCD4, 0x749C, + 0xFCD5, 0x7687, 0xFCD6, 0x7BC1, 0xFCD7, 0x7C27, 0xFCD8, 0x8352, 0xFCD9, 0x8757, 0xFCDA, 0x9051, 0xFCDB, 0x968D, 0xFCDC, 0x9EC3, + 0xFCDD, 0x532F, 0xFCDE, 0x56DE, 0xFCDF, 0x5EFB, 0xFCE0, 0x5F8A, 0xFCE1, 0x6062, 0xFCE2, 0x6094, 0xFCE3, 0x61F7, 0xFCE4, 0x6666, + 0xFCE5, 0x6703, 0xFCE6, 0x6A9C, 0xFCE7, 0x6DEE, 0xFCE8, 0x6FAE, 0xFCE9, 0x7070, 0xFCEA, 0x736A, 0xFCEB, 0x7E6A, 0xFCEC, 0x81BE, + 0xFCED, 0x8334, 0xFCEE, 0x86D4, 0xFCEF, 0x8AA8, 0xFCF0, 0x8CC4, 0xFCF1, 0x5283, 0xFCF2, 0x7372, 0xFCF3, 0x5B96, 0xFCF4, 0x6A6B, + 0xFCF5, 0x9404, 0xFCF6, 0x54EE, 0xFCF7, 0x5686, 0xFCF8, 0x5B5D, 0xFCF9, 0x6548, 0xFCFA, 0x6585, 0xFCFB, 0x66C9, 0xFCFC, 0x689F, + 0xFCFD, 0x6D8D, 0xFCFE, 0x6DC6, 0xFDA1, 0x723B, 0xFDA2, 0x80B4, 0xFDA3, 0x9175, 0xFDA4, 0x9A4D, 0xFDA5, 0x4FAF, 0xFDA6, 0x5019, + 0xFDA7, 0x539A, 0xFDA8, 0x540E, 0xFDA9, 0x543C, 0xFDAA, 0x5589, 0xFDAB, 0x55C5, 0xFDAC, 0x5E3F, 0xFDAD, 0x5F8C, 0xFDAE, 0x673D, + 0xFDAF, 0x7166, 0xFDB0, 0x73DD, 0xFDB1, 0x9005, 0xFDB2, 0x52DB, 0xFDB3, 0x52F3, 0xFDB4, 0x5864, 0xFDB5, 0x58CE, 0xFDB6, 0x7104, + 0xFDB7, 0x718F, 0xFDB8, 0x71FB, 0xFDB9, 0x85B0, 0xFDBA, 0x8A13, 0xFDBB, 0x6688, 0xFDBC, 0x85A8, 0xFDBD, 0x55A7, 0xFDBE, 0x6684, + 0xFDBF, 0x714A, 0xFDC0, 0x8431, 0xFDC1, 0x5349, 0xFDC2, 0x5599, 0xFDC3, 0x6BC1, 0xFDC4, 0x5F59, 0xFDC5, 0x5FBD, 0xFDC6, 0x63EE, + 0xFDC7, 0x6689, 0xFDC8, 0x7147, 0xFDC9, 0x8AF1, 0xFDCA, 0x8F1D, 0xFDCB, 0x9EBE, 0xFDCC, 0x4F11, 0xFDCD, 0x643A, 0xFDCE, 0x70CB, + 0xFDCF, 0x7566, 0xFDD0, 0x8667, 0xFDD1, 0x6064, 0xFDD2, 0x8B4E, 0xFDD3, 0x9DF8, 0xFDD4, 0x5147, 0xFDD5, 0x51F6, 0xFDD6, 0x5308, + 0xFDD7, 0x6D36, 0xFDD8, 0x80F8, 0xFDD9, 0x9ED1, 0xFDDA, 0x6615, 0xFDDB, 0x6B23, 0xFDDC, 0x7098, 0xFDDD, 0x75D5, 0xFDDE, 0x5403, + 0xFDDF, 0x5C79, 0xFDE0, 0x7D07, 0xFDE1, 0x8A16, 0xFDE2, 0x6B20, 0xFDE3, 0x6B3D, 0xFDE4, 0x6B46, 0xFDE5, 0x5438, 0xFDE6, 0x6070, + 0xFDE7, 0x6D3D, 0xFDE8, 0x7FD5, 0xFDE9, 0x8208, 0xFDEA, 0x50D6, 0xFDEB, 0x51DE, 0xFDEC, 0x559C, 0xFDED, 0x566B, 0xFDEE, 0x56CD, + 0xFDEF, 0x59EC, 0xFDF0, 0x5B09, 0xFDF1, 0x5E0C, 0xFDF2, 0x6199, 0xFDF3, 0x6198, 0xFDF4, 0x6231, 0xFDF5, 0x665E, 0xFDF6, 0x66E6, + 0xFDF7, 0x7199, 0xFDF8, 0x71B9, 0xFDF9, 0x71BA, 0xFDFA, 0x72A7, 0xFDFB, 0x79A7, 0xFDFC, 0x7A00, 0xFDFD, 0x7FB2, 0xFDFE, 0x8A70, + 0, 0 +}; +#endif + +#if FF_CODE_PAGE == 950 || FF_CODE_PAGE == 0 /* Traditional Chinese */ +static const WCHAR uni2oem950[] = { /* Unicode --> Big5 pairs */ + 0x00A7, 0xA1B1, 0x00AF, 0xA1C2, 0x00B0, 0xA258, 0x00B1, 0xA1D3, 0x00B7, 0xA150, 0x00D7, 0xA1D1, 0x00F7, 0xA1D2, 0x02C7, 0xA3BE, + 0x02C9, 0xA3BC, 0x02CA, 0xA3BD, 0x02CB, 0xA3BF, 0x02CD, 0xA1C5, 0x02D9, 0xA3BB, 0x0391, 0xA344, 0x0392, 0xA345, 0x0393, 0xA346, + 0x0394, 0xA347, 0x0395, 0xA348, 0x0396, 0xA349, 0x0397, 0xA34A, 0x0398, 0xA34B, 0x0399, 0xA34C, 0x039A, 0xA34D, 0x039B, 0xA34E, + 0x039C, 0xA34F, 0x039D, 0xA350, 0x039E, 0xA351, 0x039F, 0xA352, 0x03A0, 0xA353, 0x03A1, 0xA354, 0x03A3, 0xA355, 0x03A4, 0xA356, + 0x03A5, 0xA357, 0x03A6, 0xA358, 0x03A7, 0xA359, 0x03A8, 0xA35A, 0x03A9, 0xA35B, 0x03B1, 0xA35C, 0x03B2, 0xA35D, 0x03B3, 0xA35E, + 0x03B4, 0xA35F, 0x03B5, 0xA360, 0x03B6, 0xA361, 0x03B7, 0xA362, 0x03B8, 0xA363, 0x03B9, 0xA364, 0x03BA, 0xA365, 0x03BB, 0xA366, + 0x03BC, 0xA367, 0x03BD, 0xA368, 0x03BE, 0xA369, 0x03BF, 0xA36A, 0x03C0, 0xA36B, 0x03C1, 0xA36C, 0x03C3, 0xA36D, 0x03C4, 0xA36E, + 0x03C5, 0xA36F, 0x03C6, 0xA370, 0x03C7, 0xA371, 0x03C8, 0xA372, 0x03C9, 0xA373, 0x2013, 0xA156, 0x2014, 0xA158, 0x2018, 0xA1A5, + 0x2019, 0xA1A6, 0x201C, 0xA1A7, 0x201D, 0xA1A8, 0x2025, 0xA14C, 0x2026, 0xA14B, 0x2027, 0xA145, 0x2032, 0xA1AC, 0x2035, 0xA1AB, + 0x203B, 0xA1B0, 0x20AC, 0xA3E1, 0x2103, 0xA24A, 0x2105, 0xA1C1, 0x2109, 0xA24B, 0x2160, 0xA2B9, 0x2161, 0xA2BA, 0x2162, 0xA2BB, + 0x2163, 0xA2BC, 0x2164, 0xA2BD, 0x2165, 0xA2BE, 0x2166, 0xA2BF, 0x2167, 0xA2C0, 0x2168, 0xA2C1, 0x2169, 0xA2C2, 0x2190, 0xA1F6, + 0x2191, 0xA1F4, 0x2192, 0xA1F7, 0x2193, 0xA1F5, 0x2196, 0xA1F8, 0x2197, 0xA1F9, 0x2198, 0xA1FB, 0x2199, 0xA1FA, 0x2215, 0xA241, + 0x221A, 0xA1D4, 0x221E, 0xA1DB, 0x221F, 0xA1E8, 0x2220, 0xA1E7, 0x2223, 0xA1FD, 0x2225, 0xA1FC, 0x2229, 0xA1E4, 0x222A, 0xA1E5, + 0x222B, 0xA1EC, 0x222E, 0xA1ED, 0x2234, 0xA1EF, 0x2235, 0xA1EE, 0x2252, 0xA1DC, 0x2260, 0xA1DA, 0x2261, 0xA1DD, 0x2266, 0xA1D8, + 0x2267, 0xA1D9, 0x2295, 0xA1F2, 0x2299, 0xA1F3, 0x22A5, 0xA1E6, 0x22BF, 0xA1E9, 0x2500, 0xA277, 0x2502, 0xA278, 0x250C, 0xA27A, + 0x2510, 0xA27B, 0x2514, 0xA27C, 0x2518, 0xA27D, 0x251C, 0xA275, 0x2524, 0xA274, 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0xC24C, 0x9EDC, 0xC24A, 0x9EDD, 0xC24B, 0x9EDE, 0xC249, 0x9EDF, 0xF1E0, 0x9EE0, 0xC35C, 0x9EE4, 0xF5B5, 0x9EE5, 0xF5B4, + 0x9EE6, 0xF5B7, 0x9EE7, 0xF5B6, 0x9EE8, 0xC4D2, 0x9EEB, 0xF6CB, 0x9EED, 0xF6CD, 0x9EEE, 0xF6CC, 0x9EEF, 0xC566, 0x9EF0, 0xF7C8, + 0x9EF2, 0xF876, 0x9EF3, 0xF877, 0x9EF4, 0xC5F0, 0x9EF5, 0xF964, 0x9EF6, 0xF97D, 0x9EF7, 0xC675, 0x9EF9, 0xDCB0, 0x9EFA, 0xECB6, + 0x9EFB, 0xEFB0, 0x9EFC, 0xF3F5, 0x9EFD, 0xE0EF, 0x9EFF, 0xEFB1, 0x9F00, 0xF1E2, 0x9F01, 0xF1E1, 0x9F06, 0xF878, 0x9F07, 0xC652, + 0x9F09, 0xF965, 0x9F0A, 0xF97E, 0x9F0E, 0xB9A9, 0x9F0F, 0xE8F2, 0x9F10, 0xE8F3, 0x9F12, 0xECB7, 0x9F13, 0xB9AA, 0x9F15, 0xC35D, + 0x9F16, 0xF1E3, 0x9F18, 0xF6CF, 0x9F19, 0xC567, 0x9F1A, 0xF6D0, 0x9F1B, 0xF6CE, 0x9F1C, 0xF879, 0x9F1E, 0xF8E9, 0x9F20, 0xB9AB, + 0x9F22, 0xEFB4, 0x9F23, 0xEFB3, 0x9F24, 0xEFB2, 0x9F25, 0xF1E4, 0x9F28, 0xF1E8, 0x9F29, 0xF1E7, 0x9F2A, 0xF1E6, 0x9F2B, 0xF1E5, + 0x9F2C, 0xC35E, 0x9F2D, 0xF3F6, 0x9F2E, 0xF5B9, 0x9F2F, 0xC4D3, 0x9F30, 0xF5B8, 0x9F31, 0xF6D1, 0x9F32, 0xF7CB, 0x9F33, 0xF7CA, + 0x9F34, 0xC5C4, 0x9F35, 0xF7C9, 0x9F36, 0xF87C, 0x9F37, 0xF87B, 0x9F38, 0xF87A, 0x9F3B, 0xBBF3, 0x9F3D, 0xECB8, 0x9F3E, 0xC24D, + 0x9F40, 0xF3F7, 0x9F41, 0xF3F8, 0x9F42, 0xF7CC, 0x9F43, 0xF87D, 0x9F46, 0xF8EA, 0x9F47, 0xF966, 0x9F48, 0xF9B9, 0x9F49, 0xF9D4, + 0x9F4A, 0xBBF4, 0x9F4B, 0xC24E, 0x9F4C, 0xF1E9, 0x9F4D, 0xF3F9, 0x9F4E, 0xF6D2, 0x9F4F, 0xF87E, 0x9F52, 0xBEA6, 0x9F54, 0xEFB5, + 0x9F55, 0xF1EA, 0x9F56, 0xF3FA, 0x9F57, 0xF3FB, 0x9F58, 0xF3FC, 0x9F59, 0xF5BE, 0x9F5B, 0xF5BA, 0x9F5C, 0xC568, 0x9F5D, 0xF5BD, + 0x9F5E, 0xF5BC, 0x9F5F, 0xC4D4, 0x9F60, 0xF5BB, 0x9F61, 0xC4D6, 0x9F63, 0xC4D5, 0x9F64, 0xF6D4, 0x9F65, 0xF6D3, 0x9F66, 0xC569, + 0x9F67, 0xC56A, 0x9F6A, 0xC5C6, 0x9F6B, 0xF7CD, 0x9F6C, 0xC5C5, 0x9F6E, 0xF8A3, 0x9F6F, 0xF8A4, 0x9F70, 0xF8A2, 0x9F71, 0xF8A1, + 0x9F72, 0xC654, 0x9F74, 0xF8EB, 0x9F75, 0xF8EC, 0x9F76, 0xF8ED, 0x9F77, 0xC653, 0x9F78, 0xF967, 0x9F79, 0xF96A, 0x9F7A, 0xF969, + 0x9F7B, 0xF968, 0x9F7E, 0xF9D3, 0x9F8D, 0xC073, 0x9F90, 0xC365, 0x9F91, 0xF5BF, 0x9F92, 0xF6D5, 0x9F94, 0xC5C7, 0x9F95, 0xF7CE, + 0x9F98, 0xF9D5, 0x9F9C, 0xC074, 0x9FA0, 0xEFB6, 0x9FA2, 0xF7CF, 0x9FA4, 0xF9A1, 0xFA0C, 0xC94A, 0xFA0D, 0xDDFC, 0xFE30, 0xA14A, + 0xFE31, 0xA157, 0xFE33, 0xA159, 0xFE34, 0xA15B, 0xFE35, 0xA15F, 0xFE36, 0xA160, 0xFE37, 0xA163, 0xFE38, 0xA164, 0xFE39, 0xA167, + 0xFE3A, 0xA168, 0xFE3B, 0xA16B, 0xFE3C, 0xA16C, 0xFE3D, 0xA16F, 0xFE3E, 0xA170, 0xFE3F, 0xA173, 0xFE40, 0xA174, 0xFE41, 0xA177, + 0xFE42, 0xA178, 0xFE43, 0xA17B, 0xFE44, 0xA17C, 0xFE49, 0xA1C6, 0xFE4A, 0xA1C7, 0xFE4B, 0xA1CA, 0xFE4C, 0xA1CB, 0xFE4D, 0xA1C8, + 0xFE4E, 0xA1C9, 0xFE4F, 0xA15C, 0xFE50, 0xA14D, 0xFE51, 0xA14E, 0xFE52, 0xA14F, 0xFE54, 0xA151, 0xFE55, 0xA152, 0xFE56, 0xA153, + 0xFE57, 0xA154, 0xFE59, 0xA17D, 0xFE5A, 0xA17E, 0xFE5B, 0xA1A1, 0xFE5C, 0xA1A2, 0xFE5D, 0xA1A3, 0xFE5E, 0xA1A4, 0xFE5F, 0xA1CC, + 0xFE60, 0xA1CD, 0xFE61, 0xA1CE, 0xFE62, 0xA1DE, 0xFE63, 0xA1DF, 0xFE64, 0xA1E0, 0xFE65, 0xA1E1, 0xFE66, 0xA1E2, 0xFE68, 0xA242, + 0xFE69, 0xA24C, 0xFE6A, 0xA24D, 0xFE6B, 0xA24E, 0xFF01, 0xA149, 0xFF03, 0xA1AD, 0xFF04, 0xA243, 0xFF05, 0xA248, 0xFF06, 0xA1AE, + 0xFF08, 0xA15D, 0xFF09, 0xA15E, 0xFF0A, 0xA1AF, 0xFF0B, 0xA1CF, 0xFF0C, 0xA141, 0xFF0D, 0xA1D0, 0xFF0E, 0xA144, 0xFF0F, 0xA1FE, + 0xFF10, 0xA2AF, 0xFF11, 0xA2B0, 0xFF12, 0xA2B1, 0xFF13, 0xA2B2, 0xFF14, 0xA2B3, 0xFF15, 0xA2B4, 0xFF16, 0xA2B5, 0xFF17, 0xA2B6, + 0xFF18, 0xA2B7, 0xFF19, 0xA2B8, 0xFF1A, 0xA147, 0xFF1B, 0xA146, 0xFF1C, 0xA1D5, 0xFF1D, 0xA1D7, 0xFF1E, 0xA1D6, 0xFF1F, 0xA148, + 0xFF20, 0xA249, 0xFF21, 0xA2CF, 0xFF22, 0xA2D0, 0xFF23, 0xA2D1, 0xFF24, 0xA2D2, 0xFF25, 0xA2D3, 0xFF26, 0xA2D4, 0xFF27, 0xA2D5, + 0xFF28, 0xA2D6, 0xFF29, 0xA2D7, 0xFF2A, 0xA2D8, 0xFF2B, 0xA2D9, 0xFF2C, 0xA2DA, 0xFF2D, 0xA2DB, 0xFF2E, 0xA2DC, 0xFF2F, 0xA2DD, + 0xFF30, 0xA2DE, 0xFF31, 0xA2DF, 0xFF32, 0xA2E0, 0xFF33, 0xA2E1, 0xFF34, 0xA2E2, 0xFF35, 0xA2E3, 0xFF36, 0xA2E4, 0xFF37, 0xA2E5, + 0xFF38, 0xA2E6, 0xFF39, 0xA2E7, 0xFF3A, 0xA2E8, 0xFF3C, 0xA240, 0xFF3F, 0xA1C4, 0xFF41, 0xA2E9, 0xFF42, 0xA2EA, 0xFF43, 0xA2EB, + 0xFF44, 0xA2EC, 0xFF45, 0xA2ED, 0xFF46, 0xA2EE, 0xFF47, 0xA2EF, 0xFF48, 0xA2F0, 0xFF49, 0xA2F1, 0xFF4A, 0xA2F2, 0xFF4B, 0xA2F3, + 0xFF4C, 0xA2F4, 0xFF4D, 0xA2F5, 0xFF4E, 0xA2F6, 0xFF4F, 0xA2F7, 0xFF50, 0xA2F8, 0xFF51, 0xA2F9, 0xFF52, 0xA2FA, 0xFF53, 0xA2FB, + 0xFF54, 0xA2FC, 0xFF55, 0xA2FD, 0xFF56, 0xA2FE, 0xFF57, 0xA340, 0xFF58, 0xA341, 0xFF59, 0xA342, 0xFF5A, 0xA343, 0xFF5B, 0xA161, + 0xFF5C, 0xA155, 0xFF5D, 0xA162, 0xFF5E, 0xA1E3, 0xFFE0, 0xA246, 0xFFE1, 0xA247, 0xFFE3, 0xA1C3, 0xFFE5, 0xA244, 0, 0 +}; + +static const WCHAR oem2uni950[] = { /* Big5 --> Unicode pairs */ + 0xA140, 0x3000, 0xA141, 0xFF0C, 0xA142, 0x3001, 0xA143, 0x3002, 0xA144, 0xFF0E, 0xA145, 0x2027, 0xA146, 0xFF1B, 0xA147, 0xFF1A, + 0xA148, 0xFF1F, 0xA149, 0xFF01, 0xA14A, 0xFE30, 0xA14B, 0x2026, 0xA14C, 0x2025, 0xA14D, 0xFE50, 0xA14E, 0xFE51, 0xA14F, 0xFE52, + 0xA150, 0x00B7, 0xA151, 0xFE54, 0xA152, 0xFE55, 0xA153, 0xFE56, 0xA154, 0xFE57, 0xA155, 0xFF5C, 0xA156, 0x2013, 0xA157, 0xFE31, + 0xA158, 0x2014, 0xA159, 0xFE33, 0xA15A, 0x2574, 0xA15B, 0xFE34, 0xA15C, 0xFE4F, 0xA15D, 0xFF08, 0xA15E, 0xFF09, 0xA15F, 0xFE35, + 0xA160, 0xFE36, 0xA161, 0xFF5B, 0xA162, 0xFF5D, 0xA163, 0xFE37, 0xA164, 0xFE38, 0xA165, 0x3014, 0xA166, 0x3015, 0xA167, 0xFE39, + 0xA168, 0xFE3A, 0xA169, 0x3010, 0xA16A, 0x3011, 0xA16B, 0xFE3B, 0xA16C, 0xFE3C, 0xA16D, 0x300A, 0xA16E, 0x300B, 0xA16F, 0xFE3D, + 0xA170, 0xFE3E, 0xA171, 0x3008, 0xA172, 0x3009, 0xA173, 0xFE3F, 0xA174, 0xFE40, 0xA175, 0x300C, 0xA176, 0x300D, 0xA177, 0xFE41, + 0xA178, 0xFE42, 0xA179, 0x300E, 0xA17A, 0x300F, 0xA17B, 0xFE43, 0xA17C, 0xFE44, 0xA17D, 0xFE59, 0xA17E, 0xFE5A, 0xA1A1, 0xFE5B, + 0xA1A2, 0xFE5C, 0xA1A3, 0xFE5D, 0xA1A4, 0xFE5E, 0xA1A5, 0x2018, 0xA1A6, 0x2019, 0xA1A7, 0x201C, 0xA1A8, 0x201D, 0xA1A9, 0x301D, + 0xA1AA, 0x301E, 0xA1AB, 0x2035, 0xA1AC, 0x2032, 0xA1AD, 0xFF03, 0xA1AE, 0xFF06, 0xA1AF, 0xFF0A, 0xA1B0, 0x203B, 0xA1B1, 0x00A7, + 0xA1B2, 0x3003, 0xA1B3, 0x25CB, 0xA1B4, 0x25CF, 0xA1B5, 0x25B3, 0xA1B6, 0x25B2, 0xA1B7, 0x25CE, 0xA1B8, 0x2606, 0xA1B9, 0x2605, + 0xA1BA, 0x25C7, 0xA1BB, 0x25C6, 0xA1BC, 0x25A1, 0xA1BD, 0x25A0, 0xA1BE, 0x25BD, 0xA1BF, 0x25BC, 0xA1C0, 0x32A3, 0xA1C1, 0x2105, + 0xA1C2, 0x00AF, 0xA1C3, 0xFFE3, 0xA1C4, 0xFF3F, 0xA1C5, 0x02CD, 0xA1C6, 0xFE49, 0xA1C7, 0xFE4A, 0xA1C8, 0xFE4D, 0xA1C9, 0xFE4E, + 0xA1CA, 0xFE4B, 0xA1CB, 0xFE4C, 0xA1CC, 0xFE5F, 0xA1CD, 0xFE60, 0xA1CE, 0xFE61, 0xA1CF, 0xFF0B, 0xA1D0, 0xFF0D, 0xA1D1, 0x00D7, + 0xA1D2, 0x00F7, 0xA1D3, 0x00B1, 0xA1D4, 0x221A, 0xA1D5, 0xFF1C, 0xA1D6, 0xFF1E, 0xA1D7, 0xFF1D, 0xA1D8, 0x2266, 0xA1D9, 0x2267, + 0xA1DA, 0x2260, 0xA1DB, 0x221E, 0xA1DC, 0x2252, 0xA1DD, 0x2261, 0xA1DE, 0xFE62, 0xA1DF, 0xFE63, 0xA1E0, 0xFE64, 0xA1E1, 0xFE65, + 0xA1E2, 0xFE66, 0xA1E3, 0xFF5E, 0xA1E4, 0x2229, 0xA1E5, 0x222A, 0xA1E6, 0x22A5, 0xA1E7, 0x2220, 0xA1E8, 0x221F, 0xA1E9, 0x22BF, + 0xA1EA, 0x33D2, 0xA1EB, 0x33D1, 0xA1EC, 0x222B, 0xA1ED, 0x222E, 0xA1EE, 0x2235, 0xA1EF, 0x2234, 0xA1F0, 0x2640, 0xA1F1, 0x2642, + 0xA1F2, 0x2295, 0xA1F3, 0x2299, 0xA1F4, 0x2191, 0xA1F5, 0x2193, 0xA1F6, 0x2190, 0xA1F7, 0x2192, 0xA1F8, 0x2196, 0xA1F9, 0x2197, + 0xA1FA, 0x2199, 0xA1FB, 0x2198, 0xA1FC, 0x2225, 0xA1FD, 0x2223, 0xA1FE, 0xFF0F, 0xA240, 0xFF3C, 0xA241, 0x2215, 0xA242, 0xFE68, + 0xA243, 0xFF04, 0xA244, 0xFFE5, 0xA245, 0x3012, 0xA246, 0xFFE0, 0xA247, 0xFFE1, 0xA248, 0xFF05, 0xA249, 0xFF20, 0xA24A, 0x2103, + 0xA24B, 0x2109, 0xA24C, 0xFE69, 0xA24D, 0xFE6A, 0xA24E, 0xFE6B, 0xA24F, 0x33D5, 0xA250, 0x339C, 0xA251, 0x339D, 0xA252, 0x339E, + 0xA253, 0x33CE, 0xA254, 0x33A1, 0xA255, 0x338E, 0xA256, 0x338F, 0xA257, 0x33C4, 0xA258, 0x00B0, 0xA259, 0x5159, 0xA25A, 0x515B, + 0xA25B, 0x515E, 0xA25C, 0x515D, 0xA25D, 0x5161, 0xA25E, 0x5163, 0xA25F, 0x55E7, 0xA260, 0x74E9, 0xA261, 0x7CCE, 0xA262, 0x2581, + 0xA263, 0x2582, 0xA264, 0x2583, 0xA265, 0x2584, 0xA266, 0x2585, 0xA267, 0x2586, 0xA268, 0x2587, 0xA269, 0x2588, 0xA26A, 0x258F, + 0xA26B, 0x258E, 0xA26C, 0x258D, 0xA26D, 0x258C, 0xA26E, 0x258B, 0xA26F, 0x258A, 0xA270, 0x2589, 0xA271, 0x253C, 0xA272, 0x2534, + 0xA273, 0x252C, 0xA274, 0x2524, 0xA275, 0x251C, 0xA276, 0x2594, 0xA277, 0x2500, 0xA278, 0x2502, 0xA279, 0x2595, 0xA27A, 0x250C, + 0xA27B, 0x2510, 0xA27C, 0x2514, 0xA27D, 0x2518, 0xA27E, 0x256D, 0xA2A1, 0x256E, 0xA2A2, 0x2570, 0xA2A3, 0x256F, 0xA2A4, 0x2550, + 0xA2A5, 0x255E, 0xA2A6, 0x256A, 0xA2A7, 0x2561, 0xA2A8, 0x25E2, 0xA2A9, 0x25E3, 0xA2AA, 0x25E5, 0xA2AB, 0x25E4, 0xA2AC, 0x2571, + 0xA2AD, 0x2572, 0xA2AE, 0x2573, 0xA2AF, 0xFF10, 0xA2B0, 0xFF11, 0xA2B1, 0xFF12, 0xA2B2, 0xFF13, 0xA2B3, 0xFF14, 0xA2B4, 0xFF15, + 0xA2B5, 0xFF16, 0xA2B6, 0xFF17, 0xA2B7, 0xFF18, 0xA2B8, 0xFF19, 0xA2B9, 0x2160, 0xA2BA, 0x2161, 0xA2BB, 0x2162, 0xA2BC, 0x2163, + 0xA2BD, 0x2164, 0xA2BE, 0x2165, 0xA2BF, 0x2166, 0xA2C0, 0x2167, 0xA2C1, 0x2168, 0xA2C2, 0x2169, 0xA2C3, 0x3021, 0xA2C4, 0x3022, + 0xA2C5, 0x3023, 0xA2C6, 0x3024, 0xA2C7, 0x3025, 0xA2C8, 0x3026, 0xA2C9, 0x3027, 0xA2CA, 0x3028, 0xA2CB, 0x3029, 0xA2CC, 0x5341, + 0xA2CD, 0x5344, 0xA2CE, 0x5345, 0xA2CF, 0xFF21, 0xA2D0, 0xFF22, 0xA2D1, 0xFF23, 0xA2D2, 0xFF24, 0xA2D3, 0xFF25, 0xA2D4, 0xFF26, + 0xA2D5, 0xFF27, 0xA2D6, 0xFF28, 0xA2D7, 0xFF29, 0xA2D8, 0xFF2A, 0xA2D9, 0xFF2B, 0xA2DA, 0xFF2C, 0xA2DB, 0xFF2D, 0xA2DC, 0xFF2E, + 0xA2DD, 0xFF2F, 0xA2DE, 0xFF30, 0xA2DF, 0xFF31, 0xA2E0, 0xFF32, 0xA2E1, 0xFF33, 0xA2E2, 0xFF34, 0xA2E3, 0xFF35, 0xA2E4, 0xFF36, + 0xA2E5, 0xFF37, 0xA2E6, 0xFF38, 0xA2E7, 0xFF39, 0xA2E8, 0xFF3A, 0xA2E9, 0xFF41, 0xA2EA, 0xFF42, 0xA2EB, 0xFF43, 0xA2EC, 0xFF44, + 0xA2ED, 0xFF45, 0xA2EE, 0xFF46, 0xA2EF, 0xFF47, 0xA2F0, 0xFF48, 0xA2F1, 0xFF49, 0xA2F2, 0xFF4A, 0xA2F3, 0xFF4B, 0xA2F4, 0xFF4C, + 0xA2F5, 0xFF4D, 0xA2F6, 0xFF4E, 0xA2F7, 0xFF4F, 0xA2F8, 0xFF50, 0xA2F9, 0xFF51, 0xA2FA, 0xFF52, 0xA2FB, 0xFF53, 0xA2FC, 0xFF54, + 0xA2FD, 0xFF55, 0xA2FE, 0xFF56, 0xA340, 0xFF57, 0xA341, 0xFF58, 0xA342, 0xFF59, 0xA343, 0xFF5A, 0xA344, 0x0391, 0xA345, 0x0392, + 0xA346, 0x0393, 0xA347, 0x0394, 0xA348, 0x0395, 0xA349, 0x0396, 0xA34A, 0x0397, 0xA34B, 0x0398, 0xA34C, 0x0399, 0xA34D, 0x039A, + 0xA34E, 0x039B, 0xA34F, 0x039C, 0xA350, 0x039D, 0xA351, 0x039E, 0xA352, 0x039F, 0xA353, 0x03A0, 0xA354, 0x03A1, 0xA355, 0x03A3, + 0xA356, 0x03A4, 0xA357, 0x03A5, 0xA358, 0x03A6, 0xA359, 0x03A7, 0xA35A, 0x03A8, 0xA35B, 0x03A9, 0xA35C, 0x03B1, 0xA35D, 0x03B2, + 0xA35E, 0x03B3, 0xA35F, 0x03B4, 0xA360, 0x03B5, 0xA361, 0x03B6, 0xA362, 0x03B7, 0xA363, 0x03B8, 0xA364, 0x03B9, 0xA365, 0x03BA, + 0xA366, 0x03BB, 0xA367, 0x03BC, 0xA368, 0x03BD, 0xA369, 0x03BE, 0xA36A, 0x03BF, 0xA36B, 0x03C0, 0xA36C, 0x03C1, 0xA36D, 0x03C3, + 0xA36E, 0x03C4, 0xA36F, 0x03C5, 0xA370, 0x03C6, 0xA371, 0x03C7, 0xA372, 0x03C8, 0xA373, 0x03C9, 0xA374, 0x3105, 0xA375, 0x3106, + 0xA376, 0x3107, 0xA377, 0x3108, 0xA378, 0x3109, 0xA379, 0x310A, 0xA37A, 0x310B, 0xA37B, 0x310C, 0xA37C, 0x310D, 0xA37D, 0x310E, + 0xA37E, 0x310F, 0xA3A1, 0x3110, 0xA3A2, 0x3111, 0xA3A3, 0x3112, 0xA3A4, 0x3113, 0xA3A5, 0x3114, 0xA3A6, 0x3115, 0xA3A7, 0x3116, + 0xA3A8, 0x3117, 0xA3A9, 0x3118, 0xA3AA, 0x3119, 0xA3AB, 0x311A, 0xA3AC, 0x311B, 0xA3AD, 0x311C, 0xA3AE, 0x311D, 0xA3AF, 0x311E, + 0xA3B0, 0x311F, 0xA3B1, 0x3120, 0xA3B2, 0x3121, 0xA3B3, 0x3122, 0xA3B4, 0x3123, 0xA3B5, 0x3124, 0xA3B6, 0x3125, 0xA3B7, 0x3126, + 0xA3B8, 0x3127, 0xA3B9, 0x3128, 0xA3BA, 0x3129, 0xA3BB, 0x02D9, 0xA3BC, 0x02C9, 0xA3BD, 0x02CA, 0xA3BE, 0x02C7, 0xA3BF, 0x02CB, + 0xA3E1, 0x20AC, 0xA440, 0x4E00, 0xA441, 0x4E59, 0xA442, 0x4E01, 0xA443, 0x4E03, 0xA444, 0x4E43, 0xA445, 0x4E5D, 0xA446, 0x4E86, + 0xA447, 0x4E8C, 0xA448, 0x4EBA, 0xA449, 0x513F, 0xA44A, 0x5165, 0xA44B, 0x516B, 0xA44C, 0x51E0, 0xA44D, 0x5200, 0xA44E, 0x5201, + 0xA44F, 0x529B, 0xA450, 0x5315, 0xA451, 0x5341, 0xA452, 0x535C, 0xA453, 0x53C8, 0xA454, 0x4E09, 0xA455, 0x4E0B, 0xA456, 0x4E08, + 0xA457, 0x4E0A, 0xA458, 0x4E2B, 0xA459, 0x4E38, 0xA45A, 0x51E1, 0xA45B, 0x4E45, 0xA45C, 0x4E48, 0xA45D, 0x4E5F, 0xA45E, 0x4E5E, + 0xA45F, 0x4E8E, 0xA460, 0x4EA1, 0xA461, 0x5140, 0xA462, 0x5203, 0xA463, 0x52FA, 0xA464, 0x5343, 0xA465, 0x53C9, 0xA466, 0x53E3, + 0xA467, 0x571F, 0xA468, 0x58EB, 0xA469, 0x5915, 0xA46A, 0x5927, 0xA46B, 0x5973, 0xA46C, 0x5B50, 0xA46D, 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0x9DDC, 0xF7BE, 0x9DD1, 0xF7BF, 0x9DDF, 0xF7C0, 0x9DE9, 0xF7C1, 0x9DD9, + 0xF7C2, 0x9DD8, 0xF7C3, 0x9DD6, 0xF7C4, 0x9DF5, 0xF7C5, 0x9DD5, 0xF7C6, 0x9DDD, 0xF7C7, 0x9EB6, 0xF7C8, 0x9EF0, 0xF7C9, 0x9F35, + 0xF7CA, 0x9F33, 0xF7CB, 0x9F32, 0xF7CC, 0x9F42, 0xF7CD, 0x9F6B, 0xF7CE, 0x9F95, 0xF7CF, 0x9FA2, 0xF7D0, 0x513D, 0xF7D1, 0x5299, + 0xF7D2, 0x58E8, 0xF7D3, 0x58E7, 0xF7D4, 0x5972, 0xF7D5, 0x5B4D, 0xF7D6, 0x5DD8, 0xF7D7, 0x882F, 0xF7D8, 0x5F4F, 0xF7D9, 0x6201, + 0xF7DA, 0x6203, 0xF7DB, 0x6204, 0xF7DC, 0x6529, 0xF7DD, 0x6525, 0xF7DE, 0x6596, 0xF7DF, 0x66EB, 0xF7E0, 0x6B11, 0xF7E1, 0x6B12, + 0xF7E2, 0x6B0F, 0xF7E3, 0x6BCA, 0xF7E4, 0x705B, 0xF7E5, 0x705A, 0xF7E6, 0x7222, 0xF7E7, 0x7382, 0xF7E8, 0x7381, 0xF7E9, 0x7383, + 0xF7EA, 0x7670, 0xF7EB, 0x77D4, 0xF7EC, 0x7C67, 0xF7ED, 0x7C66, 0xF7EE, 0x7E95, 0xF7EF, 0x826C, 0xF7F0, 0x863A, 0xF7F1, 0x8640, + 0xF7F2, 0x8639, 0xF7F3, 0x863C, 0xF7F4, 0x8631, 0xF7F5, 0x863B, 0xF7F6, 0x863E, 0xF7F7, 0x8830, 0xF7F8, 0x8832, 0xF7F9, 0x882E, + 0xF7FA, 0x8833, 0xF7FB, 0x8976, 0xF7FC, 0x8974, 0xF7FD, 0x8973, 0xF7FE, 0x89FE, 0xF840, 0x8B8C, 0xF841, 0x8B8E, 0xF842, 0x8B8B, + 0xF843, 0x8B88, 0xF844, 0x8C45, 0xF845, 0x8D19, 0xF846, 0x8E98, 0xF847, 0x8F64, 0xF848, 0x8F63, 0xF849, 0x91BC, 0xF84A, 0x9462, + 0xF84B, 0x9455, 0xF84C, 0x945D, 0xF84D, 0x9457, 0xF84E, 0x945E, 0xF84F, 0x97C4, 0xF850, 0x97C5, 0xF851, 0x9800, 0xF852, 0x9A56, + 0xF853, 0x9A59, 0xF854, 0x9B1E, 0xF855, 0x9B1F, 0xF856, 0x9B20, 0xF857, 0x9C52, 0xF858, 0x9C58, 0xF859, 0x9C50, 0xF85A, 0x9C4A, + 0xF85B, 0x9C4D, 0xF85C, 0x9C4B, 0xF85D, 0x9C55, 0xF85E, 0x9C59, 0xF85F, 0x9C4C, 0xF860, 0x9C4E, 0xF861, 0x9DFB, 0xF862, 0x9DF7, + 0xF863, 0x9DEF, 0xF864, 0x9DE3, 0xF865, 0x9DEB, 0xF866, 0x9DF8, 0xF867, 0x9DE4, 0xF868, 0x9DF6, 0xF869, 0x9DE1, 0xF86A, 0x9DEE, + 0xF86B, 0x9DE6, 0xF86C, 0x9DF2, 0xF86D, 0x9DF0, 0xF86E, 0x9DE2, 0xF86F, 0x9DEC, 0xF870, 0x9DF4, 0xF871, 0x9DF3, 0xF872, 0x9DE8, + 0xF873, 0x9DED, 0xF874, 0x9EC2, 0xF875, 0x9ED0, 0xF876, 0x9EF2, 0xF877, 0x9EF3, 0xF878, 0x9F06, 0xF879, 0x9F1C, 0xF87A, 0x9F38, + 0xF87B, 0x9F37, 0xF87C, 0x9F36, 0xF87D, 0x9F43, 0xF87E, 0x9F4F, 0xF8A1, 0x9F71, 0xF8A2, 0x9F70, 0xF8A3, 0x9F6E, 0xF8A4, 0x9F6F, + 0xF8A5, 0x56D3, 0xF8A6, 0x56CD, 0xF8A7, 0x5B4E, 0xF8A8, 0x5C6D, 0xF8A9, 0x652D, 0xF8AA, 0x66ED, 0xF8AB, 0x66EE, 0xF8AC, 0x6B13, + 0xF8AD, 0x705F, 0xF8AE, 0x7061, 0xF8AF, 0x705D, 0xF8B0, 0x7060, 0xF8B1, 0x7223, 0xF8B2, 0x74DB, 0xF8B3, 0x74E5, 0xF8B4, 0x77D5, + 0xF8B5, 0x7938, 0xF8B6, 0x79B7, 0xF8B7, 0x79B6, 0xF8B8, 0x7C6A, 0xF8B9, 0x7E97, 0xF8BA, 0x7F89, 0xF8BB, 0x826D, 0xF8BC, 0x8643, + 0xF8BD, 0x8838, 0xF8BE, 0x8837, 0xF8BF, 0x8835, 0xF8C0, 0x884B, 0xF8C1, 0x8B94, 0xF8C2, 0x8B95, 0xF8C3, 0x8E9E, 0xF8C4, 0x8E9F, + 0xF8C5, 0x8EA0, 0xF8C6, 0x8E9D, 0xF8C7, 0x91BE, 0xF8C8, 0x91BD, 0xF8C9, 0x91C2, 0xF8CA, 0x946B, 0xF8CB, 0x9468, 0xF8CC, 0x9469, + 0xF8CD, 0x96E5, 0xF8CE, 0x9746, 0xF8CF, 0x9743, 0xF8D0, 0x9747, 0xF8D1, 0x97C7, 0xF8D2, 0x97E5, 0xF8D3, 0x9A5E, 0xF8D4, 0x9AD5, + 0xF8D5, 0x9B59, 0xF8D6, 0x9C63, 0xF8D7, 0x9C67, 0xF8D8, 0x9C66, 0xF8D9, 0x9C62, 0xF8DA, 0x9C5E, 0xF8DB, 0x9C60, 0xF8DC, 0x9E02, + 0xF8DD, 0x9DFE, 0xF8DE, 0x9E07, 0xF8DF, 0x9E03, 0xF8E0, 0x9E06, 0xF8E1, 0x9E05, 0xF8E2, 0x9E00, 0xF8E3, 0x9E01, 0xF8E4, 0x9E09, + 0xF8E5, 0x9DFF, 0xF8E6, 0x9DFD, 0xF8E7, 0x9E04, 0xF8E8, 0x9EA0, 0xF8E9, 0x9F1E, 0xF8EA, 0x9F46, 0xF8EB, 0x9F74, 0xF8EC, 0x9F75, + 0xF8ED, 0x9F76, 0xF8EE, 0x56D4, 0xF8EF, 0x652E, 0xF8F0, 0x65B8, 0xF8F1, 0x6B18, 0xF8F2, 0x6B19, 0xF8F3, 0x6B17, 0xF8F4, 0x6B1A, + 0xF8F5, 0x7062, 0xF8F6, 0x7226, 0xF8F7, 0x72AA, 0xF8F8, 0x77D8, 0xF8F9, 0x77D9, 0xF8FA, 0x7939, 0xF8FB, 0x7C69, 0xF8FC, 0x7C6B, + 0xF8FD, 0x7CF6, 0xF8FE, 0x7E9A, 0xF940, 0x7E98, 0xF941, 0x7E9B, 0xF942, 0x7E99, 0xF943, 0x81E0, 0xF944, 0x81E1, 0xF945, 0x8646, + 0xF946, 0x8647, 0xF947, 0x8648, 0xF948, 0x8979, 0xF949, 0x897A, 0xF94A, 0x897C, 0xF94B, 0x897B, 0xF94C, 0x89FF, 0xF94D, 0x8B98, + 0xF94E, 0x8B99, 0xF94F, 0x8EA5, 0xF950, 0x8EA4, 0xF951, 0x8EA3, 0xF952, 0x946E, 0xF953, 0x946D, 0xF954, 0x946F, 0xF955, 0x9471, + 0xF956, 0x9473, 0xF957, 0x9749, 0xF958, 0x9872, 0xF959, 0x995F, 0xF95A, 0x9C68, 0xF95B, 0x9C6E, 0xF95C, 0x9C6D, 0xF95D, 0x9E0B, + 0xF95E, 0x9E0D, 0xF95F, 0x9E10, 0xF960, 0x9E0F, 0xF961, 0x9E12, 0xF962, 0x9E11, 0xF963, 0x9EA1, 0xF964, 0x9EF5, 0xF965, 0x9F09, + 0xF966, 0x9F47, 0xF967, 0x9F78, 0xF968, 0x9F7B, 0xF969, 0x9F7A, 0xF96A, 0x9F79, 0xF96B, 0x571E, 0xF96C, 0x7066, 0xF96D, 0x7C6F, + 0xF96E, 0x883C, 0xF96F, 0x8DB2, 0xF970, 0x8EA6, 0xF971, 0x91C3, 0xF972, 0x9474, 0xF973, 0x9478, 0xF974, 0x9476, 0xF975, 0x9475, + 0xF976, 0x9A60, 0xF977, 0x9C74, 0xF978, 0x9C73, 0xF979, 0x9C71, 0xF97A, 0x9C75, 0xF97B, 0x9E14, 0xF97C, 0x9E13, 0xF97D, 0x9EF6, + 0xF97E, 0x9F0A, 0xF9A1, 0x9FA4, 0xF9A2, 0x7068, 0xF9A3, 0x7065, 0xF9A4, 0x7CF7, 0xF9A5, 0x866A, 0xF9A6, 0x883E, 0xF9A7, 0x883D, + 0xF9A8, 0x883F, 0xF9A9, 0x8B9E, 0xF9AA, 0x8C9C, 0xF9AB, 0x8EA9, 0xF9AC, 0x8EC9, 0xF9AD, 0x974B, 0xF9AE, 0x9873, 0xF9AF, 0x9874, + 0xF9B0, 0x98CC, 0xF9B1, 0x9961, 0xF9B2, 0x99AB, 0xF9B3, 0x9A64, 0xF9B4, 0x9A66, 0xF9B5, 0x9A67, 0xF9B6, 0x9B24, 0xF9B7, 0x9E15, + 0xF9B8, 0x9E17, 0xF9B9, 0x9F48, 0xF9BA, 0x6207, 0xF9BB, 0x6B1E, 0xF9BC, 0x7227, 0xF9BD, 0x864C, 0xF9BE, 0x8EA8, 0xF9BF, 0x9482, + 0xF9C0, 0x9480, 0xF9C1, 0x9481, 0xF9C2, 0x9A69, 0xF9C3, 0x9A68, 0xF9C4, 0x9B2E, 0xF9C5, 0x9E19, 0xF9C6, 0x7229, 0xF9C7, 0x864B, + 0xF9C8, 0x8B9F, 0xF9C9, 0x9483, 0xF9CA, 0x9C79, 0xF9CB, 0x9EB7, 0xF9CC, 0x7675, 0xF9CD, 0x9A6B, 0xF9CE, 0x9C7A, 0xF9CF, 0x9E1D, + 0xF9D0, 0x7069, 0xF9D1, 0x706A, 0xF9D2, 0x9EA4, 0xF9D3, 0x9F7E, 0xF9D4, 0x9F49, 0xF9D5, 0x9F98, 0xF9D6, 0x7881, 0xF9D7, 0x92B9, + 0xF9D8, 0x88CF, 0xF9D9, 0x58BB, 0xF9DA, 0x6052, 0xF9DB, 0x7CA7, 0xF9DC, 0x5AFA, 0xF9DD, 0x2554, 0xF9DE, 0x2566, 0xF9DF, 0x2557, + 0xF9E0, 0x2560, 0xF9E1, 0x256C, 0xF9E2, 0x2563, 0xF9E3, 0x255A, 0xF9E4, 0x2569, 0xF9E5, 0x255D, 0xF9E6, 0x2552, 0xF9E7, 0x2564, + 0xF9E8, 0x2555, 0xF9E9, 0x255E, 0xF9EA, 0x256A, 0xF9EB, 0x2561, 0xF9EC, 0x2558, 0xF9ED, 0x2567, 0xF9EE, 0x255B, 0xF9EF, 0x2553, + 0xF9F0, 0x2565, 0xF9F1, 0x2556, 0xF9F2, 0x255F, 0xF9F3, 0x256B, 0xF9F4, 0x2562, 0xF9F5, 0x2559, 0xF9F6, 0x2568, 0xF9F7, 0x255C, + 0xF9F8, 0x2551, 0xF9F9, 0x2550, 0xF9FA, 0x256D, 0xF9FB, 0x256E, 0xF9FC, 0x2570, 0xF9FD, 0x256F, 0xF9FE, 0x2593, 0, 0 +}; +#endif + +#if FF_CODE_PAGE == 437 || FF_CODE_PAGE == 0 +static const WCHAR uc437[] = { /* CP437(U.S.) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, 0x00FF, 0x00D6, 0x00DC, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229, + 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; +#endif +#if FF_CODE_PAGE == 720 || FF_CODE_PAGE == 0 +static const WCHAR uc720[] = { /* CP720(Arabic) to Unicode conversion table */ + 0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9, 0x0621, 0x0622, 0x0623, 0x0624, 0x00A3, 0x0625, 0x0626, 0x0627, + 0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F, 0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x0636, 0x0637, 0x0638, 0x0639, 0x063A, 0x0641, 0x00B5, 0x0642, 0x0643, 0x0644, 0x0645, 0x0646, 0x0647, 0x0648, 0x0649, 0x064A, + 0x2261, 0x064B, 0x064C, 0x064D, 0x064E, 0x064F, 0x0650, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; +#endif +#if FF_CODE_PAGE == 737 || FF_CODE_PAGE == 0 +static const WCHAR uc737[] = { /* CP737(Greek) to Unicode conversion table */ + 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398, 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0, + 0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9, 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, 0x03B8, + 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0, 0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x03C5, 0x03C6, 0x03C7, 0x03C8, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x03C9, 0x03AC, 0x03AD, 0x03AE, 0x03CA, 0x03AF, 0x03CC, 0x03CD, 0x03CB, 0x03CE, 0x0386, 0x0388, 0x0389, 0x038A, 0x038C, 0x038E, + 0x038F, 0x00B1, 0x2265, 0x2264, 0x03AA, 0x03AB, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; +#endif +#if FF_CODE_PAGE == 771 || FF_CODE_PAGE == 0 +static const WCHAR uc771[] = { /* CP771(KBL) to Unicode conversion table */ + 0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417, 0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F, + 0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427, 0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F, + 0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437, 0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x2558, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x0104, 0x0105, 0x010C, 0x010D, + 0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447, 0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F, + 0x0118, 0x0119, 0x0116, 0x0117, 0x012E, 0x012F, 0x0160, 0x0161, 0x0172, 0x0173, 0x016A, 0x016B, 0x017D, 0x017E, 0x25A0, 0x00A0 +}; +#endif +#if FF_CODE_PAGE == 775 || FF_CODE_PAGE == 0 +static const WCHAR uc775[] = { /* CP775(Baltic) to Unicode conversion table */ + 0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107, 0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A, 0x015B, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x00A4, + 0x0100, 0x012A, 0x00F3, 0x017B, 0x017C, 0x017A, 0x201D, 0x00A6, 0x00A9, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x0141, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0104, 0x010C, 0x0118, 0x0116, 0x2563, 0x2551, 0x2557, 0x255D, 0x012E, 0x0160, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0172, 0x016A, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x017D, + 0x0105, 0x010D, 0x0119, 0x0117, 0x012F, 0x0161, 0x0173, 0x016B, 0x017E, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x00D3, 0x00DF, 0x014C, 0x0143, 0x00F5, 0x00D5, 0x00B5, 0x0144, 0x0136, 0x0137, 0x013B, 0x013C, 0x0146, 0x0112, 0x0145, 0x2019, + 0x00AD, 0x00B1, 0x201C, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x201E, 0x00B0, 0x2219, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 +}; +#endif +#if FF_CODE_PAGE == 850 || FF_CODE_PAGE == 0 +static const WCHAR uc850[] = { /* CP850(Latin 1) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, 0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, 0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, + 0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x0131, 0x00CD, 0x00CE, 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580, + 0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE, 0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4, + 0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 +}; +#endif +#if FF_CODE_PAGE == 852 || FF_CODE_PAGE == 0 +static const WCHAR uc852[] = { /* CP852(Latin 2) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7, 0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106, + 0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A, 0x015B, 0x00D6, 0x00DC, 0x0164, 0x0165, 0x0141, 0x00D7, 0x010D, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x0104, 0x0105, 0x017D, 0x017E, 0x0118, 0x0119, 0x00AC, 0x017A, 0x010C, 0x015F, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x011A, 0x015E, 0x2563, 0x2551, 0x2557, 0x255D, 0x017B, 0x017C, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0102, 0x0103, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, + 0x0111, 0x0110, 0x010E, 0x00CB, 0x010F, 0x0147, 0x00CD, 0x00CE, 0x011B, 0x2518, 0x250C, 0x2588, 0x2584, 0x0162, 0x016E, 0x2580, + 0x00D3, 0x00DF, 0x00D4, 0x0143, 0x0144, 0x0148, 0x0160, 0x0161, 0x0154, 0x00DA, 0x0155, 0x0170, 0x00FD, 0x00DD, 0x0163, 0x00B4, + 0x00AD, 0x02DD, 0x02DB, 0x02C7, 0x02D8, 0x00A7, 0x00F7, 0x00B8, 0x00B0, 0x00A8, 0x02D9, 0x0171, 0x0158, 0x0159, 0x25A0, 0x00A0 +}; +#endif +#if FF_CODE_PAGE == 855 || FF_CODE_PAGE == 0 +static const WCHAR uc855[] = { /* CP855(Cyrillic) to Unicode conversion table */ + 0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404, 0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408, + 0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C, 0x045E, 0x040E, 0x045F, 0x040F, 0x044E, 0x042E, 0x044A, 0x042A, + 0x0430, 0x0410, 0x0431, 0x0411, 0x0446, 0x0426, 0x0434, 0x0414, 0x0435, 0x0415, 0x0444, 0x0424, 0x0433, 0x0413, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0445, 0x0425, 0x0438, 0x0418, 0x2563, 0x2551, 0x2557, 0x255D, 0x0439, 0x0419, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x043A, 0x041A, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, + 0x043B, 0x041B, 0x043C, 0x041C, 0x043D, 0x041D, 0x043E, 0x041E, 0x043F, 0x2518, 0x250C, 0x2588, 0x2584, 0x041F, 0x044F, 0x2580, + 0x042F, 0x0440, 0x0420, 0x0441, 0x0421, 0x0442, 0x0422, 0x0443, 0x0423, 0x0436, 0x0416, 0x0432, 0x0412, 0x044C, 0x042C, 0x2116, + 0x00AD, 0x044B, 0x042B, 0x0437, 0x0417, 0x0448, 0x0428, 0x044D, 0x042D, 0x0449, 0x0429, 0x0447, 0x0427, 0x00A7, 0x25A0, 0x00A0 +}; +#endif +#if FF_CODE_PAGE == 857 || FF_CODE_PAGE == 0 +static const WCHAR uc857[] = { /* CP857(Turkish) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, 0x0130, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x015E, 0x015F, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x011E, 0x011F, 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, 0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, + 0x00BA, 0x00AA, 0x00CA, 0x00CB, 0x00C8, 0x0000, 0x00CD, 0x00CE, 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580, + 0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x0000, 0x00D7, 0x00DA, 0x00DB, 0x00D9, 0x00EC, 0x00FF, 0x00AF, 0x00B4, + 0x00AD, 0x00B1, 0x0000, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 +}; +#endif +#if FF_CODE_PAGE == 860 || FF_CODE_PAGE == 0 +static const WCHAR uc860[] = { /* CP860(Portuguese) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E3, 0x00E0, 0x00C1, 0x00E7, 0x00EA, 0x00CA, 0x00E8, 0x00CD, 0x00D4, 0x00EC, 0x00C3, 0x00C2, + 0x00C9, 0x00C0, 0x00C8, 0x00F4, 0x00F5, 0x00F2, 0x00DA, 0x00F9, 0x00CC, 0x00D5, 0x00DC, 0x00A2, 0x00A3, 0x00D9, 0x20A7, 0x00D3, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x00D2, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x2558, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229, + 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; +#endif +#if FF_CODE_PAGE == 861 || FF_CODE_PAGE == 0 +static const WCHAR uc861[] = { /* CP861(Icelandic) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E6, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00D0, 0x00F0, 0x00DE, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00FE, 0x00FB, 0x00DD, 0x00FD, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x20A7, 0x0192, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00C1, 0x00CD, 0x00D3, 0x00DA, 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229, + 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; +#endif +#if FF_CODE_PAGE == 862 || FF_CODE_PAGE == 0 +static const WCHAR uc862[] = { /* CP862(Hebrew) to Unicode conversion table */ + 0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7, 0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF, + 0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7, 0x05E8, 0x05E9, 0x05EA, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229, + 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; +#endif +#if FF_CODE_PAGE == 863 || FF_CODE_PAGE == 0 +static const WCHAR uc863[] = { /* CP863(Canadian French) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00C2, 0x00E0, 0x00B6, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x2017, 0x00C0, + 0x00C9, 0x00C8, 0x00CA, 0x00F4, 0x00CB, 0x00CF, 0x00FB, 0x00F9, 0x00A4, 0x00D4, 0x00DC, 0x00A2, 0x00A3, 0x00D9, 0x00DB, 0x0192, + 0x00A6, 0x00B4, 0x00F3, 0x00FA, 0x00A8, 0x00BB, 0x00B3, 0x00AF, 0x00CE, 0x3210, 0x00AC, 0x00BD, 0x00BC, 0x00BE, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2219, + 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; +#endif +#if FF_CODE_PAGE == 864 || FF_CODE_PAGE == 0 +static const WCHAR uc864[] = { /* CP864(Arabic) to Unicode conversion table */ + 0x00B0, 0x00B7, 0x2219, 0x221A, 0x2592, 0x2500, 0x2502, 0x253C, 0x2524, 0x252C, 0x251C, 0x2534, 0x2510, 0x250C, 0x2514, 0x2518, + 0x03B2, 0x221E, 0x03C6, 0x00B1, 0x00BD, 0x00BC, 0x2248, 0x00AB, 0x00BB, 0xFEF7, 0xFEF8, 0x0000, 0x0000, 0xFEFB, 0xFEFC, 0x0000, + 0x00A0, 0x00AD, 0xFE82, 0x00A3, 0x00A4, 0xFE84, 0x0000, 0x20AC, 0xFE8E, 0xFE8F, 0xFE95, 0xFE99, 0x060C, 0xFE9D, 0xFEA1, 0xFEA5, + 0x0660, 0x0661, 0x0662, 0x0663, 0x0664, 0x0665, 0x0666, 0x0667, 0x0668, 0x0669, 0xFED1, 0x061B, 0xFEB1, 0xFEB5, 0xFEB9, 0x061F, + 0x00A2, 0xFE80, 0xFE81, 0xFE83, 0xFE85, 0xFECA, 0xFE8B, 0xFE8D, 0xFE91, 0xFE93, 0xFE97, 0xFE9B, 0xFE9F, 0xFEA3, 0xFEA7, 0xFEA9, + 0xFEAB, 0xFEAD, 0xFEAF, 0xFEB3, 0xFEB7, 0xFEBB, 0xFEBF, 0xFEC1, 0xFEC5, 0xFECB, 0xFECF, 0x00A6, 0x00AC, 0x00F7, 0x00D7, 0xFEC9, + 0x0640, 0xFED3, 0xFED7, 0xFEDB, 0xFEDF, 0xFEE3, 0xFEE7, 0xFEEB, 0xFEED, 0xFEEF, 0xFEF3, 0xFEBD, 0xFECC, 0xFECE, 0xFECD, 0xFEE1, + 0xFE7D, 0x0651, 0xFEE5, 0xFEE9, 0xFEEC, 0xFEF0, 0xFEF2, 0xFED0, 0xFED5, 0xFEF5, 0xFEF6, 0xFEDD, 0xFED9, 0xFEF1, 0x25A0, 0x0000 +}; +#endif +#if FF_CODE_PAGE == 865 || FF_CODE_PAGE == 0 +static const WCHAR uc865[] = { /* CP865(Nordic) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5, + 0x00C5, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, 0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x20A7, 0x0192, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00A4, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x2558, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229, + 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; +#endif +#if FF_CODE_PAGE == 866 || FF_CODE_PAGE == 0 +static const WCHAR uc866[] = { /* CP866(Russian) to Unicode conversion table */ + 0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417, 0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F, + 0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427, 0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F, + 0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437, 0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447, 0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F, + 0x0401, 0x0451, 0x0404, 0x0454, 0x0407, 0x0457, 0x040E, 0x045E, 0x00B0, 0x2219, 0x00B7, 0x221A, 0x2116, 0x00A4, 0x25A0, 0x00A0 +}; +#endif +#if FF_CODE_PAGE == 869 || FF_CODE_PAGE == 0 +static const WCHAR uc869[] = { /* CP869(Greek 2) to Unicode conversion table */ + 0x00B7, 0x00B7, 0x00B7, 0x00B7, 0x00B7, 0x00B7, 0x0386, 0x00B7, 0x00B7, 0x00AC, 0x00A6, 0x2018, 0x2019, 0x0388, 0x2015, 0x0389, + 0x038A, 0x03AA, 0x038C, 0x00B7, 0x00B7, 0x038E, 0x03AB, 0x00A9, 0x038F, 0x00B2, 0x00B3, 0x03AC, 0x00A3, 0x03AD, 0x03AE, 0x03AF, + 0x03CA, 0x0390, 0x03CC, 0x03CD, 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x00BD, 0x0398, 0x0399, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x039A, 0x039B, 0x039C, 0x039D, 0x2563, 0x2551, 0x2557, 0x255D, 0x039E, 0x039F, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0A30, 0x03A1, 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x03A3, + 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9, 0x03B1, 0x03B2, 0x03B3, 0x2518, 0x250C, 0x2588, 0x2584, 0x03B4, 0x03B5, 0x2580, + 0x03B6, 0x03B7, 0x03B8, 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0, 0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x0384, + 0x00AD, 0x00B1, 0x03C5, 0x03C6, 0x03C7, 0x00A7, 0x03C8, 0x0385, 0x00B0, 0x00A8, 0x03C9, 0x03CB, 0x03B0, 0x03CE, 0x25A0, 0x00A0 +}; +#endif + + + + +/*------------------------------------------------------------------------*/ +/* OEM <==> Unicode conversions for static code page configuration */ +/* SBCS fixed code page */ +/*------------------------------------------------------------------------*/ + +#if FF_CODE_PAGE != 0 && FF_CODE_PAGE < 900 +WCHAR ff_uni2oem ( /* Returns OEM code character, zero on error */ + DWORD uni, /* UTF-16 encoded character to be converted */ + WORD cp /* Code page for the conversion */ +) +{ + WCHAR c = 0; + const WCHAR *p = CVTBL(uc, FF_CODE_PAGE); + + + if (uni < 0x80) { /* ASCII? */ + c = (WCHAR)uni; + + } else { /* Non-ASCII */ + if (uni < 0x10000 && cp == FF_CODE_PAGE) { /* Is it in BMP and valid code page? */ + for (c = 0; c < 0x80 && uni != p[c]; c++) ; + c = (c + 0x80) & 0xFF; + } + } + + return c; +} + +WCHAR ff_oem2uni ( /* Returns Unicode character in UTF-16, zero on error */ + WCHAR oem, /* OEM code to be converted */ + WORD cp /* Code page for the conversion */ +) +{ + WCHAR c = 0; + const WCHAR *p = CVTBL(uc, FF_CODE_PAGE); + + + if (oem < 0x80) { /* ASCII? */ + c = oem; + + } else { /* Extended char */ + if (cp == FF_CODE_PAGE) { /* Is it a valid code page? */ + if (oem < 0x100) c = p[oem - 0x80]; + } + } + + return c; +} + +#endif + + + +/*------------------------------------------------------------------------*/ +/* OEM <==> Unicode conversions for static code page configuration */ +/* DBCS fixed code page */ +/*------------------------------------------------------------------------*/ + +#if FF_CODE_PAGE >= 900 +WCHAR ff_uni2oem ( /* Returns OEM code character, zero on error */ + DWORD uni, /* UTF-16 encoded character to be converted */ + WORD cp /* Code page for the conversion */ +) +{ + const WCHAR *p; + WCHAR c = 0, uc; + UINT i = 0, n, li, hi; + + + if (uni < 0x80) { /* ASCII? */ + c = (WCHAR)uni; + + } else { /* Non-ASCII */ + if (uni < 0x10000 && cp == FF_CODE_PAGE) { /* Is it in BMP and valid code page? */ + uc = (WCHAR)uni; + p = CVTBL(uni2oem, FF_CODE_PAGE); + hi = sizeof CVTBL(uni2oem, FF_CODE_PAGE) / 4 - 1; + li = 0; + for (n = 16; n; n--) { + i = li + (hi - li) / 2; + if (uc == p[i * 2]) break; + if (uc > p[i * 2]) { + li = i; + } else { + hi = i; + } + } + if (n != 0) c = p[i * 2 + 1]; + } + } + + return c; +} + + +WCHAR ff_oem2uni ( /* Returns Unicode character in UTF-16, zero on error */ + WCHAR oem, /* OEM code to be converted */ + WORD cp /* Code page for the conversion */ +) +{ + const WCHAR *p; + WCHAR c = 0; + UINT i = 0, n, li, hi; + + + if (oem < 0x80) { /* ASCII? */ + c = oem; + + } else { /* Extended char */ + if (cp == FF_CODE_PAGE) { /* Is it valid code page? */ + p = CVTBL(oem2uni, FF_CODE_PAGE); + hi = sizeof CVTBL(oem2uni, FF_CODE_PAGE) / 4 - 1; + li = 0; + for (n = 16; n; n--) { + i = li + (hi - li) / 2; + if (oem == p[i * 2]) break; + if (oem > p[i * 2]) { + li = i; + } else { + hi = i; + } + } + if (n != 0) c = p[i * 2 + 1]; + } + } + + return c; +} +#endif + + + +/*------------------------------------------------------------------------*/ +/* OEM <==> Unicode conversions for dynamic code page configuration */ +/*------------------------------------------------------------------------*/ + +#if FF_CODE_PAGE == 0 + +static const WORD cp_code[] = { 437, 720, 737, 771, 775, 850, 852, 855, 857, 860, 861, 862, 863, 864, 865, 866, 869, 0}; +static const WCHAR* const cp_table[] = {uc437, uc720, uc737, uc771, uc775, uc850, uc852, uc855, uc857, uc860, uc861, uc862, uc863, uc864, uc865, uc866, uc869, 0}; + + +WCHAR ff_uni2oem ( /* Returns OEM code character, zero on error */ + DWORD uni, /* UTF-16 encoded character to be converted */ + WORD cp /* Code page for the conversion */ +) +{ + const WCHAR *p; + WCHAR c = 0, uc; + UINT i, n, li, hi; + + + if (uni < 0x80) { /* ASCII? */ + c = (WCHAR)uni; + + } else { /* Non-ASCII */ + if (uni < 0x10000) { /* Is it in BMP? */ + uc = (WCHAR)uni; + p = 0; + if (cp < 900) { /* SBCS */ + for (i = 0; cp_code[i] != 0 && cp_code[i] != cp; i++) ; /* Get conversion table */ + p = cp_table[i]; + if (p) { /* Is it valid code page ? */ + for (c = 0; c < 0x80 && uc != p[c]; c++) ; /* Find OEM code in the table */ + c = (c + 0x80) & 0xFF; + } + } else { /* DBCS */ + switch (cp) { /* Get conversion table */ + case 932 : p = uni2oem932; hi = sizeof uni2oem932 / 4 - 1; break; + case 936 : p = uni2oem936; hi = sizeof uni2oem936 / 4 - 1; break; + case 949 : p = uni2oem949; hi = sizeof uni2oem949 / 4 - 1; break; + case 950 : p = uni2oem950; hi = sizeof uni2oem950 / 4 - 1; break; + } + if (p) { /* Is it valid code page? */ + li = 0; + for (n = 16; n; n--) { /* Find OEM code */ + i = li + (hi - li) / 2; + if (uc == p[i * 2]) break; + if (uc > p[i * 2]) { + li = i; + } else { + hi = i; + } + } + if (n != 0) c = p[i * 2 + 1]; + } + } + } + } + + return c; +} + + +WCHAR ff_oem2uni ( /* Returns Unicode character in UTF-16, zero on error */ + WCHAR oem, /* OEM code to be converted (DBC if >=0x100) */ + WORD cp /* Code page for the conversion */ +) +{ + const WCHAR *p; + WCHAR c = 0; + UINT i, n, li, hi; + + + if (oem < 0x80) { /* ASCII? */ + c = oem; + + } else { /* Extended char */ + p = 0; + if (cp < 900) { /* SBCS */ + for (i = 0; cp_code[i] != 0 && cp_code[i] != cp; i++) ; /* Get table */ + p = cp_table[i]; + if (p) { /* Is it a valid CP ? */ + if (oem < 0x100) c = p[oem - 0x80]; + } + } else { /* DBCS */ + switch (cp) { + case 932 : p = oem2uni932; hi = sizeof oem2uni932 / 4 - 1; break; + case 936 : p = oem2uni936; hi = sizeof oem2uni936 / 4 - 1; break; + case 949 : p = oem2uni949; hi = sizeof oem2uni949 / 4 - 1; break; + case 950 : p = oem2uni950; hi = sizeof oem2uni950 / 4 - 1; break; + } + if (p) { + li = 0; + for (n = 16; n; n--) { + i = li + (hi - li) / 2; + if (oem == p[i * 2]) break; + if (oem > p[i * 2]) { + li = i; + } else { + hi = i; + } + } + if (n != 0) c = p[i * 2 + 1]; + } + } + } + + return c; +} +#endif + + + +/*------------------------------------------------------------------------*/ +/* Unicode up-case conversion */ +/*------------------------------------------------------------------------*/ + +DWORD ff_wtoupper ( /* Returns up-converted code point */ + DWORD uni /* Unicode code point to be up-converted */ +) +{ + const WORD *p; + WORD uc, bc, nc, cmd; + static const WORD cvt1[] = { /* Compressed up conversion table for U+0000 - U+0FFF */ + /* Basic Latin */ + 0x0061,0x031A, + /* Latin-1 Supplement */ + 0x00E0,0x0317, + 0x00F8,0x0307, + 0x00FF,0x0001,0x0178, + /* Latin Extended-A */ + 0x0100,0x0130, + 0x0132,0x0106, + 0x0139,0x0110, + 0x014A,0x012E, + 0x0179,0x0106, + /* Latin Extended-B */ + 0x0180,0x004D,0x0243,0x0181,0x0182,0x0182,0x0184,0x0184,0x0186,0x0187,0x0187,0x0189,0x018A,0x018B,0x018B,0x018D,0x018E,0x018F,0x0190,0x0191,0x0191,0x0193,0x0194,0x01F6,0x0196,0x0197,0x0198,0x0198,0x023D,0x019B,0x019C,0x019D,0x0220,0x019F,0x01A0,0x01A0,0x01A2,0x01A2,0x01A4,0x01A4,0x01A6,0x01A7,0x01A7,0x01A9,0x01AA,0x01AB,0x01AC,0x01AC,0x01AE,0x01AF,0x01AF,0x01B1,0x01B2,0x01B3,0x01B3,0x01B5,0x01B5,0x01B7,0x01B8,0x01B8,0x01BA,0x01BB,0x01BC,0x01BC,0x01BE,0x01F7,0x01C0,0x01C1,0x01C2,0x01C3,0x01C4,0x01C5,0x01C4,0x01C7,0x01C8,0x01C7,0x01CA,0x01CB,0x01CA, + 0x01CD,0x0110, + 0x01DD,0x0001,0x018E, + 0x01DE,0x0112, + 0x01F3,0x0003,0x01F1,0x01F4,0x01F4, + 0x01F8,0x0128, + 0x0222,0x0112, + 0x023A,0x0009,0x2C65,0x023B,0x023B,0x023D,0x2C66,0x023F,0x0240,0x0241,0x0241, + 0x0246,0x010A, + /* IPA Extensions */ + 0x0253,0x0040,0x0181,0x0186,0x0255,0x0189,0x018A,0x0258,0x018F,0x025A,0x0190,0x025C,0x025D,0x025E,0x025F,0x0193,0x0261,0x0262,0x0194,0x0264,0x0265,0x0266,0x0267,0x0197,0x0196,0x026A,0x2C62,0x026C,0x026D,0x026E,0x019C,0x0270,0x0271,0x019D,0x0273,0x0274,0x019F,0x0276,0x0277,0x0278,0x0279,0x027A,0x027B,0x027C,0x2C64,0x027E,0x027F,0x01A6,0x0281,0x0282,0x01A9,0x0284,0x0285,0x0286,0x0287,0x01AE,0x0244,0x01B1,0x01B2,0x0245,0x028D,0x028E,0x028F,0x0290,0x0291,0x01B7, + /* Greek, Coptic */ + 0x037B,0x0003,0x03FD,0x03FE,0x03FF, + 0x03AC,0x0004,0x0386,0x0388,0x0389,0x038A, + 0x03B1,0x0311, + 0x03C2,0x0002,0x03A3,0x03A3, + 0x03C4,0x0308, + 0x03CC,0x0003,0x038C,0x038E,0x038F, + 0x03D8,0x0118, + 0x03F2,0x000A,0x03F9,0x03F3,0x03F4,0x03F5,0x03F6,0x03F7,0x03F7,0x03F9,0x03FA,0x03FA, + /* Cyrillic */ + 0x0430,0x0320, + 0x0450,0x0710, + 0x0460,0x0122, + 0x048A,0x0136, + 0x04C1,0x010E, + 0x04CF,0x0001,0x04C0, + 0x04D0,0x0144, + /* Armenian */ + 0x0561,0x0426, + + 0x0000 /* EOT */ + }; + static const WORD cvt2[] = { /* Compressed up conversion table for U+1000 - U+FFFF */ + /* Phonetic Extensions */ + 0x1D7D,0x0001,0x2C63, + /* Latin Extended Additional */ + 0x1E00,0x0196, + 0x1EA0,0x015A, + /* Greek Extended */ + 0x1F00,0x0608, + 0x1F10,0x0606, + 0x1F20,0x0608, + 0x1F30,0x0608, + 0x1F40,0x0606, + 0x1F51,0x0007,0x1F59,0x1F52,0x1F5B,0x1F54,0x1F5D,0x1F56,0x1F5F, + 0x1F60,0x0608, + 0x1F70,0x000E,0x1FBA,0x1FBB,0x1FC8,0x1FC9,0x1FCA,0x1FCB,0x1FDA,0x1FDB,0x1FF8,0x1FF9,0x1FEA,0x1FEB,0x1FFA,0x1FFB, + 0x1F80,0x0608, + 0x1F90,0x0608, + 0x1FA0,0x0608, + 0x1FB0,0x0004,0x1FB8,0x1FB9,0x1FB2,0x1FBC, + 0x1FCC,0x0001,0x1FC3, + 0x1FD0,0x0602, + 0x1FE0,0x0602, + 0x1FE5,0x0001,0x1FEC, + 0x1FF3,0x0001,0x1FFC, + /* Letterlike Symbols */ + 0x214E,0x0001,0x2132, + /* Number forms */ + 0x2170,0x0210, + 0x2184,0x0001,0x2183, + /* Enclosed Alphanumerics */ + 0x24D0,0x051A, + 0x2C30,0x042F, + /* Latin Extended-C */ + 0x2C60,0x0102, + 0x2C67,0x0106, 0x2C75,0x0102, + /* Coptic */ + 0x2C80,0x0164, + /* Georgian Supplement */ + 0x2D00,0x0826, + /* Full-width */ + 0xFF41,0x031A, + + 0x0000 /* EOT */ + }; + + + if (uni < 0x10000) { /* Is it in BMP? */ + uc = (WORD)uni; + p = uc < 0x1000 ? cvt1 : cvt2; + for (;;) { + bc = *p++; /* Get the block base */ + if (bc == 0 || uc < bc) break; /* Not matched? */ + nc = *p++; cmd = nc >> 8; nc &= 0xFF; /* Get processing command and block size */ + if (uc < bc + nc) { /* In the block? */ + switch (cmd) { + case 0: uc = p[uc - bc]; break; /* Table conversion */ + case 1: uc -= (uc - bc) & 1; break; /* Case pairs */ + case 2: uc -= 16; break; /* Shift -16 */ + case 3: uc -= 32; break; /* Shift -32 */ + case 4: uc -= 48; break; /* Shift -48 */ + case 5: uc -= 26; break; /* Shift -26 */ + case 6: uc += 8; break; /* Shift +8 */ + case 7: uc -= 80; break; /* Shift -80 */ + case 8: uc -= 0x1C60; break; /* Shift -0x1C60 */ + + /* add this for make pass */ + default :break; + } + break; + } + if (cmd == 0) p += nc; /* Skip table if needed */ + } + uni = uc; + } + + return uni; +} + + +#endif /* #if FF_USE_LFN */ diff --git a/components/freertos/CMakeLists.txt b/components/freertos/CMakeLists.txt new file mode 100644 index 00000000..69803553 --- /dev/null +++ b/components/freertos/CMakeLists.txt @@ -0,0 +1,61 @@ +################# Add global include ################# +list(APPEND ADD_INCLUDE +"${CMAKE_CURRENT_SOURCE_DIR}" +"${CMAKE_CURRENT_SOURCE_DIR}/include" +) +####################################################### + +################# Add private include ################# +# list(APPEND ADD_PRIVATE_INCLUDE +# "${CMAKE_SOURCE_DIR}/BSP_Common/ring_buffer" +# "${CMAKE_SOURCE_DIR}/BSP_Driver/BSP_${BOARD}_Driver/StdDriver/Inc" +# "${CMAKE_SOURCE_DIR}/BSP_Driver/BSP_${BOARD}_Driver/StdDriver/Inc" +# "${CMAKE_SOURCE_DIR}/BSP_Driver/BSP_${BOARD}_Driver/Peripherals" +# "${CMAKE_SOURCE_DIR}/BSP_Driver/BSP_${BOARD}_Driver/RISCV/Device/Bouffalo/${BOARD}/Startup" +# "${CMAKE_SOURCE_DIR}/BSP_Driver/BSP_${BOARD}_Driver/RISCV/Core/Include" +# ) +####################################################### + +############## Add current dir source files ########### +file(GLOB_RECURSE sources "${CMAKE_CURRENT_SOURCE_DIR}/croutine.c" +"${CMAKE_CURRENT_SOURCE_DIR}/croutine.c" +"${CMAKE_CURRENT_SOURCE_DIR}/event_groups.c" +"${CMAKE_CURRENT_SOURCE_DIR}/list.c" +"${CMAKE_CURRENT_SOURCE_DIR}/queue.c" +"${CMAKE_CURRENT_SOURCE_DIR}/tasks.c" +"${CMAKE_CURRENT_SOURCE_DIR}/timers.c" +"${CMAKE_CURRENT_SOURCE_DIR}/portable/MemMang/heap_5.c" +) +list(APPEND ADD_SRCS ${sources}) +# aux_source_directory(src ADD_SRCS) +# list(REMOVE_ITEM ADD_SRCS "${CMAKE_CURRENT_SOURCE_DIR}") +####################################################### + +########### Add required/dependent components ######### +#list(APPEND ADD_REQUIREMENTS BSP_${BOARD}_Driver) +####################################################### + +############ Add static libs ########################## +# if(CONFIG_COMPONENT1_INCLUDE_STATIC_LIB) +# list(APPEND ADD_STATIC_LIB "lib/libtest.a") +# endif() +####################################################### + +############ Add dynamic libs ######################### +# list(APPEND ADD_DYNAMIC_LIB "lib/arch/v831/libmaix_nn.so" +# "lib/arch/v831/libmaix_cam.so" +# ) +####################################################### + +############ Add global compile option ################ +#add components denpend on this component +# list(APPEND ADD_DEFINITIONS -DAAAAA222=1 +# -DAAAAA333=1) +####################################################### + +############ Add private compile option ################ +#add compile option for this component that won't affect other modules +# list(APPEND ADD_DEFINITIONS_PRIVATE -DAAAAA=1) +####################################################### + +generate_library() diff --git a/components/freertos/croutine.c b/components/freertos/croutine.c new file mode 100644 index 00000000..56c8ac29 --- /dev/null +++ b/components/freertos/croutine.c @@ -0,0 +1,353 @@ +/* + * FreeRTOS Kernel V10.2.1 + * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#include "FreeRTOS.h" +#include "task.h" +#include "croutine.h" + +/* Remove the whole file is co-routines are not being used. */ +#if( configUSE_CO_ROUTINES != 0 ) + +/* + * Some kernel aware debuggers require data to be viewed to be global, rather + * than file scope. + */ +#ifdef portREMOVE_STATIC_QUALIFIER + #define static +#endif + + +/* Lists for ready and blocked co-routines. --------------------*/ +static List_t pxReadyCoRoutineLists[ configMAX_CO_ROUTINE_PRIORITIES ]; /*< Prioritised ready co-routines. */ +static List_t xDelayedCoRoutineList1; /*< Delayed co-routines. */ +static List_t xDelayedCoRoutineList2; /*< Delayed co-routines (two lists are used - one for delays that have overflowed the current tick count. */ +static List_t * pxDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used. */ +static List_t * pxOverflowDelayedCoRoutineList; /*< Points to the delayed co-routine list currently being used to hold co-routines that have overflowed the current tick count. */ +static List_t xPendingReadyCoRoutineList; /*< Holds co-routines that have been readied by an external event. They cannot be added directly to the ready lists as the ready lists cannot be accessed by interrupts. */ + +/* Other file private variables. --------------------------------*/ +CRCB_t * pxCurrentCoRoutine = NULL; +static UBaseType_t uxTopCoRoutineReadyPriority = 0; +static TickType_t xCoRoutineTickCount = 0, xLastTickCount = 0, xPassedTicks = 0; + +/* The initial state of the co-routine when it is created. */ +#define corINITIAL_STATE ( 0 ) + +/* + * Place the co-routine represented by pxCRCB into the appropriate ready queue + * for the priority. It is inserted at the end of the list. + * + * This macro accesses the co-routine ready lists and therefore must not be + * used from within an ISR. + */ +#define prvAddCoRoutineToReadyQueue( pxCRCB ) \ +{ \ + if( pxCRCB->uxPriority > uxTopCoRoutineReadyPriority ) \ + { \ + uxTopCoRoutineReadyPriority = pxCRCB->uxPriority; \ + } \ + vListInsertEnd( ( List_t * ) &( pxReadyCoRoutineLists[ pxCRCB->uxPriority ] ), &( pxCRCB->xGenericListItem ) ); \ +} + +/* + * Utility to ready all the lists used by the scheduler. This is called + * automatically upon the creation of the first co-routine. + */ +static void prvInitialiseCoRoutineLists( void ); + +/* + * Co-routines that are readied by an interrupt cannot be placed directly into + * the ready lists (there is no mutual exclusion). Instead they are placed in + * in the pending ready list in order that they can later be moved to the ready + * list by the co-routine scheduler. + */ +static void prvCheckPendingReadyList( void ); + +/* + * Macro that looks at the list of co-routines that are currently delayed to + * see if any require waking. + * + * Co-routines are stored in the queue in the order of their wake time - + * meaning once one co-routine has been found whose timer has not expired + * we need not look any further down the list. + */ +static void prvCheckDelayedList( void ); + +/*-----------------------------------------------------------*/ + +BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, UBaseType_t uxPriority, UBaseType_t uxIndex ) +{ +BaseType_t xReturn; +CRCB_t *pxCoRoutine; + + /* Allocate the memory that will store the co-routine control block. */ + pxCoRoutine = ( CRCB_t * ) pvPortMalloc( sizeof( CRCB_t ) ); + if( pxCoRoutine ) + { + /* If pxCurrentCoRoutine is NULL then this is the first co-routine to + be created and the co-routine data structures need initialising. */ + if( pxCurrentCoRoutine == NULL ) + { + pxCurrentCoRoutine = pxCoRoutine; + prvInitialiseCoRoutineLists(); + } + + /* Check the priority is within limits. */ + if( uxPriority >= configMAX_CO_ROUTINE_PRIORITIES ) + { + uxPriority = configMAX_CO_ROUTINE_PRIORITIES - 1; + } + + /* Fill out the co-routine control block from the function parameters. */ + pxCoRoutine->uxState = corINITIAL_STATE; + pxCoRoutine->uxPriority = uxPriority; + pxCoRoutine->uxIndex = uxIndex; + pxCoRoutine->pxCoRoutineFunction = pxCoRoutineCode; + + /* Initialise all the other co-routine control block parameters. */ + vListInitialiseItem( &( pxCoRoutine->xGenericListItem ) ); + vListInitialiseItem( &( pxCoRoutine->xEventListItem ) ); + + /* Set the co-routine control block as a link back from the ListItem_t. + This is so we can get back to the containing CRCB from a generic item + in a list. */ + listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xGenericListItem ), pxCoRoutine ); + listSET_LIST_ITEM_OWNER( &( pxCoRoutine->xEventListItem ), pxCoRoutine ); + + /* Event lists are always in priority order. */ + listSET_LIST_ITEM_VALUE( &( pxCoRoutine->xEventListItem ), ( ( TickType_t ) configMAX_CO_ROUTINE_PRIORITIES - ( TickType_t ) uxPriority ) ); + + /* Now the co-routine has been initialised it can be added to the ready + list at the correct priority. */ + prvAddCoRoutineToReadyQueue( pxCoRoutine ); + + xReturn = pdPASS; + } + else + { + xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; + } + + return xReturn; +} +/*-----------------------------------------------------------*/ + +void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, List_t *pxEventList ) +{ +TickType_t xTimeToWake; + + /* Calculate the time to wake - this may overflow but this is + not a problem. */ + xTimeToWake = xCoRoutineTickCount + xTicksToDelay; + + /* We must remove ourselves from the ready list before adding + ourselves to the blocked list as the same list item is used for + both lists. */ + ( void ) uxListRemove( ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) ); + + /* The list item will be inserted in wake time order. */ + listSET_LIST_ITEM_VALUE( &( pxCurrentCoRoutine->xGenericListItem ), xTimeToWake ); + + if( xTimeToWake < xCoRoutineTickCount ) + { + /* Wake time has overflowed. Place this item in the + overflow list. */ + vListInsert( ( List_t * ) pxOverflowDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) ); + } + else + { + /* The wake time has not overflowed, so we can use the + current block list. */ + vListInsert( ( List_t * ) pxDelayedCoRoutineList, ( ListItem_t * ) &( pxCurrentCoRoutine->xGenericListItem ) ); + } + + if( pxEventList ) + { + /* Also add the co-routine to an event list. If this is done then the + function must be called with interrupts disabled. */ + vListInsert( pxEventList, &( pxCurrentCoRoutine->xEventListItem ) ); + } +} +/*-----------------------------------------------------------*/ + +static void prvCheckPendingReadyList( void ) +{ + /* Are there any co-routines waiting to get moved to the ready list? These + are co-routines that have been readied by an ISR. The ISR cannot access + the ready lists itself. */ + while( listLIST_IS_EMPTY( &xPendingReadyCoRoutineList ) == pdFALSE ) + { + CRCB_t *pxUnblockedCRCB; + + /* The pending ready list can be accessed by an ISR. */ + portDISABLE_INTERRUPTS(); + { + pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( (&xPendingReadyCoRoutineList) ); + ( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) ); + } + portENABLE_INTERRUPTS(); + + ( void ) uxListRemove( &( pxUnblockedCRCB->xGenericListItem ) ); + prvAddCoRoutineToReadyQueue( pxUnblockedCRCB ); + } +} +/*-----------------------------------------------------------*/ + +static void prvCheckDelayedList( void ) +{ +CRCB_t *pxCRCB; + + xPassedTicks = xTaskGetTickCount() - xLastTickCount; + while( xPassedTicks ) + { + xCoRoutineTickCount++; + xPassedTicks--; + + /* If the tick count has overflowed we need to swap the ready lists. */ + if( xCoRoutineTickCount == 0 ) + { + List_t * pxTemp; + + /* Tick count has overflowed so we need to swap the delay lists. If there are + any items in pxDelayedCoRoutineList here then there is an error! */ + pxTemp = pxDelayedCoRoutineList; + pxDelayedCoRoutineList = pxOverflowDelayedCoRoutineList; + pxOverflowDelayedCoRoutineList = pxTemp; + } + + /* See if this tick has made a timeout expire. */ + while( listLIST_IS_EMPTY( pxDelayedCoRoutineList ) == pdFALSE ) + { + pxCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxDelayedCoRoutineList ); + + if( xCoRoutineTickCount < listGET_LIST_ITEM_VALUE( &( pxCRCB->xGenericListItem ) ) ) + { + /* Timeout not yet expired. */ + break; + } + + portDISABLE_INTERRUPTS(); + { + /* The event could have occurred just before this critical + section. If this is the case then the generic list item will + have been moved to the pending ready list and the following + line is still valid. Also the pvContainer parameter will have + been set to NULL so the following lines are also valid. */ + ( void ) uxListRemove( &( pxCRCB->xGenericListItem ) ); + + /* Is the co-routine waiting on an event also? */ + if( pxCRCB->xEventListItem.pxContainer ) + { + ( void ) uxListRemove( &( pxCRCB->xEventListItem ) ); + } + } + portENABLE_INTERRUPTS(); + + prvAddCoRoutineToReadyQueue( pxCRCB ); + } + } + + xLastTickCount = xCoRoutineTickCount; +} +/*-----------------------------------------------------------*/ + +void vCoRoutineSchedule( void ) +{ + /* See if any co-routines readied by events need moving to the ready lists. */ + prvCheckPendingReadyList(); + + /* See if any delayed co-routines have timed out. */ + prvCheckDelayedList(); + + /* Find the highest priority queue that contains ready co-routines. */ + while( listLIST_IS_EMPTY( &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ) ) + { + if( uxTopCoRoutineReadyPriority == 0 ) + { + /* No more co-routines to check. */ + return; + } + --uxTopCoRoutineReadyPriority; + } + + /* listGET_OWNER_OF_NEXT_ENTRY walks through the list, so the co-routines + of the same priority get an equal share of the processor time. */ + listGET_OWNER_OF_NEXT_ENTRY( pxCurrentCoRoutine, &( pxReadyCoRoutineLists[ uxTopCoRoutineReadyPriority ] ) ); + + /* Call the co-routine. */ + ( pxCurrentCoRoutine->pxCoRoutineFunction )( pxCurrentCoRoutine, pxCurrentCoRoutine->uxIndex ); + + return; +} +/*-----------------------------------------------------------*/ + +static void prvInitialiseCoRoutineLists( void ) +{ +UBaseType_t uxPriority; + + for( uxPriority = 0; uxPriority < configMAX_CO_ROUTINE_PRIORITIES; uxPriority++ ) + { + vListInitialise( ( List_t * ) &( pxReadyCoRoutineLists[ uxPriority ] ) ); + } + + vListInitialise( ( List_t * ) &xDelayedCoRoutineList1 ); + vListInitialise( ( List_t * ) &xDelayedCoRoutineList2 ); + vListInitialise( ( List_t * ) &xPendingReadyCoRoutineList ); + + /* Start with pxDelayedCoRoutineList using list1 and the + pxOverflowDelayedCoRoutineList using list2. */ + pxDelayedCoRoutineList = &xDelayedCoRoutineList1; + pxOverflowDelayedCoRoutineList = &xDelayedCoRoutineList2; +} +/*-----------------------------------------------------------*/ + +BaseType_t xCoRoutineRemoveFromEventList( const List_t *pxEventList ) +{ +CRCB_t *pxUnblockedCRCB; +BaseType_t xReturn; + + /* This function is called from within an interrupt. It can only access + event lists and the pending ready list. This function assumes that a + check has already been made to ensure pxEventList is not empty. */ + pxUnblockedCRCB = ( CRCB_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); + ( void ) uxListRemove( &( pxUnblockedCRCB->xEventListItem ) ); + vListInsertEnd( ( List_t * ) &( xPendingReadyCoRoutineList ), &( pxUnblockedCRCB->xEventListItem ) ); + + if( pxUnblockedCRCB->uxPriority >= pxCurrentCoRoutine->uxPriority ) + { + xReturn = pdTRUE; + } + else + { + xReturn = pdFALSE; + } + + return xReturn; +} + +#endif /* configUSE_CO_ROUTINES == 0 */ + diff --git a/components/freertos/event_groups.c b/components/freertos/event_groups.c new file mode 100644 index 00000000..65a5ff25 --- /dev/null +++ b/components/freertos/event_groups.c @@ -0,0 +1,753 @@ +/* + * FreeRTOS Kernel V10.2.1 + * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* Standard includes. */ +#include + +/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining +all the API functions to use the MPU wrappers. That should only be done when +task.h is included from an application file. */ +#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE + +/* FreeRTOS includes. */ +#include "FreeRTOS.h" +#include "task.h" +#include "timers.h" +#include "event_groups.h" + +/* Lint e961, e750 and e9021 are suppressed as a MISRA exception justified +because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined +for the header files above, but not in this file, in order to generate the +correct privileged Vs unprivileged linkage and placement. */ +#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021 See comment above. */ + +/* The following bit fields convey control information in a task's event list +item value. It is important they don't clash with the +taskEVENT_LIST_ITEM_VALUE_IN_USE definition. */ +#if configUSE_16_BIT_TICKS == 1 + #define eventCLEAR_EVENTS_ON_EXIT_BIT 0x0100U + #define eventUNBLOCKED_DUE_TO_BIT_SET 0x0200U + #define eventWAIT_FOR_ALL_BITS 0x0400U + #define eventEVENT_BITS_CONTROL_BYTES 0xff00U +#else + #define eventCLEAR_EVENTS_ON_EXIT_BIT 0x01000000UL + #define eventUNBLOCKED_DUE_TO_BIT_SET 0x02000000UL + #define eventWAIT_FOR_ALL_BITS 0x04000000UL + #define eventEVENT_BITS_CONTROL_BYTES 0xff000000UL +#endif + +typedef struct EventGroupDef_t +{ + EventBits_t uxEventBits; + List_t xTasksWaitingForBits; /*< List of tasks waiting for a bit to be set. */ + + #if( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxEventGroupNumber; + #endif + + #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) + uint8_t ucStaticallyAllocated; /*< Set to pdTRUE if the event group is statically allocated to ensure no attempt is made to free the memory. */ + #endif +} EventGroup_t; + +/*-----------------------------------------------------------*/ + +/* + * Test the bits set in uxCurrentEventBits to see if the wait condition is met. + * The wait condition is defined by xWaitForAllBits. If xWaitForAllBits is + * pdTRUE then the wait condition is met if all the bits set in uxBitsToWaitFor + * are also set in uxCurrentEventBits. If xWaitForAllBits is pdFALSE then the + * wait condition is met if any of the bits set in uxBitsToWait for are also set + * in uxCurrentEventBits. + */ +static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits, const EventBits_t uxBitsToWaitFor, const BaseType_t xWaitForAllBits ) PRIVILEGED_FUNCTION; + +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_STATIC_ALLOCATION == 1 ) + + EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) + { + EventGroup_t *pxEventBits; + + /* A StaticEventGroup_t object must be provided. */ + configASSERT( pxEventGroupBuffer ); + + #if( configASSERT_DEFINED == 1 ) + { + /* Sanity check that the size of the structure used to declare a + variable of type StaticEventGroup_t equals the size of the real + event group structure. */ + volatile size_t xSize = sizeof( StaticEventGroup_t ); + configASSERT( xSize == sizeof( EventGroup_t ) ); + } /*lint !e529 xSize is referenced if configASSERT() is defined. */ + #endif /* configASSERT_DEFINED */ + + /* The user has provided a statically allocated event group - use it. */ + pxEventBits = ( EventGroup_t * ) pxEventGroupBuffer; /*lint !e740 !e9087 EventGroup_t and StaticEventGroup_t are deliberately aliased for data hiding purposes and guaranteed to have the same size and alignment requirement - checked by configASSERT(). */ + + if( pxEventBits != NULL ) + { + pxEventBits->uxEventBits = 0; + vListInitialise( &( pxEventBits->xTasksWaitingForBits ) ); + + #if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + { + /* Both static and dynamic allocation can be used, so note that + this event group was created statically in case the event group + is later deleted. */ + pxEventBits->ucStaticallyAllocated = pdTRUE; + } + #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ + + traceEVENT_GROUP_CREATE( pxEventBits ); + } + else + { + /* xEventGroupCreateStatic should only ever be called with + pxEventGroupBuffer pointing to a pre-allocated (compile time + allocated) StaticEventGroup_t variable. */ + traceEVENT_GROUP_CREATE_FAILED(); + } + + return pxEventBits; + } + +#endif /* configSUPPORT_STATIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + + EventGroupHandle_t xEventGroupCreate( void ) + { + EventGroup_t *pxEventBits; + + /* Allocate the event group. Justification for MISRA deviation as + follows: pvPortMalloc() always ensures returned memory blocks are + aligned per the requirements of the MCU stack. In this case + pvPortMalloc() must return a pointer that is guaranteed to meet the + alignment requirements of the EventGroup_t structure - which (if you + follow it through) is the alignment requirements of the TickType_t type + (EventBits_t being of TickType_t itself). Therefore, whenever the + stack alignment requirements are greater than or equal to the + TickType_t alignment requirements the cast is safe. In other cases, + where the natural word size of the architecture is less than + sizeof( TickType_t ), the TickType_t variables will be accessed in two + or more reads operations, and the alignment requirements is only that + of each individual read. */ + pxEventBits = ( EventGroup_t * ) pvPortMalloc( sizeof( EventGroup_t ) ); /*lint !e9087 !e9079 see comment above. */ + + if( pxEventBits != NULL ) + { + pxEventBits->uxEventBits = 0; + vListInitialise( &( pxEventBits->xTasksWaitingForBits ) ); + + #if( configSUPPORT_STATIC_ALLOCATION == 1 ) + { + /* Both static and dynamic allocation can be used, so note this + event group was allocated statically in case the event group is + later deleted. */ + pxEventBits->ucStaticallyAllocated = pdFALSE; + } + #endif /* configSUPPORT_STATIC_ALLOCATION */ + + traceEVENT_GROUP_CREATE( pxEventBits ); + } + else + { + traceEVENT_GROUP_CREATE_FAILED(); /*lint !e9063 Else branch only exists to allow tracing and does not generate code if trace macros are not defined. */ + } + + return pxEventBits; + } + +#endif /* configSUPPORT_DYNAMIC_ALLOCATION */ +/*-----------------------------------------------------------*/ + +EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) +{ +EventBits_t uxOriginalBitValue, uxReturn; +EventGroup_t *pxEventBits = xEventGroup; +BaseType_t xAlreadyYielded; +BaseType_t xTimeoutOccurred = pdFALSE; + + configASSERT( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); + configASSERT( uxBitsToWaitFor != 0 ); + #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) + { + configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); + } + #endif + + vTaskSuspendAll(); + { + uxOriginalBitValue = pxEventBits->uxEventBits; + + ( void ) xEventGroupSetBits( xEventGroup, uxBitsToSet ); + + if( ( ( uxOriginalBitValue | uxBitsToSet ) & uxBitsToWaitFor ) == uxBitsToWaitFor ) + { + /* All the rendezvous bits are now set - no need to block. */ + uxReturn = ( uxOriginalBitValue | uxBitsToSet ); + + /* Rendezvous always clear the bits. They will have been cleared + already unless this is the only task in the rendezvous. */ + pxEventBits->uxEventBits &= ~uxBitsToWaitFor; + + xTicksToWait = 0; + } + else + { + if( xTicksToWait != ( TickType_t ) 0 ) + { + traceEVENT_GROUP_SYNC_BLOCK( xEventGroup, uxBitsToSet, uxBitsToWaitFor ); + + /* Store the bits that the calling task is waiting for in the + task's event list item so the kernel knows when a match is + found. Then enter the blocked state. */ + vTaskPlaceOnUnorderedEventList( &( pxEventBits->xTasksWaitingForBits ), ( uxBitsToWaitFor | eventCLEAR_EVENTS_ON_EXIT_BIT | eventWAIT_FOR_ALL_BITS ), xTicksToWait ); + + /* This assignment is obsolete as uxReturn will get set after + the task unblocks, but some compilers mistakenly generate a + warning about uxReturn being returned without being set if the + assignment is omitted. */ + uxReturn = 0; + } + else + { + /* The rendezvous bits were not set, but no block time was + specified - just return the current event bit value. */ + uxReturn = pxEventBits->uxEventBits; + xTimeoutOccurred = pdTRUE; + } + } + } + xAlreadyYielded = xTaskResumeAll(); + + if( xTicksToWait != ( TickType_t ) 0 ) + { + if( xAlreadyYielded == pdFALSE ) + { + portYIELD_WITHIN_API(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + /* The task blocked to wait for its required bits to be set - at this + point either the required bits were set or the block time expired. If + the required bits were set they will have been stored in the task's + event list item, and they should now be retrieved then cleared. */ + uxReturn = uxTaskResetEventItemValue(); + + if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 ) + { + /* The task timed out, just return the current event bit value. */ + taskENTER_CRITICAL(); + { + uxReturn = pxEventBits->uxEventBits; + + /* Although the task got here because it timed out before the + bits it was waiting for were set, it is possible that since it + unblocked another task has set the bits. If this is the case + then it needs to clear the bits before exiting. */ + if( ( uxReturn & uxBitsToWaitFor ) == uxBitsToWaitFor ) + { + pxEventBits->uxEventBits &= ~uxBitsToWaitFor; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + taskEXIT_CRITICAL(); + + xTimeoutOccurred = pdTRUE; + } + else + { + /* The task unblocked because the bits were set. */ + } + + /* Control bits might be set as the task had blocked should not be + returned. */ + uxReturn &= ~eventEVENT_BITS_CONTROL_BYTES; + } + + traceEVENT_GROUP_SYNC_END( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTimeoutOccurred ); + + /* Prevent compiler warnings when trace macros are not used. */ + ( void ) xTimeoutOccurred; + + return uxReturn; +} +/*-----------------------------------------------------------*/ + +EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) +{ +EventGroup_t *pxEventBits = xEventGroup; +EventBits_t uxReturn, uxControlBits = 0; +BaseType_t xWaitConditionMet, xAlreadyYielded; +BaseType_t xTimeoutOccurred = pdFALSE; + + /* Check the user is not attempting to wait on the bits used by the kernel + itself, and that at least one bit is being requested. */ + configASSERT( xEventGroup ); + configASSERT( ( uxBitsToWaitFor & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); + configASSERT( uxBitsToWaitFor != 0 ); + #if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) + { + configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) ); + } + #endif + + vTaskSuspendAll(); + { + const EventBits_t uxCurrentEventBits = pxEventBits->uxEventBits; + + /* Check to see if the wait condition is already met or not. */ + xWaitConditionMet = prvTestWaitCondition( uxCurrentEventBits, uxBitsToWaitFor, xWaitForAllBits ); + + if( xWaitConditionMet != pdFALSE ) + { + /* The wait condition has already been met so there is no need to + block. */ + uxReturn = uxCurrentEventBits; + xTicksToWait = ( TickType_t ) 0; + + /* Clear the wait bits if requested to do so. */ + if( xClearOnExit != pdFALSE ) + { + pxEventBits->uxEventBits &= ~uxBitsToWaitFor; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else if( xTicksToWait == ( TickType_t ) 0 ) + { + /* The wait condition has not been met, but no block time was + specified, so just return the current value. */ + uxReturn = uxCurrentEventBits; + xTimeoutOccurred = pdTRUE; + } + else + { + /* The task is going to block to wait for its required bits to be + set. uxControlBits are used to remember the specified behaviour of + this call to xEventGroupWaitBits() - for use when the event bits + unblock the task. */ + if( xClearOnExit != pdFALSE ) + { + uxControlBits |= eventCLEAR_EVENTS_ON_EXIT_BIT; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + if( xWaitForAllBits != pdFALSE ) + { + uxControlBits |= eventWAIT_FOR_ALL_BITS; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + /* Store the bits that the calling task is waiting for in the + task's event list item so the kernel knows when a match is + found. Then enter the blocked state. */ + vTaskPlaceOnUnorderedEventList( &( pxEventBits->xTasksWaitingForBits ), ( uxBitsToWaitFor | uxControlBits ), xTicksToWait ); + + /* This is obsolete as it will get set after the task unblocks, but + some compilers mistakenly generate a warning about the variable + being returned without being set if it is not done. */ + uxReturn = 0; + + traceEVENT_GROUP_WAIT_BITS_BLOCK( xEventGroup, uxBitsToWaitFor ); + } + } + xAlreadyYielded = xTaskResumeAll(); + + if( xTicksToWait != ( TickType_t ) 0 ) + { + if( xAlreadyYielded == pdFALSE ) + { + portYIELD_WITHIN_API(); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + /* The task blocked to wait for its required bits to be set - at this + point either the required bits were set or the block time expired. If + the required bits were set they will have been stored in the task's + event list item, and they should now be retrieved then cleared. */ + uxReturn = uxTaskResetEventItemValue(); + + if( ( uxReturn & eventUNBLOCKED_DUE_TO_BIT_SET ) == ( EventBits_t ) 0 ) + { + taskENTER_CRITICAL(); + { + /* The task timed out, just return the current event bit value. */ + uxReturn = pxEventBits->uxEventBits; + + /* It is possible that the event bits were updated between this + task leaving the Blocked state and running again. */ + if( prvTestWaitCondition( uxReturn, uxBitsToWaitFor, xWaitForAllBits ) != pdFALSE ) + { + if( xClearOnExit != pdFALSE ) + { + pxEventBits->uxEventBits &= ~uxBitsToWaitFor; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + xTimeoutOccurred = pdTRUE; + } + taskEXIT_CRITICAL(); + } + else + { + /* The task unblocked because the bits were set. */ + } + + /* The task blocked so control bits may have been set. */ + uxReturn &= ~eventEVENT_BITS_CONTROL_BYTES; + } + traceEVENT_GROUP_WAIT_BITS_END( xEventGroup, uxBitsToWaitFor, xTimeoutOccurred ); + + /* Prevent compiler warnings when trace macros are not used. */ + ( void ) xTimeoutOccurred; + + return uxReturn; +} +/*-----------------------------------------------------------*/ + +EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) +{ +EventGroup_t *pxEventBits = xEventGroup; +EventBits_t uxReturn; + + /* Check the user is not attempting to clear the bits used by the kernel + itself. */ + configASSERT( xEventGroup ); + configASSERT( ( uxBitsToClear & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); + + taskENTER_CRITICAL(); + { + traceEVENT_GROUP_CLEAR_BITS( xEventGroup, uxBitsToClear ); + + /* The value returned is the event group value prior to the bits being + cleared. */ + uxReturn = pxEventBits->uxEventBits; + + /* Clear the bits. */ + pxEventBits->uxEventBits &= ~uxBitsToClear; + } + taskEXIT_CRITICAL(); + + return uxReturn; +} +/*-----------------------------------------------------------*/ + +#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) ) + + BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) + { + BaseType_t xReturn; + + traceEVENT_GROUP_CLEAR_BITS_FROM_ISR( xEventGroup, uxBitsToClear ); + xReturn = xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL ); /*lint !e9087 Can't avoid cast to void* as a generic callback function not specific to this use case. Callback casts back to original type so safe. */ + + return xReturn; + } + +#endif +/*-----------------------------------------------------------*/ + +EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) +{ +UBaseType_t uxSavedInterruptStatus; +EventGroup_t const * const pxEventBits = xEventGroup; +EventBits_t uxReturn; + + uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR(); + { + uxReturn = pxEventBits->uxEventBits; + } + portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ); + + return uxReturn; +} /*lint !e818 EventGroupHandle_t is a typedef used in other functions to so can't be pointer to const. */ +/*-----------------------------------------------------------*/ + +EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) +{ +ListItem_t *pxListItem, *pxNext; +ListItem_t const *pxListEnd; +List_t const * pxList; +EventBits_t uxBitsToClear = 0, uxBitsWaitedFor, uxControlBits; +EventGroup_t *pxEventBits = xEventGroup; +BaseType_t xMatchFound = pdFALSE; + + /* Check the user is not attempting to set the bits used by the kernel + itself. */ + configASSERT( xEventGroup ); + configASSERT( ( uxBitsToSet & eventEVENT_BITS_CONTROL_BYTES ) == 0 ); + + pxList = &( pxEventBits->xTasksWaitingForBits ); + pxListEnd = listGET_END_MARKER( pxList ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ + vTaskSuspendAll(); + { + traceEVENT_GROUP_SET_BITS( xEventGroup, uxBitsToSet ); + + pxListItem = listGET_HEAD_ENTRY( pxList ); + + /* Set the bits. */ + pxEventBits->uxEventBits |= uxBitsToSet; + + /* See if the new bit value should unblock any tasks. */ + while( pxListItem != pxListEnd ) + { + pxNext = listGET_NEXT( pxListItem ); + uxBitsWaitedFor = listGET_LIST_ITEM_VALUE( pxListItem ); + xMatchFound = pdFALSE; + + /* Split the bits waited for from the control bits. */ + uxControlBits = uxBitsWaitedFor & eventEVENT_BITS_CONTROL_BYTES; + uxBitsWaitedFor &= ~eventEVENT_BITS_CONTROL_BYTES; + + if( ( uxControlBits & eventWAIT_FOR_ALL_BITS ) == ( EventBits_t ) 0 ) + { + /* Just looking for single bit being set. */ + if( ( uxBitsWaitedFor & pxEventBits->uxEventBits ) != ( EventBits_t ) 0 ) + { + xMatchFound = pdTRUE; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else if( ( uxBitsWaitedFor & pxEventBits->uxEventBits ) == uxBitsWaitedFor ) + { + /* All bits are set. */ + xMatchFound = pdTRUE; + } + else + { + /* Need all bits to be set, but not all the bits were set. */ + } + + if( xMatchFound != pdFALSE ) + { + /* The bits match. Should the bits be cleared on exit? */ + if( ( uxControlBits & eventCLEAR_EVENTS_ON_EXIT_BIT ) != ( EventBits_t ) 0 ) + { + uxBitsToClear |= uxBitsWaitedFor; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + + /* Store the actual event flag value in the task's event list + item before removing the task from the event list. The + eventUNBLOCKED_DUE_TO_BIT_SET bit is set so the task knows + that is was unblocked due to its required bits matching, rather + than because it timed out. */ + vTaskRemoveFromUnorderedEventList( pxListItem, pxEventBits->uxEventBits | eventUNBLOCKED_DUE_TO_BIT_SET ); + } + + /* Move onto the next list item. Note pxListItem->pxNext is not + used here as the list item may have been removed from the event list + and inserted into the ready/pending reading list. */ + pxListItem = pxNext; + } + + /* Clear any bits that matched when the eventCLEAR_EVENTS_ON_EXIT_BIT + bit was set in the control word. */ + pxEventBits->uxEventBits &= ~uxBitsToClear; + } + ( void ) xTaskResumeAll(); + + return pxEventBits->uxEventBits; +} +/*-----------------------------------------------------------*/ + +void vEventGroupDelete( EventGroupHandle_t xEventGroup ) +{ +EventGroup_t *pxEventBits = xEventGroup; +const List_t *pxTasksWaitingForBits = &( pxEventBits->xTasksWaitingForBits ); + + vTaskSuspendAll(); + { + traceEVENT_GROUP_DELETE( xEventGroup ); + + while( listCURRENT_LIST_LENGTH( pxTasksWaitingForBits ) > ( UBaseType_t ) 0 ) + { + /* Unblock the task, returning 0 as the event list is being deleted + and cannot therefore have any bits set. */ + configASSERT( pxTasksWaitingForBits->xListEnd.pxNext != ( const ListItem_t * ) &( pxTasksWaitingForBits->xListEnd ) ); + vTaskRemoveFromUnorderedEventList( pxTasksWaitingForBits->xListEnd.pxNext, eventUNBLOCKED_DUE_TO_BIT_SET ); + } + + #if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) ) + { + /* The event group can only have been allocated dynamically - free + it again. */ + vPortFree( pxEventBits ); + } + #elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) + { + /* The event group could have been allocated statically or + dynamically, so check before attempting to free the memory. */ + if( pxEventBits->ucStaticallyAllocated == ( uint8_t ) pdFALSE ) + { + vPortFree( pxEventBits ); + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ + } + ( void ) xTaskResumeAll(); +} +/*-----------------------------------------------------------*/ + +/* For internal use only - execute a 'set bits' command that was pended from +an interrupt. */ +void vEventGroupSetBitsCallback( void *pvEventGroup, const uint32_t ulBitsToSet ) +{ + ( void ) xEventGroupSetBits( pvEventGroup, ( EventBits_t ) ulBitsToSet ); /*lint !e9079 Can't avoid cast to void* as a generic timer callback prototype. Callback casts back to original type so safe. */ +} +/*-----------------------------------------------------------*/ + +/* For internal use only - execute a 'clear bits' command that was pended from +an interrupt. */ +void vEventGroupClearBitsCallback( void *pvEventGroup, const uint32_t ulBitsToClear ) +{ + ( void ) xEventGroupClearBits( pvEventGroup, ( EventBits_t ) ulBitsToClear ); /*lint !e9079 Can't avoid cast to void* as a generic timer callback prototype. Callback casts back to original type so safe. */ +} +/*-----------------------------------------------------------*/ + +static BaseType_t prvTestWaitCondition( const EventBits_t uxCurrentEventBits, const EventBits_t uxBitsToWaitFor, const BaseType_t xWaitForAllBits ) +{ +BaseType_t xWaitConditionMet = pdFALSE; + + if( xWaitForAllBits == pdFALSE ) + { + /* Task only has to wait for one bit within uxBitsToWaitFor to be + set. Is one already set? */ + if( ( uxCurrentEventBits & uxBitsToWaitFor ) != ( EventBits_t ) 0 ) + { + xWaitConditionMet = pdTRUE; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + else + { + /* Task has to wait for all the bits in uxBitsToWaitFor to be set. + Are they set already? */ + if( ( uxCurrentEventBits & uxBitsToWaitFor ) == uxBitsToWaitFor ) + { + xWaitConditionMet = pdTRUE; + } + else + { + mtCOVERAGE_TEST_MARKER(); + } + } + + return xWaitConditionMet; +} +/*-----------------------------------------------------------*/ + +#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 1 ) ) + + BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken ) + { + BaseType_t xReturn; + + traceEVENT_GROUP_SET_BITS_FROM_ISR( xEventGroup, uxBitsToSet ); + xReturn = xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken ); /*lint !e9087 Can't avoid cast to void* as a generic callback function not specific to this use case. Callback casts back to original type so safe. */ + + return xReturn; + } + +#endif +/*-----------------------------------------------------------*/ + +#if (configUSE_TRACE_FACILITY == 1) + + UBaseType_t uxEventGroupGetNumber( void* xEventGroup ) + { + UBaseType_t xReturn; + EventGroup_t const *pxEventBits = ( EventGroup_t * ) xEventGroup; /*lint !e9087 !e9079 EventGroupHandle_t is a pointer to an EventGroup_t, but EventGroupHandle_t is kept opaque outside of this file for data hiding purposes. */ + + if( xEventGroup == NULL ) + { + xReturn = 0; + } + else + { + xReturn = pxEventBits->uxEventGroupNumber; + } + + return xReturn; + } + +#endif /* configUSE_TRACE_FACILITY */ +/*-----------------------------------------------------------*/ + +#if ( configUSE_TRACE_FACILITY == 1 ) + + void vEventGroupSetNumber( void * xEventGroup, UBaseType_t uxEventGroupNumber ) + { + ( ( EventGroup_t * ) xEventGroup )->uxEventGroupNumber = uxEventGroupNumber; /*lint !e9087 !e9079 EventGroupHandle_t is a pointer to an EventGroup_t, but EventGroupHandle_t is kept opaque outside of this file for data hiding purposes. */ + } + +#endif /* configUSE_TRACE_FACILITY */ +/*-----------------------------------------------------------*/ + + diff --git a/components/freertos/include/FreeRTOS.h b/components/freertos/include/FreeRTOS.h new file mode 100644 index 00000000..4f533240 --- /dev/null +++ b/components/freertos/include/FreeRTOS.h @@ -0,0 +1,1290 @@ +/* + * FreeRTOS Kernel V10.2.1 + * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef INC_FREERTOS_H +#define INC_FREERTOS_H + +/* + * Include the generic headers required for the FreeRTOS port being used. + */ +#include + +/* + * If stdint.h cannot be located then: + * + If using GCC ensure the -nostdint options is *not* being used. + * + Ensure the project's include path includes the directory in which your + * compiler stores stdint.h. + * + Set any compiler options necessary for it to support C99, as technically + * stdint.h is only mandatory with C99 (FreeRTOS does not require C99 in any + * other way). + * + The FreeRTOS download includes a simple stdint.h definition that can be + * used in cases where none is provided by the compiler. The files only + * contains the typedefs required to build FreeRTOS. Read the instructions + * in FreeRTOS/source/stdint.readme for more information. + */ +#include /* READ COMMENT ABOVE. */ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Application specific configuration options. */ +#include "FreeRTOSConfig.h" + +/* Basic FreeRTOS definitions. */ +#include "projdefs.h" + +/* Definitions specific to the port being used. */ +#include "portable.h" + +/* Must be defaulted before configUSE_NEWLIB_REENTRANT is used below. */ +#ifndef configUSE_NEWLIB_REENTRANT + #define configUSE_NEWLIB_REENTRANT 0 +#endif + +/* Required if struct _reent is used. */ +#if ( configUSE_NEWLIB_REENTRANT == 1 ) + #include +#endif +/* + * Check all the required application specific macros have been defined. + * These macros are application specific and (as downloaded) are defined + * within FreeRTOSConfig.h. + */ + +#ifndef configMINIMAL_STACK_SIZE + #error Missing definition: configMINIMAL_STACK_SIZE must be defined in FreeRTOSConfig.h. configMINIMAL_STACK_SIZE defines the size (in words) of the stack allocated to the idle task. Refer to the demo project provided for your port for a suitable value. +#endif + +#ifndef configMAX_PRIORITIES + #error Missing definition: configMAX_PRIORITIES must be defined in FreeRTOSConfig.h. See the Configuration section of the FreeRTOS API documentation for details. +#endif + +#if configMAX_PRIORITIES < 1 + #error configMAX_PRIORITIES must be defined to be greater than or equal to 1. +#endif + +#ifndef configUSE_PREEMPTION + #error Missing definition: configUSE_PREEMPTION must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. +#endif + +#ifndef configUSE_IDLE_HOOK + #error Missing definition: configUSE_IDLE_HOOK must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. +#endif + +#ifndef configUSE_TICK_HOOK + #error Missing definition: configUSE_TICK_HOOK must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. +#endif + +#ifndef configUSE_16_BIT_TICKS + #error Missing definition: configUSE_16_BIT_TICKS must be defined in FreeRTOSConfig.h as either 1 or 0. See the Configuration section of the FreeRTOS API documentation for details. +#endif + +#ifndef configUSE_CO_ROUTINES + #define configUSE_CO_ROUTINES 0 +#endif + +#ifndef INCLUDE_vTaskPrioritySet + #define INCLUDE_vTaskPrioritySet 0 +#endif + +#ifndef INCLUDE_uxTaskPriorityGet + #define INCLUDE_uxTaskPriorityGet 0 +#endif + +#ifndef INCLUDE_vTaskDelete + #define INCLUDE_vTaskDelete 0 +#endif + +#ifndef INCLUDE_vTaskSuspend + #define INCLUDE_vTaskSuspend 0 +#endif + +#ifndef INCLUDE_vTaskDelayUntil + #define INCLUDE_vTaskDelayUntil 0 +#endif + +#ifndef INCLUDE_vTaskDelay + #define INCLUDE_vTaskDelay 0 +#endif + +#ifndef INCLUDE_xTaskGetIdleTaskHandle + #define INCLUDE_xTaskGetIdleTaskHandle 0 +#endif + +#ifndef INCLUDE_xTaskAbortDelay + #define INCLUDE_xTaskAbortDelay 0 +#endif + +#ifndef INCLUDE_xQueueGetMutexHolder + #define INCLUDE_xQueueGetMutexHolder 0 +#endif + +#ifndef INCLUDE_xSemaphoreGetMutexHolder + #define INCLUDE_xSemaphoreGetMutexHolder INCLUDE_xQueueGetMutexHolder +#endif + +#ifndef INCLUDE_xTaskGetHandle + #define INCLUDE_xTaskGetHandle 0 +#endif + +#ifndef INCLUDE_uxTaskGetStackHighWaterMark + #define INCLUDE_uxTaskGetStackHighWaterMark 0 +#endif + +#ifndef INCLUDE_uxTaskGetStackHighWaterMark2 + #define INCLUDE_uxTaskGetStackHighWaterMark2 0 +#endif + +#ifndef INCLUDE_eTaskGetState + #define INCLUDE_eTaskGetState 0 +#endif + +#ifndef INCLUDE_xTaskResumeFromISR + #define INCLUDE_xTaskResumeFromISR 1 +#endif + +#ifndef INCLUDE_xTimerPendFunctionCall + #define INCLUDE_xTimerPendFunctionCall 0 +#endif + +#ifndef INCLUDE_xTaskGetSchedulerState + #define INCLUDE_xTaskGetSchedulerState 0 +#endif + +#ifndef INCLUDE_xTaskGetCurrentTaskHandle + #define INCLUDE_xTaskGetCurrentTaskHandle 0 +#endif + +#if configUSE_CO_ROUTINES != 0 + #ifndef configMAX_CO_ROUTINE_PRIORITIES + #error configMAX_CO_ROUTINE_PRIORITIES must be greater than or equal to 1. + #endif +#endif + +#ifndef configUSE_DAEMON_TASK_STARTUP_HOOK + #define configUSE_DAEMON_TASK_STARTUP_HOOK 0 +#endif + +#ifndef configUSE_APPLICATION_TASK_TAG + #define configUSE_APPLICATION_TASK_TAG 0 +#endif + +#ifndef configNUM_THREAD_LOCAL_STORAGE_POINTERS + #define configNUM_THREAD_LOCAL_STORAGE_POINTERS 0 +#endif + +#ifndef configUSE_RECURSIVE_MUTEXES + #define configUSE_RECURSIVE_MUTEXES 0 +#endif + +#ifndef configUSE_MUTEXES + #define configUSE_MUTEXES 0 +#endif + +#ifndef configUSE_TIMERS + #define configUSE_TIMERS 0 +#endif + +#ifndef configUSE_COUNTING_SEMAPHORES + #define configUSE_COUNTING_SEMAPHORES 0 +#endif + +#ifndef configUSE_ALTERNATIVE_API + #define configUSE_ALTERNATIVE_API 0 +#endif + +#ifndef portCRITICAL_NESTING_IN_TCB + #define portCRITICAL_NESTING_IN_TCB 0 +#endif + +#ifndef configMAX_TASK_NAME_LEN + #define configMAX_TASK_NAME_LEN 16 +#endif + +#ifndef configIDLE_SHOULD_YIELD + #define configIDLE_SHOULD_YIELD 1 +#endif + +#if configMAX_TASK_NAME_LEN < 1 + #error configMAX_TASK_NAME_LEN must be set to a minimum of 1 in FreeRTOSConfig.h +#endif + +#ifndef configASSERT + #define configASSERT( x ) + #define configASSERT_DEFINED 0 +#else + #define configASSERT_DEFINED 1 +#endif + +/* configPRECONDITION should be resolve to configASSERT. +The CBMC proofs need a way to track assumptions and assertions. +A configPRECONDITION statement should express an implicit invariant or +assumption made. A configASSERT statement should express an invariant that must +hold explicit before calling the code. */ +#ifndef configPRECONDITION + #define configPRECONDITION( X ) configASSERT(X) + #define configPRECONDITION_DEFINED 0 +#else + #define configPRECONDITION_DEFINED 1 +#endif + +#ifndef portMEMORY_BARRIER + #define portMEMORY_BARRIER() +#endif + +/* The timers module relies on xTaskGetSchedulerState(). */ +#if configUSE_TIMERS == 1 + + #ifndef configTIMER_TASK_PRIORITY + #error If configUSE_TIMERS is set to 1 then configTIMER_TASK_PRIORITY must also be defined. + #endif /* configTIMER_TASK_PRIORITY */ + + #ifndef configTIMER_QUEUE_LENGTH + #error If configUSE_TIMERS is set to 1 then configTIMER_QUEUE_LENGTH must also be defined. + #endif /* configTIMER_QUEUE_LENGTH */ + + #ifndef configTIMER_TASK_STACK_DEPTH + #error If configUSE_TIMERS is set to 1 then configTIMER_TASK_STACK_DEPTH must also be defined. + #endif /* configTIMER_TASK_STACK_DEPTH */ + +#endif /* configUSE_TIMERS */ + +#ifndef portSET_INTERRUPT_MASK_FROM_ISR + #define portSET_INTERRUPT_MASK_FROM_ISR() 0 +#endif + +#ifndef portCLEAR_INTERRUPT_MASK_FROM_ISR + #define portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedStatusValue ) ( void ) uxSavedStatusValue +#endif + +#ifndef portCLEAN_UP_TCB + #define portCLEAN_UP_TCB( pxTCB ) ( void ) pxTCB +#endif + +#ifndef portPRE_TASK_DELETE_HOOK + #define portPRE_TASK_DELETE_HOOK( pvTaskToDelete, pxYieldPending ) +#endif + +#ifndef portSETUP_TCB + #define portSETUP_TCB( pxTCB ) ( void ) pxTCB +#endif + +#ifndef configQUEUE_REGISTRY_SIZE + #define configQUEUE_REGISTRY_SIZE 0U +#endif + +#if ( configQUEUE_REGISTRY_SIZE < 1 ) + #define vQueueAddToRegistry( xQueue, pcName ) + #define vQueueUnregisterQueue( xQueue ) + #define pcQueueGetName( xQueue ) +#endif + +#ifndef portPOINTER_SIZE_TYPE + #define portPOINTER_SIZE_TYPE uint32_t +#endif + +/* Remove any unused trace macros. */ +#ifndef traceSTART + /* Used to perform any necessary initialisation - for example, open a file + into which trace is to be written. */ + #define traceSTART() +#endif + +#ifndef traceEND + /* Use to close a trace, for example close a file into which trace has been + written. */ + #define traceEND() +#endif + +#ifndef traceTASK_SWITCHED_IN + /* Called after a task has been selected to run. pxCurrentTCB holds a pointer + to the task control block of the selected task. */ + #define traceTASK_SWITCHED_IN() +#endif + +#ifndef traceINCREASE_TICK_COUNT + /* Called before stepping the tick count after waking from tickless idle + sleep. */ + #define traceINCREASE_TICK_COUNT( x ) +#endif + +#ifndef traceLOW_POWER_IDLE_BEGIN + /* Called immediately before entering tickless idle. */ + #define traceLOW_POWER_IDLE_BEGIN() +#endif + +#ifndef traceLOW_POWER_IDLE_END + /* Called when returning to the Idle task after a tickless idle. */ + #define traceLOW_POWER_IDLE_END() +#endif + +#ifndef traceTASK_SWITCHED_OUT + /* Called before a task has been selected to run. pxCurrentTCB holds a pointer + to the task control block of the task being switched out. */ + #define traceTASK_SWITCHED_OUT() +#endif + +#ifndef traceTASK_PRIORITY_INHERIT + /* Called when a task attempts to take a mutex that is already held by a + lower priority task. pxTCBOfMutexHolder is a pointer to the TCB of the task + that holds the mutex. uxInheritedPriority is the priority the mutex holder + will inherit (the priority of the task that is attempting to obtain the + muted. */ + #define traceTASK_PRIORITY_INHERIT( pxTCBOfMutexHolder, uxInheritedPriority ) +#endif + +#ifndef traceTASK_PRIORITY_DISINHERIT + /* Called when a task releases a mutex, the holding of which had resulted in + the task inheriting the priority of a higher priority task. + pxTCBOfMutexHolder is a pointer to the TCB of the task that is releasing the + mutex. uxOriginalPriority is the task's configured (base) priority. */ + #define traceTASK_PRIORITY_DISINHERIT( pxTCBOfMutexHolder, uxOriginalPriority ) +#endif + +#ifndef traceBLOCKING_ON_QUEUE_RECEIVE + /* Task is about to block because it cannot read from a + queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore + upon which the read was attempted. pxCurrentTCB points to the TCB of the + task that attempted the read. */ + #define traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue ) +#endif + +#ifndef traceBLOCKING_ON_QUEUE_PEEK + /* Task is about to block because it cannot read from a + queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore + upon which the read was attempted. pxCurrentTCB points to the TCB of the + task that attempted the read. */ + #define traceBLOCKING_ON_QUEUE_PEEK( pxQueue ) +#endif + +#ifndef traceBLOCKING_ON_QUEUE_SEND + /* Task is about to block because it cannot write to a + queue/mutex/semaphore. pxQueue is a pointer to the queue/mutex/semaphore + upon which the write was attempted. pxCurrentTCB points to the TCB of the + task that attempted the write. */ + #define traceBLOCKING_ON_QUEUE_SEND( pxQueue ) +#endif + +#ifndef configCHECK_FOR_STACK_OVERFLOW + #define configCHECK_FOR_STACK_OVERFLOW 0 +#endif + +#ifndef configRECORD_STACK_HIGH_ADDRESS + #define configRECORD_STACK_HIGH_ADDRESS 0 +#endif + +#ifndef configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H + #define configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H 0 +#endif + +/* The following event macros are embedded in the kernel API calls. */ + +#ifndef traceMOVED_TASK_TO_READY_STATE + #define traceMOVED_TASK_TO_READY_STATE( pxTCB ) +#endif + +#ifndef tracePOST_MOVED_TASK_TO_READY_STATE + #define tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB ) +#endif + +#ifndef traceQUEUE_CREATE + #define traceQUEUE_CREATE( pxNewQueue ) +#endif + +#ifndef traceQUEUE_CREATE_FAILED + #define traceQUEUE_CREATE_FAILED( ucQueueType ) +#endif + +#ifndef traceCREATE_MUTEX + #define traceCREATE_MUTEX( pxNewQueue ) +#endif + +#ifndef traceCREATE_MUTEX_FAILED + #define traceCREATE_MUTEX_FAILED() +#endif + +#ifndef traceGIVE_MUTEX_RECURSIVE + #define traceGIVE_MUTEX_RECURSIVE( pxMutex ) +#endif + +#ifndef traceGIVE_MUTEX_RECURSIVE_FAILED + #define traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex ) +#endif + +#ifndef traceTAKE_MUTEX_RECURSIVE + #define traceTAKE_MUTEX_RECURSIVE( pxMutex ) +#endif + +#ifndef traceTAKE_MUTEX_RECURSIVE_FAILED + #define traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex ) +#endif + +#ifndef traceCREATE_COUNTING_SEMAPHORE + #define traceCREATE_COUNTING_SEMAPHORE() +#endif + +#ifndef traceCREATE_COUNTING_SEMAPHORE_FAILED + #define traceCREATE_COUNTING_SEMAPHORE_FAILED() +#endif + +#ifndef traceQUEUE_SEND + #define traceQUEUE_SEND( pxQueue ) +#endif + +#ifndef traceQUEUE_SEND_FAILED + #define traceQUEUE_SEND_FAILED( pxQueue ) +#endif + +#ifndef traceQUEUE_RECEIVE + #define traceQUEUE_RECEIVE( pxQueue ) +#endif + +#ifndef traceQUEUE_PEEK + #define traceQUEUE_PEEK( pxQueue ) +#endif + +#ifndef traceQUEUE_PEEK_FAILED + #define traceQUEUE_PEEK_FAILED( pxQueue ) +#endif + +#ifndef traceQUEUE_PEEK_FROM_ISR + #define traceQUEUE_PEEK_FROM_ISR( pxQueue ) +#endif + +#ifndef traceQUEUE_RECEIVE_FAILED + #define traceQUEUE_RECEIVE_FAILED( pxQueue ) +#endif + +#ifndef traceQUEUE_SEND_FROM_ISR + #define traceQUEUE_SEND_FROM_ISR( pxQueue ) +#endif + +#ifndef traceQUEUE_SEND_FROM_ISR_FAILED + #define traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue ) +#endif + +#ifndef traceQUEUE_RECEIVE_FROM_ISR + #define traceQUEUE_RECEIVE_FROM_ISR( pxQueue ) +#endif + +#ifndef traceQUEUE_RECEIVE_FROM_ISR_FAILED + #define traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue ) +#endif + +#ifndef traceQUEUE_PEEK_FROM_ISR_FAILED + #define traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue ) +#endif + +#ifndef traceQUEUE_DELETE + #define traceQUEUE_DELETE( pxQueue ) +#endif + +#ifndef traceTASK_CREATE + #define traceTASK_CREATE( pxNewTCB ) +#endif + +#ifndef traceTASK_CREATE_FAILED + #define traceTASK_CREATE_FAILED() +#endif + +#ifndef traceTASK_DELETE + #define traceTASK_DELETE( pxTaskToDelete ) +#endif + +#ifndef traceTASK_DELAY_UNTIL + #define traceTASK_DELAY_UNTIL( x ) +#endif + +#ifndef traceTASK_DELAY + #define traceTASK_DELAY() +#endif + +#ifndef traceTASK_PRIORITY_SET + #define traceTASK_PRIORITY_SET( pxTask, uxNewPriority ) +#endif + +#ifndef traceTASK_SUSPEND + #define traceTASK_SUSPEND( pxTaskToSuspend ) +#endif + +#ifndef traceTASK_RESUME + #define traceTASK_RESUME( pxTaskToResume ) +#endif + +#ifndef traceTASK_RESUME_FROM_ISR + #define traceTASK_RESUME_FROM_ISR( pxTaskToResume ) +#endif + +#ifndef traceTASK_INCREMENT_TICK + #define traceTASK_INCREMENT_TICK( xTickCount ) +#endif + +#ifndef traceTIMER_CREATE + #define traceTIMER_CREATE( pxNewTimer ) +#endif + +#ifndef traceTIMER_CREATE_FAILED + #define traceTIMER_CREATE_FAILED() +#endif + +#ifndef traceTIMER_COMMAND_SEND + #define traceTIMER_COMMAND_SEND( xTimer, xMessageID, xMessageValueValue, xReturn ) +#endif + +#ifndef traceTIMER_EXPIRED + #define traceTIMER_EXPIRED( pxTimer ) +#endif + +#ifndef traceTIMER_COMMAND_RECEIVED + #define traceTIMER_COMMAND_RECEIVED( pxTimer, xMessageID, xMessageValue ) +#endif + +#ifndef traceMALLOC + #define traceMALLOC( pvAddress, uiSize ) +#endif + +#ifndef traceFREE + #define traceFREE( pvAddress, uiSize ) +#endif + +#ifndef traceEVENT_GROUP_CREATE + #define traceEVENT_GROUP_CREATE( xEventGroup ) +#endif + +#ifndef traceEVENT_GROUP_CREATE_FAILED + #define traceEVENT_GROUP_CREATE_FAILED() +#endif + +#ifndef traceEVENT_GROUP_SYNC_BLOCK + #define traceEVENT_GROUP_SYNC_BLOCK( xEventGroup, uxBitsToSet, uxBitsToWaitFor ) +#endif + +#ifndef traceEVENT_GROUP_SYNC_END + #define traceEVENT_GROUP_SYNC_END( xEventGroup, uxBitsToSet, uxBitsToWaitFor, xTimeoutOccurred ) ( void ) xTimeoutOccurred +#endif + +#ifndef traceEVENT_GROUP_WAIT_BITS_BLOCK + #define traceEVENT_GROUP_WAIT_BITS_BLOCK( xEventGroup, uxBitsToWaitFor ) +#endif + +#ifndef traceEVENT_GROUP_WAIT_BITS_END + #define traceEVENT_GROUP_WAIT_BITS_END( xEventGroup, uxBitsToWaitFor, xTimeoutOccurred ) ( void ) xTimeoutOccurred +#endif + +#ifndef traceEVENT_GROUP_CLEAR_BITS + #define traceEVENT_GROUP_CLEAR_BITS( xEventGroup, uxBitsToClear ) +#endif + +#ifndef traceEVENT_GROUP_CLEAR_BITS_FROM_ISR + #define traceEVENT_GROUP_CLEAR_BITS_FROM_ISR( xEventGroup, uxBitsToClear ) +#endif + +#ifndef traceEVENT_GROUP_SET_BITS + #define traceEVENT_GROUP_SET_BITS( xEventGroup, uxBitsToSet ) +#endif + +#ifndef traceEVENT_GROUP_SET_BITS_FROM_ISR + #define traceEVENT_GROUP_SET_BITS_FROM_ISR( xEventGroup, uxBitsToSet ) +#endif + +#ifndef traceEVENT_GROUP_DELETE + #define traceEVENT_GROUP_DELETE( xEventGroup ) +#endif + +#ifndef tracePEND_FUNC_CALL + #define tracePEND_FUNC_CALL(xFunctionToPend, pvParameter1, ulParameter2, ret) +#endif + +#ifndef tracePEND_FUNC_CALL_FROM_ISR + #define tracePEND_FUNC_CALL_FROM_ISR(xFunctionToPend, pvParameter1, ulParameter2, ret) +#endif + +#ifndef traceQUEUE_REGISTRY_ADD + #define traceQUEUE_REGISTRY_ADD(xQueue, pcQueueName) +#endif + +#ifndef traceTASK_NOTIFY_TAKE_BLOCK + #define traceTASK_NOTIFY_TAKE_BLOCK() +#endif + +#ifndef traceTASK_NOTIFY_TAKE + #define traceTASK_NOTIFY_TAKE() +#endif + +#ifndef traceTASK_NOTIFY_WAIT_BLOCK + #define traceTASK_NOTIFY_WAIT_BLOCK() +#endif + +#ifndef traceTASK_NOTIFY_WAIT + #define traceTASK_NOTIFY_WAIT() +#endif + +#ifndef traceTASK_NOTIFY + #define traceTASK_NOTIFY() +#endif + +#ifndef traceTASK_NOTIFY_FROM_ISR + #define traceTASK_NOTIFY_FROM_ISR() +#endif + +#ifndef traceTASK_NOTIFY_GIVE_FROM_ISR + #define traceTASK_NOTIFY_GIVE_FROM_ISR() +#endif + +#ifndef traceSTREAM_BUFFER_CREATE_FAILED + #define traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer ) +#endif + +#ifndef traceSTREAM_BUFFER_CREATE_STATIC_FAILED + #define traceSTREAM_BUFFER_CREATE_STATIC_FAILED( xReturn, xIsMessageBuffer ) +#endif + +#ifndef traceSTREAM_BUFFER_CREATE + #define traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer ) +#endif + +#ifndef traceSTREAM_BUFFER_DELETE + #define traceSTREAM_BUFFER_DELETE( xStreamBuffer ) +#endif + +#ifndef traceSTREAM_BUFFER_RESET + #define traceSTREAM_BUFFER_RESET( xStreamBuffer ) +#endif + +#ifndef traceBLOCKING_ON_STREAM_BUFFER_SEND + #define traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer ) +#endif + +#ifndef traceSTREAM_BUFFER_SEND + #define traceSTREAM_BUFFER_SEND( xStreamBuffer, xBytesSent ) +#endif + +#ifndef traceSTREAM_BUFFER_SEND_FAILED + #define traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer ) +#endif + +#ifndef traceSTREAM_BUFFER_SEND_FROM_ISR + #define traceSTREAM_BUFFER_SEND_FROM_ISR( xStreamBuffer, xBytesSent ) +#endif + +#ifndef traceBLOCKING_ON_STREAM_BUFFER_RECEIVE + #define traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer ) +#endif + +#ifndef traceSTREAM_BUFFER_RECEIVE + #define traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength ) +#endif + +#ifndef traceSTREAM_BUFFER_RECEIVE_FAILED + #define traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer ) +#endif + +#ifndef traceSTREAM_BUFFER_RECEIVE_FROM_ISR + #define traceSTREAM_BUFFER_RECEIVE_FROM_ISR( xStreamBuffer, xReceivedLength ) +#endif + +#ifndef configGENERATE_RUN_TIME_STATS + #define configGENERATE_RUN_TIME_STATS 0 +#endif + +#if ( configGENERATE_RUN_TIME_STATS == 1 ) + + #ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS + #error If configGENERATE_RUN_TIME_STATS is defined then portCONFIGURE_TIMER_FOR_RUN_TIME_STATS must also be defined. portCONFIGURE_TIMER_FOR_RUN_TIME_STATS should call a port layer function to setup a peripheral timer/counter that can then be used as the run time counter time base. + #endif /* portCONFIGURE_TIMER_FOR_RUN_TIME_STATS */ + + #ifndef portGET_RUN_TIME_COUNTER_VALUE + #ifndef portALT_GET_RUN_TIME_COUNTER_VALUE + #error If configGENERATE_RUN_TIME_STATS is defined then either portGET_RUN_TIME_COUNTER_VALUE or portALT_GET_RUN_TIME_COUNTER_VALUE must also be defined. See the examples provided and the FreeRTOS web site for more information. + #endif /* portALT_GET_RUN_TIME_COUNTER_VALUE */ + #endif /* portGET_RUN_TIME_COUNTER_VALUE */ + +#endif /* configGENERATE_RUN_TIME_STATS */ + +#ifndef portCONFIGURE_TIMER_FOR_RUN_TIME_STATS + #define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() +#endif + +#ifndef configUSE_MALLOC_FAILED_HOOK + #define configUSE_MALLOC_FAILED_HOOK 0 +#endif + +#ifndef portPRIVILEGE_BIT + #define portPRIVILEGE_BIT ( ( UBaseType_t ) 0x00 ) +#endif + +#ifndef portYIELD_WITHIN_API + #define portYIELD_WITHIN_API portYIELD +#endif + +#ifndef portSUPPRESS_TICKS_AND_SLEEP + #define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) +#endif + +#ifndef configEXPECTED_IDLE_TIME_BEFORE_SLEEP + #define configEXPECTED_IDLE_TIME_BEFORE_SLEEP 2 +#endif + +#if configEXPECTED_IDLE_TIME_BEFORE_SLEEP < 2 + #error configEXPECTED_IDLE_TIME_BEFORE_SLEEP must not be less than 2 +#endif + +#ifndef configUSE_TICKLESS_IDLE + #define configUSE_TICKLESS_IDLE 0 +#endif + +#ifndef configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING + #define configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING( x ) +#endif + +#ifndef configPRE_SLEEP_PROCESSING + #define configPRE_SLEEP_PROCESSING( x ) +#endif + +#ifndef configPOST_SLEEP_PROCESSING + #define configPOST_SLEEP_PROCESSING( x ) +#endif + +#ifndef configUSE_QUEUE_SETS + #define configUSE_QUEUE_SETS 0 +#endif + +#ifndef portTASK_USES_FLOATING_POINT + #define portTASK_USES_FLOATING_POINT() +#endif + +#ifndef portALLOCATE_SECURE_CONTEXT + #define portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) +#endif + +#ifndef portDONT_DISCARD + #define portDONT_DISCARD +#endif + +#ifndef configUSE_TIME_SLICING + #define configUSE_TIME_SLICING 1 +#endif + +#ifndef configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS + #define configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS 0 +#endif + +#ifndef configUSE_STATS_FORMATTING_FUNCTIONS + #define configUSE_STATS_FORMATTING_FUNCTIONS 0 +#endif + +#ifndef portASSERT_IF_INTERRUPT_PRIORITY_INVALID + #define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() +#endif + +#ifndef configUSE_TRACE_FACILITY + #define configUSE_TRACE_FACILITY 0 +#endif + +#ifndef mtCOVERAGE_TEST_MARKER + #define mtCOVERAGE_TEST_MARKER() +#endif + +#ifndef mtCOVERAGE_TEST_DELAY + #define mtCOVERAGE_TEST_DELAY() +#endif + +#ifndef portASSERT_IF_IN_ISR + #define portASSERT_IF_IN_ISR() +#endif + +#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION + #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 +#endif + +#ifndef configAPPLICATION_ALLOCATED_HEAP + #define configAPPLICATION_ALLOCATED_HEAP 1 +#endif + +#ifndef configUSE_TASK_NOTIFICATIONS + #define configUSE_TASK_NOTIFICATIONS 1 +#endif + +#ifndef configUSE_POSIX_ERRNO + #define configUSE_POSIX_ERRNO 0 +#endif + +#ifndef portTICK_TYPE_IS_ATOMIC + #define portTICK_TYPE_IS_ATOMIC 0 +#endif + +#ifndef configSUPPORT_STATIC_ALLOCATION + /* Defaults to 0 for backward compatibility. */ + #define configSUPPORT_STATIC_ALLOCATION 0 +#endif + +#ifndef configSUPPORT_DYNAMIC_ALLOCATION + /* Defaults to 1 for backward compatibility. */ + #define configSUPPORT_DYNAMIC_ALLOCATION 1 +#endif + +#ifndef configSTACK_DEPTH_TYPE + /* Defaults to uint16_t for backward compatibility, but can be overridden + in FreeRTOSConfig.h if uint16_t is too restrictive. */ + #define configSTACK_DEPTH_TYPE uint16_t +#endif + +#ifndef configMESSAGE_BUFFER_LENGTH_TYPE + /* Defaults to size_t for backward compatibility, but can be overridden + in FreeRTOSConfig.h if lengths will always be less than the number of bytes + in a size_t. */ + #define configMESSAGE_BUFFER_LENGTH_TYPE size_t +#endif + +/* Sanity check the configuration. */ +#if( configUSE_TICKLESS_IDLE != 0 ) + #if( INCLUDE_vTaskSuspend != 1 ) + #error INCLUDE_vTaskSuspend must be set to 1 if configUSE_TICKLESS_IDLE is not set to 0 + #endif /* INCLUDE_vTaskSuspend */ +#endif /* configUSE_TICKLESS_IDLE */ + +#if( ( configSUPPORT_STATIC_ALLOCATION == 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 0 ) ) + #error configSUPPORT_STATIC_ALLOCATION and configSUPPORT_DYNAMIC_ALLOCATION cannot both be 0, but can both be 1. +#endif + +#if( ( configUSE_RECURSIVE_MUTEXES == 1 ) && ( configUSE_MUTEXES != 1 ) ) + #error configUSE_MUTEXES must be set to 1 to use recursive mutexes +#endif + +#ifndef configINITIAL_TICK_COUNT + #define configINITIAL_TICK_COUNT 0 +#endif + +#if( portTICK_TYPE_IS_ATOMIC == 0 ) + /* Either variables of tick type cannot be read atomically, or + portTICK_TYPE_IS_ATOMIC was not set - map the critical sections used when + the tick count is returned to the standard critical section macros. */ + #define portTICK_TYPE_ENTER_CRITICAL() portENTER_CRITICAL() + #define portTICK_TYPE_EXIT_CRITICAL() portEXIT_CRITICAL() + #define portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR() portSET_INTERRUPT_MASK_FROM_ISR() + #define portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( x ) portCLEAR_INTERRUPT_MASK_FROM_ISR( ( x ) ) +#else + /* The tick type can be read atomically, so critical sections used when the + tick count is returned can be defined away. */ + #define portTICK_TYPE_ENTER_CRITICAL() + #define portTICK_TYPE_EXIT_CRITICAL() + #define portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR() 0 + #define portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( x ) ( void ) x +#endif + +/* Definitions to allow backward compatibility with FreeRTOS versions prior to +V8 if desired. */ +#ifndef configENABLE_BACKWARD_COMPATIBILITY + #define configENABLE_BACKWARD_COMPATIBILITY 1 +#endif + +#ifndef configPRINTF + /* configPRINTF() was not defined, so define it away to nothing. To use + configPRINTF() then define it as follows (where MyPrintFunction() is + provided by the application writer): + + void MyPrintFunction(const char *pcFormat, ... ); + #define configPRINTF( X ) MyPrintFunction X + + Then call like a standard printf() function, but placing brackets around + all parameters so they are passed as a single parameter. For example: + configPRINTF( ("Value = %d", MyVariable) ); */ + #define configPRINTF( X ) +#endif + +#ifndef configMAX + /* The application writer has not provided their own MAX macro, so define + the following generic implementation. */ + #define configMAX( a, b ) ( ( ( a ) > ( b ) ) ? ( a ) : ( b ) ) +#endif + +#ifndef configMIN + /* The application writer has not provided their own MAX macro, so define + the following generic implementation. */ + #define configMIN( a, b ) ( ( ( a ) < ( b ) ) ? ( a ) : ( b ) ) +#endif + +#if configENABLE_BACKWARD_COMPATIBILITY == 1 + #define eTaskStateGet eTaskGetState + #define portTickType TickType_t + #define xTaskHandle TaskHandle_t + #define xQueueHandle QueueHandle_t + #define xSemaphoreHandle SemaphoreHandle_t + #define xQueueSetHandle QueueSetHandle_t + #define xQueueSetMemberHandle QueueSetMemberHandle_t + #define xTimeOutType TimeOut_t + #define xMemoryRegion MemoryRegion_t + #define xTaskParameters TaskParameters_t + #define xTaskStatusType TaskStatus_t + #define xTimerHandle TimerHandle_t + #define xCoRoutineHandle CoRoutineHandle_t + #define pdTASK_HOOK_CODE TaskHookFunction_t + #define portTICK_RATE_MS portTICK_PERIOD_MS + #define pcTaskGetTaskName pcTaskGetName + #define pcTimerGetTimerName pcTimerGetName + #define pcQueueGetQueueName pcQueueGetName + #define vTaskGetTaskInfo vTaskGetInfo + + /* Backward compatibility within the scheduler code only - these definitions + are not really required but are included for completeness. */ + #define tmrTIMER_CALLBACK TimerCallbackFunction_t + #define pdTASK_CODE TaskFunction_t + #define xListItem ListItem_t + #define xList List_t + + /* For libraries that break the list data hiding, and access list structure + members directly (which is not supposed to be done). */ + #define pxContainer pvContainer +#endif /* configENABLE_BACKWARD_COMPATIBILITY */ + +#if( configUSE_ALTERNATIVE_API != 0 ) + #error The alternative API was deprecated some time ago, and was removed in FreeRTOS V9.0 0 +#endif + +/* Set configUSE_TASK_FPU_SUPPORT to 0 to omit floating point support even +if floating point hardware is otherwise supported by the FreeRTOS port in use. +This constant is not supported by all FreeRTOS ports that include floating +point support. */ +#ifndef configUSE_TASK_FPU_SUPPORT + #define configUSE_TASK_FPU_SUPPORT 1 +#endif + +/* Set configENABLE_MPU to 1 to enable MPU support and 0 to disable it. This is +currently used in ARMv8M ports. */ +#ifndef configENABLE_MPU + #define configENABLE_MPU 0 +#endif + +/* Set configENABLE_FPU to 1 to enable FPU support and 0 to disable it. This is +currently used in ARMv8M ports. */ +#ifndef configENABLE_FPU + #define configENABLE_FPU 1 +#endif + +/* Set configENABLE_TRUSTZONE to 1 enable TrustZone support and 0 to disable it. +This is currently used in ARMv8M ports. */ +#ifndef configENABLE_TRUSTZONE + #define configENABLE_TRUSTZONE 1 +#endif + +/* Set configRUN_FREERTOS_SECURE_ONLY to 1 to run the FreeRTOS ARMv8M port on +the Secure Side only. */ +#ifndef configRUN_FREERTOS_SECURE_ONLY + #define configRUN_FREERTOS_SECURE_ONLY 0 +#endif + +/* Sometimes the FreeRTOSConfig.h settings only allow a task to be created using + * dynamically allocated RAM, in which case when any task is deleted it is known + * that both the task's stack and TCB need to be freed. Sometimes the + * FreeRTOSConfig.h settings only allow a task to be created using statically + * allocated RAM, in which case when any task is deleted it is known that neither + * the task's stack or TCB should be freed. Sometimes the FreeRTOSConfig.h + * settings allow a task to be created using either statically or dynamically + * allocated RAM, in which case a member of the TCB is used to record whether the + * stack and/or TCB were allocated statically or dynamically, so when a task is + * deleted the RAM that was allocated dynamically is freed again and no attempt is + * made to free the RAM that was allocated statically. + * tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE is only true if it is possible for a + * task to be created using either statically or dynamically allocated RAM. Note + * that if portUSING_MPU_WRAPPERS is 1 then a protected task can be created with + * a statically allocated stack and a dynamically allocated TCB. + * + * The following table lists various combinations of portUSING_MPU_WRAPPERS, + * configSUPPORT_DYNAMIC_ALLOCATION and configSUPPORT_STATIC_ALLOCATION and + * when it is possible to have both static and dynamic allocation: + * +-----+---------+--------+-----------------------------+-----------------------------------+------------------+-----------+ + * | MPU | Dynamic | Static | Available Functions | Possible Allocations | Both Dynamic and | Need Free | + * | | | | | | Static Possible | | + * +-----+---------+--------+-----------------------------+-----------------------------------+------------------+-----------+ + * | 0 | 0 | 1 | xTaskCreateStatic | TCB - Static, Stack - Static | No | No | + * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------| + * | 0 | 1 | 0 | xTaskCreate | TCB - Dynamic, Stack - Dynamic | No | Yes | + * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------| + * | 0 | 1 | 1 | xTaskCreate, | 1. TCB - Dynamic, Stack - Dynamic | Yes | Yes | + * | | | | xTaskCreateStatic | 2. TCB - Static, Stack - Static | | | + * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------| + * | 1 | 0 | 1 | xTaskCreateStatic, | TCB - Static, Stack - Static | No | No | + * | | | | xTaskCreateRestrictedStatic | | | | + * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------| + * | 1 | 1 | 0 | xTaskCreate, | 1. TCB - Dynamic, Stack - Dynamic | Yes | Yes | + * | | | | xTaskCreateRestricted | 2. TCB - Dynamic, Stack - Static | | | + * +-----|---------|--------|-----------------------------|-----------------------------------|------------------|-----------| + * | 1 | 1 | 1 | xTaskCreate, | 1. TCB - Dynamic, Stack - Dynamic | Yes | Yes | + * | | | | xTaskCreateStatic, | 2. TCB - Dynamic, Stack - Static | | | + * | | | | xTaskCreateRestricted, | 3. TCB - Static, Stack - Static | | | + * | | | | xTaskCreateRestrictedStatic | | | | + * +-----+---------+--------+-----------------------------+-----------------------------------+------------------+-----------+ + */ +#define tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE ( ( ( portUSING_MPU_WRAPPERS == 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) || \ + ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) ) + +/* + * In line with software engineering best practice, FreeRTOS implements a strict + * data hiding policy, so the real structures used by FreeRTOS to maintain the + * state of tasks, queues, semaphores, etc. are not accessible to the application + * code. However, if the application writer wants to statically allocate such + * an object then the size of the object needs to be know. Dummy structures + * that are guaranteed to have the same size and alignment requirements of the + * real objects are used for this purpose. The dummy list and list item + * structures below are used for inclusion in such a dummy structure. + */ +struct xSTATIC_LIST_ITEM +{ + #if( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) + TickType_t xDummy1; + #endif + TickType_t xDummy2; + void *pvDummy3[ 4 ]; + #if( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) + TickType_t xDummy4; + #endif +}; +typedef struct xSTATIC_LIST_ITEM StaticListItem_t; + +/* See the comments above the struct xSTATIC_LIST_ITEM definition. */ +struct xSTATIC_MINI_LIST_ITEM +{ + #if( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) + TickType_t xDummy1; + #endif + TickType_t xDummy2; + void *pvDummy3[ 2 ]; +}; +typedef struct xSTATIC_MINI_LIST_ITEM StaticMiniListItem_t; + +/* See the comments above the struct xSTATIC_LIST_ITEM definition. */ +typedef struct xSTATIC_LIST +{ + #if( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) + TickType_t xDummy1; + #endif + UBaseType_t uxDummy2; + void *pvDummy3; + StaticMiniListItem_t xDummy4; + #if( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 1 ) + TickType_t xDummy5; + #endif +} StaticList_t; + +/* + * In line with software engineering best practice, especially when supplying a + * library that is likely to change in future versions, FreeRTOS implements a + * strict data hiding policy. This means the Task structure used internally by + * FreeRTOS is not accessible to application code. However, if the application + * writer wants to statically allocate the memory required to create a task then + * the size of the task object needs to be know. The StaticTask_t structure + * below is provided for this purpose. Its sizes and alignment requirements are + * guaranteed to match those of the genuine structure, no matter which + * architecture is being used, and no matter how the values in FreeRTOSConfig.h + * are set. Its contents are somewhat obfuscated in the hope users will + * recognise that it would be unwise to make direct use of the structure members. + */ +typedef struct xSTATIC_TCB +{ + void *pxDummy1; + #if ( portUSING_MPU_WRAPPERS == 1 ) + xMPU_SETTINGS xDummy2; + #endif + StaticListItem_t xDummy3[ 2 ]; + UBaseType_t uxDummy5; + void *pxDummy6; + uint8_t ucDummy7[ configMAX_TASK_NAME_LEN ]; + #if ( ( portSTACK_GROWTH > 0 ) || ( configRECORD_STACK_HIGH_ADDRESS == 1 ) ) + void *pxDummy8; + #endif + #if ( portCRITICAL_NESTING_IN_TCB == 1 ) + UBaseType_t uxDummy9; + #endif + #if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxDummy10[ 2 ]; + #endif + #if ( configUSE_MUTEXES == 1 ) + UBaseType_t uxDummy12[ 2 ]; + #endif + #if ( configUSE_APPLICATION_TASK_TAG == 1 ) + void *pxDummy14; + #endif + #if( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 ) + void *pvDummy15[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ]; + #endif + #if ( configGENERATE_RUN_TIME_STATS == 1 ) + uint32_t ulDummy16; + #endif + #if ( configUSE_NEWLIB_REENTRANT == 1 ) + struct _reent xDummy17; + #endif + #if ( configUSE_TASK_NOTIFICATIONS == 1 ) + uint32_t ulDummy18; + uint8_t ucDummy19; + #endif + #if ( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) + uint8_t uxDummy20; + #endif + + #if( INCLUDE_xTaskAbortDelay == 1 ) + uint8_t ucDummy21; + #endif + #if ( configUSE_POSIX_ERRNO == 1 ) + int iDummy22; + #endif +} StaticTask_t; + +/* + * In line with software engineering best practice, especially when supplying a + * library that is likely to change in future versions, FreeRTOS implements a + * strict data hiding policy. This means the Queue structure used internally by + * FreeRTOS is not accessible to application code. However, if the application + * writer wants to statically allocate the memory required to create a queue + * then the size of the queue object needs to be know. The StaticQueue_t + * structure below is provided for this purpose. Its sizes and alignment + * requirements are guaranteed to match those of the genuine structure, no + * matter which architecture is being used, and no matter how the values in + * FreeRTOSConfig.h are set. Its contents are somewhat obfuscated in the hope + * users will recognise that it would be unwise to make direct use of the + * structure members. + */ +typedef struct xSTATIC_QUEUE +{ + void *pvDummy1[ 3 ]; + + union + { + void *pvDummy2; + UBaseType_t uxDummy2; + } u; + + StaticList_t xDummy3[ 2 ]; + UBaseType_t uxDummy4[ 3 ]; + uint8_t ucDummy5[ 2 ]; + + #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) + uint8_t ucDummy6; + #endif + + #if ( configUSE_QUEUE_SETS == 1 ) + void *pvDummy7; + #endif + + #if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxDummy8; + uint8_t ucDummy9; + #endif + +} StaticQueue_t; +typedef StaticQueue_t StaticSemaphore_t; + +/* + * In line with software engineering best practice, especially when supplying a + * library that is likely to change in future versions, FreeRTOS implements a + * strict data hiding policy. This means the event group structure used + * internally by FreeRTOS is not accessible to application code. However, if + * the application writer wants to statically allocate the memory required to + * create an event group then the size of the event group object needs to be + * know. The StaticEventGroup_t structure below is provided for this purpose. + * Its sizes and alignment requirements are guaranteed to match those of the + * genuine structure, no matter which architecture is being used, and no matter + * how the values in FreeRTOSConfig.h are set. Its contents are somewhat + * obfuscated in the hope users will recognise that it would be unwise to make + * direct use of the structure members. + */ +typedef struct xSTATIC_EVENT_GROUP +{ + TickType_t xDummy1; + StaticList_t xDummy2; + + #if( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxDummy3; + #endif + + #if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) + uint8_t ucDummy4; + #endif + +} StaticEventGroup_t; + +/* + * In line with software engineering best practice, especially when supplying a + * library that is likely to change in future versions, FreeRTOS implements a + * strict data hiding policy. This means the software timer structure used + * internally by FreeRTOS is not accessible to application code. However, if + * the application writer wants to statically allocate the memory required to + * create a software timer then the size of the queue object needs to be know. + * The StaticTimer_t structure below is provided for this purpose. Its sizes + * and alignment requirements are guaranteed to match those of the genuine + * structure, no matter which architecture is being used, and no matter how the + * values in FreeRTOSConfig.h are set. Its contents are somewhat obfuscated in + * the hope users will recognise that it would be unwise to make direct use of + * the structure members. + */ +typedef struct xSTATIC_TIMER +{ + void *pvDummy1; + StaticListItem_t xDummy2; + TickType_t xDummy3; + void *pvDummy5; + TaskFunction_t pvDummy6; + #if( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxDummy7; + #endif + uint8_t ucDummy8; + +} StaticTimer_t; + +/* +* In line with software engineering best practice, especially when supplying a +* library that is likely to change in future versions, FreeRTOS implements a +* strict data hiding policy. This means the stream buffer structure used +* internally by FreeRTOS is not accessible to application code. However, if +* the application writer wants to statically allocate the memory required to +* create a stream buffer then the size of the stream buffer object needs to be +* know. The StaticStreamBuffer_t structure below is provided for this purpose. +* Its size and alignment requirements are guaranteed to match those of the +* genuine structure, no matter which architecture is being used, and no matter +* how the values in FreeRTOSConfig.h are set. Its contents are somewhat +* obfuscated in the hope users will recognise that it would be unwise to make +* direct use of the structure members. +*/ +typedef struct xSTATIC_STREAM_BUFFER +{ + size_t uxDummy1[ 4 ]; + void * pvDummy2[ 3 ]; + uint8_t ucDummy3; + #if ( configUSE_TRACE_FACILITY == 1 ) + UBaseType_t uxDummy4; + #endif +} StaticStreamBuffer_t; + +/* Message buffers are built on stream buffers. */ +typedef StaticStreamBuffer_t StaticMessageBuffer_t; + +#ifdef __cplusplus +} +#endif + +#endif /* INC_FREERTOS_H */ + diff --git a/components/freertos/include/StackMacros.h b/components/freertos/include/StackMacros.h new file mode 100644 index 00000000..3ed8b22d --- /dev/null +++ b/components/freertos/include/StackMacros.h @@ -0,0 +1,133 @@ +/* + * FreeRTOS Kernel V10.2.1 + * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef STACK_MACROS_H +#define STACK_MACROS_H + +#ifndef _MSC_VER /* Visual Studio doesn't support #warning. */ + #warning The name of this file has changed to stack_macros.h. Please update your code accordingly. This source file (which has the original name) will be removed in future released. +#endif + +/* + * Call the stack overflow hook function if the stack of the task being swapped + * out is currently overflowed, or looks like it might have overflowed in the + * past. + * + * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check + * the current stack state only - comparing the current top of stack value to + * the stack limit. Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1 + * will also cause the last few stack bytes to be checked to ensure the value + * to which the bytes were set when the task was created have not been + * overwritten. Note this second test does not guarantee that an overflowed + * stack will always be recognised. + */ + +/*-----------------------------------------------------------*/ + +#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) ) + + /* Only the current stack state is to be checked. */ + #define taskCHECK_FOR_STACK_OVERFLOW() \ + { \ + /* Is the currently saved stack pointer within the stack limit? */ \ + if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack ) \ + { \ + vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ + } \ + } + +#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ +/*-----------------------------------------------------------*/ + +#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) ) + + /* Only the current stack state is to be checked. */ + #define taskCHECK_FOR_STACK_OVERFLOW() \ + { \ + \ + /* Is the currently saved stack pointer within the stack limit? */ \ + if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack ) \ + { \ + vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ + } \ + } + +#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */ +/*-----------------------------------------------------------*/ + +#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) ) + + #define taskCHECK_FOR_STACK_OVERFLOW() \ + { \ + const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack; \ + const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5; \ + \ + if( ( pulStack[ 0 ] != ulCheckValue ) || \ + ( pulStack[ 1 ] != ulCheckValue ) || \ + ( pulStack[ 2 ] != ulCheckValue ) || \ + ( pulStack[ 3 ] != ulCheckValue ) ) \ + { \ + vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ + } \ + } + +#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */ +/*-----------------------------------------------------------*/ + +#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) ) + + #define taskCHECK_FOR_STACK_OVERFLOW() \ + { \ + int8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack; \ + static const uint8_t ucExpectedStackBytes[] = { tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ + tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ + tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ + tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, \ + tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE }; \ + \ + \ + pcEndOfStack -= sizeof( ucExpectedStackBytes ); \ + \ + /* Has the extremity of the task stack ever been written over? */ \ + if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 ) \ + { \ + vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName ); \ + } \ + } + +#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */ +/*-----------------------------------------------------------*/ + +/* Remove stack overflow macro if not being used. */ +#ifndef taskCHECK_FOR_STACK_OVERFLOW + #define taskCHECK_FOR_STACK_OVERFLOW() +#endif + + + +#endif /* STACK_MACROS_H */ + diff --git a/components/freertos/include/atomic.h b/components/freertos/include/atomic.h new file mode 100644 index 00000000..7b05bba2 --- /dev/null +++ b/components/freertos/include/atomic.h @@ -0,0 +1,418 @@ +/* + * FreeRTOS Kernel V10.2.1 + * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/** + * @file atomic.h + * @brief FreeRTOS atomic operation support. + * + * This file implements atomic by disabling interrupts globally. + * Implementation with architecture specific atomic instructions + * are to be provided under each compiler directory. + */ + +#ifndef ATOMIC_H +#define ATOMIC_H + +#ifndef INC_FREERTOS_H + #error "include FreeRTOS.h must appear in source files before include atomic.h" +#endif + +/* Standard includes. */ +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* Port specific definitions -- entering/exiting critical section. + * Refer template -- ./lib/FreeRTOS/portable/Compiler/Arch/portmacro.h + * + * Every call to ATOMIC_EXIT_CRITICAL() must be closely paired with + * ATOMIC_ENTER_CRITICAL(). + * */ +#if defined( portSET_INTERRUPT_MASK_FROM_ISR ) + + /* Nested interrupt scheme is supported in this port. */ + #define ATOMIC_ENTER_CRITICAL() \ + UBaseType_t uxCriticalSectionType = portSET_INTERRUPT_MASK_FROM_ISR() + + #define ATOMIC_EXIT_CRITICAL() \ + portCLEAR_INTERRUPT_MASK_FROM_ISR( uxCriticalSectionType ) + +#else + + /* Nested interrupt scheme is NOT supported in this port. */ + #define ATOMIC_ENTER_CRITICAL() portENTER_CRITICAL() + #define ATOMIC_EXIT_CRITICAL() portEXIT_CRITICAL() + +#endif /* portSET_INTERRUPT_MASK_FROM_ISR() */ + +/* Port specific definition -- "always inline". + * Inline is compiler specific, and may not always get inlined depending on your optimization level. + * Also, inline is considerred as performance optimization for atomic. + * Thus, if portFORCE_INLINE is not provided by portmacro.h, instead of resulting error, + * simply define it. + */ +#ifndef portFORCE_INLINE + #define portFORCE_INLINE +#endif + +#define ATOMIC_COMPARE_AND_SWAP_SUCCESS 0x1U /**< Compare and swap succeeded, swapped. */ +#define ATOMIC_COMPARE_AND_SWAP_FAILURE 0x0U /**< Compare and swap failed, did not swap. */ + +/*----------------------------- Swap && CAS ------------------------------*/ + +/** + * Atomic compare-and-swap + * + * @brief Performs an atomic compare-and-swap operation on the specified values. + * + * @param[in, out] pDestination Pointer to memory location from where value is + * to be loaded and checked. + * @param[in] ulExchange If condition meets, write this value to memory. + * @param[in] ulComparand Swap condition. + * + * @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped. + * + * @note This function only swaps *pDestination with ulExchange, if previous + * *pDestination value equals ulComparand. + */ +static portFORCE_INLINE uint32_t Atomic_CompareAndSwap_u32( + uint32_t volatile * pDestination, + uint32_t ulExchange, + uint32_t ulComparand ) +{ + + uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE; + + ATOMIC_ENTER_CRITICAL(); + + if ( *pDestination == ulComparand ) + { + *pDestination = ulExchange; + ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS; + } + + ATOMIC_EXIT_CRITICAL(); + + return ulReturnValue; + +} + +/** + * Atomic swap (pointers) + * + * @brief Atomically sets the address pointed to by *ppDestination to the value + * of *pExchange. + * + * @param[in, out] ppDestination Pointer to memory location from where a pointer + * value is to be loaded and written back to. + * @param[in] pExchange Pointer value to be written to *ppDestination. + * + * @return The initial value of *ppDestination. + */ +static portFORCE_INLINE void * Atomic_SwapPointers_p32( + void * volatile * ppDestination, + void * pExchange ) +{ + void * pReturnValue; + + ATOMIC_ENTER_CRITICAL(); + + pReturnValue = *ppDestination; + + *ppDestination = pExchange; + + ATOMIC_EXIT_CRITICAL(); + + return pReturnValue; +} + +/** + * Atomic compare-and-swap (pointers) + * + * @brief Performs an atomic compare-and-swap operation on the specified pointer + * values. + * + * @param[in, out] ppDestination Pointer to memory location from where a pointer + * value is to be loaded and checked. + * @param[in] pExchange If condition meets, write this value to memory. + * @param[in] pComparand Swap condition. + * + * @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped. + * + * @note This function only swaps *ppDestination with pExchange, if previous + * *ppDestination value equals pComparand. + */ +static portFORCE_INLINE uint32_t Atomic_CompareAndSwapPointers_p32( + void * volatile * ppDestination, + void * pExchange, void * pComparand ) +{ + uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE; + + ATOMIC_ENTER_CRITICAL(); + + if ( *ppDestination == pComparand ) + { + *ppDestination = pExchange; + ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS; + } + + ATOMIC_EXIT_CRITICAL(); + + return ulReturnValue; +} + + +/*----------------------------- Arithmetic ------------------------------*/ + +/** + * Atomic add + * + * @brief Atomically adds count to the value of the specified pointer points to. + * + * @param[in,out] pAddend Pointer to memory location from where value is to be + * loaded and written back to. + * @param[in] ulCount Value to be added to *pAddend. + * + * @return previous *pAddend value. + */ +static portFORCE_INLINE uint32_t Atomic_Add_u32( + uint32_t volatile * pAddend, + uint32_t ulCount ) +{ + uint32_t ulCurrent; + + ATOMIC_ENTER_CRITICAL(); + + ulCurrent = *pAddend; + + *pAddend += ulCount; + + ATOMIC_EXIT_CRITICAL(); + + return ulCurrent; +} + +/** + * Atomic subtract + * + * @brief Atomically subtracts count from the value of the specified pointer + * pointers to. + * + * @param[in,out] pAddend Pointer to memory location from where value is to be + * loaded and written back to. + * @param[in] ulCount Value to be subtract from *pAddend. + * + * @return previous *pAddend value. + */ +static portFORCE_INLINE uint32_t Atomic_Subtract_u32( + uint32_t volatile * pAddend, + uint32_t ulCount ) +{ + uint32_t ulCurrent; + + ATOMIC_ENTER_CRITICAL(); + + ulCurrent = *pAddend; + + *pAddend -= ulCount; + + ATOMIC_EXIT_CRITICAL(); + + return ulCurrent; +} + +/** + * Atomic increment + * + * @brief Atomically increments the value of the specified pointer points to. + * + * @param[in,out] pAddend Pointer to memory location from where value is to be + * loaded and written back to. + * + * @return *pAddend value before increment. + */ +static portFORCE_INLINE uint32_t Atomic_Increment_u32( uint32_t volatile * pAddend ) +{ + uint32_t ulCurrent; + + ATOMIC_ENTER_CRITICAL(); + + ulCurrent = *pAddend; + + *pAddend += 1; + + ATOMIC_EXIT_CRITICAL(); + + return ulCurrent; +} + +/** + * Atomic decrement + * + * @brief Atomically decrements the value of the specified pointer points to + * + * @param[in,out] pAddend Pointer to memory location from where value is to be + * loaded and written back to. + * + * @return *pAddend value before decrement. + */ +static portFORCE_INLINE uint32_t Atomic_Decrement_u32( uint32_t volatile * pAddend ) +{ + uint32_t ulCurrent; + + ATOMIC_ENTER_CRITICAL(); + + ulCurrent = *pAddend; + + *pAddend -= 1; + + ATOMIC_EXIT_CRITICAL(); + + return ulCurrent; +} + +/*----------------------------- Bitwise Logical ------------------------------*/ + +/** + * Atomic OR + * + * @brief Performs an atomic OR operation on the specified values. + * + * @param [in, out] pDestination Pointer to memory location from where value is + * to be loaded and written back to. + * @param [in] ulValue Value to be ORed with *pDestination. + * + * @return The original value of *pDestination. + */ +static portFORCE_INLINE uint32_t Atomic_OR_u32( + uint32_t volatile * pDestination, + uint32_t ulValue ) +{ + uint32_t ulCurrent; + + ATOMIC_ENTER_CRITICAL(); + + ulCurrent = *pDestination; + + *pDestination |= ulValue; + + ATOMIC_EXIT_CRITICAL(); + + return ulCurrent; +} + +/** + * Atomic AND + * + * @brief Performs an atomic AND operation on the specified values. + * + * @param [in, out] pDestination Pointer to memory location from where value is + * to be loaded and written back to. + * @param [in] ulValue Value to be ANDed with *pDestination. + * + * @return The original value of *pDestination. + */ +static portFORCE_INLINE uint32_t Atomic_AND_u32( + uint32_t volatile * pDestination, + uint32_t ulValue ) +{ + uint32_t ulCurrent; + + ATOMIC_ENTER_CRITICAL(); + + ulCurrent = *pDestination; + + *pDestination &= ulValue; + + ATOMIC_EXIT_CRITICAL(); + + return ulCurrent; +} + +/** + * Atomic NAND + * + * @brief Performs an atomic NAND operation on the specified values. + * + * @param [in, out] pDestination Pointer to memory location from where value is + * to be loaded and written back to. + * @param [in] ulValue Value to be NANDed with *pDestination. + * + * @return The original value of *pDestination. + */ +static portFORCE_INLINE uint32_t Atomic_NAND_u32( + uint32_t volatile * pDestination, + uint32_t ulValue ) +{ + uint32_t ulCurrent; + + ATOMIC_ENTER_CRITICAL(); + + ulCurrent = *pDestination; + + *pDestination = ~(ulCurrent & ulValue); + + ATOMIC_EXIT_CRITICAL(); + + return ulCurrent; +} + +/** + * Atomic XOR + * + * @brief Performs an atomic XOR operation on the specified values. + * + * @param [in, out] pDestination Pointer to memory location from where value is + * to be loaded and written back to. + * @param [in] ulValue Value to be XORed with *pDestination. + * + * @return The original value of *pDestination. + */ +static portFORCE_INLINE uint32_t Atomic_XOR_u32( + uint32_t volatile * pDestination, + uint32_t ulValue ) +{ + uint32_t ulCurrent; + + ATOMIC_ENTER_CRITICAL(); + + ulCurrent = *pDestination; + + *pDestination ^= ulValue; + + ATOMIC_EXIT_CRITICAL(); + + return ulCurrent; +} + +#ifdef __cplusplus +} +#endif + +#endif /* ATOMIC_H */ diff --git a/components/freertos/include/croutine.h b/components/freertos/include/croutine.h new file mode 100644 index 00000000..8b3b41b9 --- /dev/null +++ b/components/freertos/include/croutine.h @@ -0,0 +1,720 @@ +/* + * FreeRTOS Kernel V10.2.1 + * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef CO_ROUTINE_H +#define CO_ROUTINE_H + +#ifndef INC_FREERTOS_H + #error "include FreeRTOS.h must appear in source files before include croutine.h" +#endif + +#include "list.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* Used to hide the implementation of the co-routine control block. The +control block structure however has to be included in the header due to +the macro implementation of the co-routine functionality. */ +typedef void * CoRoutineHandle_t; + +/* Defines the prototype to which co-routine functions must conform. */ +typedef void (*crCOROUTINE_CODE)( CoRoutineHandle_t, UBaseType_t ); + +typedef struct corCoRoutineControlBlock +{ + crCOROUTINE_CODE pxCoRoutineFunction; + ListItem_t xGenericListItem; /*< List item used to place the CRCB in ready and blocked queues. */ + ListItem_t xEventListItem; /*< List item used to place the CRCB in event lists. */ + UBaseType_t uxPriority; /*< The priority of the co-routine in relation to other co-routines. */ + UBaseType_t uxIndex; /*< Used to distinguish between co-routines when multiple co-routines use the same co-routine function. */ + uint16_t uxState; /*< Used internally by the co-routine implementation. */ +} CRCB_t; /* Co-routine control block. Note must be identical in size down to uxPriority with TCB_t. */ + +/** + * croutine. h + *
+ BaseType_t xCoRoutineCreate(
+                                 crCOROUTINE_CODE pxCoRoutineCode,
+                                 UBaseType_t uxPriority,
+                                 UBaseType_t uxIndex
+                               );
+ * + * Create a new co-routine and add it to the list of co-routines that are + * ready to run. + * + * @param pxCoRoutineCode Pointer to the co-routine function. Co-routine + * functions require special syntax - see the co-routine section of the WEB + * documentation for more information. + * + * @param uxPriority The priority with respect to other co-routines at which + * the co-routine will run. + * + * @param uxIndex Used to distinguish between different co-routines that + * execute the same function. See the example below and the co-routine section + * of the WEB documentation for further information. + * + * @return pdPASS if the co-routine was successfully created and added to a ready + * list, otherwise an error code defined with ProjDefs.h. + * + * Example usage: + 
+ // Co-routine to be created.
+ void vFlashCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ {
+ // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ // This may not be necessary for const variables.
+ static const char cLedToFlash[ 2 ] = { 5, 6 };
+ static const TickType_t uxFlashRates[ 2 ] = { 200, 400 };
+
+     // Must start every co-routine with a call to crSTART();
+     crSTART( xHandle );
+
+     for( ;; )
+     {
+         // This co-routine just delays for a fixed period, then toggles
+         // an LED.  Two co-routines are created using this function, so
+         // the uxIndex parameter is used to tell the co-routine which
+         // LED to flash and how int32_t to delay.  This assumes xQueue has
+         // already been created.
+         vParTestToggleLED( cLedToFlash[ uxIndex ] );
+         crDELAY( xHandle, uxFlashRates[ uxIndex ] );
+     }
+
+     // Must end every co-routine with a call to crEND();
+     crEND();
+ }
+
+ // Function that creates two co-routines.
+ void vOtherFunction( void )
+ {
+ uint8_t ucParameterToPass;
+ TaskHandle_t xHandle;
+
+     // Create two co-routines at priority 0.  The first is given index 0
+     // so (from the code above) toggles LED 5 every 200 ticks.  The second
+     // is given index 1 so toggles LED 6 every 400 ticks.
+     for( uxIndex = 0; uxIndex < 2; uxIndex++ )
+     {
+         xCoRoutineCreate( vFlashCoRoutine, 0, uxIndex );
+     }
+ }
+
+ * \defgroup xCoRoutineCreate xCoRoutineCreate + * \ingroup Tasks + */ +BaseType_t xCoRoutineCreate( crCOROUTINE_CODE pxCoRoutineCode, UBaseType_t uxPriority, UBaseType_t uxIndex ); + + +/** + * croutine. h + *
+ void vCoRoutineSchedule( void );
+ * + * Run a co-routine. + * + * vCoRoutineSchedule() executes the highest priority co-routine that is able + * to run. The co-routine will execute until it either blocks, yields or is + * preempted by a task. Co-routines execute cooperatively so one + * co-routine cannot be preempted by another, but can be preempted by a task. + * + * If an application comprises of both tasks and co-routines then + * vCoRoutineSchedule should be called from the idle task (in an idle task + * hook). + * + * Example usage: + 
+ // This idle task hook will schedule a co-routine each time it is called.
+ // The rest of the idle task will execute between co-routine calls.
+ void vApplicationIdleHook( void )
+ {
+	vCoRoutineSchedule();
+ }
+
+ // Alternatively, if you do not require any other part of the idle task to
+ // execute, the idle task hook can call vCoRoutineScheduler() within an
+ // infinite loop.
+ void vApplicationIdleHook( void )
+ {
+    for( ;; )
+    {
+        vCoRoutineSchedule();
+    }
+ }
+
+ * \defgroup vCoRoutineSchedule vCoRoutineSchedule + * \ingroup Tasks + */ +void vCoRoutineSchedule( void ); + +/** + * croutine. h + * 
+ crSTART( CoRoutineHandle_t xHandle );
+ * + * This macro MUST always be called at the start of a co-routine function. + * + * Example usage: + 
+ // Co-routine to be created.
+ void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ {
+ // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ static int32_t ulAVariable;
+
+     // Must start every co-routine with a call to crSTART();
+     crSTART( xHandle );
+
+     for( ;; )
+     {
+          // Co-routine functionality goes here.
+     }
+
+     // Must end every co-routine with a call to crEND();
+     crEND();
+ }
+ * \defgroup crSTART crSTART + * \ingroup Tasks + */ +#define crSTART( pxCRCB ) switch( ( ( CRCB_t * )( pxCRCB ) )->uxState ) { case 0: + +/** + * croutine. h + * 
+ crEND();
+ * + * This macro MUST always be called at the end of a co-routine function. + * + * Example usage: + 
+ // Co-routine to be created.
+ void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ {
+ // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ static int32_t ulAVariable;
+
+     // Must start every co-routine with a call to crSTART();
+     crSTART( xHandle );
+
+     for( ;; )
+     {
+          // Co-routine functionality goes here.
+     }
+
+     // Must end every co-routine with a call to crEND();
+     crEND();
+ }
+ * \defgroup crSTART crSTART + * \ingroup Tasks + */ +#define crEND() } + +/* + * These macros are intended for internal use by the co-routine implementation + * only. The macros should not be used directly by application writers. + */ +#define crSET_STATE0( xHandle ) ( ( CRCB_t * )( xHandle ) )->uxState = (__LINE__ * 2); return; case (__LINE__ * 2): +#define crSET_STATE1( xHandle ) ( ( CRCB_t * )( xHandle ) )->uxState = ((__LINE__ * 2)+1); return; case ((__LINE__ * 2)+1): + +/** + * croutine. h + *
+ crDELAY( CoRoutineHandle_t xHandle, TickType_t xTicksToDelay );
+ * + * Delay a co-routine for a fixed period of time. + * + * crDELAY can only be called from the co-routine function itself - not + * from within a function called by the co-routine function. This is because + * co-routines do not maintain their own stack. + * + * @param xHandle The handle of the co-routine to delay. This is the xHandle + * parameter of the co-routine function. + * + * @param xTickToDelay The number of ticks that the co-routine should delay + * for. The actual amount of time this equates to is defined by + * configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant portTICK_PERIOD_MS + * can be used to convert ticks to milliseconds. + * + * Example usage: + 
+ // Co-routine to be created.
+ void vACoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ {
+ // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ // This may not be necessary for const variables.
+ // We are to delay for 200ms.
+ static const xTickType xDelayTime = 200 / portTICK_PERIOD_MS;
+
+     // Must start every co-routine with a call to crSTART();
+     crSTART( xHandle );
+
+     for( ;; )
+     {
+        // Delay for 200ms.
+        crDELAY( xHandle, xDelayTime );
+
+        // Do something here.
+     }
+
+     // Must end every co-routine with a call to crEND();
+     crEND();
+ }
+ * \defgroup crDELAY crDELAY + * \ingroup Tasks + */ +#define crDELAY( xHandle, xTicksToDelay ) \ + if( ( xTicksToDelay ) > 0 ) \ + { \ + vCoRoutineAddToDelayedList( ( xTicksToDelay ), NULL ); \ + } \ + crSET_STATE0( ( xHandle ) ); + +/** + * 
+ crQUEUE_SEND(
+                  CoRoutineHandle_t xHandle,
+                  QueueHandle_t pxQueue,
+                  void *pvItemToQueue,
+                  TickType_t xTicksToWait,
+                  BaseType_t *pxResult
+             )
+ * + * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine + * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. + * + * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas + * xQueueSend() and xQueueReceive() can only be used from tasks. + * + * crQUEUE_SEND can only be called from the co-routine function itself - not + * from within a function called by the co-routine function. This is because + * co-routines do not maintain their own stack. + * + * See the co-routine section of the WEB documentation for information on + * passing data between tasks and co-routines and between ISR's and + * co-routines. + * + * @param xHandle The handle of the calling co-routine. This is the xHandle + * parameter of the co-routine function. + * + * @param pxQueue The handle of the queue on which the data will be posted. + * The handle is obtained as the return value when the queue is created using + * the xQueueCreate() API function. + * + * @param pvItemToQueue A pointer to the data being posted onto the queue. + * The number of bytes of each queued item is specified when the queue is + * created. This number of bytes is copied from pvItemToQueue into the queue + * itself. + * + * @param xTickToDelay The number of ticks that the co-routine should block + * to wait for space to become available on the queue, should space not be + * available immediately. The actual amount of time this equates to is defined + * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant + * portTICK_PERIOD_MS can be used to convert ticks to milliseconds (see example + * below). + * + * @param pxResult The variable pointed to by pxResult will be set to pdPASS if + * data was successfully posted onto the queue, otherwise it will be set to an + * error defined within ProjDefs.h. + * + * Example usage: + 
+ // Co-routine function that blocks for a fixed period then posts a number onto
+ // a queue.
+ static void prvCoRoutineFlashTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ {
+ // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ static BaseType_t xNumberToPost = 0;
+ static BaseType_t xResult;
+
+    // Co-routines must begin with a call to crSTART().
+    crSTART( xHandle );
+
+    for( ;; )
+    {
+        // This assumes the queue has already been created.
+        crQUEUE_SEND( xHandle, xCoRoutineQueue, &xNumberToPost, NO_DELAY, &xResult );
+
+        if( xResult != pdPASS )
+        {
+            // The message was not posted!
+        }
+
+        // Increment the number to be posted onto the queue.
+        xNumberToPost++;
+
+        // Delay for 100 ticks.
+        crDELAY( xHandle, 100 );
+    }
+
+    // Co-routines must end with a call to crEND().
+    crEND();
+ }
+ * \defgroup crQUEUE_SEND crQUEUE_SEND + * \ingroup Tasks + */ +#define crQUEUE_SEND( xHandle, pxQueue, pvItemToQueue, xTicksToWait, pxResult ) \ +{ \ + *( pxResult ) = xQueueCRSend( ( pxQueue) , ( pvItemToQueue) , ( xTicksToWait ) ); \ + if( *( pxResult ) == errQUEUE_BLOCKED ) \ + { \ + crSET_STATE0( ( xHandle ) ); \ + *pxResult = xQueueCRSend( ( pxQueue ), ( pvItemToQueue ), 0 ); \ + } \ + if( *pxResult == errQUEUE_YIELD ) \ + { \ + crSET_STATE1( ( xHandle ) ); \ + *pxResult = pdPASS; \ + } \ +} + +/** + * croutine. h + * 
+  crQUEUE_RECEIVE(
+                     CoRoutineHandle_t xHandle,
+                     QueueHandle_t pxQueue,
+                     void *pvBuffer,
+                     TickType_t xTicksToWait,
+                     BaseType_t *pxResult
+                 )
+ * + * The macro's crQUEUE_SEND() and crQUEUE_RECEIVE() are the co-routine + * equivalent to the xQueueSend() and xQueueReceive() functions used by tasks. + * + * crQUEUE_SEND and crQUEUE_RECEIVE can only be used from a co-routine whereas + * xQueueSend() and xQueueReceive() can only be used from tasks. + * + * crQUEUE_RECEIVE can only be called from the co-routine function itself - not + * from within a function called by the co-routine function. This is because + * co-routines do not maintain their own stack. + * + * See the co-routine section of the WEB documentation for information on + * passing data between tasks and co-routines and between ISR's and + * co-routines. + * + * @param xHandle The handle of the calling co-routine. This is the xHandle + * parameter of the co-routine function. + * + * @param pxQueue The handle of the queue from which the data will be received. + * The handle is obtained as the return value when the queue is created using + * the xQueueCreate() API function. + * + * @param pvBuffer The buffer into which the received item is to be copied. + * The number of bytes of each queued item is specified when the queue is + * created. This number of bytes is copied into pvBuffer. + * + * @param xTickToDelay The number of ticks that the co-routine should block + * to wait for data to become available from the queue, should data not be + * available immediately. The actual amount of time this equates to is defined + * by configTICK_RATE_HZ (set in FreeRTOSConfig.h). The constant + * portTICK_PERIOD_MS can be used to convert ticks to milliseconds (see the + * crQUEUE_SEND example). + * + * @param pxResult The variable pointed to by pxResult will be set to pdPASS if + * data was successfully retrieved from the queue, otherwise it will be set to + * an error code as defined within ProjDefs.h. + * + * Example usage: + 
+ // A co-routine receives the number of an LED to flash from a queue.  It
+ // blocks on the queue until the number is received.
+ static void prvCoRoutineFlashWorkTask( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ {
+ // Variables in co-routines must be declared static if they must maintain value across a blocking call.
+ static BaseType_t xResult;
+ static UBaseType_t uxLEDToFlash;
+
+    // All co-routines must start with a call to crSTART().
+    crSTART( xHandle );
+
+    for( ;; )
+    {
+        // Wait for data to become available on the queue.
+        crQUEUE_RECEIVE( xHandle, xCoRoutineQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
+
+        if( xResult == pdPASS )
+        {
+            // We received the LED to flash - flash it!
+            vParTestToggleLED( uxLEDToFlash );
+        }
+    }
+
+    crEND();
+ }
+ * \defgroup crQUEUE_RECEIVE crQUEUE_RECEIVE + * \ingroup Tasks + */ +#define crQUEUE_RECEIVE( xHandle, pxQueue, pvBuffer, xTicksToWait, pxResult ) \ +{ \ + *( pxResult ) = xQueueCRReceive( ( pxQueue) , ( pvBuffer ), ( xTicksToWait ) ); \ + if( *( pxResult ) == errQUEUE_BLOCKED ) \ + { \ + crSET_STATE0( ( xHandle ) ); \ + *( pxResult ) = xQueueCRReceive( ( pxQueue) , ( pvBuffer ), 0 ); \ + } \ + if( *( pxResult ) == errQUEUE_YIELD ) \ + { \ + crSET_STATE1( ( xHandle ) ); \ + *( pxResult ) = pdPASS; \ + } \ +} + +/** + * croutine. h + * 
+  crQUEUE_SEND_FROM_ISR(
+                            QueueHandle_t pxQueue,
+                            void *pvItemToQueue,
+                            BaseType_t xCoRoutinePreviouslyWoken
+                       )
+ * + * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the + * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() + * functions used by tasks. + * + * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to + * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and + * xQueueReceiveFromISR() can only be used to pass data between a task and and + * ISR. + * + * crQUEUE_SEND_FROM_ISR can only be called from an ISR to send data to a queue + * that is being used from within a co-routine. + * + * See the co-routine section of the WEB documentation for information on + * passing data between tasks and co-routines and between ISR's and + * co-routines. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvItemToQueue A pointer to the item that is to be placed on the + * queue. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from pvItemToQueue + * into the queue storage area. + * + * @param xCoRoutinePreviouslyWoken This is included so an ISR can post onto + * the same queue multiple times from a single interrupt. The first call + * should always pass in pdFALSE. Subsequent calls should pass in + * the value returned from the previous call. + * + * @return pdTRUE if a co-routine was woken by posting onto the queue. This is + * used by the ISR to determine if a context switch may be required following + * the ISR. + * + * Example usage: + 
+ // A co-routine that blocks on a queue waiting for characters to be received.
+ static void vReceivingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ {
+ char cRxedChar;
+ BaseType_t xResult;
+
+     // All co-routines must start with a call to crSTART().
+     crSTART( xHandle );
+
+     for( ;; )
+     {
+         // Wait for data to become available on the queue.  This assumes the
+         // queue xCommsRxQueue has already been created!
+         crQUEUE_RECEIVE( xHandle, xCommsRxQueue, &uxLEDToFlash, portMAX_DELAY, &xResult );
+
+         // Was a character received?
+         if( xResult == pdPASS )
+         {
+             // Process the character here.
+         }
+     }
+
+     // All co-routines must end with a call to crEND().
+     crEND();
+ }
+
+ // An ISR that uses a queue to send characters received on a serial port to
+ // a co-routine.
+ void vUART_ISR( void )
+ {
+ char cRxedChar;
+ BaseType_t xCRWokenByPost = pdFALSE;
+
+     // We loop around reading characters until there are none left in the UART.
+     while( UART_RX_REG_NOT_EMPTY() )
+     {
+         // Obtain the character from the UART.
+         cRxedChar = UART_RX_REG;
+
+         // Post the character onto a queue.  xCRWokenByPost will be pdFALSE
+         // the first time around the loop.  If the post causes a co-routine
+         // to be woken (unblocked) then xCRWokenByPost will be set to pdTRUE.
+         // In this manner we can ensure that if more than one co-routine is
+         // blocked on the queue only one is woken by this ISR no matter how
+         // many characters are posted to the queue.
+         xCRWokenByPost = crQUEUE_SEND_FROM_ISR( xCommsRxQueue, &cRxedChar, xCRWokenByPost );
+     }
+ }
+ * \defgroup crQUEUE_SEND_FROM_ISR crQUEUE_SEND_FROM_ISR + * \ingroup Tasks + */ +#define crQUEUE_SEND_FROM_ISR( pxQueue, pvItemToQueue, xCoRoutinePreviouslyWoken ) xQueueCRSendFromISR( ( pxQueue ), ( pvItemToQueue ), ( xCoRoutinePreviouslyWoken ) ) + + +/** + * croutine. h + * 
+  crQUEUE_SEND_FROM_ISR(
+                            QueueHandle_t pxQueue,
+                            void *pvBuffer,
+                            BaseType_t * pxCoRoutineWoken
+                       )
+ * + * The macro's crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() are the + * co-routine equivalent to the xQueueSendFromISR() and xQueueReceiveFromISR() + * functions used by tasks. + * + * crQUEUE_SEND_FROM_ISR() and crQUEUE_RECEIVE_FROM_ISR() can only be used to + * pass data between a co-routine and and ISR, whereas xQueueSendFromISR() and + * xQueueReceiveFromISR() can only be used to pass data between a task and and + * ISR. + * + * crQUEUE_RECEIVE_FROM_ISR can only be called from an ISR to receive data + * from a queue that is being used from within a co-routine (a co-routine + * posted to the queue). + * + * See the co-routine section of the WEB documentation for information on + * passing data between tasks and co-routines and between ISR's and + * co-routines. + * + * @param xQueue The handle to the queue on which the item is to be posted. + * + * @param pvBuffer A pointer to a buffer into which the received item will be + * placed. The size of the items the queue will hold was defined when the + * queue was created, so this many bytes will be copied from the queue into + * pvBuffer. + * + * @param pxCoRoutineWoken A co-routine may be blocked waiting for space to become + * available on the queue. If crQUEUE_RECEIVE_FROM_ISR causes such a + * co-routine to unblock *pxCoRoutineWoken will get set to pdTRUE, otherwise + * *pxCoRoutineWoken will remain unchanged. + * + * @return pdTRUE an item was successfully received from the queue, otherwise + * pdFALSE. + * + * Example usage: + 
+ // A co-routine that posts a character to a queue then blocks for a fixed
+ // period.  The character is incremented each time.
+ static void vSendingCoRoutine( CoRoutineHandle_t xHandle, UBaseType_t uxIndex )
+ {
+ // cChar holds its value while this co-routine is blocked and must therefore
+ // be declared static.
+ static char cCharToTx = 'a';
+ BaseType_t xResult;
+
+     // All co-routines must start with a call to crSTART().
+     crSTART( xHandle );
+
+     for( ;; )
+     {
+         // Send the next character to the queue.
+         crQUEUE_SEND( xHandle, xCoRoutineQueue, &cCharToTx, NO_DELAY, &xResult );
+
+         if( xResult == pdPASS )
+         {
+             // The character was successfully posted to the queue.
+         }
+		 else
+		 {
+			// Could not post the character to the queue.
+		 }
+
+         // Enable the UART Tx interrupt to cause an interrupt in this
+		 // hypothetical UART.  The interrupt will obtain the character
+		 // from the queue and send it.
+		 ENABLE_RX_INTERRUPT();
+
+		 // Increment to the next character then block for a fixed period.
+		 // cCharToTx will maintain its value across the delay as it is
+		 // declared static.
+		 cCharToTx++;
+		 if( cCharToTx > 'x' )
+		 {
+			cCharToTx = 'a';
+		 }
+		 crDELAY( 100 );
+     }
+
+     // All co-routines must end with a call to crEND().
+     crEND();
+ }
+
+ // An ISR that uses a queue to receive characters to send on a UART.
+ void vUART_ISR( void )
+ {
+ char cCharToTx;
+ BaseType_t xCRWokenByPost = pdFALSE;
+
+     while( UART_TX_REG_EMPTY() )
+     {
+         // Are there any characters in the queue waiting to be sent?
+		 // xCRWokenByPost will automatically be set to pdTRUE if a co-routine
+		 // is woken by the post - ensuring that only a single co-routine is
+		 // woken no matter how many times we go around this loop.
+         if( crQUEUE_RECEIVE_FROM_ISR( pxQueue, &cCharToTx, &xCRWokenByPost ) )
+		 {
+			 SEND_CHARACTER( cCharToTx );
+		 }
+     }
+ }
+ * \defgroup crQUEUE_RECEIVE_FROM_ISR crQUEUE_RECEIVE_FROM_ISR + * \ingroup Tasks + */ +#define crQUEUE_RECEIVE_FROM_ISR( pxQueue, pvBuffer, pxCoRoutineWoken ) xQueueCRReceiveFromISR( ( pxQueue ), ( pvBuffer ), ( pxCoRoutineWoken ) ) + +/* + * This function is intended for internal use by the co-routine macros only. + * The macro nature of the co-routine implementation requires that the + * prototype appears here. The function should not be used by application + * writers. + * + * Removes the current co-routine from its ready list and places it in the + * appropriate delayed list. + */ +void vCoRoutineAddToDelayedList( TickType_t xTicksToDelay, List_t *pxEventList ); + +/* + * This function is intended for internal use by the queue implementation only. + * The function should not be used by application writers. + * + * Removes the highest priority co-routine from the event list and places it in + * the pending ready list. + */ +BaseType_t xCoRoutineRemoveFromEventList( const List_t *pxEventList ); + +#ifdef __cplusplus +} +#endif + +#endif /* CO_ROUTINE_H */ diff --git a/components/freertos/include/deprecated_definitions.h b/components/freertos/include/deprecated_definitions.h new file mode 100644 index 00000000..9cece988 --- /dev/null +++ b/components/freertos/include/deprecated_definitions.h @@ -0,0 +1,279 @@ +/* + * FreeRTOS Kernel V10.2.1 + * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef DEPRECATED_DEFINITIONS_H +#define DEPRECATED_DEFINITIONS_H + + +/* Each FreeRTOS port has a unique portmacro.h header file. Originally a +pre-processor definition was used to ensure the pre-processor found the correct +portmacro.h file for the port being used. That scheme was deprecated in favour +of setting the compiler's include path such that it found the correct +portmacro.h file - removing the need for the constant and allowing the +portmacro.h file to be located anywhere in relation to the port being used. The +definitions below remain in the code for backward compatibility only. New +projects should not use them. */ + +#ifdef OPEN_WATCOM_INDUSTRIAL_PC_PORT + #include "..\..\Source\portable\owatcom\16bitdos\pc\portmacro.h" + typedef void ( __interrupt __far *pxISR )(); +#endif + +#ifdef OPEN_WATCOM_FLASH_LITE_186_PORT + #include "..\..\Source\portable\owatcom\16bitdos\flsh186\portmacro.h" + typedef void ( __interrupt __far *pxISR )(); +#endif + +#ifdef GCC_MEGA_AVR + #include "../portable/GCC/ATMega323/portmacro.h" +#endif + +#ifdef IAR_MEGA_AVR + #include "../portable/IAR/ATMega323/portmacro.h" +#endif + +#ifdef MPLAB_PIC24_PORT + #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h" +#endif + +#ifdef MPLAB_DSPIC_PORT + #include "../../Source/portable/MPLAB/PIC24_dsPIC/portmacro.h" +#endif + +#ifdef MPLAB_PIC18F_PORT + #include "../../Source/portable/MPLAB/PIC18F/portmacro.h" +#endif + +#ifdef MPLAB_PIC32MX_PORT + #include "../../Source/portable/MPLAB/PIC32MX/portmacro.h" +#endif + +#ifdef _FEDPICC + #include "libFreeRTOS/Include/portmacro.h" +#endif + +#ifdef SDCC_CYGNAL + #include "../../Source/portable/SDCC/Cygnal/portmacro.h" +#endif + +#ifdef GCC_ARM7 + #include "../../Source/portable/GCC/ARM7_LPC2000/portmacro.h" +#endif + +#ifdef GCC_ARM7_ECLIPSE + #include "portmacro.h" +#endif + +#ifdef ROWLEY_LPC23xx + #include "../../Source/portable/GCC/ARM7_LPC23xx/portmacro.h" +#endif + +#ifdef IAR_MSP430 + #include "..\..\Source\portable\IAR\MSP430\portmacro.h" +#endif + +#ifdef GCC_MSP430 + #include "../../Source/portable/GCC/MSP430F449/portmacro.h" +#endif + +#ifdef ROWLEY_MSP430 + #include "../../Source/portable/Rowley/MSP430F449/portmacro.h" +#endif + +#ifdef ARM7_LPC21xx_KEIL_RVDS + #include "..\..\Source\portable\RVDS\ARM7_LPC21xx\portmacro.h" +#endif + +#ifdef SAM7_GCC + #include "../../Source/portable/GCC/ARM7_AT91SAM7S/portmacro.h" +#endif + +#ifdef SAM7_IAR + #include "..\..\Source\portable\IAR\AtmelSAM7S64\portmacro.h" +#endif + +#ifdef SAM9XE_IAR + #include "..\..\Source\portable\IAR\AtmelSAM9XE\portmacro.h" +#endif + +#ifdef LPC2000_IAR + #include "..\..\Source\portable\IAR\LPC2000\portmacro.h" +#endif + +#ifdef STR71X_IAR + #include "..\..\Source\portable\IAR\STR71x\portmacro.h" +#endif + +#ifdef STR75X_IAR + #include "..\..\Source\portable\IAR\STR75x\portmacro.h" +#endif + +#ifdef STR75X_GCC + #include "..\..\Source\portable\GCC\STR75x\portmacro.h" +#endif + +#ifdef STR91X_IAR + #include "..\..\Source\portable\IAR\STR91x\portmacro.h" +#endif + +#ifdef GCC_H8S + #include "../../Source/portable/GCC/H8S2329/portmacro.h" +#endif + +#ifdef GCC_AT91FR40008 + #include "../../Source/portable/GCC/ARM7_AT91FR40008/portmacro.h" +#endif + +#ifdef RVDS_ARMCM3_LM3S102 + #include "../../Source/portable/RVDS/ARM_CM3/portmacro.h" +#endif + +#ifdef GCC_ARMCM3_LM3S102 + #include "../../Source/portable/GCC/ARM_CM3/portmacro.h" +#endif + +#ifdef GCC_ARMCM3 + #include "../../Source/portable/GCC/ARM_CM3/portmacro.h" +#endif + +#ifdef IAR_ARM_CM3 + #include "../../Source/portable/IAR/ARM_CM3/portmacro.h" +#endif + +#ifdef IAR_ARMCM3_LM + #include "../../Source/portable/IAR/ARM_CM3/portmacro.h" +#endif + +#ifdef HCS12_CODE_WARRIOR + #include "../../Source/portable/CodeWarrior/HCS12/portmacro.h" +#endif + +#ifdef MICROBLAZE_GCC + #include "../../Source/portable/GCC/MicroBlaze/portmacro.h" +#endif + +#ifdef TERN_EE + #include "..\..\Source\portable\Paradigm\Tern_EE\small\portmacro.h" +#endif + +#ifdef GCC_HCS12 + #include "../../Source/portable/GCC/HCS12/portmacro.h" +#endif + +#ifdef GCC_MCF5235 + #include "../../Source/portable/GCC/MCF5235/portmacro.h" +#endif + +#ifdef COLDFIRE_V2_GCC + #include "../../../Source/portable/GCC/ColdFire_V2/portmacro.h" +#endif + +#ifdef COLDFIRE_V2_CODEWARRIOR + #include "../../Source/portable/CodeWarrior/ColdFire_V2/portmacro.h" +#endif + +#ifdef GCC_PPC405 + #include "../../Source/portable/GCC/PPC405_Xilinx/portmacro.h" +#endif + +#ifdef GCC_PPC440 + #include "../../Source/portable/GCC/PPC440_Xilinx/portmacro.h" +#endif + +#ifdef _16FX_SOFTUNE + #include "..\..\Source\portable\Softune\MB96340\portmacro.h" +#endif + +#ifdef BCC_INDUSTRIAL_PC_PORT + /* A short file name has to be used in place of the normal + FreeRTOSConfig.h when using the Borland compiler. */ + #include "frconfig.h" + #include "..\portable\BCC\16BitDOS\PC\prtmacro.h" + typedef void ( __interrupt __far *pxISR )(); +#endif + +#ifdef BCC_FLASH_LITE_186_PORT + /* A short file name has to be used in place of the normal + FreeRTOSConfig.h when using the Borland compiler. */ + #include "frconfig.h" + #include "..\portable\BCC\16BitDOS\flsh186\prtmacro.h" + typedef void ( __interrupt __far *pxISR )(); +#endif + +#ifdef __GNUC__ + #ifdef __AVR32_AVR32A__ + #include "portmacro.h" + #endif +#endif + +#ifdef __ICCAVR32__ + #ifdef __CORE__ + #if __CORE__ == __AVR32A__ + #include "portmacro.h" + #endif + #endif +#endif + +#ifdef __91467D + #include "portmacro.h" +#endif + +#ifdef __96340 + #include "portmacro.h" +#endif + + +#ifdef __IAR_V850ES_Fx3__ + #include "../../Source/portable/IAR/V850ES/portmacro.h" +#endif + +#ifdef __IAR_V850ES_Jx3__ + #include "../../Source/portable/IAR/V850ES/portmacro.h" +#endif + +#ifdef __IAR_V850ES_Jx3_L__ + #include "../../Source/portable/IAR/V850ES/portmacro.h" +#endif + +#ifdef __IAR_V850ES_Jx2__ + #include "../../Source/portable/IAR/V850ES/portmacro.h" +#endif + +#ifdef __IAR_V850ES_Hx2__ + #include "../../Source/portable/IAR/V850ES/portmacro.h" +#endif + +#ifdef __IAR_78K0R_Kx3__ + #include "../../Source/portable/IAR/78K0R/portmacro.h" +#endif + +#ifdef __IAR_78K0R_Kx3L__ + #include "../../Source/portable/IAR/78K0R/portmacro.h" +#endif + +#endif /* DEPRECATED_DEFINITIONS_H */ + diff --git a/components/freertos/include/event_groups.h b/components/freertos/include/event_groups.h new file mode 100644 index 00000000..1f38bdb7 --- /dev/null +++ b/components/freertos/include/event_groups.h @@ -0,0 +1,757 @@ +/* + * FreeRTOS Kernel V10.2.1 + * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +#ifndef EVENT_GROUPS_H +#define EVENT_GROUPS_H + +#ifndef INC_FREERTOS_H + #error "include FreeRTOS.h" must appear in source files before "include event_groups.h" +#endif + +/* FreeRTOS includes. */ +#include "timers.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * An event group is a collection of bits to which an application can assign a + * meaning. For example, an application may create an event group to convey + * the status of various CAN bus related events in which bit 0 might mean "A CAN + * message has been received and is ready for processing", bit 1 might mean "The + * application has queued a message that is ready for sending onto the CAN + * network", and bit 2 might mean "It is time to send a SYNC message onto the + * CAN network" etc. A task can then test the bit values to see which events + * are active, and optionally enter the Blocked state to wait for a specified + * bit or a group of specified bits to be active. To continue the CAN bus + * example, a CAN controlling task can enter the Blocked state (and therefore + * not consume any processing time) until either bit 0, bit 1 or bit 2 are + * active, at which time the bit that was actually active would inform the task + * which action it had to take (process a received message, send a message, or + * send a SYNC). + * + * The event groups implementation contains intelligence to avoid race + * conditions that would otherwise occur were an application to use a simple + * variable for the same purpose. This is particularly important with respect + * to when a bit within an event group is to be cleared, and when bits have to + * be set and then tested atomically - as is the case where event groups are + * used to create a synchronisation point between multiple tasks (a + * 'rendezvous'). + * + * \defgroup EventGroup + */ + + + +/** + * event_groups.h + * + * Type by which event groups are referenced. For example, a call to + * xEventGroupCreate() returns an EventGroupHandle_t variable that can then + * be used as a parameter to other event group functions. + * + * \defgroup EventGroupHandle_t EventGroupHandle_t + * \ingroup EventGroup + */ +struct EventGroupDef_t; +typedef struct EventGroupDef_t * EventGroupHandle_t; + +/* + * The type that holds event bits always matches TickType_t - therefore the + * number of bits it holds is set by configUSE_16_BIT_TICKS (16 bits if set to 1, + * 32 bits if set to 0. + * + * \defgroup EventBits_t EventBits_t + * \ingroup EventGroup + */ +typedef TickType_t EventBits_t; + +/** + * event_groups.h + *
+ EventGroupHandle_t xEventGroupCreate( void );
+
+ * + * Create a new event group. + * + * Internally, within the FreeRTOS implementation, event groups use a [small] + * block of memory, in which the event group's structure is stored. If an event + * groups is created using xEventGropuCreate() then the required memory is + * automatically dynamically allocated inside the xEventGroupCreate() function. + * (see http://www.freertos.org/a00111.html). If an event group is created + * using xEventGropuCreateStatic() then the application writer must instead + * provide the memory that will get used by the event group. + * xEventGroupCreateStatic() therefore allows an event group to be created + * without using any dynamic memory allocation. + * + * Although event groups are not related to ticks, for internal implementation + * reasons the number of bits available for use in an event group is dependent + * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h. If + * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit + * 0 to bit 7). If configUSE_16_BIT_TICKS is set to 0 then each event group has + * 24 usable bits (bit 0 to bit 23). The EventBits_t type is used to store + * event bits within an event group. + * + * @return If the event group was created then a handle to the event group is + * returned. If there was insufficient FreeRTOS heap available to create the + * event group then NULL is returned. See http://www.freertos.org/a00111.html + * + * Example usage: + 
+	// Declare a variable to hold the created event group.
+	EventGroupHandle_t xCreatedEventGroup;
+
+	// Attempt to create the event group.
+	xCreatedEventGroup = xEventGroupCreate();
+
+	// Was the event group created successfully?
+	if( xCreatedEventGroup == NULL )
+	{
+		// The event group was not created because there was insufficient
+		// FreeRTOS heap available.
+	}
+	else
+	{
+		// The event group was created.
+	}
+
+ * \defgroup xEventGroupCreate xEventGroupCreate + * \ingroup EventGroup + */ +#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) + EventGroupHandle_t xEventGroupCreate( void ) PRIVILEGED_FUNCTION; +#endif + +/** + * event_groups.h + *
+ EventGroupHandle_t xEventGroupCreateStatic( EventGroupHandle_t * pxEventGroupBuffer );
+
+ * + * Create a new event group. + * + * Internally, within the FreeRTOS implementation, event groups use a [small] + * block of memory, in which the event group's structure is stored. If an event + * groups is created using xEventGropuCreate() then the required memory is + * automatically dynamically allocated inside the xEventGroupCreate() function. + * (see http://www.freertos.org/a00111.html). If an event group is created + * using xEventGropuCreateStatic() then the application writer must instead + * provide the memory that will get used by the event group. + * xEventGroupCreateStatic() therefore allows an event group to be created + * without using any dynamic memory allocation. + * + * Although event groups are not related to ticks, for internal implementation + * reasons the number of bits available for use in an event group is dependent + * on the configUSE_16_BIT_TICKS setting in FreeRTOSConfig.h. If + * configUSE_16_BIT_TICKS is 1 then each event group contains 8 usable bits (bit + * 0 to bit 7). If configUSE_16_BIT_TICKS is set to 0 then each event group has + * 24 usable bits (bit 0 to bit 23). The EventBits_t type is used to store + * event bits within an event group. + * + * @param pxEventGroupBuffer pxEventGroupBuffer must point to a variable of type + * StaticEventGroup_t, which will be then be used to hold the event group's data + * structures, removing the need for the memory to be allocated dynamically. + * + * @return If the event group was created then a handle to the event group is + * returned. If pxEventGroupBuffer was NULL then NULL is returned. + * + * Example usage: + 
+	// StaticEventGroup_t is a publicly accessible structure that has the same
+	// size and alignment requirements as the real event group structure.  It is
+	// provided as a mechanism for applications to know the size of the event
+	// group (which is dependent on the architecture and configuration file
+	// settings) without breaking the strict data hiding policy by exposing the
+	// real event group internals.  This StaticEventGroup_t variable is passed
+	// into the xSemaphoreCreateEventGroupStatic() function and is used to store
+	// the event group's data structures
+	StaticEventGroup_t xEventGroupBuffer;
+
+	// Create the event group without dynamically allocating any memory.
+	xEventGroup = xEventGroupCreateStatic( &xEventGroupBuffer );
+
+ */ +#if( configSUPPORT_STATIC_ALLOCATION == 1 ) + EventGroupHandle_t xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) PRIVILEGED_FUNCTION; +#endif + +/** + * event_groups.h + *
+	EventBits_t xEventGroupWaitBits( 	EventGroupHandle_t xEventGroup,
+										const EventBits_t uxBitsToWaitFor,
+										const BaseType_t xClearOnExit,
+										const BaseType_t xWaitForAllBits,
+										const TickType_t xTicksToWait );
+
+ * + * [Potentially] block to wait for one or more bits to be set within a + * previously created event group. + * + * This function cannot be called from an interrupt. + * + * @param xEventGroup The event group in which the bits are being tested. The + * event group must have previously been created using a call to + * xEventGroupCreate(). + * + * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test + * inside the event group. For example, to wait for bit 0 and/or bit 2 set + * uxBitsToWaitFor to 0x05. To wait for bits 0 and/or bit 1 and/or bit 2 set + * uxBitsToWaitFor to 0x07. Etc. + * + * @param xClearOnExit If xClearOnExit is set to pdTRUE then any bits within + * uxBitsToWaitFor that are set within the event group will be cleared before + * xEventGroupWaitBits() returns if the wait condition was met (if the function + * returns for a reason other than a timeout). If xClearOnExit is set to + * pdFALSE then the bits set in the event group are not altered when the call to + * xEventGroupWaitBits() returns. + * + * @param xWaitForAllBits If xWaitForAllBits is set to pdTRUE then + * xEventGroupWaitBits() will return when either all the bits in uxBitsToWaitFor + * are set or the specified block time expires. If xWaitForAllBits is set to + * pdFALSE then xEventGroupWaitBits() will return when any one of the bits set + * in uxBitsToWaitFor is set or the specified block time expires. The block + * time is specified by the xTicksToWait parameter. + * + * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait + * for one/all (depending on the xWaitForAllBits value) of the bits specified by + * uxBitsToWaitFor to become set. + * + * @return The value of the event group at the time either the bits being waited + * for became set, or the block time expired. Test the return value to know + * which bits were set. If xEventGroupWaitBits() returned because its timeout + * expired then not all the bits being waited for will be set. If + * xEventGroupWaitBits() returned because the bits it was waiting for were set + * then the returned value is the event group value before any bits were + * automatically cleared in the case that xClearOnExit parameter was set to + * pdTRUE. + * + * Example usage: + 
+   #define BIT_0	( 1 << 0 )
+   #define BIT_4	( 1 << 4 )
+
+   void aFunction( EventGroupHandle_t xEventGroup )
+   {
+   EventBits_t uxBits;
+   const TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;
+
+		// Wait a maximum of 100ms for either bit 0 or bit 4 to be set within
+		// the event group.  Clear the bits before exiting.
+		uxBits = xEventGroupWaitBits(
+					xEventGroup,	// The event group being tested.
+					BIT_0 | BIT_4,	// The bits within the event group to wait for.
+					pdTRUE,			// BIT_0 and BIT_4 should be cleared before returning.
+					pdFALSE,		// Don't wait for both bits, either bit will do.
+					xTicksToWait );	// Wait a maximum of 100ms for either bit to be set.
+
+		if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
+		{
+			// xEventGroupWaitBits() returned because both bits were set.
+		}
+		else if( ( uxBits & BIT_0 ) != 0 )
+		{
+			// xEventGroupWaitBits() returned because just BIT_0 was set.
+		}
+		else if( ( uxBits & BIT_4 ) != 0 )
+		{
+			// xEventGroupWaitBits() returned because just BIT_4 was set.
+		}
+		else
+		{
+			// xEventGroupWaitBits() returned because xTicksToWait ticks passed
+			// without either BIT_0 or BIT_4 becoming set.
+		}
+   }
+
+ * \defgroup xEventGroupWaitBits xEventGroupWaitBits + * \ingroup EventGroup + */ +EventBits_t xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + +/** + * event_groups.h + *
+	EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear );
+
+ * + * Clear bits within an event group. This function cannot be called from an + * interrupt. + * + * @param xEventGroup The event group in which the bits are to be cleared. + * + * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear + * in the event group. For example, to clear bit 3 only, set uxBitsToClear to + * 0x08. To clear bit 3 and bit 0 set uxBitsToClear to 0x09. + * + * @return The value of the event group before the specified bits were cleared. + * + * Example usage: + 
+   #define BIT_0	( 1 << 0 )
+   #define BIT_4	( 1 << 4 )
+
+   void aFunction( EventGroupHandle_t xEventGroup )
+   {
+   EventBits_t uxBits;
+
+		// Clear bit 0 and bit 4 in xEventGroup.
+		uxBits = xEventGroupClearBits(
+								xEventGroup,	// The event group being updated.
+								BIT_0 | BIT_4 );// The bits being cleared.
+
+		if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
+		{
+			// Both bit 0 and bit 4 were set before xEventGroupClearBits() was
+			// called.  Both will now be clear (not set).
+		}
+		else if( ( uxBits & BIT_0 ) != 0 )
+		{
+			// Bit 0 was set before xEventGroupClearBits() was called.  It will
+			// now be clear.
+		}
+		else if( ( uxBits & BIT_4 ) != 0 )
+		{
+			// Bit 4 was set before xEventGroupClearBits() was called.  It will
+			// now be clear.
+		}
+		else
+		{
+			// Neither bit 0 nor bit 4 were set in the first place.
+		}
+   }
+
+ * \defgroup xEventGroupClearBits xEventGroupClearBits + * \ingroup EventGroup + */ +EventBits_t xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION; + +/** + * event_groups.h + *
+	BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
+
+ * + * A version of xEventGroupClearBits() that can be called from an interrupt. + * + * Setting bits in an event group is not a deterministic operation because there + * are an unknown number of tasks that may be waiting for the bit or bits being + * set. FreeRTOS does not allow nondeterministic operations to be performed + * while interrupts are disabled, so protects event groups that are accessed + * from tasks by suspending the scheduler rather than disabling interrupts. As + * a result event groups cannot be accessed directly from an interrupt service + * routine. Therefore xEventGroupClearBitsFromISR() sends a message to the + * timer task to have the clear operation performed in the context of the timer + * task. + * + * @param xEventGroup The event group in which the bits are to be cleared. + * + * @param uxBitsToClear A bitwise value that indicates the bit or bits to clear. + * For example, to clear bit 3 only, set uxBitsToClear to 0x08. To clear bit 3 + * and bit 0 set uxBitsToClear to 0x09. + * + * @return If the request to execute the function was posted successfully then + * pdPASS is returned, otherwise pdFALSE is returned. pdFALSE will be returned + * if the timer service queue was full. + * + * Example usage: + 
+   #define BIT_0	( 1 << 0 )
+   #define BIT_4	( 1 << 4 )
+
+   // An event group which it is assumed has already been created by a call to
+   // xEventGroupCreate().
+   EventGroupHandle_t xEventGroup;
+
+   void anInterruptHandler( void )
+   {
+		// Clear bit 0 and bit 4 in xEventGroup.
+		xResult = xEventGroupClearBitsFromISR(
+							xEventGroup,	 // The event group being updated.
+							BIT_0 | BIT_4 ); // The bits being set.
+
+		if( xResult == pdPASS )
+		{
+			// The message was posted successfully.
+		}
+  }
+
+ * \defgroup xEventGroupClearBitsFromISR xEventGroupClearBitsFromISR + * \ingroup EventGroup + */ +#if( configUSE_TRACE_FACILITY == 1 ) + BaseType_t xEventGroupClearBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) PRIVILEGED_FUNCTION; +#else + #define xEventGroupClearBitsFromISR( xEventGroup, uxBitsToClear ) xTimerPendFunctionCallFromISR( vEventGroupClearBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToClear, NULL ) +#endif + +/** + * event_groups.h + *
+	EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet );
+
+ * + * Set bits within an event group. + * This function cannot be called from an interrupt. xEventGroupSetBitsFromISR() + * is a version that can be called from an interrupt. + * + * Setting bits in an event group will automatically unblock tasks that are + * blocked waiting for the bits. + * + * @param xEventGroup The event group in which the bits are to be set. + * + * @param uxBitsToSet A bitwise value that indicates the bit or bits to set. + * For example, to set bit 3 only, set uxBitsToSet to 0x08. To set bit 3 + * and bit 0 set uxBitsToSet to 0x09. + * + * @return The value of the event group at the time the call to + * xEventGroupSetBits() returns. There are two reasons why the returned value + * might have the bits specified by the uxBitsToSet parameter cleared. First, + * if setting a bit results in a task that was waiting for the bit leaving the + * blocked state then it is possible the bit will be cleared automatically + * (see the xClearBitOnExit parameter of xEventGroupWaitBits()). Second, any + * unblocked (or otherwise Ready state) task that has a priority above that of + * the task that called xEventGroupSetBits() will execute and may change the + * event group value before the call to xEventGroupSetBits() returns. + * + * Example usage: + 
+   #define BIT_0	( 1 << 0 )
+   #define BIT_4	( 1 << 4 )
+
+   void aFunction( EventGroupHandle_t xEventGroup )
+   {
+   EventBits_t uxBits;
+
+		// Set bit 0 and bit 4 in xEventGroup.
+		uxBits = xEventGroupSetBits(
+							xEventGroup,	// The event group being updated.
+							BIT_0 | BIT_4 );// The bits being set.
+
+		if( ( uxBits & ( BIT_0 | BIT_4 ) ) == ( BIT_0 | BIT_4 ) )
+		{
+			// Both bit 0 and bit 4 remained set when the function returned.
+		}
+		else if( ( uxBits & BIT_0 ) != 0 )
+		{
+			// Bit 0 remained set when the function returned, but bit 4 was
+			// cleared.  It might be that bit 4 was cleared automatically as a
+			// task that was waiting for bit 4 was removed from the Blocked
+			// state.
+		}
+		else if( ( uxBits & BIT_4 ) != 0 )
+		{
+			// Bit 4 remained set when the function returned, but bit 0 was
+			// cleared.  It might be that bit 0 was cleared automatically as a
+			// task that was waiting for bit 0 was removed from the Blocked
+			// state.
+		}
+		else
+		{
+			// Neither bit 0 nor bit 4 remained set.  It might be that a task
+			// was waiting for both of the bits to be set, and the bits were
+			// cleared as the task left the Blocked state.
+		}
+   }
+
+ * \defgroup xEventGroupSetBits xEventGroupSetBits + * \ingroup EventGroup + */ +EventBits_t xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) PRIVILEGED_FUNCTION; + +/** + * event_groups.h + *
+	BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken );
+
+ * + * A version of xEventGroupSetBits() that can be called from an interrupt. + * + * Setting bits in an event group is not a deterministic operation because there + * are an unknown number of tasks that may be waiting for the bit or bits being + * set. FreeRTOS does not allow nondeterministic operations to be performed in + * interrupts or from critical sections. Therefore xEventGroupSetBitsFromISR() + * sends a message to the timer task to have the set operation performed in the + * context of the timer task - where a scheduler lock is used in place of a + * critical section. + * + * @param xEventGroup The event group in which the bits are to be set. + * + * @param uxBitsToSet A bitwise value that indicates the bit or bits to set. + * For example, to set bit 3 only, set uxBitsToSet to 0x08. To set bit 3 + * and bit 0 set uxBitsToSet to 0x09. + * + * @param pxHigherPriorityTaskWoken As mentioned above, calling this function + * will result in a message being sent to the timer daemon task. If the + * priority of the timer daemon task is higher than the priority of the + * currently running task (the task the interrupt interrupted) then + * *pxHigherPriorityTaskWoken will be set to pdTRUE by + * xEventGroupSetBitsFromISR(), indicating that a context switch should be + * requested before the interrupt exits. For that reason + * *pxHigherPriorityTaskWoken must be initialised to pdFALSE. See the + * example code below. + * + * @return If the request to execute the function was posted successfully then + * pdPASS is returned, otherwise pdFALSE is returned. pdFALSE will be returned + * if the timer service queue was full. + * + * Example usage: + 
+   #define BIT_0	( 1 << 0 )
+   #define BIT_4	( 1 << 4 )
+
+   // An event group which it is assumed has already been created by a call to
+   // xEventGroupCreate().
+   EventGroupHandle_t xEventGroup;
+
+   void anInterruptHandler( void )
+   {
+   BaseType_t xHigherPriorityTaskWoken, xResult;
+
+		// xHigherPriorityTaskWoken must be initialised to pdFALSE.
+		xHigherPriorityTaskWoken = pdFALSE;
+
+		// Set bit 0 and bit 4 in xEventGroup.
+		xResult = xEventGroupSetBitsFromISR(
+							xEventGroup,	// The event group being updated.
+							BIT_0 | BIT_4   // The bits being set.
+							&xHigherPriorityTaskWoken );
+
+		// Was the message posted successfully?
+		if( xResult == pdPASS )
+		{
+			// If xHigherPriorityTaskWoken is now set to pdTRUE then a context
+			// switch should be requested.  The macro used is port specific and
+			// will be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() -
+			// refer to the documentation page for the port being used.
+			portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+		}
+  }
+
+ * \defgroup xEventGroupSetBitsFromISR xEventGroupSetBitsFromISR + * \ingroup EventGroup + */ +#if( configUSE_TRACE_FACILITY == 1 ) + BaseType_t xEventGroupSetBitsFromISR( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION; +#else + #define xEventGroupSetBitsFromISR( xEventGroup, uxBitsToSet, pxHigherPriorityTaskWoken ) xTimerPendFunctionCallFromISR( vEventGroupSetBitsCallback, ( void * ) xEventGroup, ( uint32_t ) uxBitsToSet, pxHigherPriorityTaskWoken ) +#endif + +/** + * event_groups.h + *
+	EventBits_t xEventGroupSync(	EventGroupHandle_t xEventGroup,
+									const EventBits_t uxBitsToSet,
+									const EventBits_t uxBitsToWaitFor,
+									TickType_t xTicksToWait );
+
+ * + * Atomically set bits within an event group, then wait for a combination of + * bits to be set within the same event group. This functionality is typically + * used to synchronise multiple tasks, where each task has to wait for the other + * tasks to reach a synchronisation point before proceeding. + * + * This function cannot be used from an interrupt. + * + * The function will return before its block time expires if the bits specified + * by the uxBitsToWait parameter are set, or become set within that time. In + * this case all the bits specified by uxBitsToWait will be automatically + * cleared before the function returns. + * + * @param xEventGroup The event group in which the bits are being tested. The + * event group must have previously been created using a call to + * xEventGroupCreate(). + * + * @param uxBitsToSet The bits to set in the event group before determining + * if, and possibly waiting for, all the bits specified by the uxBitsToWait + * parameter are set. + * + * @param uxBitsToWaitFor A bitwise value that indicates the bit or bits to test + * inside the event group. For example, to wait for bit 0 and bit 2 set + * uxBitsToWaitFor to 0x05. To wait for bits 0 and bit 1 and bit 2 set + * uxBitsToWaitFor to 0x07. Etc. + * + * @param xTicksToWait The maximum amount of time (specified in 'ticks') to wait + * for all of the bits specified by uxBitsToWaitFor to become set. + * + * @return The value of the event group at the time either the bits being waited + * for became set, or the block time expired. Test the return value to know + * which bits were set. If xEventGroupSync() returned because its timeout + * expired then not all the bits being waited for will be set. If + * xEventGroupSync() returned because all the bits it was waiting for were + * set then the returned value is the event group value before any bits were + * automatically cleared. + * + * Example usage: + 
+ // Bits used by the three tasks.
+ #define TASK_0_BIT		( 1 << 0 )
+ #define TASK_1_BIT		( 1 << 1 )
+ #define TASK_2_BIT		( 1 << 2 )
+
+ #define ALL_SYNC_BITS ( TASK_0_BIT | TASK_1_BIT | TASK_2_BIT )
+
+ // Use an event group to synchronise three tasks.  It is assumed this event
+ // group has already been created elsewhere.
+ EventGroupHandle_t xEventBits;
+
+ void vTask0( void *pvParameters )
+ {
+ EventBits_t uxReturn;
+ TickType_t xTicksToWait = 100 / portTICK_PERIOD_MS;
+
+	 for( ;; )
+	 {
+		// Perform task functionality here.
+
+		// Set bit 0 in the event flag to note this task has reached the
+		// sync point.  The other two tasks will set the other two bits defined
+		// by ALL_SYNC_BITS.  All three tasks have reached the synchronisation
+		// point when all the ALL_SYNC_BITS are set.  Wait a maximum of 100ms
+		// for this to happen.
+		uxReturn = xEventGroupSync( xEventBits, TASK_0_BIT, ALL_SYNC_BITS, xTicksToWait );
+
+		if( ( uxReturn & ALL_SYNC_BITS ) == ALL_SYNC_BITS )
+		{
+			// All three tasks reached the synchronisation point before the call
+			// to xEventGroupSync() timed out.
+		}
+	}
+ }
+
+ void vTask1( void *pvParameters )
+ {
+	 for( ;; )
+	 {
+		// Perform task functionality here.
+
+		// Set bit 1 in the event flag to note this task has reached the
+		// synchronisation point.  The other two tasks will set the other two
+		// bits defined by ALL_SYNC_BITS.  All three tasks have reached the
+		// synchronisation point when all the ALL_SYNC_BITS are set.  Wait
+		// indefinitely for this to happen.
+		xEventGroupSync( xEventBits, TASK_1_BIT, ALL_SYNC_BITS, portMAX_DELAY );
+
+		// xEventGroupSync() was called with an indefinite block time, so
+		// this task will only reach here if the syncrhonisation was made by all
+		// three tasks, so there is no need to test the return value.
+	 }
+ }
+
+ void vTask2( void *pvParameters )
+ {
+	 for( ;; )
+	 {
+		// Perform task functionality here.
+
+		// Set bit 2 in the event flag to note this task has reached the
+		// synchronisation point.  The other two tasks will set the other two
+		// bits defined by ALL_SYNC_BITS.  All three tasks have reached the
+		// synchronisation point when all the ALL_SYNC_BITS are set.  Wait
+		// indefinitely for this to happen.
+		xEventGroupSync( xEventBits, TASK_2_BIT, ALL_SYNC_BITS, portMAX_DELAY );
+
+		// xEventGroupSync() was called with an indefinite block time, so
+		// this task will only reach here if the syncrhonisation was made by all
+		// three tasks, so there is no need to test the return value.
+	}
+ }
+
+
+ * \defgroup xEventGroupSync xEventGroupSync + * \ingroup EventGroup + */ +EventBits_t xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION; + + +/** + * event_groups.h + *
+	EventBits_t xEventGroupGetBits( EventGroupHandle_t xEventGroup );
+
+ * + * Returns the current value of the bits in an event group. This function + * cannot be used from an interrupt. + * + * @param xEventGroup The event group being queried. + * + * @return The event group bits at the time xEventGroupGetBits() was called. + * + * \defgroup xEventGroupGetBits xEventGroupGetBits + * \ingroup EventGroup + */ +#define xEventGroupGetBits( xEventGroup ) xEventGroupClearBits( xEventGroup, 0 ) + +/** + * event_groups.h + *
+	EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup );
+
+ * + * A version of xEventGroupGetBits() that can be called from an ISR. + * + * @param xEventGroup The event group being queried. + * + * @return The event group bits at the time xEventGroupGetBitsFromISR() was called. + * + * \defgroup xEventGroupGetBitsFromISR xEventGroupGetBitsFromISR + * \ingroup EventGroup + */ +EventBits_t xEventGroupGetBitsFromISR( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION; + +/** + * event_groups.h + *
+	void xEventGroupDelete( EventGroupHandle_t xEventGroup );
+
+ * + * Delete an event group that was previously created by a call to + * xEventGroupCreate(). Tasks that are blocked on the event group will be + * unblocked and obtain 0 as the event group's value. + * + * @param xEventGroup The event group being deleted. + */ +void vEventGroupDelete( EventGroupHandle_t xEventGroup ) PRIVILEGED_FUNCTION; + +/* For internal use only. */ +void vEventGroupSetBitsCallback( void *pvEventGroup, const uint32_t ulBitsToSet ) PRIVILEGED_FUNCTION; +void vEventGroupClearBitsCallback( void *pvEventGroup, const uint32_t ulBitsToClear ) PRIVILEGED_FUNCTION; + + +#if (configUSE_TRACE_FACILITY == 1) + UBaseType_t uxEventGroupGetNumber( void* xEventGroup ) PRIVILEGED_FUNCTION; + void vEventGroupSetNumber( void* xEventGroup, UBaseType_t uxEventGroupNumber ) PRIVILEGED_FUNCTION; +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* EVENT_GROUPS_H */ + + diff --git a/components/freertos/include/list.h b/components/freertos/include/list.h new file mode 100644 index 00000000..73b4f3aa --- /dev/null +++ b/components/freertos/include/list.h @@ -0,0 +1,412 @@ +/* + * FreeRTOS Kernel V10.2.1 + * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + +/* + * This is the list implementation used by the scheduler. While it is tailored + * heavily for the schedulers needs, it is also available for use by + * application code. + * + * list_ts can only store pointers to list_item_ts. Each ListItem_t contains a + * numeric value (xItemValue). Most of the time the lists are sorted in + * descending item value order. + * + * Lists are created already containing one list item. The value of this + * item is the maximum possible that can be stored, it is therefore always at + * the end of the list and acts as a marker. The list member pxHead always + * points to this marker - even though it is at the tail of the list. This + * is because the tail contains a wrap back pointer to the true head of + * the list. + * + * In addition to it's value, each list item contains a pointer to the next + * item in the list (pxNext), a pointer to the list it is in (pxContainer) + * and a pointer to back to the object that contains it. These later two + * pointers are included for efficiency of list manipulation. There is + * effectively a two way link between the object containing the list item and + * the list item itself. + * + * + * \page ListIntroduction List Implementation + * \ingroup FreeRTOSIntro + */ + +#ifndef INC_FREERTOS_H + #error FreeRTOS.h must be included before list.h +#endif + +#ifndef LIST_H +#define LIST_H + +/* + * The list structure members are modified from within interrupts, and therefore + * by rights should be declared volatile. However, they are only modified in a + * functionally atomic way (within critical sections of with the scheduler + * suspended) and are either passed by reference into a function or indexed via + * a volatile variable. Therefore, in all use cases tested so far, the volatile + * qualifier can be omitted in order to provide a moderate performance + * improvement without adversely affecting functional behaviour. The assembly + * instructions generated by the IAR, ARM and GCC compilers when the respective + * compiler's options were set for maximum optimisation has been inspected and + * deemed to be as intended. That said, as compiler technology advances, and + * especially if aggressive cross module optimisation is used (a use case that + * has not been exercised to any great extend) then it is feasible that the + * volatile qualifier will be needed for correct optimisation. It is expected + * that a compiler removing essential code because, without the volatile + * qualifier on the list structure members and with aggressive cross module + * optimisation, the compiler deemed the code unnecessary will result in + * complete and obvious failure of the scheduler. If this is ever experienced + * then the volatile qualifier can be inserted in the relevant places within the + * list structures by simply defining configLIST_VOLATILE to volatile in + * FreeRTOSConfig.h (as per the example at the bottom of this comment block). + * If configLIST_VOLATILE is not defined then the preprocessor directives below + * will simply #define configLIST_VOLATILE away completely. + * + * To use volatile list structure members then add the following line to + * FreeRTOSConfig.h (without the quotes): + * "#define configLIST_VOLATILE volatile" + */ +#ifndef configLIST_VOLATILE + #define configLIST_VOLATILE +#endif /* configSUPPORT_CROSS_MODULE_OPTIMISATION */ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Macros that can be used to place known values within the list structures, +then check that the known values do not get corrupted during the execution of +the application. These may catch the list data structures being overwritten in +memory. They will not catch data errors caused by incorrect configuration or +use of FreeRTOS.*/ +#if( configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES == 0 ) + /* Define the macros to do nothing. */ + #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE + #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE + #define listFIRST_LIST_INTEGRITY_CHECK_VALUE + #define listSECOND_LIST_INTEGRITY_CHECK_VALUE + #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) + #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) + #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) + #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) + #define listTEST_LIST_ITEM_INTEGRITY( pxItem ) + #define listTEST_LIST_INTEGRITY( pxList ) +#else + /* Define macros that add new members into the list structures. */ + #define listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue1; + #define listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE TickType_t xListItemIntegrityValue2; + #define listFIRST_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue1; + #define listSECOND_LIST_INTEGRITY_CHECK_VALUE TickType_t xListIntegrityValue2; + + /* Define macros that set the new structure members to known values. */ + #define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue1 = pdINTEGRITY_CHECK_VALUE + #define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrityValue2 = pdINTEGRITY_CHECK_VALUE + #define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) ( pxList )->xListIntegrityValue1 = pdINTEGRITY_CHECK_VALUE + #define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) ( pxList )->xListIntegrityValue2 = pdINTEGRITY_CHECK_VALUE + + /* Define macros that will assert if one of the structure members does not + contain its expected value. */ + #define listTEST_LIST_ITEM_INTEGRITY( pxItem ) configASSERT( ( ( pxItem )->xListItemIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxItem )->xListItemIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) ) + #define listTEST_LIST_INTEGRITY( pxList ) configASSERT( ( ( pxList )->xListIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) && ( ( pxList )->xListIntegrityValue2 == pdINTEGRITY_CHECK_VALUE ) ) +#endif /* configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES */ + + +/* + * Definition of the only type of object that a list can contain. + */ +struct xLIST; +struct xLIST_ITEM +{ + listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ + configLIST_VOLATILE TickType_t xItemValue; /*< The value being listed. In most cases this is used to sort the list in descending order. */ + struct xLIST_ITEM * configLIST_VOLATILE pxNext; /*< Pointer to the next ListItem_t in the list. */ + struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; /*< Pointer to the previous ListItem_t in the list. */ + void * pvOwner; /*< Pointer to the object (normally a TCB) that contains the list item. There is therefore a two way link between the object containing the list item and the list item itself. */ + struct xLIST * configLIST_VOLATILE pxContainer; /*< Pointer to the list in which this list item is placed (if any). */ + listSECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ +}; +typedef struct xLIST_ITEM ListItem_t; /* For some reason lint wants this as two separate definitions. */ + +struct xMINI_LIST_ITEM +{ + listFIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ + configLIST_VOLATILE TickType_t xItemValue; + struct xLIST_ITEM * configLIST_VOLATILE pxNext; + struct xLIST_ITEM * configLIST_VOLATILE pxPrevious; +}; +typedef struct xMINI_LIST_ITEM MiniListItem_t; + +/* + * Definition of the type of queue used by the scheduler. + */ +typedef struct xLIST +{ + listFIRST_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ + volatile UBaseType_t uxNumberOfItems; + ListItem_t * configLIST_VOLATILE pxIndex; /*< Used to walk through the list. Points to the last item returned by a call to listGET_OWNER_OF_NEXT_ENTRY (). */ + MiniListItem_t xListEnd; /*< List item that contains the maximum possible item value meaning it is always at the end of the list and is therefore used as a marker. */ + listSECOND_LIST_INTEGRITY_CHECK_VALUE /*< Set to a known value if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ +} List_t; + +/* + * Access macro to set the owner of a list item. The owner of a list item + * is the object (usually a TCB) that contains the list item. + * + * \page listSET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER + * \ingroup LinkedList + */ +#define listSET_LIST_ITEM_OWNER( pxListItem, pxOwner ) ( ( pxListItem )->pvOwner = ( void * ) ( pxOwner ) ) + +/* + * Access macro to get the owner of a list item. The owner of a list item + * is the object (usually a TCB) that contains the list item. + * + * \page listGET_LIST_ITEM_OWNER listSET_LIST_ITEM_OWNER + * \ingroup LinkedList + */ +#define listGET_LIST_ITEM_OWNER( pxListItem ) ( ( pxListItem )->pvOwner ) + +/* + * Access macro to set the value of the list item. In most cases the value is + * used to sort the list in descending order. + * + * \page listSET_LIST_ITEM_VALUE listSET_LIST_ITEM_VALUE + * \ingroup LinkedList + */ +#define listSET_LIST_ITEM_VALUE( pxListItem, xValue ) ( ( pxListItem )->xItemValue = ( xValue ) ) + +/* + * Access macro to retrieve the value of the list item. The value can + * represent anything - for example the priority of a task, or the time at + * which a task should be unblocked. + * + * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE + * \ingroup LinkedList + */ +#define listGET_LIST_ITEM_VALUE( pxListItem ) ( ( pxListItem )->xItemValue ) + +/* + * Access macro to retrieve the value of the list item at the head of a given + * list. + * + * \page listGET_LIST_ITEM_VALUE listGET_LIST_ITEM_VALUE + * \ingroup LinkedList + */ +#define listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext->xItemValue ) + +/* + * Return the list item at the head of the list. + * + * \page listGET_HEAD_ENTRY listGET_HEAD_ENTRY + * \ingroup LinkedList + */ +#define listGET_HEAD_ENTRY( pxList ) ( ( ( pxList )->xListEnd ).pxNext ) + +/* + * Return the next list item. + * + * \page listGET_NEXT listGET_NEXT + * \ingroup LinkedList + */ +#define listGET_NEXT( pxListItem ) ( ( pxListItem )->pxNext ) + +/* + * Return the list item that marks the end of the list + * + * \page listGET_END_MARKER listGET_END_MARKER + * \ingroup LinkedList + */ +#define listGET_END_MARKER( pxList ) ( ( ListItem_t const * ) ( &( ( pxList )->xListEnd ) ) ) + +/* + * Access macro to determine if a list contains any items. The macro will + * only have the value true if the list is empty. + * + * \page listLIST_IS_EMPTY listLIST_IS_EMPTY + * \ingroup LinkedList + */ +#define listLIST_IS_EMPTY( pxList ) ( ( ( pxList )->uxNumberOfItems == ( UBaseType_t ) 0 ) ? pdTRUE : pdFALSE ) + +/* + * Access macro to return the number of items in the list. + */ +#define listCURRENT_LIST_LENGTH( pxList ) ( ( pxList )->uxNumberOfItems ) + +/* + * Access function to obtain the owner of the next entry in a list. + * + * The list member pxIndex is used to walk through a list. Calling + * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list + * and returns that entry's pxOwner parameter. Using multiple calls to this + * function it is therefore possible to move through every item contained in + * a list. + * + * The pxOwner parameter of a list item is a pointer to the object that owns + * the list item. In the scheduler this is normally a task control block. + * The pxOwner parameter effectively creates a two way link between the list + * item and its owner. + * + * @param pxTCB pxTCB is set to the address of the owner of the next list item. + * @param pxList The list from which the next item owner is to be returned. + * + * \page listGET_OWNER_OF_NEXT_ENTRY listGET_OWNER_OF_NEXT_ENTRY + * \ingroup LinkedList + */ +#define listGET_OWNER_OF_NEXT_ENTRY( pxTCB, pxList ) \ +{ \ +List_t * const pxConstList = ( pxList ); \ + /* Increment the index to the next item and return the item, ensuring */ \ + /* we don't return the marker used at the end of the list. */ \ + ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ + if( ( void * ) ( pxConstList )->pxIndex == ( void * ) &( ( pxConstList )->xListEnd ) ) \ + { \ + ( pxConstList )->pxIndex = ( pxConstList )->pxIndex->pxNext; \ + } \ + ( pxTCB ) = ( pxConstList )->pxIndex->pvOwner; \ +} + + +/* + * Access function to obtain the owner of the first entry in a list. Lists + * are normally sorted in ascending item value order. + * + * This function returns the pxOwner member of the first item in the list. + * The pxOwner parameter of a list item is a pointer to the object that owns + * the list item. In the scheduler this is normally a task control block. + * The pxOwner parameter effectively creates a two way link between the list + * item and its owner. + * + * @param pxList The list from which the owner of the head item is to be + * returned. + * + * \page listGET_OWNER_OF_HEAD_ENTRY listGET_OWNER_OF_HEAD_ENTRY + * \ingroup LinkedList + */ +#define listGET_OWNER_OF_HEAD_ENTRY( pxList ) ( (&( ( pxList )->xListEnd ))->pxNext->pvOwner ) + +/* + * Check to see if a list item is within a list. The list item maintains a + * "container" pointer that points to the list it is in. All this macro does + * is check to see if the container and the list match. + * + * @param pxList The list we want to know if the list item is within. + * @param pxListItem The list item we want to know if is in the list. + * @return pdTRUE if the list item is in the list, otherwise pdFALSE. + */ +#define listIS_CONTAINED_WITHIN( pxList, pxListItem ) ( ( ( pxListItem )->pxContainer == ( pxList ) ) ? ( pdTRUE ) : ( pdFALSE ) ) + +/* + * Return the list a list item is contained within (referenced from). + * + * @param pxListItem The list item being queried. + * @return A pointer to the List_t object that references the pxListItem + */ +#define listLIST_ITEM_CONTAINER( pxListItem ) ( ( pxListItem )->pxContainer ) + +/* + * This provides a crude means of knowing if a list has been initialised, as + * pxList->xListEnd.xItemValue is set to portMAX_DELAY by the vListInitialise() + * function. + */ +#define listLIST_IS_INITIALISED( pxList ) ( ( pxList )->xListEnd.xItemValue == portMAX_DELAY ) + +/* + * Must be called before a list is used! This initialises all the members + * of the list structure and inserts the xListEnd item into the list as a + * marker to the back of the list. + * + * @param pxList Pointer to the list being initialised. + * + * \page vListInitialise vListInitialise + * \ingroup LinkedList + */ +void vListInitialise( List_t * const pxList ) PRIVILEGED_FUNCTION; + +/* + * Must be called before a list item is used. This sets the list container to + * null so the item does not think that it is already contained in a list. + * + * @param pxItem Pointer to the list item being initialised. + * + * \page vListInitialiseItem vListInitialiseItem + * \ingroup LinkedList + */ +void vListInitialiseItem( ListItem_t * const pxItem ) PRIVILEGED_FUNCTION; + +/* + * Insert a list item into a list. The item will be inserted into the list in + * a position determined by its item value (descending item value order). + * + * @param pxList The list into which the item is to be inserted. + * + * @param pxNewListItem The item that is to be placed in the list. + * + * \page vListInsert vListInsert + * \ingroup LinkedList + */ +void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION; + +/* + * Insert a list item into a list. The item will be inserted in a position + * such that it will be the last item within the list returned by multiple + * calls to listGET_OWNER_OF_NEXT_ENTRY. + * + * The list member pxIndex is used to walk through a list. Calling + * listGET_OWNER_OF_NEXT_ENTRY increments pxIndex to the next item in the list. + * Placing an item in a list using vListInsertEnd effectively places the item + * in the list position pointed to by pxIndex. This means that every other + * item within the list will be returned by listGET_OWNER_OF_NEXT_ENTRY before + * the pxIndex parameter again points to the item being inserted. + * + * @param pxList The list into which the item is to be inserted. + * + * @param pxNewListItem The list item to be inserted into the list. + * + * \page vListInsertEnd vListInsertEnd + * \ingroup LinkedList + */ +void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem ) PRIVILEGED_FUNCTION; + +/* + * Remove an item from a list. The list item has a pointer to the list that + * it is in, so only the list item need be passed into the function. + * + * @param uxListRemove The item to be removed. The item will remove itself from + * the list pointed to by it's pxContainer parameter. + * + * @return The number of items that remain in the list after the list item has + * been removed. + * + * \page uxListRemove uxListRemove + * \ingroup LinkedList + */ +UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) PRIVILEGED_FUNCTION; + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/components/freertos/include/message_buffer.h b/components/freertos/include/message_buffer.h new file mode 100644 index 00000000..1e751be5 --- /dev/null +++ b/components/freertos/include/message_buffer.h @@ -0,0 +1,803 @@ +/* + * FreeRTOS Kernel V10.2.1 + * Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +/* + * Message buffers build functionality on top of FreeRTOS stream buffers. + * Whereas stream buffers are used to send a continuous stream of data from one + * task or interrupt to another, message buffers are used to send variable + * length discrete messages from one task or interrupt to another. Their + * implementation is light weight, making them particularly suited for interrupt + * to task and core to core communication scenarios. + * + * ***NOTE***: Uniquely among FreeRTOS objects, the stream buffer + * implementation (so also the message buffer implementation, as message buffers + * are built on top of stream buffers) assumes there is only one task or + * interrupt that will write to the buffer (the writer), and only one task or + * interrupt that will read from the buffer (the reader). It is safe for the + * writer and reader to be different tasks or interrupts, but, unlike other + * FreeRTOS objects, it is not safe to have multiple different writers or + * multiple different readers. If there are to be multiple different writers + * then the application writer must place each call to a writing API function + * (such as xMessageBufferSend()) inside a critical section and set the send + * block time to 0. Likewise, if there are to be multiple different readers + * then the application writer must place each call to a reading API function + * (such as xMessageBufferRead()) inside a critical section and set the receive + * timeout to 0. + * + * Message buffers hold variable length messages. To enable that, when a + * message is written to the message buffer an additional sizeof( size_t ) bytes + * are also written to store the message's length (that happens internally, with + * the API function). sizeof( size_t ) is typically 4 bytes on a 32-bit + * architecture, so writing a 10 byte message to a message buffer on a 32-bit + * architecture will actually reduce the available space in the message buffer + * by 14 bytes (10 byte are used by the message, and 4 bytes to hold the length + * of the message). + */ + +#ifndef FREERTOS_MESSAGE_BUFFER_H +#define FREERTOS_MESSAGE_BUFFER_H + +#ifndef INC_FREERTOS_H + #error "include FreeRTOS.h must appear in source files before include message_buffer.h" +#endif + +/* Message buffers are built onto of stream buffers. */ +#include "stream_buffer.h" + +#if defined( __cplusplus ) +extern "C" { +#endif + +/** + * Type by which message buffers are referenced. For example, a call to + * xMessageBufferCreate() returns an MessageBufferHandle_t variable that can + * then be used as a parameter to xMessageBufferSend(), xMessageBufferReceive(), + * etc. + */ +typedef void * MessageBufferHandle_t; + +/*-----------------------------------------------------------*/ + +/** + * message_buffer.h + * +
+MessageBufferHandle_t xMessageBufferCreate( size_t xBufferSizeBytes );
+
+ * + * Creates a new message buffer using dynamically allocated memory. See + * xMessageBufferCreateStatic() for a version that uses statically allocated + * memory (memory that is allocated at compile time). + * + * configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in + * FreeRTOSConfig.h for xMessageBufferCreate() to be available. + * + * @param xBufferSizeBytes The total number of bytes (not messages) the message + * buffer will be able to hold at any one time. When a message is written to + * the message buffer an additional sizeof( size_t ) bytes are also written to + * store the message's length. sizeof( size_t ) is typically 4 bytes on a + * 32-bit architecture, so on most 32-bit architectures a 10 byte message will + * take up 14 bytes of message buffer space. + * + * @return If NULL is returned, then the message buffer cannot be created + * because there is insufficient heap memory available for FreeRTOS to allocate + * the message buffer data structures and storage area. A non-NULL value being + * returned indicates that the message buffer has been created successfully - + * the returned value should be stored as the handle to the created message + * buffer. + * + * Example use: +
+
+void vAFunction( void )
+{
+MessageBufferHandle_t xMessageBuffer;
+const size_t xMessageBufferSizeBytes = 100;
+
+    // Create a message buffer that can hold 100 bytes.  The memory used to hold
+    // both the message buffer structure and the messages themselves is allocated
+    // dynamically.  Each message added to the buffer consumes an additional 4
+    // bytes which are used to hold the lengh of the message.
+    xMessageBuffer = xMessageBufferCreate( xMessageBufferSizeBytes );
+
+    if( xMessageBuffer == NULL )
+    {
+        // There was not enough heap memory space available to create the
+        // message buffer.
+    }
+    else
+    {
+        // The message buffer was created successfully and can now be used.
+    }
+
+
+ * \defgroup xMessageBufferCreate xMessageBufferCreate + * \ingroup MessageBufferManagement + */ +#define xMessageBufferCreate( xBufferSizeBytes ) ( MessageBufferHandle_t ) xStreamBufferGenericCreate( xBufferSizeBytes, ( size_t ) 0, pdTRUE ) + +/** + * message_buffer.h + * +
+MessageBufferHandle_t xMessageBufferCreateStatic( size_t xBufferSizeBytes,
+                                                  uint8_t *pucMessageBufferStorageArea,
+                                                  StaticMessageBuffer_t *pxStaticMessageBuffer );
+
+ * Creates a new message buffer using statically allocated memory. See + * xMessageBufferCreate() for a version that uses dynamically allocated memory. + * + * @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the + * pucMessageBufferStorageArea parameter. When a message is written to the + * message buffer an additional sizeof( size_t ) bytes are also written to store + * the message's length. sizeof( size_t ) is typically 4 bytes on a 32-bit + * architecture, so on most 32-bit architecture a 10 byte message will take up + * 14 bytes of message buffer space. The maximum number of bytes that can be + * stored in the message buffer is actually (xBufferSizeBytes - 1). + * + * @param pucMessageBufferStorageArea Must point to a uint8_t array that is at + * least xBufferSizeBytes + 1 big. This is the array to which messages are + * copied when they are written to the message buffer. + * + * @param pxStaticMessageBuffer Must point to a variable of type + * StaticMessageBuffer_t, which will be used to hold the message buffer's data + * structure. + * + * @return If the message buffer is created successfully then a handle to the + * created message buffer is returned. If either pucMessageBufferStorageArea or + * pxStaticmessageBuffer are NULL then NULL is returned. + * + * Example use: +
+
+// Used to dimension the array used to hold the messages.  The available space
+// will actually be one less than this, so 999.
+#define STORAGE_SIZE_BYTES 1000
+
+// Defines the memory that will actually hold the messages within the message
+// buffer.
+static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ];
+
+// The variable used to hold the message buffer structure.
+StaticMessageBuffer_t xMessageBufferStruct;
+
+void MyFunction( void )
+{
+MessageBufferHandle_t xMessageBuffer;
+
+    xMessageBuffer = xMessageBufferCreateStatic( sizeof( ucBufferStorage ),
+                                                 ucBufferStorage,
+                                                 &xMessageBufferStruct );
+
+    // As neither the pucMessageBufferStorageArea or pxStaticMessageBuffer
+    // parameters were NULL, xMessageBuffer will not be NULL, and can be used to
+    // reference the created message buffer in other message buffer API calls.
+
+    // Other code that uses the message buffer can go here.
+}
+
+
+ * \defgroup xMessageBufferCreateStatic xMessageBufferCreateStatic + * \ingroup MessageBufferManagement + */ +#define xMessageBufferCreateStatic( xBufferSizeBytes, pucMessageBufferStorageArea, pxStaticMessageBuffer ) ( MessageBufferHandle_t ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, 0, pdTRUE, pucMessageBufferStorageArea, pxStaticMessageBuffer ) + +/** + * message_buffer.h + * +
+size_t xMessageBufferSend( MessageBufferHandle_t xMessageBuffer,
+                           const void *pvTxData,
+                           size_t xDataLengthBytes,
+                           TickType_t xTicksToWait );
+
+ *
+ * Sends a discrete message to the message buffer.  The message can be any
+ * length that fits within the buffer's free space, and is copied into the
+ * buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xMessageBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xMessageBufferRead()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xMessageBufferSend() to write to a message buffer from a task.  Use
+ * xMessageBufferSendFromISR() to write to a message buffer from an interrupt
+ * service routine (ISR).
+ *
+ * @param xMessageBuffer The handle of the message buffer to which a message is
+ * being sent.
+ *
+ * @param pvTxData A pointer to the message that is to be copied into the
+ * message buffer.
+ *
+ * @param xDataLengthBytes The length of the message.  That is, the number of
+ * bytes to copy from pvTxData into the message buffer.  When a message is
+ * written to the message buffer an additional sizeof( size_t ) bytes are also
+ * written to store the message's length.  sizeof( size_t ) is typically 4 bytes
+ * on a 32-bit architecture, so on most 32-bit architecture setting
+ * xDataLengthBytes to 20 will reduce the free space in the message buffer by 24
+ * bytes (20 bytes of message data and 4 bytes to hold the message length).
+ *
+ * @param xTicksToWait The maximum amount of time the calling task should remain
+ * in the Blocked state to wait for enough space to become available in the
+ * message buffer, should the message buffer have insufficient space when
+ * xMessageBufferSend() is called.  The calling task will never block if
+ * xTicksToWait is zero.  The block time is specified in tick periods, so the
+ * absolute time it represents is dependent on the tick frequency.  The macro
+ * pdMS_TO_TICKS() can be used to convert a time specified in milliseconds into
+ * a time specified in ticks.  Setting xTicksToWait to portMAX_DELAY will cause
+ * the task to wait indefinitely (without timing out), provided
+ * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h.  Tasks do not use any
+ * CPU time when they are in the Blocked state.
+ *
+ * @return The number of bytes written to the message buffer.  If the call to
+ * xMessageBufferSend() times out before there was enough space to write the
+ * message into the message buffer then zero is returned.  If the call did not
+ * time out then xDataLengthBytes is returned.
+ *
+ * Example use:
+
+void vAFunction( MessageBufferHandle_t xMessageBuffer )
+{
+size_t xBytesSent;
+uint8_t ucArrayToSend[] = { 0, 1, 2, 3 };
+char *pcStringToSend = "String to send";
+const TickType_t x100ms = pdMS_TO_TICKS( 100 );
+
+    // Send an array to the message buffer, blocking for a maximum of 100ms to
+    // wait for enough space to be available in the message buffer.
+    xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms );
+
+    if( xBytesSent != sizeof( ucArrayToSend ) )
+    {
+        // The call to xMessageBufferSend() times out before there was enough
+        // space in the buffer for the data to be written.
+    }
+
+    // Send the string to the message buffer.  Return immediately if there is
+    // not enough space in the buffer.
+    xBytesSent = xMessageBufferSend( xMessageBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 );
+
+    if( xBytesSent != strlen( pcStringToSend ) )
+    {
+        // The string could not be added to the message buffer because there was
+        // not enough free space in the buffer.
+    }
+}
+

+ * \defgroup xMessageBufferSend xMessageBufferSend
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferSend( xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait ) xStreamBufferSend( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, xTicksToWait )
+
+/**
+ * message_buffer.h
+ *
+
+size_t xMessageBufferSendFromISR( MessageBufferHandle_t xMessageBuffer,
+                                  const void *pvTxData,
+                                  size_t xDataLengthBytes,
+                                  BaseType_t *pxHigherPriorityTaskWoken );
+
+ *
+ * Interrupt safe version of the API function that sends a discrete message to
+ * the message buffer.  The message can be any length that fits within the
+ * buffer's free space, and is copied into the buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xMessageBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xMessageBufferRead()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xMessageBufferSend() to write to a message buffer from a task.  Use
+ * xMessageBufferSendFromISR() to write to a message buffer from an interrupt
+ * service routine (ISR).
+ *
+ * @param xMessageBuffer The handle of the message buffer to which a message is
+ * being sent.
+ *
+ * @param pvTxData A pointer to the message that is to be copied into the
+ * message buffer.
+ *
+ * @param xDataLengthBytes The length of the message.  That is, the number of
+ * bytes to copy from pvTxData into the message buffer.  When a message is
+ * written to the message buffer an additional sizeof( size_t ) bytes are also
+ * written to store the message's length.  sizeof( size_t ) is typically 4 bytes
+ * on a 32-bit architecture, so on most 32-bit architecture setting
+ * xDataLengthBytes to 20 will reduce the free space in the message buffer by 24
+ * bytes (20 bytes of message data and 4 bytes to hold the message length).
+ *
+ * @param pxHigherPriorityTaskWoken  It is possible that a message buffer will
+ * have a task blocked on it waiting for data.  Calling
+ * xMessageBufferSendFromISR() can make data available, and so cause a task that
+ * was waiting for data to leave the Blocked state.  If calling
+ * xMessageBufferSendFromISR() causes a task to leave the Blocked state, and the
+ * unblocked task has a priority higher than the currently executing task (the
+ * task that was interrupted), then, internally, xMessageBufferSendFromISR()
+ * will set *pxHigherPriorityTaskWoken to pdTRUE.  If
+ * xMessageBufferSendFromISR() sets this value to pdTRUE, then normally a
+ * context switch should be performed before the interrupt is exited.  This will
+ * ensure that the interrupt returns directly to the highest priority Ready
+ * state task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it
+ * is passed into the function.  See the code example below for an example.
+ *
+ * @return The number of bytes actually written to the message buffer.  If the
+ * message buffer didn't have enough free space for the message to be stored
+ * then 0 is returned, otherwise xDataLengthBytes is returned.
+ *
+ * Example use:
+
+// A message buffer that has already been created.
+MessageBufferHandle_t xMessageBuffer;
+
+void vAnInterruptServiceRoutine( void )
+{
+size_t xBytesSent;
+char *pcStringToSend = "String to send";
+BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE.
+
+    // Attempt to send the string to the message buffer.
+    xBytesSent = xMessageBufferSendFromISR( xMessageBuffer,
+                                            ( void * ) pcStringToSend,
+                                            strlen( pcStringToSend ),
+                                            &xHigherPriorityTaskWoken );
+
+    if( xBytesSent != strlen( pcStringToSend ) )
+    {
+        // The string could not be added to the message buffer because there was
+        // not enough free space in the buffer.
+    }
+
+    // If xHigherPriorityTaskWoken was set to pdTRUE inside
+    // xMessageBufferSendFromISR() then a task that has a priority above the
+    // priority of the currently executing task was unblocked and a context
+    // switch should be performed to ensure the ISR returns to the unblocked
+    // task.  In most FreeRTOS ports this is done by simply passing
+    // xHigherPriorityTaskWoken into portYIELD_FROM_ISR(), which will test the
+    // variables value, and perform the context switch if necessary.  Check the
+    // documentation for the port in use for port specific instructions.
+    portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+}
+

+ * \defgroup xMessageBufferSendFromISR xMessageBufferSendFromISR
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferSendFromISR( xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken ) xStreamBufferSendFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvTxData, xDataLengthBytes, pxHigherPriorityTaskWoken )
+
+/**
+ * message_buffer.h
+ *
+
+size_t xMessageBufferReceive( MessageBufferHandle_t xMessageBuffer,
+                              void *pvRxData,
+                              size_t xBufferLengthBytes,
+                              TickType_t xTicksToWait );
+

+ *
+ * Receives a discrete message from a message buffer.  Messages can be of
+ * variable length and are copied out of the buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xMessageBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xMessageBufferRead()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xMessageBufferReceive() to read from a message buffer from a task.  Use
+ * xMessageBufferReceiveFromISR() to read from a message buffer from an
+ * interrupt service routine (ISR).
+ *
+ * @param xMessageBuffer The handle of the message buffer from which a message
+ * is being received.
+ *
+ * @param pvRxData A pointer to the buffer into which the received message is
+ * to be copied.
+ *
+ * @param xBufferLengthBytes The length of the buffer pointed to by the pvRxData
+ * parameter.  This sets the maximum length of the message that can be received.
+ * If xBufferLengthBytes is too small to hold the next message then the message
+ * will be left in the message buffer and 0 will be returned.
+ *
+ * @param xTicksToWait The maximum amount of time the task should remain in the
+ * Blocked state to wait for a message, should the message buffer be empty.
+ * xMessageBufferReceive() will return immediately if xTicksToWait is zero and
+ * the message buffer is empty.  The block time is specified in tick periods, so
+ * the absolute time it represents is dependent on the tick frequency.  The
+ * macro pdMS_TO_TICKS() can be used to convert a time specified in milliseconds
+ * into a time specified in ticks.  Setting xTicksToWait to portMAX_DELAY will
+ * cause the task to wait indefinitely (without timing out), provided
+ * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h.  Tasks do not use any
+ * CPU time when they are in the Blocked state.
+ *
+ * @return The length, in bytes, of the message read from the message buffer, if
+ * any.  If xMessageBufferReceive() times out before a message became available
+ * then zero is returned.  If the length of the message is greater than
+ * xBufferLengthBytes then the message will be left in the message buffer and
+ * zero is returned.
+ *
+ * Example use:
+
+void vAFunction( MessageBuffer_t xMessageBuffer )
+{
+uint8_t ucRxData[ 20 ];
+size_t xReceivedBytes;
+const TickType_t xBlockTime = pdMS_TO_TICKS( 20 );
+
+    // Receive the next message from the message buffer.  Wait in the Blocked
+    // state (so not using any CPU processing time) for a maximum of 100ms for
+    // a message to become available.
+    xReceivedBytes = xMessageBufferReceive( xMessageBuffer,
+                                            ( void * ) ucRxData,
+                                            sizeof( ucRxData ),
+                                            xBlockTime );
+
+    if( xReceivedBytes > 0 )
+    {
+        // A ucRxData contains a message that is xReceivedBytes long.  Process
+        // the message here....
+    }
+}
+

+ * \defgroup xMessageBufferReceive xMessageBufferReceive
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferReceive( xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait ) xStreamBufferReceive( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, xTicksToWait )
+
+
+/**
+ * message_buffer.h
+ *
+
+size_t xMessageBufferReceiveFromISR( MessageBufferHandle_t xMessageBuffer,
+                                     void *pvRxData,
+                                     size_t xBufferLengthBytes,
+                                     BaseType_t *pxHigherPriorityTaskWoken );
+

+ *
+ * An interrupt safe version of the API function that receives a discrete
+ * message from a message buffer.  Messages can be of variable length and are
+ * copied out of the buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xMessageBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xMessageBufferRead()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xMessageBufferReceive() to read from a message buffer from a task.  Use
+ * xMessageBufferReceiveFromISR() to read from a message buffer from an
+ * interrupt service routine (ISR).
+ *
+ * @param xMessageBuffer The handle of the message buffer from which a message
+ * is being received.
+ *
+ * @param pvRxData A pointer to the buffer into which the received message is
+ * to be copied.
+ *
+ * @param xBufferLengthBytes The length of the buffer pointed to by the pvRxData
+ * parameter.  This sets the maximum length of the message that can be received.
+ * If xBufferLengthBytes is too small to hold the next message then the message
+ * will be left in the message buffer and 0 will be returned.
+ *
+ * @param pxHigherPriorityTaskWoken  It is possible that a message buffer will
+ * have a task blocked on it waiting for space to become available.  Calling
+ * xMessageBufferReceiveFromISR() can make space available, and so cause a task
+ * that is waiting for space to leave the Blocked state.  If calling
+ * xMessageBufferReceiveFromISR() causes a task to leave the Blocked state, and
+ * the unblocked task has a priority higher than the currently executing task
+ * (the task that was interrupted), then, internally,
+ * xMessageBufferReceiveFromISR() will set *pxHigherPriorityTaskWoken to pdTRUE.
+ * If xMessageBufferReceiveFromISR() sets this value to pdTRUE, then normally a
+ * context switch should be performed before the interrupt is exited.  That will
+ * ensure the interrupt returns directly to the highest priority Ready state
+ * task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it is
+ * passed into the function.  See the code example below for an example.
+ *
+ * @return The length, in bytes, of the message read from the message buffer, if
+ * any.
+ *
+ * Example use:
+
+// A message buffer that has already been created.
+MessageBuffer_t xMessageBuffer;
+
+void vAnInterruptServiceRoutine( void )
+{
+uint8_t ucRxData[ 20 ];
+size_t xReceivedBytes;
+BaseType_t xHigherPriorityTaskWoken = pdFALSE;  // Initialised to pdFALSE.
+
+    // Receive the next message from the message buffer.
+    xReceivedBytes = xMessageBufferReceiveFromISR( xMessageBuffer,
+                                                  ( void * ) ucRxData,
+                                                  sizeof( ucRxData ),
+                                                  &xHigherPriorityTaskWoken );
+
+    if( xReceivedBytes > 0 )
+    {
+        // A ucRxData contains a message that is xReceivedBytes long.  Process
+        // the message here....
+    }
+
+    // If xHigherPriorityTaskWoken was set to pdTRUE inside
+    // xMessageBufferReceiveFromISR() then a task that has a priority above the
+    // priority of the currently executing task was unblocked and a context
+    // switch should be performed to ensure the ISR returns to the unblocked
+    // task.  In most FreeRTOS ports this is done by simply passing
+    // xHigherPriorityTaskWoken into portYIELD_FROM_ISR(), which will test the
+    // variables value, and perform the context switch if necessary.  Check the
+    // documentation for the port in use for port specific instructions.
+    portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+}
+

+ * \defgroup xMessageBufferReceiveFromISR xMessageBufferReceiveFromISR
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferReceiveFromISR( xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken ) xStreamBufferReceiveFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pvRxData, xBufferLengthBytes, pxHigherPriorityTaskWoken )
+
+/**
+ * message_buffer.h
+ *
+
+void vMessageBufferDelete( MessageBufferHandle_t xMessageBuffer );
+

+ *
+ * Deletes a message buffer that was previously created using a call to
+ * xMessageBufferCreate() or xMessageBufferCreateStatic().  If the message
+ * buffer was created using dynamic memory (that is, by xMessageBufferCreate()),
+ * then the allocated memory is freed.
+ *
+ * A message buffer handle must not be used after the message buffer has been
+ * deleted.
+ *
+ * @param xMessageBuffer The handle of the message buffer to be deleted.
+ *
+ */
+#define vMessageBufferDelete( xMessageBuffer ) vStreamBufferDelete( ( StreamBufferHandle_t ) xMessageBuffer )
+
+/**
+ * message_buffer.h
+
+BaseType_t xMessageBufferIsFull( MessageBufferHandle_t xMessageBuffer ) );
+

+ *
+ * Tests to see if a message buffer is full.  A message buffer is full if it
+ * cannot accept any more messages, of any size, until space is made available
+ * by a message being removed from the message buffer.
+ *
+ * @param xMessageBuffer The handle of the message buffer being queried.
+ *
+ * @return If the message buffer referenced by xMessageBuffer is full then
+ * pdTRUE is returned.  Otherwise pdFALSE is returned.
+ */
+#define xMessageBufferIsFull( xMessageBuffer ) xStreamBufferIsFull( ( StreamBufferHandle_t ) xMessageBuffer )
+
+/**
+ * message_buffer.h
+
+BaseType_t xMessageBufferIsEmpty( MessageBufferHandle_t xMessageBuffer ) );
+

+ *
+ * Tests to see if a message buffer is empty (does not contain any messages).
+ *
+ * @param xMessageBuffer The handle of the message buffer being queried.
+ *
+ * @return If the message buffer referenced by xMessageBuffer is empty then
+ * pdTRUE is returned.  Otherwise pdFALSE is returned.
+ *
+ */
+#define xMessageBufferIsEmpty( xMessageBuffer ) xStreamBufferIsEmpty( ( StreamBufferHandle_t ) xMessageBuffer )
+
+/**
+ * message_buffer.h
+
+BaseType_t xMessageBufferReset( MessageBufferHandle_t xMessageBuffer );
+

+ *
+ * Resets a message buffer to its initial empty state, discarding any message it
+ * contained.
+ *
+ * A message buffer can only be reset if there are no tasks blocked on it.
+ *
+ * @param xMessageBuffer The handle of the message buffer being reset.
+ *
+ * @return If the message buffer was reset then pdPASS is returned.  If the
+ * message buffer could not be reset because either there was a task blocked on
+ * the message queue to wait for space to become available, or to wait for a
+ * a message to be available, then pdFAIL is returned.
+ *
+ * \defgroup xMessageBufferReset xMessageBufferReset
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferReset( xMessageBuffer ) xStreamBufferReset( ( StreamBufferHandle_t ) xMessageBuffer )
+
+
+/**
+ * message_buffer.h
+
+size_t xMessageBufferSpaceAvailable( MessageBufferHandle_t xMessageBuffer ) );
+

+ * Returns the number of bytes of free space in the message buffer.
+ *
+ * @param xMessageBuffer The handle of the message buffer being queried.
+ *
+ * @return The number of bytes that can be written to the message buffer before
+ * the message buffer would be full.  When a message is written to the message
+ * buffer an additional sizeof( size_t ) bytes are also written to store the
+ * message's length.  sizeof( size_t ) is typically 4 bytes on a 32-bit
+ * architecture, so if xMessageBufferSpacesAvailable() returns 10, then the size
+ * of the largest message that can be written to the message buffer is 6 bytes.
+ *
+ * \defgroup xMessageBufferSpaceAvailable xMessageBufferSpaceAvailable
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferSpaceAvailable( xMessageBuffer ) xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer )
+#define xMessageBufferSpacesAvailable( xMessageBuffer ) xStreamBufferSpacesAvailable( ( StreamBufferHandle_t ) xMessageBuffer ) /* Corrects typo in original macro name. */
+
+/**
+ * message_buffer.h
+ 
+ size_t xMessageBufferNextLengthBytes( MessageBufferHandle_t xMessageBuffer ) );
+ 

+ * Returns the length (in bytes) of the next message in a message buffer.
+ * Useful if xMessageBufferReceive() returned 0 because the size of the buffer
+ * passed into xMessageBufferReceive() was too small to hold the next message.
+ *
+ * @param xMessageBuffer The handle of the message buffer being queried.
+ *
+ * @return The length (in bytes) of the next message in the message buffer, or 0
+ * if the message buffer is empty.
+ *
+ * \defgroup xMessageBufferNextLengthBytes xMessageBufferNextLengthBytes
+ * \ingroup MessageBufferManagement
+ */
+#define xMessageBufferNextLengthBytes( xMessageBuffer ) xStreamBufferNextMessageLengthBytes( ( StreamBufferHandle_t ) xMessageBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * message_buffer.h
+ *
+
+BaseType_t xMessageBufferSendCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
+

+ *
+ * For advanced users only.
+ *
+ * The sbSEND_COMPLETED() macro is called from within the FreeRTOS APIs when
+ * data is sent to a message buffer or stream buffer.  If there was a task that
+ * was blocked on the message or stream buffer waiting for data to arrive then
+ * the sbSEND_COMPLETED() macro sends a notification to the task to remove it
+ * from the Blocked state.  xMessageBufferSendCompletedFromISR() does the same
+ * thing.  It is provided to enable application writers to implement their own
+ * version of sbSEND_COMPLETED(), and MUST NOT BE USED AT ANY OTHER TIME.
+ *
+ * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
+ * additional information.
+ *
+ * @param xStreamBuffer The handle of the stream buffer to which data was
+ * written.
+ *
+ * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be
+ * initialised to pdFALSE before it is passed into
+ * xMessageBufferSendCompletedFromISR().  If calling
+ * xMessageBufferSendCompletedFromISR() removes a task from the Blocked state,
+ * and the task has a priority above the priority of the currently running task,
+ * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a
+ * context switch should be performed before exiting the ISR.
+ *
+ * @return If a task was removed from the Blocked state then pdTRUE is returned.
+ * Otherwise pdFALSE is returned.
+ *
+ * \defgroup xMessageBufferSendCompletedFromISR xMessageBufferSendCompletedFromISR
+ * \ingroup StreamBufferManagement
+ */
+#define xMessageBufferSendCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) xStreamBufferSendCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
+
+/**
+ * message_buffer.h
+ *
+
+BaseType_t xMessageBufferReceiveCompletedFromISR( MessageBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
+

+ *
+ * For advanced users only.
+ *
+ * The sbRECEIVE_COMPLETED() macro is called from within the FreeRTOS APIs when
+ * data is read out of a message buffer or stream buffer.  If there was a task
+ * that was blocked on the message or stream buffer waiting for data to arrive
+ * then the sbRECEIVE_COMPLETED() macro sends a notification to the task to
+ * remove it from the Blocked state.  xMessageBufferReceiveCompletedFromISR()
+ * does the same thing.  It is provided to enable application writers to
+ * implement their own version of sbRECEIVE_COMPLETED(), and MUST NOT BE USED AT
+ * ANY OTHER TIME.
+ *
+ * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
+ * additional information.
+ *
+ * @param xStreamBuffer The handle of the stream buffer from which data was
+ * read.
+ *
+ * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be
+ * initialised to pdFALSE before it is passed into
+ * xMessageBufferReceiveCompletedFromISR().  If calling
+ * xMessageBufferReceiveCompletedFromISR() removes a task from the Blocked state,
+ * and the task has a priority above the priority of the currently running task,
+ * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a
+ * context switch should be performed before exiting the ISR.
+ *
+ * @return If a task was removed from the Blocked state then pdTRUE is returned.
+ * Otherwise pdFALSE is returned.
+ *
+ * \defgroup xMessageBufferReceiveCompletedFromISR xMessageBufferReceiveCompletedFromISR
+ * \ingroup StreamBufferManagement
+ */
+#define xMessageBufferReceiveCompletedFromISR( xMessageBuffer, pxHigherPriorityTaskWoken ) xStreamBufferReceiveCompletedFromISR( ( StreamBufferHandle_t ) xMessageBuffer, pxHigherPriorityTaskWoken )
+
+#if defined( __cplusplus )
+} /* extern "C" */
+#endif
+
+#endif	/* !defined( FREERTOS_MESSAGE_BUFFER_H ) */
diff --git a/components/freertos/include/mpu_prototypes.h b/components/freertos/include/mpu_prototypes.h
new file mode 100644
index 00000000..d5a199e6
--- /dev/null
+++ b/components/freertos/include/mpu_prototypes.h
@@ -0,0 +1,158 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/*
+ * When the MPU is used the standard (non MPU) API functions are mapped to
+ * equivalents that start "MPU_", the prototypes for which are defined in this
+ * header files.  This will cause the application code to call the MPU_ version
+ * which wraps the non-MPU version with privilege promoting then demoting code,
+ * so the kernel code always runs will full privileges.
+ */
+
+
+#ifndef MPU_PROTOTYPES_H
+#define MPU_PROTOTYPES_H
+
+/* MPU versions of tasks.h API functions. */
+BaseType_t MPU_xTaskCreate( TaskFunction_t pxTaskCode, const char * const pcName, const uint16_t usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTaskCreateStatic( TaskFunction_t pxTaskCode, const char * const pcName, const uint32_t ulStackDepth, void * const pvParameters, UBaseType_t uxPriority, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskDelete( TaskHandle_t xTaskToDelete ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskDelay( const TickType_t xTicksToDelay ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskAbortDelay( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxTaskPriorityGet( const TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+eTaskState MPU_eTaskGetState( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSuspend( TaskHandle_t xTaskToSuspend ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskResume( TaskHandle_t xTaskToResume ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskStartScheduler( void ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSuspendAll( void ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskResumeAll( void ) FREERTOS_SYSTEM_CALL;
+TickType_t MPU_xTaskGetTickCount( void ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxTaskGetNumberOfTasks( void ) FREERTOS_SYSTEM_CALL;
+char * MPU_pcTaskGetName( TaskHandle_t xTaskToQuery ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTaskGetHandle( const char *pcNameToQuery ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+configSTACK_DEPTH_TYPE MPU_uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction ) FREERTOS_SYSTEM_CALL;
+TaskHookFunction_t MPU_xTaskGetApplicationTaskTag( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue ) FREERTOS_SYSTEM_CALL;
+void * MPU_pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTaskGetIdleTaskHandle( void ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime ) FREERTOS_SYSTEM_CALL;
+uint32_t MPU_ulTaskGetIdleRunTimeCounter( void ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskList( char * pcWriteBuffer ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskGetRunTimeStats( char *pcWriteBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+uint32_t MPU_ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskNotifyStateClear( TaskHandle_t xTask ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskIncrementTick( void ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTaskGetCurrentTaskHandle( void ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) FREERTOS_SYSTEM_CALL;
+void MPU_vTaskMissedYield( void ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskGetSchedulerState( void ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) FREERTOS_SYSTEM_CALL;
+
+/* MPU versions of queue.h API functions. */
+BaseType_t MPU_xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueuePeek( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxQueueMessagesWaiting( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxQueueSpacesAvailable( const QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+void MPU_vQueueDelete( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueCreateMutex( const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xQueueGetMutexHolder( QueueHandle_t xSemaphore ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueGiveMutexRecursive( QueueHandle_t pxMutex ) FREERTOS_SYSTEM_CALL;
+void MPU_vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcName ) FREERTOS_SYSTEM_CALL;
+void MPU_vQueueUnregisterQueue( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+const char * MPU_pcQueueGetName( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
+QueueHandle_t MPU_xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) FREERTOS_SYSTEM_CALL;
+QueueSetHandle_t MPU_xQueueCreateSet( const UBaseType_t uxEventQueueLength ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) FREERTOS_SYSTEM_CALL;
+QueueSetMemberHandle_t MPU_xQueueSelectFromSet( QueueSetHandle_t xQueueSet, const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue ) FREERTOS_SYSTEM_CALL;
+void MPU_vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxQueueGetQueueNumber( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+uint8_t MPU_ucQueueGetQueueType( QueueHandle_t xQueue ) FREERTOS_SYSTEM_CALL;
+
+/* MPU versions of timers.h API functions. */
+TimerHandle_t MPU_xTimerCreate( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction ) FREERTOS_SYSTEM_CALL;
+TimerHandle_t MPU_xTimerCreateStatic( const char * const pcTimerName, const TickType_t xTimerPeriodInTicks, const UBaseType_t uxAutoReload, void * const pvTimerID, TimerCallbackFunction_t pxCallbackFunction, StaticTimer_t *pxTimerBuffer ) FREERTOS_SYSTEM_CALL;
+void * MPU_pvTimerGetTimerID( const TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+void MPU_vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTimerIsTimerActive( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+TaskHandle_t MPU_xTimerGetTimerDaemonTaskHandle( void ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+const char * MPU_pcTimerGetName( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+void MPU_vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload ) FREERTOS_SYSTEM_CALL;
+TickType_t MPU_xTimerGetPeriod( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+TickType_t MPU_xTimerGetExpiryTime( TimerHandle_t xTimer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTimerCreateTimerTask( void ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+
+/* MPU versions of event_group.h API functions. */
+EventGroupHandle_t MPU_xEventGroupCreate( void ) FREERTOS_SYSTEM_CALL;
+EventGroupHandle_t MPU_xEventGroupCreateStatic( StaticEventGroup_t *pxEventGroupBuffer ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupWaitBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToWaitFor, const BaseType_t xClearOnExit, const BaseType_t xWaitForAllBits, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupClearBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToClear ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupSetBits( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet ) FREERTOS_SYSTEM_CALL;
+EventBits_t MPU_xEventGroupSync( EventGroupHandle_t xEventGroup, const EventBits_t uxBitsToSet, const EventBits_t uxBitsToWaitFor, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+void MPU_vEventGroupDelete( EventGroupHandle_t xEventGroup ) FREERTOS_SYSTEM_CALL;
+UBaseType_t MPU_uxEventGroupGetNumber( void* xEventGroup ) FREERTOS_SYSTEM_CALL;
+
+/* MPU versions of message/stream_buffer.h API functions. */
+size_t MPU_xStreamBufferSend( StreamBufferHandle_t xStreamBuffer, const void *pvTxData, size_t xDataLengthBytes, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+size_t MPU_xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer, void *pvRxData, size_t xBufferLengthBytes, TickType_t xTicksToWait ) FREERTOS_SYSTEM_CALL;
+size_t MPU_xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+void MPU_vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+size_t MPU_xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+size_t MPU_xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) FREERTOS_SYSTEM_CALL;
+BaseType_t MPU_xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ) FREERTOS_SYSTEM_CALL;
+StreamBufferHandle_t MPU_xStreamBufferGenericCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer ) FREERTOS_SYSTEM_CALL;
+StreamBufferHandle_t MPU_xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer, uint8_t * const pucStreamBufferStorageArea, StaticStreamBuffer_t * const pxStaticStreamBuffer ) FREERTOS_SYSTEM_CALL;
+
+
+
+#endif /* MPU_PROTOTYPES_H */
+
diff --git a/components/freertos/include/mpu_wrappers.h b/components/freertos/include/mpu_wrappers.h
new file mode 100644
index 00000000..8a03de10
--- /dev/null
+++ b/components/freertos/include/mpu_wrappers.h
@@ -0,0 +1,187 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef MPU_WRAPPERS_H
+#define MPU_WRAPPERS_H
+
+/* This file redefines API functions to be called through a wrapper macro, but
+only for ports that are using the MPU. */
+#ifdef portUSING_MPU_WRAPPERS
+
+	/* MPU_WRAPPERS_INCLUDED_FROM_API_FILE will be defined when this file is
+	included from queue.c or task.c to prevent it from having an effect within
+	those files. */
+	#ifndef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+		/*
+		 * Map standard (non MPU) API functions to equivalents that start
+		 * "MPU_".  This will cause the application code to call the MPU_
+		 * version, which wraps the non-MPU version with privilege promoting
+		 * then demoting code, so the kernel code always runs will full
+		 * privileges.
+		 */
+
+		/* Map standard tasks.h API functions to the MPU equivalents. */
+		#define xTaskCreate								MPU_xTaskCreate
+		#define xTaskCreateStatic						MPU_xTaskCreateStatic
+		#define xTaskCreateRestricted					MPU_xTaskCreateRestricted
+		#define vTaskAllocateMPURegions					MPU_vTaskAllocateMPURegions
+		#define vTaskDelete								MPU_vTaskDelete
+		#define vTaskDelay								MPU_vTaskDelay
+		#define vTaskDelayUntil							MPU_vTaskDelayUntil
+		#define xTaskAbortDelay							MPU_xTaskAbortDelay
+		#define uxTaskPriorityGet						MPU_uxTaskPriorityGet
+		#define eTaskGetState							MPU_eTaskGetState
+		#define vTaskGetInfo							MPU_vTaskGetInfo
+		#define vTaskPrioritySet						MPU_vTaskPrioritySet
+		#define vTaskSuspend							MPU_vTaskSuspend
+		#define vTaskResume								MPU_vTaskResume
+		#define vTaskSuspendAll							MPU_vTaskSuspendAll
+		#define xTaskResumeAll							MPU_xTaskResumeAll
+		#define xTaskGetTickCount						MPU_xTaskGetTickCount
+		#define uxTaskGetNumberOfTasks					MPU_uxTaskGetNumberOfTasks
+		#define pcTaskGetName							MPU_pcTaskGetName
+		#define xTaskGetHandle							MPU_xTaskGetHandle
+		#define uxTaskGetStackHighWaterMark				MPU_uxTaskGetStackHighWaterMark
+		#define uxTaskGetStackHighWaterMark2			MPU_uxTaskGetStackHighWaterMark2
+		#define vTaskSetApplicationTaskTag				MPU_vTaskSetApplicationTaskTag
+		#define xTaskGetApplicationTaskTag				MPU_xTaskGetApplicationTaskTag
+		#define vTaskSetThreadLocalStoragePointer		MPU_vTaskSetThreadLocalStoragePointer
+		#define pvTaskGetThreadLocalStoragePointer		MPU_pvTaskGetThreadLocalStoragePointer
+		#define xTaskCallApplicationTaskHook			MPU_xTaskCallApplicationTaskHook
+		#define xTaskGetIdleTaskHandle					MPU_xTaskGetIdleTaskHandle
+		#define uxTaskGetSystemState					MPU_uxTaskGetSystemState
+		#define vTaskList								MPU_vTaskList
+		#define vTaskGetRunTimeStats					MPU_vTaskGetRunTimeStats
+		#define ulTaskGetIdleRunTimeCounter				MPU_ulTaskGetIdleRunTimeCounter
+		#define xTaskGenericNotify						MPU_xTaskGenericNotify
+		#define xTaskNotifyWait							MPU_xTaskNotifyWait
+		#define ulTaskNotifyTake						MPU_ulTaskNotifyTake
+		#define xTaskNotifyStateClear					MPU_xTaskNotifyStateClear
+		#define xTaskCatchUpTicks						MPU_xTaskCatchUpTicks
+
+		#define xTaskGetCurrentTaskHandle				MPU_xTaskGetCurrentTaskHandle
+		#define vTaskSetTimeOutState					MPU_vTaskSetTimeOutState
+		#define xTaskCheckForTimeOut					MPU_xTaskCheckForTimeOut
+		#define xTaskGetSchedulerState					MPU_xTaskGetSchedulerState
+
+		/* Map standard queue.h API functions to the MPU equivalents. */
+		#define xQueueGenericSend						MPU_xQueueGenericSend
+		#define xQueueReceive							MPU_xQueueReceive
+		#define xQueuePeek								MPU_xQueuePeek
+		#define xQueueSemaphoreTake						MPU_xQueueSemaphoreTake
+		#define uxQueueMessagesWaiting					MPU_uxQueueMessagesWaiting
+		#define uxQueueSpacesAvailable					MPU_uxQueueSpacesAvailable
+		#define vQueueDelete							MPU_vQueueDelete
+		#define xQueueCreateMutex						MPU_xQueueCreateMutex
+		#define xQueueCreateMutexStatic					MPU_xQueueCreateMutexStatic
+		#define xQueueCreateCountingSemaphore			MPU_xQueueCreateCountingSemaphore
+		#define xQueueCreateCountingSemaphoreStatic		MPU_xQueueCreateCountingSemaphoreStatic
+		#define xQueueGetMutexHolder					MPU_xQueueGetMutexHolder
+		#define xQueueTakeMutexRecursive				MPU_xQueueTakeMutexRecursive
+		#define xQueueGiveMutexRecursive				MPU_xQueueGiveMutexRecursive
+		#define xQueueGenericCreate						MPU_xQueueGenericCreate
+		#define xQueueGenericCreateStatic				MPU_xQueueGenericCreateStatic
+		#define xQueueCreateSet							MPU_xQueueCreateSet
+		#define xQueueAddToSet							MPU_xQueueAddToSet
+		#define xQueueRemoveFromSet						MPU_xQueueRemoveFromSet
+		#define xQueueSelectFromSet						MPU_xQueueSelectFromSet
+		#define xQueueGenericReset						MPU_xQueueGenericReset
+
+		#if( configQUEUE_REGISTRY_SIZE > 0 )
+			#define vQueueAddToRegistry						MPU_vQueueAddToRegistry
+			#define vQueueUnregisterQueue					MPU_vQueueUnregisterQueue
+			#define pcQueueGetName							MPU_pcQueueGetName
+		#endif
+
+		/* Map standard timer.h API functions to the MPU equivalents. */
+		#define xTimerCreate							MPU_xTimerCreate
+		#define xTimerCreateStatic						MPU_xTimerCreateStatic
+		#define pvTimerGetTimerID						MPU_pvTimerGetTimerID
+		#define vTimerSetTimerID						MPU_vTimerSetTimerID
+		#define xTimerIsTimerActive						MPU_xTimerIsTimerActive
+		#define xTimerGetTimerDaemonTaskHandle			MPU_xTimerGetTimerDaemonTaskHandle
+		#define xTimerPendFunctionCall					MPU_xTimerPendFunctionCall
+		#define pcTimerGetName							MPU_pcTimerGetName
+		#define vTimerSetReloadMode						MPU_vTimerSetReloadMode
+		#define xTimerGetPeriod							MPU_xTimerGetPeriod
+		#define xTimerGetExpiryTime						MPU_xTimerGetExpiryTime
+		#define xTimerGenericCommand					MPU_xTimerGenericCommand
+
+		/* Map standard event_group.h API functions to the MPU equivalents. */
+		#define xEventGroupCreate						MPU_xEventGroupCreate
+		#define xEventGroupCreateStatic					MPU_xEventGroupCreateStatic
+		#define xEventGroupWaitBits						MPU_xEventGroupWaitBits
+		#define xEventGroupClearBits					MPU_xEventGroupClearBits
+		#define xEventGroupSetBits						MPU_xEventGroupSetBits
+		#define xEventGroupSync							MPU_xEventGroupSync
+		#define vEventGroupDelete						MPU_vEventGroupDelete
+
+		/* Map standard message/stream_buffer.h API functions to the MPU
+		equivalents. */
+		#define xStreamBufferSend						MPU_xStreamBufferSend
+		#define xStreamBufferReceive					MPU_xStreamBufferReceive
+		#define xStreamBufferNextMessageLengthBytes		MPU_xStreamBufferNextMessageLengthBytes
+		#define vStreamBufferDelete						MPU_vStreamBufferDelete
+		#define xStreamBufferIsFull						MPU_xStreamBufferIsFull
+		#define xStreamBufferIsEmpty					MPU_xStreamBufferIsEmpty
+		#define xStreamBufferReset						MPU_xStreamBufferReset
+		#define xStreamBufferSpacesAvailable			MPU_xStreamBufferSpacesAvailable
+		#define xStreamBufferBytesAvailable				MPU_xStreamBufferBytesAvailable
+		#define xStreamBufferSetTriggerLevel			MPU_xStreamBufferSetTriggerLevel
+		#define xStreamBufferGenericCreate				MPU_xStreamBufferGenericCreate
+		#define xStreamBufferGenericCreateStatic		MPU_xStreamBufferGenericCreateStatic
+
+
+		/* Remove the privileged function macro, but keep the PRIVILEGED_DATA
+		macro so applications can place data in privileged access sections
+		(useful when using statically allocated objects). */
+		#define PRIVILEGED_FUNCTION
+		#define PRIVILEGED_DATA __attribute__((section("privileged_data")))
+		#define FREERTOS_SYSTEM_CALL
+
+	#else /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
+
+		/* Ensure API functions go in the privileged execution section. */
+		#define PRIVILEGED_FUNCTION __attribute__((section("privileged_functions")))
+		#define PRIVILEGED_DATA __attribute__((section("privileged_data")))
+		#define FREERTOS_SYSTEM_CALL __attribute__((section( "freertos_system_calls")))
+
+	#endif /* MPU_WRAPPERS_INCLUDED_FROM_API_FILE */
+
+#else /* portUSING_MPU_WRAPPERS */
+
+	#define PRIVILEGED_FUNCTION
+	#define PRIVILEGED_DATA
+	#define FREERTOS_SYSTEM_CALL
+	#define portUSING_MPU_WRAPPERS 0
+
+#endif /* portUSING_MPU_WRAPPERS */
+
+
+#endif /* MPU_WRAPPERS_H */
+
diff --git a/components/freertos/include/portable.h b/components/freertos/include/portable.h
new file mode 100644
index 00000000..dea03aaa
--- /dev/null
+++ b/components/freertos/include/portable.h
@@ -0,0 +1,199 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/*-----------------------------------------------------------
+ * Portable layer API.  Each function must be defined for each port.
+ *----------------------------------------------------------*/
+
+#ifndef PORTABLE_H
+#define PORTABLE_H
+
+/* Each FreeRTOS port has a unique portmacro.h header file.  Originally a
+pre-processor definition was used to ensure the pre-processor found the correct
+portmacro.h file for the port being used.  That scheme was deprecated in favour
+of setting the compiler's include path such that it found the correct
+portmacro.h file - removing the need for the constant and allowing the
+portmacro.h file to be located anywhere in relation to the port being used.
+Purely for reasons of backward compatibility the old method is still valid, but
+to make it clear that new projects should not use it, support for the port
+specific constants has been moved into the deprecated_definitions.h header
+file. */
+#include "deprecated_definitions.h"
+
+/* If portENTER_CRITICAL is not defined then including deprecated_definitions.h
+did not result in a portmacro.h header file being included - and it should be
+included here.  In this case the path to the correct portmacro.h header file
+must be set in the compiler's include path. */
+#ifndef portENTER_CRITICAL
+	#include "portmacro.h"
+#endif
+
+#if portBYTE_ALIGNMENT == 32
+	#define portBYTE_ALIGNMENT_MASK ( 0x001f )
+#endif
+
+#if portBYTE_ALIGNMENT == 16
+	#define portBYTE_ALIGNMENT_MASK ( 0x000f )
+#endif
+
+#if portBYTE_ALIGNMENT == 8
+	#define portBYTE_ALIGNMENT_MASK ( 0x0007 )
+#endif
+
+#if portBYTE_ALIGNMENT == 4
+	#define portBYTE_ALIGNMENT_MASK	( 0x0003 )
+#endif
+
+#if portBYTE_ALIGNMENT == 2
+	#define portBYTE_ALIGNMENT_MASK	( 0x0001 )
+#endif
+
+#if portBYTE_ALIGNMENT == 1
+	#define portBYTE_ALIGNMENT_MASK	( 0x0000 )
+#endif
+
+#ifndef portBYTE_ALIGNMENT_MASK
+	#error "Invalid portBYTE_ALIGNMENT definition"
+#endif
+
+#ifndef portNUM_CONFIGURABLE_REGIONS
+	#define portNUM_CONFIGURABLE_REGIONS 1
+#endif
+
+#ifndef portHAS_STACK_OVERFLOW_CHECKING
+	#define portHAS_STACK_OVERFLOW_CHECKING 0
+#endif
+
+#ifndef portARCH_NAME
+	#define portARCH_NAME NULL
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mpu_wrappers.h"
+
+/*
+ * Setup the stack of a new task so it is ready to be placed under the
+ * scheduler control.  The registers have to be placed on the stack in
+ * the order that the port expects to find them.
+ *
+ */
+#if( portUSING_MPU_WRAPPERS == 1 )
+	#if( portHAS_STACK_OVERFLOW_CHECKING == 1 )
+		StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
+	#else
+		StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters, BaseType_t xRunPrivileged ) PRIVILEGED_FUNCTION;
+	#endif
+#else
+	#if( portHAS_STACK_OVERFLOW_CHECKING == 1 )
+		StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, StackType_t *pxEndOfStack, TaskFunction_t pxCode, void *pvParameters ) PRIVILEGED_FUNCTION;
+	#else
+		StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) PRIVILEGED_FUNCTION;
+	#endif
+#endif
+
+/* Used by heap_5.c to define the start address and size of each memory region
+that together comprise the total FreeRTOS heap space. */
+typedef struct HeapRegion
+{
+	uint8_t *pucStartAddress;
+	size_t xSizeInBytes;
+} HeapRegion_t;
+
+/* Used to pass information about the heap out of vPortGetHeapStats(). */
+typedef struct xHeapStats
+{
+	size_t xAvailableHeapSpaceInBytes;		/* The total heap size currently available - this is the sum of all the free blocks, not the largest block that can be allocated. */
+	size_t xSizeOfLargestFreeBlockInBytes; 	/* The maximum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
+	size_t xSizeOfSmallestFreeBlockInBytes; /* The minimum size, in bytes, of all the free blocks within the heap at the time vPortGetHeapStats() is called. */
+	size_t xNumberOfFreeBlocks;				/* The number of free memory blocks within the heap at the time vPortGetHeapStats() is called. */
+	size_t xMinimumEverFreeBytesRemaining;	/* The minimum amount of total free memory (sum of all free blocks) there has been in the heap since the system booted. */
+	size_t xNumberOfSuccessfulAllocations;	/* The number of calls to pvPortMalloc() that have returned a valid memory block. */
+	size_t xNumberOfSuccessfulFrees;		/* The number of calls to vPortFree() that has successfully freed a block of memory. */
+} HeapStats_t;
+
+/*
+ * Used to define multiple heap regions for use by heap_5.c.  This function
+ * must be called before any calls to pvPortMalloc() - not creating a task,
+ * queue, semaphore, mutex, software timer, event group, etc. will result in
+ * pvPortMalloc being called.
+ *
+ * pxHeapRegions passes in an array of HeapRegion_t structures - each of which
+ * defines a region of memory that can be used as the heap.  The array is
+ * terminated by a HeapRegions_t structure that has a size of 0.  The region
+ * with the lowest start address must appear first in the array.
+ */
+void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions ) PRIVILEGED_FUNCTION;
+
+/*
+ * Returns a HeapStats_t structure filled with information about the current
+ * heap state.
+ */
+void vPortGetHeapStats( HeapStats_t *pxHeapStats );
+
+/*
+ * Map to the memory management routines required for the port.
+ */
+void *pvPortMalloc( size_t xSize ) PRIVILEGED_FUNCTION;
+void vPortFree( void *pv ) PRIVILEGED_FUNCTION;
+void vPortInitialiseBlocks( void ) PRIVILEGED_FUNCTION;
+size_t xPortGetFreeHeapSize( void ) PRIVILEGED_FUNCTION;
+size_t xPortGetMinimumEverFreeHeapSize( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * Setup the hardware ready for the scheduler to take control.  This generally
+ * sets up a tick interrupt and sets timers for the correct tick frequency.
+ */
+BaseType_t xPortStartScheduler( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * Undo any hardware/ISR setup that was performed by xPortStartScheduler() so
+ * the hardware is left in its original condition after the scheduler stops
+ * executing.
+ */
+void vPortEndScheduler( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * The structures and methods of manipulating the MPU are contained within the
+ * port layer.
+ *
+ * Fills the xMPUSettings structure with the memory region information
+ * contained in xRegions.
+ */
+#if( portUSING_MPU_WRAPPERS == 1 )
+	struct xMEMORY_REGION;
+	void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, StackType_t *pxBottomOfStack, uint32_t ulStackDepth ) PRIVILEGED_FUNCTION;
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PORTABLE_H */
+
diff --git a/components/freertos/include/projdefs.h b/components/freertos/include/projdefs.h
new file mode 100644
index 00000000..e0458619
--- /dev/null
+++ b/components/freertos/include/projdefs.h
@@ -0,0 +1,124 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef PROJDEFS_H
+#define PROJDEFS_H
+
+/*
+ * Defines the prototype to which task functions must conform.  Defined in this
+ * file to ensure the type is known before portable.h is included.
+ */
+typedef void (*TaskFunction_t)( void * );
+
+/* Converts a time in milliseconds to a time in ticks.  This macro can be
+overridden by a macro of the same name defined in FreeRTOSConfig.h in case the
+definition here is not suitable for your application. */
+#ifndef pdMS_TO_TICKS
+	#define pdMS_TO_TICKS( xTimeInMs ) ( ( TickType_t ) ( ( ( TickType_t ) ( xTimeInMs ) * ( TickType_t ) configTICK_RATE_HZ ) / ( TickType_t ) 1000 ) )
+#endif
+
+#define pdFALSE			( ( BaseType_t ) 0 )
+#define pdTRUE			( ( BaseType_t ) 1 )
+
+#define pdPASS			( pdTRUE )
+#define pdFAIL			( pdFALSE )
+#define errQUEUE_EMPTY	( ( BaseType_t ) 0 )
+#define errQUEUE_FULL	( ( BaseType_t ) 0 )
+
+/* FreeRTOS error definitions. */
+#define errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY	( -1 )
+#define errQUEUE_BLOCKED						( -4 )
+#define errQUEUE_YIELD							( -5 )
+
+/* Macros used for basic data corruption checks. */
+#ifndef configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES
+	#define configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES 0
+#endif
+
+#if( configUSE_16_BIT_TICKS == 1 )
+	#define pdINTEGRITY_CHECK_VALUE 0x5a5a
+#else
+	#define pdINTEGRITY_CHECK_VALUE 0x5a5a5a5aUL
+#endif
+
+/* The following errno values are used by FreeRTOS+ components, not FreeRTOS
+itself. */
+#define pdFREERTOS_ERRNO_NONE			0	/* No errors */
+#define	pdFREERTOS_ERRNO_ENOENT			2	/* No such file or directory */
+#define	pdFREERTOS_ERRNO_EINTR			4	/* Interrupted system call */
+#define	pdFREERTOS_ERRNO_EIO			5	/* I/O error */
+#define	pdFREERTOS_ERRNO_ENXIO			6	/* No such device or address */
+#define	pdFREERTOS_ERRNO_EBADF			9	/* Bad file number */
+#define	pdFREERTOS_ERRNO_EAGAIN			11	/* No more processes */
+#define	pdFREERTOS_ERRNO_EWOULDBLOCK	11	/* Operation would block */
+#define	pdFREERTOS_ERRNO_ENOMEM			12	/* Not enough memory */
+#define	pdFREERTOS_ERRNO_EACCES			13	/* Permission denied */
+#define	pdFREERTOS_ERRNO_EFAULT			14	/* Bad address */
+#define	pdFREERTOS_ERRNO_EBUSY			16	/* Mount device busy */
+#define	pdFREERTOS_ERRNO_EEXIST			17	/* File exists */
+#define	pdFREERTOS_ERRNO_EXDEV			18	/* Cross-device link */
+#define	pdFREERTOS_ERRNO_ENODEV			19	/* No such device */
+#define	pdFREERTOS_ERRNO_ENOTDIR		20	/* Not a directory */
+#define	pdFREERTOS_ERRNO_EISDIR			21	/* Is a directory */
+#define	pdFREERTOS_ERRNO_EINVAL			22	/* Invalid argument */
+#define	pdFREERTOS_ERRNO_ENOSPC			28	/* No space left on device */
+#define	pdFREERTOS_ERRNO_ESPIPE			29	/* Illegal seek */
+#define	pdFREERTOS_ERRNO_EROFS			30	/* Read only file system */
+#define	pdFREERTOS_ERRNO_EUNATCH		42	/* Protocol driver not attached */
+#define	pdFREERTOS_ERRNO_EBADE			50	/* Invalid exchange */
+#define	pdFREERTOS_ERRNO_EFTYPE			79	/* Inappropriate file type or format */
+#define	pdFREERTOS_ERRNO_ENMFILE		89	/* No more files */
+#define	pdFREERTOS_ERRNO_ENOTEMPTY		90	/* Directory not empty */
+#define	pdFREERTOS_ERRNO_ENAMETOOLONG 	91	/* File or path name too long */
+#define	pdFREERTOS_ERRNO_EOPNOTSUPP		95	/* Operation not supported on transport endpoint */
+#define	pdFREERTOS_ERRNO_ENOBUFS		105	/* No buffer space available */
+#define	pdFREERTOS_ERRNO_ENOPROTOOPT	109	/* Protocol not available */
+#define	pdFREERTOS_ERRNO_EADDRINUSE		112	/* Address already in use */
+#define	pdFREERTOS_ERRNO_ETIMEDOUT		116	/* Connection timed out */
+#define	pdFREERTOS_ERRNO_EINPROGRESS	119	/* Connection already in progress */
+#define	pdFREERTOS_ERRNO_EALREADY		120	/* Socket already connected */
+#define	pdFREERTOS_ERRNO_EADDRNOTAVAIL 	125	/* Address not available */
+#define	pdFREERTOS_ERRNO_EISCONN		127	/* Socket is already connected */
+#define	pdFREERTOS_ERRNO_ENOTCONN		128	/* Socket is not connected */
+#define	pdFREERTOS_ERRNO_ENOMEDIUM		135	/* No medium inserted */
+#define	pdFREERTOS_ERRNO_EILSEQ			138	/* An invalid UTF-16 sequence was encountered. */
+#define	pdFREERTOS_ERRNO_ECANCELED		140	/* Operation canceled. */
+
+/* The following endian values are used by FreeRTOS+ components, not FreeRTOS
+itself. */
+#define pdFREERTOS_LITTLE_ENDIAN		0
+#define pdFREERTOS_BIG_ENDIAN			1
+
+/* Re-defining endian values for generic naming. */
+#define pdLITTLE_ENDIAN					pdFREERTOS_LITTLE_ENDIAN
+#define pdBIG_ENDIAN					pdFREERTOS_BIG_ENDIAN
+
+
+#endif /* PROJDEFS_H */
+
+
+
diff --git a/components/freertos/include/queue.h b/components/freertos/include/queue.h
new file mode 100644
index 00000000..dd8ebc0e
--- /dev/null
+++ b/components/freertos/include/queue.h
@@ -0,0 +1,1655 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef QUEUE_H
+#define QUEUE_H
+
+#ifndef INC_FREERTOS_H
+	#error "include FreeRTOS.h" must appear in source files before "include queue.h"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "task.h"
+
+/**
+ * Type by which queues are referenced.  For example, a call to xQueueCreate()
+ * returns an QueueHandle_t variable that can then be used as a parameter to
+ * xQueueSend(), xQueueReceive(), etc.
+ */
+struct QueueDefinition; /* Using old naming convention so as not to break kernel aware debuggers. */
+typedef struct QueueDefinition * QueueHandle_t;
+
+/**
+ * Type by which queue sets are referenced.  For example, a call to
+ * xQueueCreateSet() returns an xQueueSet variable that can then be used as a
+ * parameter to xQueueSelectFromSet(), xQueueAddToSet(), etc.
+ */
+typedef struct QueueDefinition * QueueSetHandle_t;
+
+/**
+ * Queue sets can contain both queues and semaphores, so the
+ * QueueSetMemberHandle_t is defined as a type to be used where a parameter or
+ * return value can be either an QueueHandle_t or an SemaphoreHandle_t.
+ */
+typedef struct QueueDefinition * QueueSetMemberHandle_t;
+
+/* For internal use only. */
+#define	queueSEND_TO_BACK		( ( BaseType_t ) 0 )
+#define	queueSEND_TO_FRONT		( ( BaseType_t ) 1 )
+#define queueOVERWRITE			( ( BaseType_t ) 2 )
+
+/* For internal use only.  These definitions *must* match those in queue.c. */
+#define queueQUEUE_TYPE_BASE				( ( uint8_t ) 0U )
+#define queueQUEUE_TYPE_SET					( ( uint8_t ) 0U )
+#define queueQUEUE_TYPE_MUTEX 				( ( uint8_t ) 1U )
+#define queueQUEUE_TYPE_COUNTING_SEMAPHORE	( ( uint8_t ) 2U )
+#define queueQUEUE_TYPE_BINARY_SEMAPHORE	( ( uint8_t ) 3U )
+#define queueQUEUE_TYPE_RECURSIVE_MUTEX		( ( uint8_t ) 4U )
+
+/**
+ * queue. h
+ * 
+ QueueHandle_t xQueueCreate(
+							  UBaseType_t uxQueueLength,
+							  UBaseType_t uxItemSize
+						  );
+ * 

+ *
+ * Creates a new queue instance, and returns a handle by which the new queue
+ * can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, queues use two blocks of
+ * memory.  The first block is used to hold the queue's data structures.  The
+ * second block is used to hold items placed into the queue.  If a queue is
+ * created using xQueueCreate() then both blocks of memory are automatically
+ * dynamically allocated inside the xQueueCreate() function.  (see
+ * http://www.freertos.org/a00111.html).  If a queue is created using
+ * xQueueCreateStatic() then the application writer must provide the memory that
+ * will get used by the queue.  xQueueCreateStatic() therefore allows a queue to
+ * be created without using any dynamic memory allocation.
+ *
+ * http://www.FreeRTOS.org/Embedded-RTOS-Queues.html
+ *
+ * @param uxQueueLength The maximum number of items that the queue can contain.
+ *
+ * @param uxItemSize The number of bytes each item in the queue will require.
+ * Items are queued by copy, not by reference, so this is the number of bytes
+ * that will be copied for each posted item.  Each item on the queue must be
+ * the same size.
+ *
+ * @return If the queue is successfully create then a handle to the newly
+ * created queue is returned.  If the queue cannot be created then 0 is
+ * returned.
+ *
+ * Example usage:
+   
+ struct AMessage
+ {
+	char ucMessageID;
+	char ucData[ 20 ];
+ };
+
+ void vATask( void *pvParameters )
+ {
+ QueueHandle_t xQueue1, xQueue2;
+
+	// Create a queue capable of containing 10 uint32_t values.
+	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
+	if( xQueue1 == 0 )
+	{
+		// Queue was not created and must not be used.
+	}
+
+	// Create a queue capable of containing 10 pointers to AMessage structures.
+	// These should be passed by pointer as they contain a lot of data.
+	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
+	if( xQueue2 == 0 )
+	{
+		// Queue was not created and must not be used.
+	}
+
+	// ... Rest of task code.
+ }
+ 

+ * \defgroup xQueueCreate xQueueCreate
+ * \ingroup QueueManagement
+ */
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+	#define xQueueCreate( uxQueueLength, uxItemSize ) xQueueGenericCreate( ( uxQueueLength ), ( uxItemSize ), ( queueQUEUE_TYPE_BASE ) )
+#endif
+
+/**
+ * queue. h
+ * 
+ QueueHandle_t xQueueCreateStatic(
+							  UBaseType_t uxQueueLength,
+							  UBaseType_t uxItemSize,
+							  uint8_t *pucQueueStorageBuffer,
+							  StaticQueue_t *pxQueueBuffer
+						  );
+ * 

+ *
+ * Creates a new queue instance, and returns a handle by which the new queue
+ * can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, queues use two blocks of
+ * memory.  The first block is used to hold the queue's data structures.  The
+ * second block is used to hold items placed into the queue.  If a queue is
+ * created using xQueueCreate() then both blocks of memory are automatically
+ * dynamically allocated inside the xQueueCreate() function.  (see
+ * http://www.freertos.org/a00111.html).  If a queue is created using
+ * xQueueCreateStatic() then the application writer must provide the memory that
+ * will get used by the queue.  xQueueCreateStatic() therefore allows a queue to
+ * be created without using any dynamic memory allocation.
+ *
+ * http://www.FreeRTOS.org/Embedded-RTOS-Queues.html
+ *
+ * @param uxQueueLength The maximum number of items that the queue can contain.
+ *
+ * @param uxItemSize The number of bytes each item in the queue will require.
+ * Items are queued by copy, not by reference, so this is the number of bytes
+ * that will be copied for each posted item.  Each item on the queue must be
+ * the same size.
+ *
+ * @param pucQueueStorageBuffer If uxItemSize is not zero then
+ * pucQueueStorageBuffer must point to a uint8_t array that is at least large
+ * enough to hold the maximum number of items that can be in the queue at any
+ * one time - which is ( uxQueueLength * uxItemsSize ) bytes.  If uxItemSize is
+ * zero then pucQueueStorageBuffer can be NULL.
+ *
+ * @param pxQueueBuffer Must point to a variable of type StaticQueue_t, which
+ * will be used to hold the queue's data structure.
+ *
+ * @return If the queue is created then a handle to the created queue is
+ * returned.  If pxQueueBuffer is NULL then NULL is returned.
+ *
+ * Example usage:
+   
+ struct AMessage
+ {
+	char ucMessageID;
+	char ucData[ 20 ];
+ };
+
+ #define QUEUE_LENGTH 10
+ #define ITEM_SIZE sizeof( uint32_t )
+
+ // xQueueBuffer will hold the queue structure.
+ StaticQueue_t xQueueBuffer;
+
+ // ucQueueStorage will hold the items posted to the queue.  Must be at least
+ // [(queue length) * ( queue item size)] bytes long.
+ uint8_t ucQueueStorage[ QUEUE_LENGTH * ITEM_SIZE ];
+
+ void vATask( void *pvParameters )
+ {
+ QueueHandle_t xQueue1;
+
+	// Create a queue capable of containing 10 uint32_t values.
+	xQueue1 = xQueueCreate( QUEUE_LENGTH, // The number of items the queue can hold.
+							ITEM_SIZE	  // The size of each item in the queue
+							&( ucQueueStorage[ 0 ] ), // The buffer that will hold the items in the queue.
+							&xQueueBuffer ); // The buffer that will hold the queue structure.
+
+	// The queue is guaranteed to be created successfully as no dynamic memory
+	// allocation is used.  Therefore xQueue1 is now a handle to a valid queue.
+
+	// ... Rest of task code.
+ }
+ 

+ * \defgroup xQueueCreateStatic xQueueCreateStatic
+ * \ingroup QueueManagement
+ */
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+	#define xQueueCreateStatic( uxQueueLength, uxItemSize, pucQueueStorage, pxQueueBuffer ) xQueueGenericCreateStatic( ( uxQueueLength ), ( uxItemSize ), ( pucQueueStorage ), ( pxQueueBuffer ), ( queueQUEUE_TYPE_BASE ) )
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+/**
+ * queue. h
+ * 
+ BaseType_t xQueueSendToToFront(
+								   QueueHandle_t	xQueue,
+								   const void		*pvItemToQueue,
+								   TickType_t		xTicksToWait
+							   );
+ * 

+ *
+ * Post an item to the front of a queue.  The item is queued by copy, not by
+ * reference.  This function must not be called from an interrupt service
+ * routine.  See xQueueSendFromISR () for an alternative which may be used
+ * in an ISR.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param xTicksToWait The maximum amount of time the task should block
+ * waiting for space to become available on the queue, should it already
+ * be full.  The call will return immediately if this is set to 0 and the
+ * queue is full.  The time is defined in tick periods so the constant
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
+ *
+ * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
+ *
+ * Example usage:
+   
+ struct AMessage
+ {
+	char ucMessageID;
+	char ucData[ 20 ];
+ } xMessage;
+
+ uint32_t ulVar = 10UL;
+
+ void vATask( void *pvParameters )
+ {
+ QueueHandle_t xQueue1, xQueue2;
+ struct AMessage *pxMessage;
+
+	// Create a queue capable of containing 10 uint32_t values.
+	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
+
+	// Create a queue capable of containing 10 pointers to AMessage structures.
+	// These should be passed by pointer as they contain a lot of data.
+	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
+
+	// ...
+
+	if( xQueue1 != 0 )
+	{
+		// Send an uint32_t.  Wait for 10 ticks for space to become
+		// available if necessary.
+		if( xQueueSendToFront( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
+		{
+			// Failed to post the message, even after 10 ticks.
+		}
+	}
+
+	if( xQueue2 != 0 )
+	{
+		// Send a pointer to a struct AMessage object.  Don't block if the
+		// queue is already full.
+		pxMessage = & xMessage;
+		xQueueSendToFront( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
+	}
+
+	// ... Rest of task code.
+ }
+ 

+ * \defgroup xQueueSend xQueueSend
+ * \ingroup QueueManagement
+ */
+#define xQueueSendToFront( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_FRONT )
+
+/**
+ * queue. h
+ * 
+ BaseType_t xQueueSendToBack(
+								   QueueHandle_t	xQueue,
+								   const void		*pvItemToQueue,
+								   TickType_t		xTicksToWait
+							   );
+ * 

+ *
+ * This is a macro that calls xQueueGenericSend().
+ *
+ * Post an item to the back of a queue.  The item is queued by copy, not by
+ * reference.  This function must not be called from an interrupt service
+ * routine.  See xQueueSendFromISR () for an alternative which may be used
+ * in an ISR.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param xTicksToWait The maximum amount of time the task should block
+ * waiting for space to become available on the queue, should it already
+ * be full.  The call will return immediately if this is set to 0 and the queue
+ * is full.  The  time is defined in tick periods so the constant
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
+ *
+ * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
+ *
+ * Example usage:
+   
+ struct AMessage
+ {
+	char ucMessageID;
+	char ucData[ 20 ];
+ } xMessage;
+
+ uint32_t ulVar = 10UL;
+
+ void vATask( void *pvParameters )
+ {
+ QueueHandle_t xQueue1, xQueue2;
+ struct AMessage *pxMessage;
+
+	// Create a queue capable of containing 10 uint32_t values.
+	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
+
+	// Create a queue capable of containing 10 pointers to AMessage structures.
+	// These should be passed by pointer as they contain a lot of data.
+	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
+
+	// ...
+
+	if( xQueue1 != 0 )
+	{
+		// Send an uint32_t.  Wait for 10 ticks for space to become
+		// available if necessary.
+		if( xQueueSendToBack( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
+		{
+			// Failed to post the message, even after 10 ticks.
+		}
+	}
+
+	if( xQueue2 != 0 )
+	{
+		// Send a pointer to a struct AMessage object.  Don't block if the
+		// queue is already full.
+		pxMessage = & xMessage;
+		xQueueSendToBack( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
+	}
+
+	// ... Rest of task code.
+ }
+ 

+ * \defgroup xQueueSend xQueueSend
+ * \ingroup QueueManagement
+ */
+#define xQueueSendToBack( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
+
+/**
+ * queue. h
+ * 
+ BaseType_t xQueueSend(
+							  QueueHandle_t xQueue,
+							  const void * pvItemToQueue,
+							  TickType_t xTicksToWait
+						 );
+ * 

+ *
+ * This is a macro that calls xQueueGenericSend().  It is included for
+ * backward compatibility with versions of FreeRTOS.org that did not
+ * include the xQueueSendToFront() and xQueueSendToBack() macros.  It is
+ * equivalent to xQueueSendToBack().
+ *
+ * Post an item on a queue.  The item is queued by copy, not by reference.
+ * This function must not be called from an interrupt service routine.
+ * See xQueueSendFromISR () for an alternative which may be used in an ISR.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param xTicksToWait The maximum amount of time the task should block
+ * waiting for space to become available on the queue, should it already
+ * be full.  The call will return immediately if this is set to 0 and the
+ * queue is full.  The time is defined in tick periods so the constant
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
+ *
+ * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
+ *
+ * Example usage:
+   
+ struct AMessage
+ {
+	char ucMessageID;
+	char ucData[ 20 ];
+ } xMessage;
+
+ uint32_t ulVar = 10UL;
+
+ void vATask( void *pvParameters )
+ {
+ QueueHandle_t xQueue1, xQueue2;
+ struct AMessage *pxMessage;
+
+	// Create a queue capable of containing 10 uint32_t values.
+	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
+
+	// Create a queue capable of containing 10 pointers to AMessage structures.
+	// These should be passed by pointer as they contain a lot of data.
+	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
+
+	// ...
+
+	if( xQueue1 != 0 )
+	{
+		// Send an uint32_t.  Wait for 10 ticks for space to become
+		// available if necessary.
+		if( xQueueSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10 ) != pdPASS )
+		{
+			// Failed to post the message, even after 10 ticks.
+		}
+	}
+
+	if( xQueue2 != 0 )
+	{
+		// Send a pointer to a struct AMessage object.  Don't block if the
+		// queue is already full.
+		pxMessage = & xMessage;
+		xQueueSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0 );
+	}
+
+	// ... Rest of task code.
+ }
+ 

+ * \defgroup xQueueSend xQueueSend
+ * \ingroup QueueManagement
+ */
+#define xQueueSend( xQueue, pvItemToQueue, xTicksToWait ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), ( xTicksToWait ), queueSEND_TO_BACK )
+
+/**
+ * queue. h
+ * 
+ BaseType_t xQueueOverwrite(
+							  QueueHandle_t xQueue,
+							  const void * pvItemToQueue
+						 );
+ * 

+ *
+ * Only for use with queues that have a length of one - so the queue is either
+ * empty or full.
+ *
+ * Post an item on a queue.  If the queue is already full then overwrite the
+ * value held in the queue.  The item is queued by copy, not by reference.
+ *
+ * This function must not be called from an interrupt service routine.
+ * See xQueueOverwriteFromISR () for an alternative which may be used in an ISR.
+ *
+ * @param xQueue The handle of the queue to which the data is being sent.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @return xQueueOverwrite() is a macro that calls xQueueGenericSend(), and
+ * therefore has the same return values as xQueueSendToFront().  However, pdPASS
+ * is the only value that can be returned because xQueueOverwrite() will write
+ * to the queue even when the queue is already full.
+ *
+ * Example usage:
+   
+
+ void vFunction( void *pvParameters )
+ {
+ QueueHandle_t xQueue;
+ uint32_t ulVarToSend, ulValReceived;
+
+	// Create a queue to hold one uint32_t value.  It is strongly
+	// recommended *not* to use xQueueOverwrite() on queues that can
+	// contain more than one value, and doing so will trigger an assertion
+	// if configASSERT() is defined.
+	xQueue = xQueueCreate( 1, sizeof( uint32_t ) );
+
+	// Write the value 10 to the queue using xQueueOverwrite().
+	ulVarToSend = 10;
+	xQueueOverwrite( xQueue, &ulVarToSend );
+
+	// Peeking the queue should now return 10, but leave the value 10 in
+	// the queue.  A block time of zero is used as it is known that the
+	// queue holds a value.
+	ulValReceived = 0;
+	xQueuePeek( xQueue, &ulValReceived, 0 );
+
+	if( ulValReceived != 10 )
+	{
+		// Error unless the item was removed by a different task.
+	}
+
+	// The queue is still full.  Use xQueueOverwrite() to overwrite the
+	// value held in the queue with 100.
+	ulVarToSend = 100;
+	xQueueOverwrite( xQueue, &ulVarToSend );
+
+	// This time read from the queue, leaving the queue empty once more.
+	// A block time of 0 is used again.
+	xQueueReceive( xQueue, &ulValReceived, 0 );
+
+	// The value read should be the last value written, even though the
+	// queue was already full when the value was written.
+	if( ulValReceived != 100 )
+	{
+		// Error!
+	}
+
+	// ...
+}
+ 

+ * \defgroup xQueueOverwrite xQueueOverwrite
+ * \ingroup QueueManagement
+ */
+#define xQueueOverwrite( xQueue, pvItemToQueue ) xQueueGenericSend( ( xQueue ), ( pvItemToQueue ), 0, queueOVERWRITE )
+
+
+/**
+ * queue. h
+ * 
+ BaseType_t xQueueGenericSend(
+									QueueHandle_t xQueue,
+									const void * pvItemToQueue,
+									TickType_t xTicksToWait
+									BaseType_t xCopyPosition
+								);
+ * 

+ *
+ * It is preferred that the macros xQueueSend(), xQueueSendToFront() and
+ * xQueueSendToBack() are used in place of calling this function directly.
+ *
+ * Post an item on a queue.  The item is queued by copy, not by reference.
+ * This function must not be called from an interrupt service routine.
+ * See xQueueSendFromISR () for an alternative which may be used in an ISR.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param xTicksToWait The maximum amount of time the task should block
+ * waiting for space to become available on the queue, should it already
+ * be full.  The call will return immediately if this is set to 0 and the
+ * queue is full.  The time is defined in tick periods so the constant
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
+ *
+ * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the
+ * item at the back of the queue, or queueSEND_TO_FRONT to place the item
+ * at the front of the queue (for high priority messages).
+ *
+ * @return pdTRUE if the item was successfully posted, otherwise errQUEUE_FULL.
+ *
+ * Example usage:
+   
+ struct AMessage
+ {
+	char ucMessageID;
+	char ucData[ 20 ];
+ } xMessage;
+
+ uint32_t ulVar = 10UL;
+
+ void vATask( void *pvParameters )
+ {
+ QueueHandle_t xQueue1, xQueue2;
+ struct AMessage *pxMessage;
+
+	// Create a queue capable of containing 10 uint32_t values.
+	xQueue1 = xQueueCreate( 10, sizeof( uint32_t ) );
+
+	// Create a queue capable of containing 10 pointers to AMessage structures.
+	// These should be passed by pointer as they contain a lot of data.
+	xQueue2 = xQueueCreate( 10, sizeof( struct AMessage * ) );
+
+	// ...
+
+	if( xQueue1 != 0 )
+	{
+		// Send an uint32_t.  Wait for 10 ticks for space to become
+		// available if necessary.
+		if( xQueueGenericSend( xQueue1, ( void * ) &ulVar, ( TickType_t ) 10, queueSEND_TO_BACK ) != pdPASS )
+		{
+			// Failed to post the message, even after 10 ticks.
+		}
+	}
+
+	if( xQueue2 != 0 )
+	{
+		// Send a pointer to a struct AMessage object.  Don't block if the
+		// queue is already full.
+		pxMessage = & xMessage;
+		xQueueGenericSend( xQueue2, ( void * ) &pxMessage, ( TickType_t ) 0, queueSEND_TO_BACK );
+	}
+
+	// ... Rest of task code.
+ }
+ 

+ * \defgroup xQueueSend xQueueSend
+ * \ingroup QueueManagement
+ */
+BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;
+
+/**
+ * queue. h
+ * 
+ BaseType_t xQueuePeek(
+							 QueueHandle_t xQueue,
+							 void * const pvBuffer,
+							 TickType_t xTicksToWait
+						 );

+ *
+ * Receive an item from a queue without removing the item from the queue.
+ * The item is received by copy so a buffer of adequate size must be
+ * provided.  The number of bytes copied into the buffer was defined when
+ * the queue was created.
+ *
+ * Successfully received items remain on the queue so will be returned again
+ * by the next call, or a call to xQueueReceive().
+ *
+ * This macro must not be used in an interrupt service routine.  See
+ * xQueuePeekFromISR() for an alternative that can be called from an interrupt
+ * service routine.
+ *
+ * @param xQueue The handle to the queue from which the item is to be
+ * received.
+ *
+ * @param pvBuffer Pointer to the buffer into which the received item will
+ * be copied.
+ *
+ * @param xTicksToWait The maximum amount of time the task should block
+ * waiting for an item to receive should the queue be empty at the time
+ * of the call.	 The time is defined in tick periods so the constant
+ * portTICK_PERIOD_MS should be used to convert to real time if this is required.
+ * xQueuePeek() will return immediately if xTicksToWait is 0 and the queue
+ * is empty.
+ *
+ * @return pdTRUE if an item was successfully received from the queue,
+ * otherwise pdFALSE.
+ *
+ * Example usage:
+   
+ struct AMessage
+ {
+	char ucMessageID;
+	char ucData[ 20 ];
+ } xMessage;
+
+ QueueHandle_t xQueue;
+
+ // Task to create a queue and post a value.
+ void vATask( void *pvParameters )
+ {
+ struct AMessage *pxMessage;
+
+	// Create a queue capable of containing 10 pointers to AMessage structures.
+	// These should be passed by pointer as they contain a lot of data.
+	xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
+	if( xQueue == 0 )
+	{
+		// Failed to create the queue.
+	}
+
+	// ...
+
+	// Send a pointer to a struct AMessage object.  Don't block if the
+	// queue is already full.
+	pxMessage = & xMessage;
+	xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );
+
+	// ... Rest of task code.
+ }
+
+ // Task to peek the data from the queue.
+ void vADifferentTask( void *pvParameters )
+ {
+ struct AMessage *pxRxedMessage;
+
+	if( xQueue != 0 )
+	{
+		// Peek a message on the created queue.  Block for 10 ticks if a
+		// message is not immediately available.
+		if( xQueuePeek( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )
+		{
+			// pcRxedMessage now points to the struct AMessage variable posted
+			// by vATask, but the item still remains on the queue.
+		}
+	}
+
+	// ... Rest of task code.
+ }
+ 

+ * \defgroup xQueuePeek xQueuePeek
+ * \ingroup QueueManagement
+ */
+BaseType_t xQueuePeek( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * queue. h
+ * 
+ BaseType_t xQueuePeekFromISR(
+									QueueHandle_t xQueue,
+									void *pvBuffer,
+								);

+ *
+ * A version of xQueuePeek() that can be called from an interrupt service
+ * routine (ISR).
+ *
+ * Receive an item from a queue without removing the item from the queue.
+ * The item is received by copy so a buffer of adequate size must be
+ * provided.  The number of bytes copied into the buffer was defined when
+ * the queue was created.
+ *
+ * Successfully received items remain on the queue so will be returned again
+ * by the next call, or a call to xQueueReceive().
+ *
+ * @param xQueue The handle to the queue from which the item is to be
+ * received.
+ *
+ * @param pvBuffer Pointer to the buffer into which the received item will
+ * be copied.
+ *
+ * @return pdTRUE if an item was successfully received from the queue,
+ * otherwise pdFALSE.
+ *
+ * \defgroup xQueuePeekFromISR xQueuePeekFromISR
+ * \ingroup QueueManagement
+ */
+BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue, void * const pvBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * queue. h
+ * 
+ BaseType_t xQueueReceive(
+								 QueueHandle_t xQueue,
+								 void *pvBuffer,
+								 TickType_t xTicksToWait
+							);

+ *
+ * Receive an item from a queue.  The item is received by copy so a buffer of
+ * adequate size must be provided.  The number of bytes copied into the buffer
+ * was defined when the queue was created.
+ *
+ * Successfully received items are removed from the queue.
+ *
+ * This function must not be used in an interrupt service routine.  See
+ * xQueueReceiveFromISR for an alternative that can.
+ *
+ * @param xQueue The handle to the queue from which the item is to be
+ * received.
+ *
+ * @param pvBuffer Pointer to the buffer into which the received item will
+ * be copied.
+ *
+ * @param xTicksToWait The maximum amount of time the task should block
+ * waiting for an item to receive should the queue be empty at the time
+ * of the call.	 xQueueReceive() will return immediately if xTicksToWait
+ * is zero and the queue is empty.  The time is defined in tick periods so the
+ * constant portTICK_PERIOD_MS should be used to convert to real time if this is
+ * required.
+ *
+ * @return pdTRUE if an item was successfully received from the queue,
+ * otherwise pdFALSE.
+ *
+ * Example usage:
+   
+ struct AMessage
+ {
+	char ucMessageID;
+	char ucData[ 20 ];
+ } xMessage;
+
+ QueueHandle_t xQueue;
+
+ // Task to create a queue and post a value.
+ void vATask( void *pvParameters )
+ {
+ struct AMessage *pxMessage;
+
+	// Create a queue capable of containing 10 pointers to AMessage structures.
+	// These should be passed by pointer as they contain a lot of data.
+	xQueue = xQueueCreate( 10, sizeof( struct AMessage * ) );
+	if( xQueue == 0 )
+	{
+		// Failed to create the queue.
+	}
+
+	// ...
+
+	// Send a pointer to a struct AMessage object.  Don't block if the
+	// queue is already full.
+	pxMessage = & xMessage;
+	xQueueSend( xQueue, ( void * ) &pxMessage, ( TickType_t ) 0 );
+
+	// ... Rest of task code.
+ }
+
+ // Task to receive from the queue.
+ void vADifferentTask( void *pvParameters )
+ {
+ struct AMessage *pxRxedMessage;
+
+	if( xQueue != 0 )
+	{
+		// Receive a message on the created queue.  Block for 10 ticks if a
+		// message is not immediately available.
+		if( xQueueReceive( xQueue, &( pxRxedMessage ), ( TickType_t ) 10 ) )
+		{
+			// pcRxedMessage now points to the struct AMessage variable posted
+			// by vATask.
+		}
+	}
+
+	// ... Rest of task code.
+ }
+ 

+ * \defgroup xQueueReceive xQueueReceive
+ * \ingroup QueueManagement
+ */
+BaseType_t xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * queue. h
+ * 
UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue );

+ *
+ * Return the number of messages stored in a queue.
+ *
+ * @param xQueue A handle to the queue being queried.
+ *
+ * @return The number of messages available in the queue.
+ *
+ * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting
+ * \ingroup QueueManagement
+ */
+UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+
+/**
+ * queue. h
+ * 
UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue );

+ *
+ * Return the number of free spaces available in a queue.  This is equal to the
+ * number of items that can be sent to the queue before the queue becomes full
+ * if no items are removed.
+ *
+ * @param xQueue A handle to the queue being queried.
+ *
+ * @return The number of spaces available in the queue.
+ *
+ * \defgroup uxQueueMessagesWaiting uxQueueMessagesWaiting
+ * \ingroup QueueManagement
+ */
+UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+
+/**
+ * queue. h
+ * 
void vQueueDelete( QueueHandle_t xQueue );

+ *
+ * Delete a queue - freeing all the memory allocated for storing of items
+ * placed on the queue.
+ *
+ * @param xQueue A handle to the queue to be deleted.
+ *
+ * \defgroup vQueueDelete vQueueDelete
+ * \ingroup QueueManagement
+ */
+void vQueueDelete( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+
+/**
+ * queue. h
+ * 
+ BaseType_t xQueueSendToFrontFromISR(
+										 QueueHandle_t xQueue,
+										 const void *pvItemToQueue,
+										 BaseType_t *pxHigherPriorityTaskWoken
+									  );
+ 

+ *
+ * This is a macro that calls xQueueGenericSendFromISR().
+ *
+ * Post an item to the front of a queue.  It is safe to use this macro from
+ * within an interrupt service routine.
+ *
+ * Items are queued by copy not reference so it is preferable to only
+ * queue small items, especially when called from an ISR.  In most cases
+ * it would be preferable to store a pointer to the item being queued.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param pxHigherPriorityTaskWoken xQueueSendToFrontFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
+ * to unblock, and the unblocked task has a priority higher than the currently
+ * running task.  If xQueueSendToFromFromISR() sets this value to pdTRUE then
+ * a context switch should be requested before the interrupt is exited.
+ *
+ * @return pdTRUE if the data was successfully sent to the queue, otherwise
+ * errQUEUE_FULL.
+ *
+ * Example usage for buffered IO (where the ISR can obtain more than one value
+ * per call):
+   
+ void vBufferISR( void )
+ {
+ char cIn;
+ BaseType_t xHigherPrioritTaskWoken;
+
+	// We have not woken a task at the start of the ISR.
+	xHigherPriorityTaskWoken = pdFALSE;
+
+	// Loop until the buffer is empty.
+	do
+	{
+		// Obtain a byte from the buffer.
+		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
+
+		// Post the byte.
+		xQueueSendToFrontFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
+
+	} while( portINPUT_BYTE( BUFFER_COUNT ) );
+
+	// Now the buffer is empty we can switch context if necessary.
+	if( xHigherPriorityTaskWoken )
+	{
+		taskYIELD ();
+	}
+ }
+ 

+ *
+ * \defgroup xQueueSendFromISR xQueueSendFromISR
+ * \ingroup QueueManagement
+ */
+#define xQueueSendToFrontFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_FRONT )
+
+
+/**
+ * queue. h
+ * 
+ BaseType_t xQueueSendToBackFromISR(
+										 QueueHandle_t xQueue,
+										 const void *pvItemToQueue,
+										 BaseType_t *pxHigherPriorityTaskWoken
+									  );
+ 

+ *
+ * This is a macro that calls xQueueGenericSendFromISR().
+ *
+ * Post an item to the back of a queue.  It is safe to use this macro from
+ * within an interrupt service routine.
+ *
+ * Items are queued by copy not reference so it is preferable to only
+ * queue small items, especially when called from an ISR.  In most cases
+ * it would be preferable to store a pointer to the item being queued.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param pxHigherPriorityTaskWoken xQueueSendToBackFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
+ * to unblock, and the unblocked task has a priority higher than the currently
+ * running task.  If xQueueSendToBackFromISR() sets this value to pdTRUE then
+ * a context switch should be requested before the interrupt is exited.
+ *
+ * @return pdTRUE if the data was successfully sent to the queue, otherwise
+ * errQUEUE_FULL.
+ *
+ * Example usage for buffered IO (where the ISR can obtain more than one value
+ * per call):
+   
+ void vBufferISR( void )
+ {
+ char cIn;
+ BaseType_t xHigherPriorityTaskWoken;
+
+	// We have not woken a task at the start of the ISR.
+	xHigherPriorityTaskWoken = pdFALSE;
+
+	// Loop until the buffer is empty.
+	do
+	{
+		// Obtain a byte from the buffer.
+		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
+
+		// Post the byte.
+		xQueueSendToBackFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
+
+	} while( portINPUT_BYTE( BUFFER_COUNT ) );
+
+	// Now the buffer is empty we can switch context if necessary.
+	if( xHigherPriorityTaskWoken )
+	{
+		taskYIELD ();
+	}
+ }
+ 

+ *
+ * \defgroup xQueueSendFromISR xQueueSendFromISR
+ * \ingroup QueueManagement
+ */
+#define xQueueSendToBackFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )
+
+/**
+ * queue. h
+ * 
+ BaseType_t xQueueOverwriteFromISR(
+							  QueueHandle_t xQueue,
+							  const void * pvItemToQueue,
+							  BaseType_t *pxHigherPriorityTaskWoken
+						 );
+ * 

+ *
+ * A version of xQueueOverwrite() that can be used in an interrupt service
+ * routine (ISR).
+ *
+ * Only for use with queues that can hold a single item - so the queue is either
+ * empty or full.
+ *
+ * Post an item on a queue.  If the queue is already full then overwrite the
+ * value held in the queue.  The item is queued by copy, not by reference.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param pxHigherPriorityTaskWoken xQueueOverwriteFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
+ * to unblock, and the unblocked task has a priority higher than the currently
+ * running task.  If xQueueOverwriteFromISR() sets this value to pdTRUE then
+ * a context switch should be requested before the interrupt is exited.
+ *
+ * @return xQueueOverwriteFromISR() is a macro that calls
+ * xQueueGenericSendFromISR(), and therefore has the same return values as
+ * xQueueSendToFrontFromISR().  However, pdPASS is the only value that can be
+ * returned because xQueueOverwriteFromISR() will write to the queue even when
+ * the queue is already full.
+ *
+ * Example usage:
+   
+
+ QueueHandle_t xQueue;
+
+ void vFunction( void *pvParameters )
+ {
+ 	// Create a queue to hold one uint32_t value.  It is strongly
+	// recommended *not* to use xQueueOverwriteFromISR() on queues that can
+	// contain more than one value, and doing so will trigger an assertion
+	// if configASSERT() is defined.
+	xQueue = xQueueCreate( 1, sizeof( uint32_t ) );
+}
+
+void vAnInterruptHandler( void )
+{
+// xHigherPriorityTaskWoken must be set to pdFALSE before it is used.
+BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+uint32_t ulVarToSend, ulValReceived;
+
+	// Write the value 10 to the queue using xQueueOverwriteFromISR().
+	ulVarToSend = 10;
+	xQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken );
+
+	// The queue is full, but calling xQueueOverwriteFromISR() again will still
+	// pass because the value held in the queue will be overwritten with the
+	// new value.
+	ulVarToSend = 100;
+	xQueueOverwriteFromISR( xQueue, &ulVarToSend, &xHigherPriorityTaskWoken );
+
+	// Reading from the queue will now return 100.
+
+	// ...
+
+	if( xHigherPrioritytaskWoken == pdTRUE )
+	{
+		// Writing to the queue caused a task to unblock and the unblocked task
+		// has a priority higher than or equal to the priority of the currently
+		// executing task (the task this interrupt interrupted).  Perform a context
+		// switch so this interrupt returns directly to the unblocked task.
+		portYIELD_FROM_ISR(); // or portEND_SWITCHING_ISR() depending on the port.
+	}
+}
+ 

+ * \defgroup xQueueOverwriteFromISR xQueueOverwriteFromISR
+ * \ingroup QueueManagement
+ */
+#define xQueueOverwriteFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueOVERWRITE )
+
+/**
+ * queue. h
+ * 
+ BaseType_t xQueueSendFromISR(
+									 QueueHandle_t xQueue,
+									 const void *pvItemToQueue,
+									 BaseType_t *pxHigherPriorityTaskWoken
+								);
+ 

+ *
+ * This is a macro that calls xQueueGenericSendFromISR().  It is included
+ * for backward compatibility with versions of FreeRTOS.org that did not
+ * include the xQueueSendToBackFromISR() and xQueueSendToFrontFromISR()
+ * macros.
+ *
+ * Post an item to the back of a queue.  It is safe to use this function from
+ * within an interrupt service routine.
+ *
+ * Items are queued by copy not reference so it is preferable to only
+ * queue small items, especially when called from an ISR.  In most cases
+ * it would be preferable to store a pointer to the item being queued.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param pxHigherPriorityTaskWoken xQueueSendFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
+ * to unblock, and the unblocked task has a priority higher than the currently
+ * running task.  If xQueueSendFromISR() sets this value to pdTRUE then
+ * a context switch should be requested before the interrupt is exited.
+ *
+ * @return pdTRUE if the data was successfully sent to the queue, otherwise
+ * errQUEUE_FULL.
+ *
+ * Example usage for buffered IO (where the ISR can obtain more than one value
+ * per call):
+   
+ void vBufferISR( void )
+ {
+ char cIn;
+ BaseType_t xHigherPriorityTaskWoken;
+
+	// We have not woken a task at the start of the ISR.
+	xHigherPriorityTaskWoken = pdFALSE;
+
+	// Loop until the buffer is empty.
+	do
+	{
+		// Obtain a byte from the buffer.
+		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
+
+		// Post the byte.
+		xQueueSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWoken );
+
+	} while( portINPUT_BYTE( BUFFER_COUNT ) );
+
+	// Now the buffer is empty we can switch context if necessary.
+	if( xHigherPriorityTaskWoken )
+	{
+		// Actual macro used here is port specific.
+		portYIELD_FROM_ISR ();
+	}
+ }
+ 

+ *
+ * \defgroup xQueueSendFromISR xQueueSendFromISR
+ * \ingroup QueueManagement
+ */
+#define xQueueSendFromISR( xQueue, pvItemToQueue, pxHigherPriorityTaskWoken ) xQueueGenericSendFromISR( ( xQueue ), ( pvItemToQueue ), ( pxHigherPriorityTaskWoken ), queueSEND_TO_BACK )
+
+/**
+ * queue. h
+ * 
+ BaseType_t xQueueGenericSendFromISR(
+										   QueueHandle_t		xQueue,
+										   const	void	*pvItemToQueue,
+										   BaseType_t	*pxHigherPriorityTaskWoken,
+										   BaseType_t	xCopyPosition
+									   );
+ 

+ *
+ * It is preferred that the macros xQueueSendFromISR(),
+ * xQueueSendToFrontFromISR() and xQueueSendToBackFromISR() be used in place
+ * of calling this function directly.  xQueueGiveFromISR() is an
+ * equivalent for use by semaphores that don't actually copy any data.
+ *
+ * Post an item on a queue.  It is safe to use this function from within an
+ * interrupt service routine.
+ *
+ * Items are queued by copy not reference so it is preferable to only
+ * queue small items, especially when called from an ISR.  In most cases
+ * it would be preferable to store a pointer to the item being queued.
+ *
+ * @param xQueue The handle to the queue on which the item is to be posted.
+ *
+ * @param pvItemToQueue A pointer to the item that is to be placed on the
+ * queue.  The size of the items the queue will hold was defined when the
+ * queue was created, so this many bytes will be copied from pvItemToQueue
+ * into the queue storage area.
+ *
+ * @param pxHigherPriorityTaskWoken xQueueGenericSendFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending to the queue caused a task
+ * to unblock, and the unblocked task has a priority higher than the currently
+ * running task.  If xQueueGenericSendFromISR() sets this value to pdTRUE then
+ * a context switch should be requested before the interrupt is exited.
+ *
+ * @param xCopyPosition Can take the value queueSEND_TO_BACK to place the
+ * item at the back of the queue, or queueSEND_TO_FRONT to place the item
+ * at the front of the queue (for high priority messages).
+ *
+ * @return pdTRUE if the data was successfully sent to the queue, otherwise
+ * errQUEUE_FULL.
+ *
+ * Example usage for buffered IO (where the ISR can obtain more than one value
+ * per call):
+   
+ void vBufferISR( void )
+ {
+ char cIn;
+ BaseType_t xHigherPriorityTaskWokenByPost;
+
+	// We have not woken a task at the start of the ISR.
+	xHigherPriorityTaskWokenByPost = pdFALSE;
+
+	// Loop until the buffer is empty.
+	do
+	{
+		// Obtain a byte from the buffer.
+		cIn = portINPUT_BYTE( RX_REGISTER_ADDRESS );
+
+		// Post each byte.
+		xQueueGenericSendFromISR( xRxQueue, &cIn, &xHigherPriorityTaskWokenByPost, queueSEND_TO_BACK );
+
+	} while( portINPUT_BYTE( BUFFER_COUNT ) );
+
+	// Now the buffer is empty we can switch context if necessary.  Note that the
+	// name of the yield function required is port specific.
+	if( xHigherPriorityTaskWokenByPost )
+	{
+		portYIELD_FROM_ISR();
+	}
+ }
+ 

+ *
+ * \defgroup xQueueSendFromISR xQueueSendFromISR
+ * \ingroup QueueManagement
+ */
+BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;
+BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/**
+ * queue. h
+ * 
+ BaseType_t xQueueReceiveFromISR(
+									   QueueHandle_t	xQueue,
+									   void	*pvBuffer,
+									   BaseType_t *pxTaskWoken
+								   );
+ * 

+ *
+ * Receive an item from a queue.  It is safe to use this function from within an
+ * interrupt service routine.
+ *
+ * @param xQueue The handle to the queue from which the item is to be
+ * received.
+ *
+ * @param pvBuffer Pointer to the buffer into which the received item will
+ * be copied.
+ *
+ * @param pxTaskWoken A task may be blocked waiting for space to become
+ * available on the queue.  If xQueueReceiveFromISR causes such a task to
+ * unblock *pxTaskWoken will get set to pdTRUE, otherwise *pxTaskWoken will
+ * remain unchanged.
+ *
+ * @return pdTRUE if an item was successfully received from the queue,
+ * otherwise pdFALSE.
+ *
+ * Example usage:
+   
+
+ QueueHandle_t xQueue;
+
+ // Function to create a queue and post some values.
+ void vAFunction( void *pvParameters )
+ {
+ char cValueToPost;
+ const TickType_t xTicksToWait = ( TickType_t )0xff;
+
+	// Create a queue capable of containing 10 characters.
+	xQueue = xQueueCreate( 10, sizeof( char ) );
+	if( xQueue == 0 )
+	{
+		// Failed to create the queue.
+	}
+
+	// ...
+
+	// Post some characters that will be used within an ISR.  If the queue
+	// is full then this task will block for xTicksToWait ticks.
+	cValueToPost = 'a';
+	xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
+	cValueToPost = 'b';
+	xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
+
+	// ... keep posting characters ... this task may block when the queue
+	// becomes full.
+
+	cValueToPost = 'c';
+	xQueueSend( xQueue, ( void * ) &cValueToPost, xTicksToWait );
+ }
+
+ // ISR that outputs all the characters received on the queue.
+ void vISR_Routine( void )
+ {
+ BaseType_t xTaskWokenByReceive = pdFALSE;
+ char cRxedChar;
+
+	while( xQueueReceiveFromISR( xQueue, ( void * ) &cRxedChar, &xTaskWokenByReceive) )
+	{
+		// A character was received.  Output the character now.
+		vOutputCharacter( cRxedChar );
+
+		// If removing the character from the queue woke the task that was
+		// posting onto the queue cTaskWokenByReceive will have been set to
+		// pdTRUE.  No matter how many times this loop iterates only one
+		// task will be woken.
+	}
+
+	if( cTaskWokenByPost != ( char ) pdFALSE;
+	{
+		taskYIELD ();
+	}
+ }
+ 

+ * \defgroup xQueueReceiveFromISR xQueueReceiveFromISR
+ * \ingroup QueueManagement
+ */
+BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/*
+ * Utilities to query queues that are safe to use from an ISR.  These utilities
+ * should be used only from witin an ISR, or within a critical section.
+ */
+BaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+
+/*
+ * The functions defined above are for passing data to and from tasks.  The
+ * functions below are the equivalents for passing data to and from
+ * co-routines.
+ *
+ * These functions are called from the co-routine macro implementation and
+ * should not be called directly from application code.  Instead use the macro
+ * wrappers defined within croutine.h.
+ */
+BaseType_t xQueueCRSendFromISR( QueueHandle_t xQueue, const void *pvItemToQueue, BaseType_t xCoRoutinePreviouslyWoken );
+BaseType_t xQueueCRReceiveFromISR( QueueHandle_t xQueue, void *pvBuffer, BaseType_t *pxTaskWoken );
+BaseType_t xQueueCRSend( QueueHandle_t xQueue, const void *pvItemToQueue, TickType_t xTicksToWait );
+BaseType_t xQueueCRReceive( QueueHandle_t xQueue, void *pvBuffer, TickType_t xTicksToWait );
+
+/*
+ * For internal use only.  Use xSemaphoreCreateMutex(),
+ * xSemaphoreCreateCounting() or xSemaphoreGetMutexHolder() instead of calling
+ * these functions directly.
+ */
+QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
+QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue ) PRIVILEGED_FUNCTION;
+QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount ) PRIVILEGED_FUNCTION;
+QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue ) PRIVILEGED_FUNCTION;
+BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+TaskHandle_t xQueueGetMutexHolder( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION;
+TaskHandle_t xQueueGetMutexHolderFromISR( QueueHandle_t xSemaphore ) PRIVILEGED_FUNCTION;
+
+/*
+ * For internal use only.  Use xSemaphoreTakeMutexRecursive() or
+ * xSemaphoreGiveMutexRecursive() instead of calling these functions directly.
+ */
+BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex ) PRIVILEGED_FUNCTION;
+
+/*
+ * Reset a queue back to its original empty state.  The return value is now
+ * obsolete and is always set to pdPASS.
+ */
+#define xQueueReset( xQueue ) xQueueGenericReset( xQueue, pdFALSE )
+
+/*
+ * The registry is provided as a means for kernel aware debuggers to
+ * locate queues, semaphores and mutexes.  Call vQueueAddToRegistry() add
+ * a queue, semaphore or mutex handle to the registry if you want the handle
+ * to be available to a kernel aware debugger.  If you are not using a kernel
+ * aware debugger then this function can be ignored.
+ *
+ * configQUEUE_REGISTRY_SIZE defines the maximum number of handles the
+ * registry can hold.  configQUEUE_REGISTRY_SIZE must be greater than 0
+ * within FreeRTOSConfig.h for the registry to be available.  Its value
+ * does not effect the number of queues, semaphores and mutexes that can be
+ * created - just the number that the registry can hold.
+ *
+ * @param xQueue The handle of the queue being added to the registry.  This
+ * is the handle returned by a call to xQueueCreate().  Semaphore and mutex
+ * handles can also be passed in here.
+ *
+ * @param pcName The name to be associated with the handle.  This is the
+ * name that the kernel aware debugger will display.  The queue registry only
+ * stores a pointer to the string - so the string must be persistent (global or
+ * preferably in ROM/Flash), not on the stack.
+ */
+#if( configQUEUE_REGISTRY_SIZE > 0 )
+	void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcQueueName ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+#endif
+
+/*
+ * The registry is provided as a means for kernel aware debuggers to
+ * locate queues, semaphores and mutexes.  Call vQueueAddToRegistry() add
+ * a queue, semaphore or mutex handle to the registry if you want the handle
+ * to be available to a kernel aware debugger, and vQueueUnregisterQueue() to
+ * remove the queue, semaphore or mutex from the register.  If you are not using
+ * a kernel aware debugger then this function can be ignored.
+ *
+ * @param xQueue The handle of the queue being removed from the registry.
+ */
+#if( configQUEUE_REGISTRY_SIZE > 0 )
+	void vQueueUnregisterQueue( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+#endif
+
+/*
+ * The queue registry is provided as a means for kernel aware debuggers to
+ * locate queues, semaphores and mutexes.  Call pcQueueGetName() to look
+ * up and return the name of a queue in the queue registry from the queue's
+ * handle.
+ *
+ * @param xQueue The handle of the queue the name of which will be returned.
+ * @return If the queue is in the registry then a pointer to the name of the
+ * queue is returned.  If the queue is not in the registry then NULL is
+ * returned.
+ */
+#if( configQUEUE_REGISTRY_SIZE > 0 )
+	const char *pcQueueGetName( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+#endif
+
+/*
+ * Generic version of the function used to creaet a queue using dynamic memory
+ * allocation.  This is called by other functions and macros that create other
+ * RTOS objects that use the queue structure as their base.
+ */
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+	QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
+#endif
+
+/*
+ * Generic version of the function used to creaet a queue using dynamic memory
+ * allocation.  This is called by other functions and macros that create other
+ * RTOS objects that use the queue structure as their base.
+ */
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+	QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType ) PRIVILEGED_FUNCTION;
+#endif
+
+/*
+ * Queue sets provide a mechanism to allow a task to block (pend) on a read
+ * operation from multiple queues or semaphores simultaneously.
+ *
+ * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
+ * function.
+ *
+ * A queue set must be explicitly created using a call to xQueueCreateSet()
+ * before it can be used.  Once created, standard FreeRTOS queues and semaphores
+ * can be added to the set using calls to xQueueAddToSet().
+ * xQueueSelectFromSet() is then used to determine which, if any, of the queues
+ * or semaphores contained in the set is in a state where a queue read or
+ * semaphore take operation would be successful.
+ *
+ * Note 1:  See the documentation on http://wwwFreeRTOS.org/RTOS-queue-sets.html
+ * for reasons why queue sets are very rarely needed in practice as there are
+ * simpler methods of blocking on multiple objects.
+ *
+ * Note 2:  Blocking on a queue set that contains a mutex will not cause the
+ * mutex holder to inherit the priority of the blocked task.
+ *
+ * Note 3:  An additional 4 bytes of RAM is required for each space in a every
+ * queue added to a queue set.  Therefore counting semaphores that have a high
+ * maximum count value should not be added to a queue set.
+ *
+ * Note 4:  A receive (in the case of a queue) or take (in the case of a
+ * semaphore) operation must not be performed on a member of a queue set unless
+ * a call to xQueueSelectFromSet() has first returned a handle to that set member.
+ *
+ * @param uxEventQueueLength Queue sets store events that occur on
+ * the queues and semaphores contained in the set.  uxEventQueueLength specifies
+ * the maximum number of events that can be queued at once.  To be absolutely
+ * certain that events are not lost uxEventQueueLength should be set to the
+ * total sum of the length of the queues added to the set, where binary
+ * semaphores and mutexes have a length of 1, and counting semaphores have a
+ * length set by their maximum count value.  Examples:
+ *  + If a queue set is to hold a queue of length 5, another queue of length 12,
+ *    and a binary semaphore, then uxEventQueueLength should be set to
+ *    (5 + 12 + 1), or 18.
+ *  + If a queue set is to hold three binary semaphores then uxEventQueueLength
+ *    should be set to (1 + 1 + 1 ), or 3.
+ *  + If a queue set is to hold a counting semaphore that has a maximum count of
+ *    5, and a counting semaphore that has a maximum count of 3, then
+ *    uxEventQueueLength should be set to (5 + 3), or 8.
+ *
+ * @return If the queue set is created successfully then a handle to the created
+ * queue set is returned.  Otherwise NULL is returned.
+ */
+QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength ) PRIVILEGED_FUNCTION;
+
+/*
+ * Adds a queue or semaphore to a queue set that was previously created by a
+ * call to xQueueCreateSet().
+ *
+ * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
+ * function.
+ *
+ * Note 1:  A receive (in the case of a queue) or take (in the case of a
+ * semaphore) operation must not be performed on a member of a queue set unless
+ * a call to xQueueSelectFromSet() has first returned a handle to that set member.
+ *
+ * @param xQueueOrSemaphore The handle of the queue or semaphore being added to
+ * the queue set (cast to an QueueSetMemberHandle_t type).
+ *
+ * @param xQueueSet The handle of the queue set to which the queue or semaphore
+ * is being added.
+ *
+ * @return If the queue or semaphore was successfully added to the queue set
+ * then pdPASS is returned.  If the queue could not be successfully added to the
+ * queue set because it is already a member of a different queue set then pdFAIL
+ * is returned.
+ */
+BaseType_t xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
+
+/*
+ * Removes a queue or semaphore from a queue set.  A queue or semaphore can only
+ * be removed from a set if the queue or semaphore is empty.
+ *
+ * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
+ * function.
+ *
+ * @param xQueueOrSemaphore The handle of the queue or semaphore being removed
+ * from the queue set (cast to an QueueSetMemberHandle_t type).
+ *
+ * @param xQueueSet The handle of the queue set in which the queue or semaphore
+ * is included.
+ *
+ * @return If the queue or semaphore was successfully removed from the queue set
+ * then pdPASS is returned.  If the queue was not in the queue set, or the
+ * queue (or semaphore) was not empty, then pdFAIL is returned.
+ */
+BaseType_t xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
+
+/*
+ * xQueueSelectFromSet() selects from the members of a queue set a queue or
+ * semaphore that either contains data (in the case of a queue) or is available
+ * to take (in the case of a semaphore).  xQueueSelectFromSet() effectively
+ * allows a task to block (pend) on a read operation on all the queues and
+ * semaphores in a queue set simultaneously.
+ *
+ * See FreeRTOS/Source/Demo/Common/Minimal/QueueSet.c for an example using this
+ * function.
+ *
+ * Note 1:  See the documentation on http://wwwFreeRTOS.org/RTOS-queue-sets.html
+ * for reasons why queue sets are very rarely needed in practice as there are
+ * simpler methods of blocking on multiple objects.
+ *
+ * Note 2:  Blocking on a queue set that contains a mutex will not cause the
+ * mutex holder to inherit the priority of the blocked task.
+ *
+ * Note 3:  A receive (in the case of a queue) or take (in the case of a
+ * semaphore) operation must not be performed on a member of a queue set unless
+ * a call to xQueueSelectFromSet() has first returned a handle to that set member.
+ *
+ * @param xQueueSet The queue set on which the task will (potentially) block.
+ *
+ * @param xTicksToWait The maximum time, in ticks, that the calling task will
+ * remain in the Blocked state (with other tasks executing) to wait for a member
+ * of the queue set to be ready for a successful queue read or semaphore take
+ * operation.
+ *
+ * @return xQueueSelectFromSet() will return the handle of a queue (cast to
+ * a QueueSetMemberHandle_t type) contained in the queue set that contains data,
+ * or the handle of a semaphore (cast to a QueueSetMemberHandle_t type) contained
+ * in the queue set that is available, or NULL if no such queue or semaphore
+ * exists before before the specified block time expires.
+ */
+QueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/*
+ * A version of xQueueSelectFromSet() that can be used from an ISR.
+ */
+QueueSetMemberHandle_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet ) PRIVILEGED_FUNCTION;
+
+/* Not public API functions. */
+void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION;
+BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue ) PRIVILEGED_FUNCTION;
+void vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber ) PRIVILEGED_FUNCTION;
+UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+uint8_t ucQueueGetQueueType( QueueHandle_t xQueue ) PRIVILEGED_FUNCTION;
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* QUEUE_H */
+
diff --git a/components/freertos/include/semphr.h b/components/freertos/include/semphr.h
new file mode 100644
index 00000000..2c106eac
--- /dev/null
+++ b/components/freertos/include/semphr.h
@@ -0,0 +1,1140 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef SEMAPHORE_H
+#define SEMAPHORE_H
+
+#ifndef INC_FREERTOS_H
+	#error "include FreeRTOS.h" must appear in source files before "include semphr.h"
+#endif
+
+#include "queue.h"
+
+typedef QueueHandle_t SemaphoreHandle_t;
+
+#define semBINARY_SEMAPHORE_QUEUE_LENGTH	( ( uint8_t ) 1U )
+#define semSEMAPHORE_QUEUE_ITEM_LENGTH		( ( uint8_t ) 0U )
+#define semGIVE_BLOCK_TIME					( ( TickType_t ) 0U )
+
+
+/**
+ * semphr. h
+ * 
vSemaphoreCreateBinary( SemaphoreHandle_t xSemaphore )

+ *
+ * In many usage scenarios it is faster and more memory efficient to use a
+ * direct to task notification in place of a binary semaphore!
+ * http://www.freertos.org/RTOS-task-notifications.html
+ *
+ * This old vSemaphoreCreateBinary() macro is now deprecated in favour of the
+ * xSemaphoreCreateBinary() function.  Note that binary semaphores created using
+ * the vSemaphoreCreateBinary() macro are created in a state such that the
+ * first call to 'take' the semaphore would pass, whereas binary semaphores
+ * created using xSemaphoreCreateBinary() are created in a state such that the
+ * the semaphore must first be 'given' before it can be 'taken'.
+ *
+ * Macro that implements a semaphore by using the existing queue mechanism.
+ * The queue length is 1 as this is a binary semaphore.  The data size is 0
+ * as we don't want to actually store any data - we just want to know if the
+ * queue is empty or full.
+ *
+ * This type of semaphore can be used for pure synchronisation between tasks or
+ * between an interrupt and a task.  The semaphore need not be given back once
+ * obtained, so one task/interrupt can continuously 'give' the semaphore while
+ * another continuously 'takes' the semaphore.  For this reason this type of
+ * semaphore does not use a priority inheritance mechanism.  For an alternative
+ * that does use priority inheritance see xSemaphoreCreateMutex().
+ *
+ * @param xSemaphore Handle to the created semaphore.  Should be of type SemaphoreHandle_t.
+ *
+ * Example usage:
+ 
+ SemaphoreHandle_t xSemaphore = NULL;
+
+ void vATask( void * pvParameters )
+ {
+    // Semaphore cannot be used before a call to vSemaphoreCreateBinary ().
+    // This is a macro so pass the variable in directly.
+    vSemaphoreCreateBinary( xSemaphore );
+
+    if( xSemaphore != NULL )
+    {
+        // The semaphore was created successfully.
+        // The semaphore can now be used.
+    }
+ }
+ 

+ * \defgroup vSemaphoreCreateBinary vSemaphoreCreateBinary
+ * \ingroup Semaphores
+ */
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+	#define vSemaphoreCreateBinary( xSemaphore )																							\
+		{																																	\
+			( xSemaphore ) = xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE );	\
+			if( ( xSemaphore ) != NULL )																									\
+			{																																\
+				( void ) xSemaphoreGive( ( xSemaphore ) );																					\
+			}																																\
+		}
+#endif
+
+/**
+ * semphr. h
+ * 
SemaphoreHandle_t xSemaphoreCreateBinary( void )

+ *
+ * Creates a new binary semaphore instance, and returns a handle by which the
+ * new semaphore can be referenced.
+ *
+ * In many usage scenarios it is faster and more memory efficient to use a
+ * direct to task notification in place of a binary semaphore!
+ * http://www.freertos.org/RTOS-task-notifications.html
+ *
+ * Internally, within the FreeRTOS implementation, binary semaphores use a block
+ * of memory, in which the semaphore structure is stored.  If a binary semaphore
+ * is created using xSemaphoreCreateBinary() then the required memory is
+ * automatically dynamically allocated inside the xSemaphoreCreateBinary()
+ * function.  (see http://www.freertos.org/a00111.html).  If a binary semaphore
+ * is created using xSemaphoreCreateBinaryStatic() then the application writer
+ * must provide the memory.  xSemaphoreCreateBinaryStatic() therefore allows a
+ * binary semaphore to be created without using any dynamic memory allocation.
+ *
+ * The old vSemaphoreCreateBinary() macro is now deprecated in favour of this
+ * xSemaphoreCreateBinary() function.  Note that binary semaphores created using
+ * the vSemaphoreCreateBinary() macro are created in a state such that the
+ * first call to 'take' the semaphore would pass, whereas binary semaphores
+ * created using xSemaphoreCreateBinary() are created in a state such that the
+ * the semaphore must first be 'given' before it can be 'taken'.
+ *
+ * This type of semaphore can be used for pure synchronisation between tasks or
+ * between an interrupt and a task.  The semaphore need not be given back once
+ * obtained, so one task/interrupt can continuously 'give' the semaphore while
+ * another continuously 'takes' the semaphore.  For this reason this type of
+ * semaphore does not use a priority inheritance mechanism.  For an alternative
+ * that does use priority inheritance see xSemaphoreCreateMutex().
+ *
+ * @return Handle to the created semaphore, or NULL if the memory required to
+ * hold the semaphore's data structures could not be allocated.
+ *
+ * Example usage:
+ 
+ SemaphoreHandle_t xSemaphore = NULL;
+
+ void vATask( void * pvParameters )
+ {
+    // Semaphore cannot be used before a call to xSemaphoreCreateBinary().
+    // This is a macro so pass the variable in directly.
+    xSemaphore = xSemaphoreCreateBinary();
+
+    if( xSemaphore != NULL )
+    {
+        // The semaphore was created successfully.
+        // The semaphore can now be used.
+    }
+ }
+ 

+ * \defgroup xSemaphoreCreateBinary xSemaphoreCreateBinary
+ * \ingroup Semaphores
+ */
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+	#define xSemaphoreCreateBinary() xQueueGenericCreate( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_BINARY_SEMAPHORE )
+#endif
+
+/**
+ * semphr. h
+ * 
SemaphoreHandle_t xSemaphoreCreateBinaryStatic( StaticSemaphore_t *pxSemaphoreBuffer )

+ *
+ * Creates a new binary semaphore instance, and returns a handle by which the
+ * new semaphore can be referenced.
+ *
+ * NOTE: In many usage scenarios it is faster and more memory efficient to use a
+ * direct to task notification in place of a binary semaphore!
+ * http://www.freertos.org/RTOS-task-notifications.html
+ *
+ * Internally, within the FreeRTOS implementation, binary semaphores use a block
+ * of memory, in which the semaphore structure is stored.  If a binary semaphore
+ * is created using xSemaphoreCreateBinary() then the required memory is
+ * automatically dynamically allocated inside the xSemaphoreCreateBinary()
+ * function.  (see http://www.freertos.org/a00111.html).  If a binary semaphore
+ * is created using xSemaphoreCreateBinaryStatic() then the application writer
+ * must provide the memory.  xSemaphoreCreateBinaryStatic() therefore allows a
+ * binary semaphore to be created without using any dynamic memory allocation.
+ *
+ * This type of semaphore can be used for pure synchronisation between tasks or
+ * between an interrupt and a task.  The semaphore need not be given back once
+ * obtained, so one task/interrupt can continuously 'give' the semaphore while
+ * another continuously 'takes' the semaphore.  For this reason this type of
+ * semaphore does not use a priority inheritance mechanism.  For an alternative
+ * that does use priority inheritance see xSemaphoreCreateMutex().
+ *
+ * @param pxSemaphoreBuffer Must point to a variable of type StaticSemaphore_t,
+ * which will then be used to hold the semaphore's data structure, removing the
+ * need for the memory to be allocated dynamically.
+ *
+ * @return If the semaphore is created then a handle to the created semaphore is
+ * returned.  If pxSemaphoreBuffer is NULL then NULL is returned.
+ *
+ * Example usage:
+ 
+ SemaphoreHandle_t xSemaphore = NULL;
+ StaticSemaphore_t xSemaphoreBuffer;
+
+ void vATask( void * pvParameters )
+ {
+    // Semaphore cannot be used before a call to xSemaphoreCreateBinary().
+    // The semaphore's data structures will be placed in the xSemaphoreBuffer
+    // variable, the address of which is passed into the function.  The
+    // function's parameter is not NULL, so the function will not attempt any
+    // dynamic memory allocation, and therefore the function will not return
+    // return NULL.
+    xSemaphore = xSemaphoreCreateBinary( &xSemaphoreBuffer );
+
+    // Rest of task code goes here.
+ }
+ 

+ * \defgroup xSemaphoreCreateBinaryStatic xSemaphoreCreateBinaryStatic
+ * \ingroup Semaphores
+ */
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+	#define xSemaphoreCreateBinaryStatic( pxStaticSemaphore ) xQueueGenericCreateStatic( ( UBaseType_t ) 1, semSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticSemaphore, queueQUEUE_TYPE_BINARY_SEMAPHORE )
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+/**
+ * semphr. h
+ * 
xSemaphoreTake(
+ *                   SemaphoreHandle_t xSemaphore,
+ *                   TickType_t xBlockTime
+ *               )

+ *
+ * Macro to obtain a semaphore.  The semaphore must have previously been
+ * created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or
+ * xSemaphoreCreateCounting().
+ *
+ * @param xSemaphore A handle to the semaphore being taken - obtained when
+ * the semaphore was created.
+ *
+ * @param xBlockTime The time in ticks to wait for the semaphore to become
+ * available.  The macro portTICK_PERIOD_MS can be used to convert this to a
+ * real time.  A block time of zero can be used to poll the semaphore.  A block
+ * time of portMAX_DELAY can be used to block indefinitely (provided
+ * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h).
+ *
+ * @return pdTRUE if the semaphore was obtained.  pdFALSE
+ * if xBlockTime expired without the semaphore becoming available.
+ *
+ * Example usage:
+ 
+ SemaphoreHandle_t xSemaphore = NULL;
+
+ // A task that creates a semaphore.
+ void vATask( void * pvParameters )
+ {
+    // Create the semaphore to guard a shared resource.
+    xSemaphore = xSemaphoreCreateBinary();
+ }
+
+ // A task that uses the semaphore.
+ void vAnotherTask( void * pvParameters )
+ {
+    // ... Do other things.
+
+    if( xSemaphore != NULL )
+    {
+        // See if we can obtain the semaphore.  If the semaphore is not available
+        // wait 10 ticks to see if it becomes free.
+        if( xSemaphoreTake( xSemaphore, ( TickType_t ) 10 ) == pdTRUE )
+        {
+            // We were able to obtain the semaphore and can now access the
+            // shared resource.
+
+            // ...
+
+            // We have finished accessing the shared resource.  Release the
+            // semaphore.
+            xSemaphoreGive( xSemaphore );
+        }
+        else
+        {
+            // We could not obtain the semaphore and can therefore not access
+            // the shared resource safely.
+        }
+    }
+ }
+ 

+ * \defgroup xSemaphoreTake xSemaphoreTake
+ * \ingroup Semaphores
+ */
+#define xSemaphoreTake( xSemaphore, xBlockTime )		xQueueSemaphoreTake( ( xSemaphore ), ( xBlockTime ) )
+
+/**
+ * semphr. h
+ * xSemaphoreTakeRecursive(
+ *                          SemaphoreHandle_t xMutex,
+ *                          TickType_t xBlockTime
+ *                        )
+ *
+ * Macro to recursively obtain, or 'take', a mutex type semaphore.
+ * The mutex must have previously been created using a call to
+ * xSemaphoreCreateRecursiveMutex();
+ *
+ * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this
+ * macro to be available.
+ *
+ * This macro must not be used on mutexes created using xSemaphoreCreateMutex().
+ *
+ * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex
+ * doesn't become available again until the owner has called
+ * xSemaphoreGiveRecursive() for each successful 'take' request.  For example,
+ * if a task successfully 'takes' the same mutex 5 times then the mutex will
+ * not be available to any other task until it has also  'given' the mutex back
+ * exactly five times.
+ *
+ * @param xMutex A handle to the mutex being obtained.  This is the
+ * handle returned by xSemaphoreCreateRecursiveMutex();
+ *
+ * @param xBlockTime The time in ticks to wait for the semaphore to become
+ * available.  The macro portTICK_PERIOD_MS can be used to convert this to a
+ * real time.  A block time of zero can be used to poll the semaphore.  If
+ * the task already owns the semaphore then xSemaphoreTakeRecursive() will
+ * return immediately no matter what the value of xBlockTime.
+ *
+ * @return pdTRUE if the semaphore was obtained.  pdFALSE if xBlockTime
+ * expired without the semaphore becoming available.
+ *
+ * Example usage:
+ 
+ SemaphoreHandle_t xMutex = NULL;
+
+ // A task that creates a mutex.
+ void vATask( void * pvParameters )
+ {
+    // Create the mutex to guard a shared resource.
+    xMutex = xSemaphoreCreateRecursiveMutex();
+ }
+
+ // A task that uses the mutex.
+ void vAnotherTask( void * pvParameters )
+ {
+    // ... Do other things.
+
+    if( xMutex != NULL )
+    {
+        // See if we can obtain the mutex.  If the mutex is not available
+        // wait 10 ticks to see if it becomes free.
+        if( xSemaphoreTakeRecursive( xSemaphore, ( TickType_t ) 10 ) == pdTRUE )
+        {
+            // We were able to obtain the mutex and can now access the
+            // shared resource.
+
+            // ...
+            // For some reason due to the nature of the code further calls to
+            // xSemaphoreTakeRecursive() are made on the same mutex.  In real
+            // code these would not be just sequential calls as this would make
+            // no sense.  Instead the calls are likely to be buried inside
+            // a more complex call structure.
+            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
+            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
+
+            // The mutex has now been 'taken' three times, so will not be
+            // available to another task until it has also been given back
+            // three times.  Again it is unlikely that real code would have
+            // these calls sequentially, but instead buried in a more complex
+            // call structure.  This is just for illustrative purposes.
+            xSemaphoreGiveRecursive( xMutex );
+            xSemaphoreGiveRecursive( xMutex );
+            xSemaphoreGiveRecursive( xMutex );
+
+            // Now the mutex can be taken by other tasks.
+        }
+        else
+        {
+            // We could not obtain the mutex and can therefore not access
+            // the shared resource safely.
+        }
+    }
+ }
+ 

+ * \defgroup xSemaphoreTakeRecursive xSemaphoreTakeRecursive
+ * \ingroup Semaphores
+ */
+#if( configUSE_RECURSIVE_MUTEXES == 1 )
+	#define xSemaphoreTakeRecursive( xMutex, xBlockTime )	xQueueTakeMutexRecursive( ( xMutex ), ( xBlockTime ) )
+#endif
+
+/**
+ * semphr. h
+ * 
xSemaphoreGive( SemaphoreHandle_t xSemaphore )

+ *
+ * Macro to release a semaphore.  The semaphore must have previously been
+ * created with a call to xSemaphoreCreateBinary(), xSemaphoreCreateMutex() or
+ * xSemaphoreCreateCounting(). and obtained using sSemaphoreTake().
+ *
+ * This macro must not be used from an ISR.  See xSemaphoreGiveFromISR () for
+ * an alternative which can be used from an ISR.
+ *
+ * This macro must also not be used on semaphores created using
+ * xSemaphoreCreateRecursiveMutex().
+ *
+ * @param xSemaphore A handle to the semaphore being released.  This is the
+ * handle returned when the semaphore was created.
+ *
+ * @return pdTRUE if the semaphore was released.  pdFALSE if an error occurred.
+ * Semaphores are implemented using queues.  An error can occur if there is
+ * no space on the queue to post a message - indicating that the
+ * semaphore was not first obtained correctly.
+ *
+ * Example usage:
+ 
+ SemaphoreHandle_t xSemaphore = NULL;
+
+ void vATask( void * pvParameters )
+ {
+    // Create the semaphore to guard a shared resource.
+    xSemaphore = vSemaphoreCreateBinary();
+
+    if( xSemaphore != NULL )
+    {
+        if( xSemaphoreGive( xSemaphore ) != pdTRUE )
+        {
+            // We would expect this call to fail because we cannot give
+            // a semaphore without first "taking" it!
+        }
+
+        // Obtain the semaphore - don't block if the semaphore is not
+        // immediately available.
+        if( xSemaphoreTake( xSemaphore, ( TickType_t ) 0 ) )
+        {
+            // We now have the semaphore and can access the shared resource.
+
+            // ...
+
+            // We have finished accessing the shared resource so can free the
+            // semaphore.
+            if( xSemaphoreGive( xSemaphore ) != pdTRUE )
+            {
+                // We would not expect this call to fail because we must have
+                // obtained the semaphore to get here.
+            }
+        }
+    }
+ }
+ 

+ * \defgroup xSemaphoreGive xSemaphoreGive
+ * \ingroup Semaphores
+ */
+#define xSemaphoreGive( xSemaphore )		xQueueGenericSend( ( QueueHandle_t ) ( xSemaphore ), NULL, semGIVE_BLOCK_TIME, queueSEND_TO_BACK )
+
+/**
+ * semphr. h
+ * 
xSemaphoreGiveRecursive( SemaphoreHandle_t xMutex )

+ *
+ * Macro to recursively release, or 'give', a mutex type semaphore.
+ * The mutex must have previously been created using a call to
+ * xSemaphoreCreateRecursiveMutex();
+ *
+ * configUSE_RECURSIVE_MUTEXES must be set to 1 in FreeRTOSConfig.h for this
+ * macro to be available.
+ *
+ * This macro must not be used on mutexes created using xSemaphoreCreateMutex().
+ *
+ * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex
+ * doesn't become available again until the owner has called
+ * xSemaphoreGiveRecursive() for each successful 'take' request.  For example,
+ * if a task successfully 'takes' the same mutex 5 times then the mutex will
+ * not be available to any other task until it has also  'given' the mutex back
+ * exactly five times.
+ *
+ * @param xMutex A handle to the mutex being released, or 'given'.  This is the
+ * handle returned by xSemaphoreCreateMutex();
+ *
+ * @return pdTRUE if the semaphore was given.
+ *
+ * Example usage:
+ 
+ SemaphoreHandle_t xMutex = NULL;
+
+ // A task that creates a mutex.
+ void vATask( void * pvParameters )
+ {
+    // Create the mutex to guard a shared resource.
+    xMutex = xSemaphoreCreateRecursiveMutex();
+ }
+
+ // A task that uses the mutex.
+ void vAnotherTask( void * pvParameters )
+ {
+    // ... Do other things.
+
+    if( xMutex != NULL )
+    {
+        // See if we can obtain the mutex.  If the mutex is not available
+        // wait 10 ticks to see if it becomes free.
+        if( xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 ) == pdTRUE )
+        {
+            // We were able to obtain the mutex and can now access the
+            // shared resource.
+
+            // ...
+            // For some reason due to the nature of the code further calls to
+			// xSemaphoreTakeRecursive() are made on the same mutex.  In real
+			// code these would not be just sequential calls as this would make
+			// no sense.  Instead the calls are likely to be buried inside
+			// a more complex call structure.
+            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
+            xSemaphoreTakeRecursive( xMutex, ( TickType_t ) 10 );
+
+            // The mutex has now been 'taken' three times, so will not be
+			// available to another task until it has also been given back
+			// three times.  Again it is unlikely that real code would have
+			// these calls sequentially, it would be more likely that the calls
+			// to xSemaphoreGiveRecursive() would be called as a call stack
+			// unwound.  This is just for demonstrative purposes.
+            xSemaphoreGiveRecursive( xMutex );
+			xSemaphoreGiveRecursive( xMutex );
+			xSemaphoreGiveRecursive( xMutex );
+
+			// Now the mutex can be taken by other tasks.
+        }
+        else
+        {
+            // We could not obtain the mutex and can therefore not access
+            // the shared resource safely.
+        }
+    }
+ }
+ 

+ * \defgroup xSemaphoreGiveRecursive xSemaphoreGiveRecursive
+ * \ingroup Semaphores
+ */
+#if( configUSE_RECURSIVE_MUTEXES == 1 )
+	#define xSemaphoreGiveRecursive( xMutex )	xQueueGiveMutexRecursive( ( xMutex ) )
+#endif
+
+/**
+ * semphr. h
+ * 
+ xSemaphoreGiveFromISR(
+                          SemaphoreHandle_t xSemaphore,
+                          BaseType_t *pxHigherPriorityTaskWoken
+                      )

+ *
+ * Macro to  release a semaphore.  The semaphore must have previously been
+ * created with a call to xSemaphoreCreateBinary() or xSemaphoreCreateCounting().
+ *
+ * Mutex type semaphores (those created using a call to xSemaphoreCreateMutex())
+ * must not be used with this macro.
+ *
+ * This macro can be used from an ISR.
+ *
+ * @param xSemaphore A handle to the semaphore being released.  This is the
+ * handle returned when the semaphore was created.
+ *
+ * @param pxHigherPriorityTaskWoken xSemaphoreGiveFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if giving the semaphore caused a task
+ * to unblock, and the unblocked task has a priority higher than the currently
+ * running task.  If xSemaphoreGiveFromISR() sets this value to pdTRUE then
+ * a context switch should be requested before the interrupt is exited.
+ *
+ * @return pdTRUE if the semaphore was successfully given, otherwise errQUEUE_FULL.
+ *
+ * Example usage:
+ 
+ \#define LONG_TIME 0xffff
+ \#define TICKS_TO_WAIT	10
+ SemaphoreHandle_t xSemaphore = NULL;
+
+ // Repetitive task.
+ void vATask( void * pvParameters )
+ {
+    for( ;; )
+    {
+        // We want this task to run every 10 ticks of a timer.  The semaphore
+        // was created before this task was started.
+
+        // Block waiting for the semaphore to become available.
+        if( xSemaphoreTake( xSemaphore, LONG_TIME ) == pdTRUE )
+        {
+            // It is time to execute.
+
+            // ...
+
+            // We have finished our task.  Return to the top of the loop where
+            // we will block on the semaphore until it is time to execute
+            // again.  Note when using the semaphore for synchronisation with an
+			// ISR in this manner there is no need to 'give' the semaphore back.
+        }
+    }
+ }
+
+ // Timer ISR
+ void vTimerISR( void * pvParameters )
+ {
+ static uint8_t ucLocalTickCount = 0;
+ static BaseType_t xHigherPriorityTaskWoken;
+
+    // A timer tick has occurred.
+
+    // ... Do other time functions.
+
+    // Is it time for vATask () to run?
+	xHigherPriorityTaskWoken = pdFALSE;
+    ucLocalTickCount++;
+    if( ucLocalTickCount >= TICKS_TO_WAIT )
+    {
+        // Unblock the task by releasing the semaphore.
+        xSemaphoreGiveFromISR( xSemaphore, &xHigherPriorityTaskWoken );
+
+        // Reset the count so we release the semaphore again in 10 ticks time.
+        ucLocalTickCount = 0;
+    }
+
+    if( xHigherPriorityTaskWoken != pdFALSE )
+    {
+        // We can force a context switch here.  Context switching from an
+        // ISR uses port specific syntax.  Check the demo task for your port
+        // to find the syntax required.
+    }
+ }
+ 

+ * \defgroup xSemaphoreGiveFromISR xSemaphoreGiveFromISR
+ * \ingroup Semaphores
+ */
+#define xSemaphoreGiveFromISR( xSemaphore, pxHigherPriorityTaskWoken )	xQueueGiveFromISR( ( QueueHandle_t ) ( xSemaphore ), ( pxHigherPriorityTaskWoken ) )
+
+/**
+ * semphr. h
+ * 
+ xSemaphoreTakeFromISR(
+                          SemaphoreHandle_t xSemaphore,
+                          BaseType_t *pxHigherPriorityTaskWoken
+                      )

+ *
+ * Macro to  take a semaphore from an ISR.  The semaphore must have
+ * previously been created with a call to xSemaphoreCreateBinary() or
+ * xSemaphoreCreateCounting().
+ *
+ * Mutex type semaphores (those created using a call to xSemaphoreCreateMutex())
+ * must not be used with this macro.
+ *
+ * This macro can be used from an ISR, however taking a semaphore from an ISR
+ * is not a common operation.  It is likely to only be useful when taking a
+ * counting semaphore when an interrupt is obtaining an object from a resource
+ * pool (when the semaphore count indicates the number of resources available).
+ *
+ * @param xSemaphore A handle to the semaphore being taken.  This is the
+ * handle returned when the semaphore was created.
+ *
+ * @param pxHigherPriorityTaskWoken xSemaphoreTakeFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if taking the semaphore caused a task
+ * to unblock, and the unblocked task has a priority higher than the currently
+ * running task.  If xSemaphoreTakeFromISR() sets this value to pdTRUE then
+ * a context switch should be requested before the interrupt is exited.
+ *
+ * @return pdTRUE if the semaphore was successfully taken, otherwise
+ * pdFALSE
+ */
+#define xSemaphoreTakeFromISR( xSemaphore, pxHigherPriorityTaskWoken )	xQueueReceiveFromISR( ( QueueHandle_t ) ( xSemaphore ), NULL, ( pxHigherPriorityTaskWoken ) )
+
+/**
+ * semphr. h
+ * 
SemaphoreHandle_t xSemaphoreCreateMutex( void )

+ *
+ * Creates a new mutex type semaphore instance, and returns a handle by which
+ * the new mutex can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, mutex semaphores use a block
+ * of memory, in which the mutex structure is stored.  If a mutex is created
+ * using xSemaphoreCreateMutex() then the required memory is automatically
+ * dynamically allocated inside the xSemaphoreCreateMutex() function.  (see
+ * http://www.freertos.org/a00111.html).  If a mutex is created using
+ * xSemaphoreCreateMutexStatic() then the application writer must provided the
+ * memory.  xSemaphoreCreateMutexStatic() therefore allows a mutex to be created
+ * without using any dynamic memory allocation.
+ *
+ * Mutexes created using this function can be accessed using the xSemaphoreTake()
+ * and xSemaphoreGive() macros.  The xSemaphoreTakeRecursive() and
+ * xSemaphoreGiveRecursive() macros must not be used.
+ *
+ * This type of semaphore uses a priority inheritance mechanism so a task
+ * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the
+ * semaphore it is no longer required.
+ *
+ * Mutex type semaphores cannot be used from within interrupt service routines.
+ *
+ * See xSemaphoreCreateBinary() for an alternative implementation that can be
+ * used for pure synchronisation (where one task or interrupt always 'gives' the
+ * semaphore and another always 'takes' the semaphore) and from within interrupt
+ * service routines.
+ *
+ * @return If the mutex was successfully created then a handle to the created
+ * semaphore is returned.  If there was not enough heap to allocate the mutex
+ * data structures then NULL is returned.
+ *
+ * Example usage:
+ 
+ SemaphoreHandle_t xSemaphore;
+
+ void vATask( void * pvParameters )
+ {
+    // Semaphore cannot be used before a call to xSemaphoreCreateMutex().
+    // This is a macro so pass the variable in directly.
+    xSemaphore = xSemaphoreCreateMutex();
+
+    if( xSemaphore != NULL )
+    {
+        // The semaphore was created successfully.
+        // The semaphore can now be used.
+    }
+ }
+ 

+ * \defgroup xSemaphoreCreateMutex xSemaphoreCreateMutex
+ * \ingroup Semaphores
+ */
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+	#define xSemaphoreCreateMutex() xQueueCreateMutex( queueQUEUE_TYPE_MUTEX )
+#endif
+
+/**
+ * semphr. h
+ * 
SemaphoreHandle_t xSemaphoreCreateMutexStatic( StaticSemaphore_t *pxMutexBuffer )

+ *
+ * Creates a new mutex type semaphore instance, and returns a handle by which
+ * the new mutex can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, mutex semaphores use a block
+ * of memory, in which the mutex structure is stored.  If a mutex is created
+ * using xSemaphoreCreateMutex() then the required memory is automatically
+ * dynamically allocated inside the xSemaphoreCreateMutex() function.  (see
+ * http://www.freertos.org/a00111.html).  If a mutex is created using
+ * xSemaphoreCreateMutexStatic() then the application writer must provided the
+ * memory.  xSemaphoreCreateMutexStatic() therefore allows a mutex to be created
+ * without using any dynamic memory allocation.
+ *
+ * Mutexes created using this function can be accessed using the xSemaphoreTake()
+ * and xSemaphoreGive() macros.  The xSemaphoreTakeRecursive() and
+ * xSemaphoreGiveRecursive() macros must not be used.
+ *
+ * This type of semaphore uses a priority inheritance mechanism so a task
+ * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the
+ * semaphore it is no longer required.
+ *
+ * Mutex type semaphores cannot be used from within interrupt service routines.
+ *
+ * See xSemaphoreCreateBinary() for an alternative implementation that can be
+ * used for pure synchronisation (where one task or interrupt always 'gives' the
+ * semaphore and another always 'takes' the semaphore) and from within interrupt
+ * service routines.
+ *
+ * @param pxMutexBuffer Must point to a variable of type StaticSemaphore_t,
+ * which will be used to hold the mutex's data structure, removing the need for
+ * the memory to be allocated dynamically.
+ *
+ * @return If the mutex was successfully created then a handle to the created
+ * mutex is returned.  If pxMutexBuffer was NULL then NULL is returned.
+ *
+ * Example usage:
+ 
+ SemaphoreHandle_t xSemaphore;
+ StaticSemaphore_t xMutexBuffer;
+
+ void vATask( void * pvParameters )
+ {
+    // A mutex cannot be used before it has been created.  xMutexBuffer is
+    // into xSemaphoreCreateMutexStatic() so no dynamic memory allocation is
+    // attempted.
+    xSemaphore = xSemaphoreCreateMutexStatic( &xMutexBuffer );
+
+    // As no dynamic memory allocation was performed, xSemaphore cannot be NULL,
+    // so there is no need to check it.
+ }
+ 

+ * \defgroup xSemaphoreCreateMutexStatic xSemaphoreCreateMutexStatic
+ * \ingroup Semaphores
+ */
+ #if( configSUPPORT_STATIC_ALLOCATION == 1 )
+	#define xSemaphoreCreateMutexStatic( pxMutexBuffer ) xQueueCreateMutexStatic( queueQUEUE_TYPE_MUTEX, ( pxMutexBuffer ) )
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+
+/**
+ * semphr. h
+ * 
SemaphoreHandle_t xSemaphoreCreateRecursiveMutex( void )

+ *
+ * Creates a new recursive mutex type semaphore instance, and returns a handle
+ * by which the new recursive mutex can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, recursive mutexs use a block
+ * of memory, in which the mutex structure is stored.  If a recursive mutex is
+ * created using xSemaphoreCreateRecursiveMutex() then the required memory is
+ * automatically dynamically allocated inside the
+ * xSemaphoreCreateRecursiveMutex() function.  (see
+ * http://www.freertos.org/a00111.html).  If a recursive mutex is created using
+ * xSemaphoreCreateRecursiveMutexStatic() then the application writer must
+ * provide the memory that will get used by the mutex.
+ * xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to
+ * be created without using any dynamic memory allocation.
+ *
+ * Mutexes created using this macro can be accessed using the
+ * xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() macros.  The
+ * xSemaphoreTake() and xSemaphoreGive() macros must not be used.
+ *
+ * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex
+ * doesn't become available again until the owner has called
+ * xSemaphoreGiveRecursive() for each successful 'take' request.  For example,
+ * if a task successfully 'takes' the same mutex 5 times then the mutex will
+ * not be available to any other task until it has also  'given' the mutex back
+ * exactly five times.
+ *
+ * This type of semaphore uses a priority inheritance mechanism so a task
+ * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the
+ * semaphore it is no longer required.
+ *
+ * Mutex type semaphores cannot be used from within interrupt service routines.
+ *
+ * See xSemaphoreCreateBinary() for an alternative implementation that can be
+ * used for pure synchronisation (where one task or interrupt always 'gives' the
+ * semaphore and another always 'takes' the semaphore) and from within interrupt
+ * service routines.
+ *
+ * @return xSemaphore Handle to the created mutex semaphore.  Should be of type
+ * SemaphoreHandle_t.
+ *
+ * Example usage:
+ 
+ SemaphoreHandle_t xSemaphore;
+
+ void vATask( void * pvParameters )
+ {
+    // Semaphore cannot be used before a call to xSemaphoreCreateMutex().
+    // This is a macro so pass the variable in directly.
+    xSemaphore = xSemaphoreCreateRecursiveMutex();
+
+    if( xSemaphore != NULL )
+    {
+        // The semaphore was created successfully.
+        // The semaphore can now be used.
+    }
+ }
+ 

+ * \defgroup xSemaphoreCreateRecursiveMutex xSemaphoreCreateRecursiveMutex
+ * \ingroup Semaphores
+ */
+#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) )
+	#define xSemaphoreCreateRecursiveMutex() xQueueCreateMutex( queueQUEUE_TYPE_RECURSIVE_MUTEX )
+#endif
+
+/**
+ * semphr. h
+ * 
SemaphoreHandle_t xSemaphoreCreateRecursiveMutexStatic( StaticSemaphore_t *pxMutexBuffer )

+ *
+ * Creates a new recursive mutex type semaphore instance, and returns a handle
+ * by which the new recursive mutex can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, recursive mutexs use a block
+ * of memory, in which the mutex structure is stored.  If a recursive mutex is
+ * created using xSemaphoreCreateRecursiveMutex() then the required memory is
+ * automatically dynamically allocated inside the
+ * xSemaphoreCreateRecursiveMutex() function.  (see
+ * http://www.freertos.org/a00111.html).  If a recursive mutex is created using
+ * xSemaphoreCreateRecursiveMutexStatic() then the application writer must
+ * provide the memory that will get used by the mutex.
+ * xSemaphoreCreateRecursiveMutexStatic() therefore allows a recursive mutex to
+ * be created without using any dynamic memory allocation.
+ *
+ * Mutexes created using this macro can be accessed using the
+ * xSemaphoreTakeRecursive() and xSemaphoreGiveRecursive() macros.  The
+ * xSemaphoreTake() and xSemaphoreGive() macros must not be used.
+ *
+ * A mutex used recursively can be 'taken' repeatedly by the owner. The mutex
+ * doesn't become available again until the owner has called
+ * xSemaphoreGiveRecursive() for each successful 'take' request.  For example,
+ * if a task successfully 'takes' the same mutex 5 times then the mutex will
+ * not be available to any other task until it has also  'given' the mutex back
+ * exactly five times.
+ *
+ * This type of semaphore uses a priority inheritance mechanism so a task
+ * 'taking' a semaphore MUST ALWAYS 'give' the semaphore back once the
+ * semaphore it is no longer required.
+ *
+ * Mutex type semaphores cannot be used from within interrupt service routines.
+ *
+ * See xSemaphoreCreateBinary() for an alternative implementation that can be
+ * used for pure synchronisation (where one task or interrupt always 'gives' the
+ * semaphore and another always 'takes' the semaphore) and from within interrupt
+ * service routines.
+ *
+ * @param pxMutexBuffer Must point to a variable of type StaticSemaphore_t,
+ * which will then be used to hold the recursive mutex's data structure,
+ * removing the need for the memory to be allocated dynamically.
+ *
+ * @return If the recursive mutex was successfully created then a handle to the
+ * created recursive mutex is returned.  If pxMutexBuffer was NULL then NULL is
+ * returned.
+ *
+ * Example usage:
+ 
+ SemaphoreHandle_t xSemaphore;
+ StaticSemaphore_t xMutexBuffer;
+
+ void vATask( void * pvParameters )
+ {
+    // A recursive semaphore cannot be used before it is created.  Here a
+    // recursive mutex is created using xSemaphoreCreateRecursiveMutexStatic().
+    // The address of xMutexBuffer is passed into the function, and will hold
+    // the mutexes data structures - so no dynamic memory allocation will be
+    // attempted.
+    xSemaphore = xSemaphoreCreateRecursiveMutexStatic( &xMutexBuffer );
+
+    // As no dynamic memory allocation was performed, xSemaphore cannot be NULL,
+    // so there is no need to check it.
+ }
+ 

+ * \defgroup xSemaphoreCreateRecursiveMutexStatic xSemaphoreCreateRecursiveMutexStatic
+ * \ingroup Semaphores
+ */
+#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configUSE_RECURSIVE_MUTEXES == 1 ) )
+	#define xSemaphoreCreateRecursiveMutexStatic( pxStaticSemaphore ) xQueueCreateMutexStatic( queueQUEUE_TYPE_RECURSIVE_MUTEX, pxStaticSemaphore )
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+/**
+ * semphr. h
+ * 
SemaphoreHandle_t xSemaphoreCreateCounting( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount )

+ *
+ * Creates a new counting semaphore instance, and returns a handle by which the
+ * new counting semaphore can be referenced.
+ *
+ * In many usage scenarios it is faster and more memory efficient to use a
+ * direct to task notification in place of a counting semaphore!
+ * http://www.freertos.org/RTOS-task-notifications.html
+ *
+ * Internally, within the FreeRTOS implementation, counting semaphores use a
+ * block of memory, in which the counting semaphore structure is stored.  If a
+ * counting semaphore is created using xSemaphoreCreateCounting() then the
+ * required memory is automatically dynamically allocated inside the
+ * xSemaphoreCreateCounting() function.  (see
+ * http://www.freertos.org/a00111.html).  If a counting semaphore is created
+ * using xSemaphoreCreateCountingStatic() then the application writer can
+ * instead optionally provide the memory that will get used by the counting
+ * semaphore.  xSemaphoreCreateCountingStatic() therefore allows a counting
+ * semaphore to be created without using any dynamic memory allocation.
+ *
+ * Counting semaphores are typically used for two things:
+ *
+ * 1) Counting events.
+ *
+ *    In this usage scenario an event handler will 'give' a semaphore each time
+ *    an event occurs (incrementing the semaphore count value), and a handler
+ *    task will 'take' a semaphore each time it processes an event
+ *    (decrementing the semaphore count value).  The count value is therefore
+ *    the difference between the number of events that have occurred and the
+ *    number that have been processed.  In this case it is desirable for the
+ *    initial count value to be zero.
+ *
+ * 2) Resource management.
+ *
+ *    In this usage scenario the count value indicates the number of resources
+ *    available.  To obtain control of a resource a task must first obtain a
+ *    semaphore - decrementing the semaphore count value.  When the count value
+ *    reaches zero there are no free resources.  When a task finishes with the
+ *    resource it 'gives' the semaphore back - incrementing the semaphore count
+ *    value.  In this case it is desirable for the initial count value to be
+ *    equal to the maximum count value, indicating that all resources are free.
+ *
+ * @param uxMaxCount The maximum count value that can be reached.  When the
+ *        semaphore reaches this value it can no longer be 'given'.
+ *
+ * @param uxInitialCount The count value assigned to the semaphore when it is
+ *        created.
+ *
+ * @return Handle to the created semaphore.  Null if the semaphore could not be
+ *         created.
+ *
+ * Example usage:
+ 
+ SemaphoreHandle_t xSemaphore;
+
+ void vATask( void * pvParameters )
+ {
+ SemaphoreHandle_t xSemaphore = NULL;
+
+    // Semaphore cannot be used before a call to xSemaphoreCreateCounting().
+    // The max value to which the semaphore can count should be 10, and the
+    // initial value assigned to the count should be 0.
+    xSemaphore = xSemaphoreCreateCounting( 10, 0 );
+
+    if( xSemaphore != NULL )
+    {
+        // The semaphore was created successfully.
+        // The semaphore can now be used.
+    }
+ }
+ 

+ * \defgroup xSemaphoreCreateCounting xSemaphoreCreateCounting
+ * \ingroup Semaphores
+ */
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+	#define xSemaphoreCreateCounting( uxMaxCount, uxInitialCount ) xQueueCreateCountingSemaphore( ( uxMaxCount ), ( uxInitialCount ) )
+#endif
+
+/**
+ * semphr. h
+ * 
SemaphoreHandle_t xSemaphoreCreateCountingStatic( UBaseType_t uxMaxCount, UBaseType_t uxInitialCount, StaticSemaphore_t *pxSemaphoreBuffer )

+ *
+ * Creates a new counting semaphore instance, and returns a handle by which the
+ * new counting semaphore can be referenced.
+ *
+ * In many usage scenarios it is faster and more memory efficient to use a
+ * direct to task notification in place of a counting semaphore!
+ * http://www.freertos.org/RTOS-task-notifications.html
+ *
+ * Internally, within the FreeRTOS implementation, counting semaphores use a
+ * block of memory, in which the counting semaphore structure is stored.  If a
+ * counting semaphore is created using xSemaphoreCreateCounting() then the
+ * required memory is automatically dynamically allocated inside the
+ * xSemaphoreCreateCounting() function.  (see
+ * http://www.freertos.org/a00111.html).  If a counting semaphore is created
+ * using xSemaphoreCreateCountingStatic() then the application writer must
+ * provide the memory.  xSemaphoreCreateCountingStatic() therefore allows a
+ * counting semaphore to be created without using any dynamic memory allocation.
+ *
+ * Counting semaphores are typically used for two things:
+ *
+ * 1) Counting events.
+ *
+ *    In this usage scenario an event handler will 'give' a semaphore each time
+ *    an event occurs (incrementing the semaphore count value), and a handler
+ *    task will 'take' a semaphore each time it processes an event
+ *    (decrementing the semaphore count value).  The count value is therefore
+ *    the difference between the number of events that have occurred and the
+ *    number that have been processed.  In this case it is desirable for the
+ *    initial count value to be zero.
+ *
+ * 2) Resource management.
+ *
+ *    In this usage scenario the count value indicates the number of resources
+ *    available.  To obtain control of a resource a task must first obtain a
+ *    semaphore - decrementing the semaphore count value.  When the count value
+ *    reaches zero there are no free resources.  When a task finishes with the
+ *    resource it 'gives' the semaphore back - incrementing the semaphore count
+ *    value.  In this case it is desirable for the initial count value to be
+ *    equal to the maximum count value, indicating that all resources are free.
+ *
+ * @param uxMaxCount The maximum count value that can be reached.  When the
+ *        semaphore reaches this value it can no longer be 'given'.
+ *
+ * @param uxInitialCount The count value assigned to the semaphore when it is
+ *        created.
+ *
+ * @param pxSemaphoreBuffer Must point to a variable of type StaticSemaphore_t,
+ * which will then be used to hold the semaphore's data structure, removing the
+ * need for the memory to be allocated dynamically.
+ *
+ * @return If the counting semaphore was successfully created then a handle to
+ * the created counting semaphore is returned.  If pxSemaphoreBuffer was NULL
+ * then NULL is returned.
+ *
+ * Example usage:
+ 
+ SemaphoreHandle_t xSemaphore;
+ StaticSemaphore_t xSemaphoreBuffer;
+
+ void vATask( void * pvParameters )
+ {
+ SemaphoreHandle_t xSemaphore = NULL;
+
+    // Counting semaphore cannot be used before they have been created.  Create
+    // a counting semaphore using xSemaphoreCreateCountingStatic().  The max
+    // value to which the semaphore can count is 10, and the initial value
+    // assigned to the count will be 0.  The address of xSemaphoreBuffer is
+    // passed in and will be used to hold the semaphore structure, so no dynamic
+    // memory allocation will be used.
+    xSemaphore = xSemaphoreCreateCounting( 10, 0, &xSemaphoreBuffer );
+
+    // No memory allocation was attempted so xSemaphore cannot be NULL, so there
+    // is no need to check its value.
+ }
+ 

+ * \defgroup xSemaphoreCreateCountingStatic xSemaphoreCreateCountingStatic
+ * \ingroup Semaphores
+ */
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+	#define xSemaphoreCreateCountingStatic( uxMaxCount, uxInitialCount, pxSemaphoreBuffer ) xQueueCreateCountingSemaphoreStatic( ( uxMaxCount ), ( uxInitialCount ), ( pxSemaphoreBuffer ) )
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+/**
+ * semphr. h
+ * 
void vSemaphoreDelete( SemaphoreHandle_t xSemaphore );

+ *
+ * Delete a semaphore.  This function must be used with care.  For example,
+ * do not delete a mutex type semaphore if the mutex is held by a task.
+ *
+ * @param xSemaphore A handle to the semaphore to be deleted.
+ *
+ * \defgroup vSemaphoreDelete vSemaphoreDelete
+ * \ingroup Semaphores
+ */
+#define vSemaphoreDelete( xSemaphore ) vQueueDelete( ( QueueHandle_t ) ( xSemaphore ) )
+
+/**
+ * semphr.h
+ * 
TaskHandle_t xSemaphoreGetMutexHolder( SemaphoreHandle_t xMutex );

+ *
+ * If xMutex is indeed a mutex type semaphore, return the current mutex holder.
+ * If xMutex is not a mutex type semaphore, or the mutex is available (not held
+ * by a task), return NULL.
+ *
+ * Note: This is a good way of determining if the calling task is the mutex
+ * holder, but not a good way of determining the identity of the mutex holder as
+ * the holder may change between the function exiting and the returned value
+ * being tested.
+ */
+#define xSemaphoreGetMutexHolder( xSemaphore ) xQueueGetMutexHolder( ( xSemaphore ) )
+
+/**
+ * semphr.h
+ * 
TaskHandle_t xSemaphoreGetMutexHolderFromISR( SemaphoreHandle_t xMutex );

+ *
+ * If xMutex is indeed a mutex type semaphore, return the current mutex holder.
+ * If xMutex is not a mutex type semaphore, or the mutex is available (not held
+ * by a task), return NULL.
+ *
+ */
+#define xSemaphoreGetMutexHolderFromISR( xSemaphore ) xQueueGetMutexHolderFromISR( ( xSemaphore ) )
+
+/**
+ * semphr.h
+ * 
UBaseType_t uxSemaphoreGetCount( SemaphoreHandle_t xSemaphore );

+ *
+ * If the semaphore is a counting semaphore then uxSemaphoreGetCount() returns
+ * its current count value.  If the semaphore is a binary semaphore then
+ * uxSemaphoreGetCount() returns 1 if the semaphore is available, and 0 if the
+ * semaphore is not available.
+ *
+ */
+#define uxSemaphoreGetCount( xSemaphore ) uxQueueMessagesWaiting( ( QueueHandle_t ) ( xSemaphore ) )
+
+#endif /* SEMAPHORE_H */
+
+
diff --git a/components/freertos/include/stack_macros.h b/components/freertos/include/stack_macros.h
new file mode 100644
index 00000000..18406bbf
--- /dev/null
+++ b/components/freertos/include/stack_macros.h
@@ -0,0 +1,129 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef STACK_MACROS_H
+#define STACK_MACROS_H
+
+/*
+ * Call the stack overflow hook function if the stack of the task being swapped
+ * out is currently overflowed, or looks like it might have overflowed in the
+ * past.
+ *
+ * Setting configCHECK_FOR_STACK_OVERFLOW to 1 will cause the macro to check
+ * the current stack state only - comparing the current top of stack value to
+ * the stack limit.  Setting configCHECK_FOR_STACK_OVERFLOW to greater than 1
+ * will also cause the last few stack bytes to be checked to ensure the value
+ * to which the bytes were set when the task was created have not been
+ * overwritten.  Note this second test does not guarantee that an overflowed
+ * stack will always be recognised.
+ */
+
+/*-----------------------------------------------------------*/
+
+#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH < 0 ) )
+
+	/* Only the current stack state is to be checked. */
+	#define taskCHECK_FOR_STACK_OVERFLOW()																\
+	{																									\
+		/* Is the currently saved stack pointer within the stack limit? */								\
+		if( pxCurrentTCB->pxTopOfStack <= pxCurrentTCB->pxStack )										\
+		{																								\
+			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );	\
+		}																								\
+	}
+
+#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
+/*-----------------------------------------------------------*/
+
+#if( ( configCHECK_FOR_STACK_OVERFLOW == 1 ) && ( portSTACK_GROWTH > 0 ) )
+
+	/* Only the current stack state is to be checked. */
+	#define taskCHECK_FOR_STACK_OVERFLOW()																\
+	{																									\
+																										\
+		/* Is the currently saved stack pointer within the stack limit? */								\
+		if( pxCurrentTCB->pxTopOfStack >= pxCurrentTCB->pxEndOfStack )									\
+		{																								\
+			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );	\
+		}																								\
+	}
+
+#endif /* configCHECK_FOR_STACK_OVERFLOW == 1 */
+/*-----------------------------------------------------------*/
+
+#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH < 0 ) )
+
+	#define taskCHECK_FOR_STACK_OVERFLOW()																\
+	{																									\
+		const uint32_t * const pulStack = ( uint32_t * ) pxCurrentTCB->pxStack;							\
+		const uint32_t ulCheckValue = ( uint32_t ) 0xa5a5a5a5;											\
+																										\
+		if( ( pulStack[ 0 ] != ulCheckValue ) ||														\
+			( pulStack[ 1 ] != ulCheckValue ) ||														\
+			( pulStack[ 2 ] != ulCheckValue ) ||														\
+			( pulStack[ 3 ] != ulCheckValue ) )															\
+		{																								\
+			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );	\
+		}																								\
+	}
+
+#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
+/*-----------------------------------------------------------*/
+
+#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) && ( portSTACK_GROWTH > 0 ) )
+
+	#define taskCHECK_FOR_STACK_OVERFLOW()																								\
+	{																																	\
+	int8_t *pcEndOfStack = ( int8_t * ) pxCurrentTCB->pxEndOfStack;																		\
+	static const uint8_t ucExpectedStackBytes[] = {	tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
+													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
+													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
+													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE,		\
+													tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE, tskSTACK_FILL_BYTE };	\
+																																		\
+																																		\
+		pcEndOfStack -= sizeof( ucExpectedStackBytes );																					\
+																																		\
+		/* Has the extremity of the task stack ever been written over? */																\
+		if( memcmp( ( void * ) pcEndOfStack, ( void * ) ucExpectedStackBytes, sizeof( ucExpectedStackBytes ) ) != 0 )					\
+		{																																\
+			vApplicationStackOverflowHook( ( TaskHandle_t ) pxCurrentTCB, pxCurrentTCB->pcTaskName );									\
+		}																																\
+	}
+
+#endif /* #if( configCHECK_FOR_STACK_OVERFLOW > 1 ) */
+/*-----------------------------------------------------------*/
+
+/* Remove stack overflow macro if not being used. */
+#ifndef taskCHECK_FOR_STACK_OVERFLOW
+	#define taskCHECK_FOR_STACK_OVERFLOW()
+#endif
+
+
+
+#endif /* STACK_MACROS_H */
+
diff --git a/components/freertos/include/stdint.readme b/components/freertos/include/stdint.readme
new file mode 100644
index 00000000..4414c29e
--- /dev/null
+++ b/components/freertos/include/stdint.readme
@@ -0,0 +1,27 @@
+
+#ifndef FREERTOS_STDINT
+#define FREERTOS_STDINT
+
+/*******************************************************************************
+ * THIS IS NOT A FULL stdint.h IMPLEMENTATION - It only contains the definitions
+ * necessary to build the FreeRTOS code.  It is provided to allow FreeRTOS to be
+ * built using compilers that do not provide their own stdint.h definition.
+ *
+ * To use this file:
+ *
+ *    1) Copy this file into the directory that contains your FreeRTOSConfig.h
+ *       header file, as that directory will already be in the compilers include
+ *       path.
+ *
+ *    2) Rename the copied file stdint.h.
+ *
+ */
+
+typedef signed char int8_t;
+typedef unsigned char uint8_t;
+typedef short int16_t;
+typedef unsigned short uint16_t;
+typedef long int32_t;
+typedef unsigned long uint32_t;
+
+#endif /* FREERTOS_STDINT */
diff --git a/components/freertos/include/stream_buffer.h b/components/freertos/include/stream_buffer.h
new file mode 100644
index 00000000..b6311b88
--- /dev/null
+++ b/components/freertos/include/stream_buffer.h
@@ -0,0 +1,859 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/*
+ * Stream buffers are used to send a continuous stream of data from one task or
+ * interrupt to another.  Their implementation is light weight, making them
+ * particularly suited for interrupt to task and core to core communication
+ * scenarios.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xStreamBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xStreamBufferRead()) inside a critical section section and set the
+ * receive block time to 0.
+ *
+ */
+
+#ifndef STREAM_BUFFER_H
+#define STREAM_BUFFER_H
+
+#ifndef INC_FREERTOS_H
+	#error "include FreeRTOS.h must appear in source files before include stream_buffer.h"
+#endif
+
+#if defined( __cplusplus )
+extern "C" {
+#endif
+
+/**
+ * Type by which stream buffers are referenced.  For example, a call to
+ * xStreamBufferCreate() returns an StreamBufferHandle_t variable that can
+ * then be used as a parameter to xStreamBufferSend(), xStreamBufferReceive(),
+ * etc.
+ */
+struct StreamBufferDef_t;
+typedef struct StreamBufferDef_t * StreamBufferHandle_t;
+
+
+/**
+ * message_buffer.h
+ *
+
+StreamBufferHandle_t xStreamBufferCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes );
+

+ *
+ * Creates a new stream buffer using dynamically allocated memory.  See
+ * xStreamBufferCreateStatic() for a version that uses statically allocated
+ * memory (memory that is allocated at compile time).
+ *
+ * configSUPPORT_DYNAMIC_ALLOCATION must be set to 1 or left undefined in
+ * FreeRTOSConfig.h for xStreamBufferCreate() to be available.
+ *
+ * @param xBufferSizeBytes The total number of bytes the stream buffer will be
+ * able to hold at any one time.
+ *
+ * @param xTriggerLevelBytes The number of bytes that must be in the stream
+ * buffer before a task that is blocked on the stream buffer to wait for data is
+ * moved out of the blocked state.  For example, if a task is blocked on a read
+ * of an empty stream buffer that has a trigger level of 1 then the task will be
+ * unblocked when a single byte is written to the buffer or the task's block
+ * time expires.  As another example, if a task is blocked on a read of an empty
+ * stream buffer that has a trigger level of 10 then the task will not be
+ * unblocked until the stream buffer contains at least 10 bytes or the task's
+ * block time expires.  If a reading task's block time expires before the
+ * trigger level is reached then the task will still receive however many bytes
+ * are actually available.  Setting a trigger level of 0 will result in a
+ * trigger level of 1 being used.  It is not valid to specify a trigger level
+ * that is greater than the buffer size.
+ *
+ * @return If NULL is returned, then the stream buffer cannot be created
+ * because there is insufficient heap memory available for FreeRTOS to allocate
+ * the stream buffer data structures and storage area.  A non-NULL value being
+ * returned indicates that the stream buffer has been created successfully -
+ * the returned value should be stored as the handle to the created stream
+ * buffer.
+ *
+ * Example use:
+
+
+void vAFunction( void )
+{
+StreamBufferHandle_t xStreamBuffer;
+const size_t xStreamBufferSizeBytes = 100, xTriggerLevel = 10;
+
+    // Create a stream buffer that can hold 100 bytes.  The memory used to hold
+    // both the stream buffer structure and the data in the stream buffer is
+    // allocated dynamically.
+    xStreamBuffer = xStreamBufferCreate( xStreamBufferSizeBytes, xTriggerLevel );
+
+    if( xStreamBuffer == NULL )
+    {
+        // There was not enough heap memory space available to create the
+        // stream buffer.
+    }
+    else
+    {
+        // The stream buffer was created successfully and can now be used.
+    }
+}
+

+ * \defgroup xStreamBufferCreate xStreamBufferCreate
+ * \ingroup StreamBufferManagement
+ */
+#define xStreamBufferCreate( xBufferSizeBytes, xTriggerLevelBytes ) xStreamBufferGenericCreate( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE )
+
+/**
+ * stream_buffer.h
+ *
+
+StreamBufferHandle_t xStreamBufferCreateStatic( size_t xBufferSizeBytes,
+                                                size_t xTriggerLevelBytes,
+                                                uint8_t *pucStreamBufferStorageArea,
+                                                StaticStreamBuffer_t *pxStaticStreamBuffer );
+

+ * Creates a new stream buffer using statically allocated memory.  See
+ * xStreamBufferCreate() for a version that uses dynamically allocated memory.
+ *
+ * configSUPPORT_STATIC_ALLOCATION must be set to 1 in FreeRTOSConfig.h for
+ * xStreamBufferCreateStatic() to be available.
+ *
+ * @param xBufferSizeBytes The size, in bytes, of the buffer pointed to by the
+ * pucStreamBufferStorageArea parameter.
+ *
+ * @param xTriggerLevelBytes The number of bytes that must be in the stream
+ * buffer before a task that is blocked on the stream buffer to wait for data is
+ * moved out of the blocked state.  For example, if a task is blocked on a read
+ * of an empty stream buffer that has a trigger level of 1 then the task will be
+ * unblocked when a single byte is written to the buffer or the task's block
+ * time expires.  As another example, if a task is blocked on a read of an empty
+ * stream buffer that has a trigger level of 10 then the task will not be
+ * unblocked until the stream buffer contains at least 10 bytes or the task's
+ * block time expires.  If a reading task's block time expires before the
+ * trigger level is reached then the task will still receive however many bytes
+ * are actually available.  Setting a trigger level of 0 will result in a
+ * trigger level of 1 being used.  It is not valid to specify a trigger level
+ * that is greater than the buffer size.
+ *
+ * @param pucStreamBufferStorageArea Must point to a uint8_t array that is at
+ * least xBufferSizeBytes + 1 big.  This is the array to which streams are
+ * copied when they are written to the stream buffer.
+ *
+ * @param pxStaticStreamBuffer Must point to a variable of type
+ * StaticStreamBuffer_t, which will be used to hold the stream buffer's data
+ * structure.
+ *
+ * @return If the stream buffer is created successfully then a handle to the
+ * created stream buffer is returned. If either pucStreamBufferStorageArea or
+ * pxStaticstreamBuffer are NULL then NULL is returned.
+ *
+ * Example use:
+
+
+// Used to dimension the array used to hold the streams.  The available space
+// will actually be one less than this, so 999.
+#define STORAGE_SIZE_BYTES 1000
+
+// Defines the memory that will actually hold the streams within the stream
+// buffer.
+static uint8_t ucStorageBuffer[ STORAGE_SIZE_BYTES ];
+
+// The variable used to hold the stream buffer structure.
+StaticStreamBuffer_t xStreamBufferStruct;
+
+void MyFunction( void )
+{
+StreamBufferHandle_t xStreamBuffer;
+const size_t xTriggerLevel = 1;
+
+    xStreamBuffer = xStreamBufferCreateStatic( sizeof( ucBufferStorage ),
+                                               xTriggerLevel,
+                                               ucBufferStorage,
+                                               &xStreamBufferStruct );
+
+    // As neither the pucStreamBufferStorageArea or pxStaticStreamBuffer
+    // parameters were NULL, xStreamBuffer will not be NULL, and can be used to
+    // reference the created stream buffer in other stream buffer API calls.
+
+    // Other code that uses the stream buffer can go here.
+}
+
+

+ * \defgroup xStreamBufferCreateStatic xStreamBufferCreateStatic
+ * \ingroup StreamBufferManagement
+ */
+#define xStreamBufferCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pucStreamBufferStorageArea, pxStaticStreamBuffer ) xStreamBufferGenericCreateStatic( xBufferSizeBytes, xTriggerLevelBytes, pdFALSE, pucStreamBufferStorageArea, pxStaticStreamBuffer )
+
+/**
+ * stream_buffer.h
+ *
+
+size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
+                          const void *pvTxData,
+                          size_t xDataLengthBytes,
+                          TickType_t xTicksToWait );
+

+ *
+ * Sends bytes to a stream buffer.  The bytes are copied into the stream buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xStreamBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xStreamBufferRead()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xStreamBufferSend() to write to a stream buffer from a task.  Use
+ * xStreamBufferSendFromISR() to write to a stream buffer from an interrupt
+ * service routine (ISR).
+ *
+ * @param xStreamBuffer The handle of the stream buffer to which a stream is
+ * being sent.
+ *
+ * @param pvTxData A pointer to the buffer that holds the bytes to be copied
+ * into the stream buffer.
+ *
+ * @param xDataLengthBytes   The maximum number of bytes to copy from pvTxData
+ * into the stream buffer.
+ *
+ * @param xTicksToWait The maximum amount of time the task should remain in the
+ * Blocked state to wait for enough space to become available in the stream
+ * buffer, should the stream buffer contain too little space to hold the
+ * another xDataLengthBytes bytes.  The block time is specified in tick periods,
+ * so the absolute time it represents is dependent on the tick frequency.  The
+ * macro pdMS_TO_TICKS() can be used to convert a time specified in milliseconds
+ * into a time specified in ticks.  Setting xTicksToWait to portMAX_DELAY will
+ * cause the task to wait indefinitely (without timing out), provided
+ * INCLUDE_vTaskSuspend is set to 1 in FreeRTOSConfig.h.  If a task times out
+ * before it can write all xDataLengthBytes into the buffer it will still write
+ * as many bytes as possible.  A task does not use any CPU time when it is in
+ * the blocked state.
+ *
+ * @return The number of bytes written to the stream buffer.  If a task times
+ * out before it can write all xDataLengthBytes into the buffer it will still
+ * write as many bytes as possible.
+ *
+ * Example use:
+
+void vAFunction( StreamBufferHandle_t xStreamBuffer )
+{
+size_t xBytesSent;
+uint8_t ucArrayToSend[] = { 0, 1, 2, 3 };
+char *pcStringToSend = "String to send";
+const TickType_t x100ms = pdMS_TO_TICKS( 100 );
+
+    // Send an array to the stream buffer, blocking for a maximum of 100ms to
+    // wait for enough space to be available in the stream buffer.
+    xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) ucArrayToSend, sizeof( ucArrayToSend ), x100ms );
+
+    if( xBytesSent != sizeof( ucArrayToSend ) )
+    {
+        // The call to xStreamBufferSend() times out before there was enough
+        // space in the buffer for the data to be written, but it did
+        // successfully write xBytesSent bytes.
+    }
+
+    // Send the string to the stream buffer.  Return immediately if there is not
+    // enough space in the buffer.
+    xBytesSent = xStreamBufferSend( xStreamBuffer, ( void * ) pcStringToSend, strlen( pcStringToSend ), 0 );
+
+    if( xBytesSent != strlen( pcStringToSend ) )
+    {
+        // The entire string could not be added to the stream buffer because
+        // there was not enough free space in the buffer, but xBytesSent bytes
+        // were sent.  Could try again to send the remaining bytes.
+    }
+}
+

+ * \defgroup xStreamBufferSend xStreamBufferSend
+ * \ingroup StreamBufferManagement
+ */
+size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
+						  const void *pvTxData,
+						  size_t xDataLengthBytes,
+						  TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+
+size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
+                                 const void *pvTxData,
+                                 size_t xDataLengthBytes,
+                                 BaseType_t *pxHigherPriorityTaskWoken );
+

+ *
+ * Interrupt safe version of the API function that sends a stream of bytes to
+ * the stream buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xStreamBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xStreamBufferRead()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xStreamBufferSend() to write to a stream buffer from a task.  Use
+ * xStreamBufferSendFromISR() to write to a stream buffer from an interrupt
+ * service routine (ISR).
+ *
+ * @param xStreamBuffer The handle of the stream buffer to which a stream is
+ * being sent.
+ *
+ * @param pvTxData A pointer to the data that is to be copied into the stream
+ * buffer.
+ *
+ * @param xDataLengthBytes The maximum number of bytes to copy from pvTxData
+ * into the stream buffer.
+ *
+ * @param pxHigherPriorityTaskWoken  It is possible that a stream buffer will
+ * have a task blocked on it waiting for data.  Calling
+ * xStreamBufferSendFromISR() can make data available, and so cause a task that
+ * was waiting for data to leave the Blocked state.  If calling
+ * xStreamBufferSendFromISR() causes a task to leave the Blocked state, and the
+ * unblocked task has a priority higher than the currently executing task (the
+ * task that was interrupted), then, internally, xStreamBufferSendFromISR()
+ * will set *pxHigherPriorityTaskWoken to pdTRUE.  If
+ * xStreamBufferSendFromISR() sets this value to pdTRUE, then normally a
+ * context switch should be performed before the interrupt is exited.  This will
+ * ensure that the interrupt returns directly to the highest priority Ready
+ * state task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it
+ * is passed into the function.  See the example code below for an example.
+ *
+ * @return The number of bytes actually written to the stream buffer, which will
+ * be less than xDataLengthBytes if the stream buffer didn't have enough free
+ * space for all the bytes to be written.
+ *
+ * Example use:
+
+// A stream buffer that has already been created.
+StreamBufferHandle_t xStreamBuffer;
+
+void vAnInterruptServiceRoutine( void )
+{
+size_t xBytesSent;
+char *pcStringToSend = "String to send";
+BaseType_t xHigherPriorityTaskWoken = pdFALSE; // Initialised to pdFALSE.
+
+    // Attempt to send the string to the stream buffer.
+    xBytesSent = xStreamBufferSendFromISR( xStreamBuffer,
+                                           ( void * ) pcStringToSend,
+                                           strlen( pcStringToSend ),
+                                           &xHigherPriorityTaskWoken );
+
+    if( xBytesSent != strlen( pcStringToSend ) )
+    {
+        // There was not enough free space in the stream buffer for the entire
+        // string to be written, ut xBytesSent bytes were written.
+    }
+
+    // If xHigherPriorityTaskWoken was set to pdTRUE inside
+    // xStreamBufferSendFromISR() then a task that has a priority above the
+    // priority of the currently executing task was unblocked and a context
+    // switch should be performed to ensure the ISR returns to the unblocked
+    // task.  In most FreeRTOS ports this is done by simply passing
+    // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the
+    // variables value, and perform the context switch if necessary.  Check the
+    // documentation for the port in use for port specific instructions.
+    taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+}
+

+ * \defgroup xStreamBufferSendFromISR xStreamBufferSendFromISR
+ * \ingroup StreamBufferManagement
+ */
+size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
+								 const void *pvTxData,
+								 size_t xDataLengthBytes,
+								 BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+
+size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
+                             void *pvRxData,
+                             size_t xBufferLengthBytes,
+                             TickType_t xTicksToWait );
+

+ *
+ * Receives bytes from a stream buffer.
+ *
+ * ***NOTE***:  Uniquely among FreeRTOS objects, the stream buffer
+ * implementation (so also the message buffer implementation, as message buffers
+ * are built on top of stream buffers) assumes there is only one task or
+ * interrupt that will write to the buffer (the writer), and only one task or
+ * interrupt that will read from the buffer (the reader).  It is safe for the
+ * writer and reader to be different tasks or interrupts, but, unlike other
+ * FreeRTOS objects, it is not safe to have multiple different writers or
+ * multiple different readers.  If there are to be multiple different writers
+ * then the application writer must place each call to a writing API function
+ * (such as xStreamBufferSend()) inside a critical section and set the send
+ * block time to 0.  Likewise, if there are to be multiple different readers
+ * then the application writer must place each call to a reading API function
+ * (such as xStreamBufferRead()) inside a critical section and set the receive
+ * block time to 0.
+ *
+ * Use xStreamBufferReceive() to read from a stream buffer from a task.  Use
+ * xStreamBufferReceiveFromISR() to read from a stream buffer from an
+ * interrupt service routine (ISR).
+ *
+ * @param xStreamBuffer The handle of the stream buffer from which bytes are to
+ * be received.
+ *
+ * @param pvRxData A pointer to the buffer into which the received bytes will be
+ * copied.
+ *
+ * @param xBufferLengthBytes The length of the buffer pointed to by the
+ * pvRxData parameter.  This sets the maximum number of bytes to receive in one
+ * call.  xStreamBufferReceive will return as many bytes as possible up to a
+ * maximum set by xBufferLengthBytes.
+ *
+ * @param xTicksToWait The maximum amount of time the task should remain in the
+ * Blocked state to wait for data to become available if the stream buffer is
+ * empty.  xStreamBufferReceive() will return immediately if xTicksToWait is
+ * zero.  The block time is specified in tick periods, so the absolute time it
+ * represents is dependent on the tick frequency.  The macro pdMS_TO_TICKS() can
+ * be used to convert a time specified in milliseconds into a time specified in
+ * ticks.  Setting xTicksToWait to portMAX_DELAY will cause the task to wait
+ * indefinitely (without timing out), provided INCLUDE_vTaskSuspend is set to 1
+ * in FreeRTOSConfig.h.  A task does not use any CPU time when it is in the
+ * Blocked state.
+ *
+ * @return The number of bytes actually read from the stream buffer, which will
+ * be less than xBufferLengthBytes if the call to xStreamBufferReceive() timed
+ * out before xBufferLengthBytes were available.
+ *
+ * Example use:
+
+void vAFunction( StreamBuffer_t xStreamBuffer )
+{
+uint8_t ucRxData[ 20 ];
+size_t xReceivedBytes;
+const TickType_t xBlockTime = pdMS_TO_TICKS( 20 );
+
+    // Receive up to another sizeof( ucRxData ) bytes from the stream buffer.
+    // Wait in the Blocked state (so not using any CPU processing time) for a
+    // maximum of 100ms for the full sizeof( ucRxData ) number of bytes to be
+    // available.
+    xReceivedBytes = xStreamBufferReceive( xStreamBuffer,
+                                           ( void * ) ucRxData,
+                                           sizeof( ucRxData ),
+                                           xBlockTime );
+
+    if( xReceivedBytes > 0 )
+    {
+        // A ucRxData contains another xRecievedBytes bytes of data, which can
+        // be processed here....
+    }
+}
+

+ * \defgroup xStreamBufferReceive xStreamBufferReceive
+ * \ingroup StreamBufferManagement
+ */
+size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
+							 void *pvRxData,
+							 size_t xBufferLengthBytes,
+							 TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+
+size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
+                                    void *pvRxData,
+                                    size_t xBufferLengthBytes,
+                                    BaseType_t *pxHigherPriorityTaskWoken );
+

+ *
+ * An interrupt safe version of the API function that receives bytes from a
+ * stream buffer.
+ *
+ * Use xStreamBufferReceive() to read bytes from a stream buffer from a task.
+ * Use xStreamBufferReceiveFromISR() to read bytes from a stream buffer from an
+ * interrupt service routine (ISR).
+ *
+ * @param xStreamBuffer The handle of the stream buffer from which a stream
+ * is being received.
+ *
+ * @param pvRxData A pointer to the buffer into which the received bytes are
+ * copied.
+ *
+ * @param xBufferLengthBytes The length of the buffer pointed to by the
+ * pvRxData parameter.  This sets the maximum number of bytes to receive in one
+ * call.  xStreamBufferReceive will return as many bytes as possible up to a
+ * maximum set by xBufferLengthBytes.
+ *
+ * @param pxHigherPriorityTaskWoken  It is possible that a stream buffer will
+ * have a task blocked on it waiting for space to become available.  Calling
+ * xStreamBufferReceiveFromISR() can make space available, and so cause a task
+ * that is waiting for space to leave the Blocked state.  If calling
+ * xStreamBufferReceiveFromISR() causes a task to leave the Blocked state, and
+ * the unblocked task has a priority higher than the currently executing task
+ * (the task that was interrupted), then, internally,
+ * xStreamBufferReceiveFromISR() will set *pxHigherPriorityTaskWoken to pdTRUE.
+ * If xStreamBufferReceiveFromISR() sets this value to pdTRUE, then normally a
+ * context switch should be performed before the interrupt is exited.  That will
+ * ensure the interrupt returns directly to the highest priority Ready state
+ * task.  *pxHigherPriorityTaskWoken should be set to pdFALSE before it is
+ * passed into the function.  See the code example below for an example.
+ *
+ * @return The number of bytes read from the stream buffer, if any.
+ *
+ * Example use:
+
+// A stream buffer that has already been created.
+StreamBuffer_t xStreamBuffer;
+
+void vAnInterruptServiceRoutine( void )
+{
+uint8_t ucRxData[ 20 ];
+size_t xReceivedBytes;
+BaseType_t xHigherPriorityTaskWoken = pdFALSE;  // Initialised to pdFALSE.
+
+    // Receive the next stream from the stream buffer.
+    xReceivedBytes = xStreamBufferReceiveFromISR( xStreamBuffer,
+                                                  ( void * ) ucRxData,
+                                                  sizeof( ucRxData ),
+                                                  &xHigherPriorityTaskWoken );
+
+    if( xReceivedBytes > 0 )
+    {
+        // ucRxData contains xReceivedBytes read from the stream buffer.
+        // Process the stream here....
+    }
+
+    // If xHigherPriorityTaskWoken was set to pdTRUE inside
+    // xStreamBufferReceiveFromISR() then a task that has a priority above the
+    // priority of the currently executing task was unblocked and a context
+    // switch should be performed to ensure the ISR returns to the unblocked
+    // task.  In most FreeRTOS ports this is done by simply passing
+    // xHigherPriorityTaskWoken into taskYIELD_FROM_ISR(), which will test the
+    // variables value, and perform the context switch if necessary.  Check the
+    // documentation for the port in use for port specific instructions.
+    taskYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+}
+

+ * \defgroup xStreamBufferReceiveFromISR xStreamBufferReceiveFromISR
+ * \ingroup StreamBufferManagement
+ */
+size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
+									void *pvRxData,
+									size_t xBufferLengthBytes,
+									BaseType_t * const pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+
+void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer );
+

+ *
+ * Deletes a stream buffer that was previously created using a call to
+ * xStreamBufferCreate() or xStreamBufferCreateStatic().  If the stream
+ * buffer was created using dynamic memory (that is, by xStreamBufferCreate()),
+ * then the allocated memory is freed.
+ *
+ * A stream buffer handle must not be used after the stream buffer has been
+ * deleted.
+ *
+ * @param xStreamBuffer The handle of the stream buffer to be deleted.
+ *
+ * \defgroup vStreamBufferDelete vStreamBufferDelete
+ * \ingroup StreamBufferManagement
+ */
+void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+
+BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer );
+

+ *
+ * Queries a stream buffer to see if it is full.  A stream buffer is full if it
+ * does not have any free space, and therefore cannot accept any more data.
+ *
+ * @param xStreamBuffer The handle of the stream buffer being queried.
+ *
+ * @return If the stream buffer is full then pdTRUE is returned.  Otherwise
+ * pdFALSE is returned.
+ *
+ * \defgroup xStreamBufferIsFull xStreamBufferIsFull
+ * \ingroup StreamBufferManagement
+ */
+BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+
+BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer );
+

+ *
+ * Queries a stream buffer to see if it is empty.  A stream buffer is empty if
+ * it does not contain any data.
+ *
+ * @param xStreamBuffer The handle of the stream buffer being queried.
+ *
+ * @return If the stream buffer is empty then pdTRUE is returned.  Otherwise
+ * pdFALSE is returned.
+ *
+ * \defgroup xStreamBufferIsEmpty xStreamBufferIsEmpty
+ * \ingroup StreamBufferManagement
+ */
+BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+
+BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer );
+

+ *
+ * Resets a stream buffer to its initial, empty, state.  Any data that was in
+ * the stream buffer is discarded.  A stream buffer can only be reset if there
+ * are no tasks blocked waiting to either send to or receive from the stream
+ * buffer.
+ *
+ * @param xStreamBuffer The handle of the stream buffer being reset.
+ *
+ * @return If the stream buffer is reset then pdPASS is returned.  If there was
+ * a task blocked waiting to send to or read from the stream buffer then the
+ * stream buffer is not reset and pdFAIL is returned.
+ *
+ * \defgroup xStreamBufferReset xStreamBufferReset
+ * \ingroup StreamBufferManagement
+ */
+BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+
+size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer );
+

+ *
+ * Queries a stream buffer to see how much free space it contains, which is
+ * equal to the amount of data that can be sent to the stream buffer before it
+ * is full.
+ *
+ * @param xStreamBuffer The handle of the stream buffer being queried.
+ *
+ * @return The number of bytes that can be written to the stream buffer before
+ * the stream buffer would be full.
+ *
+ * \defgroup xStreamBufferSpacesAvailable xStreamBufferSpacesAvailable
+ * \ingroup StreamBufferManagement
+ */
+size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+
+size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer );
+

+ *
+ * Queries a stream buffer to see how much data it contains, which is equal to
+ * the number of bytes that can be read from the stream buffer before the stream
+ * buffer would be empty.
+ *
+ * @param xStreamBuffer The handle of the stream buffer being queried.
+ *
+ * @return The number of bytes that can be read from the stream buffer before
+ * the stream buffer would be empty.
+ *
+ * \defgroup xStreamBufferBytesAvailable xStreamBufferBytesAvailable
+ * \ingroup StreamBufferManagement
+ */
+size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+
+BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel );
+

+ *
+ * A stream buffer's trigger level is the number of bytes that must be in the
+ * stream buffer before a task that is blocked on the stream buffer to
+ * wait for data is moved out of the blocked state.  For example, if a task is
+ * blocked on a read of an empty stream buffer that has a trigger level of 1
+ * then the task will be unblocked when a single byte is written to the buffer
+ * or the task's block time expires.  As another example, if a task is blocked
+ * on a read of an empty stream buffer that has a trigger level of 10 then the
+ * task will not be unblocked until the stream buffer contains at least 10 bytes
+ * or the task's block time expires.  If a reading task's block time expires
+ * before the trigger level is reached then the task will still receive however
+ * many bytes are actually available.  Setting a trigger level of 0 will result
+ * in a trigger level of 1 being used.  It is not valid to specify a trigger
+ * level that is greater than the buffer size.
+ *
+ * A trigger level is set when the stream buffer is created, and can be modified
+ * using xStreamBufferSetTriggerLevel().
+ *
+ * @param xStreamBuffer The handle of the stream buffer being updated.
+ *
+ * @param xTriggerLevel The new trigger level for the stream buffer.
+ *
+ * @return If xTriggerLevel was less than or equal to the stream buffer's length
+ * then the trigger level will be updated and pdTRUE is returned.  Otherwise
+ * pdFALSE is returned.
+ *
+ * \defgroup xStreamBufferSetTriggerLevel xStreamBufferSetTriggerLevel
+ * \ingroup StreamBufferManagement
+ */
+BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+
+BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
+

+ *
+ * For advanced users only.
+ *
+ * The sbSEND_COMPLETED() macro is called from within the FreeRTOS APIs when
+ * data is sent to a message buffer or stream buffer.  If there was a task that
+ * was blocked on the message or stream buffer waiting for data to arrive then
+ * the sbSEND_COMPLETED() macro sends a notification to the task to remove it
+ * from the Blocked state.  xStreamBufferSendCompletedFromISR() does the same
+ * thing.  It is provided to enable application writers to implement their own
+ * version of sbSEND_COMPLETED(), and MUST NOT BE USED AT ANY OTHER TIME.
+ *
+ * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
+ * additional information.
+ *
+ * @param xStreamBuffer The handle of the stream buffer to which data was
+ * written.
+ *
+ * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be
+ * initialised to pdFALSE before it is passed into
+ * xStreamBufferSendCompletedFromISR().  If calling
+ * xStreamBufferSendCompletedFromISR() removes a task from the Blocked state,
+ * and the task has a priority above the priority of the currently running task,
+ * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a
+ * context switch should be performed before exiting the ISR.
+ *
+ * @return If a task was removed from the Blocked state then pdTRUE is returned.
+ * Otherwise pdFALSE is returned.
+ *
+ * \defgroup xStreamBufferSendCompletedFromISR xStreamBufferSendCompletedFromISR
+ * \ingroup StreamBufferManagement
+ */
+BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/**
+ * stream_buffer.h
+ *
+
+BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken );
+

+ *
+ * For advanced users only.
+ *
+ * The sbRECEIVE_COMPLETED() macro is called from within the FreeRTOS APIs when
+ * data is read out of a message buffer or stream buffer.  If there was a task
+ * that was blocked on the message or stream buffer waiting for data to arrive
+ * then the sbRECEIVE_COMPLETED() macro sends a notification to the task to
+ * remove it from the Blocked state.  xStreamBufferReceiveCompletedFromISR()
+ * does the same thing.  It is provided to enable application writers to
+ * implement their own version of sbRECEIVE_COMPLETED(), and MUST NOT BE USED AT
+ * ANY OTHER TIME.
+ *
+ * See the example implemented in FreeRTOS/Demo/Minimal/MessageBufferAMP.c for
+ * additional information.
+ *
+ * @param xStreamBuffer The handle of the stream buffer from which data was
+ * read.
+ *
+ * @param pxHigherPriorityTaskWoken *pxHigherPriorityTaskWoken should be
+ * initialised to pdFALSE before it is passed into
+ * xStreamBufferReceiveCompletedFromISR().  If calling
+ * xStreamBufferReceiveCompletedFromISR() removes a task from the Blocked state,
+ * and the task has a priority above the priority of the currently running task,
+ * then *pxHigherPriorityTaskWoken will get set to pdTRUE indicating that a
+ * context switch should be performed before exiting the ISR.
+ *
+ * @return If a task was removed from the Blocked state then pdTRUE is returned.
+ * Otherwise pdFALSE is returned.
+ *
+ * \defgroup xStreamBufferReceiveCompletedFromISR xStreamBufferReceiveCompletedFromISR
+ * \ingroup StreamBufferManagement
+ */
+BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/* Functions below here are not part of the public API. */
+StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes,
+												 size_t xTriggerLevelBytes,
+												 BaseType_t xIsMessageBuffer ) PRIVILEGED_FUNCTION;
+
+StreamBufferHandle_t xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
+													   size_t xTriggerLevelBytes,
+													   BaseType_t xIsMessageBuffer,
+													   uint8_t * const pucStreamBufferStorageArea,
+													   StaticStreamBuffer_t * const pxStaticStreamBuffer ) PRIVILEGED_FUNCTION;
+
+size_t xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+
+#if( configUSE_TRACE_FACILITY == 1 )
+	void vStreamBufferSetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer, UBaseType_t uxStreamBufferNumber ) PRIVILEGED_FUNCTION;
+	UBaseType_t uxStreamBufferGetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+	uint8_t ucStreamBufferGetStreamBufferType( StreamBufferHandle_t xStreamBuffer ) PRIVILEGED_FUNCTION;
+#endif
+
+#if defined( __cplusplus )
+}
+#endif
+
+#endif	/* !defined( STREAM_BUFFER_H ) */
diff --git a/components/freertos/include/task.h b/components/freertos/include/task.h
new file mode 100644
index 00000000..db3c4ebe
--- /dev/null
+++ b/components/freertos/include/task.h
@@ -0,0 +1,2434 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef INC_TASK_H
+#define INC_TASK_H
+
+#ifndef INC_FREERTOS_H
+	#error "include FreeRTOS.h must appear in source files before include task.h"
+#endif
+
+#include "list.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*-----------------------------------------------------------
+ * MACROS AND DEFINITIONS
+ *----------------------------------------------------------*/
+
+#define tskKERNEL_VERSION_NUMBER "V10.2.1"
+#define tskKERNEL_VERSION_MAJOR 10
+#define tskKERNEL_VERSION_MINOR 2
+#define tskKERNEL_VERSION_BUILD 1
+
+/* MPU region parameters passed in ulParameters
+ * of MemoryRegion_t struct. */
+#define tskMPU_REGION_READ_ONLY			( 1UL << 0UL )
+#define tskMPU_REGION_READ_WRITE		( 1UL << 1UL )
+#define tskMPU_REGION_EXECUTE_NEVER		( 1UL << 2UL )
+#define tskMPU_REGION_NORMAL_MEMORY		( 1UL << 3UL )
+#define tskMPU_REGION_DEVICE_MEMORY		( 1UL << 4UL )
+
+/**
+ * task. h
+ *
+ * Type by which tasks are referenced.  For example, a call to xTaskCreate
+ * returns (via a pointer parameter) an TaskHandle_t variable that can then
+ * be used as a parameter to vTaskDelete to delete the task.
+ *
+ * \defgroup TaskHandle_t TaskHandle_t
+ * \ingroup Tasks
+ */
+struct tskTaskControlBlock; /* The old naming convention is used to prevent breaking kernel aware debuggers. */
+typedef struct tskTaskControlBlock* TaskHandle_t;
+
+/*
+ * Defines the prototype to which the application task hook function must
+ * conform.
+ */
+typedef BaseType_t (*TaskHookFunction_t)( void * );
+
+/* Task states returned by eTaskGetState. */
+typedef enum
+{
+	eRunning = 0,	/* A task is querying the state of itself, so must be running. */
+	eReady,			/* The task being queried is in a read or pending ready list. */
+	eBlocked,		/* The task being queried is in the Blocked state. */
+	eSuspended,		/* The task being queried is in the Suspended state, or is in the Blocked state with an infinite time out. */
+	eDeleted,		/* The task being queried has been deleted, but its TCB has not yet been freed. */
+	eInvalid		/* Used as an 'invalid state' value. */
+} eTaskState;
+
+/* Actions that can be performed when vTaskNotify() is called. */
+typedef enum
+{
+	eNoAction = 0,				/* Notify the task without updating its notify value. */
+	eSetBits,					/* Set bits in the task's notification value. */
+	eIncrement,					/* Increment the task's notification value. */
+	eSetValueWithOverwrite,		/* Set the task's notification value to a specific value even if the previous value has not yet been read by the task. */
+	eSetValueWithoutOverwrite	/* Set the task's notification value if the previous value has been read by the task. */
+} eNotifyAction;
+
+/*
+ * Used internally only.
+ */
+typedef struct xTIME_OUT
+{
+	BaseType_t xOverflowCount;
+	TickType_t xTimeOnEntering;
+} TimeOut_t;
+
+/*
+ * Defines the memory ranges allocated to the task when an MPU is used.
+ */
+typedef struct xMEMORY_REGION
+{
+	void *pvBaseAddress;
+	uint32_t ulLengthInBytes;
+	uint32_t ulParameters;
+} MemoryRegion_t;
+
+/*
+ * Parameters required to create an MPU protected task.
+ */
+typedef struct xTASK_PARAMETERS
+{
+	TaskFunction_t pvTaskCode;
+	const char * const pcName;	/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+	configSTACK_DEPTH_TYPE usStackDepth;
+	void *pvParameters;
+	UBaseType_t uxPriority;
+	StackType_t *puxStackBuffer;
+	MemoryRegion_t xRegions[ portNUM_CONFIGURABLE_REGIONS ];
+	#if ( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+		StaticTask_t * const pxTaskBuffer;
+	#endif
+} TaskParameters_t;
+
+/* Used with the uxTaskGetSystemState() function to return the state of each task
+in the system. */
+typedef struct xTASK_STATUS
+{
+	TaskHandle_t xHandle;			/* The handle of the task to which the rest of the information in the structure relates. */
+	const char *pcTaskName;			/* A pointer to the task's name.  This value will be invalid if the task was deleted since the structure was populated! */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+	UBaseType_t xTaskNumber;		/* A number unique to the task. */
+	eTaskState eCurrentState;		/* The state in which the task existed when the structure was populated. */
+	UBaseType_t uxCurrentPriority;	/* The priority at which the task was running (may be inherited) when the structure was populated. */
+	UBaseType_t uxBasePriority;		/* The priority to which the task will return if the task's current priority has been inherited to avoid unbounded priority inversion when obtaining a mutex.  Only valid if configUSE_MUTEXES is defined as 1 in FreeRTOSConfig.h. */
+	uint32_t ulRunTimeCounter;		/* The total run time allocated to the task so far, as defined by the run time stats clock.  See http://www.freertos.org/rtos-run-time-stats.html.  Only valid when configGENERATE_RUN_TIME_STATS is defined as 1 in FreeRTOSConfig.h. */
+	StackType_t *pxStackBase;		/* Points to the lowest address of the task's stack area. */
+	configSTACK_DEPTH_TYPE usStackHighWaterMark;	/* The minimum amount of stack space that has remained for the task since the task was created.  The closer this value is to zero the closer the task has come to overflowing its stack. */
+} TaskStatus_t;
+
+/* Possible return values for eTaskConfirmSleepModeStatus(). */
+typedef enum
+{
+	eAbortSleep = 0,		/* A task has been made ready or a context switch pended since portSUPPORESS_TICKS_AND_SLEEP() was called - abort entering a sleep mode. */
+	eStandardSleep,			/* Enter a sleep mode that will not last any longer than the expected idle time. */
+	eNoTasksWaitingTimeout	/* No tasks are waiting for a timeout so it is safe to enter a sleep mode that can only be exited by an external interrupt. */
+} eSleepModeStatus;
+
+/**
+ * Defines the priority used by the idle task.  This must not be modified.
+ *
+ * \ingroup TaskUtils
+ */
+#define tskIDLE_PRIORITY			( ( UBaseType_t ) 0U )
+
+/**
+ * task. h
+ *
+ * Macro for forcing a context switch.
+ *
+ * \defgroup taskYIELD taskYIELD
+ * \ingroup SchedulerControl
+ */
+#define taskYIELD()					portYIELD()
+
+/**
+ * task. h
+ *
+ * Macro to mark the start of a critical code region.  Preemptive context
+ * switches cannot occur when in a critical region.
+ *
+ * NOTE: This may alter the stack (depending on the portable implementation)
+ * so must be used with care!
+ *
+ * \defgroup taskENTER_CRITICAL taskENTER_CRITICAL
+ * \ingroup SchedulerControl
+ */
+#define taskENTER_CRITICAL()		portENTER_CRITICAL()
+#define taskENTER_CRITICAL_FROM_ISR() portSET_INTERRUPT_MASK_FROM_ISR()
+
+/**
+ * task. h
+ *
+ * Macro to mark the end of a critical code region.  Preemptive context
+ * switches cannot occur when in a critical region.
+ *
+ * NOTE: This may alter the stack (depending on the portable implementation)
+ * so must be used with care!
+ *
+ * \defgroup taskEXIT_CRITICAL taskEXIT_CRITICAL
+ * \ingroup SchedulerControl
+ */
+#define taskEXIT_CRITICAL()			portEXIT_CRITICAL()
+#define taskEXIT_CRITICAL_FROM_ISR( x ) portCLEAR_INTERRUPT_MASK_FROM_ISR( x )
+/**
+ * task. h
+ *
+ * Macro to disable all maskable interrupts.
+ *
+ * \defgroup taskDISABLE_INTERRUPTS taskDISABLE_INTERRUPTS
+ * \ingroup SchedulerControl
+ */
+#define taskDISABLE_INTERRUPTS()	portDISABLE_INTERRUPTS()
+
+/**
+ * task. h
+ *
+ * Macro to enable microcontroller interrupts.
+ *
+ * \defgroup taskENABLE_INTERRUPTS taskENABLE_INTERRUPTS
+ * \ingroup SchedulerControl
+ */
+#define taskENABLE_INTERRUPTS()		portENABLE_INTERRUPTS()
+
+/* Definitions returned by xTaskGetSchedulerState().  taskSCHEDULER_SUSPENDED is
+0 to generate more optimal code when configASSERT() is defined as the constant
+is used in assert() statements. */
+#define taskSCHEDULER_SUSPENDED		( ( BaseType_t ) 0 )
+#define taskSCHEDULER_NOT_STARTED	( ( BaseType_t ) 1 )
+#define taskSCHEDULER_RUNNING		( ( BaseType_t ) 2 )
+
+
+/*-----------------------------------------------------------
+ * TASK CREATION API
+ *----------------------------------------------------------*/
+
+/**
+ * task. h
+ *
+ BaseType_t xTaskCreate(
+							  TaskFunction_t pvTaskCode,
+							  const char * const pcName,
+							  configSTACK_DEPTH_TYPE usStackDepth,
+							  void *pvParameters,
+							  UBaseType_t uxPriority,
+							  TaskHandle_t *pvCreatedTask
+						  );

+ *
+ * Create a new task and add it to the list of tasks that are ready to run.
+ *
+ * Internally, within the FreeRTOS implementation, tasks use two blocks of
+ * memory.  The first block is used to hold the task's data structures.  The
+ * second block is used by the task as its stack.  If a task is created using
+ * xTaskCreate() then both blocks of memory are automatically dynamically
+ * allocated inside the xTaskCreate() function.  (see
+ * http://www.freertos.org/a00111.html).  If a task is created using
+ * xTaskCreateStatic() then the application writer must provide the required
+ * memory.  xTaskCreateStatic() therefore allows a task to be created without
+ * using any dynamic memory allocation.
+ *
+ * See xTaskCreateStatic() for a version that does not use any dynamic memory
+ * allocation.
+ *
+ * xTaskCreate() can only be used to create a task that has unrestricted
+ * access to the entire microcontroller memory map.  Systems that include MPU
+ * support can alternatively create an MPU constrained task using
+ * xTaskCreateRestricted().
+ *
+ * @param pvTaskCode Pointer to the task entry function.  Tasks
+ * must be implemented to never return (i.e. continuous loop).
+ *
+ * @param pcName A descriptive name for the task.  This is mainly used to
+ * facilitate debugging.  Max length defined by configMAX_TASK_NAME_LEN - default
+ * is 16.
+ *
+ * @param usStackDepth The size of the task stack specified as the number of
+ * variables the stack can hold - not the number of bytes.  For example, if
+ * the stack is 16 bits wide and usStackDepth is defined as 100, 200 bytes
+ * will be allocated for stack storage.
+ *
+ * @param pvParameters Pointer that will be used as the parameter for the task
+ * being created.
+ *
+ * @param uxPriority The priority at which the task should run.  Systems that
+ * include MPU support can optionally create tasks in a privileged (system)
+ * mode by setting bit portPRIVILEGE_BIT of the priority parameter.  For
+ * example, to create a privileged task at priority 2 the uxPriority parameter
+ * should be set to ( 2 | portPRIVILEGE_BIT ).
+ *
+ * @param pvCreatedTask Used to pass back a handle by which the created task
+ * can be referenced.
+ *
+ * @return pdPASS if the task was successfully created and added to a ready
+ * list, otherwise an error code defined in the file projdefs.h
+ *
+ * Example usage:
+   
+ // Task to be created.
+ void vTaskCode( void * pvParameters )
+ {
+	 for( ;; )
+	 {
+		 // Task code goes here.
+	 }
+ }
+
+ // Function that creates a task.
+ void vOtherFunction( void )
+ {
+ static uint8_t ucParameterToPass;
+ TaskHandle_t xHandle = NULL;
+
+	 // Create the task, storing the handle.  Note that the passed parameter ucParameterToPass
+	 // must exist for the lifetime of the task, so in this case is declared static.  If it was just an
+	 // an automatic stack variable it might no longer exist, or at least have been corrupted, by the time
+	 // the new task attempts to access it.
+	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, &ucParameterToPass, tskIDLE_PRIORITY, &xHandle );
+     configASSERT( xHandle );
+
+	 // Use the handle to delete the task.
+     if( xHandle != NULL )
+     {
+	     vTaskDelete( xHandle );
+     }
+ }
+   

+ * \defgroup xTaskCreate xTaskCreate
+ * \ingroup Tasks
+ */
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+	BaseType_t xTaskCreate(	TaskFunction_t pxTaskCode,
+							const char * const pcName,	/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+							const configSTACK_DEPTH_TYPE usStackDepth,
+							void * const pvParameters,
+							UBaseType_t uxPriority,
+							TaskHandle_t * const pxCreatedTask ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * task. h
+ *
+ TaskHandle_t xTaskCreateStatic( TaskFunction_t pvTaskCode,
+								 const char * const pcName,
+								 uint32_t ulStackDepth,
+								 void *pvParameters,
+								 UBaseType_t uxPriority,
+								 StackType_t *pxStackBuffer,
+								 StaticTask_t *pxTaskBuffer );

+ *
+ * Create a new task and add it to the list of tasks that are ready to run.
+ *
+ * Internally, within the FreeRTOS implementation, tasks use two blocks of
+ * memory.  The first block is used to hold the task's data structures.  The
+ * second block is used by the task as its stack.  If a task is created using
+ * xTaskCreate() then both blocks of memory are automatically dynamically
+ * allocated inside the xTaskCreate() function.  (see
+ * http://www.freertos.org/a00111.html).  If a task is created using
+ * xTaskCreateStatic() then the application writer must provide the required
+ * memory.  xTaskCreateStatic() therefore allows a task to be created without
+ * using any dynamic memory allocation.
+ *
+ * @param pvTaskCode Pointer to the task entry function.  Tasks
+ * must be implemented to never return (i.e. continuous loop).
+ *
+ * @param pcName A descriptive name for the task.  This is mainly used to
+ * facilitate debugging.  The maximum length of the string is defined by
+ * configMAX_TASK_NAME_LEN in FreeRTOSConfig.h.
+ *
+ * @param ulStackDepth The size of the task stack specified as the number of
+ * variables the stack can hold - not the number of bytes.  For example, if
+ * the stack is 32-bits wide and ulStackDepth is defined as 100 then 400 bytes
+ * will be allocated for stack storage.
+ *
+ * @param pvParameters Pointer that will be used as the parameter for the task
+ * being created.
+ *
+ * @param uxPriority The priority at which the task will run.
+ *
+ * @param pxStackBuffer Must point to a StackType_t array that has at least
+ * ulStackDepth indexes - the array will then be used as the task's stack,
+ * removing the need for the stack to be allocated dynamically.
+ *
+ * @param pxTaskBuffer Must point to a variable of type StaticTask_t, which will
+ * then be used to hold the task's data structures, removing the need for the
+ * memory to be allocated dynamically.
+ *
+ * @return If neither pxStackBuffer or pxTaskBuffer are NULL, then the task will
+ * be created and a handle to the created task is returned.  If either
+ * pxStackBuffer or pxTaskBuffer are NULL then the task will not be created and
+ * NULL is returned.
+ *
+ * Example usage:
+   
+
+    // Dimensions the buffer that the task being created will use as its stack.
+    // NOTE:  This is the number of words the stack will hold, not the number of
+    // bytes.  For example, if each stack item is 32-bits, and this is set to 100,
+    // then 400 bytes (100 * 32-bits) will be allocated.
+    #define STACK_SIZE 200
+
+    // Structure that will hold the TCB of the task being created.
+    StaticTask_t xTaskBuffer;
+
+    // Buffer that the task being created will use as its stack.  Note this is
+    // an array of StackType_t variables.  The size of StackType_t is dependent on
+    // the RTOS port.
+    StackType_t xStack[ STACK_SIZE ];
+
+    // Function that implements the task being created.
+    void vTaskCode( void * pvParameters )
+    {
+        // The parameter value is expected to be 1 as 1 is passed in the
+        // pvParameters value in the call to xTaskCreateStatic().
+        configASSERT( ( uint32_t ) pvParameters == 1UL );
+
+        for( ;; )
+        {
+            // Task code goes here.
+        }
+    }
+
+    // Function that creates a task.
+    void vOtherFunction( void )
+    {
+        TaskHandle_t xHandle = NULL;
+
+        // Create the task without using any dynamic memory allocation.
+        xHandle = xTaskCreateStatic(
+                      vTaskCode,       // Function that implements the task.
+                      "NAME",          // Text name for the task.
+                      STACK_SIZE,      // Stack size in words, not bytes.
+                      ( void * ) 1,    // Parameter passed into the task.
+                      tskIDLE_PRIORITY,// Priority at which the task is created.
+                      xStack,          // Array to use as the task's stack.
+                      &xTaskBuffer );  // Variable to hold the task's data structure.
+
+        // puxStackBuffer and pxTaskBuffer were not NULL, so the task will have
+        // been created, and xHandle will be the task's handle.  Use the handle
+        // to suspend the task.
+        vTaskSuspend( xHandle );
+    }
+   

+ * \defgroup xTaskCreateStatic xTaskCreateStatic
+ * \ingroup Tasks
+ */
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+	TaskHandle_t xTaskCreateStatic(	TaskFunction_t pxTaskCode,
+									const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+									const uint32_t ulStackDepth,
+									void * const pvParameters,
+									UBaseType_t uxPriority,
+									StackType_t * const puxStackBuffer,
+									StaticTask_t * const pxTaskBuffer ) PRIVILEGED_FUNCTION;
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+/**
+ * task. h
+ *
+ BaseType_t xTaskCreateRestricted( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );

+ *
+ * Only available when configSUPPORT_DYNAMIC_ALLOCATION is set to 1.
+ *
+ * xTaskCreateRestricted() should only be used in systems that include an MPU
+ * implementation.
+ *
+ * Create a new task and add it to the list of tasks that are ready to run.
+ * The function parameters define the memory regions and associated access
+ * permissions allocated to the task.
+ *
+ * See xTaskCreateRestrictedStatic() for a version that does not use any
+ * dynamic memory allocation.
+ *
+ * @param pxTaskDefinition Pointer to a structure that contains a member
+ * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API
+ * documentation) plus an optional stack buffer and the memory region
+ * definitions.
+ *
+ * @param pxCreatedTask Used to pass back a handle by which the created task
+ * can be referenced.
+ *
+ * @return pdPASS if the task was successfully created and added to a ready
+ * list, otherwise an error code defined in the file projdefs.h
+ *
+ * Example usage:
+   
+// Create an TaskParameters_t structure that defines the task to be created.
+static const TaskParameters_t xCheckTaskParameters =
+{
+	vATask,		// pvTaskCode - the function that implements the task.
+	"ATask",	// pcName - just a text name for the task to assist debugging.
+	100,		// usStackDepth	- the stack size DEFINED IN WORDS.
+	NULL,		// pvParameters - passed into the task function as the function parameters.
+	( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.
+	cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack.
+
+	// xRegions - Allocate up to three separate memory regions for access by
+	// the task, with appropriate access permissions.  Different processors have
+	// different memory alignment requirements - refer to the FreeRTOS documentation
+	// for full information.
+	{
+		// Base address					Length	Parameters
+        { cReadWriteArray,				32,		portMPU_REGION_READ_WRITE },
+        { cReadOnlyArray,				32,		portMPU_REGION_READ_ONLY },
+        { cPrivilegedOnlyAccessArray,	128,	portMPU_REGION_PRIVILEGED_READ_WRITE }
+	}
+};
+
+int main( void )
+{
+TaskHandle_t xHandle;
+
+	// Create a task from the const structure defined above.  The task handle
+	// is requested (the second parameter is not NULL) but in this case just for
+	// demonstration purposes as its not actually used.
+	xTaskCreateRestricted( &xRegTest1Parameters, &xHandle );
+
+	// Start the scheduler.
+	vTaskStartScheduler();
+
+	// Will only get here if there was insufficient memory to create the idle
+	// and/or timer task.
+	for( ;; );
+}
+   

+ * \defgroup xTaskCreateRestricted xTaskCreateRestricted
+ * \ingroup Tasks
+ */
+#if( portUSING_MPU_WRAPPERS == 1 )
+	BaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * task. h
+ *
+ BaseType_t xTaskCreateRestrictedStatic( TaskParameters_t *pxTaskDefinition, TaskHandle_t *pxCreatedTask );

+ *
+ * Only available when configSUPPORT_STATIC_ALLOCATION is set to 1.
+ *
+ * xTaskCreateRestrictedStatic() should only be used in systems that include an
+ * MPU implementation.
+ *
+ * Internally, within the FreeRTOS implementation, tasks use two blocks of
+ * memory.  The first block is used to hold the task's data structures.  The
+ * second block is used by the task as its stack.  If a task is created using
+ * xTaskCreateRestricted() then the stack is provided by the application writer,
+ * and the memory used to hold the task's data structure is automatically
+ * dynamically allocated inside the xTaskCreateRestricted() function.  If a task
+ * is created using xTaskCreateRestrictedStatic() then the application writer
+ * must provide the memory used to hold the task's data structures too.
+ * xTaskCreateRestrictedStatic() therefore allows a memory protected task to be
+ * created without using any dynamic memory allocation.
+ *
+ * @param pxTaskDefinition Pointer to a structure that contains a member
+ * for each of the normal xTaskCreate() parameters (see the xTaskCreate() API
+ * documentation) plus an optional stack buffer and the memory region
+ * definitions.  If configSUPPORT_STATIC_ALLOCATION is set to 1 the structure
+ * contains an additional member, which is used to point to a variable of type
+ * StaticTask_t - which is then used to hold the task's data structure.
+ *
+ * @param pxCreatedTask Used to pass back a handle by which the created task
+ * can be referenced.
+ *
+ * @return pdPASS if the task was successfully created and added to a ready
+ * list, otherwise an error code defined in the file projdefs.h
+ *
+ * Example usage:
+   
+// Create an TaskParameters_t structure that defines the task to be created.
+// The StaticTask_t variable is only included in the structure when
+// configSUPPORT_STATIC_ALLOCATION is set to 1.  The PRIVILEGED_DATA macro can
+// be used to force the variable into the RTOS kernel's privileged data area.
+static PRIVILEGED_DATA StaticTask_t xTaskBuffer;
+static const TaskParameters_t xCheckTaskParameters =
+{
+	vATask,		// pvTaskCode - the function that implements the task.
+	"ATask",	// pcName - just a text name for the task to assist debugging.
+	100,		// usStackDepth	- the stack size DEFINED IN WORDS.
+	NULL,		// pvParameters - passed into the task function as the function parameters.
+	( 1UL | portPRIVILEGE_BIT ),// uxPriority - task priority, set the portPRIVILEGE_BIT if the task should run in a privileged state.
+	cStackBuffer,// puxStackBuffer - the buffer to be used as the task stack.
+
+	// xRegions - Allocate up to three separate memory regions for access by
+	// the task, with appropriate access permissions.  Different processors have
+	// different memory alignment requirements - refer to the FreeRTOS documentation
+	// for full information.
+	{
+		// Base address					Length	Parameters
+        { cReadWriteArray,				32,		portMPU_REGION_READ_WRITE },
+        { cReadOnlyArray,				32,		portMPU_REGION_READ_ONLY },
+        { cPrivilegedOnlyAccessArray,	128,	portMPU_REGION_PRIVILEGED_READ_WRITE }
+	}
+
+	&xTaskBuffer; // Holds the task's data structure.
+};
+
+int main( void )
+{
+TaskHandle_t xHandle;
+
+	// Create a task from the const structure defined above.  The task handle
+	// is requested (the second parameter is not NULL) but in this case just for
+	// demonstration purposes as its not actually used.
+	xTaskCreateRestricted( &xRegTest1Parameters, &xHandle );
+
+	// Start the scheduler.
+	vTaskStartScheduler();
+
+	// Will only get here if there was insufficient memory to create the idle
+	// and/or timer task.
+	for( ;; );
+}
+   

+ * \defgroup xTaskCreateRestrictedStatic xTaskCreateRestrictedStatic
+ * \ingroup Tasks
+ */
+#if( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+	BaseType_t xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * task. h
+ *
+ void vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions );

+ *
+ * Memory regions are assigned to a restricted task when the task is created by
+ * a call to xTaskCreateRestricted().  These regions can be redefined using
+ * vTaskAllocateMPURegions().
+ *
+ * @param xTask The handle of the task being updated.
+ *
+ * @param xRegions A pointer to an MemoryRegion_t structure that contains the
+ * new memory region definitions.
+ *
+ * Example usage:
+   
+// Define an array of MemoryRegion_t structures that configures an MPU region
+// allowing read/write access for 1024 bytes starting at the beginning of the
+// ucOneKByte array.  The other two of the maximum 3 definable regions are
+// unused so set to zero.
+static const MemoryRegion_t xAltRegions[ portNUM_CONFIGURABLE_REGIONS ] =
+{
+	// Base address		Length		Parameters
+	{ ucOneKByte,		1024,		portMPU_REGION_READ_WRITE },
+	{ 0,				0,			0 },
+	{ 0,				0,			0 }
+};
+
+void vATask( void *pvParameters )
+{
+	// This task was created such that it has access to certain regions of
+	// memory as defined by the MPU configuration.  At some point it is
+	// desired that these MPU regions are replaced with that defined in the
+	// xAltRegions const struct above.  Use a call to vTaskAllocateMPURegions()
+	// for this purpose.  NULL is used as the task handle to indicate that this
+	// function should modify the MPU regions of the calling task.
+	vTaskAllocateMPURegions( NULL, xAltRegions );
+
+	// Now the task can continue its function, but from this point on can only
+	// access its stack and the ucOneKByte array (unless any other statically
+	// defined or shared regions have been declared elsewhere).
+}
+   

+ * \defgroup xTaskCreateRestricted xTaskCreateRestricted
+ * \ingroup Tasks
+ */
+void vTaskAllocateMPURegions( TaskHandle_t xTask, const MemoryRegion_t * const pxRegions ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
void vTaskDelete( TaskHandle_t xTask );

+ *
+ * INCLUDE_vTaskDelete must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Remove a task from the RTOS real time kernel's management.  The task being
+ * deleted will be removed from all ready, blocked, suspended and event lists.
+ *
+ * NOTE:  The idle task is responsible for freeing the kernel allocated
+ * memory from tasks that have been deleted.  It is therefore important that
+ * the idle task is not starved of microcontroller processing time if your
+ * application makes any calls to vTaskDelete ().  Memory allocated by the
+ * task code is not automatically freed, and should be freed before the task
+ * is deleted.
+ *
+ * See the demo application file death.c for sample code that utilises
+ * vTaskDelete ().
+ *
+ * @param xTask The handle of the task to be deleted.  Passing NULL will
+ * cause the calling task to be deleted.
+ *
+ * Example usage:
+   
+ void vOtherFunction( void )
+ {
+ TaskHandle_t xHandle;
+
+	 // Create the task, storing the handle.
+	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
+
+	 // Use the handle to delete the task.
+	 vTaskDelete( xHandle );
+ }
+   

+ * \defgroup vTaskDelete vTaskDelete
+ * \ingroup Tasks
+ */
+void vTaskDelete( TaskHandle_t xTaskToDelete ) PRIVILEGED_FUNCTION;
+
+/*-----------------------------------------------------------
+ * TASK CONTROL API
+ *----------------------------------------------------------*/
+
+/**
+ * task. h
+ * 
void vTaskDelay( const TickType_t xTicksToDelay );

+ *
+ * Delay a task for a given number of ticks.  The actual time that the
+ * task remains blocked depends on the tick rate.  The constant
+ * portTICK_PERIOD_MS can be used to calculate real time from the tick
+ * rate - with the resolution of one tick period.
+ *
+ * INCLUDE_vTaskDelay must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ *
+ * vTaskDelay() specifies a time at which the task wishes to unblock relative to
+ * the time at which vTaskDelay() is called.  For example, specifying a block
+ * period of 100 ticks will cause the task to unblock 100 ticks after
+ * vTaskDelay() is called.  vTaskDelay() does not therefore provide a good method
+ * of controlling the frequency of a periodic task as the path taken through the
+ * code, as well as other task and interrupt activity, will effect the frequency
+ * at which vTaskDelay() gets called and therefore the time at which the task
+ * next executes.  See vTaskDelayUntil() for an alternative API function designed
+ * to facilitate fixed frequency execution.  It does this by specifying an
+ * absolute time (rather than a relative time) at which the calling task should
+ * unblock.
+ *
+ * @param xTicksToDelay The amount of time, in tick periods, that
+ * the calling task should block.
+ *
+ * Example usage:
+
+ void vTaskFunction( void * pvParameters )
+ {
+ // Block for 500ms.
+ const TickType_t xDelay = 500 / portTICK_PERIOD_MS;
+
+	 for( ;; )
+	 {
+		 // Simply toggle the LED every 500ms, blocking between each toggle.
+		 vToggleLED();
+		 vTaskDelay( xDelay );
+	 }
+ }
+
+ * \defgroup vTaskDelay vTaskDelay
+ * \ingroup TaskCtrl
+ */
+void vTaskDelay( const TickType_t xTicksToDelay ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
void vTaskDelayUntil( TickType_t *pxPreviousWakeTime, const TickType_t xTimeIncrement );

+ *
+ * INCLUDE_vTaskDelayUntil must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Delay a task until a specified time.  This function can be used by periodic
+ * tasks to ensure a constant execution frequency.
+ *
+ * This function differs from vTaskDelay () in one important aspect:  vTaskDelay () will
+ * cause a task to block for the specified number of ticks from the time vTaskDelay () is
+ * called.  It is therefore difficult to use vTaskDelay () by itself to generate a fixed
+ * execution frequency as the time between a task starting to execute and that task
+ * calling vTaskDelay () may not be fixed [the task may take a different path though the
+ * code between calls, or may get interrupted or preempted a different number of times
+ * each time it executes].
+ *
+ * Whereas vTaskDelay () specifies a wake time relative to the time at which the function
+ * is called, vTaskDelayUntil () specifies the absolute (exact) time at which it wishes to
+ * unblock.
+ *
+ * The constant portTICK_PERIOD_MS can be used to calculate real time from the tick
+ * rate - with the resolution of one tick period.
+ *
+ * @param pxPreviousWakeTime Pointer to a variable that holds the time at which the
+ * task was last unblocked.  The variable must be initialised with the current time
+ * prior to its first use (see the example below).  Following this the variable is
+ * automatically updated within vTaskDelayUntil ().
+ *
+ * @param xTimeIncrement The cycle time period.  The task will be unblocked at
+ * time *pxPreviousWakeTime + xTimeIncrement.  Calling vTaskDelayUntil with the
+ * same xTimeIncrement parameter value will cause the task to execute with
+ * a fixed interface period.
+ *
+ * Example usage:
+   
+ // Perform an action every 10 ticks.
+ void vTaskFunction( void * pvParameters )
+ {
+ TickType_t xLastWakeTime;
+ const TickType_t xFrequency = 10;
+
+	 // Initialise the xLastWakeTime variable with the current time.
+	 xLastWakeTime = xTaskGetTickCount ();
+	 for( ;; )
+	 {
+		 // Wait for the next cycle.
+		 vTaskDelayUntil( &xLastWakeTime, xFrequency );
+
+		 // Perform action here.
+	 }
+ }
+   

+ * \defgroup vTaskDelayUntil vTaskDelayUntil
+ * \ingroup TaskCtrl
+ */
+void vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
BaseType_t xTaskAbortDelay( TaskHandle_t xTask );

+ *
+ * INCLUDE_xTaskAbortDelay must be defined as 1 in FreeRTOSConfig.h for this
+ * function to be available.
+ *
+ * A task will enter the Blocked state when it is waiting for an event.  The
+ * event it is waiting for can be a temporal event (waiting for a time), such
+ * as when vTaskDelay() is called, or an event on an object, such as when
+ * xQueueReceive() or ulTaskNotifyTake() is called.  If the handle of a task
+ * that is in the Blocked state is used in a call to xTaskAbortDelay() then the
+ * task will leave the Blocked state, and return from whichever function call
+ * placed the task into the Blocked state.
+ *
+ * @param xTask The handle of the task to remove from the Blocked state.
+ *
+ * @return If the task referenced by xTask was not in the Blocked state then
+ * pdFAIL is returned.  Otherwise pdPASS is returned.
+ *
+ * \defgroup xTaskAbortDelay xTaskAbortDelay
+ * \ingroup TaskCtrl
+ */
+BaseType_t xTaskAbortDelay( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask );

+ *
+ * INCLUDE_uxTaskPriorityGet must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Obtain the priority of any task.
+ *
+ * @param xTask Handle of the task to be queried.  Passing a NULL
+ * handle results in the priority of the calling task being returned.
+ *
+ * @return The priority of xTask.
+ *
+ * Example usage:
+   
+ void vAFunction( void )
+ {
+ TaskHandle_t xHandle;
+
+	 // Create a task, storing the handle.
+	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
+
+	 // ...
+
+	 // Use the handle to obtain the priority of the created task.
+	 // It was created with tskIDLE_PRIORITY, but may have changed
+	 // it itself.
+	 if( uxTaskPriorityGet( xHandle ) != tskIDLE_PRIORITY )
+	 {
+		 // The task has changed it's priority.
+	 }
+
+	 // ...
+
+	 // Is our priority higher than the created task?
+	 if( uxTaskPriorityGet( xHandle ) < uxTaskPriorityGet( NULL ) )
+	 {
+		 // Our priority (obtained using NULL handle) is higher.
+	 }
+ }
+   

+ * \defgroup uxTaskPriorityGet uxTaskPriorityGet
+ * \ingroup TaskCtrl
+ */
+UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask );

+ *
+ * A version of uxTaskPriorityGet() that can be used from an ISR.
+ */
+UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
eTaskState eTaskGetState( TaskHandle_t xTask );

+ *
+ * INCLUDE_eTaskGetState must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Obtain the state of any task.  States are encoded by the eTaskState
+ * enumerated type.
+ *
+ * @param xTask Handle of the task to be queried.
+ *
+ * @return The state of xTask at the time the function was called.  Note the
+ * state of the task might change between the function being called, and the
+ * functions return value being tested by the calling task.
+ */
+eTaskState eTaskGetState( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState );

+ *
+ * configUSE_TRACE_FACILITY must be defined as 1 for this function to be
+ * available.  See the configuration section for more information.
+ *
+ * Populates a TaskStatus_t structure with information about a task.
+ *
+ * @param xTask Handle of the task being queried.  If xTask is NULL then
+ * information will be returned about the calling task.
+ *
+ * @param pxTaskStatus A pointer to the TaskStatus_t structure that will be
+ * filled with information about the task referenced by the handle passed using
+ * the xTask parameter.
+ *
+ * @xGetFreeStackSpace The TaskStatus_t structure contains a member to report
+ * the stack high water mark of the task being queried.  Calculating the stack
+ * high water mark takes a relatively long time, and can make the system
+ * temporarily unresponsive - so the xGetFreeStackSpace parameter is provided to
+ * allow the high water mark checking to be skipped.  The high watermark value
+ * will only be written to the TaskStatus_t structure if xGetFreeStackSpace is
+ * not set to pdFALSE;
+ *
+ * @param eState The TaskStatus_t structure contains a member to report the
+ * state of the task being queried.  Obtaining the task state is not as fast as
+ * a simple assignment - so the eState parameter is provided to allow the state
+ * information to be omitted from the TaskStatus_t structure.  To obtain state
+ * information then set eState to eInvalid - otherwise the value passed in
+ * eState will be reported as the task state in the TaskStatus_t structure.
+ *
+ * Example usage:
+   
+ void vAFunction( void )
+ {
+ TaskHandle_t xHandle;
+ TaskStatus_t xTaskDetails;
+
+    // Obtain the handle of a task from its name.
+    xHandle = xTaskGetHandle( "Task_Name" );
+
+    // Check the handle is not NULL.
+    configASSERT( xHandle );
+
+    // Use the handle to obtain further information about the task.
+    vTaskGetInfo( xHandle,
+                  &xTaskDetails,
+                  pdTRUE, // Include the high water mark in xTaskDetails.
+                  eInvalid ); // Include the task state in xTaskDetails.
+ }
+   

+ * \defgroup vTaskGetInfo vTaskGetInfo
+ * \ingroup TaskCtrl
+ */
+void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority );

+ *
+ * INCLUDE_vTaskPrioritySet must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Set the priority of any task.
+ *
+ * A context switch will occur before the function returns if the priority
+ * being set is higher than the currently executing task.
+ *
+ * @param xTask Handle to the task for which the priority is being set.
+ * Passing a NULL handle results in the priority of the calling task being set.
+ *
+ * @param uxNewPriority The priority to which the task will be set.
+ *
+ * Example usage:
+   
+ void vAFunction( void )
+ {
+ TaskHandle_t xHandle;
+
+	 // Create a task, storing the handle.
+	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
+
+	 // ...
+
+	 // Use the handle to raise the priority of the created task.
+	 vTaskPrioritySet( xHandle, tskIDLE_PRIORITY + 1 );
+
+	 // ...
+
+	 // Use a NULL handle to raise our priority to the same value.
+	 vTaskPrioritySet( NULL, tskIDLE_PRIORITY + 1 );
+ }
+   

+ * \defgroup vTaskPrioritySet vTaskPrioritySet
+ * \ingroup TaskCtrl
+ */
+void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
void vTaskSuspend( TaskHandle_t xTaskToSuspend );

+ *
+ * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Suspend any task.  When suspended a task will never get any microcontroller
+ * processing time, no matter what its priority.
+ *
+ * Calls to vTaskSuspend are not accumulative -
+ * i.e. calling vTaskSuspend () twice on the same task still only requires one
+ * call to vTaskResume () to ready the suspended task.
+ *
+ * @param xTaskToSuspend Handle to the task being suspended.  Passing a NULL
+ * handle will cause the calling task to be suspended.
+ *
+ * Example usage:
+   
+ void vAFunction( void )
+ {
+ TaskHandle_t xHandle;
+
+	 // Create a task, storing the handle.
+	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
+
+	 // ...
+
+	 // Use the handle to suspend the created task.
+	 vTaskSuspend( xHandle );
+
+	 // ...
+
+	 // The created task will not run during this period, unless
+	 // another task calls vTaskResume( xHandle ).
+
+	 //...
+
+
+	 // Suspend ourselves.
+	 vTaskSuspend( NULL );
+
+	 // We cannot get here unless another task calls vTaskResume
+	 // with our handle as the parameter.
+ }
+   

+ * \defgroup vTaskSuspend vTaskSuspend
+ * \ingroup TaskCtrl
+ */
+void vTaskSuspend( TaskHandle_t xTaskToSuspend ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
void vTaskResume( TaskHandle_t xTaskToResume );

+ *
+ * INCLUDE_vTaskSuspend must be defined as 1 for this function to be available.
+ * See the configuration section for more information.
+ *
+ * Resumes a suspended task.
+ *
+ * A task that has been suspended by one or more calls to vTaskSuspend ()
+ * will be made available for running again by a single call to
+ * vTaskResume ().
+ *
+ * @param xTaskToResume Handle to the task being readied.
+ *
+ * Example usage:
+   
+ void vAFunction( void )
+ {
+ TaskHandle_t xHandle;
+
+	 // Create a task, storing the handle.
+	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, &xHandle );
+
+	 // ...
+
+	 // Use the handle to suspend the created task.
+	 vTaskSuspend( xHandle );
+
+	 // ...
+
+	 // The created task will not run during this period, unless
+	 // another task calls vTaskResume( xHandle ).
+
+	 //...
+
+
+	 // Resume the suspended task ourselves.
+	 vTaskResume( xHandle );
+
+	 // The created task will once again get microcontroller processing
+	 // time in accordance with its priority within the system.
+ }
+   

+ * \defgroup vTaskResume vTaskResume
+ * \ingroup TaskCtrl
+ */
+void vTaskResume( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
void xTaskResumeFromISR( TaskHandle_t xTaskToResume );

+ *
+ * INCLUDE_xTaskResumeFromISR must be defined as 1 for this function to be
+ * available.  See the configuration section for more information.
+ *
+ * An implementation of vTaskResume() that can be called from within an ISR.
+ *
+ * A task that has been suspended by one or more calls to vTaskSuspend ()
+ * will be made available for running again by a single call to
+ * xTaskResumeFromISR ().
+ *
+ * xTaskResumeFromISR() should not be used to synchronise a task with an
+ * interrupt if there is a chance that the interrupt could arrive prior to the
+ * task being suspended - as this can lead to interrupts being missed. Use of a
+ * semaphore as a synchronisation mechanism would avoid this eventuality.
+ *
+ * @param xTaskToResume Handle to the task being readied.
+ *
+ * @return pdTRUE if resuming the task should result in a context switch,
+ * otherwise pdFALSE. This is used by the ISR to determine if a context switch
+ * may be required following the ISR.
+ *
+ * \defgroup vTaskResumeFromISR vTaskResumeFromISR
+ * \ingroup TaskCtrl
+ */
+BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume ) PRIVILEGED_FUNCTION;
+
+/*-----------------------------------------------------------
+ * SCHEDULER CONTROL
+ *----------------------------------------------------------*/
+
+/**
+ * task. h
+ * 
void vTaskStartScheduler( void );

+ *
+ * Starts the real time kernel tick processing.  After calling the kernel
+ * has control over which tasks are executed and when.
+ *
+ * See the demo application file main.c for an example of creating
+ * tasks and starting the kernel.
+ *
+ * Example usage:
+   
+ void vAFunction( void )
+ {
+	 // Create at least one task before starting the kernel.
+	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
+
+	 // Start the real time kernel with preemption.
+	 vTaskStartScheduler ();
+
+	 // Will not get here unless a task calls vTaskEndScheduler ()
+ }
+   

+ *
+ * \defgroup vTaskStartScheduler vTaskStartScheduler
+ * \ingroup SchedulerControl
+ */
+void vTaskStartScheduler( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
void vTaskEndScheduler( void );

+ *
+ * NOTE:  At the time of writing only the x86 real mode port, which runs on a PC
+ * in place of DOS, implements this function.
+ *
+ * Stops the real time kernel tick.  All created tasks will be automatically
+ * deleted and multitasking (either preemptive or cooperative) will
+ * stop.  Execution then resumes from the point where vTaskStartScheduler ()
+ * was called, as if vTaskStartScheduler () had just returned.
+ *
+ * See the demo application file main. c in the demo/PC directory for an
+ * example that uses vTaskEndScheduler ().
+ *
+ * vTaskEndScheduler () requires an exit function to be defined within the
+ * portable layer (see vPortEndScheduler () in port. c for the PC port).  This
+ * performs hardware specific operations such as stopping the kernel tick.
+ *
+ * vTaskEndScheduler () will cause all of the resources allocated by the
+ * kernel to be freed - but will not free resources allocated by application
+ * tasks.
+ *
+ * Example usage:
+   
+ void vTaskCode( void * pvParameters )
+ {
+	 for( ;; )
+	 {
+		 // Task code goes here.
+
+		 // At some point we want to end the real time kernel processing
+		 // so call ...
+		 vTaskEndScheduler ();
+	 }
+ }
+
+ void vAFunction( void )
+ {
+	 // Create at least one task before starting the kernel.
+	 xTaskCreate( vTaskCode, "NAME", STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
+
+	 // Start the real time kernel with preemption.
+	 vTaskStartScheduler ();
+
+	 // Will only get here when the vTaskCode () task has called
+	 // vTaskEndScheduler ().  When we get here we are back to single task
+	 // execution.
+ }
+   

+ *
+ * \defgroup vTaskEndScheduler vTaskEndScheduler
+ * \ingroup SchedulerControl
+ */
+void vTaskEndScheduler( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
void vTaskSuspendAll( void );

+ *
+ * Suspends the scheduler without disabling interrupts.  Context switches will
+ * not occur while the scheduler is suspended.
+ *
+ * After calling vTaskSuspendAll () the calling task will continue to execute
+ * without risk of being swapped out until a call to xTaskResumeAll () has been
+ * made.
+ *
+ * API functions that have the potential to cause a context switch (for example,
+ * vTaskDelayUntil(), xQueueSend(), etc.) must not be called while the scheduler
+ * is suspended.
+ *
+ * Example usage:
+   
+ void vTask1( void * pvParameters )
+ {
+	 for( ;; )
+	 {
+		 // Task code goes here.
+
+		 // ...
+
+		 // At some point the task wants to perform a long operation during
+		 // which it does not want to get swapped out.  It cannot use
+		 // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
+		 // operation may cause interrupts to be missed - including the
+		 // ticks.
+
+		 // Prevent the real time kernel swapping out the task.
+		 vTaskSuspendAll ();
+
+		 // Perform the operation here.  There is no need to use critical
+		 // sections as we have all the microcontroller processing time.
+		 // During this time interrupts will still operate and the kernel
+		 // tick count will be maintained.
+
+		 // ...
+
+		 // The operation is complete.  Restart the kernel.
+		 xTaskResumeAll ();
+	 }
+ }
+   

+ * \defgroup vTaskSuspendAll vTaskSuspendAll
+ * \ingroup SchedulerControl
+ */
+void vTaskSuspendAll( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
BaseType_t xTaskResumeAll( void );

+ *
+ * Resumes scheduler activity after it was suspended by a call to
+ * vTaskSuspendAll().
+ *
+ * xTaskResumeAll() only resumes the scheduler.  It does not unsuspend tasks
+ * that were previously suspended by a call to vTaskSuspend().
+ *
+ * @return If resuming the scheduler caused a context switch then pdTRUE is
+ *		  returned, otherwise pdFALSE is returned.
+ *
+ * Example usage:
+   
+ void vTask1( void * pvParameters )
+ {
+	 for( ;; )
+	 {
+		 // Task code goes here.
+
+		 // ...
+
+		 // At some point the task wants to perform a long operation during
+		 // which it does not want to get swapped out.  It cannot use
+		 // taskENTER_CRITICAL ()/taskEXIT_CRITICAL () as the length of the
+		 // operation may cause interrupts to be missed - including the
+		 // ticks.
+
+		 // Prevent the real time kernel swapping out the task.
+		 vTaskSuspendAll ();
+
+		 // Perform the operation here.  There is no need to use critical
+		 // sections as we have all the microcontroller processing time.
+		 // During this time interrupts will still operate and the real
+		 // time kernel tick count will be maintained.
+
+		 // ...
+
+		 // The operation is complete.  Restart the kernel.  We want to force
+		 // a context switch - but there is no point if resuming the scheduler
+		 // caused a context switch already.
+		 if( !xTaskResumeAll () )
+		 {
+			  taskYIELD ();
+		 }
+	 }
+ }
+   

+ * \defgroup xTaskResumeAll xTaskResumeAll
+ * \ingroup SchedulerControl
+ */
+BaseType_t xTaskResumeAll( void ) PRIVILEGED_FUNCTION;
+
+/*-----------------------------------------------------------
+ * TASK UTILITIES
+ *----------------------------------------------------------*/
+
+/**
+ * task. h
+ * 
TickType_t xTaskGetTickCount( void );

+ *
+ * @return The count of ticks since vTaskStartScheduler was called.
+ *
+ * \defgroup xTaskGetTickCount xTaskGetTickCount
+ * \ingroup TaskUtils
+ */
+TickType_t xTaskGetTickCount( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
TickType_t xTaskGetTickCountFromISR( void );

+ *
+ * @return The count of ticks since vTaskStartScheduler was called.
+ *
+ * This is a version of xTaskGetTickCount() that is safe to be called from an
+ * ISR - provided that TickType_t is the natural word size of the
+ * microcontroller being used or interrupt nesting is either not supported or
+ * not being used.
+ *
+ * \defgroup xTaskGetTickCountFromISR xTaskGetTickCountFromISR
+ * \ingroup TaskUtils
+ */
+TickType_t xTaskGetTickCountFromISR( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
uint16_t uxTaskGetNumberOfTasks( void );

+ *
+ * @return The number of tasks that the real time kernel is currently managing.
+ * This includes all ready, blocked and suspended tasks.  A task that
+ * has been deleted but not yet freed by the idle task will also be
+ * included in the count.
+ *
+ * \defgroup uxTaskGetNumberOfTasks uxTaskGetNumberOfTasks
+ * \ingroup TaskUtils
+ */
+UBaseType_t uxTaskGetNumberOfTasks( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
char *pcTaskGetName( TaskHandle_t xTaskToQuery );

+ *
+ * @return The text (human readable) name of the task referenced by the handle
+ * xTaskToQuery.  A task can query its own name by either passing in its own
+ * handle, or by setting xTaskToQuery to NULL.
+ *
+ * \defgroup pcTaskGetName pcTaskGetName
+ * \ingroup TaskUtils
+ */
+char *pcTaskGetName( TaskHandle_t xTaskToQuery ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+
+/**
+ * task. h
+ * 
TaskHandle_t xTaskGetHandle( const char *pcNameToQuery );

+ *
+ * NOTE:  This function takes a relatively long time to complete and should be
+ * used sparingly.
+ *
+ * @return The handle of the task that has the human readable name pcNameToQuery.
+ * NULL is returned if no matching name is found.  INCLUDE_xTaskGetHandle
+ * must be set to 1 in FreeRTOSConfig.h for pcTaskGetHandle() to be available.
+ *
+ * \defgroup pcTaskGetHandle pcTaskGetHandle
+ * \ingroup TaskUtils
+ */
+TaskHandle_t xTaskGetHandle( const char *pcNameToQuery ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+
+/**
+ * task.h
+ * 
UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask );

+ *
+ * INCLUDE_uxTaskGetStackHighWaterMark must be set to 1 in FreeRTOSConfig.h for
+ * this function to be available.
+ *
+ * Returns the high water mark of the stack associated with xTask.  That is,
+ * the minimum free stack space there has been (in words, so on a 32 bit machine
+ * a value of 1 means 4 bytes) since the task started.  The smaller the returned
+ * number the closer the task has come to overflowing its stack.
+ *
+ * uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are the
+ * same except for their return type.  Using configSTACK_DEPTH_TYPE allows the
+ * user to determine the return type.  It gets around the problem of the value
+ * overflowing on 8-bit types without breaking backward compatibility for
+ * applications that expect an 8-bit return type.
+ *
+ * @param xTask Handle of the task associated with the stack to be checked.
+ * Set xTask to NULL to check the stack of the calling task.
+ *
+ * @return The smallest amount of free stack space there has been (in words, so
+ * actual spaces on the stack rather than bytes) since the task referenced by
+ * xTask was created.
+ */
+UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/**
+ * task.h
+ * 
configSTACK_DEPTH_TYPE uxTaskGetStackHighWaterMark2( TaskHandle_t xTask );

+ *
+ * INCLUDE_uxTaskGetStackHighWaterMark2 must be set to 1 in FreeRTOSConfig.h for
+ * this function to be available.
+ *
+ * Returns the high water mark of the stack associated with xTask.  That is,
+ * the minimum free stack space there has been (in words, so on a 32 bit machine
+ * a value of 1 means 4 bytes) since the task started.  The smaller the returned
+ * number the closer the task has come to overflowing its stack.
+ *
+ * uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are the
+ * same except for their return type.  Using configSTACK_DEPTH_TYPE allows the
+ * user to determine the return type.  It gets around the problem of the value
+ * overflowing on 8-bit types without breaking backward compatibility for
+ * applications that expect an 8-bit return type.
+ *
+ * @param xTask Handle of the task associated with the stack to be checked.
+ * Set xTask to NULL to check the stack of the calling task.
+ *
+ * @return The smallest amount of free stack space there has been (in words, so
+ * actual spaces on the stack rather than bytes) since the task referenced by
+ * xTask was created.
+ */
+configSTACK_DEPTH_TYPE uxTaskGetStackHighWaterMark2( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/* When using trace macros it is sometimes necessary to include task.h before
+FreeRTOS.h.  When this is done TaskHookFunction_t will not yet have been defined,
+so the following two prototypes will cause a compilation error.  This can be
+fixed by simply guarding against the inclusion of these two prototypes unless
+they are explicitly required by the configUSE_APPLICATION_TASK_TAG configuration
+constant. */
+#ifdef configUSE_APPLICATION_TASK_TAG
+	#if configUSE_APPLICATION_TASK_TAG == 1
+		/**
+		 * task.h
+		 * 
void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction );

+		 *
+		 * Sets pxHookFunction to be the task hook function used by the task xTask.
+		 * Passing xTask as NULL has the effect of setting the calling tasks hook
+		 * function.
+		 */
+		void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction ) PRIVILEGED_FUNCTION;
+
+		/**
+		 * task.h
+		 * 
void xTaskGetApplicationTaskTag( TaskHandle_t xTask );

+		 *
+		 * Returns the pxHookFunction value assigned to the task xTask.  Do not
+		 * call from an interrupt service routine - call
+		 * xTaskGetApplicationTaskTagFromISR() instead.
+		 */
+		TaskHookFunction_t xTaskGetApplicationTaskTag( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+		/**
+		 * task.h
+		 * 
void xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask );

+		 *
+		 * Returns the pxHookFunction value assigned to the task xTask.  Can
+		 * be called from an interrupt service routine.
+		 */
+		TaskHookFunction_t xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+	#endif /* configUSE_APPLICATION_TASK_TAG ==1 */
+#endif /* ifdef configUSE_APPLICATION_TASK_TAG */
+
+#if( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )
+
+	/* Each task contains an array of pointers that is dimensioned by the
+	configNUM_THREAD_LOCAL_STORAGE_POINTERS setting in FreeRTOSConfig.h.  The
+	kernel does not use the pointers itself, so the application writer can use
+	the pointers for any purpose they wish.  The following two functions are
+	used to set and query a pointer respectively. */
+	void vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue ) PRIVILEGED_FUNCTION;
+	void *pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex ) PRIVILEGED_FUNCTION;
+
+#endif
+
+/**
+ * task.h
+ * 
BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter );

+ *
+ * Calls the hook function associated with xTask.  Passing xTask as NULL has
+ * the effect of calling the Running tasks (the calling task) hook function.
+ *
+ * pvParameter is passed to the hook function for the task to interpret as it
+ * wants.  The return value is the value returned by the task hook function
+ * registered by the user.
+ */
+BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter ) PRIVILEGED_FUNCTION;
+
+/**
+ * xTaskGetIdleTaskHandle() is only available if
+ * INCLUDE_xTaskGetIdleTaskHandle is set to 1 in FreeRTOSConfig.h.
+ *
+ * Simply returns the handle of the idle task.  It is not valid to call
+ * xTaskGetIdleTaskHandle() before the scheduler has been started.
+ */
+TaskHandle_t xTaskGetIdleTaskHandle( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * configUSE_TRACE_FACILITY must be defined as 1 in FreeRTOSConfig.h for
+ * uxTaskGetSystemState() to be available.
+ *
+ * uxTaskGetSystemState() populates an TaskStatus_t structure for each task in
+ * the system.  TaskStatus_t structures contain, among other things, members
+ * for the task handle, task name, task priority, task state, and total amount
+ * of run time consumed by the task.  See the TaskStatus_t structure
+ * definition in this file for the full member list.
+ *
+ * NOTE:  This function is intended for debugging use only as its use results in
+ * the scheduler remaining suspended for an extended period.
+ *
+ * @param pxTaskStatusArray A pointer to an array of TaskStatus_t structures.
+ * The array must contain at least one TaskStatus_t structure for each task
+ * that is under the control of the RTOS.  The number of tasks under the control
+ * of the RTOS can be determined using the uxTaskGetNumberOfTasks() API function.
+ *
+ * @param uxArraySize The size of the array pointed to by the pxTaskStatusArray
+ * parameter.  The size is specified as the number of indexes in the array, or
+ * the number of TaskStatus_t structures contained in the array, not by the
+ * number of bytes in the array.
+ *
+ * @param pulTotalRunTime If configGENERATE_RUN_TIME_STATS is set to 1 in
+ * FreeRTOSConfig.h then *pulTotalRunTime is set by uxTaskGetSystemState() to the
+ * total run time (as defined by the run time stats clock, see
+ * http://www.freertos.org/rtos-run-time-stats.html) since the target booted.
+ * pulTotalRunTime can be set to NULL to omit the total run time information.
+ *
+ * @return The number of TaskStatus_t structures that were populated by
+ * uxTaskGetSystemState().  This should equal the number returned by the
+ * uxTaskGetNumberOfTasks() API function, but will be zero if the value passed
+ * in the uxArraySize parameter was too small.
+ *
+ * Example usage:
+   
+    // This example demonstrates how a human readable table of run time stats
+	// information is generated from raw data provided by uxTaskGetSystemState().
+	// The human readable table is written to pcWriteBuffer
+	void vTaskGetRunTimeStats( char *pcWriteBuffer )
+	{
+	TaskStatus_t *pxTaskStatusArray;
+	volatile UBaseType_t uxArraySize, x;
+	uint32_t ulTotalRunTime, ulStatsAsPercentage;
+
+		// Make sure the write buffer does not contain a string.
+		*pcWriteBuffer = 0x00;
+
+		// Take a snapshot of the number of tasks in case it changes while this
+		// function is executing.
+		uxArraySize = uxTaskGetNumberOfTasks();
+
+		// Allocate a TaskStatus_t structure for each task.  An array could be
+		// allocated statically at compile time.
+		pxTaskStatusArray = pvPortMalloc( uxArraySize * sizeof( TaskStatus_t ) );
+
+		if( pxTaskStatusArray != NULL )
+		{
+			// Generate raw status information about each task.
+			uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalRunTime );
+
+			// For percentage calculations.
+			ulTotalRunTime /= 100UL;
+
+			// Avoid divide by zero errors.
+			if( ulTotalRunTime > 0 )
+			{
+				// For each populated position in the pxTaskStatusArray array,
+				// format the raw data as human readable ASCII data
+				for( x = 0; x < uxArraySize; x++ )
+				{
+					// What percentage of the total run time has the task used?
+					// This will always be rounded down to the nearest integer.
+					// ulTotalRunTimeDiv100 has already been divided by 100.
+					ulStatsAsPercentage = pxTaskStatusArray[ x ].ulRunTimeCounter / ulTotalRunTime;
+
+					if( ulStatsAsPercentage > 0UL )
+					{
+						sprintf( pcWriteBuffer, "%s\t\t%lu\t\t%lu%%\r\n", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter, ulStatsAsPercentage );
+					}
+					else
+					{
+						// If the percentage is zero here then the task has
+						// consumed less than 1% of the total run time.
+						sprintf( pcWriteBuffer, "%s\t\t%lu\t\t<1%%\r\n", pxTaskStatusArray[ x ].pcTaskName, pxTaskStatusArray[ x ].ulRunTimeCounter );
+					}
+
+					pcWriteBuffer += strlen( ( char * ) pcWriteBuffer );
+				}
+			}
+
+			// The array is no longer needed, free the memory it consumes.
+			vPortFree( pxTaskStatusArray );
+		}
+	}
+	

+ */
+UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
void vTaskList( char *pcWriteBuffer );

+ *
+ * configUSE_TRACE_FACILITY and configUSE_STATS_FORMATTING_FUNCTIONS must
+ * both be defined as 1 for this function to be available.  See the
+ * configuration section of the FreeRTOS.org website for more information.
+ *
+ * NOTE 1: This function will disable interrupts for its duration.  It is
+ * not intended for normal application runtime use but as a debug aid.
+ *
+ * Lists all the current tasks, along with their current state and stack
+ * usage high water mark.
+ *
+ * Tasks are reported as blocked ('B'), ready ('R'), deleted ('D') or
+ * suspended ('S').
+ *
+ * PLEASE NOTE:
+ *
+ * This function is provided for convenience only, and is used by many of the
+ * demo applications.  Do not consider it to be part of the scheduler.
+ *
+ * vTaskList() calls uxTaskGetSystemState(), then formats part of the
+ * uxTaskGetSystemState() output into a human readable table that displays task
+ * names, states and stack usage.
+ *
+ * vTaskList() has a dependency on the sprintf() C library function that might
+ * bloat the code size, use a lot of stack, and provide different results on
+ * different platforms.  An alternative, tiny, third party, and limited
+ * functionality implementation of sprintf() is provided in many of the
+ * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note
+ * printf-stdarg.c does not provide a full snprintf() implementation!).
+ *
+ * It is recommended that production systems call uxTaskGetSystemState()
+ * directly to get access to raw stats data, rather than indirectly through a
+ * call to vTaskList().
+ *
+ * @param pcWriteBuffer A buffer into which the above mentioned details
+ * will be written, in ASCII form.  This buffer is assumed to be large
+ * enough to contain the generated report.  Approximately 40 bytes per
+ * task should be sufficient.
+ *
+ * \defgroup vTaskList vTaskList
+ * \ingroup TaskUtils
+ */
+void vTaskList( char * pcWriteBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+
+/**
+ * task. h
+ * 
void vTaskGetRunTimeStats( char *pcWriteBuffer );

+ *
+ * configGENERATE_RUN_TIME_STATS and configUSE_STATS_FORMATTING_FUNCTIONS
+ * must both be defined as 1 for this function to be available.  The application
+ * must also then provide definitions for
+ * portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and portGET_RUN_TIME_COUNTER_VALUE()
+ * to configure a peripheral timer/counter and return the timers current count
+ * value respectively.  The counter should be at least 10 times the frequency of
+ * the tick count.
+ *
+ * NOTE 1: This function will disable interrupts for its duration.  It is
+ * not intended for normal application runtime use but as a debug aid.
+ *
+ * Setting configGENERATE_RUN_TIME_STATS to 1 will result in a total
+ * accumulated execution time being stored for each task.  The resolution
+ * of the accumulated time value depends on the frequency of the timer
+ * configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro.
+ * Calling vTaskGetRunTimeStats() writes the total execution time of each
+ * task into a buffer, both as an absolute count value and as a percentage
+ * of the total system execution time.
+ *
+ * NOTE 2:
+ *
+ * This function is provided for convenience only, and is used by many of the
+ * demo applications.  Do not consider it to be part of the scheduler.
+ *
+ * vTaskGetRunTimeStats() calls uxTaskGetSystemState(), then formats part of the
+ * uxTaskGetSystemState() output into a human readable table that displays the
+ * amount of time each task has spent in the Running state in both absolute and
+ * percentage terms.
+ *
+ * vTaskGetRunTimeStats() has a dependency on the sprintf() C library function
+ * that might bloat the code size, use a lot of stack, and provide different
+ * results on different platforms.  An alternative, tiny, third party, and
+ * limited functionality implementation of sprintf() is provided in many of the
+ * FreeRTOS/Demo sub-directories in a file called printf-stdarg.c (note
+ * printf-stdarg.c does not provide a full snprintf() implementation!).
+ *
+ * It is recommended that production systems call uxTaskGetSystemState() directly
+ * to get access to raw stats data, rather than indirectly through a call to
+ * vTaskGetRunTimeStats().
+ *
+ * @param pcWriteBuffer A buffer into which the execution times will be
+ * written, in ASCII form.  This buffer is assumed to be large enough to
+ * contain the generated report.  Approximately 40 bytes per task should
+ * be sufficient.
+ *
+ * \defgroup vTaskGetRunTimeStats vTaskGetRunTimeStats
+ * \ingroup TaskUtils
+ */
+void vTaskGetRunTimeStats( char *pcWriteBuffer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+
+/**
+* task. h
+* 
uint32_t ulTaskGetIdleRunTimeCounter( void );

+*
+* configGENERATE_RUN_TIME_STATS and configUSE_STATS_FORMATTING_FUNCTIONS
+* must both be defined as 1 for this function to be available.  The application
+* must also then provide definitions for
+* portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and portGET_RUN_TIME_COUNTER_VALUE()
+* to configure a peripheral timer/counter and return the timers current count
+* value respectively.  The counter should be at least 10 times the frequency of
+* the tick count.
+*
+* Setting configGENERATE_RUN_TIME_STATS to 1 will result in a total
+* accumulated execution time being stored for each task.  The resolution
+* of the accumulated time value depends on the frequency of the timer
+* configured by the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() macro.
+* While uxTaskGetSystemState() and vTaskGetRunTimeStats() writes the total
+* execution time of each task into a buffer, ulTaskGetIdleRunTimeCounter()
+* returns the total execution time of just the idle task.
+*
+* @return The total run time of the idle task.  This is the amount of time the
+* idle task has actually been executing.  The unit of time is dependent on the
+* frequency configured using the portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() and
+* portGET_RUN_TIME_COUNTER_VALUE() macros.
+*
+* \defgroup ulTaskGetIdleRunTimeCounter ulTaskGetIdleRunTimeCounter
+* \ingroup TaskUtils
+*/
+uint32_t ulTaskGetIdleRunTimeCounter( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
BaseType_t xTaskNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction );

+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this
+ * function to be available.
+ *
+ * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private
+ * "notification value", which is a 32-bit unsigned integer (uint32_t).
+ *
+ * Events can be sent to a task using an intermediary object.  Examples of such
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
+ * are a method of sending an event directly to a task without the need for such
+ * an intermediary object.
+ *
+ * A notification sent to a task can optionally perform an action, such as
+ * update, overwrite or increment the task's notification value.  In that way
+ * task notifications can be used to send data to a task, or be used as light
+ * weight and fast binary or counting semaphores.
+ *
+ * A notification sent to a task will remain pending until it is cleared by the
+ * task calling xTaskNotifyWait() or ulTaskNotifyTake().  If the task was
+ * already in the Blocked state to wait for a notification when the notification
+ * arrives then the task will automatically be removed from the Blocked state
+ * (unblocked) and the notification cleared.
+ *
+ * A task can use xTaskNotifyWait() to [optionally] block to wait for a
+ * notification to be pending, or ulTaskNotifyTake() to [optionally] block
+ * to wait for its notification value to have a non-zero value.  The task does
+ * not consume any CPU time while it is in the Blocked state.
+ *
+ * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * @param xTaskToNotify The handle of the task being notified.  The handle to a
+ * task can be returned from the xTaskCreate() API function used to create the
+ * task, and the handle of the currently running task can be obtained by calling
+ * xTaskGetCurrentTaskHandle().
+ *
+ * @param ulValue Data that can be sent with the notification.  How the data is
+ * used depends on the value of the eAction parameter.
+ *
+ * @param eAction Specifies how the notification updates the task's notification
+ * value, if at all.  Valid values for eAction are as follows:
+ *
+ * eSetBits -
+ * The task's notification value is bitwise ORed with ulValue.  xTaskNofify()
+ * always returns pdPASS in this case.
+ *
+ * eIncrement -
+ * The task's notification value is incremented.  ulValue is not used and
+ * xTaskNotify() always returns pdPASS in this case.
+ *
+ * eSetValueWithOverwrite -
+ * The task's notification value is set to the value of ulValue, even if the
+ * task being notified had not yet processed the previous notification (the
+ * task already had a notification pending).  xTaskNotify() always returns
+ * pdPASS in this case.
+ *
+ * eSetValueWithoutOverwrite -
+ * If the task being notified did not already have a notification pending then
+ * the task's notification value is set to ulValue and xTaskNotify() will
+ * return pdPASS.  If the task being notified already had a notification
+ * pending then no action is performed and pdFAIL is returned.
+ *
+ * eNoAction -
+ * The task receives a notification without its notification value being
+ * updated.  ulValue is not used and xTaskNotify() always returns pdPASS in
+ * this case.
+ *
+ *  pulPreviousNotificationValue -
+ *  Can be used to pass out the subject task's notification value before any
+ *  bits are modified by the notify function.
+ *
+ * @return Dependent on the value of eAction.  See the description of the
+ * eAction parameter.
+ *
+ * \defgroup xTaskNotify xTaskNotify
+ * \ingroup TaskNotifications
+ */
+BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue ) PRIVILEGED_FUNCTION;
+#define xTaskNotify( xTaskToNotify, ulValue, eAction ) xTaskGenericNotify( ( xTaskToNotify ), ( ulValue ), ( eAction ), NULL )
+#define xTaskNotifyAndQuery( xTaskToNotify, ulValue, eAction, pulPreviousNotifyValue ) xTaskGenericNotify( ( xTaskToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotifyValue ) )
+
+/**
+ * task. h
+ * 
BaseType_t xTaskNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, BaseType_t *pxHigherPriorityTaskWoken );

+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this
+ * function to be available.
+ *
+ * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private
+ * "notification value", which is a 32-bit unsigned integer (uint32_t).
+ *
+ * A version of xTaskNotify() that can be used from an interrupt service routine
+ * (ISR).
+ *
+ * Events can be sent to a task using an intermediary object.  Examples of such
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
+ * are a method of sending an event directly to a task without the need for such
+ * an intermediary object.
+ *
+ * A notification sent to a task can optionally perform an action, such as
+ * update, overwrite or increment the task's notification value.  In that way
+ * task notifications can be used to send data to a task, or be used as light
+ * weight and fast binary or counting semaphores.
+ *
+ * A notification sent to a task will remain pending until it is cleared by the
+ * task calling xTaskNotifyWait() or ulTaskNotifyTake().  If the task was
+ * already in the Blocked state to wait for a notification when the notification
+ * arrives then the task will automatically be removed from the Blocked state
+ * (unblocked) and the notification cleared.
+ *
+ * A task can use xTaskNotifyWait() to [optionally] block to wait for a
+ * notification to be pending, or ulTaskNotifyTake() to [optionally] block
+ * to wait for its notification value to have a non-zero value.  The task does
+ * not consume any CPU time while it is in the Blocked state.
+ *
+ * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * @param xTaskToNotify The handle of the task being notified.  The handle to a
+ * task can be returned from the xTaskCreate() API function used to create the
+ * task, and the handle of the currently running task can be obtained by calling
+ * xTaskGetCurrentTaskHandle().
+ *
+ * @param ulValue Data that can be sent with the notification.  How the data is
+ * used depends on the value of the eAction parameter.
+ *
+ * @param eAction Specifies how the notification updates the task's notification
+ * value, if at all.  Valid values for eAction are as follows:
+ *
+ * eSetBits -
+ * The task's notification value is bitwise ORed with ulValue.  xTaskNofify()
+ * always returns pdPASS in this case.
+ *
+ * eIncrement -
+ * The task's notification value is incremented.  ulValue is not used and
+ * xTaskNotify() always returns pdPASS in this case.
+ *
+ * eSetValueWithOverwrite -
+ * The task's notification value is set to the value of ulValue, even if the
+ * task being notified had not yet processed the previous notification (the
+ * task already had a notification pending).  xTaskNotify() always returns
+ * pdPASS in this case.
+ *
+ * eSetValueWithoutOverwrite -
+ * If the task being notified did not already have a notification pending then
+ * the task's notification value is set to ulValue and xTaskNotify() will
+ * return pdPASS.  If the task being notified already had a notification
+ * pending then no action is performed and pdFAIL is returned.
+ *
+ * eNoAction -
+ * The task receives a notification without its notification value being
+ * updated.  ulValue is not used and xTaskNotify() always returns pdPASS in
+ * this case.
+ *
+ * @param pxHigherPriorityTaskWoken  xTaskNotifyFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the
+ * task to which the notification was sent to leave the Blocked state, and the
+ * unblocked task has a priority higher than the currently running task.  If
+ * xTaskNotifyFromISR() sets this value to pdTRUE then a context switch should
+ * be requested before the interrupt is exited.  How a context switch is
+ * requested from an ISR is dependent on the port - see the documentation page
+ * for the port in use.
+ *
+ * @return Dependent on the value of eAction.  See the description of the
+ * eAction parameter.
+ *
+ * \defgroup xTaskNotify xTaskNotify
+ * \ingroup TaskNotifications
+ */
+BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+#define xTaskNotifyFromISR( xTaskToNotify, ulValue, eAction, pxHigherPriorityTaskWoken ) xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( ulValue ), ( eAction ), NULL, ( pxHigherPriorityTaskWoken ) )
+#define xTaskNotifyAndQueryFromISR( xTaskToNotify, ulValue, eAction, pulPreviousNotificationValue, pxHigherPriorityTaskWoken ) xTaskGenericNotifyFromISR( ( xTaskToNotify ), ( ulValue ), ( eAction ), ( pulPreviousNotificationValue ), ( pxHigherPriorityTaskWoken ) )
+
+/**
+ * task. h
+ * 
BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait );

+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this
+ * function to be available.
+ *
+ * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private
+ * "notification value", which is a 32-bit unsigned integer (uint32_t).
+ *
+ * Events can be sent to a task using an intermediary object.  Examples of such
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
+ * are a method of sending an event directly to a task without the need for such
+ * an intermediary object.
+ *
+ * A notification sent to a task can optionally perform an action, such as
+ * update, overwrite or increment the task's notification value.  In that way
+ * task notifications can be used to send data to a task, or be used as light
+ * weight and fast binary or counting semaphores.
+ *
+ * A notification sent to a task will remain pending until it is cleared by the
+ * task calling xTaskNotifyWait() or ulTaskNotifyTake().  If the task was
+ * already in the Blocked state to wait for a notification when the notification
+ * arrives then the task will automatically be removed from the Blocked state
+ * (unblocked) and the notification cleared.
+ *
+ * A task can use xTaskNotifyWait() to [optionally] block to wait for a
+ * notification to be pending, or ulTaskNotifyTake() to [optionally] block
+ * to wait for its notification value to have a non-zero value.  The task does
+ * not consume any CPU time while it is in the Blocked state.
+ *
+ * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * @param ulBitsToClearOnEntry Bits that are set in ulBitsToClearOnEntry value
+ * will be cleared in the calling task's notification value before the task
+ * checks to see if any notifications are pending, and optionally blocks if no
+ * notifications are pending.  Setting ulBitsToClearOnEntry to ULONG_MAX (if
+ * limits.h is included) or 0xffffffffUL (if limits.h is not included) will have
+ * the effect of resetting the task's notification value to 0.  Setting
+ * ulBitsToClearOnEntry to 0 will leave the task's notification value unchanged.
+ *
+ * @param ulBitsToClearOnExit If a notification is pending or received before
+ * the calling task exits the xTaskNotifyWait() function then the task's
+ * notification value (see the xTaskNotify() API function) is passed out using
+ * the pulNotificationValue parameter.  Then any bits that are set in
+ * ulBitsToClearOnExit will be cleared in the task's notification value (note
+ * *pulNotificationValue is set before any bits are cleared).  Setting
+ * ulBitsToClearOnExit to ULONG_MAX (if limits.h is included) or 0xffffffffUL
+ * (if limits.h is not included) will have the effect of resetting the task's
+ * notification value to 0 before the function exits.  Setting
+ * ulBitsToClearOnExit to 0 will leave the task's notification value unchanged
+ * when the function exits (in which case the value passed out in
+ * pulNotificationValue will match the task's notification value).
+ *
+ * @param pulNotificationValue Used to pass the task's notification value out
+ * of the function.  Note the value passed out will not be effected by the
+ * clearing of any bits caused by ulBitsToClearOnExit being non-zero.
+ *
+ * @param xTicksToWait The maximum amount of time that the task should wait in
+ * the Blocked state for a notification to be received, should a notification
+ * not already be pending when xTaskNotifyWait() was called.  The task
+ * will not consume any processing time while it is in the Blocked state.  This
+ * is specified in kernel ticks, the macro pdMS_TO_TICSK( value_in_ms ) can be
+ * used to convert a time specified in milliseconds to a time specified in
+ * ticks.
+ *
+ * @return If a notification was received (including notifications that were
+ * already pending when xTaskNotifyWait was called) then pdPASS is
+ * returned.  Otherwise pdFAIL is returned.
+ *
+ * \defgroup xTaskNotifyWait xTaskNotifyWait
+ * \ingroup TaskNotifications
+ */
+BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
BaseType_t xTaskNotifyGive( TaskHandle_t xTaskToNotify );

+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this macro
+ * to be available.
+ *
+ * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private
+ * "notification value", which is a 32-bit unsigned integer (uint32_t).
+ *
+ * Events can be sent to a task using an intermediary object.  Examples of such
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
+ * are a method of sending an event directly to a task without the need for such
+ * an intermediary object.
+ *
+ * A notification sent to a task can optionally perform an action, such as
+ * update, overwrite or increment the task's notification value.  In that way
+ * task notifications can be used to send data to a task, or be used as light
+ * weight and fast binary or counting semaphores.
+ *
+ * xTaskNotifyGive() is a helper macro intended for use when task notifications
+ * are used as light weight and faster binary or counting semaphore equivalents.
+ * Actual FreeRTOS semaphores are given using the xSemaphoreGive() API function,
+ * the equivalent action that instead uses a task notification is
+ * xTaskNotifyGive().
+ *
+ * When task notifications are being used as a binary or counting semaphore
+ * equivalent then the task being notified should wait for the notification
+ * using the ulTaskNotificationTake() API function rather than the
+ * xTaskNotifyWait() API function.
+ *
+ * See http://www.FreeRTOS.org/RTOS-task-notifications.html for more details.
+ *
+ * @param xTaskToNotify The handle of the task being notified.  The handle to a
+ * task can be returned from the xTaskCreate() API function used to create the
+ * task, and the handle of the currently running task can be obtained by calling
+ * xTaskGetCurrentTaskHandle().
+ *
+ * @return xTaskNotifyGive() is a macro that calls xTaskNotify() with the
+ * eAction parameter set to eIncrement - so pdPASS is always returned.
+ *
+ * \defgroup xTaskNotifyGive xTaskNotifyGive
+ * \ingroup TaskNotifications
+ */
+#define xTaskNotifyGive( xTaskToNotify ) xTaskGenericNotify( ( xTaskToNotify ), ( 0 ), eIncrement, NULL )
+
+/**
+ * task. h
+ * 
void vTaskNotifyGiveFromISR( TaskHandle_t xTaskHandle, BaseType_t *pxHigherPriorityTaskWoken );
+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this macro
+ * to be available.
+ *
+ * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private
+ * "notification value", which is a 32-bit unsigned integer (uint32_t).
+ *
+ * A version of xTaskNotifyGive() that can be called from an interrupt service
+ * routine (ISR).
+ *
+ * Events can be sent to a task using an intermediary object.  Examples of such
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
+ * are a method of sending an event directly to a task without the need for such
+ * an intermediary object.
+ *
+ * A notification sent to a task can optionally perform an action, such as
+ * update, overwrite or increment the task's notification value.  In that way
+ * task notifications can be used to send data to a task, or be used as light
+ * weight and fast binary or counting semaphores.
+ *
+ * vTaskNotifyGiveFromISR() is intended for use when task notifications are
+ * used as light weight and faster binary or counting semaphore equivalents.
+ * Actual FreeRTOS semaphores are given from an ISR using the
+ * xSemaphoreGiveFromISR() API function, the equivalent action that instead uses
+ * a task notification is vTaskNotifyGiveFromISR().
+ *
+ * When task notifications are being used as a binary or counting semaphore
+ * equivalent then the task being notified should wait for the notification
+ * using the ulTaskNotificationTake() API function rather than the
+ * xTaskNotifyWait() API function.
+ *
+ * See http://www.FreeRTOS.org/RTOS-task-notifications.html for more details.
+ *
+ * @param xTaskToNotify The handle of the task being notified.  The handle to a
+ * task can be returned from the xTaskCreate() API function used to create the
+ * task, and the handle of the currently running task can be obtained by calling
+ * xTaskGetCurrentTaskHandle().
+ *
+ * @param pxHigherPriorityTaskWoken  vTaskNotifyGiveFromISR() will set
+ * *pxHigherPriorityTaskWoken to pdTRUE if sending the notification caused the
+ * task to which the notification was sent to leave the Blocked state, and the
+ * unblocked task has a priority higher than the currently running task.  If
+ * vTaskNotifyGiveFromISR() sets this value to pdTRUE then a context switch
+ * should be requested before the interrupt is exited.  How a context switch is
+ * requested from an ISR is dependent on the port - see the documentation page
+ * for the port in use.
+ *
+ * \defgroup xTaskNotifyWait xTaskNotifyWait
+ * \ingroup TaskNotifications
+ */
+void vTaskNotifyGiveFromISR( TaskHandle_t xTaskToNotify, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait );

+ *
+ * configUSE_TASK_NOTIFICATIONS must be undefined or defined as 1 for this
+ * function to be available.
+ *
+ * When configUSE_TASK_NOTIFICATIONS is set to one each task has its own private
+ * "notification value", which is a 32-bit unsigned integer (uint32_t).
+ *
+ * Events can be sent to a task using an intermediary object.  Examples of such
+ * objects are queues, semaphores, mutexes and event groups.  Task notifications
+ * are a method of sending an event directly to a task without the need for such
+ * an intermediary object.
+ *
+ * A notification sent to a task can optionally perform an action, such as
+ * update, overwrite or increment the task's notification value.  In that way
+ * task notifications can be used to send data to a task, or be used as light
+ * weight and fast binary or counting semaphores.
+ *
+ * ulTaskNotifyTake() is intended for use when a task notification is used as a
+ * faster and lighter weight binary or counting semaphore alternative.  Actual
+ * FreeRTOS semaphores are taken using the xSemaphoreTake() API function, the
+ * equivalent action that instead uses a task notification is
+ * ulTaskNotifyTake().
+ *
+ * When a task is using its notification value as a binary or counting semaphore
+ * other tasks should send notifications to it using the xTaskNotifyGive()
+ * macro, or xTaskNotify() function with the eAction parameter set to
+ * eIncrement.
+ *
+ * ulTaskNotifyTake() can either clear the task's notification value to
+ * zero on exit, in which case the notification value acts like a binary
+ * semaphore, or decrement the task's notification value on exit, in which case
+ * the notification value acts like a counting semaphore.
+ *
+ * A task can use ulTaskNotifyTake() to [optionally] block to wait for a
+ * the task's notification value to be non-zero.  The task does not consume any
+ * CPU time while it is in the Blocked state.
+ *
+ * Where as xTaskNotifyWait() will return when a notification is pending,
+ * ulTaskNotifyTake() will return when the task's notification value is
+ * not zero.
+ *
+ * See http://www.FreeRTOS.org/RTOS-task-notifications.html for details.
+ *
+ * @param xClearCountOnExit if xClearCountOnExit is pdFALSE then the task's
+ * notification value is decremented when the function exits.  In this way the
+ * notification value acts like a counting semaphore.  If xClearCountOnExit is
+ * not pdFALSE then the task's notification value is cleared to zero when the
+ * function exits.  In this way the notification value acts like a binary
+ * semaphore.
+ *
+ * @param xTicksToWait The maximum amount of time that the task should wait in
+ * the Blocked state for the task's notification value to be greater than zero,
+ * should the count not already be greater than zero when
+ * ulTaskNotifyTake() was called.  The task will not consume any processing
+ * time while it is in the Blocked state.  This is specified in kernel ticks,
+ * the macro pdMS_TO_TICSK( value_in_ms ) can be used to convert a time
+ * specified in milliseconds to a time specified in ticks.
+ *
+ * @return The task's notification count before it is either cleared to zero or
+ * decremented (see the xClearCountOnExit parameter).
+ *
+ * \defgroup ulTaskNotifyTake ulTaskNotifyTake
+ * \ingroup TaskNotifications
+ */
+uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * task. h
+ * 
BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask );

+ *
+ * If the notification state of the task referenced by the handle xTask is
+ * eNotified, then set the task's notification state to eNotWaitingNotification.
+ * The task's notification value is not altered.  Set xTask to NULL to clear the
+ * notification state of the calling task.
+ *
+ * @return pdTRUE if the task's notification state was set to
+ * eNotWaitingNotification, otherwise pdFALSE.
+ * \defgroup xTaskNotifyStateClear xTaskNotifyStateClear
+ * \ingroup TaskNotifications
+ */
+BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask );
+
+/*-----------------------------------------------------------
+ * SCHEDULER INTERNALS AVAILABLE FOR PORTING PURPOSES
+ *----------------------------------------------------------*/
+
+/*
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS ONLY
+ * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS
+ * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
+ *
+ * Called from the real time kernel tick (either preemptive or cooperative),
+ * this increments the tick count and checks if any tasks that are blocked
+ * for a finite period required removing from a blocked list and placing on
+ * a ready list.  If a non-zero value is returned then a context switch is
+ * required because either:
+ *   + A task was removed from a blocked list because its timeout had expired,
+ *     or
+ *   + Time slicing is in use and there is a task of equal priority to the
+ *     currently running task.
+ */
+BaseType_t xTaskIncrementTick( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
+ * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
+ *
+ * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
+ *
+ * Removes the calling task from the ready list and places it both
+ * on the list of tasks waiting for a particular event, and the
+ * list of delayed tasks.  The task will be removed from both lists
+ * and replaced on the ready list should either the event occur (and
+ * there be no higher priority tasks waiting on the same event) or
+ * the delay period expires.
+ *
+ * The 'unordered' version replaces the event list item value with the
+ * xItemValue value, and inserts the list item at the end of the list.
+ *
+ * The 'ordered' version uses the existing event list item value (which is the
+ * owning tasks priority) to insert the list item into the event list is task
+ * priority order.
+ *
+ * @param pxEventList The list containing tasks that are blocked waiting
+ * for the event to occur.
+ *
+ * @param xItemValue The item value to use for the event list item when the
+ * event list is not ordered by task priority.
+ *
+ * @param xTicksToWait The maximum amount of time that the task should wait
+ * for the event to occur.  This is specified in kernel ticks,the constant
+ * portTICK_PERIOD_MS can be used to convert kernel ticks into a real time
+ * period.
+ */
+void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+void vTaskPlaceOnUnorderedEventList( List_t * pxEventList, const TickType_t xItemValue, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/*
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
+ * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
+ *
+ * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
+ *
+ * This function performs nearly the same function as vTaskPlaceOnEventList().
+ * The difference being that this function does not permit tasks to block
+ * indefinitely, whereas vTaskPlaceOnEventList() does.
+ *
+ */
+void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely ) PRIVILEGED_FUNCTION;
+
+/*
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS AN
+ * INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
+ *
+ * THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED.
+ *
+ * Removes a task from both the specified event list and the list of blocked
+ * tasks, and places it on a ready queue.
+ *
+ * xTaskRemoveFromEventList()/vTaskRemoveFromUnorderedEventList() will be called
+ * if either an event occurs to unblock a task, or the block timeout period
+ * expires.
+ *
+ * xTaskRemoveFromEventList() is used when the event list is in task priority
+ * order.  It removes the list item from the head of the event list as that will
+ * have the highest priority owning task of all the tasks on the event list.
+ * vTaskRemoveFromUnorderedEventList() is used when the event list is not
+ * ordered and the event list items hold something other than the owning tasks
+ * priority.  In this case the event list item value is updated to the value
+ * passed in the xItemValue parameter.
+ *
+ * @return pdTRUE if the task being removed has a higher priority than the task
+ * making the call, otherwise pdFALSE.
+ */
+BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList ) PRIVILEGED_FUNCTION;
+void vTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem, const TickType_t xItemValue ) PRIVILEGED_FUNCTION;
+
+/*
+ * THIS FUNCTION MUST NOT BE USED FROM APPLICATION CODE.  IT IS ONLY
+ * INTENDED FOR USE WHEN IMPLEMENTING A PORT OF THE SCHEDULER AND IS
+ * AN INTERFACE WHICH IS FOR THE EXCLUSIVE USE OF THE SCHEDULER.
+ *
+ * Sets the pointer to the current TCB to the TCB of the highest priority task
+ * that is ready to run.
+ */
+portDONT_DISCARD void vTaskSwitchContext( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * THESE FUNCTIONS MUST NOT BE USED FROM APPLICATION CODE.  THEY ARE USED BY
+ * THE EVENT BITS MODULE.
+ */
+TickType_t uxTaskResetEventItemValue( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * Return the handle of the calling task.
+ */
+TaskHandle_t xTaskGetCurrentTaskHandle( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * Capture the current time status for future reference.
+ */
+void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;
+
+/*
+ * Compare the time status now with that previously captured to see if the
+ * timeout has expired.
+ */
+BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) PRIVILEGED_FUNCTION;
+
+/*
+ * Shortcut used by the queue implementation to prevent unnecessary call to
+ * taskYIELD();
+ */
+void vTaskMissedYield( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * Returns the scheduler state as taskSCHEDULER_RUNNING,
+ * taskSCHEDULER_NOT_STARTED or taskSCHEDULER_SUSPENDED.
+ */
+BaseType_t xTaskGetSchedulerState( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * Raises the priority of the mutex holder to that of the calling task should
+ * the mutex holder have a priority less than the calling task.
+ */
+BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION;
+
+/*
+ * Set the priority of a task back to its proper priority in the case that it
+ * inherited a higher priority while it was holding a semaphore.
+ */
+BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder ) PRIVILEGED_FUNCTION;
+
+/*
+ * If a higher priority task attempting to obtain a mutex caused a lower
+ * priority task to inherit the higher priority task's priority - but the higher
+ * priority task then timed out without obtaining the mutex, then the lower
+ * priority task will disinherit the priority again - but only down as far as
+ * the highest priority task that is still waiting for the mutex (if there were
+ * more than one task waiting for the mutex).
+ */
+void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder, UBaseType_t uxHighestPriorityWaitingTask ) PRIVILEGED_FUNCTION;
+
+/*
+ * Get the uxTCBNumber assigned to the task referenced by the xTask parameter.
+ */
+UBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+/*
+ * Set the uxTaskNumber of the task referenced by the xTask parameter to
+ * uxHandle.
+ */
+void vTaskSetTaskNumber( TaskHandle_t xTask, const UBaseType_t uxHandle ) PRIVILEGED_FUNCTION;
+
+/*
+ * Only available when configUSE_TICKLESS_IDLE is set to 1.
+ * If tickless mode is being used, or a low power mode is implemented, then
+ * the tick interrupt will not execute during idle periods.  When this is the
+ * case, the tick count value maintained by the scheduler needs to be kept up
+ * to date with the actual execution time by being skipped forward by a time
+ * equal to the idle period.
+ */
+void vTaskStepTick( const TickType_t xTicksToJump ) PRIVILEGED_FUNCTION;
+
+/* Correct the tick count value after the application code has held
+interrupts disabled for an extended period.  xTicksToCatchUp is the number
+of tick interrupts that have been missed due to interrupts being disabled.
+Its value is not computed automatically, so must be computed by the
+application writer.
+
+This function is similar to vTaskStepTick(), however, unlike
+vTaskStepTick(), xTaskCatchUpTicks() may move the tick count forward past a
+time at which a task should be removed from the blocked state.  That means
+tasks may have to be removed from the blocked state as the tick count is
+moved. */
+BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp ) PRIVILEGED_FUNCTION;
+
+/*
+ * Only available when configUSE_TICKLESS_IDLE is set to 1.
+ * Provided for use within portSUPPRESS_TICKS_AND_SLEEP() to allow the port
+ * specific sleep function to determine if it is ok to proceed with the sleep,
+ * and if it is ok to proceed, if it is ok to sleep indefinitely.
+ *
+ * This function is necessary because portSUPPRESS_TICKS_AND_SLEEP() is only
+ * called with the scheduler suspended, not from within a critical section.  It
+ * is therefore possible for an interrupt to request a context switch between
+ * portSUPPRESS_TICKS_AND_SLEEP() and the low power mode actually being
+ * entered.  eTaskConfirmSleepModeStatus() should be called from a short
+ * critical section between the timer being stopped and the sleep mode being
+ * entered to ensure it is ok to proceed into the sleep mode.
+ */
+eSleepModeStatus eTaskConfirmSleepModeStatus( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * For internal use only.  Increment the mutex held count when a mutex is
+ * taken and return the handle of the task that has taken the mutex.
+ */
+TaskHandle_t pvTaskIncrementMutexHeldCount( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * For internal use only.  Same as vTaskSetTimeOutState(), but without a critial
+ * section.
+ */
+void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut ) PRIVILEGED_FUNCTION;
+
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* INC_TASK_H */
+
+
+
diff --git a/components/freertos/include/timers.h b/components/freertos/include/timers.h
new file mode 100644
index 00000000..cb721797
--- /dev/null
+++ b/components/freertos/include/timers.h
@@ -0,0 +1,1295 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef TIMERS_H
+#define TIMERS_H
+
+#ifndef INC_FREERTOS_H
+	#error "include FreeRTOS.h must appear in source files before include timers.h"
+#endif
+
+/*lint -save -e537 This headers are only multiply included if the application code
+happens to also be including task.h. */
+#include "task.h"
+/*lint -restore */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*-----------------------------------------------------------
+ * MACROS AND DEFINITIONS
+ *----------------------------------------------------------*/
+
+/* IDs for commands that can be sent/received on the timer queue.  These are to
+be used solely through the macros that make up the public software timer API,
+as defined below.  The commands that are sent from interrupts must use the
+highest numbers as tmrFIRST_FROM_ISR_COMMAND is used to determine if the task
+or interrupt version of the queue send function should be used. */
+#define tmrCOMMAND_EXECUTE_CALLBACK_FROM_ISR 	( ( BaseType_t ) -2 )
+#define tmrCOMMAND_EXECUTE_CALLBACK				( ( BaseType_t ) -1 )
+#define tmrCOMMAND_START_DONT_TRACE				( ( BaseType_t ) 0 )
+#define tmrCOMMAND_START					    ( ( BaseType_t ) 1 )
+#define tmrCOMMAND_RESET						( ( BaseType_t ) 2 )
+#define tmrCOMMAND_STOP							( ( BaseType_t ) 3 )
+#define tmrCOMMAND_CHANGE_PERIOD				( ( BaseType_t ) 4 )
+#define tmrCOMMAND_DELETE						( ( BaseType_t ) 5 )
+
+#define tmrFIRST_FROM_ISR_COMMAND				( ( BaseType_t ) 6 )
+#define tmrCOMMAND_START_FROM_ISR				( ( BaseType_t ) 6 )
+#define tmrCOMMAND_RESET_FROM_ISR				( ( BaseType_t ) 7 )
+#define tmrCOMMAND_STOP_FROM_ISR				( ( BaseType_t ) 8 )
+#define tmrCOMMAND_CHANGE_PERIOD_FROM_ISR		( ( BaseType_t ) 9 )
+
+
+/**
+ * Type by which software timers are referenced.  For example, a call to
+ * xTimerCreate() returns an TimerHandle_t variable that can then be used to
+ * reference the subject timer in calls to other software timer API functions
+ * (for example, xTimerStart(), xTimerReset(), etc.).
+ */
+struct tmrTimerControl; /* The old naming convention is used to prevent breaking kernel aware debuggers. */
+typedef struct tmrTimerControl * TimerHandle_t;
+
+/*
+ * Defines the prototype to which timer callback functions must conform.
+ */
+typedef void (*TimerCallbackFunction_t)( TimerHandle_t xTimer );
+
+/*
+ * Defines the prototype to which functions used with the
+ * xTimerPendFunctionCallFromISR() function must conform.
+ */
+typedef void (*PendedFunction_t)( void *, uint32_t );
+
+/**
+ * TimerHandle_t xTimerCreate( 	const char * const pcTimerName,
+ * 								TickType_t xTimerPeriodInTicks,
+ * 								UBaseType_t uxAutoReload,
+ * 								void * pvTimerID,
+ * 								TimerCallbackFunction_t pxCallbackFunction );
+ *
+ * Creates a new software timer instance, and returns a handle by which the
+ * created software timer can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, software timers use a block
+ * of memory, in which the timer data structure is stored.  If a software timer
+ * is created using xTimerCreate() then the required memory is automatically
+ * dynamically allocated inside the xTimerCreate() function.  (see
+ * http://www.freertos.org/a00111.html).  If a software timer is created using
+ * xTimerCreateStatic() then the application writer must provide the memory that
+ * will get used by the software timer.  xTimerCreateStatic() therefore allows a
+ * software timer to be created without using any dynamic memory allocation.
+ *
+ * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
+ * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
+ * xTimerChangePeriodFromISR() API functions can all be used to transition a
+ * timer into the active state.
+ *
+ * @param pcTimerName A text name that is assigned to the timer.  This is done
+ * purely to assist debugging.  The kernel itself only ever references a timer
+ * by its handle, and never by its name.
+ *
+ * @param xTimerPeriodInTicks The timer period.  The time is defined in tick
+ * periods so the constant portTICK_PERIOD_MS can be used to convert a time that
+ * has been specified in milliseconds.  For example, if the timer must expire
+ * after 100 ticks, then xTimerPeriodInTicks should be set to 100.
+ * Alternatively, if the timer must expire after 500ms, then xPeriod can be set
+ * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or
+ * equal to 1000.
+ *
+ * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
+ * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter.
+ * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
+ * enter the dormant state after it expires.
+ *
+ * @param pvTimerID An identifier that is assigned to the timer being created.
+ * Typically this would be used in the timer callback function to identify which
+ * timer expired when the same callback function is assigned to more than one
+ * timer.
+ *
+ * @param pxCallbackFunction The function to call when the timer expires.
+ * Callback functions must have the prototype defined by TimerCallbackFunction_t,
+ * which is	"void vCallbackFunction( TimerHandle_t xTimer );".
+ *
+ * @return If the timer is successfully created then a handle to the newly
+ * created timer is returned.  If the timer cannot be created (because either
+ * there is insufficient FreeRTOS heap remaining to allocate the timer
+ * structures, or the timer period was set to 0) then NULL is returned.
+ *
+ * Example usage:
+ * @verbatim
+ * #define NUM_TIMERS 5
+ *
+ * // An array to hold handles to the created timers.
+ * TimerHandle_t xTimers[ NUM_TIMERS ];
+ *
+ * // An array to hold a count of the number of times each timer expires.
+ * int32_t lExpireCounters[ NUM_TIMERS ] = { 0 };
+ *
+ * // Define a callback function that will be used by multiple timer instances.
+ * // The callback function does nothing but count the number of times the
+ * // associated timer expires, and stop the timer once the timer has expired
+ * // 10 times.
+ * void vTimerCallback( TimerHandle_t pxTimer )
+ * {
+ * int32_t lArrayIndex;
+ * const int32_t xMaxExpiryCountBeforeStopping = 10;
+ *
+ * 	   // Optionally do something if the pxTimer parameter is NULL.
+ * 	   configASSERT( pxTimer );
+ *
+ *     // Which timer expired?
+ *     lArrayIndex = ( int32_t ) pvTimerGetTimerID( pxTimer );
+ *
+ *     // Increment the number of times that pxTimer has expired.
+ *     lExpireCounters[ lArrayIndex ] += 1;
+ *
+ *     // If the timer has expired 10 times then stop it from running.
+ *     if( lExpireCounters[ lArrayIndex ] == xMaxExpiryCountBeforeStopping )
+ *     {
+ *         // Do not use a block time if calling a timer API function from a
+ *         // timer callback function, as doing so could cause a deadlock!
+ *         xTimerStop( pxTimer, 0 );
+ *     }
+ * }
+ *
+ * void main( void )
+ * {
+ * int32_t x;
+ *
+ *     // Create then start some timers.  Starting the timers before the scheduler
+ *     // has been started means the timers will start running immediately that
+ *     // the scheduler starts.
+ *     for( x = 0; x < NUM_TIMERS; x++ )
+ *     {
+ *         xTimers[ x ] = xTimerCreate(    "Timer",       // Just a text name, not used by the kernel.
+ *                                         ( 100 * x ),   // The timer period in ticks.
+ *                                         pdTRUE,        // The timers will auto-reload themselves when they expire.
+ *                                         ( void * ) x,  // Assign each timer a unique id equal to its array index.
+ *                                         vTimerCallback // Each timer calls the same callback when it expires.
+ *                                     );
+ *
+ *         if( xTimers[ x ] == NULL )
+ *         {
+ *             // The timer was not created.
+ *         }
+ *         else
+ *         {
+ *             // Start the timer.  No block time is specified, and even if one was
+ *             // it would be ignored because the scheduler has not yet been
+ *             // started.
+ *             if( xTimerStart( xTimers[ x ], 0 ) != pdPASS )
+ *             {
+ *                 // The timer could not be set into the Active state.
+ *             }
+ *         }
+ *     }
+ *
+ *     // ...
+ *     // Create tasks here.
+ *     // ...
+ *
+ *     // Starting the scheduler will start the timers running as they have already
+ *     // been set into the active state.
+ *     vTaskStartScheduler();
+ *
+ *     // Should not reach here.
+ *     for( ;; );
+ * }
+ * @endverbatim
+ */
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+	TimerHandle_t xTimerCreate(	const char * const pcTimerName,			/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+								const TickType_t xTimerPeriodInTicks,
+								const UBaseType_t uxAutoReload,
+								void * const pvTimerID,
+								TimerCallbackFunction_t pxCallbackFunction ) PRIVILEGED_FUNCTION;
+#endif
+
+/**
+ * TimerHandle_t xTimerCreateStatic(const char * const pcTimerName,
+ * 									TickType_t xTimerPeriodInTicks,
+ * 									UBaseType_t uxAutoReload,
+ * 									void * pvTimerID,
+ * 									TimerCallbackFunction_t pxCallbackFunction,
+ *									StaticTimer_t *pxTimerBuffer );
+ *
+ * Creates a new software timer instance, and returns a handle by which the
+ * created software timer can be referenced.
+ *
+ * Internally, within the FreeRTOS implementation, software timers use a block
+ * of memory, in which the timer data structure is stored.  If a software timer
+ * is created using xTimerCreate() then the required memory is automatically
+ * dynamically allocated inside the xTimerCreate() function.  (see
+ * http://www.freertos.org/a00111.html).  If a software timer is created using
+ * xTimerCreateStatic() then the application writer must provide the memory that
+ * will get used by the software timer.  xTimerCreateStatic() therefore allows a
+ * software timer to be created without using any dynamic memory allocation.
+ *
+ * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
+ * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
+ * xTimerChangePeriodFromISR() API functions can all be used to transition a
+ * timer into the active state.
+ *
+ * @param pcTimerName A text name that is assigned to the timer.  This is done
+ * purely to assist debugging.  The kernel itself only ever references a timer
+ * by its handle, and never by its name.
+ *
+ * @param xTimerPeriodInTicks The timer period.  The time is defined in tick
+ * periods so the constant portTICK_PERIOD_MS can be used to convert a time that
+ * has been specified in milliseconds.  For example, if the timer must expire
+ * after 100 ticks, then xTimerPeriodInTicks should be set to 100.
+ * Alternatively, if the timer must expire after 500ms, then xPeriod can be set
+ * to ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than or
+ * equal to 1000.
+ *
+ * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
+ * expire repeatedly with a frequency set by the xTimerPeriodInTicks parameter.
+ * If uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
+ * enter the dormant state after it expires.
+ *
+ * @param pvTimerID An identifier that is assigned to the timer being created.
+ * Typically this would be used in the timer callback function to identify which
+ * timer expired when the same callback function is assigned to more than one
+ * timer.
+ *
+ * @param pxCallbackFunction The function to call when the timer expires.
+ * Callback functions must have the prototype defined by TimerCallbackFunction_t,
+ * which is "void vCallbackFunction( TimerHandle_t xTimer );".
+ *
+ * @param pxTimerBuffer Must point to a variable of type StaticTimer_t, which
+ * will be then be used to hold the software timer's data structures, removing
+ * the need for the memory to be allocated dynamically.
+ *
+ * @return If the timer is created then a handle to the created timer is
+ * returned.  If pxTimerBuffer was NULL then NULL is returned.
+ *
+ * Example usage:
+ * @verbatim
+ *
+ * // The buffer used to hold the software timer's data structure.
+ * static StaticTimer_t xTimerBuffer;
+ *
+ * // A variable that will be incremented by the software timer's callback
+ * // function.
+ * UBaseType_t uxVariableToIncrement = 0;
+ *
+ * // A software timer callback function that increments a variable passed to
+ * // it when the software timer was created.  After the 5th increment the
+ * // callback function stops the software timer.
+ * static void prvTimerCallback( TimerHandle_t xExpiredTimer )
+ * {
+ * UBaseType_t *puxVariableToIncrement;
+ * BaseType_t xReturned;
+ *
+ *     // Obtain the address of the variable to increment from the timer ID.
+ *     puxVariableToIncrement = ( UBaseType_t * ) pvTimerGetTimerID( xExpiredTimer );
+ *
+ *     // Increment the variable to show the timer callback has executed.
+ *     ( *puxVariableToIncrement )++;
+ *
+ *     // If this callback has executed the required number of times, stop the
+ *     // timer.
+ *     if( *puxVariableToIncrement == 5 )
+ *     {
+ *         // This is called from a timer callback so must not block.
+ *         xTimerStop( xExpiredTimer, staticDONT_BLOCK );
+ *     }
+ * }
+ *
+ *
+ * void main( void )
+ * {
+ *     // Create the software time.  xTimerCreateStatic() has an extra parameter
+ *     // than the normal xTimerCreate() API function.  The parameter is a pointer
+ *     // to the StaticTimer_t structure that will hold the software timer
+ *     // structure.  If the parameter is passed as NULL then the structure will be
+ *     // allocated dynamically, just as if xTimerCreate() had been called.
+ *     xTimer = xTimerCreateStatic( "T1",             // Text name for the task.  Helps debugging only.  Not used by FreeRTOS.
+ *                                  xTimerPeriod,     // The period of the timer in ticks.
+ *                                  pdTRUE,           // This is an auto-reload timer.
+ *                                  ( void * ) &uxVariableToIncrement,    // A variable incremented by the software timer's callback function
+ *                                  prvTimerCallback, // The function to execute when the timer expires.
+ *                                  &xTimerBuffer );  // The buffer that will hold the software timer structure.
+ *
+ *     // The scheduler has not started yet so a block time is not used.
+ *     xReturned = xTimerStart( xTimer, 0 );
+ *
+ *     // ...
+ *     // Create tasks here.
+ *     // ...
+ *
+ *     // Starting the scheduler will start the timers running as they have already
+ *     // been set into the active state.
+ *     vTaskStartScheduler();
+ *
+ *     // Should not reach here.
+ *     for( ;; );
+ * }
+ * @endverbatim
+ */
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+	TimerHandle_t xTimerCreateStatic(	const char * const pcTimerName,			/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+										const TickType_t xTimerPeriodInTicks,
+										const UBaseType_t uxAutoReload,
+										void * const pvTimerID,
+										TimerCallbackFunction_t pxCallbackFunction,
+										StaticTimer_t *pxTimerBuffer ) PRIVILEGED_FUNCTION;
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+/**
+ * void *pvTimerGetTimerID( TimerHandle_t xTimer );
+ *
+ * Returns the ID assigned to the timer.
+ *
+ * IDs are assigned to timers using the pvTimerID parameter of the call to
+ * xTimerCreated() that was used to create the timer, and by calling the
+ * vTimerSetTimerID() API function.
+ *
+ * If the same callback function is assigned to multiple timers then the timer
+ * ID can be used as time specific (timer local) storage.
+ *
+ * @param xTimer The timer being queried.
+ *
+ * @return The ID assigned to the timer being queried.
+ *
+ * Example usage:
+ *
+ * See the xTimerCreate() API function example usage scenario.
+ */
+void *pvTimerGetTimerID( const TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
+
+/**
+ * void vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID );
+ *
+ * Sets the ID assigned to the timer.
+ *
+ * IDs are assigned to timers using the pvTimerID parameter of the call to
+ * xTimerCreated() that was used to create the timer.
+ *
+ * If the same callback function is assigned to multiple timers then the timer
+ * ID can be used as time specific (timer local) storage.
+ *
+ * @param xTimer The timer being updated.
+ *
+ * @param pvNewID The ID to assign to the timer.
+ *
+ * Example usage:
+ *
+ * See the xTimerCreate() API function example usage scenario.
+ */
+void vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID ) PRIVILEGED_FUNCTION;
+
+/**
+ * BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer );
+ *
+ * Queries a timer to see if it is active or dormant.
+ *
+ * A timer will be dormant if:
+ *     1) It has been created but not started, or
+ *     2) It is an expired one-shot timer that has not been restarted.
+ *
+ * Timers are created in the dormant state.  The xTimerStart(), xTimerReset(),
+ * xTimerStartFromISR(), xTimerResetFromISR(), xTimerChangePeriod() and
+ * xTimerChangePeriodFromISR() API functions can all be used to transition a timer into the
+ * active state.
+ *
+ * @param xTimer The timer being queried.
+ *
+ * @return pdFALSE will be returned if the timer is dormant.  A value other than
+ * pdFALSE will be returned if the timer is active.
+ *
+ * Example usage:
+ * @verbatim
+ * // This function assumes xTimer has already been created.
+ * void vAFunction( TimerHandle_t xTimer )
+ * {
+ *     if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )"
+ *     {
+ *         // xTimer is active, do something.
+ *     }
+ *     else
+ *     {
+ *         // xTimer is not active, do something else.
+ *     }
+ * }
+ * @endverbatim
+ */
+BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
+
+/**
+ * TaskHandle_t xTimerGetTimerDaemonTaskHandle( void );
+ *
+ * Simply returns the handle of the timer service/daemon task.  It it not valid
+ * to call xTimerGetTimerDaemonTaskHandle() before the scheduler has been started.
+ */
+TaskHandle_t xTimerGetTimerDaemonTaskHandle( void ) PRIVILEGED_FUNCTION;
+
+/**
+ * BaseType_t xTimerStart( TimerHandle_t xTimer, TickType_t xTicksToWait );
+ *
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
+ * public FreeRTOS timer API functions send commands to the timer service task
+ * through a queue called the timer command queue.  The timer command queue is
+ * private to the kernel itself and is not directly accessible to application
+ * code.  The length of the timer command queue is set by the
+ * configTIMER_QUEUE_LENGTH configuration constant.
+ *
+ * xTimerStart() starts a timer that was previously created using the
+ * xTimerCreate() API function.  If the timer had already been started and was
+ * already in the active state, then xTimerStart() has equivalent functionality
+ * to the xTimerReset() API function.
+ *
+ * Starting a timer ensures the timer is in the active state.  If the timer
+ * is not stopped, deleted, or reset in the mean time, the callback function
+ * associated with the timer will get called 'n' ticks after xTimerStart() was
+ * called, where 'n' is the timers defined period.
+ *
+ * It is valid to call xTimerStart() before the scheduler has been started, but
+ * when this is done the timer will not actually start until the scheduler is
+ * started, and the timers expiry time will be relative to when the scheduler is
+ * started, not relative to when xTimerStart() was called.
+ *
+ * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStart()
+ * to be available.
+ *
+ * @param xTimer The handle of the timer being started/restarted.
+ *
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
+ * be held in the Blocked state to wait for the start command to be successfully
+ * sent to the timer command queue, should the queue already be full when
+ * xTimerStart() was called.  xTicksToWait is ignored if xTimerStart() is called
+ * before the scheduler is started.
+ *
+ * @return pdFAIL will be returned if the start command could not be sent to
+ * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
+ * be returned if the command was successfully sent to the timer command queue.
+ * When the command is actually processed will depend on the priority of the
+ * timer service/daemon task relative to other tasks in the system, although the
+ * timers expiry time is relative to when xTimerStart() is actually called.  The
+ * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY
+ * configuration constant.
+ *
+ * Example usage:
+ *
+ * See the xTimerCreate() API function example usage scenario.
+ *
+ */
+#define xTimerStart( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )
+
+/**
+ * BaseType_t xTimerStop( TimerHandle_t xTimer, TickType_t xTicksToWait );
+ *
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
+ * public FreeRTOS timer API functions send commands to the timer service task
+ * through a queue called the timer command queue.  The timer command queue is
+ * private to the kernel itself and is not directly accessible to application
+ * code.  The length of the timer command queue is set by the
+ * configTIMER_QUEUE_LENGTH configuration constant.
+ *
+ * xTimerStop() stops a timer that was previously started using either of the
+ * The xTimerStart(), xTimerReset(), xTimerStartFromISR(), xTimerResetFromISR(),
+ * xTimerChangePeriod() or xTimerChangePeriodFromISR() API functions.
+ *
+ * Stopping a timer ensures the timer is not in the active state.
+ *
+ * The configUSE_TIMERS configuration constant must be set to 1 for xTimerStop()
+ * to be available.
+ *
+ * @param xTimer The handle of the timer being stopped.
+ *
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
+ * be held in the Blocked state to wait for the stop command to be successfully
+ * sent to the timer command queue, should the queue already be full when
+ * xTimerStop() was called.  xTicksToWait is ignored if xTimerStop() is called
+ * before the scheduler is started.
+ *
+ * @return pdFAIL will be returned if the stop command could not be sent to
+ * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
+ * be returned if the command was successfully sent to the timer command queue.
+ * When the command is actually processed will depend on the priority of the
+ * timer service/daemon task relative to other tasks in the system.  The timer
+ * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
+ * configuration constant.
+ *
+ * Example usage:
+ *
+ * See the xTimerCreate() API function example usage scenario.
+ *
+ */
+#define xTimerStop( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP, 0U, NULL, ( xTicksToWait ) )
+
+/**
+ * BaseType_t xTimerChangePeriod( 	TimerHandle_t xTimer,
+ *										TickType_t xNewPeriod,
+ *										TickType_t xTicksToWait );
+ *
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
+ * public FreeRTOS timer API functions send commands to the timer service task
+ * through a queue called the timer command queue.  The timer command queue is
+ * private to the kernel itself and is not directly accessible to application
+ * code.  The length of the timer command queue is set by the
+ * configTIMER_QUEUE_LENGTH configuration constant.
+ *
+ * xTimerChangePeriod() changes the period of a timer that was previously
+ * created using the xTimerCreate() API function.
+ *
+ * xTimerChangePeriod() can be called to change the period of an active or
+ * dormant state timer.
+ *
+ * The configUSE_TIMERS configuration constant must be set to 1 for
+ * xTimerChangePeriod() to be available.
+ *
+ * @param xTimer The handle of the timer that is having its period changed.
+ *
+ * @param xNewPeriod The new period for xTimer. Timer periods are specified in
+ * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time
+ * that has been specified in milliseconds.  For example, if the timer must
+ * expire after 100 ticks, then xNewPeriod should be set to 100.  Alternatively,
+ * if the timer must expire after 500ms, then xNewPeriod can be set to
+ * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than
+ * or equal to 1000.
+ *
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
+ * be held in the Blocked state to wait for the change period command to be
+ * successfully sent to the timer command queue, should the queue already be
+ * full when xTimerChangePeriod() was called.  xTicksToWait is ignored if
+ * xTimerChangePeriod() is called before the scheduler is started.
+ *
+ * @return pdFAIL will be returned if the change period command could not be
+ * sent to the timer command queue even after xTicksToWait ticks had passed.
+ * pdPASS will be returned if the command was successfully sent to the timer
+ * command queue.  When the command is actually processed will depend on the
+ * priority of the timer service/daemon task relative to other tasks in the
+ * system.  The timer service/daemon task priority is set by the
+ * configTIMER_TASK_PRIORITY configuration constant.
+ *
+ * Example usage:
+ * @verbatim
+ * // This function assumes xTimer has already been created.  If the timer
+ * // referenced by xTimer is already active when it is called, then the timer
+ * // is deleted.  If the timer referenced by xTimer is not active when it is
+ * // called, then the period of the timer is set to 500ms and the timer is
+ * // started.
+ * void vAFunction( TimerHandle_t xTimer )
+ * {
+ *     if( xTimerIsTimerActive( xTimer ) != pdFALSE ) // or more simply and equivalently "if( xTimerIsTimerActive( xTimer ) )"
+ *     {
+ *         // xTimer is already active - delete it.
+ *         xTimerDelete( xTimer );
+ *     }
+ *     else
+ *     {
+ *         // xTimer is not active, change its period to 500ms.  This will also
+ *         // cause the timer to start.  Block for a maximum of 100 ticks if the
+ *         // change period command cannot immediately be sent to the timer
+ *         // command queue.
+ *         if( xTimerChangePeriod( xTimer, 500 / portTICK_PERIOD_MS, 100 ) == pdPASS )
+ *         {
+ *             // The command was successfully sent.
+ *         }
+ *         else
+ *         {
+ *             // The command could not be sent, even after waiting for 100 ticks
+ *             // to pass.  Take appropriate action here.
+ *         }
+ *     }
+ * }
+ * @endverbatim
+ */
+ #define xTimerChangePeriod( xTimer, xNewPeriod, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD, ( xNewPeriod ), NULL, ( xTicksToWait ) )
+
+/**
+ * BaseType_t xTimerDelete( TimerHandle_t xTimer, TickType_t xTicksToWait );
+ *
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
+ * public FreeRTOS timer API functions send commands to the timer service task
+ * through a queue called the timer command queue.  The timer command queue is
+ * private to the kernel itself and is not directly accessible to application
+ * code.  The length of the timer command queue is set by the
+ * configTIMER_QUEUE_LENGTH configuration constant.
+ *
+ * xTimerDelete() deletes a timer that was previously created using the
+ * xTimerCreate() API function.
+ *
+ * The configUSE_TIMERS configuration constant must be set to 1 for
+ * xTimerDelete() to be available.
+ *
+ * @param xTimer The handle of the timer being deleted.
+ *
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
+ * be held in the Blocked state to wait for the delete command to be
+ * successfully sent to the timer command queue, should the queue already be
+ * full when xTimerDelete() was called.  xTicksToWait is ignored if xTimerDelete()
+ * is called before the scheduler is started.
+ *
+ * @return pdFAIL will be returned if the delete command could not be sent to
+ * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
+ * be returned if the command was successfully sent to the timer command queue.
+ * When the command is actually processed will depend on the priority of the
+ * timer service/daemon task relative to other tasks in the system.  The timer
+ * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
+ * configuration constant.
+ *
+ * Example usage:
+ *
+ * See the xTimerChangePeriod() API function example usage scenario.
+ */
+#define xTimerDelete( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_DELETE, 0U, NULL, ( xTicksToWait ) )
+
+/**
+ * BaseType_t xTimerReset( TimerHandle_t xTimer, TickType_t xTicksToWait );
+ *
+ * Timer functionality is provided by a timer service/daemon task.  Many of the
+ * public FreeRTOS timer API functions send commands to the timer service task
+ * through a queue called the timer command queue.  The timer command queue is
+ * private to the kernel itself and is not directly accessible to application
+ * code.  The length of the timer command queue is set by the
+ * configTIMER_QUEUE_LENGTH configuration constant.
+ *
+ * xTimerReset() re-starts a timer that was previously created using the
+ * xTimerCreate() API function.  If the timer had already been started and was
+ * already in the active state, then xTimerReset() will cause the timer to
+ * re-evaluate its expiry time so that it is relative to when xTimerReset() was
+ * called.  If the timer was in the dormant state then xTimerReset() has
+ * equivalent functionality to the xTimerStart() API function.
+ *
+ * Resetting a timer ensures the timer is in the active state.  If the timer
+ * is not stopped, deleted, or reset in the mean time, the callback function
+ * associated with the timer will get called 'n' ticks after xTimerReset() was
+ * called, where 'n' is the timers defined period.
+ *
+ * It is valid to call xTimerReset() before the scheduler has been started, but
+ * when this is done the timer will not actually start until the scheduler is
+ * started, and the timers expiry time will be relative to when the scheduler is
+ * started, not relative to when xTimerReset() was called.
+ *
+ * The configUSE_TIMERS configuration constant must be set to 1 for xTimerReset()
+ * to be available.
+ *
+ * @param xTimer The handle of the timer being reset/started/restarted.
+ *
+ * @param xTicksToWait Specifies the time, in ticks, that the calling task should
+ * be held in the Blocked state to wait for the reset command to be successfully
+ * sent to the timer command queue, should the queue already be full when
+ * xTimerReset() was called.  xTicksToWait is ignored if xTimerReset() is called
+ * before the scheduler is started.
+ *
+ * @return pdFAIL will be returned if the reset command could not be sent to
+ * the timer command queue even after xTicksToWait ticks had passed.  pdPASS will
+ * be returned if the command was successfully sent to the timer command queue.
+ * When the command is actually processed will depend on the priority of the
+ * timer service/daemon task relative to other tasks in the system, although the
+ * timers expiry time is relative to when xTimerStart() is actually called.  The
+ * timer service/daemon task priority is set by the configTIMER_TASK_PRIORITY
+ * configuration constant.
+ *
+ * Example usage:
+ * @verbatim
+ * // When a key is pressed, an LCD back-light is switched on.  If 5 seconds pass
+ * // without a key being pressed, then the LCD back-light is switched off.  In
+ * // this case, the timer is a one-shot timer.
+ *
+ * TimerHandle_t xBacklightTimer = NULL;
+ *
+ * // The callback function assigned to the one-shot timer.  In this case the
+ * // parameter is not used.
+ * void vBacklightTimerCallback( TimerHandle_t pxTimer )
+ * {
+ *     // The timer expired, therefore 5 seconds must have passed since a key
+ *     // was pressed.  Switch off the LCD back-light.
+ *     vSetBacklightState( BACKLIGHT_OFF );
+ * }
+ *
+ * // The key press event handler.
+ * void vKeyPressEventHandler( char cKey )
+ * {
+ *     // Ensure the LCD back-light is on, then reset the timer that is
+ *     // responsible for turning the back-light off after 5 seconds of
+ *     // key inactivity.  Wait 10 ticks for the command to be successfully sent
+ *     // if it cannot be sent immediately.
+ *     vSetBacklightState( BACKLIGHT_ON );
+ *     if( xTimerReset( xBacklightTimer, 100 ) != pdPASS )
+ *     {
+ *         // The reset command was not executed successfully.  Take appropriate
+ *         // action here.
+ *     }
+ *
+ *     // Perform the rest of the key processing here.
+ * }
+ *
+ * void main( void )
+ * {
+ * int32_t x;
+ *
+ *     // Create then start the one-shot timer that is responsible for turning
+ *     // the back-light off if no keys are pressed within a 5 second period.
+ *     xBacklightTimer = xTimerCreate( "BacklightTimer",           // Just a text name, not used by the kernel.
+ *                                     ( 5000 / portTICK_PERIOD_MS), // The timer period in ticks.
+ *                                     pdFALSE,                    // The timer is a one-shot timer.
+ *                                     0,                          // The id is not used by the callback so can take any value.
+ *                                     vBacklightTimerCallback     // The callback function that switches the LCD back-light off.
+ *                                   );
+ *
+ *     if( xBacklightTimer == NULL )
+ *     {
+ *         // The timer was not created.
+ *     }
+ *     else
+ *     {
+ *         // Start the timer.  No block time is specified, and even if one was
+ *         // it would be ignored because the scheduler has not yet been
+ *         // started.
+ *         if( xTimerStart( xBacklightTimer, 0 ) != pdPASS )
+ *         {
+ *             // The timer could not be set into the Active state.
+ *         }
+ *     }
+ *
+ *     // ...
+ *     // Create tasks here.
+ *     // ...
+ *
+ *     // Starting the scheduler will start the timer running as it has already
+ *     // been set into the active state.
+ *     vTaskStartScheduler();
+ *
+ *     // Should not reach here.
+ *     for( ;; );
+ * }
+ * @endverbatim
+ */
+#define xTimerReset( xTimer, xTicksToWait ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET, ( xTaskGetTickCount() ), NULL, ( xTicksToWait ) )
+
+/**
+ * BaseType_t xTimerStartFromISR( 	TimerHandle_t xTimer,
+ *									BaseType_t *pxHigherPriorityTaskWoken );
+ *
+ * A version of xTimerStart() that can be called from an interrupt service
+ * routine.
+ *
+ * @param xTimer The handle of the timer being started/restarted.
+ *
+ * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
+ * of its time in the Blocked state, waiting for messages to arrive on the timer
+ * command queue.  Calling xTimerStartFromISR() writes a message to the timer
+ * command queue, so has the potential to transition the timer service/daemon
+ * task out of the Blocked state.  If calling xTimerStartFromISR() causes the
+ * timer service/daemon task to leave the Blocked state, and the timer service/
+ * daemon task has a priority equal to or greater than the currently executing
+ * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
+ * get set to pdTRUE internally within the xTimerStartFromISR() function.  If
+ * xTimerStartFromISR() sets this value to pdTRUE then a context switch should
+ * be performed before the interrupt exits.
+ *
+ * @return pdFAIL will be returned if the start command could not be sent to
+ * the timer command queue.  pdPASS will be returned if the command was
+ * successfully sent to the timer command queue.  When the command is actually
+ * processed will depend on the priority of the timer service/daemon task
+ * relative to other tasks in the system, although the timers expiry time is
+ * relative to when xTimerStartFromISR() is actually called.  The timer
+ * service/daemon task priority is set by the configTIMER_TASK_PRIORITY
+ * configuration constant.
+ *
+ * Example usage:
+ * @verbatim
+ * // This scenario assumes xBacklightTimer has already been created.  When a
+ * // key is pressed, an LCD back-light is switched on.  If 5 seconds pass
+ * // without a key being pressed, then the LCD back-light is switched off.  In
+ * // this case, the timer is a one-shot timer, and unlike the example given for
+ * // the xTimerReset() function, the key press event handler is an interrupt
+ * // service routine.
+ *
+ * // The callback function assigned to the one-shot timer.  In this case the
+ * // parameter is not used.
+ * void vBacklightTimerCallback( TimerHandle_t pxTimer )
+ * {
+ *     // The timer expired, therefore 5 seconds must have passed since a key
+ *     // was pressed.  Switch off the LCD back-light.
+ *     vSetBacklightState( BACKLIGHT_OFF );
+ * }
+ *
+ * // The key press interrupt service routine.
+ * void vKeyPressEventInterruptHandler( void )
+ * {
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *     // Ensure the LCD back-light is on, then restart the timer that is
+ *     // responsible for turning the back-light off after 5 seconds of
+ *     // key inactivity.  This is an interrupt service routine so can only
+ *     // call FreeRTOS API functions that end in "FromISR".
+ *     vSetBacklightState( BACKLIGHT_ON );
+ *
+ *     // xTimerStartFromISR() or xTimerResetFromISR() could be called here
+ *     // as both cause the timer to re-calculate its expiry time.
+ *     // xHigherPriorityTaskWoken was initialised to pdFALSE when it was
+ *     // declared (in this function).
+ *     if( xTimerStartFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS )
+ *     {
+ *         // The start command was not executed successfully.  Take appropriate
+ *         // action here.
+ *     }
+ *
+ *     // Perform the rest of the key processing here.
+ *
+ *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
+ *     // should be performed.  The syntax required to perform a context switch
+ *     // from inside an ISR varies from port to port, and from compiler to
+ *     // compiler.  Inspect the demos for the port you are using to find the
+ *     // actual syntax required.
+ *     if( xHigherPriorityTaskWoken != pdFALSE )
+ *     {
+ *         // Call the interrupt safe yield function here (actual function
+ *         // depends on the FreeRTOS port being used).
+ *     }
+ * }
+ * @endverbatim
+ */
+#define xTimerStartFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_START_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
+
+/**
+ * BaseType_t xTimerStopFromISR( 	TimerHandle_t xTimer,
+ *									BaseType_t *pxHigherPriorityTaskWoken );
+ *
+ * A version of xTimerStop() that can be called from an interrupt service
+ * routine.
+ *
+ * @param xTimer The handle of the timer being stopped.
+ *
+ * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
+ * of its time in the Blocked state, waiting for messages to arrive on the timer
+ * command queue.  Calling xTimerStopFromISR() writes a message to the timer
+ * command queue, so has the potential to transition the timer service/daemon
+ * task out of the Blocked state.  If calling xTimerStopFromISR() causes the
+ * timer service/daemon task to leave the Blocked state, and the timer service/
+ * daemon task has a priority equal to or greater than the currently executing
+ * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
+ * get set to pdTRUE internally within the xTimerStopFromISR() function.  If
+ * xTimerStopFromISR() sets this value to pdTRUE then a context switch should
+ * be performed before the interrupt exits.
+ *
+ * @return pdFAIL will be returned if the stop command could not be sent to
+ * the timer command queue.  pdPASS will be returned if the command was
+ * successfully sent to the timer command queue.  When the command is actually
+ * processed will depend on the priority of the timer service/daemon task
+ * relative to other tasks in the system.  The timer service/daemon task
+ * priority is set by the configTIMER_TASK_PRIORITY configuration constant.
+ *
+ * Example usage:
+ * @verbatim
+ * // This scenario assumes xTimer has already been created and started.  When
+ * // an interrupt occurs, the timer should be simply stopped.
+ *
+ * // The interrupt service routine that stops the timer.
+ * void vAnExampleInterruptServiceRoutine( void )
+ * {
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *     // The interrupt has occurred - simply stop the timer.
+ *     // xHigherPriorityTaskWoken was set to pdFALSE where it was defined
+ *     // (within this function).  As this is an interrupt service routine, only
+ *     // FreeRTOS API functions that end in "FromISR" can be used.
+ *     if( xTimerStopFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS )
+ *     {
+ *         // The stop command was not executed successfully.  Take appropriate
+ *         // action here.
+ *     }
+ *
+ *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
+ *     // should be performed.  The syntax required to perform a context switch
+ *     // from inside an ISR varies from port to port, and from compiler to
+ *     // compiler.  Inspect the demos for the port you are using to find the
+ *     // actual syntax required.
+ *     if( xHigherPriorityTaskWoken != pdFALSE )
+ *     {
+ *         // Call the interrupt safe yield function here (actual function
+ *         // depends on the FreeRTOS port being used).
+ *     }
+ * }
+ * @endverbatim
+ */
+#define xTimerStopFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_STOP_FROM_ISR, 0, ( pxHigherPriorityTaskWoken ), 0U )
+
+/**
+ * BaseType_t xTimerChangePeriodFromISR( TimerHandle_t xTimer,
+ *										 TickType_t xNewPeriod,
+ *										 BaseType_t *pxHigherPriorityTaskWoken );
+ *
+ * A version of xTimerChangePeriod() that can be called from an interrupt
+ * service routine.
+ *
+ * @param xTimer The handle of the timer that is having its period changed.
+ *
+ * @param xNewPeriod The new period for xTimer. Timer periods are specified in
+ * tick periods, so the constant portTICK_PERIOD_MS can be used to convert a time
+ * that has been specified in milliseconds.  For example, if the timer must
+ * expire after 100 ticks, then xNewPeriod should be set to 100.  Alternatively,
+ * if the timer must expire after 500ms, then xNewPeriod can be set to
+ * ( 500 / portTICK_PERIOD_MS ) provided configTICK_RATE_HZ is less than
+ * or equal to 1000.
+ *
+ * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
+ * of its time in the Blocked state, waiting for messages to arrive on the timer
+ * command queue.  Calling xTimerChangePeriodFromISR() writes a message to the
+ * timer command queue, so has the potential to transition the timer service/
+ * daemon task out of the Blocked state.  If calling xTimerChangePeriodFromISR()
+ * causes the timer service/daemon task to leave the Blocked state, and the
+ * timer service/daemon task has a priority equal to or greater than the
+ * currently executing task (the task that was interrupted), then
+ * *pxHigherPriorityTaskWoken will get set to pdTRUE internally within the
+ * xTimerChangePeriodFromISR() function.  If xTimerChangePeriodFromISR() sets
+ * this value to pdTRUE then a context switch should be performed before the
+ * interrupt exits.
+ *
+ * @return pdFAIL will be returned if the command to change the timers period
+ * could not be sent to the timer command queue.  pdPASS will be returned if the
+ * command was successfully sent to the timer command queue.  When the command
+ * is actually processed will depend on the priority of the timer service/daemon
+ * task relative to other tasks in the system.  The timer service/daemon task
+ * priority is set by the configTIMER_TASK_PRIORITY configuration constant.
+ *
+ * Example usage:
+ * @verbatim
+ * // This scenario assumes xTimer has already been created and started.  When
+ * // an interrupt occurs, the period of xTimer should be changed to 500ms.
+ *
+ * // The interrupt service routine that changes the period of xTimer.
+ * void vAnExampleInterruptServiceRoutine( void )
+ * {
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *     // The interrupt has occurred - change the period of xTimer to 500ms.
+ *     // xHigherPriorityTaskWoken was set to pdFALSE where it was defined
+ *     // (within this function).  As this is an interrupt service routine, only
+ *     // FreeRTOS API functions that end in "FromISR" can be used.
+ *     if( xTimerChangePeriodFromISR( xTimer, &xHigherPriorityTaskWoken ) != pdPASS )
+ *     {
+ *         // The command to change the timers period was not executed
+ *         // successfully.  Take appropriate action here.
+ *     }
+ *
+ *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
+ *     // should be performed.  The syntax required to perform a context switch
+ *     // from inside an ISR varies from port to port, and from compiler to
+ *     // compiler.  Inspect the demos for the port you are using to find the
+ *     // actual syntax required.
+ *     if( xHigherPriorityTaskWoken != pdFALSE )
+ *     {
+ *         // Call the interrupt safe yield function here (actual function
+ *         // depends on the FreeRTOS port being used).
+ *     }
+ * }
+ * @endverbatim
+ */
+#define xTimerChangePeriodFromISR( xTimer, xNewPeriod, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_CHANGE_PERIOD_FROM_ISR, ( xNewPeriod ), ( pxHigherPriorityTaskWoken ), 0U )
+
+/**
+ * BaseType_t xTimerResetFromISR( 	TimerHandle_t xTimer,
+ *									BaseType_t *pxHigherPriorityTaskWoken );
+ *
+ * A version of xTimerReset() that can be called from an interrupt service
+ * routine.
+ *
+ * @param xTimer The handle of the timer that is to be started, reset, or
+ * restarted.
+ *
+ * @param pxHigherPriorityTaskWoken The timer service/daemon task spends most
+ * of its time in the Blocked state, waiting for messages to arrive on the timer
+ * command queue.  Calling xTimerResetFromISR() writes a message to the timer
+ * command queue, so has the potential to transition the timer service/daemon
+ * task out of the Blocked state.  If calling xTimerResetFromISR() causes the
+ * timer service/daemon task to leave the Blocked state, and the timer service/
+ * daemon task has a priority equal to or greater than the currently executing
+ * task (the task that was interrupted), then *pxHigherPriorityTaskWoken will
+ * get set to pdTRUE internally within the xTimerResetFromISR() function.  If
+ * xTimerResetFromISR() sets this value to pdTRUE then a context switch should
+ * be performed before the interrupt exits.
+ *
+ * @return pdFAIL will be returned if the reset command could not be sent to
+ * the timer command queue.  pdPASS will be returned if the command was
+ * successfully sent to the timer command queue.  When the command is actually
+ * processed will depend on the priority of the timer service/daemon task
+ * relative to other tasks in the system, although the timers expiry time is
+ * relative to when xTimerResetFromISR() is actually called.  The timer service/daemon
+ * task priority is set by the configTIMER_TASK_PRIORITY configuration constant.
+ *
+ * Example usage:
+ * @verbatim
+ * // This scenario assumes xBacklightTimer has already been created.  When a
+ * // key is pressed, an LCD back-light is switched on.  If 5 seconds pass
+ * // without a key being pressed, then the LCD back-light is switched off.  In
+ * // this case, the timer is a one-shot timer, and unlike the example given for
+ * // the xTimerReset() function, the key press event handler is an interrupt
+ * // service routine.
+ *
+ * // The callback function assigned to the one-shot timer.  In this case the
+ * // parameter is not used.
+ * void vBacklightTimerCallback( TimerHandle_t pxTimer )
+ * {
+ *     // The timer expired, therefore 5 seconds must have passed since a key
+ *     // was pressed.  Switch off the LCD back-light.
+ *     vSetBacklightState( BACKLIGHT_OFF );
+ * }
+ *
+ * // The key press interrupt service routine.
+ * void vKeyPressEventInterruptHandler( void )
+ * {
+ * BaseType_t xHigherPriorityTaskWoken = pdFALSE;
+ *
+ *     // Ensure the LCD back-light is on, then reset the timer that is
+ *     // responsible for turning the back-light off after 5 seconds of
+ *     // key inactivity.  This is an interrupt service routine so can only
+ *     // call FreeRTOS API functions that end in "FromISR".
+ *     vSetBacklightState( BACKLIGHT_ON );
+ *
+ *     // xTimerStartFromISR() or xTimerResetFromISR() could be called here
+ *     // as both cause the timer to re-calculate its expiry time.
+ *     // xHigherPriorityTaskWoken was initialised to pdFALSE when it was
+ *     // declared (in this function).
+ *     if( xTimerResetFromISR( xBacklightTimer, &xHigherPriorityTaskWoken ) != pdPASS )
+ *     {
+ *         // The reset command was not executed successfully.  Take appropriate
+ *         // action here.
+ *     }
+ *
+ *     // Perform the rest of the key processing here.
+ *
+ *     // If xHigherPriorityTaskWoken equals pdTRUE, then a context switch
+ *     // should be performed.  The syntax required to perform a context switch
+ *     // from inside an ISR varies from port to port, and from compiler to
+ *     // compiler.  Inspect the demos for the port you are using to find the
+ *     // actual syntax required.
+ *     if( xHigherPriorityTaskWoken != pdFALSE )
+ *     {
+ *         // Call the interrupt safe yield function here (actual function
+ *         // depends on the FreeRTOS port being used).
+ *     }
+ * }
+ * @endverbatim
+ */
+#define xTimerResetFromISR( xTimer, pxHigherPriorityTaskWoken ) xTimerGenericCommand( ( xTimer ), tmrCOMMAND_RESET_FROM_ISR, ( xTaskGetTickCountFromISR() ), ( pxHigherPriorityTaskWoken ), 0U )
+
+
+/**
+ * BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend,
+ *                                          void *pvParameter1,
+ *                                          uint32_t ulParameter2,
+ *                                          BaseType_t *pxHigherPriorityTaskWoken );
+ *
+ *
+ * Used from application interrupt service routines to defer the execution of a
+ * function to the RTOS daemon task (the timer service task, hence this function
+ * is implemented in timers.c and is prefixed with 'Timer').
+ *
+ * Ideally an interrupt service routine (ISR) is kept as short as possible, but
+ * sometimes an ISR either has a lot of processing to do, or needs to perform
+ * processing that is not deterministic.  In these cases
+ * xTimerPendFunctionCallFromISR() can be used to defer processing of a function
+ * to the RTOS daemon task.
+ *
+ * A mechanism is provided that allows the interrupt to return directly to the
+ * task that will subsequently execute the pended callback function.  This
+ * allows the callback function to execute contiguously in time with the
+ * interrupt - just as if the callback had executed in the interrupt itself.
+ *
+ * @param xFunctionToPend The function to execute from the timer service/
+ * daemon task.  The function must conform to the PendedFunction_t
+ * prototype.
+ *
+ * @param pvParameter1 The value of the callback function's first parameter.
+ * The parameter has a void * type to allow it to be used to pass any type.
+ * For example, unsigned longs can be cast to a void *, or the void * can be
+ * used to point to a structure.
+ *
+ * @param ulParameter2 The value of the callback function's second parameter.
+ *
+ * @param pxHigherPriorityTaskWoken As mentioned above, calling this function
+ * will result in a message being sent to the timer daemon task.  If the
+ * priority of the timer daemon task (which is set using
+ * configTIMER_TASK_PRIORITY in FreeRTOSConfig.h) is higher than the priority of
+ * the currently running task (the task the interrupt interrupted) then
+ * *pxHigherPriorityTaskWoken will be set to pdTRUE within
+ * xTimerPendFunctionCallFromISR(), indicating that a context switch should be
+ * requested before the interrupt exits.  For that reason
+ * *pxHigherPriorityTaskWoken must be initialised to pdFALSE.  See the
+ * example code below.
+ *
+ * @return pdPASS is returned if the message was successfully sent to the
+ * timer daemon task, otherwise pdFALSE is returned.
+ *
+ * Example usage:
+ * @verbatim
+ *
+ *	// The callback function that will execute in the context of the daemon task.
+ *  // Note callback functions must all use this same prototype.
+ *  void vProcessInterface( void *pvParameter1, uint32_t ulParameter2 )
+ *	{
+ *		BaseType_t xInterfaceToService;
+ *
+ *		// The interface that requires servicing is passed in the second
+ *      // parameter.  The first parameter is not used in this case.
+ *		xInterfaceToService = ( BaseType_t ) ulParameter2;
+ *
+ *		// ...Perform the processing here...
+ *	}
+ *
+ *	// An ISR that receives data packets from multiple interfaces
+ *  void vAnISR( void )
+ *	{
+ *		BaseType_t xInterfaceToService, xHigherPriorityTaskWoken;
+ *
+ *		// Query the hardware to determine which interface needs processing.
+ *		xInterfaceToService = prvCheckInterfaces();
+ *
+ *      // The actual processing is to be deferred to a task.  Request the
+ *      // vProcessInterface() callback function is executed, passing in the
+ *		// number of the interface that needs processing.  The interface to
+ *		// service is passed in the second parameter.  The first parameter is
+ *		// not used in this case.
+ *		xHigherPriorityTaskWoken = pdFALSE;
+ *		xTimerPendFunctionCallFromISR( vProcessInterface, NULL, ( uint32_t ) xInterfaceToService, &xHigherPriorityTaskWoken );
+ *
+ *		// If xHigherPriorityTaskWoken is now set to pdTRUE then a context
+ *		// switch should be requested.  The macro used is port specific and will
+ *		// be either portYIELD_FROM_ISR() or portEND_SWITCHING_ISR() - refer to
+ *		// the documentation page for the port being used.
+ *		portYIELD_FROM_ISR( xHigherPriorityTaskWoken );
+ *
+ *	}
+ * @endverbatim
+ */
+BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, BaseType_t *pxHigherPriorityTaskWoken ) PRIVILEGED_FUNCTION;
+
+ /**
+  * BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend,
+  *                                    void *pvParameter1,
+  *                                    uint32_t ulParameter2,
+  *                                    TickType_t xTicksToWait );
+  *
+  *
+  * Used to defer the execution of a function to the RTOS daemon task (the timer
+  * service task, hence this function is implemented in timers.c and is prefixed
+  * with 'Timer').
+  *
+  * @param xFunctionToPend The function to execute from the timer service/
+  * daemon task.  The function must conform to the PendedFunction_t
+  * prototype.
+  *
+  * @param pvParameter1 The value of the callback function's first parameter.
+  * The parameter has a void * type to allow it to be used to pass any type.
+  * For example, unsigned longs can be cast to a void *, or the void * can be
+  * used to point to a structure.
+  *
+  * @param ulParameter2 The value of the callback function's second parameter.
+  *
+  * @param xTicksToWait Calling this function will result in a message being
+  * sent to the timer daemon task on a queue.  xTicksToWait is the amount of
+  * time the calling task should remain in the Blocked state (so not using any
+  * processing time) for space to become available on the timer queue if the
+  * queue is found to be full.
+  *
+  * @return pdPASS is returned if the message was successfully sent to the
+  * timer daemon task, otherwise pdFALSE is returned.
+  *
+  */
+BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+/**
+ * const char * const pcTimerGetName( TimerHandle_t xTimer );
+ *
+ * Returns the name that was assigned to a timer when the timer was created.
+ *
+ * @param xTimer The handle of the timer being queried.
+ *
+ * @return The name assigned to the timer specified by the xTimer parameter.
+ */
+const char * pcTimerGetName( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+
+/**
+ * void vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload );
+ *
+ * Updates a timer to be either an autoreload timer, in which case the timer
+ * automatically resets itself each time it expires, or a one shot timer, in
+ * which case the timer will only expire once unless it is manually restarted.
+ *
+ * @param xTimer The handle of the timer being updated.
+ *
+ * @param uxAutoReload If uxAutoReload is set to pdTRUE then the timer will
+ * expire repeatedly with a frequency set by the timer's period (see the
+ * xTimerPeriodInTicks parameter of the xTimerCreate() API function).  If
+ * uxAutoReload is set to pdFALSE then the timer will be a one-shot timer and
+ * enter the dormant state after it expires.
+ */
+void vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload ) PRIVILEGED_FUNCTION;
+
+/**
+ * TickType_t xTimerGetPeriod( TimerHandle_t xTimer );
+ *
+ * Returns the period of a timer.
+ *
+ * @param xTimer The handle of the timer being queried.
+ *
+ * @return The period of the timer in ticks.
+ */
+TickType_t xTimerGetPeriod( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
+
+/**
+* TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer );
+*
+* Returns the time in ticks at which the timer will expire.  If this is less
+* than the current tick count then the expiry time has overflowed from the
+* current time.
+*
+* @param xTimer The handle of the timer being queried.
+*
+* @return If the timer is running then the time in ticks at which the timer
+* will next expire is returned.  If the timer is not running then the return
+* value is undefined.
+*/
+TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
+
+/*
+ * Functions beyond this part are not part of the public API and are intended
+ * for use by the kernel only.
+ */
+BaseType_t xTimerCreateTimerTask( void ) PRIVILEGED_FUNCTION;
+BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait ) PRIVILEGED_FUNCTION;
+
+#if( configUSE_TRACE_FACILITY == 1 )
+	void vTimerSetTimerNumber( TimerHandle_t xTimer, UBaseType_t uxTimerNumber ) PRIVILEGED_FUNCTION;
+	UBaseType_t uxTimerGetTimerNumber( TimerHandle_t xTimer ) PRIVILEGED_FUNCTION;
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* TIMERS_H */
+
+
+
diff --git a/components/freertos/list.c b/components/freertos/list.c
new file mode 100644
index 00000000..21dabdec
--- /dev/null
+++ b/components/freertos/list.c
@@ -0,0 +1,198 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#include 
+#include "FreeRTOS.h"
+#include "list.h"
+
+/*-----------------------------------------------------------
+ * PUBLIC LIST API documented in list.h
+ *----------------------------------------------------------*/
+
+void vListInitialise( List_t * const pxList )
+{
+	/* The list structure contains a list item which is used to mark the
+	end of the list.  To initialise the list the list end is inserted
+	as the only list entry. */
+	pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd );			/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+
+	/* The list end value is the highest possible value in the list to
+	ensure it remains at the end of the list. */
+	pxList->xListEnd.xItemValue = portMAX_DELAY;
+
+	/* The list end next and previous pointers point to itself so we know
+	when the list is empty. */
+	pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );	/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+	pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+
+	pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
+
+	/* Write known values into the list if
+	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+	listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
+	listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
+}
+/*-----------------------------------------------------------*/
+
+void vListInitialiseItem( ListItem_t * const pxItem )
+{
+	/* Make sure the list item is not recorded as being on a list. */
+	pxItem->pxContainer = NULL;
+
+	/* Write known values into the list item if
+	configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+	listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
+	listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
+}
+/*-----------------------------------------------------------*/
+
+void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem )
+{
+ListItem_t * const pxIndex = pxList->pxIndex;
+
+	/* Only effective when configASSERT() is also defined, these tests may catch
+	the list data structures being overwritten in memory.  They will not catch
+	data errors caused by incorrect configuration or use of FreeRTOS. */
+	listTEST_LIST_INTEGRITY( pxList );
+	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
+
+	/* Insert a new list item into pxList, but rather than sort the list,
+	makes the new list item the last item to be removed by a call to
+	listGET_OWNER_OF_NEXT_ENTRY(). */
+	pxNewListItem->pxNext = pxIndex;
+	pxNewListItem->pxPrevious = pxIndex->pxPrevious;
+
+	/* Only used during decision coverage testing. */
+	mtCOVERAGE_TEST_DELAY();
+
+	pxIndex->pxPrevious->pxNext = pxNewListItem;
+	pxIndex->pxPrevious = pxNewListItem;
+
+	/* Remember which list the item is in. */
+	pxNewListItem->pxContainer = pxList;
+
+	( pxList->uxNumberOfItems )++;
+}
+/*-----------------------------------------------------------*/
+
+void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem )
+{
+ListItem_t *pxIterator;
+const TickType_t xValueOfInsertion = pxNewListItem->xItemValue;
+
+	/* Only effective when configASSERT() is also defined, these tests may catch
+	the list data structures being overwritten in memory.  They will not catch
+	data errors caused by incorrect configuration or use of FreeRTOS. */
+	listTEST_LIST_INTEGRITY( pxList );
+	listTEST_LIST_ITEM_INTEGRITY( pxNewListItem );
+
+	/* Insert the new list item into the list, sorted in xItemValue order.
+
+	If the list already contains a list item with the same item value then the
+	new list item should be placed after it.  This ensures that TCBs which are
+	stored in ready lists (all of which have the same xItemValue value) get a
+	share of the CPU.  However, if the xItemValue is the same as the back marker
+	the iteration loop below will not end.  Therefore the value is checked
+	first, and the algorithm slightly modified if necessary. */
+	if( xValueOfInsertion == portMAX_DELAY )
+	{
+		pxIterator = pxList->xListEnd.pxPrevious;
+	}
+	else
+	{
+		/* *** NOTE ***********************************************************
+		If you find your application is crashing here then likely causes are
+		listed below.  In addition see https://www.freertos.org/FAQHelp.html for
+		more tips, and ensure configASSERT() is defined!
+		https://www.freertos.org/a00110.html#configASSERT
+
+			1) Stack overflow -
+			   see https://www.freertos.org/Stacks-and-stack-overflow-checking.html
+			2) Incorrect interrupt priority assignment, especially on Cortex-M
+			   parts where numerically high priority values denote low actual
+			   interrupt priorities, which can seem counter intuitive.  See
+			   https://www.freertos.org/RTOS-Cortex-M3-M4.html and the definition
+			   of configMAX_SYSCALL_INTERRUPT_PRIORITY on
+			   https://www.freertos.org/a00110.html
+			3) Calling an API function from within a critical section or when
+			   the scheduler is suspended, or calling an API function that does
+			   not end in "FromISR" from an interrupt.
+			4) Using a queue or semaphore before it has been initialised or
+			   before the scheduler has been started (are interrupts firing
+			   before vTaskStartScheduler() has been called?).
+		**********************************************************************/
+
+		for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */
+		{
+			/* There is nothing to do here, just iterating to the wanted
+			insertion position. */
+		}
+	}
+
+	pxNewListItem->pxNext = pxIterator->pxNext;
+	pxNewListItem->pxNext->pxPrevious = pxNewListItem;
+	pxNewListItem->pxPrevious = pxIterator;
+	pxIterator->pxNext = pxNewListItem;
+
+	/* Remember which list the item is in.  This allows fast removal of the
+	item later. */
+	pxNewListItem->pxContainer = pxList;
+
+	( pxList->uxNumberOfItems )++;
+}
+/*-----------------------------------------------------------*/
+
+UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove )
+{
+/* The list item knows which list it is in.  Obtain the list from the list
+item. */
+List_t * const pxList = pxItemToRemove->pxContainer;
+
+	pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
+	pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
+
+	/* Only used during decision coverage testing. */
+	mtCOVERAGE_TEST_DELAY();
+
+	/* Make sure the index is left pointing to a valid item. */
+	if( pxList->pxIndex == pxItemToRemove )
+	{
+		pxList->pxIndex = pxItemToRemove->pxPrevious;
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	pxItemToRemove->pxContainer = NULL;
+	( pxList->uxNumberOfItems )--;
+
+	return pxList->uxNumberOfItems;
+}
+/*-----------------------------------------------------------*/
+
diff --git a/components/freertos/portable/MemMang/heap_1.c b/components/freertos/portable/MemMang/heap_1.c
new file mode 100644
index 00000000..542317dc
--- /dev/null
+++ b/components/freertos/portable/MemMang/heap_1.c
@@ -0,0 +1,146 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+/*
+ * The simplest possible implementation of pvPortMalloc().  Note that this
+ * implementation does NOT allow allocated memory to be freed again.
+ *
+ * See heap_2.c, heap_3.c and heap_4.c for alternative implementations, and the
+ * memory management pages of http://www.FreeRTOS.org for more information.
+ */
+#include 
+
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
+all the API functions to use the MPU wrappers.  That should only be done when
+task.h is included from an application file. */
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+#include "FreeRTOS.h"
+#include "task.h"
+
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
+	#error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
+#endif
+
+/* A few bytes might be lost to byte aligning the heap start address. */
+#define configADJUSTED_HEAP_SIZE	( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )
+
+/* Allocate the memory for the heap. */
+#if( configAPPLICATION_ALLOCATED_HEAP == 1 )
+	/* The application writer has already defined the array used for the RTOS
+	heap - probably so it can be placed in a special segment or address. */
+	extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
+#else
+	static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
+#endif /* configAPPLICATION_ALLOCATED_HEAP */
+
+/* Index into the ucHeap array. */
+static size_t xNextFreeByte = ( size_t ) 0;
+
+/*-----------------------------------------------------------*/
+
+void *pvPortMalloc( size_t xWantedSize )
+{
+void *pvReturn = NULL;
+static uint8_t *pucAlignedHeap = NULL;
+
+	/* Ensure that blocks are always aligned to the required number of bytes. */
+	#if( portBYTE_ALIGNMENT != 1 )
+	{
+		if( xWantedSize & portBYTE_ALIGNMENT_MASK )
+		{
+			/* Byte alignment required. */
+			xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
+		}
+	}
+	#endif
+
+	vTaskSuspendAll();
+	{
+		if( pucAlignedHeap == NULL )
+		{
+			/* Ensure the heap starts on a correctly aligned boundary. */
+			pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) &ucHeap[ portBYTE_ALIGNMENT ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) );
+		}
+
+		/* Check there is enough room left for the allocation. */
+		if( ( ( xNextFreeByte + xWantedSize ) < configADJUSTED_HEAP_SIZE ) &&
+			( ( xNextFreeByte + xWantedSize ) > xNextFreeByte )	)/* Check for overflow. */
+		{
+			/* Return the next free byte then increment the index past this
+			block. */
+			pvReturn = pucAlignedHeap + xNextFreeByte;
+			xNextFreeByte += xWantedSize;
+		}
+
+		traceMALLOC( pvReturn, xWantedSize );
+	}
+	( void ) xTaskResumeAll();
+
+	#if( configUSE_MALLOC_FAILED_HOOK == 1 )
+	{
+		if( pvReturn == NULL )
+		{
+			extern void vApplicationMallocFailedHook( void );
+			vApplicationMallocFailedHook();
+		}
+	}
+	#endif
+
+	return pvReturn;
+}
+/*-----------------------------------------------------------*/
+
+void vPortFree( void *pv )
+{
+	/* Memory cannot be freed using this scheme.  See heap_2.c, heap_3.c and
+	heap_4.c for alternative implementations, and the memory management pages of
+	http://www.FreeRTOS.org for more information. */
+	( void ) pv;
+
+	/* Force an assert as it is invalid to call this function. */
+	configASSERT( pv == NULL );
+}
+/*-----------------------------------------------------------*/
+
+void vPortInitialiseBlocks( void )
+{
+	/* Only required when static memory is not cleared. */
+	xNextFreeByte = ( size_t ) 0;
+}
+/*-----------------------------------------------------------*/
+
+size_t xPortGetFreeHeapSize( void )
+{
+	return ( configADJUSTED_HEAP_SIZE - xNextFreeByte );
+}
+
+
+
diff --git a/components/freertos/portable/MemMang/heap_2.c b/components/freertos/portable/MemMang/heap_2.c
new file mode 100644
index 00000000..7d069212
--- /dev/null
+++ b/components/freertos/portable/MemMang/heap_2.c
@@ -0,0 +1,272 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/*
+ * A sample implementation of pvPortMalloc() and vPortFree() that permits
+ * allocated blocks to be freed, but does not combine adjacent free blocks
+ * into a single larger block (and so will fragment memory).  See heap_4.c for
+ * an equivalent that does combine adjacent blocks into single larger blocks.
+ *
+ * See heap_1.c, heap_3.c and heap_4.c for alternative implementations, and the
+ * memory management pages of http://www.FreeRTOS.org for more information.
+ */
+#include 
+
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
+all the API functions to use the MPU wrappers.  That should only be done when
+task.h is included from an application file. */
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+#include "FreeRTOS.h"
+#include "task.h"
+
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
+	#error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
+#endif
+
+/* A few bytes might be lost to byte aligning the heap start address. */
+#define configADJUSTED_HEAP_SIZE	( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )
+
+/*
+ * Initialises the heap structures before their first use.
+ */
+static void prvHeapInit( void );
+
+/* Allocate the memory for the heap. */
+#if( configAPPLICATION_ALLOCATED_HEAP == 1 )
+	/* The application writer has already defined the array used for the RTOS
+	heap - probably so it can be placed in a special segment or address. */
+	extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
+#else
+	static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
+#endif /* configAPPLICATION_ALLOCATED_HEAP */
+
+
+/* Define the linked list structure.  This is used to link free blocks in order
+of their size. */
+typedef struct A_BLOCK_LINK
+{
+	struct A_BLOCK_LINK *pxNextFreeBlock;	/*<< The next free block in the list. */
+	size_t xBlockSize;						/*<< The size of the free block. */
+} BlockLink_t;
+
+
+static const uint16_t heapSTRUCT_SIZE	= ( ( sizeof ( BlockLink_t ) + ( portBYTE_ALIGNMENT - 1 ) ) & ~portBYTE_ALIGNMENT_MASK );
+#define heapMINIMUM_BLOCK_SIZE	( ( size_t ) ( heapSTRUCT_SIZE * 2 ) )
+
+/* Create a couple of list links to mark the start and end of the list. */
+static BlockLink_t xStart, xEnd;
+
+/* Keeps track of the number of free bytes remaining, but says nothing about
+fragmentation. */
+static size_t xFreeBytesRemaining = configADJUSTED_HEAP_SIZE;
+
+/* STATIC FUNCTIONS ARE DEFINED AS MACROS TO MINIMIZE THE FUNCTION CALL DEPTH. */
+
+/*
+ * Insert a block into the list of free blocks - which is ordered by size of
+ * the block.  Small blocks at the start of the list and large blocks at the end
+ * of the list.
+ */
+#define prvInsertBlockIntoFreeList( pxBlockToInsert )								\
+{																					\
+BlockLink_t *pxIterator;															\
+size_t xBlockSize;																	\
+																					\
+	xBlockSize = pxBlockToInsert->xBlockSize;										\
+																					\
+	/* Iterate through the list until a block is found that has a larger size */	\
+	/* than the block we are inserting. */											\
+	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock->xBlockSize < xBlockSize; pxIterator = pxIterator->pxNextFreeBlock )	\
+	{																				\
+		/* There is nothing to do here - just iterate to the correct position. */	\
+	}																				\
+																					\
+	/* Update the list to include the block being inserted in the correct */		\
+	/* position. */																	\
+	pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;					\
+	pxIterator->pxNextFreeBlock = pxBlockToInsert;									\
+}
+/*-----------------------------------------------------------*/
+
+void *pvPortMalloc( size_t xWantedSize )
+{
+BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
+static BaseType_t xHeapHasBeenInitialised = pdFALSE;
+void *pvReturn = NULL;
+
+	vTaskSuspendAll();
+	{
+		/* If this is the first call to malloc then the heap will require
+		initialisation to setup the list of free blocks. */
+		if( xHeapHasBeenInitialised == pdFALSE )
+		{
+			prvHeapInit();
+			xHeapHasBeenInitialised = pdTRUE;
+		}
+
+		/* The wanted size is increased so it can contain a BlockLink_t
+		structure in addition to the requested amount of bytes. */
+		if( xWantedSize > 0 )
+		{
+			xWantedSize += heapSTRUCT_SIZE;
+
+			/* Ensure that blocks are always aligned to the required number of bytes. */
+			if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0 )
+			{
+				/* Byte alignment required. */
+				xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
+			}
+		}
+
+		if( ( xWantedSize > 0 ) && ( xWantedSize < configADJUSTED_HEAP_SIZE ) )
+		{
+			/* Blocks are stored in byte order - traverse the list from the start
+			(smallest) block until one of adequate size is found. */
+			pxPreviousBlock = &xStart;
+			pxBlock = xStart.pxNextFreeBlock;
+			while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
+			{
+				pxPreviousBlock = pxBlock;
+				pxBlock = pxBlock->pxNextFreeBlock;
+			}
+
+			/* If we found the end marker then a block of adequate size was not found. */
+			if( pxBlock != &xEnd )
+			{
+				/* Return the memory space - jumping over the BlockLink_t structure
+				at its start. */
+				pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE );
+
+				/* This block is being returned for use so must be taken out of the
+				list of free blocks. */
+				pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
+
+				/* If the block is larger than required it can be split into two. */
+				if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
+				{
+					/* This block is to be split into two.  Create a new block
+					following the number of bytes requested. The void cast is
+					used to prevent byte alignment warnings from the compiler. */
+					pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
+
+					/* Calculate the sizes of two blocks split from the single
+					block. */
+					pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
+					pxBlock->xBlockSize = xWantedSize;
+
+					/* Insert the new block into the list of free blocks. */
+					prvInsertBlockIntoFreeList( ( pxNewBlockLink ) );
+				}
+
+				xFreeBytesRemaining -= pxBlock->xBlockSize;
+			}
+		}
+
+		traceMALLOC( pvReturn, xWantedSize );
+	}
+	( void ) xTaskResumeAll();
+
+	#if( configUSE_MALLOC_FAILED_HOOK == 1 )
+	{
+		if( pvReturn == NULL )
+		{
+			extern void vApplicationMallocFailedHook( void );
+			vApplicationMallocFailedHook();
+		}
+	}
+	#endif
+
+	return pvReturn;
+}
+/*-----------------------------------------------------------*/
+
+void vPortFree( void *pv )
+{
+uint8_t *puc = ( uint8_t * ) pv;
+BlockLink_t *pxLink;
+
+	if( pv != NULL )
+	{
+		/* The memory being freed will have an BlockLink_t structure immediately
+		before it. */
+		puc -= heapSTRUCT_SIZE;
+
+		/* This unexpected casting is to keep some compilers from issuing
+		byte alignment warnings. */
+		pxLink = ( void * ) puc;
+
+		vTaskSuspendAll();
+		{
+			/* Add this block to the list of free blocks. */
+			prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
+			xFreeBytesRemaining += pxLink->xBlockSize;
+			traceFREE( pv, pxLink->xBlockSize );
+		}
+		( void ) xTaskResumeAll();
+	}
+}
+/*-----------------------------------------------------------*/
+
+size_t xPortGetFreeHeapSize( void )
+{
+	return xFreeBytesRemaining;
+}
+/*-----------------------------------------------------------*/
+
+void vPortInitialiseBlocks( void )
+{
+	/* This just exists to keep the linker quiet. */
+}
+/*-----------------------------------------------------------*/
+
+static void prvHeapInit( void )
+{
+BlockLink_t *pxFirstFreeBlock;
+uint8_t *pucAlignedHeap;
+
+	/* Ensure the heap starts on a correctly aligned boundary. */
+	pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) &ucHeap[ portBYTE_ALIGNMENT ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) );
+
+	/* xStart is used to hold a pointer to the first item in the list of free
+	blocks.  The void cast is used to prevent compiler warnings. */
+	xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
+	xStart.xBlockSize = ( size_t ) 0;
+
+	/* xEnd is used to mark the end of the list of free blocks. */
+	xEnd.xBlockSize = configADJUSTED_HEAP_SIZE;
+	xEnd.pxNextFreeBlock = NULL;
+
+	/* To start with there is a single free block that is sized to take up the
+	entire heap space. */
+	pxFirstFreeBlock = ( void * ) pucAlignedHeap;
+	pxFirstFreeBlock->xBlockSize = configADJUSTED_HEAP_SIZE;
+	pxFirstFreeBlock->pxNextFreeBlock = &xEnd;
+}
+/*-----------------------------------------------------------*/
diff --git a/components/freertos/portable/MemMang/heap_3.c b/components/freertos/portable/MemMang/heap_3.c
new file mode 100644
index 00000000..e6a29908
--- /dev/null
+++ b/components/freertos/portable/MemMang/heap_3.c
@@ -0,0 +1,97 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+/*
+ * Implementation of pvPortMalloc() and vPortFree() that relies on the
+ * compilers own malloc() and free() implementations.
+ *
+ * This file can only be used if the linker is configured to to generate
+ * a heap memory area.
+ *
+ * See heap_1.c, heap_2.c and heap_4.c for alternative implementations, and the
+ * memory management pages of http://www.FreeRTOS.org for more information.
+ */
+
+#include 
+
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
+all the API functions to use the MPU wrappers.  That should only be done when
+task.h is included from an application file. */
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+#include "FreeRTOS.h"
+#include "task.h"
+
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
+	#error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
+#endif
+
+/*-----------------------------------------------------------*/
+
+void *pvPortMalloc( size_t xWantedSize )
+{
+void *pvReturn;
+
+	vTaskSuspendAll();
+	{
+		pvReturn = malloc( xWantedSize );
+		traceMALLOC( pvReturn, xWantedSize );
+	}
+	( void ) xTaskResumeAll();
+
+	#if( configUSE_MALLOC_FAILED_HOOK == 1 )
+	{
+		if( pvReturn == NULL )
+		{
+			extern void vApplicationMallocFailedHook( void );
+			vApplicationMallocFailedHook();
+		}
+	}
+	#endif
+
+	return pvReturn;
+}
+/*-----------------------------------------------------------*/
+
+void vPortFree( void *pv )
+{
+	if( pv )
+	{
+		vTaskSuspendAll();
+		{
+			free( pv );
+			traceFREE( pv, 0 );
+		}
+		( void ) xTaskResumeAll();
+	}
+}
+
+
+
diff --git a/components/freertos/portable/MemMang/heap_4.c b/components/freertos/portable/MemMang/heap_4.c
new file mode 100644
index 00000000..8ff7bc2a
--- /dev/null
+++ b/components/freertos/portable/MemMang/heap_4.c
@@ -0,0 +1,492 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/*
+ * A sample implementation of pvPortMalloc() and vPortFree() that combines
+ * (coalescences) adjacent memory blocks as they are freed, and in so doing
+ * limits memory fragmentation.
+ *
+ * See heap_1.c, heap_2.c and heap_3.c for alternative implementations, and the
+ * memory management pages of http://www.FreeRTOS.org for more information.
+ */
+#include 
+
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
+all the API functions to use the MPU wrappers.  That should only be done when
+task.h is included from an application file. */
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+#include "FreeRTOS.h"
+#include "task.h"
+
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
+	#error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
+#endif
+
+/* Block sizes must not get too small. */
+#define heapMINIMUM_BLOCK_SIZE	( ( size_t ) ( xHeapStructSize << 1 ) )
+
+/* Assumes 8bit bytes! */
+#define heapBITS_PER_BYTE		( ( size_t ) 8 )
+
+/* Allocate the memory for the heap. */
+#if( configAPPLICATION_ALLOCATED_HEAP == 1 )
+	/* The application writer has already defined the array used for the RTOS
+	heap - probably so it can be placed in a special segment or address. */
+	extern uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
+#else
+	static uint8_t ucHeap[ configTOTAL_HEAP_SIZE ];
+#endif /* configAPPLICATION_ALLOCATED_HEAP */
+
+/* Define the linked list structure.  This is used to link free blocks in order
+of their memory address. */
+typedef struct A_BLOCK_LINK
+{
+	struct A_BLOCK_LINK *pxNextFreeBlock;	/*<< The next free block in the list. */
+	size_t xBlockSize;						/*<< The size of the free block. */
+} BlockLink_t;
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Inserts a block of memory that is being freed into the correct position in
+ * the list of free memory blocks.  The block being freed will be merged with
+ * the block in front it and/or the block behind it if the memory blocks are
+ * adjacent to each other.
+ */
+static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert );
+
+/*
+ * Called automatically to setup the required heap structures the first time
+ * pvPortMalloc() is called.
+ */
+static void prvHeapInit( void );
+
+/*-----------------------------------------------------------*/
+
+/* The size of the structure placed at the beginning of each allocated memory
+block must by correctly byte aligned. */
+static const size_t xHeapStructSize	= ( sizeof( BlockLink_t ) + ( ( size_t ) ( portBYTE_ALIGNMENT - 1 ) ) ) & ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
+
+/* Create a couple of list links to mark the start and end of the list. */
+static BlockLink_t xStart, *pxEnd = NULL;
+
+/* Keeps track of the number of calls to allocate and free memory as well as the
+number of free bytes remaining, but says nothing about fragmentation. */
+static size_t xFreeBytesRemaining = 0U;
+static size_t xMinimumEverFreeBytesRemaining = 0U;
+static size_t xNumberOfSuccessfulAllocations = 0;
+static size_t xNumberOfSuccessfulFrees = 0;
+
+/* Gets set to the top bit of an size_t type.  When this bit in the xBlockSize
+member of an BlockLink_t structure is set then the block belongs to the
+application.  When the bit is free the block is still part of the free heap
+space. */
+static size_t xBlockAllocatedBit = 0;
+
+/*-----------------------------------------------------------*/
+
+void *pvPortMalloc( size_t xWantedSize )
+{
+BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
+void *pvReturn = NULL;
+
+	vTaskSuspendAll();
+	{
+		/* If this is the first call to malloc then the heap will require
+		initialisation to setup the list of free blocks. */
+		if( pxEnd == NULL )
+		{
+			prvHeapInit();
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		/* Check the requested block size is not so large that the top bit is
+		set.  The top bit of the block size member of the BlockLink_t structure
+		is used to determine who owns the block - the application or the
+		kernel, so it must be free. */
+		if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
+		{
+			/* The wanted size is increased so it can contain a BlockLink_t
+			structure in addition to the requested amount of bytes. */
+			if( xWantedSize > 0 )
+			{
+				xWantedSize += xHeapStructSize;
+
+				/* Ensure that blocks are always aligned to the required number
+				of bytes. */
+				if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
+				{
+					/* Byte alignment required. */
+					xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
+					configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 );
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+
+			if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
+			{
+				/* Traverse the list from the start	(lowest address) block until
+				one	of adequate size is found. */
+				pxPreviousBlock = &xStart;
+				pxBlock = xStart.pxNextFreeBlock;
+				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
+				{
+					pxPreviousBlock = pxBlock;
+					pxBlock = pxBlock->pxNextFreeBlock;
+				}
+
+				/* If the end marker was reached then a block of adequate size
+				was	not found. */
+				if( pxBlock != pxEnd )
+				{
+					/* Return the memory space pointed to - jumping over the
+					BlockLink_t structure at its start. */
+					pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
+
+					/* This block is being returned for use so must be taken out
+					of the list of free blocks. */
+					pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
+
+					/* If the block is larger than required it can be split into
+					two. */
+					if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
+					{
+						/* This block is to be split into two.  Create a new
+						block following the number of bytes requested. The void
+						cast is used to prevent byte alignment warnings from the
+						compiler. */
+						pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
+						configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 );
+
+						/* Calculate the sizes of two blocks split from the
+						single block. */
+						pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
+						pxBlock->xBlockSize = xWantedSize;
+
+						/* Insert the new block into the list of free blocks. */
+						prvInsertBlockIntoFreeList( pxNewBlockLink );
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					xFreeBytesRemaining -= pxBlock->xBlockSize;
+
+					if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
+					{
+						xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					/* The block is being returned - it is allocated and owned
+					by the application and has no "next" block. */
+					pxBlock->xBlockSize |= xBlockAllocatedBit;
+					pxBlock->pxNextFreeBlock = NULL;
+					xNumberOfSuccessfulAllocations++;
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		traceMALLOC( pvReturn, xWantedSize );
+	}
+	( void ) xTaskResumeAll();
+
+	#if( configUSE_MALLOC_FAILED_HOOK == 1 )
+	{
+		if( pvReturn == NULL )
+		{
+			extern void vApplicationMallocFailedHook( void );
+			vApplicationMallocFailedHook();
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	#endif
+
+	configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 );
+	return pvReturn;
+}
+/*-----------------------------------------------------------*/
+
+void vPortFree( void *pv )
+{
+uint8_t *puc = ( uint8_t * ) pv;
+BlockLink_t *pxLink;
+
+	if( pv != NULL )
+	{
+		/* The memory being freed will have an BlockLink_t structure immediately
+		before it. */
+		puc -= xHeapStructSize;
+
+		/* This casting is to keep the compiler from issuing warnings. */
+		pxLink = ( void * ) puc;
+
+		/* Check the block is actually allocated. */
+		configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
+		configASSERT( pxLink->pxNextFreeBlock == NULL );
+
+		if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
+		{
+			if( pxLink->pxNextFreeBlock == NULL )
+			{
+				/* The block is being returned to the heap - it is no longer
+				allocated. */
+				pxLink->xBlockSize &= ~xBlockAllocatedBit;
+
+				vTaskSuspendAll();
+				{
+					/* Add this block to the list of free blocks. */
+					xFreeBytesRemaining += pxLink->xBlockSize;
+					traceFREE( pv, pxLink->xBlockSize );
+					prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
+					xNumberOfSuccessfulFrees++;
+				}
+				( void ) xTaskResumeAll();
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+}
+/*-----------------------------------------------------------*/
+
+size_t xPortGetFreeHeapSize( void )
+{
+	return xFreeBytesRemaining;
+}
+/*-----------------------------------------------------------*/
+
+size_t xPortGetMinimumEverFreeHeapSize( void )
+{
+	return xMinimumEverFreeBytesRemaining;
+}
+/*-----------------------------------------------------------*/
+
+void vPortInitialiseBlocks( void )
+{
+	/* This just exists to keep the linker quiet. */
+}
+/*-----------------------------------------------------------*/
+
+static void prvHeapInit( void )
+{
+BlockLink_t *pxFirstFreeBlock;
+uint8_t *pucAlignedHeap;
+size_t uxAddress;
+size_t xTotalHeapSize = configTOTAL_HEAP_SIZE;
+
+	/* Ensure the heap starts on a correctly aligned boundary. */
+	uxAddress = ( size_t ) ucHeap;
+
+	if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
+	{
+		uxAddress += ( portBYTE_ALIGNMENT - 1 );
+		uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
+		xTotalHeapSize -= uxAddress - ( size_t ) ucHeap;
+	}
+
+	pucAlignedHeap = ( uint8_t * ) uxAddress;
+
+	/* xStart is used to hold a pointer to the first item in the list of free
+	blocks.  The void cast is used to prevent compiler warnings. */
+	xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
+	xStart.xBlockSize = ( size_t ) 0;
+
+	/* pxEnd is used to mark the end of the list of free blocks and is inserted
+	at the end of the heap space. */
+	uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize;
+	uxAddress -= xHeapStructSize;
+	uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
+	pxEnd = ( void * ) uxAddress;
+	pxEnd->xBlockSize = 0;
+	pxEnd->pxNextFreeBlock = NULL;
+
+	/* To start with there is a single free block that is sized to take up the
+	entire heap space, minus the space taken by pxEnd. */
+	pxFirstFreeBlock = ( void * ) pucAlignedHeap;
+	pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock;
+	pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
+
+	/* Only one block exists - and it covers the entire usable heap space. */
+	xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
+	xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize;
+
+	/* Work out the position of the top bit in a size_t variable. */
+	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
+}
+/*-----------------------------------------------------------*/
+
+static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
+{
+BlockLink_t *pxIterator;
+uint8_t *puc;
+
+	/* Iterate through the list until a block is found that has a higher address
+	than the block being inserted. */
+	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
+	{
+		/* Nothing to do here, just iterate to the right position. */
+	}
+
+	/* Do the block being inserted, and the block it is being inserted after
+	make a contiguous block of memory? */
+	puc = ( uint8_t * ) pxIterator;
+	if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
+	{
+		pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
+		pxBlockToInsert = pxIterator;
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	/* Do the block being inserted, and the block it is being inserted before
+	make a contiguous block of memory? */
+	puc = ( uint8_t * ) pxBlockToInsert;
+	if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
+	{
+		if( pxIterator->pxNextFreeBlock != pxEnd )
+		{
+			/* Form one big block from the two blocks. */
+			pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
+			pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
+		}
+		else
+		{
+			pxBlockToInsert->pxNextFreeBlock = pxEnd;
+		}
+	}
+	else
+	{
+		pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
+	}
+
+	/* If the block being inserted plugged a gab, so was merged with the block
+	before and the block after, then it's pxNextFreeBlock pointer will have
+	already been set, and should not be set here as that would make it point
+	to itself. */
+	if( pxIterator != pxBlockToInsert )
+	{
+		pxIterator->pxNextFreeBlock = pxBlockToInsert;
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+}
+/*-----------------------------------------------------------*/
+
+void vPortGetHeapStats( HeapStats_t *pxHeapStats )
+{
+BlockLink_t *pxBlock;
+size_t xBlocks = 0, xMaxSize = 0, xMinSize = portMAX_DELAY; /* portMAX_DELAY used as a portable way of getting the maximum value. */
+
+	vTaskSuspendAll();
+	{
+		pxBlock = xStart.pxNextFreeBlock;
+
+		/* pxBlock will be NULL if the heap has not been initialised.  The heap
+		is initialised automatically when the first allocation is made. */
+		if( pxBlock != NULL )
+		{
+			do
+			{
+				/* Increment the number of blocks and record the largest block seen
+				so far. */
+				xBlocks++;
+
+				if( pxBlock->xBlockSize > xMaxSize )
+				{
+					xMaxSize = pxBlock->xBlockSize;
+				}
+
+				if( pxBlock->xBlockSize < xMinSize )
+				{
+					xMinSize = pxBlock->xBlockSize;
+				}
+
+				/* Move to the next block in the chain until the last block is
+				reached. */
+				pxBlock = pxBlock->pxNextFreeBlock;
+			} while( pxBlock != pxEnd );
+		}
+	}
+	xTaskResumeAll();
+
+	pxHeapStats->xSizeOfLargestFreeBlockInBytes = xMaxSize;
+	pxHeapStats->xSizeOfSmallestFreeBlockInBytes = xMinSize;
+	pxHeapStats->xNumberOfFreeBlocks = xBlocks;
+
+	taskENTER_CRITICAL();
+	{
+		pxHeapStats->xAvailableHeapSpaceInBytes = xFreeBytesRemaining;
+		pxHeapStats->xNumberOfSuccessfulAllocations = xNumberOfSuccessfulAllocations;
+		pxHeapStats->xNumberOfSuccessfulFrees = xNumberOfSuccessfulFrees;
+		pxHeapStats->xMinimumEverFreeBytesRemaining = xMinimumEverFreeBytesRemaining;
+	}
+	taskEXIT_CRITICAL();
+}
+
diff --git a/components/freertos/portable/MemMang/heap_5.c b/components/freertos/portable/MemMang/heap_5.c
new file mode 100644
index 00000000..4ad266a6
--- /dev/null
+++ b/components/freertos/portable/MemMang/heap_5.c
@@ -0,0 +1,547 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/*
+ * A sample implementation of pvPortMalloc() that allows the heap to be defined
+ * across multiple non-contigous blocks and combines (coalescences) adjacent
+ * memory blocks as they are freed.
+ *
+ * See heap_1.c, heap_2.c, heap_3.c and heap_4.c for alternative
+ * implementations, and the memory management pages of http://www.FreeRTOS.org
+ * for more information.
+ *
+ * Usage notes:
+ *
+ * vPortDefineHeapRegions() ***must*** be called before pvPortMalloc().
+ * pvPortMalloc() will be called if any task objects (tasks, queues, event
+ * groups, etc.) are created, therefore vPortDefineHeapRegions() ***must*** be
+ * called before any other objects are defined.
+ *
+ * vPortDefineHeapRegions() takes a single parameter.  The parameter is an array
+ * of HeapRegion_t structures.  HeapRegion_t is defined in portable.h as
+ *
+ * typedef struct HeapRegion
+ * {
+ *	uint8_t *pucStartAddress; << Start address of a block of memory that will be part of the heap.
+ *	size_t xSizeInBytes;	  << Size of the block of memory.
+ * } HeapRegion_t;
+ *
+ * The array is terminated using a NULL zero sized region definition, and the
+ * memory regions defined in the array ***must*** appear in address order from
+ * low address to high address.  So the following is a valid example of how
+ * to use the function.
+ *
+ * HeapRegion_t xHeapRegions[] =
+ * {
+ * 	{ ( uint8_t * ) 0x80000000UL, 0x10000 }, << Defines a block of 0x10000 bytes starting at address 0x80000000
+ * 	{ ( uint8_t * ) 0x90000000UL, 0xa0000 }, << Defines a block of 0xa0000 bytes starting at address of 0x90000000
+ * 	{ NULL, 0 }                << Terminates the array.
+ * };
+ *
+ * vPortDefineHeapRegions( xHeapRegions ); << Pass the array into vPortDefineHeapRegions().
+ *
+ * Note 0x80000000 is the lower address so appears in the array first.
+ *
+ */
+#include 
+
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
+all the API functions to use the MPU wrappers.  That should only be done when
+task.h is included from an application file. */
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+#include "FreeRTOS.h"
+#include "task.h"
+
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 0 )
+	#error This file must not be used if configSUPPORT_DYNAMIC_ALLOCATION is 0
+#endif
+
+/* Block sizes must not get too small. */
+#define heapMINIMUM_BLOCK_SIZE	( ( size_t ) ( xHeapStructSize << 1 ) )
+
+/* Assumes 8bit bytes! */
+#define heapBITS_PER_BYTE		( ( size_t ) 8 )
+
+/* Define the linked list structure.  This is used to link free blocks in order
+of their memory address. */
+typedef struct A_BLOCK_LINK
+{
+	struct A_BLOCK_LINK *pxNextFreeBlock;	/*<< The next free block in the list. */
+	size_t xBlockSize;						/*<< The size of the free block. */
+} BlockLink_t;
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Inserts a block of memory that is being freed into the correct position in
+ * the list of free memory blocks.  The block being freed will be merged with
+ * the block in front it and/or the block behind it if the memory blocks are
+ * adjacent to each other.
+ */
+static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert );
+
+/*-----------------------------------------------------------*/
+
+/* The size of the structure placed at the beginning of each allocated memory
+block must by correctly byte aligned. */
+static const size_t xHeapStructSize	= ( sizeof( BlockLink_t ) + ( ( size_t ) ( portBYTE_ALIGNMENT - 1 ) ) ) & ~( ( size_t ) portBYTE_ALIGNMENT_MASK );
+
+/* Create a couple of list links to mark the start and end of the list. */
+static BlockLink_t xStart, *pxEnd = NULL;
+
+/* Keeps track of the number of calls to allocate and free memory as well as the
+number of free bytes remaining, but says nothing about fragmentation. */
+static size_t xFreeBytesRemaining = 0U;
+static size_t xMinimumEverFreeBytesRemaining = 0U;
+static size_t xNumberOfSuccessfulAllocations = 0;
+static size_t xNumberOfSuccessfulFrees = 0;
+
+/* Gets set to the top bit of an size_t type.  When this bit in the xBlockSize
+member of an BlockLink_t structure is set then the block belongs to the
+application.  When the bit is free the block is still part of the free heap
+space. */
+static size_t xBlockAllocatedBit = 0;
+
+/*-----------------------------------------------------------*/
+
+void *pvPortMalloc( size_t xWantedSize )
+{
+BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
+void *pvReturn = NULL;
+
+	/* The heap must be initialised before the first call to
+	prvPortMalloc(). */
+	configASSERT( pxEnd );
+
+	vTaskSuspendAll();
+	{
+		/* Check the requested block size is not so large that the top bit is
+		set.  The top bit of the block size member of the BlockLink_t structure
+		is used to determine who owns the block - the application or the
+		kernel, so it must be free. */
+		if( ( xWantedSize & xBlockAllocatedBit ) == 0 )
+		{
+			/* The wanted size is increased so it can contain a BlockLink_t
+			structure in addition to the requested amount of bytes. */
+			if( xWantedSize > 0 )
+			{
+				xWantedSize += xHeapStructSize;
+
+				/* Ensure that blocks are always aligned to the required number
+				of bytes. */
+				if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 )
+				{
+					/* Byte alignment required. */
+					xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+
+			if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) )
+			{
+				/* Traverse the list from the start	(lowest address) block until
+				one	of adequate size is found. */
+				pxPreviousBlock = &xStart;
+				pxBlock = xStart.pxNextFreeBlock;
+				while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
+				{
+					pxPreviousBlock = pxBlock;
+					pxBlock = pxBlock->pxNextFreeBlock;
+				}
+
+				/* If the end marker was reached then a block of adequate size
+				was	not found. */
+				if( pxBlock != pxEnd )
+				{
+					/* Return the memory space pointed to - jumping over the
+					BlockLink_t structure at its start. */
+					pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize );
+
+					/* This block is being returned for use so must be taken out
+					of the list of free blocks. */
+					pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
+
+					/* If the block is larger than required it can be split into
+					two. */
+					if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
+					{
+						/* This block is to be split into two.  Create a new
+						block following the number of bytes requested. The void
+						cast is used to prevent byte alignment warnings from the
+						compiler. */
+						pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize );
+
+						/* Calculate the sizes of two blocks split from the
+						single block. */
+						pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
+						pxBlock->xBlockSize = xWantedSize;
+
+						/* Insert the new block into the list of free blocks. */
+						prvInsertBlockIntoFreeList( ( pxNewBlockLink ) );
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					xFreeBytesRemaining -= pxBlock->xBlockSize;
+
+					if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining )
+					{
+						xMinimumEverFreeBytesRemaining = xFreeBytesRemaining;
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					/* The block is being returned - it is allocated and owned
+					by the application and has no "next" block. */
+					pxBlock->xBlockSize |= xBlockAllocatedBit;
+					pxBlock->pxNextFreeBlock = NULL;
+					xNumberOfSuccessfulAllocations++;
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		traceMALLOC( pvReturn, xWantedSize );
+	}
+	( void ) xTaskResumeAll();
+
+	#if( configUSE_MALLOC_FAILED_HOOK == 1 )
+	{
+		if( pvReturn == NULL )
+		{
+			extern void vApplicationMallocFailedHook( void );
+			vApplicationMallocFailedHook();
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	#endif
+
+	return pvReturn;
+}
+/*-----------------------------------------------------------*/
+
+void vPortFree( void *pv )
+{
+uint8_t *puc = ( uint8_t * ) pv;
+BlockLink_t *pxLink;
+
+	if( pv != NULL )
+	{
+		/* The memory being freed will have an BlockLink_t structure immediately
+		before it. */
+		puc -= xHeapStructSize;
+
+		/* This casting is to keep the compiler from issuing warnings. */
+		pxLink = ( void * ) puc;
+
+		/* Check the block is actually allocated. */
+		configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 );
+		configASSERT( pxLink->pxNextFreeBlock == NULL );
+
+		if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 )
+		{
+			if( pxLink->pxNextFreeBlock == NULL )
+			{
+				/* The block is being returned to the heap - it is no longer
+				allocated. */
+				pxLink->xBlockSize &= ~xBlockAllocatedBit;
+
+				vTaskSuspendAll();
+				{
+					/* Add this block to the list of free blocks. */
+					xFreeBytesRemaining += pxLink->xBlockSize;
+					traceFREE( pv, pxLink->xBlockSize );
+					prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) );
+					xNumberOfSuccessfulFrees++;
+				}
+				( void ) xTaskResumeAll();
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+}
+/*-----------------------------------------------------------*/
+
+size_t xPortGetFreeHeapSize( void )
+{
+	return xFreeBytesRemaining;
+}
+/*-----------------------------------------------------------*/
+
+size_t xPortGetMinimumEverFreeHeapSize( void )
+{
+	return xMinimumEverFreeBytesRemaining;
+}
+/*-----------------------------------------------------------*/
+
+static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert )
+{
+BlockLink_t *pxIterator;
+uint8_t *puc;
+
+	/* Iterate through the list until a block is found that has a higher address
+	than the block being inserted. */
+	for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
+	{
+		/* Nothing to do here, just iterate to the right position. */
+	}
+
+	/* Do the block being inserted, and the block it is being inserted after
+	make a contiguous block of memory? */
+	puc = ( uint8_t * ) pxIterator;
+	if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert )
+	{
+		pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
+		pxBlockToInsert = pxIterator;
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	/* Do the block being inserted, and the block it is being inserted before
+	make a contiguous block of memory? */
+	puc = ( uint8_t * ) pxBlockToInsert;
+	if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock )
+	{
+		if( pxIterator->pxNextFreeBlock != pxEnd )
+		{
+			/* Form one big block from the two blocks. */
+			pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
+			pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
+		}
+		else
+		{
+			pxBlockToInsert->pxNextFreeBlock = pxEnd;
+		}
+	}
+	else
+	{
+		pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
+	}
+
+	/* If the block being inserted plugged a gab, so was merged with the block
+	before and the block after, then it's pxNextFreeBlock pointer will have
+	already been set, and should not be set here as that would make it point
+	to itself. */
+	if( pxIterator != pxBlockToInsert )
+	{
+		pxIterator->pxNextFreeBlock = pxBlockToInsert;
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+}
+/*-----------------------------------------------------------*/
+
+void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions )
+{
+BlockLink_t *pxFirstFreeBlockInRegion = NULL, *pxPreviousFreeBlock;
+size_t xAlignedHeap;
+size_t xTotalRegionSize, xTotalHeapSize = 0;
+BaseType_t xDefinedRegions = 0;
+size_t xAddress;
+const HeapRegion_t *pxHeapRegion;
+
+	/* Can only call once! */
+	configASSERT( pxEnd == NULL );
+
+	pxHeapRegion = &( pxHeapRegions[ xDefinedRegions ] );
+
+	while( pxHeapRegion->xSizeInBytes > 0 )
+	{
+		xTotalRegionSize = pxHeapRegion->xSizeInBytes;
+
+		/* Ensure the heap region starts on a correctly aligned boundary. */
+		xAddress = ( size_t ) pxHeapRegion->pucStartAddress;
+		if( ( xAddress & portBYTE_ALIGNMENT_MASK ) != 0 )
+		{
+			xAddress += ( portBYTE_ALIGNMENT - 1 );
+			xAddress &= ~portBYTE_ALIGNMENT_MASK;
+
+			/* Adjust the size for the bytes lost to alignment. */
+			xTotalRegionSize -= xAddress - ( size_t ) pxHeapRegion->pucStartAddress;
+		}
+
+		xAlignedHeap = xAddress;
+
+		/* Set xStart if it has not already been set. */
+		if( xDefinedRegions == 0 )
+		{
+			/* xStart is used to hold a pointer to the first item in the list of
+			free blocks.  The void cast is used to prevent compiler warnings. */
+			xStart.pxNextFreeBlock = ( BlockLink_t * ) xAlignedHeap;
+			xStart.xBlockSize = ( size_t ) 0;
+		}
+		else
+		{
+			/* Should only get here if one region has already been added to the
+			heap. */
+			configASSERT( pxEnd != NULL );
+
+			/* Check blocks are passed in with increasing start addresses. */
+			configASSERT( xAddress > ( size_t ) pxEnd );
+		}
+
+		/* Remember the location of the end marker in the previous region, if
+		any. */
+		pxPreviousFreeBlock = pxEnd;
+
+		/* pxEnd is used to mark the end of the list of free blocks and is
+		inserted at the end of the region space. */
+		xAddress = xAlignedHeap + xTotalRegionSize;
+		xAddress -= xHeapStructSize;
+		xAddress &= ~portBYTE_ALIGNMENT_MASK;
+		pxEnd = ( BlockLink_t * ) xAddress;
+		pxEnd->xBlockSize = 0;
+		pxEnd->pxNextFreeBlock = NULL;
+
+		/* To start with there is a single free block in this region that is
+		sized to take up the entire heap region minus the space taken by the
+		free block structure. */
+		pxFirstFreeBlockInRegion = ( BlockLink_t * ) xAlignedHeap;
+		pxFirstFreeBlockInRegion->xBlockSize = xAddress - ( size_t ) pxFirstFreeBlockInRegion;
+		pxFirstFreeBlockInRegion->pxNextFreeBlock = pxEnd;
+
+		/* If this is not the first region that makes up the entire heap space
+		then link the previous region to this region. */
+		if( pxPreviousFreeBlock != NULL )
+		{
+			pxPreviousFreeBlock->pxNextFreeBlock = pxFirstFreeBlockInRegion;
+		}
+
+		xTotalHeapSize += pxFirstFreeBlockInRegion->xBlockSize;
+
+		/* Move onto the next HeapRegion_t structure. */
+		xDefinedRegions++;
+		pxHeapRegion = &( pxHeapRegions[ xDefinedRegions ] );
+	}
+
+	xMinimumEverFreeBytesRemaining = xTotalHeapSize;
+	xFreeBytesRemaining = xTotalHeapSize;
+
+	/* Check something was actually defined before it is accessed. */
+	configASSERT( xTotalHeapSize );
+
+	/* Work out the position of the top bit in a size_t variable. */
+	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
+}
+/*-----------------------------------------------------------*/
+
+void vPortGetHeapStats( HeapStats_t *pxHeapStats )
+{
+BlockLink_t *pxBlock;
+size_t xBlocks = 0, xMaxSize = 0, xMinSize = portMAX_DELAY; /* portMAX_DELAY used as a portable way of getting the maximum value. */
+
+	vTaskSuspendAll();
+	{
+		pxBlock = xStart.pxNextFreeBlock;
+
+		/* pxBlock will be NULL if the heap has not been initialised.  The heap
+		is initialised automatically when the first allocation is made. */
+		if( pxBlock != NULL )
+		{
+			do
+			{
+				/* Increment the number of blocks and record the largest block seen
+				so far. */
+				xBlocks++;
+
+				if( pxBlock->xBlockSize > xMaxSize )
+				{
+					xMaxSize = pxBlock->xBlockSize;
+				}
+
+				/* Heap five will have a zero sized block at the end of each
+				each region - the block is only used to link to the next
+				heap region so it not a real block. */
+				if( pxBlock->xBlockSize != 0 )
+				{
+					if( pxBlock->xBlockSize < xMinSize )
+					{
+						xMinSize = pxBlock->xBlockSize;
+					}
+				}
+
+				/* Move to the next block in the chain until the last block is
+				reached. */
+				pxBlock = pxBlock->pxNextFreeBlock;
+			} while( pxBlock != pxEnd );
+		}
+	}
+	xTaskResumeAll();
+
+	pxHeapStats->xSizeOfLargestFreeBlockInBytes = xMaxSize;
+	pxHeapStats->xSizeOfSmallestFreeBlockInBytes = xMinSize;
+	pxHeapStats->xNumberOfFreeBlocks = xBlocks;
+
+	taskENTER_CRITICAL();
+	{
+		pxHeapStats->xAvailableHeapSpaceInBytes = xFreeBytesRemaining;
+		pxHeapStats->xNumberOfSuccessfulAllocations = xNumberOfSuccessfulAllocations;
+		pxHeapStats->xNumberOfSuccessfulFrees = xNumberOfSuccessfulFrees;
+		pxHeapStats->xMinimumEverFreeBytesRemaining = xMinimumEverFreeBytesRemaining;
+	}
+	taskEXIT_CRITICAL();
+}
+
diff --git a/components/freertos/portable/readme.txt b/components/freertos/portable/readme.txt
new file mode 100644
index 00000000..b68d2d57
--- /dev/null
+++ b/components/freertos/portable/readme.txt
@@ -0,0 +1,20 @@
+Each real time kernel port consists of three files that contain the core kernel
+components and are common to every port, and one or more files that are
+specific to a particular microcontroller and/or compiler.
+
+
++ The FreeRTOS/Source/Portable/MemMang directory contains the five sample
+memory allocators as described on the http://www.FreeRTOS.org WEB site.
+
++ The other directories each contain files specific to a particular
+microcontroller or compiler, where the directory name denotes the compiler
+specific files the directory contains.
+
+
+
+For example, if you are interested in the [compiler] port for the [architecture]
+microcontroller, then the port specific files are contained in
+FreeRTOS/Source/Portable/[compiler]/[architecture] directory.  If this is the
+only port you are interested in then all the other directories can be
+ignored.
+
diff --git a/components/freertos/queue.c b/components/freertos/queue.c
new file mode 100644
index 00000000..d882bf67
--- /dev/null
+++ b/components/freertos/queue.c
@@ -0,0 +1,2941 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#include 
+#include 
+
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
+all the API functions to use the MPU wrappers.  That should only be done when
+task.h is included from an application file. */
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+
+#if ( configUSE_CO_ROUTINES == 1 )
+	#include "croutine.h"
+#endif
+
+/* Lint e9021, e961 and e750 are suppressed as a MISRA exception justified
+because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
+for the header files above, but not in this file, in order to generate the
+correct privileged Vs unprivileged linkage and placement. */
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021. */
+
+
+/* Constants used with the cRxLock and cTxLock structure members. */
+#define queueUNLOCKED					( ( int8_t ) -1 )
+#define queueLOCKED_UNMODIFIED			( ( int8_t ) 0 )
+
+/* When the Queue_t structure is used to represent a base queue its pcHead and
+pcTail members are used as pointers into the queue storage area.  When the
+Queue_t structure is used to represent a mutex pcHead and pcTail pointers are
+not necessary, and the pcHead pointer is set to NULL to indicate that the
+structure instead holds a pointer to the mutex holder (if any).  Map alternative
+names to the pcHead and structure member to ensure the readability of the code
+is maintained.  The QueuePointers_t and SemaphoreData_t types are used to form
+a union as their usage is mutually exclusive dependent on what the queue is
+being used for. */
+#define uxQueueType						pcHead
+#define queueQUEUE_IS_MUTEX				NULL
+
+typedef struct QueuePointers
+{
+	int8_t *pcTail;					/*< Points to the byte at the end of the queue storage area.  Once more byte is allocated than necessary to store the queue items, this is used as a marker. */
+	int8_t *pcReadFrom;				/*< Points to the last place that a queued item was read from when the structure is used as a queue. */
+} QueuePointers_t;
+
+typedef struct SemaphoreData
+{
+	TaskHandle_t xMutexHolder;		 /*< The handle of the task that holds the mutex. */
+	UBaseType_t uxRecursiveCallCount;/*< Maintains a count of the number of times a recursive mutex has been recursively 'taken' when the structure is used as a mutex. */
+} SemaphoreData_t;
+
+/* Semaphores do not actually store or copy data, so have an item size of
+zero. */
+#define queueSEMAPHORE_QUEUE_ITEM_LENGTH ( ( UBaseType_t ) 0 )
+#define queueMUTEX_GIVE_BLOCK_TIME		 ( ( TickType_t ) 0U )
+
+#if( configUSE_PREEMPTION == 0 )
+	/* If the cooperative scheduler is being used then a yield should not be
+	performed just because a higher priority task has been woken. */
+	#define queueYIELD_IF_USING_PREEMPTION()
+#else
+	#define queueYIELD_IF_USING_PREEMPTION() portYIELD_WITHIN_API()
+#endif
+
+/*
+ * Definition of the queue used by the scheduler.
+ * Items are queued by copy, not reference.  See the following link for the
+ * rationale: https://www.freertos.org/Embedded-RTOS-Queues.html
+ */
+typedef struct QueueDefinition 		/* The old naming convention is used to prevent breaking kernel aware debuggers. */
+{
+	int8_t *pcHead;					/*< Points to the beginning of the queue storage area. */
+	int8_t *pcWriteTo;				/*< Points to the free next place in the storage area. */
+
+	union
+	{
+		QueuePointers_t xQueue;		/*< Data required exclusively when this structure is used as a queue. */
+		SemaphoreData_t xSemaphore; /*< Data required exclusively when this structure is used as a semaphore. */
+	} u;
+
+	List_t xTasksWaitingToSend;		/*< List of tasks that are blocked waiting to post onto this queue.  Stored in priority order. */
+	List_t xTasksWaitingToReceive;	/*< List of tasks that are blocked waiting to read from this queue.  Stored in priority order. */
+
+	volatile UBaseType_t uxMessagesWaiting;/*< The number of items currently in the queue. */
+	UBaseType_t uxLength;			/*< The length of the queue defined as the number of items it will hold, not the number of bytes. */
+	UBaseType_t uxItemSize;			/*< The size of each items that the queue will hold. */
+
+	volatile int8_t cRxLock;		/*< Stores the number of items received from the queue (removed from the queue) while the queue was locked.  Set to queueUNLOCKED when the queue is not locked. */
+	volatile int8_t cTxLock;		/*< Stores the number of items transmitted to the queue (added to the queue) while the queue was locked.  Set to queueUNLOCKED when the queue is not locked. */
+
+	#if( ( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+		uint8_t ucStaticallyAllocated;	/*< Set to pdTRUE if the memory used by the queue was statically allocated to ensure no attempt is made to free the memory. */
+	#endif
+
+	#if ( configUSE_QUEUE_SETS == 1 )
+		struct QueueDefinition *pxQueueSetContainer;
+	#endif
+
+	#if ( configUSE_TRACE_FACILITY == 1 )
+		UBaseType_t uxQueueNumber;
+		uint8_t ucQueueType;
+	#endif
+
+} xQUEUE;
+
+/* The old xQUEUE name is maintained above then typedefed to the new Queue_t
+name below to enable the use of older kernel aware debuggers. */
+typedef xQUEUE Queue_t;
+
+/*-----------------------------------------------------------*/
+
+/*
+ * The queue registry is just a means for kernel aware debuggers to locate
+ * queue structures.  It has no other purpose so is an optional component.
+ */
+#if ( configQUEUE_REGISTRY_SIZE > 0 )
+
+	/* The type stored within the queue registry array.  This allows a name
+	to be assigned to each queue making kernel aware debugging a little
+	more user friendly. */
+	typedef struct QUEUE_REGISTRY_ITEM
+	{
+		const char *pcQueueName; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+		QueueHandle_t xHandle;
+	} xQueueRegistryItem;
+
+	/* The old xQueueRegistryItem name is maintained above then typedefed to the
+	new xQueueRegistryItem name below to enable the use of older kernel aware
+	debuggers. */
+	typedef xQueueRegistryItem QueueRegistryItem_t;
+
+	/* The queue registry is simply an array of QueueRegistryItem_t structures.
+	The pcQueueName member of a structure being NULL is indicative of the
+	array position being vacant. */
+	PRIVILEGED_DATA QueueRegistryItem_t xQueueRegistry[ configQUEUE_REGISTRY_SIZE ];
+
+#endif /* configQUEUE_REGISTRY_SIZE */
+
+/*
+ * Unlocks a queue locked by a call to prvLockQueue.  Locking a queue does not
+ * prevent an ISR from adding or removing items to the queue, but does prevent
+ * an ISR from removing tasks from the queue event lists.  If an ISR finds a
+ * queue is locked it will instead increment the appropriate queue lock count
+ * to indicate that a task may require unblocking.  When the queue in unlocked
+ * these lock counts are inspected, and the appropriate action taken.
+ */
+static void prvUnlockQueue( Queue_t * const pxQueue ) PRIVILEGED_FUNCTION;
+
+/*
+ * Uses a critical section to determine if there is any data in a queue.
+ *
+ * @return pdTRUE if the queue contains no items, otherwise pdFALSE.
+ */
+static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue ) PRIVILEGED_FUNCTION;
+
+/*
+ * Uses a critical section to determine if there is any space in a queue.
+ *
+ * @return pdTRUE if there is no space, otherwise pdFALSE;
+ */
+static BaseType_t prvIsQueueFull( const Queue_t *pxQueue ) PRIVILEGED_FUNCTION;
+
+/*
+ * Copies an item into the queue, either at the front of the queue or the
+ * back of the queue.
+ */
+static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition ) PRIVILEGED_FUNCTION;
+
+/*
+ * Copies an item out of a queue.
+ */
+static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer ) PRIVILEGED_FUNCTION;
+
+#if ( configUSE_QUEUE_SETS == 1 )
+	/*
+	 * Checks to see if a queue is a member of a queue set, and if so, notifies
+	 * the queue set that the queue contains data.
+	 */
+	static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue, const BaseType_t xCopyPosition ) PRIVILEGED_FUNCTION;
+#endif
+
+/*
+ * Called after a Queue_t structure has been allocated either statically or
+ * dynamically to fill in the structure's members.
+ */
+static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue ) PRIVILEGED_FUNCTION;
+
+/*
+ * Mutexes are a special type of queue.  When a mutex is created, first the
+ * queue is created, then prvInitialiseMutex() is called to configure the queue
+ * as a mutex.
+ */
+#if( configUSE_MUTEXES == 1 )
+	static void prvInitialiseMutex( Queue_t *pxNewQueue ) PRIVILEGED_FUNCTION;
+#endif
+
+#if( configUSE_MUTEXES == 1 )
+	/*
+	 * If a task waiting for a mutex causes the mutex holder to inherit a
+	 * priority, but the waiting task times out, then the holder should
+	 * disinherit the priority - but only down to the highest priority of any
+	 * other tasks that are waiting for the same mutex.  This function returns
+	 * that priority.
+	 */
+	static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue ) PRIVILEGED_FUNCTION;
+#endif
+/*-----------------------------------------------------------*/
+
+/*
+ * Macro to mark a queue as locked.  Locking a queue prevents an ISR from
+ * accessing the queue event lists.
+ */
+#define prvLockQueue( pxQueue )								\
+	taskENTER_CRITICAL();									\
+	{														\
+		if( ( pxQueue )->cRxLock == queueUNLOCKED )			\
+		{													\
+			( pxQueue )->cRxLock = queueLOCKED_UNMODIFIED;	\
+		}													\
+		if( ( pxQueue )->cTxLock == queueUNLOCKED )			\
+		{													\
+			( pxQueue )->cTxLock = queueLOCKED_UNMODIFIED;	\
+		}													\
+	}														\
+	taskEXIT_CRITICAL()
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueueGenericReset( QueueHandle_t xQueue, BaseType_t xNewQueue )
+{
+Queue_t * const pxQueue = xQueue;
+
+	configASSERT( pxQueue );
+
+	taskENTER_CRITICAL();
+	{
+		pxQueue->u.xQueue.pcTail = pxQueue->pcHead + ( pxQueue->uxLength * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
+		pxQueue->uxMessagesWaiting = ( UBaseType_t ) 0U;
+		pxQueue->pcWriteTo = pxQueue->pcHead;
+		pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead + ( ( pxQueue->uxLength - 1U ) * pxQueue->uxItemSize ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
+		pxQueue->cRxLock = queueUNLOCKED;
+		pxQueue->cTxLock = queueUNLOCKED;
+
+		if( xNewQueue == pdFALSE )
+		{
+			/* If there are tasks blocked waiting to read from the queue, then
+			the tasks will remain blocked as after this function exits the queue
+			will still be empty.  If there are tasks blocked waiting to write to
+			the queue, then one should be unblocked as after this function exits
+			it will be possible to write to it. */
+			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+			{
+				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+				{
+					queueYIELD_IF_USING_PREEMPTION();
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		else
+		{
+			/* Ensure the event queues start in the correct state. */
+			vListInitialise( &( pxQueue->xTasksWaitingToSend ) );
+			vListInitialise( &( pxQueue->xTasksWaitingToReceive ) );
+		}
+	}
+	taskEXIT_CRITICAL();
+
+	/* A value is returned for calling semantic consistency with previous
+	versions. */
+	return pdPASS;
+}
+/*-----------------------------------------------------------*/
+
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+
+	QueueHandle_t xQueueGenericCreateStatic( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, StaticQueue_t *pxStaticQueue, const uint8_t ucQueueType )
+	{
+	Queue_t *pxNewQueue;
+
+		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
+
+		/* The StaticQueue_t structure and the queue storage area must be
+		supplied. */
+		configASSERT( pxStaticQueue != NULL );
+
+		/* A queue storage area should be provided if the item size is not 0, and
+		should not be provided if the item size is 0. */
+		configASSERT( !( ( pucQueueStorage != NULL ) && ( uxItemSize == 0 ) ) );
+		configASSERT( !( ( pucQueueStorage == NULL ) && ( uxItemSize != 0 ) ) );
+
+		#if( configASSERT_DEFINED == 1 )
+		{
+			/* Sanity check that the size of the structure used to declare a
+			variable of type StaticQueue_t or StaticSemaphore_t equals the size of
+			the real queue and semaphore structures. */
+			volatile size_t xSize = sizeof( StaticQueue_t );
+			configASSERT( xSize == sizeof( Queue_t ) );
+			( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
+		}
+		#endif /* configASSERT_DEFINED */
+
+		/* The address of a statically allocated queue was passed in, use it.
+		The address of a statically allocated storage area was also passed in
+		but is already set. */
+		pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
+
+		if( pxNewQueue != NULL )
+		{
+			#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+			{
+				/* Queues can be allocated wither statically or dynamically, so
+				note this queue was allocated statically in case the queue is
+				later deleted. */
+				pxNewQueue->ucStaticallyAllocated = pdTRUE;
+			}
+			#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
+
+			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
+		}
+		else
+		{
+			traceQUEUE_CREATE_FAILED( ucQueueType );
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		return pxNewQueue;
+	}
+
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+/*-----------------------------------------------------------*/
+
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+
+	QueueHandle_t xQueueGenericCreate( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, const uint8_t ucQueueType )
+	{
+	Queue_t *pxNewQueue;
+	size_t xQueueSizeInBytes;
+	uint8_t *pucQueueStorage;
+
+		configASSERT( uxQueueLength > ( UBaseType_t ) 0 );
+
+		if( uxItemSize == ( UBaseType_t ) 0 )
+		{
+			/* There is not going to be a queue storage area. */
+			xQueueSizeInBytes = ( size_t ) 0;
+		}
+		else
+		{
+			/* Allocate enough space to hold the maximum number of items that
+			can be in the queue at any time. */
+			xQueueSizeInBytes = ( size_t ) ( uxQueueLength * uxItemSize ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+		}
+
+		/* Allocate the queue and storage area.  Justification for MISRA
+		deviation as follows:  pvPortMalloc() always ensures returned memory
+		blocks are aligned per the requirements of the MCU stack.  In this case
+		pvPortMalloc() must return a pointer that is guaranteed to meet the
+		alignment requirements of the Queue_t structure - which in this case
+		is an int8_t *.  Therefore, whenever the stack alignment requirements
+		are greater than or equal to the pointer to char requirements the cast
+		is safe.  In other cases alignment requirements are not strict (one or
+		two bytes). */
+		pxNewQueue = ( Queue_t * ) pvPortMalloc( sizeof( Queue_t ) + xQueueSizeInBytes ); /*lint !e9087 !e9079 see comment above. */
+
+		if( pxNewQueue != NULL )
+		{
+			/* Jump past the queue structure to find the location of the queue
+			storage area. */
+			pucQueueStorage = ( uint8_t * ) pxNewQueue;
+			pucQueueStorage += sizeof( Queue_t ); /*lint !e9016 Pointer arithmetic allowed on char types, especially when it assists conveying intent. */
+
+			#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+			{
+				/* Queues can be created either statically or dynamically, so
+				note this task was created dynamically in case it is later
+				deleted. */
+				pxNewQueue->ucStaticallyAllocated = pdFALSE;
+			}
+			#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+			prvInitialiseNewQueue( uxQueueLength, uxItemSize, pucQueueStorage, ucQueueType, pxNewQueue );
+		}
+		else
+		{
+			traceQUEUE_CREATE_FAILED( ucQueueType );
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		return pxNewQueue;
+	}
+
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+/*-----------------------------------------------------------*/
+
+static void prvInitialiseNewQueue( const UBaseType_t uxQueueLength, const UBaseType_t uxItemSize, uint8_t *pucQueueStorage, const uint8_t ucQueueType, Queue_t *pxNewQueue )
+{
+	/* Remove compiler warnings about unused parameters should
+	configUSE_TRACE_FACILITY not be set to 1. */
+	( void ) ucQueueType;
+
+	if( uxItemSize == ( UBaseType_t ) 0 )
+	{
+		/* No RAM was allocated for the queue storage area, but PC head cannot
+		be set to NULL because NULL is used as a key to say the queue is used as
+		a mutex.  Therefore just set pcHead to point to the queue as a benign
+		value that is known to be within the memory map. */
+		pxNewQueue->pcHead = ( int8_t * ) pxNewQueue;
+	}
+	else
+	{
+		/* Set the head to the start of the queue storage area. */
+		pxNewQueue->pcHead = ( int8_t * ) pucQueueStorage;
+	}
+
+	/* Initialise the queue members as described where the queue type is
+	defined. */
+	pxNewQueue->uxLength = uxQueueLength;
+	pxNewQueue->uxItemSize = uxItemSize;
+	( void ) xQueueGenericReset( pxNewQueue, pdTRUE );
+
+	#if ( configUSE_TRACE_FACILITY == 1 )
+	{
+		pxNewQueue->ucQueueType = ucQueueType;
+	}
+	#endif /* configUSE_TRACE_FACILITY */
+
+	#if( configUSE_QUEUE_SETS == 1 )
+	{
+		pxNewQueue->pxQueueSetContainer = NULL;
+	}
+	#endif /* configUSE_QUEUE_SETS */
+
+	traceQUEUE_CREATE( pxNewQueue );
+}
+/*-----------------------------------------------------------*/
+
+#if( configUSE_MUTEXES == 1 )
+
+	static void prvInitialiseMutex( Queue_t *pxNewQueue )
+	{
+		if( pxNewQueue != NULL )
+		{
+			/* The queue create function will set all the queue structure members
+			correctly for a generic queue, but this function is creating a
+			mutex.  Overwrite those members that need to be set differently -
+			in particular the information required for priority inheritance. */
+			pxNewQueue->u.xSemaphore.xMutexHolder = NULL;
+			pxNewQueue->uxQueueType = queueQUEUE_IS_MUTEX;
+
+			/* In case this is a recursive mutex. */
+			pxNewQueue->u.xSemaphore.uxRecursiveCallCount = 0;
+
+			traceCREATE_MUTEX( pxNewQueue );
+
+			/* Start with the semaphore in the expected state. */
+			( void ) xQueueGenericSend( pxNewQueue, NULL, ( TickType_t ) 0U, queueSEND_TO_BACK );
+		}
+		else
+		{
+			traceCREATE_MUTEX_FAILED();
+		}
+	}
+
+#endif /* configUSE_MUTEXES */
+/*-----------------------------------------------------------*/
+
+#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+
+	QueueHandle_t xQueueCreateMutex( const uint8_t ucQueueType )
+	{
+	QueueHandle_t xNewQueue;
+	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
+
+		xNewQueue = xQueueGenericCreate( uxMutexLength, uxMutexSize, ucQueueType );
+		prvInitialiseMutex( ( Queue_t * ) xNewQueue );
+
+		return xNewQueue;
+	}
+
+#endif /* configUSE_MUTEXES */
+/*-----------------------------------------------------------*/
+
+#if( ( configUSE_MUTEXES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+
+	QueueHandle_t xQueueCreateMutexStatic( const uint8_t ucQueueType, StaticQueue_t *pxStaticQueue )
+	{
+	QueueHandle_t xNewQueue;
+	const UBaseType_t uxMutexLength = ( UBaseType_t ) 1, uxMutexSize = ( UBaseType_t ) 0;
+
+		/* Prevent compiler warnings about unused parameters if
+		configUSE_TRACE_FACILITY does not equal 1. */
+		( void ) ucQueueType;
+
+		xNewQueue = xQueueGenericCreateStatic( uxMutexLength, uxMutexSize, NULL, pxStaticQueue, ucQueueType );
+		prvInitialiseMutex( ( Queue_t * ) xNewQueue );
+
+		return xNewQueue;
+	}
+
+#endif /* configUSE_MUTEXES */
+/*-----------------------------------------------------------*/
+
+#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) )
+
+	TaskHandle_t xQueueGetMutexHolder( QueueHandle_t xSemaphore )
+	{
+	TaskHandle_t pxReturn;
+	Queue_t * const pxSemaphore = ( Queue_t * ) xSemaphore;
+
+		/* This function is called by xSemaphoreGetMutexHolder(), and should not
+		be called directly.  Note:  This is a good way of determining if the
+		calling task is the mutex holder, but not a good way of determining the
+		identity of the mutex holder, as the holder may change between the
+		following critical section exiting and the function returning. */
+		taskENTER_CRITICAL();
+		{
+			if( pxSemaphore->uxQueueType == queueQUEUE_IS_MUTEX )
+			{
+				pxReturn = pxSemaphore->u.xSemaphore.xMutexHolder;
+			}
+			else
+			{
+				pxReturn = NULL;
+			}
+		}
+		taskEXIT_CRITICAL();
+
+		return pxReturn;
+	} /*lint !e818 xSemaphore cannot be a pointer to const because it is a typedef. */
+
+#endif
+/*-----------------------------------------------------------*/
+
+#if ( ( configUSE_MUTEXES == 1 ) && ( INCLUDE_xSemaphoreGetMutexHolder == 1 ) )
+
+	TaskHandle_t xQueueGetMutexHolderFromISR( QueueHandle_t xSemaphore )
+	{
+	TaskHandle_t pxReturn;
+
+		configASSERT( xSemaphore );
+
+		/* Mutexes cannot be used in interrupt service routines, so the mutex
+		holder should not change in an ISR, and therefore a critical section is
+		not required here. */
+		if( ( ( Queue_t * ) xSemaphore )->uxQueueType == queueQUEUE_IS_MUTEX )
+		{
+			pxReturn = ( ( Queue_t * ) xSemaphore )->u.xSemaphore.xMutexHolder;
+		}
+		else
+		{
+			pxReturn = NULL;
+		}
+
+		return pxReturn;
+	} /*lint !e818 xSemaphore cannot be a pointer to const because it is a typedef. */
+
+#endif
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_RECURSIVE_MUTEXES == 1 )
+
+	BaseType_t xQueueGiveMutexRecursive( QueueHandle_t xMutex )
+	{
+	BaseType_t xReturn;
+	Queue_t * const pxMutex = ( Queue_t * ) xMutex;
+
+		configASSERT( pxMutex );
+
+		/* If this is the task that holds the mutex then xMutexHolder will not
+		change outside of this task.  If this task does not hold the mutex then
+		pxMutexHolder can never coincidentally equal the tasks handle, and as
+		this is the only condition we are interested in it does not matter if
+		pxMutexHolder is accessed simultaneously by another task.  Therefore no
+		mutual exclusion is required to test the pxMutexHolder variable. */
+		if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
+		{
+			traceGIVE_MUTEX_RECURSIVE( pxMutex );
+
+			/* uxRecursiveCallCount cannot be zero if xMutexHolder is equal to
+			the task handle, therefore no underflow check is required.  Also,
+			uxRecursiveCallCount is only modified by the mutex holder, and as
+			there can only be one, no mutual exclusion is required to modify the
+			uxRecursiveCallCount member. */
+			( pxMutex->u.xSemaphore.uxRecursiveCallCount )--;
+
+			/* Has the recursive call count unwound to 0? */
+			if( pxMutex->u.xSemaphore.uxRecursiveCallCount == ( UBaseType_t ) 0 )
+			{
+				/* Return the mutex.  This will automatically unblock any other
+				task that might be waiting to access the mutex. */
+				( void ) xQueueGenericSend( pxMutex, NULL, queueMUTEX_GIVE_BLOCK_TIME, queueSEND_TO_BACK );
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+
+			xReturn = pdPASS;
+		}
+		else
+		{
+			/* The mutex cannot be given because the calling task is not the
+			holder. */
+			xReturn = pdFAIL;
+
+			traceGIVE_MUTEX_RECURSIVE_FAILED( pxMutex );
+		}
+
+		return xReturn;
+	}
+
+#endif /* configUSE_RECURSIVE_MUTEXES */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_RECURSIVE_MUTEXES == 1 )
+
+	BaseType_t xQueueTakeMutexRecursive( QueueHandle_t xMutex, TickType_t xTicksToWait )
+	{
+	BaseType_t xReturn;
+	Queue_t * const pxMutex = ( Queue_t * ) xMutex;
+
+		configASSERT( pxMutex );
+
+		/* Comments regarding mutual exclusion as per those within
+		xQueueGiveMutexRecursive(). */
+
+		traceTAKE_MUTEX_RECURSIVE( pxMutex );
+
+		if( pxMutex->u.xSemaphore.xMutexHolder == xTaskGetCurrentTaskHandle() )
+		{
+			( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
+			xReturn = pdPASS;
+		}
+		else
+		{
+			xReturn = xQueueSemaphoreTake( pxMutex, xTicksToWait );
+
+			/* pdPASS will only be returned if the mutex was successfully
+			obtained.  The calling task may have entered the Blocked state
+			before reaching here. */
+			if( xReturn != pdFAIL )
+			{
+				( pxMutex->u.xSemaphore.uxRecursiveCallCount )++;
+			}
+			else
+			{
+				traceTAKE_MUTEX_RECURSIVE_FAILED( pxMutex );
+			}
+		}
+
+		return xReturn;
+	}
+
+#endif /* configUSE_RECURSIVE_MUTEXES */
+/*-----------------------------------------------------------*/
+
+#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+
+	QueueHandle_t xQueueCreateCountingSemaphoreStatic( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount, StaticQueue_t *pxStaticQueue )
+	{
+	QueueHandle_t xHandle;
+
+		configASSERT( uxMaxCount != 0 );
+		configASSERT( uxInitialCount <= uxMaxCount );
+
+		xHandle = xQueueGenericCreateStatic( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, NULL, pxStaticQueue, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
+
+		if( xHandle != NULL )
+		{
+			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
+
+			traceCREATE_COUNTING_SEMAPHORE();
+		}
+		else
+		{
+			traceCREATE_COUNTING_SEMAPHORE_FAILED();
+		}
+
+		return xHandle;
+	}
+
+#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
+/*-----------------------------------------------------------*/
+
+#if( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+
+	QueueHandle_t xQueueCreateCountingSemaphore( const UBaseType_t uxMaxCount, const UBaseType_t uxInitialCount )
+	{
+	QueueHandle_t xHandle;
+
+		configASSERT( uxMaxCount != 0 );
+		configASSERT( uxInitialCount <= uxMaxCount );
+
+		xHandle = xQueueGenericCreate( uxMaxCount, queueSEMAPHORE_QUEUE_ITEM_LENGTH, queueQUEUE_TYPE_COUNTING_SEMAPHORE );
+
+		if( xHandle != NULL )
+		{
+			( ( Queue_t * ) xHandle )->uxMessagesWaiting = uxInitialCount;
+
+			traceCREATE_COUNTING_SEMAPHORE();
+		}
+		else
+		{
+			traceCREATE_COUNTING_SEMAPHORE_FAILED();
+		}
+
+		return xHandle;
+	}
+
+#endif /* ( ( configUSE_COUNTING_SEMAPHORES == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueueGenericSend( QueueHandle_t xQueue, const void * const pvItemToQueue, TickType_t xTicksToWait, const BaseType_t xCopyPosition )
+{
+BaseType_t xEntryTimeSet = pdFALSE, xYieldRequired;
+TimeOut_t xTimeOut;
+Queue_t * const pxQueue = xQueue;
+
+	configASSERT( pxQueue );
+	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
+	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
+	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
+	{
+		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
+	}
+	#endif
+
+
+	/*lint -save -e904 This function relaxes the coding standard somewhat to
+	allow return statements within the function itself.  This is done in the
+	interest of execution time efficiency. */
+	for( ;; )
+	{
+		taskENTER_CRITICAL();
+		{
+			/* Is there room on the queue now?  The running task must be the
+			highest priority task wanting to access the queue.  If the head item
+			in the queue is to be overwritten then it does not matter if the
+			queue is full. */
+			if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
+			{
+				traceQUEUE_SEND( pxQueue );
+
+				#if ( configUSE_QUEUE_SETS == 1 )
+				{
+				UBaseType_t uxPreviousMessagesWaiting = pxQueue->uxMessagesWaiting;
+
+					xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
+
+					if( pxQueue->pxQueueSetContainer != NULL )
+					{
+						if( ( xCopyPosition == queueOVERWRITE ) && ( uxPreviousMessagesWaiting != ( UBaseType_t ) 0 ) )
+						{
+							/* Do not notify the queue set as an existing item
+							was overwritten in the queue so the number of items
+							in the queue has not changed. */
+							mtCOVERAGE_TEST_MARKER();
+						}
+						else if( prvNotifyQueueSetContainer( pxQueue, xCopyPosition ) != pdFALSE )
+						{
+							/* The queue is a member of a queue set, and posting
+							to the queue set caused a higher priority task to
+							unblock. A context switch is required. */
+							queueYIELD_IF_USING_PREEMPTION();
+						}
+						else
+						{
+							mtCOVERAGE_TEST_MARKER();
+						}
+					}
+					else
+					{
+						/* If there was a task waiting for data to arrive on the
+						queue then unblock it now. */
+						if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+						{
+							if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+							{
+								/* The unblocked task has a priority higher than
+								our own so yield immediately.  Yes it is ok to
+								do this from within the critical section - the
+								kernel takes care of that. */
+								queueYIELD_IF_USING_PREEMPTION();
+							}
+							else
+							{
+								mtCOVERAGE_TEST_MARKER();
+							}
+						}
+						else if( xYieldRequired != pdFALSE )
+						{
+							/* This path is a special case that will only get
+							executed if the task was holding multiple mutexes
+							and the mutexes were given back in an order that is
+							different to that in which they were taken. */
+							queueYIELD_IF_USING_PREEMPTION();
+						}
+						else
+						{
+							mtCOVERAGE_TEST_MARKER();
+						}
+					}
+				}
+				#else /* configUSE_QUEUE_SETS */
+				{
+					xYieldRequired = prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
+
+					/* If there was a task waiting for data to arrive on the
+					queue then unblock it now. */
+					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+					{
+						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+						{
+							/* The unblocked task has a priority higher than
+							our own so yield immediately.  Yes it is ok to do
+							this from within the critical section - the kernel
+							takes care of that. */
+							queueYIELD_IF_USING_PREEMPTION();
+						}
+						else
+						{
+							mtCOVERAGE_TEST_MARKER();
+						}
+					}
+					else if( xYieldRequired != pdFALSE )
+					{
+						/* This path is a special case that will only get
+						executed if the task was holding multiple mutexes and
+						the mutexes were given back in an order that is
+						different to that in which they were taken. */
+						queueYIELD_IF_USING_PREEMPTION();
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				#endif /* configUSE_QUEUE_SETS */
+
+				taskEXIT_CRITICAL();
+				return pdPASS;
+			}
+			else
+			{
+				if( xTicksToWait == ( TickType_t ) 0 )
+				{
+					/* The queue was full and no block time is specified (or
+					the block time has expired) so leave now. */
+					taskEXIT_CRITICAL();
+
+					/* Return to the original privilege level before exiting
+					the function. */
+					traceQUEUE_SEND_FAILED( pxQueue );
+					return errQUEUE_FULL;
+				}
+				else if( xEntryTimeSet == pdFALSE )
+				{
+					/* The queue was full and a block time was specified so
+					configure the timeout structure. */
+					vTaskInternalSetTimeOutState( &xTimeOut );
+					xEntryTimeSet = pdTRUE;
+				}
+				else
+				{
+					/* Entry time was already set. */
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+		}
+		taskEXIT_CRITICAL();
+
+		/* Interrupts and other tasks can send to and receive from the queue
+		now the critical section has been exited. */
+
+		vTaskSuspendAll();
+		prvLockQueue( pxQueue );
+
+		/* Update the timeout state to see if it has expired yet. */
+		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
+		{
+			if( prvIsQueueFull( pxQueue ) != pdFALSE )
+			{
+				traceBLOCKING_ON_QUEUE_SEND( pxQueue );
+				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToSend ), xTicksToWait );
+
+				/* Unlocking the queue means queue events can effect the
+				event list.  It is possible that interrupts occurring now
+				remove this task from the event list again - but as the
+				scheduler is suspended the task will go onto the pending
+				ready last instead of the actual ready list. */
+				prvUnlockQueue( pxQueue );
+
+				/* Resuming the scheduler will move tasks from the pending
+				ready list into the ready list - so it is feasible that this
+				task is already in a ready list before it yields - in which
+				case the yield will not cause a context switch unless there
+				is also a higher priority task in the pending ready list. */
+				if( xTaskResumeAll() == pdFALSE )
+				{
+					portYIELD_WITHIN_API();
+				}
+			}
+			else
+			{
+				/* Try again. */
+				prvUnlockQueue( pxQueue );
+				( void ) xTaskResumeAll();
+			}
+		}
+		else
+		{
+			/* The timeout has expired. */
+			prvUnlockQueue( pxQueue );
+			( void ) xTaskResumeAll();
+
+			traceQUEUE_SEND_FAILED( pxQueue );
+			return errQUEUE_FULL;
+		}
+	} /*lint -restore */
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueueGenericSendFromISR( QueueHandle_t xQueue, const void * const pvItemToQueue, BaseType_t * const pxHigherPriorityTaskWoken, const BaseType_t xCopyPosition )
+{
+BaseType_t xReturn;
+UBaseType_t uxSavedInterruptStatus;
+Queue_t * const pxQueue = xQueue;
+
+	configASSERT( pxQueue );
+	configASSERT( !( ( pvItemToQueue == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
+	configASSERT( !( ( xCopyPosition == queueOVERWRITE ) && ( pxQueue->uxLength != 1 ) ) );
+
+	/* RTOS ports that support interrupt nesting have the concept of a maximum
+	system call (or maximum API call) interrupt priority.  Interrupts that are
+	above the maximum system call priority are kept permanently enabled, even
+	when the RTOS kernel is in a critical section, but cannot make any calls to
+	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
+	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
+	failure if a FreeRTOS API function is called from an interrupt that has been
+	assigned a priority above the configured maximum system call priority.
+	Only FreeRTOS functions that end in FromISR can be called from interrupts
+	that have been assigned a priority at or (logically) below the maximum
+	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
+	safe API to ensure interrupt entry is as fast and as simple as possible.
+	More information (albeit Cortex-M specific) is provided on the following
+	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
+	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+
+	/* Similar to xQueueGenericSend, except without blocking if there is no room
+	in the queue.  Also don't directly wake a task that was blocked on a queue
+	read, instead return a flag to say whether a context switch is required or
+	not (i.e. has a task with a higher priority than us been woken by this
+	post). */
+	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+	{
+		if( ( pxQueue->uxMessagesWaiting < pxQueue->uxLength ) || ( xCopyPosition == queueOVERWRITE ) )
+		{
+			const int8_t cTxLock = pxQueue->cTxLock;
+
+			traceQUEUE_SEND_FROM_ISR( pxQueue );
+
+			/* Semaphores use xQueueGiveFromISR(), so pxQueue will not be a
+			semaphore or mutex.  That means prvCopyDataToQueue() cannot result
+			in a task disinheriting a priority and prvCopyDataToQueue() can be
+			called here even though the disinherit function does not check if
+			the scheduler is suspended before accessing the ready lists. */
+			( void ) prvCopyDataToQueue( pxQueue, pvItemToQueue, xCopyPosition );
+
+			/* The event list is not altered if the queue is locked.  This will
+			be done when the queue is unlocked later. */
+			if( cTxLock == queueUNLOCKED )
+			{
+				#if ( configUSE_QUEUE_SETS == 1 )
+				{
+					if( pxQueue->pxQueueSetContainer != NULL )
+					{
+						if( prvNotifyQueueSetContainer( pxQueue, xCopyPosition ) != pdFALSE )
+						{
+							/* The queue is a member of a queue set, and posting
+							to the queue set caused a higher priority task to
+							unblock.  A context switch is required. */
+							if( pxHigherPriorityTaskWoken != NULL )
+							{
+								*pxHigherPriorityTaskWoken = pdTRUE;
+							}
+							else
+							{
+								mtCOVERAGE_TEST_MARKER();
+							}
+						}
+						else
+						{
+							mtCOVERAGE_TEST_MARKER();
+						}
+					}
+					else
+					{
+						if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+						{
+							if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+							{
+								/* The task waiting has a higher priority so
+								record that a context switch is required. */
+								if( pxHigherPriorityTaskWoken != NULL )
+								{
+									*pxHigherPriorityTaskWoken = pdTRUE;
+								}
+								else
+								{
+									mtCOVERAGE_TEST_MARKER();
+								}
+							}
+							else
+							{
+								mtCOVERAGE_TEST_MARKER();
+							}
+						}
+						else
+						{
+							mtCOVERAGE_TEST_MARKER();
+						}
+					}
+				}
+				#else /* configUSE_QUEUE_SETS */
+				{
+					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+					{
+						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+						{
+							/* The task waiting has a higher priority so record that a
+							context	switch is required. */
+							if( pxHigherPriorityTaskWoken != NULL )
+							{
+								*pxHigherPriorityTaskWoken = pdTRUE;
+							}
+							else
+							{
+								mtCOVERAGE_TEST_MARKER();
+							}
+						}
+						else
+						{
+							mtCOVERAGE_TEST_MARKER();
+						}
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				#endif /* configUSE_QUEUE_SETS */
+			}
+			else
+			{
+				/* Increment the lock count so the task that unlocks the queue
+				knows that data was posted while it was locked. */
+				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
+			}
+
+			xReturn = pdPASS;
+		}
+		else
+		{
+			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
+			xReturn = errQUEUE_FULL;
+		}
+	}
+	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueueGiveFromISR( QueueHandle_t xQueue, BaseType_t * const pxHigherPriorityTaskWoken )
+{
+BaseType_t xReturn;
+UBaseType_t uxSavedInterruptStatus;
+Queue_t * const pxQueue = xQueue;
+
+	/* Similar to xQueueGenericSendFromISR() but used with semaphores where the
+	item size is 0.  Don't directly wake a task that was blocked on a queue
+	read, instead return a flag to say whether a context switch is required or
+	not (i.e. has a task with a higher priority than us been woken by this
+	post). */
+
+	configASSERT( pxQueue );
+
+	/* xQueueGenericSendFromISR() should be used instead of xQueueGiveFromISR()
+	if the item size is not 0. */
+	configASSERT( pxQueue->uxItemSize == 0 );
+
+	/* Normally a mutex would not be given from an interrupt, especially if
+	there is a mutex holder, as priority inheritance makes no sense for an
+	interrupts, only tasks. */
+	configASSERT( !( ( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX ) && ( pxQueue->u.xSemaphore.xMutexHolder != NULL ) ) );
+
+	/* RTOS ports that support interrupt nesting have the concept of a maximum
+	system call (or maximum API call) interrupt priority.  Interrupts that are
+	above the maximum system call priority are kept permanently enabled, even
+	when the RTOS kernel is in a critical section, but cannot make any calls to
+	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
+	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
+	failure if a FreeRTOS API function is called from an interrupt that has been
+	assigned a priority above the configured maximum system call priority.
+	Only FreeRTOS functions that end in FromISR can be called from interrupts
+	that have been assigned a priority at or (logically) below the maximum
+	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
+	safe API to ensure interrupt entry is as fast and as simple as possible.
+	More information (albeit Cortex-M specific) is provided on the following
+	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
+	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+
+	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+	{
+		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
+
+		/* When the queue is used to implement a semaphore no data is ever
+		moved through the queue but it is still valid to see if the queue 'has
+		space'. */
+		if( uxMessagesWaiting < pxQueue->uxLength )
+		{
+			const int8_t cTxLock = pxQueue->cTxLock;
+
+			traceQUEUE_SEND_FROM_ISR( pxQueue );
+
+			/* A task can only have an inherited priority if it is a mutex
+			holder - and if there is a mutex holder then the mutex cannot be
+			given from an ISR.  As this is the ISR version of the function it
+			can be assumed there is no mutex holder and no need to determine if
+			priority disinheritance is needed.  Simply increase the count of
+			messages (semaphores) available. */
+			pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
+
+			/* The event list is not altered if the queue is locked.  This will
+			be done when the queue is unlocked later. */
+			if( cTxLock == queueUNLOCKED )
+			{
+				#if ( configUSE_QUEUE_SETS == 1 )
+				{
+					if( pxQueue->pxQueueSetContainer != NULL )
+					{
+						if( prvNotifyQueueSetContainer( pxQueue, queueSEND_TO_BACK ) != pdFALSE )
+						{
+							/* The semaphore is a member of a queue set, and
+							posting	to the queue set caused a higher priority
+							task to	unblock.  A context switch is required. */
+							if( pxHigherPriorityTaskWoken != NULL )
+							{
+								*pxHigherPriorityTaskWoken = pdTRUE;
+							}
+							else
+							{
+								mtCOVERAGE_TEST_MARKER();
+							}
+						}
+						else
+						{
+							mtCOVERAGE_TEST_MARKER();
+						}
+					}
+					else
+					{
+						if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+						{
+							if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+							{
+								/* The task waiting has a higher priority so
+								record that a context switch is required. */
+								if( pxHigherPriorityTaskWoken != NULL )
+								{
+									*pxHigherPriorityTaskWoken = pdTRUE;
+								}
+								else
+								{
+									mtCOVERAGE_TEST_MARKER();
+								}
+							}
+							else
+							{
+								mtCOVERAGE_TEST_MARKER();
+							}
+						}
+						else
+						{
+							mtCOVERAGE_TEST_MARKER();
+						}
+					}
+				}
+				#else /* configUSE_QUEUE_SETS */
+				{
+					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+					{
+						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+						{
+							/* The task waiting has a higher priority so record that a
+							context	switch is required. */
+							if( pxHigherPriorityTaskWoken != NULL )
+							{
+								*pxHigherPriorityTaskWoken = pdTRUE;
+							}
+							else
+							{
+								mtCOVERAGE_TEST_MARKER();
+							}
+						}
+						else
+						{
+							mtCOVERAGE_TEST_MARKER();
+						}
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				#endif /* configUSE_QUEUE_SETS */
+			}
+			else
+			{
+				/* Increment the lock count so the task that unlocks the queue
+				knows that data was posted while it was locked. */
+				pxQueue->cTxLock = ( int8_t ) ( cTxLock + 1 );
+			}
+
+			xReturn = pdPASS;
+		}
+		else
+		{
+			traceQUEUE_SEND_FROM_ISR_FAILED( pxQueue );
+			xReturn = errQUEUE_FULL;
+		}
+	}
+	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueueReceive( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait )
+{
+BaseType_t xEntryTimeSet = pdFALSE;
+TimeOut_t xTimeOut;
+Queue_t * const pxQueue = xQueue;
+
+	/* Check the pointer is not NULL. */
+	configASSERT( ( pxQueue ) );
+
+	/* The buffer into which data is received can only be NULL if the data size
+	is zero (so no data is copied into the buffer. */
+	configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) );
+
+	/* Cannot block if the scheduler is suspended. */
+	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
+	{
+		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
+	}
+	#endif
+
+
+	/*lint -save -e904  This function relaxes the coding standard somewhat to
+	allow return statements within the function itself.  This is done in the
+	interest of execution time efficiency. */
+	for( ;; )
+	{
+		taskENTER_CRITICAL();
+		{
+			const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
+
+			/* Is there data in the queue now?  To be running the calling task
+			must be the highest priority task wanting to access the queue. */
+			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
+			{
+				/* Data available, remove one item. */
+				prvCopyDataFromQueue( pxQueue, pvBuffer );
+				traceQUEUE_RECEIVE( pxQueue );
+				pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
+
+				/* There is now space in the queue, were any tasks waiting to
+				post to the queue?  If so, unblock the highest priority waiting
+				task. */
+				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+				{
+					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+					{
+						queueYIELD_IF_USING_PREEMPTION();
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+
+				taskEXIT_CRITICAL();
+				return pdPASS;
+			}
+			else
+			{
+				if( xTicksToWait == ( TickType_t ) 0 )
+				{
+					/* The queue was empty and no block time is specified (or
+					the block time has expired) so leave now. */
+					taskEXIT_CRITICAL();
+					traceQUEUE_RECEIVE_FAILED( pxQueue );
+					return errQUEUE_EMPTY;
+				}
+				else if( xEntryTimeSet == pdFALSE )
+				{
+					/* The queue was empty and a block time was specified so
+					configure the timeout structure. */
+					vTaskInternalSetTimeOutState( &xTimeOut );
+					xEntryTimeSet = pdTRUE;
+				}
+				else
+				{
+					/* Entry time was already set. */
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+		}
+		taskEXIT_CRITICAL();
+
+		/* Interrupts and other tasks can send to and receive from the queue
+		now the critical section has been exited. */
+
+		vTaskSuspendAll();
+		prvLockQueue( pxQueue );
+
+		/* Update the timeout state to see if it has expired yet. */
+		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
+		{
+			/* The timeout has not expired.  If the queue is still empty place
+			the task on the list of tasks waiting to receive from the queue. */
+			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
+			{
+				traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
+				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
+				prvUnlockQueue( pxQueue );
+				if( xTaskResumeAll() == pdFALSE )
+				{
+					portYIELD_WITHIN_API();
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				/* The queue contains data again.  Loop back to try and read the
+				data. */
+				prvUnlockQueue( pxQueue );
+				( void ) xTaskResumeAll();
+			}
+		}
+		else
+		{
+			/* Timed out.  If there is no data in the queue exit, otherwise loop
+			back and attempt to read the data. */
+			prvUnlockQueue( pxQueue );
+			( void ) xTaskResumeAll();
+
+			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
+			{
+				traceQUEUE_RECEIVE_FAILED( pxQueue );
+				return errQUEUE_EMPTY;
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+	} /*lint -restore */
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueueSemaphoreTake( QueueHandle_t xQueue, TickType_t xTicksToWait )
+{
+BaseType_t xEntryTimeSet = pdFALSE;
+TimeOut_t xTimeOut;
+Queue_t * const pxQueue = xQueue;
+
+#if( configUSE_MUTEXES == 1 )
+	BaseType_t xInheritanceOccurred = pdFALSE;
+#endif
+
+	/* Check the queue pointer is not NULL. */
+	configASSERT( ( pxQueue ) );
+
+	/* Check this really is a semaphore, in which case the item size will be
+	0. */
+	configASSERT( pxQueue->uxItemSize == 0 );
+
+	/* Cannot block if the scheduler is suspended. */
+	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
+	{
+		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
+	}
+	#endif
+
+
+	/*lint -save -e904 This function relaxes the coding standard somewhat to allow return
+	statements within the function itself.  This is done in the interest
+	of execution time efficiency. */
+	for( ;; )
+	{
+		taskENTER_CRITICAL();
+		{
+			/* Semaphores are queues with an item size of 0, and where the
+			number of messages in the queue is the semaphore's count value. */
+			const UBaseType_t uxSemaphoreCount = pxQueue->uxMessagesWaiting;
+
+			/* Is there data in the queue now?  To be running the calling task
+			must be the highest priority task wanting to access the queue. */
+			if( uxSemaphoreCount > ( UBaseType_t ) 0 )
+			{
+				traceQUEUE_RECEIVE( pxQueue );
+
+				/* Semaphores are queues with a data size of zero and where the
+				messages waiting is the semaphore's count.  Reduce the count. */
+				pxQueue->uxMessagesWaiting = uxSemaphoreCount - ( UBaseType_t ) 1;
+
+				#if ( configUSE_MUTEXES == 1 )
+				{
+					if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
+					{
+						/* Record the information required to implement
+						priority inheritance should it become necessary. */
+						pxQueue->u.xSemaphore.xMutexHolder = pvTaskIncrementMutexHeldCount();
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				#endif /* configUSE_MUTEXES */
+
+				/* Check to see if other tasks are blocked waiting to give the
+				semaphore, and if so, unblock the highest priority such task. */
+				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+				{
+					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+					{
+						queueYIELD_IF_USING_PREEMPTION();
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+
+				taskEXIT_CRITICAL();
+				return pdPASS;
+			}
+			else
+			{
+				if( xTicksToWait == ( TickType_t ) 0 )
+				{
+					/* For inheritance to have occurred there must have been an
+					initial timeout, and an adjusted timeout cannot become 0, as
+					if it were 0 the function would have exited. */
+					#if( configUSE_MUTEXES == 1 )
+					{
+						configASSERT( xInheritanceOccurred == pdFALSE );
+					}
+					#endif /* configUSE_MUTEXES */
+
+					/* The semaphore count was 0 and no block time is specified
+					(or the block time has expired) so exit now. */
+					taskEXIT_CRITICAL();
+					traceQUEUE_RECEIVE_FAILED( pxQueue );
+					return errQUEUE_EMPTY;
+				}
+				else if( xEntryTimeSet == pdFALSE )
+				{
+					/* The semaphore count was 0 and a block time was specified
+					so configure the timeout structure ready to block. */
+					vTaskInternalSetTimeOutState( &xTimeOut );
+					xEntryTimeSet = pdTRUE;
+				}
+				else
+				{
+					/* Entry time was already set. */
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+		}
+		taskEXIT_CRITICAL();
+
+		/* Interrupts and other tasks can give to and take from the semaphore
+		now the critical section has been exited. */
+
+		vTaskSuspendAll();
+		prvLockQueue( pxQueue );
+
+		/* Update the timeout state to see if it has expired yet. */
+		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
+		{
+			/* A block time is specified and not expired.  If the semaphore
+			count is 0 then enter the Blocked state to wait for a semaphore to
+			become available.  As semaphores are implemented with queues the
+			queue being empty is equivalent to the semaphore count being 0. */
+			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
+			{
+				traceBLOCKING_ON_QUEUE_RECEIVE( pxQueue );
+
+				#if ( configUSE_MUTEXES == 1 )
+				{
+					if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
+					{
+						taskENTER_CRITICAL();
+						{
+							xInheritanceOccurred = xTaskPriorityInherit( pxQueue->u.xSemaphore.xMutexHolder );
+						}
+						taskEXIT_CRITICAL();
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				#endif
+
+				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
+				prvUnlockQueue( pxQueue );
+				if( xTaskResumeAll() == pdFALSE )
+				{
+					portYIELD_WITHIN_API();
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				/* There was no timeout and the semaphore count was not 0, so
+				attempt to take the semaphore again. */
+				prvUnlockQueue( pxQueue );
+				( void ) xTaskResumeAll();
+			}
+		}
+		else
+		{
+			/* Timed out. */
+			prvUnlockQueue( pxQueue );
+			( void ) xTaskResumeAll();
+
+			/* If the semaphore count is 0 exit now as the timeout has
+			expired.  Otherwise return to attempt to take the semaphore that is
+			known to be available.  As semaphores are implemented by queues the
+			queue being empty is equivalent to the semaphore count being 0. */
+			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
+			{
+				#if ( configUSE_MUTEXES == 1 )
+				{
+					/* xInheritanceOccurred could only have be set if
+					pxQueue->uxQueueType == queueQUEUE_IS_MUTEX so no need to
+					test the mutex type again to check it is actually a mutex. */
+					if( xInheritanceOccurred != pdFALSE )
+					{
+						taskENTER_CRITICAL();
+						{
+							UBaseType_t uxHighestWaitingPriority;
+
+							/* This task blocking on the mutex caused another
+							task to inherit this task's priority.  Now this task
+							has timed out the priority should be disinherited
+							again, but only as low as the next highest priority
+							task that is waiting for the same mutex. */
+							uxHighestWaitingPriority = prvGetDisinheritPriorityAfterTimeout( pxQueue );
+							vTaskPriorityDisinheritAfterTimeout( pxQueue->u.xSemaphore.xMutexHolder, uxHighestWaitingPriority );
+						}
+						taskEXIT_CRITICAL();
+					}
+				}
+				#endif /* configUSE_MUTEXES */
+
+				traceQUEUE_RECEIVE_FAILED( pxQueue );
+				return errQUEUE_EMPTY;
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+	} /*lint -restore */
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueuePeek( QueueHandle_t xQueue, void * const pvBuffer, TickType_t xTicksToWait )
+{
+BaseType_t xEntryTimeSet = pdFALSE;
+TimeOut_t xTimeOut;
+int8_t *pcOriginalReadPosition;
+Queue_t * const pxQueue = xQueue;
+
+	/* Check the pointer is not NULL. */
+	configASSERT( ( pxQueue ) );
+
+	/* The buffer into which data is received can only be NULL if the data size
+	is zero (so no data is copied into the buffer. */
+	configASSERT( !( ( ( pvBuffer ) == NULL ) && ( ( pxQueue )->uxItemSize != ( UBaseType_t ) 0U ) ) );
+
+	/* Cannot block if the scheduler is suspended. */
+	#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
+	{
+		configASSERT( !( ( xTaskGetSchedulerState() == taskSCHEDULER_SUSPENDED ) && ( xTicksToWait != 0 ) ) );
+	}
+	#endif
+
+
+	/*lint -save -e904  This function relaxes the coding standard somewhat to
+	allow return statements within the function itself.  This is done in the
+	interest of execution time efficiency. */
+	for( ;; )
+	{
+		taskENTER_CRITICAL();
+		{
+			const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
+
+			/* Is there data in the queue now?  To be running the calling task
+			must be the highest priority task wanting to access the queue. */
+			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
+			{
+				/* Remember the read position so it can be reset after the data
+				is read from the queue as this function is only peeking the
+				data, not removing it. */
+				pcOriginalReadPosition = pxQueue->u.xQueue.pcReadFrom;
+
+				prvCopyDataFromQueue( pxQueue, pvBuffer );
+				traceQUEUE_PEEK( pxQueue );
+
+				/* The data is not being removed, so reset the read pointer. */
+				pxQueue->u.xQueue.pcReadFrom = pcOriginalReadPosition;
+
+				/* The data is being left in the queue, so see if there are
+				any other tasks waiting for the data. */
+				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+				{
+					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+					{
+						/* The task waiting has a higher priority than this task. */
+						queueYIELD_IF_USING_PREEMPTION();
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+
+				taskEXIT_CRITICAL();
+				return pdPASS;
+			}
+			else
+			{
+				if( xTicksToWait == ( TickType_t ) 0 )
+				{
+					/* The queue was empty and no block time is specified (or
+					the block time has expired) so leave now. */
+					taskEXIT_CRITICAL();
+					traceQUEUE_PEEK_FAILED( pxQueue );
+					return errQUEUE_EMPTY;
+				}
+				else if( xEntryTimeSet == pdFALSE )
+				{
+					/* The queue was empty and a block time was specified so
+					configure the timeout structure ready to enter the blocked
+					state. */
+					vTaskInternalSetTimeOutState( &xTimeOut );
+					xEntryTimeSet = pdTRUE;
+				}
+				else
+				{
+					/* Entry time was already set. */
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+		}
+		taskEXIT_CRITICAL();
+
+		/* Interrupts and other tasks can send to and receive from the queue
+		now the critical section has been exited. */
+
+		vTaskSuspendAll();
+		prvLockQueue( pxQueue );
+
+		/* Update the timeout state to see if it has expired yet. */
+		if( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE )
+		{
+			/* Timeout has not expired yet, check to see if there is data in the
+			queue now, and if not enter the Blocked state to wait for data. */
+			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
+			{
+				traceBLOCKING_ON_QUEUE_PEEK( pxQueue );
+				vTaskPlaceOnEventList( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait );
+				prvUnlockQueue( pxQueue );
+				if( xTaskResumeAll() == pdFALSE )
+				{
+					portYIELD_WITHIN_API();
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				/* There is data in the queue now, so don't enter the blocked
+				state, instead return to try and obtain the data. */
+				prvUnlockQueue( pxQueue );
+				( void ) xTaskResumeAll();
+			}
+		}
+		else
+		{
+			/* The timeout has expired.  If there is still no data in the queue
+			exit, otherwise go back and try to read the data again. */
+			prvUnlockQueue( pxQueue );
+			( void ) xTaskResumeAll();
+
+			if( prvIsQueueEmpty( pxQueue ) != pdFALSE )
+			{
+				traceQUEUE_PEEK_FAILED( pxQueue );
+				return errQUEUE_EMPTY;
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+	} /*lint -restore */
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueueReceiveFromISR( QueueHandle_t xQueue, void * const pvBuffer, BaseType_t * const pxHigherPriorityTaskWoken )
+{
+BaseType_t xReturn;
+UBaseType_t uxSavedInterruptStatus;
+Queue_t * const pxQueue = xQueue;
+
+	configASSERT( pxQueue );
+	configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
+
+	/* RTOS ports that support interrupt nesting have the concept of a maximum
+	system call (or maximum API call) interrupt priority.  Interrupts that are
+	above the maximum system call priority are kept permanently enabled, even
+	when the RTOS kernel is in a critical section, but cannot make any calls to
+	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
+	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
+	failure if a FreeRTOS API function is called from an interrupt that has been
+	assigned a priority above the configured maximum system call priority.
+	Only FreeRTOS functions that end in FromISR can be called from interrupts
+	that have been assigned a priority at or (logically) below the maximum
+	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
+	safe API to ensure interrupt entry is as fast and as simple as possible.
+	More information (albeit Cortex-M specific) is provided on the following
+	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
+	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+
+	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+	{
+		const UBaseType_t uxMessagesWaiting = pxQueue->uxMessagesWaiting;
+
+		/* Cannot block in an ISR, so check there is data available. */
+		if( uxMessagesWaiting > ( UBaseType_t ) 0 )
+		{
+			const int8_t cRxLock = pxQueue->cRxLock;
+
+			traceQUEUE_RECEIVE_FROM_ISR( pxQueue );
+
+			prvCopyDataFromQueue( pxQueue, pvBuffer );
+			pxQueue->uxMessagesWaiting = uxMessagesWaiting - ( UBaseType_t ) 1;
+
+			/* If the queue is locked the event list will not be modified.
+			Instead update the lock count so the task that unlocks the queue
+			will know that an ISR has removed data while the queue was
+			locked. */
+			if( cRxLock == queueUNLOCKED )
+			{
+				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+				{
+					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+					{
+						/* The task waiting has a higher priority than us so
+						force a context switch. */
+						if( pxHigherPriorityTaskWoken != NULL )
+						{
+							*pxHigherPriorityTaskWoken = pdTRUE;
+						}
+						else
+						{
+							mtCOVERAGE_TEST_MARKER();
+						}
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				/* Increment the lock count so the task that unlocks the queue
+				knows that data was removed while it was locked. */
+				pxQueue->cRxLock = ( int8_t ) ( cRxLock + 1 );
+			}
+
+			xReturn = pdPASS;
+		}
+		else
+		{
+			xReturn = pdFAIL;
+			traceQUEUE_RECEIVE_FROM_ISR_FAILED( pxQueue );
+		}
+	}
+	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueuePeekFromISR( QueueHandle_t xQueue,  void * const pvBuffer )
+{
+BaseType_t xReturn;
+UBaseType_t uxSavedInterruptStatus;
+int8_t *pcOriginalReadPosition;
+Queue_t * const pxQueue = xQueue;
+
+	configASSERT( pxQueue );
+	configASSERT( !( ( pvBuffer == NULL ) && ( pxQueue->uxItemSize != ( UBaseType_t ) 0U ) ) );
+	configASSERT( pxQueue->uxItemSize != 0 ); /* Can't peek a semaphore. */
+
+	/* RTOS ports that support interrupt nesting have the concept of a maximum
+	system call (or maximum API call) interrupt priority.  Interrupts that are
+	above the maximum system call priority are kept permanently enabled, even
+	when the RTOS kernel is in a critical section, but cannot make any calls to
+	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
+	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
+	failure if a FreeRTOS API function is called from an interrupt that has been
+	assigned a priority above the configured maximum system call priority.
+	Only FreeRTOS functions that end in FromISR can be called from interrupts
+	that have been assigned a priority at or (logically) below the maximum
+	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
+	safe API to ensure interrupt entry is as fast and as simple as possible.
+	More information (albeit Cortex-M specific) is provided on the following
+	link: http://www.freertos.org/RTOS-Cortex-M3-M4.html */
+	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+
+	uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+	{
+		/* Cannot block in an ISR, so check there is data available. */
+		if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )
+		{
+			traceQUEUE_PEEK_FROM_ISR( pxQueue );
+
+			/* Remember the read position so it can be reset as nothing is
+			actually being removed from the queue. */
+			pcOriginalReadPosition = pxQueue->u.xQueue.pcReadFrom;
+			prvCopyDataFromQueue( pxQueue, pvBuffer );
+			pxQueue->u.xQueue.pcReadFrom = pcOriginalReadPosition;
+
+			xReturn = pdPASS;
+		}
+		else
+		{
+			xReturn = pdFAIL;
+			traceQUEUE_PEEK_FROM_ISR_FAILED( pxQueue );
+		}
+	}
+	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+UBaseType_t uxQueueMessagesWaiting( const QueueHandle_t xQueue )
+{
+UBaseType_t uxReturn;
+
+	configASSERT( xQueue );
+
+	taskENTER_CRITICAL();
+	{
+		uxReturn = ( ( Queue_t * ) xQueue )->uxMessagesWaiting;
+	}
+	taskEXIT_CRITICAL();
+
+	return uxReturn;
+} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
+/*-----------------------------------------------------------*/
+
+UBaseType_t uxQueueSpacesAvailable( const QueueHandle_t xQueue )
+{
+UBaseType_t uxReturn;
+Queue_t * const pxQueue = xQueue;
+
+	configASSERT( pxQueue );
+
+	taskENTER_CRITICAL();
+	{
+		uxReturn = pxQueue->uxLength - pxQueue->uxMessagesWaiting;
+	}
+	taskEXIT_CRITICAL();
+
+	return uxReturn;
+} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
+/*-----------------------------------------------------------*/
+
+UBaseType_t uxQueueMessagesWaitingFromISR( const QueueHandle_t xQueue )
+{
+UBaseType_t uxReturn;
+Queue_t * const pxQueue = xQueue;
+
+	configASSERT( pxQueue );
+	uxReturn = pxQueue->uxMessagesWaiting;
+
+	return uxReturn;
+} /*lint !e818 Pointer cannot be declared const as xQueue is a typedef not pointer. */
+/*-----------------------------------------------------------*/
+
+void vQueueDelete( QueueHandle_t xQueue )
+{
+Queue_t * const pxQueue = xQueue;
+
+	configASSERT( pxQueue );
+	traceQUEUE_DELETE( pxQueue );
+
+	#if ( configQUEUE_REGISTRY_SIZE > 0 )
+	{
+		vQueueUnregisterQueue( pxQueue );
+	}
+	#endif
+
+	#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) )
+	{
+		/* The queue can only have been allocated dynamically - free it
+		again. */
+		vPortFree( pxQueue );
+	}
+	#elif( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+	{
+		/* The queue could have been allocated statically or dynamically, so
+		check before attempting to free the memory. */
+		if( pxQueue->ucStaticallyAllocated == ( uint8_t ) pdFALSE )
+		{
+			vPortFree( pxQueue );
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	#else
+	{
+		/* The queue must have been statically allocated, so is not going to be
+		deleted.  Avoid compiler warnings about the unused parameter. */
+		( void ) pxQueue;
+	}
+	#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
+}
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TRACE_FACILITY == 1 )
+
+	UBaseType_t uxQueueGetQueueNumber( QueueHandle_t xQueue )
+	{
+		return ( ( Queue_t * ) xQueue )->uxQueueNumber;
+	}
+
+#endif /* configUSE_TRACE_FACILITY */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TRACE_FACILITY == 1 )
+
+	void vQueueSetQueueNumber( QueueHandle_t xQueue, UBaseType_t uxQueueNumber )
+	{
+		( ( Queue_t * ) xQueue )->uxQueueNumber = uxQueueNumber;
+	}
+
+#endif /* configUSE_TRACE_FACILITY */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TRACE_FACILITY == 1 )
+
+	uint8_t ucQueueGetQueueType( QueueHandle_t xQueue )
+	{
+		return ( ( Queue_t * ) xQueue )->ucQueueType;
+	}
+
+#endif /* configUSE_TRACE_FACILITY */
+/*-----------------------------------------------------------*/
+
+#if( configUSE_MUTEXES == 1 )
+
+	static UBaseType_t prvGetDisinheritPriorityAfterTimeout( const Queue_t * const pxQueue )
+	{
+	UBaseType_t uxHighestPriorityOfWaitingTasks;
+
+		/* If a task waiting for a mutex causes the mutex holder to inherit a
+		priority, but the waiting task times out, then the holder should
+		disinherit the priority - but only down to the highest priority of any
+		other tasks that are waiting for the same mutex.  For this purpose,
+		return the priority of the highest priority task that is waiting for the
+		mutex. */
+		if( listCURRENT_LIST_LENGTH( &( pxQueue->xTasksWaitingToReceive ) ) > 0U )
+		{
+			uxHighestPriorityOfWaitingTasks = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) listGET_ITEM_VALUE_OF_HEAD_ENTRY( &( pxQueue->xTasksWaitingToReceive ) );
+		}
+		else
+		{
+			uxHighestPriorityOfWaitingTasks = tskIDLE_PRIORITY;
+		}
+
+		return uxHighestPriorityOfWaitingTasks;
+	}
+
+#endif /* configUSE_MUTEXES */
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition )
+{
+BaseType_t xReturn = pdFALSE;
+UBaseType_t uxMessagesWaiting;
+
+	/* This function is called from a critical section. */
+
+	uxMessagesWaiting = pxQueue->uxMessagesWaiting;
+
+	if( pxQueue->uxItemSize == ( UBaseType_t ) 0 )
+	{
+		#if ( configUSE_MUTEXES == 1 )
+		{
+			if( pxQueue->uxQueueType == queueQUEUE_IS_MUTEX )
+			{
+				/* The mutex is no longer being held. */
+				xReturn = xTaskPriorityDisinherit( pxQueue->u.xSemaphore.xMutexHolder );
+				pxQueue->u.xSemaphore.xMutexHolder = NULL;
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		#endif /* configUSE_MUTEXES */
+	}
+	else if( xPosition == queueSEND_TO_BACK )
+	{
+		( void ) memcpy( ( void * ) pxQueue->pcWriteTo, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports, plus previous logic ensures a null pointer can only be passed to memcpy() if the copy size is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
+		pxQueue->pcWriteTo += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
+		if( pxQueue->pcWriteTo >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
+		{
+			pxQueue->pcWriteTo = pxQueue->pcHead;
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	else
+	{
+		( void ) memcpy( ( void * ) pxQueue->u.xQueue.pcReadFrom, pvItemToQueue, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e9087 !e418 MISRA exception as the casts are only redundant for some ports.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes.  Assert checks null pointer only used when length is 0. */
+		pxQueue->u.xQueue.pcReadFrom -= pxQueue->uxItemSize;
+		if( pxQueue->u.xQueue.pcReadFrom < pxQueue->pcHead ) /*lint !e946 MISRA exception justified as comparison of pointers is the cleanest solution. */
+		{
+			pxQueue->u.xQueue.pcReadFrom = ( pxQueue->u.xQueue.pcTail - pxQueue->uxItemSize );
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		if( xPosition == queueOVERWRITE )
+		{
+			if( uxMessagesWaiting > ( UBaseType_t ) 0 )
+			{
+				/* An item is not being added but overwritten, so subtract
+				one from the recorded number of items in the queue so when
+				one is added again below the number of recorded items remains
+				correct. */
+				--uxMessagesWaiting;
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+
+	pxQueue->uxMessagesWaiting = uxMessagesWaiting + ( UBaseType_t ) 1;
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer )
+{
+	if( pxQueue->uxItemSize != ( UBaseType_t ) 0 )
+	{
+		pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize; /*lint !e9016 Pointer arithmetic on char types ok, especially in this use case where it is the clearest way of conveying intent. */
+		if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail ) /*lint !e946 MISRA exception justified as use of the relational operator is the cleanest solutions. */
+		{
+			pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+		( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( size_t ) pxQueue->uxItemSize ); /*lint !e961 !e418 !e9087 MISRA exception as the casts are only redundant for some ports.  Also previous logic ensures a null pointer can only be passed to memcpy() when the count is 0.  Cast to void required by function signature and safe as no alignment requirement and copy length specified in bytes. */
+	}
+}
+/*-----------------------------------------------------------*/
+
+static void prvUnlockQueue( Queue_t * const pxQueue )
+{
+	/* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED. */
+
+	/* The lock counts contains the number of extra data items placed or
+	removed from the queue while the queue was locked.  When a queue is
+	locked items can be added or removed, but the event lists cannot be
+	updated. */
+	taskENTER_CRITICAL();
+	{
+		int8_t cTxLock = pxQueue->cTxLock;
+
+		/* See if data was added to the queue while it was locked. */
+		while( cTxLock > queueLOCKED_UNMODIFIED )
+		{
+			/* Data was posted while the queue was locked.  Are any tasks
+			blocked waiting for data to become available? */
+			#if ( configUSE_QUEUE_SETS == 1 )
+			{
+				if( pxQueue->pxQueueSetContainer != NULL )
+				{
+					if( prvNotifyQueueSetContainer( pxQueue, queueSEND_TO_BACK ) != pdFALSE )
+					{
+						/* The queue is a member of a queue set, and posting to
+						the queue set caused a higher priority task to unblock.
+						A context switch is required. */
+						vTaskMissedYield();
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				else
+				{
+					/* Tasks that are removed from the event list will get
+					added to the pending ready list as the scheduler is still
+					suspended. */
+					if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+					{
+						if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+						{
+							/* The task waiting has a higher priority so record that a
+							context	switch is required. */
+							vTaskMissedYield();
+						}
+						else
+						{
+							mtCOVERAGE_TEST_MARKER();
+						}
+					}
+					else
+					{
+						break;
+					}
+				}
+			}
+			#else /* configUSE_QUEUE_SETS */
+			{
+				/* Tasks that are removed from the event list will get added to
+				the pending ready list as the scheduler is still suspended. */
+				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+				{
+					if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+					{
+						/* The task waiting has a higher priority so record that
+						a context switch is required. */
+						vTaskMissedYield();
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				else
+				{
+					break;
+				}
+			}
+			#endif /* configUSE_QUEUE_SETS */
+
+			--cTxLock;
+		}
+
+		pxQueue->cTxLock = queueUNLOCKED;
+	}
+	taskEXIT_CRITICAL();
+
+	/* Do the same for the Rx lock. */
+	taskENTER_CRITICAL();
+	{
+		int8_t cRxLock = pxQueue->cRxLock;
+
+		while( cRxLock > queueLOCKED_UNMODIFIED )
+		{
+			if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+			{
+				if( xTaskRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+				{
+					vTaskMissedYield();
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+
+				--cRxLock;
+			}
+			else
+			{
+				break;
+			}
+		}
+
+		pxQueue->cRxLock = queueUNLOCKED;
+	}
+	taskEXIT_CRITICAL();
+}
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvIsQueueEmpty( const Queue_t *pxQueue )
+{
+BaseType_t xReturn;
+
+	taskENTER_CRITICAL();
+	{
+		if( pxQueue->uxMessagesWaiting == ( UBaseType_t )  0 )
+		{
+			xReturn = pdTRUE;
+		}
+		else
+		{
+			xReturn = pdFALSE;
+		}
+	}
+	taskEXIT_CRITICAL();
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueueIsQueueEmptyFromISR( const QueueHandle_t xQueue )
+{
+BaseType_t xReturn;
+Queue_t * const pxQueue = xQueue;
+
+	configASSERT( pxQueue );
+	if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 )
+	{
+		xReturn = pdTRUE;
+	}
+	else
+	{
+		xReturn = pdFALSE;
+	}
+
+	return xReturn;
+} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvIsQueueFull( const Queue_t *pxQueue )
+{
+BaseType_t xReturn;
+
+	taskENTER_CRITICAL();
+	{
+		if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
+		{
+			xReturn = pdTRUE;
+		}
+		else
+		{
+			xReturn = pdFALSE;
+		}
+	}
+	taskEXIT_CRITICAL();
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xQueueIsQueueFullFromISR( const QueueHandle_t xQueue )
+{
+BaseType_t xReturn;
+Queue_t * const pxQueue = xQueue;
+
+	configASSERT( pxQueue );
+	if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
+	{
+		xReturn = pdTRUE;
+	}
+	else
+	{
+		xReturn = pdFALSE;
+	}
+
+	return xReturn;
+} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_CO_ROUTINES == 1 )
+
+	BaseType_t xQueueCRSend( QueueHandle_t xQueue, const void *pvItemToQueue, TickType_t xTicksToWait )
+	{
+	BaseType_t xReturn;
+	Queue_t * const pxQueue = xQueue;
+
+		/* If the queue is already full we may have to block.  A critical section
+		is required to prevent an interrupt removing something from the queue
+		between the check to see if the queue is full and blocking on the queue. */
+		portDISABLE_INTERRUPTS();
+		{
+			if( prvIsQueueFull( pxQueue ) != pdFALSE )
+			{
+				/* The queue is full - do we want to block or just leave without
+				posting? */
+				if( xTicksToWait > ( TickType_t ) 0 )
+				{
+					/* As this is called from a coroutine we cannot block directly, but
+					return indicating that we need to block. */
+					vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToSend ) );
+					portENABLE_INTERRUPTS();
+					return errQUEUE_BLOCKED;
+				}
+				else
+				{
+					portENABLE_INTERRUPTS();
+					return errQUEUE_FULL;
+				}
+			}
+		}
+		portENABLE_INTERRUPTS();
+
+		portDISABLE_INTERRUPTS();
+		{
+			if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
+			{
+				/* There is room in the queue, copy the data into the queue. */
+				prvCopyDataToQueue( pxQueue, pvItemToQueue, queueSEND_TO_BACK );
+				xReturn = pdPASS;
+
+				/* Were any co-routines waiting for data to become available? */
+				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+				{
+					/* In this instance the co-routine could be placed directly
+					into the ready list as we are within a critical section.
+					Instead the same pending ready list mechanism is used as if
+					the event were caused from within an interrupt. */
+					if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+					{
+						/* The co-routine waiting has a higher priority so record
+						that a yield might be appropriate. */
+						xReturn = errQUEUE_YIELD;
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				xReturn = errQUEUE_FULL;
+			}
+		}
+		portENABLE_INTERRUPTS();
+
+		return xReturn;
+	}
+
+#endif /* configUSE_CO_ROUTINES */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_CO_ROUTINES == 1 )
+
+	BaseType_t xQueueCRReceive( QueueHandle_t xQueue, void *pvBuffer, TickType_t xTicksToWait )
+	{
+	BaseType_t xReturn;
+	Queue_t * const pxQueue = xQueue;
+
+		/* If the queue is already empty we may have to block.  A critical section
+		is required to prevent an interrupt adding something to the queue
+		between the check to see if the queue is empty and blocking on the queue. */
+		portDISABLE_INTERRUPTS();
+		{
+			if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0 )
+			{
+				/* There are no messages in the queue, do we want to block or just
+				leave with nothing? */
+				if( xTicksToWait > ( TickType_t ) 0 )
+				{
+					/* As this is a co-routine we cannot block directly, but return
+					indicating that we need to block. */
+					vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToReceive ) );
+					portENABLE_INTERRUPTS();
+					return errQUEUE_BLOCKED;
+				}
+				else
+				{
+					portENABLE_INTERRUPTS();
+					return errQUEUE_FULL;
+				}
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		portENABLE_INTERRUPTS();
+
+		portDISABLE_INTERRUPTS();
+		{
+			if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )
+			{
+				/* Data is available from the queue. */
+				pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize;
+				if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail )
+				{
+					pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+				--( pxQueue->uxMessagesWaiting );
+				( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( unsigned ) pxQueue->uxItemSize );
+
+				xReturn = pdPASS;
+
+				/* Were any co-routines waiting for space to become available? */
+				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+				{
+					/* In this instance the co-routine could be placed directly
+					into the ready list as we are within a critical section.
+					Instead the same pending ready list mechanism is used as if
+					the event were caused from within an interrupt. */
+					if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+					{
+						xReturn = errQUEUE_YIELD;
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				xReturn = pdFAIL;
+			}
+		}
+		portENABLE_INTERRUPTS();
+
+		return xReturn;
+	}
+
+#endif /* configUSE_CO_ROUTINES */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_CO_ROUTINES == 1 )
+
+	BaseType_t xQueueCRSendFromISR( QueueHandle_t xQueue, const void *pvItemToQueue, BaseType_t xCoRoutinePreviouslyWoken )
+	{
+	Queue_t * const pxQueue = xQueue;
+
+		/* Cannot block within an ISR so if there is no space on the queue then
+		exit without doing anything. */
+		if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
+		{
+			prvCopyDataToQueue( pxQueue, pvItemToQueue, queueSEND_TO_BACK );
+
+			/* We only want to wake one co-routine per ISR, so check that a
+			co-routine has not already been woken. */
+			if( xCoRoutinePreviouslyWoken == pdFALSE )
+			{
+				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) == pdFALSE )
+				{
+					if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
+					{
+						return pdTRUE;
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		return xCoRoutinePreviouslyWoken;
+	}
+
+#endif /* configUSE_CO_ROUTINES */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_CO_ROUTINES == 1 )
+
+	BaseType_t xQueueCRReceiveFromISR( QueueHandle_t xQueue, void *pvBuffer, BaseType_t *pxCoRoutineWoken )
+	{
+	BaseType_t xReturn;
+	Queue_t * const pxQueue = xQueue;
+
+		/* We cannot block from an ISR, so check there is data available. If
+		not then just leave without doing anything. */
+		if( pxQueue->uxMessagesWaiting > ( UBaseType_t ) 0 )
+		{
+			/* Copy the data from the queue. */
+			pxQueue->u.xQueue.pcReadFrom += pxQueue->uxItemSize;
+			if( pxQueue->u.xQueue.pcReadFrom >= pxQueue->u.xQueue.pcTail )
+			{
+				pxQueue->u.xQueue.pcReadFrom = pxQueue->pcHead;
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+			--( pxQueue->uxMessagesWaiting );
+			( void ) memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->u.xQueue.pcReadFrom, ( unsigned ) pxQueue->uxItemSize );
+
+			if( ( *pxCoRoutineWoken ) == pdFALSE )
+			{
+				if( listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) == pdFALSE )
+				{
+					if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
+					{
+						*pxCoRoutineWoken = pdTRUE;
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+
+			xReturn = pdPASS;
+		}
+		else
+		{
+			xReturn = pdFAIL;
+		}
+
+		return xReturn;
+	}
+
+#endif /* configUSE_CO_ROUTINES */
+/*-----------------------------------------------------------*/
+
+#if ( configQUEUE_REGISTRY_SIZE > 0 )
+
+	void vQueueAddToRegistry( QueueHandle_t xQueue, const char *pcQueueName ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+	{
+	UBaseType_t ux;
+
+		/* See if there is an empty space in the registry.  A NULL name denotes
+		a free slot. */
+		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
+		{
+			if( xQueueRegistry[ ux ].pcQueueName == NULL )
+			{
+				/* Store the information on this queue. */
+				xQueueRegistry[ ux ].pcQueueName = pcQueueName;
+				xQueueRegistry[ ux ].xHandle = xQueue;
+
+				traceQUEUE_REGISTRY_ADD( xQueue, pcQueueName );
+				break;
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+	}
+
+#endif /* configQUEUE_REGISTRY_SIZE */
+/*-----------------------------------------------------------*/
+
+#if ( configQUEUE_REGISTRY_SIZE > 0 )
+
+	const char *pcQueueGetName( QueueHandle_t xQueue ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+	{
+	UBaseType_t ux;
+	const char *pcReturn = NULL; /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+
+		/* Note there is nothing here to protect against another task adding or
+		removing entries from the registry while it is being searched. */
+		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
+		{
+			if( xQueueRegistry[ ux ].xHandle == xQueue )
+			{
+				pcReturn = xQueueRegistry[ ux ].pcQueueName;
+				break;
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+
+		return pcReturn;
+	} /*lint !e818 xQueue cannot be a pointer to const because it is a typedef. */
+
+#endif /* configQUEUE_REGISTRY_SIZE */
+/*-----------------------------------------------------------*/
+
+#if ( configQUEUE_REGISTRY_SIZE > 0 )
+
+	void vQueueUnregisterQueue( QueueHandle_t xQueue )
+	{
+	UBaseType_t ux;
+
+		/* See if the handle of the queue being unregistered in actually in the
+		registry. */
+		for( ux = ( UBaseType_t ) 0U; ux < ( UBaseType_t ) configQUEUE_REGISTRY_SIZE; ux++ )
+		{
+			if( xQueueRegistry[ ux ].xHandle == xQueue )
+			{
+				/* Set the name to NULL to show that this slot if free again. */
+				xQueueRegistry[ ux ].pcQueueName = NULL;
+
+				/* Set the handle to NULL to ensure the same queue handle cannot
+				appear in the registry twice if it is added, removed, then
+				added again. */
+				xQueueRegistry[ ux ].xHandle = ( QueueHandle_t ) 0;
+				break;
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+
+	} /*lint !e818 xQueue could not be pointer to const because it is a typedef. */
+
+#endif /* configQUEUE_REGISTRY_SIZE */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TIMERS == 1 )
+
+	void vQueueWaitForMessageRestricted( QueueHandle_t xQueue, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
+	{
+	Queue_t * const pxQueue = xQueue;
+
+		/* This function should not be called by application code hence the
+		'Restricted' in its name.  It is not part of the public API.  It is
+		designed for use by kernel code, and has special calling requirements.
+		It can result in vListInsert() being called on a list that can only
+		possibly ever have one item in it, so the list will be fast, but even
+		so it should be called with the scheduler locked and not from a critical
+		section. */
+
+		/* Only do anything if there are no messages in the queue.  This function
+		will not actually cause the task to block, just place it on a blocked
+		list.  It will not block until the scheduler is unlocked - at which
+		time a yield will be performed.  If an item is added to the queue while
+		the queue is locked, and the calling task blocks on the queue, then the
+		calling task will be immediately unblocked when the queue is unlocked. */
+		prvLockQueue( pxQueue );
+		if( pxQueue->uxMessagesWaiting == ( UBaseType_t ) 0U )
+		{
+			/* There is nothing in the queue, block for the specified period. */
+			vTaskPlaceOnEventListRestricted( &( pxQueue->xTasksWaitingToReceive ), xTicksToWait, xWaitIndefinitely );
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+		prvUnlockQueue( pxQueue );
+	}
+
+#endif /* configUSE_TIMERS */
+/*-----------------------------------------------------------*/
+
+#if( ( configUSE_QUEUE_SETS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+
+	QueueSetHandle_t xQueueCreateSet( const UBaseType_t uxEventQueueLength )
+	{
+	QueueSetHandle_t pxQueue;
+
+		pxQueue = xQueueGenericCreate( uxEventQueueLength, ( UBaseType_t ) sizeof( Queue_t * ), queueQUEUE_TYPE_SET );
+
+		return pxQueue;
+	}
+
+#endif /* configUSE_QUEUE_SETS */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_QUEUE_SETS == 1 )
+
+	BaseType_t xQueueAddToSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )
+	{
+	BaseType_t xReturn;
+
+		taskENTER_CRITICAL();
+		{
+			if( ( ( Queue_t * ) xQueueOrSemaphore )->pxQueueSetContainer != NULL )
+			{
+				/* Cannot add a queue/semaphore to more than one queue set. */
+				xReturn = pdFAIL;
+			}
+			else if( ( ( Queue_t * ) xQueueOrSemaphore )->uxMessagesWaiting != ( UBaseType_t ) 0 )
+			{
+				/* Cannot add a queue/semaphore to a queue set if there are already
+				items in the queue/semaphore. */
+				xReturn = pdFAIL;
+			}
+			else
+			{
+				( ( Queue_t * ) xQueueOrSemaphore )->pxQueueSetContainer = xQueueSet;
+				xReturn = pdPASS;
+			}
+		}
+		taskEXIT_CRITICAL();
+
+		return xReturn;
+	}
+
+#endif /* configUSE_QUEUE_SETS */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_QUEUE_SETS == 1 )
+
+	BaseType_t xQueueRemoveFromSet( QueueSetMemberHandle_t xQueueOrSemaphore, QueueSetHandle_t xQueueSet )
+	{
+	BaseType_t xReturn;
+	Queue_t * const pxQueueOrSemaphore = ( Queue_t * ) xQueueOrSemaphore;
+
+		if( pxQueueOrSemaphore->pxQueueSetContainer != xQueueSet )
+		{
+			/* The queue was not a member of the set. */
+			xReturn = pdFAIL;
+		}
+		else if( pxQueueOrSemaphore->uxMessagesWaiting != ( UBaseType_t ) 0 )
+		{
+			/* It is dangerous to remove a queue from a set when the queue is
+			not empty because the queue set will still hold pending events for
+			the queue. */
+			xReturn = pdFAIL;
+		}
+		else
+		{
+			taskENTER_CRITICAL();
+			{
+				/* The queue is no longer contained in the set. */
+				pxQueueOrSemaphore->pxQueueSetContainer = NULL;
+			}
+			taskEXIT_CRITICAL();
+			xReturn = pdPASS;
+		}
+
+		return xReturn;
+	} /*lint !e818 xQueueSet could not be declared as pointing to const as it is a typedef. */
+
+#endif /* configUSE_QUEUE_SETS */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_QUEUE_SETS == 1 )
+
+	QueueSetMemberHandle_t xQueueSelectFromSet( QueueSetHandle_t xQueueSet, TickType_t const xTicksToWait )
+	{
+	QueueSetMemberHandle_t xReturn = NULL;
+
+		( void ) xQueueReceive( ( QueueHandle_t ) xQueueSet, &xReturn, xTicksToWait ); /*lint !e961 Casting from one typedef to another is not redundant. */
+		return xReturn;
+	}
+
+#endif /* configUSE_QUEUE_SETS */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_QUEUE_SETS == 1 )
+
+	QueueSetMemberHandle_t xQueueSelectFromSetFromISR( QueueSetHandle_t xQueueSet )
+	{
+	QueueSetMemberHandle_t xReturn = NULL;
+
+		( void ) xQueueReceiveFromISR( ( QueueHandle_t ) xQueueSet, &xReturn, NULL ); /*lint !e961 Casting from one typedef to another is not redundant. */
+		return xReturn;
+	}
+
+#endif /* configUSE_QUEUE_SETS */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_QUEUE_SETS == 1 )
+
+	static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue, const BaseType_t xCopyPosition )
+	{
+	Queue_t *pxQueueSetContainer = pxQueue->pxQueueSetContainer;
+	BaseType_t xReturn = pdFALSE;
+
+		/* This function must be called form a critical section. */
+
+		configASSERT( pxQueueSetContainer );
+		configASSERT( pxQueueSetContainer->uxMessagesWaiting < pxQueueSetContainer->uxLength );
+
+		if( pxQueueSetContainer->uxMessagesWaiting < pxQueueSetContainer->uxLength )
+		{
+			const int8_t cTxLock = pxQueueSetContainer->cTxLock;
+
+			traceQUEUE_SEND( pxQueueSetContainer );
+
+			/* The data copied is the handle of the queue that contains data. */
+			xReturn = prvCopyDataToQueue( pxQueueSetContainer, &pxQueue, xCopyPosition );
+
+			if( cTxLock == queueUNLOCKED )
+			{
+				if( listLIST_IS_EMPTY( &( pxQueueSetContainer->xTasksWaitingToReceive ) ) == pdFALSE )
+				{
+					if( xTaskRemoveFromEventList( &( pxQueueSetContainer->xTasksWaitingToReceive ) ) != pdFALSE )
+					{
+						/* The task waiting has a higher priority. */
+						xReturn = pdTRUE;
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				pxQueueSetContainer->cTxLock = ( int8_t ) ( cTxLock + 1 );
+			}
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		return xReturn;
+	}
+
+#endif /* configUSE_QUEUE_SETS */
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/components/freertos/stream_buffer.c b/components/freertos/stream_buffer.c
new file mode 100644
index 00000000..85519707
--- /dev/null
+++ b/components/freertos/stream_buffer.c
@@ -0,0 +1,1263 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/* Standard includes. */
+#include 
+#include 
+
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
+all the API functions to use the MPU wrappers.  That should only be done when
+task.h is included from an application file. */
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "stream_buffer.h"
+
+#if( configUSE_TASK_NOTIFICATIONS != 1 )
+	#error configUSE_TASK_NOTIFICATIONS must be set to 1 to build stream_buffer.c
+#endif
+
+/* Lint e961, e9021 and e750 are suppressed as a MISRA exception justified
+because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
+for the header files above, but not in this file, in order to generate the
+correct privileged Vs unprivileged linkage and placement. */
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021. */
+
+/* If the user has not provided application specific Rx notification macros,
+or #defined the notification macros away, them provide default implementations
+that uses task notifications. */
+/*lint -save -e9026 Function like macros allowed and needed here so they can be overidden. */
+#ifndef sbRECEIVE_COMPLETED
+	#define sbRECEIVE_COMPLETED( pxStreamBuffer )										\
+		vTaskSuspendAll();																\
+		{																				\
+			if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL )						\
+			{																			\
+				( void ) xTaskNotify( ( pxStreamBuffer )->xTaskWaitingToSend,			\
+									  ( uint32_t ) 0,									\
+									  eNoAction );										\
+				( pxStreamBuffer )->xTaskWaitingToSend = NULL;							\
+			}																			\
+		}																				\
+		( void ) xTaskResumeAll();
+#endif /* sbRECEIVE_COMPLETED */
+
+#ifndef sbRECEIVE_COMPLETED_FROM_ISR
+	#define sbRECEIVE_COMPLETED_FROM_ISR( pxStreamBuffer,								\
+										  pxHigherPriorityTaskWoken )					\
+	{																					\
+	UBaseType_t uxSavedInterruptStatus;													\
+																						\
+		uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR();		\
+		{																				\
+			if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL )						\
+			{																			\
+				( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToSend,	\
+											 ( uint32_t ) 0,							\
+											 eNoAction,									\
+											 pxHigherPriorityTaskWoken );				\
+				( pxStreamBuffer )->xTaskWaitingToSend = NULL;							\
+			}																			\
+		}																				\
+		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );					\
+	}
+#endif /* sbRECEIVE_COMPLETED_FROM_ISR */
+
+/* If the user has not provided an application specific Tx notification macro,
+or #defined the notification macro away, them provide a default implementation
+that uses task notifications. */
+#ifndef sbSEND_COMPLETED
+	#define sbSEND_COMPLETED( pxStreamBuffer )											\
+		vTaskSuspendAll();																\
+		{																				\
+			if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL )						\
+			{																			\
+				( void ) xTaskNotify( ( pxStreamBuffer )->xTaskWaitingToReceive,		\
+									  ( uint32_t ) 0,									\
+									  eNoAction );										\
+				( pxStreamBuffer )->xTaskWaitingToReceive = NULL;						\
+			}																			\
+		}																				\
+		( void ) xTaskResumeAll();
+#endif /* sbSEND_COMPLETED */
+
+#ifndef sbSEND_COMPLETE_FROM_ISR
+	#define sbSEND_COMPLETE_FROM_ISR( pxStreamBuffer, pxHigherPriorityTaskWoken )		\
+	{																					\
+	UBaseType_t uxSavedInterruptStatus;													\
+																						\
+		uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR();		\
+		{																				\
+			if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL )						\
+			{																			\
+				( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToReceive,	\
+											 ( uint32_t ) 0,							\
+											 eNoAction,									\
+											 pxHigherPriorityTaskWoken );				\
+				( pxStreamBuffer )->xTaskWaitingToReceive = NULL;						\
+			}																			\
+		}																				\
+		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );					\
+	}
+#endif /* sbSEND_COMPLETE_FROM_ISR */
+/*lint -restore (9026) */
+
+/* The number of bytes used to hold the length of a message in the buffer. */
+#define sbBYTES_TO_STORE_MESSAGE_LENGTH ( sizeof( configMESSAGE_BUFFER_LENGTH_TYPE ) )
+
+/* Bits stored in the ucFlags field of the stream buffer. */
+#define sbFLAGS_IS_MESSAGE_BUFFER		( ( uint8_t ) 1 ) /* Set if the stream buffer was created as a message buffer, in which case it holds discrete messages rather than a stream. */
+#define sbFLAGS_IS_STATICALLY_ALLOCATED ( ( uint8_t ) 2 ) /* Set if the stream buffer was created using statically allocated memory. */
+
+/*-----------------------------------------------------------*/
+
+/* Structure that hold state information on the buffer. */
+typedef struct StreamBufferDef_t /*lint !e9058 Style convention uses tag. */
+{
+	volatile size_t xTail;				/* Index to the next item to read within the buffer. */
+	volatile size_t xHead;				/* Index to the next item to write within the buffer. */
+	size_t xLength;						/* The length of the buffer pointed to by pucBuffer. */
+	size_t xTriggerLevelBytes;			/* The number of bytes that must be in the stream buffer before a task that is waiting for data is unblocked. */
+	volatile TaskHandle_t xTaskWaitingToReceive; /* Holds the handle of a task waiting for data, or NULL if no tasks are waiting. */
+	volatile TaskHandle_t xTaskWaitingToSend;	/* Holds the handle of a task waiting to send data to a message buffer that is full. */
+	uint8_t *pucBuffer;					/* Points to the buffer itself - that is - the RAM that stores the data passed through the buffer. */
+	uint8_t ucFlags;
+
+	#if ( configUSE_TRACE_FACILITY == 1 )
+		UBaseType_t uxStreamBufferNumber;		/* Used for tracing purposes. */
+	#endif
+} StreamBuffer_t;
+
+/*
+ * The number of bytes available to be read from the buffer.
+ */
+static size_t prvBytesInBuffer( const StreamBuffer_t * const pxStreamBuffer ) PRIVILEGED_FUNCTION;
+
+/*
+ * Add xCount bytes from pucData into the pxStreamBuffer message buffer.
+ * Returns the number of bytes written, which will either equal xCount in the
+ * success case, or 0 if there was not enough space in the buffer (in which case
+ * no data is written into the buffer).
+ */
+static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer, const uint8_t *pucData, size_t xCount ) PRIVILEGED_FUNCTION;
+
+/*
+ * If the stream buffer is being used as a message buffer, then reads an entire
+ * message out of the buffer.  If the stream buffer is being used as a stream
+ * buffer then read as many bytes as possible from the buffer.
+ * prvReadBytesFromBuffer() is called to actually extract the bytes from the
+ * buffer's data storage area.
+ */
+static size_t prvReadMessageFromBuffer( StreamBuffer_t *pxStreamBuffer,
+										void *pvRxData,
+										size_t xBufferLengthBytes,
+										size_t xBytesAvailable,
+										size_t xBytesToStoreMessageLength ) PRIVILEGED_FUNCTION;
+
+/*
+ * If the stream buffer is being used as a message buffer, then writes an entire
+ * message to the buffer.  If the stream buffer is being used as a stream
+ * buffer then write as many bytes as possible to the buffer.
+ * prvWriteBytestoBuffer() is called to actually send the bytes to the buffer's
+ * data storage area.
+ */
+static size_t prvWriteMessageToBuffer(  StreamBuffer_t * const pxStreamBuffer,
+										const void * pvTxData,
+										size_t xDataLengthBytes,
+										size_t xSpace,
+										size_t xRequiredSpace ) PRIVILEGED_FUNCTION;
+
+/*
+ * Read xMaxCount bytes from the pxStreamBuffer message buffer and write them
+ * to pucData.
+ */
+static size_t prvReadBytesFromBuffer( StreamBuffer_t *pxStreamBuffer,
+									  uint8_t *pucData,
+									  size_t xMaxCount,
+									  size_t xBytesAvailable ) PRIVILEGED_FUNCTION;
+
+/*
+ * Called by both pxStreamBufferCreate() and pxStreamBufferCreateStatic() to
+ * initialise the members of the newly created stream buffer structure.
+ */
+static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
+										  uint8_t * const pucBuffer,
+										  size_t xBufferSizeBytes,
+										  size_t xTriggerLevelBytes,
+										  uint8_t ucFlags ) PRIVILEGED_FUNCTION;
+
+/*-----------------------------------------------------------*/
+
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+
+	StreamBufferHandle_t xStreamBufferGenericCreate( size_t xBufferSizeBytes, size_t xTriggerLevelBytes, BaseType_t xIsMessageBuffer )
+	{
+	uint8_t *pucAllocatedMemory;
+	uint8_t ucFlags;
+
+		/* In case the stream buffer is going to be used as a message buffer
+		(that is, it will hold discrete messages with a little meta data that
+		says how big the next message is) check the buffer will be large enough
+		to hold at least one message. */
+		if( xIsMessageBuffer == pdTRUE )
+		{
+			/* Is a message buffer but not statically allocated. */
+			ucFlags = sbFLAGS_IS_MESSAGE_BUFFER;
+			configASSERT( xBufferSizeBytes > sbBYTES_TO_STORE_MESSAGE_LENGTH );
+		}
+		else
+		{
+			/* Not a message buffer and not statically allocated. */
+			ucFlags = 0;
+			configASSERT( xBufferSizeBytes > 0 );
+		}
+		configASSERT( xTriggerLevelBytes <= xBufferSizeBytes );
+
+		/* A trigger level of 0 would cause a waiting task to unblock even when
+		the buffer was empty. */
+		if( xTriggerLevelBytes == ( size_t ) 0 )
+		{
+			xTriggerLevelBytes = ( size_t ) 1;
+		}
+
+		/* A stream buffer requires a StreamBuffer_t structure and a buffer.
+		Both are allocated in a single call to pvPortMalloc().  The
+		StreamBuffer_t structure is placed at the start of the allocated memory
+		and the buffer follows immediately after.  The requested size is
+		incremented so the free space is returned as the user would expect -
+		this is a quirk of the implementation that means otherwise the free
+		space would be reported as one byte smaller than would be logically
+		expected. */
+		xBufferSizeBytes++;
+		pucAllocatedMemory = ( uint8_t * ) pvPortMalloc( xBufferSizeBytes + sizeof( StreamBuffer_t ) ); /*lint !e9079 malloc() only returns void*. */
+
+		if( pucAllocatedMemory != NULL )
+		{
+			prvInitialiseNewStreamBuffer( ( StreamBuffer_t * ) pucAllocatedMemory, /* Structure at the start of the allocated memory. */ /*lint !e9087 Safe cast as allocated memory is aligned. */ /*lint !e826 Area is not too small and alignment is guaranteed provided malloc() behaves as expected and returns aligned buffer. */
+										   pucAllocatedMemory + sizeof( StreamBuffer_t ),  /* Storage area follows. */ /*lint !e9016 Indexing past structure valid for uint8_t pointer, also storage area has no alignment requirement. */
+										   xBufferSizeBytes,
+										   xTriggerLevelBytes,
+										   ucFlags );
+
+			traceSTREAM_BUFFER_CREATE( ( ( StreamBuffer_t * ) pucAllocatedMemory ), xIsMessageBuffer );
+		}
+		else
+		{
+			traceSTREAM_BUFFER_CREATE_FAILED( xIsMessageBuffer );
+		}
+
+		return ( StreamBufferHandle_t ) pucAllocatedMemory; /*lint !e9087 !e826 Safe cast as allocated memory is aligned. */
+	}
+
+#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
+/*-----------------------------------------------------------*/
+
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+
+	StreamBufferHandle_t xStreamBufferGenericCreateStatic( size_t xBufferSizeBytes,
+														   size_t xTriggerLevelBytes,
+														   BaseType_t xIsMessageBuffer,
+														   uint8_t * const pucStreamBufferStorageArea,
+														   StaticStreamBuffer_t * const pxStaticStreamBuffer )
+	{
+	StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) pxStaticStreamBuffer; /*lint !e740 !e9087 Safe cast as StaticStreamBuffer_t is opaque Streambuffer_t. */
+	StreamBufferHandle_t xReturn;
+	uint8_t ucFlags;
+
+		configASSERT( pucStreamBufferStorageArea );
+		configASSERT( pxStaticStreamBuffer );
+		configASSERT( xTriggerLevelBytes <= xBufferSizeBytes );
+
+		/* A trigger level of 0 would cause a waiting task to unblock even when
+		the buffer was empty. */
+		if( xTriggerLevelBytes == ( size_t ) 0 )
+		{
+			xTriggerLevelBytes = ( size_t ) 1;
+		}
+
+		if( xIsMessageBuffer != pdFALSE )
+		{
+			/* Statically allocated message buffer. */
+			ucFlags = sbFLAGS_IS_MESSAGE_BUFFER | sbFLAGS_IS_STATICALLY_ALLOCATED;
+		}
+		else
+		{
+			/* Statically allocated stream buffer. */
+			ucFlags = sbFLAGS_IS_STATICALLY_ALLOCATED;
+		}
+
+		/* In case the stream buffer is going to be used as a message buffer
+		(that is, it will hold discrete messages with a little meta data that
+		says how big the next message is) check the buffer will be large enough
+		to hold at least one message. */
+		configASSERT( xBufferSizeBytes > sbBYTES_TO_STORE_MESSAGE_LENGTH );
+
+		#if( configASSERT_DEFINED == 1 )
+		{
+			/* Sanity check that the size of the structure used to declare a
+			variable of type StaticStreamBuffer_t equals the size of the real
+			message buffer structure. */
+			volatile size_t xSize = sizeof( StaticStreamBuffer_t );
+			configASSERT( xSize == sizeof( StreamBuffer_t ) );
+		} /*lint !e529 xSize is referenced is configASSERT() is defined. */
+		#endif /* configASSERT_DEFINED */
+
+		if( ( pucStreamBufferStorageArea != NULL ) && ( pxStaticStreamBuffer != NULL ) )
+		{
+			prvInitialiseNewStreamBuffer( pxStreamBuffer,
+										  pucStreamBufferStorageArea,
+										  xBufferSizeBytes,
+										  xTriggerLevelBytes,
+										  ucFlags );
+
+			/* Remember this was statically allocated in case it is ever deleted
+			again. */
+			pxStreamBuffer->ucFlags |= sbFLAGS_IS_STATICALLY_ALLOCATED;
+
+			traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer );
+
+			xReturn = ( StreamBufferHandle_t ) pxStaticStreamBuffer; /*lint !e9087 Data hiding requires cast to opaque type. */
+		}
+		else
+		{
+			xReturn = NULL;
+			traceSTREAM_BUFFER_CREATE_STATIC_FAILED( xReturn, xIsMessageBuffer );
+		}
+
+		return xReturn;
+	}
+
+#endif /* ( configSUPPORT_STATIC_ALLOCATION == 1 ) */
+/*-----------------------------------------------------------*/
+
+void vStreamBufferDelete( StreamBufferHandle_t xStreamBuffer )
+{
+StreamBuffer_t * pxStreamBuffer = xStreamBuffer;
+
+	configASSERT( pxStreamBuffer );
+
+	traceSTREAM_BUFFER_DELETE( xStreamBuffer );
+
+	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_STATICALLY_ALLOCATED ) == ( uint8_t ) pdFALSE )
+	{
+		#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+		{
+			/* Both the structure and the buffer were allocated using a single call
+			to pvPortMalloc(), hence only one call to vPortFree() is required. */
+			vPortFree( ( void * ) pxStreamBuffer ); /*lint !e9087 Standard free() semantics require void *, plus pxStreamBuffer was allocated by pvPortMalloc(). */
+		}
+		#else
+		{
+			/* Should not be possible to get here, ucFlags must be corrupt.
+			Force an assert. */
+			configASSERT( xStreamBuffer == ( StreamBufferHandle_t ) ~0 );
+		}
+		#endif
+	}
+	else
+	{
+		/* The structure and buffer were not allocated dynamically and cannot be
+		freed - just scrub the structure so future use will assert. */
+		( void ) memset( pxStreamBuffer, 0x00, sizeof( StreamBuffer_t ) );
+	}
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xStreamBufferReset( StreamBufferHandle_t xStreamBuffer )
+{
+StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+BaseType_t xReturn = pdFAIL;
+
+#if( configUSE_TRACE_FACILITY == 1 )
+	UBaseType_t uxStreamBufferNumber;
+#endif
+
+	configASSERT( pxStreamBuffer );
+
+	#if( configUSE_TRACE_FACILITY == 1 )
+	{
+		/* Store the stream buffer number so it can be restored after the
+		reset. */
+		uxStreamBufferNumber = pxStreamBuffer->uxStreamBufferNumber;
+	}
+	#endif
+
+	/* Can only reset a message buffer if there are no tasks blocked on it. */
+	taskENTER_CRITICAL();
+	{
+		if( pxStreamBuffer->xTaskWaitingToReceive == NULL )
+		{
+			if( pxStreamBuffer->xTaskWaitingToSend == NULL )
+			{
+				prvInitialiseNewStreamBuffer( pxStreamBuffer,
+											  pxStreamBuffer->pucBuffer,
+											  pxStreamBuffer->xLength,
+											  pxStreamBuffer->xTriggerLevelBytes,
+											  pxStreamBuffer->ucFlags );
+				xReturn = pdPASS;
+
+				#if( configUSE_TRACE_FACILITY == 1 )
+				{
+					pxStreamBuffer->uxStreamBufferNumber = uxStreamBufferNumber;
+				}
+				#endif
+
+				traceSTREAM_BUFFER_RESET( xStreamBuffer );
+			}
+		}
+	}
+	taskEXIT_CRITICAL();
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xStreamBufferSetTriggerLevel( StreamBufferHandle_t xStreamBuffer, size_t xTriggerLevel )
+{
+StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+BaseType_t xReturn;
+
+	configASSERT( pxStreamBuffer );
+
+	/* It is not valid for the trigger level to be 0. */
+	if( xTriggerLevel == ( size_t ) 0 )
+	{
+		xTriggerLevel = ( size_t ) 1;
+	}
+
+	/* The trigger level is the number of bytes that must be in the stream
+	buffer before a task that is waiting for data is unblocked. */
+	if( xTriggerLevel <= pxStreamBuffer->xLength )
+	{
+		pxStreamBuffer->xTriggerLevelBytes = xTriggerLevel;
+		xReturn = pdPASS;
+	}
+	else
+	{
+		xReturn = pdFALSE;
+	}
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+size_t xStreamBufferSpacesAvailable( StreamBufferHandle_t xStreamBuffer )
+{
+const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+size_t xSpace;
+
+	configASSERT( pxStreamBuffer );
+
+	xSpace = pxStreamBuffer->xLength + pxStreamBuffer->xTail;
+	xSpace -= pxStreamBuffer->xHead;
+	xSpace -= ( size_t ) 1;
+
+	if( xSpace >= pxStreamBuffer->xLength )
+	{
+		xSpace -= pxStreamBuffer->xLength;
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	return xSpace;
+}
+/*-----------------------------------------------------------*/
+
+size_t xStreamBufferBytesAvailable( StreamBufferHandle_t xStreamBuffer )
+{
+const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+size_t xReturn;
+
+	configASSERT( pxStreamBuffer );
+
+	xReturn = prvBytesInBuffer( pxStreamBuffer );
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+size_t xStreamBufferSend( StreamBufferHandle_t xStreamBuffer,
+						  const void *pvTxData,
+						  size_t xDataLengthBytes,
+						  TickType_t xTicksToWait )
+{
+StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+size_t xReturn, xSpace = 0;
+size_t xRequiredSpace = xDataLengthBytes;
+TimeOut_t xTimeOut;
+
+	configASSERT( pvTxData );
+	configASSERT( pxStreamBuffer );
+
+	/* This send function is used to write to both message buffers and stream
+	buffers.  If this is a message buffer then the space needed must be
+	increased by the amount of bytes needed to store the length of the
+	message. */
+	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
+	{
+		xRequiredSpace += sbBYTES_TO_STORE_MESSAGE_LENGTH;
+
+		/* Overflow? */
+		configASSERT( xRequiredSpace > xDataLengthBytes );
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	if( xTicksToWait != ( TickType_t ) 0 )
+	{
+		vTaskSetTimeOutState( &xTimeOut );
+
+		do
+		{
+			/* Wait until the required number of bytes are free in the message
+			buffer. */
+			taskENTER_CRITICAL();
+			{
+				xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
+
+				if( xSpace < xRequiredSpace )
+				{
+					/* Clear notification state as going to wait for space. */
+					( void ) xTaskNotifyStateClear( NULL );
+
+					/* Should only be one writer. */
+					configASSERT( pxStreamBuffer->xTaskWaitingToSend == NULL );
+					pxStreamBuffer->xTaskWaitingToSend = xTaskGetCurrentTaskHandle();
+				}
+				else
+				{
+					taskEXIT_CRITICAL();
+					break;
+				}
+			}
+			taskEXIT_CRITICAL();
+
+			traceBLOCKING_ON_STREAM_BUFFER_SEND( xStreamBuffer );
+			( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
+			pxStreamBuffer->xTaskWaitingToSend = NULL;
+
+		} while( xTaskCheckForTimeOut( &xTimeOut, &xTicksToWait ) == pdFALSE );
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	if( xSpace == ( size_t ) 0 )
+	{
+		xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	xReturn = prvWriteMessageToBuffer( pxStreamBuffer, pvTxData, xDataLengthBytes, xSpace, xRequiredSpace );
+
+	if( xReturn > ( size_t ) 0 )
+	{
+		traceSTREAM_BUFFER_SEND( xStreamBuffer, xReturn );
+
+		/* Was a task waiting for the data? */
+		if( prvBytesInBuffer( pxStreamBuffer ) >= pxStreamBuffer->xTriggerLevelBytes )
+		{
+			sbSEND_COMPLETED( pxStreamBuffer );
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+		traceSTREAM_BUFFER_SEND_FAILED( xStreamBuffer );
+	}
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+size_t xStreamBufferSendFromISR( StreamBufferHandle_t xStreamBuffer,
+								 const void *pvTxData,
+								 size_t xDataLengthBytes,
+								 BaseType_t * const pxHigherPriorityTaskWoken )
+{
+StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+size_t xReturn, xSpace;
+size_t xRequiredSpace = xDataLengthBytes;
+
+	configASSERT( pvTxData );
+	configASSERT( pxStreamBuffer );
+
+	/* This send function is used to write to both message buffers and stream
+	buffers.  If this is a message buffer then the space needed must be
+	increased by the amount of bytes needed to store the length of the
+	message. */
+	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
+	{
+		xRequiredSpace += sbBYTES_TO_STORE_MESSAGE_LENGTH;
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	xSpace = xStreamBufferSpacesAvailable( pxStreamBuffer );
+	xReturn = prvWriteMessageToBuffer( pxStreamBuffer, pvTxData, xDataLengthBytes, xSpace, xRequiredSpace );
+
+	if( xReturn > ( size_t ) 0 )
+	{
+		/* Was a task waiting for the data? */
+		if( prvBytesInBuffer( pxStreamBuffer ) >= pxStreamBuffer->xTriggerLevelBytes )
+		{
+			sbSEND_COMPLETE_FROM_ISR( pxStreamBuffer, pxHigherPriorityTaskWoken );
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	traceSTREAM_BUFFER_SEND_FROM_ISR( xStreamBuffer, xReturn );
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+static size_t prvWriteMessageToBuffer( StreamBuffer_t * const pxStreamBuffer,
+									   const void * pvTxData,
+									   size_t xDataLengthBytes,
+									   size_t xSpace,
+									   size_t xRequiredSpace )
+{
+	BaseType_t xShouldWrite;
+	size_t xReturn;
+
+	if( xSpace == ( size_t ) 0 )
+	{
+		/* Doesn't matter if this is a stream buffer or a message buffer, there
+		is no space to write. */
+		xShouldWrite = pdFALSE;
+	}
+	else if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) == ( uint8_t ) 0 )
+	{
+		/* This is a stream buffer, as opposed to a message buffer, so writing a
+		stream of bytes rather than discrete messages.  Write as many bytes as
+		possible. */
+		xShouldWrite = pdTRUE;
+		xDataLengthBytes = configMIN( xDataLengthBytes, xSpace );
+	}
+	else if( xSpace >= xRequiredSpace )
+	{
+		/* This is a message buffer, as opposed to a stream buffer, and there
+		is enough space to write both the message length and the message itself
+		into the buffer.  Start by writing the length of the data, the data
+		itself will be written later in this function. */
+		xShouldWrite = pdTRUE;
+		( void ) prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) &( xDataLengthBytes ), sbBYTES_TO_STORE_MESSAGE_LENGTH );
+	}
+	else
+	{
+		/* There is space available, but not enough space. */
+		xShouldWrite = pdFALSE;
+	}
+
+	if( xShouldWrite != pdFALSE )
+	{
+		/* Writes the data itself. */
+		xReturn = prvWriteBytesToBuffer( pxStreamBuffer, ( const uint8_t * ) pvTxData, xDataLengthBytes ); /*lint !e9079 Storage buffer is implemented as uint8_t for ease of sizing, alighment and access. */
+	}
+	else
+	{
+		xReturn = 0;
+	}
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+size_t xStreamBufferReceive( StreamBufferHandle_t xStreamBuffer,
+							 void *pvRxData,
+							 size_t xBufferLengthBytes,
+							 TickType_t xTicksToWait )
+{
+StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength;
+
+	configASSERT( pvRxData );
+	configASSERT( pxStreamBuffer );
+
+	/* This receive function is used by both message buffers, which store
+	discrete messages, and stream buffers, which store a continuous stream of
+	bytes.  Discrete messages include an additional
+	sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the
+	message. */
+	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
+	{
+		xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH;
+	}
+	else
+	{
+		xBytesToStoreMessageLength = 0;
+	}
+
+	if( xTicksToWait != ( TickType_t ) 0 )
+	{
+		/* Checking if there is data and clearing the notification state must be
+		performed atomically. */
+		taskENTER_CRITICAL();
+		{
+			xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
+
+			/* If this function was invoked by a message buffer read then
+			xBytesToStoreMessageLength holds the number of bytes used to hold
+			the length of the next discrete message.  If this function was
+			invoked by a stream buffer read then xBytesToStoreMessageLength will
+			be 0. */
+			if( xBytesAvailable <= xBytesToStoreMessageLength )
+			{
+				/* Clear notification state as going to wait for data. */
+				( void ) xTaskNotifyStateClear( NULL );
+
+				/* Should only be one reader. */
+				configASSERT( pxStreamBuffer->xTaskWaitingToReceive == NULL );
+				pxStreamBuffer->xTaskWaitingToReceive = xTaskGetCurrentTaskHandle();
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		taskEXIT_CRITICAL();
+
+		if( xBytesAvailable <= xBytesToStoreMessageLength )
+		{
+			/* Wait for data to be available. */
+			traceBLOCKING_ON_STREAM_BUFFER_RECEIVE( xStreamBuffer );
+			( void ) xTaskNotifyWait( ( uint32_t ) 0, ( uint32_t ) 0, NULL, xTicksToWait );
+			pxStreamBuffer->xTaskWaitingToReceive = NULL;
+
+			/* Recheck the data available after blocking. */
+			xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	else
+	{
+		xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
+	}
+
+	/* Whether receiving a discrete message (where xBytesToStoreMessageLength
+	holds the number of bytes used to store the message length) or a stream of
+	bytes (where xBytesToStoreMessageLength is zero), the number of bytes
+	available must be greater than xBytesToStoreMessageLength to be able to
+	read bytes from the buffer. */
+	if( xBytesAvailable > xBytesToStoreMessageLength )
+	{
+		xReceivedLength = prvReadMessageFromBuffer( pxStreamBuffer, pvRxData, xBufferLengthBytes, xBytesAvailable, xBytesToStoreMessageLength );
+
+		/* Was a task waiting for space in the buffer? */
+		if( xReceivedLength != ( size_t ) 0 )
+		{
+			traceSTREAM_BUFFER_RECEIVE( xStreamBuffer, xReceivedLength );
+			sbRECEIVE_COMPLETED( pxStreamBuffer );
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	else
+	{
+		traceSTREAM_BUFFER_RECEIVE_FAILED( xStreamBuffer );
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	return xReceivedLength;
+}
+/*-----------------------------------------------------------*/
+
+size_t xStreamBufferNextMessageLengthBytes( StreamBufferHandle_t xStreamBuffer )
+{
+StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+size_t xReturn, xBytesAvailable, xOriginalTail;
+configMESSAGE_BUFFER_LENGTH_TYPE xTempReturn;
+
+	configASSERT( pxStreamBuffer );
+
+	/* Ensure the stream buffer is being used as a message buffer. */
+	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
+	{
+		xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
+		if( xBytesAvailable > sbBYTES_TO_STORE_MESSAGE_LENGTH )
+		{
+			/* The number of bytes available is greater than the number of bytes
+			required to hold the length of the next message, so another message
+			is available.  Return its length without removing the length bytes
+			from the buffer.  A copy of the tail is stored so the buffer can be
+			returned to its prior state as the message is not actually being
+			removed from the buffer. */
+			xOriginalTail = pxStreamBuffer->xTail;
+			( void ) prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) &xTempReturn, sbBYTES_TO_STORE_MESSAGE_LENGTH, xBytesAvailable );
+			xReturn = ( size_t ) xTempReturn;
+			pxStreamBuffer->xTail = xOriginalTail;
+		}
+		else
+		{
+			/* The minimum amount of bytes in a message buffer is
+			( sbBYTES_TO_STORE_MESSAGE_LENGTH + 1 ), so if xBytesAvailable is
+			less than sbBYTES_TO_STORE_MESSAGE_LENGTH the only other valid
+			value is 0. */
+			configASSERT( xBytesAvailable == 0 );
+			xReturn = 0;
+		}
+	}
+	else
+	{
+		xReturn = 0;
+	}
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+size_t xStreamBufferReceiveFromISR( StreamBufferHandle_t xStreamBuffer,
+									void *pvRxData,
+									size_t xBufferLengthBytes,
+									BaseType_t * const pxHigherPriorityTaskWoken )
+{
+StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+size_t xReceivedLength = 0, xBytesAvailable, xBytesToStoreMessageLength;
+
+	configASSERT( pvRxData );
+	configASSERT( pxStreamBuffer );
+
+	/* This receive function is used by both message buffers, which store
+	discrete messages, and stream buffers, which store a continuous stream of
+	bytes.  Discrete messages include an additional
+	sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the
+	message. */
+	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
+	{
+		xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH;
+	}
+	else
+	{
+		xBytesToStoreMessageLength = 0;
+	}
+
+	xBytesAvailable = prvBytesInBuffer( pxStreamBuffer );
+
+	/* Whether receiving a discrete message (where xBytesToStoreMessageLength
+	holds the number of bytes used to store the message length) or a stream of
+	bytes (where xBytesToStoreMessageLength is zero), the number of bytes
+	available must be greater than xBytesToStoreMessageLength to be able to
+	read bytes from the buffer. */
+	if( xBytesAvailable > xBytesToStoreMessageLength )
+	{
+		xReceivedLength = prvReadMessageFromBuffer( pxStreamBuffer, pvRxData, xBufferLengthBytes, xBytesAvailable, xBytesToStoreMessageLength );
+
+		/* Was a task waiting for space in the buffer? */
+		if( xReceivedLength != ( size_t ) 0 )
+		{
+			sbRECEIVE_COMPLETED_FROM_ISR( pxStreamBuffer, pxHigherPriorityTaskWoken );
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	traceSTREAM_BUFFER_RECEIVE_FROM_ISR( xStreamBuffer, xReceivedLength );
+
+	return xReceivedLength;
+}
+/*-----------------------------------------------------------*/
+
+static size_t prvReadMessageFromBuffer( StreamBuffer_t *pxStreamBuffer,
+										void *pvRxData,
+										size_t xBufferLengthBytes,
+										size_t xBytesAvailable,
+										size_t xBytesToStoreMessageLength )
+{
+size_t xOriginalTail, xReceivedLength, xNextMessageLength;
+configMESSAGE_BUFFER_LENGTH_TYPE xTempNextMessageLength;
+
+	if( xBytesToStoreMessageLength != ( size_t ) 0 )
+	{
+		/* A discrete message is being received.  First receive the length
+		of the message.  A copy of the tail is stored so the buffer can be
+		returned to its prior state if the length of the message is too
+		large for the provided buffer. */
+		xOriginalTail = pxStreamBuffer->xTail;
+		( void ) prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) &xTempNextMessageLength, xBytesToStoreMessageLength, xBytesAvailable );
+		xNextMessageLength = ( size_t ) xTempNextMessageLength;
+
+		/* Reduce the number of bytes available by the number of bytes just
+		read out. */
+		xBytesAvailable -= xBytesToStoreMessageLength;
+
+		/* Check there is enough space in the buffer provided by the
+		user. */
+		if( xNextMessageLength > xBufferLengthBytes )
+		{
+			/* The user has provided insufficient space to read the message
+			so return the buffer to its previous state (so the length of
+			the message is in the buffer again). */
+			pxStreamBuffer->xTail = xOriginalTail;
+			xNextMessageLength = 0;
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	else
+	{
+		/* A stream of bytes is being received (as opposed to a discrete
+		message), so read as many bytes as possible. */
+		xNextMessageLength = xBufferLengthBytes;
+	}
+
+	/* Read the actual data. */
+	xReceivedLength = prvReadBytesFromBuffer( pxStreamBuffer, ( uint8_t * ) pvRxData, xNextMessageLength, xBytesAvailable ); /*lint !e9079 Data storage area is implemented as uint8_t array for ease of sizing, indexing and alignment. */
+
+	return xReceivedLength;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xStreamBufferIsEmpty( StreamBufferHandle_t xStreamBuffer )
+{
+const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+BaseType_t xReturn;
+size_t xTail;
+
+	configASSERT( pxStreamBuffer );
+
+	/* True if no bytes are available. */
+	xTail = pxStreamBuffer->xTail;
+	if( pxStreamBuffer->xHead == xTail )
+	{
+		xReturn = pdTRUE;
+	}
+	else
+	{
+		xReturn = pdFALSE;
+	}
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xStreamBufferIsFull( StreamBufferHandle_t xStreamBuffer )
+{
+BaseType_t xReturn;
+size_t xBytesToStoreMessageLength;
+const StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+
+	configASSERT( pxStreamBuffer );
+
+	/* This generic version of the receive function is used by both message
+	buffers, which store discrete messages, and stream buffers, which store a
+	continuous stream of bytes.  Discrete messages include an additional
+	sbBYTES_TO_STORE_MESSAGE_LENGTH bytes that hold the length of the message. */
+	if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER ) != ( uint8_t ) 0 )
+	{
+		xBytesToStoreMessageLength = sbBYTES_TO_STORE_MESSAGE_LENGTH;
+	}
+	else
+	{
+		xBytesToStoreMessageLength = 0;
+	}
+
+	/* True if the available space equals zero. */
+	if( xStreamBufferSpacesAvailable( xStreamBuffer ) <= xBytesToStoreMessageLength )
+	{
+		xReturn = pdTRUE;
+	}
+	else
+	{
+		xReturn = pdFALSE;
+	}
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xStreamBufferSendCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken )
+{
+StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+BaseType_t xReturn;
+UBaseType_t uxSavedInterruptStatus;
+
+	configASSERT( pxStreamBuffer );
+
+	uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR();
+	{
+		if( ( pxStreamBuffer )->xTaskWaitingToReceive != NULL )
+		{
+			( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToReceive,
+										 ( uint32_t ) 0,
+										 eNoAction,
+										 pxHigherPriorityTaskWoken );
+			( pxStreamBuffer )->xTaskWaitingToReceive = NULL;
+			xReturn = pdTRUE;
+		}
+		else
+		{
+			xReturn = pdFALSE;
+		}
+	}
+	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xStreamBufferReceiveCompletedFromISR( StreamBufferHandle_t xStreamBuffer, BaseType_t *pxHigherPriorityTaskWoken )
+{
+StreamBuffer_t * const pxStreamBuffer = xStreamBuffer;
+BaseType_t xReturn;
+UBaseType_t uxSavedInterruptStatus;
+
+	configASSERT( pxStreamBuffer );
+
+	uxSavedInterruptStatus = ( UBaseType_t ) portSET_INTERRUPT_MASK_FROM_ISR();
+	{
+		if( ( pxStreamBuffer )->xTaskWaitingToSend != NULL )
+		{
+			( void ) xTaskNotifyFromISR( ( pxStreamBuffer )->xTaskWaitingToSend,
+										 ( uint32_t ) 0,
+										 eNoAction,
+										 pxHigherPriorityTaskWoken );
+			( pxStreamBuffer )->xTaskWaitingToSend = NULL;
+			xReturn = pdTRUE;
+		}
+		else
+		{
+			xReturn = pdFALSE;
+		}
+	}
+	portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+static size_t prvWriteBytesToBuffer( StreamBuffer_t * const pxStreamBuffer, const uint8_t *pucData, size_t xCount )
+{
+size_t xNextHead, xFirstLength;
+
+	configASSERT( xCount > ( size_t ) 0 );
+
+	xNextHead = pxStreamBuffer->xHead;
+
+	/* Calculate the number of bytes that can be added in the first write -
+	which may be less than the total number of bytes that need to be added if
+	the buffer will wrap back to the beginning. */
+	xFirstLength = configMIN( pxStreamBuffer->xLength - xNextHead, xCount );
+
+	/* Write as many bytes as can be written in the first write. */
+	configASSERT( ( xNextHead + xFirstLength ) <= pxStreamBuffer->xLength );
+	( void ) memcpy( ( void* ) ( &( pxStreamBuffer->pucBuffer[ xNextHead ] ) ), ( const void * ) pucData, xFirstLength ); /*lint !e9087 memcpy() requires void *. */
+
+	/* If the number of bytes written was less than the number that could be
+	written in the first write... */
+	if( xCount > xFirstLength )
+	{
+		/* ...then write the remaining bytes to the start of the buffer. */
+		configASSERT( ( xCount - xFirstLength ) <= pxStreamBuffer->xLength );
+		( void ) memcpy( ( void * ) pxStreamBuffer->pucBuffer, ( const void * ) &( pucData[ xFirstLength ] ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	xNextHead += xCount;
+	if( xNextHead >= pxStreamBuffer->xLength )
+	{
+		xNextHead -= pxStreamBuffer->xLength;
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	pxStreamBuffer->xHead = xNextHead;
+
+	return xCount;
+}
+/*-----------------------------------------------------------*/
+
+static size_t prvReadBytesFromBuffer( StreamBuffer_t *pxStreamBuffer, uint8_t *pucData, size_t xMaxCount, size_t xBytesAvailable )
+{
+size_t xCount, xFirstLength, xNextTail;
+
+	/* Use the minimum of the wanted bytes and the available bytes. */
+	xCount = configMIN( xBytesAvailable, xMaxCount );
+
+	if( xCount > ( size_t ) 0 )
+	{
+		xNextTail = pxStreamBuffer->xTail;
+
+		/* Calculate the number of bytes that can be read - which may be
+		less than the number wanted if the data wraps around to the start of
+		the buffer. */
+		xFirstLength = configMIN( pxStreamBuffer->xLength - xNextTail, xCount );
+
+		/* Obtain the number of bytes it is possible to obtain in the first
+		read.  Asserts check bounds of read and write. */
+		configASSERT( xFirstLength <= xMaxCount );
+		configASSERT( ( xNextTail + xFirstLength ) <= pxStreamBuffer->xLength );
+		( void ) memcpy( ( void * ) pucData, ( const void * ) &( pxStreamBuffer->pucBuffer[ xNextTail ] ), xFirstLength ); /*lint !e9087 memcpy() requires void *. */
+
+		/* If the total number of wanted bytes is greater than the number
+		that could be read in the first read... */
+		if( xCount > xFirstLength )
+		{
+			/*...then read the remaining bytes from the start of the buffer. */
+			configASSERT( xCount <= xMaxCount );
+			( void ) memcpy( ( void * ) &( pucData[ xFirstLength ] ), ( void * ) ( pxStreamBuffer->pucBuffer ), xCount - xFirstLength ); /*lint !e9087 memcpy() requires void *. */
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		/* Move the tail pointer to effectively remove the data read from
+		the buffer. */
+		xNextTail += xCount;
+
+		if( xNextTail >= pxStreamBuffer->xLength )
+		{
+			xNextTail -= pxStreamBuffer->xLength;
+		}
+
+		pxStreamBuffer->xTail = xNextTail;
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	return xCount;
+}
+/*-----------------------------------------------------------*/
+
+static size_t prvBytesInBuffer( const StreamBuffer_t * const pxStreamBuffer )
+{
+/* Returns the distance between xTail and xHead. */
+size_t xCount;
+
+	xCount = pxStreamBuffer->xLength + pxStreamBuffer->xHead;
+	xCount -= pxStreamBuffer->xTail;
+	if ( xCount >= pxStreamBuffer->xLength )
+	{
+		xCount -= pxStreamBuffer->xLength;
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	return xCount;
+}
+/*-----------------------------------------------------------*/
+
+static void prvInitialiseNewStreamBuffer( StreamBuffer_t * const pxStreamBuffer,
+										  uint8_t * const pucBuffer,
+										  size_t xBufferSizeBytes,
+										  size_t xTriggerLevelBytes,
+										  uint8_t ucFlags )
+{
+	/* Assert here is deliberately writing to the entire buffer to ensure it can
+	be written to without generating exceptions, and is setting the buffer to a
+	known value to assist in development/debugging. */
+	#if( configASSERT_DEFINED == 1 )
+	{
+		/* The value written just has to be identifiable when looking at the
+		memory.  Don't use 0xA5 as that is the stack fill value and could
+		result in confusion as to what is actually being observed. */
+		const BaseType_t xWriteValue = 0x55;
+		configASSERT( memset( pucBuffer, ( int ) xWriteValue, xBufferSizeBytes ) == pucBuffer );
+	} /*lint !e529 !e438 xWriteValue is only used if configASSERT() is defined. */
+	#endif
+
+	( void ) memset( ( void * ) pxStreamBuffer, 0x00, sizeof( StreamBuffer_t ) ); /*lint !e9087 memset() requires void *. */
+	pxStreamBuffer->pucBuffer = pucBuffer;
+	pxStreamBuffer->xLength = xBufferSizeBytes;
+	pxStreamBuffer->xTriggerLevelBytes = xTriggerLevelBytes;
+	pxStreamBuffer->ucFlags = ucFlags;
+}
+
+#if ( configUSE_TRACE_FACILITY == 1 )
+
+	UBaseType_t uxStreamBufferGetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer )
+	{
+		return xStreamBuffer->uxStreamBufferNumber;
+	}
+
+#endif /* configUSE_TRACE_FACILITY */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TRACE_FACILITY == 1 )
+
+	void vStreamBufferSetStreamBufferNumber( StreamBufferHandle_t xStreamBuffer, UBaseType_t uxStreamBufferNumber )
+	{
+		xStreamBuffer->uxStreamBufferNumber = uxStreamBufferNumber;
+	}
+
+#endif /* configUSE_TRACE_FACILITY */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TRACE_FACILITY == 1 )
+
+	uint8_t ucStreamBufferGetStreamBufferType( StreamBufferHandle_t xStreamBuffer )
+	{
+		return ( xStreamBuffer->ucFlags & sbFLAGS_IS_MESSAGE_BUFFER );
+	}
+
+#endif /* configUSE_TRACE_FACILITY */
+/*-----------------------------------------------------------*/
diff --git a/components/freertos/tasks.c b/components/freertos/tasks.c
new file mode 100644
index 00000000..6b312e17
--- /dev/null
+++ b/components/freertos/tasks.c
@@ -0,0 +1,5266 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/* Standard includes. */
+#include 
+#include 
+#include "stdio.h"
+
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
+all the API functions to use the MPU wrappers.  That should only be done when
+task.h is included from an application file. */
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "timers.h"
+#include "stack_macros.h"
+
+/* Lint e9021, e961 and e750 are suppressed as a MISRA exception justified
+because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
+for the header files above, but not in this file, in order to generate the
+correct privileged Vs unprivileged linkage and placement. */
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e961 !e750 !e9021. */
+
+/* Set configUSE_STATS_FORMATTING_FUNCTIONS to 2 to include the stats formatting
+functions but without including stdio.h here. */
+#if ( configUSE_STATS_FORMATTING_FUNCTIONS == 1 )
+	/* At the bottom of this file are two optional functions that can be used
+	to generate human readable text from the raw data generated by the
+	uxTaskGetSystemState() function.  Note the formatting functions are provided
+	for convenience only, and are NOT considered part of the kernel. */
+	#include 
+#endif /* configUSE_STATS_FORMATTING_FUNCTIONS == 1 ) */
+
+#if( configUSE_PREEMPTION == 0 )
+	/* If the cooperative scheduler is being used then a yield should not be
+	performed just because a higher priority task has been woken. */
+	#define taskYIELD_IF_USING_PREEMPTION()
+#else
+	#define taskYIELD_IF_USING_PREEMPTION() portYIELD_WITHIN_API()
+#endif
+
+/* Values that can be assigned to the ucNotifyState member of the TCB. */
+#define taskNOT_WAITING_NOTIFICATION	( ( uint8_t ) 0 )
+#define taskWAITING_NOTIFICATION		( ( uint8_t ) 1 )
+#define taskNOTIFICATION_RECEIVED		( ( uint8_t ) 2 )
+
+/*
+ * The value used to fill the stack of a task when the task is created.  This
+ * is used purely for checking the high water mark for tasks.
+ */
+#define tskSTACK_FILL_BYTE	( 0xa5U )
+
+/* Bits used to recored how a task's stack and TCB were allocated. */
+#define tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB 		( ( uint8_t ) 0 )
+#define tskSTATICALLY_ALLOCATED_STACK_ONLY 			( ( uint8_t ) 1 )
+#define tskSTATICALLY_ALLOCATED_STACK_AND_TCB		( ( uint8_t ) 2 )
+
+/* If any of the following are set then task stacks are filled with a known
+value so the high water mark can be determined.  If none of the following are
+set then don't fill the stack so there is no unnecessary dependency on memset. */
+#if( ( configCHECK_FOR_STACK_OVERFLOW > 1 ) || ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) )
+	#define tskSET_NEW_STACKS_TO_KNOWN_VALUE	1
+#else
+	#define tskSET_NEW_STACKS_TO_KNOWN_VALUE	0
+#endif
+
+/*
+ * Macros used by vListTask to indicate which state a task is in.
+ */
+#define tskRUNNING_CHAR		( 'X' )
+#define tskBLOCKED_CHAR		( 'B' )
+#define tskREADY_CHAR		( 'R' )
+#define tskDELETED_CHAR		( 'D' )
+#define tskSUSPENDED_CHAR	( 'S' )
+
+/*
+ * Some kernel aware debuggers require the data the debugger needs access to be
+ * global, rather than file scope.
+ */
+#ifdef portREMOVE_STATIC_QUALIFIER
+	#define static
+#endif
+
+/* The name allocated to the Idle task.  This can be overridden by defining
+configIDLE_TASK_NAME in FreeRTOSConfig.h. */
+#ifndef configIDLE_TASK_NAME
+	#define configIDLE_TASK_NAME "IDLE"
+#endif
+
+#if ( configUSE_PORT_OPTIMISED_TASK_SELECTION == 0 )
+
+	/* If configUSE_PORT_OPTIMISED_TASK_SELECTION is 0 then task selection is
+	performed in a generic way that is not optimised to any particular
+	microcontroller architecture. */
+
+	/* uxTopReadyPriority holds the priority of the highest priority ready
+	state task. */
+	#define taskRECORD_READY_PRIORITY( uxPriority )														\
+	{																									\
+		if( ( uxPriority ) > uxTopReadyPriority )														\
+		{																								\
+			uxTopReadyPriority = ( uxPriority );														\
+		}																								\
+	} /* taskRECORD_READY_PRIORITY */
+
+	/*-----------------------------------------------------------*/
+
+	#define taskSELECT_HIGHEST_PRIORITY_TASK()															\
+	{																									\
+	UBaseType_t uxTopPriority = uxTopReadyPriority;														\
+																										\
+		/* Find the highest priority queue that contains ready tasks. */								\
+		while( listLIST_IS_EMPTY( &( pxReadyTasksLists[ uxTopPriority ] ) ) )							\
+		{																								\
+			configASSERT( uxTopPriority );																\
+			--uxTopPriority;																			\
+		}																								\
+																										\
+		/* listGET_OWNER_OF_NEXT_ENTRY indexes through the list, so the tasks of						\
+		the	same priority get an equal share of the processor time. */									\
+		listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopPriority ] ) );			\
+		uxTopReadyPriority = uxTopPriority;																\
+	} /* taskSELECT_HIGHEST_PRIORITY_TASK */
+
+	/*-----------------------------------------------------------*/
+
+	/* Define away taskRESET_READY_PRIORITY() and portRESET_READY_PRIORITY() as
+	they are only required when a port optimised method of task selection is
+	being used. */
+	#define taskRESET_READY_PRIORITY( uxPriority )
+	#define portRESET_READY_PRIORITY( uxPriority, uxTopReadyPriority )
+
+#else /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+
+	/* If configUSE_PORT_OPTIMISED_TASK_SELECTION is 1 then task selection is
+	performed in a way that is tailored to the particular microcontroller
+	architecture being used. */
+
+	/* A port optimised version is provided.  Call the port defined macros. */
+	#define taskRECORD_READY_PRIORITY( uxPriority )	portRECORD_READY_PRIORITY( uxPriority, uxTopReadyPriority )
+
+	/*-----------------------------------------------------------*/
+
+	#define taskSELECT_HIGHEST_PRIORITY_TASK()														\
+	{																								\
+	UBaseType_t uxTopPriority;																		\
+																									\
+		/* Find the highest priority list that contains ready tasks. */								\
+		portGET_HIGHEST_PRIORITY( uxTopPriority, uxTopReadyPriority );								\
+		configASSERT( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ uxTopPriority ] ) ) > 0 );		\
+		listGET_OWNER_OF_NEXT_ENTRY( pxCurrentTCB, &( pxReadyTasksLists[ uxTopPriority ] ) );		\
+	} /* taskSELECT_HIGHEST_PRIORITY_TASK() */
+
+	/*-----------------------------------------------------------*/
+
+	/* A port optimised version is provided, call it only if the TCB being reset
+	is being referenced from a ready list.  If it is referenced from a delayed
+	or suspended list then it won't be in a ready list. */
+	#define taskRESET_READY_PRIORITY( uxPriority )														\
+	{																									\
+		if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ ( uxPriority ) ] ) ) == ( UBaseType_t ) 0 )	\
+		{																								\
+			portRESET_READY_PRIORITY( ( uxPriority ), ( uxTopReadyPriority ) );							\
+		}																								\
+	}
+
+#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
+
+/*-----------------------------------------------------------*/
+
+/* pxDelayedTaskList and pxOverflowDelayedTaskList are switched when the tick
+count overflows. */
+#define taskSWITCH_DELAYED_LISTS()																	\
+{																									\
+	List_t *pxTemp;																					\
+																									\
+	/* The delayed tasks list should be empty when the lists are switched. */						\
+	configASSERT( ( listLIST_IS_EMPTY( pxDelayedTaskList ) ) );										\
+																									\
+	pxTemp = pxDelayedTaskList;																		\
+	pxDelayedTaskList = pxOverflowDelayedTaskList;													\
+	pxOverflowDelayedTaskList = pxTemp;																\
+	xNumOfOverflows++;																				\
+	prvResetNextTaskUnblockTime();																	\
+}
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Place the task represented by pxTCB into the appropriate ready list for
+ * the task.  It is inserted at the end of the list.
+ */
+#define prvAddTaskToReadyList( pxTCB )																\
+	traceMOVED_TASK_TO_READY_STATE( pxTCB );														\
+	taskRECORD_READY_PRIORITY( ( pxTCB )->uxPriority );												\
+	vListInsertEnd( &( pxReadyTasksLists[ ( pxTCB )->uxPriority ] ), &( ( pxTCB )->xStateListItem ) ); \
+	tracePOST_MOVED_TASK_TO_READY_STATE( pxTCB )
+/*-----------------------------------------------------------*/
+
+/*
+ * Several functions take an TaskHandle_t parameter that can optionally be NULL,
+ * where NULL is used to indicate that the handle of the currently executing
+ * task should be used in place of the parameter.  This macro simply checks to
+ * see if the parameter is NULL and returns a pointer to the appropriate TCB.
+ */
+#define prvGetTCBFromHandle( pxHandle ) ( ( ( pxHandle ) == NULL ) ? pxCurrentTCB : ( pxHandle ) )
+
+/* The item value of the event list item is normally used to hold the priority
+of the task to which it belongs (coded to allow it to be held in reverse
+priority order).  However, it is occasionally borrowed for other purposes.  It
+is important its value is not updated due to a task priority change while it is
+being used for another purpose.  The following bit definition is used to inform
+the scheduler that the value should not be changed - in which case it is the
+responsibility of whichever module is using the value to ensure it gets set back
+to its original value when it is released. */
+#if( configUSE_16_BIT_TICKS == 1 )
+	#define taskEVENT_LIST_ITEM_VALUE_IN_USE	0x8000U
+#else
+	#define taskEVENT_LIST_ITEM_VALUE_IN_USE	0x80000000UL
+#endif
+
+/*
+ * Task control block.  A task control block (TCB) is allocated for each task,
+ * and stores task state information, including a pointer to the task's context
+ * (the task's run time environment, including register values)
+ */
+typedef struct tskTaskControlBlock 			/* The old naming convention is used to prevent breaking kernel aware debuggers. */
+{
+	volatile StackType_t	*pxTopOfStack;	/*< Points to the location of the last item placed on the tasks stack.  THIS MUST BE THE FIRST MEMBER OF THE TCB STRUCT. */
+
+	#if ( portUSING_MPU_WRAPPERS == 1 )
+		xMPU_SETTINGS	xMPUSettings;		/*< The MPU settings are defined as part of the port layer.  THIS MUST BE THE SECOND MEMBER OF THE TCB STRUCT. */
+	#endif
+
+	ListItem_t			xStateListItem;	/*< The list that the state list item of a task is reference from denotes the state of that task (Ready, Blocked, Suspended ). */
+	ListItem_t			xEventListItem;		/*< Used to reference a task from an event list. */
+	UBaseType_t			uxPriority;			/*< The priority of the task.  0 is the lowest priority. */
+	StackType_t			*pxStack;			/*< Points to the start of the stack. */
+	char				pcTaskName[ configMAX_TASK_NAME_LEN ];/*< Descriptive name given to the task when created.  Facilitates debugging only. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+
+	#if ( ( portSTACK_GROWTH > 0 ) || ( configRECORD_STACK_HIGH_ADDRESS == 1 ) )
+		StackType_t		*pxEndOfStack;		/*< Points to the highest valid address for the stack. */
+	#endif
+
+	#if ( portCRITICAL_NESTING_IN_TCB == 1 )
+		UBaseType_t		uxCriticalNesting;	/*< Holds the critical section nesting depth for ports that do not maintain their own count in the port layer. */
+	#endif
+
+	#if ( configUSE_TRACE_FACILITY == 1 )
+		UBaseType_t		uxTCBNumber;		/*< Stores a number that increments each time a TCB is created.  It allows debuggers to determine when a task has been deleted and then recreated. */
+		UBaseType_t		uxTaskNumber;		/*< Stores a number specifically for use by third party trace code. */
+	#endif
+
+	#if ( configUSE_MUTEXES == 1 )
+		UBaseType_t		uxBasePriority;		/*< The priority last assigned to the task - used by the priority inheritance mechanism. */
+		UBaseType_t		uxMutexesHeld;
+	#endif
+
+	#if ( configUSE_APPLICATION_TASK_TAG == 1 )
+		TaskHookFunction_t pxTaskTag;
+	#endif
+
+	#if( configNUM_THREAD_LOCAL_STORAGE_POINTERS > 0 )
+		void			*pvThreadLocalStoragePointers[ configNUM_THREAD_LOCAL_STORAGE_POINTERS ];
+	#endif
+
+	#if( configGENERATE_RUN_TIME_STATS == 1 )
+		uint32_t		ulRunTimeCounter;	/*< Stores the amount of time the task has spent in the Running state. */
+	#endif
+
+	#if ( configUSE_NEWLIB_REENTRANT == 1 )
+		/* Allocate a Newlib reent structure that is specific to this task.
+		Note Newlib support has been included by popular demand, but is not
+		used by the FreeRTOS maintainers themselves.  FreeRTOS is not
+		responsible for resulting newlib operation.  User must be familiar with
+		newlib and must provide system-wide implementations of the necessary
+		stubs. Be warned that (at the time of writing) the current newlib design
+		implements a system-wide malloc() that must be provided with locks. */
+		struct	_reent xNewLib_reent;
+	#endif
+
+	#if( configUSE_TASK_NOTIFICATIONS == 1 )
+		volatile uint32_t ulNotifiedValue;
+		volatile uint8_t ucNotifyState;
+	#endif
+
+	/* See the comments in FreeRTOS.h with the definition of
+	tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE. */
+	#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
+		uint8_t	ucStaticallyAllocated; 		/*< Set to pdTRUE if the task is a statically allocated to ensure no attempt is made to free the memory. */
+	#endif
+
+	#if( INCLUDE_xTaskAbortDelay == 1 )
+		uint8_t ucDelayAborted;
+	#endif
+
+	#if( configUSE_POSIX_ERRNO == 1 )
+		int iTaskErrno;
+	#endif
+
+} tskTCB;
+
+/* The old tskTCB name is maintained above then typedefed to the new TCB_t name
+below to enable the use of older kernel aware debuggers. */
+typedef tskTCB TCB_t;
+
+/*lint -save -e956 A manual analysis and inspection has been used to determine
+which static variables must be declared volatile. */
+PRIVILEGED_DATA TCB_t * volatile pxCurrentTCB = NULL;
+
+/* Lists for ready and blocked tasks. --------------------
+xDelayedTaskList1 and xDelayedTaskList2 could be move to function scople but
+doing so breaks some kernel aware debuggers and debuggers that rely on removing
+the static qualifier. */
+PRIVILEGED_DATA static List_t pxReadyTasksLists[ configMAX_PRIORITIES ];/*< Prioritised ready tasks. */
+PRIVILEGED_DATA static List_t xDelayedTaskList1;						/*< Delayed tasks. */
+PRIVILEGED_DATA static List_t xDelayedTaskList2;						/*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */
+PRIVILEGED_DATA static List_t * volatile pxDelayedTaskList;				/*< Points to the delayed task list currently being used. */
+PRIVILEGED_DATA static List_t * volatile pxOverflowDelayedTaskList;		/*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */
+PRIVILEGED_DATA static List_t xPendingReadyList;						/*< Tasks that have been readied while the scheduler was suspended.  They will be moved to the ready list when the scheduler is resumed. */
+
+#if( INCLUDE_vTaskDelete == 1 )
+
+	PRIVILEGED_DATA static List_t xTasksWaitingTermination;				/*< Tasks that have been deleted - but their memory not yet freed. */
+	PRIVILEGED_DATA static volatile UBaseType_t uxDeletedTasksWaitingCleanUp = ( UBaseType_t ) 0U;
+
+#endif
+
+#if ( INCLUDE_vTaskSuspend == 1 )
+
+	PRIVILEGED_DATA static List_t xSuspendedTaskList;					/*< Tasks that are currently suspended. */
+
+#endif
+
+/* Global POSIX errno. Its value is changed upon context switching to match
+the errno of the currently running task. */
+#if ( configUSE_POSIX_ERRNO == 1 )
+	int FreeRTOS_errno = 0;
+#endif
+
+/* Other file private variables. --------------------------------*/
+PRIVILEGED_DATA static volatile UBaseType_t uxCurrentNumberOfTasks 	= ( UBaseType_t ) 0U;
+PRIVILEGED_DATA static volatile TickType_t xTickCount 				= ( TickType_t ) configINITIAL_TICK_COUNT;
+PRIVILEGED_DATA static volatile UBaseType_t uxTopReadyPriority 		= tskIDLE_PRIORITY;
+PRIVILEGED_DATA static volatile BaseType_t xSchedulerRunning 		= pdFALSE;
+PRIVILEGED_DATA static volatile TickType_t xPendedTicks 			= ( TickType_t ) 0U;
+PRIVILEGED_DATA static volatile BaseType_t xYieldPending 			= pdFALSE;
+PRIVILEGED_DATA static volatile BaseType_t xNumOfOverflows 			= ( BaseType_t ) 0;
+PRIVILEGED_DATA static UBaseType_t uxTaskNumber 					= ( UBaseType_t ) 0U;
+PRIVILEGED_DATA static volatile TickType_t xNextTaskUnblockTime		= ( TickType_t ) 0U; /* Initialised to portMAX_DELAY before the scheduler starts. */
+PRIVILEGED_DATA static TaskHandle_t xIdleTaskHandle					= NULL;			/*< Holds the handle of the idle task.  The idle task is created automatically when the scheduler is started. */
+
+/* Context switches are held pending while the scheduler is suspended.  Also,
+interrupts must not manipulate the xStateListItem of a TCB, or any of the
+lists the xStateListItem can be referenced from, if the scheduler is suspended.
+If an interrupt needs to unblock a task while the scheduler is suspended then it
+moves the task's event list item into the xPendingReadyList, ready for the
+kernel to move the task from the pending ready list into the real ready list
+when the scheduler is unsuspended.  The pending ready list itself can only be
+accessed from a critical section. */
+PRIVILEGED_DATA static volatile UBaseType_t uxSchedulerSuspended	= ( UBaseType_t ) pdFALSE;
+
+#if ( configGENERATE_RUN_TIME_STATS == 1 )
+
+	/* Do not move these variables to function scope as doing so prevents the
+	code working with debuggers that need to remove the static qualifier. */
+	PRIVILEGED_DATA static uint32_t ulTaskSwitchedInTime = 0UL;	/*< Holds the value of a timer/counter the last time a task was switched in. */
+	PRIVILEGED_DATA static uint32_t ulTotalRunTime = 0UL;		/*< Holds the total amount of execution time as defined by the run time counter clock. */
+
+#endif
+
+/*lint -restore */
+
+/*-----------------------------------------------------------*/
+
+/* Callback function prototypes. --------------------------*/
+#if(  configCHECK_FOR_STACK_OVERFLOW > 0 )
+
+	extern void vApplicationStackOverflowHook( TaskHandle_t xTask, char *pcTaskName );
+
+#endif
+
+#if( configUSE_TICK_HOOK > 0 )
+
+	extern void vApplicationTickHook( void ); /*lint !e526 Symbol not defined as it is an application callback. */
+
+#endif
+
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+
+	extern void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize ); /*lint !e526 Symbol not defined as it is an application callback. */
+
+#endif
+
+/* File private functions. --------------------------------*/
+
+/**
+ * Utility task that simply returns pdTRUE if the task referenced by xTask is
+ * currently in the Suspended state, or pdFALSE if the task referenced by xTask
+ * is in any other state.
+ */
+#if ( INCLUDE_vTaskSuspend == 1 )
+
+	static BaseType_t prvTaskIsTaskSuspended( const TaskHandle_t xTask ) PRIVILEGED_FUNCTION;
+
+#endif /* INCLUDE_vTaskSuspend */
+
+/*
+ * Utility to ready all the lists used by the scheduler.  This is called
+ * automatically upon the creation of the first task.
+ */
+static void prvInitialiseTaskLists( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * The idle task, which as all tasks is implemented as a never ending loop.
+ * The idle task is automatically created and added to the ready lists upon
+ * creation of the first user task.
+ *
+ * The portTASK_FUNCTION_PROTO() macro is used to allow port/compiler specific
+ * language extensions.  The equivalent prototype for this function is:
+ *
+ * void prvIdleTask( void *pvParameters );
+ *
+ */
+static portTASK_FUNCTION_PROTO( prvIdleTask, pvParameters );
+
+/*
+ * Utility to free all memory allocated by the scheduler to hold a TCB,
+ * including the stack pointed to by the TCB.
+ *
+ * This does not free memory allocated by the task itself (i.e. memory
+ * allocated by calls to pvPortMalloc from within the tasks application code).
+ */
+#if ( INCLUDE_vTaskDelete == 1 )
+
+	static void prvDeleteTCB( TCB_t *pxTCB ) PRIVILEGED_FUNCTION;
+
+#endif
+
+/*
+ * Used only by the idle task.  This checks to see if anything has been placed
+ * in the list of tasks waiting to be deleted.  If so the task is cleaned up
+ * and its TCB deleted.
+ */
+static void prvCheckTasksWaitingTermination( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * The currently executing task is entering the Blocked state.  Add the task to
+ * either the current or the overflow delayed task list.
+ */
+static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely ) PRIVILEGED_FUNCTION;
+
+/*
+ * Fills an TaskStatus_t structure with information on each task that is
+ * referenced from the pxList list (which may be a ready list, a delayed list,
+ * a suspended list, etc.).
+ *
+ * THIS FUNCTION IS INTENDED FOR DEBUGGING ONLY, AND SHOULD NOT BE CALLED FROM
+ * NORMAL APPLICATION CODE.
+ */
+#if ( configUSE_TRACE_FACILITY == 1 )
+
+	static UBaseType_t prvListTasksWithinSingleList( TaskStatus_t *pxTaskStatusArray, List_t *pxList, eTaskState eState ) PRIVILEGED_FUNCTION;
+
+#endif
+
+/*
+ * Searches pxList for a task with name pcNameToQuery - returning a handle to
+ * the task if it is found, or NULL if the task is not found.
+ */
+#if ( INCLUDE_xTaskGetHandle == 1 )
+
+	static TCB_t *prvSearchForNameWithinSingleList( List_t *pxList, const char pcNameToQuery[] ) PRIVILEGED_FUNCTION;
+
+#endif
+
+/*
+ * When a task is created, the stack of the task is filled with a known value.
+ * This function determines the 'high water mark' of the task stack by
+ * determining how much of the stack remains at the original preset value.
+ */
+#if ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) )
+
+	static configSTACK_DEPTH_TYPE prvTaskCheckFreeStackSpace( const uint8_t * pucStackByte ) PRIVILEGED_FUNCTION;
+
+#endif
+
+/*
+ * Return the amount of time, in ticks, that will pass before the kernel will
+ * next move a task from the Blocked state to the Running state.
+ *
+ * This conditional compilation should use inequality to 0, not equality to 1.
+ * This is to ensure portSUPPRESS_TICKS_AND_SLEEP() can be called when user
+ * defined low power mode implementations require configUSE_TICKLESS_IDLE to be
+ * set to a value other than 1.
+ */
+#if ( configUSE_TICKLESS_IDLE != 0 )
+
+	static TickType_t prvGetExpectedIdleTime( void ) PRIVILEGED_FUNCTION;
+
+#endif
+
+/*
+ * Set xNextTaskUnblockTime to the time at which the next Blocked state task
+ * will exit the Blocked state.
+ */
+static void prvResetNextTaskUnblockTime( void );
+
+#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )
+
+	/*
+	 * Helper function used to pad task names with spaces when printing out
+	 * human readable tables of task information.
+	 */
+	static char *prvWriteNameToBuffer( char *pcBuffer, const char *pcTaskName ) PRIVILEGED_FUNCTION;
+
+#endif
+
+/*
+ * Called after a Task_t structure has been allocated either statically or
+ * dynamically to fill in the structure's members.
+ */
+static void prvInitialiseNewTask( 	TaskFunction_t pxTaskCode,
+									const char * const pcName, 		/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+									const uint32_t ulStackDepth,
+									void * const pvParameters,
+									UBaseType_t uxPriority,
+									TaskHandle_t * const pxCreatedTask,
+									TCB_t *pxNewTCB,
+									const MemoryRegion_t * const xRegions ) PRIVILEGED_FUNCTION;
+
+/*
+ * Called after a new task has been created and initialised to place the task
+ * under the control of the scheduler.
+ */
+static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB ) PRIVILEGED_FUNCTION;
+
+/*
+ * freertos_tasks_c_additions_init() should only be called if the user definable
+ * macro FREERTOS_TASKS_C_ADDITIONS_INIT() is defined, as that is the only macro
+ * called by the function.
+ */
+#ifdef FREERTOS_TASKS_C_ADDITIONS_INIT
+
+	static void freertos_tasks_c_additions_init( void ) PRIVILEGED_FUNCTION;
+
+#endif
+
+/*-----------------------------------------------------------*/
+
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+
+	TaskHandle_t xTaskCreateStatic(	TaskFunction_t pxTaskCode,
+									const char * const pcName,		/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+									const uint32_t ulStackDepth,
+									void * const pvParameters,
+									UBaseType_t uxPriority,
+									StackType_t * const puxStackBuffer,
+									StaticTask_t * const pxTaskBuffer )
+	{
+	TCB_t *pxNewTCB;
+	TaskHandle_t xReturn;
+
+		configASSERT( puxStackBuffer != NULL );
+		configASSERT( pxTaskBuffer != NULL );
+
+		#if( configASSERT_DEFINED == 1 )
+		{
+			/* Sanity check that the size of the structure used to declare a
+			variable of type StaticTask_t equals the size of the real task
+			structure. */
+			volatile size_t xSize = sizeof( StaticTask_t );
+			configASSERT( xSize == sizeof( TCB_t ) );
+			( void ) xSize; /* Prevent lint warning when configASSERT() is not used. */
+		}
+		#endif /* configASSERT_DEFINED */
+
+
+		if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) )
+		{
+			/* The memory used for the task's TCB and stack are passed into this
+			function - use them. */
+			pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
+			pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
+
+			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
+			{
+				/* Tasks can be created statically or dynamically, so note this
+				task was created statically in case the task is later deleted. */
+				pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
+			}
+			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
+
+			prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL );
+			prvAddNewTaskToReadyList( pxNewTCB );
+		}
+		else
+		{
+			xReturn = NULL;
+		}
+
+		return xReturn;
+	}
+
+#endif /* SUPPORT_STATIC_ALLOCATION */
+/*-----------------------------------------------------------*/
+
+#if( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) )
+
+	BaseType_t xTaskCreateRestrictedStatic( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask )
+	{
+	TCB_t *pxNewTCB;
+	BaseType_t xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
+
+		configASSERT( pxTaskDefinition->puxStackBuffer != NULL );
+		configASSERT( pxTaskDefinition->pxTaskBuffer != NULL );
+
+		if( ( pxTaskDefinition->puxStackBuffer != NULL ) && ( pxTaskDefinition->pxTaskBuffer != NULL ) )
+		{
+			/* Allocate space for the TCB.  Where the memory comes from depends
+			on the implementation of the port malloc function and whether or
+			not static allocation is being used. */
+			pxNewTCB = ( TCB_t * ) pxTaskDefinition->pxTaskBuffer;
+
+			/* Store the stack location in the TCB. */
+			pxNewTCB->pxStack = pxTaskDefinition->puxStackBuffer;
+
+			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 )
+			{
+				/* Tasks can be created statically or dynamically, so note this
+				task was created statically in case the task is later deleted. */
+				pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB;
+			}
+			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
+
+			prvInitialiseNewTask(	pxTaskDefinition->pvTaskCode,
+									pxTaskDefinition->pcName,
+									( uint32_t ) pxTaskDefinition->usStackDepth,
+									pxTaskDefinition->pvParameters,
+									pxTaskDefinition->uxPriority,
+									pxCreatedTask, pxNewTCB,
+									pxTaskDefinition->xRegions );
+
+			prvAddNewTaskToReadyList( pxNewTCB );
+			xReturn = pdPASS;
+		}
+
+		return xReturn;
+	}
+
+#endif /* ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) */
+/*-----------------------------------------------------------*/
+
+#if( ( portUSING_MPU_WRAPPERS == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+
+	BaseType_t xTaskCreateRestricted( const TaskParameters_t * const pxTaskDefinition, TaskHandle_t *pxCreatedTask )
+	{
+	TCB_t *pxNewTCB;
+	BaseType_t xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
+
+		configASSERT( pxTaskDefinition->puxStackBuffer );
+
+		if( pxTaskDefinition->puxStackBuffer != NULL )
+		{
+			/* Allocate space for the TCB.  Where the memory comes from depends
+			on the implementation of the port malloc function and whether or
+			not static allocation is being used. */
+			pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) );
+
+			if( pxNewTCB != NULL )
+			{
+				/* Store the stack location in the TCB. */
+				pxNewTCB->pxStack = pxTaskDefinition->puxStackBuffer;
+
+				#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 )
+				{
+					/* Tasks can be created statically or dynamically, so note
+					this task had a statically allocated stack in case it is
+					later deleted.  The TCB was allocated dynamically. */
+					pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_ONLY;
+				}
+				#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
+
+				prvInitialiseNewTask(	pxTaskDefinition->pvTaskCode,
+										pxTaskDefinition->pcName,
+										( uint32_t ) pxTaskDefinition->usStackDepth,
+										pxTaskDefinition->pvParameters,
+										pxTaskDefinition->uxPriority,
+										pxCreatedTask, pxNewTCB,
+										pxTaskDefinition->xRegions );
+
+				prvAddNewTaskToReadyList( pxNewTCB );
+				xReturn = pdPASS;
+			}
+		}
+
+		return xReturn;
+	}
+
+#endif /* portUSING_MPU_WRAPPERS */
+/*-----------------------------------------------------------*/
+
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+
+	BaseType_t xTaskCreate(	TaskFunction_t pxTaskCode,
+							const char * const pcName,		/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+							const configSTACK_DEPTH_TYPE usStackDepth,
+							void * const pvParameters,
+							UBaseType_t uxPriority,
+							TaskHandle_t * const pxCreatedTask )
+	{
+	TCB_t *pxNewTCB;
+	BaseType_t xReturn;
+
+		/* If the stack grows down then allocate the stack then the TCB so the stack
+		does not grow into the TCB.  Likewise if the stack grows up then allocate
+		the TCB then the stack. */
+		#if( portSTACK_GROWTH > 0 )
+		{
+			/* Allocate space for the TCB.  Where the memory comes from depends on
+			the implementation of the port malloc function and whether or not static
+			allocation is being used. */
+			pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) );
+
+			if( pxNewTCB != NULL )
+			{
+				/* Allocate space for the stack used by the task being created.
+				The base of the stack memory stored in the TCB so the task can
+				be deleted later if required. */
+				pxNewTCB->pxStack = ( StackType_t * ) pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+
+				if( pxNewTCB->pxStack == NULL )
+				{
+					/* Could not allocate the stack.  Delete the allocated TCB. */
+					vPortFree( pxNewTCB );
+					pxNewTCB = NULL;
+				}
+			}
+		}
+		#else /* portSTACK_GROWTH */
+		{
+		StackType_t *pxStack;
+
+			/* Allocate space for the stack used by the task being created. */
+			pxStack = pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */
+
+			if( pxStack != NULL )
+			{
+				/* Allocate space for the TCB. */
+				pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */
+
+				if( pxNewTCB != NULL )
+				{
+					/* Store the stack location in the TCB. */
+					pxNewTCB->pxStack = pxStack;
+				}
+				else
+				{
+					/* The stack cannot be used as the TCB was not created.  Free
+					it again. */
+					vPortFree( pxStack );
+				}
+			}
+			else
+			{
+				pxNewTCB = NULL;
+			}
+		}
+		#endif /* portSTACK_GROWTH */
+
+		if( pxNewTCB != NULL )
+		{
+			#if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e9029 !e731 Macro has been consolidated for readability reasons. */
+			{
+				/* Tasks can be created statically or dynamically, so note this
+				task was created dynamically in case it is later deleted. */
+				pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB;
+			}
+			#endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */
+
+			prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL );
+			prvAddNewTaskToReadyList( pxNewTCB );
+			xReturn = pdPASS;
+		}
+		else
+		{
+			xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY;
+		}
+
+		return xReturn;
+	}
+
+#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
+/*-----------------------------------------------------------*/
+
+static void prvInitialiseNewTask( 	TaskFunction_t pxTaskCode,
+									const char * const pcName,		/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+									const uint32_t ulStackDepth,
+									void * const pvParameters,
+									UBaseType_t uxPriority,
+									TaskHandle_t * const pxCreatedTask,
+									TCB_t *pxNewTCB,
+									const MemoryRegion_t * const xRegions )
+{
+StackType_t *pxTopOfStack;
+UBaseType_t x;
+
+	#if( portUSING_MPU_WRAPPERS == 1 )
+		/* Should the task be created in privileged mode? */
+		BaseType_t xRunPrivileged;
+		if( ( uxPriority & portPRIVILEGE_BIT ) != 0U )
+		{
+			xRunPrivileged = pdTRUE;
+		}
+		else
+		{
+			xRunPrivileged = pdFALSE;
+		}
+		uxPriority &= ~portPRIVILEGE_BIT;
+	#endif /* portUSING_MPU_WRAPPERS == 1 */
+
+	/* Avoid dependency on memset() if it is not required. */
+	#if( tskSET_NEW_STACKS_TO_KNOWN_VALUE == 1 )
+	{
+		/* Fill the stack with a known value to assist debugging. */
+		( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) ulStackDepth * sizeof( StackType_t ) );
+	}
+	#endif /* tskSET_NEW_STACKS_TO_KNOWN_VALUE */
+
+	/* Calculate the top of stack address.  This depends on whether the stack
+	grows from high memory to low (as per the 80x86) or vice versa.
+	portSTACK_GROWTH is used to make the result positive or negative as required
+	by the port. */
+	#if( portSTACK_GROWTH < 0 )
+	{
+		pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] );
+		pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception.  Avoiding casts between pointers and integers is not practical.  Size differences accounted for using portPOINTER_SIZE_TYPE type.  Checked by assert(). */
+
+		/* Check the alignment of the calculated top of stack is correct. */
+		configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
+
+		#if( configRECORD_STACK_HIGH_ADDRESS == 1 )
+		{
+			/* Also record the stack's high address, which may assist
+			debugging. */
+			pxNewTCB->pxEndOfStack = pxTopOfStack;
+		}
+		#endif /* configRECORD_STACK_HIGH_ADDRESS */
+	}
+	#else /* portSTACK_GROWTH */
+	{
+		pxTopOfStack = pxNewTCB->pxStack;
+
+		/* Check the alignment of the stack buffer is correct. */
+		configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxNewTCB->pxStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) );
+
+		/* The other extreme of the stack space is required if stack checking is
+		performed. */
+		pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
+	}
+	#endif /* portSTACK_GROWTH */
+
+	/* Store the task name in the TCB. */
+	if( pcName != NULL )
+	{
+		for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
+		{
+			pxNewTCB->pcTaskName[ x ] = pcName[ x ];
+
+			/* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
+			configMAX_TASK_NAME_LEN characters just in case the memory after the
+			string is not accessible (extremely unlikely). */
+			if( pcName[ x ] == ( char ) 0x00 )
+			{
+				break;
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+
+		/* Ensure the name string is terminated in the case that the string length
+		was greater or equal to configMAX_TASK_NAME_LEN. */
+		pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
+	}
+	else
+	{
+		/* The task has not been given a name, so just ensure there is a NULL
+		terminator when it is read out. */
+		pxNewTCB->pcTaskName[ 0 ] = 0x00;
+	}
+
+	/* This is used as an array index so must ensure it's not too large.  First
+	remove the privilege bit if one is present. */
+	if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
+	{
+		uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	pxNewTCB->uxPriority = uxPriority;
+	#if ( configUSE_MUTEXES == 1 )
+	{
+		pxNewTCB->uxBasePriority = uxPriority;
+		pxNewTCB->uxMutexesHeld = 0;
+	}
+	#endif /* configUSE_MUTEXES */
+
+	vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
+	vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
+
+	/* Set the pxNewTCB as a link back from the ListItem_t.  This is so we can get
+	back to	the containing TCB from a generic item in a list. */
+	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
+
+	/* Event lists are always in priority order. */
+	listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+	listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
+
+	#if ( portCRITICAL_NESTING_IN_TCB == 1 )
+	{
+		pxNewTCB->uxCriticalNesting = ( UBaseType_t ) 0U;
+	}
+	#endif /* portCRITICAL_NESTING_IN_TCB */
+
+	#if ( configUSE_APPLICATION_TASK_TAG == 1 )
+	{
+		pxNewTCB->pxTaskTag = NULL;
+	}
+	#endif /* configUSE_APPLICATION_TASK_TAG */
+
+	#if ( configGENERATE_RUN_TIME_STATS == 1 )
+	{
+		pxNewTCB->ulRunTimeCounter = 0UL;
+	}
+	#endif /* configGENERATE_RUN_TIME_STATS */
+
+	#if ( portUSING_MPU_WRAPPERS == 1 )
+	{
+		vPortStoreTaskMPUSettings( &( pxNewTCB->xMPUSettings ), xRegions, pxNewTCB->pxStack, ulStackDepth );
+	}
+	#else
+	{
+		/* Avoid compiler warning about unreferenced parameter. */
+		( void ) xRegions;
+	}
+	#endif
+
+	#if( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )
+	{
+		for( x = 0; x < ( UBaseType_t ) configNUM_THREAD_LOCAL_STORAGE_POINTERS; x++ )
+		{
+			pxNewTCB->pvThreadLocalStoragePointers[ x ] = NULL;
+		}
+	}
+	#endif
+
+	#if ( configUSE_TASK_NOTIFICATIONS == 1 )
+	{
+		pxNewTCB->ulNotifiedValue = 0;
+		pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
+	}
+	#endif
+
+	#if ( configUSE_NEWLIB_REENTRANT == 1 )
+	{
+		/* Initialise this task's Newlib reent structure. */
+		_REENT_INIT_PTR( ( &( pxNewTCB->xNewLib_reent ) ) );
+	}
+	#endif
+
+	#if( INCLUDE_xTaskAbortDelay == 1 )
+	{
+		pxNewTCB->ucDelayAborted = pdFALSE;
+	}
+	#endif
+
+	/* Initialize the TCB stack to look as if the task was already running,
+	but had been interrupted by the scheduler.  The return address is set
+	to the start of the task function. Once the stack has been initialised
+	the top of stack variable is updated. */
+	#if( portUSING_MPU_WRAPPERS == 1 )
+	{
+		/* If the port has capability to detect stack overflow,
+		pass the stack end address to the stack initialization
+		function as well. */
+		#if( portHAS_STACK_OVERFLOW_CHECKING == 1 )
+		{
+			#if( portSTACK_GROWTH < 0 )
+			{
+				pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxNewTCB->pxStack, pxTaskCode, pvParameters, xRunPrivileged );
+			}
+			#else /* portSTACK_GROWTH */
+			{
+				pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxNewTCB->pxEndOfStack, pxTaskCode, pvParameters, xRunPrivileged );
+			}
+			#endif /* portSTACK_GROWTH */
+		}
+		#else /* portHAS_STACK_OVERFLOW_CHECKING */
+		{
+			pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters, xRunPrivileged );
+		}
+		#endif /* portHAS_STACK_OVERFLOW_CHECKING */
+	}
+	#else /* portUSING_MPU_WRAPPERS */
+	{
+		/* If the port has capability to detect stack overflow,
+		pass the stack end address to the stack initialization
+		function as well. */
+		#if( portHAS_STACK_OVERFLOW_CHECKING == 1 )
+		{
+			#if( portSTACK_GROWTH < 0 )
+			{
+				pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxNewTCB->pxStack, pxTaskCode, pvParameters );
+			}
+			#else /* portSTACK_GROWTH */
+			{
+				pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxNewTCB->pxEndOfStack, pxTaskCode, pvParameters );
+			}
+			#endif /* portSTACK_GROWTH */
+		}
+		#else /* portHAS_STACK_OVERFLOW_CHECKING */
+		{
+			pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
+		}
+		#endif /* portHAS_STACK_OVERFLOW_CHECKING */
+	}
+	#endif /* portUSING_MPU_WRAPPERS */
+
+	if( pxCreatedTask != NULL )
+	{
+		/* Pass the handle out in an anonymous way.  The handle can be used to
+		change the created task's priority, delete the created task, etc.*/
+		*pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+}
+/*-----------------------------------------------------------*/
+
+static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB )
+{
+	/* Ensure interrupts don't access the task lists while the lists are being
+	updated. */
+	taskENTER_CRITICAL();
+	{
+		uxCurrentNumberOfTasks++;
+		if( pxCurrentTCB == NULL )
+		{
+			/* There are no other tasks, or all the other tasks are in
+			the suspended state - make this the current task. */
+			pxCurrentTCB = pxNewTCB;
+
+			if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
+			{
+				/* This is the first task to be created so do the preliminary
+				initialisation required.  We will not recover if this call
+				fails, but we will report the failure. */
+				prvInitialiseTaskLists();
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		else
+		{
+			/* If the scheduler is not already running, make this task the
+			current task if it is the highest priority task to be created
+			so far. */
+			if( xSchedulerRunning == pdFALSE )
+			{
+				if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
+				{
+					pxCurrentTCB = pxNewTCB;
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+
+		uxTaskNumber++;
+
+		#if ( configUSE_TRACE_FACILITY == 1 )
+		{
+			/* Add a counter into the TCB for tracing only. */
+			pxNewTCB->uxTCBNumber = uxTaskNumber;
+		}
+		#endif /* configUSE_TRACE_FACILITY */
+		traceTASK_CREATE( pxNewTCB );
+
+		prvAddTaskToReadyList( pxNewTCB );
+
+		portSETUP_TCB( pxNewTCB );
+	}
+	taskEXIT_CRITICAL();
+
+	if( xSchedulerRunning != pdFALSE )
+	{
+		/* If the created task is of a higher priority than the current task
+		then it should run now. */
+		if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
+		{
+			taskYIELD_IF_USING_PREEMPTION();
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+}
+/*-----------------------------------------------------------*/
+
+#if ( INCLUDE_vTaskDelete == 1 )
+
+	void vTaskDelete( TaskHandle_t xTaskToDelete )
+	{
+	TCB_t *pxTCB;
+
+		taskENTER_CRITICAL();
+		{
+			/* If null is passed in here then it is the calling task that is
+			being deleted. */
+			pxTCB = prvGetTCBFromHandle( xTaskToDelete );
+
+			/* Remove task from the ready/delayed list. */
+			if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+			{
+				taskRESET_READY_PRIORITY( pxTCB->uxPriority );
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+
+			/* Is the task waiting on an event also? */
+			if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
+			{
+				( void ) uxListRemove( &( pxTCB->xEventListItem ) );
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+
+			/* Increment the uxTaskNumber also so kernel aware debuggers can
+			detect that the task lists need re-generating.  This is done before
+			portPRE_TASK_DELETE_HOOK() as in the Windows port that macro will
+			not return. */
+			uxTaskNumber++;
+
+			if( pxTCB == pxCurrentTCB )
+			{
+				/* A task is deleting itself.  This cannot complete within the
+				task itself, as a context switch to another task is required.
+				Place the task in the termination list.  The idle task will
+				check the termination list and free up any memory allocated by
+				the scheduler for the TCB and stack of the deleted task. */
+				vListInsertEnd( &xTasksWaitingTermination, &( pxTCB->xStateListItem ) );
+
+				/* Increment the ucTasksDeleted variable so the idle task knows
+				there is a task that has been deleted and that it should therefore
+				check the xTasksWaitingTermination list. */
+				++uxDeletedTasksWaitingCleanUp;
+
+				/* Call the delete hook before portPRE_TASK_DELETE_HOOK() as
+				portPRE_TASK_DELETE_HOOK() does not return in the Win32 port. */
+				traceTASK_DELETE( pxTCB );
+
+				/* The pre-delete hook is primarily for the Windows simulator,
+				in which Windows specific clean up operations are performed,
+				after which it is not possible to yield away from this task -
+				hence xYieldPending is used to latch that a context switch is
+				required. */
+				portPRE_TASK_DELETE_HOOK( pxTCB, &xYieldPending );
+			}
+			else
+			{
+				--uxCurrentNumberOfTasks;
+				prvDeleteTCB( pxTCB );
+
+				/* Reset the next expected unblock time in case it referred to
+				the task that has just been deleted. */
+				prvResetNextTaskUnblockTime();
+				traceTASK_DELETE( pxTCB );
+			}
+		}
+		taskEXIT_CRITICAL();
+
+		/* Force a reschedule if it is the currently running task that has just
+		been deleted. */
+		if( xSchedulerRunning != pdFALSE )
+		{
+			if( pxTCB == pxCurrentTCB )
+			{
+				configASSERT( uxSchedulerSuspended == 0 );
+				portYIELD_WITHIN_API();
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+	}
+
+#endif /* INCLUDE_vTaskDelete */
+/*-----------------------------------------------------------*/
+
+#if ( INCLUDE_vTaskDelayUntil == 1 )
+
+	void vTaskDelayUntil( TickType_t * const pxPreviousWakeTime, const TickType_t xTimeIncrement )
+	{
+	TickType_t xTimeToWake;
+	BaseType_t xAlreadyYielded, xShouldDelay = pdFALSE;
+
+		configASSERT( pxPreviousWakeTime );
+		configASSERT( ( xTimeIncrement > 0U ) );
+		configASSERT( uxSchedulerSuspended == 0 );
+
+		vTaskSuspendAll();
+		{
+			/* Minor optimisation.  The tick count cannot change in this
+			block. */
+			const TickType_t xConstTickCount = xTickCount;
+
+			/* Generate the tick time at which the task wants to wake. */
+			xTimeToWake = *pxPreviousWakeTime + xTimeIncrement;
+
+			if( xConstTickCount < *pxPreviousWakeTime )
+			{
+				/* The tick count has overflowed since this function was
+				lasted called.  In this case the only time we should ever
+				actually delay is if the wake time has also	overflowed,
+				and the wake time is greater than the tick time.  When this
+				is the case it is as if neither time had overflowed. */
+				if( ( xTimeToWake < *pxPreviousWakeTime ) && ( xTimeToWake > xConstTickCount ) )
+				{
+					xShouldDelay = pdTRUE;
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				/* The tick time has not overflowed.  In this case we will
+				delay if either the wake time has overflowed, and/or the
+				tick time is less than the wake time. */
+				if( ( xTimeToWake < *pxPreviousWakeTime ) || ( xTimeToWake > xConstTickCount ) )
+				{
+					xShouldDelay = pdTRUE;
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+
+			/* Update the wake time ready for the next call. */
+			*pxPreviousWakeTime = xTimeToWake;
+
+			if( xShouldDelay != pdFALSE )
+			{
+				traceTASK_DELAY_UNTIL( xTimeToWake );
+
+				/* prvAddCurrentTaskToDelayedList() needs the block time, not
+				the time to wake, so subtract the current tick count. */
+				prvAddCurrentTaskToDelayedList( xTimeToWake - xConstTickCount, pdFALSE );
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		xAlreadyYielded = xTaskResumeAll();
+
+		/* Force a reschedule if xTaskResumeAll has not already done so, we may
+		have put ourselves to sleep. */
+		if( xAlreadyYielded == pdFALSE )
+		{
+			portYIELD_WITHIN_API();
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+
+#endif /* INCLUDE_vTaskDelayUntil */
+/*-----------------------------------------------------------*/
+
+#if ( INCLUDE_vTaskDelay == 1 )
+
+	void vTaskDelay( const TickType_t xTicksToDelay )
+	{
+	BaseType_t xAlreadyYielded = pdFALSE;
+
+		/* A delay time of zero just forces a reschedule. */
+		if( xTicksToDelay > ( TickType_t ) 0U )
+		{
+			configASSERT( uxSchedulerSuspended == 0 );
+			vTaskSuspendAll();
+			{
+				traceTASK_DELAY();
+
+				/* A task that is removed from the event list while the
+				scheduler is suspended will not get placed in the ready
+				list or removed from the blocked list until the scheduler
+				is resumed.
+
+				This task cannot be in an event list as it is the currently
+				executing task. */
+				prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE );
+			}
+			xAlreadyYielded = xTaskResumeAll();
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		/* Force a reschedule if xTaskResumeAll has not already done so, we may
+		have put ourselves to sleep. */
+		if( xAlreadyYielded == pdFALSE )
+		{
+			portYIELD_WITHIN_API();
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+
+#endif /* INCLUDE_vTaskDelay */
+/*-----------------------------------------------------------*/
+
+#if( ( INCLUDE_eTaskGetState == 1 ) || ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_xTaskAbortDelay == 1 ) )
+
+	eTaskState eTaskGetState( TaskHandle_t xTask )
+	{
+	eTaskState eReturn;
+	List_t const * pxStateList, *pxDelayedList, *pxOverflowedDelayedList;
+	const TCB_t * const pxTCB = xTask;
+
+		configASSERT( pxTCB );
+
+		if( pxTCB == pxCurrentTCB )
+		{
+			/* The task calling this function is querying its own state. */
+			eReturn = eRunning;
+		}
+		else
+		{
+			taskENTER_CRITICAL();
+			{
+				pxStateList = listLIST_ITEM_CONTAINER( &( pxTCB->xStateListItem ) );
+				pxDelayedList = pxDelayedTaskList;
+				pxOverflowedDelayedList = pxOverflowDelayedTaskList;
+			}
+			taskEXIT_CRITICAL();
+
+			if( ( pxStateList == pxDelayedList ) || ( pxStateList == pxOverflowedDelayedList ) )
+			{
+				/* The task being queried is referenced from one of the Blocked
+				lists. */
+				eReturn = eBlocked;
+			}
+
+			#if ( INCLUDE_vTaskSuspend == 1 )
+				else if( pxStateList == &xSuspendedTaskList )
+				{
+					/* The task being queried is referenced from the suspended
+					list.  Is it genuinely suspended or is it blocked
+					indefinitely? */
+					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL )
+					{
+						#if( configUSE_TASK_NOTIFICATIONS == 1 )
+						{
+							/* The task does not appear on the event list item of
+							and of the RTOS objects, but could still be in the
+							blocked state if it is waiting on its notification
+							rather than waiting on an object. */
+							if( pxTCB->ucNotifyState == taskWAITING_NOTIFICATION )
+							{
+								eReturn = eBlocked;
+							}
+							else
+							{
+								eReturn = eSuspended;
+							}
+						}
+						#else
+						{
+							eReturn = eSuspended;
+						}
+						#endif
+					}
+					else
+					{
+						eReturn = eBlocked;
+					}
+				}
+			#endif
+
+			#if ( INCLUDE_vTaskDelete == 1 )
+				else if( ( pxStateList == &xTasksWaitingTermination ) || ( pxStateList == NULL ) )
+				{
+					/* The task being queried is referenced from the deleted
+					tasks list, or it is not referenced from any lists at
+					all. */
+					eReturn = eDeleted;
+				}
+			#endif
+
+			else /*lint !e525 Negative indentation is intended to make use of pre-processor clearer. */
+			{
+				/* If the task is not in any other state, it must be in the
+				Ready (including pending ready) state. */
+				eReturn = eReady;
+			}
+		}
+
+		return eReturn;
+	} /*lint !e818 xTask cannot be a pointer to const because it is a typedef. */
+
+#endif /* INCLUDE_eTaskGetState */
+/*-----------------------------------------------------------*/
+
+#if ( INCLUDE_uxTaskPriorityGet == 1 )
+
+	UBaseType_t uxTaskPriorityGet( const TaskHandle_t xTask )
+	{
+	TCB_t const *pxTCB;
+	UBaseType_t uxReturn;
+
+		taskENTER_CRITICAL();
+		{
+			/* If null is passed in here then it is the priority of the task
+			that called uxTaskPriorityGet() that is being queried. */
+			pxTCB = prvGetTCBFromHandle( xTask );
+			uxReturn = pxTCB->uxPriority;
+		}
+		taskEXIT_CRITICAL();
+
+		return uxReturn;
+	}
+
+#endif /* INCLUDE_uxTaskPriorityGet */
+/*-----------------------------------------------------------*/
+
+#if ( INCLUDE_uxTaskPriorityGet == 1 )
+
+	UBaseType_t uxTaskPriorityGetFromISR( const TaskHandle_t xTask )
+	{
+	TCB_t const *pxTCB;
+	UBaseType_t uxReturn, uxSavedInterruptState;
+
+		/* RTOS ports that support interrupt nesting have the concept of a
+		maximum	system call (or maximum API call) interrupt priority.
+		Interrupts that are	above the maximum system call priority are keep
+		permanently enabled, even when the RTOS kernel is in a critical section,
+		but cannot make any calls to FreeRTOS API functions.  If configASSERT()
+		is defined in FreeRTOSConfig.h then
+		portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
+		failure if a FreeRTOS API function is called from an interrupt that has
+		been assigned a priority above the configured maximum system call
+		priority.  Only FreeRTOS functions that end in FromISR can be called
+		from interrupts	that have been assigned a priority at or (logically)
+		below the maximum system call interrupt priority.  FreeRTOS maintains a
+		separate interrupt safe API to ensure interrupt entry is as fast and as
+		simple as possible.  More information (albeit Cortex-M specific) is
+		provided on the following link:
+		https://www.freertos.org/RTOS-Cortex-M3-M4.html */
+		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+
+		uxSavedInterruptState = portSET_INTERRUPT_MASK_FROM_ISR();
+		{
+			/* If null is passed in here then it is the priority of the calling
+			task that is being queried. */
+			pxTCB = prvGetTCBFromHandle( xTask );
+			uxReturn = pxTCB->uxPriority;
+		}
+		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptState );
+
+		return uxReturn;
+	}
+
+#endif /* INCLUDE_uxTaskPriorityGet */
+/*-----------------------------------------------------------*/
+
+#if ( INCLUDE_vTaskPrioritySet == 1 )
+
+	void vTaskPrioritySet( TaskHandle_t xTask, UBaseType_t uxNewPriority )
+	{
+	TCB_t *pxTCB;
+	UBaseType_t uxCurrentBasePriority, uxPriorityUsedOnEntry;
+	BaseType_t xYieldRequired = pdFALSE;
+
+		configASSERT( ( uxNewPriority < configMAX_PRIORITIES ) );
+
+		/* Ensure the new priority is valid. */
+		if( uxNewPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
+		{
+			uxNewPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U;
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		taskENTER_CRITICAL();
+		{
+			/* If null is passed in here then it is the priority of the calling
+			task that is being changed. */
+			pxTCB = prvGetTCBFromHandle( xTask );
+
+			traceTASK_PRIORITY_SET( pxTCB, uxNewPriority );
+
+			#if ( configUSE_MUTEXES == 1 )
+			{
+				uxCurrentBasePriority = pxTCB->uxBasePriority;
+			}
+			#else
+			{
+				uxCurrentBasePriority = pxTCB->uxPriority;
+			}
+			#endif
+
+			if( uxCurrentBasePriority != uxNewPriority )
+			{
+				/* The priority change may have readied a task of higher
+				priority than the calling task. */
+				if( uxNewPriority > uxCurrentBasePriority )
+				{
+					if( pxTCB != pxCurrentTCB )
+					{
+						/* The priority of a task other than the currently
+						running task is being raised.  Is the priority being
+						raised above that of the running task? */
+						if( uxNewPriority >= pxCurrentTCB->uxPriority )
+						{
+							xYieldRequired = pdTRUE;
+						}
+						else
+						{
+							mtCOVERAGE_TEST_MARKER();
+						}
+					}
+					else
+					{
+						/* The priority of the running task is being raised,
+						but the running task must already be the highest
+						priority task able to run so no yield is required. */
+					}
+				}
+				else if( pxTCB == pxCurrentTCB )
+				{
+					/* Setting the priority of the running task down means
+					there may now be another task of higher priority that
+					is ready to execute. */
+					xYieldRequired = pdTRUE;
+				}
+				else
+				{
+					/* Setting the priority of any other task down does not
+					require a yield as the running task must be above the
+					new priority of the task being modified. */
+				}
+
+				/* Remember the ready list the task might be referenced from
+				before its uxPriority member is changed so the
+				taskRESET_READY_PRIORITY() macro can function correctly. */
+				uxPriorityUsedOnEntry = pxTCB->uxPriority;
+
+				#if ( configUSE_MUTEXES == 1 )
+				{
+					/* Only change the priority being used if the task is not
+					currently using an inherited priority. */
+					if( pxTCB->uxBasePriority == pxTCB->uxPriority )
+					{
+						pxTCB->uxPriority = uxNewPriority;
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					/* The base priority gets set whatever. */
+					pxTCB->uxBasePriority = uxNewPriority;
+				}
+				#else
+				{
+					pxTCB->uxPriority = uxNewPriority;
+				}
+				#endif
+
+				/* Only reset the event list item value if the value is not
+				being used for anything else. */
+				if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
+				{
+					listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxNewPriority ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+
+				/* If the task is in the blocked or suspended list we need do
+				nothing more than change its priority variable. However, if
+				the task is in a ready list it needs to be removed and placed
+				in the list appropriate to its new priority. */
+				if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
+				{
+					/* The task is currently in its ready list - remove before
+					adding it to it's new ready list.  As we are in a critical
+					section we can do this even if the scheduler is suspended. */
+					if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+					{
+						/* It is known that the task is in its ready list so
+						there is no need to check again and the port level
+						reset macro can be called directly. */
+						portRESET_READY_PRIORITY( uxPriorityUsedOnEntry, uxTopReadyPriority );
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+					prvAddTaskToReadyList( pxTCB );
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+
+				if( xYieldRequired != pdFALSE )
+				{
+					taskYIELD_IF_USING_PREEMPTION();
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+
+				/* Remove compiler warning about unused variables when the port
+				optimised task selection is not being used. */
+				( void ) uxPriorityUsedOnEntry;
+			}
+		}
+		taskEXIT_CRITICAL();
+	}
+
+#endif /* INCLUDE_vTaskPrioritySet */
+/*-----------------------------------------------------------*/
+
+#if ( INCLUDE_vTaskSuspend == 1 )
+
+	void vTaskSuspend( TaskHandle_t xTaskToSuspend )
+	{
+	TCB_t *pxTCB;
+
+		taskENTER_CRITICAL();
+		{
+			/* If null is passed in here then it is the running task that is
+			being suspended. */
+			pxTCB = prvGetTCBFromHandle( xTaskToSuspend );
+
+			traceTASK_SUSPEND( pxTCB );
+
+			/* Remove task from the ready/delayed list and place in the
+			suspended list. */
+			if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+			{
+				taskRESET_READY_PRIORITY( pxTCB->uxPriority );
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+
+			/* Is the task waiting on an event also? */
+			if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
+			{
+				( void ) uxListRemove( &( pxTCB->xEventListItem ) );
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+
+			vListInsertEnd( &xSuspendedTaskList, &( pxTCB->xStateListItem ) );
+
+			#if( configUSE_TASK_NOTIFICATIONS == 1 )
+			{
+				if( pxTCB->ucNotifyState == taskWAITING_NOTIFICATION )
+				{
+					/* The task was blocked to wait for a notification, but is
+					now suspended, so no notification was received. */
+					pxTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
+				}
+			}
+			#endif
+		}
+		taskEXIT_CRITICAL();
+
+		if( xSchedulerRunning != pdFALSE )
+		{
+			/* Reset the next expected unblock time in case it referred to the
+			task that is now in the Suspended state. */
+			taskENTER_CRITICAL();
+			{
+				prvResetNextTaskUnblockTime();
+			}
+			taskEXIT_CRITICAL();
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		if( pxTCB == pxCurrentTCB )
+		{
+			if( xSchedulerRunning != pdFALSE )
+			{
+				/* The current task has just been suspended. */
+				configASSERT( uxSchedulerSuspended == 0 );
+				portYIELD_WITHIN_API();
+			}
+			else
+			{
+				/* The scheduler is not running, but the task that was pointed
+				to by pxCurrentTCB has just been suspended and pxCurrentTCB
+				must be adjusted to point to a different task. */
+				if( listCURRENT_LIST_LENGTH( &xSuspendedTaskList ) == uxCurrentNumberOfTasks ) /*lint !e931 Right has no side effect, just volatile. */
+				{
+					/* No other tasks are ready, so set pxCurrentTCB back to
+					NULL so when the next task is created pxCurrentTCB will
+					be set to point to it no matter what its relative priority
+					is. */
+					pxCurrentTCB = NULL;
+				}
+				else
+				{
+					vTaskSwitchContext();
+				}
+			}
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+
+#endif /* INCLUDE_vTaskSuspend */
+/*-----------------------------------------------------------*/
+
+#if ( INCLUDE_vTaskSuspend == 1 )
+
+	static BaseType_t prvTaskIsTaskSuspended( const TaskHandle_t xTask )
+	{
+	BaseType_t xReturn = pdFALSE;
+	const TCB_t * const pxTCB = xTask;
+
+		/* Accesses xPendingReadyList so must be called from a critical
+		section. */
+
+		/* It does not make sense to check if the calling task is suspended. */
+		configASSERT( xTask );
+
+		/* Is the task being resumed actually in the suspended list? */
+		if( listIS_CONTAINED_WITHIN( &xSuspendedTaskList, &( pxTCB->xStateListItem ) ) != pdFALSE )
+		{
+			/* Has the task already been resumed from within an ISR? */
+			if( listIS_CONTAINED_WITHIN( &xPendingReadyList, &( pxTCB->xEventListItem ) ) == pdFALSE )
+			{
+				/* Is it in the suspended list because it is in the	Suspended
+				state, or because is is blocked with no timeout? */
+				if( listIS_CONTAINED_WITHIN( NULL, &( pxTCB->xEventListItem ) ) != pdFALSE ) /*lint !e961.  The cast is only redundant when NULL is used. */
+				{
+					xReturn = pdTRUE;
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		return xReturn;
+	} /*lint !e818 xTask cannot be a pointer to const because it is a typedef. */
+
+#endif /* INCLUDE_vTaskSuspend */
+/*-----------------------------------------------------------*/
+
+#if ( INCLUDE_vTaskSuspend == 1 )
+
+	void vTaskResume( TaskHandle_t xTaskToResume )
+	{
+	TCB_t * const pxTCB = xTaskToResume;
+
+		/* It does not make sense to resume the calling task. */
+		configASSERT( xTaskToResume );
+
+		/* The parameter cannot be NULL as it is impossible to resume the
+		currently executing task. */
+		if( ( pxTCB != pxCurrentTCB ) && ( pxTCB != NULL ) )
+		{
+			taskENTER_CRITICAL();
+			{
+				if( prvTaskIsTaskSuspended( pxTCB ) != pdFALSE )
+				{
+					traceTASK_RESUME( pxTCB );
+
+					/* The ready list can be accessed even if the scheduler is
+					suspended because this is inside a critical section. */
+					( void ) uxListRemove(  &( pxTCB->xStateListItem ) );
+					prvAddTaskToReadyList( pxTCB );
+
+					/* A higher priority task may have just been resumed. */
+					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
+					{
+						/* This yield may not cause the task just resumed to run,
+						but will leave the lists in the correct state for the
+						next yield. */
+						taskYIELD_IF_USING_PREEMPTION();
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			taskEXIT_CRITICAL();
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+
+#endif /* INCLUDE_vTaskSuspend */
+
+/*-----------------------------------------------------------*/
+
+#if ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) )
+
+	BaseType_t xTaskResumeFromISR( TaskHandle_t xTaskToResume )
+	{
+	BaseType_t xYieldRequired = pdFALSE;
+	TCB_t * const pxTCB = xTaskToResume;
+	UBaseType_t uxSavedInterruptStatus;
+
+		configASSERT( xTaskToResume );
+
+		/* RTOS ports that support interrupt nesting have the concept of a
+		maximum	system call (or maximum API call) interrupt priority.
+		Interrupts that are	above the maximum system call priority are keep
+		permanently enabled, even when the RTOS kernel is in a critical section,
+		but cannot make any calls to FreeRTOS API functions.  If configASSERT()
+		is defined in FreeRTOSConfig.h then
+		portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
+		failure if a FreeRTOS API function is called from an interrupt that has
+		been assigned a priority above the configured maximum system call
+		priority.  Only FreeRTOS functions that end in FromISR can be called
+		from interrupts	that have been assigned a priority at or (logically)
+		below the maximum system call interrupt priority.  FreeRTOS maintains a
+		separate interrupt safe API to ensure interrupt entry is as fast and as
+		simple as possible.  More information (albeit Cortex-M specific) is
+		provided on the following link:
+		https://www.freertos.org/RTOS-Cortex-M3-M4.html */
+		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+
+		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+		{
+			if( prvTaskIsTaskSuspended( pxTCB ) != pdFALSE )
+			{
+				traceTASK_RESUME_FROM_ISR( pxTCB );
+
+				/* Check the ready lists can be accessed. */
+				if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+				{
+					/* Ready lists can be accessed so move the task from the
+					suspended list to the ready list directly. */
+					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
+					{
+						xYieldRequired = pdTRUE;
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+					prvAddTaskToReadyList( pxTCB );
+				}
+				else
+				{
+					/* The delayed or ready lists cannot be accessed so the task
+					is held in the pending ready list until the scheduler is
+					unsuspended. */
+					vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
+				}
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+		return xYieldRequired;
+	}
+
+#endif /* ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) */
+/*-----------------------------------------------------------*/
+
+void vTaskStartScheduler( void )
+{
+BaseType_t xReturn;
+
+	/* Add the idle task at the lowest priority. */
+	#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+	{
+		StaticTask_t *pxIdleTaskTCBBuffer = NULL;
+		StackType_t *pxIdleTaskStackBuffer = NULL;
+		uint32_t ulIdleTaskStackSize;
+
+		/* The Idle task is created using user provided RAM - obtain the
+		address of the RAM then create the idle task. */
+		vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize );
+		xIdleTaskHandle = xTaskCreateStatic(	prvIdleTask,
+												configIDLE_TASK_NAME,
+												ulIdleTaskStackSize,
+												( void * ) NULL, /*lint !e961.  The cast is not redundant for all compilers. */
+												portPRIVILEGE_BIT, /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */
+												pxIdleTaskStackBuffer,
+												pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */
+
+		if( xIdleTaskHandle != NULL )
+		{
+			xReturn = pdPASS;
+		}
+		else
+		{
+			xReturn = pdFAIL;
+		}
+	}
+	#else
+	{
+		/* The Idle task is being created using dynamically allocated RAM. */
+		xReturn = xTaskCreate(	prvIdleTask,
+								configIDLE_TASK_NAME,
+								configMINIMAL_STACK_SIZE,
+								( void * ) NULL,
+								portPRIVILEGE_BIT, /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */
+								&xIdleTaskHandle ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */
+	}
+	#endif /* configSUPPORT_STATIC_ALLOCATION */
+
+	#if ( configUSE_TIMERS == 1 )
+	{
+		if( xReturn == pdPASS )
+		{
+			xReturn = xTimerCreateTimerTask();
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	#endif /* configUSE_TIMERS */
+
+	if( xReturn == pdPASS )
+	{
+		/* freertos_tasks_c_additions_init() should only be called if the user
+		definable macro FREERTOS_TASKS_C_ADDITIONS_INIT() is defined, as that is
+		the only macro called by the function. */
+		#ifdef FREERTOS_TASKS_C_ADDITIONS_INIT
+		{
+			freertos_tasks_c_additions_init();
+		}
+		#endif
+
+		/* Interrupts are turned off here, to ensure a tick does not occur
+		before or during the call to xPortStartScheduler().  The stacks of
+		the created tasks contain a status word with interrupts switched on
+		so interrupts will automatically get re-enabled when the first task
+		starts to run. */
+		portDISABLE_INTERRUPTS();
+
+		#if ( configUSE_NEWLIB_REENTRANT == 1 )
+		{
+			/* Switch Newlib's _impure_ptr variable to point to the _reent
+			structure specific to the task that will run first. */
+			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
+		}
+		#endif /* configUSE_NEWLIB_REENTRANT */
+
+		xNextTaskUnblockTime = portMAX_DELAY;
+		xSchedulerRunning = pdTRUE;
+		xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT;
+
+		/* If configGENERATE_RUN_TIME_STATS is defined then the following
+		macro must be defined to configure the timer/counter used to generate
+		the run time counter time base.   NOTE:  If configGENERATE_RUN_TIME_STATS
+		is set to 0 and the following line fails to build then ensure you do not
+		have portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() defined in your
+		FreeRTOSConfig.h file. */
+		portCONFIGURE_TIMER_FOR_RUN_TIME_STATS();
+
+		traceTASK_SWITCHED_IN();
+
+		/* Setting up the timer tick is hardware specific and thus in the
+		portable interface. */
+		if( xPortStartScheduler() != pdFALSE )
+		{
+			/* Should not reach here as if the scheduler is running the
+			function will not return. */
+		}
+		else
+		{
+			/* Should only reach here if a task calls xTaskEndScheduler(). */
+		}
+	}
+	else
+	{
+		/* This line will only be reached if the kernel could not be started,
+		because there was not enough FreeRTOS heap to create the idle task
+		or the timer task. */
+		configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY );
+	}
+
+	/* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0,
+	meaning xIdleTaskHandle is not used anywhere else. */
+	( void ) xIdleTaskHandle;
+}
+/*-----------------------------------------------------------*/
+
+void vTaskEndScheduler( void )
+{
+	/* Stop the scheduler interrupts and call the portable scheduler end
+	routine so the original ISRs can be restored if necessary.  The port
+	layer must ensure interrupts enable	bit is left in the correct state. */
+	portDISABLE_INTERRUPTS();
+	xSchedulerRunning = pdFALSE;
+	vPortEndScheduler();
+}
+/*----------------------------------------------------------*/
+
+void vTaskSuspendAll( void )
+{
+	/* A critical section is not required as the variable is of type
+	BaseType_t.  Please read Richard Barry's reply in the following link to a
+	post in the FreeRTOS support forum before reporting this as a bug! -
+	http://goo.gl/wu4acr */
+	++uxSchedulerSuspended;
+	portMEMORY_BARRIER();
+}
+/*----------------------------------------------------------*/
+
+#if ( configUSE_TICKLESS_IDLE != 0 )
+
+	static TickType_t prvGetExpectedIdleTime( void )
+	{
+	TickType_t xReturn;
+	UBaseType_t uxHigherPriorityReadyTasks = pdFALSE;
+
+		/* uxHigherPriorityReadyTasks takes care of the case where
+		configUSE_PREEMPTION is 0, so there may be tasks above the idle priority
+		task that are in the Ready state, even though the idle task is
+		running. */
+		#if( configUSE_PORT_OPTIMISED_TASK_SELECTION == 0 )
+		{
+			if( uxTopReadyPriority > tskIDLE_PRIORITY )
+			{
+				uxHigherPriorityReadyTasks = pdTRUE;
+			}
+		}
+		#else
+		{
+			const UBaseType_t uxLeastSignificantBit = ( UBaseType_t ) 0x01;
+
+			/* When port optimised task selection is used the uxTopReadyPriority
+			variable is used as a bit map.  If bits other than the least
+			significant bit are set then there are tasks that have a priority
+			above the idle priority that are in the Ready state.  This takes
+			care of the case where the co-operative scheduler is in use. */
+			if( uxTopReadyPriority > uxLeastSignificantBit )
+			{
+				uxHigherPriorityReadyTasks = pdTRUE;
+			}
+		}
+		#endif
+
+		if( pxCurrentTCB->uxPriority > tskIDLE_PRIORITY )
+		{
+			xReturn = 0;
+		}
+		else if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > 1 )
+		{
+			/* There are other idle priority tasks in the ready state.  If
+			time slicing is used then the very next tick interrupt must be
+			processed. */
+			xReturn = 0;
+		}
+		else if( uxHigherPriorityReadyTasks != pdFALSE )
+		{
+			/* There are tasks in the Ready state that have a priority above the
+			idle priority.  This path can only be reached if
+			configUSE_PREEMPTION is 0. */
+			xReturn = 0;
+		}
+		else
+		{
+			xReturn = xNextTaskUnblockTime - xTickCount;
+		}
+
+		return xReturn;
+	}
+
+#endif /* configUSE_TICKLESS_IDLE */
+/*----------------------------------------------------------*/
+
+BaseType_t xTaskResumeAll( void )
+{
+TCB_t *pxTCB = NULL;
+BaseType_t xAlreadyYielded = pdFALSE;
+TickType_t xTicksToNextUnblockTime;
+
+	/* If uxSchedulerSuspended is zero then this function does not match a
+	previous call to vTaskSuspendAll(). */
+	configASSERT( uxSchedulerSuspended );
+
+	/* It is possible that an ISR caused a task to be removed from an event
+	list while the scheduler was suspended.  If this was the case then the
+	removed task will have been added to the xPendingReadyList.  Once the
+	scheduler has been resumed it is safe to move all the pending ready
+	tasks from this list into their appropriate ready list. */
+	taskENTER_CRITICAL();
+	{
+		--uxSchedulerSuspended;
+
+		if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+		{
+			if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
+			{
+				/* Move any readied tasks from the pending list into the
+				appropriate ready list. */
+				while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
+				{
+					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+					( void ) uxListRemove( &( pxTCB->xEventListItem ) );
+					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+					prvAddTaskToReadyList( pxTCB );
+
+					/* If the moved task has a priority higher than the current
+					task then a yield must be performed. */
+					if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
+					{
+						xYieldPending = pdTRUE;
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+
+				if( pxTCB != NULL )
+				{
+					/* A task was unblocked while the scheduler was suspended,
+					which may have prevented the next unblock time from being
+					re-calculated, in which case re-calculate it now.  Mainly
+					important for low power tickless implementations, where
+					this can prevent an unnecessary exit from low power
+					state. */
+					prvResetNextTaskUnblockTime();
+				}
+
+				/* If any ticks occurred while the scheduler was suspended then
+				they should be processed now.  This ensures the tick count does
+				not	slip, and that any delayed tasks are resumed at the correct
+				time. */
+				while( xPendedTicks > ( TickType_t ) 0 )
+				{
+					/* Calculate how far into the future the next task will
+					leave the Blocked state because its timeout expired.  If
+					there are no tasks due to leave	the blocked state between
+					the time now and the time at which the tick count overflows
+					then xNextTaskUnblockTime will the tick overflow time.
+					This means xNextTaskUnblockTime can never be less than
+					xTickCount, and the following can therefore not
+					underflow. */
+					configASSERT( xNextTaskUnblockTime >= xTickCount );
+					xTicksToNextUnblockTime = xNextTaskUnblockTime - xTickCount;
+
+					/* Don't want to move the tick count more than the number
+					of ticks that are pending, so cap if necessary. */
+					if( xTicksToNextUnblockTime > xPendedTicks )
+					{
+						xTicksToNextUnblockTime = xPendedTicks;
+					}
+
+					if( xTicksToNextUnblockTime == 0 )
+					{
+						/* xTicksToNextUnblockTime could be zero if the tick
+						count is about to overflow and xTicksToNetUnblockTime
+						holds the time at which the tick count will overflow
+						(rather than the time at which the next task will
+						unblock).  Set to 1 otherwise xPendedTicks won't be
+						decremented below. */
+						xTicksToNextUnblockTime = ( TickType_t ) 1;
+					}
+					else if( xTicksToNextUnblockTime > ( TickType_t ) 1 )
+					{
+						/* Move the tick count one short of the next unblock
+						time, then call xTaskIncrementTick() to move the tick
+						count up to the next unblock time to unblock the task,
+						if any.  This will also swap the blocked task and
+						overflow blocked task lists if necessary. */
+						xTickCount += ( xTicksToNextUnblockTime - ( TickType_t ) 1 );
+					}
+					xYieldPending |= xTaskIncrementTick();
+
+					/* Adjust for the number of ticks just added to
+					xTickCount and go around the loop again if
+					xTicksToCatchUp is still greater than 0. */
+					xPendedTicks -= xTicksToNextUnblockTime;
+				}
+
+				if( xYieldPending != pdFALSE )
+				{
+					#if( configUSE_PREEMPTION != 0 )
+					{
+						xAlreadyYielded = pdTRUE;
+					}
+					#endif
+					taskYIELD_IF_USING_PREEMPTION();
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	taskEXIT_CRITICAL();
+
+	return xAlreadyYielded;
+}
+/*-----------------------------------------------------------*/
+
+TickType_t xTaskGetTickCount( void )
+{
+TickType_t xTicks;
+
+	/* Critical section required if running on a 16 bit processor. */
+	portTICK_TYPE_ENTER_CRITICAL();
+	{
+		xTicks = xTickCount;
+	}
+	portTICK_TYPE_EXIT_CRITICAL();
+
+	return xTicks;
+}
+/*-----------------------------------------------------------*/
+
+TickType_t xTaskGetTickCountFromISR( void )
+{
+TickType_t xReturn;
+UBaseType_t uxSavedInterruptStatus;
+
+	/* RTOS ports that support interrupt nesting have the concept of a maximum
+	system call (or maximum API call) interrupt priority.  Interrupts that are
+	above the maximum system call priority are kept permanently enabled, even
+	when the RTOS kernel is in a critical section, but cannot make any calls to
+	FreeRTOS API functions.  If configASSERT() is defined in FreeRTOSConfig.h
+	then portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
+	failure if a FreeRTOS API function is called from an interrupt that has been
+	assigned a priority above the configured maximum system call priority.
+	Only FreeRTOS functions that end in FromISR can be called from interrupts
+	that have been assigned a priority at or (logically) below the maximum
+	system call	interrupt priority.  FreeRTOS maintains a separate interrupt
+	safe API to ensure interrupt entry is as fast and as simple as possible.
+	More information (albeit Cortex-M specific) is provided on the following
+	link: https://www.freertos.org/RTOS-Cortex-M3-M4.html */
+	portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+
+	uxSavedInterruptStatus = portTICK_TYPE_SET_INTERRUPT_MASK_FROM_ISR();
+	{
+		xReturn = xTickCount;
+	}
+	portTICK_TYPE_CLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+UBaseType_t uxTaskGetNumberOfTasks( void )
+{
+	/* A critical section is not required because the variables are of type
+	BaseType_t. */
+	return uxCurrentNumberOfTasks;
+}
+/*-----------------------------------------------------------*/
+
+char *pcTaskGetName( TaskHandle_t xTaskToQuery ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+{
+TCB_t *pxTCB;
+
+	/* If null is passed in here then the name of the calling task is being
+	queried. */
+	pxTCB = prvGetTCBFromHandle( xTaskToQuery );
+	configASSERT( pxTCB );
+	return &( pxTCB->pcTaskName[ 0 ] );
+}
+/*-----------------------------------------------------------*/
+
+#if ( INCLUDE_xTaskGetHandle == 1 )
+
+	static TCB_t *prvSearchForNameWithinSingleList( List_t *pxList, const char pcNameToQuery[] )
+	{
+	TCB_t *pxNextTCB, *pxFirstTCB, *pxReturn = NULL;
+	UBaseType_t x;
+	char cNextChar;
+	BaseType_t xBreakLoop;
+
+		/* This function is called with the scheduler suspended. */
+
+		if( listCURRENT_LIST_LENGTH( pxList ) > ( UBaseType_t ) 0 )
+		{
+			listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList );  /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+
+			do
+			{
+				listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+
+				/* Check each character in the name looking for a match or
+				mismatch. */
+				xBreakLoop = pdFALSE;
+				for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
+				{
+					cNextChar = pxNextTCB->pcTaskName[ x ];
+
+					if( cNextChar != pcNameToQuery[ x ] )
+					{
+						/* Characters didn't match. */
+						xBreakLoop = pdTRUE;
+					}
+					else if( cNextChar == ( char ) 0x00 )
+					{
+						/* Both strings terminated, a match must have been
+						found. */
+						pxReturn = pxNextTCB;
+						xBreakLoop = pdTRUE;
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					if( xBreakLoop != pdFALSE )
+					{
+						break;
+					}
+				}
+
+				if( pxReturn != NULL )
+				{
+					/* The handle has been found. */
+					break;
+				}
+
+			} while( pxNextTCB != pxFirstTCB );
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		return pxReturn;
+	}
+
+#endif /* INCLUDE_xTaskGetHandle */
+/*-----------------------------------------------------------*/
+
+#if ( INCLUDE_xTaskGetHandle == 1 )
+
+	TaskHandle_t xTaskGetHandle( const char *pcNameToQuery ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+	{
+	UBaseType_t uxQueue = configMAX_PRIORITIES;
+	TCB_t* pxTCB;
+
+		/* Task names will be truncated to configMAX_TASK_NAME_LEN - 1 bytes. */
+		configASSERT( strlen( pcNameToQuery ) < configMAX_TASK_NAME_LEN );
+
+		vTaskSuspendAll();
+		{
+			/* Search the ready lists. */
+			do
+			{
+				uxQueue--;
+				pxTCB = prvSearchForNameWithinSingleList( ( List_t * ) &( pxReadyTasksLists[ uxQueue ] ), pcNameToQuery );
+
+				if( pxTCB != NULL )
+				{
+					/* Found the handle. */
+					break;
+				}
+
+			} while( uxQueue > ( UBaseType_t ) tskIDLE_PRIORITY ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+
+			/* Search the delayed lists. */
+			if( pxTCB == NULL )
+			{
+				pxTCB = prvSearchForNameWithinSingleList( ( List_t * ) pxDelayedTaskList, pcNameToQuery );
+			}
+
+			if( pxTCB == NULL )
+			{
+				pxTCB = prvSearchForNameWithinSingleList( ( List_t * ) pxOverflowDelayedTaskList, pcNameToQuery );
+			}
+
+			#if ( INCLUDE_vTaskSuspend == 1 )
+			{
+				if( pxTCB == NULL )
+				{
+					/* Search the suspended list. */
+					pxTCB = prvSearchForNameWithinSingleList( &xSuspendedTaskList, pcNameToQuery );
+				}
+			}
+			#endif
+
+			#if( INCLUDE_vTaskDelete == 1 )
+			{
+				if( pxTCB == NULL )
+				{
+					/* Search the deleted list. */
+					pxTCB = prvSearchForNameWithinSingleList( &xTasksWaitingTermination, pcNameToQuery );
+				}
+			}
+			#endif
+		}
+		( void ) xTaskResumeAll();
+
+		return pxTCB;
+	}
+
+#endif /* INCLUDE_xTaskGetHandle */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TRACE_FACILITY == 1 )
+
+	UBaseType_t uxTaskGetSystemState( TaskStatus_t * const pxTaskStatusArray, const UBaseType_t uxArraySize, uint32_t * const pulTotalRunTime )
+	{
+	UBaseType_t uxTask = 0, uxQueue = configMAX_PRIORITIES;
+
+		vTaskSuspendAll();
+		{
+			/* Is there a space in the array for each task in the system? */
+			if( uxArraySize >= uxCurrentNumberOfTasks )
+			{
+				/* Fill in an TaskStatus_t structure with information on each
+				task in the Ready state. */
+				do
+				{
+					uxQueue--;
+					uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &( pxReadyTasksLists[ uxQueue ] ), eReady );
+
+				} while( uxQueue > ( UBaseType_t ) tskIDLE_PRIORITY ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+
+				/* Fill in an TaskStatus_t structure with information on each
+				task in the Blocked state. */
+				uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), ( List_t * ) pxDelayedTaskList, eBlocked );
+				uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), ( List_t * ) pxOverflowDelayedTaskList, eBlocked );
+
+				#if( INCLUDE_vTaskDelete == 1 )
+				{
+					/* Fill in an TaskStatus_t structure with information on
+					each task that has been deleted but not yet cleaned up. */
+					uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &xTasksWaitingTermination, eDeleted );
+				}
+				#endif
+
+				#if ( INCLUDE_vTaskSuspend == 1 )
+				{
+					/* Fill in an TaskStatus_t structure with information on
+					each task in the Suspended state. */
+					uxTask += prvListTasksWithinSingleList( &( pxTaskStatusArray[ uxTask ] ), &xSuspendedTaskList, eSuspended );
+				}
+				#endif
+
+				#if ( configGENERATE_RUN_TIME_STATS == 1)
+				{
+					if( pulTotalRunTime != NULL )
+					{
+						#ifdef portALT_GET_RUN_TIME_COUNTER_VALUE
+							portALT_GET_RUN_TIME_COUNTER_VALUE( ( *pulTotalRunTime ) );
+						#else
+							*pulTotalRunTime = portGET_RUN_TIME_COUNTER_VALUE();
+						#endif
+					}
+				}
+				#else
+				{
+					if( pulTotalRunTime != NULL )
+					{
+						*pulTotalRunTime = 0;
+					}
+				}
+				#endif
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		( void ) xTaskResumeAll();
+
+		return uxTask;
+	}
+
+#endif /* configUSE_TRACE_FACILITY */
+/*----------------------------------------------------------*/
+
+#if ( INCLUDE_xTaskGetIdleTaskHandle == 1 )
+
+	TaskHandle_t xTaskGetIdleTaskHandle( void )
+	{
+		/* If xTaskGetIdleTaskHandle() is called before the scheduler has been
+		started, then xIdleTaskHandle will be NULL. */
+		configASSERT( ( xIdleTaskHandle != NULL ) );
+		return xIdleTaskHandle;
+	}
+
+#endif /* INCLUDE_xTaskGetIdleTaskHandle */
+/*----------------------------------------------------------*/
+
+/* This conditional compilation should use inequality to 0, not equality to 1.
+This is to ensure vTaskStepTick() is available when user defined low power mode
+implementations require configUSE_TICKLESS_IDLE to be set to a value other than
+1. */
+#if ( configUSE_TICKLESS_IDLE != 0 )
+
+	void vTaskStepTick( const TickType_t xTicksToJump )
+	{
+		/* Correct the tick count value after a period during which the tick
+		was suppressed.  Note this does *not* call the tick hook function for
+		each stepped tick. */
+		configASSERT( ( xTickCount + xTicksToJump ) <= xNextTaskUnblockTime );
+		xTickCount += xTicksToJump;
+		traceINCREASE_TICK_COUNT( xTicksToJump );
+	}
+
+#endif /* configUSE_TICKLESS_IDLE */
+/*----------------------------------------------------------*/
+
+BaseType_t xTaskCatchUpTicks( TickType_t xTicksToCatchUp )
+{
+BaseType_t xYieldRequired = pdFALSE;
+
+	/* Must not be called with the scheduler suspended as the implementation
+	relies on xPendedTicks being wound down to 0 in xTaskResumeAll(). */
+	configASSERT( uxSchedulerSuspended == 0 );
+
+	/* Use xPendedTicks to mimic xTicksToCatchUp number of ticks occuring when
+	the scheduler is suspended so the ticks are executed in xTaskResumeAll(). */
+	vTaskSuspendAll();
+	xPendedTicks += xTicksToCatchUp;
+	xYieldRequired = xTaskResumeAll();
+
+	return xYieldRequired;
+}
+/*----------------------------------------------------------*/
+
+#if ( INCLUDE_xTaskAbortDelay == 1 )
+
+	BaseType_t xTaskAbortDelay( TaskHandle_t xTask )
+	{
+	TCB_t *pxTCB = xTask;
+	BaseType_t xReturn;
+
+		configASSERT( pxTCB );
+
+		vTaskSuspendAll();
+		{
+			/* A task can only be prematurely removed from the Blocked state if
+			it is actually in the Blocked state. */
+			if( eTaskGetState( xTask ) == eBlocked )
+			{
+				xReturn = pdPASS;
+
+				/* Remove the reference to the task from the blocked list.  An
+				interrupt won't touch the xStateListItem because the
+				scheduler is suspended. */
+				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+
+				/* Is the task waiting on an event also?  If so remove it from
+				the event list too.  Interrupts can touch the event list item,
+				even though the scheduler is suspended, so a critical section
+				is used. */
+				taskENTER_CRITICAL();
+				{
+					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
+					{
+						( void ) uxListRemove( &( pxTCB->xEventListItem ) );
+						pxTCB->ucDelayAborted = pdTRUE;
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				taskEXIT_CRITICAL();
+
+				/* Place the unblocked task into the appropriate ready list. */
+				prvAddTaskToReadyList( pxTCB );
+
+				/* A task being unblocked cannot cause an immediate context
+				switch if preemption is turned off. */
+				#if (  configUSE_PREEMPTION == 1 )
+				{
+					/* Preemption is on, but a context switch should only be
+					performed if the unblocked task has a priority that is
+					equal to or higher than the currently executing task. */
+					if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
+					{
+						/* Pend the yield to be performed when the scheduler
+						is unsuspended. */
+						xYieldPending = pdTRUE;
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				#endif /* configUSE_PREEMPTION */
+			}
+			else
+			{
+				xReturn = pdFAIL;
+			}
+		}
+		( void ) xTaskResumeAll();
+
+		return xReturn;
+	}
+
+#endif /* INCLUDE_xTaskAbortDelay */
+/*----------------------------------------------------------*/
+
+BaseType_t xTaskIncrementTick( void )
+{
+TCB_t * pxTCB;
+TickType_t xItemValue;
+BaseType_t xSwitchRequired = pdFALSE;
+
+	/* Called by the portable layer each time a tick interrupt occurs.
+	Increments the tick then checks to see if the new tick value will cause any
+	tasks to be unblocked. */
+	traceTASK_INCREMENT_TICK( xTickCount );
+	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+	{
+		/* Minor optimisation.  The tick count cannot change in this
+		block. */
+		const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
+
+		/* Increment the RTOS tick, switching the delayed and overflowed
+		delayed lists if it wraps to 0. */
+		xTickCount = xConstTickCount;
+
+		if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
+		{
+			taskSWITCH_DELAYED_LISTS();
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		/* See if this tick has made a timeout expire.  Tasks are stored in
+		the	queue in the order of their wake time - meaning once one task
+		has been found whose block time has not expired there is no need to
+		look any further down the list. */
+		if( xConstTickCount >= xNextTaskUnblockTime )
+		{
+			for( ;; )
+			{
+				if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+				{
+					/* The delayed list is empty.  Set xNextTaskUnblockTime
+					to the maximum possible value so it is extremely
+					unlikely that the
+					if( xTickCount >= xNextTaskUnblockTime ) test will pass
+					next time through. */
+					xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+					break;
+				}
+				else
+				{
+					/* The delayed list is not empty, get the value of the
+					item at the head of the delayed list.  This is the time
+					at which the task at the head of the delayed list must
+					be removed from the Blocked state. */
+					pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+					xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
+
+					if( xConstTickCount < xItemValue )
+					{
+						/* It is not time to unblock this item yet, but the
+						item value is the time at which the task at the head
+						of the blocked list must be removed from the Blocked
+						state -	so record the item value in
+						xNextTaskUnblockTime. */
+						xNextTaskUnblockTime = xItemValue;
+						break; /*lint !e9011 Code structure here is deedmed easier to understand with multiple breaks. */
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					/* It is time to remove the item from the Blocked state. */
+					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+
+					/* Is the task waiting on an event also?  If so remove
+					it from the event list. */
+					if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
+					{
+						( void ) uxListRemove( &( pxTCB->xEventListItem ) );
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					/* Place the unblocked task into the appropriate ready
+					list. */
+					prvAddTaskToReadyList( pxTCB );
+
+					/* A task being unblocked cannot cause an immediate
+					context switch if preemption is turned off. */
+					#if (  configUSE_PREEMPTION == 1 )
+					{
+						/* Preemption is on, but a context switch should
+						only be performed if the unblocked task has a
+						priority that is equal to or higher than the
+						currently executing task. */
+						if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
+						{
+							xSwitchRequired = pdTRUE;
+						}
+						else
+						{
+							mtCOVERAGE_TEST_MARKER();
+						}
+					}
+					#endif /* configUSE_PREEMPTION */
+				}
+			}
+		}
+
+		/* Tasks of equal priority to the currently running task will share
+		processing time (time slice) if preemption is on, and the application
+		writer has not explicitly turned time slicing off. */
+		#if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) )
+		{
+			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 )
+			{
+				xSwitchRequired = pdTRUE;
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		#endif /* ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) ) */
+
+		#if ( configUSE_TICK_HOOK == 1 )
+		{
+			/* Guard against the tick hook being called when the pended tick
+			count is being unwound (when the scheduler is being unlocked). */
+			if( xPendedTicks == ( TickType_t ) 0 )
+			{
+				vApplicationTickHook();
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		#endif /* configUSE_TICK_HOOK */
+	}
+	else
+	{
+		++xPendedTicks;
+
+		/* The tick hook gets called at regular intervals, even if the
+		scheduler is locked. */
+		#if ( configUSE_TICK_HOOK == 1 )
+		{
+			vApplicationTickHook();
+		}
+		#endif
+	}
+
+	#if ( configUSE_PREEMPTION == 1 )
+	{
+		if( xYieldPending != pdFALSE )
+		{
+			xSwitchRequired = pdTRUE;
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	#endif /* configUSE_PREEMPTION */
+
+	return xSwitchRequired;
+}
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_APPLICATION_TASK_TAG == 1 )
+
+	void vTaskSetApplicationTaskTag( TaskHandle_t xTask, TaskHookFunction_t pxHookFunction )
+	{
+	TCB_t *xTCB;
+
+		/* If xTask is NULL then it is the task hook of the calling task that is
+		getting set. */
+		if( xTask == NULL )
+		{
+			xTCB = ( TCB_t * ) pxCurrentTCB;
+		}
+		else
+		{
+			xTCB = xTask;
+		}
+
+		/* Save the hook function in the TCB.  A critical section is required as
+		the value can be accessed from an interrupt. */
+		taskENTER_CRITICAL();
+		{
+			xTCB->pxTaskTag = pxHookFunction;
+		}
+		taskEXIT_CRITICAL();
+	}
+
+#endif /* configUSE_APPLICATION_TASK_TAG */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_APPLICATION_TASK_TAG == 1 )
+
+	TaskHookFunction_t xTaskGetApplicationTaskTag( TaskHandle_t xTask )
+	{
+	TCB_t *pxTCB;
+	TaskHookFunction_t xReturn;
+
+		/* If xTask is NULL then set the calling task's hook. */
+		pxTCB = prvGetTCBFromHandle( xTask );
+
+		/* Save the hook function in the TCB.  A critical section is required as
+		the value can be accessed from an interrupt. */
+		taskENTER_CRITICAL();
+		{
+			xReturn = pxTCB->pxTaskTag;
+		}
+		taskEXIT_CRITICAL();
+
+		return xReturn;
+	}
+
+#endif /* configUSE_APPLICATION_TASK_TAG */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_APPLICATION_TASK_TAG == 1 )
+
+	TaskHookFunction_t xTaskGetApplicationTaskTagFromISR( TaskHandle_t xTask )
+	{
+	TCB_t *pxTCB;
+	TaskHookFunction_t xReturn;
+	UBaseType_t uxSavedInterruptStatus;
+
+		/* If xTask is NULL then set the calling task's hook. */
+		pxTCB = prvGetTCBFromHandle( xTask );
+
+		/* Save the hook function in the TCB.  A critical section is required as
+		the value can be accessed from an interrupt. */
+		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+		{
+			xReturn = pxTCB->pxTaskTag;
+		}
+		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+		return xReturn;
+	}
+
+#endif /* configUSE_APPLICATION_TASK_TAG */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_APPLICATION_TASK_TAG == 1 )
+
+	BaseType_t xTaskCallApplicationTaskHook( TaskHandle_t xTask, void *pvParameter )
+	{
+	TCB_t *xTCB;
+	BaseType_t xReturn;
+
+		/* If xTask is NULL then we are calling our own task hook. */
+		if( xTask == NULL )
+		{
+			xTCB = pxCurrentTCB;
+		}
+		else
+		{
+			xTCB = xTask;
+		}
+
+		if( xTCB->pxTaskTag != NULL )
+		{
+			xReturn = xTCB->pxTaskTag( pvParameter );
+		}
+		else
+		{
+			xReturn = pdFAIL;
+		}
+
+		return xReturn;
+	}
+
+#endif /* configUSE_APPLICATION_TASK_TAG */
+/*-----------------------------------------------------------*/
+
+void vTaskSwitchContext( void )
+{
+	if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
+	{
+		/* The scheduler is currently suspended - do not allow a context
+		switch. */
+		xYieldPending = pdTRUE;
+	}
+	else
+	{
+		xYieldPending = pdFALSE;
+		traceTASK_SWITCHED_OUT();
+
+		#if ( configGENERATE_RUN_TIME_STATS == 1 )
+		{
+			#ifdef portALT_GET_RUN_TIME_COUNTER_VALUE
+				portALT_GET_RUN_TIME_COUNTER_VALUE( ulTotalRunTime );
+			#else
+				ulTotalRunTime = portGET_RUN_TIME_COUNTER_VALUE();
+			#endif
+
+			/* Add the amount of time the task has been running to the
+			accumulated time so far.  The time the task started running was
+			stored in ulTaskSwitchedInTime.  Note that there is no overflow
+			protection here so count values are only valid until the timer
+			overflows.  The guard against negative values is to protect
+			against suspect run time stat counter implementations - which
+			are provided by the application, not the kernel. */
+			if( ulTotalRunTime > ulTaskSwitchedInTime )
+			{
+				pxCurrentTCB->ulRunTimeCounter += ( ulTotalRunTime - ulTaskSwitchedInTime );
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+			ulTaskSwitchedInTime = ulTotalRunTime;
+		}
+		#endif /* configGENERATE_RUN_TIME_STATS */
+
+		/* Check for stack overflow, if configured. */
+		taskCHECK_FOR_STACK_OVERFLOW();
+
+		/* Before the currently running task is switched out, save its errno. */
+		#if( configUSE_POSIX_ERRNO == 1 )
+		{
+			pxCurrentTCB->iTaskErrno = FreeRTOS_errno;
+		}
+		#endif
+
+		/* Select a new task to run using either the generic C or port
+		optimised asm code. */
+		taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+		traceTASK_SWITCHED_IN();
+
+		/* After the new task is switched in, update the global errno. */
+		#if( configUSE_POSIX_ERRNO == 1 )
+		{
+			FreeRTOS_errno = pxCurrentTCB->iTaskErrno;
+		}
+		#endif
+
+		#if ( configUSE_NEWLIB_REENTRANT == 1 )
+		{
+			/* Switch Newlib's _impure_ptr variable to point to the _reent
+			structure specific to this task. */
+			_impure_ptr = &( pxCurrentTCB->xNewLib_reent );
+		}
+		#endif /* configUSE_NEWLIB_REENTRANT */
+	}
+}
+/*-----------------------------------------------------------*/
+
+void vTaskPlaceOnEventList( List_t * const pxEventList, const TickType_t xTicksToWait )
+{
+	configASSERT( pxEventList );
+
+	/* THIS FUNCTION MUST BE CALLED WITH EITHER INTERRUPTS DISABLED OR THE
+	SCHEDULER SUSPENDED AND THE QUEUE BEING ACCESSED LOCKED. */
+
+	/* Place the event list item of the TCB in the appropriate event list.
+	This is placed in the list in priority order so the highest priority task
+	is the first to be woken by the event.  The queue that contains the event
+	list is locked, preventing simultaneous access from interrupts. */
+	vListInsert( pxEventList, &( pxCurrentTCB->xEventListItem ) );
+
+	prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
+}
+/*-----------------------------------------------------------*/
+
+void vTaskPlaceOnUnorderedEventList( List_t * pxEventList, const TickType_t xItemValue, const TickType_t xTicksToWait )
+{
+	configASSERT( pxEventList );
+
+	/* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED.  It is used by
+	the event groups implementation. */
+	configASSERT( uxSchedulerSuspended != 0 );
+
+	/* Store the item value in the event list item.  It is safe to access the
+	event list item here as interrupts won't access the event list item of a
+	task that is not in the Blocked state. */
+	listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ), xItemValue | taskEVENT_LIST_ITEM_VALUE_IN_USE );
+
+	/* Place the event list item of the TCB at the end of the appropriate event
+	list.  It is safe to access the event list here because it is part of an
+	event group implementation - and interrupts don't access event groups
+	directly (instead they access them indirectly by pending function calls to
+	the task level). */
+	vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) );
+
+	prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
+}
+/*-----------------------------------------------------------*/
+
+#if( configUSE_TIMERS == 1 )
+
+	void vTaskPlaceOnEventListRestricted( List_t * const pxEventList, TickType_t xTicksToWait, const BaseType_t xWaitIndefinitely )
+	{
+		configASSERT( pxEventList );
+
+		/* This function should not be called by application code hence the
+		'Restricted' in its name.  It is not part of the public API.  It is
+		designed for use by kernel code, and has special calling requirements -
+		it should be called with the scheduler suspended. */
+
+
+		/* Place the event list item of the TCB in the appropriate event list.
+		In this case it is assume that this is the only task that is going to
+		be waiting on this event list, so the faster vListInsertEnd() function
+		can be used in place of vListInsert. */
+		vListInsertEnd( pxEventList, &( pxCurrentTCB->xEventListItem ) );
+
+		/* If the task should block indefinitely then set the block time to a
+		value that will be recognised as an indefinite delay inside the
+		prvAddCurrentTaskToDelayedList() function. */
+		if( xWaitIndefinitely != pdFALSE )
+		{
+			xTicksToWait = portMAX_DELAY;
+		}
+
+		traceTASK_DELAY_UNTIL( ( xTickCount + xTicksToWait ) );
+		prvAddCurrentTaskToDelayedList( xTicksToWait, xWaitIndefinitely );
+	}
+
+#endif /* configUSE_TIMERS */
+/*-----------------------------------------------------------*/
+
+BaseType_t xTaskRemoveFromEventList( const List_t * const pxEventList )
+{
+TCB_t *pxUnblockedTCB;
+BaseType_t xReturn;
+
+	/* THIS FUNCTION MUST BE CALLED FROM A CRITICAL SECTION.  It can also be
+	called from a critical section within an ISR. */
+
+	/* The event list is sorted in priority order, so the first in the list can
+	be removed as it is known to be the highest priority.  Remove the TCB from
+	the delayed list, and add it to the ready list.
+
+	If an event is for a queue that is locked then this function will never
+	get called - the lock count on the queue will get modified instead.  This
+	means exclusive access to the event list is guaranteed here.
+
+	This function assumes that a check has already been made to ensure that
+	pxEventList is not empty. */
+	pxUnblockedTCB = listGET_OWNER_OF_HEAD_ENTRY( pxEventList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+	configASSERT( pxUnblockedTCB );
+	( void ) uxListRemove( &( pxUnblockedTCB->xEventListItem ) );
+
+	if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+	{
+		( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
+		prvAddTaskToReadyList( pxUnblockedTCB );
+
+		#if( configUSE_TICKLESS_IDLE != 0 )
+		{
+			/* If a task is blocked on a kernel object then xNextTaskUnblockTime
+			might be set to the blocked task's time out time.  If the task is
+			unblocked for a reason other than a timeout xNextTaskUnblockTime is
+			normally left unchanged, because it is automatically reset to a new
+			value when the tick count equals xNextTaskUnblockTime.  However if
+			tickless idling is used it might be more important to enter sleep mode
+			at the earliest possible time - so reset xNextTaskUnblockTime here to
+			ensure it is updated at the earliest possible time. */
+			prvResetNextTaskUnblockTime();
+		}
+		#endif
+	}
+	else
+	{
+		/* The delayed and ready lists cannot be accessed, so hold this task
+		pending until the scheduler is resumed. */
+		vListInsertEnd( &( xPendingReadyList ), &( pxUnblockedTCB->xEventListItem ) );
+	}
+
+	if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
+	{
+		/* Return true if the task removed from the event list has a higher
+		priority than the calling task.  This allows the calling task to know if
+		it should force a context switch now. */
+		xReturn = pdTRUE;
+
+		/* Mark that a yield is pending in case the user is not using the
+		"xHigherPriorityTaskWoken" parameter to an ISR safe FreeRTOS function. */
+		xYieldPending = pdTRUE;
+	}
+	else
+	{
+		xReturn = pdFALSE;
+	}
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+void vTaskRemoveFromUnorderedEventList( ListItem_t * pxEventListItem, const TickType_t xItemValue )
+{
+TCB_t *pxUnblockedTCB;
+
+	/* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED.  It is used by
+	the event flags implementation. */
+	configASSERT( uxSchedulerSuspended != pdFALSE );
+
+	/* Store the new item value in the event list. */
+	listSET_LIST_ITEM_VALUE( pxEventListItem, xItemValue | taskEVENT_LIST_ITEM_VALUE_IN_USE );
+
+	/* Remove the event list form the event flag.  Interrupts do not access
+	event flags. */
+	pxUnblockedTCB = listGET_LIST_ITEM_OWNER( pxEventListItem ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+	configASSERT( pxUnblockedTCB );
+	( void ) uxListRemove( pxEventListItem );
+
+	/* Remove the task from the delayed list and add it to the ready list.  The
+	scheduler is suspended so interrupts will not be accessing the ready
+	lists. */
+	( void ) uxListRemove( &( pxUnblockedTCB->xStateListItem ) );
+	prvAddTaskToReadyList( pxUnblockedTCB );
+
+	if( pxUnblockedTCB->uxPriority > pxCurrentTCB->uxPriority )
+	{
+		/* The unblocked task has a priority above that of the calling task, so
+		a context switch is required.  This function is called with the
+		scheduler suspended so xYieldPending is set so the context switch
+		occurs immediately that the scheduler is resumed (unsuspended). */
+		xYieldPending = pdTRUE;
+	}
+}
+/*-----------------------------------------------------------*/
+
+void vTaskSetTimeOutState( TimeOut_t * const pxTimeOut )
+{
+	configASSERT( pxTimeOut );
+	taskENTER_CRITICAL();
+	{
+		pxTimeOut->xOverflowCount = xNumOfOverflows;
+		pxTimeOut->xTimeOnEntering = xTickCount;
+	}
+	taskEXIT_CRITICAL();
+}
+/*-----------------------------------------------------------*/
+
+void vTaskInternalSetTimeOutState( TimeOut_t * const pxTimeOut )
+{
+	/* For internal use only as it does not use a critical section. */
+	pxTimeOut->xOverflowCount = xNumOfOverflows;
+	pxTimeOut->xTimeOnEntering = xTickCount;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait )
+{
+BaseType_t xReturn;
+
+	configASSERT( pxTimeOut );
+	configASSERT( pxTicksToWait );
+
+	taskENTER_CRITICAL();
+	{
+		/* Minor optimisation.  The tick count cannot change in this block. */
+		const TickType_t xConstTickCount = xTickCount;
+		const TickType_t xElapsedTime = xConstTickCount - pxTimeOut->xTimeOnEntering;
+
+		#if( INCLUDE_xTaskAbortDelay == 1 )
+			if( pxCurrentTCB->ucDelayAborted != ( uint8_t ) pdFALSE )
+			{
+				/* The delay was aborted, which is not the same as a time out,
+				but has the same result. */
+				pxCurrentTCB->ucDelayAborted = pdFALSE;
+				xReturn = pdTRUE;
+			}
+			else
+		#endif
+
+		#if ( INCLUDE_vTaskSuspend == 1 )
+			if( *pxTicksToWait == portMAX_DELAY )
+			{
+				/* If INCLUDE_vTaskSuspend is set to 1 and the block time
+				specified is the maximum block time then the task should block
+				indefinitely, and therefore never time out. */
+				xReturn = pdFALSE;
+			}
+			else
+		#endif
+
+		if( ( xNumOfOverflows != pxTimeOut->xOverflowCount ) && ( xConstTickCount >= pxTimeOut->xTimeOnEntering ) ) /*lint !e525 Indentation preferred as is to make code within pre-processor directives clearer. */
+		{
+			/* The tick count is greater than the time at which
+			vTaskSetTimeout() was called, but has also overflowed since
+			vTaskSetTimeOut() was called.  It must have wrapped all the way
+			around and gone past again. This passed since vTaskSetTimeout()
+			was called. */
+			xReturn = pdTRUE;
+		}
+		else if( xElapsedTime < *pxTicksToWait ) /*lint !e961 Explicit casting is only redundant with some compilers, whereas others require it to prevent integer conversion errors. */
+		{
+			/* Not a genuine timeout. Adjust parameters for time remaining. */
+			*pxTicksToWait -= xElapsedTime;
+			vTaskInternalSetTimeOutState( pxTimeOut );
+			xReturn = pdFALSE;
+		}
+		else
+		{
+			*pxTicksToWait = 0;
+			xReturn = pdTRUE;
+		}
+	}
+	taskEXIT_CRITICAL();
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+void vTaskMissedYield( void )
+{
+	xYieldPending = pdTRUE;
+}
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TRACE_FACILITY == 1 )
+
+	UBaseType_t uxTaskGetTaskNumber( TaskHandle_t xTask )
+	{
+	UBaseType_t uxReturn;
+	TCB_t const *pxTCB;
+
+		if( xTask != NULL )
+		{
+			pxTCB = xTask;
+			uxReturn = pxTCB->uxTaskNumber;
+		}
+		else
+		{
+			uxReturn = 0U;
+		}
+
+		return uxReturn;
+	}
+
+#endif /* configUSE_TRACE_FACILITY */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TRACE_FACILITY == 1 )
+
+	void vTaskSetTaskNumber( TaskHandle_t xTask, const UBaseType_t uxHandle )
+	{
+	TCB_t * pxTCB;
+
+		if( xTask != NULL )
+		{
+			pxTCB = xTask;
+			pxTCB->uxTaskNumber = uxHandle;
+		}
+	}
+
+#endif /* configUSE_TRACE_FACILITY */
+
+/*
+ * -----------------------------------------------------------
+ * The Idle task.
+ * ----------------------------------------------------------
+ *
+ * The portTASK_FUNCTION() macro is used to allow port/compiler specific
+ * language extensions.  The equivalent prototype for this function is:
+ *
+ * void prvIdleTask( void *pvParameters );
+ *
+ */
+static portTASK_FUNCTION( prvIdleTask, pvParameters )
+{
+	/* Stop warnings. */
+	( void ) pvParameters;
+
+	/** THIS IS THE RTOS IDLE TASK - WHICH IS CREATED AUTOMATICALLY WHEN THE
+	SCHEDULER IS STARTED. **/
+
+	/* In case a task that has a secure context deletes itself, in which case
+	the idle task is responsible for deleting the task's secure context, if
+	any. */
+	portALLOCATE_SECURE_CONTEXT( configMINIMAL_SECURE_STACK_SIZE );
+
+	for( ;; )
+	{
+		/* See if any tasks have deleted themselves - if so then the idle task
+		is responsible for freeing the deleted task's TCB and stack. */
+		prvCheckTasksWaitingTermination();
+
+		#if ( configUSE_PREEMPTION == 0 )
+		{
+			/* If we are not using preemption we keep forcing a task switch to
+			see if any other task has become available.  If we are using
+			preemption we don't need to do this as any task becoming available
+			will automatically get the processor anyway. */
+			taskYIELD();
+		}
+		#endif /* configUSE_PREEMPTION */
+
+		#if ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) )
+		{
+			/* When using preemption tasks of equal priority will be
+			timesliced.  If a task that is sharing the idle priority is ready
+			to run then the idle task should yield before the end of the
+			timeslice.
+
+			A critical region is not required here as we are just reading from
+			the list, and an occasional incorrect value will not matter.  If
+			the ready list at the idle priority contains more than one task
+			then a task other than the idle task is ready to execute. */
+			if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 )
+			{
+				taskYIELD();
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		#endif /* ( ( configUSE_PREEMPTION == 1 ) && ( configIDLE_SHOULD_YIELD == 1 ) ) */
+
+		#if ( configUSE_IDLE_HOOK == 1 )
+		{
+			extern void vApplicationIdleHook( void );
+
+			/* Call the user defined function from within the idle task.  This
+			allows the application designer to add background functionality
+			without the overhead of a separate task.
+			NOTE: vApplicationIdleHook() MUST NOT, UNDER ANY CIRCUMSTANCES,
+			CALL A FUNCTION THAT MIGHT BLOCK. */
+			vApplicationIdleHook();
+		}
+		#endif /* configUSE_IDLE_HOOK */
+
+		/* This conditional compilation should use inequality to 0, not equality
+		to 1.  This is to ensure portSUPPRESS_TICKS_AND_SLEEP() is called when
+		user defined low power mode	implementations require
+		configUSE_TICKLESS_IDLE to be set to a value other than 1. */
+		#if ( configUSE_TICKLESS_IDLE != 0 )
+		{
+		TickType_t xExpectedIdleTime;
+
+			/* It is not desirable to suspend then resume the scheduler on
+			each iteration of the idle task.  Therefore, a preliminary
+			test of the expected idle time is performed without the
+			scheduler suspended.  The result here is not necessarily
+			valid. */
+			xExpectedIdleTime = prvGetExpectedIdleTime();
+
+			if( xExpectedIdleTime >= configEXPECTED_IDLE_TIME_BEFORE_SLEEP )
+			{
+				vTaskSuspendAll();
+				{
+					/* Now the scheduler is suspended, the expected idle
+					time can be sampled again, and this time its value can
+					be used. */
+					configASSERT( xNextTaskUnblockTime >= xTickCount );
+					xExpectedIdleTime = prvGetExpectedIdleTime();
+
+					/* Define the following macro to set xExpectedIdleTime to 0
+					if the application does not want
+					portSUPPRESS_TICKS_AND_SLEEP() to be called. */
+					configPRE_SUPPRESS_TICKS_AND_SLEEP_PROCESSING( xExpectedIdleTime );
+
+					if( xExpectedIdleTime >= configEXPECTED_IDLE_TIME_BEFORE_SLEEP )
+					{
+						traceLOW_POWER_IDLE_BEGIN();
+						portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime );
+						traceLOW_POWER_IDLE_END();
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				( void ) xTaskResumeAll();
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		#endif /* configUSE_TICKLESS_IDLE */
+	}
+}
+/*-----------------------------------------------------------*/
+
+#if( configUSE_TICKLESS_IDLE != 0 )
+
+	eSleepModeStatus eTaskConfirmSleepModeStatus( void )
+	{
+	/* The idle task exists in addition to the application tasks. */
+	const UBaseType_t uxNonApplicationTasks = 1;
+	eSleepModeStatus eReturn = eStandardSleep;
+
+		if( listCURRENT_LIST_LENGTH( &xPendingReadyList ) != 0 )
+		{
+			/* A task was made ready while the scheduler was suspended. */
+			eReturn = eAbortSleep;
+		}
+		else if( xYieldPending != pdFALSE )
+		{
+			/* A yield was pended while the scheduler was suspended. */
+			eReturn = eAbortSleep;
+		}
+		else
+		{
+			/* If all the tasks are in the suspended list (which might mean they
+			have an infinite block time rather than actually being suspended)
+			then it is safe to turn all clocks off and just wait for external
+			interrupts. */
+			if( listCURRENT_LIST_LENGTH( &xSuspendedTaskList ) == ( uxCurrentNumberOfTasks - uxNonApplicationTasks ) )
+			{
+				eReturn = eNoTasksWaitingTimeout;
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+
+		return eReturn;
+	}
+
+#endif /* configUSE_TICKLESS_IDLE */
+/*-----------------------------------------------------------*/
+
+#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )
+
+	void vTaskSetThreadLocalStoragePointer( TaskHandle_t xTaskToSet, BaseType_t xIndex, void *pvValue )
+	{
+	TCB_t *pxTCB;
+
+		if( xIndex < configNUM_THREAD_LOCAL_STORAGE_POINTERS )
+		{
+			pxTCB = prvGetTCBFromHandle( xTaskToSet );
+			pxTCB->pvThreadLocalStoragePointers[ xIndex ] = pvValue;
+		}
+	}
+
+#endif /* configNUM_THREAD_LOCAL_STORAGE_POINTERS */
+/*-----------------------------------------------------------*/
+
+#if ( configNUM_THREAD_LOCAL_STORAGE_POINTERS != 0 )
+
+	void *pvTaskGetThreadLocalStoragePointer( TaskHandle_t xTaskToQuery, BaseType_t xIndex )
+	{
+	void *pvReturn = NULL;
+	TCB_t *pxTCB;
+
+		if( xIndex < configNUM_THREAD_LOCAL_STORAGE_POINTERS )
+		{
+			pxTCB = prvGetTCBFromHandle( xTaskToQuery );
+			pvReturn = pxTCB->pvThreadLocalStoragePointers[ xIndex ];
+		}
+		else
+		{
+			pvReturn = NULL;
+		}
+
+		return pvReturn;
+	}
+
+#endif /* configNUM_THREAD_LOCAL_STORAGE_POINTERS */
+/*-----------------------------------------------------------*/
+
+#if ( portUSING_MPU_WRAPPERS == 1 )
+
+	void vTaskAllocateMPURegions( TaskHandle_t xTaskToModify, const MemoryRegion_t * const xRegions )
+	{
+	TCB_t *pxTCB;
+
+		/* If null is passed in here then we are modifying the MPU settings of
+		the calling task. */
+		pxTCB = prvGetTCBFromHandle( xTaskToModify );
+
+		vPortStoreTaskMPUSettings( &( pxTCB->xMPUSettings ), xRegions, NULL, 0 );
+	}
+
+#endif /* portUSING_MPU_WRAPPERS */
+/*-----------------------------------------------------------*/
+
+static void prvInitialiseTaskLists( void )
+{
+UBaseType_t uxPriority;
+
+	for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
+	{
+		vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
+	}
+
+	vListInitialise( &xDelayedTaskList1 );
+	vListInitialise( &xDelayedTaskList2 );
+	vListInitialise( &xPendingReadyList );
+
+	#if ( INCLUDE_vTaskDelete == 1 )
+	{
+		vListInitialise( &xTasksWaitingTermination );
+	}
+	#endif /* INCLUDE_vTaskDelete */
+
+	#if ( INCLUDE_vTaskSuspend == 1 )
+	{
+		vListInitialise( &xSuspendedTaskList );
+	}
+	#endif /* INCLUDE_vTaskSuspend */
+
+	/* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList
+	using list2. */
+	pxDelayedTaskList = &xDelayedTaskList1;
+	pxOverflowDelayedTaskList = &xDelayedTaskList2;
+}
+/*-----------------------------------------------------------*/
+
+static void prvCheckTasksWaitingTermination( void )
+{
+
+	/** THIS FUNCTION IS CALLED FROM THE RTOS IDLE TASK **/
+
+	#if ( INCLUDE_vTaskDelete == 1 )
+	{
+		TCB_t *pxTCB;
+
+		/* uxDeletedTasksWaitingCleanUp is used to prevent taskENTER_CRITICAL()
+		being called too often in the idle task. */
+		while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
+		{
+			taskENTER_CRITICAL();
+			{
+				pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+				--uxCurrentNumberOfTasks;
+				--uxDeletedTasksWaitingCleanUp;
+			}
+			taskEXIT_CRITICAL();
+
+			prvDeleteTCB( pxTCB );
+		}
+	}
+	#endif /* INCLUDE_vTaskDelete */
+}
+/*-----------------------------------------------------------*/
+
+#if( configUSE_TRACE_FACILITY == 1 )
+
+	void vTaskGetInfo( TaskHandle_t xTask, TaskStatus_t *pxTaskStatus, BaseType_t xGetFreeStackSpace, eTaskState eState )
+	{
+	TCB_t *pxTCB;
+
+		/* xTask is NULL then get the state of the calling task. */
+		pxTCB = prvGetTCBFromHandle( xTask );
+
+		pxTaskStatus->xHandle = ( TaskHandle_t ) pxTCB;
+		pxTaskStatus->pcTaskName = ( const char * ) &( pxTCB->pcTaskName [ 0 ] );
+		pxTaskStatus->uxCurrentPriority = pxTCB->uxPriority;
+		pxTaskStatus->pxStackBase = pxTCB->pxStack;
+		pxTaskStatus->xTaskNumber = pxTCB->uxTCBNumber;
+
+		#if ( configUSE_MUTEXES == 1 )
+		{
+			pxTaskStatus->uxBasePriority = pxTCB->uxBasePriority;
+		}
+		#else
+		{
+			pxTaskStatus->uxBasePriority = 0;
+		}
+		#endif
+
+		#if ( configGENERATE_RUN_TIME_STATS == 1 )
+		{
+			pxTaskStatus->ulRunTimeCounter = pxTCB->ulRunTimeCounter;
+		}
+		#else
+		{
+			pxTaskStatus->ulRunTimeCounter = 0;
+		}
+		#endif
+
+		/* Obtaining the task state is a little fiddly, so is only done if the
+		value of eState passed into this function is eInvalid - otherwise the
+		state is just set to whatever is passed in. */
+		if( eState != eInvalid )
+		{
+			if( pxTCB == pxCurrentTCB )
+			{
+				pxTaskStatus->eCurrentState = eRunning;
+			}
+			else
+			{
+				pxTaskStatus->eCurrentState = eState;
+
+				#if ( INCLUDE_vTaskSuspend == 1 )
+				{
+					/* If the task is in the suspended list then there is a
+					chance it is actually just blocked indefinitely - so really
+					it should be reported as being in the Blocked state. */
+					if( eState == eSuspended )
+					{
+						vTaskSuspendAll();
+						{
+							if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
+							{
+								pxTaskStatus->eCurrentState = eBlocked;
+							}
+						}
+						( void ) xTaskResumeAll();
+					}
+				}
+				#endif /* INCLUDE_vTaskSuspend */
+			}
+		}
+		else
+		{
+			pxTaskStatus->eCurrentState = eTaskGetState( pxTCB );
+		}
+
+		/* Obtaining the stack space takes some time, so the xGetFreeStackSpace
+		parameter is provided to allow it to be skipped. */
+		if( xGetFreeStackSpace != pdFALSE )
+		{
+			#if ( portSTACK_GROWTH > 0 )
+			{
+				pxTaskStatus->usStackHighWaterMark = prvTaskCheckFreeStackSpace( ( uint8_t * ) pxTCB->pxEndOfStack );
+			}
+			#else
+			{
+				pxTaskStatus->usStackHighWaterMark = prvTaskCheckFreeStackSpace( ( uint8_t * ) pxTCB->pxStack );
+			}
+			#endif
+		}
+		else
+		{
+			pxTaskStatus->usStackHighWaterMark = 0;
+		}
+	}
+
+#endif /* configUSE_TRACE_FACILITY */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TRACE_FACILITY == 1 )
+
+	static UBaseType_t prvListTasksWithinSingleList( TaskStatus_t *pxTaskStatusArray, List_t *pxList, eTaskState eState )
+	{
+	configLIST_VOLATILE TCB_t *pxNextTCB, *pxFirstTCB;
+	UBaseType_t uxTask = 0;
+
+		if( listCURRENT_LIST_LENGTH( pxList ) > ( UBaseType_t ) 0 )
+		{
+			listGET_OWNER_OF_NEXT_ENTRY( pxFirstTCB, pxList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+
+			/* Populate an TaskStatus_t structure within the
+			pxTaskStatusArray array for each task that is referenced from
+			pxList.  See the definition of TaskStatus_t in task.h for the
+			meaning of each TaskStatus_t structure member. */
+			do
+			{
+				listGET_OWNER_OF_NEXT_ENTRY( pxNextTCB, pxList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+				vTaskGetInfo( ( TaskHandle_t ) pxNextTCB, &( pxTaskStatusArray[ uxTask ] ), pdTRUE, eState );
+				uxTask++;
+			} while( pxNextTCB != pxFirstTCB );
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		return uxTask;
+	}
+
+#endif /* configUSE_TRACE_FACILITY */
+/*-----------------------------------------------------------*/
+
+#if ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) )
+
+	static configSTACK_DEPTH_TYPE prvTaskCheckFreeStackSpace( const uint8_t * pucStackByte )
+	{
+	uint32_t ulCount = 0U;
+
+		while( *pucStackByte == ( uint8_t ) tskSTACK_FILL_BYTE )
+		{
+			pucStackByte -= portSTACK_GROWTH;
+			ulCount++;
+		}
+
+		ulCount /= ( uint32_t ) sizeof( StackType_t ); /*lint !e961 Casting is not redundant on smaller architectures. */
+
+		return ( configSTACK_DEPTH_TYPE ) ulCount;
+	}
+
+#endif /* ( ( configUSE_TRACE_FACILITY == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark == 1 ) || ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 ) ) */
+/*-----------------------------------------------------------*/
+
+#if ( INCLUDE_uxTaskGetStackHighWaterMark2 == 1 )
+
+	/* uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are the
+	same except for their return type.  Using configSTACK_DEPTH_TYPE allows the
+	user to determine the return type.  It gets around the problem of the value
+	overflowing on 8-bit types without breaking backward compatibility for
+	applications that expect an 8-bit return type. */
+	configSTACK_DEPTH_TYPE uxTaskGetStackHighWaterMark2( TaskHandle_t xTask )
+	{
+	TCB_t *pxTCB;
+	uint8_t *pucEndOfStack;
+	configSTACK_DEPTH_TYPE uxReturn;
+
+		/* uxTaskGetStackHighWaterMark() and uxTaskGetStackHighWaterMark2() are
+		the same except for their return type.  Using configSTACK_DEPTH_TYPE
+		allows the user to determine the return type.  It gets around the
+		problem of the value overflowing on 8-bit types without breaking
+		backward compatibility for applications that expect an 8-bit return
+		type. */
+
+		pxTCB = prvGetTCBFromHandle( xTask );
+
+		#if portSTACK_GROWTH < 0
+		{
+			pucEndOfStack = ( uint8_t * ) pxTCB->pxStack;
+		}
+		#else
+		{
+			pucEndOfStack = ( uint8_t * ) pxTCB->pxEndOfStack;
+		}
+		#endif
+
+		uxReturn = prvTaskCheckFreeStackSpace( pucEndOfStack );
+
+		return uxReturn;
+	}
+
+#endif /* INCLUDE_uxTaskGetStackHighWaterMark2 */
+/*-----------------------------------------------------------*/
+
+#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )
+
+	UBaseType_t uxTaskGetStackHighWaterMark( TaskHandle_t xTask )
+	{
+	TCB_t *pxTCB;
+	uint8_t *pucEndOfStack;
+	UBaseType_t uxReturn;
+
+		pxTCB = prvGetTCBFromHandle( xTask );
+
+		#if portSTACK_GROWTH < 0
+		{
+			pucEndOfStack = ( uint8_t * ) pxTCB->pxStack;
+		}
+		#else
+		{
+			pucEndOfStack = ( uint8_t * ) pxTCB->pxEndOfStack;
+		}
+		#endif
+
+		uxReturn = ( UBaseType_t ) prvTaskCheckFreeStackSpace( pucEndOfStack );
+
+		return uxReturn;
+	}
+
+#endif /* INCLUDE_uxTaskGetStackHighWaterMark */
+/*-----------------------------------------------------------*/
+
+#if ( INCLUDE_vTaskDelete == 1 )
+
+	static void prvDeleteTCB( TCB_t *pxTCB )
+	{
+		/* This call is required specifically for the TriCore port.  It must be
+		above the vPortFree() calls.  The call is also used by ports/demos that
+		want to allocate and clean RAM statically. */
+		portCLEAN_UP_TCB( pxTCB );
+
+		/* Free up the memory allocated by the scheduler for the task.  It is up
+		to the task to free any memory allocated at the application level. */
+		#if ( configUSE_NEWLIB_REENTRANT == 1 )
+		{
+			_reclaim_reent( &( pxTCB->xNewLib_reent ) );
+		}
+		#endif /* configUSE_NEWLIB_REENTRANT */
+
+		#if( ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) && ( configSUPPORT_STATIC_ALLOCATION == 0 ) && ( portUSING_MPU_WRAPPERS == 0 ) )
+		{
+			/* The task can only have been allocated dynamically - free both
+			the stack and TCB. */
+			vPortFree( pxTCB->pxStack );
+			vPortFree( pxTCB );
+		}
+		#elif( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */
+		{
+			/* The task could have been allocated statically or dynamically, so
+			check what was statically allocated before trying to free the
+			memory. */
+			if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB )
+			{
+				/* Both the stack and TCB were allocated dynamically, so both
+				must be freed. */
+				vPortFree( pxTCB->pxStack );
+				vPortFree( pxTCB );
+			}
+			else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY )
+			{
+				/* Only the stack was statically allocated, so the TCB is the
+				only memory that must be freed. */
+				vPortFree( pxTCB );
+			}
+			else
+			{
+				/* Neither the stack nor the TCB were allocated dynamically, so
+				nothing needs to be freed. */
+				configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB	);
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
+	}
+
+#endif /* INCLUDE_vTaskDelete */
+/*-----------------------------------------------------------*/
+
+static void prvResetNextTaskUnblockTime( void )
+{
+TCB_t *pxTCB;
+
+	if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+	{
+		/* The new current delayed list is empty.  Set xNextTaskUnblockTime to
+		the maximum possible value so it is	extremely unlikely that the
+		if( xTickCount >= xNextTaskUnblockTime ) test will pass until
+		there is an item in the delayed list. */
+		xNextTaskUnblockTime = portMAX_DELAY;
+	}
+	else
+	{
+		/* The new current delayed list is not empty, get the value of
+		the item at the head of the delayed list.  This is the time at
+		which the task at the head of the delayed list should be removed
+		from the Blocked state. */
+		( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+		xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) );
+	}
+}
+/*-----------------------------------------------------------*/
+
+#if ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) )
+
+	TaskHandle_t xTaskGetCurrentTaskHandle( void )
+	{
+	TaskHandle_t xReturn;
+
+		/* A critical section is not required as this is not called from
+		an interrupt and the current TCB will always be the same for any
+		individual execution thread. */
+		xReturn = pxCurrentTCB;
+
+		return xReturn;
+	}
+
+#endif /* ( ( INCLUDE_xTaskGetCurrentTaskHandle == 1 ) || ( configUSE_MUTEXES == 1 ) ) */
+/*-----------------------------------------------------------*/
+
+#if ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) )
+
+	BaseType_t xTaskGetSchedulerState( void )
+	{
+	BaseType_t xReturn;
+
+		if( xSchedulerRunning == pdFALSE )
+		{
+			xReturn = taskSCHEDULER_NOT_STARTED;
+		}
+		else
+		{
+			if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+			{
+				xReturn = taskSCHEDULER_RUNNING;
+			}
+			else
+			{
+				xReturn = taskSCHEDULER_SUSPENDED;
+			}
+		}
+
+		return xReturn;
+	}
+
+#endif /* ( ( INCLUDE_xTaskGetSchedulerState == 1 ) || ( configUSE_TIMERS == 1 ) ) */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_MUTEXES == 1 )
+
+	BaseType_t xTaskPriorityInherit( TaskHandle_t const pxMutexHolder )
+	{
+	TCB_t * const pxMutexHolderTCB = pxMutexHolder;
+	BaseType_t xReturn = pdFALSE;
+
+		/* If the mutex was given back by an interrupt while the queue was
+		locked then the mutex holder might now be NULL.  _RB_ Is this still
+		needed as interrupts can no longer use mutexes? */
+		if( pxMutexHolder != NULL )
+		{
+			/* If the holder of the mutex has a priority below the priority of
+			the task attempting to obtain the mutex then it will temporarily
+			inherit the priority of the task attempting to obtain the mutex. */
+			if( pxMutexHolderTCB->uxPriority < pxCurrentTCB->uxPriority )
+			{
+				/* Adjust the mutex holder state to account for its new
+				priority.  Only reset the event list item value if the value is
+				not being used for anything else. */
+				if( ( listGET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
+				{
+					listSET_LIST_ITEM_VALUE( &( pxMutexHolderTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+
+				/* If the task being modified is in the ready state it will need
+				to be moved into a new list. */
+				if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ pxMutexHolderTCB->uxPriority ] ), &( pxMutexHolderTCB->xStateListItem ) ) != pdFALSE )
+				{
+					if( uxListRemove( &( pxMutexHolderTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+					{
+						/* It is known that the task is in its ready list so
+						there is no need to check again and the port level
+						reset macro can be called directly. */
+						portRESET_READY_PRIORITY( pxMutexHolderTCB->uxPriority, uxTopReadyPriority );
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					/* Inherit the priority before being moved into the new list. */
+					pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
+					prvAddTaskToReadyList( pxMutexHolderTCB );
+				}
+				else
+				{
+					/* Just inherit the priority. */
+					pxMutexHolderTCB->uxPriority = pxCurrentTCB->uxPriority;
+				}
+
+				traceTASK_PRIORITY_INHERIT( pxMutexHolderTCB, pxCurrentTCB->uxPriority );
+
+				/* Inheritance occurred. */
+				xReturn = pdTRUE;
+			}
+			else
+			{
+				if( pxMutexHolderTCB->uxBasePriority < pxCurrentTCB->uxPriority )
+				{
+					/* The base priority of the mutex holder is lower than the
+					priority of the task attempting to take the mutex, but the
+					current priority of the mutex holder is not lower than the
+					priority of the task attempting to take the mutex.
+					Therefore the mutex holder must have already inherited a
+					priority, but inheritance would have occurred if that had
+					not been the case. */
+					xReturn = pdTRUE;
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		return xReturn;
+	}
+
+#endif /* configUSE_MUTEXES */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_MUTEXES == 1 )
+
+	BaseType_t xTaskPriorityDisinherit( TaskHandle_t const pxMutexHolder )
+	{
+	TCB_t * const pxTCB = pxMutexHolder;
+	BaseType_t xReturn = pdFALSE;
+
+		if( pxMutexHolder != NULL )
+		{
+			/* A task can only have an inherited priority if it holds the mutex.
+			If the mutex is held by a task then it cannot be given from an
+			interrupt, and if a mutex is given by the holding task then it must
+			be the running state task. */
+			configASSERT( pxTCB == pxCurrentTCB );
+			configASSERT( pxTCB->uxMutexesHeld );
+			( pxTCB->uxMutexesHeld )--;
+
+			/* Has the holder of the mutex inherited the priority of another
+			task? */
+			if( pxTCB->uxPriority != pxTCB->uxBasePriority )
+			{
+				/* Only disinherit if no other mutexes are held. */
+				if( pxTCB->uxMutexesHeld == ( UBaseType_t ) 0 )
+				{
+					/* A task can only have an inherited priority if it holds
+					the mutex.  If the mutex is held by a task then it cannot be
+					given from an interrupt, and if a mutex is given by the
+					holding task then it must be the running state task.  Remove
+					the holding task from the ready/delayed list. */
+					if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+					{
+						taskRESET_READY_PRIORITY( pxTCB->uxPriority );
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					/* Disinherit the priority before adding the task into the
+					new	ready list. */
+					traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
+					pxTCB->uxPriority = pxTCB->uxBasePriority;
+
+					/* Reset the event list item value.  It cannot be in use for
+					any other purpose if this task is running, and it must be
+					running to give back the mutex. */
+					listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxTCB->uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+					prvAddTaskToReadyList( pxTCB );
+
+					/* Return true to indicate that a context switch is required.
+					This is only actually required in the corner case whereby
+					multiple mutexes were held and the mutexes were given back
+					in an order different to that in which they were taken.
+					If a context switch did not occur when the first mutex was
+					returned, even if a task was waiting on it, then a context
+					switch should occur when the last mutex is returned whether
+					a task is waiting on it or not. */
+					xReturn = pdTRUE;
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+
+		return xReturn;
+	}
+
+#endif /* configUSE_MUTEXES */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_MUTEXES == 1 )
+
+	void vTaskPriorityDisinheritAfterTimeout( TaskHandle_t const pxMutexHolder, UBaseType_t uxHighestPriorityWaitingTask )
+	{
+	TCB_t * const pxTCB = pxMutexHolder;
+	UBaseType_t uxPriorityUsedOnEntry, uxPriorityToUse;
+	const UBaseType_t uxOnlyOneMutexHeld = ( UBaseType_t ) 1;
+
+		if( pxMutexHolder != NULL )
+		{
+			/* If pxMutexHolder is not NULL then the holder must hold at least
+			one mutex. */
+			configASSERT( pxTCB->uxMutexesHeld );
+
+			/* Determine the priority to which the priority of the task that
+			holds the mutex should be set.  This will be the greater of the
+			holding task's base priority and the priority of the highest
+			priority task that is waiting to obtain the mutex. */
+			if( pxTCB->uxBasePriority < uxHighestPriorityWaitingTask )
+			{
+				uxPriorityToUse = uxHighestPriorityWaitingTask;
+			}
+			else
+			{
+				uxPriorityToUse = pxTCB->uxBasePriority;
+			}
+
+			/* Does the priority need to change? */
+			if( pxTCB->uxPriority != uxPriorityToUse )
+			{
+				/* Only disinherit if no other mutexes are held.  This is a
+				simplification in the priority inheritance implementation.  If
+				the task that holds the mutex is also holding other mutexes then
+				the other mutexes may have caused the priority inheritance. */
+				if( pxTCB->uxMutexesHeld == uxOnlyOneMutexHeld )
+				{
+					/* If a task has timed out because it already holds the
+					mutex it was trying to obtain then it cannot of inherited
+					its own priority. */
+					configASSERT( pxTCB != pxCurrentTCB );
+
+					/* Disinherit the priority, remembering the previous
+					priority to facilitate determining the subject task's
+					state. */
+					traceTASK_PRIORITY_DISINHERIT( pxTCB, pxTCB->uxBasePriority );
+					uxPriorityUsedOnEntry = pxTCB->uxPriority;
+					pxTCB->uxPriority = uxPriorityToUse;
+
+					/* Only reset the event list item value if the value is not
+					being used for anything else. */
+					if( ( listGET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ) ) & taskEVENT_LIST_ITEM_VALUE_IN_USE ) == 0UL )
+					{
+						listSET_LIST_ITEM_VALUE( &( pxTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriorityToUse ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+
+					/* If the running task is not the task that holds the mutex
+					then the task that holds the mutex could be in either the
+					Ready, Blocked or Suspended states.  Only remove the task
+					from its current state list if it is in the Ready state as
+					the task's priority is going to change and there is one
+					Ready list per priority. */
+					if( listIS_CONTAINED_WITHIN( &( pxReadyTasksLists[ uxPriorityUsedOnEntry ] ), &( pxTCB->xStateListItem ) ) != pdFALSE )
+					{
+						if( uxListRemove( &( pxTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+						{
+							/* It is known that the task is in its ready list so
+							there is no need to check again and the port level
+							reset macro can be called directly. */
+							portRESET_READY_PRIORITY( pxTCB->uxPriority, uxTopReadyPriority );
+						}
+						else
+						{
+							mtCOVERAGE_TEST_MARKER();
+						}
+
+						prvAddTaskToReadyList( pxTCB );
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+
+#endif /* configUSE_MUTEXES */
+/*-----------------------------------------------------------*/
+
+#if ( portCRITICAL_NESTING_IN_TCB == 1 )
+
+	void vTaskEnterCritical( void )
+	{
+		portDISABLE_INTERRUPTS();
+
+		if( xSchedulerRunning != pdFALSE )
+		{
+			( pxCurrentTCB->uxCriticalNesting )++;
+
+			/* This is not the interrupt safe version of the enter critical
+			function so	assert() if it is being called from an interrupt
+			context.  Only API functions that end in "FromISR" can be used in an
+			interrupt.  Only assert if the critical nesting count is 1 to
+			protect against recursive calls if the assert function also uses a
+			critical section. */
+			if( pxCurrentTCB->uxCriticalNesting == 1 )
+			{
+				portASSERT_IF_IN_ISR();
+			}
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+
+#endif /* portCRITICAL_NESTING_IN_TCB */
+/*-----------------------------------------------------------*/
+
+#if ( portCRITICAL_NESTING_IN_TCB == 1 )
+
+	void vTaskExitCritical( void )
+	{
+		if( xSchedulerRunning != pdFALSE )
+		{
+			if( pxCurrentTCB->uxCriticalNesting > 0U )
+			{
+				( pxCurrentTCB->uxCriticalNesting )--;
+
+				if( pxCurrentTCB->uxCriticalNesting == 0U )
+				{
+					portENABLE_INTERRUPTS();
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+
+#endif /* portCRITICAL_NESTING_IN_TCB */
+/*-----------------------------------------------------------*/
+
+#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) )
+
+	static char *prvWriteNameToBuffer( char *pcBuffer, const char *pcTaskName )
+	{
+	size_t x;
+
+		/* Start by copying the entire string. */
+		strcpy( pcBuffer, pcTaskName );
+
+		/* Pad the end of the string with spaces to ensure columns line up when
+		printed out. */
+		for( x = strlen( pcBuffer ); x < ( size_t ) ( configMAX_TASK_NAME_LEN - 1 ); x++ )
+		{
+			pcBuffer[ x ] = ' ';
+		}
+
+		/* Terminate. */
+		pcBuffer[ x ] = ( char ) 0x00;
+
+		/* Return the new end of string. */
+		return &( pcBuffer[ x ] );
+	}
+
+#endif /* ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) */
+/*-----------------------------------------------------------*/
+
+#if ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+
+	void vTaskList( char * pcWriteBuffer )
+	{
+	TaskStatus_t *pxTaskStatusArray;
+	UBaseType_t uxArraySize, x;
+	char cStatus;
+
+		/*
+		 * PLEASE NOTE:
+		 *
+		 * This function is provided for convenience only, and is used by many
+		 * of the demo applications.  Do not consider it to be part of the
+		 * scheduler.
+		 *
+		 * vTaskList() calls uxTaskGetSystemState(), then formats part of the
+		 * uxTaskGetSystemState() output into a human readable table that
+		 * displays task names, states and stack usage.
+		 *
+		 * vTaskList() has a dependency on the sprintf() C library function that
+		 * might bloat the code size, use a lot of stack, and provide different
+		 * results on different platforms.  An alternative, tiny, third party,
+		 * and limited functionality implementation of sprintf() is provided in
+		 * many of the FreeRTOS/Demo sub-directories in a file called
+		 * printf-stdarg.c (note printf-stdarg.c does not provide a full
+		 * snprintf() implementation!).
+		 *
+		 * It is recommended that production systems call uxTaskGetSystemState()
+		 * directly to get access to raw stats data, rather than indirectly
+		 * through a call to vTaskList().
+		 */
+
+
+		/* Make sure the write buffer does not contain a string. */
+		*pcWriteBuffer = ( char ) 0x00;
+
+		/* Take a snapshot of the number of tasks in case it changes while this
+		function is executing. */
+		uxArraySize = uxCurrentNumberOfTasks;
+
+		/* Allocate an array index for each task.  NOTE!  if
+		configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will
+		equate to NULL. */
+		pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation allocates a struct that has the alignment requirements of a pointer. */
+
+		if( pxTaskStatusArray != NULL )
+		{
+			/* Generate the (binary) data. */
+			uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, NULL );
+
+			/* Create a human readable table from the binary data. */
+			for( x = 0; x < uxArraySize; x++ )
+			{
+				switch( pxTaskStatusArray[ x ].eCurrentState )
+				{
+					case eRunning:		cStatus = tskRUNNING_CHAR;
+										break;
+
+					case eReady:		cStatus = tskREADY_CHAR;
+										break;
+
+					case eBlocked:		cStatus = tskBLOCKED_CHAR;
+										break;
+
+					case eSuspended:	cStatus = tskSUSPENDED_CHAR;
+										break;
+
+					case eDeleted:		cStatus = tskDELETED_CHAR;
+										break;
+
+					case eInvalid:		/* Fall through. */
+					default:			/* Should not get here, but it is included
+										to prevent static checking errors. */
+										cStatus = ( char ) 0x00;
+										break;
+				}
+
+				/* Write the task name to the string, padding with spaces so it
+				can be printed in tabular form more easily. */
+				pcWriteBuffer = prvWriteNameToBuffer( pcWriteBuffer, pxTaskStatusArray[ x ].pcTaskName );
+
+				/* Write the rest of the string. */
+				sprintf( pcWriteBuffer, "\t%c\t%u\t%u\t%u\r\n", cStatus, ( unsigned int ) pxTaskStatusArray[ x ].uxCurrentPriority, ( unsigned int ) pxTaskStatusArray[ x ].usStackHighWaterMark, ( unsigned int ) pxTaskStatusArray[ x ].xTaskNumber ); /*lint !e586 sprintf() allowed as this is compiled with many compilers and this is a utility function only - not part of the core kernel implementation. */
+				pcWriteBuffer += strlen( pcWriteBuffer ); /*lint !e9016 Pointer arithmetic ok on char pointers especially as in this case where it best denotes the intent of the code. */
+			}
+
+			/* Free the array again.  NOTE!  If configSUPPORT_DYNAMIC_ALLOCATION
+			is 0 then vPortFree() will be #defined to nothing. */
+			vPortFree( pxTaskStatusArray );
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+
+#endif /* ( ( configUSE_TRACE_FACILITY == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) ) */
+/*----------------------------------------------------------*/
+
+#if ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) )
+
+	void vTaskGetRunTimeStats( char *pcWriteBuffer )
+	{
+	TaskStatus_t *pxTaskStatusArray;
+	UBaseType_t uxArraySize, x;
+	uint32_t ulTotalTime, ulStatsAsPercentage;
+
+		#if( configUSE_TRACE_FACILITY != 1 )
+		{
+			#error configUSE_TRACE_FACILITY must also be set to 1 in FreeRTOSConfig.h to use vTaskGetRunTimeStats().
+		}
+		#endif
+
+		/*
+		 * PLEASE NOTE:
+		 *
+		 * This function is provided for convenience only, and is used by many
+		 * of the demo applications.  Do not consider it to be part of the
+		 * scheduler.
+		 *
+		 * vTaskGetRunTimeStats() calls uxTaskGetSystemState(), then formats part
+		 * of the uxTaskGetSystemState() output into a human readable table that
+		 * displays the amount of time each task has spent in the Running state
+		 * in both absolute and percentage terms.
+		 *
+		 * vTaskGetRunTimeStats() has a dependency on the sprintf() C library
+		 * function that might bloat the code size, use a lot of stack, and
+		 * provide different results on different platforms.  An alternative,
+		 * tiny, third party, and limited functionality implementation of
+		 * sprintf() is provided in many of the FreeRTOS/Demo sub-directories in
+		 * a file called printf-stdarg.c (note printf-stdarg.c does not provide
+		 * a full snprintf() implementation!).
+		 *
+		 * It is recommended that production systems call uxTaskGetSystemState()
+		 * directly to get access to raw stats data, rather than indirectly
+		 * through a call to vTaskGetRunTimeStats().
+		 */
+
+		/* Make sure the write buffer does not contain a string. */
+		*pcWriteBuffer = ( char ) 0x00;
+
+		/* Take a snapshot of the number of tasks in case it changes while this
+		function is executing. */
+		uxArraySize = uxCurrentNumberOfTasks;
+
+		/* Allocate an array index for each task.  NOTE!  If
+		configSUPPORT_DYNAMIC_ALLOCATION is set to 0 then pvPortMalloc() will
+		equate to NULL. */
+		pxTaskStatusArray = pvPortMalloc( uxCurrentNumberOfTasks * sizeof( TaskStatus_t ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation allocates a struct that has the alignment requirements of a pointer. */
+
+		if( pxTaskStatusArray != NULL )
+		{
+			/* Generate the (binary) data. */
+			uxArraySize = uxTaskGetSystemState( pxTaskStatusArray, uxArraySize, &ulTotalTime );
+
+			/* For percentage calculations. */
+			ulTotalTime /= 100UL;
+
+			/* Avoid divide by zero errors. */
+			if( ulTotalTime > 0UL )
+			{
+				/* Create a human readable table from the binary data. */
+				for( x = 0; x < uxArraySize; x++ )
+				{
+					/* What percentage of the total run time has the task used?
+					This will always be rounded down to the nearest integer.
+					ulTotalRunTimeDiv100 has already been divided by 100. */
+					ulStatsAsPercentage = pxTaskStatusArray[ x ].ulRunTimeCounter / ulTotalTime;
+
+					/* Write the task name to the string, padding with
+					spaces so it can be printed in tabular form more
+					easily. */
+					pcWriteBuffer = prvWriteNameToBuffer( pcWriteBuffer, pxTaskStatusArray[ x ].pcTaskName );
+
+					if( ulStatsAsPercentage > 0UL )
+					{
+						#ifdef portLU_PRINTF_SPECIFIER_REQUIRED
+						{
+							sprintf( pcWriteBuffer, "\t%lu\t\t%lu%%\r\n", pxTaskStatusArray[ x ].ulRunTimeCounter, ulStatsAsPercentage );
+						}
+						#else
+						{
+							/* sizeof( int ) == sizeof( long ) so a smaller
+							printf() library can be used. */
+							sprintf( pcWriteBuffer, "\t%u\t\t%u%%\r\n", ( unsigned int ) pxTaskStatusArray[ x ].ulRunTimeCounter, ( unsigned int ) ulStatsAsPercentage ); /*lint !e586 sprintf() allowed as this is compiled with many compilers and this is a utility function only - not part of the core kernel implementation. */
+						}
+						#endif
+					}
+					else
+					{
+						/* If the percentage is zero here then the task has
+						consumed less than 1% of the total run time. */
+						#ifdef portLU_PRINTF_SPECIFIER_REQUIRED
+						{
+							sprintf( pcWriteBuffer, "\t%lu\t\t<1%%\r\n", pxTaskStatusArray[ x ].ulRunTimeCounter );
+						}
+						#else
+						{
+							/* sizeof( int ) == sizeof( long ) so a smaller
+							printf() library can be used. */
+							sprintf( pcWriteBuffer, "\t%u\t\t<1%%\r\n", ( unsigned int ) pxTaskStatusArray[ x ].ulRunTimeCounter ); /*lint !e586 sprintf() allowed as this is compiled with many compilers and this is a utility function only - not part of the core kernel implementation. */
+						}
+						#endif
+					}
+
+					pcWriteBuffer += strlen( pcWriteBuffer ); /*lint !e9016 Pointer arithmetic ok on char pointers especially as in this case where it best denotes the intent of the code. */
+				}
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+
+			/* Free the array again.  NOTE!  If configSUPPORT_DYNAMIC_ALLOCATION
+			is 0 then vPortFree() will be #defined to nothing. */
+			vPortFree( pxTaskStatusArray );
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+
+#endif /* ( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( configUSE_STATS_FORMATTING_FUNCTIONS > 0 ) && ( configSUPPORT_STATIC_ALLOCATION == 1 ) ) */
+/*-----------------------------------------------------------*/
+
+TickType_t uxTaskResetEventItemValue( void )
+{
+TickType_t uxReturn;
+
+	uxReturn = listGET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ) );
+
+	/* Reset the event list item to its normal value - so it can be used with
+	queues and semaphores. */
+	listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xEventListItem ), ( ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) pxCurrentTCB->uxPriority ) ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+
+	return uxReturn;
+}
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_MUTEXES == 1 )
+
+	TaskHandle_t pvTaskIncrementMutexHeldCount( void )
+	{
+		/* If xSemaphoreCreateMutex() is called before any tasks have been created
+		then pxCurrentTCB will be NULL. */
+		if( pxCurrentTCB != NULL )
+		{
+			( pxCurrentTCB->uxMutexesHeld )++;
+		}
+
+		return pxCurrentTCB;
+	}
+
+#endif /* configUSE_MUTEXES */
+/*-----------------------------------------------------------*/
+
+#if( configUSE_TASK_NOTIFICATIONS == 1 )
+
+	uint32_t ulTaskNotifyTake( BaseType_t xClearCountOnExit, TickType_t xTicksToWait )
+	{
+	uint32_t ulReturn;
+
+		taskENTER_CRITICAL();
+		{
+			/* Only block if the notification count is not already non-zero. */
+			if( pxCurrentTCB->ulNotifiedValue == 0UL )
+			{
+				/* Mark this task as waiting for a notification. */
+				pxCurrentTCB->ucNotifyState = taskWAITING_NOTIFICATION;
+
+				if( xTicksToWait > ( TickType_t ) 0 )
+				{
+					prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
+					traceTASK_NOTIFY_TAKE_BLOCK();
+
+					/* All ports are written to allow a yield in a critical
+					section (some will yield immediately, others wait until the
+					critical section exits) - but it is not something that
+					application code should ever do. */
+					portYIELD_WITHIN_API();
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		taskEXIT_CRITICAL();
+
+		taskENTER_CRITICAL();
+		{
+			traceTASK_NOTIFY_TAKE();
+			ulReturn = pxCurrentTCB->ulNotifiedValue;
+
+			if( ulReturn != 0UL )
+			{
+				if( xClearCountOnExit != pdFALSE )
+				{
+					pxCurrentTCB->ulNotifiedValue = 0UL;
+				}
+				else
+				{
+					pxCurrentTCB->ulNotifiedValue = ulReturn - ( uint32_t ) 1;
+				}
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+
+			pxCurrentTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
+		}
+		taskEXIT_CRITICAL();
+
+		return ulReturn;
+	}
+
+#endif /* configUSE_TASK_NOTIFICATIONS */
+/*-----------------------------------------------------------*/
+
+#if( configUSE_TASK_NOTIFICATIONS == 1 )
+
+	BaseType_t xTaskNotifyWait( uint32_t ulBitsToClearOnEntry, uint32_t ulBitsToClearOnExit, uint32_t *pulNotificationValue, TickType_t xTicksToWait )
+	{
+	BaseType_t xReturn;
+
+		taskENTER_CRITICAL();
+		{
+			/* Only block if a notification is not already pending. */
+			if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
+			{
+				/* Clear bits in the task's notification value as bits may get
+				set	by the notifying task or interrupt.  This can be used to
+				clear the value to zero. */
+				pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnEntry;
+
+				/* Mark this task as waiting for a notification. */
+				pxCurrentTCB->ucNotifyState = taskWAITING_NOTIFICATION;
+
+				if( xTicksToWait > ( TickType_t ) 0 )
+				{
+					prvAddCurrentTaskToDelayedList( xTicksToWait, pdTRUE );
+					traceTASK_NOTIFY_WAIT_BLOCK();
+
+					/* All ports are written to allow a yield in a critical
+					section (some will yield immediately, others wait until the
+					critical section exits) - but it is not something that
+					application code should ever do. */
+					portYIELD_WITHIN_API();
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		taskEXIT_CRITICAL();
+
+		taskENTER_CRITICAL();
+		{
+			traceTASK_NOTIFY_WAIT();
+
+			if( pulNotificationValue != NULL )
+			{
+				/* Output the current notification value, which may or may not
+				have changed. */
+				*pulNotificationValue = pxCurrentTCB->ulNotifiedValue;
+			}
+
+			/* If ucNotifyValue is set then either the task never entered the
+			blocked state (because a notification was already pending) or the
+			task unblocked because of a notification.  Otherwise the task
+			unblocked because of a timeout. */
+			if( pxCurrentTCB->ucNotifyState != taskNOTIFICATION_RECEIVED )
+			{
+				/* A notification was not received. */
+				xReturn = pdFALSE;
+			}
+			else
+			{
+				/* A notification was already pending or a notification was
+				received while the task was waiting. */
+				pxCurrentTCB->ulNotifiedValue &= ~ulBitsToClearOnExit;
+				xReturn = pdTRUE;
+			}
+
+			pxCurrentTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
+		}
+		taskEXIT_CRITICAL();
+
+		return xReturn;
+	}
+
+#endif /* configUSE_TASK_NOTIFICATIONS */
+/*-----------------------------------------------------------*/
+
+#if( configUSE_TASK_NOTIFICATIONS == 1 )
+
+	BaseType_t xTaskGenericNotify( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue )
+	{
+	TCB_t * pxTCB;
+	BaseType_t xReturn = pdPASS;
+	uint8_t ucOriginalNotifyState;
+
+		configASSERT( xTaskToNotify );
+		pxTCB = xTaskToNotify;
+
+		taskENTER_CRITICAL();
+		{
+			if( pulPreviousNotificationValue != NULL )
+			{
+				*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
+			}
+
+			ucOriginalNotifyState = pxTCB->ucNotifyState;
+
+			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
+
+			switch( eAction )
+			{
+				case eSetBits	:
+					pxTCB->ulNotifiedValue |= ulValue;
+					break;
+
+				case eIncrement	:
+					( pxTCB->ulNotifiedValue )++;
+					break;
+
+				case eSetValueWithOverwrite	:
+					pxTCB->ulNotifiedValue = ulValue;
+					break;
+
+				case eSetValueWithoutOverwrite :
+					if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
+					{
+						pxTCB->ulNotifiedValue = ulValue;
+					}
+					else
+					{
+						/* The value could not be written to the task. */
+						xReturn = pdFAIL;
+					}
+					break;
+
+				case eNoAction:
+					/* The task is being notified without its notify value being
+					updated. */
+					break;
+
+				default:
+					/* Should not get here if all enums are handled.
+					Artificially force an assert by testing a value the
+					compiler can't assume is const. */
+					configASSERT( pxTCB->ulNotifiedValue == ~0UL );
+
+					break;
+			}
+
+			traceTASK_NOTIFY();
+
+			/* If the task is in the blocked state specifically to wait for a
+			notification then unblock it now. */
+			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
+			{
+				( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+				prvAddTaskToReadyList( pxTCB );
+
+				/* The task should not have been on an event list. */
+				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
+
+				#if( configUSE_TICKLESS_IDLE != 0 )
+				{
+					/* If a task is blocked waiting for a notification then
+					xNextTaskUnblockTime might be set to the blocked task's time
+					out time.  If the task is unblocked for a reason other than
+					a timeout xNextTaskUnblockTime is normally left unchanged,
+					because it will automatically get reset to a new value when
+					the tick count equals xNextTaskUnblockTime.  However if
+					tickless idling is used it might be more important to enter
+					sleep mode at the earliest possible time - so reset
+					xNextTaskUnblockTime here to ensure it is updated at the
+					earliest possible time. */
+					prvResetNextTaskUnblockTime();
+				}
+				#endif
+
+				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
+				{
+					/* The notified task has a priority above the currently
+					executing task so a yield is required. */
+					taskYIELD_IF_USING_PREEMPTION();
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		taskEXIT_CRITICAL();
+
+		return xReturn;
+	}
+
+#endif /* configUSE_TASK_NOTIFICATIONS */
+/*-----------------------------------------------------------*/
+
+#if( configUSE_TASK_NOTIFICATIONS == 1 )
+
+	BaseType_t xTaskGenericNotifyFromISR( TaskHandle_t xTaskToNotify, uint32_t ulValue, eNotifyAction eAction, uint32_t *pulPreviousNotificationValue, BaseType_t *pxHigherPriorityTaskWoken )
+	{
+	TCB_t * pxTCB;
+	uint8_t ucOriginalNotifyState;
+	BaseType_t xReturn = pdPASS;
+	UBaseType_t uxSavedInterruptStatus;
+
+		configASSERT( xTaskToNotify );
+
+		/* RTOS ports that support interrupt nesting have the concept of a
+		maximum	system call (or maximum API call) interrupt priority.
+		Interrupts that are	above the maximum system call priority are keep
+		permanently enabled, even when the RTOS kernel is in a critical section,
+		but cannot make any calls to FreeRTOS API functions.  If configASSERT()
+		is defined in FreeRTOSConfig.h then
+		portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
+		failure if a FreeRTOS API function is called from an interrupt that has
+		been assigned a priority above the configured maximum system call
+		priority.  Only FreeRTOS functions that end in FromISR can be called
+		from interrupts	that have been assigned a priority at or (logically)
+		below the maximum system call interrupt priority.  FreeRTOS maintains a
+		separate interrupt safe API to ensure interrupt entry is as fast and as
+		simple as possible.  More information (albeit Cortex-M specific) is
+		provided on the following link:
+		http://www.freertos.org/RTOS-Cortex-M3-M4.html */
+		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+
+		pxTCB = xTaskToNotify;
+
+		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+		{
+			if( pulPreviousNotificationValue != NULL )
+			{
+				*pulPreviousNotificationValue = pxTCB->ulNotifiedValue;
+			}
+
+			ucOriginalNotifyState = pxTCB->ucNotifyState;
+			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
+
+			switch( eAction )
+			{
+				case eSetBits	:
+					pxTCB->ulNotifiedValue |= ulValue;
+					break;
+
+				case eIncrement	:
+					( pxTCB->ulNotifiedValue )++;
+					break;
+
+				case eSetValueWithOverwrite	:
+					pxTCB->ulNotifiedValue = ulValue;
+					break;
+
+				case eSetValueWithoutOverwrite :
+					if( ucOriginalNotifyState != taskNOTIFICATION_RECEIVED )
+					{
+						pxTCB->ulNotifiedValue = ulValue;
+					}
+					else
+					{
+						/* The value could not be written to the task. */
+						xReturn = pdFAIL;
+					}
+					break;
+
+				case eNoAction :
+					/* The task is being notified without its notify value being
+					updated. */
+					break;
+
+				default:
+					/* Should not get here if all enums are handled.
+					Artificially force an assert by testing a value the
+					compiler can't assume is const. */
+					configASSERT( pxTCB->ulNotifiedValue == ~0UL );
+					break;
+			}
+
+			traceTASK_NOTIFY_FROM_ISR();
+
+			/* If the task is in the blocked state specifically to wait for a
+			notification then unblock it now. */
+			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
+			{
+				/* The task should not have been on an event list. */
+				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
+
+				if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+				{
+					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+					prvAddTaskToReadyList( pxTCB );
+				}
+				else
+				{
+					/* The delayed and ready lists cannot be accessed, so hold
+					this task pending until the scheduler is resumed. */
+					vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
+				}
+
+				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
+				{
+					/* The notified task has a priority above the currently
+					executing task so a yield is required. */
+					if( pxHigherPriorityTaskWoken != NULL )
+					{
+						*pxHigherPriorityTaskWoken = pdTRUE;
+					}
+
+					/* Mark that a yield is pending in case the user is not
+					using the "xHigherPriorityTaskWoken" parameter to an ISR
+					safe FreeRTOS function. */
+					xYieldPending = pdTRUE;
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+		}
+		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+
+		return xReturn;
+	}
+
+#endif /* configUSE_TASK_NOTIFICATIONS */
+/*-----------------------------------------------------------*/
+
+#if( configUSE_TASK_NOTIFICATIONS == 1 )
+
+	void vTaskNotifyGiveFromISR( TaskHandle_t xTaskToNotify, BaseType_t *pxHigherPriorityTaskWoken )
+	{
+	TCB_t * pxTCB;
+	uint8_t ucOriginalNotifyState;
+	UBaseType_t uxSavedInterruptStatus;
+
+		configASSERT( xTaskToNotify );
+
+		/* RTOS ports that support interrupt nesting have the concept of a
+		maximum	system call (or maximum API call) interrupt priority.
+		Interrupts that are	above the maximum system call priority are keep
+		permanently enabled, even when the RTOS kernel is in a critical section,
+		but cannot make any calls to FreeRTOS API functions.  If configASSERT()
+		is defined in FreeRTOSConfig.h then
+		portASSERT_IF_INTERRUPT_PRIORITY_INVALID() will result in an assertion
+		failure if a FreeRTOS API function is called from an interrupt that has
+		been assigned a priority above the configured maximum system call
+		priority.  Only FreeRTOS functions that end in FromISR can be called
+		from interrupts	that have been assigned a priority at or (logically)
+		below the maximum system call interrupt priority.  FreeRTOS maintains a
+		separate interrupt safe API to ensure interrupt entry is as fast and as
+		simple as possible.  More information (albeit Cortex-M specific) is
+		provided on the following link:
+		http://www.freertos.org/RTOS-Cortex-M3-M4.html */
+		portASSERT_IF_INTERRUPT_PRIORITY_INVALID();
+
+		pxTCB = xTaskToNotify;
+
+		uxSavedInterruptStatus = portSET_INTERRUPT_MASK_FROM_ISR();
+		{
+			ucOriginalNotifyState = pxTCB->ucNotifyState;
+			pxTCB->ucNotifyState = taskNOTIFICATION_RECEIVED;
+
+			/* 'Giving' is equivalent to incrementing a count in a counting
+			semaphore. */
+			( pxTCB->ulNotifiedValue )++;
+
+			traceTASK_NOTIFY_GIVE_FROM_ISR();
+
+			/* If the task is in the blocked state specifically to wait for a
+			notification then unblock it now. */
+			if( ucOriginalNotifyState == taskWAITING_NOTIFICATION )
+			{
+				/* The task should not have been on an event list. */
+				configASSERT( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) == NULL );
+
+				if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+				{
+					( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+					prvAddTaskToReadyList( pxTCB );
+				}
+				else
+				{
+					/* The delayed and ready lists cannot be accessed, so hold
+					this task pending until the scheduler is resumed. */
+					vListInsertEnd( &( xPendingReadyList ), &( pxTCB->xEventListItem ) );
+				}
+
+				if( pxTCB->uxPriority > pxCurrentTCB->uxPriority )
+				{
+					/* The notified task has a priority above the currently
+					executing task so a yield is required. */
+					if( pxHigherPriorityTaskWoken != NULL )
+					{
+						*pxHigherPriorityTaskWoken = pdTRUE;
+					}
+
+					/* Mark that a yield is pending in case the user is not
+					using the "xHigherPriorityTaskWoken" parameter in an ISR
+					safe FreeRTOS function. */
+					xYieldPending = pdTRUE;
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+		}
+		portCLEAR_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus );
+	}
+
+#endif /* configUSE_TASK_NOTIFICATIONS */
+
+/*-----------------------------------------------------------*/
+
+#if( configUSE_TASK_NOTIFICATIONS == 1 )
+
+	BaseType_t xTaskNotifyStateClear( TaskHandle_t xTask )
+	{
+	TCB_t *pxTCB;
+	BaseType_t xReturn;
+
+		/* If null is passed in here then it is the calling task that is having
+		its notification state cleared. */
+		pxTCB = prvGetTCBFromHandle( xTask );
+
+		taskENTER_CRITICAL();
+		{
+			if( pxTCB->ucNotifyState == taskNOTIFICATION_RECEIVED )
+			{
+				pxTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION;
+				xReturn = pdPASS;
+			}
+			else
+			{
+				xReturn = pdFAIL;
+			}
+		}
+		taskEXIT_CRITICAL();
+
+		return xReturn;
+	}
+
+#endif /* configUSE_TASK_NOTIFICATIONS */
+/*-----------------------------------------------------------*/
+
+#if( ( configGENERATE_RUN_TIME_STATS == 1 ) && ( INCLUDE_xTaskGetIdleTaskHandle == 1 ) )
+
+	uint32_t ulTaskGetIdleRunTimeCounter( void )
+	{
+		return xIdleTaskHandle->ulRunTimeCounter;
+	}
+
+#endif
+/*-----------------------------------------------------------*/
+
+static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely )
+{
+TickType_t xTimeToWake;
+const TickType_t xConstTickCount = xTickCount;
+
+	#if( INCLUDE_xTaskAbortDelay == 1 )
+	{
+		/* About to enter a delayed list, so ensure the ucDelayAborted flag is
+		reset to pdFALSE so it can be detected as having been set to pdTRUE
+		when the task leaves the Blocked state. */
+		pxCurrentTCB->ucDelayAborted = pdFALSE;
+	}
+	#endif
+
+	/* Remove the task from the ready list before adding it to the blocked list
+	as the same list item is used for both lists. */
+	if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 )
+	{
+		/* The current task must be in a ready list, so there is no need to
+		check, and the port reset macro can be called directly. */
+		portRESET_READY_PRIORITY( pxCurrentTCB->uxPriority, uxTopReadyPriority ); /*lint !e931 pxCurrentTCB cannot change as it is the calling task.  pxCurrentTCB->uxPriority and uxTopReadyPriority cannot change as called with scheduler suspended or in a critical section. */
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	#if ( INCLUDE_vTaskSuspend == 1 )
+	{
+		if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) )
+		{
+			/* Add the task to the suspended task list instead of a delayed task
+			list to ensure it is not woken by a timing event.  It will block
+			indefinitely. */
+			vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) );
+		}
+		else
+		{
+			/* Calculate the time at which the task should be woken if the event
+			does not occur.  This may overflow but this doesn't matter, the
+			kernel will manage it correctly. */
+			xTimeToWake = xConstTickCount + xTicksToWait;
+
+			/* The list item will be inserted in wake time order. */
+			listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
+
+			if( xTimeToWake < xConstTickCount )
+			{
+				/* Wake time has overflowed.  Place this item in the overflow
+				list. */
+				vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
+			}
+			else
+			{
+				/* The wake time has not overflowed, so the current block list
+				is used. */
+				vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
+
+				/* If the task entering the blocked state was placed at the
+				head of the list of blocked tasks then xNextTaskUnblockTime
+				needs to be updated too. */
+				if( xTimeToWake < xNextTaskUnblockTime )
+				{
+					xNextTaskUnblockTime = xTimeToWake;
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+		}
+	}
+	#else /* INCLUDE_vTaskSuspend */
+	{
+		/* Calculate the time at which the task should be woken if the event
+		does not occur.  This may overflow but this doesn't matter, the kernel
+		will manage it correctly. */
+		xTimeToWake = xConstTickCount + xTicksToWait;
+
+		/* The list item will be inserted in wake time order. */
+		listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake );
+
+		if( xTimeToWake < xConstTickCount )
+		{
+			/* Wake time has overflowed.  Place this item in the overflow list. */
+			vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
+		}
+		else
+		{
+			/* The wake time has not overflowed, so the current block list is used. */
+			vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) );
+
+			/* If the task entering the blocked state was placed at the head of the
+			list of blocked tasks then xNextTaskUnblockTime needs to be updated
+			too. */
+			if( xTimeToWake < xNextTaskUnblockTime )
+			{
+				xNextTaskUnblockTime = xTimeToWake;
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+
+		/* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */
+		( void ) xCanBlockIndefinitely;
+	}
+	#endif /* INCLUDE_vTaskSuspend */
+}
+
+/* Code below here allows additional code to be inserted into this source file,
+especially where access to file scope functions and data is needed (for example
+when performing module tests). */
+
+#ifdef FREERTOS_MODULE_TEST
+	#include "tasks_test_access_functions.h"
+#endif
+
+
+#if( configINCLUDE_FREERTOS_TASK_C_ADDITIONS_H == 1 )
+
+	#include "freertos_tasks_c_additions.h"
+
+	#ifdef FREERTOS_TASKS_C_ADDITIONS_INIT
+		static void freertos_tasks_c_additions_init( void )
+		{
+			FREERTOS_TASKS_C_ADDITIONS_INIT();
+		}
+	#endif
+
+#endif
+
+
diff --git a/components/freertos/timers.c b/components/freertos/timers.c
new file mode 100644
index 00000000..ad18f3e1
--- /dev/null
+++ b/components/freertos/timers.c
@@ -0,0 +1,1102 @@
+/*
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/* Standard includes. */
+#include 
+
+/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
+all the API functions to use the MPU wrappers.  That should only be done when
+task.h is included from an application file. */
+#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
+
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+#include "timers.h"
+
+#if ( INCLUDE_xTimerPendFunctionCall == 1 ) && ( configUSE_TIMERS == 0 )
+	#error configUSE_TIMERS must be set to 1 to make the xTimerPendFunctionCall() function available.
+#endif
+
+/* Lint e9021, e961 and e750 are suppressed as a MISRA exception justified
+because the MPU ports require MPU_WRAPPERS_INCLUDED_FROM_API_FILE to be defined
+for the header files above, but not in this file, in order to generate the
+correct privileged Vs unprivileged linkage and placement. */
+#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE /*lint !e9021 !e961 !e750. */
+
+
+/* This entire source file will be skipped if the application is not configured
+to include software timer functionality.  This #if is closed at the very bottom
+of this file.  If you want to include software timer functionality then ensure
+configUSE_TIMERS is set to 1 in FreeRTOSConfig.h. */
+#if ( configUSE_TIMERS == 1 )
+
+/* Misc definitions. */
+#define tmrNO_DELAY		( TickType_t ) 0U
+
+/* The name assigned to the timer service task.  This can be overridden by
+defining trmTIMER_SERVICE_TASK_NAME in FreeRTOSConfig.h. */
+#ifndef configTIMER_SERVICE_TASK_NAME
+	#define configTIMER_SERVICE_TASK_NAME "Tmr Svc"
+#endif
+
+/* Bit definitions used in the ucStatus member of a timer structure. */
+#define tmrSTATUS_IS_ACTIVE					( ( uint8_t ) 0x01 )
+#define tmrSTATUS_IS_STATICALLY_ALLOCATED	( ( uint8_t ) 0x02 )
+#define tmrSTATUS_IS_AUTORELOAD				( ( uint8_t ) 0x04 )
+
+/* The definition of the timers themselves. */
+typedef struct tmrTimerControl /* The old naming convention is used to prevent breaking kernel aware debuggers. */
+{
+	const char				*pcTimerName;		/*<< Text name.  This is not used by the kernel, it is included simply to make debugging easier. */ /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+	ListItem_t				xTimerListItem;		/*<< Standard linked list item as used by all kernel features for event management. */
+	TickType_t				xTimerPeriodInTicks;/*<< How quickly and often the timer expires. */
+	void 					*pvTimerID;			/*<< An ID to identify the timer.  This allows the timer to be identified when the same callback is used for multiple timers. */
+	TimerCallbackFunction_t	pxCallbackFunction;	/*<< The function that will be called when the timer expires. */
+	#if( configUSE_TRACE_FACILITY == 1 )
+		UBaseType_t			uxTimerNumber;		/*<< An ID assigned by trace tools such as FreeRTOS+Trace */
+	#endif
+	uint8_t 				ucStatus;			/*<< Holds bits to say if the timer was statically allocated or not, and if it is active or not. */
+} xTIMER;
+
+/* The old xTIMER name is maintained above then typedefed to the new Timer_t
+name below to enable the use of older kernel aware debuggers. */
+typedef xTIMER Timer_t;
+
+/* The definition of messages that can be sent and received on the timer queue.
+Two types of message can be queued - messages that manipulate a software timer,
+and messages that request the execution of a non-timer related callback.  The
+two message types are defined in two separate structures, xTimerParametersType
+and xCallbackParametersType respectively. */
+typedef struct tmrTimerParameters
+{
+	TickType_t			xMessageValue;		/*<< An optional value used by a subset of commands, for example, when changing the period of a timer. */
+	Timer_t *			pxTimer;			/*<< The timer to which the command will be applied. */
+} TimerParameter_t;
+
+
+typedef struct tmrCallbackParameters
+{
+	PendedFunction_t	pxCallbackFunction;	/* << The callback function to execute. */
+	void *pvParameter1;						/* << The value that will be used as the callback functions first parameter. */
+	uint32_t ulParameter2;					/* << The value that will be used as the callback functions second parameter. */
+} CallbackParameters_t;
+
+/* The structure that contains the two message types, along with an identifier
+that is used to determine which message type is valid. */
+typedef struct tmrTimerQueueMessage
+{
+	BaseType_t			xMessageID;			/*<< The command being sent to the timer service task. */
+	union
+	{
+		TimerParameter_t xTimerParameters;
+
+		/* Don't include xCallbackParameters if it is not going to be used as
+		it makes the structure (and therefore the timer queue) larger. */
+		#if ( INCLUDE_xTimerPendFunctionCall == 1 )
+			CallbackParameters_t xCallbackParameters;
+		#endif /* INCLUDE_xTimerPendFunctionCall */
+	} u;
+} DaemonTaskMessage_t;
+
+/*lint -save -e956 A manual analysis and inspection has been used to determine
+which static variables must be declared volatile. */
+
+/* The list in which active timers are stored.  Timers are referenced in expire
+time order, with the nearest expiry time at the front of the list.  Only the
+timer service task is allowed to access these lists.
+xActiveTimerList1 and xActiveTimerList2 could be at function scope but that
+breaks some kernel aware debuggers, and debuggers that reply on removing the
+static qualifier. */
+PRIVILEGED_DATA static List_t xActiveTimerList1;
+PRIVILEGED_DATA static List_t xActiveTimerList2;
+PRIVILEGED_DATA static List_t *pxCurrentTimerList;
+PRIVILEGED_DATA static List_t *pxOverflowTimerList;
+
+/* A queue that is used to send commands to the timer service task. */
+PRIVILEGED_DATA static QueueHandle_t xTimerQueue = NULL;
+PRIVILEGED_DATA static TaskHandle_t xTimerTaskHandle = NULL;
+
+/*lint -restore */
+
+/*-----------------------------------------------------------*/
+
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+
+	/* If static allocation is supported then the application must provide the
+	following callback function - which enables the application to optionally
+	provide the memory that will be used by the timer task as the task's stack
+	and TCB. */
+	extern void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize );
+
+#endif
+
+/*
+ * Initialise the infrastructure used by the timer service task if it has not
+ * been initialised already.
+ */
+static void prvCheckForValidListAndQueue( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * The timer service task (daemon).  Timer functionality is controlled by this
+ * task.  Other tasks communicate with the timer service task using the
+ * xTimerQueue queue.
+ */
+static portTASK_FUNCTION_PROTO( prvTimerTask, pvParameters ) PRIVILEGED_FUNCTION;
+
+/*
+ * Called by the timer service task to interpret and process a command it
+ * received on the timer queue.
+ */
+static void prvProcessReceivedCommands( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * Insert the timer into either xActiveTimerList1, or xActiveTimerList2,
+ * depending on if the expire time causes a timer counter overflow.
+ */
+static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime ) PRIVILEGED_FUNCTION;
+
+/*
+ * An active timer has reached its expire time.  Reload the timer if it is an
+ * auto reload timer, then call its callback.
+ */
+static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow ) PRIVILEGED_FUNCTION;
+
+/*
+ * The tick count has overflowed.  Switch the timer lists after ensuring the
+ * current timer list does not still reference some timers.
+ */
+static void prvSwitchTimerLists( void ) PRIVILEGED_FUNCTION;
+
+/*
+ * Obtain the current tick count, setting *pxTimerListsWereSwitched to pdTRUE
+ * if a tick count overflow occurred since prvSampleTimeNow() was last called.
+ */
+static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched ) PRIVILEGED_FUNCTION;
+
+/*
+ * If the timer list contains any active timers then return the expire time of
+ * the timer that will expire first and set *pxListWasEmpty to false.  If the
+ * timer list does not contain any timers then return 0 and set *pxListWasEmpty
+ * to pdTRUE.
+ */
+static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty ) PRIVILEGED_FUNCTION;
+
+/*
+ * If a timer has expired, process it.  Otherwise, block the timer service task
+ * until either a timer does expire or a command is received.
+ */
+static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty ) PRIVILEGED_FUNCTION;
+
+/*
+ * Called after a Timer_t structure has been allocated either statically or
+ * dynamically to fill in the structure's members.
+ */
+static void prvInitialiseNewTimer(	const char * const pcTimerName,			/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+									const TickType_t xTimerPeriodInTicks,
+									const UBaseType_t uxAutoReload,
+									void * const pvTimerID,
+									TimerCallbackFunction_t pxCallbackFunction,
+									Timer_t *pxNewTimer ) PRIVILEGED_FUNCTION;
+/*-----------------------------------------------------------*/
+
+BaseType_t xTimerCreateTimerTask( void )
+{
+BaseType_t xReturn = pdFAIL;
+
+	/* This function is called when the scheduler is started if
+	configUSE_TIMERS is set to 1.  Check that the infrastructure used by the
+	timer service task has been created/initialised.  If timers have already
+	been created then the initialisation will already have been performed. */
+	prvCheckForValidListAndQueue();
+
+	if( xTimerQueue != NULL )
+	{
+		#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+		{
+			StaticTask_t *pxTimerTaskTCBBuffer = NULL;
+			StackType_t *pxTimerTaskStackBuffer = NULL;
+			uint32_t ulTimerTaskStackSize;
+
+			vApplicationGetTimerTaskMemory( &pxTimerTaskTCBBuffer, &pxTimerTaskStackBuffer, &ulTimerTaskStackSize );
+			xTimerTaskHandle = xTaskCreateStatic(	prvTimerTask,
+													configTIMER_SERVICE_TASK_NAME,
+													ulTimerTaskStackSize,
+													NULL,
+													( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
+													pxTimerTaskStackBuffer,
+													pxTimerTaskTCBBuffer );
+
+			if( xTimerTaskHandle != NULL )
+			{
+				xReturn = pdPASS;
+			}
+		}
+		#else
+		{
+			xReturn = xTaskCreate(	prvTimerTask,
+									configTIMER_SERVICE_TASK_NAME,
+									configTIMER_TASK_STACK_DEPTH,
+									NULL,
+									( ( UBaseType_t ) configTIMER_TASK_PRIORITY ) | portPRIVILEGE_BIT,
+									&xTimerTaskHandle );
+		}
+		#endif /* configSUPPORT_STATIC_ALLOCATION */
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	configASSERT( xReturn );
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+#if( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+
+	TimerHandle_t xTimerCreate(	const char * const pcTimerName,			/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+								const TickType_t xTimerPeriodInTicks,
+								const UBaseType_t uxAutoReload,
+								void * const pvTimerID,
+								TimerCallbackFunction_t pxCallbackFunction )
+	{
+	Timer_t *pxNewTimer;
+
+		pxNewTimer = ( Timer_t * ) pvPortMalloc( sizeof( Timer_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of Timer_t is always a pointer to the timer's mame. */
+
+		if( pxNewTimer != NULL )
+		{
+			/* Status is thus far zero as the timer is not created statically
+			and has not been started.  The autoreload bit may get set in
+			prvInitialiseNewTimer. */
+			pxNewTimer->ucStatus = 0x00;
+			prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
+		}
+
+		return pxNewTimer;
+	}
+
+#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
+/*-----------------------------------------------------------*/
+
+#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+
+	TimerHandle_t xTimerCreateStatic(	const char * const pcTimerName,		/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+										const TickType_t xTimerPeriodInTicks,
+										const UBaseType_t uxAutoReload,
+										void * const pvTimerID,
+										TimerCallbackFunction_t pxCallbackFunction,
+										StaticTimer_t *pxTimerBuffer )
+	{
+	Timer_t *pxNewTimer;
+
+		#if( configASSERT_DEFINED == 1 )
+		{
+			/* Sanity check that the size of the structure used to declare a
+			variable of type StaticTimer_t equals the size of the real timer
+			structure. */
+			volatile size_t xSize = sizeof( StaticTimer_t );
+			configASSERT( xSize == sizeof( Timer_t ) );
+			( void ) xSize; /* Keeps lint quiet when configASSERT() is not defined. */
+		}
+		#endif /* configASSERT_DEFINED */
+
+		/* A pointer to a StaticTimer_t structure MUST be provided, use it. */
+		configASSERT( pxTimerBuffer );
+		pxNewTimer = ( Timer_t * ) pxTimerBuffer; /*lint !e740 !e9087 StaticTimer_t is a pointer to a Timer_t, so guaranteed to be aligned and sized correctly (checked by an assert()), so this is safe. */
+
+		if( pxNewTimer != NULL )
+		{
+			/* Timers can be created statically or dynamically so note this
+			timer was created statically in case it is later deleted.  The
+			autoreload bit may get set in prvInitialiseNewTimer(). */
+			pxNewTimer->ucStatus = tmrSTATUS_IS_STATICALLY_ALLOCATED;
+
+			prvInitialiseNewTimer( pcTimerName, xTimerPeriodInTicks, uxAutoReload, pvTimerID, pxCallbackFunction, pxNewTimer );
+		}
+
+		return pxNewTimer;
+	}
+
+#endif /* configSUPPORT_STATIC_ALLOCATION */
+/*-----------------------------------------------------------*/
+
+static void prvInitialiseNewTimer(	const char * const pcTimerName,			/*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+									const TickType_t xTimerPeriodInTicks,
+									const UBaseType_t uxAutoReload,
+									void * const pvTimerID,
+									TimerCallbackFunction_t pxCallbackFunction,
+									Timer_t *pxNewTimer )
+{
+	/* 0 is not a valid value for xTimerPeriodInTicks. */
+	configASSERT( ( xTimerPeriodInTicks > 0 ) );
+
+	if( pxNewTimer != NULL )
+	{
+		/* Ensure the infrastructure used by the timer service task has been
+		created/initialised. */
+		prvCheckForValidListAndQueue();
+
+		/* Initialise the timer structure members using the function
+		parameters. */
+		pxNewTimer->pcTimerName = pcTimerName;
+		pxNewTimer->xTimerPeriodInTicks = xTimerPeriodInTicks;
+		pxNewTimer->pvTimerID = pvTimerID;
+		pxNewTimer->pxCallbackFunction = pxCallbackFunction;
+		vListInitialiseItem( &( pxNewTimer->xTimerListItem ) );
+		if( uxAutoReload != pdFALSE )
+		{
+			pxNewTimer->ucStatus |= tmrSTATUS_IS_AUTORELOAD;
+		}
+		traceTIMER_CREATE( pxNewTimer );
+	}
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xTimerGenericCommand( TimerHandle_t xTimer, const BaseType_t xCommandID, const TickType_t xOptionalValue, BaseType_t * const pxHigherPriorityTaskWoken, const TickType_t xTicksToWait )
+{
+BaseType_t xReturn = pdFAIL;
+DaemonTaskMessage_t xMessage;
+
+	configASSERT( xTimer );
+
+	/* Send a message to the timer service task to perform a particular action
+	on a particular timer definition. */
+	if( xTimerQueue != NULL )
+	{
+		/* Send a command to the timer service task to start the xTimer timer. */
+		xMessage.xMessageID = xCommandID;
+		xMessage.u.xTimerParameters.xMessageValue = xOptionalValue;
+		xMessage.u.xTimerParameters.pxTimer = xTimer;
+
+		if( xCommandID < tmrFIRST_FROM_ISR_COMMAND )
+		{
+			if( xTaskGetSchedulerState() == taskSCHEDULER_RUNNING )
+			{
+				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
+			}
+			else
+			{
+				xReturn = xQueueSendToBack( xTimerQueue, &xMessage, tmrNO_DELAY );
+			}
+		}
+		else
+		{
+			xReturn = xQueueSendToBackFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
+		}
+
+		traceTIMER_COMMAND_SEND( xTimer, xCommandID, xOptionalValue, xReturn );
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+TaskHandle_t xTimerGetTimerDaemonTaskHandle( void )
+{
+	/* If xTimerGetTimerDaemonTaskHandle() is called before the scheduler has been
+	started, then xTimerTaskHandle will be NULL. */
+	configASSERT( ( xTimerTaskHandle != NULL ) );
+	return xTimerTaskHandle;
+}
+/*-----------------------------------------------------------*/
+
+TickType_t xTimerGetPeriod( TimerHandle_t xTimer )
+{
+Timer_t *pxTimer = xTimer;
+
+	configASSERT( xTimer );
+	return pxTimer->xTimerPeriodInTicks;
+}
+/*-----------------------------------------------------------*/
+
+void vTimerSetReloadMode( TimerHandle_t xTimer, const UBaseType_t uxAutoReload )
+{
+Timer_t * pxTimer =  xTimer;
+
+	configASSERT( xTimer );
+	taskENTER_CRITICAL();
+	{
+		if( uxAutoReload != pdFALSE )
+		{
+			pxTimer->ucStatus |= tmrSTATUS_IS_AUTORELOAD;
+		}
+		else
+		{
+			pxTimer->ucStatus &= ~tmrSTATUS_IS_AUTORELOAD;
+		}
+	}
+	taskEXIT_CRITICAL();
+}
+/*-----------------------------------------------------------*/
+
+TickType_t xTimerGetExpiryTime( TimerHandle_t xTimer )
+{
+Timer_t * pxTimer =  xTimer;
+TickType_t xReturn;
+
+	configASSERT( xTimer );
+	xReturn = listGET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ) );
+	return xReturn;
+}
+/*-----------------------------------------------------------*/
+
+const char * pcTimerGetName( TimerHandle_t xTimer ) /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+{
+Timer_t *pxTimer = xTimer;
+
+	configASSERT( xTimer );
+	return pxTimer->pcTimerName;
+}
+/*-----------------------------------------------------------*/
+
+static void prvProcessExpiredTimer( const TickType_t xNextExpireTime, const TickType_t xTimeNow )
+{
+BaseType_t xResult;
+Timer_t * const pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+
+	/* Remove the timer from the list of active timers.  A check has already
+	been performed to ensure the list is not empty. */
+	( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
+	traceTIMER_EXPIRED( pxTimer );
+
+	/* If the timer is an auto reload timer then calculate the next
+	expiry time and re-insert the timer in the list of active timers. */
+	if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
+	{
+		/* The timer is inserted into a list using a time relative to anything
+		other than the current time.  It will therefore be inserted into the
+		correct list relative to the time this task thinks it is now. */
+		if( prvInsertTimerInActiveList( pxTimer, ( xNextExpireTime + pxTimer->xTimerPeriodInTicks ), xTimeNow, xNextExpireTime ) != pdFALSE )
+		{
+			/* The timer expired before it was added to the active timer
+			list.  Reload it now.  */
+			xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
+			configASSERT( xResult );
+			( void ) xResult;
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	else
+	{
+		pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
+		mtCOVERAGE_TEST_MARKER();
+	}
+
+	/* Call the timer callback. */
+	pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
+}
+/*-----------------------------------------------------------*/
+
+static portTASK_FUNCTION( prvTimerTask, pvParameters )
+{
+TickType_t xNextExpireTime;
+BaseType_t xListWasEmpty;
+
+	/* Just to avoid compiler warnings. */
+	( void ) pvParameters;
+
+	#if( configUSE_DAEMON_TASK_STARTUP_HOOK == 1 )
+	{
+		extern void vApplicationDaemonTaskStartupHook( void );
+
+		/* Allow the application writer to execute some code in the context of
+		this task at the point the task starts executing.  This is useful if the
+		application includes initialisation code that would benefit from
+		executing after the scheduler has been started. */
+		vApplicationDaemonTaskStartupHook();
+	}
+	#endif /* configUSE_DAEMON_TASK_STARTUP_HOOK */
+
+	for( ;; )
+	{
+		/* Query the timers list to see if it contains any timers, and if so,
+		obtain the time at which the next timer will expire. */
+		xNextExpireTime = prvGetNextExpireTime( &xListWasEmpty );
+
+		/* If a timer has expired, process it.  Otherwise, block this task
+		until either a timer does expire, or a command is received. */
+		prvProcessTimerOrBlockTask( xNextExpireTime, xListWasEmpty );
+
+		/* Empty the command queue. */
+		prvProcessReceivedCommands();
+	}
+}
+/*-----------------------------------------------------------*/
+
+static void prvProcessTimerOrBlockTask( const TickType_t xNextExpireTime, BaseType_t xListWasEmpty )
+{
+TickType_t xTimeNow;
+BaseType_t xTimerListsWereSwitched;
+
+	vTaskSuspendAll();
+	{
+		/* Obtain the time now to make an assessment as to whether the timer
+		has expired or not.  If obtaining the time causes the lists to switch
+		then don't process this timer as any timers that remained in the list
+		when the lists were switched will have been processed within the
+		prvSampleTimeNow() function. */
+		xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
+		if( xTimerListsWereSwitched == pdFALSE )
+		{
+			/* The tick count has not overflowed, has the timer expired? */
+			if( ( xListWasEmpty == pdFALSE ) && ( xNextExpireTime <= xTimeNow ) )
+			{
+				( void ) xTaskResumeAll();
+				prvProcessExpiredTimer( xNextExpireTime, xTimeNow );
+			}
+			else
+			{
+				/* The tick count has not overflowed, and the next expire
+				time has not been reached yet.  This task should therefore
+				block to wait for the next expire time or a command to be
+				received - whichever comes first.  The following line cannot
+				be reached unless xNextExpireTime > xTimeNow, except in the
+				case when the current timer list is empty. */
+				if( xListWasEmpty != pdFALSE )
+				{
+					/* The current timer list is empty - is the overflow list
+					also empty? */
+					xListWasEmpty = listLIST_IS_EMPTY( pxOverflowTimerList );
+				}
+
+				vQueueWaitForMessageRestricted( xTimerQueue, ( xNextExpireTime - xTimeNow ), xListWasEmpty );
+
+				if( xTaskResumeAll() == pdFALSE )
+				{
+					/* Yield to wait for either a command to arrive, or the
+					block time to expire.  If a command arrived between the
+					critical section being exited and this yield then the yield
+					will not cause the task to block. */
+					portYIELD_WITHIN_API();
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+		}
+		else
+		{
+			( void ) xTaskResumeAll();
+		}
+	}
+}
+/*-----------------------------------------------------------*/
+
+static TickType_t prvGetNextExpireTime( BaseType_t * const pxListWasEmpty )
+{
+TickType_t xNextExpireTime;
+
+	/* Timers are listed in expiry time order, with the head of the list
+	referencing the task that will expire first.  Obtain the time at which
+	the timer with the nearest expiry time will expire.  If there are no
+	active timers then just set the next expire time to 0.  That will cause
+	this task to unblock when the tick count overflows, at which point the
+	timer lists will be switched and the next expiry time can be
+	re-assessed.  */
+	*pxListWasEmpty = listLIST_IS_EMPTY( pxCurrentTimerList );
+	if( *pxListWasEmpty == pdFALSE )
+	{
+		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
+	}
+	else
+	{
+		/* Ensure the task unblocks when the tick count rolls over. */
+		xNextExpireTime = ( TickType_t ) 0U;
+	}
+
+	return xNextExpireTime;
+}
+/*-----------------------------------------------------------*/
+
+static TickType_t prvSampleTimeNow( BaseType_t * const pxTimerListsWereSwitched )
+{
+TickType_t xTimeNow;
+PRIVILEGED_DATA static TickType_t xLastTime = ( TickType_t ) 0U; /*lint !e956 Variable is only accessible to one task. */
+
+	xTimeNow = xTaskGetTickCount();
+
+	if( xTimeNow < xLastTime )
+	{
+		prvSwitchTimerLists();
+		*pxTimerListsWereSwitched = pdTRUE;
+	}
+	else
+	{
+		*pxTimerListsWereSwitched = pdFALSE;
+	}
+
+	xLastTime = xTimeNow;
+
+	return xTimeNow;
+}
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvInsertTimerInActiveList( Timer_t * const pxTimer, const TickType_t xNextExpiryTime, const TickType_t xTimeNow, const TickType_t xCommandTime )
+{
+BaseType_t xProcessTimerNow = pdFALSE;
+
+	listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xNextExpiryTime );
+	listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
+
+	if( xNextExpiryTime <= xTimeNow )
+	{
+		/* Has the expiry time elapsed between the command to start/reset a
+		timer was issued, and the time the command was processed? */
+		if( ( ( TickType_t ) ( xTimeNow - xCommandTime ) ) >= pxTimer->xTimerPeriodInTicks ) /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+		{
+			/* The time between a command being issued and the command being
+			processed actually exceeds the timers period.  */
+			xProcessTimerNow = pdTRUE;
+		}
+		else
+		{
+			vListInsert( pxOverflowTimerList, &( pxTimer->xTimerListItem ) );
+		}
+	}
+	else
+	{
+		if( ( xTimeNow < xCommandTime ) && ( xNextExpiryTime >= xCommandTime ) )
+		{
+			/* If, since the command was issued, the tick count has overflowed
+			but the expiry time has not, then the timer must have already passed
+			its expiry time and should be processed immediately. */
+			xProcessTimerNow = pdTRUE;
+		}
+		else
+		{
+			vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
+		}
+	}
+
+	return xProcessTimerNow;
+}
+/*-----------------------------------------------------------*/
+
+static void	prvProcessReceivedCommands( void )
+{
+DaemonTaskMessage_t xMessage;
+Timer_t *pxTimer;
+BaseType_t xTimerListsWereSwitched, xResult;
+TickType_t xTimeNow;
+
+	while( xQueueReceive( xTimerQueue, &xMessage, tmrNO_DELAY ) != pdFAIL ) /*lint !e603 xMessage does not have to be initialised as it is passed out, not in, and it is not used unless xQueueReceive() returns pdTRUE. */
+	{
+		#if ( INCLUDE_xTimerPendFunctionCall == 1 )
+		{
+			/* Negative commands are pended function calls rather than timer
+			commands. */
+			if( xMessage.xMessageID < ( BaseType_t ) 0 )
+			{
+				const CallbackParameters_t * const pxCallback = &( xMessage.u.xCallbackParameters );
+
+				/* The timer uses the xCallbackParameters member to request a
+				callback be executed.  Check the callback is not NULL. */
+				configASSERT( pxCallback );
+
+				/* Call the function. */
+				pxCallback->pxCallbackFunction( pxCallback->pvParameter1, pxCallback->ulParameter2 );
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+		}
+		#endif /* INCLUDE_xTimerPendFunctionCall */
+
+		/* Commands that are positive are timer commands rather than pended
+		function calls. */
+		if( xMessage.xMessageID >= ( BaseType_t ) 0 )
+		{
+			/* The messages uses the xTimerParameters member to work on a
+			software timer. */
+			pxTimer = xMessage.u.xTimerParameters.pxTimer;
+
+			if( listIS_CONTAINED_WITHIN( NULL, &( pxTimer->xTimerListItem ) ) == pdFALSE ) /*lint !e961. The cast is only redundant when NULL is passed into the macro. */
+			{
+				/* The timer is in a list, remove it. */
+				( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+
+			traceTIMER_COMMAND_RECEIVED( pxTimer, xMessage.xMessageID, xMessage.u.xTimerParameters.xMessageValue );
+
+			/* In this case the xTimerListsWereSwitched parameter is not used, but
+			it must be present in the function call.  prvSampleTimeNow() must be
+			called after the message is received from xTimerQueue so there is no
+			possibility of a higher priority task adding a message to the message
+			queue with a time that is ahead of the timer daemon task (because it
+			pre-empted the timer daemon task after the xTimeNow value was set). */
+			xTimeNow = prvSampleTimeNow( &xTimerListsWereSwitched );
+
+			switch( xMessage.xMessageID )
+			{
+				case tmrCOMMAND_START :
+				case tmrCOMMAND_START_FROM_ISR :
+				case tmrCOMMAND_RESET :
+				case tmrCOMMAND_RESET_FROM_ISR :
+				case tmrCOMMAND_START_DONT_TRACE :
+					/* Start or restart a timer. */
+					pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
+					if( prvInsertTimerInActiveList( pxTimer,  xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, xTimeNow, xMessage.u.xTimerParameters.xMessageValue ) != pdFALSE )
+					{
+						/* The timer expired before it was added to the active
+						timer list.  Process it now. */
+						pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
+						traceTIMER_EXPIRED( pxTimer );
+
+						if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
+						{
+							xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xMessage.u.xTimerParameters.xMessageValue + pxTimer->xTimerPeriodInTicks, NULL, tmrNO_DELAY );
+							configASSERT( xResult );
+							( void ) xResult;
+						}
+						else
+						{
+							mtCOVERAGE_TEST_MARKER();
+						}
+					}
+					else
+					{
+						mtCOVERAGE_TEST_MARKER();
+					}
+					break;
+
+				case tmrCOMMAND_STOP :
+				case tmrCOMMAND_STOP_FROM_ISR :
+					/* The timer has already been removed from the active list. */
+					pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
+					break;
+
+				case tmrCOMMAND_CHANGE_PERIOD :
+				case tmrCOMMAND_CHANGE_PERIOD_FROM_ISR :
+					pxTimer->ucStatus |= tmrSTATUS_IS_ACTIVE;
+					pxTimer->xTimerPeriodInTicks = xMessage.u.xTimerParameters.xMessageValue;
+					configASSERT( ( pxTimer->xTimerPeriodInTicks > 0 ) );
+
+					/* The new period does not really have a reference, and can
+					be longer or shorter than the old one.  The command time is
+					therefore set to the current time, and as the period cannot
+					be zero the next expiry time can only be in the future,
+					meaning (unlike for the xTimerStart() case above) there is
+					no fail case that needs to be handled here. */
+					( void ) prvInsertTimerInActiveList( pxTimer, ( xTimeNow + pxTimer->xTimerPeriodInTicks ), xTimeNow, xTimeNow );
+					break;
+
+				case tmrCOMMAND_DELETE :
+					#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
+					{
+						/* The timer has already been removed from the active list,
+						just free up the memory if the memory was dynamically
+						allocated. */
+						if( ( pxTimer->ucStatus & tmrSTATUS_IS_STATICALLY_ALLOCATED ) == ( uint8_t ) 0 )
+						{
+							vPortFree( pxTimer );
+						}
+						else
+						{
+							pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
+						}
+					}
+					#else
+					{
+						/* If dynamic allocation is not enabled, the memory
+						could not have been dynamically allocated. So there is
+						no need to free the memory - just mark the timer as
+						"not active". */
+						pxTimer->ucStatus &= ~tmrSTATUS_IS_ACTIVE;
+					}
+					#endif /* configSUPPORT_DYNAMIC_ALLOCATION */
+					break;
+
+				default	:
+					/* Don't expect to get here. */
+					break;
+			}
+		}
+	}
+}
+/*-----------------------------------------------------------*/
+
+static void prvSwitchTimerLists( void )
+{
+TickType_t xNextExpireTime, xReloadTime;
+List_t *pxTemp;
+Timer_t *pxTimer;
+BaseType_t xResult;
+
+	/* The tick count has overflowed.  The timer lists must be switched.
+	If there are any timers still referenced from the current timer list
+	then they must have expired and should be processed before the lists
+	are switched. */
+	while( listLIST_IS_EMPTY( pxCurrentTimerList ) == pdFALSE )
+	{
+		xNextExpireTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxCurrentTimerList );
+
+		/* Remove the timer from the list. */
+		pxTimer = ( Timer_t * ) listGET_OWNER_OF_HEAD_ENTRY( pxCurrentTimerList ); /*lint !e9087 !e9079 void * is used as this macro is used with tasks and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+		( void ) uxListRemove( &( pxTimer->xTimerListItem ) );
+		traceTIMER_EXPIRED( pxTimer );
+
+		/* Execute its callback, then send a command to restart the timer if
+		it is an auto-reload timer.  It cannot be restarted here as the lists
+		have not yet been switched. */
+		pxTimer->pxCallbackFunction( ( TimerHandle_t ) pxTimer );
+
+		if( ( pxTimer->ucStatus & tmrSTATUS_IS_AUTORELOAD ) != 0 )
+		{
+			/* Calculate the reload value, and if the reload value results in
+			the timer going into the same timer list then it has already expired
+			and the timer should be re-inserted into the current list so it is
+			processed again within this loop.  Otherwise a command should be sent
+			to restart the timer to ensure it is only inserted into a list after
+			the lists have been swapped. */
+			xReloadTime = ( xNextExpireTime + pxTimer->xTimerPeriodInTicks );
+			if( xReloadTime > xNextExpireTime )
+			{
+				listSET_LIST_ITEM_VALUE( &( pxTimer->xTimerListItem ), xReloadTime );
+				listSET_LIST_ITEM_OWNER( &( pxTimer->xTimerListItem ), pxTimer );
+				vListInsert( pxCurrentTimerList, &( pxTimer->xTimerListItem ) );
+			}
+			else
+			{
+				xResult = xTimerGenericCommand( pxTimer, tmrCOMMAND_START_DONT_TRACE, xNextExpireTime, NULL, tmrNO_DELAY );
+				configASSERT( xResult );
+				( void ) xResult;
+			}
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+
+	pxTemp = pxCurrentTimerList;
+	pxCurrentTimerList = pxOverflowTimerList;
+	pxOverflowTimerList = pxTemp;
+}
+/*-----------------------------------------------------------*/
+
+static void prvCheckForValidListAndQueue( void )
+{
+	/* Check that the list from which active timers are referenced, and the
+	queue used to communicate with the timer service, have been
+	initialised. */
+	taskENTER_CRITICAL();
+	{
+		if( xTimerQueue == NULL )
+		{
+			vListInitialise( &xActiveTimerList1 );
+			vListInitialise( &xActiveTimerList2 );
+			pxCurrentTimerList = &xActiveTimerList1;
+			pxOverflowTimerList = &xActiveTimerList2;
+
+			#if( configSUPPORT_STATIC_ALLOCATION == 1 )
+			{
+				/* The timer queue is allocated statically in case
+				configSUPPORT_DYNAMIC_ALLOCATION is 0. */
+				static StaticQueue_t xStaticTimerQueue; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */
+				static uint8_t ucStaticTimerQueueStorage[ ( size_t ) configTIMER_QUEUE_LENGTH * sizeof( DaemonTaskMessage_t ) ]; /*lint !e956 Ok to declare in this manner to prevent additional conditional compilation guards in other locations. */
+
+				xTimerQueue = xQueueCreateStatic( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, ( UBaseType_t ) sizeof( DaemonTaskMessage_t ), &( ucStaticTimerQueueStorage[ 0 ] ), &xStaticTimerQueue );
+			}
+			#else
+			{
+				xTimerQueue = xQueueCreate( ( UBaseType_t ) configTIMER_QUEUE_LENGTH, sizeof( DaemonTaskMessage_t ) );
+			}
+			#endif
+
+			#if ( configQUEUE_REGISTRY_SIZE > 0 )
+			{
+				if( xTimerQueue != NULL )
+				{
+					vQueueAddToRegistry( xTimerQueue, "TmrQ" );
+				}
+				else
+				{
+					mtCOVERAGE_TEST_MARKER();
+				}
+			}
+			#endif /* configQUEUE_REGISTRY_SIZE */
+		}
+		else
+		{
+			mtCOVERAGE_TEST_MARKER();
+		}
+	}
+	taskEXIT_CRITICAL();
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xTimerIsTimerActive( TimerHandle_t xTimer )
+{
+BaseType_t xReturn;
+Timer_t *pxTimer = xTimer;
+
+	configASSERT( xTimer );
+
+	/* Is the timer in the list of active timers? */
+	taskENTER_CRITICAL();
+	{
+		if( ( pxTimer->ucStatus & tmrSTATUS_IS_ACTIVE ) == 0 )
+		{
+			xReturn = pdFALSE;
+		}
+		else
+		{
+			xReturn = pdTRUE;
+		}
+	}
+	taskEXIT_CRITICAL();
+
+	return xReturn;
+} /*lint !e818 Can't be pointer to const due to the typedef. */
+/*-----------------------------------------------------------*/
+
+void *pvTimerGetTimerID( const TimerHandle_t xTimer )
+{
+Timer_t * const pxTimer = xTimer;
+void *pvReturn;
+
+	configASSERT( xTimer );
+
+	taskENTER_CRITICAL();
+	{
+		pvReturn = pxTimer->pvTimerID;
+	}
+	taskEXIT_CRITICAL();
+
+	return pvReturn;
+}
+/*-----------------------------------------------------------*/
+
+void vTimerSetTimerID( TimerHandle_t xTimer, void *pvNewID )
+{
+Timer_t * const pxTimer = xTimer;
+
+	configASSERT( xTimer );
+
+	taskENTER_CRITICAL();
+	{
+		pxTimer->pvTimerID = pvNewID;
+	}
+	taskEXIT_CRITICAL();
+}
+/*-----------------------------------------------------------*/
+
+#if( INCLUDE_xTimerPendFunctionCall == 1 )
+
+	BaseType_t xTimerPendFunctionCallFromISR( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, BaseType_t *pxHigherPriorityTaskWoken )
+	{
+	DaemonTaskMessage_t xMessage;
+	BaseType_t xReturn;
+
+		/* Complete the message with the function parameters and post it to the
+		daemon task. */
+		xMessage.xMessageID = tmrCOMMAND_EXECUTE_CALLBACK_FROM_ISR;
+		xMessage.u.xCallbackParameters.pxCallbackFunction = xFunctionToPend;
+		xMessage.u.xCallbackParameters.pvParameter1 = pvParameter1;
+		xMessage.u.xCallbackParameters.ulParameter2 = ulParameter2;
+
+		xReturn = xQueueSendFromISR( xTimerQueue, &xMessage, pxHigherPriorityTaskWoken );
+
+		tracePEND_FUNC_CALL_FROM_ISR( xFunctionToPend, pvParameter1, ulParameter2, xReturn );
+
+		return xReturn;
+	}
+
+#endif /* INCLUDE_xTimerPendFunctionCall */
+/*-----------------------------------------------------------*/
+
+#if( INCLUDE_xTimerPendFunctionCall == 1 )
+
+	BaseType_t xTimerPendFunctionCall( PendedFunction_t xFunctionToPend, void *pvParameter1, uint32_t ulParameter2, TickType_t xTicksToWait )
+	{
+	DaemonTaskMessage_t xMessage;
+	BaseType_t xReturn;
+
+		/* This function can only be called after a timer has been created or
+		after the scheduler has been started because, until then, the timer
+		queue does not exist. */
+		configASSERT( xTimerQueue );
+
+		/* Complete the message with the function parameters and post it to the
+		daemon task. */
+		xMessage.xMessageID = tmrCOMMAND_EXECUTE_CALLBACK;
+		xMessage.u.xCallbackParameters.pxCallbackFunction = xFunctionToPend;
+		xMessage.u.xCallbackParameters.pvParameter1 = pvParameter1;
+		xMessage.u.xCallbackParameters.ulParameter2 = ulParameter2;
+
+		xReturn = xQueueSendToBack( xTimerQueue, &xMessage, xTicksToWait );
+
+		tracePEND_FUNC_CALL( xFunctionToPend, pvParameter1, ulParameter2, xReturn );
+
+		return xReturn;
+	}
+
+#endif /* INCLUDE_xTimerPendFunctionCall */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TRACE_FACILITY == 1 )
+
+	UBaseType_t uxTimerGetTimerNumber( TimerHandle_t xTimer )
+	{
+		return ( ( Timer_t * ) xTimer )->uxTimerNumber;
+	}
+
+#endif /* configUSE_TRACE_FACILITY */
+/*-----------------------------------------------------------*/
+
+#if ( configUSE_TRACE_FACILITY == 1 )
+
+	void vTimerSetTimerNumber( TimerHandle_t xTimer, UBaseType_t uxTimerNumber )
+	{
+		( ( Timer_t * ) xTimer )->uxTimerNumber = uxTimerNumber;
+	}
+
+#endif /* configUSE_TRACE_FACILITY */
+/*-----------------------------------------------------------*/
+
+/* This entire source file will be skipped if the application is not configured
+to include software timer functionality.  If you want to include software timer
+functionality then ensure configUSE_TIMERS is set to 1 in FreeRTOSConfig.h. */
+#endif /* configUSE_TIMERS == 1 */
+
+
+
diff --git a/components/shell/CMakeLists.txt b/components/shell/CMakeLists.txt
new file mode 100644
index 00000000..8bd8cf94
--- /dev/null
+++ b/components/shell/CMakeLists.txt
@@ -0,0 +1,49 @@
+################# Add global include #################
+list(APPEND ADD_INCLUDE 
+"${CMAKE_CURRENT_SOURCE_DIR}"
+
+)
+#######################################################
+
+################# Add private include #################
+# list(APPEND ADD_PRIVATE_INCLUDE 
+
+# )
+#######################################################
+
+############## Add current dir source files ###########
+file(GLOB_RECURSE sources 
+"${CMAKE_CURRENT_SOURCE_DIR}/*.c")
+#aux_source_directory(. sources)
+list(APPEND ADD_SRCS  ${sources})
+#list(REMOVE_ITEM ADD_SRCS "${CMAKE_CURRENT_SOURCE_DIR}/libc/src/strtox.c" "${CMAKE_CURRENT_SOURCE_DIR}/libc/src/atox.c")
+#######################################################
+
+########### Add required/dependent components #########
+#list(APPEND ADD_REQUIREMENTS BSP_${BOARD}_Driver)
+#######################################################
+
+############ Add static libs ##########################
+# if(CONFIG_COMPONENT1_INCLUDE_STATIC_LIB)
+#     list(APPEND ADD_STATIC_LIB "lib/libtest.a")
+# endif()
+#######################################################
+
+############ Add dynamic libs #########################
+# list(APPEND ADD_DYNAMIC_LIB "lib/arch/v831/libmaix_nn.so"
+#                             "lib/arch/v831/libmaix_cam.so"
+# )
+#######################################################
+
+############ Add global compile option ################
+#add components denpend on this component
+#list(APPEND ADD_DEFINITIONS -D${BOARD} -DARCH_RISCV)
+#######################################################
+
+############ Add private compile option ################
+#add compile option for this component that won't affect other modules  
+#list(APPEND ADD_DEFINITIONS_PRIVATE -D${BOARD}_DRIVER)
+#######################################################
+
+
+generate_library()
diff --git a/components/shell/drv_shell.c b/components/shell/drv_shell.c
new file mode 100644
index 00000000..7df72834
--- /dev/null
+++ b/components/shell/drv_shell.c
@@ -0,0 +1,2085 @@
+/**
+ * @file drv_shell.c
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+
+#include "drv_shell.h"
+#include "string.h"
+#include "stdio.h"
+#include "stdarg.h"
+
+
+#if SHELL_USING_CMD_EXPORT == 1
+/**
+ * @brief 默认用户
+ */
+const char shellCmdDefaultUser[] = SHELL_DEFAULT_USER;
+const char shellPasswordDefaultUser[] = SHELL_DEFAULT_USER_PASSWORD;
+const char shellDesDefaultUser[] = "default user";
+const ShellCommand shellUserDefault SECTION("shellCommand") =
+{
+    .attr.value = SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_USER),
+    .data.user.name = shellCmdDefaultUser,
+    .data.user.password = shellPasswordDefaultUser,
+    .data.user.desc = shellDesDefaultUser
+};
+#endif
+
+#if SHELL_USING_CMD_EXPORT == 1
+    #if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && __ARMCC_VERSION >= 6000000)
+        extern const unsigned int shellCommand$$Base;
+        extern const unsigned int shellCommand$$Limit;
+    #elif defined(__ICCARM__) || defined(__ICCRX__)
+        #pragma section="shellCommand"
+    #elif defined(__GNUC__)
+        extern const unsigned int _shell_command_start;
+        extern const unsigned int _shell_command_end;
+    #endif
+#else
+    extern const ShellCommand shellCommandList[];
+    extern const unsigned short shellCommandCount;
+#endif
+
+
+/**
+ * @brief shell 常量文本索引
+ */
+enum
+{
+    SHELL_TEXT_INFO,                                    /**< shell信息 */
+    SHELL_TEXT_CMD_TOO_LONG,                            /**< 命令过长 */
+    SHELL_TEXT_CMD_LIST,                                /**< 可执行命令列表标题 */
+    SHELL_TEXT_VAR_LIST,                                /**< 变量列表标题 */
+    SHELL_TEXT_USER_LIST,                               /**< 用户列表标题 */
+    SHELL_TEXT_KEY_LIST,                                /**< 按键列表标题 */
+    SHELL_TEXT_CMD_NOT_FOUND,                           /**< 命令未找到 */
+    SHELL_TEXT_POINT_CANNOT_MODIFY,                     /**< 指针变量不允许修改 */
+    SHELL_TEXT_VAL_CANNOT_MODIFY,                       /**< 常量不允许修改 */
+    SHELL_TEXT_NOT_VAR,                                 /**< 命令不是变量 */
+    SHELL_TEXT_VAR_NOT_FOUND,                           /**< 变量未找到 */
+    SHELL_TEXT_HELP_HEADER,                             /**< help头 */
+    SHELL_TEXT_PASSWORD_HINT,                           /**< 密码输入提示 */
+    SHELL_TEXT_PASSWORD_ERROR,                          /**< 密码错误 */
+    SHELL_TEXT_CLEAR_CONSOLE,                           /**< 清空控制台 */
+    SHELL_TEXT_TYPE_CMD,                                /**< 命令类型 */
+    SHELL_TEXT_TYPE_VAR,                                /**< 变量类型 */
+    SHELL_TEXT_TYPE_USER,                               /**< 用户类型 */
+    SHELL_TEXT_TYPE_KEY,                                /**< 按键类型 */
+    SHELL_TEXT_TYPE_NONE,                               /**< 非法类型 */
+};
+
+
+static const char *shellText[] =
+{
+#if SHELL_SHOW_INFO == 1
+    [SHELL_TEXT_INFO] =
+        "\r\n"
+        "  ____               __  __      _       _       _     \r\n"
+        " |  _ \\             / _|/ _|    | |     | |     | |    \r\n"
+        " | |_) | ___  _   _| |_| |_ __ _| | ___ | | __ _| |__  \r\n"
+        " |  _ < / _ \\| | | |  _|  _/ _` | |/ _ \\| |/ _` | '_ \\ \r\n"
+        " | |_) | (_) | |_| | | | || (_| | | (_) | | (_| | |_) |\r\n"
+        " |____/ \\___/ \\__,_|_| |_| \\__,_|_|\\___/|_|\\__,_|_.__/ \r\n"
+        "\r\n"
+        "Build:       "__DATE__" "__TIME__"\r\n"
+        "Version:     "SHELL_VERSION"\r\n",
+#endif
+    [SHELL_TEXT_CMD_TOO_LONG] = 
+        "\r\nWarning: Command is too long\r\n",
+    [SHELL_TEXT_CMD_LIST] = 
+        "\r\nCommand List:\r\n",
+    [SHELL_TEXT_VAR_LIST] = 
+        "\r\nVar List:\r\n",
+    [SHELL_TEXT_USER_LIST] = 
+        "\r\nUser List:\r\n",
+    [SHELL_TEXT_KEY_LIST] =
+        "\r\nKey List:\r\n",
+    [SHELL_TEXT_CMD_NOT_FOUND] = 
+        "Command not Found\r\n",
+    [SHELL_TEXT_POINT_CANNOT_MODIFY] = 
+        "can't set pointer\r\n",
+    [SHELL_TEXT_VAL_CANNOT_MODIFY] = 
+        "can't set val\r\n",
+    [SHELL_TEXT_NOT_VAR] =
+        " is not a var\r\n",
+    [SHELL_TEXT_VAR_NOT_FOUND] = 
+        "Var not Fount\r\n",
+    [SHELL_TEXT_HELP_HEADER] =
+        "command help of ",
+    [SHELL_TEXT_PASSWORD_HINT] = 
+        "\r\nPlease input password:",
+    [SHELL_TEXT_PASSWORD_ERROR] = 
+        "\r\npassword error\r\n",
+    [SHELL_TEXT_CLEAR_CONSOLE] = 
+        "\033[2J\033[1H",
+    [SHELL_TEXT_TYPE_CMD] = 
+        "CMD ",
+    [SHELL_TEXT_TYPE_VAR] = 
+        "VAR ",
+    [SHELL_TEXT_TYPE_USER] = 
+        "USER",
+    [SHELL_TEXT_TYPE_KEY] = 
+        "KEY ",
+    [SHELL_TEXT_TYPE_NONE] = 
+        "NONE",
+};
+
+
+/**
+ * @brief shell对象表
+ */
+static Shell *shellList[SHELL_MAX_NUMBER] = {NULL};
+
+
+static void shellAdd(Shell *shell);
+static void shellWriteCommandLine(Shell *shell);
+static void shellWriteReturnValue(Shell *shell, int value);
+static void shellShowVar(Shell *shell, ShellCommand *command);
+static void shellSetUser(Shell *shell, const ShellCommand *user);
+ShellCommand* shellSeekCommand(Shell *shell,
+                               const char *cmd,
+                               ShellCommand *base,
+                               unsigned short compareLength);
+
+/**
+ * @brief shell 初始化
+ * 
+ * @param shell shell对象
+ */
+void shellInit(Shell *shell, char *buffer, unsigned short size)
+{
+    shell->parser.length = 0;
+    shell->parser.cursor = 0;
+    shell->history.offset = 0;
+    shell->history.number = 0;
+    shell->history.record = 0;
+    shell->info.user = NULL;
+    shell->status.isChecked = 1;
+
+    shell->parser.buffer = buffer;
+    shell->parser.bufferSize = size / (SHELL_HISTORY_MAX_NUMBER + 1);
+    for (short i = 0; i < SHELL_HISTORY_MAX_NUMBER; i++)
+    {
+        shell->history.item[i] = buffer + shell->parser.bufferSize * (i + 1);
+    }
+
+#if SHELL_USING_CMD_EXPORT == 1
+    #if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && __ARMCC_VERSION >= 6000000)
+        shell->commandList.base = (ShellCommand *)(&shellCommand$$Base);
+        shell->commandList.count = ((unsigned int)(&shellCommand$$Limit)
+                                - (unsigned int)(&shellCommand$$Base))
+                                / sizeof(ShellCommand);
+
+    #elif defined(__ICCARM__) || defined(__ICCRX__)
+        shell->commandList.base = (ShellCommand *)(__section_begin("shellCommand"));
+        shell->commandList.count = ((unsigned int)(__section_end("shellCommand"))
+                                - (unsigned int)(__section_begin("shellCommand")))
+                                / sizeof(ShellCommand);
+    #elif defined(__GNUC__)
+        shell->commandList.base = (ShellCommand *)(&_shell_command_start);
+        shell->commandList.count = ((unsigned int)(&_shell_command_end)
+                                - (unsigned int)(&_shell_command_start))
+                                / sizeof(ShellCommand);
+    #else
+        #error not supported compiler, please use command table mode
+    #endif
+#else
+    shell->commandList.base = (ShellCommand *)shellCommandList;
+    shell->commandList.count = shellCommandCount;
+#endif
+
+    shellAdd(shell);
+
+    shellSetUser(shell, shellSeekCommand(shell,
+                                         SHELL_DEFAULT_USER,
+                                         shell->commandList.base,
+                                         0));
+    shellWriteCommandLine(shell);
+}
+
+
+/**
+ * @brief 添加shell
+ * 
+ * @param shell shell对象
+ */
+static void shellAdd(Shell *shell)
+{
+    for (short i = 0; i < SHELL_MAX_NUMBER; i++)
+    {
+        if (shellList[i] == NULL)
+        {
+            shellList[i] = shell;
+            return;
+        }
+    }
+}
+
+
+/**
+ * @brief 获取当前活动shell
+ * 
+ * @return Shell* 当前活动shell对象
+ */
+Shell* shellGetCurrent(void)
+{
+    for (short i = 0; i < SHELL_MAX_NUMBER; i++)
+    {
+        if (shellList[i] && shellList[i]->status.isActive)
+        {
+            return shellList[i];
+        }
+    }
+    return NULL;
+}
+
+
+/**
+ * @brief shell写字符
+ * 
+ * @param shell shell对象
+ * @param data 字符数据
+ */
+static void shellWriteByte(Shell *shell, const char data)
+{
+    shell->write(data);
+}
+
+
+/**
+ * @brief shell 写字符串
+ * 
+ * @param shell shell对象
+ * @param string 字符串数据
+ * 
+ * @return unsigned short 写入字符的数量
+ */
+unsigned short shellWriteString(Shell *shell, const char *string)
+{
+    unsigned short count = 0;
+    SHELL_ASSERT(shell->write, return 0);
+    while(*string)
+    {
+        shell->write(*string ++);
+        count ++;
+    }
+    return count;
+}
+
+
+/**
+ * @brief shell 写命令描述字符串
+ * 
+ * @param shell shell对象
+ * @param string 字符串数据
+ * 
+ * @return unsigned short 写入字符的数量
+ */
+static unsigned short shellWriteCommandDesc(Shell *shell, const char *string)
+{
+    unsigned short count = 0;
+    SHELL_ASSERT(shell->write, return 0);
+    while(*string
+        && *string != '\r'
+        && *string != '\n'
+        && count < 36)
+    {
+        shell->write(*string ++);
+        count ++;
+        if (count >= 36 && *(string + 1))
+        {
+            shell->write('.');
+            shell->write('.');
+            shell->write('.');
+        }
+    }
+    return count;
+}
+
+
+/**
+ * @brief shell写命令提示符
+ * 
+ * @param shell shell对象
+ * 
+ */
+static void shellWriteCommandLine(Shell *shell)
+{
+    if (shell->status.isChecked)
+    {
+        shellWriteString(shell, "\r\n");
+        shellWriteString(shell, shell->info.user->data.user.name);
+        shellWriteString(shell, "/> ");
+    }
+    else
+    {
+        shellWriteString(shell, shellText[SHELL_TEXT_PASSWORD_HINT]);
+    }
+}
+
+
+#if SHELL_PRINT_BUFFER > 0
+/**
+ * @brief shell格式化输出
+ * 
+ * @param shell shell对象
+ * @param fmt 格式化字符串
+ * @param ... 参数
+ */
+void shellPrint(Shell *shell, char *fmt, ...)
+{
+    char buffer[SHELL_PRINT_BUFFER];
+    va_list vargs;
+
+    SHELL_ASSERT(shell, return);
+
+    va_start(vargs, fmt);
+    vsnprintf(buffer, SHELL_PRINT_BUFFER - 1, fmt, vargs);
+    va_end(vargs);
+    
+    shellWriteString(shell, buffer);
+}
+#endif
+
+
+/**
+ * @brief shell 检查命令权限
+ * 
+ * @param shell shell对象
+ * @param command ShellCommand
+ * 
+ * @return signed char 0 当前用户具有该命令权限
+ * @return signec char -1 当前用户不具有该命令权限
+ */
+signed char shellCheckPermission(Shell *shell, ShellCommand *command)
+{
+    return ((!command->attr.attrs.permission
+                || command->attr.attrs.type == SHELL_TYPE_USER
+                || (command->attr.attrs.permission 
+                    & shell->info.user->attr.attrs.permission))
+            && (shell->status.isChecked
+                || command->attr.attrs.enableUnchecked))
+            ? 0 : -1;
+}
+
+
+/**
+ * @brief int转16进制字符串
+ * 
+ * @param value 数值
+ * @param buffer 缓冲
+ * 
+ * @return signed char 转换后有效数据长度
+ */
+signed char shellToHex(unsigned int value, char *buffer)
+{
+    char byte;
+    unsigned char i = 8;
+    buffer[8] = 0;
+    while (value)
+    {
+        byte = value & 0x0000000F;
+        buffer[--i] = (byte > 9) ? (byte + 87) : (byte + 48);
+        value >>= 4;
+    }
+    return 8 - i;
+}
+
+
+/**
+* @brief int转10进制字符串
+ * 
+ * @param value 数值
+ * @param buffer 缓冲
+ * 
+ * @return signed char 转换后有效数据长度
+ */
+signed char shellToDec(int value, char *buffer)
+{
+    unsigned char i = 11;
+    int v = value;
+    if (value < 0)
+    {
+        v = -value;
+    }
+    buffer[11] = 0;
+    while (v)
+    {
+        buffer[--i] = v % 10 + 48;
+        v /= 10;
+    }
+    if (value < 0)
+    {
+        buffer[--i] = '-';
+    }
+    if (value == 0) {
+        buffer[--i] = '0';
+    }
+    return 11 - i;
+}
+
+
+/**
+ * @brief shell字符串复制
+ * 
+ * @param dest 目标字符串
+ * @param src 源字符串
+ * @return unsigned short 字符串长度
+ */
+static unsigned short shellStringCopy(char *dest, char* src)
+{
+    unsigned short count = 0;
+    while (*(src + count))
+    {
+        *(dest + count) = *(src + count);
+        count++;
+    }
+    *(dest + count) = 0;
+    return count;
+}
+
+
+/**
+ * @brief shell字符串比较
+ * 
+ * @param dest 目标字符串
+ * @param src 源字符串
+ * @return unsigned short 匹配长度
+ */
+static unsigned short shellStringCompare(char* dest, char *src)
+{
+    unsigned short match = 0;
+    unsigned short i = 0;
+
+    while (*(dest +i) && *(src + i))
+    {
+        if (*(dest + i) != *(src +i))
+        {
+            break;
+        }
+        match ++;
+        i++;
+    }
+    return match;
+}
+
+
+/**
+ * @brief shell获取命令名
+ * 
+ * @param command 命令
+ * @return const char* 命令名
+ */
+static const char* shellGetCommandName(ShellCommand *command)
+{
+    static char buffer[9];
+    for (unsigned char i = 0; i < 9; i++)
+    {
+        buffer[i] = '0';
+    }
+    if (command->attr.attrs.type <= SHELL_TYPE_CMD_FUNC)
+    {
+        return command->data.cmd.name;
+    }
+    else if (command->attr.attrs.type <= SHELL_TYPE_VAL)
+    {
+        return command->data.var.name;
+    }
+    else if (command->attr.attrs.type <= SHELL_TYPE_USER)
+    {
+        return command->data.user.name;
+    }
+    else
+    {
+        shellToHex(command->data.key.value, buffer);
+        return buffer;
+    }
+}
+
+
+/**
+ * @brief shell获取命令描述
+ * 
+ * @param command 命令
+ * @return const char* 命令描述
+ */
+static const char* shellGetCommandDesc(ShellCommand *command)
+{
+    if (command->attr.attrs.type <= SHELL_TYPE_CMD_FUNC)
+    {
+        return command->data.cmd.desc;
+    }
+    else if (command->attr.attrs.type <= SHELL_TYPE_VAL)
+    {
+        return command->data.var.desc;
+    }
+    else if (command->attr.attrs.type <= SHELL_TYPE_USER)
+    {
+        return command->data.user.desc;
+    }
+    else
+    {
+        return command->data.key.desc;
+    }
+}
+
+/**
+ * @brief shell 列出命令条目
+ * 
+ * @param shell shell对象
+ * @param item 命令条目
+ */
+void shellListItem(Shell *shell, ShellCommand *item)
+{
+    short spaceLength;
+
+    spaceLength = 22 - shellWriteString(shell, shellGetCommandName(item));
+    spaceLength = (spaceLength > 0) ? spaceLength : 4;
+    do {
+        shellWriteByte(shell, ' ');
+    } while (--spaceLength);
+    if (item->attr.attrs.type <= SHELL_TYPE_CMD_FUNC)
+    {
+        shellWriteString(shell, shellText[SHELL_TEXT_TYPE_CMD]);
+    }
+    else if (item->attr.attrs.type <= SHELL_TYPE_VAL)
+    {
+        shellWriteString(shell, shellText[SHELL_TEXT_TYPE_VAR]);
+    }
+    else if (item->attr.attrs.type <= SHELL_TYPE_USER)
+    {
+        shellWriteString(shell, shellText[SHELL_TEXT_TYPE_USER]);
+    }
+    else if (item->attr.attrs.type <= SHELL_TYPE_KEY)
+    {
+        shellWriteString(shell, shellText[SHELL_TEXT_TYPE_KEY]);
+    }
+    else
+    {
+        shellWriteString(shell, shellText[SHELL_TEXT_TYPE_NONE]);
+    }
+#if SHELL_HELP_SHOW_PERMISSION == 1
+    shellWriteString(shell, "  ");
+    for (signed char i = 7; i >= 0; i--)
+    {
+        shellWriteByte(shell, item->attr.attrs.permission & (1 << i) ? 'x' : '-');
+    }
+#endif
+    shellWriteString(shell, "  ");
+    shellWriteCommandDesc(shell, shellGetCommandDesc(item));
+    shellWriteString(shell, "\r\n");
+}
+
+
+/**
+ * @brief shell列出可执行命令
+ * 
+ * @param shell shell对象
+ */
+void shellListCommand(Shell *shell)
+{
+    ShellCommand *base = (ShellCommand *)shell->commandList.base;
+    shellWriteString(shell, shellText[SHELL_TEXT_CMD_LIST]);
+    for (short i = 0; i < shell->commandList.count; i++)
+    {
+        if (base[i].attr.attrs.type <= SHELL_TYPE_CMD_FUNC
+            && shellCheckPermission(shell, &base[i]) == 0)
+        {
+            shellListItem(shell, &base[i]);
+        }
+    }
+}
+
+
+/**
+ * @brief shell列出变量
+ * 
+ * @param shell shell对象
+ */
+void shellListVar(Shell *shell)
+{
+    ShellCommand *base = (ShellCommand *)shell->commandList.base;
+    shellWriteString(shell, shellText[SHELL_TEXT_VAR_LIST]);
+    for (short i = 0; i < shell->commandList.count; i++)
+    {
+        if (base[i].attr.attrs.type > SHELL_TYPE_CMD_FUNC
+            && base[i].attr.attrs.type <= SHELL_TYPE_VAL
+            && shellCheckPermission(shell, &base[i]) == 0)
+        {
+            shellListItem(shell, &base[i]);
+        }
+    }
+}
+
+
+/**
+ * @brief shell列出用户
+ * 
+ * @param shell shell对象
+ */
+void shellListUser(Shell *shell)
+{
+    ShellCommand *base = (ShellCommand *)shell->commandList.base;
+    shellWriteString(shell, shellText[SHELL_TEXT_USER_LIST]);
+    for (short i = 0; i < shell->commandList.count; i++)
+    {
+        if (base[i].attr.attrs.type > SHELL_TYPE_VAL
+            && base[i].attr.attrs.type <= SHELL_TYPE_USER
+            && shellCheckPermission(shell, &base[i]) == 0)
+        {
+            shellListItem(shell, &base[i]);
+        }
+    }
+}
+
+
+/**
+ * @brief shell列出按键
+ * 
+ * @param shell shell对象
+ */
+void shellListKey(Shell *shell)
+{
+    ShellCommand *base = (ShellCommand *)shell->commandList.base;
+    shellWriteString(shell, shellText[SHELL_TEXT_KEY_LIST]);
+    for (short i = 0; i < shell->commandList.count; i++)
+    {
+        if (base[i].attr.attrs.type > SHELL_TYPE_USER
+            && base[i].attr.attrs.type <= SHELL_TYPE_KEY
+            && shellCheckPermission(shell, &base[i]) == 0)
+        {
+            shellListItem(shell, &base[i]);
+        }
+    }
+}
+
+
+/**
+ * @brief shell列出所有命令
+ * 
+ * @param shell shell对象
+ */
+void shellListAll(Shell *shell)
+{
+#if SHELL_HELP_LIST_USER == 1
+    shellListUser(shell);
+#endif
+    shellListCommand(shell);
+#if SHELL_HELP_LIST_VAR == 1
+    shellListVar(shell);
+#endif
+#if SHELL_HELP_LIST_KEY == 1
+    shellListKey(shell);
+#endif
+}
+
+
+/**
+ * @brief shell删除命令行数据
+ * 
+ * @param shell shell对象
+ * @param length 删除长度
+ */
+void shellDeleteCommandLine(Shell *shell, unsigned char length)
+{
+    while (length--)
+    {
+        shellWriteString(shell, "\b \b");
+    }
+}
+
+
+/**
+ * @brief shell 清空命令行输入
+ * 
+ * @param shell shell对象
+ */
+void shellClearCommandLine(Shell *shell)
+{
+    for (short i = shell->parser.length - shell->parser.cursor; i > 0; i--)
+    {
+        shellWriteByte(shell, ' ');
+    }
+    shellDeleteCommandLine(shell, shell->parser.length);
+}
+
+
+/**
+ * @brief shell插入一个字符到光标位置
+ * 
+ * @param shell shell对象
+ * @param data 字符数据
+ */
+void shellInsertByte(Shell *shell, char data)
+{
+    /* 判断输入数据是否过长 */
+    if (shell->parser.length >= shell->parser.bufferSize - 1)
+    {
+        shellWriteString(shell, shellText[SHELL_TEXT_CMD_TOO_LONG]);
+        shellWriteCommandLine(shell);
+        shellWriteString(shell, shell->parser.buffer);
+        return;
+    }
+
+    /* 插入数据 */
+    if (shell->parser.cursor == shell->parser.length)
+    {
+        shell->parser.buffer[shell->parser.length++] = data;
+        shell->parser.buffer[shell->parser.length] = 0;
+        shell->parser.cursor++;
+        shellWriteByte(shell, data);
+    }
+    else if (shell->parser.cursor < shell->parser.length)
+    {
+        for (short i = shell->parser.length - shell->parser.cursor; i > 0; i--)
+        {
+            shell->parser.buffer[shell->parser.cursor + i] = 
+                shell->parser.buffer[shell->parser.cursor + i - 1];
+        }
+        shell->parser.buffer[shell->parser.cursor++] = data;
+        shell->parser.buffer[++shell->parser.length] = 0;
+        for (short i = shell->parser.cursor - 1; i < shell->parser.length; i++)
+        {
+            shellWriteByte(shell, shell->parser.buffer[i]);
+        }
+        for (short i = shell->parser.length - shell->parser.cursor; i > 0; i--)
+        {
+            shellWriteByte(shell, '\b');
+        }
+    }
+}
+
+
+/**
+ * @brief shell 删除字节
+ * 
+ * @param shell shell对象
+ * @param direction 删除方向 {@code 1}删除光标前字符 {@code -1}删除光标处字符
+ */
+void shellDeleteByte(Shell *shell, signed char direction)
+{
+    char offset = (direction == -1) ? 1 : 0;
+
+    if ((shell->parser.cursor == 0 && direction == 1)
+        || (shell->parser.cursor == shell->parser.length && direction == -1))
+    {
+        return;
+    }
+    if (shell->parser.cursor == shell->parser.length && direction == 1)
+    {
+        shell->parser.cursor--;
+        shell->parser.length--;
+        shell->parser.buffer[shell->parser.length] = 0;
+        shellDeleteCommandLine(shell, 1);
+    }
+    else
+    {
+        for (short i = offset; i < shell->parser.length - shell->parser.cursor; i++)
+        {
+            shell->parser.buffer[shell->parser.cursor + i - 1] = 
+                shell->parser.buffer[shell->parser.cursor + i];
+        }
+        shell->parser.length--;
+        if (!offset)
+        {
+            shell->parser.cursor--;
+            shellWriteByte(shell, '\b');
+        }
+        shell->parser.buffer[shell->parser.length] = 0;
+        for (short i = shell->parser.cursor; i < shell->parser.length; i++)
+        {
+            shellWriteByte(shell, shell->parser.buffer[i]);
+        }
+        shellWriteByte(shell, ' ');
+        for (short i = shell->parser.length - shell->parser.cursor + 1; i > 0; i--)
+        {
+            shellWriteByte(shell, '\b');
+        }
+    }
+}
+
+
+/**
+ * @brief shell 解析参数
+ * 
+ * @param shell shell对象
+ */
+static void shellParserParam(Shell *shell)
+{
+    unsigned char quotes = 0;
+    unsigned char record = 1;
+
+    shell->parser.paramCount = 0;
+    for (unsigned short i = 0; i < shell->parser.length; i++)
+    {
+        if (quotes != 0
+            || (shell->parser.buffer[i] != ' '
+                && shell->parser.buffer[i] != 0))
+        {
+            if (shell->parser.buffer[i] == '\"')
+            {
+                quotes = quotes ? 0 : 1;
+            }
+            if (record == 1)
+            {
+                shell->parser.param[shell->parser.paramCount ++] = 
+                    &(shell->parser.buffer[i]);
+                record = 0;
+            }
+            if (shell->parser.buffer[i] == '\\'
+                && shell->parser.buffer[i + 1] != 0)
+            {
+                i++;
+            }
+        }
+        else
+        {
+            shell->parser.buffer[i] = 0;
+            record = 1;
+        }
+    }
+}
+
+
+/**
+ * @brief shell去除字符串参数头尾的双引号
+ * 
+ * @param shell shell对象
+ */
+static void shellRemoveParamQuotes(Shell *shell)
+{
+    unsigned short paramLength;
+    for (unsigned short i = 0; i < shell->parser.paramCount; i++)
+    {
+        if (shell->parser.param[i][0] == '\"')
+        {
+            shell->parser.param[i][0] = 0;
+            shell->parser.param[i] = &shell->parser.param[i][1];
+        }
+        paramLength = strlen(shell->parser.param[i]);
+        if (shell->parser.param[i][paramLength - 1] == '\"')
+        {
+            shell->parser.param[i][paramLength - 1] = 0;
+        }
+    }
+}
+
+
+/**
+ * @brief shell匹配命令
+ * 
+ * @param shell shell对象
+ * @param cmd 命令
+ * @param base 匹配命令表基址
+ * @param compareLength 匹配字符串长度
+ * @return ShellCommand* 匹配到的命令
+ */
+ShellCommand* shellSeekCommand(Shell *shell,
+                               const char *cmd,
+                               ShellCommand *base,
+                               unsigned short compareLength)
+{
+    const char *name;
+    unsigned short count = shell->commandList.count -
+        ((int)base - (int)shell->commandList.base) / sizeof(ShellCommand);
+    for (unsigned short i = 0; i < count; i++)
+    {
+        if (base[i].attr.attrs.type == SHELL_TYPE_KEY
+            || shellCheckPermission(shell, &base[i]) != 0)
+        {
+            continue;
+        }
+        name = shellGetCommandName(&base[i]);
+        if (!compareLength)
+        {
+            if (strcmp(cmd, name) == 0)
+            {
+                return &base[i];
+            }
+        }
+        else
+        {
+            if (strncmp(cmd, name, compareLength) == 0)
+            {
+                return &base[i];
+            }
+        }
+    }
+    return NULL;
+}
+
+
+/**
+ * @brief shell 获取变量值
+ * 
+ * @param shell shell对象
+ * @param command 命令
+ * @return int 变量值
+ */
+int shellGetVarValue(Shell *shell, ShellCommand *command)
+{
+    int value = 0;
+    switch (command->attr.attrs.type)
+    {
+    case SHELL_TYPE_VAR_INT:
+        value = *((int *)(command->data.var.value));
+        break;
+    case SHELL_TYPE_VAR_SHORT:
+        value = *((short *)(command->data.var.value));
+        break;
+    case SHELL_TYPE_VAR_CHAR:
+        value = *((char *)(command->data.var.value));
+        break;
+    case SHELL_TYPE_VAR_POINT:
+    case SHELL_TYPE_VAL:
+        value = (int)(command->data.var.value);
+        break;
+    default:
+        break;
+    }
+    return value;
+}
+
+
+/**
+ * @brief shell设置变量值
+ * 
+ * @param shell shell对象
+ * @param command 命令
+ * @param value 值
+ */
+void shellSetVarValue(Shell *shell, ShellCommand *command, int value)
+{
+    switch (command->attr.attrs.type)
+    {
+    case SHELL_TYPE_VAR_INT:
+        *((int *)(command->data.var.value)) = value;
+        break;
+    case SHELL_TYPE_VAR_SHORT:
+        *((short *)(command->data.var.value)) = value;
+        break;
+    case SHELL_TYPE_VAR_CHAR:
+        *((char *)(command->data.var.value)) = value;
+        break;
+    case SHELL_TYPE_VAR_POINT:
+        shellWriteString(shell, shellText[SHELL_TEXT_POINT_CANNOT_MODIFY]);
+        break;
+    case SHELL_TYPE_VAL:
+        shellWriteString(shell, shellText[SHELL_TEXT_VAL_CANNOT_MODIFY]);
+        break;
+    default:
+        break;
+    }
+    shellShowVar(shell, command);
+}
+
+
+/**
+ * @brief shell变量输出
+ * 
+ * @param shell shell对象
+ * @param command 命令
+ */
+static void shellShowVar(Shell *shell, ShellCommand *command)
+{
+    char buffer[12] = "00000000000";
+    int value = shellGetVarValue(shell, command);
+    shellWriteString(shell, command->data.var.name);
+    shellWriteString(shell, " = ");
+    shellWriteString(shell, &buffer[11 - shellToDec(value, buffer)]);
+    shellWriteString(shell, ", 0x");
+    for (short i = 0; i < 11; i++)
+    {
+        buffer[i] = '0';
+    }
+    shellToHex(value, buffer);
+    shellWriteString(shell, buffer);
+    shellWriteString(shell, "\r\n");
+}
+
+
+/**
+ * @brief shell设置变量
+ * 
+ * @param name 变量名
+ * @param value 变量值
+ * @return int 返回变量值
+ */
+int shellSetVar(char *name, int value)
+{
+    Shell *shell = shellGetCurrent();
+    if (shell == NULL)
+    {
+        return 0;
+    }
+    ShellCommand *command = shellSeekCommand(shell,
+                                             name,
+                                             shell->commandList.base,
+                                             0);
+    if (!command)
+    {
+        shellWriteString(shell, shellText[SHELL_TEXT_VAR_NOT_FOUND]);
+        return 0;
+    }
+    if (command->attr.attrs.type < SHELL_TYPE_VAR_INT
+        || command->attr.attrs.type > SHELL_TYPE_VAL)
+    {
+        shellWriteString(shell, name);
+        shellWriteString(shell, shellText[SHELL_TEXT_NOT_VAR]);
+        return 0;
+    }
+    shellSetVarValue(shell, command, value);
+    return shellGetVarValue(shell, command);
+}
+SHELL_EXPORT_CMD(
+SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_DISABLE_RETURN,
+setVar, shellSetVar, set var);
+
+
+/**
+ * @brief shell运行命令
+ * 
+ * @param shell shell对象
+ * @param command 命令
+ */
+static void shellRunCommand(Shell *shell, ShellCommand *command)
+{
+    int returnValue;
+    shell->status.isActive = 1;
+    if (command->attr.attrs.type == SHELL_TYPE_CMD_MAIN)
+    {
+        shellRemoveParamQuotes(shell);
+        returnValue = command->data.cmd.function(shell->parser.paramCount,
+                                                 shell->parser.param);
+        if (!command->attr.attrs.disableReturn)
+        {
+            shellWriteReturnValue(shell, returnValue);
+        }
+    }
+    else if (command->attr.attrs.type == SHELL_TYPE_CMD_FUNC)
+    {
+        returnValue = shellExtRun(shell,
+                                  command,
+                                  shell->parser.paramCount,
+                                  shell->parser.param);
+        if (!command->attr.attrs.disableReturn)
+        {
+            shellWriteReturnValue(shell, returnValue);
+        }
+    }
+    else if (command->attr.attrs.type >= SHELL_TYPE_VAR_INT
+        && command->attr.attrs.type <= SHELL_TYPE_VAL)
+    {
+        shellShowVar(shell, command);
+    }
+    else if (command->attr.attrs.type == SHELL_TYPE_USER)
+    {
+        shellSetUser(shell, command);
+    }
+    shell->status.isActive = 0;
+}
+
+
+/**
+ * @brief shell校验密码
+ * 
+ * @param shell shell对象
+ */
+static void shellCheckPassword(Shell *shell)
+{
+    if (strcmp(shell->parser.buffer, shell->info.user->data.user.password) == 0)
+    {
+        shell->status.isChecked = 1;
+    #if SHELL_SHOW_INFO == 1
+        shellWriteString(shell, shellText[SHELL_TEXT_INFO]);
+    #endif
+    }
+    else
+    {
+        shellWriteString(shell, shellText[SHELL_TEXT_PASSWORD_ERROR]);
+    }
+    shell->parser.length = 0;
+    shell->parser.cursor = 0;
+}
+
+
+/**
+ * @brief shell设置用户
+ * 
+ * @param shell shell对象
+ * @param user 用户
+ */
+static void shellSetUser(Shell *shell, const ShellCommand *user)
+{
+    shell->info.user = user;
+    shell->status.isChecked = 
+        ((user->data.user.password && strlen(user->data.user.password) != 0)
+            && (shell->parser.paramCount == 1
+                || strcmp(user->data.user.password, shell->parser.param[1]) != 0))
+         ? 0 : 1;
+        
+#if SHELL_CLS_WHEN_LOGIN == 1
+    shellWriteString(shell, shellText[SHELL_TEXT_CLEAR_CONSOLE]);
+#endif
+#if SHELL_SHOW_INFO == 1
+    if (shell->status.isChecked)
+    {
+        shellWriteString(shell, shellText[SHELL_TEXT_INFO]);
+    }
+#endif
+}
+
+
+/**
+ * @brief shell写返回值
+ * 
+ * @param shell shell对象
+ * @param value 返回值
+ */
+static void shellWriteReturnValue(Shell *shell, int value)
+{
+    char buffer[12] = "00000000000";
+    shellWriteString(shell, "Return: ");
+    shellWriteString(shell, &buffer[11 - shellToDec(value, buffer)]);
+    shellWriteString(shell, ", 0x");
+    for (short i = 0; i < 11; i++)
+    {
+        buffer[i] = '0';
+    }
+    shellToHex(value, buffer);
+    shellWriteString(shell, buffer);
+    shellWriteString(shell, "\r\n");
+}
+
+
+/**
+ * @brief shell历史记录添加
+ * 
+ * @param shell shell对象
+ */
+static void shellHistoryAdd(Shell *shell)
+{
+    shell->history.offset = 0;
+    if (shell->history.number > 0
+        && strcmp(shell->history.item[(shell->history.record == 0 ? 
+                SHELL_HISTORY_MAX_NUMBER : shell->history.record) - 1],
+                shell->parser.buffer) == 0)
+    {
+        return;
+    }
+    if (shellStringCopy(shell->history.item[shell->history.record],
+                        shell->parser.buffer) != 0)
+    {
+        shell->history.record++;
+    }
+    if (++shell->history.number > SHELL_HISTORY_MAX_NUMBER)
+    {
+        shell->history.number = SHELL_HISTORY_MAX_NUMBER;
+    }
+    if (shell->history.record >= SHELL_HISTORY_MAX_NUMBER)
+    {
+        shell->history.record = 0;
+    }
+}
+
+
+/**
+ * @brief shell历史记录查找
+ * 
+ * @param shell shell对象
+ * @param dir 方向 {@code <0}往上查找 {@code >0}往下查找
+ */
+static void shellHistory(Shell *shell, signed char dir)
+{
+    if (dir > 0)
+    {
+        if (shell->history.offset-- <= 
+            -((shell->history.number > shell->history.record) ?
+                shell->history.number : shell->history.record))
+        {
+            shell->history.offset = -((shell->history.number > shell->history.record)
+                                    ? shell->history.number : shell->history.record);
+        }
+    }
+    else if (dir < 0)
+    {
+        if (++shell->history.offset > 0)
+        {
+            shell->history.offset = 0;
+            return;
+        }
+    }
+    else
+    {
+        return;
+    }
+    shellClearCommandLine(shell);
+    if (shell->history.offset == 0)
+    {
+        shell->parser.cursor = shell->parser.length = 0;
+    }
+    else
+    {
+        if ((shell->parser.length = shellStringCopy(shell->parser.buffer,
+                shell->history.item[(shell->history.record + SHELL_HISTORY_MAX_NUMBER
+                    + shell->history.offset) % SHELL_HISTORY_MAX_NUMBER])) == 0)
+        {
+            return;
+        }
+        shell->parser.cursor = shell->parser.length;
+        shellWriteString(shell, shell->parser.buffer);
+    }
+    
+}
+
+
+/**
+ * @brief shell 常规输入
+ * 
+ * @param shell shell 对象
+ * @param data 输入字符
+ */
+void shellNormalInput(Shell *shell, char data)
+{
+    shell->status.tabFlag = 0;
+    shellInsertByte(shell, data);
+}
+
+
+/**
+ * @brief shell上方向键输入
+ * 
+ * @param shell shell对象
+ */
+void shellUp(Shell *shell)
+{
+    shellHistory(shell, 1);
+}
+SHELL_EXPORT_KEY(SHELL_CMD_PERMISSION(0), 0x1B5B4100, shellUp, up);
+
+
+/**
+ * @brief shell下方向键输入
+ * 
+ * @param shell shell对象
+ */
+void shellDown(Shell *shell)
+{
+    shellHistory(shell, -1);
+}
+SHELL_EXPORT_KEY(SHELL_CMD_PERMISSION(0), 0x1B5B4200, shellDown, down);
+
+
+/**
+ * @brief shell右方向键输入
+ * 
+ * @param shell shell对象
+ */
+void shellRight(Shell *shell)
+{
+    if (shell->parser.cursor < shell->parser.length)
+    {
+        shellWriteByte(shell, shell->parser.buffer[shell->parser.cursor++]);
+    }
+}
+SHELL_EXPORT_KEY(SHELL_CMD_PERMISSION(0)|SHELL_CMD_ENABLE_UNCHECKED,
+0x1B5B4300, shellRight, right);
+
+
+/**
+ * @brief shell左方向键输入
+ * 
+ * @param shell shell对象
+ */
+void shellLeft(Shell *shell)
+{
+    if (shell->parser.cursor > 0)
+    {
+        shellWriteByte(shell, '\b');
+        shell->parser.cursor--;
+    }
+}
+SHELL_EXPORT_KEY(SHELL_CMD_PERMISSION(0)|SHELL_CMD_ENABLE_UNCHECKED,
+0x1B5B4400, shellLeft, left);
+
+
+/**
+ * @brief shell Tab按键处理
+ * 
+ * @param shell shell对象
+ */
+void shellTab(Shell *shell)
+{
+    unsigned short maxMatch = shell->parser.bufferSize;
+    unsigned short lastMatchIndex = 0;
+    unsigned short matchNum = 0;
+    unsigned short length;
+
+    if (shell->parser.length == 0)
+    {
+        shellListAll(shell);
+        shellWriteCommandLine(shell);
+    }
+    else if (shell->parser.length > 0)
+    {
+        shell->parser.buffer[shell->parser.length] = 0;
+        ShellCommand *base = (ShellCommand *)shell->commandList.base;
+        for (short i = 0; i < shell->commandList.count; i++)
+        {
+            if (shellCheckPermission(shell, &base[i]) == 0
+                && shellStringCompare(shell->parser.buffer,
+                                   (char *)shellGetCommandName(&base[i]))
+                        == shell->parser.length)
+            {
+                if (matchNum != 0)
+                {
+                    if (matchNum == 1)
+                    {
+                        shellWriteString(shell, "\r\n");
+                    }
+                    shellListItem(shell, &base[lastMatchIndex]);
+                    length = 
+                        shellStringCompare((char *)shellGetCommandName(&base[lastMatchIndex]),
+                                           (char *)shellGetCommandName(&base[i]));
+                    maxMatch = (maxMatch > length) ? length : maxMatch;
+                }
+                lastMatchIndex = i;
+                matchNum++;
+            }
+        }
+        if (matchNum == 0)
+        {
+            return;
+        }
+        if (matchNum == 1)
+        {
+            shellClearCommandLine(shell);
+        }
+        if (matchNum != 0)
+        {
+            shell->parser.length = 
+                shellStringCopy(shell->parser.buffer,
+                                (char *)shellGetCommandName(&base[lastMatchIndex]));
+        }
+        if (matchNum > 1)
+        {
+            shellListItem(shell, &base[lastMatchIndex]);
+            shellWriteCommandLine(shell);
+            shell->parser.length = maxMatch;
+        }
+        shell->parser.buffer[shell->parser.length] = 0;
+        shell->parser.cursor = shell->parser.length;
+        shellWriteString(shell, shell->parser.buffer);
+    }
+
+    if (SHELL_GET_TICK())
+    {
+        if (matchNum == 1
+            && shell->status.tabFlag
+            && SHELL_GET_TICK() - shell->info.activeTime < SHELL_DOUBLE_CLICK_TIME)
+        {
+            shellClearCommandLine(shell);
+            for (short i = shell->parser.length; i >= 0; i--)
+            {
+                shell->parser.buffer[i + 5] = shell->parser.buffer[i];
+            }
+            shellStringCopy(shell->parser.buffer, "help");
+            shell->parser.buffer[4] = ' ';
+            shell->parser.length += 5;
+            shell->parser.cursor = shell->parser.length;
+            shellWriteString(shell, shell->parser.buffer);
+        }
+        else
+        {
+            shell->status.tabFlag = 1;
+        }
+    }
+}
+SHELL_EXPORT_KEY(SHELL_CMD_PERMISSION(0), 0x09000000, shellTab, tab);
+
+
+/**
+ * @brief shell 退格
+ * 
+ * @param shell shell对象
+ */
+void shellBackspace(Shell *shell)
+{
+    shellDeleteByte(shell, 1);
+}
+SHELL_EXPORT_KEY(SHELL_CMD_PERMISSION(0)|SHELL_CMD_ENABLE_UNCHECKED,
+0x08000000, shellBackspace, backspace);
+
+
+/**
+ * @brief shell 删除
+ * 
+ * @param shell shell对象
+ */
+void shellDelete(Shell *shell)
+{
+    shellDeleteByte(shell, -1);
+}
+SHELL_EXPORT_KEY(SHELL_CMD_PERMISSION(0)|SHELL_CMD_ENABLE_UNCHECKED,
+0x7F000000, shellDelete, delete);
+SHELL_EXPORT_KEY(SHELL_CMD_PERMISSION(0)|SHELL_CMD_ENABLE_UNCHECKED,
+0x1B5B337E, shellDelete, delete);
+
+/**
+ * @brief shell 回车处理
+ * 
+ * @param shell shell对象
+ */
+void shellEnter(Shell *shell)
+{
+    if (shell->parser.length == 0)
+    {
+        shellWriteCommandLine(shell);
+        return;
+    }
+
+    shell->parser.buffer[shell->parser.length] = 0;
+
+    if (shell->status.isChecked)
+    {
+        shellHistoryAdd(shell);
+        shellParserParam(shell);
+        shell->parser.length = shell->parser.cursor = 0;
+        if (shell->parser.paramCount == 0)
+        {
+            shellWriteCommandLine(shell);
+            return;
+        }
+        shellWriteString(shell, "\r\n");
+
+        ShellCommand *command = shellSeekCommand(shell,
+                                                 shell->parser.param[0],
+                                                 shell->commandList.base,
+                                                 0);
+        if (command != NULL)
+        {
+            shellRunCommand(shell, command);
+        }
+        else
+        {
+            shellWriteString(shell, shellText[SHELL_TEXT_CMD_NOT_FOUND]);
+        }
+    }
+    else
+    {
+        shellCheckPassword(shell);
+    }
+    shellWriteCommandLine(shell);
+}
+#if SHELL_ENTER_LF == 1
+SHELL_EXPORT_KEY(SHELL_CMD_PERMISSION(0)|SHELL_CMD_ENABLE_UNCHECKED,
+0x0A000000, shellEnter, enter);
+#endif
+#if SHELL_ENTER_CR == 1
+SHELL_EXPORT_KEY(SHELL_CMD_PERMISSION(0)|SHELL_CMD_ENABLE_UNCHECKED,
+0x0D000000, shellEnter, enter);
+#endif
+#if SHELL_ENTER_CRLF == 1
+SHELL_EXPORT_KEY(SHELL_CMD_PERMISSION(0)|SHELL_CMD_ENABLE_UNCHECKED,
+0x0D0A0000, shellEnter, enter);
+#endif
+
+
+/**
+ * @brief shell help
+ * 
+ * @param argc 参数个数
+ * @param argv 参数
+ */
+void shellHelp(int argc, char *argv[])
+{
+    Shell *shell = shellGetCurrent();
+    SHELL_ASSERT(shell, return);
+    if (argc == 1)
+    {
+        shellListAll(shell);
+    }
+    else if (argc > 1)
+    {
+        ShellCommand *command = shellSeekCommand(shell,
+                                                 argv[1],
+                                                 shell->commandList.base,
+                                                 0);
+        shellWriteString(shell, shellText[SHELL_TEXT_HELP_HEADER]);
+        shellWriteString(shell, shellGetCommandName(command));
+        shellWriteString(shell, "\r\n");
+        shellWriteString(shell, shellGetCommandDesc(command));
+        shellWriteString(shell, "\r\n");
+    }
+}
+SHELL_EXPORT_CMD(
+SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_DISABLE_RETURN,
+help, shellHelp, show command info\r\nhelp [cmd]);
+
+/**
+ * @brief shell 输入处理
+ * 
+ * @param shell shell对象
+ * @param data 输入数据
+ */
+void shellHandler(Shell *shell, char data)
+{
+    SHELL_ASSERT(data, return);
+
+#if SHELL_LOCK_TIMEOUT > 0
+    if (shell->info.user->data.user.password
+        && strlen(shell->info.user->data.user.password) != 0
+        && SHELL_GET_TICK())
+    {
+        if (SHELL_GET_TICK() - shell->info.activeTime > SHELL_LOCK_TIMEOUT)
+        {
+            shell->status.isChecked = 0;
+        }
+    }
+#endif
+
+    /* 根据记录的按键键值计算当前字节在按键键值中的偏移 */
+    char keyByteOffset = 24;
+    int keyFilter = 0x00000000;
+    if ((shell->parser.keyValue & 0x0000FF00) != 0x00000000)
+    {
+        keyByteOffset = 0;
+        keyFilter = 0xFFFFFF00;
+    }
+    else if ((shell->parser.keyValue & 0x00FF0000) != 0x00000000)
+    {
+        keyByteOffset = 8;
+        keyFilter = 0xFFFF0000;
+    }
+    else if ((shell->parser.keyValue & 0xFF000000) != 0x00000000)
+    {
+        keyByteOffset = 16;
+        keyFilter = 0xFF000000;
+    }
+
+    /* 遍历ShellCommand列表，尝试进行按键键值匹配 */
+    ShellCommand *base = (ShellCommand *)shell->commandList.base;
+    for (short i = 0; i < shell->commandList.count; i++)
+    {
+        /* 判断是否是按键定义并验证权限 */
+        if (base[i].attr.attrs.type == SHELL_TYPE_KEY
+            && shellCheckPermission(shell, &(base[i])) == 0)
+        {
+            /* 对输入的字节同按键键值进行匹配 */
+            if ((base[i].data.key.value & keyFilter) == shell->parser.keyValue
+                && (base[i].data.key.value & (0xFF << keyByteOffset))
+                    == (data << keyByteOffset))
+            {
+                shell->parser.keyValue |= data << keyByteOffset;
+                data = 0x00;
+                if (keyByteOffset == 0 
+                    || (base[i].data.key.value & (0xFF << (keyByteOffset - 8)))
+                        == 0x00000000)
+                {
+                    if (base[i].data.key.function)
+                    {
+                        base[i].data.key.function(shell);
+                    }
+                    shell->parser.keyValue = 0x00000000;
+                    break;
+                }
+            }
+        }
+    }
+
+    if (data != 0x00)
+    {
+        shellNormalInput(shell, data);
+    }
+
+    if (SHELL_GET_TICK())
+    {
+        shell->info.activeTime = SHELL_GET_TICK();
+    }
+}
+
+
+/**
+ * @brief shell 任务
+ * 
+ * @param param 参数(shell对象)
+ * 
+ */
+void shellTask(void *param)
+{
+    Shell *shell = (Shell *)param;
+    char data;
+#if SHELL_TASK_WHILE == 1
+    while(1)
+    {
+#endif
+        if (shell->read && shell->read(&data) == 0)
+        {
+            shellHandler(shell, data);
+        }
+#if SHELL_TASK_WHILE == 1
+    }
+#endif
+}
+
+
+/**
+ * @brief shell 输出用户列表(shell调用)
+ */
+void shellUsers(void)
+{
+    Shell *shell = shellGetCurrent();
+    if (shell)
+    {
+        shellListUser(shell);
+    }
+}
+SHELL_EXPORT_CMD(
+SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_DISABLE_RETURN,
+users, shellUsers, list all user);
+
+
+/**
+ * @brief shell 输出命令列表(shell调用)
+ */
+void shellCmds(void)
+{
+    Shell *shell = shellGetCurrent();
+    if (shell)
+    {
+        shellListCommand(shell);
+    }
+}
+SHELL_EXPORT_CMD(
+SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_DISABLE_RETURN,
+cmds, shellCmds, list all cmd);
+
+
+/**
+ * @brief shell 输出变量列表(shell调用)
+ */
+void shellVars(void)
+{
+    Shell *shell = shellGetCurrent();
+    if (shell)
+    {
+        shellListVar(shell);
+    }
+}
+SHELL_EXPORT_CMD(
+SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_DISABLE_RETURN,
+vars, shellVars, list all var);
+
+
+/**
+ * @brief shell 输出按键列表(shell调用)
+ */
+void shellKeys(void)
+{
+    Shell *shell = shellGetCurrent();
+    if (shell)
+    {
+        shellListKey(shell);
+    }
+}
+SHELL_EXPORT_CMD(
+SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_DISABLE_RETURN,
+keys, shellKeys, list all key);
+
+
+/**
+ * @brief shell 清空控制台(shell调用)
+ */
+void shellClear(void)
+{
+    Shell *shell = shellGetCurrent();
+    if (shell)
+    {
+        shellWriteString(shell, shellText[SHELL_TEXT_CLEAR_CONSOLE]);
+    }
+}
+SHELL_EXPORT_CMD(
+SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_DISABLE_RETURN,
+clear, shellClear, clear console);
+
+
+#if SHELL_EXEC_UNDEF_FUNC == 1
+/**
+ * @brief shell执行未定义函数
+ * 
+ * @param argc 参数个数
+ * @param argv 参数
+ * @return int 返回值
+ */
+int shellExecute(int argc, char *argv[])
+{
+    Shell *shell = shellGetCurrent();
+    if (shell && argc >= 2)
+    {
+        int (*func)() = (int (*)())shellExtParsePara(shell, argv[1]);
+        shellPrint(shell, "%08x\r\n", func);
+        ShellCommand command = {
+            .attr.value = SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)
+                          |SHELL_CMD_DISABLE_RETURN,
+            .data.cmd.function = func,
+        };
+        return shellExtRun(shell, &command, argc - 1, &argv[1]);
+    }
+    else
+    {
+        shellPrint(shell, "%08x\r\n", shellClear);
+    }
+    return 0;
+}
+SHELL_EXPORT_CMD(
+SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_DISABLE_RETURN,
+exec, shellExecute, execute function undefined);
+#endif
+
+
+/**
+ * @brief 判断数字进制
+ * 
+ * @param string 参数字符串
+ * @return NUM_Type 进制
+ */
+static NUM_Type shellExtNumType(char *string)
+{
+    char *p = string;
+    NUM_Type type = NUM_TYPE_INT;
+
+    if ((*p == '0') && ((*(p + 1) == 'x') || (*(p + 1) == 'X')))
+    {
+        type = NUM_TYPE_HEX;
+    }
+    else if ((*p == '0') && ((*(p + 1) == 'b') || (*(p + 1) == 'B')))
+    {
+        type = NUM_TYPE_BIN;
+    }
+    else if (*p == '0')
+    {
+        type = NUM_TYPE_OCT;
+    }
+    
+    while (*p++)
+    {
+        if (*p == '.' && *(p + 1) != 0)
+        {
+            type = NUM_TYPE_FLOAT;
+            break;
+        }
+    }
+
+    return type;
+}
+
+
+/**
+ * @brief 字符转数字
+ * 
+ * @param code 字符
+ * @return char 数字
+ */
+static char shellExtToNum(char code)
+{
+    if ((code >= '0') && (code <= '9'))
+    {
+        return code -'0';
+    }
+    else if ((code >= 'a') && (code <= 'f'))
+    {
+        return code - 'a' + 10;
+    }
+    else if ((code >= 'A') && (code <= 'F'))
+    {
+        return code - 'A' + 10;
+    }
+    else
+    {
+        return 0;
+    }
+}
+
+
+/**
+ * @brief 解析字符参数
+ * 
+ * @param string 字符串参数
+ * @return char 解析出的字符
+ */
+static char shellExtParseChar(char *string)
+{
+    char *p = string + 1;
+    char value = 0;
+
+    if (*p == '\\')
+    {
+        switch (*(p + 1))
+        {
+        case 'b':
+            value = '\b';
+            break;
+        case 'r':
+            value = '\r';
+            break;
+        case 'n':
+            value = '\n';
+            break;
+        case 't':
+            value = '\t';
+            break;
+        case '0':
+            value = 0;
+            break;
+        default:
+            value = *(p + 1);
+            break;
+        }
+    }
+    else
+    {
+        value = *p;
+    }
+    return value;
+}
+
+
+/**
+ * @brief 解析字符串参数
+ * 
+ * @param string 字符串参数
+ * @return char* 解析出的字符串
+ */
+static char* shellExtParseString(char *string)
+{
+    char *p = string;
+    unsigned short index = 0;
+
+    if (*string == '\"')
+    {
+        p = ++string;
+    }
+
+    while (*p)
+    {
+        if (*p == '\\')
+        {
+            *(string + index) = shellExtParseChar(p - 1);
+            p++;
+        }
+        else if (*p == '\"')
+        {
+            *(string + index) = 0;
+        }
+        else
+        {
+            *(string + index) = *p;
+        }
+        p++;
+        index ++;
+    }
+    *(string + index) = 0;
+    return string;
+}
+
+
+/**
+ * @brief 解析数字参数
+ * 
+ * @param string 字符串参数
+ * @return unsigned int 解析出的数字
+ */
+static unsigned int shellExtParseNumber(char *string)
+{
+    NUM_Type type = NUM_TYPE_INT;
+    char radix = 10;
+    char *p = string;
+    char offset = 0;
+    signed char sign = 1;
+    unsigned int valueInt = 0;
+    float valueFloat = 0.0;
+    unsigned int devide = 0;
+
+    if (*string == '-')
+    {
+        sign = -1;
+    }
+
+    type = shellExtNumType(string + ((sign == -1) ? 1 : 0));
+
+    switch ((char)type)
+    {
+    case NUM_TYPE_HEX:
+        radix = 16;
+        offset = 2;
+        break;
+    
+    case NUM_TYPE_OCT:
+        radix = 8;
+        offset = 1;
+        break;
+
+    case NUM_TYPE_BIN:
+        radix = 2;
+        offset = 2;
+        break;
+    
+    default:
+        break;
+    }
+
+    p = string + offset + ((sign == -1) ? 1 : 0);
+
+    while (*p)
+    {
+        if (*p == '.')
+        {
+            devide = 1;
+            p++;
+            continue;
+        }
+        valueInt = valueInt * radix + shellExtToNum(*p);
+        devide *= 10;
+        p++;
+    }
+    if (type == NUM_TYPE_FLOAT && devide != 0)
+    {
+        valueFloat = (float)valueInt / devide * sign;
+        return (uint32_t)valueFloat;
+    }
+    else
+    {
+        return valueInt * sign;
+    }
+}
+
+
+/**
+ * @brief 解析变量参数
+ * 
+ * @param shell shell对象
+ * @param var 变量
+ * @return unsigned int 变量值
+ */
+static unsigned int shellExtParseVar(Shell *shell, char *var)
+{
+    ShellCommand *command = shellSeekCommand(shell,
+                                             var + 1,
+                                             shell->commandList.base,
+                                             0);
+    if (command)
+    {
+        return shellGetVarValue(shell, command);
+    }
+    else
+    {
+        return 0;
+    }
+}
+
+
+/**
+ * @brief 解析参数
+ * 
+ * @param shell shell对象
+ * @param string 参数
+ * @return unsigned int 解析结果
+ */
+unsigned int shellExtParsePara(Shell *shell, char *string)
+{
+    if (*string == '\'' && *(string + 1))
+    {
+        return (unsigned int)shellExtParseChar(string);
+    }
+    else if (*string == '-' || (*string >= '0' && *string <= '9'))
+    {
+        return (unsigned int)shellExtParseNumber(string);
+    }
+    else if (*string == '$' && *(string + 1))
+    {
+        return shellExtParseVar(shell, string);
+    }
+    else if (*string)
+    {
+        return (unsigned int)shellExtParseString(string);
+    }
+    return 0;
+}
+
+
+/**
+ * @brief 执行命令
+ * 
+ * @param shell shell对象
+ * @param command 命令
+ * @param argc 参数个数
+ * @param argv 参数
+ * @return int 返回值
+ */
+int shellExtRun(Shell *shell, ShellCommand *command, int argc, char *argv[])
+{
+    unsigned int params[8] = {0};
+    int paramNum = command->attr.attrs.paramNum > (argc - 1) ? 
+        command->attr.attrs.paramNum : (argc - 1);
+    for (int i = 0; i < argc - 1; i++)
+    {
+        params[i] = shellExtParsePara(shell, argv[i + 1]);
+    }
+    switch (paramNum)
+    {
+    case 0:
+        return command->data.cmd.function();
+        // break;
+    case 1:
+        return command->data.cmd.function(params[0]);
+        // break;
+    case 2:
+        return command->data.cmd.function(params[0], params[1]);
+        // break;
+    case 3:
+        return command->data.cmd.function(params[0], params[1],
+                                          params[2]);
+        // break;
+    case 4:
+        return command->data.cmd.function(params[0], params[1],
+                                          params[2], params[3]);
+        // break;
+    case 5:
+        return command->data.cmd.function(params[0], params[1],
+                                          params[2], params[3],
+                                          params[4]);
+        // break;
+    case 6:
+        return command->data.cmd.function(params[0], params[1],
+                                          params[2], params[3],
+                                          params[4], params[5]);
+        // break;
+    case 7:
+        return command->data.cmd.function(params[0], params[1],
+                                          params[2], params[3],
+                                          params[4], params[5],
+                                          params[6]);
+        // break;
+    default:
+        return -1;
+        // break;
+    }
+}
+
diff --git a/components/shell/drv_shell.h b/components/shell/drv_shell.h
new file mode 100644
index 00000000..4ed3fdfc
--- /dev/null
+++ b/components/shell/drv_shell.h
@@ -0,0 +1,393 @@
+/**
+ * @file shell.h
+ * @author Letter (NevermindZZT@gmail.com)
+ * @brief letter shell
+ * @version 3.0.0
+ * @date 2019-12-30
+ * 
+ * @Copyright (c) 2020 Letter
+ * 
+ */
+
+#ifndef     __SHELL_H__
+#define     __SHELL_H__
+
+#include "shell_cfg.h"
+
+#define     SHELL_VERSION               "3.0.2"                 /**< 版本号 */
+
+
+/**
+ * @brief shell 断言
+ * 
+ * @param expr 表达式
+ * @param action 断言失败操作
+ */
+#define     SHELL_ASSERT(expr, action) \
+            if (!(expr)) { \
+                action; \
+            }
+
+/**
+ * @brief shell 命令权限
+ * 
+ * @param permission 权限级别
+ */
+#define     SHELL_CMD_PERMISSION(permission) \
+            (permission & 0x000000FF)
+
+/**
+ * @brief shell 命令类型
+ * 
+ * @param type 类型
+ */
+#define     SHELL_CMD_TYPE(type) \
+            ((type & 0x0000000F) << 8)
+
+/**
+ * @brief 使能命令在未校验密码的情况下使用
+ */
+#define     SHELL_CMD_ENABLE_UNCHECKED \
+            (1 << 12)
+
+/**
+ * @brief 禁用返回值打印
+ */
+#define     SHELL_CMD_DISABLE_RETURN \
+            (1 << 13)
+
+/**
+ * @brief 命令参数数量
+ */
+#define     SHELL_CMD_PARAM_NUM(num) \
+            ((num & 0x0000000F)) << 16
+
+#ifndef SECTION
+    #if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && __ARMCC_VERSION >= 6000000)
+        #define SECTION(x)                  __attribute__((section(x)))
+    #elif defined(__ICCARM__) || defined(__ICCRX__)
+        #define SECTION(x)                  @ x
+    #elif defined(__GNUC__)
+        #define SECTION(x)                  __attribute__((section(x)))
+    #else
+        #define SECTION(x)
+    #endif
+#endif
+
+/**
+ * @brief shell float型参数转换
+ */
+#define     SHELL_PARAM_FLOAT(x)            (*(float *)(&x))
+
+/**
+ * @brief shell 代理函数名
+ */
+#define     SHELL_AGENCY_FUNC_NAME(_func)   agency##_func
+
+/**
+ * @brief shell代理函数定义
+ * 
+ * @param _func 被代理的函数
+ * @param ... 代理参数
+ */
+#define     SHELL_AGENCY_FUNC(_func, ...) \
+            void SHELL_AGENCY_FUNC_NAME(_func)(int p1, int p2, int p3, int p4, int p5, int p6, int p7) \
+            { _func(__VA_ARGS__); }
+
+#if SHELL_USING_CMD_EXPORT == 1
+
+    /**
+     * @brief shell 命令定义
+     * 
+     * @param _attr 命令属性
+     * @param _name 命令名
+     * @param _func 命令函数
+     * @param _desc 命令描述
+     */
+    #define SHELL_EXPORT_CMD(_attr, _name, _func, _desc) \
+            const char shellCmd##_name[] = #_name; \
+            const char shellDesc##_name[] = #_desc; \
+            const ShellCommand \
+            shellCommand##_name SECTION("shellCommand") =  \
+            { \
+                .attr.value = _attr, \
+                .data.cmd.name = shellCmd##_name, \
+                .data.cmd.function = (int (*)())_func, \
+                .data.cmd.desc = shellDesc##_name \
+            }
+
+    /**
+     * @brief shell 代理命令定义
+     * 
+     * @param _attr 命令属性
+     * @param _name 命令名
+     * @param _func 命令函数
+     * @param _desc 命令描述
+     * @param ... 代理参数
+     */
+    #define SHELL_EXPORT_CMD_AGENCY(_attr, _name, _func, _desc, ...) \
+            SHELL_AGENCY_FUNC(_func, ##__VA_ARGS__) \
+            SHELL_EXPORT_CMD(_attr, _name, SHELL_AGENCY_FUNC_NAME(_func), _desc)
+
+    /**
+     * @brief shell 变量定义
+     * 
+     * @param _attr 变量属性
+     * @param _name 变量名
+     * @param _value 变量值
+     * @param _desc 变量描述
+     */
+    #define SHELL_EXPORT_VAR(_attr, _name, _value, _desc) \
+            const char shellCmd##_name[] = #_name; \
+            const char shellDesc##_name[] = #_desc; \
+            const ShellCommand \
+            shellVar##_name SECTION("shellCommand") =  \
+            { \
+                .attr.value = _attr, \
+                .data.var.name = shellCmd##_name, \
+                .data.var.value = (void *)_value, \
+                .data.var.desc = shellDesc##_name \
+            }
+
+    /**
+     * @brief shell 用户定义
+     * 
+     * @param _attr 用户属性
+     * @param _name 用户名
+     * @param _password 用户密码
+     * @param _desc 用户描述
+     */
+    #define SHELL_EXPORT_USER(_attr, _name, _password, _desc) \
+            const char shellCmd##_name[] = #_name; \
+            const char shellPassword##_name[] = #_password; \
+            const char shellDesc##_name[] = #_desc; \
+            const ShellCommand \
+            shellUser##_name SECTION("shellCommand") =  \
+            { \
+                .attr.value = _attr|SHELL_CMD_TYPE(SHELL_TYPE_USER), \
+                .data.user.name = shellCmd##_name, \
+                .data.user.password = shellPassword##_name, \
+                .data.user.desc = shellDesc##_name \
+            }
+
+    /**
+     * @brief shell 按键定义
+     * 
+     * @param _attr 按键属性
+     * @param _value 按键键值
+     * @param _func 按键函数
+     * @param _desc 按键描述
+     */
+    #define SHELL_EXPORT_KEY(_attr, _value, _func, _desc) \
+            const char shellDesc##_value[] = #_desc; \
+            const ShellCommand \
+            shellKey##_value SECTION("shellCommand") =  \
+            { \
+                .attr.value = _attr|SHELL_CMD_TYPE(SHELL_TYPE_KEY), \
+                .data.key.value = _value, \
+                .data.key.function = (void (*)(Shell *))_func, \
+                .data.key.desc = shellDesc##_value \
+            }
+#else
+    /**
+     * @brief shell 命令item定义
+     * 
+     * @param _attr 命令属性
+     * @param _name 命令名
+     * @param _func 命令函数
+     * @param _desc 命令描述
+     */
+    #define SHELL_CMD_ITEM(_attr, _name, _func, _desc) \
+            { \
+                .attr.value = _attr, \
+                .data.cmd.name = #_name, \
+                .data.cmd.function = (int (*)())_func, \
+                .data.cmd.desc = #_desc \
+            }
+
+    /**
+     * @brief shell 变量item定义
+     * 
+     * @param _attr 变量属性
+     * @param _name 变量名
+     * @param _value 变量值
+     * @param _desc 变量描述
+     */
+    #define SHELL_VAR_ITEM(_attr, _name, _value, _desc) \
+            { \
+                .attr.value = _attr, \
+                .data.var.name = #_name, \
+                .data.var.value = (void *)_value, \
+                .data.var.desc = #_desc \
+            }
+
+    /**
+     * @brief shell 用户item定义
+     * 
+     * @param _attr 用户属性
+     * @param _name 用户名
+     * @param _password 用户密码
+     * @param _desc 用户描述
+     */
+    #define SHELL_USER_ITEM(_attr, _name, _password, _desc) \
+            { \
+                .attr.value = _attr|SHELL_CMD_TYPE(SHELL_TYPE_USER), \
+                .data.user.name = #_name, \
+                .data.user.password = #_password, \
+                .data.user.desc = #_desc \
+            }
+
+    /**
+     * @brief shell 按键item定义
+     * 
+     * @param _attr 按键属性
+     * @param _value 按键键值
+     * @param _func 按键函数
+     * @param _desc 按键描述
+     */
+    #define SHELL_KEY_ITEM(_attr, _value, _func, _desc) \
+            { \
+                .attr.value = _attr|SHELL_CMD_TYPE(SHELL_TYPE_KEY), \
+                .data.key.value = _value, \
+                .data.key.function = (void (*)(Shell *))_func, \
+                .data.key.desc = #_desc \
+            }
+
+    #define SHELL_EXPORT_CMD(_attr, _name, _func, _desc)
+    #define SHELL_EXPORT_VAR(_attr, _name, _value, _desc)
+    #define SHELL_EXPORT_USER(_attr, _name, _password, _desc)
+    #define SHELL_EXPORT_KEY(_attr, _value, _func, _desc)
+#endif /** SHELL_USING_CMD_EXPORT == 1 */
+
+/**
+ * @brief shell command类型
+ */
+typedef enum
+{
+    SHELL_TYPE_CMD_MAIN = 0,                                    /**< main形式命令 */
+    SHELL_TYPE_CMD_FUNC,                                        /**< C函数形式命令 */
+    SHELL_TYPE_VAR_INT,                                         /**< int型变量 */
+    SHELL_TYPE_VAR_SHORT,                                       /**< short型变量 */
+    SHELL_TYPE_VAR_CHAR,                                        /**< char型变量 */
+    SHELL_TYPE_VAR_POINT,                                       /**< 指针型变量 */
+    SHELL_TYPE_VAL,                                             /**< 常量 */
+    SHELL_TYPE_USER,                                            /**< 用户 */
+    SHELL_TYPE_KEY,                                             /**< 按键 */
+} ShellCommandType;
+
+
+/**
+ * @brief Shell定义
+ */
+typedef struct
+{
+    struct
+    {
+        const struct shell_command *user;                       /**< 当前用户 */
+        int activeTime;                                         /**< shell激活时间 */
+    } info;
+    struct
+    {
+        unsigned short length;                                  /**< 输入数据长度 */
+        unsigned short cursor;                                  /**< 当前光标位置 */
+        char *buffer;                                           /**< 输入缓冲 */
+        char *param[SHELL_PARAMETER_MAX_NUMBER];                /**< 参数 */
+        unsigned short bufferSize;                              /**< 输入缓冲大小 */
+        unsigned short paramCount;                              /**< 参数数量 */
+        int keyValue;                                           /**< 输入按键键值 */
+    } parser;
+    struct
+    {
+        char *item[SHELL_HISTORY_MAX_NUMBER];                   /**< 历史记录 */
+        unsigned short number;                                  /**< 历史记录数 */
+        unsigned short record;                                  /**< 当前记录位置 */
+        signed short offset;                                    /**< 当前历史记录偏移 */
+    } history;
+    struct
+    {
+        void *base;                                             /**< 命令表基址 */
+        unsigned short count;                                   /**< 命令数量 */
+    } commandList;
+    struct
+    {
+        unsigned char isChecked : 1;                            /**< 密码校验通过 */
+        unsigned char isActive : 1;                             /**< 当前活动Shell */
+        unsigned char tabFlag : 1;                              /**< tab标志 */
+    } status;
+    signed char (*read)(char *);                                /**< shell读函数 */
+    void (*write)(const char);                                  /**< shell写函数 */
+} Shell;
+
+
+/**
+ * @brief shell command定义
+ */
+typedef struct shell_command
+{
+    union
+    {
+        struct
+        {
+            unsigned char permission : 8;                       /**< command权限 */
+            ShellCommandType type : 4;                          /**< command类型 */
+            unsigned char enableUnchecked : 1;                  /**< 在未校验密码的情况下可用 */
+            unsigned char disableReturn : 1;                    /**< 禁用返回值输出 */
+            unsigned char reserve : 2;                          /**< 保留 */
+            unsigned char paramNum : 4;                         /**< 参数数量 */
+        } attrs;
+        int value;
+    } attr;                                                     /**< 属性 */
+    union
+    {
+        struct
+        {
+            const char *name;                                   /**< 命令名 */
+            int (*function)();                                  /**< 命令执行函数 */
+            const char *desc;                                   /**< 命令描述 */
+        } cmd;                                                  /**< 命令定义 */
+        struct
+        {
+            const char *name;                                   /**< 变量名 */
+            void *value;                                        /**< 变量值 */
+            const char *desc;                                   /**< 变量描述 */
+        } var;                                                  /**< 变量定义 */
+        struct
+        {
+            const char *name;                                   /**< 用户名 */
+            const char *password;                               /**< 用户密码 */
+            const char *desc;                                   /**< 用户描述 */
+        } user;                                                 /**< 用户定义 */
+        struct
+        {
+            int value;                                          /**< 按键键值 */
+            void (*function)(Shell *);                          /**< 按键执行函数 */
+            const char *desc;                                   /**< 按键描述 */
+        } key;                                                  /**< 按键定义 */
+    } data; 
+} ShellCommand;
+
+
+void shellInit(Shell *shell, char *buffer, unsigned short size);
+void shellPrint(Shell *shell, char *fmt, ...);
+Shell* shellGetCurrent(void);
+void shellHandler(Shell *shell, char data);
+void shellTask(void *param);
+
+/**
+ * @brief 数字类型
+ * 
+ */
+typedef enum
+{
+    NUM_TYPE_INT,                                           /**< 十进制整型 */
+    NUM_TYPE_BIN,                                           /**< 二进制整型 */
+    NUM_TYPE_OCT,                                           /**< 八进制整型 */
+    NUM_TYPE_HEX,                                           /**< 十六进制整型 */
+    NUM_TYPE_FLOAT                                          /**< 浮点型 */
+} NUM_Type;
+
+unsigned int shellExtParsePara(Shell *shell, char *string);
+int shellExtRun(Shell *shell, ShellCommand *command, int argc, char *argv[]);
+
+#endif
+
diff --git a/components/shell/shell_cfg.h b/components/shell/shell_cfg.h
new file mode 100644
index 00000000..a411cfd5
--- /dev/null
+++ b/components/shell/shell_cfg.h
@@ -0,0 +1,139 @@
+/**
+ * @file shell_cfg.h
+ * @author Letter (nevermindzzt@gmail.com)
+ * @brief shell config
+ * @version 3.0.0
+ * @date 2019-12-31
+ * 
+ * @copyright (c) 2019 Letter
+ * 
+ */
+
+#ifndef __SHELL_CFG_H__
+#define __SHELL_CFG_H__
+
+
+/**
+ * @brief 是否使用默认shell任务while循环，使能宏`SHELL_USING_TASK`后此宏有意义
+ *        使能此宏，则`shellTask()`函数会一直循环读取输入，一般使用操作系统建立shell
+ *        任务时使能此宏，关闭此宏的情况下，一般适用于无操作系统，在主循环中调用`shellTask()`
+ */
+#define     SHELL_TASK_WHILE            0
+
+/**
+ * @brief 是否使用命令导出方式
+ *        使能此宏后，可以使用`SHELL_EXPORT_CMD()`等导出命令
+ *        定义shell命令，关闭此宏的情况下，需要使用命令表的方式
+ */
+#define     SHELL_USING_CMD_EXPORT      1
+
+/**
+ * @brief 是否在输出命令列表中列出用户
+ */
+#define     SHELL_HELP_LIST_USER        0
+
+/**
+ * @brief 是否在输出命令列表中列出变量
+ */
+#define     SHELL_HELP_LIST_VAR         0
+
+/**
+ * @brief 是否在输出命令列表中列出按键
+ */
+#define     SHELL_HELP_LIST_KEY         0
+
+/**
+ * @brief 是否在输出命令列表中展示命令权限
+ */
+#define     SHELL_HELP_SHOW_PERMISSION  0
+
+/**
+ * @brief 使用LF作为命令行回车触发
+ *        可以和SHELL_ENTER_CR同时开启
+ */
+#define     SHELL_ENTER_LF              1
+
+/**
+ * @brief 使用CR作为命令行回车触发
+ *        可以和SHELL_ENTER_LF同时开启
+ */
+#define     SHELL_ENTER_CR              1
+
+/**
+ * @brief 使用CRLF作为命令行回车触发
+ *        不可以和SHELL_ENTER_LF或SHELL_ENTER_CR同时开启
+ */
+#define     SHELL_ENTER_CRLF            0
+
+/**
+ * @brief 使用执行未导出函数的功能
+ *        启用后，可以通过`exec [addr] [args]`直接执行对应地址的函数
+ * @attention 如果地址错误，可能会直接引起程序崩溃
+ */
+#define     SHELL_EXEC_UNDEF_FUNC       0
+
+/**
+ * @brief shell命令参数最大数量
+ *        包含命令名在内，超过8个参数并且使用了参数自动转换的情况下，需要修改源码
+ */
+#define     SHELL_PARAMETER_MAX_NUMBER  8
+
+/**
+ * @brief 历史命令记录数量
+ */
+#define     SHELL_HISTORY_MAX_NUMBER    30
+
+/**
+ * @brief 双击间隔(ms)
+ *        使能宏`SHELL_LONG_HELP`后此宏生效，定义双击tab补全help的时间间隔
+ */
+#define     SHELL_DOUBLE_CLICK_TIME     200
+
+/**
+ * @brief 管理的最大shell数量
+ */
+#define     SHELL_MAX_NUMBER            5
+
+/**
+ * @brief shell格式化输出的缓冲大小
+ *        为0时不使用shell格式化输出
+ */
+#define     SHELL_PRINT_BUFFER          128
+
+/**
+ * @brief 获取系统时间(ms)
+ *        定义此宏为获取系统Tick，如`HAL_GetTick()`
+ * @note 此宏不定义时无法使用双击tab补全命令help，无法使用shell超时锁定
+ */
+#define     SHELL_GET_TICK()            0
+
+/**
+ * @brief 是否显示shell信息
+ */
+#define     SHELL_SHOW_INFO             0
+
+/**
+ * @brief 是否在登录后清除命令行
+ */
+#define     SHELL_CLS_WHEN_LOGIN        0
+
+/**
+ * @brief shell默认用户
+ */
+#define     SHELL_DEFAULT_USER          "bouffalolab"
+
+/**
+ * @brief shell默认用户密码
+ *        若默认用户不需要密码，设为""
+ */
+#define     SHELL_DEFAULT_USER_PASSWORD ""
+
+/**
+ * @brief shell自动锁定超时
+ *        使能`SHELL_USING_AUTH`的情况下生效，超时后会自动重新锁定shell
+ *        设置为0时关闭自动锁定功能，时间单位为`SHELL_GET_TICK()`单位
+ * @note 使用超时锁定必须保证`SHELL_GET_TICK()`有效
+ */
+#define     SHELL_LOCK_TIMEOUT          0 * 60 * 1000
+
+#endif
diff --git a/components/usb_stack/CMakeLists.txt b/components/usb_stack/CMakeLists.txt
new file mode 100644
index 00000000..0335adb6
--- /dev/null
+++ b/components/usb_stack/CMakeLists.txt
@@ -0,0 +1,53 @@
+################# Add global include #################
+list(APPEND ADD_INCLUDE 
+"${CMAKE_CURRENT_SOURCE_DIR}/core"
+"${CMAKE_CURRENT_SOURCE_DIR}/common"
+"${CMAKE_CURRENT_SOURCE_DIR}/class/cdc"
+"${CMAKE_CURRENT_SOURCE_DIR}/class/hid" 
+"${CMAKE_CURRENT_SOURCE_DIR}/class/msc" 
+"${CMAKE_CURRENT_SOURCE_DIR}/class/video"
+"${CMAKE_CURRENT_SOURCE_DIR}/class/winusb"
+)
+#######################################################
+
+################# Add private include #################
+# list(APPEND ADD_PRIVATE_INCLUDE
+# )
+#######################################################
+
+############## Add current dir source files ###########
+file(GLOB_RECURSE sources "${CMAKE_CURRENT_SOURCE_DIR}/core/*.c"
+"${CMAKE_CURRENT_SOURCE_DIR}/class/*.c"
+)
+list(APPEND ADD_SRCS  ${sources})
+# aux_source_directory(src ADD_SRCS)
+#######################################################
+
+########### Add required/dependent components #########
+#list(APPEND ADD_REQUIREMENTS BSP_${BOARD}_Driver)
+#######################################################
+
+############ Add static libs ##########################
+# if(CONFIG_COMPONENT1_INCLUDE_STATIC_LIB)
+#     list(APPEND ADD_STATIC_LIB "lib/libtest.a")
+# endif()
+#######################################################
+
+############ Add dynamic libs #########################
+# list(APPEND ADD_DYNAMIC_LIB "lib/arch/v831/libmaix_nn.so"
+#                             "lib/arch/v831/libmaix_cam.so"
+# )
+#######################################################
+
+############ Add global compile option ################
+#add components denpend on this component
+# list(APPEND ADD_DEFINITIONS -DAAAAA222=1
+#                             -DAAAAA333=1)
+#######################################################
+
+############ Add private compile option ################
+#add compile option for this component that won't affect other modules  
+# list(APPEND ADD_DEFINITIONS_PRIVATE -DAAAAA=1)
+#######################################################
+
+generate_library()
diff --git a/components/usb_stack/class/audio/usbd_audio.c b/components/usb_stack/class/audio/usbd_audio.c
new file mode 100644
index 00000000..8e2b8acf
--- /dev/null
+++ b/components/usb_stack/class/audio/usbd_audio.c
@@ -0,0 +1,7 @@
+#include "usbd_core.h"
+#include "usbd_audio.h"
+
+int audio_class_request_handler(struct usb_setup_packet *setup, uint8_t **data, uint32_t *len)
+{
+    return 0;
+}
diff --git a/components/usb_stack/class/audio/usbd_audio.h b/components/usb_stack/class/audio/usbd_audio.h
new file mode 100644
index 00000000..9c7ebc8f
--- /dev/null
+++ b/components/usb_stack/class/audio/usbd_audio.h
@@ -0,0 +1,240 @@
+/**
+ * @file
+ * @brief USB Audio Device Class public header
+ *
+ * Header follows below documentation:
+ * - USB Device Class Definition for Audio Devices (audio10.pdf)
+ *
+ * Additional documentation considered a part of USB Audio v1.0:
+ * - USB Device Class Definition for Audio Data Formats (frmts10.pdf)
+ * - USB Device Class Definition for Terminal Types (termt10.pdf)
+ */
+
+#ifndef _USBD_AUDIO_H_
+#define _USBD_AUDIO_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Audio Interface Subclass Codes
+ * Refer to Table A-2 from audio10.pdf
+ */
+enum usb_audio_int_subclass_codes {
+	USB_AUDIO_SUBCLASS_UNDEFINED	= 0x00,
+	USB_AUDIO_AUDIOCONTROL		= 0x01,
+	USB_AUDIO_AUDIOSTREAMING	= 0x02,
+	USB_AUDIO_MIDISTREAMING		= 0x03
+};
+
+/** Audio Class-Specific AC Interface Descriptor Subtypes
+ * Refer to Table A-5 from audio10.pdf
+ */
+enum usb_audio_cs_ac_int_desc_subtypes {
+	USB_AUDIO_AC_DESCRIPTOR_UNDEFINED	= 0x00,
+	USB_AUDIO_HEADER			= 0x01,
+	USB_AUDIO_INPUT_TERMINAL		= 0x02,
+	USB_AUDIO_OUTPUT_TERMINAL		= 0x03,
+	USB_AUDIO_MIXER_UNIT			= 0x04,
+	USB_AUDIO_SELECTOR_UNIT			= 0x05,
+	USB_AUDIO_FEATURE_UNIT			= 0x06,
+	USB_AUDIO_PROCESSING_UNIT		= 0x07,
+	USB_AUDIO_EXTENSION_UNIT		= 0x08
+};
+
+/** Audio Class-Specific AS Interface Descriptor Subtypes
+ * Refer to Table A-6 from audio10.pdf
+ */
+enum usb_audio_cs_as_int_desc_subtypes {
+	USB_AUDIO_AS_DESCRIPTOR_UNDEFINED	= 0x00,
+	USB_AUDIO_AS_GENERAL			= 0x01,
+	USB_AUDIO_FORMAT_TYPE			= 0x02,
+	USB_AUDIO_FORMAT_SPECIFIC		= 0x03
+};
+
+/** Audio Class-Specific Request Codes
+ * Refer to Table A-9 from audio10.pdf
+ */
+enum usb_audio_cs_req_codes {
+	USB_AUDIO_REQUEST_CODE_UNDEFINED	= 0x00,
+	USB_AUDIO_SET_CUR			= 0x01,
+	USB_AUDIO_GET_CUR			= 0x81,
+	USB_AUDIO_SET_MIN			= 0x02,
+	USB_AUDIO_GET_MIN			= 0x82,
+	USB_AUDIO_SET_MAX			= 0x03,
+	USB_AUDIO_GET_MAX			= 0x83,
+	USB_AUDIO_SET_RES			= 0x04,
+	USB_AUDIO_GET_RES			= 0x84,
+	USB_AUDIO_SET_MEM			= 0x05,
+	USB_AUDIO_GET_MEM			= 0x85,
+	USB_AUDIO_GET_STAT			= 0xFF
+};
+
+/** Feature Unit Control Selectors
+ * Refer to Table A-11 from audio10.pdf
+ */
+enum usb_audio_fucs {
+	USB_AUDIO_FU_CONTROL_UNDEFINED		= 0x00,
+	USB_AUDIO_FU_MUTE_CONTROL		= 0x01,
+	USB_AUDIO_FU_VOLUME_CONTROL		= 0x02,
+	USB_AUDIO_FU_BASS_CONTROL		= 0x03,
+	USB_AUDIO_FU_MID_CONTROL		= 0x04,
+	USB_AUDIO_FU_TREBLE_CONTROL		= 0x05,
+	USB_AUDIO_FU_GRAPHIC_EQUALIZER_CONTROL	= 0x06,
+	USB_AUDIO_FU_AUTOMATIC_GAIN_CONTROL	= 0x07,
+	USB_AUDIO_FU_DELAY_CONTROL		= 0x08,
+	USB_AUDIO_FU_BASS_BOOST_CONTROL		= 0x09,
+	USB_AUDIO_FU_LOUDNESS_CONTROL		= 0x0A
+};
+
+/** USB Terminal Types
+ * Refer to Table 2-1 - Table 2-4 from termt10.pdf
+ */
+enum usb_audio_terminal_types {
+	/* USB Terminal Types */
+	USB_AUDIO_USB_UNDEFINED   = 0x0100,
+	USB_AUDIO_USB_STREAMING   = 0x0101,
+	USB_AUDIO_USB_VENDOR_SPEC = 0x01FF,
+
+	/* Input Terminal Types */
+	USB_AUDIO_IN_UNDEFINED      = 0x0200,
+	USB_AUDIO_IN_MICROPHONE     = 0x0201,
+	USB_AUDIO_IN_DESKTOP_MIC    = 0x0202,
+	USB_AUDIO_IN_PERSONAL_MIC   = 0x0203,
+	USB_AUDIO_IN_OM_DIR_MIC     = 0x0204,
+	USB_AUDIO_IN_MIC_ARRAY      = 0x0205,
+	USB_AUDIO_IN_PROC_MIC_ARRAY = 0x0205,
+
+	/* Output Terminal Types */
+	USB_AUDIO_OUT_UNDEFINED		= 0x0300,
+	USB_AUDIO_OUT_SPEAKER		= 0x0301,
+	USB_AUDIO_OUT_HEADPHONES	= 0x0302,
+	USB_AUDIO_OUT_HEAD_AUDIO	= 0x0303,
+	USB_AUDIO_OUT_DESKTOP_SPEAKER	= 0x0304,
+	USB_AUDIO_OUT_ROOM_SPEAKER	= 0x0305,
+	USB_AUDIO_OUT_COMM_SPEAKER	= 0x0306,
+	USB_AUDIO_OUT_LOW_FREQ_SPEAKER	= 0x0307,
+
+	/* Bi-directional Terminal Types */
+	USB_AUDIO_IO_UNDEFINED			= 0x0400,
+	USB_AUDIO_IO_HANDSET			= 0x0401,
+	USB_AUDIO_IO_HEADSET			= 0x0402,
+	USB_AUDIO_IO_SPEAKERPHONE_ECHO_NONE	= 0x0403,
+	USB_AUDIO_IO_SPEAKERPHONE_ECHO_SUP	= 0x0404,
+	USB_AUDIO_IO_SPEAKERPHONE_ECHO_CAN	= 0x0405,
+};
+
+enum usb_audio_direction {
+	USB_AUDIO_IN = 0x00,
+	USB_AUDIO_OUT = 0x01
+};
+
+/**
+ * Addressable logical object inside an audio function.
+ * Entity is one of: Terminal or Unit.
+ * Refer to 1.4 Terms and Abbreviations from audio10.pdf
+ */
+struct usb_audio_entity {
+	enum usb_audio_cs_ac_int_desc_subtypes subtype;
+	uint8_t id;
+};
+
+/**
+ * @warning Size of baInterface is 2 just to make it useable
+ * for all kind of devices: headphones, microphone and headset.
+ * Actual size of the struct should be checked by reading
+ * .bLength.
+ */
+struct cs_ac_if_descriptor {
+	uint8_t bLength;
+	uint8_t bDescriptorType;
+	uint8_t bDescriptorSubtype;
+	uint16_t bcdADC;
+	uint16_t wTotalLength;
+	uint8_t bInCollection;
+	uint8_t baInterfaceNr[2];
+} __packed;
+
+struct input_terminal_descriptor {
+	uint8_t bLength;
+	uint8_t bDescriptorType;
+	uint8_t bDescriptorSubtype;
+	uint8_t bTerminalID;
+	uint16_t wTerminalType;
+	uint8_t bAssocTerminal;
+	uint8_t bNrChannels;
+	uint16_t wChannelConfig;
+	uint8_t iChannelNames;
+	uint8_t iTerminal;
+} __packed;
+
+/**
+ * @note Size of Feature unit descriptor is not fixed.
+ * This structure is just a helper not a common type.
+ */
+struct feature_unit_descriptor {
+	uint8_t bLength;
+	uint8_t bDescriptorType;
+	uint8_t bDescriptorSubtype;
+	uint8_t bUnitID;
+	uint8_t bSourceID;
+	uint8_t bControlSize;
+	uint16_t bmaControls[1];
+} __packed;
+
+struct output_terminal_descriptor {
+	uint8_t bLength;
+	uint8_t bDescriptorType;
+	uint8_t bDescriptorSubtype;
+	uint8_t bTerminalID;
+	uint16_t wTerminalType;
+	uint8_t bAssocTerminal;
+	uint8_t bSourceID;
+	uint8_t iTerminal;
+} __packed;
+
+struct as_cs_interface_descriptor {
+	uint8_t  bLength;
+	uint8_t  bDescriptorType;
+	uint8_t  bDescriptorSubtype;
+	uint8_t  bTerminalLink;
+	uint8_t  bDelay;
+	uint16_t wFormatTag;
+} __packed;
+
+struct format_type_i_descriptor {
+	uint8_t bLength;
+	uint8_t bDescriptorType;
+	uint8_t bDescriptorSubtype;
+	uint8_t bFormatType;
+	uint8_t bNrChannels;
+	uint8_t bSubframeSize;
+	uint8_t bBitResolution;
+	uint8_t bSamFreqType;
+	uint8_t tSamFreq[3];
+} __packed;
+
+struct std_as_ad_endpoint_descriptor {
+	uint8_t bLength;
+	uint8_t bDescriptorType;
+	uint8_t bEndpointAddress;
+	uint8_t bmAttributes;
+	uint16_t wMaxPacketSize;
+	uint8_t bInterval;
+	uint8_t bRefresh;
+	uint8_t bSynchAddress;
+} __packed;
+
+struct cs_as_ad_ep_descriptor {
+	uint8_t bLength;
+	uint8_t bDescriptorType;
+	uint8_t bDescriptorSubtype;
+	uint8_t bmAttributes;
+	uint8_t bLockDelayUnits;
+	uint16_t wLockDelay;
+} __packed;
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _USB_AUDIO_H_ */
diff --git a/components/usb_stack/class/cdc/usbd_cdc.c b/components/usb_stack/class/cdc/usbd_cdc.c
new file mode 100644
index 00000000..c7cdef83
--- /dev/null
+++ b/components/usb_stack/class/cdc/usbd_cdc.c
@@ -0,0 +1,189 @@
+/**
+ * @file usbd_cdc.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "usbd_core.h"
+#include "usbd_cdc.h"
+
+static const char *stop_name[] = {"1", "1.5", "2"};
+static const char *parity_name[] = {"N","O","E","M","S"};
+
+/* Device data structure */
+struct cdc_acm_cfg_private {
+	// /* Interface data buffer */
+	/* CDC ACM line coding properties. LE order */
+	struct cdc_line_coding line_coding;
+	/* CDC ACM line state bitmap, DTE side */
+	uint8_t line_state;
+	/* CDC ACM serial state bitmap, DCE side */
+	uint8_t serial_state;
+	/* CDC ACM notification sent status */
+	uint8_t notification_sent;
+	/* CDC ACM configured flag */
+	bool configured;
+	/* CDC ACM suspended flag */
+	bool suspended;
+
+} usbd_cdc_acm_cfg;
+
+static void usbd_cdc_acm_reset(void)
+{
+	usbd_cdc_acm_cfg.line_coding.dwDTERate = 2000000;
+	usbd_cdc_acm_cfg.line_coding.bDataBits = 8;
+	usbd_cdc_acm_cfg.line_coding.bParityType = 0;
+	usbd_cdc_acm_cfg.line_coding.bCharFormat = 0;
+}
+
+/**
+ * @brief Handler called for Class requests not handled by the USB stack.
+ *
+ * @param pSetup    Information about the request to execute.
+ * @param len       Size of the buffer.
+ * @param data      Buffer containing the request result.
+ *
+ * @return  0 on success, negative errno code on fail.
+ */
+int cdc_acm_class_request_handler(struct usb_setup_packet *pSetup,uint8_t **data,uint32_t *len)
+{
+	switch (pSetup->bRequest) 
+	{
+	case CDC_REQUEST_SET_LINE_CODING:
+        /*******************************************************************************/
+        /* Line Coding Structure                                                       */
+        /*-----------------------------------------------------------------------------*/
+        /* Offset | Field       | Size | Value  | Description                          */
+        /* 0      | dwDTERate   |   4  | Number |Data terminal rate, in bits per second*/
+        /* 4      | bCharFormat |   1  | Number | Stop bits                            */
+        /*                                        0 - 1 Stop bit                       */
+        /*                                        1 - 1.5 Stop bits                    */
+        /*                                        2 - 2 Stop bits                      */
+        /* 5      | bParityType |  1   | Number | Parity                               */
+        /*                                        0 - None                             */
+        /*                                        1 - Odd                              */
+        /*                                        2 - Even                             */
+        /*                                        3 - Mark                             */
+        /*                                        4 - Space                            */
+        /* 6      | bDataBits  |   1   | Number Data bits (5, 6, 7, 8 or 16).          */
+        /*******************************************************************************/	
+		memcpy(&usbd_cdc_acm_cfg.line_coding,*data, sizeof(usbd_cdc_acm_cfg.line_coding));
+		USBD_LOG("CDC_SET_LINE_CODING <%d %d %s %s>\r\n",
+			usbd_cdc_acm_cfg.line_coding.dwDTERate,
+			usbd_cdc_acm_cfg.line_coding.bDataBits,
+			parity_name[usbd_cdc_acm_cfg.line_coding.bParityType],
+			stop_name[usbd_cdc_acm_cfg.line_coding.bCharFormat]
+			);
+		usbd_cdc_acm_set_line_coding(usbd_cdc_acm_cfg.line_coding.dwDTERate,usbd_cdc_acm_cfg.line_coding.bDataBits,\
+		usbd_cdc_acm_cfg.line_coding.bParityType,usbd_cdc_acm_cfg.line_coding.bCharFormat);
+		break;
+
+	case CDC_REQUEST_SET_CONTROL_LINE_STATE:
+		usbd_cdc_acm_cfg.line_state = (uint8_t)pSetup->wValue;
+		bool dtr = (pSetup->wValue & 0x01);
+		bool rts = (pSetup->wValue & 0x02);
+		USBD_LOG("DTR 0x%x,RTS 0x%x\r\n",
+		 	dtr,rts);
+		usbd_cdc_acm_set_dtr(dtr);
+		usbd_cdc_acm_set_rts(rts);
+		break;
+
+	case CDC_REQUEST_GET_LINE_CODING:
+		*data = (uint8_t *)(&usbd_cdc_acm_cfg.line_coding);
+		*len = sizeof(usbd_cdc_acm_cfg.line_coding);
+		USBD_LOG_DBG("CDC_GET_LINE_CODING %d %d %d %d\r\n",
+			usbd_cdc_acm_cfg.line_coding.dwDTERate,
+			usbd_cdc_acm_cfg.line_coding.bCharFormat,
+			usbd_cdc_acm_cfg.line_coding.bParityType,
+			usbd_cdc_acm_cfg.line_coding.bDataBits);
+		break;
+
+	default:
+		USBD_LOG_DBG("CDC ACM request 0x%x, value 0x%x\r\n",
+			pSetup->bRequest, pSetup->wValue);
+		return -1;
+	}
+
+	return 0;
+}
+
+void cdc_notify_handler(uint8_t event, void* arg)
+{
+	switch (event)
+	{
+		case USB_EVENT_RESET:
+			usbd_cdc_acm_reset();
+			break;
+		
+		default:
+			break;
+	}	
+}
+
+__weak void usbd_cdc_acm_set_line_coding(uint32_t baudrate,uint8_t databits,uint8_t parity,uint8_t stopbits)
+{
+
+}
+__weak void usbd_cdc_acm_set_dtr(bool dtr)
+{
+
+}
+__weak void usbd_cdc_acm_set_rts(bool rts)
+{
+
+}
+
+void usbd_cdc_add_acm_interface(usbd_class_t *class, usbd_interface_t *intf)
+{
+	static usbd_class_t *last_class = NULL;
+
+	if(last_class != class)
+	{
+		last_class = class;		
+		usbd_class_register(class);
+	}
+
+	intf->class_handler = cdc_acm_class_request_handler;
+	intf->custom_handler = NULL;
+	intf->vendor_handler = NULL;
+	intf->notify_handler = cdc_notify_handler;
+	usbd_class_add_interface(class,intf);
+}
+
+void usbd_cdc_add_custom_interface(usbd_class_t *class, usbd_interface_t *intf)
+{
+	static usbd_class_t *last_class = NULL;
+
+	if(last_class != class)
+	{
+		last_class = class;		
+		usbd_class_register(class);
+	}
+
+	intf->class_handler = cdc_acm_class_request_handler;
+	intf->custom_handler = NULL;
+	intf->vendor_handler = NULL;
+	intf->notify_handler = cdc_notify_handler;
+	usbd_class_add_interface(class,intf);
+}
+
+void usbd_cdc_add_endpoint(usbd_interface_t *intf, usbd_endpoint_t *ep)
+{
+	usbd_interface_add_endpoint(intf,ep);
+}
diff --git a/components/usb_stack/class/cdc/usbd_cdc.h b/components/usb_stack/class/cdc/usbd_cdc.h
new file mode 100644
index 00000000..7df35042
--- /dev/null
+++ b/components/usb_stack/class/cdc/usbd_cdc.h
@@ -0,0 +1,378 @@
+/**
+ * @file
+ * @brief USB Communications Device Class (CDC) public header
+ *
+ * Header follows the Class Definitions for
+ * Communications Devices Specification (CDC120-20101103-track.pdf),
+ * PSTN Devices Specification (PSTN120.pdf) and
+ * Ethernet Control Model Devices Specification (ECM120.pdf).
+ * Header is limited to ACM and ECM Subclasses.
+ */
+
+#ifndef _USBD_CDC_H
+#define _USBD_CDC_H
+
+/*------------------------------------------------------------------------------
+ *      Definitions  based on usbcdc11.pdf (www.usb.org)
+ *----------------------------------------------------------------------------*/
+/* Communication device class specification version 1.10 */
+#define CDC_V1_10                               0x0110U
+// Communication device class specification version 1.2
+#define CDC_V1_2_0                              0x0120U
+
+/* Communication interface class code */
+/* (usbcdc11.pdf, 4.2, Table 15) */
+#define CDC_COMMUNICATION_INTERFACE_CLASS       0x02U
+
+/* Communication interface class subclass codes */
+/* (usbcdc11.pdf, 4.3, Table 16) */
+#define CDC_DIRECT_LINE_CONTROL_MODEL           0x01U
+#define CDC_ABSTRACT_CONTROL_MODEL              0x02U
+#define CDC_TELEPHONE_CONTROL_MODEL             0x03U
+#define CDC_MULTI_CHANNEL_CONTROL_MODEL         0x04U
+#define CDC_CAPI_CONTROL_MODEL                  0x05U
+#define CDC_ETHERNET_NETWORKING_CONTROL_MODEL   0x06U
+#define CDC_ATM_NETWORKING_CONTROL_MODEL        0x07U
+#define CDC_WIRELESS_HANDSET_CONTROL_MODEL      0x08U
+#define CDC_DEVICE_MANAGEMENT                   0x09U
+#define CDC_MOBILE_DIRECT_LINE_MODEL            0x0AU
+#define CDC_OBEX                                0x0BU
+#define CDC_ETHERNET_EMULATION_MODEL            0x0CU
+#define CDC_NETWORK_CONTROL_MODEL               0x0DU
+
+/* Communication interface class control protocol codes */
+/* (usbcdc11.pdf, 4.4, Table 17) */
+#define CDC_COMMON_PROTOCOL_NONE                                0x00U
+#define CDC_COMMON_PROTOCOL_AT_COMMANDS                         0x01U
+#define CDC_COMMON_PROTOCOL_AT_COMMANDS_PCCA_101                0x02U
+#define CDC_COMMON_PROTOCOL_AT_COMMANDS_PCCA_101_AND_ANNEXO     0x03U
+#define CDC_COMMON_PROTOCOL_AT_COMMANDS_GSM_707                 0x04U
+#define CDC_COMMON_PROTOCOL_AT_COMMANDS_3GPP_27007              0x05U
+#define CDC_COMMON_PROTOCOL_AT_COMMANDS_CDMA                    0x06U
+#define CDC_COMMON_PROTOCOL_ETHERNET_EMULATION_MODEL            0x07U
+// NCM Communication Interface Protocol Codes
+// (usbncm10.pdf, 4.2, Table 4-2)
+#define CDC_NCM_PROTOCOL_NONE                   0x00U
+#define CDC_NCM_PROTOCOL_OEM                    0xFEU
+
+/* Data interface class code */
+/* (usbcdc11.pdf, 4.5, Table 18) */
+#define CDC_DATA_INTERFACE_CLASS                0x0A
+
+/* Data interface class protocol codes */
+/* (usbcdc11.pdf, 4.7, Table 19) */
+#define CDC_DATA_PROTOCOL_ISDN_BRI                   0x30
+#define CDC_DATA_PROTOCOL_HDLC                       0x31
+#define CDC_DATA_PROTOCOL_TRANSPARENT                0x32
+#define CDC_DATA_PROTOCOL_Q921_MANAGEMENT            0x50
+#define CDC_DATA_PROTOCOL_Q921_DATA_LINK             0x51
+#define CDC_DATA_PROTOCOL_Q921_MULTIPLEXOR           0x52
+#define CDC_DATA_PROTOCOL_V42                        0x90
+#define CDC_DATA_PROTOCOL_EURO_ISDN                  0x91
+#define CDC_DATA_PROTOCOL_V24_RATE_ADAPTATION        0x92
+#define CDC_DATA_PROTOCOL_CAPI                       0x93
+#define CDC_DATA_PROTOCOL_HOST_BASED_DRIVER          0xFD
+#define CDC_DATA_PROTOCOL_DESCRIBED_IN_PUFD          0xFE
+
+/* Type values for bDescriptorType field of functional descriptors */
+/* (usbcdc11.pdf, 5.2.3, Table 24) */
+#define CDC_CS_INTERFACE                        0x24
+#define CDC_CS_ENDPOINT                         0x25
+
+/* Type values for bDescriptorSubtype field of functional descriptors */
+/* (usbcdc11.pdf, 5.2.3, Table 25) */
+#define CDC_FUNC_DESC_HEADER                              0x00
+#define CDC_FUNC_DESC_CALL_MANAGEMENT                     0x01
+#define CDC_FUNC_DESC_ABSTRACT_CONTROL_MANAGEMENT         0x02
+#define CDC_FUNC_DESC_DIRECT_LINE_MANAGEMENT              0x03
+#define CDC_FUNC_DESC_TELEPHONE_RINGER                    0x04
+#define CDC_FUNC_DESC_REPORTING_CAPABILITIES              0x05
+#define CDC_FUNC_DESC_UNION                               0x06
+#define CDC_FUNC_DESC_COUNTRY_SELECTION                   0x07
+#define CDC_FUNC_DESC_TELEPHONE_OPERATIONAL_MODES         0x08
+#define CDC_FUNC_DESC_USB_TERMINAL                        0x09
+#define CDC_FUNC_DESC_NETWORK_CHANNEL                     0x0A
+#define CDC_FUNC_DESC_PROTOCOL_UNIT                       0x0B
+#define CDC_FUNC_DESC_EXTENSION_UNIT                      0x0C
+#define CDC_FUNC_DESC_MULTI_CHANNEL_MANAGEMENT            0x0D
+#define CDC_FUNC_DESC_CAPI_CONTROL_MANAGEMENT             0x0E
+#define CDC_FUNC_DESC_ETHERNET_NETWORKING                 0x0F
+#define CDC_FUNC_DESC_ATM_NETWORKING                      0x10
+#define CDC_FUNC_DESC_WIRELESS_HANDSET_CONTROL_MODEL      0x11
+#define CDC_FUNC_DESC_MOBILE_DIRECT_LINE_MODEL            0x12
+#define CDC_FUNC_DESC_MOBILE_DIRECT_LINE_MODEL_DETAIL     0x13
+#define CDC_FUNC_DESC_DEVICE_MANAGEMENT_MODEL             0x14
+#define CDC_FUNC_DESC_OBEX                                0x15
+#define CDC_FUNC_DESC_COMMAND_SET                         0x16
+#define CDC_FUNC_DESC_COMMAND_SET_DETAIL                  0x17
+#define CDC_FUNC_DESC_TELEPHONE_CONTROL_MODEL             0x18
+#define CDC_FUNC_DESC_OBEX_SERVICE_IDENTIFIER             0x19
+
+/* CDC class-specific request codes */
+/* (usbcdc11.pdf, 6.2, Table 46) */
+/* see Table 45 for info about the specific requests. */
+#define CDC_REQUEST_SEND_ENCAPSULATED_COMMAND           0x00
+#define CDC_REQUEST_GET_ENCAPSULATED_RESPONSE           0x01
+#define CDC_REQUEST_SET_COMM_FEATURE                    0x02
+#define CDC_REQUEST_GET_COMM_FEATURE                    0x03
+#define CDC_REQUEST_CLEAR_COMM_FEATURE                  0x04
+#define CDC_REQUEST_SET_AUX_LINE_STATE                  0x10
+#define CDC_REQUEST_SET_HOOK_STATE                      0x11
+#define CDC_REQUEST_PULSE_SETUP                         0x12
+#define CDC_REQUEST_SEND_PULSE                          0x13
+#define CDC_REQUEST_SET_PULSE_TIME                      0x14
+#define CDC_REQUEST_RING_AUX_JACK                       0x15
+#define CDC_REQUEST_SET_LINE_CODING                     0x20
+#define CDC_REQUEST_GET_LINE_CODING                     0x21
+#define CDC_REQUEST_SET_CONTROL_LINE_STATE              0x22
+#define CDC_REQUEST_SEND_BREAK                          0x23
+#define CDC_REQUEST_SET_RINGER_PARMS                    0x30
+#define CDC_REQUEST_GET_RINGER_PARMS                    0x31
+#define CDC_REQUEST_SET_OPERATION_PARMS                 0x32
+#define CDC_REQUEST_GET_OPERATION_PARMS                 0x33
+#define CDC_REQUEST_SET_LINE_PARMS                      0x34
+#define CDC_REQUEST_GET_LINE_PARMS                      0x35
+#define CDC_REQUEST_DIAL_DIGITS                         0x36
+#define CDC_REQUEST_SET_UNIT_PARAMETER                  0x37
+#define CDC_REQUEST_GET_UNIT_PARAMETER                  0x38
+#define CDC_REQUEST_CLEAR_UNIT_PARAMETER                0x39
+#define CDC_REQUEST_GET_PROFILE                         0x3A
+#define CDC_REQUEST_SET_ETHERNET_MULTICAST_FILTERS      0x40
+#define CDC_REQUEST_SET_ETHERNET_PMP_FILTER             0x41
+#define CDC_REQUEST_GET_ETHERNET_PMP_FILTER             0x42
+#define CDC_REQUEST_SET_ETHERNET_PACKET_FILTER          0x43
+#define CDC_REQUEST_GET_ETHERNET_STATISTIC              0x44
+#define CDC_REQUEST_SET_ATM_DATA_FORMAT                 0x50
+#define CDC_REQUEST_GET_ATM_DEVICE_STATISTICS           0x51
+#define CDC_REQUEST_SET_ATM_DEFAULT_VC                  0x52
+#define CDC_REQUEST_GET_ATM_VC_STATISTICS               0x53
+
+/* Communication feature selector codes */
+/* (usbcdc11.pdf, 6.2.2..6.2.4, Table 47) */
+#define CDC_ABSTRACT_STATE                      0x01
+#define CDC_COUNTRY_SETTING                     0x02
+
+/** Control Signal Bitmap Values for SetControlLineState */
+#define SET_CONTROL_LINE_STATE_RTS	0x02
+#define SET_CONTROL_LINE_STATE_DTR	0x01
+
+/* Feature Status returned for ABSTRACT_STATE Selector */
+/* (usbcdc11.pdf, 6.2.3, Table 48) */
+#define CDC_IDLE_SETTING                        (1 << 0)
+#define CDC_DATA_MULTPLEXED_STATE               (1 << 1)
+
+
+/* Control signal bitmap values for the SetControlLineState request */
+/* (usbcdc11.pdf, 6.2.14, Table 51) */
+#define CDC_DTE_PRESENT                         (1 << 0)
+#define CDC_ACTIVATE_CARRIER                    (1 << 1)
+
+/* CDC class-specific notification codes */
+/* (usbcdc11.pdf, 6.3, Table 68) */
+/* see Table 67 for Info about class-specific notifications */
+#define CDC_NOTIFICATION_NETWORK_CONNECTION     0x00
+#define CDC_RESPONSE_AVAILABLE                  0x01
+#define CDC_AUX_JACK_HOOK_STATE                 0x08
+#define CDC_RING_DETECT                         0x09
+#define CDC_NOTIFICATION_SERIAL_STATE           0x20
+#define CDC_CALL_STATE_CHANGE                   0x28
+#define CDC_LINE_STATE_CHANGE                   0x29
+#define CDC_CONNECTION_SPEED_CHANGE             0x2A
+
+/* UART state bitmap values (Serial state notification). */
+/* (usbcdc11.pdf, 6.3.5, Table 69) */
+#define CDC_SERIAL_STATE_OVERRUN                (1 << 6)  /* receive data overrun error has occurred */
+#define CDC_SERIAL_STATE_OVERRUN_Pos            (     6)
+#define CDC_SERIAL_STATE_OVERRUN_Msk            (1 << CDC_SERIAL_STATE_OVERRUN_Pos)
+#define CDC_SERIAL_STATE_PARITY                 (1 << 5)  /* parity error has occurred */
+#define CDC_SERIAL_STATE_PARITY_Pos             (     5)
+#define CDC_SERIAL_STATE_PARITY_Msk             (1 << CDC_SERIAL_STATE_PARITY_Pos)
+#define CDC_SERIAL_STATE_FRAMING                (1 << 4)  /* framing error has occurred */
+#define CDC_SERIAL_STATE_FRAMING_Pos            (     4)
+#define CDC_SERIAL_STATE_FRAMING_Msk            (1 << CDC_SERIAL_STATE_FRAMING_Pos)
+#define CDC_SERIAL_STATE_RING                   (1 << 3)  /* state of ring signal detection */
+#define CDC_SERIAL_STATE_RING_Pos               (     3)
+#define CDC_SERIAL_STATE_RING_Msk               (1 << CDC_SERIAL_STATE_RING_Pos)
+#define CDC_SERIAL_STATE_BREAK                  (1 << 2)  /* state of break detection */
+#define CDC_SERIAL_STATE_BREAK_Pos              (     2)
+#define CDC_SERIAL_STATE_BREAK_Msk              (1 << CDC_SERIAL_STATE_BREAK_Pos)
+#define CDC_SERIAL_STATE_TX_CARRIER             (1 << 1)  /* state of transmission carrier */
+#define CDC_SERIAL_STATE_TX_CARRIER_Pos         (     1)
+#define CDC_SERIAL_STATE_TX_CARRIER_Msk         (1 << CDC_SERIAL_STATE_TX_CARRIER_Pos)
+#define CDC_SERIAL_STATE_RX_CARRIER             (1 << 0)  /* state of receiver carrier */
+#define CDC_SERIAL_STATE_RX_CARRIER_Pos         (     0)
+#define CDC_SERIAL_STATE_RX_CARRIER_Msk         (1 << CDC_SERIAL_STATE_RX_CARRIER_Pos)
+
+
+/*------------------------------------------------------------------------------
+ *      Structures  based on usbcdc11.pdf (www.usb.org)
+ *----------------------------------------------------------------------------*/
+
+/* Header functional descriptor */
+/* (usbcdc11.pdf, 5.2.3.1) */
+/* This header must precede any list of class-specific descriptors. */
+struct cdc_header_descriptor {
+    uint8_t  bFunctionLength;                      /* size of this descriptor in bytes */
+    uint8_t  bDescriptorType;                      /* CS_INTERFACE descriptor type */
+    uint8_t  bDescriptorSubtype;                   /* Header functional descriptor subtype */
+    uint16_t bcdCDC;                               /* USB CDC specification release version */
+} __packed;
+
+/* Call management functional descriptor */
+/* (usbcdc11.pdf, 5.2.3.2) */
+/* Describes the processing of calls for the communication class interface. */
+struct cdc_call_management_descriptor {
+    uint8_t  bFunctionLength;                      /* size of this descriptor in bytes */
+    uint8_t  bDescriptorType;                      /* CS_INTERFACE descriptor type */
+    uint8_t  bDescriptorSubtype;                   /* call management functional descriptor subtype */
+    uint8_t  bmCapabilities;                       /* capabilities that this configuration supports */
+    uint8_t  bDataInterface;                       /* interface number of the data class interface used for call management (optional) */
+} __packed;
+
+/* Abstract control management functional descriptor */
+/* (usbcdc11.pdf, 5.2.3.3) */
+/* Describes the command supported by the communication interface class with the Abstract Control Model subclass code. */
+struct cdc_abstract_control_management_descriptor{
+    uint8_t  bFunctionLength;                      /* size of this descriptor in bytes */
+    uint8_t  bDescriptorType;                      /* CS_INTERFACE descriptor type */
+    uint8_t  bDescriptorSubtype;                   /* abstract control management functional descriptor subtype */
+    uint8_t  bmCapabilities;                       /* capabilities supported by this configuration */
+} __packed;
+
+/* Union functional descriptors */
+/* (usbcdc11.pdf, 5.2.3.8) */
+/* Describes the relationship between a group of interfaces that can be considered to form a functional unit. */
+struct cdc_union_descriptor{
+    uint8_t  bFunctionLength;                      /* size of this descriptor in bytes */
+    uint8_t  bDescriptorType;                      /* CS_INTERFACE descriptor type */
+    uint8_t  bDescriptorSubtype;                   /* union functional descriptor subtype */
+    uint8_t  bMasterInterface;                     /* interface number designated as master */
+} __packed;
+
+/* Union functional descriptors with one slave interface */
+/* (usbcdc11.pdf, 5.2.3.8) */
+struct cdc_union_1slave_descriptor {
+	uint8_t bFunctionLength;
+	uint8_t bDescriptorType;
+	uint8_t bDescriptorSubtype;
+	uint8_t bControlInterface;
+	uint8_t bSubordinateInterface0;
+} __packed;
+
+/* Line coding structure for GET_LINE_CODING / SET_LINE_CODING class requests*/
+/* Format of the data returned when a GetLineCoding request is received */
+/* (usbcdc11.pdf, 6.2.13) */
+struct cdc_line_coding {
+    uint32_t dwDTERate;                            /* Data terminal rate in bits per second */
+    uint8_t  bCharFormat;                          /* Number of stop bits */
+    uint8_t  bParityType;                          /* Parity bit type */
+    uint8_t  bDataBits;                            /* Number of data bits */
+} __packed;
+
+/** Data structure for the notification about SerialState */
+struct cdc_acm_notification {
+	uint8_t bmRequestType;
+	uint8_t bNotificationType;
+	uint16_t wValue;
+	uint16_t wIndex;
+	uint16_t wLength;
+	uint16_t data;
+} __packed;
+
+/** Ethernet Networking Functional Descriptor */
+struct cdc_ecm_descriptor {
+	uint8_t bFunctionLength;
+	uint8_t bDescriptorType;
+	uint8_t bDescriptorSubtype;
+	uint8_t iMACAddress;
+	uint32_t bmEthernetStatistics;
+	uint16_t wMaxSegmentSize;
+	uint16_t wNumberMCFilters;
+	uint8_t bNumberPowerFilters;
+} __packed;
+
+/*Length of template descriptor: 66 bytes*/
+#define CDC_ACM_DESCRIPTOR_LEN  (8 + 9 + 5 + 5 + 4 + 5 + 7 + 9 + 7 + 7)
+
+#define CDC_ACM_DESCRIPTOR_INIT(bFirstInterface,int_ep,out_ep,in_ep,str_idx) \
+    /* Interface Associate */\
+    0x08,                                           /* bLength */\
+    USB_DESCRIPTOR_TYPE_INTERFACE_ASSOCIATION,      /* bDescriptorType */\
+    bFirstInterface,                                /* bFirstInterface */\
+    0x02,                                           /* bInterfaceCount */\
+    USB_DEVICE_CLASS_CDC,                           /* bFunctionClass */\
+    CDC_ABSTRACT_CONTROL_MODEL,                     /* bFunctionSubClass */\
+    CDC_COMMON_PROTOCOL_AT_COMMANDS,                /* bFunctionProtocol */\
+    0x00,                                           /* iFunction */\
+    /* CDC Control Interface */\
+    0x09,                                           /* bLength */\
+    USB_DESCRIPTOR_TYPE_INTERFACE,                  /* bDescriptorType */\
+    bFirstInterface,                                /* bInterfaceNumber */\
+    0x00,                                           /* bAlternateSetting */\
+    0x01,                                           /* bNumEndpoints */\
+    USB_DEVICE_CLASS_CDC,                           /* bInterfaceClass */\
+    CDC_ABSTRACT_CONTROL_MODEL,                     /* bInterfaceSubClass */\
+    CDC_COMMON_PROTOCOL_AT_COMMANDS,                /* bInterfaceProtocol */\
+    str_idx,                                        /* iInterface */\
+    /* CDC Header */\
+    0x05,                                           /* bLength */\
+    CDC_CS_INTERFACE,                               /* bDescriptorType */\
+    CDC_FUNC_DESC_HEADER,                           /* bDescriptorSubtype */\
+    WBVAL(CDC_V1_10),                               /* bcdCDC */   \
+    /* CDC Call */\
+    0x05,                                           /* bLength */\
+    CDC_CS_INTERFACE,                               /* bDescriptorType */\
+    CDC_FUNC_DESC_CALL_MANAGEMENT,                  /* bDescriptorSubtype */\
+    bFirstInterface,                                /* bmCapabilities */\
+    (uint8_t)(bFirstInterface+1),                   /* bDataInterface */\
+    /* CDC ACM: support line request */\
+    0x04,                                           /* bLength */\
+    CDC_CS_INTERFACE,                               /* bDescriptorType */\
+    CDC_FUNC_DESC_ABSTRACT_CONTROL_MANAGEMENT,      /* bDescriptorSubtype */\
+    0x02,                                           /* bmCapabilities */\
+    /* CDC Union */\
+    0x05,                                           /* bLength */\
+    CDC_CS_INTERFACE,                               /* bDescriptorType */\
+    CDC_FUNC_DESC_UNION,                            /* bDescriptorSubtype */\
+    bFirstInterface,                                /* bMasterInterface */\
+    (uint8_t)(bFirstInterface+1),                   /* bSlaveInterface0 */\
+    /* Endpoint Notification */\
+    0x07,                                           /* bLength */\
+    USB_DESCRIPTOR_TYPE_ENDPOINT,                   /* bDescriptorType */\
+    int_ep,                                         /* bEndpointAddress */\
+    0x03,                                           /* bmAttributes */\
+    0x40, 0x00,                                     /* wMaxPacketSize */\
+    0x01,                                           /* bInterval */\
+    /* CDC Data Interface */\
+    0x09,                                           /* bLength */\
+    USB_DESCRIPTOR_TYPE_INTERFACE,                  /* bDescriptorType */\
+    (uint8_t)(bFirstInterface+1),                   /* bInterfaceNumber */\
+    0x00,                                           /* bAlternateSetting */\
+    0x02,                                           /* bNumEndpoints */\
+    CDC_DATA_INTERFACE_CLASS,                       /* bInterfaceClass */\
+    0x00,                                           /* bInterfaceSubClass */\
+    0x00,                                           /* bInterfaceProtocol */\
+    0x00,                                           /* iInterface */\
+    /* Endpoint Out */\
+    0x07,                                           /* bLength */\
+    USB_DESCRIPTOR_TYPE_ENDPOINT,                   /* bDescriptorType */\
+    out_ep,                                         /* bEndpointAddress */\
+    0x02,                                           /* bmAttributes */\
+    0x40, 0x00,                                     /* wMaxPacketSize */\
+    0x01,                                           /* bInterval */\
+    /* Endpoint In */\
+    0x07,                                           /* bLength */\
+    USB_DESCRIPTOR_TYPE_ENDPOINT,                   /* bDescriptorType */\
+    in_ep,                                          /* bEndpointAddress */\
+    0x02,                                           /* bmAttributes */\
+    0x40, 0x00,                                     /* wMaxPacketSize */\
+    0x01                                            /* bInterval */            
+
+void usbd_cdc_add_acm_interface(usbd_class_t *class, usbd_interface_t *intf);
+void usbd_cdc_add_custom_interface(usbd_class_t *class, usbd_interface_t *intf);
+void usbd_cdc_add_endpoint(usbd_interface_t *intf, usbd_endpoint_t *ep);
+
+void usbd_cdc_acm_set_line_coding(uint32_t baudrate, uint8_t databits, uint8_t parity, uint8_t stopbits);
+void usbd_cdc_acm_set_dtr(bool dtr);
+void usbd_cdc_acm_set_rts(bool rts);
+#endif /* USB_CDC_H_ */
diff --git a/components/usb_stack/class/hid/usbd_hid.c b/components/usb_stack/class/hid/usbd_hid.c
new file mode 100644
index 00000000..41172876
--- /dev/null
+++ b/components/usb_stack/class/hid/usbd_hid.c
@@ -0,0 +1,94 @@
+/**
+ * @file usbd_hid.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "usbd_core.h"
+#include "usbd_hid.h"
+
+int hid_custom_request_handler(struct usb_setup_packet *setup, uint8_t **data, uint32_t *len)
+{
+    USBD_LOG_DBG("Standard request:"
+                 "bRequest 0x%02x, bmRequestType 0x%02x, len %d",
+                 setup->bRequest, setup->bmRequestType, *len);
+
+    if (REQTYPE_GET_DIR(setup->bmRequestType) == USB_REQUEST_DEVICE_TO_HOST &&
+        setup->bRequest == USB_REQUEST_GET_DESCRIPTOR)
+    {
+        uint8_t value = (uint8_t)(setup->wValue >> 8);
+        //uint8_t iface_num = (uint8_t)setup->wIndex;
+
+        switch (value)
+        {
+        case USB_DESCRIPTOR_TYPE_HID:
+
+            USBD_LOG_DBG("Return HID Descriptor");
+
+            break;
+        case USB_DESCRIPTOR_TYPE_HID_REPORT:
+            USBD_LOG_DBG("Return Report Descriptor");
+
+            break;
+        case USB_DESCRIPTOR_TYPE_HID_PHYSICAL:
+            USBD_LOG_DBG("Return PHYSICAL Descriptor");
+
+            break;            
+        default:
+            return -2;
+        }
+
+        return 0;
+    }
+
+    return -1;
+}
+int hid_class_request_handler(struct usb_setup_packet *setup, uint8_t **data, uint32_t *len)
+{
+    USBD_LOG_DBG("Class request:"
+                 "bRequest 0x%02x, bmRequestType 0x%02x len %d",
+                 setup->bRequest, setup->bmRequestType, *len);
+
+    switch (setup->bRequest)
+    {
+    case HID_REQUEST_GET_IDLE:
+
+        break;
+    case HID_REQUEST_GET_REPORT:
+
+        break;
+    case HID_REQUEST_GET_PROTOCOL:
+
+        break;
+    case HID_REQUEST_SET_IDLE:
+
+        break;
+    case HID_REQUEST_SET_REPORT:
+
+        break;
+    case HID_REQUEST_SET_PROTOCOL:
+
+        break;
+    default:
+        USBD_LOG_ERR("Unhandled request 0x%02x", setup->bRequest);
+        break;
+    }
+
+    return 0;
+}
diff --git a/components/usb_stack/class/hid/usbd_hid.h b/components/usb_stack/class/hid/usbd_hid.h
new file mode 100644
index 00000000..6d5b0065
--- /dev/null
+++ b/components/usb_stack/class/hid/usbd_hid.h
@@ -0,0 +1,396 @@
+/**
+ * @file
+ * @brief USB Human Interface Device (HID) Class public header
+ *
+ * Header follows Device Class Definition for Human Interface Devices (HID)
+ * Version 1.11 document (HID1_11-1.pdf).
+ */
+#ifndef _USBD_HID_H_
+#define _USBD_HID_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* HID Class Descriptor Types */
+#define USB_DESCRIPTOR_TYPE_HID		 		0x21
+#define USB_DESCRIPTOR_TYPE_HID_REPORT	 	0x22
+#define USB_DESCRIPTOR_TYPE_HID_PHYSICAL 	0x23
+
+/* HID Class Specific Requests */
+#define HID_REQUEST_GET_REPORT		0x01
+#define HID_REQUEST_GET_IDLE		0x02
+#define HID_REQUEST_GET_PROTOCOL	0x03
+#define HID_REQUEST_SET_REPORT		0x09
+#define HID_REQUEST_SET_IDLE		0x0A
+#define HID_REQUEST_SET_PROTOCOL	0x0B
+
+/* HID Report Definitions */
+struct usb_hid_class_subdescriptor {
+	uint8_t bDescriptorType;
+	uint16_t wDescriptorLength;
+} __packed;
+
+struct usb_hid_descriptor {
+	uint8_t bLength;
+	uint8_t bDescriptorType;
+	uint16_t bcdHID;
+	uint8_t bCountryCode;
+	uint8_t bNumDescriptors;
+
+	/*
+	 * Specification says at least one Class Descriptor needs to
+	 * be present (Report Descriptor).
+	 */
+	struct usb_hid_class_subdescriptor subdesc[1];
+} __packed;
+
+/* HID Items types */
+#define ITEM_MAIN	0x0
+#define ITEM_GLOBAL	0x1
+#define ITEM_LOCAL	0x2
+
+/* HID Main Items tags */
+#define ITEM_TAG_INPUT		0x8
+#define ITEM_TAG_OUTPUT		0x9
+#define ITEM_TAG_COLLECTION	0xA
+#define ITEM_TAG_COLLECTION_END	0xC
+
+/* HID Global Items tags */
+#define ITEM_TAG_USAGE_PAGE	0x0
+#define ITEM_TAG_LOGICAL_MIN	0x1
+#define ITEM_TAG_LOGICAL_MAX	0x2
+#define ITEM_TAG_REPORT_SIZE	0x7
+#define ITEM_TAG_REPORT_ID	0x8
+#define ITEM_TAG_REPORT_COUNT	0x9
+
+/* HID Local Items tags */
+#define ITEM_TAG_USAGE		0x0
+#define ITEM_TAG_USAGE_MIN	0x1
+#define ITEM_TAG_USAGE_MAX	0x2
+
+#define HID_ITEM(bTag, bType, bSize)	(((bTag & 0xF) << 4) | \
+					 ((bType & 0x3) << 2) | (bSize & 0x3))
+
+#define HID_MAIN_ITEM(bTag, bSize)	HID_ITEM(bTag, ITEM_MAIN, bSize)
+#define HID_GLOBAL_ITEM(bTag, bSize)	HID_ITEM(bTag, ITEM_GLOBAL, bSize)
+#define HID_LOCAL_ITEM(bTag, bSize)	HID_ITEM(bTag, ITEM_LOCAL, bSize)
+
+#define HID_MI_COLLECTION		HID_MAIN_ITEM(ITEM_TAG_COLLECTION, 1)
+#define HID_MI_COLLECTION_END		HID_MAIN_ITEM(ITEM_TAG_COLLECTION_END, \
+						      0)
+#define HID_MI_INPUT			HID_MAIN_ITEM(ITEM_TAG_INPUT, 1)
+#define HID_MI_OUTPUT			HID_MAIN_ITEM(ITEM_TAG_OUTPUT, 1)
+
+#define HID_GI_USAGE_PAGE		HID_GLOBAL_ITEM(ITEM_TAG_USAGE_PAGE, 1)
+#define HID_GI_LOGICAL_MIN(size)	HID_GLOBAL_ITEM(ITEM_TAG_LOGICAL_MIN, \
+							size)
+#define HID_GI_LOGICAL_MAX(size)	HID_GLOBAL_ITEM(ITEM_TAG_LOGICAL_MAX, \
+							size)
+#define HID_GI_REPORT_SIZE		HID_GLOBAL_ITEM(ITEM_TAG_REPORT_SIZE, \
+							1)
+#define HID_GI_REPORT_ID		HID_GLOBAL_ITEM(ITEM_TAG_REPORT_ID, \
+							1)
+#define HID_GI_REPORT_COUNT		HID_GLOBAL_ITEM(ITEM_TAG_REPORT_COUNT, \
+							1)
+
+#define HID_LI_USAGE			HID_LOCAL_ITEM(ITEM_TAG_USAGE, 1)
+#define HID_LI_USAGE_MIN(size)		HID_LOCAL_ITEM(ITEM_TAG_USAGE_MIN, \
+						       size)
+#define HID_LI_USAGE_MAX(size)		HID_LOCAL_ITEM(ITEM_TAG_USAGE_MAX, \
+						       size)
+
+/* Defined in Universal Serial Bus HID Usage Tables version 1.11 */
+#define USAGE_GEN_DESKTOP		0x01
+#define USAGE_GEN_KEYBOARD		0x07
+#define USAGE_GEN_LEDS			0x08
+#define USAGE_GEN_BUTTON		0x09
+
+/* Generic Desktop Page usages */
+#define USAGE_GEN_DESKTOP_UNDEFINED	0x00
+#define USAGE_GEN_DESKTOP_POINTER	0x01
+#define USAGE_GEN_DESKTOP_MOUSE		0x02
+#define USAGE_GEN_DESKTOP_JOYSTICK	0x04
+#define USAGE_GEN_DESKTOP_GAMEPAD	0x05
+#define USAGE_GEN_DESKTOP_KEYBOARD	0x06
+#define USAGE_GEN_DESKTOP_KEYPAD	0x07
+#define USAGE_GEN_DESKTOP_X			0x30
+#define USAGE_GEN_DESKTOP_Y			0x31
+#define USAGE_GEN_DESKTOP_WHEEL		0x38
+
+/* Collection types */
+#define COLLECTION_PHYSICAL			0x00
+#define COLLECTION_APPLICATION		0x01
+
+/* Protocols */
+#define HID_PROTOCOL_BOOT		0x00
+#define HID_PROTOCOL_REPORT		0x01
+
+/* Example HID report descriptors */
+/**
+ * @brief Simple HID mouse report descriptor for n button mouse.
+ *
+ * @param bcnt	Button count. Allowed values from 1 to 8.
+ */
+#define HID_MOUSE_REPORT_DESC(bcnt) {				\
+	/* USAGE_PAGE (Generic Desktop) */			\
+	HID_GI_USAGE_PAGE, USAGE_GEN_DESKTOP,			\
+	/* USAGE (Mouse) */					\
+	HID_LI_USAGE, USAGE_GEN_DESKTOP_MOUSE,			\
+	/* COLLECTION (Application) */				\
+	HID_MI_COLLECTION, COLLECTION_APPLICATION,		\
+		/* USAGE (Pointer) */				\
+		HID_LI_USAGE, USAGE_GEN_DESKTOP_POINTER,	\
+		/* COLLECTION (Physical) */			\
+		HID_MI_COLLECTION, COLLECTION_PHYSICAL,		\
+			/* Bits used for button signalling */	\
+			/* USAGE_PAGE (Button) */		\
+			HID_GI_USAGE_PAGE, USAGE_GEN_BUTTON,	\
+			/* USAGE_MINIMUM (Button 1) */		\
+			HID_LI_USAGE_MIN(1), 0x01,		\
+			/* USAGE_MAXIMUM (Button bcnt) */	\
+			HID_LI_USAGE_MAX(1), bcnt,		\
+			/* LOGICAL_MINIMUM (0) */		\
+			HID_GI_LOGICAL_MIN(1), 0x00,		\
+			/* LOGICAL_MAXIMUM (1) */		\
+			HID_GI_LOGICAL_MAX(1), 0x01,		\
+			/* REPORT_SIZE (1) */			\
+			HID_GI_REPORT_SIZE, 0x01,		\
+			/* REPORT_COUNT (bcnt) */		\
+			HID_GI_REPORT_COUNT, bcnt,		\
+			/* INPUT (Data,Var,Abs) */		\
+			HID_MI_INPUT, 0x02,			\
+			/* Unused bits */			\
+			/* REPORT_SIZE (8 - bcnt) */		\
+			HID_GI_REPORT_SIZE, (8 - bcnt),		\
+			/* REPORT_COUNT (1) */			\
+			HID_GI_REPORT_COUNT, 0x01,		\
+			/* INPUT (Cnst,Ary,Abs) */		\
+			HID_MI_INPUT, 0x01,			\
+			/* X and Y axis, scroll */		\
+			/* USAGE_PAGE (Generic Desktop) */	\
+			HID_GI_USAGE_PAGE, USAGE_GEN_DESKTOP,	\
+			/* USAGE (X) */				\
+			HID_LI_USAGE, USAGE_GEN_DESKTOP_X,	\
+			/* USAGE (Y) */				\
+			HID_LI_USAGE, USAGE_GEN_DESKTOP_Y,	\
+			/* USAGE (WHEEL) */			\
+			HID_LI_USAGE, USAGE_GEN_DESKTOP_WHEEL,	\
+			/* LOGICAL_MINIMUM (-127) */		\
+			HID_GI_LOGICAL_MIN(1), -127,		\
+			/* LOGICAL_MAXIMUM (127) */		\
+			HID_GI_LOGICAL_MAX(1), 127,		\
+			/* REPORT_SIZE (8) */			\
+			HID_GI_REPORT_SIZE, 0x08,		\
+			/* REPORT_COUNT (3) */			\
+			HID_GI_REPORT_COUNT, 0x03,		\
+			/* INPUT (Data,Var,Rel) */		\
+			HID_MI_INPUT, 0x06,			\
+		/* END_COLLECTION */				\
+		HID_MI_COLLECTION_END,				\
+	/* END_COLLECTION */					\
+	HID_MI_COLLECTION_END,					\
+}
+
+/**
+ * @brief Simple HID keyboard report descriptor.
+ */
+#define HID_KEYBOARD_REPORT_DESC() {				\
+	/* USAGE_PAGE (Generic Desktop) */			\
+	HID_GI_USAGE_PAGE, USAGE_GEN_DESKTOP,			\
+	/* USAGE (Keyboard) */					\
+	HID_LI_USAGE, USAGE_GEN_DESKTOP_KEYBOARD,		\
+	/* COLLECTION (Application) */				\
+	HID_MI_COLLECTION, COLLECTION_APPLICATION,		\
+		/* USAGE_PAGE (Keypad) */			\
+		HID_GI_USAGE_PAGE, USAGE_GEN_DESKTOP_KEYPAD,	\
+		/* USAGE_MINIMUM (Keyboard LeftControl) */	\
+		HID_LI_USAGE_MIN(1), 0xE0,			\
+		/* USAGE_MAXIMUM (Keyboard Right GUI) */	\
+		HID_LI_USAGE_MAX(1), 0xE7,			\
+		/* LOGICAL_MINIMUM (0) */			\
+		HID_GI_LOGICAL_MIN(1), 0x00,			\
+		/* LOGICAL_MAXIMUM (1) */			\
+		HID_GI_LOGICAL_MAX(1), 0x01,			\
+		/* REPORT_SIZE (1) */				\
+		HID_GI_REPORT_SIZE, 0x01,			\
+		/* REPORT_COUNT (8) */				\
+		HID_GI_REPORT_COUNT, 0x08,			\
+		/* INPUT (Data,Var,Abs) */			\
+		HID_MI_INPUT, 0x02,				\
+		/* REPORT_SIZE (8) */				\
+		HID_GI_REPORT_SIZE, 0x08,			\
+		/* REPORT_COUNT (1) */				\
+		HID_GI_REPORT_COUNT, 0x01,			\
+		/* INPUT (Cnst,Var,Abs) */			\
+		HID_MI_INPUT, 0x03,				\
+		/* REPORT_SIZE (1) */				\
+		HID_GI_REPORT_SIZE, 0x01,			\
+		/* REPORT_COUNT (5) */				\
+		HID_GI_REPORT_COUNT, 0x05,			\
+		/* USAGE_PAGE (LEDs) */				\
+		HID_GI_USAGE_PAGE, USAGE_GEN_LEDS,		\
+		/* USAGE_MINIMUM (Num Lock) */			\
+		HID_LI_USAGE_MIN(1), 0x01,			\
+		/* USAGE_MAXIMUM (Kana) */			\
+		HID_LI_USAGE_MAX(1), 0x05,			\
+		/* OUTPUT (Data,Var,Abs) */			\
+		HID_MI_OUTPUT, 0x02,				\
+		/* REPORT_SIZE (3) */				\
+		HID_GI_REPORT_SIZE, 0x03,			\
+		/* REPORT_COUNT (1) */				\
+		HID_GI_REPORT_COUNT, 0x01,			\
+		/* OUTPUT (Cnst,Var,Abs) */			\
+		HID_MI_OUTPUT, 0x03,				\
+		/* REPORT_SIZE (8) */				\
+		HID_GI_REPORT_SIZE, 0x08,			\
+		/* REPORT_COUNT (6) */				\
+		HID_GI_REPORT_COUNT, 0x06,			\
+		/* LOGICAL_MINIMUM (0) */			\
+		HID_GI_LOGICAL_MIN(1), 0x00,			\
+		/* LOGICAL_MAXIMUM (101) */			\
+		HID_GI_LOGICAL_MAX(1), 0x65,			\
+		/* USAGE_PAGE (Keypad) */			\
+		HID_GI_USAGE_PAGE, USAGE_GEN_DESKTOP_KEYPAD,	\
+		/* USAGE_MINIMUM (Reserved) */			\
+		HID_LI_USAGE_MIN(1), 0x00,			\
+		/* USAGE_MAXIMUM (Keyboard Application) */	\
+		HID_LI_USAGE_MAX(1), 0x65,			\
+		/* INPUT (Data,Ary,Abs) */			\
+		HID_MI_INPUT, 0x00,				\
+	/* END_COLLECTION */					\
+	HID_MI_COLLECTION_END,					\
+}
+
+/**
+ * @brief HID keyboard button codes.
+ */
+enum hid_kbd_code {
+	HID_KEY_A		= 4,
+	HID_KEY_B		= 5,
+	HID_KEY_C		= 6,
+	HID_KEY_D		= 7,
+	HID_KEY_E		= 8,
+	HID_KEY_F		= 9,
+	HID_KEY_G		= 10,
+	HID_KEY_H		= 11,
+	HID_KEY_I		= 12,
+	HID_KEY_J		= 13,
+	HID_KEY_K		= 14,
+	HID_KEY_L		= 15,
+	HID_KEY_M		= 16,
+	HID_KEY_N		= 17,
+	HID_KEY_O		= 18,
+	HID_KEY_P		= 19,
+	HID_KEY_Q		= 20,
+	HID_KEY_R		= 21,
+	HID_KEY_S		= 22,
+	HID_KEY_T		= 23,
+	HID_KEY_U		= 24,
+	HID_KEY_V		= 25,
+	HID_KEY_W		= 26,
+	HID_KEY_X		= 27,
+	HID_KEY_Y		= 28,
+	HID_KEY_Z		= 29,
+	HID_KEY_1		= 30,
+	HID_KEY_2		= 31,
+	HID_KEY_3		= 32,
+	HID_KEY_4		= 33,
+	HID_KEY_5		= 34,
+	HID_KEY_6		= 35,
+	HID_KEY_7		= 36,
+	HID_KEY_8		= 37,
+	HID_KEY_9		= 38,
+	HID_KEY_0		= 39,
+	HID_KEY_ENTER		= 40,
+	HID_KEY_ESC		= 41,
+	HID_KEY_BACKSPACE	= 42,
+	HID_KEY_TAB		= 43,
+	HID_KEY_SPACE		= 44,
+	HID_KEY_MINUS		= 45,
+	HID_KEY_EQUAL		= 46,
+	HID_KEY_LEFTBRACE	= 47,
+	HID_KEY_RIGHTBRACE	= 48,
+	HID_KEY_BACKSLASH	= 49,
+	HID_KEY_HASH		= 50, /* Non-US # and ~ */
+	HID_KEY_SEMICOLON	= 51,
+	HID_KEY_APOSTROPHE	= 52,
+	HID_KEY_GRAVE		= 53,
+	HID_KEY_COMMA		= 54,
+	HID_KEY_DOT		= 55,
+	HID_KEY_SLASH		= 56,
+	HID_KEY_CAPSLOCK	= 57,
+	HID_KEY_F1		= 58,
+	HID_KEY_F2		= 59,
+	HID_KEY_F3		= 60,
+	HID_KEY_F4		= 61,
+	HID_KEY_F5		= 62,
+	HID_KEY_F6		= 63,
+	HID_KEY_F7		= 64,
+	HID_KEY_F8		= 65,
+	HID_KEY_F9		= 66,
+	HID_KEY_F10		= 67,
+	HID_KEY_F11		= 68,
+	HID_KEY_F12		= 69,
+	HID_KEY_SYSRQ		= 70, /* PRINTSCREEN */
+	HID_KEY_SCROLLLOCK	= 71,
+	HID_KEY_PAUSE		= 72,
+	HID_KEY_INSERT		= 73,
+	HID_KEY_HOME		= 74,
+	HID_KEY_PAGEUP		= 75,
+	HID_KEY_DELETE		= 76,
+	HID_KEY_END		= 77,
+	HID_KEY_PAGEDOWN	= 78,
+	HID_KEY_RIGHT		= 79,
+	HID_KEY_LEFT		= 80,
+	HID_KEY_DOWN		= 81,
+	HID_KEY_UP		= 82,
+	HID_KEY_NUMLOCK		= 83,
+	HID_KEY_KPSLASH		= 84, /* NUMPAD DIVIDE */
+	HID_KEY_KPASTERISK	= 85, /* NUMPAD MULTIPLY */
+	HID_KEY_KPMINUS		= 86,
+	HID_KEY_KPPLUS		= 87,
+	HID_KEY_KPENTER		= 88,
+	HID_KEY_KP_1		= 89,
+	HID_KEY_KP_2		= 90,
+	HID_KEY_KP_3		= 91,
+	HID_KEY_KP_4		= 92,
+	HID_KEY_KP_5		= 93,
+	HID_KEY_KP_6		= 94,
+	HID_KEY_KP_7		= 95,
+	HID_KEY_KP_8		= 96,
+	HID_KEY_KP_9		= 97,
+	HID_KEY_KP_0		= 98,
+};
+
+/**
+ * @brief HID keyboard modifiers.
+ */
+enum hid_kbd_modifier {
+	HID_KBD_MODIFIER_NONE		= 0x00,
+	HID_KBD_MODIFIER_LEFT_CTRL	= 0x01,
+	HID_KBD_MODIFIER_LEFT_SHIFT	= 0x02,
+	HID_KBD_MODIFIER_LEFT_ALT	= 0x04,
+	HID_KBD_MODIFIER_LEFT_UI	= 0x08,
+	HID_KBD_MODIFIER_RIGHT_CTRL	= 0x10,
+	HID_KBD_MODIFIER_RIGHT_SHIFT	= 0x20,
+	HID_KBD_MODIFIER_RIGHT_ALT	= 0x40,
+	HID_KBD_MODIFIER_RIGHT_UI	= 0x80,
+};
+
+/**
+ * @brief HID keyboard LEDs.
+ */
+enum hid_kbd_led {
+	HID_KBD_LED_NUM_LOCK	= 0x01,
+	HID_KBD_LED_CAPS_LOCK	= 0x02,
+	HID_KBD_LED_SCROLL_LOCK	= 0x04,
+	HID_KBD_LED_COMPOSE	= 0x08,
+	HID_KBD_LED_KANA	= 0x10,
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _USB_HID_H_ */
diff --git a/components/usb_stack/class/msc/usbd_msc.c b/components/usb_stack/class/msc/usbd_msc.c
new file mode 100644
index 00000000..22d65e64
--- /dev/null
+++ b/components/usb_stack/class/msc/usbd_msc.c
@@ -0,0 +1,874 @@
+/**
+ * @file usbd_msc.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "usbd_core.h"
+#include "usbd_scsi.h"
+#include "usbd_msc.h"
+
+/* max USB packet size */
+#define MASS_STORAGE_BULK_EP_MPS 		64
+#define MASS_STORAGE_BLOCK_SIZE 		512
+
+#define MSD_OUT_EP_IDX 0
+#define MSD_IN_EP_IDX 1
+
+/* Describe EndPoints configuration */
+static usbd_endpoint_t mass_ep_data[2];
+
+/* MSC Bulk-only Stage */
+enum Stage
+{
+	/* MSC Bulk-only Stage */
+	MSC_BS_CBW                  =    0,       /* Command Block Wrapper */
+	MSC_BS_DATA_OUT             =    1,      /* Data Out Phase */
+	MSC_BS_DATA_IN              =    2,       /* Data In Phase */
+	MSC_BS_DATA_IN_LAST         =    3,       /* Data In Last Phase */
+	MSC_BS_DATA_IN_LAST_STALL   =    4,       /* Data In Last Phase with Stall */
+	MSC_BS_CSW                  =    5,       /* Command Status Wrapper */
+	MSC_BS_ERROR                =    6,       /* Error */
+	MSC_BS_RESET                =    7,       /* Bulk-Only Mass Storage Reset */
+};
+
+
+/* Device data structure */
+struct usbd_msc_cfg_private 
+{
+	/* state of the bulk-only state machine */
+	enum Stage stage;
+	struct CBW cbw;
+	struct CSW csw;
+
+	uint8_t   max_lun_count;
+    uint16_t  scsi_blk_size;
+    uint32_t  scsi_blk_nbr;
+
+    uint32_t  scsi_blk_addr;
+    uint32_t  scsi_blk_len;
+	uint8_t   block_buffer[MASS_STORAGE_BLOCK_SIZE];
+
+} usbd_msc_cfg;
+
+
+/*memory OK (after a usbd_msc_memory_verify)*/
+static bool memOK;
+
+static void usbd_msc_reset(void)
+{
+	usbd_msc_cfg.stage = MSC_BS_CBW;
+	(void)memset((void *)&usbd_msc_cfg.cbw, 0, sizeof(struct CBW));
+	(void)memset((void *)&usbd_msc_cfg.csw, 0, sizeof(struct CSW));
+	usbd_msc_cfg.scsi_blk_addr = 0U;
+	usbd_msc_cfg.scsi_blk_len = 0U;
+	usbd_msc_get_cap(0,&usbd_msc_cfg.scsi_blk_nbr,&usbd_msc_cfg.scsi_blk_size);
+	usbd_msc_cfg.max_lun_count = 0;	
+}
+
+/**
+ * @brief Handler called for Class requests not handled by the USB stack.
+ *
+ * @param pSetup    Information about the request to execute.
+ * @param len       Size of the buffer.
+ * @param data      Buffer containing the request result.
+ *
+ * @return  0 on success, negative errno code on fail.
+ */
+static int msc_storage_class_request_handler(struct usb_setup_packet *pSetup, uint8_t **data, uint32_t *len)
+{
+	switch (pSetup->bRequest)
+	{
+	case MSC_REQUEST_RESET:
+		USBD_LOG_DBG("MSC_REQUEST_RESET");
+
+		if (pSetup->wLength)
+		{
+			USBD_LOG_WRN("Invalid length");
+			return -1;
+		}
+
+		usbd_msc_reset();
+		break;
+
+	case MSC_REQUEST_GET_MAX_LUN:
+		USBD_LOG_DBG("MSC_REQUEST_GET_MAX_LUN");
+
+		if (pSetup->wLength != 1)
+		{
+			USBD_LOG_WRN("Invalid length");
+			return -1;
+		}
+
+		*data = (uint8_t *)(&usbd_msc_cfg.max_lun_count);
+		*len = 1;
+		break;
+
+	default:
+		USBD_LOG_WRN("Unknown request 0x%02x, value 0x%02x",
+				pSetup->bRequest, pSetup->wValue);
+		return -1;
+	}
+
+	return 0;
+}
+
+
+static void usbd_msc_send_csw(void)
+{
+	usbd_msc_cfg.csw.Signature = MSC_CSW_Signature;
+	if (usbd_ep_write(mass_ep_data[MSD_IN_EP_IDX].ep_addr, (uint8_t *)&usbd_msc_cfg.csw,
+						sizeof(struct CSW), NULL) != 0)
+	{
+		USBD_LOG_ERR("usb write failure");
+	}
+	usbd_msc_cfg.stage = MSC_BS_CSW;
+}
+
+static bool usbd_msc_datain_check(void)
+{
+	if (!usbd_msc_cfg.cbw.DataLength)
+	{
+		USBD_LOG_WRN("Zero length in CBW");
+    	//SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
+		usbd_msc_cfg.csw.Status = CSW_STATUS_PHASE_ERROR;
+		usbd_msc_send_csw();
+		return false;
+	}
+	if ((usbd_msc_cfg.cbw.Flags & 0x80) == 0)
+	{
+		usbd_ep_set_stall(mass_ep_data[MSD_OUT_EP_IDX].ep_addr);
+		usbd_msc_cfg.csw.Status = CSW_STATUS_PHASE_ERROR;
+		usbd_msc_send_csw();
+		return false;
+	}
+	return true;
+}
+
+static bool usbd_msc_send_to_host(uint8_t *buffer,uint16_t size)
+{
+	if (size >= usbd_msc_cfg.cbw.DataLength)
+	{
+		size = usbd_msc_cfg.cbw.DataLength;
+		usbd_msc_cfg.stage = MSC_BS_DATA_IN_LAST;
+	}
+	else
+	{
+		usbd_msc_cfg.stage = MSC_BS_DATA_IN_LAST_STALL;
+	}
+
+	if (usbd_ep_write(mass_ep_data[MSD_IN_EP_IDX].ep_addr, buffer, size, NULL))
+	{
+		USBD_LOG_ERR("USB write failed");
+		return false;
+	}
+
+	usbd_msc_cfg.csw.DataResidue -= size;
+	usbd_msc_cfg.csw.Status = CSW_STATUS_CMD_PASSED;
+
+	return true;
+}
+
+
+static void usbd_msc_memory_verify(uint8_t *buf, uint16_t size)
+{
+	uint32_t n;
+
+	if ((usbd_msc_cfg.scsi_blk_addr + size) > (usbd_msc_cfg.scsi_blk_nbr * usbd_msc_cfg.scsi_blk_size))
+	{
+		size = usbd_msc_cfg.scsi_blk_nbr * usbd_msc_cfg.scsi_blk_size - usbd_msc_cfg.scsi_blk_addr;
+		usbd_msc_cfg.stage = MSC_BS_ERROR;
+		usbd_ep_set_stall(mass_ep_data[MSD_OUT_EP_IDX].ep_addr);
+		USBD_LOG_WRN("addr overflow,verify error\r\n");
+	}
+
+	/* beginning of a new block -> load a whole block in RAM */
+	if (!(usbd_msc_cfg.scsi_blk_addr % usbd_msc_cfg.scsi_blk_size))
+	{
+		USBD_LOG_DBG("Disk READ sector %d", usbd_msc_cfg.scsi_blk_addr / usbd_msc_cfg.scsi_blk_size);
+		// if (disk_access_read(disk_pdrv, page, addr / BLOCK_SIZE, 1))
+		// {
+		// 	USBD_LOG_ERR("---- Disk Read Error %d", addr / BLOCK_SIZE);
+		// }
+	}
+
+	/* info are in RAM -> no need to re-read memory */
+	for (n = 0U; n < size; n++)
+	{
+		if (usbd_msc_cfg.block_buffer[usbd_msc_cfg.scsi_blk_addr % usbd_msc_cfg.scsi_blk_size + n] != buf[n])
+		{
+			USBD_LOG_DBG("Mismatch sector %d offset %d",
+					usbd_msc_cfg.scsi_blk_addr / usbd_msc_cfg.scsi_blk_size, n);
+			memOK = false;
+			break;
+		}
+	}
+
+	usbd_msc_cfg.scsi_blk_addr += size;
+	usbd_msc_cfg.scsi_blk_len -= size;
+	usbd_msc_cfg.csw.DataResidue -= size;
+
+	if (!usbd_msc_cfg.scsi_blk_len || (usbd_msc_cfg.stage == MSC_BS_CSW))
+	{
+		usbd_msc_cfg.csw.Status = (memOK) ? CSW_STATUS_CMD_PASSED : CSW_STATUS_CMD_FAILED;
+		usbd_msc_send_csw();
+	}
+}
+
+static void usbd_msc_memory_write(uint8_t *buf, uint16_t size)
+{
+
+	USBD_LOG_DBG("w:%d\r\n",usbd_msc_cfg.scsi_blk_addr);
+
+	if ((usbd_msc_cfg.scsi_blk_addr + size) > (usbd_msc_cfg.scsi_blk_nbr * usbd_msc_cfg.scsi_blk_size))
+	{
+		size = usbd_msc_cfg.scsi_blk_nbr * usbd_msc_cfg.scsi_blk_size - usbd_msc_cfg.scsi_blk_addr;
+		usbd_msc_cfg.stage = MSC_BS_ERROR;
+		usbd_ep_set_stall(mass_ep_data[MSD_OUT_EP_IDX].ep_addr);
+		USBD_LOG_WRN("addr overflow,write error\r\n");
+	}
+	/* we fill an array in RAM of 1 block before writing it in memory */
+	for (int i = 0; i < size; i++)
+	{
+		usbd_msc_cfg.block_buffer[usbd_msc_cfg.scsi_blk_addr % usbd_msc_cfg.scsi_blk_size + i] = buf[i];
+	}
+
+	/* if the array is filled, write it in memory */
+	if ((usbd_msc_cfg.scsi_blk_addr % usbd_msc_cfg.scsi_blk_size) + size >= usbd_msc_cfg.scsi_blk_size)
+	{
+		usbd_msc_sector_write((usbd_msc_cfg.scsi_blk_addr/usbd_msc_cfg.scsi_blk_size),usbd_msc_cfg.block_buffer,usbd_msc_cfg.scsi_blk_size);
+	}
+
+	usbd_msc_cfg.scsi_blk_addr += size;
+	usbd_msc_cfg.scsi_blk_len -= size;
+	usbd_msc_cfg.csw.DataResidue -= size;
+
+	if ((!usbd_msc_cfg.scsi_blk_len) || (usbd_msc_cfg.stage == MSC_BS_CSW))
+	{
+		usbd_msc_cfg.csw.Status = CSW_STATUS_CMD_PASSED;
+		usbd_msc_send_csw();
+	}
+}
+
+static void usbd_msc_memory_read(void)
+{
+	uint32_t transfer_len;
+
+	transfer_len = MIN(usbd_msc_cfg.scsi_blk_len, MASS_STORAGE_BULK_EP_MPS);
+
+	/* we read an entire block */
+	if (!(usbd_msc_cfg.scsi_blk_addr % usbd_msc_cfg.scsi_blk_size))
+	{
+		usbd_msc_sector_read((usbd_msc_cfg.scsi_blk_addr/usbd_msc_cfg.scsi_blk_size),usbd_msc_cfg.block_buffer,usbd_msc_cfg.scsi_blk_size);
+	}
+
+	USBD_LOG_DBG("addr:%d\r\n",usbd_msc_cfg.scsi_blk_addr);
+
+	usbd_ep_write(mass_ep_data[MSD_IN_EP_IDX].ep_addr,
+					&usbd_msc_cfg.block_buffer[usbd_msc_cfg.scsi_blk_addr % usbd_msc_cfg.scsi_blk_size], transfer_len, NULL);
+
+	usbd_msc_cfg.scsi_blk_addr += transfer_len;
+	usbd_msc_cfg.scsi_blk_len -= transfer_len;
+	usbd_msc_cfg.csw.DataResidue -= transfer_len;
+
+	if (!usbd_msc_cfg.scsi_blk_len)
+	{
+		usbd_msc_cfg.stage = MSC_BS_DATA_IN_LAST;
+		usbd_msc_cfg.csw.Status = CSW_STATUS_CMD_PASSED;
+
+	}
+}
+
+/*********************************SCSI CMD*******************************************************************/
+static bool scsi_test_unit_ready(void)
+{
+	if (usbd_msc_cfg.cbw.DataLength != 0U)
+	{
+		if ((usbd_msc_cfg.cbw.Flags & 0x80) != 0U)
+		{
+			USBD_LOG_WRN("Stall IN endpoint\r\n");
+			usbd_ep_set_stall(mass_ep_data[MSD_IN_EP_IDX].ep_addr);
+		}
+		else
+		{
+			USBD_LOG_WRN("Stall OUT endpoint\r\n");
+			usbd_ep_set_stall(mass_ep_data[MSD_OUT_EP_IDX].ep_addr);
+		}
+		return false;
+	}
+	usbd_msc_cfg.csw.Status = CSW_STATUS_CMD_PASSED;
+	usbd_msc_send_csw();
+	return true;
+}
+
+static bool scsi_request_sense(void)
+{
+
+	if (!usbd_msc_datain_check())
+	{
+		return false;
+	}
+    scsi_sense_fixed_resp_t sense_rsp =
+    {
+        .response_code = 0x70,
+        .valid         = 1
+    };
+
+    sense_rsp.add_sense_len = sizeof(scsi_sense_fixed_resp_t) - 8;
+    sense_rsp.sense_key           = 0x00;
+    sense_rsp.add_sense_code      = 0x00;
+    sense_rsp.add_sense_qualifier = 0x00;
+
+	/* Win host requests maximum number of bytes but as all we have is 4 bytes we have
+       to tell host back that it is all we have, that's why we correct residue */
+	if (usbd_msc_cfg.csw.DataResidue > sizeof(sense_rsp))
+	{
+		usbd_msc_cfg.cbw.DataLength = sizeof(sense_rsp);
+		usbd_msc_cfg.csw.DataResidue = sizeof(sense_rsp);
+	}
+
+#if 0
+    request_sense[ 2] = 0x06;           /* UNIT ATTENTION */
+    request_sense[12] = 0x28;           /* Additional Sense Code: Not ready to ready transition */
+    request_sense[13] = 0x00;           /* Additional Sense Code Qualifier */
+#endif
+#if 0
+    request_sense[ 2] = 0x02;           /* NOT READY */
+    request_sense[12] = 0x3A;           /* Additional Sense Code: Medium not present */
+    request_sense[13] = 0x00;           /* Additional Sense Code Qualifier */
+#endif
+#if 0
+    request_sense[ 2] = 0x05;         /* ILLEGAL REQUEST */
+    request_sense[12] = 0x20;         /* Additional Sense Code: Invalid command */
+    request_sense[13] = 0x00;         /* Additional Sense Code Qualifier */
+#endif
+#if 0
+    request_sense[ 2] = 0x00;         /* NO SENSE */
+    request_sense[12] = 0x00;         /* Additional Sense Code: No additional code */
+    request_sense[13] = 0x00;         /* Additional Sense Code Qualifier */
+#endif
+
+	return usbd_msc_send_to_host((uint8_t*)&sense_rsp,sizeof(sense_rsp));
+}
+
+static bool scsi_inquiry_request(void)
+{
+	if (!usbd_msc_datain_check())
+	{
+		return false;
+	}
+
+    scsi_inquiry_resp_t inquiry_rsp =
+    {
+        .is_removable         = 1, /* RMB = 1: Removable Medium */
+        .version              = 2,
+        .response_data_format = 2,
+		.additional_length = 31
+    };
+      // vendor_id, product_id, product_rev is space padded string
+    memcpy(inquiry_rsp.vendor_id  , "BL702USB", sizeof(inquiry_rsp.vendor_id));
+    memcpy(inquiry_rsp.product_id , "FAT16 RAM DEMO  ", sizeof(inquiry_rsp.product_id));
+    memcpy(inquiry_rsp.product_rev, "1.0 ", sizeof(inquiry_rsp.product_rev));
+
+	/* Win host requests maximum number of bytes but as all we have is 4 bytes we have
+       to tell host back that it is all we have, that's why we correct residue */
+	if (usbd_msc_cfg.csw.DataResidue > sizeof(inquiry_rsp))
+	{
+		usbd_msc_cfg.cbw.DataLength = sizeof(inquiry_rsp);
+		usbd_msc_cfg.csw.DataResidue = sizeof(inquiry_rsp);
+	}
+
+	return usbd_msc_send_to_host((uint8_t*)&inquiry_rsp,sizeof(inquiry_rsp));
+}
+
+static bool scsi_mode_sense_6(void)
+{
+	if (!usbd_msc_datain_check())
+	{
+		return false;
+	}
+    scsi_mode_sense6_resp_t mode_resp =
+    {
+        .data_len = 3,
+        .medium_type = 0,
+        .write_protected = false,
+        .reserved = 0,
+        .block_descriptor_len = 0  // no block descriptor are included
+    };
+
+	/* Win host requests maximum number of bytes but as all we have is 4 bytes we have
+       to tell host back that it is all we have, that's why we correct residue */
+	if (usbd_msc_cfg.csw.DataResidue > sizeof(mode_resp))
+	{
+		usbd_msc_cfg.cbw.DataLength = sizeof(mode_resp);
+		usbd_msc_cfg.csw.DataResidue = sizeof(mode_resp);
+	}
+
+	return usbd_msc_send_to_host((uint8_t*)&mode_resp,sizeof(mode_resp));
+}
+
+static bool scsi_start_stop_unit(void)
+{
+	// if (!cbw.CB[3]) {               /* If power condition modifier is 0 */
+	//     USBD_MSC_MediaReady  = cbw.CB[4] & 0x01;   /* Media ready = START bit value */
+	//     usbd_msc_start_stop(USBD_MSC_MediaReady);
+	//     cbw.bStatus = CSW_CMD_PASSED; /* Start Stop Unit -> pass */
+	//     USBD_MSC_SetCSW();
+	//     return;
+	// }
+
+	// cbw.bStatus = CSW_CMD_FAILED;   /* Start Stop Unit -> fail */
+	// usbd_msc_send_csw();
+	usbd_msc_cfg.csw.Status = CSW_STATUS_CMD_PASSED;
+	usbd_msc_send_csw();
+	return true;
+}
+/*
+ *  USB Device MSC SCSI Media Removal Callback
+ *    Parameters:      None
+ *    Return Value:    None
+ */
+
+static bool scsi_media_removal(void)
+{
+	// if (USBD_MSC_CBW.CB[4] & 1) {            /* If prevent */
+	//     USBD_MSC_CSW.bStatus = CSW_CMD_FAILED;    /* Prevent media removal -> fail */
+	// } else {                                 /* If allow */
+	//     USBD_MSC_CSW.bStatus = CSW_CMD_PASSED;    /* Allow media removal -> pass */
+	// }
+
+	// USBD_MSC_SetCSW();
+	usbd_msc_cfg.csw.Status = CSW_STATUS_CMD_PASSED;
+	usbd_msc_send_csw();
+	return true;
+}
+
+static bool scsi_read_format_capacity(void)
+{
+	if (!usbd_msc_datain_check())
+	{
+		return false;
+	}
+    scsi_read_format_capacity_resp_t read_fmt_capa =
+    {
+          .list_length     = 8,/* Capacity List Length */
+          .block_num       = 0,
+          .descriptor_type = 2, /* Descriptor Code: Formatted Media */
+          .block_size_u16  = 0
+    };
+	/* Block Count */
+	read_fmt_capa.block_num = BSWAP32(usbd_msc_cfg.scsi_blk_nbr);
+	/* Block Length */
+	read_fmt_capa.block_size_u16 = BSWAP16(usbd_msc_cfg.scsi_blk_size);
+
+	/* Win host requests maximum number of bytes but as all we have is 4 bytes we have
+       to tell host back that it is all we have, that's why we correct residue */
+	if (usbd_msc_cfg.csw.DataResidue > sizeof(read_fmt_capa))
+	{
+		usbd_msc_cfg.cbw.DataLength = sizeof(read_fmt_capa);
+		usbd_msc_cfg.csw.DataResidue = sizeof(read_fmt_capa);
+	}
+
+	return usbd_msc_send_to_host((uint8_t*)&read_fmt_capa,sizeof(read_fmt_capa));
+}
+
+static bool scsi_read_capacity(void)
+{
+	if (!usbd_msc_datain_check())
+	{
+		return false;
+	}
+	scsi_read_capacity10_resp_t read_capa10;
+	/* Last Logical Block */
+	read_capa10.last_lba = BSWAP32((usbd_msc_cfg.scsi_blk_nbr-1));
+	/* Block Length */
+	read_capa10.block_size = BSWAP32(usbd_msc_cfg.scsi_blk_size);
+
+	/* Win host requests maximum number of bytes but as all we have is 4 bytes we have
+       to tell host back that it is all we have, that's why we correct residue */
+	if (usbd_msc_cfg.csw.DataResidue > sizeof(read_capa10))
+	{
+		usbd_msc_cfg.cbw.DataLength = sizeof(read_capa10);
+		usbd_msc_cfg.csw.DataResidue = sizeof(read_capa10);
+	}
+
+	return usbd_msc_send_to_host((uint8_t*)&read_capa10,sizeof(read_capa10));
+}
+
+static bool usbd_msc_read_write_process(void)
+{
+	/* Logical Block Address of First Block */
+	uint32_t lba;
+	uint32_t len = 0;	
+
+	if (!usbd_msc_cfg.cbw.DataLength)
+	{
+		USBD_LOG_WRN("Zero length in CBW\r\n");
+    	//SCSI_SenseCode(pdev, hmsc->cbw.bLUN, ILLEGAL_REQUEST, INVALID_CDB);
+		usbd_msc_cfg.csw.Status = CSW_STATUS_PHASE_ERROR;
+		usbd_msc_send_csw();
+		return false;
+	}
+
+	lba = GET_BE32(&usbd_msc_cfg.cbw.CB[2]);
+
+	USBD_LOG_DBG("LBA (block) : 0x%x\r\n", lba);
+	usbd_msc_cfg.scsi_blk_addr = lba * usbd_msc_cfg.scsi_blk_size;
+	/* Number of Blocks to transfer */
+	switch (usbd_msc_cfg.cbw.CB[0])
+	{
+	case SCSI_READ10:		
+	case SCSI_WRITE10:
+	case SCSI_VERIFY10:
+		len = GET_BE16(&usbd_msc_cfg.cbw.CB[7]);
+		break;
+	case SCSI_READ12:		
+	case SCSI_WRITE12:
+		len = GET_BE32(&usbd_msc_cfg.cbw.CB[6]);
+		break;
+	default:
+		break;
+	}
+	USBD_LOG_DBG("len (block) : 0x%x\r\n", len);
+	usbd_msc_cfg.scsi_blk_len = len * usbd_msc_cfg.scsi_blk_size;
+
+	if ((lba + len) > usbd_msc_cfg.scsi_blk_nbr)
+	{
+		USBD_LOG_ERR("LBA out of range\r\n");
+		usbd_msc_cfg.csw.Status = CSW_STATUS_CMD_FAILED;
+		usbd_msc_send_csw();
+		return false;
+	}
+
+	if (usbd_msc_cfg.cbw.DataLength != usbd_msc_cfg.scsi_blk_len)
+	{
+		if ((usbd_msc_cfg.cbw.Flags & 0x80) != 0U)
+		{
+			USBD_LOG_WRN("read write process error\r\n");
+			usbd_ep_set_stall(mass_ep_data[MSD_IN_EP_IDX].ep_addr);
+		}
+		else
+		{
+			USBD_LOG_WRN("read write process error\r\n");
+			usbd_ep_set_stall(mass_ep_data[MSD_OUT_EP_IDX].ep_addr);
+		}
+
+		usbd_msc_cfg.csw.Status = CSW_STATUS_CMD_FAILED;
+		usbd_msc_send_csw();
+		return false;
+	}
+	return true;
+}
+
+static bool scsi_mode_sense_10(void)
+{
+	if (!usbd_msc_datain_check())
+	{
+		return false;
+	}
+	scsi_mode_10_resp_t mode10_resp = 
+	{
+		.mode_data_length_low = 0x06,
+		.write_protect = 1,
+	};
+	/* Win host requests maximum number of bytes but as all we have is 4 bytes we have
+       to tell host back that it is all we have, that's why we correct residue */
+	if (usbd_msc_cfg.csw.DataResidue > sizeof(mode10_resp))
+	{
+		usbd_msc_cfg.cbw.DataLength = sizeof(mode10_resp);
+		usbd_msc_cfg.csw.DataResidue = sizeof(mode10_resp);
+	}
+	return usbd_msc_send_to_host((uint8_t*)&mode10_resp,sizeof(mode10_resp));
+}
+
+static void usbd_msc_cbw_decode(uint8_t *buf, uint16_t size)
+{
+	if (size != sizeof(usbd_msc_cfg.cbw))
+	{
+		USBD_LOG_ERR("size != sizeof(cbw)");
+		return;
+	}
+
+	memcpy((uint8_t *)&usbd_msc_cfg.cbw, buf, size);
+	if (usbd_msc_cfg.cbw.Signature != MSC_CBW_Signature)
+	{
+		USBD_LOG_ERR("CBW Signature Mismatch");
+		return;
+	}
+
+	usbd_msc_cfg.csw.Tag = usbd_msc_cfg.cbw.Tag;
+	usbd_msc_cfg.csw.DataResidue = usbd_msc_cfg.cbw.DataLength;
+
+	if ((usbd_msc_cfg.cbw.CBLength < 1) || (usbd_msc_cfg.cbw.CBLength > 16) || (usbd_msc_cfg.cbw.LUN != 0U))
+	{
+		USBD_LOG_WRN("cbw.CBLength %d", usbd_msc_cfg.cbw.CBLength);
+		/* Stall data stage */
+		usbd_ep_set_stall(mass_ep_data[MSD_IN_EP_IDX].ep_addr);
+		usbd_msc_cfg.csw.Status = CSW_STATUS_CMD_FAILED;
+		usbd_msc_send_csw();
+	}
+	else
+	{
+		switch (usbd_msc_cfg.cbw.CB[0])
+		{
+		case SCSI_TEST_UNIT_READY:
+			USBD_LOG_DBG(">> TUR");
+			scsi_test_unit_ready();
+			break;
+		case SCSI_REQUEST_SENSE:
+			USBD_LOG_DBG(">> REQ_SENSE");
+			scsi_request_sense();
+			break;
+		case SCSI_INQUIRY:
+			USBD_LOG_DBG(">> INQ");
+			scsi_inquiry_request();
+			break;
+		case SCSI_START_STOP_UNIT:
+			scsi_start_stop_unit();
+			break;
+		case SCSI_MEDIA_REMOVAL:
+			scsi_media_removal();
+			break;
+		case SCSI_MODE_SENSE6:
+			USBD_LOG_DBG(">> MODE_SENSE6");
+			scsi_mode_sense_6();
+			break;
+		case SCSI_MODE_SENSE10:
+			USBD_LOG_DBG(">> MODE_SENSE10");
+			scsi_mode_sense_10();
+			break;
+		case SCSI_READ_FORMAT_CAPACITIES:
+			USBD_LOG_DBG(">> READ_FORMAT_CAPACITY");
+			scsi_read_format_capacity();
+			break;
+		case SCSI_READ_CAPACITY:
+			USBD_LOG_DBG(">> READ_CAPACITY");
+			scsi_read_capacity();
+			break;
+		case SCSI_READ10:
+		case SCSI_READ12:
+			USBD_LOG_DBG(">> READ");
+			if (usbd_msc_read_write_process())
+			{
+				if ((usbd_msc_cfg.cbw.Flags & 0x80))
+				{
+					usbd_msc_cfg.stage = MSC_BS_DATA_IN;
+					usbd_msc_memory_read();
+				}
+				else
+				{
+					usbd_ep_set_stall(
+						mass_ep_data[MSD_OUT_EP_IDX].ep_addr);
+					USBD_LOG_WRN("Stall OUT endpoint");
+					usbd_msc_cfg.csw.Status = CSW_STATUS_PHASE_ERROR;
+					usbd_msc_send_csw();
+				}
+			}
+			break;
+		case SCSI_WRITE10:
+		case SCSI_WRITE12:
+			USBD_LOG_DBG(">> WRITE");
+			if (usbd_msc_read_write_process())
+			{
+				if (!(usbd_msc_cfg.cbw.Flags & 0x80))
+				{
+					usbd_msc_cfg.stage = MSC_BS_DATA_OUT;
+				}
+				else
+				{
+					usbd_ep_set_stall(
+						mass_ep_data[MSD_IN_EP_IDX].ep_addr);
+					USBD_LOG_WRN("Stall IN endpoint");
+					usbd_msc_cfg.csw.Status = CSW_STATUS_PHASE_ERROR;
+					usbd_msc_send_csw();
+				}
+			}
+			break;
+		case SCSI_VERIFY10:
+			USBD_LOG_DBG(">> VERIFY10");
+			if (!(usbd_msc_cfg.cbw.CB[1] & 0x02))
+			{
+				usbd_msc_cfg.csw.Status = CSW_STATUS_CMD_PASSED;
+				usbd_msc_send_csw();
+				break;
+			}
+			if (usbd_msc_read_write_process())
+			{
+				if (!(usbd_msc_cfg.cbw.Flags & 0x80))
+				{
+					usbd_msc_cfg.stage = MSC_BS_DATA_OUT;
+					memOK = true;
+				}
+				else
+				{
+					usbd_ep_set_stall(
+						mass_ep_data[MSD_IN_EP_IDX].ep_addr);
+					USBD_LOG_WRN("Stall IN endpoint");
+					usbd_msc_cfg.csw.Status = CSW_STATUS_PHASE_ERROR;
+					usbd_msc_send_csw();
+				}
+			}
+			break;
+		default:
+			USBD_LOG_WRN(">> default CB[0] %x", usbd_msc_cfg.cbw.CB[0]);
+			/* Stall data stage */
+			usbd_ep_set_stall(mass_ep_data[MSD_IN_EP_IDX].ep_addr);
+			usbd_msc_cfg.stage = MSC_BS_ERROR;
+			break;
+		}
+	}
+}
+
+static void mass_storage_bulk_out(uint8_t ep)
+{
+	uint32_t bytes_read = 0U;
+	uint8_t bo_buf[MASS_STORAGE_BULK_EP_MPS];
+
+	usbd_ep_read(ep, bo_buf, MASS_STORAGE_BULK_EP_MPS,
+						&bytes_read);
+
+	switch (usbd_msc_cfg.stage)
+	{
+	/*the device has to decode the CBW received*/
+	case MSC_BS_CBW:
+		USBD_LOG_DBG("> BO - MSC_BS_CBW\r\n");
+		usbd_msc_cbw_decode(bo_buf, bytes_read);
+		break;
+
+	/*the device has to receive data from the host*/
+	case MSC_BS_DATA_OUT:
+		switch (usbd_msc_cfg.cbw.CB[0])
+		{
+		case SCSI_WRITE10:
+		case SCSI_WRITE12:
+			/* USBD_LOG_DBG("> BO - PROC_CBW WR");*/
+			usbd_msc_memory_write(bo_buf, bytes_read);
+			break;
+		case SCSI_VERIFY10:
+			USBD_LOG_DBG("> BO - PROC_CBW VER\r\n");
+			usbd_msc_memory_verify(bo_buf, bytes_read);
+			break;
+		default:
+			USBD_LOG_ERR("> BO - PROC_CBW default <>\r\n");
+			break;
+		}
+		break;
+    case MSC_BS_CSW:
+		break;	
+	/*an error has occurred: stall endpoint and send CSW*/
+	default:
+		USBD_LOG_WRN("Stall OUT endpoint, stage: %d\r\n", usbd_msc_cfg.stage);
+		// usbd_ep_set_stall(ep);
+		// usbd_msc_cfg.csw.Status = CSW_STATUS_PHASE_ERROR;
+		// usbd_msc_send_csw();
+		break;
+	}
+	/*set ep ack to recv next data*/
+	usbd_ep_read(ep,NULL,0,NULL);
+}
+
+/**
+ * @brief EP Bulk IN handler, used to send data to the Host
+ *
+ * @param ep        Endpoint address.
+ * @param ep_status Endpoint status code.
+ *
+ * @return  N/A.
+ */
+static void mass_storage_bulk_in(uint8_t ep)
+{
+	USBD_LOG_DBG("I:%d\r\n", usbd_msc_cfg.stage);
+	switch (usbd_msc_cfg.stage)
+	{
+	/*the device has to send data to the host*/
+	case MSC_BS_DATA_IN:
+		switch (usbd_msc_cfg.cbw.CB[0])
+		{
+		case SCSI_READ10:
+		case SCSI_READ12:
+			/* USBD_LOG_DBG("< BI - PROC_CBW  READ"); */
+			usbd_msc_memory_read();
+			break;
+		default:
+			USBD_LOG_ERR("< BI-PROC_CBW default <>\r\n");
+			break;
+		}
+		break;
+
+	/*the device has to send a CSW*/
+	case MSC_BS_DATA_IN_LAST:
+		USBD_LOG_DBG("< BI - MSC_BS_DATA_IN_LAST\r\n");
+		usbd_msc_send_csw();
+		break;
+		
+    case MSC_BS_DATA_IN_LAST_STALL:
+		USBD_LOG_WRN("Stall IN endpoint, stage: %d\r\n", usbd_msc_cfg.stage);
+		//usbd_ep_set_stall(mass_ep_data[MSD_IN_EP_IDX].ep_addr);
+		usbd_msc_send_csw();
+        break;
+
+	/*the host has received the CSW -> we wait a CBW*/
+	case MSC_BS_CSW:
+		USBD_LOG_DBG("< BI - MSC_BS_CSW\r\n");
+		usbd_msc_cfg.stage = MSC_BS_CBW;
+		break;
+
+	default:
+		break;
+	}
+}
+
+void msc_storage_notify_handler(uint8_t event, void* arg)
+{
+	switch (event)
+	{
+	case USB_EVENT_RESET:
+		usbd_msc_reset();
+		break;
+	
+	default:
+		break;
+	}	
+}
+
+
+static usbd_class_t msc_class;
+
+static usbd_interface_t msc_intf =
+{
+	.class_handler = msc_storage_class_request_handler,
+	.vendor_handler = NULL,
+	.notify_handler = msc_storage_notify_handler,
+};
+
+void usbd_msc_class_init(uint8_t out_ep, uint8_t in_ep)
+{
+	msc_class.name = "usbd_msc";
+
+	usbd_class_register(&msc_class);
+	usbd_class_add_interface(&msc_class,&msc_intf);
+
+	mass_ep_data[0].ep_addr = out_ep;
+	mass_ep_data[0].ep_cb = mass_storage_bulk_out;
+	mass_ep_data[1].ep_addr = in_ep;
+	mass_ep_data[1].ep_cb = mass_storage_bulk_in;
+
+ 	usbd_interface_add_endpoint(&msc_intf,&mass_ep_data[0]);
+	usbd_interface_add_endpoint(&msc_intf,&mass_ep_data[1]); 
+}
\ No newline at end of file
diff --git a/components/usb_stack/class/msc/usbd_msc.h b/components/usb_stack/class/msc/usbd_msc.h
new file mode 100644
index 00000000..50b55f9c
--- /dev/null
+++ b/components/usb_stack/class/msc/usbd_msc.h
@@ -0,0 +1,96 @@
+/**
+ * @file
+ * @brief USB Mass Storage Class public header
+ *
+ * Header follows the Mass Storage Class Specification
+ * (Mass_Storage_Specification_Overview_v1.4_2-19-2010.pdf) and
+ * Mass Storage Class Bulk-Only Transport Specification
+ * (usbmassbulk_10.pdf).
+ * Header is limited to Bulk-Only Transfer protocol.
+ */
+
+#ifndef _USBD_MSC_H__
+#define _USBD_MSC_H__
+
+/* MSC Subclass Codes */
+#define MSC_SUBCLASS_RBC                0x01
+#define MSC_SUBCLASS_SFF8020I_MMC2      0x02
+#define MSC_SUBCLASS_QIC157             0x03
+#define MSC_SUBCLASS_UFI                0x04
+#define MSC_SUBCLASS_SFF8070I           0x05
+#define MSC_SUBCLASS_SCSI               0x06
+
+/* MSC Protocol Codes */
+#define MSC_PROTOCOL_CBI_INT            0x00
+#define MSC_PROTOCOL_CBI_NOINT          0x01
+#define MSC_PROTOCOL_BULK_ONLY          0x50
+
+
+/* MSC Request Codes */
+#define MSC_REQUEST_RESET               0xFF
+#define MSC_REQUEST_GET_MAX_LUN         0xFE
+
+/** MSC Command Block Wrapper (CBW) Signature */
+#define MSC_CBW_Signature               0x43425355
+/** Bulk-only Command Status Wrapper (CSW) Signature */
+#define MSC_CSW_Signature               0x53425355
+
+/** MSC Command Block Status Values */
+#define CSW_STATUS_CMD_PASSED		0x00
+#define CSW_STATUS_CMD_FAILED		0x01
+#define CSW_STATUS_PHASE_ERROR		0x02
+
+/** MSC Bulk-Only Command Block Wrapper (CBW) */
+struct CBW {
+	uint32_t Signature;
+	uint32_t Tag;
+	uint32_t DataLength;
+	uint8_t  Flags;
+	uint8_t  LUN;
+	uint8_t  CBLength;
+	uint8_t  CB[16];
+} __packed;
+
+/** MSC Bulk-Only Command Status Wrapper (CSW) */
+struct CSW {
+	uint32_t Signature;
+	uint32_t Tag;
+	uint32_t DataResidue;
+	uint8_t  Status;
+} __packed;
+
+/*Length of template descriptor: 23 bytes*/
+#define MSC_DESCRIPTOR_LEN  (9 + 7 + 7)
+
+#define MSC_DESCRIPTOR_INIT(bFirstInterface,out_ep,in_ep,str_idx) \
+    /* Interface */\
+    0x09,                          /* bLength */\
+    USB_DESCRIPTOR_TYPE_INTERFACE, /* bDescriptorType */\
+    bFirstInterface,               /* bInterfaceNumber */\
+    0x00,                          /* bAlternateSetting */\
+    0x02,                          /* bNumEndpoints */\
+    USB_DEVICE_CLASS_MASS_STORAGE, /* bInterfaceClass */\
+    MSC_SUBCLASS_SCSI,             /* bInterfaceSubClass */\
+    MSC_PROTOCOL_BULK_ONLY,        /* bInterfaceProtocol */\
+    str_idx,                       /* iInterface */\
+    /* Endpoint Out */\
+    0x07,                          /* bLength */\
+    USB_DESCRIPTOR_TYPE_ENDPOINT,  /* bDescriptorType */\
+    out_ep,                        /* bEndpointAddress */\
+    0x02,                          /* bmAttributes */\
+    0x40, 0x00,                    /* wMaxPacketSize */\
+    0x01,                          /* bInterval */\
+    /* Endpoint In */\
+    0x07,                          /* bLength */\
+    USB_DESCRIPTOR_TYPE_ENDPOINT,  /* bDescriptorType */\
+    in_ep,                         /* bEndpointAddress */\
+    0x02,                          /* bmAttributes */\
+    0x40, 0x00,                    /* wMaxPacketSize */\
+    0x01                           /* bInterval */            
+
+
+void usbd_msc_class_init(uint8_t out_ep, uint8_t in_ep);
+void usbd_msc_get_cap(uint8_t lun, uint32_t *block_num, uint16_t *block_size);
+int usbd_msc_sector_read(uint32_t sector,uint8_t* buffer,uint32_t length);
+int usbd_msc_sector_write(uint32_t sector,uint8_t* buffer,uint32_t length);
+#endif /* USB_MSC_H_ */
diff --git a/components/usb_stack/class/msc/usbd_scsi.h b/components/usb_stack/class/msc/usbd_scsi.h
new file mode 100644
index 00000000..1e1c1c72
--- /dev/null
+++ b/components/usb_stack/class/msc/usbd_scsi.h
@@ -0,0 +1,314 @@
+/**
+ * @file
+ * @brief USB Mass Storage Class SCSI public header
+ *
+ * Header follows the Mass Storage Class Specification
+ * (Mass_Storage_Specification_Overview_v1.4_2-19-2010.pdf) and
+ * Mass Storage Class Bulk-Only Transport Specification
+ * (usbmassbulk_10.pdf).
+ * Header is limited to Bulk-Only Transfer protocol.
+ */
+
+#ifndef _USBD_SCSI_H_
+#define _USBD_SCSI_H_
+
+/* SCSI Commands */
+#define SCSI_TEST_UNIT_READY            0x00
+#define SCSI_REQUEST_SENSE              0x03
+#define SCSI_FORMAT_UNIT                0x04
+#define SCSI_INQUIRY                    0x12
+#define SCSI_MODE_SELECT6               0x15
+#define SCSI_MODE_SENSE6                0x1A
+#define SCSI_START_STOP_UNIT            0x1B
+#define SCSI_SEND_DIAGNOSTIC            0x1D
+#define SCSI_MEDIA_REMOVAL              0x1E
+#define SCSI_READ_FORMAT_CAPACITIES     0x23
+#define SCSI_READ_CAPACITY              0x25
+#define SCSI_READ10                     0x28
+#define SCSI_WRITE10                    0x2A
+#define SCSI_VERIFY10                   0x2F
+#define SCSI_SYNC_CACHE10               0x35
+#define SCSI_READ12                     0xA8
+#define SCSI_WRITE12                    0xAA
+#define SCSI_MODE_SELECT10              0x55
+#define SCSI_MODE_SENSE10               0x5A
+#define SCSI_ATA_COMMAND_PASS_THROUGH16 0x85
+#define SCSI_READ16                     0x88
+#define SCSI_WRITE16                    0x8A
+#define SCSI_VERIFY16                   0x8F
+#define SCSI_SYNC_CACHE16               0x91
+#define SCSI_SERVICE_ACTION_IN16        0x9E
+#define SCSI_READ_CAPACITY16            0x9E
+#define SCSI_SERVICE_ACTION_OUT16       0x9F
+#define SCSI_ATA_COMMAND_PASS_THROUGH12 0xA1
+#define SCSI_REPORT_ID_INFO             0xA3
+#define SCSI_READ12                     0xA8
+#define SCSI_SERVICE_ACTION_OUT12       0xA9
+#define SCSI_SERVICE_ACTION_IN12        0xAB
+#define SCSI_VERIFY12                   0xAF
+
+/* SCSI Sense Key */
+#define SCSI_SENSE_NONE             0x00
+#define SCSI_SENSE_RECOVERED_ERROR  0x01
+#define SCSI_SENSE_NOT_READY        0x02
+#define SCSI_SENSE_MEDIUM_ERROR     0x03
+#define SCSI_SENSE_HARDWARE_ERROR   0x04
+#define SCSI_SENSE_ILLEGAL_REQUEST  0x05
+#define SCSI_SENSE_UNIT_ATTENTION   0x06
+#define SCSI_SENSE_DATA_PROTECT     0x07
+#define SCSI_SENSE_FIRMWARE_ERROR   0x08
+#define SCSI_SENSE_ABORTED_COMMAND  0x0b
+#define SCSI_SENSE_EQUAL            0x0c
+#define SCSI_SENSE_VOLUME_OVERFLOW  0x0d
+#define SCSI_SENSE_MISCOMPARE       0x0e
+
+
+//--------------------------------------------------------------------+
+// SCSI Primary Command (SPC-4)
+//--------------------------------------------------------------------+
+
+/// SCSI Test Unit Ready Command
+typedef struct __packed
+{
+  uint8_t cmd_code    ; ///< SCSI OpCode for \ref SCSI_CMD_TEST_UNIT_READY
+  uint8_t lun         ; ///< Logical Unit
+  uint8_t reserved[3] ;
+  uint8_t control     ;
+} scsi_test_unit_ready_cmd_t;
+
+/// SCSI Inquiry Command
+typedef struct __packed
+{
+  uint8_t cmd_code     ; ///< SCSI OpCode for \ref SCSI_CMD_INQUIRY
+  uint8_t reserved1    ;
+  uint8_t page_code    ;
+  uint8_t reserved2    ;
+  uint8_t alloc_length ; ///< specifies the maximum number of bytes that USB host has allocated in the Data-In Buffer. An allocation length of zero specifies that no data shall be transferred.
+  uint8_t control      ;
+} scsi_inquiry_cmd_t, scsi_request_sense_cmd_t;
+
+/// SCSI Inquiry Response Data
+typedef struct __packed
+{
+  uint8_t peripheral_device_type     : 5;
+  uint8_t peripheral_qualifier       : 3;
+
+  uint8_t                            : 7;
+  uint8_t is_removable               : 1;
+
+  uint8_t version;
+
+  uint8_t response_data_format       : 4;
+  uint8_t hierarchical_support       : 1;
+  uint8_t normal_aca                 : 1;
+  uint8_t                            : 2;
+
+  uint8_t additional_length;
+
+  uint8_t protect                    : 1;
+  uint8_t                            : 2;
+  uint8_t third_party_copy           : 1;
+  uint8_t target_port_group_support  : 2;
+  uint8_t access_control_coordinator : 1;
+  uint8_t scc_support                : 1;
+
+  uint8_t addr16                     : 1;
+  uint8_t                            : 3;
+  uint8_t multi_port                 : 1;
+  uint8_t                            : 1; // vendor specific
+  uint8_t enclosure_service          : 1;
+  uint8_t                            : 1;
+
+  uint8_t                            : 1; // vendor specific
+  uint8_t cmd_que                    : 1;
+  uint8_t                            : 2;
+  uint8_t sync                       : 1;
+  uint8_t wbus16                     : 1;
+  uint8_t                            : 2;
+
+  uint8_t vendor_id[8]  ; ///< 8 bytes of ASCII data identifying the vendor of the product.
+  uint8_t product_id[16]; ///< 16 bytes of ASCII data defined by the vendor.
+  uint8_t product_rev[4]; ///< 4 bytes of ASCII data defined by the vendor.
+} scsi_inquiry_resp_t;
+
+typedef struct __packed
+{
+  uint8_t response_code : 7; ///< 70h - current errors, Fixed Format 71h - deferred errors, Fixed Format
+  uint8_t valid         : 1;
+
+  uint8_t reserved;
+
+  uint8_t sense_key     : 4;
+  uint8_t               : 1;
+  uint8_t ili           : 1; ///< Incorrect length indicator
+  uint8_t end_of_medium : 1;
+  uint8_t filemark      : 1;
+
+  uint32_t information;
+  uint8_t  add_sense_len;
+  uint32_t command_specific_info;
+  uint8_t  add_sense_code;
+  uint8_t  add_sense_qualifier;
+  uint8_t  field_replaceable_unit_code;
+
+  uint8_t  sense_key_specific[3]; ///< sense key specific valid bit is bit 7 of key[0], aka MSB in Big Endian layout
+
+} scsi_sense_fixed_resp_t;
+
+typedef struct __packed
+{
+  uint8_t cmd_code     ; ///< SCSI OpCode for \ref SCSI_CMD_MODE_SENSE_6
+
+  uint8_t : 3;
+  uint8_t disable_block_descriptor : 1;
+  uint8_t : 4;
+
+  uint8_t page_code : 6;
+  uint8_t page_control : 2;
+
+  uint8_t subpage_code;
+  uint8_t alloc_length;
+  uint8_t control;
+} scsi_mode_sense6_cmd_t;
+
+// This is only a Mode parameter header(6).
+typedef struct __packed
+{
+  uint8_t data_len;
+  uint8_t medium_type;
+
+  uint8_t reserved : 7;
+  bool write_protected : 1;
+
+  uint8_t block_descriptor_len;
+} scsi_mode_sense6_resp_t;
+
+typedef struct 
+{
+  uint8_t cmd_code;
+
+  uint8_t reserved1:3;
+  uint8_t disable_block_descriptor: 1;
+  uint8_t long_LBA:1;
+  uint8_t reserved2:3;
+
+  uint8_t page_code:6;
+  uint8_t page_control:2;
+
+  uint8_t subpage_code;
+
+  uint8_t reserved3;
+  uint8_t reserved4;
+  uint8_t reserved5;
+
+  uint8_t length[2];
+
+  uint8_t control;
+}scsi_mode_sense_10_cmd_t;
+
+typedef struct 
+{
+  uint8_t mode_data_length_high;
+  uint8_t mode_data_length_low;
+  uint8_t medium_type;
+
+  uint8_t reserved1:4;
+  uint8_t DPO_FUA:1;     /**< [Disable Page Out] and [Force Unit Access] in the SCSI_READ10 command is valid or not */
+  uint8_t reserved2:2;
+  uint8_t write_protect:1;
+
+  uint8_t long_LBA:1;
+  uint8_t reserved3:7;
+
+  uint8_t reserved4;
+  uint8_t block_desc_length[2];
+}scsi_mode_10_resp_t;
+
+typedef struct __packed
+{
+  uint8_t cmd_code; ///< SCSI OpCode for \ref SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL
+  uint8_t reserved[3];
+  uint8_t prohibit_removal;
+  uint8_t control;
+} scsi_prevent_allow_medium_removal_t;
+
+typedef struct __packed
+{
+  uint8_t cmd_code;
+
+  uint8_t immded : 1;
+  uint8_t        : 7;
+
+  uint8_t TU_RESERVED;
+
+  uint8_t power_condition_mod : 4;
+  uint8_t                     : 4;
+
+  uint8_t start           : 1;
+  uint8_t load_eject      : 1;
+  uint8_t no_flush        : 1;
+  uint8_t                 : 1;
+  uint8_t power_condition : 4;
+
+  uint8_t control;
+} scsi_start_stop_unit_cmd_t;
+
+//--------------------------------------------------------------------+
+// SCSI MMC
+//--------------------------------------------------------------------+
+/// SCSI Read Format Capacity: Write Capacity
+typedef struct __packed
+{
+  uint8_t cmd_code;
+  uint8_t reserved[6];
+  uint16_t alloc_length;
+  uint8_t control;
+} scsi_read_format_capacity_cmd_t;
+
+
+typedef struct __packed{
+  uint8_t reserved[3];
+  uint8_t list_length; /// must be 8*n, length in bytes of formattable capacity descriptor followed it.
+
+  uint32_t block_num; /// Number of Logical Blocks
+  uint8_t  descriptor_type; // 00: reserved, 01 unformatted media , 10 Formatted media, 11 No media present
+
+  uint8_t  reserved2;
+  uint16_t block_size_u16;
+
+} scsi_read_format_capacity_resp_t;
+
+//--------------------------------------------------------------------+
+// SCSI Block Command (SBC-3)
+// NOTE: All data in SCSI command are in Big Endian
+//--------------------------------------------------------------------+
+
+/// SCSI Read Capacity 10 Command: Read Capacity
+typedef struct __packed
+{
+  uint8_t  cmd_code                 ; ///< SCSI OpCode for \ref SCSI_CMD_READ_CAPACITY_10
+  uint8_t  reserved1                ;
+  uint32_t lba                      ; ///< The first Logical Block Address (LBA) accessed by this command
+  uint16_t reserved2                ;
+  uint8_t  partial_medium_indicator ;
+  uint8_t  control                  ;
+} scsi_read_capacity10_cmd_t;
+
+/// SCSI Read Capacity 10 Response Data
+typedef struct {
+  uint32_t last_lba   ; ///< The last Logical Block Address of the device
+  uint32_t block_size ; ///< Block size in bytes
+} scsi_read_capacity10_resp_t;
+
+/// SCSI Read 10 Command
+typedef struct __packed
+{
+  uint8_t  cmd_code    ; ///< SCSI OpCode
+  uint8_t  reserved    ; // has LUN according to wiki
+  uint32_t lba         ; ///< The first Logical Block Address (LBA) accessed by this command
+  uint8_t  reserved2   ;
+  uint16_t block_count ; ///< Number of Blocks used by this command
+  uint8_t  control     ;
+} scsi_read10_t, scsi_write10_t,scsi_read_write_10_t;
+
+#endif /* ZEPHYR_INCLUDE_USB_CLASS_USB_CDC_H_ */
diff --git a/components/usb_stack/class/video/usbd_video.c b/components/usb_stack/class/video/usbd_video.c
new file mode 100644
index 00000000..43202f8d
--- /dev/null
+++ b/components/usb_stack/class/video/usbd_video.c
@@ -0,0 +1,190 @@
+/**
+ * @file usbd_video.c
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "usbd_core.h"
+#include "usbd_video.h"
+
+#define WIDTH                                         (unsigned int)320
+#define HEIGHT                                        (unsigned int)240
+#define VIDEO_PACKET_SIZE                             (unsigned int)(768+2)
+
+#define CAM_FPS                                       20
+#define INTERVAL                                      (unsigned long)(10000000/CAM_FPS)
+#define MIN_BIT_RATE                                  (unsigned long)(WIDTH*HEIGHT*16*CAM_FPS)//16 bit
+#define MAX_BIT_RATE                                  (unsigned long)(WIDTH*HEIGHT*16*CAM_FPS)
+#define MAX_FRAME_SIZE                                (unsigned long)(WIDTH * HEIGHT *2)
+
+struct video_probe_and_commit_controls probe =
+{
+    .hintUnion.bmHint = 0,
+    .hintUnion1.bmHint = 0,
+    .bFormatIndex = 1,
+    .bFrameIndex = 1,
+    .dwFrameInterval = INTERVAL,
+    .wKeyFrameRate = 0,
+    .wPFrameRate = 0,
+    .wCompQuality = 0,
+    .wCompWindowSize = 0,
+    .wDelay = 0,
+    .dwMaxVideoFrameSize = MAX_FRAME_SIZE,
+    .dwMaxPayloadTransferSize = 0,
+    .dwClockFrequency = 0,
+    .bmFramingInfo = 0,
+    .bPreferedVersion = 0,
+    .bMinVersion = 0,
+    .bMaxVersion = 0,
+};
+struct video_probe_and_commit_controls commit =
+{
+    .hintUnion.bmHint = 0,
+    .hintUnion1.bmHint = 0,
+    .bFormatIndex = 1,
+    .bFrameIndex = 1,
+    .dwFrameInterval = INTERVAL,
+    .wKeyFrameRate = 0,
+    .wPFrameRate = 0,
+    .wCompQuality = 0,
+    .wCompWindowSize = 0,
+    .wDelay = 0,
+    .dwMaxVideoFrameSize = MAX_FRAME_SIZE,
+    .dwMaxPayloadTransferSize = 0,
+    .dwClockFrequency = 0,
+    .bmFramingInfo = 0,
+    .bPreferedVersion = 0,
+    .bMinVersion = 0,
+    .bMaxVersion = 0,
+};
+
+int video_class_request_handler(struct usb_setup_packet *setup, uint8_t **data, uint32_t *len)
+{
+    USBD_LOG_DBG("Class request:"
+                 "bRequest 0x%02x, bmRequestType 0x%02x len %d",
+                 setup->bRequest, setup->bmRequestType, *len);
+
+    switch (setup->bRequest)
+    {
+        case VIDEO_REQUEST_SET_CUR:
+            if (setup->wValue == 256)
+                memcpy((uint8_t *)&probe,*data,setup->wLength);
+            else if (setup->wValue == 512)
+                memcpy((uint8_t *)&commit,*data,setup->wLength);
+            break;
+        case VIDEO_REQUEST_GET_CUR:
+            if (setup->wValue == 256)
+                *data = (uint8_t *)&probe;
+            else if (setup->wValue == 512)
+                *data = (uint8_t *)&commit;
+            break;
+        case VIDEO_REQUEST_GET_MIN:
+            if (setup->wValue == 256)
+                *data = (uint8_t *)&probe;
+            else if (setup->wValue == 512)
+                *data = (uint8_t *)&commit;
+            break;
+        case VIDEO_REQUEST_GET_MAX:
+            if (setup->wValue == 256)
+                *data = (uint8_t *)&probe;
+            else if (setup->wValue == 512)
+                *data = (uint8_t *)&commit;
+            break;
+        case VIDEO_REQUEST_GET_RES:
+
+            break;
+        case VIDEO_REQUEST_GET_LEN:
+
+            break;
+        case VIDEO_REQUEST_GET_INFO:
+
+            break;
+        case VIDEO_REQUEST_GET_DEF:
+            if (setup->wLength == 256)
+                *data = (uint8_t *)&probe;
+            else if (setup->wLength == 512)
+                *data = (uint8_t *)&commit;
+            break;
+        default:
+            USBD_LOG_ERR("Unhandled request 0x%02x", setup->bRequest);
+            break;
+    }
+    return 0;
+}
+uint8_t play_status = 0;
+void video_notify_handler(uint8_t event, void* arg)
+{
+	switch (event)
+	{
+		case USB_EVENT_RESET:
+			//usbd_cdc_acm_reset();
+			break;
+		case USB_EVENT_SET_INTERFACE:
+			if(((uint8_t*)arg)[3])
+            {
+                play_status =1;
+                MSG("Y\r\n");
+            }
+            else
+            {
+                play_status=0;
+                MSG("N\r\n");
+            }
+			break;		
+		default:
+			break;
+	}	
+}
+
+__weak void usbd_video_isoch_out(uint8_t ep)
+{
+
+}
+__weak void usbd_video_isoch_in(uint8_t ep)
+{
+
+}
+
+
+
+static usbd_class_t video_class;
+
+usbd_interface_t video_stream_intf =
+{
+	.class_handler = video_class_request_handler,
+	.vendor_handler = NULL,
+	.notify_handler = video_notify_handler,
+};
+
+static usbd_endpoint_t video_in_ep = 
+{
+	.ep_cb = usbd_video_isoch_in,
+	.ep_addr = 0x81
+};
+
+void usbd_video_class_init(const char *name,uint8_t in_ep)
+{
+    video_class.name = name;
+
+	usbd_class_register(&video_class);
+	usbd_class_add_interface(&video_class,&video_stream_intf);
+    video_stream_intf.intf_num = 1;
+    video_in_ep.ep_addr = in_ep;
+ 	usbd_interface_add_endpoint(&video_stream_intf,&video_in_ep);
+
+}
\ No newline at end of file
diff --git a/components/usb_stack/class/video/usbd_video.h b/components/usb_stack/class/video/usbd_video.h
new file mode 100644
index 00000000..da0f298d
--- /dev/null
+++ b/components/usb_stack/class/video/usbd_video.h
@@ -0,0 +1,825 @@
+/**
+ * @file
+ * @brief USB Video Device Class public header
+ *
+ * Header follows below documentation:
+ * - USB Device Class Definition for Video Devices UVC 1.5 Class specification.pdf
+ */
+
+#ifndef _USBD_VIDEO_H_
+#define _USBD_VIDEO_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define USB_DEVICE_VIDEO_CLASS_VERSION_1_5 0
+
+/*! @brief Video device subclass code */
+#define VIDEO_SC_UNDEFINED 					0x00U
+#define VIDEO_SC_VIDEOCONTROL 				0x01U
+#define VIDEO_SC_VIDEOSTREAMING 			0x02U
+#define VIDEO_SC_VIDEO_INTERFACE_COLLECTION 0x03U
+
+/*! @brief Video device protocol code */
+#define VIDEO_PC_PROTOCOL_UNDEFINED 		0x00U
+#define VIDEO_PC_PROTOCOL_15 				0x01U
+
+/*! @brief Video device class-specific descriptor type */
+#define VIDEO_CS_UNDEFINED_DESCRIPTOR_TYPE 		0x20U
+#define VIDEO_CS_DEVICE_DESCRIPTOR_TYPE 		0x21U
+#define VIDEO_CS_CONFIGURATION_DESCRIPTOR_TYPE 	0x22U
+#define VIDEO_CS_STRING_DESCRIPTOR_TYPE 		0x23U
+#define VIDEO_CS_INTERFACE_DESCRIPTOR_TYPE 		0x24U
+#define VIDEO_CS_ENDPOINT_DESCRIPTOR_TYPE 		0x25U
+
+/*! @brief Video device class-specific VC interface descriptor subtype */
+#define VIDEO_VC_DESCRIPTOR_UNDEFINED_DESCRIPTOR_SUBTYPE 	0x00U
+#define VIDEO_VC_HEADER_DESCRIPTOR_SUBTYPE 					0x01U
+#define VIDEO_VC_INPUT_TERMINAL_DESCRIPTOR_SUBTYPE 			0x02U
+#define VIDEO_VC_OUTPUT_TERMINAL_DESCRIPTOR_SUBTYPE 		0x03U
+#define VIDEO_VC_SELECTOR_UNIT_DESCRIPTOR_SUBTYPE 			0x04U
+#define VIDEO_VC_PROCESSING_UNIT_DESCRIPTOR_SUBTYPE 		0x05U
+#define VIDEO_VC_EXTENSION_UNIT_DESCRIPTOR_SUBTYPE 			0x06U
+#define VIDEO_VC_ENCODING_UNIT_DESCRIPTOR_SUBTYPE 			0x07U
+
+/*! @brief Video device class-specific VS interface descriptor subtype */
+#define VIDEO_VS_UNDEFINED_DESCRIPTOR_SUBTYPE 				0x00U
+#define VIDEO_VS_INPUT_HEADER_DESCRIPTOR_SUBTYPE 			0x01U
+#define VIDEO_VS_OUTPUT_HEADER_DESCRIPTOR_SUBTYPE 			0x02U
+#define VIDEO_VS_STILL_IMAGE_FRAME_DESCRIPTOR_SUBTYPE 		0x03U
+#define VIDEO_VS_FORMAT_UNCOMPRESSED_DESCRIPTOR_SUBTYPE 	0x04U
+#define VIDEO_VS_FRAME_UNCOMPRESSED_DESCRIPTOR_SUBTYPE 		0x05U
+#define VIDEO_VS_FORMAT_MJPEG_DESCRIPTOR_SUBTYPE 			0x06U
+#define VIDEO_VS_FRAME_MJPEG_DESCRIPTOR_SUBTYPE 			0x07U
+#define VIDEO_VS_FORMAT_MPEG2TS_DESCRIPTOR_SUBTYPE 			0x0AU
+#define VIDEO_VS_FORMAT_DV_DESCRIPTOR_SUBTYPE 				0x0CU
+#define VIDEO_VS_COLORFORMAT_DESCRIPTOR_SUBTYPE 			0x0DU
+#define VIDEO_VS_FORMAT_FRAME_BASED_DESCRIPTOR_SUBTYPE 		0x10U
+#define VIDEO_VS_FRAME_FRAME_BASED_DESCRIPTOR_SUBTYPE 		0x11U
+#define VIDEO_VS_FORMAT_STREAM_BASED_DESCRIPTOR_SUBTYPE 	0x12U
+#define VIDEO_VS_FORMAT_H264_DESCRIPTOR_SUBTYPE 			0x13U
+#define VIDEO_VS_FRAME_H264_DESCRIPTOR_SUBTYPE 				0x14U
+#define VIDEO_VS_FORMAT_H264_SIMULCAST_DESCRIPTOR_SUBTYPE 	0x15U
+#define VIDEO_VS_FORMAT_VP8_DESCRIPTOR_SUBTYPE 				0x16U
+#define VIDEO_VS_FRAME_VP8_DESCRIPTOR_SUBTYPE 				0x17U
+#define VIDEO_VS_FORMAT_VP8_SIMULCAST_DESCRIPTOR_SUBTYPE 	0x18U
+
+/*! @brief Video device class-specific VC endpoint descriptor subtype */
+#define VIDEO_EP_UNDEFINED_DESCRIPTOR_SUBTYPE 		0x00U
+#define VIDEO_EP_GENERAL_DESCRIPTOR_SUBTYPE 		0x01U
+#define VIDEO_EP_ENDPOINT_DESCRIPTOR_SUBTYPE 		0x02U
+#define VIDEO_EP_INTERRUPT_DESCRIPTOR_SUBTYPE 		0x03U
+
+/*! @brief Video device class-specific request code */
+#define VIDEO_REQUEST_UNDEFINED 		0x00U
+#define VIDEO_REQUEST_SET_CUR 			0x01U
+#define VIDEO_REQUEST_SET_CUR_ALL 		0x11U
+#define VIDEO_REQUEST_GET_CUR 			0x81U
+#define VIDEO_REQUEST_GET_MIN 			0x82U
+#define VIDEO_REQUEST_GET_MAX 			0x83U
+#define VIDEO_REQUEST_GET_RES 			0x84U
+#define VIDEO_REQUEST_GET_LEN 			0x85U
+#define VIDEO_REQUEST_GET_INFO 			0x86U
+#define VIDEO_REQUEST_GET_DEF 			0x87U
+#define VIDEO_REQUEST_GET_CUR_ALL 		0x91U
+#define VIDEO_REQUEST_GET_MIN_ALL 		0x92U
+#define VIDEO_REQUEST_GET_MAX_ALL 		0x93U
+#define VIDEO_REQUEST_GET_RES_ALL 		0x94U
+#define VIDEO_REQUEST_GET_DEF_ALL 		0x97U
+
+/*! @brief Video device class-specific VideoControl interface control selector */
+#define VIDEO_VC_CONTROL_UNDEFINED 			0x00U
+#define VIDEO_VC_VIDEO_POWER_MODE_CONTROL 	0x01U
+#define VIDEO_VC_REQUEST_ERROR_CODE_CONTROL 0x02U
+
+/*! @brief Video device class-specific Terminal control selector */
+#define VIDEO_TE_CONTROL_UNDEFINED 0x00U
+
+/*! @brief Video device class-specific Selector Unit control selector */
+#define VIDEO_SU_CONTROL_UNDEFINED 		0x00U
+#define VIDEO_SU_INPUT_SELECT_CONTROL 	0x01U
+
+/*! @brief Video device class-specific Camera Terminal control selector */
+#define VIDEO_CT_CONTROL_UNDEFINED 				0x00U
+#define VIDEO_CT_SCANNING_MODE_CONTROL 			0x01U
+#define VIDEO_CT_AE_MODE_CONTROL 				0x02U
+#define VIDEO_CT_AE_PRIORITY_CONTROL 			0x03U
+#define VIDEO_CT_EXPOSURE_TIME_ABSOLUTE_CONTROL 0x04U
+#define VIDEO_CT_EXPOSURE_TIME_RELATIVE_CONTROL 0x05U
+#define VIDEO_CT_FOCUS_ABSOLUTE_CONTROL 		0x06U
+#define VIDEO_CT_FOCUS_RELATIVE_CONTROL 		0x07U
+#define VIDEO_CT_FOCUS_AUTO_CONTROL 			0x08U
+#define VIDEO_CT_IRIS_ABSOLUTE_CONTROL 			0x09U
+#define VIDEO_CT_IRIS_RELATIVE_CONTROL 			0x0AU
+#define VIDEO_CT_ZOOM_ABSOLUTE_CONTROL 			0x0BU
+#define VIDEO_CT_ZOOM_RELATIVE_CONTROL 			0x0CU
+#define VIDEO_CT_PANTILT_ABSOLUTE_CONTROL 		0x0DU
+#define VIDEO_CT_PANTILT_RELATIVE_CONTROL 		0x0EU
+#define VIDEO_CT_ROLL_ABSOLUTE_CONTROL 			0x0FU
+#define VIDEO_CT_ROLL_RELATIVE_CONTROL 			0x10U
+#define VIDEO_CT_PRIVACY_CONTROL 				0x11U
+#define VIDEO_CT_FOCUS_SIMPLE_CONTROL 			0x12U
+#define VIDEO_CT_WINDOW_CONTROL 				0x13U
+#define VIDEO_CT_REGION_OF_INTEREST_CONTROL 	0x14U
+
+/*! @brief Video device class-specific Processing Unit control selector */
+#define VIDEO_PU_CONTROL_UNDEFINED 						0x00U
+#define VIDEO_PU_BACKLIGHT_COMPENSATION_CONTROL 		0x01U
+#define VIDEO_PU_BRIGHTNESS_CONTROL 					0x02U
+#define VIDEO_PU_CONTRAST_CONTROL 						0x03U
+#define VIDEO_PU_GAIN_CONTROL 							0x04U
+#define VIDEO_PU_POWER_LINE_FREQUENCY_CONTROL 			0x05U
+#define VIDEO_PU_HUE_CONTROL 							0x06U
+#define VIDEO_PU_SATURATION_CONTROL 					0x07U
+#define VIDEO_PU_SHARPNESS_CONTROL 						0x08U
+#define VIDEO_PU_GAMMA_CONTROL 							0x09U
+#define VIDEO_PU_WHITE_BALANCE_TEMPERATURE_CONTROL 		0x0AU
+#define VIDEO_PU_WHITE_BALANCE_TEMPERATURE_AUTO_CONTROL 0x0BU
+#define VIDEO_PU_WHITE_BALANCE_COMPONENT_CONTROL 		0x0CU
+#define VIDEO_PU_WHITE_BALANCE_COMPONENT_AUTO_CONTROL 	0x0DU
+#define VIDEO_PU_DIGITAL_MULTIPLIER_CONTROL 			0x0EU
+#define VIDEO_PU_DIGITAL_MULTIPLIER_LIMIT_CONTROL 		0x0FU
+#define VIDEO_PU_HUE_AUTO_CONTROL 						0x10U
+#define VIDEO_PU_ANALOG_VIDEO_STANDARD_CONTROL 			0x11U
+#define VIDEO_PU_ANALOG_LOCK_STATUS_CONTROL 			0x12U
+#define VIDEO_PU_CONTRAST_AUTO_CONTROL 					0x13U
+
+/*! @brief Video device class-specific Encoding Unit control selector */
+#define VIDEO_EU_CONTROL_UNDEFINED 					0x00U
+#define VIDEO_EU_SELECT_LAYER_CONTROL 				0x01U
+#define VIDEO_EU_PROFILE_TOOLSET_CONTROL 			0x02U
+#define VIDEO_EU_VIDEO_RESOLUTION_CONTROL 			0x03U
+#define VIDEO_EU_MIN_FRAME_INTERVAL_CONTROL 		0x04U
+#define VIDEO_EU_SLICE_MODE_CONTROL 				0x05U
+#define VIDEO_EU_RATE_CONTROL_MODE_CONTROL 			0x06U
+#define VIDEO_EU_AVERAGE_BITRATE_CONTROL 			0x07U
+#define VIDEO_EU_CPB_SIZE_CONTROL 					0x08U
+#define VIDEO_EU_PEAK_BIT_RATE_CONTROL 				0x09U
+#define VIDEO_EU_QUANTIZATION_PARAMS_CONTROL 		0x0AU
+#define VIDEO_EU_SYNC_REF_FRAME_CONTROL 			0x0BU
+#define VIDEO_EU_LTR_BUFFER_ CONTROL0x0CU
+#define VIDEO_EU_LTR_PICTURE_CONTROL 				0x0DU
+#define VIDEO_EU_LTR_VALIDATION_CONTROL 			0x0EU
+#define VIDEO_EU_LEVEL_IDC_LIMIT_CONTROL 			0x0FU
+#define VIDEO_EU_SEI_PAYLOADTYPE_CONTROL 			0x10U
+#define VIDEO_EU_QP_RANGE_CONTROL 					0x11U
+#define VIDEO_EU_PRIORITY_CONTROL 					0x12U
+#define VIDEO_EU_START_OR_STOP_LAYER_CONTROL 		0x13U
+#define VIDEO_EU_ERROR_RESILIENCY_CONTROL 			0x14U
+
+/*! @brief Video device class-specific Extension Unit control selector */
+#define VIDEO_XU_CONTROL_UNDEFINED 0x00U
+
+/*! @brief Video device class-specific VideoStreaming Interface control selector */
+#define VIDEO_VS_CONTROL_UNDEFINED 				0x00U
+#define VIDEO_VS_PROBE_CONTROL 					0x01U
+#define VIDEO_VS_COMMIT_CONTROL 				0x02U
+#define VIDEO_VS_STILL_PROBE_CONTROL 			0x03U
+#define VIDEO_VS_STILL_COMMIT_CONTROL 			0x04U
+#define VIDEO_VS_STILL_IMAGE_TRIGGER_CONTROL 	0x05U
+#define VIDEO_VS_STREAM_ERROR_CODE_CONTROL 		0x06U
+#define VIDEO_VS_GENERATE_KEY_FRAME_CONTROL 	0x07U
+#define VIDEO_VS_UPDATE_FRAME_SEGMENT_CONTROL 	0x08U
+#define VIDEO_VS_SYNCH_DELAY_CONTROL 			0x09U
+
+/*! @}*/
+
+/*!
+ * @name USB Video class terminal types
+ * @{
+ */
+
+/*! @brief Video device USB terminal type */
+#define VIDEO_TT_VENDOR_SPECIFIC 0x0100U
+#define VIDEO_TT_STREAMING 0x0101U
+
+/*! @brief Video device input terminal type */
+#define VIDEO_ITT_VENDOR_SPECIFIC 0x0200U
+#define VIDEO_ITT_CAMERA 0x0201U
+#define VIDEO_ITT_MEDIA_TRANSPORT_INPUT 0x0202U
+
+/*! @brief Video device output terminal type */
+#define VIDEO_OTT_VENDOR_SPECIFIC 0x0300U
+#define VIDEO_OTT_DISPLAY 0x0301U
+#define VIDEO_OTT_MEDIA_TRANSPORT_OUTPUT 0x0302U
+
+/*! @brief Video device external terminal type */
+#define VIDEO_ET_VENDOR_SPECIFIC 0x0400U
+#define VIDEO_ET_COMPOSITE_CONNECTOR 0x0401U
+#define VIDEO_ET_SVIDEO_CONNECTOR 0x0402U
+#define VIDEO_ET_COMPONENT_CONNECTOR 0x0403U
+
+/*! @}*/
+
+/*!
+ * @name USB Video class setup request types
+ * @{
+ */
+
+/*! @brief Video device class setup request set type */
+#define VIDEO_SET_REQUEST_INTERFACE 0x21U
+#define VIDEO_SET_REQUEST_ENDPOINT 0x22U
+
+/*! @brief Video device class setup request get type */
+#define VIDEO_GET_REQUEST_INTERFACE 0xA1U
+#define VIDEO_GET_REQUEST_ENDPOINT 0xA2U
+
+/*! @}*/
+
+/*! @brief Video device still image trigger control */
+#define VIDEO_STILL_IMAGE_TRIGGER_NORMAL_OPERATION 0x00U
+#define VIDEO_STILL_IMAGE_TRIGGER_TRANSMIT_STILL_IMAGE 0x01U
+#define VIDEO_STILL_IMAGE_TRIGGER_TRANSMIT_STILL_IMAGE_VS_DEDICATED_BULK_PIPE 0x02U
+#define VIDEO_STILL_IMAGE_TRIGGER_ABORT_STILL_IMAGE_TRANSMISSION 0x03U
+
+/*!
+ * @name USB Video device class-specific request commands
+ * @{
+ */
+
+/*! @brief Video device class-specific request GET CUR COMMAND */
+#define VIDEO_GET_CUR_VC_POWER_MODE_CONTROL 0x8101U
+#define VIDEO_GET_CUR_VC_ERROR_CODE_CONTROL 0x8102U
+
+#define VIDEO_GET_CUR_PU_BACKLIGHT_COMPENSATION_CONTROL 0x8121U
+#define VIDEO_GET_CUR_PU_BRIGHTNESS_CONTROL 0x8122U
+#define VIDEO_GET_CUR_PU_CONTRACT_CONTROL 0x8123U
+#define VIDEO_GET_CUR_PU_GAIN_CONTROL 0x8124U
+#define VIDEO_GET_CUR_PU_POWER_LINE_FREQUENCY_CONTROL 0x8125U
+#define VIDEO_GET_CUR_PU_HUE_CONTROL 0x8126U
+#define VIDEO_GET_CUR_PU_SATURATION_CONTROL 0x8127U
+#define VIDEO_GET_CUR_PU_SHARRNESS_CONTROL 0x8128U
+#define VIDEO_GET_CUR_PU_GAMMA_CONTROL 0x8129U
+#define VIDEO_GET_CUR_PU_WHITE_BALANCE_TEMPERATURE_CONTROL 0x812AU
+#define VIDEO_GET_CUR_PU_WHITE_BALANCE_TEMPERATURE_AUTO_CONTROL 0x812BU
+#define VIDEO_GET_CUR_PU_WHITE_BALANCE_COMPONENT_CONTROL 0x812CU
+#define VIDEO_GET_CUR_PU_WHITE_BALANCE_COMPONENT_AUTO_CONTROL 0x812DU
+#define VIDEO_GET_CUR_PU_DIGITAL_MULTIPLIER_CONTROL 0x812EU
+#define VIDEO_GET_CUR_PU_DIGITAL_MULTIPLIER_LIMIT_CONTROL 0x812FU
+#define VIDEO_GET_CUR_PU_HUE_AUTO_CONTROL 0x8130U
+#define VIDEO_GET_CUR_PU_ANALOG_VIDEO_STANDARD_CONTROL 0x8131U
+#define VIDEO_GET_CUR_PU_ANALOG_LOCK_STATUS_CONTROL 0x8132U
+#if defined(USB_DEVICE_VIDEO_CLASS_VERSION_1_5) && USB_DEVICE_VIDEO_CLASS_VERSION_1_5
+#define VIDEO_GET_CUR_PU_CONTRAST_AUTO_CONTROL 0x8133U
+#endif
+
+#define VIDEO_GET_CUR_CT_SCANNING_MODE_CONTROL 0x8141U
+#define VIDEO_GET_CUR_CT_AE_MODE_CONTROL 0x8142U
+#define VIDEO_GET_CUR_CT_AE_PRIORITY_CONTROL 0x8143U
+#define VIDEO_GET_CUR_CT_EXPOSURE_TIME_ABSOLUTE_CONTROL 0x8144U
+#define VIDEO_GET_CUR_CT_EXPOSURE_TIME_RELATIVE_CONTROL 0x8145U
+#define VIDEO_GET_CUR_CT_FOCUS_ABSOLUTE_CONTROL 0x8146U
+#define VIDEO_GET_CUR_CT_FOCUS_RELATIVE_CONTROL 0x8147U
+#define VIDEO_GET_CUR_CT_FOCUS_AUTO_CONTROL 0x8148U
+#define VIDEO_GET_CUR_CT_IRIS_ABSOLUTE_CONTROL 0x8149U
+#define VIDEO_GET_CUR_CT_IRIS_RELATIVE_CONTROL 0x814AU
+#define VIDEO_GET_CUR_CT_ZOOM_ABSOLUTE_CONTROL 0x814BU
+#define VIDEO_GET_CUR_CT_ZOOM_RELATIVE_CONTROL 0x814CU
+#define VIDEO_GET_CUR_CT_PANTILT_ABSOLUTE_CONTROL 0x814DU
+#define VIDEO_GET_CUR_CT_PANTILT_RELATIVE_CONTROL 0x814EU
+#define VIDEO_GET_CUR_CT_ROLL_ABSOLUTE_CONTROL 0x814FU
+#define VIDEO_GET_CUR_CT_ROLL_RELATIVE_CONTROL 0x8150U
+#define VIDEO_GET_CUR_CT_PRIVACY_CONTROL 0x8151U
+#if defined(USB_DEVICE_VIDEO_CLASS_VERSION_1_5) && USB_DEVICE_VIDEO_CLASS_VERSION_1_5
+#define VIDEO_GET_CUR_CT_FOCUS_SIMPLE_CONTROL 0x8152U
+#define VIDEO_GET_CUR_CT_DIGITAL_WINDOW_CONTROL 0x8153U
+#define VIDEO_GET_CUR_CT_REGION_OF_INTEREST_CONTROL 0x8154U
+#endif
+
+#define VIDEO_GET_CUR_VS_PROBE_CONTROL 0x8161U
+#define VIDEO_GET_CUR_VS_COMMIT_CONTROL 0x8162U
+#define VIDEO_GET_CUR_VS_STILL_PROBE_CONTROL 0x8163U
+#define VIDEO_GET_CUR_VS_STILL_COMMIT_CONTROL 0x8164U
+#define VIDEO_GET_CUR_VS_STILL_IMAGE_TRIGGER_CONTROL 0x8165U
+#define VIDEO_GET_CUR_VS_STREAM_ERROR_CODE_CONTROL 0x8166U
+#define VIDEO_GET_CUR_VS_GENERATE_KEY_FRAME_CONTROL 0x8167U
+#define VIDEO_GET_CUR_VS_UPDATE_FRAME_SEGMENT_CONTROL 0x8168U
+#define VIDEO_GET_CUR_VS_SYNCH_DELAY_CONTROL 0x8169U
+
+#if defined(USB_DEVICE_VIDEO_CLASS_VERSION_1_5) && USB_DEVICE_VIDEO_CLASS_VERSION_1_5
+#define VIDEO_GET_CUR_EU_SELECT_LAYER_CONTROL 0x8181U
+#define VIDEO_GET_CUR_EU_PROFILE_TOOLSET_CONTROL 0x8182U
+#define VIDEO_GET_CUR_EU_VIDEO_RESOLUTION_CONTROL 0x8183U
+#define VIDEO_GET_CUR_EU_MIN_FRAME_INTERVAL_CONTROL 0x8184U
+#define VIDEO_GET_CUR_EU_SLICE_MODE_CONTROL 0x8185U
+#define VIDEO_GET_CUR_EU_RATE_CONTROL_MODE_CONTROL 0x8186U
+#define VIDEO_GET_CUR_EU_AVERAGE_BITRATE_CONTROL 0x8187U
+#define VIDEO_GET_CUR_EU_CPB_SIZE_CONTROL 0x8188U
+#define VIDEO_GET_CUR_EU_PEAK_BIT_RATE_CONTROL 0x8189U
+#define VIDEO_GET_CUR_EU_QUANTIZATION_PARAMS_CONTROL 0x818AU
+#define VIDEO_GET_CUR_EU_SYNC_REF_FRAME_CONTROL 0x818BU
+#define VIDEO_GET_CUR_EU_LTR_BUFFER_CONTROL 0x818CU
+#define VIDEO_GET_CUR_EU_LTR_PICTURE_CONTROL 0x818DU
+#define VIDEO_GET_CUR_EU_LTR_VALIDATION_CONTROL 0x818EU
+#define VIDEO_GET_CUR_EU_LEVEL_IDC_LIMIT_CONTROL 0x818FU
+#define VIDEO_GET_CUR_EU_SEI_PAYLOADTYPE_CONTROL 0x8190U
+#define VIDEO_GET_CUR_EU_QP_RANGE_CONTROL 0x8191U
+#define VIDEO_GET_CUR_EU_PRIORITY_CONTROL 0x8192U
+#define VIDEO_GET_CUR_EU_START_OR_STOP_LAYER_CONTROL 0x8193U
+#define VIDEO_GET_CUR_EU_ERROR_RESILIENCY_CONTROL 0x8194U
+#endif
+
+/*! @brief Video device class-specific request GET MIN COMMAND */
+#define VIDEO_GET_MIN_PU_BACKLIGHT_COMPENSATION_CONTROL 0x8221U
+#define VIDEO_GET_MIN_PU_BRIGHTNESS_CONTROL 0x8222U
+#define VIDEO_GET_MIN_PU_CONTRACT_CONTROL 0x8223U
+#define VIDEO_GET_MIN_PU_GAIN_CONTROL 0x8224U
+#define VIDEO_GET_MIN_PU_HUE_CONTROL 0x8226U
+#define VIDEO_GET_MIN_PU_SATURATION_CONTROL 0x8227U
+#define VIDEO_GET_MIN_PU_SHARRNESS_CONTROL 0x8228U
+#define VIDEO_GET_MIN_PU_GAMMA_CONTROL 0x8229U
+#define VIDEO_GET_MIN_PU_WHITE_BALANCE_TEMPERATURE_CONTROL 0x822AU
+#define VIDEO_GET_MIN_PU_WHITE_BALANCE_COMPONENT_CONTROL 0x822CU
+#define VIDEO_GET_MIN_PU_DIGITAL_MULTIPLIER_CONTROL 0x822EU
+#define VIDEO_GET_MIN_PU_DIGITAL_MULTIPLIER_LIMIT_CONTROL 0x822FU
+
+#define VIDEO_GET_MIN_CT_EXPOSURE_TIME_ABSOLUTE_CONTROL 0x8244U
+#define VIDEO_GET_MIN_CT_FOCUS_ABSOLUTE_CONTROL 0x8246U
+#define VIDEO_GET_MIN_CT_FOCUS_RELATIVE_CONTROL 0x8247U
+#define VIDEO_GET_MIN_CT_IRIS_ABSOLUTE_CONTROL 0x8249U
+#define VIDEO_GET_MIN_CT_ZOOM_ABSOLUTE_CONTROL 0x824BU
+#define VIDEO_GET_MIN_CT_ZOOM_RELATIVE_CONTROL 0x824CU
+#define VIDEO_GET_MIN_CT_PANTILT_ABSOLUTE_CONTROL 0x824DU
+#define VIDEO_GET_MIN_CT_PANTILT_RELATIVE_CONTROL 0x824EU
+#define VIDEO_GET_MIN_CT_ROLL_ABSOLUTE_CONTROL 0x824FU
+#define VIDEO_GET_MIN_CT_ROLL_RELATIVE_CONTROL 0x8250U
+#if defined(USB_DEVICE_VIDEO_CLASS_VERSION_1_5) && USB_DEVICE_VIDEO_CLASS_VERSION_1_5
+#define VIDEO_GET_MIN_CT_DIGITAL_WINDOW_CONTROL 0x8251U
+#define VIDEO_GET_MIN_CT_REGION_OF_INTEREST_CONTROL 0x8252U
+#endif
+
+#define VIDEO_GET_MIN_VS_PROBE_CONTROL 0x8261U
+#define VIDEO_GET_MIN_VS_STILL_PROBE_CONTROL 0x8263U
+#define VIDEO_GET_MIN_VS_UPDATE_FRAME_SEGMENT_CONTROL 0x8268U
+#define VIDEO_GET_MIN_VS_SYNCH_DELAY_CONTROL 0x8269U
+
+#if defined(USB_DEVICE_VIDEO_CLASS_VERSION_1_5) && USB_DEVICE_VIDEO_CLASS_VERSION_1_5
+#define VIDEO_GET_MIN_EU_VIDEO_RESOLUTION_CONTROL 0x8283U
+#define VIDEO_GET_MIN_EU_MIN_FRAME_INTERVAL_CONTROL 0x8284U
+#define VIDEO_GET_MIN_EU_SLICE_MODE_CONTROL 0x8285U
+#define VIDEO_GET_MIN_EU_AVERAGE_BITRATE_CONTROL 0x8287U
+#define VIDEO_GET_MIN_EU_CPB_SIZE_CONTROL 0x8288U
+#define VIDEO_GET_MIN_EU_PEAK_BIT_RATE_CONTROL 0x8289U
+#define VIDEO_GET_MIN_EU_QUANTIZATION_PARAMS_CONTROL 0x828AU
+#define VIDEO_GET_MIN_EU_SYNC_REF_FRAME_CONTROL 0x828BU
+#define VIDEO_GET_MIN_EU_LEVEL_IDC_LIMIT_CONTROL 0x828FU
+#define VIDEO_GET_MIN_EU_SEI_PAYLOADTYPE_CONTROL 0x8290U
+#define VIDEO_GET_MIN_EU_QP_RANGE_CONTROL 0x8291U
+#endif
+
+/*! @brief Video device class-specific request GET MAX COMMAND */
+#define VIDEO_GET_MAX_PU_BACKLIGHT_COMPENSATION_CONTROL 0x8321U
+#define VIDEO_GET_MAX_PU_BRIGHTNESS_CONTROL 0x8322U
+#define VIDEO_GET_MAX_PU_CONTRACT_CONTROL 0x8323U
+#define VIDEO_GET_MAX_PU_GAIN_CONTROL 0x8324U
+#define VIDEO_GET_MAX_PU_HUE_CONTROL 0x8326U
+#define VIDEO_GET_MAX_PU_SATURATION_CONTROL 0x8327U
+#define VIDEO_GET_MAX_PU_SHARRNESS_CONTROL 0x8328U
+#define VIDEO_GET_MAX_PU_GAMMA_CONTROL 0x8329U
+#define VIDEO_GET_MAX_PU_WHITE_BALANCE_TEMPERATURE_CONTROL 0x832AU
+#define VIDEO_GET_MAX_PU_WHITE_BALANCE_COMPONENT_CONTROL 0x832CU
+#define VIDEO_GET_MAX_PU_DIGITAL_MULTIPLIER_CONTROL 0x832EU
+#define VIDEO_GET_MAX_PU_DIGITAL_MULTIPLIER_LIMIT_CONTROL 0x832FU
+
+#define VIDEO_GET_MAX_CT_EXPOSURE_TIME_ABSOLUTE_CONTROL 0x8344U
+#define VIDEO_GET_MAX_CT_FOCUS_ABSOLUTE_CONTROL 0x8346U
+#define VIDEO_GET_MAX_CT_FOCUS_RELATIVE_CONTROL 0x8347U
+#define VIDEO_GET_MAX_CT_IRIS_ABSOLUTE_CONTROL 0x8349U
+#define VIDEO_GET_MAX_CT_ZOOM_ABSOLUTE_CONTROL 0x834BU
+#define VIDEO_GET_MAX_CT_ZOOM_RELATIVE_CONTROL 0x834CU
+#define VIDEO_GET_MAX_CT_PANTILT_ABSOLUTE_CONTROL 0x834DU
+#define VIDEO_GET_MAX_CT_PANTILT_RELATIVE_CONTROL 0x834EU
+#define VIDEO_GET_MAX_CT_ROLL_ABSOLUTE_CONTROL 0x834FU
+#define VIDEO_GET_MAX_CT_ROLL_RELATIVE_CONTROL 0x8350U
+#if defined(USB_DEVICE_VIDEO_CLASS_VERSION_1_5) && USB_DEVICE_VIDEO_CLASS_VERSION_1_5
+#define VIDEO_GET_MAX_CT_DIGITAL_WINDOW_CONTROL 0x8351U
+#define VIDEO_GET_MAX_CT_REGION_OF_INTEREST_CONTROL 0x8352U
+#endif
+
+#define VIDEO_GET_MAX_VS_PROBE_CONTROL 0x8361U
+#define VIDEO_GET_MAX_VS_STILL_PROBE_CONTROL 0x8363U
+#define VIDEO_GET_MAX_VS_UPDATE_FRAME_SEGMENT_CONTROL 0x8368U
+#define VIDEO_GET_MAX_VS_SYNCH_DELAY_CONTROL 0x8369U
+
+#if defined(USB_DEVICE_VIDEO_CLASS_VERSION_1_5) && USB_DEVICE_VIDEO_CLASS_VERSION_1_5
+#define VIDEO_GET_MAX_EU_VIDEO_RESOLUTION_CONTROL 0x8383U
+#define VIDEO_GET_MAX_EU_MIN_FRAME_INTERVAL_CONTROL 0x8384U
+#define VIDEO_GET_MAX_EU_SLICE_MODE_CONTROL 0x8385U
+#define VIDEO_GET_MAX_EU_AVERAGE_BITRATE_CONTROL 0x8387U
+#define VIDEO_GET_MAX_EU_CPB_SIZE_CONTROL 0x8388U
+#define VIDEO_GET_MAX_EU_PEAK_BIT_RATE_CONTROL 0x8389U
+#define VIDEO_GET_MAX_EU_QUANTIZATION_PARAMS_CONTROL 0x838AU
+#define VIDEO_GET_MAX_EU_SYNC_REF_FRAME_CONTROL 0x838BU
+#define VIDEO_GET_MAX_EU_LTR_BUFFER_CONTROL 0x838CU
+#define VIDEO_GET_MAX_EU_LEVEL_IDC_LIMIT_CONTROL 0x838FU
+#define VIDEO_GET_MAX_EU_SEI_PAYLOADTYPE_CONTROL 0x8390U
+#define VIDEO_GET_MAX_EU_QP_RANGE_CONTROL 0x8391U
+#endif
+
+/*! @brief Video device class-specific request GET RES COMMAND */
+#define VIDEO_GET_RES_PU_BACKLIGHT_COMPENSATION_CONTROL 0x8421U
+#define VIDEO_GET_RES_PU_BRIGHTNESS_CONTROL 0x8422U
+#define VIDEO_GET_RES_PU_CONTRACT_CONTROL 0x8423U
+#define VIDEO_GET_RES_PU_GAIN_CONTROL 0x8424U
+#define VIDEO_GET_RES_PU_HUE_CONTROL 0x8426U
+#define VIDEO_GET_RES_PU_SATURATION_CONTROL 0x8427U
+#define VIDEO_GET_RES_PU_SHARRNESS_CONTROL 0x8428U
+#define VIDEO_GET_RES_PU_GAMMA_CONTROL 0x8429U
+#define VIDEO_GET_RES_PU_WHITE_BALANCE_TEMPERATURE_CONTROL 0x842AU
+#define VIDEO_GET_RES_PU_WHITE_BALANCE_COMPONENT_CONTROL 0x842CU
+#define VIDEO_GET_RES_PU_DIGITAL_MULTIPLIER_CONTROL 0x842EU
+#define VIDEO_GET_RES_PU_DIGITAL_MULTIPLIER_LIMIT_CONTROL 0x842FU
+
+#define VIDEO_GET_RES_CT_AE_MODE_CONTROL 0x8442U
+#define VIDEO_GET_RES_CT_EXPOSURE_TIME_ABSOLUTE_CONTROL 0x8444U
+#define VIDEO_GET_RES_CT_FOCUS_ABSOLUTE_CONTROL 0x8446U
+#define VIDEO_GET_RES_CT_FOCUS_RELATIVE_CONTROL 0x8447U
+#define VIDEO_GET_RES_CT_IRIS_ABSOLUTE_CONTROL 0x8449U
+#define VIDEO_GET_RES_CT_ZOOM_ABSOLUTE_CONTROL 0x844BU
+#define VIDEO_GET_RES_CT_ZOOM_RELATIVE_CONTROL 0x844CU
+#define VIDEO_GET_RES_CT_PANTILT_ABSOLUTE_CONTROL 0x844DU
+#define VIDEO_GET_RES_CT_PANTILT_RELATIVE_CONTROL 0x844EU
+#define VIDEO_GET_RES_CT_ROLL_ABSOLUTE_CONTROL 0x844FU
+#define VIDEO_GET_RES_CT_ROLL_RELATIVE_CONTROL 0x8450U
+
+#define VIDEO_GET_RES_VS_PROBE_CONTROL 0x8461U
+#define VIDEO_GET_RES_VS_STILL_PROBE_CONTROL 0x8463U
+#define VIDEO_GET_RES_VS_UPDATE_FRAME_SEGMENT_CONTROL 0x8468U
+#define VIDEO_GET_RES_VS_SYNCH_DELAY_CONTROL 0x8469U
+
+#if defined(USB_DEVICE_VIDEO_CLASS_VERSION_1_5) && USB_DEVICE_VIDEO_CLASS_VERSION_1_5
+#define VIDEO_GET_RES_EU_AVERAGE_BITRATE_CONTROL 0x8487U
+#define VIDEO_GET_RES_EU_CPB_SIZE_CONTROL 0x8488U
+#define VIDEO_GET_RES_EU_PEAK_BIT_RATE_CONTROL 0x8489U
+#define VIDEO_GET_RES_EU_QUANTIZATION_PARAMS_CONTROL 0x848AU
+#define VIDEO_GET_RES_EU_ERROR_RESILIENCY_CONTROL 0x8494U
+#endif
+
+/*! @brief Video device class-specific request GET LEN COMMAND */
+
+#define VIDEO_GET_LEN_VS_PROBE_CONTROL 0x8561U
+#define VIDEO_GET_LEN_VS_COMMIT_CONTROL 0x8562U
+#define VIDEO_GET_LEN_VS_STILL_PROBE_CONTROL 0x8563U
+#define VIDEO_GET_LEN_VS_STILL_COMMIT_CONTROL 0x8564U
+
+#if defined(USB_DEVICE_VIDEO_CLASS_VERSION_1_5) && USB_DEVICE_VIDEO_CLASS_VERSION_1_5
+#define VIDEO_GET_LEN_EU_SELECT_LAYER_CONTROL 0x8581U
+#define VIDEO_GET_LEN_EU_PROFILE_TOOLSET_CONTROL 0x8582U
+#define VIDEO_GET_LEN_EU_VIDEO_RESOLUTION_CONTROL 0x8583U
+#define VIDEO_GET_LEN_EU_MIN_FRAME_INTERVAL_CONTROL 0x8584U
+#define VIDEO_GET_LEN_EU_SLICE_MODE_CONTROL 0x8585U
+#define VIDEO_GET_LEN_EU_RATE_CONTROL_MODE_CONTROL 0x8586U
+#define VIDEO_GET_LEN_EU_AVERAGE_BITRATE_CONTROL 0x8587U
+#define VIDEO_GET_LEN_EU_CPB_SIZE_CONTROL 0x8588U
+#define VIDEO_GET_LEN_EU_PEAK_BIT_RATE_CONTROL 0x8589U
+#define VIDEO_GET_LEN_EU_QUANTIZATION_PARAMS_CONTROL 0x858AU
+#define VIDEO_GET_LEN_EU_SYNC_REF_FRAME_CONTROL 0x858BU
+#define VIDEO_GET_LEN_EU_LTR_BUFFER_CONTROL 0x858CU
+#define VIDEO_GET_LEN_EU_LTR_PICTURE_CONTROL 0x858DU
+#define VIDEO_GET_LEN_EU_LTR_VALIDATION_CONTROL 0x858EU
+#define VIDEO_GET_LEN_EU_QP_RANGE_CONTROL 0x8591U
+#define VIDEO_GET_LEN_EU_PRIORITY_CONTROL 0x8592U
+#define VIDEO_GET_LEN_EU_START_OR_STOP_LAYER_CONTROL 0x8593U
+#endif
+
+/*! @brief Video device class-specific request GET INFO COMMAND */
+#define VIDEO_GET_INFO_VC_POWER_MODE_CONTROL 0x8601U
+#define VIDEO_GET_INFO_VC_ERROR_CODE_CONTROL 0x8602U
+
+#define VIDEO_GET_INFO_PU_BACKLIGHT_COMPENSATION_CONTROL 0x8621U
+#define VIDEO_GET_INFO_PU_BRIGHTNESS_CONTROL 0x8622U
+#define VIDEO_GET_INFO_PU_CONTRACT_CONTROL 0x8623U
+#define VIDEO_GET_INFO_PU_GAIN_CONTROL 0x8624U
+#define VIDEO_GET_INFO_PU_POWER_LINE_FREQUENCY_CONTROL 0x8625U
+#define VIDEO_GET_INFO_PU_HUE_CONTROL 0x8626U
+#define VIDEO_GET_INFO_PU_SATURATION_CONTROL 0x8627U
+#define VIDEO_GET_INFO_PU_SHARRNESS_CONTROL 0x8628U
+#define VIDEO_GET_INFO_PU_GAMMA_CONTROL 0x8629U
+#define VIDEO_GET_INFO_PU_WHITE_BALANCE_TEMPERATURE_CONTROL 0x862AU
+#define VIDEO_GET_INFO_PU_WHITE_BALANCE_TEMPERATURE_AUTO_CONTROL 0x862BU
+#define VIDEO_GET_INFO_PU_WHITE_BALANCE_COMPONENT_CONTROL 0x862CU
+#define VIDEO_GET_INFO_PU_WHITE_BALANCE_COMPONENT_AUTO_CONTROL 0x862DU
+#define VIDEO_GET_INFO_PU_DIGITAL_MULTIPLIER_CONTROL 0x862EU
+#define VIDEO_GET_INFO_PU_DIGITAL_MULTIPLIER_LIMIT_CONTROL 0x862FU
+#define VIDEO_GET_INFO_PU_HUE_AUTO_CONTROL 0x8630U
+#define VIDEO_GET_INFO_PU_ANALOG_VIDEO_STANDARD_CONTROL 0x8631U
+#define VIDEO_GET_INFO_PU_ANALOG_LOCK_STATUS_CONTROL 0x8632U
+#if defined(USB_DEVICE_VIDEO_CLASS_VERSION_1_5) && USB_DEVICE_VIDEO_CLASS_VERSION_1_5
+#define VIDEO_GET_INFO_PU_CONTRAST_AUTO_CONTROL 0x8633U
+#endif
+
+#define VIDEO_GET_INFO_CT_SCANNING_MODE_CONTROL 0x8641U
+#define VIDEO_GET_INFO_CT_AE_MODE_CONTROL 0x8642U
+#define VIDEO_GET_INFO_CT_AE_PRIORITY_CONTROL 0x8643U
+#define VIDEO_GET_INFO_CT_EXPOSURE_TIME_ABSOLUTE_CONTROL 0x8644U
+#define VIDEO_GET_INFO_CT_EXPOSURE_TIME_RELATIVE_CONTROL 0x8645U
+#define VIDEO_GET_INFO_CT_FOCUS_ABSOLUTE_CONTROL 0x8646U
+#define VIDEO_GET_INFO_CT_FOCUS_RELATIVE_CONTROL 0x8647U
+#define VIDEO_GET_INFO_CT_FOCUS_AUTO_CONTROL 0x8648U
+#define VIDEO_GET_INFO_CT_IRIS_ABSOLUTE_CONTROL 0x8649U
+#define VIDEO_GET_INFO_CT_IRIS_RELATIVE_CONTROL 0x864AU
+#define VIDEO_GET_INFO_CT_ZOOM_ABSOLUTE_CONTROL 0x864BU
+#define VIDEO_GET_INFO_CT_ZOOM_RELATIVE_CONTROL 0x864CU
+#define VIDEO_GET_INFO_CT_PANTILT_ABSOLUTE_CONTROL 0x864DU
+#define VIDEO_GET_INFO_CT_PANTILT_RELATIVE_CONTROL 0x864EU
+#define VIDEO_GET_INFO_CT_ROLL_ABSOLUTE_CONTROL 0x864FU
+#define VIDEO_GET_INFO_CT_ROLL_RELATIVE_CONTROL 0x8650U
+#define VIDEO_GET_INFO_CT_PRIVACY_CONTROL 0x8651U
+#if defined(USB_DEVICE_VIDEO_CLASS_VERSION_1_5) && USB_DEVICE_VIDEO_CLASS_VERSION_1_5
+#define VIDEO_GET_INFO_CT_FOCUS_SIMPLE_CONTROL 0x8652U
+#endif
+
+#define VIDEO_GET_INFO_VS_PROBE_CONTROL 0x8661U
+#define VIDEO_GET_INFO_VS_COMMIT_CONTROL 0x8662U
+#define VIDEO_GET_INFO_VS_STILL_PROBE_CONTROL 0x8663U
+#define VIDEO_GET_INFO_VS_STILL_COMMIT_CONTROL 0x8664U
+#define VIDEO_GET_INFO_VS_STILL_IMAGE_TRIGGER_CONTROL 0x8665U
+#define VIDEO_GET_INFO_VS_STREAM_ERROR_CODE_CONTROL 0x8666U
+#define VIDEO_GET_INFO_VS_GENERATE_KEY_FRAME_CONTROL 0x8667U
+#define VIDEO_GET_INFO_VS_UPDATE_FRAME_SEGMENT_CONTROL 0x8668U
+#define VIDEO_GET_INFO_VS_SYNCH_DELAY_CONTROL 0x8669U
+
+#if defined(USB_DEVICE_VIDEO_CLASS_VERSION_1_5) && USB_DEVICE_VIDEO_CLASS_VERSION_1_5
+#define VIDEO_GET_INFO_EU_SELECT_LAYER_CONTROL 0x8681U
+#define VIDEO_GET_INFO_EU_PROFILE_TOOLSET_CONTROL 0x8682U
+#define VIDEO_GET_INFO_EU_VIDEO_RESOLUTION_CONTROL 0x8683U
+#define VIDEO_GET_INFO_EU_MIN_FRAME_INTERVAL_CONTROL 0x8684U
+#define VIDEO_GET_INFO_EU_SLICE_MODE_CONTROL 0x8685U
+#define VIDEO_GET_INFO_EU_RATE_CONTROL_MODE_CONTROL 0x8686U
+#define VIDEO_GET_INFO_EU_AVERAGE_BITRATE_CONTROL 0x8687U
+#define VIDEO_GET_INFO_EU_CPB_SIZE_CONTROL 0x8688U
+#define VIDEO_GET_INFO_EU_PEAK_BIT_RATE_CONTROL 0x8689U
+#define VIDEO_GET_INFO_EU_QUANTIZATION_PARAMS_CONTROL 0x868AU
+#define VIDEO_GET_INFO_EU_SYNC_REF_FRAME_CONTROL 0x868BU
+#define VIDEO_GET_INFO_EU_LTR_BUFFER_CONTROL 0x868CU
+#define VIDEO_GET_INFO_EU_LTR_PICTURE_CONTROL 0x868DU
+#define VIDEO_GET_INFO_EU_LTR_VALIDATION_CONTROL 0x868EU
+#define VIDEO_GET_INFO_EU_SEI_PAYLOADTYPE_CONTROL 0x8690U
+#define VIDEO_GET_INFO_EU_QP_RANGE_CONTROL 0x8691U
+#define VIDEO_GET_INFO_EU_PRIORITY_CONTROL 0x8692U
+#define VIDEO_GET_INFO_EU_START_OR_STOP_LAYER_CONTROL 0x8693U
+#endif
+
+/*! @brief Video device class-specific request GET DEF COMMAND */
+#define VIDEO_GET_DEF_PU_BACKLIGHT_COMPENSATION_CONTROL 0x8721U
+#define VIDEO_GET_DEF_PU_BRIGHTNESS_CONTROL 0x8722U
+#define VIDEO_GET_DEF_PU_CONTRACT_CONTROL 0x8723U
+#define VIDEO_GET_DEF_PU_GAIN_CONTROL 0x8724U
+#define VIDEO_GET_DEF_PU_POWER_LINE_FREQUENCY_CONTROL 0x8725U
+#define VIDEO_GET_DEF_PU_HUE_CONTROL 0x8726U
+#define VIDEO_GET_DEF_PU_SATURATION_CONTROL 0x8727U
+#define VIDEO_GET_DEF_PU_SHARRNESS_CONTROL 0x8728U
+#define VIDEO_GET_DEF_PU_GAMMA_CONTROL 0x8729U
+#define VIDEO_GET_DEF_PU_WHITE_BALANCE_TEMPERATURE_CONTROL 0x872AU
+#define VIDEO_GET_DEF_PU_WHITE_BALANCE_TEMPERATURE_AUTO_CONTROL 0x872BU
+#define VIDEO_GET_DEF_PU_WHITE_BALANCE_COMPONENT_CONTROL 0x872CU
+#define VIDEO_GET_DEF_PU_WHITE_BALANCE_COMPONENT_AUTO_CONTROL 0x872DU
+#define VIDEO_GET_DEF_PU_DIGITAL_MULTIPLIER_CONTROL 0x872EU
+#define VIDEO_GET_DEF_PU_DIGITAL_MULTIPLIER_LIMIT_CONTROL 0x872FU
+#define VIDEO_GET_DEF_PU_HUE_AUTO_CONTROL 0x8730U
+#if defined(USB_DEVICE_VIDEO_CLASS_VERSION_1_5) && USB_DEVICE_VIDEO_CLASS_VERSION_1_5
+#define VIDEO_GET_DEF_PU_CONTRAST_AUTO_CONTROL 0x8731U
+#endif
+
+#define VIDEO_GET_DEF_CT_AE_MODE_CONTROL 0x8742U
+#define VIDEO_GET_DEF_CT_EXPOSURE_TIME_ABSOLUTE_CONTROL 0x8744U
+#define VIDEO_GET_DEF_CT_FOCUS_ABSOLUTE_CONTROL 0x8746U
+#define VIDEO_GET_DEF_CT_FOCUS_RELATIVE_CONTROL 0x8747U
+#define VIDEO_GET_DEF_CT_FOCUS_AUTO_CONTROL 0x8748U
+#define VIDEO_GET_DEF_CT_IRIS_ABSOLUTE_CONTROL 0x8749U
+#define VIDEO_GET_DEF_CT_ZOOM_ABSOLUTE_CONTROL 0x874BU
+#define VIDEO_GET_DEF_CT_ZOOM_RELATIVE_CONTROL 0x874CU
+#define VIDEO_GET_DEF_CT_PANTILT_ABSOLUTE_CONTROL 0x874DU
+#define VIDEO_GET_DEF_CT_PANTILT_RELATIVE_CONTROL 0x874EU
+#define VIDEO_GET_DEF_CT_ROLL_ABSOLUTE_CONTROL 0x874FU
+#define VIDEO_GET_DEF_CT_ROLL_RELATIVE_CONTROL 0x8750U
+#if defined(USB_DEVICE_VIDEO_CLASS_VERSION_1_5) && USB_DEVICE_VIDEO_CLASS_VERSION_1_5
+#define VIDEO_GET_DEF_CT_FOCUS_SIMPLE_CONTROL 0x8751U
+#define VIDEO_GET_DEF_CT_DIGITAL_WINDOW_CONTROL 0x8752U
+#define VIDEO_GET_DEF_CT_REGION_OF_INTEREST_CONTROL 0x8753U
+#endif
+
+#define VIDEO_GET_DEF_VS_PROBE_CONTROL 0x8761U
+#define VIDEO_GET_DEF_VS_STILL_PROBE_CONTROL 0x8763U
+#define VIDEO_GET_DEF_VS_UPDATE_FRAME_SEGMENT_CONTROL 0x8768U
+#define VIDEO_GET_DEF_VS_SYNCH_DELAY_CONTROL 0x8769U
+
+#if defined(USB_DEVICE_VIDEO_CLASS_VERSION_1_5) && USB_DEVICE_VIDEO_CLASS_VERSION_1_5
+#define VIDEO_GET_DEF_EU_PROFILE_TOOLSET_CONTROL 0x8782U
+#define VIDEO_GET_DEF_EU_VIDEO_RESOLUTION_CONTROL 0x8783U
+#define VIDEO_GET_DEF_EU_MIN_FRAME_INTERVAL_CONTROL 0x8784U
+#define VIDEO_GET_DEF_EU_SLICE_MODE_CONTROL 0x8785U
+#define VIDEO_GET_DEF_EU_RATE_CONTROL_MODE_CONTROL 0x8786U
+#define VIDEO_GET_DEF_EU_AVERAGE_BITRATE_CONTROL 0x8787U
+#define VIDEO_GET_DEF_EU_CPB_SIZE_CONTROL 0x8788U
+#define VIDEO_GET_DEF_EU_PEAK_BIT_RATE_CONTROL 0x8789U
+#define VIDEO_GET_DEF_EU_QUANTIZATION_PARAMS_CONTROL 0x878AU
+#define VIDEO_GET_DEF_EU_LTR_BUFFER_CONTROL 0x878CU
+#define VIDEO_GET_DEF_EU_LTR_PICTURE_CONTROL 0x878DU
+#define VIDEO_GET_DEF_EU_LTR_VALIDATION_CONTROL 0x878EU
+#define VIDEO_GET_DEF_EU_LEVEL_IDC_LIMIT_CONTROL 0x878FU
+#define VIDEO_GET_DEF_EU_SEI_PAYLOADTYPE_CONTROL 0x8790U
+#define VIDEO_GET_DEF_EU_QP_RANGE_CONTROL 0x8791U
+#define VIDEO_GET_DEF_EU_ERROR_RESILIENCY_CONTROL 0x8794U
+#endif
+
+/*! @brief Video device class-specific request SET CUR COMMAND */
+#define VIDEO_SET_CUR_VC_POWER_MODE_CONTROL 0x0101U
+
+#define VIDEO_SET_CUR_PU_BACKLIGHT_COMPENSATION_CONTROL 0x0121U
+#define VIDEO_SET_CUR_PU_BRIGHTNESS_CONTROL 0x0122U
+#define VIDEO_SET_CUR_PU_CONTRACT_CONTROL 0x0123U
+#define VIDEO_SET_CUR_PU_GAIN_CONTROL 0x0124U
+#define VIDEO_SET_CUR_PU_POWER_LINE_FREQUENCY_CONTROL 0x0125U
+#define VIDEO_SET_CUR_PU_HUE_CONTROL 0x0126U
+#define VIDEO_SET_CUR_PU_SATURATION_CONTROL 0x0127U
+#define VIDEO_SET_CUR_PU_SHARRNESS_CONTROL 0x0128U
+#define VIDEO_SET_CUR_PU_GAMMA_CONTROL 0x0129U
+#define VIDEO_SET_CUR_PU_WHITE_BALANCE_TEMPERATURE_CONTROL 0x012AU
+#define VIDEO_SET_CUR_PU_WHITE_BALANCE_TEMPERATURE_AUTO_CONTROL 0x012BU
+#define VIDEO_SET_CUR_PU_WHITE_BALANCE_COMPONENT_CONTROL 0x012CU
+#define VIDEO_SET_CUR_PU_WHITE_BALANCE_COMPONENT_AUTO_CONTROL 0x012DU
+#define VIDEO_SET_CUR_PU_DIGITAL_MULTIPLIER_CONTROL 0x012EU
+#define VIDEO_SET_CUR_PU_DIGITAL_MULTIPLIER_LIMIT_CONTROL 0x012FU
+#define VIDEO_SET_CUR_PU_HUE_AUTO_CONTROL 0x0130U
+#if defined(USB_DEVICE_VIDEO_CLASS_VERSION_1_5) && USB_DEVICE_VIDEO_CLASS_VERSION_1_5
+#define VIDEO_SET_CUR_PU_CONTRAST_AUTO_CONTROL 0x0131U
+#endif
+
+#define VIDEO_SET_CUR_CT_SCANNING_MODE_CONTROL 0x0141U
+#define VIDEO_SET_CUR_CT_AE_MODE_CONTROL 0x0142U
+#define VIDEO_SET_CUR_CT_AE_PRIORITY_CONTROL 0x0143U
+#define VIDEO_SET_CUR_CT_EXPOSURE_TIME_ABSOLUTE_CONTROL 0x0144U
+#define VIDEO_SET_CUR_CT_EXPOSURE_TIME_RELATIVE_CONTROL 0x0145U
+#define VIDEO_SET_CUR_CT_FOCUS_ABSOLUTE_CONTROL 0x0146U
+#define VIDEO_SET_CUR_CT_FOCUS_RELATIVE_CONTROL 0x0147U
+#define VIDEO_SET_CUR_CT_FOCUS_AUTO_CONTROL 0x0148U
+#define VIDEO_SET_CUR_CT_IRIS_ABSOLUTE_CONTROL 0x0149U
+#define VIDEO_SET_CUR_CT_IRIS_RELATIVE_CONTROL 0x014AU
+#define VIDEO_SET_CUR_CT_ZOOM_ABSOLUTE_CONTROL 0x014BU
+#define VIDEO_SET_CUR_CT_ZOOM_RELATIVE_CONTROL 0x014CU
+#define VIDEO_SET_CUR_CT_PANTILT_ABSOLUTE_CONTROL 0x014DU
+#define VIDEO_SET_CUR_CT_PANTILT_RELATIVE_CONTROL 0x014EU
+#define VIDEO_SET_CUR_CT_ROLL_ABSOLUTE_CONTROL 0x014FU
+#define VIDEO_SET_CUR_CT_ROLL_RELATIVE_CONTROL 0x0150U
+#define VIDEO_SET_CUR_CT_PRIVACY_CONTROL 0x0151U
+#if defined(USB_DEVICE_VIDEO_CLASS_VERSION_1_5) && USB_DEVICE_VIDEO_CLASS_VERSION_1_5
+#define VIDEO_SET_CUR_CT_FOCUS_SIMPLE_CONTROL 0x0152U
+#define VIDEO_SET_CUR_CT_DIGITAL_WINDOW_CONTROL 0x0153U
+#define VIDEO_SET_CUR_CT_REGION_OF_INTEREST_CONTROL 0x0154U
+#endif
+
+#define VIDEO_SET_CUR_VS_PROBE_CONTROL 0x0161U
+#define VIDEO_SET_CUR_VS_COMMIT_CONTROL 0x0162U
+#define VIDEO_SET_CUR_VS_STILL_PROBE_CONTROL 0x0163U
+#define VIDEO_SET_CUR_VS_STILL_COMMIT_CONTROL 0x0164U
+#define VIDEO_SET_CUR_VS_STILL_IMAGE_TRIGGER_CONTROL 0x0165U
+#define VIDEO_SET_CUR_VS_STREAM_ERROR_CODE_CONTROL 0x0166U
+#define VIDEO_SET_CUR_VS_GENERATE_KEY_FRAME_CONTROL 0x0167U
+#define VIDEO_SET_CUR_VS_UPDATE_FRAME_SEGMENT_CONTROL 0x0168U
+#define VIDEO_SET_CUR_VS_SYNCH_DELAY_CONTROL 0x0169U
+
+#if defined(USB_DEVICE_VIDEO_CLASS_VERSION_1_5) && USB_DEVICE_VIDEO_CLASS_VERSION_1_5
+#define VIDEO_SET_CUR_EU_SELECT_LAYER_CONTROL 0x0181U
+#define VIDEO_SET_CUR_EU_PROFILE_TOOLSET_CONTROL 0x0182U
+#define VIDEO_SET_CUR_EU_VIDEO_RESOLUTION_CONTROL 0x0183U
+#define VIDEO_SET_CUR_EU_MIN_FRAME_INTERVAL_CONTROL 0x0184U
+#define VIDEO_SET_CUR_EU_SLICE_MODE_CONTROL 0x0185U
+#define VIDEO_SET_CUR_EU_RATE_CONTROL_MODE_CONTROL 0x0186U
+#define VIDEO_SET_CUR_EU_AVERAGE_BITRATE_CONTROL 0x0187U
+#define VIDEO_SET_CUR_EU_CPB_SIZE_CONTROL 0x0188U
+#define VIDEO_SET_CUR_EU_PEAK_BIT_RATE_CONTROL 0x0189U
+#define VIDEO_SET_CUR_EU_QUANTIZATION_PARAMS_CONTROL 0x018AU
+#define VIDEO_SET_CUR_EU_SYNC_REF_FRAME_CONTROL 0x018BU
+#define VIDEO_SET_CUR_EU_LTR_BUFFER_CONTROL 0x018CU
+#define VIDEO_SET_CUR_EU_LTR_PICTURE_CONTROL 0x018DU
+#define VIDEO_SET_CUR_EU_LTR_VALIDATION_CONTROL 0x018EU
+#define VIDEO_SET_CUR_EU_LEVEL_IDC_LIMIT_CONTROL 0x018FU
+#define VIDEO_SET_CUR_EU_SEI_PAYLOADTYPE_CONTROL 0x0190U
+#define VIDEO_SET_CUR_EU_QP_RANGE_CONTROL 0x0191U
+#define VIDEO_SET_CUR_EU_PRIORITY_CONTROL 0x0192U
+#define VIDEO_SET_CUR_EU_START_OR_STOP_LAYER_CONTROL 0x0193U
+#define VIDEO_SET_CUR_EU_ERROR_RESILIENCY_CONTROL 0x0194U
+#endif
+
+/*! @brief The payload header structure for MJPEG payload format. */
+struct video_mjpeg_payload_header
+{
+    uint8_t bHeaderLength; /*!< The payload header length. */
+    union
+    {
+        uint8_t bmheaderInfo; /*!< The payload header bitmap field. */
+        struct
+        {
+            uint8_t frameIdentifier : 1U; /*!< Frame Identifier. This bit toggles at each frame start boundary and stays
+                                             constant for the rest of the frame.*/
+            uint8_t endOfFrame : 1U; /*!< End of Frame. This bit indicates the end of a video frame and is set in the
+                                        last video sample that belongs to a frame.*/
+            uint8_t
+                presentationTimeStamp : 1U; /*!< Presentation Time Stamp. This bit, when set, indicates the presence of
+                                               a PTS field.*/
+            uint8_t sourceClockReference : 1U; /*!< Source Clock Reference. This bit, when set, indicates the presence
+                                                  of a SCR field.*/
+            uint8_t reserved : 1U;             /*!< Reserved. Set to 0. */
+            uint8_t stillImage : 1U;  /*!< Still Image. This bit, when set, identifies a video sample that belongs to a
+                                         still image.*/
+            uint8_t errorBit : 1U;    /*!< Error Bit. This bit, when set, indicates an error in the device streaming.*/
+            uint8_t endOfHeader : 1U; /*!< End of Header. This bit, when set, indicates the end of the BFH fields.*/
+        } headerInfoBits;
+        struct
+        {
+            uint8_t FID : 1U; /*!< Frame Identifier. This bit toggles at each frame start boundary and stays constant
+                                 for the rest of the frame.*/
+            uint8_t EOI : 1U; /*!< End of Frame. This bit indicates the end of a video frame and is set in the last
+                                 video sample that belongs to a frame.*/
+            uint8_t PTS : 1U; /*!< Presentation Time Stamp. This bit, when set, indicates the presence of a PTS field.*/
+            uint8_t SCR : 1U; /*!< Source Clock Reference. This bit, when set, indicates the presence of a SCR field.*/
+            uint8_t RES : 1U; /*!< Reserved. Set to 0. */
+            uint8_t STI : 1U; /*!< Still Image. This bit, when set, identifies a video sample that belongs to a still
+                                 image.*/
+            uint8_t ERR : 1U; /*!< Error Bit. This bit, when set, indicates an error in the device streaming.*/
+            uint8_t EOH : 1U; /*!< End of Header. This bit, when set, indicates the end of the BFH fields.*/
+        } headerInfoBitmap;
+    } headerInfoUnion;
+    uint32_t dwPresentationTime;      /*!< Presentation time stamp (PTS) field.*/
+    uint8_t bSourceClockReference[6]; /*!< Source clock reference (SCR) field.*/
+} __packed;
+
+/*! @brief The Video probe and commit controls structure.*/
+struct video_probe_and_commit_controls
+{
+    union
+    {
+        uint8_t bmHint; /*!< Bit-field control indicating to the function what fields shall be kept fixed. */
+        struct
+        {
+            uint8_t dwFrameInterval : 1U; /*!< dwFrameInterval field.*/
+            uint8_t wKeyFrameRate : 1U;   /*!< wKeyFrameRate field.*/
+            uint8_t wPFrameRate : 1U;     /*!< wPFrameRate field.*/
+            uint8_t wCompQuality : 1U;    /*!< wCompQuality field.*/
+            uint8_t wCompWindowSize : 1U; /*!< wCompWindowSize field.*/
+            uint8_t reserved : 3U;        /*!< Reserved field.*/
+        } hintBitmap;
+    } hintUnion;
+    union
+    {
+        uint8_t bmHint; /*!< Bit-field control indicating to the function what fields shall be kept fixed. */
+        struct
+        {
+            uint8_t reserved : 8U; /*!< Reserved field.*/
+        } hintBitmap;
+    } hintUnion1;
+    uint8_t bFormatIndex;     /*!< Video format index from a format descriptor.*/
+    uint8_t bFrameIndex;      /*!< Video frame index from a frame descriptor.*/
+    uint32_t dwFrameInterval; /*!< Frame interval in 100ns units.*/
+    uint16_t wKeyFrameRate;   /*!< Key frame rate in key-frame per video-frame units.*/
+    uint16_t wPFrameRate;     /*!< PFrame rate in PFrame/key frame units.*/
+    uint16_t wCompQuality;    /*!< Compression quality control in abstract units 0U (lowest) to 10000U (highest).*/
+    uint16_t wCompWindowSize; /*!< Window size for average bit rate control.*/
+    uint16_t wDelay; /*!< Internal video streaming interface latency in ms from video data capture to presentation on
+                        the USB.*/
+    uint32_t dwMaxVideoFrameSize;      /*!< Maximum video frame or codec-specific segment size in bytes.*/
+    uint32_t dwMaxPayloadTransferSize; /*!< Specifies the maximum number of bytes that the device can transmit or
+                                          receive in a single payload transfer.*/
+    uint32_t dwClockFrequency; /*!< The device clock frequency in Hz for the specified format. This specifies the
+                                  units used for the time information fields in the Video Payload Headers in the data
+                                  stream.*/
+    uint8_t bmFramingInfo;     /*!< Bit-field control supporting the following values: D0 Frame ID, D1 EOF.*/
+    uint8_t bPreferedVersion;  /*!< The preferred payload format version supported by the host or device for the
+                                  specified bFormatIndex value.*/
+    uint8_t bMinVersion; /*!< The minimum payload format version supported by the device for the specified bFormatIndex
+                            value.*/
+    uint8_t bMaxVersion; /*!< The maximum payload format version supported by the device for the specified bFormatIndex
+                            value.*/
+#if defined(USB_DEVICE_VIDEO_CLASS_VERSION_1_5) && USB_DEVICE_VIDEO_CLASS_VERSION_1_5
+    uint8_t bUsage; /*!< This bitmap enables features reported by the bmUsages field of the Video Frame Descriptor.*/
+    uint8_t
+        bBitDepthLuma;  /*!< Represents bit_depth_luma_minus8 + 8U, which must be the same as bit_depth_chroma_minus8 +
+                           8.*/
+    uint8_t bmSettings; /*!< A bitmap of flags that is used to discover and control specific features of a temporally
+                           encoded video stream.*/
+    uint8_t bMaxNumberOfRefFramesPlus1; /*!< Host indicates the maximum number of frames stored for use as references.*/
+    uint16_t bmRateControlModes;        /*!< This field contains 4U sub-fields, each of which is a 4U bit number.*/
+    uint64_t bmLayoutPerStream;         /*!< This field contains 4U sub-fields, each of which is a 2U byte number.*/
+#endif
+} __packed;
+
+/*! @brief The Video still probe and still commit controls structure.*/
+struct video_still_probe_and_commit_controls
+{
+    uint8_t bFormatIndex;              /*!< Video format index from a format descriptor.*/
+    uint8_t bFrameIndex;               /*!< Video frame index from a frame descriptor.*/
+    uint8_t bCompressionIndex;         /*!< Compression index from a frame descriptor.*/
+    uint32_t dwMaxVideoFrameSize;      /*!< Maximum still image size in bytes.*/
+    uint32_t dwMaxPayloadTransferSize; /*!< Specifies the maximum number of bytes that the device can transmit or
+                                          receive in a single payload transfer.*/
+} __packed;
+
+void usbd_video_isoch_in(uint8_t ep);
+void usbd_video_class_init(const char *name,uint8_t in_ep);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* USB_VIDEO_H_ */
diff --git a/components/usb_stack/class/webusb/usbd_webusb.c b/components/usb_stack/class/webusb/usbd_webusb.c
new file mode 100644
index 00000000..dfa72a4f
--- /dev/null
+++ b/components/usb_stack/class/webusb/usbd_webusb.c
@@ -0,0 +1,2 @@
+#include "usbd_core.h"
+#include "usbd_webusb.h"
\ No newline at end of file
diff --git a/components/usb_stack/class/webusb/usbd_webusb.h b/components/usb_stack/class/webusb/usbd_webusb.h
new file mode 100644
index 00000000..763b56b4
--- /dev/null
+++ b/components/usb_stack/class/webusb/usbd_webusb.h
@@ -0,0 +1,37 @@
+#ifndef _USBD_WEBUSB_H
+#define _USBD_WEBUSB_H
+
+/* WebUSB Descriptor Types */
+#define WEBUSB_DESCRIPTOR_SET_HEADER_TYPE       0x00
+#define WEBUSB_CONFIGURATION_SUBSET_HEADER_TYPE 0x01
+#define WEBUSB_FUNCTION_SUBSET_HEADER_TYPE      0x02
+#define WEBUSB_URL_TYPE                         0x03
+
+/* WebUSB Request Codes */
+#define WEBUSB_REQUEST_GET_URL                  0x02
+
+/* bScheme in URL descriptor */
+#define WEBUSB_URL_SCHEME_HTTP                  0x00
+#define WEBUSB_URL_SCHEME_HTTPS                 0x01
+
+/* WebUSB Descriptor sizes */
+#define WEBUSB_DESCRIPTOR_SET_HEADER_SIZE       5
+#define WEBUSB_CONFIGURATION_SUBSET_HEADER_SIZE 4
+#define WEBUSB_FUNCTION_SUBSET_HEADER_SIZE      3
+
+/* BOS Capability webusb */
+struct usb_bos_webusb_platform_capability_descriptor {
+	struct usb_bos_capability_descriptor webusb_platform;
+	uint16_t bcdVersion;
+	uint8_t bVendorCode;
+	uint8_t iLandingPage;
+} __packed;
+
+struct webusb_url_descriptor{
+    uint8_t  bLength;
+    uint8_t  bDescriptorType;
+    uint8_t  bScheme;
+    char URL[];
+} __packed;
+
+#endif
\ No newline at end of file
diff --git a/components/usb_stack/class/winusb/usbd_winusb.c b/components/usb_stack/class/winusb/usbd_winusb.c
new file mode 100644
index 00000000..adad4899
--- /dev/null
+++ b/components/usb_stack/class/winusb/usbd_winusb.c
@@ -0,0 +1,289 @@
+#include "usbd_core.h"
+
+#define WCID_VENDOR_CODE 0x17
+
+__ALIGN_BEGIN const uint8_t  WCID_StringDescriptor_MSOS [18] __ALIGN_END = {
+  ///////////////////////////////////////
+  /// MS OS string descriptor
+  ///////////////////////////////////////
+  0x12,                                             /* bLength */
+  USB_DESCRIPTOR_TYPE_STRING,                       /* bDescriptorType */
+  /* MSFT100 */
+  'M', 0x00, 'S', 0x00, 'F', 0x00, 'T', 0x00,       /* wcChar_7 */
+  '1', 0x00, '0', 0x00, '0', 0x00,                  /* wcChar_7 */
+  WCID_VENDOR_CODE,                                 /* bVendorCode */
+  0x00,                                             /* bReserved */
+};
+__ALIGN_BEGIN const uint8_t WINUSB_WCIDDescriptor [88] __ALIGN_END = {
+  ///////////////////////////////////////
+  /// WCID descriptor
+  ///////////////////////////////////////
+  0x58, 0x00, 0x00, 0x00,                           /* dwLength */
+  0x00, 0x01,                                       /* bcdVersion */
+  0x04, 0x00,                                       /* wIndex */
+  0x03,                                             /* bCount */
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,         /* bReserved_7 */
+  
+  ///////////////////////////////////////
+  /// WCID function descriptor
+  ///////////////////////////////////////
+  0x00,                                             /* bFirstInterfaceNumber */
+  0x01,                                             /* bReserved */
+  /* WINUSB */
+  'W', 'I', 'N', 'U', 'S', 'B', 0x00, 0x00,         /* cCID_8 */
+  /*  */
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,   /* cSubCID_8 */
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00,               /* bReserved_6 */
+  
+  ///////////////////////////////////////
+  /// WCID function descriptor
+  ///////////////////////////////////////
+  0x01,                                             /* bFirstInterfaceNumber */
+  0x01,                                             /* bReserved */
+  /* WINUSB */
+  'W', 'I', 'N', 'U', 'S', 'B', 0x00, 0x00,         /* cCID_8 */
+  /*  */
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,   /* cSubCID_8 */
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00,               /* bReserved_6 */
+  
+  ///////////////////////////////////////
+  /// WCID function descriptor
+  ///////////////////////////////////////
+  0x02,                                             /* bFirstInterfaceNumber */
+  0x01,                                             /* bReserved */
+  /* WINUSB */
+  'W', 'I', 'N', 'U', 'S', 'B', 0x00, 0x00,         /* cCID_8 */
+  /*  */
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,   /* cSubCID_8 */
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00,               /* bReserved_6 */
+};
+__ALIGN_BEGIN const uint8_t WINUSB_IF0_WCIDProperties [142] __ALIGN_END = {
+  ///////////////////////////////////////
+  /// WCID property descriptor
+  ///////////////////////////////////////
+  0x8e, 0x00, 0x00, 0x00,                           /* dwLength */
+  0x00, 0x01,                                       /* bcdVersion */
+  0x05, 0x00,                                       /* wIndex */
+  0x01, 0x00,                                       /* wCount */
+  
+  ///////////////////////////////////////
+  /// registry propter descriptor
+  ///////////////////////////////////////
+  0x84, 0x00, 0x00, 0x00,                           /* dwSize */
+  0x01, 0x00, 0x00, 0x00,                           /* dwPropertyDataType */
+  0x28, 0x00,                                       /* wPropertyNameLength */
+  /* DeviceInterfaceGUID */
+  'D', 0x00, 'e', 0x00, 'v', 0x00, 'i', 0x00,       /* wcName_20 */
+  'c', 0x00, 'e', 0x00, 'I', 0x00, 'n', 0x00,       /* wcName_20 */
+  't', 0x00, 'e', 0x00, 'r', 0x00, 'f', 0x00,       /* wcName_20 */
+  'a', 0x00, 'c', 0x00, 'e', 0x00, 'G', 0x00,       /* wcName_20 */
+  'U', 0x00, 'I', 0x00, 'D', 0x00, 0x00, 0x00,      /* wcName_20 */
+  0x4e, 0x00, 0x00, 0x00,                           /* dwPropertyDataLength */
+  /* {1D4B2365-4749-48EA-B38A-7C6FDDDD7E26} */
+  '{', 0x00, '1', 0x00, 'D', 0x00, '4', 0x00,       /* wcData_39 */
+  'B', 0x00, '2', 0x00, '3', 0x00, '6', 0x00,       /* wcData_39 */
+  '5', 0x00, '-', 0x00, '4', 0x00, '7', 0x00,       /* wcData_39 */
+  '4', 0x00, '9', 0x00, '-', 0x00, '4', 0x00,       /* wcData_39 */
+  '8', 0x00, 'E', 0x00, 'A', 0x00, '-', 0x00,       /* wcData_39 */
+  'B', 0x00, '3', 0x00, '8', 0x00, 'A', 0x00,       /* wcData_39 */
+  '-', 0x00, '7', 0x00, 'C', 0x00, '6', 0x00,       /* wcData_39 */
+  'F', 0x00, 'D', 0x00, 'D', 0x00, 'D', 0x00,       /* wcData_39 */
+  'D', 0x00, '7', 0x00, 'E', 0x00, '2', 0x00,       /* wcData_39 */
+  '6', 0x00, '}', 0x00, 0x00, 0x00,                 /* wcData_39 */
+};
+
+struct usb_msosv1_descriptor msosv1_desc =
+{
+    .string = (uint8_t*)WCID_StringDescriptor_MSOS,
+    .string_len = 18,
+    .vendor_code = 0x03,
+    .compat_id = (uint8_t*)WINUSB_WCIDDescriptor,
+    .compat_id_len = sizeof(WINUSB_WCIDDescriptor)
+};
+
+#define  WINUSB20_WCID_DESC_SET_SIZE  (490)
+__ALIGN_BEGIN const uint8_t WINUSB20_WCIDDescriptorSet [490] __ALIGN_END = {
+  ///////////////////////////////////////
+  /// WCID20 descriptor set descriptor
+  ///////////////////////////////////////
+  0x0a, 0x00,                                       /* wLength */
+  0x00, 0x00,                                       /* wDescriptorType */
+  0x00, 0x00, 0x03, 0x06,                           /* dwWindowsVersion */
+  0xea, 0x01,                                       /* wDescriptorSetTotalLength */
+  
+  ///////////////////////////////////////
+  /// WCID20 function subset descriptor
+  ///////////////////////////////////////
+  0x08, 0x00,                                       /* wLength */
+  0x02, 0x00,                                       /* wDescriptorType */
+  0x00,                                             /* bFirstInterface */
+  0x00,                                             /* bReserved */
+  0xa0, 0x00,                                       /* wSubsetLength */
+  
+  ///////////////////////////////////////
+  /// WCID20 compatible ID descriptor
+  ///////////////////////////////////////
+  0x14, 0x00,                                       /* wLength */
+  0x03, 0x00,                                       /* wDescriptorType */
+  /* WINUSB */
+  'W', 'I', 'N', 'U', 'S', 'B', 0x00, 0x00,         /* cCID_8 */
+  /*  */
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,   /* cSubCID_8 */
+  
+  ///////////////////////////////////////
+  /// WCID20 registry property descriptor
+  ///////////////////////////////////////
+  0x84, 0x00,                                       /* wLength */
+  0x04, 0x00,                                       /* wDescriptorType */
+  0x07, 0x00,                                       /* wPropertyDataType */
+  0x2a, 0x00,                                       /* wPropertyNameLength */
+  /* DeviceInterfaceGUIDs */
+  'D', 0x00, 'e', 0x00, 'v', 0x00, 'i', 0x00,       /* wcPropertyName_21 */
+  'c', 0x00, 'e', 0x00, 'I', 0x00, 'n', 0x00,       /* wcPropertyName_21 */
+  't', 0x00, 'e', 0x00, 'r', 0x00, 'f', 0x00,       /* wcPropertyName_21 */
+  'a', 0x00, 'c', 0x00, 'e', 0x00, 'G', 0x00,       /* wcPropertyName_21 */
+  'U', 0x00, 'I', 0x00, 'D', 0x00, 's', 0x00,       /* wcPropertyName_21 */
+  0x00, 0x00,                                       /* wcPropertyName_21 */
+  0x50, 0x00,                                       /* wPropertyDataLength */
+  /* {1D4B2365-4749-48EA-B38A-7C6FDDDD7E26} */
+  '{', 0x00, '1', 0x00, 'D', 0x00, '4', 0x00,       /* wcPropertyData_40 */
+  'B', 0x00, '2', 0x00, '3', 0x00, '6', 0x00,       /* wcPropertyData_40 */
+  '5', 0x00, '-', 0x00, '4', 0x00, '7', 0x00,       /* wcPropertyData_40 */
+  '4', 0x00, '9', 0x00, '-', 0x00, '4', 0x00,       /* wcPropertyData_40 */
+  '8', 0x00, 'E', 0x00, 'A', 0x00, '-', 0x00,       /* wcPropertyData_40 */
+  'B', 0x00, '3', 0x00, '8', 0x00, 'A', 0x00,       /* wcPropertyData_40 */
+  '-', 0x00, '7', 0x00, 'C', 0x00, '6', 0x00,       /* wcPropertyData_40 */
+  'F', 0x00, 'D', 0x00, 'D', 0x00, 'D', 0x00,       /* wcPropertyData_40 */
+  'D', 0x00, '7', 0x00, 'E', 0x00, '2', 0x00,       /* wcPropertyData_40 */
+  '6', 0x00, '}', 0x00, 0x00, 0x00, 0x00, 0x00,     /* wcPropertyData_40 */
+  
+  ///////////////////////////////////////
+  /// WCID20 function subset descriptor
+  ///////////////////////////////////////
+  0x08, 0x00,                                       /* wLength */
+  0x02, 0x00,                                       /* wDescriptorType */
+  0x01,                                             /* bFirstInterface */
+  0x00,                                             /* bReserved */
+  0xa0, 0x00,                                       /* wSubsetLength */
+  
+  ///////////////////////////////////////
+  /// WCID20 compatible ID descriptor
+  ///////////////////////////////////////
+  0x14, 0x00,                                       /* wLength */
+  0x03, 0x00,                                       /* wDescriptorType */
+  /* WINUSB */
+  'W', 'I', 'N', 'U', 'S', 'B', 0x00, 0x00,         /* cCID_8 */
+  /*  */
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,   /* cSubCID_8 */
+  
+  ///////////////////////////////////////
+  /// WCID20 registry property descriptor
+  ///////////////////////////////////////
+  0x84, 0x00,                                       /* wLength */
+  0x04, 0x00,                                       /* wDescriptorType */
+  0x07, 0x00,                                       /* wPropertyDataType */
+  0x2a, 0x00,                                       /* wPropertyNameLength */
+  /* DeviceInterfaceGUIDs */
+  'D', 0x00, 'e', 0x00, 'v', 0x00, 'i', 0x00,       /* wcPropertyName_21 */
+  'c', 0x00, 'e', 0x00, 'I', 0x00, 'n', 0x00,       /* wcPropertyName_21 */
+  't', 0x00, 'e', 0x00, 'r', 0x00, 'f', 0x00,       /* wcPropertyName_21 */
+  'a', 0x00, 'c', 0x00, 'e', 0x00, 'G', 0x00,       /* wcPropertyName_21 */
+  'U', 0x00, 'I', 0x00, 'D', 0x00, 's', 0x00,       /* wcPropertyName_21 */
+  0x00, 0x00,                                       /* wcPropertyName_21 */
+  0x50, 0x00,                                       /* wPropertyDataLength */
+  /* {1D4B2365-4749-48EA-B38A-7C6FDDDD7E26} */
+  '{', 0x00, '1', 0x00, 'D', 0x00, '4', 0x00,       /* wcPropertyData_40 */
+  'B', 0x00, '2', 0x00, '3', 0x00, '6', 0x00,       /* wcPropertyData_40 */
+  '5', 0x00, '-', 0x00, '4', 0x00, '7', 0x00,       /* wcPropertyData_40 */
+  '4', 0x00, '9', 0x00, '-', 0x00, '4', 0x00,       /* wcPropertyData_40 */
+  '8', 0x00, 'E', 0x00, 'A', 0x00, '-', 0x00,       /* wcPropertyData_40 */
+  'B', 0x00, '3', 0x00, '8', 0x00, 'A', 0x00,       /* wcPropertyData_40 */
+  '-', 0x00, '7', 0x00, 'C', 0x00, '6', 0x00,       /* wcPropertyData_40 */
+  'F', 0x00, 'D', 0x00, 'D', 0x00, 'D', 0x00,       /* wcPropertyData_40 */
+  'D', 0x00, '7', 0x00, 'E', 0x00, '2', 0x00,       /* wcPropertyData_40 */
+  '6', 0x00, '}', 0x00, 0x00, 0x00, 0x00, 0x00,     /* wcPropertyData_40 */
+  
+  ///////////////////////////////////////
+  /// WCID20 function subset descriptor
+  ///////////////////////////////////////
+  0x08, 0x00,                                       /* wLength */
+  0x02, 0x00,                                       /* wDescriptorType */
+  0x02,                                             /* bFirstInterface */
+  0x00,                                             /* bReserved */
+  0xa0, 0x00,                                       /* wSubsetLength */
+  
+  ///////////////////////////////////////
+  /// WCID20 compatible ID descriptor
+  ///////////////////////////////////////
+  0x14, 0x00,                                       /* wLength */
+  0x03, 0x00,                                       /* wDescriptorType */
+  /* WINUSB */
+  'W', 'I', 'N', 'U', 'S', 'B', 0x00, 0x00,         /* cCID_8 */
+  /*  */
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,   /* cSubCID_8 */
+  
+  ///////////////////////////////////////
+  /// WCID20 registry property descriptor
+  ///////////////////////////////////////
+  0x84, 0x00,                                       /* wLength */
+  0x04, 0x00,                                       /* wDescriptorType */
+  0x07, 0x00,                                       /* wPropertyDataType */
+  0x2a, 0x00,                                       /* wPropertyNameLength */
+  /* DeviceInterfaceGUIDs */
+  'D', 0x00, 'e', 0x00, 'v', 0x00, 'i', 0x00,       /* wcPropertyName_21 */
+  'c', 0x00, 'e', 0x00, 'I', 0x00, 'n', 0x00,       /* wcPropertyName_21 */
+  't', 0x00, 'e', 0x00, 'r', 0x00, 'f', 0x00,       /* wcPropertyName_21 */
+  'a', 0x00, 'c', 0x00, 'e', 0x00, 'G', 0x00,       /* wcPropertyName_21 */
+  'U', 0x00, 'I', 0x00, 'D', 0x00, 's', 0x00,       /* wcPropertyName_21 */
+  0x00, 0x00,                                       /* wcPropertyName_21 */
+  0x50, 0x00,                                       /* wPropertyDataLength */
+  /* {1D4B2365-4749-48EA-B38A-7C6FDDDD7E26} */
+  '{', 0x00, '1', 0x00, 'D', 0x00, '4', 0x00,       /* wcPropertyData_40 */
+  'B', 0x00, '2', 0x00, '3', 0x00, '6', 0x00,       /* wcPropertyData_40 */
+  '5', 0x00, '-', 0x00, '4', 0x00, '7', 0x00,       /* wcPropertyData_40 */
+  '4', 0x00, '9', 0x00, '-', 0x00, '4', 0x00,       /* wcPropertyData_40 */
+  '8', 0x00, 'E', 0x00, 'A', 0x00, '-', 0x00,       /* wcPropertyData_40 */
+  'B', 0x00, '3', 0x00, '8', 0x00, 'A', 0x00,       /* wcPropertyData_40 */
+  '-', 0x00, '7', 0x00, 'C', 0x00, '6', 0x00,       /* wcPropertyData_40 */
+  'F', 0x00, 'D', 0x00, 'D', 0x00, 'D', 0x00,       /* wcPropertyData_40 */
+  'D', 0x00, '7', 0x00, 'E', 0x00, '2', 0x00,       /* wcPropertyData_40 */
+  '6', 0x00, '}', 0x00, 0x00, 0x00, 0x00, 0x00,     /* wcPropertyData_40 */
+};
+struct usb_msosv2_descriptor msosv2_desc = 
+{
+    .compat_id = (uint8_t*)WINUSB20_WCIDDescriptorSet,
+    .compat_id_len = 490
+};
+
+__ALIGN_BEGIN const uint8_t WINUSB20_WCIDBOS [33] __ALIGN_END = {
+  ///////////////////////////////////////
+  /// WCID20 BOS descriptor
+  ///////////////////////////////////////
+  0x05,                                             /* bLength */
+  USB_DESCRIPTOR_TYPE_BINARY_OBJECT_STORE,          /* bDescriptorType */
+  0x21, 0x00,                                       /* wTotalLength */
+  0x01,                                             /* bNumDeviceCaps */
+  
+  ///////////////////////////////////////
+  /// WCID20 device capability descriptor
+  ///////////////////////////////////////
+  0x1c,                                             /* bLength */
+  0x10,                                             /* bDescriptorType */
+  0x05,                                             /* bDevCapabilityType */
+  0x00,                                             /* bReserved */
+  0xdf, 0x60, 0xdd, 0xd8, 0x89, 0x45, 0xc7, 0x4c,   /* bPlatformCapabilityUUID_16 */
+  0x9c, 0xd2, 0x65, 0x9d, 0x9e, 0x64, 0x8a, 0x9f,   /* bPlatformCapabilityUUID_16 */
+  0x00, 0x00, 0x03, 0x06,                           /* dwWindowsVersion */
+  LO_BYTE(WINUSB20_WCID_DESC_SET_SIZE), HI_BYTE(WINUSB20_WCID_DESC_SET_SIZE),/* wDescriptorSetTotalLength */
+  WCID_VENDOR_CODE,                                 /* bVendorCode */
+  0x00,                                             /* bAltEnumCode */
+};
+
+// static struct usb_bos_descriptor wcid_bos= 
+// {
+//     .bos_id = (uint8_t*)WINUSB20_WCIDBOS,
+//     .bos_id_len = 33
+// };
+
+
+
diff --git a/components/usb_stack/class/winusb/usbd_winusb.h b/components/usb_stack/class/winusb/usbd_winusb.h
new file mode 100644
index 00000000..c8d8d2b1
--- /dev/null
+++ b/components/usb_stack/class/winusb/usbd_winusb.h
@@ -0,0 +1,57 @@
+#ifndef _USBD_WINUSB_H
+#define _USBD_WINUSB_H
+
+/* WinUSB Microsoft OS 2.0 descriptor request codes */
+#define WINUSB_REQUEST_GET_DESCRIPTOR_SET          0x07
+#define WINUSB_REQUEST_SET_ALT_ENUM                0x08
+
+/* WinUSB Microsoft OS 2.0 descriptor sizes */
+#define WINUSB_DESCRIPTOR_SET_HEADER_SIZE          10
+#define WINUSB_FUNCTION_SUBSET_HEADER_SIZE         8
+#define WINUSB_FEATURE_COMPATIBLE_ID_SIZE          20
+
+
+/* WinUSB Microsoft OS 2.0 Descriptor Types */
+#define WINUSB_SET_HEADER_DESCRIPTOR_TYPE           0x00
+#define WINUSB_SUBSET_HEADER_CONFIGURATION_TYPE     0x01
+#define WINUSB_SUBSET_HEADER_FUNCTION_TYPE          0x02
+#define WINUSB_FEATURE_COMPATIBLE_ID_TYPE           0x03
+#define WINUSB_FEATURE_REG_PROPERTY_TYPE            0x04
+#define WINUSB_FEATURE_MIN_RESUME_TIME_TYPE         0x05
+#define WINUSB_FEATURE_MODEL_ID_TYPE                0x06
+#define WINUSB_FEATURE_CCGP_DEVICE_TYPE             0x07
+
+
+#define WINUSB_PROP_DATA_TYPE_REG_SZ                0x01
+#define WINUSB_PROP_DATA_TYPE_REG_MULTI_SZ          0x07
+
+/* WebUSB Descriptor Types */
+#define WEBUSB_DESCRIPTOR_SET_HEADER_TYPE       0x00
+#define WEBUSB_CONFIGURATION_SUBSET_HEADER_TYPE 0x01
+#define WEBUSB_FUNCTION_SUBSET_HEADER_TYPE      0x02
+#define WEBUSB_URL_TYPE                         0x03
+
+/* WebUSB Request Codes */
+#define WEBUSB_REQUEST_GET_URL                  0x02
+
+/* bScheme in URL descriptor */
+#define WEBUSB_URL_SCHEME_HTTP                  0x00
+#define WEBUSB_URL_SCHEME_HTTPS                 0x01
+
+/* WebUSB Descriptor sizes */
+#define WEBUSB_DESCRIPTOR_SET_HEADER_SIZE       5
+#define WEBUSB_CONFIGURATION_SUBSET_HEADER_SIZE 4
+#define WEBUSB_FUNCTION_SUBSET_HEADER_SIZE      3
+
+
+/* WinUSB Microsoft OS 2.0 descriptor Platform Capability Descriptor */
+struct usb_bos_winusb_platform_capability_descriptor {
+	struct usb_bos_capability_descriptor winusb_platform;
+	uint32_t dwWindowsVersion;
+	uint16_t wMSOSDescriptorSetTotalLength;
+	uint8_t bMS_VendorCode;
+	uint8_t bAltEnumCode;
+} __packed;
+
+
+#endif
\ No newline at end of file
diff --git a/components/usb_stack/common/usb_dc.h b/components/usb_stack/common/usb_dc.h
new file mode 100644
index 00000000..0f77b89f
--- /dev/null
+++ b/components/usb_stack/common/usb_dc.h
@@ -0,0 +1,180 @@
+#ifndef _USB_DC_H
+#define _USB_DC_H
+
+#include "stdint.h"
+#include "bflb_platform.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief USB Device Controller API
+ * @defgroup _usb_device_controller_api USB Device Controller API
+ * @{
+ */
+/**< maximum packet size (MPS) for EP 0 */
+#define USB_CTRL_EP_MPS	64   
+/**
+ * USB endpoint Transfer Type mask.
+ */
+#define USBD_EP_TYPE_CTRL                                 0
+#define USBD_EP_TYPE_ISOC                                 1
+#define USBD_EP_TYPE_BULK                                 2
+#define USBD_EP_TYPE_INTR                                 3
+#define USBD_EP_TYPE_MASK                                 3
+
+/* Default USB control EP, always 0 and 0x80 */
+#define USB_CONTROL_OUT_EP0         0
+#define USB_CONTROL_IN_EP0          0x80
+
+/**
+ * @brief USB Endpoint Transfer Type
+ */
+enum usb_dc_ep_transfer_type {
+	/** Control type endpoint */
+	USB_DC_EP_CONTROL = 0,
+	/** Isochronous type endpoint */
+	USB_DC_EP_ISOCHRONOUS,
+	/** Bulk type endpoint */
+	USB_DC_EP_BULK,
+	/** Interrupt type endpoint  */
+	USB_DC_EP_INTERRUPT
+};
+
+/**
+ * @brief USB Endpoint Configuration.
+ *
+ * Structure containing the USB endpoint configuration.
+ */
+struct usbd_endpoint_cfg {
+	/** The number associated with the EP in the device
+	 *  configuration structure
+	 *       IN  EP = 0x80 | \
+	 *       OUT EP = 0x00 | \
+	 */
+	uint8_t ep_addr;
+	/** Endpoint max packet size */
+	uint16_t ep_mps;
+	/** Endpoint Transfer Type.
+	 * May be Bulk, Interrupt, Control or Isochronous
+	 */
+	enum usb_dc_ep_transfer_type ep_type;
+};
+
+/**
+ * @brief USB Device Core Layer API
+ * @defgroup _usb_device_core_api USB Device Core API
+ * @{
+ */
+
+/**
+ * @brief Set USB device address
+ *
+ * @param[in] addr Device address
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usbd_set_address(const uint8_t addr);
+
+/*
+ * @brief configure and enable endpoint
+ *
+ * This function sets endpoint configuration according to one specified in USB
+ * endpoint descriptor and then enables it for data transfers.
+ *
+ * @param [in]  ep_desc Endpoint descriptor byte array
+ *
+ * @return true if successfully configured and enabled
+ */
+int usbd_ep_open(const struct usbd_endpoint_cfg *ep_cfg);
+/**
+ * @brief Disable the selected endpoint
+ *
+ * Function to disable the selected endpoint. Upon success interrupts are
+ * disabled for the corresponding endpoint and the endpoint is no longer able
+ * for transmitting/receiving data.
+ *
+ * @param[in] ep Endpoint address corresponding to the one
+ *               listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usbd_ep_close(const uint8_t ep);
+/**
+ * @brief Set stall condition for the selected endpoint
+ *
+ * @param[in] ep Endpoint address corresponding to the one
+ *               listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usbd_ep_set_stall(const uint8_t ep);
+/**
+ * @brief Clear stall condition for the selected endpoint
+ *
+ * @param[in] ep Endpoint address corresponding to the one
+ *               listed in the device configuration table
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usbd_ep_clear_stall(const uint8_t ep);
+/**
+ * @brief Check if the selected endpoint is stalled
+ *
+ * @param[in]  ep       Endpoint address corresponding to the one
+ *                      listed in the device configuration table
+ * @param[out] stalled  Endpoint stall status
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usbd_ep_is_stalled(const uint8_t ep, uint8_t *stalled);
+/**
+ * @brief Write data to the specified endpoint
+ *
+ * This function is called to write data to the specified endpoint. The
+ * supplied usbd_endpoint_callback function will be called when data is transmitted
+ * out.
+ *
+ * @param[in]  ep        Endpoint address corresponding to the one
+ *                       listed in the device configuration table
+ * @param[in]  data      Pointer to data to write
+ * @param[in]  data_len  Length of the data requested to write. This may
+ *                       be zero for a zero length status packet.
+ * @param[out] ret_bytes Bytes scheduled for transmission. This value
+ *                       may be NULL if the application expects all
+ *                       bytes to be written
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usbd_ep_write(const uint8_t ep, const uint8_t *data, uint32_t data_len, uint32_t *ret_bytes);
+/**
+ * @brief Read data from the specified endpoint
+ *
+ * This is similar to usb_dc_ep_read, the difference being that, it doesn't
+ * clear the endpoint NAKs so that the consumer is not bogged down by further
+ * upcalls till he is done with the processing of the data. The caller should
+ * reactivate ep by invoking usb_dc_ep_read_continue() do so.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ * @param[in]  data         Pointer to data buffer to write to
+ * @param[in]  max_data_len Max length of data to read
+ * @param[out] read_bytes   Number of bytes read. If data is NULL and
+ *                          max_data_len is 0 the number of bytes
+ *                          available for read should be returned.
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+int usbd_ep_read(const uint8_t ep, uint8_t *data, uint32_t max_data_len,uint32_t *read_bytes);
+
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
diff --git a/components/usb_stack/common/usb_def.h b/components/usb_stack/common/usb_def.h
new file mode 100644
index 00000000..2599049d
--- /dev/null
+++ b/components/usb_stack/common/usb_def.h
@@ -0,0 +1,534 @@
+#ifndef USB_REQUEST_H
+#define USB_REQUEST_H
+
+/* Useful define */
+#define USB_1_1				0x0110
+#define USB_2_0				0x0200
+/* Set USB version to 2.1 so that the host will request the BOS descriptor */
+#define USB_2_1				0x0210
+
+// USB Speed
+#define USB_SPEED_LOW                    0U
+#define USB_SPEED_FULL                   1U
+#define USB_SPEED_HIGH                   2U
+
+// USB PID Types
+#define USB_PID_RESERVED                 0U
+#define USB_PID_OUT                      1U
+#define USB_PID_ACK                      2U
+#define USB_PID_DATA0                    3U
+#define USB_PID_PING                     4U
+#define USB_PID_SOF                      5U
+#define USB_PID_DATA2                    7U
+#define USB_PID_NYET                     6U
+#define USB_PID_SPLIT                    8U
+#define USB_PID_IN                       9U
+#define USB_PID_NAK                     10U
+#define USB_PID_DATA1                   11U
+#define USB_PID_PRE                     12U
+#define USB_PID_ERR                     12U
+#define USB_PID_SETUP                   13U
+#define USB_PID_STALL                   14U
+#define USB_PID_MDATA                   15U
+
+// bmRequestType.Dir
+#define USB_REQUEST_HOST_TO_DEVICE      0U
+#define USB_REQUEST_DEVICE_TO_HOST      1U
+
+// bmRequestType.Type
+#define USB_REQUEST_STANDARD            0U
+#define USB_REQUEST_CLASS               1U
+#define USB_REQUEST_VENDOR              2U
+#define USB_REQUEST_RESERVED            3U
+
+// bmRequestType.Recipient
+#define USB_REQUEST_TO_DEVICE           0U
+#define USB_REQUEST_TO_INTERFACE        1U
+#define USB_REQUEST_TO_ENDPOINT         2U
+#define USB_REQUEST_TO_OTHER            3U
+
+/* USB Standard Request Codes */
+#define USB_REQUEST_GET_STATUS              0x00
+#define USB_REQUEST_CLEAR_FEATURE           0x01
+#define USB_REQUEST_SET_FEATURE             0x03
+#define USB_REQUEST_SET_ADDRESS             0x05
+#define USB_REQUEST_GET_DESCRIPTOR          0x06
+#define USB_REQUEST_SET_DESCRIPTOR          0x07
+#define USB_REQUEST_GET_CONFIGURATION       0x08
+#define USB_REQUEST_SET_CONFIGURATION       0x09
+#define USB_REQUEST_GET_INTERFACE           0x0A
+#define USB_REQUEST_SET_INTERFACE           0x0B
+#define USB_REQUEST_SYNCH_FRAME             0x0C
+#define USB_REQUEST_SET_ENCRYPTION          0x0D
+#define USB_REQUEST_GET_ENCRYPTION          0x0E
+#define USB_REQUEST_RPIPE_ABORT             0x0E
+#define USB_REQUEST_SET_HANDSHAKE           0x0F
+#define USB_REQUEST_RPIPE_RESET             0x0F
+#define USB_REQUEST_GET_HANDSHAKE           0x10
+#define USB_REQUEST_SET_CONNECTION          0x11
+#define USB_REQUEST_SET_SECURITY_DATA       0x12
+#define USB_REQUEST_GET_SECURITY_DATA       0x13
+#define USB_REQUEST_SET_WUSB_DATA           0x14
+#define USB_REQUEST_LOOPBACK_DATA_WRITE     0x15
+#define USB_REQUEST_LOOPBACK_DATA_READ      0x16
+#define USB_REQUEST_SET_INTERFACE_DS        0x17
+
+/* USB GET_STATUS Bit Values */
+#define USB_GETSTATUS_SELF_POWERED 		0x01
+#define USB_GETSTATUS_REMOTE_WAKEUP 	0x02
+#define USB_GETSTATUS_ENDPOINT_STALL 	0x01
+
+/* USB Standard Feature selectors */
+#define USB_FEATURE_ENDPOINT_STALL 		0
+#define USB_FEATURE_REMOTE_WAKEUP 		1
+#define USB_FEATURE_TEST_MODE 			2
+
+/* Descriptor size in bytes */
+#define USB_DEVICE_DESC_SIZE			0x12
+#define USB_CONFIGURATION_DESC_SIZE		0x09
+#define USB_INTERFACE_DESC_SIZE			0x09
+#define USB_ENDPOINT_DESC_SIZE			0x07
+#define USB_LANGID_STRING_DESC_SIZE		0x04
+#define USB_OTHER_SPEED_DESC_SIZE		0x09
+#define USB_DEVICE_QUAL_DESC_SIZE		0x0A
+#define USB_INTERFACE_ASSOC_DESC_SIZE	0x08
+#define USB_FUNCTION_DESC_SIZE		    0x03
+#define USB_OTG_DESC_SIZE		    	0x03
+
+/* USB Descriptor Types */
+#define USB_DESCRIPTOR_TYPE_DEVICE					0x01U
+#define USB_DESCRIPTOR_TYPE_CONFIGURATION			0x02U
+#define USB_DESCRIPTOR_TYPE_STRING					0x03U
+#define USB_DESCRIPTOR_TYPE_INTERFACE				0x04U
+#define USB_DESCRIPTOR_TYPE_ENDPOINT				0x05U
+#define USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER		0x06U
+#define USB_DESCRIPTOR_TYPE_OTHER_SPEED				0x07U
+#define USB_DESCRIPTOR_TYPE_INTERFACE_POWER			0x08U
+#define USB_DESCRIPTOR_TYPE_OTG                     0x09U
+#define USB_DESCRIPTOR_TYPE_DEBUG                 	0x0AU
+#define USB_DESCRIPTOR_TYPE_INTERFACE_ASSOCIATION	0x0BU
+#define USB_DESCRIPTOR_TYPE_BINARY_OBJECT_STORE	    0x0FU
+#define USB_DESCRIPTOR_TYPE_DEVICE_CAPABILITY       0x10U
+
+#define USB_DESCRIPTOR_TYPE_FUNCTIONAL				0x21U
+
+// Class Specific Descriptor
+#define USB_CS_DESCRIPTOR_TYPE_DEVICE				0x21U
+#define USB_CS_DESCRIPTOR_TYPE_CONFIGURATION		0x22U
+#define USB_CS_DESCRIPTOR_TYPE_STRING				0x23U
+#define USB_CS_DESCRIPTOR_TYPE_INTERFACE			0x24U
+#define USB_CS_DESCRIPTOR_TYPE_ENDPOINT				0x25U
+
+#define USB_DESCRIPTOR_TYPE_SUPERSPEED_ENDPOINT_COMPANION			0x30U
+#define USB_DESCRIPTOR_TYPE_SUPERSPEED_ISO_ENDPOINT_COMPANION		0x31U
+
+/* USB Device Classes */
+#define USB_DEVICE_CLASS_RESERVED              0x00
+#define USB_DEVICE_CLASS_AUDIO                 0x01
+#define USB_DEVICE_CLASS_CDC                   0x02
+#define USB_DEVICE_CLASS_HID                   0x03
+#define USB_DEVICE_CLASS_MONITOR        	   0x04
+#define USB_DEVICE_CLASS_PHYSICAL              0x05
+#define USB_DEVICE_CLASS_IMAGE                 0x06
+#define USB_DEVICE_CLASS_PRINTER               0x07
+#define USB_DEVICE_CLASS_MASS_STORAGE          0x08
+#define USB_DEVICE_CLASS_HUB                   0x09
+#define USB_DEVICE_CLASS_CDC_DATA              0x0a
+#define USB_DEVICE_CLASS_SMART_CARD            0x0b
+#define USB_DEVICE_CLASS_SECURITY              0x0d
+#define USB_DEVICE_CLASS_VIDEO                 0x0e
+#define USB_DEVICE_CLASS_HEALTHCARE            0x0f
+#define USB_DEVICE_CLASS_DIAG_DEVICE           0xdc
+#define USB_DEVICE_CLASS_WIRELESS              0xe0
+#define USB_DEVICE_CLASS_MISC                  0xef
+#define USB_DEVICE_CLASS_APP_SPECIFIC          0xfe
+#define USB_DEVICE_CLASS_VEND_SPECIFIC         0xff
+
+/* usb string index define */
+#define USB_STRING_LANGID_INDEX         0x00
+#define USB_STRING_MFC_INDEX            0x01
+#define USB_STRING_PRODUCT_INDEX        0x02
+#define USB_STRING_SERIAL_INDEX         0x03
+#define USB_STRING_CONFIG_INDEX         0x04
+#define USB_STRING_INTERFACE_INDEX      0x05
+#define USB_STRING_OS_INDEX             0x06
+#define USB_STRING_MAX                  USB_STRING_OS_INDEX 
+/*
+ * Devices supporting Microsoft OS Descriptors store special string
+ * descriptor at fixed index (0xEE). It is read when a new device is
+ * attached to a computer for the first time.
+ */
+#define USB_OSDESC_STRING_DESC_INDEX	0xEE
+
+/* bmAttributes in Configuration Descriptor */
+#define USB_CONFIG_POWERED_MASK                0x40
+#define USB_CONFIG_BUS_POWERED                 0x80
+#define USB_CONFIG_SELF_POWERED                0xC0
+#define USB_CONFIG_REMOTE_WAKEUP               0x20
+
+/* bMaxPower in Configuration Descriptor */
+#define USB_CONFIG_POWER_MA(mA)                ((mA)/2)
+
+/* bEndpointAddress in Endpoint Descriptor */
+#define USB_ENDPOINT_DIRECTION_MASK            0x80
+#define USB_ENDPOINT_OUT(addr)                 ((addr) | 0x00)
+#define USB_ENDPOINT_IN(addr)                  ((addr) | 0x80)
+
+/* bmAttributes in Endpoint Descriptor */
+#define USB_ENDPOINT_TYPE_MASK                 0x03
+#define USB_ENDPOINT_TYPE_CONTROL              0x00
+#define USB_ENDPOINT_TYPE_ISOCHRONOUS          0x01
+#define USB_ENDPOINT_TYPE_BULK                 0x02
+#define USB_ENDPOINT_TYPE_INTERRUPT            0x03
+#define USB_ENDPOINT_SYNC_MASK                 0x0C
+#define USB_ENDPOINT_SYNC_NO_SYNCHRONIZATION   0x00
+#define USB_ENDPOINT_SYNC_ASYNCHRONOUS         0x04
+#define USB_ENDPOINT_SYNC_ADAPTIVE             0x08
+#define USB_ENDPOINT_SYNC_SYNCHRONOUS          0x0C
+#define USB_ENDPOINT_USAGE_MASK                0x30
+#define USB_ENDPOINT_USAGE_DATA                0x00
+#define USB_ENDPOINT_USAGE_FEEDBACK            0x10
+#define USB_ENDPOINT_USAGE_IMPLICIT_FEEDBACK   0x20
+#define USB_ENDPOINT_USAGE_RESERVED            0x30
+
+/* bDevCapabilityType in Device Capability Descriptor */
+#define USB_DEVICE_CAPABILITY_WIRELESS_USB                  1
+#define USB_DEVICE_CAPABILITY_USB_2_0_EXTENSION             2
+#define USB_DEVICE_CAPABILITY_SUPERSPEED_USB                3
+#define USB_DEVICE_CAPABILITY_CONTAINER_ID                  4
+#define USB_DEVICE_CAPABILITY_PLATFORM                      5
+#define USB_DEVICE_CAPABILITY_POWER_DELIVERY_CAPABILITY     6
+#define USB_DEVICE_CAPABILITY_BATTERY_INFO_CAPABILITY       7
+#define USB_DEVICE_CAPABILITY_PD_CONSUMER_PORT_CAPABILITY   8
+#define USB_DEVICE_CAPABILITY_PD_PROVIDER_PORT_CAPABILITY   9
+#define USB_DEVICE_CAPABILITY_SUPERSPEED_PLUS               10
+#define USB_DEVICE_CAPABILITY_PRECISION_TIME_MEASUREMENT    11
+#define USB_DEVICE_CAPABILITY_WIRELESS_USB_EXT              12
+
+#define USB_BOS_CAPABILITY_EXTENSION	0x02
+#define USB_BOS_CAPABILITY_PLATFORM	0x05
+
+/* Setup packet definition used to read raw data from USB line */
+struct usb_setup_packet
+{
+	__packed union
+	{
+		uint8_t bmRequestType; 	   /* bmRequestType */
+		struct
+		{
+			uint8_t Recipient : 5; /* D4..0: Recipient */
+			uint8_t Type : 2;	   /* D6..5: Type */
+			uint8_t Dir : 1;	   /* D7:    Data Phase Txsfer Direction */
+		}bmRequestType_b;
+	};
+	uint8_t bRequest;
+	__packed union
+	{
+		uint16_t wValue; /* wValue */
+		struct
+		{
+			uint8_t wValueL;
+			uint8_t wValueH;
+		};
+	};
+	__packed union
+	{
+		uint16_t wIndex; /* wIndex */
+		struct
+		{
+			uint8_t wIndexL;
+			uint8_t wIndexH;
+		};
+	};
+	uint16_t wLength;
+} __packed;
+
+/** Standard Device Descriptor */
+struct usb_device_descriptor {
+	uint8_t bLength;                /* Descriptor size in bytes = 18 */
+	uint8_t bDescriptorType;		/* DEVICE descriptor type = 1 */
+	uint16_t bcdUSB;				/* USB spec in BCD, e.g. 0x0200 */
+	uint8_t bDeviceClass;			/* Class code, if 0 see interface */
+	uint8_t bDeviceSubClass;		/* Sub-Class code, 0 if class = 0 */
+	uint8_t bDeviceProtocol;		/* Protocol, if 0 see interface */
+	uint8_t bMaxPacketSize0;		/* Endpoint 0 max. size */
+	uint16_t idVendor;				/* Vendor ID per USB-IF */
+	uint16_t idProduct;				/* Product ID per manufacturer */
+	uint16_t bcdDevice;				/* Device release # in BCD */
+	uint8_t iManufacturer;			/* Index to manufacturer string */
+	uint8_t iProduct;				/* Index to product string */
+	uint8_t iSerialNumber;			/* Index to serial number string */
+	uint8_t bNumConfigurations;		/* Number of possible configurations */ 
+} __packed;
+
+/** USB device_qualifier descriptor */
+struct usb_device_qualifier_descriptor {
+  uint8_t bLength;						/* Descriptor size in bytes = 10 */
+  uint8_t bDescriptorType;				/* DEVICE QUALIFIER type = 6 */
+  uint16_t bcdUSB;						/* USB spec in BCD, e.g. 0x0200 */
+  uint8_t bDeviceClass;					/* Class code, if 0 see interface */
+  uint8_t bDeviceSubClass;				/* Sub-Class code, 0 if class = 0 */
+  uint8_t bDeviceProtocol;				/* Protocol, if 0 see interface */
+  uint8_t bMaxPacketSize;				/* Endpoint 0 max. size */
+  uint8_t bNumConfigurations;			/* Number of possible configurations */
+  uint8_t bReserved;					/* Reserved = 0 */ 
+} __packed;
+
+/** Standard Configuration Descriptor */
+struct usb_configuration_descriptor {
+	uint8_t bLength;					/* Descriptor size in bytes = 9 */
+	uint8_t bDescriptorType;			/* CONFIGURATION type = 2 or 7 */
+	uint16_t wTotalLength;				/* Length of concatenated descriptors */
+	uint8_t bNumInterfaces;				/* Number of interfaces, this config. */
+	uint8_t bConfigurationValue;		/* Value to set this config. */ 
+	uint8_t iConfiguration;				/* Index to configuration string */
+	uint8_t bmAttributes;				/* Config. characteristics */
+	uint8_t bMaxPower;					/* Max.power from bus, 2mA units */
+} __packed;
+
+/** Standard Interface Descriptor */
+struct usb_interface_descriptor {
+	uint8_t bLength;					/* Descriptor size in bytes = 9 */
+	uint8_t bDescriptorType;			/* INTERFACE descriptor type = 4 */
+	uint8_t bInterfaceNumber;			/* Interface no.*/
+	uint8_t bAlternateSetting;			/* Value to select this IF */
+	uint8_t bNumEndpoints;				/* Number of endpoints excluding 0 */
+	uint8_t bInterfaceClass;			/* Class code, 0xFF = vendor */
+	uint8_t bInterfaceSubClass;			/* Sub-Class code, 0 if class = 0 */
+	uint8_t bInterfaceProtocol;			/* Protocol, 0xFF = vendor */
+	uint8_t iInterface;					/* Index to interface string */
+} __packed;
+
+/** Standard Endpoint Descriptor */
+struct usb_endpoint_descriptor {
+	uint8_t bLength;					/* Descriptor size in bytes = 7 */
+	uint8_t bDescriptorType;			/* ENDPOINT descriptor type = 5 */
+	uint8_t bEndpointAddress;			/* Endpoint # 0 - 15 | IN/OUT */
+	uint8_t bmAttributes;				/* Transfer type */
+	uint16_t wMaxPacketSize;			/* Bits 10:0 = max. packet size */
+	uint8_t bInterval;					/* Polling interval in (micro) frames */
+} __packed;	
+
+/** Unicode (UTF16LE) String Descriptor */
+struct usb_string_descriptor {
+	uint8_t bLength;
+	uint8_t bDescriptorType;
+	uint16_t bString;
+} __packed;
+
+/* USB Interface Association Descriptor */
+struct usb_interface_association_descriptor {
+	uint8_t bLength;
+	uint8_t bDescriptorType;
+	uint8_t bFirstInterface;
+	uint8_t bInterfaceCount;
+	uint8_t bFunctionClass;
+	uint8_t bFunctionSubClass;
+	uint8_t bFunctionProtocol;
+	uint8_t iFunction;
+} __packed;
+
+/* MS OS 1.0 string descriptor */
+struct usb_msosv1_string_descriptor {
+	uint8_t bLength;
+	uint8_t bDescriptorType;
+	uint8_t bString[14];
+	uint8_t bMS_VendorCode; /* Vendor Code, used for a control request */
+	uint8_t bPad; /* Padding byte for VendorCode look as UTF16 */
+} __packed;
+
+/* MS OS 1.0 Header descriptor */
+struct usb_msosv1_compat_id_header_descriptor
+{
+    uint32_t dwLength;
+    uint16_t bcdVersion;
+    uint16_t wIndex;
+    uint8_t  bCount;
+    uint8_t  reserved[7];
+} __packed;
+
+/* MS OS 1.0 Function descriptor */
+struct usb_msosv1_comp_id_function_descriptor
+{
+    uint8_t bFirstInterfaceNumber;
+    uint8_t reserved1;
+    uint8_t compatibleID[8];
+    uint8_t subCompatibleID[8];
+    uint8_t reserved2[6];
+} __packed;
+
+#define usb_msosv1_comp_id_property_create(x) \
+struct usb_msosv1_comp_id_property \
+{\
+	struct usb_msosv1_compat_id_header_descriptor compat_id_header;\
+	struct usb_msosv1_comp_id_function_descriptor compat_id_function[x];\
+};
+
+struct usb_msosv1_descriptor
+{
+	uint8_t *string;
+	uint8_t string_len;
+	uint8_t vendor_code;
+	uint8_t *compat_id;
+	uint16_t compat_id_len;
+};
+
+
+/* MS OS 2.0 Header descriptor */
+struct usb_msosv2_property_header_descriptor
+{
+    uint32_t dwLength;
+    uint16_t bcdVersion;
+    uint16_t wIndex;
+    uint8_t  bCount;
+} __packed;
+
+/* WinUSB Microsoft OS 2.0 descriptor set header */
+struct winusb_header_descriptor {
+    uint16_t wLength;
+    uint16_t wDescriptorType;
+    uint32_t dwWindowsVersion;
+    uint16_t wDescriptorSetTotalLength;
+} __packed;
+
+/* WinUSB Microsoft OS 2.0 subset function descriptor  */
+struct winusb_subset_function_descriptor {
+    uint16_t wLength;
+    uint16_t wDescriptorType;
+    uint8_t bFirstInterface;
+    uint8_t bReserved;
+    uint16_t wSubsetLength;
+} __packed;
+
+/* MS OS 2.0 Function Section */
+struct usb_msosv2_comp_id_function_descriptor
+{
+    uint16_t wLength;
+    uint16_t wDescriptorType;
+    uint8_t compatibleID[8];
+    uint8_t subCompatibleID[8];
+} __packed;
+
+/* MS OS 2.0 property descriptor */
+struct usb_msosv2_proerty_descriptor
+{
+    uint16_t wLength;
+    uint16_t wDescriptorType;
+    uint32_t dwPropertyDataType;
+    uint16_t wPropertyNameLength;
+    const char * bPropertyName;
+    uint32_t dwPropertyDataLength;
+    const char * bPropertyData;
+};
+
+struct usb_msosv2_descriptor
+{
+    uint8_t* compat_id;
+    uint16_t compat_id_len;
+};
+
+/* BOS Descriptor */
+struct usb_bos_header_descriptor {
+	uint8_t bLength;
+	uint8_t bDescriptorType;
+	uint16_t wTotalLength;
+	uint8_t bNumDeviceCaps;
+} __packed;
+
+/* BOS Capability Descriptor */
+struct usb_bos_capability_descriptor {
+	uint8_t bLength;
+	uint8_t bDescriptorType;
+	uint8_t bDevCapabilityType;
+	uint8_t bReserved;
+	uint8_t PlatformCapabilityUUID[16];
+} __packed;
+
+struct usb_bos_capability_lpm {
+	uint8_t bLength;
+	uint8_t bDescriptorType;
+	uint8_t bDevCapabilityType;
+	uint32_t bmAttributes;
+} __packed;
+
+struct usb_bos_descriptor
+{
+    uint8_t* bos_id;
+    uint8_t bos_id_len;
+};
+
+/* USB Device Capability Descriptor */
+struct usb_device_capability__descriptor {
+    uint8_t  bLength;
+    uint8_t  bDescriptorType;
+    uint8_t  bDevCapabilityType;
+} __packed;
+
+/** USB descriptor header */
+struct usb_desc_header {
+	uint8_t bLength;               /**< descriptor length */
+	uint8_t bDescriptorType;       /**< descriptor type */
+};
+
+#define USB_DEVICE_DESCRIPTOR_INIT(bcdUSB,idVendor,idProduct,bcdDevice,bNumConfigurations)  \
+    0x12,                       /* bLength */ \
+    USB_DESCRIPTOR_TYPE_DEVICE, /* bDescriptorType */ \
+    WBVAL(bcdUSB),              /* bcdUSB */ \
+    0x00,                       /* bDeviceClass */ \
+    0x00,                       /* bDeviceSubClass */ \
+    0x00,                       /* bDeviceProtocol */ \
+    0x40,                       /* bMaxPacketSize */ \
+    WBVAL(idVendor),            /* idVendor */ \
+    WBVAL(idProduct),           /* idProduct */ \
+    WBVAL(bcdDevice),           /* bcdDevice */ \
+    USB_STRING_MFC_INDEX,            /* iManufacturer */ \
+    USB_STRING_PRODUCT_INDEX,        /* iProduct */ \
+    USB_STRING_SERIAL_INDEX,         /* iSerial */ \
+    bNumConfigurations          /* bNumConfigurations */
+
+#define USB_CONFIG_DESCRIPTOR_INIT(wTotalLength,bNumInterfaces,bConfigurationValue,bmAttributes,bMaxPower)      \
+    0x09,                              /* bLength */ \
+    USB_DESCRIPTOR_TYPE_CONFIGURATION, /* bDescriptorType */ \
+    WBVAL(wTotalLength),               /* wTotalLength */ \
+    bNumInterfaces,                    /* bNumInterfaces */ \
+    bConfigurationValue,               /* bConfigurationValue */ \
+    0x00,                              /* iConfiguration */ \
+    bmAttributes,                      /* bmAttributes */ \
+    USB_CONFIG_POWER_MA(bMaxPower)     /* bMaxPower */
+
+#define USB_INTERFACE_DESCRIPTOR_INIT(bInterfaceNumber,bAlternateSetting,bNumEndpoints,\
+bInterfaceClass,bInterfaceSubClass,bInterfaceProtocol,iInterface)     \
+    0x09,                          /* bLength */ \
+    USB_DESCRIPTOR_TYPE_INTERFACE, /* bDescriptorType */ \
+    bInterfaceNumber,              /* bInterfaceNumber */ \
+    bAlternateSetting,             /* bAlternateSetting */ \
+    bNumEndpoints,                 /* bNumEndpoints */ \
+    bInterfaceClass,               /* bInterfaceClass */ \
+    bInterfaceSubClass,            /* bInterfaceSubClass */ \
+    bInterfaceProtocol,            /* bInterfaceProtocol */ \
+    iInterface                     /* iInterface */ 
+
+#define USB_ENDPOINT_DESCRIPTOR_INIT(bEndpointAddress,bmAttributes,wMaxPacketSize,bInterval) \
+    0x07,                         /* bLength */\
+    USB_DESCRIPTOR_TYPE_ENDPOINT, /* bDescriptorType */\
+    bEndpointAddress,             /* bEndpointAddress */\
+    bmAttributes,                 /* bmAttributes */\
+    WBVAL(wMaxPacketSize),        /* wMaxPacketSize */\
+    bInterval                     /* bInterval */
+
+#define USB_IAD_INIT(bFirstInterface,bInterfaceCount,bFunctionClass,bFunctionSubClass,bFunctionProtocol) \
+    0x08,                                             /* bLength */\
+    USB_DESCRIPTOR_TYPE_INTERFACE_ASSOCIATION,        /* bDescriptorType */\
+    bFirstInterface,                                  /* bFirstInterface */\
+    bInterfaceCount,                                  /* bInterfaceCount */\
+    bFunctionClass,                                   /* bFunctionClass */\
+    bFunctionSubClass,                                /* bFunctionSubClass */\
+    bFunctionProtocol,                                /* bFunctionProtocol */\
+    0x00                                              /* iFunction */ 
+
+#define USB_LANGID_INIT(id) \
+    0x04,                       /* bLength */\
+    USB_DESCRIPTOR_TYPE_STRING, /* bDescriptorType */\
+    WBVAL(id)                   /* wLangID0 */
+	
+#endif
\ No newline at end of file
diff --git a/components/usb_stack/common/usb_slist.h b/components/usb_stack/common/usb_slist.h
new file mode 100644
index 00000000..0e01887f
--- /dev/null
+++ b/components/usb_stack/common/usb_slist.h
@@ -0,0 +1,221 @@
+#ifndef __USB_SLIST_H__
+#define __USB_SLIST_H__
+
+#include "string.h"
+#include "stdint.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * usb_container_of - return the member address of ptr, if the type of ptr is the
+ * struct type.
+ */
+#define usb_container_of(ptr, type, member) \
+    ((type *)((char *)(ptr) - (unsigned long)(&((type *)0)->member)))
+
+
+/**
+ * Single List structure
+ */
+struct usb_slist_node
+{
+    struct usb_slist_node *next;                         /**< point to next node. */
+};
+typedef struct usb_slist_node usb_slist_t;                /**< Type for single list. */
+
+
+/**
+ * @brief initialize a single list
+ *
+ * @param l the single list to be initialized
+ */
+static inline void usb_slist_init(usb_slist_t *l)
+{
+    l->next = NULL;
+}
+
+static inline void usb_slist_add_head(usb_slist_t *l, usb_slist_t *n)
+{
+    n->next   = l->next;
+    l->next  = n;
+}
+
+static inline void usb_slist_add_tail(usb_slist_t *l, usb_slist_t *n)
+{
+    while (l->next) l = l->next;
+
+    /* append the node to the tail */
+    l->next = n;
+    n->next = NULL;
+}
+
+static inline void usb_slist_insert(usb_slist_t *l, usb_slist_t *next, usb_slist_t *n)
+{
+    if (!next) 
+    {
+        usb_slist_add_tail(next, l);
+        return;
+    }
+
+    while (l->next) 
+    {       
+        if (l->next == next) 
+        {
+            l->next  = n;
+            n->next  = next;
+        }
+
+        l = l->next;
+    }
+}
+
+static inline usb_slist_t *usb_slist_remove(usb_slist_t *l, usb_slist_t *n)
+{
+    /* remove slist head */
+    while (l->next && l->next != n) l = l->next;
+
+    /* remove node */
+    if (l->next != (usb_slist_t *)0) l->next = l->next->next;
+
+    return l;
+}
+
+static inline unsigned int usb_slist_len(const usb_slist_t *l)
+{
+    unsigned int len = 0;
+    const usb_slist_t *list = l->next;
+    while (list != NULL)
+    {
+        list = list->next;
+        len ++;
+    }
+
+    return len;
+}
+
+static inline unsigned int usb_slist_contains(usb_slist_t *l, usb_slist_t *n)
+{
+    while (l->next) 
+    {
+        if (l->next == n) 
+        {     
+            return 0;
+        }
+
+        l = l->next;
+    }
+
+    return 1;
+}
+
+static inline usb_slist_t *usb_slist_head(usb_slist_t *l)
+{
+    return l->next;
+}
+
+static inline usb_slist_t *usb_slist_tail(usb_slist_t *l)
+{
+    while (l->next) l = l->next;
+
+    return l;
+}
+
+static inline usb_slist_t *usb_slist_next(usb_slist_t *n)
+{
+    return n->next;
+}
+
+static inline int usb_slist_isempty(usb_slist_t *l)
+{
+    return l->next == NULL;
+}
+
+/**
+ * @brief initialize a slist object
+ */
+#define USB_SLIST_OBJECT_INIT(object) { NULL }
+
+/**
+ * @brief initialize a slist object
+ */
+#define USB_SLIST_DEFINE(slist) \
+    usb_slist_t slist = { NULL }
+    
+/**
+ * @brief get the struct for this single list node
+ * @param node the entry point
+ * @param type the type of structure
+ * @param member the name of list in structure
+ */
+#define usb_slist_entry(node, type, member) \
+    usb_container_of(node, type, member)
+
+/**
+ * usb_slist_first_entry - get the first element from a slist
+ * @ptr:    the slist head to take the element from.
+ * @type:   the type of the struct this is embedded in.
+ * @member: the name of the slist_struct within the struct.
+ *
+ * Note, that slist is expected to be not empty.
+ */
+#define usb_slist_first_entry(ptr, type, member) \
+    usb_slist_entry((ptr)->next, type, member)
+
+/**
+ * usb_slist_tail_entry - get the tail element from a slist
+ * @ptr:    the slist head to take the element from.
+ * @type:   the type of the struct this is embedded in.
+ * @member: the name of the slist_struct within the struct.
+ *
+ * Note, that slist is expected to be not empty.
+ */
+#define usb_slist_tail_entry(ptr, type, member) \
+    usb_slist_entry(usb_slist_tail(ptr), type, member)
+
+/**
+ * usb_slist_first_entry_or_null - get the first element from a slist
+ * @ptr:    the slist head to take the element from.
+ * @type:   the type of the struct this is embedded in.
+ * @member: the name of the slist_struct within the struct.
+ *
+ * Note, that slist is expected to be not empty.
+ */
+#define usb_slist_first_entry_or_null(ptr, type, member) \
+    (usb_slist_isempty(ptr) ? NULL : usb_slist_first_entry(ptr, type, member))
+
+/**
+ * usb_slist_for_each - iterate over a single list
+ * @pos:    the usb_slist_t * to use as a loop cursor.
+ * @head:   the head for your single list.
+ */
+#define usb_slist_for_each(pos, head) \
+    for (pos = (head)->next; pos != NULL; pos = pos->next)
+
+#define usb_slist_for_each_safe(pos, next, head) \
+    for (pos = (head)->next, next = pos->next; pos; \
+            pos = next, next = pos->next)
+
+/**
+ * usb_slist_for_each_entry  -   iterate over single list of given type
+ * @pos:    the type * to use as a loop cursor.
+ * @head:   the head for your single list.
+ * @member: the name of the list_struct within the struct.
+ */
+#define usb_slist_for_each_entry(pos, head, member) \
+    for (pos = usb_slist_entry((head)->next, typeof(*pos), member); \
+         &pos->member != (NULL); \
+         pos = usb_slist_entry(pos->member.next, typeof(*pos), member))
+
+#define usb_slist_for_each_entry_safe(pos, n, head, member) \
+    for (pos = usb_slist_entry((head)->next, typeof(*pos), member), \
+            n = usb_slist_entry(pos->member.next, typeof(*pos), member); \
+            &pos->member != (NULL); \
+            pos = n, n = usb_slist_entry(pos->member.next, typeof(*pos), member))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
\ No newline at end of file
diff --git a/components/usb_stack/common/usb_util.h b/components/usb_stack/common/usb_util.h
new file mode 100644
index 00000000..7d3d6b19
--- /dev/null
+++ b/components/usb_stack/common/usb_util.h
@@ -0,0 +1,134 @@
+#ifndef _USB_UTIL_H
+#define _USB_UTIL_H
+
+#include "stdbool.h"
+#include "string.h"
+#include "stdint.h"
+#include "stdio.h"
+#include "usb_slist.h"
+
+#ifndef __packed
+#define __packed __attribute__((__packed__))
+#endif
+#ifndef __aligned
+#define __aligned(x) __attribute__((__aligned__(x)))
+#endif
+#define __may_alias __attribute__((__may_alias__))
+#ifndef __printf_like
+#define __printf_like(f, a) __attribute__((format(printf, f, a)))
+#endif
+#define __used __attribute__((__used__))
+#ifndef __deprecated
+#define __deprecated __attribute__((deprecated))
+#endif
+#define ARG_UNUSED(x) (void)(x)
+
+// #define likely(x)   __builtin_expect((bool)!!(x), true)
+// #define unlikely(x) __builtin_expect((bool)!!(x), false)
+
+#define popcount(x) __builtin_popcount(x)
+
+#ifndef __no_optimization
+#define __no_optimization __attribute__((optimize("-O0")))
+#endif
+
+#ifndef __weak
+#define __weak __attribute__((__weak__))
+#endif
+#define __unused __attribute__((__unused__))
+
+#define __ALIGN_END __attribute__((aligned(4)))
+#define __ALIGN_BEGIN
+
+#ifndef LO_BYTE
+#define LO_BYTE(x) ((uint8_t)(x & 0x00FF))
+#endif
+
+#ifndef HI_BYTE
+#define HI_BYTE(x) ((uint8_t)((x & 0xFF00) >> 8))
+#endif
+
+/**
+ * @def MAX
+ * @brief The larger value between @p a and @p b.
+ * @note Arguments are evaluated twice.
+ */
+#ifndef MAX
+/* Use Z_MAX for a GCC-only, single evaluation version */
+#define MAX(a, b) (((a) > (b)) ? (a) : (b))
+#endif
+
+/**
+ * @def MIN
+ * @brief The smaller value between @p a and @p b.
+ * @note Arguments are evaluated twice.
+ */
+#ifndef MIN
+/* Use Z_MIN for a GCC-only, single evaluation version */
+#define MIN(a, b) (((a) < (b)) ? (a) : (b))
+#endif
+
+#define BCD(x) ((((x) / 10) << 4) | ((x) % 10))
+
+#define BIT(n)  (1UL << (n))
+
+#define ARRAY_SIZE(array) \
+	((int)((sizeof(array) / sizeof((array)[0]))))
+
+#define USB_DESC_SECTION __attribute__((section("usb_desc"))) __used __aligned(1)
+
+#define BSWAP16(u16) (__builtin_bswap16(u16))
+#define BSWAP32(u32) (__builtin_bswap32(u32))
+
+#define GET_BE16(field) \
+  (((uint16_t)(field)[0] << 8) | ((uint16_t)(field)[1]))
+
+#define GET_BE32(field) \
+  (((uint32_t)(field)[0] << 24) | ((uint32_t)(field)[1] << 16) | ((uint32_t)(field)[2] << 8) | ((uint32_t)(field)[3] << 0))
+
+#define SET_BE16(field, value)            \
+  do                                      \
+  {                                       \
+    (field)[0] = (uint8_t)((value) >> 8); \
+    (field)[1] = (uint8_t)((value) >> 0); \
+  } while (0)
+
+#define SET_BE24(field, value)             \
+  do                                       \
+  {                                        \
+    (field)[0] = (uint8_t)((value) >> 16); \
+    (field)[1] = (uint8_t)((value) >> 8);  \
+    (field)[2] = (uint8_t)((value) >> 0);  \
+  } while (0)
+
+#define SET_BE32(field, value)             \
+  do                                       \
+  {                                        \
+    (field)[0] = (uint8_t)((value) >> 24); \
+    (field)[1] = (uint8_t)((value) >> 16); \
+    (field)[2] = (uint8_t)((value) >> 8);  \
+    (field)[3] = (uint8_t)((value) >> 0);  \
+  } while (0)
+
+#define REQTYPE_GET_DIR(x) (((x) >> 7) & 0x01)
+#define REQTYPE_GET_TYPE(x) (((x) >> 5) & 0x03U)
+#define REQTYPE_GET_RECIP(x) ((x)&0x1F)
+
+#define GET_DESC_TYPE(x) (((x) >> 8) & 0xFFU)
+#define GET_DESC_INDEX(x) ((x)&0xFFU)
+
+#define WBVAL(x) (x & 0xFF),((x >> 8) & 0xFF)
+#define DBVAL(x) (x & 0xFF),((x >> 8) & 0xFF),((x >> 16) & 0xFF),((x >> 24) & 0xFF)
+
+#if 0
+#define USBD_LOG_WRN(a, ...) bflb_platform_printf(a, ##__VA_ARGS__)
+#define USBD_LOG_DBG(a, ...) bflb_platform_printf(a, ##__VA_ARGS__)
+#define USBD_LOG_ERR(a, ...) bflb_platform_printf(a, ##__VA_ARGS__)
+#else
+#define USBD_LOG_WRN(a, ...) bflb_platform_printf(a, ##__VA_ARGS__)
+#define USBD_LOG_DBG(a, ...)  
+#define USBD_LOG_ERR(a, ...) bflb_platform_printf(a, ##__VA_ARGS__)
+#define USBD_LOG(a, ...) 	bflb_platform_printf(a, ##__VA_ARGS__)
+#endif
+
+#endif
\ No newline at end of file
diff --git a/components/usb_stack/core/usbd_core.c b/components/usb_stack/core/usbd_core.c
new file mode 100644
index 00000000..0a95e867
--- /dev/null
+++ b/components/usb_stack/core/usbd_core.c
@@ -0,0 +1,1232 @@
+/**
+ * @file usbd_core.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "usbd_core.h"
+
+#define USBD_EP_CALLBACK_LIST_SEARCH 0
+#define USBD_EP_CALLBACK_ARR_SEARCH 1
+#define USBD_EP_CALLBACK_SEARCH_METHOD USBD_EP_CALLBACK_ARR_SEARCH
+
+/* general descriptor field offsets */
+#define DESC_bLength 0		   /** Length offset */
+#define DESC_bDescriptorType 1 /** Descriptor type offset */
+
+/* config descriptor field offsets */
+#define CONF_DESC_wTotalLength 2		/** Total length offset */
+#define CONF_DESC_bConfigurationValue 5 /** Configuration value offset */
+#define CONF_DESC_bmAttributes 7		/** configuration characteristics */
+
+/* interface descriptor field offsets */
+#define INTF_DESC_bInterfaceNumber 2  /** Interface number offset */
+#define INTF_DESC_bAlternateSetting 3 /** Alternate setting offset */
+
+#define USB_REQUEST_BUFFER_SIZE 256
+#define USB_EP_OUT_NUM 8
+#define USB_EP_IN_NUM  8
+
+static struct usbd_core_cfg_priv
+{
+	/** Setup packet */
+	struct usb_setup_packet setup;
+	/** Pointer to data buffer */
+	uint8_t *ep0_data_buf;
+	/** Remaining bytes in buffer */
+	uint32_t ep0_data_buf_residue;
+	/** Total length of control transfer */
+	uint32_t ep0_data_buf_len;
+	/** Zero length packet flag of control transfer */
+	bool zlp_flag;
+	/** Pointer to registered descriptors */
+	const uint8_t *descriptors;
+	/* Buffer used for storing standard, class and vendor request data */
+	uint8_t req_data[USB_REQUEST_BUFFER_SIZE];
+
+#if USBD_EP_CALLBACK_SEARCH_METHOD == 1
+	usbd_endpoint_callback in_ep_cb[USB_EP_IN_NUM];
+	usbd_endpoint_callback out_ep_cb[USB_EP_OUT_NUM];
+#endif
+	/** Variable to check whether the usb has been enabled */
+	bool enabled;
+	/** Variable to check whether the usb has been configured */
+	bool configured;
+	/** Currently selected configuration */
+	uint8_t configuration;
+	/** Remote wakeup feature status */
+	uint16_t remote_wakeup;
+	uint8_t reserved;
+} usbd_core_cfg;
+
+static usb_slist_t usbd_class_head= USB_SLIST_OBJECT_INIT(usbd_class_head);
+static struct usb_msosv1_descriptor *msosv1_desc;
+static struct usb_bos_descriptor *bos_desc;
+/**
+ * @brief print the contents of a setup packet
+ *
+ * @param [in] setup The setup packet
+ *
+ */
+static void usbd_print_setup(struct usb_setup_packet *setup)
+{
+	USBD_LOG_ERR("Setup: "
+				 "bmRequestType 0x%02x, bRequest 0x%02x, wValue 0x%04x, wIndex 0x%04x, wLength 0x%04x\r\n",
+				 setup->bmRequestType,
+				 setup->bRequest,
+				 setup->wValue,
+				 setup->wIndex,
+				 setup->wLength);
+}
+
+/**
+ * @brief Check if the device is in Configured state
+ *
+ * @return true if Configured, false otherwise.
+ */
+static bool is_device_configured(void)
+{
+	return (usbd_core_cfg.configuration != 0);
+}
+/**
+ * @brief Check if the interface of given number is valid
+ *
+ * @param [in] interface Number of the addressed interface
+ *
+ * This function searches through descriptor and checks
+ * is the Host has addressed valid interface.
+ *
+ * @return true if interface exists - valid
+ */
+static bool is_interface_valid(uint8_t interface)
+{
+	const uint8_t *p = (uint8_t *)usbd_core_cfg.descriptors;
+	const struct usb_configuration_descriptor *cfg_descr;
+
+	/* Search through descriptor for matching interface */
+	while (p[DESC_bLength] != 0U)
+	{
+		if (p[DESC_bDescriptorType] == USB_DESCRIPTOR_TYPE_CONFIGURATION)
+		{
+			cfg_descr = (const struct usb_configuration_descriptor *)p;
+			if (interface < cfg_descr->bNumInterfaces)
+			{
+				return true;
+			}
+		}
+		p += p[DESC_bLength];
+	}
+
+	return false;
+}
+/**
+ * @brief Check if the endpoint of given address is valid
+ *
+ * @param [in] ep Address of the Endpoint
+ *
+ * This function checks if the Endpoint of given address
+ * is valid for the configured device. Valid Endpoint is
+ * either Control Endpoint or one used by the device.
+ *
+ * @return true if endpoint exists - valid
+ */
+static bool is_ep_valid(uint8_t ep)
+{
+	/* Check if its Endpoint 0 */
+	if ((ep & 0x7f ) == 0)
+	{
+		return true;
+	}
+
+	return true;
+}
+#if USBD_EP_CALLBACK_SEARCH_METHOD == 1
+static void usbd_ep_callback_register(void)
+{
+	usb_slist_t *i, *j, *k;
+	usb_slist_for_each(i,&usbd_class_head)
+    {
+		usbd_class_t* class= usb_slist_entry(i,struct usbd_class,list);
+
+		usb_slist_for_each(j,&class->intf_list)
+    	{
+			usbd_interface_t* intf = usb_slist_entry(j,struct usbd_interface,list);
+
+			usb_slist_for_each(k,&intf->ep_list)
+    		{
+				usbd_endpoint_t* ept = usb_slist_entry(k,struct usbd_endpoint,list);
+				if(ept->ep_cb)
+				{
+					if(ept->ep_addr & 0x80)
+					{
+						usbd_core_cfg.in_ep_cb[ept->ep_addr & 0x7f] = ept->ep_cb;
+					}
+					else
+					{
+						usbd_core_cfg.out_ep_cb[ept->ep_addr & 0x7f] = ept->ep_cb;
+					}
+				}					
+			}
+		}			
+	}
+}
+#endif
+/**
+ * @brief configure and enable endpoint
+ *
+ * This function sets endpoint configuration according to one specified in USB
+ * endpoint descriptor and then enables it for data transfers.
+ *
+ * @param [in]  ep_desc Endpoint descriptor byte array
+ *
+ * @return true if successfully configured and enabled
+ */
+static bool usbd_set_endpoint(const struct usb_endpoint_descriptor *ep_desc)
+{
+	struct usbd_endpoint_cfg ep_cfg;
+
+	ep_cfg.ep_addr = ep_desc->bEndpointAddress;
+	ep_cfg.ep_mps = ep_desc->wMaxPacketSize;
+	ep_cfg.ep_type = ep_desc->bmAttributes & USBD_EP_TYPE_MASK;
+
+	USBD_LOG("Open endpoint:0x%x type:%u mps:%u\r\n",
+			 ep_cfg.ep_addr, ep_cfg.ep_type, ep_cfg.ep_mps);
+
+	usbd_ep_open(&ep_cfg);
+	usbd_core_cfg.configured = true;
+
+	return true;
+}
+/**
+ * @brief Disable endpoint for transferring data
+ *
+ * This function cancels transfers that are associated with endpoint and
+ * disabled endpoint itself.
+ *
+ * @param [in]  ep_desc Endpoint descriptor byte array
+ *
+ * @return true if successfully deconfigured and disabled
+ */
+static bool usbd_reset_endpoint(const struct usb_endpoint_descriptor *ep_desc)
+{
+	struct usbd_endpoint_cfg ep_cfg;
+
+	ep_cfg.ep_addr = ep_desc->bEndpointAddress;
+	ep_cfg.ep_mps = ep_desc->wMaxPacketSize;
+	ep_cfg.ep_type = ep_desc->bmAttributes & USBD_EP_TYPE_MASK;
+
+	USBD_LOG("Close endpoint:0x%x type:%u\r\n",
+			 ep_cfg.ep_addr, ep_cfg.ep_type);
+
+	usbd_ep_close(ep_cfg.ep_addr);
+
+	return true;
+}
+
+/**
+ * @brief get specified USB descriptor
+ *
+ * This function parses the list of installed USB descriptors and attempts
+ * to find the specified USB descriptor.
+ *
+ * @param [in]  type_index Type and index of the descriptor
+ * @param [in]  lang_id    Language ID of the descriptor (currently unused)
+ * @param [out] len        Descriptor length
+ * @param [out] data       Descriptor data
+ *
+ * @return true if the descriptor was found, false otherwise
+ */
+static bool usbd_get_descriptor(uint16_t type_index, uint8_t **data, uint32_t *len)
+{
+	uint8_t type = 0U;
+	uint8_t index = 0U;
+	uint8_t *p = NULL;
+	uint32_t cur_index = 0U;
+	bool found = false;
+
+	type = GET_DESC_TYPE(type_index);
+	index = GET_DESC_INDEX(type_index);
+
+	if ((type == USB_DESCRIPTOR_TYPE_STRING) && (index == USB_OSDESC_STRING_DESC_INDEX)) 
+	{
+		USBD_LOG("MS OS Descriptor string read\r\n");
+		if(!msosv1_desc)
+		return false;
+
+		*data = (uint8_t*)msosv1_desc->string;
+		*len = sizeof(struct usb_msosv1_string_descriptor);
+
+		return true;
+	}
+	else if (type == USB_DESCRIPTOR_TYPE_BINARY_OBJECT_STORE) 
+	{
+		USBD_LOG("BOS descriptor string read\r\n");
+		if (!bos_desc) 
+		{
+			return false;
+		}
+
+		*data = bos_desc->bos_id;
+		*len = bos_desc->bos_id_len;
+		return true;
+	}
+	/*
+	 * Invalid types of descriptors,
+	 * see USB Spec. Revision 2.0, 9.4.3 Get Descriptor
+	 */
+	else if ((type == USB_DESCRIPTOR_TYPE_INTERFACE) || (type == USB_DESCRIPTOR_TYPE_ENDPOINT) ||
+		(type > USB_DESCRIPTOR_TYPE_OTHER_SPEED))
+	{
+		return false;
+	}
+
+	p = (uint8_t *)usbd_core_cfg.descriptors;
+
+	cur_index = 0U;
+
+	while (p[DESC_bLength] != 0U)
+	{
+		if (p[DESC_bDescriptorType] == type)
+		{
+			if (cur_index == index)
+			{
+				found = true;
+				break;
+			}
+			cur_index++;
+		}
+		/* skip to next descriptor */
+		p += p[DESC_bLength];
+	}
+
+	if (found)
+	{
+		/* set data pointer */
+		*data = p;
+		/* get length from structure */
+		if (type == USB_DESCRIPTOR_TYPE_CONFIGURATION)
+		{
+			/* configuration descriptor is an
+			 * exception, length is at offset
+			 * 2 and 3
+			 */
+			*len = (p[CONF_DESC_wTotalLength]) |
+				   (p[CONF_DESC_wTotalLength + 1] << 8);
+		}
+		else
+		{
+			/* normally length is at offset 0 */
+			*len = p[DESC_bLength];
+		}
+	}
+	else
+	{
+		/* nothing found */
+		USBD_LOG_ERR("descriptor  not found!\r\n", type,index);
+	}
+	return found;
+}
+
+/**
+ * @brief set USB configuration
+ *
+ * This function configures the device according to the specified configuration
+ * index and alternate setting by parsing the installed USB descriptor list.
+ * A configuration index of 0 unconfigures the device.
+ *
+ * @param [in] config_index Configuration index
+ * @param [in] alt_setting  Alternate setting number
+ *
+ * @return true if successfully configured false if error or unconfigured
+ */
+static bool usbd_set_configuration(uint8_t config_index, uint8_t alt_setting)
+{
+	uint8_t *p = (uint8_t *)usbd_core_cfg.descriptors;
+	uint8_t cur_alt_setting = 0xFF;
+	uint8_t cur_config = 0xFF;
+	bool found = false;
+
+	if (config_index == 0U)
+	{
+		/* TODO: unconfigure device */
+		USBD_LOG_ERR("Device not configured - invalid configuration\r\n");
+		return true;
+	}
+
+	/* configure endpoints for this configuration/altsetting */
+	while (p[DESC_bLength] != 0U)
+	{
+		switch (p[DESC_bDescriptorType])
+		{
+		case USB_DESCRIPTOR_TYPE_CONFIGURATION:
+			/* remember current configuration index */
+			cur_config = p[CONF_DESC_bConfigurationValue];
+			if (cur_config == config_index)
+			{
+				found = true;
+			}
+
+			break;
+
+		case USB_DESCRIPTOR_TYPE_INTERFACE:
+			/* remember current alternate setting */
+			cur_alt_setting =
+				p[INTF_DESC_bAlternateSetting];
+			break;
+
+		case USB_DESCRIPTOR_TYPE_ENDPOINT:
+			if ((cur_config != config_index) ||
+				(cur_alt_setting != alt_setting))
+			{
+				break;
+			}
+
+			found = usbd_set_endpoint((struct usb_endpoint_descriptor *)p);
+			break;
+
+		default:
+			break;
+		}
+
+		/* skip to next descriptor */
+		p += p[DESC_bLength];
+	}
+
+	return found;
+}
+
+/**
+ * @brief set USB interface
+ *
+ * @param [in] iface Interface index
+ * @param [in] alt_setting  Alternate setting number
+ *
+ * @return true if successfully configured false if error or unconfigured
+ */
+static bool usbd_set_interface(uint8_t iface, uint8_t alt_setting)
+{
+	const uint8_t *p = usbd_core_cfg.descriptors;
+	const uint8_t *if_desc = NULL;
+	struct usb_endpoint_descriptor *ep_desc;
+	uint8_t cur_alt_setting = 0xFF;
+	uint8_t cur_iface = 0xFF;
+	bool ret = false;
+
+	USBD_LOG_DBG("iface %u alt_setting %u\r\n", iface, alt_setting);
+
+	while (p[DESC_bLength] != 0U)
+	{
+		switch (p[DESC_bDescriptorType])
+		{
+		case USB_DESCRIPTOR_TYPE_INTERFACE:
+			/* remember current alternate setting */
+			cur_alt_setting = p[INTF_DESC_bAlternateSetting];
+			cur_iface = p[INTF_DESC_bInterfaceNumber];
+
+			if (cur_iface == iface &&
+				cur_alt_setting == alt_setting)
+			{
+				if_desc = (void *)p;
+			}
+
+			USBD_LOG_DBG("Current iface %u alt setting %u",
+						 cur_iface, cur_alt_setting);
+			break;
+		case USB_DESCRIPTOR_TYPE_ENDPOINT:
+			if (cur_iface == iface)
+			{
+				ep_desc = (struct usb_endpoint_descriptor *)p;
+
+				if (cur_alt_setting != alt_setting)
+				{
+					ret = usbd_reset_endpoint(ep_desc);
+				}
+				else
+				{
+					ret = usbd_set_endpoint(ep_desc);
+				}
+			}
+			break;
+		default:
+			break;
+		}
+
+		/* skip to next descriptor */
+		p += p[DESC_bLength];
+	}
+	usbd_event_notify_handler(USB_EVENT_SET_INTERFACE,(void*)if_desc);
+
+	return ret;
+}
+
+/**
+ * @brief handle a standard device request
+ *
+ * @param [in]     setup    The setup packet
+ * @param [in,out] len      Pointer to data length
+ * @param [in,out] ep0_data_buf Data buffer
+ *
+ * @return true if the request was handled successfully
+ */
+static bool usbd_std_device_req_handler(struct usb_setup_packet *setup, uint8_t **data, uint32_t *len)
+{
+	uint16_t value = setup->wValue;
+	// uint16_t index = setup->wIndex;
+	bool ret = true;
+
+	switch (setup->bRequest)
+	{
+	case USB_REQUEST_GET_STATUS:
+		USBD_LOG_DBG("REQ_GET_STATUS\r\n");
+		/* bit 0: self-powered */
+		/* bit 1: remote wakeup */
+		*data = (uint8_t *)&usbd_core_cfg.remote_wakeup;
+
+		*len = 2;
+		break;
+
+	case USB_REQUEST_CLEAR_FEATURE:
+		USBD_LOG_DBG("REQ_CLEAR_FEATURE\r\n");
+		ret = false;
+
+		if (value == USB_FEATURE_REMOTE_WAKEUP)
+		{
+			usbd_core_cfg.remote_wakeup = 0;
+			usbd_event_notify_handler(USB_EVENT_CLEAR_REMOTE_WAKEUP,NULL);
+			ret = true;
+		}
+		break;
+
+	case USB_REQUEST_SET_FEATURE:
+		USBD_LOG_DBG("REQ_SET_FEATURE\r\n");
+		ret = false;
+
+		if (value == USB_FEATURE_REMOTE_WAKEUP)
+		{
+			usbd_core_cfg.remote_wakeup = 1;
+			usbd_event_notify_handler(USB_EVENT_SET_REMOTE_WAKEUP,NULL);
+			ret = true;
+		}
+		if (value == USB_FEATURE_TEST_MODE)
+		{
+			/* put TEST_MODE code here */
+		}
+		break;
+
+	case USB_REQUEST_SET_ADDRESS:
+		USBD_LOG_DBG("REQ_SET_ADDRESS, addr 0x%x\r\n", value);
+		usbd_set_address(value);
+		break;
+
+	case USB_REQUEST_GET_DESCRIPTOR:
+		USBD_LOG_DBG("REQ_GET_DESCRIPTOR\r\n");
+		ret = usbd_get_descriptor(value, data, len);
+		break;
+
+	case USB_REQUEST_SET_DESCRIPTOR:
+		USBD_LOG_DBG("Device req 0x%02x not implemented\r\n", setup->bRequest);
+		ret = false;
+		break;
+
+	case USB_REQUEST_GET_CONFIGURATION:
+		USBD_LOG_DBG("REQ_GET_CONFIGURATION\r\n");
+		/* indicate if we are configured */
+		*data = (uint8_t *)&usbd_core_cfg.configuration;
+		*len = 1;
+		break;
+
+	case USB_REQUEST_SET_CONFIGURATION:
+		value &= 0xFF;
+		USBD_LOG_DBG("REQ_SET_CONFIGURATION, conf 0x%x\r\n", value);
+		if (!usbd_set_configuration(value, 0))
+		{
+			USBD_LOG_DBG("USB Set Configuration failed\r\n");
+			ret = false;
+		}
+		else
+		{
+			/* configuration successful,
+			 * update current configuration
+			 */			
+			usbd_core_cfg.configuration = value;
+			usbd_event_notify_handler(USB_EVENT_CONFIGURED,NULL);
+		}
+		break;
+	case USB_REQUEST_GET_INTERFACE:
+		break;
+
+	case USB_REQUEST_SET_INTERFACE:
+		break;
+
+	default:
+		USBD_LOG_ERR("Illegal device req 0x%02x\r\n", setup->bRequest);
+		ret = false;
+		break;
+	}
+
+	return ret;
+}
+
+/**
+ * @brief handle a standard interface request
+ *
+ * @param [in]     setup    The setup packet
+ * @param [in,out] len      Pointer to data length
+ * @param [in]     ep0_data_buf Data buffer
+ *
+ * @return true if the request was handled successfully
+ */
+static bool usbd_std_interface_req_handler(struct usb_setup_packet *setup,
+										   uint8_t **data, uint32_t *len)
+{
+	/** The device must be configured to accept standard interface
+	 * requests and the addressed Interface must be valid.
+	 */
+	if (!is_device_configured() ||
+		(!is_interface_valid((uint8_t)setup->wIndex)))
+	{
+		return false;
+	}
+
+	switch (setup->bRequest)
+	{
+	case USB_REQUEST_GET_STATUS:
+		/* no bits specified */
+		*data = (uint8_t *)&usbd_core_cfg.remote_wakeup;
+
+		*len = 2;
+		break;
+
+	case USB_REQUEST_CLEAR_FEATURE:
+	case USB_REQUEST_SET_FEATURE:
+		/* not defined for interface */
+		return false;
+
+	case USB_REQUEST_GET_INTERFACE:
+		/** This handler is called for classes that does not support
+		 * alternate Interfaces so always return 0. Classes that
+		 * support alternative interfaces handles GET_INTERFACE
+		 * in custom_handler.
+		 */
+		*data = (uint8_t *)&usbd_core_cfg.reserved;
+
+		*len = 1;
+		break;
+
+	case USB_REQUEST_SET_INTERFACE:
+		USBD_LOG_DBG("REQ_SET_INTERFACE\r\n");
+		usbd_set_interface(setup->wIndex, setup->wValue);
+		break;
+
+	default:
+		USBD_LOG_ERR("Illegal interface req 0x%02x\r\n", setup->bRequest);
+		return false;
+	}
+
+	return true;
+}
+
+/**
+ * @brief handle a standard endpoint request
+ *
+ * @param [in]     setup    The setup packet
+ * @param [in,out] len      Pointer to data length
+ * @param [in]     ep0_data_buf Data buffer
+ *
+ * @return true if the request was handled successfully
+ */
+static bool usbd_std_endpoint_req_handler(struct usb_setup_packet *setup, uint8_t **data, uint32_t *len)
+{
+	uint8_t ep = (uint8_t)setup->wIndex;
+
+	/* Check if request addresses valid Endpoint */
+	if (!is_ep_valid(ep))
+	{
+		return false;
+	}
+	switch (setup->bRequest)
+	{
+	case USB_REQUEST_GET_STATUS:
+		/** This request is valid for Control Endpoints when
+		 * the device is not yet configured. For other
+		 * Endpoints the device must be configured.
+		 * Firstly check if addressed ep is Control Endpoint.
+		 * If no then the device must be in Configured state
+		 * to accept the request.
+		 */
+		if (((ep & 0x7f) == 0) || is_device_configured())
+		{
+			/* bit 0 - Endpoint halted or not */
+			usbd_ep_is_stalled(ep, (uint8_t*)&usbd_core_cfg.remote_wakeup);
+			*data = (uint8_t *)&usbd_core_cfg.remote_wakeup;
+
+			*len = 2;
+			break;
+		}
+		return false;
+
+	case USB_REQUEST_CLEAR_FEATURE:
+		if (setup->wValue == USB_FEATURE_ENDPOINT_STALL)
+		{
+			/** This request is valid for Control Endpoints when
+			 * the device is not yet configured. For other
+			 * Endpoints the device must be configured.
+			 * Firstly check if addressed ep is Control Endpoint.
+			 * If no then the device must be in Configured state
+			 * to accept the request.
+			 */
+			if (((ep & 0x7f) == 0) || is_device_configured())
+			{
+				USBD_LOG_ERR("ep:%x clear halt\r\n", ep);
+				usbd_ep_clear_stall(ep);
+				usbd_event_notify_handler(USB_EVENT_CLEAR_HALT,NULL);
+				break;
+			}
+		}
+		/* only ENDPOINT_HALT defined for endpoints */
+		return false;
+
+	case USB_REQUEST_SET_FEATURE:
+		if (setup->wValue == USB_FEATURE_ENDPOINT_STALL)
+		{
+			/** This request is valid for Control Endpoints when
+			 * the device is not yet configured. For other
+			 * Endpoints the device must be configured.
+			 * Firstly check if addressed ep is Control Endpoint.
+			 * If no then the device must be in Configured state
+			 * to accept the request.
+			 */
+			if (((ep & 0x7f) == 0) || is_device_configured())
+			{
+				/* set HALT by stalling */
+				USBD_LOG_ERR("ep:%x set halt\r\n", ep);
+				usbd_ep_set_stall(ep);
+				usbd_event_notify_handler(USB_EVENT_SET_HALT,NULL);
+				break;
+			}
+		}
+		/* only ENDPOINT_HALT defined for endpoints */
+		return false;
+
+	case USB_REQUEST_SYNCH_FRAME:
+		/* For Synch Frame request the device must be configured */
+		if (is_device_configured())
+		{
+			/* Not supported, return false anyway */
+			USBD_LOG_DBG("ep req 0x%02x not implemented\r\n", setup->bRequest);
+		}
+		return false;
+	default:
+		USBD_LOG_ERR("Illegal ep req 0x%02x\r\n", setup->bRequest);
+		return false;
+	}
+
+	return true;
+}
+
+/**
+ * @brief default handler for standard ('chapter 9') requests
+ *
+ * If a custom request handler was installed, this handler is called first.
+ *
+ * @param [in]     setup    The setup packet
+ * @param [in]     ep0_data_buf Data buffer
+ * @param [in,out] len      Pointer to data length
+ *
+ * @return true if the request was handled successfully
+ */
+static int usbd_standard_request_handler(struct usb_setup_packet *setup, uint8_t **data, uint32_t *len)
+{
+	int rc = 0;
+
+	switch (setup->bmRequestType_b.Recipient)
+	{
+	case USB_REQUEST_TO_DEVICE:
+		if (usbd_std_device_req_handler(setup, data, len) == false)
+		{
+			rc = -1;
+		}
+		break;
+	case USB_REQUEST_TO_INTERFACE:
+		if (usbd_std_interface_req_handler(setup, data, len) == false)
+		{
+			rc = -1;
+		}
+		break;
+	case USB_REQUEST_TO_ENDPOINT:
+		if (usbd_std_endpoint_req_handler(setup, data, len) == false)
+		{
+			rc = -1;
+		}
+		break;
+	default:
+		rc = -1;
+	}
+	return rc;
+}
+
+/*
+ * The functions usbd_class_request_handler(), usbd_custom_request_handler() and usbd_vendor_request_handler()
+ * go through the interfaces one after the other and compare the
+ * bInterfaceNumber with the wIndex and and then call the appropriate
+ * callback of the USB function.
+ * Note, a USB function can have more than one interface and the
+ * request does not have to be directed to the first interface (unlikely).
+ * These functions can be simplified and moved to usb_handle_request()
+ * when legacy initialization throgh the usb_set_config() and
+ * usb_enable() is no longer needed.
+ */
+static int usbd_class_request_handler(struct usb_setup_packet *setup, uint8_t **data, uint32_t *len)
+{
+	USBD_LOG_DBG("bRequest 0x%02x, wIndex 0x%04x", setup->bRequest, setup->wIndex);
+	
+	if (setup->bmRequestType_b.Recipient != USB_REQUEST_TO_INTERFACE)
+	return -1;
+
+	usb_slist_t *i, *j;
+	usb_slist_for_each(i,&usbd_class_head)
+    {
+		usbd_class_t* class= usb_slist_entry(i,struct usbd_class,list);
+
+		usb_slist_for_each(j,&class->intf_list)
+    	{
+			usbd_interface_t* intf = usb_slist_entry(j,struct usbd_interface,list);
+			if(intf->class_handler && (intf->intf_num == (setup->wIndex & 0xFF)))
+				return intf->class_handler(setup, data, len);
+		}			
+	}
+	return -1;
+}
+
+static int usbd_vendor_request_handler(struct usb_setup_packet *setup, uint8_t **data, uint32_t *len)
+{
+	USBD_LOG_DBG("bRequest 0x%02x, wValue0x%04x, wIndex 0x%04x", setup->bRequest, setup->wValue, setup->wIndex);
+
+	if (setup->bmRequestType_b.Recipient != USB_REQUEST_TO_DEVICE)
+	return -1;
+
+#define USB_OSDESC_EXTENDED_COMPAT_ID	0x04
+	if(msosv1_desc)
+	{
+		if (setup->bRequest == msosv1_desc->vendor_code) 
+		{
+			switch (setup->wIndex) {
+			case USB_OSDESC_EXTENDED_COMPAT_ID:
+				USBD_LOG("Handle Compat ID\r\n");
+				*data = (uint8_t*)msosv1_desc->compat_id;
+				*len = msosv1_desc->compat_id_len;
+
+				return 0;
+			default:
+				break;
+			}
+		}
+	}
+
+	usb_slist_t *i, *j;
+	usb_slist_for_each(i,&usbd_class_head)
+    {
+		usbd_class_t* class= usb_slist_entry(i,struct usbd_class,list);
+
+		usb_slist_for_each(j,&class->intf_list)
+    	{
+			usbd_interface_t* intf = usb_slist_entry(j,struct usbd_interface,list);
+			if(intf->vendor_handler && ((intf->intf_num == (setup->wValue & 0xFF)) || (intf->intf_num == (setup->wIndex & 0xFF))))
+				return intf->vendor_handler(setup, data, len);
+		}			
+	}
+
+	return -1;
+}
+
+static int usbd_custom_request_handler(struct usb_setup_packet *setup, uint8_t **data, uint32_t *len)
+{
+	USBD_LOG_DBG("bRequest 0x%02x, wIndex 0x%04x", setup->bRequest, setup->wIndex);
+
+	if (setup->bmRequestType_b.Recipient != USB_REQUEST_TO_INTERFACE)
+	return -1;
+
+	usb_slist_t *i, *j;
+	usb_slist_for_each(i,&usbd_class_head)
+    {
+		usbd_class_t* class= usb_slist_entry(i,struct usbd_class,list);
+
+		usb_slist_for_each(j,&class->intf_list)
+    	{
+			usbd_interface_t* intf = usb_slist_entry(j,struct usbd_interface,list);
+			if(intf->custom_handler && (intf->intf_num == (setup->wIndex & 0xFF)))
+				return intf->custom_handler(setup, data, len);
+		}			
+	}
+
+	return -1;
+}
+
+/**
+ * @brief handle a request by calling one of the installed request handlers
+ *
+ * Local function to handle a request by calling one of the installed request
+ * handlers. In case of data going from host to device, the data is at *ppbData.
+ * In case of data going from device to host, the handler can either choose to
+ * write its data at *ppbData or update the data pointer.
+ *
+ * @param [in]     setup The setup packet
+ * @param [in,out] data  Data buffer
+ * @param [in,out] len   Pointer to data length
+ *
+ * @return true if the request was handles successfully
+ */
+static bool usbd_setup_request_handler(struct usb_setup_packet *setup, uint8_t **data, uint32_t *len)
+{
+	uint8_t type = setup->bmRequestType_b.Type;
+
+	if (type == USB_REQUEST_STANDARD)
+	{
+		if(!usbd_custom_request_handler(setup, data, len))
+		{
+			return true;
+		}
+
+		if (usbd_standard_request_handler(setup, data, len) < 0)
+		{
+			USBD_LOG_ERR("Handler Error %d\r\n", type);
+			usbd_print_setup(setup);
+			return false;
+		}
+	}
+	else if (type == USB_REQUEST_CLASS)
+	{
+		if (usbd_class_request_handler(setup, data, len) < 0)
+		{
+			USBD_LOG_ERR("Handler Error %d\r\n", type);
+			usbd_print_setup(setup);
+			return false;
+		}
+	}
+	else if (type == USB_REQUEST_VENDOR)
+	{
+		if (usbd_vendor_request_handler(setup, data, len) < 0)
+		{
+			USBD_LOG_ERR("Handler Error %d\r\n", type);
+			usbd_print_setup(setup);
+			return false;
+		}
+	}
+	else
+	{
+		return false;
+	}
+	return true;
+}
+/**
+ * @brief send data or status to host
+ *
+ * @return N/A
+ */
+static void usbd_send_to_host(uint16_t len)
+{
+	uint32_t chunk = 0U;
+	if (usbd_core_cfg.zlp_flag == false)
+	{
+		chunk = usbd_core_cfg.ep0_data_buf_residue;
+		usbd_ep_write(USB_CONTROL_IN_EP0, usbd_core_cfg.ep0_data_buf,
+						usbd_core_cfg.ep0_data_buf_residue, &chunk);
+		usbd_core_cfg.ep0_data_buf += chunk;
+		usbd_core_cfg.ep0_data_buf_residue -= chunk;
+		/*
+		 * Set ZLP flag when host asks for a bigger length and the
+		 * last chunk is wMaxPacketSize long, to indicate the last
+		 * packet.
+		 */
+		/* Send less data as requested during the Setup stage */
+		if ((!usbd_core_cfg.ep0_data_buf_residue) && !(usbd_core_cfg.ep0_data_buf_len % USB_CTRL_EP_MPS)) 
+		{
+				/* Transfers a zero-length packet */
+				// LOG_DBG("ZLP, requested %u , length %u ",
+				// 	len, usb_dev.ep0_data_buf_len);
+				usbd_core_cfg.zlp_flag = true;
+		}
+	}
+	else
+	{
+		usbd_core_cfg.zlp_flag = false;
+		usbd_ep_write(USB_CONTROL_IN_EP0, NULL, 0, NULL);
+	}
+}
+
+static void usbd_ep0_setup_handler(void)
+{
+	struct usb_setup_packet *setup = &usbd_core_cfg.setup;
+	/*
+	* OUT transfer, Setup packet,
+	* reset request message state machine
+	*/
+	if (usbd_ep_read(USB_CONTROL_OUT_EP0, (uint8_t *)setup,
+							sizeof(struct usb_setup_packet), NULL) < 0)
+	{
+		USBD_LOG_ERR("Read Setup Packet failed\r\n");
+		usbd_ep_set_stall(USB_CONTROL_IN_EP0);
+		return;
+	}
+
+	//usbd_print_setup(setup);
+
+	if (setup->wLength > USB_REQUEST_BUFFER_SIZE)
+	{
+		if (setup->bmRequestType_b.Dir != USB_REQUEST_DEVICE_TO_HOST)
+		{
+			USBD_LOG_ERR("Request buffer too small\r\n");
+			usbd_ep_set_stall(USB_CONTROL_IN_EP0);
+			return;
+		}
+	}
+
+	// usbd_core_cfg.ep0_data_buf = usbd_core_cfg.req_data;
+	usbd_core_cfg.ep0_data_buf_residue = setup->wLength;
+	usbd_core_cfg.ep0_data_buf_len = setup->wLength;
+	usbd_core_cfg.zlp_flag = false;
+
+	/* this maybe set code in class request code  */
+	if (setup->wLength &&
+		setup->bmRequestType_b.Dir == USB_REQUEST_HOST_TO_DEVICE)
+	{
+		USBD_LOG_DBG("D\r\n");
+		/*set ep ack to recv next data*/
+		usbd_ep_read(USB_CONTROL_OUT_EP0,NULL,0,NULL);
+		return;
+	}
+
+	/* Ask installed handler to process request */
+	if (!usbd_setup_request_handler(setup, &usbd_core_cfg.ep0_data_buf, &usbd_core_cfg.ep0_data_buf_len))
+	{
+		USBD_LOG_ERR("usbd_setup_request_handler failed\r\n");
+		usbd_ep_set_stall(USB_CONTROL_IN_EP0);
+		return;
+	}
+
+	/* Send smallest of requested and offered length */
+	usbd_core_cfg.ep0_data_buf_residue = MIN(usbd_core_cfg.ep0_data_buf_len,
+											  setup->wLength);
+	/*Send data or status to host*/
+	usbd_send_to_host(setup->wLength);
+}
+
+static void usbd_ep0_out_handler(void)
+{
+	uint32_t chunk = 0U;
+	struct usb_setup_packet *setup = &usbd_core_cfg.setup;
+
+	/* OUT transfer, data or status packets */
+	if (usbd_core_cfg.ep0_data_buf_residue <= 0)
+	{
+		/* absorb zero-length status message */
+		USBD_LOG_DBG("Z\r\n");
+		if (usbd_ep_read(USB_CONTROL_OUT_EP0,
+						    usbd_core_cfg.ep0_data_buf,
+						    0, &chunk) < 0)
+		{
+			USBD_LOG_ERR("Read DATA Packet failed\r\n");
+			usbd_ep_set_stall(USB_CONTROL_IN_EP0);
+			return;
+		}
+	}
+
+	usbd_core_cfg.ep0_data_buf = usbd_core_cfg.req_data;
+	/* OUT transfer, data or status packets */
+	if (usbd_ep_read(USB_CONTROL_OUT_EP0,
+						usbd_core_cfg.ep0_data_buf,
+						usbd_core_cfg.ep0_data_buf_residue, &chunk) < 0)
+	{
+		USBD_LOG_ERR("Read DATA Packet failed\r\n");
+		usbd_ep_set_stall(USB_CONTROL_IN_EP0);
+		return;
+	}
+
+	usbd_core_cfg.ep0_data_buf += chunk;
+	usbd_core_cfg.ep0_data_buf_residue -= chunk;
+
+	if (usbd_core_cfg.ep0_data_buf_residue == 0) 
+	{
+		/* Received all, send data to handler */
+		usbd_core_cfg.ep0_data_buf = usbd_core_cfg.req_data;
+		if (!usbd_setup_request_handler(setup, &usbd_core_cfg.ep0_data_buf, &usbd_core_cfg.ep0_data_buf_len))
+		{
+			USBD_LOG_ERR("usbd_setup_request_handler1 failed\r\n");
+			usbd_ep_set_stall(USB_CONTROL_IN_EP0);
+			return;
+		}
+
+		/*Send status to host*/
+		usbd_send_to_host(setup->wLength);
+	}
+	else
+	{
+		USBD_LOG_ERR("ep0_data_buf_residue is not zero\r\n");
+	}
+}
+static void usbd_ep0_in_handler(void)
+{
+	struct usb_setup_packet *setup = &usbd_core_cfg.setup;
+	/* Send more data if available */
+	if (usbd_core_cfg.ep0_data_buf_residue != 0 || usbd_core_cfg.zlp_flag == true) 
+	{
+		usbd_send_to_host(setup->wLength);
+	}
+}
+
+static void usbd_ep_out_handler(uint8_t ep)
+{
+#if USBD_EP_CALLBACK_SEARCH_METHOD == 0
+	usb_slist_t *i, *j, *k;
+	usb_slist_for_each(i,&usbd_class_head)
+    {
+		usbd_class_t* class= usb_slist_entry(i,struct usbd_class,list);
+
+		usb_slist_for_each(j,&class->intf_list)
+    	{
+			usbd_interface_t* intf = usb_slist_entry(j,struct usbd_interface,list);
+
+			usb_slist_for_each(k,&intf->ep_list)
+    		{
+				usbd_endpoint_t* ept = usb_slist_entry(k,struct usbd_endpoint,list);
+				if((ept->ep_addr == ep) && ept->ep_cb)
+					ept->ep_cb(ep);	
+			}
+		}			
+	}
+#else
+	if(usbd_core_cfg.out_ep_cb[ep & 0x7f])
+		usbd_core_cfg.out_ep_cb[ep & 0x7f](ep);
+#endif
+}
+
+static void usbd_ep_in_handler(uint8_t ep)
+{
+#if USBD_EP_CALLBACK_SEARCH_METHOD == 0
+	usb_slist_t *i, *j, *k;
+	usb_slist_for_each(i,&usbd_class_head)
+    {
+		usbd_class_t* class= usb_slist_entry(i,struct usbd_class,list);
+
+		usb_slist_for_each(j,&class->intf_list)
+    	{
+			usbd_interface_t* intf = usb_slist_entry(j,struct usbd_interface,list);
+
+			usb_slist_for_each(k,&intf->ep_list)
+    		{
+				usbd_endpoint_t* ept = usb_slist_entry(k,struct usbd_endpoint,list);
+				if((ept->ep_addr == ep) && ept->ep_cb)
+					ept->ep_cb(ep);
+			}
+		}			
+	}
+#else
+	if(usbd_core_cfg.in_ep_cb[ep & 0x7f])
+		usbd_core_cfg.in_ep_cb[ep & 0x7f](ep);
+#endif
+}
+
+static void usbd_class_event_notify_handler(uint8_t event, void* arg)
+{
+	usb_slist_t *i, *j;
+	usb_slist_for_each(i,&usbd_class_head)
+    {
+		usbd_class_t* class= usb_slist_entry(i,struct usbd_class,list);
+
+		usb_slist_for_each(j,&class->intf_list)
+    	{
+			usbd_interface_t* intf = usb_slist_entry(j,struct usbd_interface,list);
+			if(intf->notify_handler)
+				intf->notify_handler(event, arg);
+		}			
+	}
+}
+
+void usbd_event_notify_handler(uint8_t event, void* arg)
+{
+	switch (event)
+	{
+		case USB_EVENT_RESET:
+#if USBD_EP_CALLBACK_SEARCH_METHOD == 1
+			usbd_ep_callback_register();
+#endif
+		case USB_EVENT_ERROR:
+		case USB_EVENT_SOF:
+		case USB_EVENT_CONNECTED:
+		case USB_EVENT_CONFIGURED:
+		case USB_EVENT_SUSPEND:
+		case USB_EVENT_DISCONNECTED:
+		case USB_EVENT_RESUME:
+		case USB_EVENT_SET_INTERFACE:				
+		case USB_EVENT_SET_REMOTE_WAKEUP:
+		case USB_EVENT_CLEAR_REMOTE_WAKEUP:
+		case USB_EVENT_SET_HALT:
+		case USB_EVENT_CLEAR_HALT:
+			usbd_class_event_notify_handler(event, arg);
+		break;
+		case USB_EVENT_SETUP_NOTIFY:
+			usbd_ep0_setup_handler();
+			break;
+		case USB_EVENT_EP0_IN_NOTIFY:
+			usbd_ep0_in_handler();
+			break;
+		case USB_EVENT_EP0_OUT_NOTIFY:
+			usbd_ep0_out_handler();
+			break;
+		case USB_EVENT_EP_IN_NOTIFY:
+			usbd_ep_in_handler((uint32_t)arg);
+			break;
+		case USB_EVENT_EP_OUT_NOTIFY:
+			usbd_ep_out_handler((uint32_t)arg);
+			break;
+		default:
+			USBD_LOG_ERR("USB unknown event: %d", event);
+			break;
+	}
+}
+
+void usbd_desc_register(const uint8_t *desc)
+{
+	usbd_core_cfg.descriptors = desc;
+}
+/* Register MS OS Descriptors version 1 */
+void usbd_msosv1_desc_register(struct usb_msosv1_descriptor *desc)
+{
+	msosv1_desc = desc;
+}
+
+void usbd_class_register(usbd_class_t *class)
+{
+	usb_slist_add_tail(&usbd_class_head,&class->list);
+	usb_slist_init(&class->intf_list);
+}
+
+void usbd_class_add_interface(usbd_class_t *class,usbd_interface_t *intf)
+{
+	static uint8_t intf_offset = 0;
+	intf->intf_num = intf_offset;
+	usb_slist_add_tail(&class->intf_list,&intf->list);
+	usb_slist_init(&intf->ep_list);
+	intf_offset++;
+}
+
+void usbd_interface_add_endpoint(usbd_interface_t *intf,usbd_endpoint_t *ep)
+{
+	usb_slist_add_tail(&intf->ep_list,&ep->list);
+}
diff --git a/components/usb_stack/core/usbd_core.h b/components/usb_stack/core/usbd_core.h
new file mode 100644
index 00000000..e561d986
--- /dev/null
+++ b/components/usb_stack/core/usbd_core.h
@@ -0,0 +1,142 @@
+/**
+ * @file usbd_core.h
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#ifndef _USBD_CORE_H
+#define _USBD_CORE_H
+
+#include "usb_util.h"
+#include "usb_def.h"
+#include "usb_dc.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+enum usb_event_type 
+{
+	/** USB error reported by the controller */
+	USB_EVENT_ERROR,
+	/** USB reset */
+	USB_EVENT_RESET,
+	/** Start of Frame received */
+	USB_EVENT_SOF,		
+	/** USB connection established, hardware enumeration is completed */
+	USB_EVENT_CONNECTED,
+	/** USB configuration done */
+	USB_EVENT_CONFIGURED,	
+	/** USB connection suspended by the HOST */
+	USB_EVENT_SUSPEND,
+	/** USB connection lost */
+	USB_EVENT_DISCONNECTED,	
+	/** USB connection resumed by the HOST */
+	USB_EVENT_RESUME,	
+
+	/** USB interface selected */
+	USB_EVENT_SET_INTERFACE,
+	/** USB interface selected */
+	USB_EVENT_SET_REMOTE_WAKEUP,
+	/** USB interface selected */
+	USB_EVENT_CLEAR_REMOTE_WAKEUP,
+	/** Set Feature ENDPOINT_HALT received */
+	USB_EVENT_SET_HALT,
+	/** Clear Feature ENDPOINT_HALT received */
+	USB_EVENT_CLEAR_HALT,
+	/** setup packet received */
+	USB_EVENT_SETUP_NOTIFY,
+	/** ep0 in packet received */
+	USB_EVENT_EP0_IN_NOTIFY,
+	/** ep0 out packet received */
+	USB_EVENT_EP0_OUT_NOTIFY,
+	/** ep in packet except ep0 received */
+	USB_EVENT_EP_IN_NOTIFY,
+	/** ep out packet except ep0 received */
+	USB_EVENT_EP_OUT_NOTIFY,
+	/** Initial USB connection status */
+	USB_EVENT_UNKNOWN
+};
+
+/**
+ * @brief Callback function signature for the USB Endpoint status
+ */
+typedef void (*usbd_endpoint_callback)(uint8_t ep);
+
+/**
+ * @brief Callback function signature for class specific requests
+ *
+ * Function which handles Class specific requests corresponding to an
+ * interface number specified in the device descriptor table. For host
+ * to device direction the 'len' and 'payload_data' contain the length
+ * of the received data and the pointer to the received data respectively.
+ * For device to host class requests, 'len' and 'payload_data' should be
+ * set by the callback function with the length and the address of the
+ * data to be transmitted buffer respectively.
+ */
+typedef int (*usbd_request_handler)(struct usb_setup_packet *setup,
+				   uint8_t **data,uint32_t *transfer_len);
+
+/* callback function pointer structure for Application to handle events */
+typedef void (*usbd_notify_handler)(uint8_t event, void* arg);
+
+typedef struct usbd_endpoint
+{
+	usb_slist_t list;
+	uint8_t ep_addr;
+	usbd_endpoint_callback ep_cb;
+} usbd_endpoint_t;
+
+typedef struct usbd_interface
+{
+	usb_slist_t list;
+	/** Handler for USB Class specific Control (EP 0) communications */
+	usbd_request_handler class_handler;
+	/** Handler for USB Vendor specific commands */
+	usbd_request_handler vendor_handler;
+	/** Handler for USB custom specific commands */
+	usbd_request_handler custom_handler;
+	/** Handler for USB event notify commands */
+	usbd_notify_handler  notify_handler;
+	uint8_t intf_num;
+	usb_slist_t ep_list;
+} usbd_interface_t;
+
+typedef struct usbd_class
+{
+	usb_slist_t list;
+	const char *name;
+	usb_slist_t intf_list;	
+} usbd_class_t;
+
+void usbd_event_notify_handler(uint8_t event, void* arg);
+
+void usbd_desc_register(const uint8_t *desc);
+void usbd_class_register(usbd_class_t *class);
+void usbd_msosv1_desc_register(struct usb_msosv1_descriptor *desc);
+void usbd_class_add_interface(usbd_class_t *class,usbd_interface_t *intf);
+void usbd_interface_add_endpoint(usbd_interface_t *intf,usbd_endpoint_t *ep);
+/**
+ * @}
+ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
diff --git a/docs/chipSpecification/bl70x_docs/BL702_BL704_706_RM_EN_1.1.pdf b/docs/chipSpecification/bl70x_docs/BL702_BL704_706_RM_EN_1.1.pdf
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diff --git a/docs/development_guide/Makefile b/docs/development_guide/Makefile
new file mode 100644
index 00000000..d0c3cbf1
--- /dev/null
+++ b/docs/development_guide/Makefile
@@ -0,0 +1,20 @@
+# Minimal makefile for Sphinx documentation
+#
+
+# You can set these variables from the command line, and also
+# from the environment for the first two.
+SPHINXOPTS    ?=
+SPHINXBUILD   ?= sphinx-build
+SOURCEDIR     = source
+BUILDDIR      = build
+
+# Put it first so that "make" without argument is like "make help".
+help:
+	@$(SPHINXBUILD) -M help "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)
+
+.PHONY: help Makefile
+
+# Catch-all target: route all unknown targets to Sphinx using the new
+# "make mode" option.  $(O) is meant as a shortcut for $(SPHINXOPTS).
+%: Makefile
+	@$(SPHINXBUILD) -M $@ "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)
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diff --git a/docs/development_guide/build/html/.buildinfo b/docs/development_guide/build/html/.buildinfo
new file mode 100644
index 00000000..b2984659
--- /dev/null
+++ b/docs/development_guide/build/html/.buildinfo
@@ -0,0 +1,4 @@
+# Sphinx build info version 1
+# This file hashes the configuration used when building these files. When it is not found, a full rebuild will be done.
+config: cc25d7d982b3f2727b74849d9127cb3d
+tags: 645f666f9bcd5a90fca523b33c5a78b7
diff --git a/docs/development_guide/build/html/Linux_quick_start_ubuntu.html b/docs/development_guide/build/html/Linux_quick_start_ubuntu.html
new file mode 100644
index 00000000..5e98c5a0
--- /dev/null
+++ b/docs/development_guide/build/html/Linux_quick_start_ubuntu.html
@@ -0,0 +1,392 @@
+
+
+
+
+
+  
+  
+  
+  
+  4. Linux 环境开发指南 — BL_MCU_SDK 开发指南 0.1 文档
+  
+
+  
+  
+  
+
+  
+  
+
+  
+  
+
+  
+
+  
+  
+  
+    
+      
+        
+        
+        
+        
+    
+    
+
+    
+    
+    
+    
+     
+
+
+
+
+   
+  

+    
+    
+
+    

+
+      
+      
+
+
+      

+        
+        

+        
+          
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+

+
+  
+
+  
+  

+

+          

+           

+            
+  

+
4. Linux 环境开发指南

+
本文档介绍了如何在 Linux 安装配置 BL702 系列 MCU 需要的软件开发工具。

+

+
4.1. 需要的软硬件环境

+
    
+
  • 一根 mini USB 数据线
    • 
+
  • 一个 USB-TTL 串口模块
    • 
+
  • 杜邦线若干
    • 
+

+

+

+
4.2. 配置 RISC-V 工具链

+
1
+2
+3
+4
+5
+6
+7
$ cd ~
+$ wget -c https://dev.bouffalolab.com/media/upload/download/riscv64-elf-x86_64-20210120.tar.gz
+$ mkdir -p riscv64-elf-20210120
+$ tar -zxvf riscv64-elf-x86_64-20210120.tar.gz -C riscv64-elf-20210120
+$ sudo cp ~/riscv64-elf-20210120  /usr/bin
+$ echo "export PATH=\"$PATH:/usr/bin/riscv64-elf-20210120/bin\""  >> ~/.bashrc
+$ source ~/.bashrc
+

+

+

+

+
4.3. 配置 cmake & make 工具

+
1
+2
+3
+4
+5
+6
+7
+8
$ sudo apt update
+$ sudo apt install make
+$ cd ~
+$ wget -c https://cmake.org/files/v3.19/cmake-3.19.3-Linux-x86_64.tar.gz
+$ tar -zxvf cmake-3.19.3-Linux-x86_64.tar.gz
+$ sudo cp ~/cmake-3.19.3-Linux-x86_64  /usr/bin
+$ echo "export PATH=\"$PATH:/usr/bin/cmake-3.19.3-Linux-x86_64/bin\""  >> ~/.bashrc
+$ source ~/.bashrc
+

+

+

+

+
4.4. 硬件连接

+
    
+
  • 具体开发板的连接, 请参考 硬件连接 部分
    • 
+
  • 请确保开发板正确设置后再进行下面的步骤 (建议 Linux 下采用串口连接)
    • 
+

+

+

+
4.5. 获取 bl_mcu_sdk

+
    
+
  • 打开终端输入以下命令获取 bl_mcu_sdk
    • 
+

+
1
+2
 $ cd ~
+ $ git clone https://gitee.com/bouffalolab/bl_mcu_sdk.git  --recursive
+

+

+

+

+
4.6. 测试 Hello World 工程

+

+
4.6.1. 打开 Hello World

+
    
+
  • 获取到 SDK 后，进入 sdk 中的 examples/hellowd/helloworld 目录下，打开 main.c，即可编辑 helloworld 的相关代码。
    • 
+

+
1
+2
 $ cd ~/bl_mcu_sdk/examples/hellowd/helloworld
+ $ vi main.c
+

+

+
    
+
  • 若编辑完成后，保存修改并关闭文件，接下来进行编译
    • 
+

+

+

+
4.6.2. 编译 Hello World

+
1
+2
 $ cd ~/bl_mcu_sdk
+ $ make build BOARD=bl706_iot APP=helloworld
+

+

+

+

+
4.6.3. 烧写 Hello World

+
    
+
  • 烧写前请先确认烧写方式，若采用串口烧写，请先按住板子上的 boot 键不要释放，此时在按下 rst 键，然后释放两个键，此时板子进入 boot_rom 状态。
    • 
+
  • 这时在终端中输入以下命令进行烧写
    • 
+

+
1
+2
 $ cd ~/bl_mcu_sdk
+ $ make download INTERFACE=uart
+

+

+
    
+
  • 如果下载失败请检查：
    
+
      
+
      • 
+
      1. 是否使用串口烧写，开发板是否供电，硬件连接是否正确。
        2. 
+
      
+
      • 
+
      • 
+
      1. 烧写命令是否在 bl_mcu_sdk 目录下执行
        2. 
+
      
+
      • 
+
      • 
+
      1. 是否进入 boot_rom 模式
        2. 
+
      
+
      • 
+
      • 
+
      1. 串口是否被占用
        2. 
+
      
+
      • 
+
    
+
    • 
+

+

+

+
4.6.4. 运行 Hello World

+
    
+
  • 打开新的终端，安装、运行串口工具
    • 
+

+
1
+2
 $ sudo apt install picocom   # 若已经安装请忽略
+ $ picocom -b 2000000 /dev/ttyUSB0
+

+

+
    
+
  • 按一下开发板上的 rst 按键，即可在串口终端中看到 hello world！
    • 
+

+

+
+
helloworld!

+

+

+

+
4.6.5. 调试 Hello World

+

+

+

+
+
+           

+           
+          

+          
+        

+      

+
+    

+
+  

+  
+
+  
+
+  
+  
+    
+   
+
+
+
\ No newline at end of file
diff --git a/docs/development_guide/build/html/Windows_quick_start_cdk.html b/docs/development_guide/build/html/Windows_quick_start_cdk.html
new file mode 100644
index 00000000..00827321
--- /dev/null
+++ b/docs/development_guide/build/html/Windows_quick_start_cdk.html
@@ -0,0 +1,412 @@
+
+
+
+
+
+  
+  
+  
+  
+  2. Windows 下使用 CDK (类 MDK Keil)开发指南 — BL_MCU_SDK 开发指南 0.1 文档
+  
+
+  
+  
+  
+
+  
+  
+
+  
+  
+
+  
+
+  
+  
+  
+    
+      
+        
+        
+        
+        
+    
+    
+
+    
+    
+    
+    
+     
+
+
+
+
+   
+  

+    
+    
+
+    

+
+      
+      
+
+
+      

+        
+        

+        
+          
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+

+
+  
    
+    
+      
  •  »
    • 
+        
+      
  • 2. Windows 下使用 CDK (类 MDK Keil)开发指南
    • 
+    
+    
+      
  • 
+        
+          
+             View page source
+          
+        
+      
    • 
+    
+  

+
+  
+  

+

+          

+           

+            
+  

+
2. Windows 下使用 CDK (类 MDK Keil)开发指南

+
本文档介绍了如何在 Windows 下使用 平头哥半导体 开发的 CDK 集成开发环境，
+来完成博流 BL702 系列 MCU 的相关软件开发工作。

+
关于剑池 CDK ，这是一款由平头哥半导体开发打造的集成开发环境。它拥有和传统 MCU 开发环境十分近似的操作和设置，旨在不改变用户开发习惯的基础上，全面接入云端开发资源，结合图形化的 OSTracer、Profiling 等调试分析工具，加速用户产品开发。

+

+
2.1. 需要的软硬件环境

+
    
+
  • 剑池 CDK 软件
    • 
+
  • 一根 USB Type-A 数据线
    • 
+
  • 一个 CK-Link 仿真器
    • 
+
  • 一个 USB-TTL 串口模块
    • 
+
  • 杜邦线若干
    • 
+

+

+

+
2.2. 下载剑池 CDK 软件安装包

+
    
+
  • 剑池CDK 软件安装可以从平头哥半导体 OCC 官网获取到。
    • 
+
  • 下载完成后，解压缩，双击 setup.exe，按照其提示，完成软件安装即可。
    • 
+

+

+

+
2.3. 下载 bl_mcu_sdk 软件开发包

+
    
+
  • 从开源社区下载 bl_mcu_sdk 软件开发包。
    
+
      
+
    • 可以使用 git clone 或者直接 download 的方式下 SDK
      • 
+
    • 使用 git clone 前请确保已正确安装 git，打开支持 git 的终端输入以下命令即可获取最新的 SDK。
      • 
+
    
+
    1
    $ git clone https://gitee.com/bouffalolab/bl_mcu_sdk.git  --recursive
+
    
+
    
+
    • 
+

+

+

+
2.4. 硬件连接

+
    
+
  • 具体开发板的连接, 请参考 硬件连接 部分
    • 
+
  • 请确保开发板被正确设置后再进行下面的步骤
    • 
+

+

+

+
2.5. 测试 Hello World 工程

+

+
2.5.1. 打开 Hello World

+
    
+
  • 获取到 SDK 后，进入 sdk 中的 examples/hellowd/helloworld/cdk 目录下，双击 helloworld.cdkproj，即可打开 Helloworld 工程。
    • 
+

+

+

+
2.5.2. 编译 Hello World

+

+
+
helloworld.cdkproj

+

+
    
+
  • 在 CDK 工具栏中，点击编译图标即可编译工程
    
+
      
+
    • 点击 1 处 图标 Build Project 即可编译当前选中的工程
      • 
+
    • 点击 2 处 图标 Clean Project 即可清除上次编译的结果
      • 
+
    • 点击 3 处 图标 Flash Download 即可将编译好的代码下载到芯片中
      • 
+
    • 点击 4 处 图标 Start/Stop Debug 即可进行 debug 的相关操作
      • 
+
    • 也可以在 Project 中，右击工程名称，通过右击菜单中的选项对项目进行编译等操作
      • 
+
    
+
    • 
+

+

+

+
2.5.3. 烧写 Hello World

+
    
+
  • 由于目前 CDK 软件中还没有包含我们的 flash 算法，所以需要我们手动将 flash 算法放到 CDK 安装目录，具体操作如下：
    
+
      
+
    • 进入 SDK 目录下 tools\cdk_flashloader 目录
      • 
+
    • 将目录下的 bl70x_flasher.elf 文件，拷贝到 CDK 工具的 C-Sky\CDK\CSKY\Flash 目录中
      • 
+
    
+
    
+
+
    CDK Flash Loader
    
+
    
+
    • 
+

+

+
+
CDK Project Setting

+

+
    
+
  • 点击 Project View 中的项目设置按钮，打开 Project Setting 窗口，或者通过右击 Project 名称中右击菜单栏中打开
    • 
+
  • 在打开的 Project Setting 窗口中，选择 Flash 标签，配置需要的 Flash 算法
    • 
+

+

+
+
CDK Project Flash setting

+

+
    
+
  • 在 Flash 标签中，点击 Add 按纽，在打开的列表中选择 bl70x_flash 算法，点击 Add 添加到工程中，Flash 标签下的其他设置，如图所示：
    • 
+
  • 点击 OK 后，如配置正确，点击 Flash Download 即可将编译好的代码下载到芯片中
    • 
+

+

+
+
CDK Flashdownload Success

+

+
    
+
  • 如下载失败请检查：
    
+
      
+
      • 
+
      1. 代码是否被正确编译，并生成 .elf .bin 等文件
        2. 
+
      
+
      • 
+
      • 
+
      1. Flash 算法是否被正确设置
        2. 
+
      
+
      • 
+
      • 
+
      1. CK-Link 与开发板是否正确连接
        2. 
+
      
+
      • 
+
      • 
+
      1. 开发板是否正常供电，电源指示灯是否点亮
        2. 
+
      
+
      • 
+
    
+
    • 
+

+

+

+
2.5.4. 运行 Hello World

+
    
+
  • 从 CDK 的菜单栏 View->Serial Pane，打开串口面板，在打开的 Serial Pane 中右击，进行串口设置，选择你对应的串口号和波特率
    • 
+

+

+_images/cdk4.png
+

+

+
+
CDK Serial Pane setting

+

+
    
+
  • 按下板子上的 RST 按键，即可在串口中看到代码的运行结果
    • 
+

+

+
+
HelloWorld！

+

+

+

+
2.5.5. 调试 Hello World

+
    
+
  • 点击工具栏上方的 Start/Stop Debugger 按钮，进入 debug 界面，如下图所示
    • 
+

+

+
+
Debug HelloWorld！

+

+
    
+
  • 在 debug 界面下，左侧的 Register 窗口中，可以查看 CPU 内部寄存器数据；右侧的 Peripherals 外设面板中，
+可以查看相应外设寄存器数据，外设的选择可以在顶部菜单栏的 Peripherals->System Viewer 选择；
+点击上方工具栏中的相关调试按钮可以进行断点设置、单步调试、指令单步和全速运行等操作。
+当然这些操作都有相应的快捷键和快捷设置方法，详情请参考 CDK Help，这里就不作过多介绍了。
    • 
+
  • 我们点击单步运行按钮，运行代码，即可看到指示光标移动到下一句代码，同时可以看到串口面板中显示了我们输出的 Hello World！
    • 
+

+

+
+
Debug HelloWorld！

+

+

+

+

+
+
+           

+           
+          

+          
+        

+      

+
+    

+
+  

+  
+
+  
+
+  
+  
+    
+   
+
+
+
\ No newline at end of file
diff --git a/docs/development_guide/build/html/Windows_quick_start_eclipse.html b/docs/development_guide/build/html/Windows_quick_start_eclipse.html
new file mode 100644
index 00000000..012e3d87
--- /dev/null
+++ b/docs/development_guide/build/html/Windows_quick_start_eclipse.html
@@ -0,0 +1,418 @@
+
+
+
+
+
+  
+  
+  
+  
+  3. Windows 下使用 Eclipse 开发指南 — BL_MCU_SDK 开发指南 0.1 文档
+  
+
+  
+  
+  
+
+  
+  
+
+  
+  
+
+  
+
+  
+  
+  
+    
+      
+        
+        
+        
+        
+    
+    
+
+    
+    
+    
+    
+     
+
+
+
+
+   
+  

+    
+    
+
+    

+
+      
+      
+
+
+      

+        
+        

+        
+          
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+

+
+  
    
+    
+      
  •  »
    • 
+        
+      
  • 3. Windows 下使用 Eclipse 开发指南
    • 
+    
+    
+      
  • 
+        
+          
+             View page source
+          
+        
+      
    • 
+    
+  

+
+  
+  

+

+          

+           

+            
+  

+
3. Windows 下使用 Eclipse 开发指南

+
本文档介绍了如何在 Windows 下使用 eclipse，构建 BL702 系列 MCU 的软件开发环境。

+

+
3.1. 需要的软硬件环境

+
    
+
  • Eclipse 免安装软件包
    • 
+
  • 串口助手软件
    • 
+
  • 一根 USB Type-A 数据线
    • 
+
  • 一个 j-link 仿真器
    • 
+
  • 一个 USB-TTL 串口模块
    • 
+
  • 杜邦线若干
    • 
+

+

+

+
3.2. 下载 Eclipse 安装包

+
+

+

+
3.3. 下载 bl_mcu_sdk

+
    
+
  • 从开源社区下载 bl_mcu_sdk 软件开发包。
    • 
+
  • 可以使用 git clone 或者直接 download 的方式下 SDK
    • 
+
  • 使用 git clone 前请确保已正确安装 git，打开支持 git 的终端输入以下命令即可获取最新的 SDK。
    • 
+

+
1
$ git clone https://gitee.com/bouffalolab/bl_mcu_sdk.git  --recursive
+

+

+

+

+
3.4. 配置 eclipse 开发环境

+
    
+
  • 将获取到的 eclipse 压缩包拷贝到您的工作目录，解压 eclipse 压缩包
    • 
+
  • 进入 eclipse 目录，双击 eclipse.exe 启动 eclipse
    • 
+
  • 选择您的 Workspace 目录，点击 Launch 进入工作空间
    
+
    
+
+
    
+
    • 
+
  • 点击菜单栏中 Window->preferences 打开环境配置相关页面，准备导入相关的配置环境
    
+
    
+
+
    
+
    • 
+
  • 点击下图 1 处的图标，打开导入配置界面，按照如图所示步骤，选择 eclipse.exe 目录下的 bflb_mcu_preferences.epf 配置文件。
    
+
    
+
+
    
+
    • 
+
  • 选择好对应的文件后，点击 Finish，在弹出的对话框选中点击 cancel ，不用重新启动。
    
+
    
+
+
    
+
    • 
+

+

+

+
3.5. 导入 bl_mcu_sdk

+
    
+
  • 点击 菜单栏 File->Import ，打开导入项目的配置界面
    
+
    
+
+
    
+
    • 
+
  • 在打开的 Import 窗口中选择 General->Existing Projects into Workspace ，然后点击 Next
    
+
    
+
+
    
+
    • 
+
  • 加载 bl_mcu_sdk 的工程路径后，点击 Finsh 完成导入
    
+
    
+
+
    
+
    • 
+
  • 导入完成后，关闭 Welcome 窗口即可看到导入的工程
    
+
    
+
+
    
+
    
+
+
    
+
    • 
+
  • 展开 Build Target 目录，即可看到 bl_clean、bl_make、download 三个功能按钮。
    
+
      
+
    • 双击 bl_clean 按钮，会清除 build 和 out 两个目录下的编译缓存
      • 
+
    • 双击 bl_make 按钮，会正常编译设置的 case，若没有修改默认配置则会编译 helloworld 工程
      • 
+
    • 双击 download 按钮，会下载代码到芯片中，若没有编译成功则会下载默认的或者上一次的 .bin 文件
      • 
+
    
+
    • 
+

+

+

+
3.6. 硬件连接

+
    
+
  • 具体开发板的连接, 请参考 硬件连接 部分；（eclipse 环境建议使用 j-link 烧写、调试）
    • 
+
  • 请确保开发板正确设置后再进行下面的步骤
    • 
+

+

+

+
3.7. 测试 Hello World 工程

+

+
3.7.1. 打开 Hello World

+
    
+
  • 打开 examples/hellowd/helloworld/main.c 文件，即可编辑、修改 helloworld 测试 demo 的代码，若修改了，请保存后在执行编译
    • 
+

+

+

+
3.7.2. 编译 Hello World

+
    
+
  • 双击 bl_make 即可编 helloworld 工程
    • 
+
  • 编译成功后 Console 窗口可以看到如下图所示的 log 信息
    • 
+

+

+_images/pic10.png
+

+

+

+
3.7.3. 烧写 Hello World

+
    
+
  • 双击 download 即可烧写 helloworld 工程 bin 文件到芯片中
    • 
+
  • 下载成功后 Console 窗口可以看到如下图所示的 log 信息
    • 
+

+

+_images/pic11.png
+

+

+

+
3.7.4. 运行 Hello World

+
    
+
  • 将开发板的 TXD0、RXD0 和 GND 引脚使用杜邦线连接到 USB-TTL 串口模块，将串口模块插入 PC 主机， 使用任意的串口助手软件打开串口
    • 
+
  • 烧写成功后，按下板子上的 rst 按键，如果下载正确，即可在串口助手软件中看到如下图所示的 log 信息。
    • 
+

+

+_images/eclipse_run.png
+

+

+

+
3.7.5. 调试 Hello World

+
    
+
  • 点击 eclipse 工具栏中的 Debug 按钮，进入 debug 配置窗口
    • 
+
  • 选择 GDB SEGGER J-Link Debugging->Jlink_bl_mcu_sdk  Debug 配置，在 C/C++ Application: 选项中选择需要调试的 .elf 文件
    • 
+
  • 先点击 Apply 后，在点击 Debug 即可进行 Debug
    • 
+

+

+
+

+
    
+
  • 进入 Debug 界面后，即可看到程序停在了 main，点击上方工具栏中的 Step Over，按钮即可对代码工程进行单步调试。
    • 
+

+

+
+
Eclipse Debugging

+

+

+

+

+
3.8. 编译烧写不同的目标工程

+
    
+
  • 当右击 bl_make 按钮，点击 Edit 后，会弹出更换目标工程的配置界面，如下图所示
    • 
+

+

+
+

+
    
+
  • 其中 APP=xxx 用户可以修改其内容，改为需要编译烧写的目标工程名，例如想要编译烧写 gpio/gpio_blink 工程，将其修改为 APP=gpio_blink 即可
    • 
+
  • Build command 中 make BOARD=bl706_iot 会指定不同的 Board 类型以指定适配不同类型的开发板。
    • 
+
  • Board 类型决定编译时选择相应的 borad 头文件。默认选择的是 BL706 的 iot 开发板 make build BOARD=bl706_iot
    • 
+

+

+

+
+
+           

+           
+          

+          
+        

+      

+
+    

+
+  

+  
+
+  
+
+  
+  
+    
+   
+
+
+
\ No newline at end of file
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+++ b/docs/development_guide/build/html/_sources/Linux_quick_start_ubuntu.rst.txt
@@ -0,0 +1,134 @@
+Linux 环境开发指南
+=============================
+
+本文档介绍了如何在 Linux 安装配置 BL702 系列 MCU 需要的软件开发工具。
+
+
+
+需要的软硬件环境
+-----------------------------
+
+-  一根 mini USB 数据线
+-  一个 USB-TTL 串口模块
+-  杜邦线若干
+
+配置 RISC-V 工具链
+-----------------------------
+
+.. code-block:: bash
+   :linenos:
+   :emphasize-lines: 4-6
+
+   $ cd ~
+   $ wget -c https://dev.bouffalolab.com/media/upload/download/riscv64-elf-x86_64-20210120.tar.gz
+   $ mkdir -p riscv64-elf-20210120
+   $ tar -zxvf riscv64-elf-x86_64-20210120.tar.gz -C riscv64-elf-20210120
+   $ sudo cp ~/riscv64-elf-20210120  /usr/bin
+   $ echo "export PATH=\"$PATH:/usr/bin/riscv64-elf-20210120/bin\""  >> ~/.bashrc
+   $ source ~/.bashrc
+
+配置 cmake & make 工具
+----------------------------
+
+.. code-block:: bash
+   :linenos:
+   :emphasize-lines: 5-7
+
+   $ sudo apt update
+   $ sudo apt install make
+   $ cd ~
+   $ wget -c https://cmake.org/files/v3.19/cmake-3.19.3-Linux-x86_64.tar.gz 
+   $ tar -zxvf cmake-3.19.3-Linux-x86_64.tar.gz
+   $ sudo cp ~/cmake-3.19.3-Linux-x86_64  /usr/bin
+   $ echo "export PATH=\"$PATH:/usr/bin/cmake-3.19.3-Linux-x86_64/bin\""  >> ~/.bashrc
+   $ source ~/.bashrc
+
+
+硬件连接
+----------------------
+
+-  具体开发板的连接, 请参考 :ref:`connect_hardware` 部分
+-  请确保开发板正确设置后再进行下面的步骤 (建议 Linux 下采用串口连接)
+
+
+获取 bl_mcu_sdk
+---------------------------
+
+-  打开终端输入以下命令获取 bl_mcu_sdk
+
+.. code-block:: bash
+   :linenos:
+
+    $ cd ~
+    $ git clone https://gitee.com/bouffalolab/bl_mcu_sdk.git  --recursive
+
+
+测试 Hello World 工程
+------------------------------
+
+打开 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  获取到 SDK 后，进入 sdk 中的 ``examples/hellowd/helloworld`` 目录下，打开 ``main.c``，即可编辑 helloworld 的相关代码。
+
+.. code-block:: bash
+   :linenos:
+
+    $ cd ~/bl_mcu_sdk/examples/hellowd/helloworld
+    $ vi main.c
+
+-  若编辑完成后，保存修改并关闭文件，接下来进行编译
+
+编译 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+.. code-block:: bash
+   :linenos:
+
+    $ cd ~/bl_mcu_sdk
+    $ make build BOARD=bl706_iot APP=helloworld
+
+
+烧写 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  烧写前请先确认烧写方式，若采用串口烧写，请先按住板子上的 ``boot`` 键不要释放，此时在按下 ``rst`` 键，然后释放两个键，此时板子进入 boot_rom 状态。
+-  这时在终端中输入以下命令进行烧写
+
+.. code-block:: bash
+   :linenos:
+
+    $ cd ~/bl_mcu_sdk
+    $ make download INTERFACE=uart
+
+-  如果下载失败请检查：
+
+   -  1. 是否使用串口烧写，开发板是否供电，硬件连接是否正确。
+   -  2. 烧写命令是否在 ``bl_mcu_sdk`` 目录下执行
+   -  3. 是否进入 boot_rom 模式
+   -  4. 串口是否被占用
+
+运行 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  打开新的终端，安装、运行串口工具
+
+.. code-block:: bash
+   :linenos:
+
+    $ sudo apt install picocom   # 若已经安装请忽略
+    $ picocom -b 2000000 /dev/ttyUSB0 
+
+-  按一下开发板上的 ``rst`` 按键，即可在串口终端中看到 ``hello world！``
+
+.. figure:: img/linux1.png
+   :alt:
+
+   helloworld!
+
+
+调试 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+
+
diff --git a/docs/development_guide/build/html/_sources/Windows_quick_start_cdk.rst.txt b/docs/development_guide/build/html/_sources/Windows_quick_start_cdk.rst.txt
new file mode 100644
index 00000000..5260c052
--- /dev/null
+++ b/docs/development_guide/build/html/_sources/Windows_quick_start_cdk.rst.txt
@@ -0,0 +1,164 @@
+Windows 下使用 CDK (类 MDK Keil)开发指南
+=============================
+
+本文档介绍了如何在 Windows 下使用 `平头哥半导体 `_ 开发的 CDK 集成开发环境，
+来完成博流 BL702 系列 MCU 的相关软件开发工作。
+
+关于剑池 CDK ，这是一款由平头哥半导体开发打造的集成开发环境。它拥有和传统 MCU 开发环境十分近似的操作和设置，旨在不改变用户开发习惯的基础上，全面接入云端开发资源，结合图形化的 OSTracer、Profiling 等调试分析工具，加速用户产品开发。
+
+
+需要的软硬件环境
+-----------------------------
+
+-  剑池 CDK 软件
+-  一根 USB Type-A 数据线
+-  一个 CK-Link 仿真器
+-  一个 USB-TTL 串口模块
+-  杜邦线若干
+
+
+下载剑池 CDK 软件安装包
+-----------------------------
+
+- `剑池CDK `_ 软件安装可以从平头哥半导体 OCC 官网获取到。
+
+- 下载完成后，解压缩，双击 ``setup.exe``，按照其提示，完成软件安装即可。
+
+
+下载 bl_mcu_sdk 软件开发包
+----------------------------
+
+-  从开源社区下载 bl_mcu_sdk 软件开发包。
+
+   - 可以使用 ``git clone`` 或者直接 ``download`` 的方式下 SDK
+   - 使用 ``git clone`` 前请确保已正确安装 ``git``，打开支持 ``git`` 的终端输入以下命令即可获取最新的 SDK。
+
+   .. code-block:: bash
+      :linenos:
+      :emphasize-lines: 1
+
+      $ git clone https://gitee.com/bouffalolab/bl_mcu_sdk.git  --recursive
+
+
+硬件连接
+----------------------
+
+-  具体开发板的连接, 请参考 :ref:`connect_hardware` 部分
+-  请确保开发板被正确设置后再进行下面的步骤
+   
+
+测试 Hello World 工程
+------------------------------
+
+打开 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  获取到 SDK 后，进入 sdk 中的 ``examples/hellowd/helloworld/cdk`` 目录下，双击 ``helloworld.cdkproj``，即可打开 ``Helloworld`` 工程。
+
+
+编译 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+.. figure:: img/cdk1.png
+   :alt:
+
+   helloworld.cdkproj
+
+-  在 CDK 工具栏中，点击编译图标即可编译工程
+
+   -  点击 ``1`` 处 图标 ``Build Project`` 即可编译当前选中的工程
+   -  点击 ``2`` 处 图标 ``Clean Project`` 即可清除上次编译的结果
+   -  点击 ``3`` 处 图标 ``Flash Download`` 即可将编译好的代码下载到芯片中
+   -  点击 ``4`` 处 图标 ``Start/Stop Debug`` 即可进行 debug 的相关操作
+   -  也可以在 ``Project`` 中，右击工程名称，通过右击菜单中的选项对项目进行编译等操作
+
+
+烧写 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  由于目前 CDK 软件中还没有包含我们的 flash 算法，所以需要我们手动将 flash 算法放到 CDK 安装目录，具体操作如下：
+
+   -  进入 SDK 目录下 ``tools\cdk_flashloader`` 目录
+   -  将目录下的 ``bl70x_flasher.elf`` 文件，拷贝到 CDK 工具的 ``C-Sky\CDK\CSKY\Flash`` 目录中
+
+   .. figure:: img/cdk7.png
+      :alt:
+
+      CDK Flash Loader
+
+
+
+.. figure:: img/cdk8.png
+   :alt:
+
+   CDK Project Setting
+   
+-  点击 ``Project View`` 中的项目设置按钮，打开 ``Project Setting`` 窗口，或者通过右击 ``Project`` 名称中右击菜单栏中打开
+
+- 在打开的 ``Project Setting`` 窗口中，选择 ``Flash`` 标签，配置需要的 Flash 算法
+
+.. figure:: img/cdk9.png
+   :alt:
+
+   CDK Project Flash setting
+
+-  在 ``Flash`` 标签中，点击 ``Add`` 按纽，在打开的列表中选择 ``bl70x_flash`` 算法，点击 ``Add`` 添加到工程中，``Flash`` 标签下的其他设置，如图所示：
+
+-  点击 OK 后，如配置正确，点击 ``Flash Download`` 即可将编译好的代码下载到芯片中
+   
+
+.. figure:: img/cdk5.png
+   :alt:
+
+   CDK Flashdownload Success
+
+-  如下载失败请检查：
+
+   -  1. 代码是否被正确编译，并生成 ``.elf`` ``.bin`` 等文件
+   -  2. Flash 算法是否被正确设置
+   -  3. CK-Link 与开发板是否正确连接
+   -  4. 开发板是否正常供电，电源指示灯是否点亮
+
+运行 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  从 CDK 的菜单栏 ``View->Serial Pane``，打开串口面板，在打开的 ``Serial Pane`` 中右击，进行串口设置，选择你对应的串口号和波特率
+
+.. figure:: img/cdk4.png
+.. figure:: img/cdk3.png
+   :alt:
+
+   CDK Serial Pane setting
+
+-  按下板子上的 ``RST`` 按键，即可在串口中看到代码的运行结果
+
+.. figure:: img/cdk6.png
+   :alt:
+
+   HelloWorld！
+
+
+调试 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  点击工具栏上方的 ``Start/Stop Debugger`` 按钮，进入 debug 界面，如下图所示
+
+.. figure:: img/cdk10.png
+   :alt:
+
+   Debug HelloWorld！
+
+-  在 debug 界面下，左侧的 ``Register`` 窗口中，可以查看 ``CPU`` 内部寄存器数据；右侧的 ``Peripherals`` 外设面板中，
+   可以查看相应外设寄存器数据，外设的选择可以在顶部菜单栏的 ``Peripherals->System Viewer`` 选择；
+   点击上方工具栏中的相关调试按钮可以进行断点设置、单步调试、指令单步和全速运行等操作。
+   当然这些操作都有相应的快捷键和快捷设置方法，详情请参考 ``CDK Help``，这里就不作过多介绍了。
+
+-  我们点击单步运行按钮，运行代码，即可看到指示光标移动到下一句代码，同时可以看到串口面板中显示了我们输出的 ``Hello World！`` 
+
+.. figure:: img/cdk11.png
+   :alt:
+
+   Debug HelloWorld！
+
+
+
diff --git a/docs/development_guide/build/html/_sources/Windows_quick_start_eclipse.rst.txt b/docs/development_guide/build/html/_sources/Windows_quick_start_eclipse.rst.txt
new file mode 100644
index 00000000..b33234e7
--- /dev/null
+++ b/docs/development_guide/build/html/_sources/Windows_quick_start_eclipse.rst.txt
@@ -0,0 +1,175 @@
+Windows 下使用 Eclipse 开发指南
+=============================
+
+本文档介绍了如何在 Windows 下使用 eclipse，构建 BL702 系列 MCU 的软件开发环境。
+
+
+需要的软硬件环境
+-----------------------------
+
+-  Eclipse 免安装软件包
+-  串口助手软件
+-  一根 USB Type-A 数据线
+-  一个 j-link 仿真器
+-  一个 USB-TTL 串口模块
+-  杜邦线若干
+
+
+下载 Eclipse 安装包
+-----------------------------
+
+-  从 Bouffalo Lab 开发者社区下载带有 RISC-V 工具链的 `Eclipse https://dev.bouffalolab.com/download `_ 安装包。
+
+下载 bl_mcu_sdk
+-----------------------------
+
+-  从开源社区下载 `bl_mcu_sdk `_ 软件开发包。
+
+- 可以使用 ``git clone`` 或者直接 ``download`` 的方式下 SDK
+- 使用 ``git clone`` 前请确保已正确安装 ``git``，打开支持 ``git`` 的终端输入以下命令即可获取最新的 SDK。
+
+.. code-block:: bash
+   :linenos:
+   :emphasize-lines: 1
+
+   $ git clone https://gitee.com/bouffalolab/bl_mcu_sdk.git  --recursive
+
+
+配置 eclipse 开发环境
+----------------------------
+
+-  将获取到的 eclipse 压缩包拷贝到您的工作目录，解压 eclipse 压缩包
+-  进入 eclipse 目录，双击 ``eclipse.exe`` 启动 eclipse
+-  选择您的 ``Workspace`` 目录，点击 ``Launch`` 进入工作空间
+
+   .. figure:: img/pic1.png
+      :alt:
+
+-  点击菜单栏中 ``Window->preferences`` 打开环境配置相关页面，准备导入相关的配置环境
+
+   .. figure:: img/pic2.png
+      :alt:
+
+-  点击下图 1 处的图标，打开导入配置界面，按照如图所示步骤，选择 ``eclipse.exe`` 目录下的 ``bflb_mcu_preferences.epf`` 配置文件。
+
+   .. figure:: img/pic3.png
+      :alt:
+
+-  选择好对应的文件后，点击 ``Finish``，在弹出的对话框选中点击 ``cancel`` ，不用重新启动。
+
+   .. figure:: img/pic4.png
+      :alt:
+
+导入 bl_mcu_sdk
+--------------------------
+
+-  点击 菜单栏 ``File->Import`` ，打开导入项目的配置界面
+
+   .. figure:: img/pic5.png
+      :alt:
+
+-  在打开的 ``Import`` 窗口中选择 ``General->Existing Projects into Workspace`` ，然后点击 ``Next``
+
+   .. figure:: img/pic6.png
+      :alt:
+
+-  加载 bl_mcu_sdk 的工程路径后，点击 ``Finsh`` 完成导入
+
+   .. figure:: img/pic7.png
+      :alt:
+
+-  导入完成后，关闭 ``Welcome`` 窗口即可看到导入的工程
+
+   .. figure:: img/pic8.png
+      :alt:
+
+   .. figure:: img/pic9.png
+      :alt:
+
+-  展开 ``Build Target`` 目录，即可看到 ``bl_clean``、``bl_make``、``download`` 三个功能按钮。
+
+   -  双击 ``bl_clean`` 按钮，会清除 ``build`` 和 ``out`` 两个目录下的编译缓存
+   -  双击 ``bl_make`` 按钮，会正常编译设置的 case，若没有修改默认配置则会编译 ``helloworld`` 工程
+   -  双击 ``download`` 按钮，会下载代码到芯片中，若没有编译成功则会下载默认的或者上一次的 ``.bin`` 文件
+
+
+硬件连接
+----------------------
+
+-  具体开发板的连接, 请参考 :ref:`connect_hardware` 部分；（eclipse 环境建议使用 ``j-link`` 烧写、调试）
+-  请确保开发板正确设置后再进行下面的步骤
+
+
+测试 Hello World 工程
+------------------------------
+
+
+打开 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  打开 ``examples/hellowd/helloworld/main.c`` 文件，即可编辑、修改 ``helloworld`` 测试 demo 的代码，若修改了，请保存后在执行编译
+
+
+编译 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  双击 ``bl_make`` 即可编 helloworld 工程
+
+-  编译成功后 ``Console`` 窗口可以看到如下图所示的 log 信息
+
+.. figure:: img/pic10.png
+
+
+烧写 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  双击 ``download`` 即可烧写 helloworld 工程 ``bin`` 文件到芯片中
+
+-  下载成功后 ``Console`` 窗口可以看到如下图所示的 log 信息
+
+.. figure:: img/pic11.png
+
+
+运行 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  将开发板的 ``TXD0``、``RXD0`` 和 ``GND`` 引脚使用杜邦线连接到 USB-TTL 串口模块，将串口模块插入 PC 主机， 使用任意的串口助手软件打开串口
+-  烧写成功后，按下板子上的 ``rst`` 按键，如果下载正确，即可在串口助手软件中看到如下图所示的 log 信息。
+
+.. figure:: img/eclipse_run.png
+
+
+调试 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  点击 eclipse 工具栏中的 ``Debug`` 按钮，进入 debug 配置窗口
+-  选择 ``GDB SEGGER J-Link Debugging->Jlink_bl_mcu_sdk``  Debug 配置，在 ``C/C++ Application:`` 选项中选择需要调试的 ``.elf`` 文件
+-  先点击 ``Apply`` 后，在点击 ``Debug`` 即可进行 ``Debug`` 
+
+.. figure:: img/pic14.png
+   :alt:
+
+-  进入 Debug 界面后，即可看到程序停在了 ``main``，点击上方工具栏中的 ``Step Over``，按钮即可对代码工程进行单步调试。
+
+.. figure:: img/pic15.png
+   :alt:
+   
+   Eclipse Debugging
+
+
+编译烧写不同的目标工程
+-----------------------
+
+-  当右击 ``bl_make`` 按钮，点击 ``Edit`` 后，会弹出更换目标工程的配置界面，如下图所示
+
+.. figure:: img/pic12.png
+   :alt:
+
+
+-  其中 ``APP=xxx`` 用户可以修改其内容，改为需要编译烧写的目标工程名，例如想要编译烧写 ``gpio/gpio_blink`` 工程，将其修改为 ``APP=gpio_blink`` 即可
+-  ``Build command`` 中 ``make BOARD=bl706_iot`` 会指定不同的 Board 类型以指定适配不同类型的开发板。
+
+-  ``Board`` 类型决定编译时选择相应的 ``borad`` 头文件。默认选择的是 BL706 的 iot 开发板 ``make build BOARD=bl706_iot``
+
+
+
diff --git a/docs/development_guide/build/html/_sources/api_guide.rst.txt b/docs/development_guide/build/html/_sources/api_guide.rst.txt
new file mode 100644
index 00000000..8fbae716
--- /dev/null
+++ b/docs/development_guide/build/html/_sources/api_guide.rst.txt
@@ -0,0 +1,773 @@
+API 分层模型
+=========================
+
+简介
+----
+
+为了不影响用户应用层代码因为芯片驱动的不同而频繁修改，**bl_mcu_sdk** 的外设 API 采用了 HAL 层的思想，屏蔽了底层硬件的实现。而 HAL 层又分为两大类：
+
+- 设备驱动管理层：提供一套标准的接口，具体实现由外设驱动适配层实现。
+- 外设驱动适配层：实现设备驱动管理层的标准接口，并且拓展自己的独特的接口。
+
+整体的代码分层框架如图所示：
+
+.. figure:: img/api1.png
+    :alt:
+
+    code structure
+
+- 应用层是用户自己编写的代码，接口则是调用 hal 层的接口。
+- HAL 层提供给应用层接口，底层调用 std 层，不同的芯片调用不同的 std 层。
+- STD 层则是对硬件寄存器进行简单封装，由外设驱动适配层进行调用。
+
+设备驱动管理层实现
+---------------------
+
+设备驱动管理层的实现采用了面向对象的思想，首先我们将外设看成是一个设备或者是文件，秉承 **一切皆文件** 的理念，而文件又都具有标准的调用接口：``open``、``close``、``ctrl``、``write``、``read``、``callback``，不同文件类别不同（比如串口设备、ADC设备、SPI设备），并且打开的方式也不同（比如轮询、中断、DMA），由此，我们可以构建出一个对象的基类（父类）。
+
+**基类**
+
+.. code-block:: C
+
+    struct device
+    {
+        char name[NAME_MAX];            /*name of device */
+        dlist_t list;                   /*list node of device */
+        enum device_status_type status; /*status of device */
+        enum device_class_type type;    /*type of device */
+        uint16_t oflag;                 /*oflag of device */
+
+        int (*open)(struct device *dev, uint16_t oflag);
+        int (*close)(struct device *dev);
+        int (*control)(struct device *dev, int cmd, void *args);
+        int (*write)(struct device *dev, uint32_t pos, const void *buffer, uint32_t size);
+        int (*read)(struct device *dev, uint32_t pos, void *buffer, uint32_t size);
+        void (*callback)(struct device *dev, void *args, uint32_t size, uint32_t event);
+        void *handle;
+    };
+
+**基类成员：name**
+
+给设备取名，后面会使用 ``device_find`` 找到这个设备。
+
+**基类成员：type**
+
+``type`` 记录当前设备的类别，可以选择的 ``type`` 类型如下。
+
+.. code-block:: C
+
+    enum device_class_type
+    {
+        DEVICE_CLASS_NONE = 0,
+        DEVICE_CLASS_GPIO,
+        DEVICE_CLASS_UART,
+        DEVICE_CLASS_SPI,
+        DEVICE_CLASS_I2C,
+        DEVICE_CLASS_ADC,
+        DEVICE_CLASS_DMA,
+        DEVICE_CLASS_TIMER,
+        DEVICE_CLASS_PWM,
+        DEVICE_CLASS_SDIO,
+        DEVICE_CLASS_USB,
+        DEVICE_CLASS_I2S,
+        DEVICE_CLASS_CAMERA,
+        DEVICE_CLASS_SEC_HASH,
+    } ;
+
+**基类成员：status**
+
+``status`` 用来记录当前设备的状态，当前提供 4 种状态。
+
+.. code-block:: C
+
+    enum device_status_type
+    {
+        DEVICE_UNREGISTER = 0,
+        DEVICE_REGISTERED,
+        DEVICE_OPENED,
+        DEVICE_CLOSED
+    } ;
+
+**基类成员：oflag**
+
+``oflag`` 记录 注册时填入的 flag 信息以及使用 ``device_open`` 时填入的 ``oflag`` 信息。
+
+**基类成员：list**
+
+设备的增加和删除使用双向链表进行存储，节省内存。
+
+**基类成员：标准的函数指针**
+
+为不同的外设提供了标准的函数接口，当外设实现此类接口并赋值给该成员，便能达到重写的功能。
+
+设备驱动管理层标准接口
+-----------------------
+
+**device_register**
+^^^^^^^^^^^^^^^^^^^^
+
+``device_register`` 用于设备的注册，将设备信息注册到链表当中。
+
+.. code-block:: C
+
+    int device_register(struct device *dev, const char *name, uint16_t flag);   
+
+- dev 设备句柄。
+- name 设备名称。
+- flag 设备的读写属性
+- return 返回错误码，0 表示注册成功，其他表示错误。
+
+``flag`` 可以写入以下参数，表示：**只读**、**只写**、**可读可写**。
+
+.. code-block:: C
+
+    #define DEVICE_OFLAG_RDONLY 0x1000 /* 以只读方式打开设备 */
+    #define DEVICE_OFLAG_WRONLY 0x2000 /* 以只写方式打开设备 */
+    #define DEVICE_OFLAG_RDWR   0x3000 /* 以读写方式打开设备 */
+
+
+**device_unregister**
+^^^^^^^^^^^^^^^^^^^^^^^
+
+``device_unregister`` 用于设备的删除，将设备信息从链表中删除。
+
+.. code-block:: C
+
+    int device_unregister(const char *name);   
+
+- dev 设备句柄
+- name 要删除的设备名称
+- return 错误码，0 表示删除，其他表示错误
+
+**device_find**
+^^^^^^^^^^^^^^^^
+
+``device_find`` 用于根据 ``name`` 从链表中寻找设备，并返回设备句柄的首地址。
+
+.. code-block:: C
+
+    struct device *device_find(const char *name);
+
+- dev 设备句柄
+- name 要查找的设备名称
+- return 错误码，不为 0 表示找到的设备句柄，NULL 表示未找到该设备。
+
+
+**device_open**
+^^^^^^^^^^^^^^^^
+
+``device_open`` 用于设备的打开，``oflag`` 表示以何种方式打开，目前提供 6 种打开方式。底层调用 ``dev`` 句柄中的 ``open`` 成员。
+
+.. code-block:: C
+
+    int device_open(struct device *dev, uint16_t oflag);   
+
+- dev 设备句柄
+- oflag 设备的打开方式
+- return 错误码，0 表示打开成功，其他表示错误
+
+``oflag`` 可以写入以下参数：
+
+.. code-block:: C
+
+    #define DEVICE_OFLAG_STREAM_TX  0x001 /* 设备以轮训发送模式打开 */
+    #define DEVICE_OFLAG_STREAM_RX  0x002 /* 设备以轮训接收模式打开 */
+    #define DEVICE_OFLAG_INT_TX     0x004 /* 设备以中断发送模式打开 */
+    #define DEVICE_OFLAG_INT_RX     0x008 /* 设备以中断接收模式打开 */
+    #define DEVICE_OFLAG_DMA_TX     0x010 /* 设备以 DMA 发送模式打开 */
+    #define DEVICE_OFLAG_DMA_RX     0x020 /* 设备以 DMA 接收模式打开 */
+
+**device_close**
+^^^^^^^^^^^^^^^^
+
+``device_close`` 用于设备的关闭。底层调用 ``dev`` 句柄中的 ``close`` 成员。
+
+.. code-block:: C
+
+    int device_close(struct device *dev);   
+
+- dev 设备句柄
+- return 错误码，0 表示关闭成功，其他表示错误
+    
+**device_control**
+^^^^^^^^^^^^^^^^^^^
+
+``device_control`` 用于根据命令对设备进行控制和参数的修改。底层调用 ``dev`` 句柄中的 ``control`` 成员。
+
+.. code-block:: C
+
+    int device_control(struct device *dev, int cmd, void *args);   
+
+- dev 设备句柄
+- cmd 设备控制命令
+- args 控制参数
+- return 不同的控制命令返回的意义不同。
+
+``cmd`` 提供了以下标准命令，除此之外，不同外设还具有自己的命令
+
+.. code-block:: C
+
+    #define DEVICE_CTRL_SET_INT     0x01    /* 设置中断 */
+    #define DEVICE_CTRL_CLR_INT     0x02    /* 清中断 */
+    #define DEVICE_CTRL_GET_INT     0x03    /* 获取中断状态 */
+    #define DEVICE_CTRL_RESUME      0x04    /* 恢复设备 */
+    #define DEVICE_CTRL_SUSPEND     0x05    /* 挂起设备 */
+    #define DEVICE_CTRL_CONFIG      0x06    /* 配置设备 */
+    #define DEVICE_CTRL_GET_CONFIG  0x07    /* 获取设备配置 */
+
+**device_write**
+^^^^^^^^^^^^^^^^
+
+``device_write`` 用于数据的发送，发送方式根据打开方式可以是轮询、中断、dma。底层调用 ``dev`` 句柄中的 ``write`` 成员。
+
+.. code-block:: C
+
+    int device_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size);  
+
+- dev 设备句柄
+- pos 不同的设备 pos 的意义不同
+- buffer 要写入的 buffer 缓冲区
+- size 要写入的长度
+- return 错误码，0 表示写入成功，其他表示错误
+
+**device_read**
+^^^^^^^^^^^^^^^^
+
+``device_read`` 用于数据的接收，接收方式根据打开方式可以是轮询、中断、dma。底层调用 ``dev`` 句柄中的 ``read`` 成员。
+
+.. code-block:: C
+
+    int device_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size);  
+
+- dev 设备句柄
+- pos 不同的设备 pos 的意义不同
+- buffer 要读入的 buffer 缓冲区
+- size 要读入的长度
+- return 错误码，0 表示读入成功，其他表示错误
+
+**device_set_callback**
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+``device_set_callback`` 用于中断回调函数的注册。底层调用 ``dev`` 句柄中的 ``callback`` 成员。
+
+.. code-block:: C
+
+    int device_set_callback(struct device *dev, void (*callback)(struct device *dev, void *args, uint32_t size, uint32_t event));
+
+- dev 设备句柄
+- callback 要注册的中断回调函数
+
+
+    * dev 设备句柄
+    * args 不同外设意义不同
+    * size 传输长度
+    * event 中断事件类型
+
+外设驱动适配层实现
+------------------------
+
+**子类继承父类**
+
+不同的外设首成员为 ``struct device`` ，这就相当于父类的继承，从而可以使用子类来访问父类成员，当使用子类修改父类成员时，便拥有了子类自己的功能。实现原理是不同结构体的首地址是该结构体中首个成员的地址。
+
+.. code-block:: C
+
+    typedef struct xxx_device
+    {
+        struct device parent;
+
+    } xxx_device_t;
+
+**重写标准接口**
+
+每个外设都有一个 ``xxx_register`` 函数，用来重写标准接口。
+
+.. code-block:: C
+
+    dev->open = xxx_open;
+    dev->close = xxx_close;
+    dev->control = xxx_control;
+    dev->write = xxx_write;
+    dev->read = xxx_read;
+
+
+时钟树
+=========================
+
+简介
+------------------------
+
+博流系列芯片拥有丰富的时钟源选择，为方便用户配置，提供了时钟树配置表，不需要用户手动调用时钟设置接口，用户只需要关心最终的系统时钟和外设时钟频率即可。时钟配置表位于 ``bsp/board/xxx_board`` 目录下 ``xxx_clock_config.h`` 文件。
+
+
+时钟频率获取接口
+------------------------
+
+**system_clock_get**
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+``system_clock_get`` 用来获取系统时钟频率。
+
+.. code-block:: C
+
+    uint32_t system_clock_get(enum system_clock_type type);
+
+- type 获取的系统时钟频率类型
+
+``type`` 提供以下几种类型
+
+.. code-block:: C
+
+    enum system_clock_type
+    {
+        SYSTEM_CLOCK_ROOT_CLOCK = 0,
+        SYSTEM_CLOCK_FCLK,
+        SYSTEM_CLOCK_BCLK,
+        SYSTEM_CLOCK_XCLK,
+    };
+
+
+**peripheral_clock_get**
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+``peripheral_clock_get`` 用来获取外设时钟频率。
+
+.. code-block:: C
+
+    uint32_t peripheral_clock_get(enum peripheral_clock_type type);
+
+- type 获取的外设时钟频率类型
+
+``type`` 提供以下几种类型
+    
+.. code-block:: C
+    
+    enum peripheral_clock_type
+    {
+        PERIPHERAL_CLOCK_UART = 0,
+        PERIPHERAL_CLOCK_SPI,
+        PERIPHERAL_CLOCK_I2C,
+        PERIPHERAL_CLOCK_ADC,
+        PERIPHERAL_CLOCK_DAC,
+        PERIPHERAL_CLOCK_I2S,
+    };
+    
+        
+GPIO 设备
+=========================
+
+
+简介
+------------------------
+
+GPIO 全称 General Purpose Input Output（通用输入 / 输出），博流系列芯片的 GPIO 外设主要有以下功能。
+
+- 普通输入输出带上下拉
+- 复用功能带上下拉
+- 模拟功能
+- 外部中断（上升沿、下降沿、高电平、低电平）
+- 硬件消抖
+- 驱动能力控制
+
+bl mcu sdk 的引脚配置方式分为两种。
+
+- GPIO 复用功能通过专门的 **pinmux table** ，用户只需要修改 table 中的相关引脚和工功能，程序会自动配置这些引脚。**pinmux table** 位于 ``bsp/board/xxx_board`` 目录下 ``pinmux_config.h`` 文件。
+- 通过标准的 GPIO 设备接口配置引脚，缺点是只能配置普通的输入输出和中断功能，复用功能建议还是使用 table 进行配置。
+
+GPIO 设备接口
+------------------------
+
+**gpio_set_mode**
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+``gpio_set_mode`` 用来配置 gpio 的模式。
+
+.. code-block:: C
+    
+    void gpio_set_mode(uint32_t pin, uint32_t mode);
+
+- pin 要配置的引脚
+- mode 要配置的引脚功能
+
+mode 提供以下几种类型
+
+.. code-block:: C
+    
+    #define GPIO_OUTPUT_MODE                        0
+    #define GPIO_OUTPUT_PP_MODE                     1
+    #define GPIO_OUTPUT_PD_MODE                     2
+    #define GPIO_INPUT_MODE                         3
+    #define GPIO_INPUT_PP_MODE                      4
+    #define GPIO_INPUT_PD_MODE                      5
+    #define GPIO_ASYNC_RISING_TRIGER_INT_MODE       6
+    #define GPIO_ASYNC_FALLING_TRIGER_INT_MODE      7
+    #define GPIO_ASYNC_HIGH_LEVEL_INT_MODE          8
+    #define GPIO_ASYNC_LOW_LEVEL_INT_MODE           9
+    #define GPIO_SYNC_RISING_TRIGER_INT_MODE        10
+    #define GPIO_SYNC_FALLING_TRIGER_INT_MODE       11
+    #define GPIO_SYNC_HIGH_LEVEL_INT_MODE           12
+    #define GPIO_SYNC_LOW_LEVEL_INT_MODE            13
+
+**gpio_write**
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+``gpio_write`` 设置引脚电平
+
+.. code-block:: C
+    
+    void gpio_write(uint32_t pin, uint32_t value);
+
+
+- pin 要设置的引脚
+- value 要设置的电平
+  
+
+**gpio_toggle**
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+``gpio_toggle`` 翻转引脚电平
+
+.. code-block:: C
+    
+    void gpio_toggle(uint32_t pin);
+
+
+- pin 要翻转的引脚
+
+
+**gpio_read**
+^^^^^^^^^^^^^^^^^^^^^^^^
+ 
+``gpio_read`` 读取引脚电平
+
+.. code-block:: C
+    
+    int  gpio_read(uint32_t pin);
+
+
+- pin 要读取电平的引脚
+- return 0 为低电平，1 为高电平
+
+**gpio_attach_irq**
+^^^^^^^^^^^^^^^^^^^^^^^^
+ 
+``gpio_attach_irq`` 为中断引脚附加中断回调函数
+
+.. code-block:: C
+    
+    void gpio_attach_irq(uint32_t pin, void (*cbFun)(void));
+
+- pin 要附加中断回调的引脚
+- cbFun 中断回调函数
+
+**gpio_irq_enable**
+^^^^^^^^^^^^^^^^^^^^^^^^
+ 
+``gpio_irq_enable`` 读取引脚电平
+
+.. code-block:: C
+    
+    void gpio_irq_enable(uint32_t pin,uint8_t enabled);
+
+- pin 要开启或者关闭中断的引脚
+- enabled 0 为关闭中断，1 为打开中断
+
+
+UART 设备
+=========================
+
+简介
+------------------------
+
+UART 全称（Universal Asynchronous Receiver/Transmitter）通用异步收发传输器，博流系列芯片的 UART 外设自带可配深度 **硬件fifo** ，并且拥有 **RTO（接收超时）中断** ，在使用中断的时候，无需频繁进入中断，fifo 和 rto 的搭配能够使得 UART 的利用性更加高效，UART 设备具有以下功能。
+
+- 轮询收发模式
+- 中断收发模式
+- dma 收发模式
+- 自动波特率检测
+- 硬件 fifo
+- 特有的 rto 中断
+
+UART 设备结构体定义
+------------------------
+
+.. code-block:: C
+    
+    typedef struct uart_device
+    {
+        struct device parent;
+        uint8_t id;
+        uint32_t baudrate;
+        uart_databits_t databits;
+        uart_stopbits_t stopbits;
+        uart_parity_t parity;
+        uint8_t fifo_threshold;
+        void* tx_dma;
+        void* rx_dma;
+    } uart_device_t;
+
+- parent 继承父类属性
+- id 串口 id，0 表示串口 0，,1 表示串口 1，以此类推
+- baudrate 波特率
+- databits 数据位
+- stopbits 停止位
+- parity 校验位
+- fifo_threshold fifo 阈值,不同 mcu 最大值不同
+- tx_dma 附加的发送 dma 句柄
+- rx_dma 附加的发送 dma 句柄
+
+databits 提供以下类型
+
+.. code-block:: C
+
+    typedef enum  
+    {
+        UART_DATA_LEN_5 = 0,  /*!< Data length is 5 bits */
+        UART_DATA_LEN_6 = 1,  /*!< Data length is 6 bits */
+        UART_DATA_LEN_7 = 2,  /*!< Data length is 7 bits */
+        UART_DATA_LEN_8 = 3   /*!< Data length is 8 bits */
+    } uart_databits_t;
+
+stopbits 提供以下类型
+
+.. code-block:: C
+    
+    typedef enum  
+    {
+        UART_STOP_ONE = 0,  /*!< One stop bit */
+        UART_STOP_ONE_D_FIVE = 0,  /*!< 1.5 stop bit */
+        UART_STOP_TWO = 1   /*!< Two stop bits */
+    } uart_stopbits_t;
+
+``parity`` 提供以下类型
+
+.. code-block:: C
+    
+    typedef enum  
+    {
+        UART_PAR_NONE = 0,  /*!< No parity */
+        UART_PAR_ODD  = 1,  /*!< Parity bit is odd */
+        UART_PAR_EVEN = 2,  /*!< Parity bit is even */
+    } uart_parity_t;
+
+UART 设备参数配置表
+------------------------
+
+每一个 UART 设备都有一个参数配置，配置文件位于 ``bsp/board/xxx_board`` 目录下 ``peripheral_config.h`` 文件。当用户打开对应设备的宏，该设备的配置才生效。例如打开宏 ``BSP_USING_UART0`` ，UART0 设备就可以进行注册和使用了。
+
+.. code-block:: C
+
+    uart_device_t uartx_device[UART_MAX_INDEX] =
+    {
+    #ifdef BSP_USING_UART0
+            UART0_CONFIG,
+    #endif
+    #ifdef BSP_USING_UART1
+            UART1_CONFIG,
+    #endif
+    };
+
+    #if defined(BSP_USING_UART0)
+    #ifndef UART0_CONFIG
+    #define UART0_CONFIG \
+    {   \
+     .id = 0, \
+     .baudrate = 2000000,\
+     .databits = UART_DATA_LEN_8, \
+     .stopbits = UART_STOP_ONE, \
+     .parity = UART_PAR_NONE, \
+     .fifo_threshold = 1, \
+    }
+    #endif
+    #endif
+
+UART 设备接口
+------------------------
+
+UART 设备接口全部遵循标准设备驱动管理层提供的接口。
+
+**uart_register**
+^^^^^^^^^^^^^^^^^^^^^^^^
+ 
+``uart_register`` 用来注册一个 UART 设备，在注册之前需要打开对应 UART 设备的宏定义,例如 ``BSP_USING_UART0`` 方可使用 UART0 设备。注册完成以后才可以使用其他接口，如果没有定义宏，则无法使用 UART 设备。
+
+.. code-block:: C
+    
+    int uart_register(enum uart_index_type index, const char *name, uint16_t flag);
+
+- index 要注册的设备索引
+- name 为注册的设备命名
+- flag 默认可读可写属性
+
+``index`` 用来选择 UART 设备配置，一个 index 对应一个 UART 设备配置，比如 ``UART0_INDEX`` 对应 UART0 配置，``index`` 有如下可选类型
+
+.. code-block:: C
+    
+    enum uart_index_type
+    {
+    #ifdef BSP_USING_UART0
+        UART0_INDEX,
+    #endif
+    #ifdef BSP_USING_UART1
+        UART1_INDEX,
+    #endif
+    #ifdef BSP_USING_UART2
+        UART2_INDEX,
+    #endif
+    #ifdef BSP_USING_UART3
+        UART3_INDEX,
+    #endif
+    #ifdef BSP_USING_UART4
+        UART4_INDEX,
+    #endif
+        UART_MAX_INDEX
+    };
+
+**device_open**
+^^^^^^^^^^^^^^^^
+
+``device_open`` 用于设备的打开，``oflag`` 表示以何种方式打开。
+
+.. code-block:: C
+
+    int device_open(struct device *dev, uint16_t oflag);   
+
+- dev 设备句柄
+- oflag 设备的打开方式
+- return 错误码，0 表示打开成功，其他表示错误
+
+``oflag`` 可以写入以下参数：
+
+.. code-block:: C
+
+    #define DEVICE_OFLAG_STREAM_TX  0x001 /* 设备以轮训发送模式打开 */
+    #define DEVICE_OFLAG_STREAM_RX  0x002 /* 设备以轮训接收模式打开 */
+    #define DEVICE_OFLAG_INT_TX     0x004 /* 设备以中断发送模式打开 */
+    #define DEVICE_OFLAG_INT_RX     0x008 /* 设备以中断接收模式打开 */
+    #define DEVICE_OFLAG_DMA_TX     0x010 /* 设备以 DMA 发送模式打开 */
+    #define DEVICE_OFLAG_DMA_RX     0x020 /* 设备以 DMA 接收模式打开 */
+
+**device_close**
+^^^^^^^^^^^^^^^^
+
+``device_close`` 用于设备的关闭。
+
+.. code-block:: C
+
+    int device_close(struct device *dev);   
+
+- dev 设备句柄
+- return 错误码，0 表示关闭成功，其他表示错误
+    
+**device_control**
+^^^^^^^^^^^^^^^^^^^
+
+``device_control`` 用于根据命令对设备进行控制和参数的修改。
+
+.. code-block:: C
+
+    int device_control(struct device *dev, int cmd, void *args);   
+
+- dev 设备句柄
+- cmd 设备控制命令
+- args 控制参数
+- return 不同的控制命令返回的意义不同。
+
+串口设备除了标准的控制命令，还具有自己特殊的控制命令。
+
+.. code-block:: C
+
+    #define DEVICE_CTRL_UART_GET_TX_FIFO        0x10
+    #define DEVICE_CTRL_UART_GET_RX_FIFO        0x11
+    #define DEVICE_CTRL_UART_ATTACH_TX_DMA      0x12
+    #define DEVICE_CTRL_UART_ATTACH_RX_DMA      0x13
+
+``args`` 根据不同的 ``cmd`` 传入不同，具体如下：
+
++---------------------------------------+--------------------------------------+
+|         cmd                           |           args                       |
++=======================================+======================================+
+|     DEVICE_CTRL_SET_INT               |         uart_it_type                 |
++---------------------------------------+--------------------------------------+
+|     DEVICE_CTRL_CLR_INT               |         uart_it_type                 |
++---------------------------------------+--------------------------------------+
+|     DEVICE_CTRL_CONFIG                |         uart_param_cfg_t             |
++---------------------------------------+--------------------------------------+
+|     DEVICE_CTRL_UART_ATTACH_TX_DMA    |         dma句柄                      |
++---------------------------------------+--------------------------------------+
+|     DEVICE_CTRL_UART_ATTACH_RX_DMA    |         dma句柄                      |
++---------------------------------------+--------------------------------------+
+|     DEVICE_CTRL_UART_GET_TX_FIFO      |         缓存变量                     |
++---------------------------------------+--------------------------------------+
+|     DEVICE_CTRL_UART_GET_RX_FIFO      |         缓存变量                     |
++---------------------------------------+--------------------------------------+
+
+**device_write**
+^^^^^^^^^^^^^^^^
+
+``device_write`` 用于串口数据的发送，发送方式根据打开方式可以是轮询、中断、dma。
+
+.. code-block:: C
+
+    int device_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size);  
+
+- dev 设备句柄
+- pos 无作用
+- buffer 要写入的 buffer 缓冲区
+- size 要写入的长度
+- return 错误码，0 表示写入成功，其他表示错误
+
+**device_read**
+^^^^^^^^^^^^^^^^
+
+``device_read`` 用于串口数据的接收，接收方式根据打开方式可以是轮询、中断、dma。
+
+.. code-block:: C
+
+    int device_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size);  
+
+- dev 设备句柄
+- pos 无作用
+- buffer 要读入的 buffer 缓冲区
+- size 要读入的长度
+- return 错误码，0 表示读入成功，其他表示错误
+
+**device_set_callback**
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+``device_set_callback`` 用于注册一个串口中断回调函数。
+
+.. code-block:: C
+
+    int device_set_callback(struct device *dev, void (*callback)(struct device *dev, void *args, uint32_t size, uint32_t event));
+
+- dev 设备句柄
+- callback 要注册的中断回调函数
+
+    - dev 设备句柄
+    - args 接收发送缓冲区，数据类型为 uint8_t*
+    - size 传输长度
+    - event 中断事件类型    
+
+串口设备 ``event`` 有以下类型
+
+.. code-block:: C
+
+    enum uart_event_type
+    {
+        UART_EVENT_TX_END,
+        UART_EVENT_TX_FIFO,
+        UART_EVENT_RX_END,
+        UART_EVENT_RX_FIFO,
+        UART_EVENT_RTO,
+        UART_EVENT_UNKNOWN
+    };
+
+PWM设备
+=========================
+
+简介
+------------------------
+
+PWM设备接口
+------------------------
\ No newline at end of file
diff --git a/docs/development_guide/build/html/_sources/blink_demo_introduce.rst.txt b/docs/development_guide/build/html/_sources/blink_demo_introduce.rst.txt
new file mode 100644
index 00000000..0d326f6c
--- /dev/null
+++ b/docs/development_guide/build/html/_sources/blink_demo_introduce.rst.txt
@@ -0,0 +1,41 @@
+流水灯示例
+====================
+
+硬件连接
+-----------------------------
+
+.. figure:: img/blink_breath_sch.png
+    :alt:
+
+    **BL706_IOT板支持上述电路**
+
+-  硬件连接如上图所示 ``GPIO29`` ``GPIO30`` ``GPIO31`` ``GPIO22`` 分别控制四路 LED 灯
+
+
+
+软件实现
+-----------------------------
+
+-  软件代码见 ``examples/gpio/gpio_blink``
+
+.. code-block:: C
+    :linenos:
+
+    gpio_set_mode(GPIO_PIN_22, GPIO_OUTPUT_PP_MODE);
+    gpio_set_mode(GPIO_PIN_29, GPIO_OUTPUT_PP_MODE);
+    gpio_set_mode(GPIO_PIN_30, GPIO_OUTPUT_PP_MODE);
+    gpio_set_mode(GPIO_PIN_31, GPIO_OUTPUT_PP_MODE);
+
+-  使用上述代码将 ``GPIO22`` ``GPIO29`` ``GPIO30`` ``GPIO31`` 配置为输出模式。
+
+.. code-block:: C
+    :linenos:
+
+    gpio_write(GPIO_PIN_22, 0);
+
+-  使用上述代码修改输出的电平值。
+
+
+最终效果
+-----------------------------
+见视频展示
diff --git a/docs/development_guide/build/html/_sources/breath_pwm_demo_introduce.rst.txt b/docs/development_guide/build/html/_sources/breath_pwm_demo_introduce.rst.txt
new file mode 100644
index 00000000..399938a9
--- /dev/null
+++ b/docs/development_guide/build/html/_sources/breath_pwm_demo_introduce.rst.txt
@@ -0,0 +1,64 @@
+呼吸灯示例
+====================
+
+硬件连接
+-----------------------------
+
+.. figure:: img/blink_breath_sch.png
+    :alt:
+
+    **BL706_IOT板支持上述电路**
+
+-  硬件连接如上图所示 ``GPIO29`` ``GPIO30`` ``GPIO31`` ``GPIO22`` 分别控制四路 LED 灯
+-  呼吸灯会单独使用 ``GPIO22`` 来演示效果
+
+
+
+软件实现
+-----------------------------
+
+-  软件代码见 ``examples/pwm/pwm_breath_led``
+
+
+-  ``PWM`` 的输出引脚由板级描述文件 ``bsp/board/bl706_iot/pinmux_config.h`` 来配置
+
+.. code-block:: C
+    :linenos:
+
+    #define CONFIG_GPIO22_FUNC GPIO_FUN_UNUSED
+
+
+-  可以看到，我们将 ``GPIO22`` 的功能选择为 ``PWM`` 输出，不同的电路板会存在不同的引脚配置。
+
+-  我们会使用向导来配置不同应用场景下的引脚配置，用户也可以手动修改。
+
+.. code-block:: C
+    :linenos:
+
+    pwm_register(PWM0_INDEX, "led_breath", DEVICE_OFLAG_RDWR); 
+
+    struct device *led_breath = device_find("led_breath");
+
+    if (led_breath)
+    {
+        device_open(led_breath, 0);
+    }
+
+
+-  上述代码展现了 ``bl_mcu_sdk`` 框架最一般的设备初始化流程，首先调用 ``pwm_register`` 函数注册 ``pwm`` 设备
+-  然后通过 ``find`` 函数找到设备对应的句柄，保存于 ``led_breath`` 对象中
+-  使用 ``device_open`` 来打开 ``led_breath`` 设备。
+
+.. code-block:: C
+    :linenos:
+
+    device_control(led_breath, DEVICE_CTRL_CONFIG, &pwm_cfg);  
+
+使用 ``device_contorl`` 函数，配合 ``DEVICE_CTRL_CONFIG`` 指令，输入需要配置的频率和占空比，即可配置 ``PWM`` 的输出波形。
+
+
+
+最终效果
+-----------------------------
+见视频展示
+
diff --git a/docs/development_guide/build/html/_sources/connecting_hardware.rst.txt b/docs/development_guide/build/html/_sources/connecting_hardware.rst.txt
new file mode 100644
index 00000000..be2ddc03
--- /dev/null
+++ b/docs/development_guide/build/html/_sources/connecting_hardware.rst.txt
@@ -0,0 +1,97 @@
+.. _connect_hardware:
+
+硬件连接
+================
+
+本文档介绍了如何连接 BL70x 系列 MCU 的开发板
+
+BL706_IOT 开发板
+-------------------------
+
+使用 CK-Link 烧写、调试连接方法
+^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  将 CK-Link USB 接口使用合适的 USB 数据线正确连接到 PC 主机
+-  将 Iot 开发板的 ``HD3`` 组的标准 ``JTAG`` 引脚使用杜邦线与 ``CK-Link`` 对应的 ``JTAG`` 引脚连接起来
+-  若没有使用 CK-Link 给开发板供电，需要给开发板单独供电
+
+::
+
+    bl706-iot board         CK-Link
+    -------------------------------
+        JTAG_TDI     <-->     TDI
+        JTAG_TDO     <-->     TDO 
+        JTAG_TCK     <-->     TCK 
+        JTAG_TMS     <-->     TMS
+        VDD33        <-->     VREF
+        GND          <-->     GND
+
+
+.. figure:: img/ck_link_connect_bl706_iot.png
+   :alt:
+
+   ck_link connect bl706-iot board
+
+
+使用 J-Link 烧写、调试连接方法
+^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  将 j-link 的 USB 接口使用合适的 USB 数据线正确连接到 PC 主机
+-  将 Iot 开发板的 ``HD3`` 组的标准 ``JTAG`` 引脚使用杜邦线与 ``j-link`` 对应的 ``JTAG`` 引脚连接起来
+-  j-link 连接的情况下需要给开发板独立供电，并且将开发板的电源接到 j-link 的 ``VTref`` 引脚
+
+::
+
+    bl706-iot board          j-link
+    -------------------------------
+        JTAG_TDI     <-->     TDI
+        JTAG_TDO     <-->     TDO 
+        JTAG_TCK     <-->     TCK 
+        JTAG_TMS     <-->     TMS
+        VDD33        <-->     VTref
+        GND          <-->     GND
+
+
+.. figure:: img/jlink_connect_bl706_iot.png
+   :alt:
+
+   jlink connect bl706-iot board
+
+
+使用串口烧写程序连接方法
+^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  使用串口烧写前，请确保正确安装了 ``Bouffalo Lab Dev Cube`` 或命令行烧写工具
+
+   -  使用 ``Type-C USB`` 数据线 or ``Mini USB`` 数据线连接到开发板上对应的 ``Type-C`` 接口 or ``Mini`` 接口上。
+   -  按下开发板上的 ``Boot`` 键，不要释放
+   -  按下开发板上的 ``RST`` 键，此时已经进入 ``Boot ROM``，可以释放两个按键
+   -  这时就可以从 ``Bouffalo Lab Dev Cube`` 中看到相应的串口 ``COM`` 号，如没有出现，请点击 ``Refresh`` 按钮刷新一下
+
+
+-  如没有合适的数据线，也可以使用一些常见的 ``USB-TTL`` 模块，连接到开发板的 ``UART0`` 端口进行烧写。 ``UART0`` 在 ``HD1`` 组上，连接方法如下：
+
+::
+
+   USB-TTL      BL702_IoT
+   ----------------------
+     3V3   <-->   VDD
+     TXD   <-->   RX0
+     RXD   <-->   TX0
+     GND   <-->   GND
+
+-  烧写方法同上
+
+BL702_AVB 开发板
+--------------------------
+
+使用 CK-Link 烧写、调试连接方法
+^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  ``TO DO``
+
+使用串口烧写程序连接方法
+^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  ``TO DO``
+
diff --git a/docs/development_guide/build/html/_sources/get_started.rst.txt b/docs/development_guide/build/html/_sources/get_started.rst.txt
new file mode 100644
index 00000000..3eb29d97
--- /dev/null
+++ b/docs/development_guide/build/html/_sources/get_started.rst.txt
@@ -0,0 +1,37 @@
+开发前的准备
+=============================
+
+硬件环境准备
+-----------------------------
+
+- 一块 BL702 系列 MCU 的开发板：
+
+  - BL706_IOT 开发板， or
+  - BL706_AVB 开发板
+
+BL706_Iot 开发板如下图所示
+
+.. figure:: img/bl702_iot.png
+   :alt:
+   
+   BL706_IoT
+
+
+-  一个支持标准 JTAG 功能的调试器：
+
+  - CK-Link 仿真器，or
+  - Jlink V11 仿真器，or
+  - Sipeed USB-JTAG/TTL 调试器，or
+  - Bouffalo Lab Debugger 调试器
+
+-  一台 PC 主机（运行 Windows 或者 Linux 系统）
+
+软件环境准备
+--------------------------------
+
+为了更好的进行 BL702 系列 MCU 的开发，建议您应当具备以下开发环境：
+
+-  Windows 使用 `CDK `_ 环境开发 (建议 Windows 7 以上版本。) ，or
+-  `Windows `_ 使用 Eclipse 环境开发 (建议 Windows 7 以上版本。) ，or
+-  `Linux `_ (建议使用 Ubuntu 18 以上的 LTS 版本)
+
diff --git a/docs/development_guide/build/html/_sources/index.rst.txt b/docs/development_guide/build/html/_sources/index.rst.txt
new file mode 100644
index 00000000..528c052f
--- /dev/null
+++ b/docs/development_guide/build/html/_sources/index.rst.txt
@@ -0,0 +1,45 @@
+.. bl_mcu_sdk_development_guide documentation master file, created by
+   sphinx-quickstart on Fri Mar 12 16:32:56 2021.
+   You can adapt this file completely to your liking, but it should at least
+   contain the root `toctree` directive.
+
+========================================================
+BL MCU SDK 开发指南
+========================================================
+
+博流 `BL702 `_ 系列产品是基于 “SiFive E24 Core” `RISC-V `_ 处理器的通用微控制器，具有 BLE 5.0、zigbee 和以太网等网络功能，同时还具备其它丰富的外设。
+可被广泛应用于 `IoT `_ 和其他低功耗领域中。
+支持通过 `JTAG `_ 对芯片进行烧写和调试，也支持通过 `UART `_ 进行程序烧录。
+
+BL MCU SDK 将为您提供博流 BL70X 系列 MCU 开发的全方位支持。
+
+.. toctree::
+   :maxdepth: 1
+   :caption: 快速开发指南
+   :numbered:
+
+   get_started
+   Windows_quick_start_cdk
+   Windows_quick_start_eclipse
+   Linux_quick_start_ubuntu
+   connecting_hardware
+
+
+   
+.. toctree::
+   :maxdepth: 1
+   :caption: API 手册
+   :numbered:
+
+   api_guide
+
+   
+.. toctree::
+   :maxdepth: 1
+   :caption: 示例代码
+   :numbered:
+
+   blink_demo_introduce
+   breath_pwm_demo_introduce
+   uart_loopback_demo_introduce
+
diff --git a/docs/development_guide/build/html/_sources/uart_loopback_demo_introduce.rst.txt b/docs/development_guide/build/html/_sources/uart_loopback_demo_introduce.rst.txt
new file mode 100644
index 00000000..c997edb9
--- /dev/null
+++ b/docs/development_guide/build/html/_sources/uart_loopback_demo_introduce.rst.txt
@@ -0,0 +1,91 @@
+串口自收发示例
+====================
+
+硬件连接
+-----------------------------
+
+.. figure:: img/uart_loop_sch.png
+    :alt:
+
+    **BL706_IOT板支持上述电路**
+
+-  硬件连接如上图所示 板子将芯片对应的 RX 与 TX 脚引到了排针 ``HD1``。
+-  将对应的 TX 接上串口转换芯片的 RX，RX 接上串口转换芯片的 TX，将串口转换芯片连接电脑。
+
+
+
+软件实现
+-----------------------------
+
+-  软件代码见 ``examples/uart/uart_echo``
+
+-  ``pwm`` 的输出引脚由板级描述文件 ``bsp/board/bl706_iot/pinmux_config.h`` 来配置
+
+.. code-block:: C
+    :linenos:
+
+    #define CONFIG_GPIO14_FUNC GPIO_FUN_UART0_TX
+    #define CONFIG_GPIO15_FUNC GPIO_FUN_UART0_RX
+ 
+-  可以看到，我们将 ``GPIO_PIN_14`` 与 ``GPIO_PIN_15`` 的功能选择了 ``UART`` 功能。
+
+-  不同的电路板会存在不同的引脚配置，我们会使用向导来配置不同应用场景下的引脚配置，用户也可以手动修改。
+
+
+.. code-block:: C
+    :linenos:
+
+    bflb_platform_init();
+
+-  在 ``bflb_platform_init`` 函数中，我们已经注册并且打开了一个调试用的串口设备，给用户实现一个 ``printf`` 的基本功能用作打印输出报文。
+
+.. code-block:: C
+    :linenos:
+
+    struct device *uart = device_find("debug_log");
+
+-  我们通过 ``find`` 函数，找到在 ``bflb_platform_init`` 函数中注册并且打开的串口设备句柄，储存于 ``uart`` 变量中。
+
+.. code-block:: C
+    :linenos:
+
+    if (uart)
+    {
+        device_set_callback(uart, uart_irq_callback);
+        device_control(uart, DEVICE_CTRL_SET_INT, (void *)(UART_RX_FIFO_IT|UART_RTO_IT));
+    }
+
+-  通过 ``set_callback`` 函数，注册用户指定的中断服务函数。通过 ``device_control`` 函数打开中断使能开关
+
+.. code-block:: C
+    :linenos:
+
+    void uart_irq_callback(struct device *dev, void *args, uint32_t size, uint32_t state)
+    {
+        if (state == UART_EVENT_RX_FIFO)
+        {
+            device_write(dev,0,(uint8_t *)args,size);
+        }
+        else if (state == UART_EVENT_RTO)
+        {
+            device_write(dev,0,(uint8_t *)args,size);
+        }
+    }
+
+    
+-  此函数是示例的中断服务函数，作用是将接受到的数据原封不动的发送出去。
+    
+    - ``state`` 会返回 ``UART`` 设备的中断类型
+    - ``args`` 包含了返回数据指针
+    - ``size`` 包含返回数据的长度
+    - ``dev`` 为中断的 ``uart`` 设备句柄
+
+-  当中断产生，将会调用 ``device_write`` 函数将接受到的数据发送回去。
+
+
+
+最终效果
+-----------------------------
+见视频讲解
+
+
diff --git a/docs/development_guide/build/html/_static/basic.css b/docs/development_guide/build/html/_static/basic.css
new file mode 100644
index 00000000..6acc2a73
--- /dev/null
+++ b/docs/development_guide/build/html/_static/basic.css
@@ -0,0 +1,856 @@
+/*
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+ * ~~~~~~~~~
+ *
+ * Sphinx stylesheet -- basic theme.
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diff --git a/docs/development_guide/build/html/_static/doctools.js b/docs/development_guide/build/html/_static/doctools.js
new file mode 100644
index 00000000..61ac9d26
--- /dev/null
+++ b/docs/development_guide/build/html/_static/doctools.js
@@ -0,0 +1,321 @@
+/*
+ * doctools.js
+ * ~~~~~~~~~~~
+ *
+ * Sphinx JavaScript utilities for all documentation.
+ *
+ * :copyright: Copyright 2007-2021 by the Sphinx team, see AUTHORS.
+ * :license: BSD, see LICENSE for details.
+ *
+ */
+
+/**
+ * select a different prefix for underscore
+ */
+$u = _.noConflict();
+
+/**
+ * make the code below compatible with browsers without
+ * an installed firebug like debugger
+if (!window.console || !console.firebug) {
+  var names = ["log", "debug", "info", "warn", "error", "assert", "dir",
+    "dirxml", "group", "groupEnd", "time", "timeEnd", "count", "trace",
+    "profile", "profileEnd"];
+  window.console = {};
+  for (var i = 0; i < names.length; ++i)
+    window.console[names[i]] = function() {};
+}
+ */
+
+/**
+ * small helper function to urldecode strings
+ *
+ * See https://developer.mozilla.org/en-US/docs/Web/JavaScript/Reference/Global_Objects/decodeURIComponent#Decoding_query_parameters_from_a_URL
+ */
+jQuery.urldecode = function(x) {
+  if (!x) {
+    return x
+  }
+  return decodeURIComponent(x.replace(/\+/g, ' '));
+};
+
+/**
+ * small helper function to urlencode strings
+ */
+jQuery.urlencode = encodeURIComponent;
+
+/**
+ * This function returns the parsed url parameters of the
+ * current request. Multiple values per key are supported,
+ * it will always return arrays of strings for the value parts.
+ */
+jQuery.getQueryParameters = function(s) {
+  if (typeof s === 'undefined')
+    s = document.location.search;
+  var parts = s.substr(s.indexOf('?') + 1).split('&');
+  var result = {};
+  for (var i = 0; i < parts.length; i++) {
+    var tmp = parts[i].split('=', 2);
+    var key = jQuery.urldecode(tmp[0]);
+    var value = jQuery.urldecode(tmp[1]);
+    if (key in result)
+      result[key].push(value);
+    else
+      result[key] = [value];
+  }
+  return result;
+};
+
+/**
+ * highlight a given string on a jquery object by wrapping it in
+ * span elements with the given class name.
+ */
+jQuery.fn.highlightText = function(text, className) {
+  function highlight(node, addItems) {
+    if (node.nodeType === 3) {
+      var val = node.nodeValue;
+      var pos = val.toLowerCase().indexOf(text);
+      if (pos >= 0 &&
+          !jQuery(node.parentNode).hasClass(className) &&
+          !jQuery(node.parentNode).hasClass("nohighlight")) {
+        var span;
+        var isInSVG = jQuery(node).closest("body, svg, foreignObject").is("svg");
+        if (isInSVG) {
+          span = document.createElementNS("http://www.w3.org/2000/svg", "tspan");
+        } else {
+          span = document.createElement("span");
+          span.className = className;
+        }
+        span.appendChild(document.createTextNode(val.substr(pos, text.length)));
+        node.parentNode.insertBefore(span, node.parentNode.insertBefore(
+          document.createTextNode(val.substr(pos + text.length)),
+          node.nextSibling));
+        node.nodeValue = val.substr(0, pos);
+        if (isInSVG) {
+          var rect = document.createElementNS("http://www.w3.org/2000/svg", "rect");
+          var bbox = node.parentElement.getBBox();
+          rect.x.baseVal.value = bbox.x;
+          rect.y.baseVal.value = bbox.y;
+          rect.width.baseVal.value = bbox.width;
+          rect.height.baseVal.value = bbox.height;
+          rect.setAttribute('class', className);
+          addItems.push({
+              "parent": node.parentNode,
+              "target": rect});
+        }
+      }
+    }
+    else if (!jQuery(node).is("button, select, textarea")) {
+      jQuery.each(node.childNodes, function() {
+        highlight(this, addItems);
+      });
+    }
+  }
+  var addItems = [];
+  var result = this.each(function() {
+    highlight(this, addItems);
+  });
+  for (var i = 0; i < addItems.length; ++i) {
+    jQuery(addItems[i].parent).before(addItems[i].target);
+  }
+  return result;
+};
+
+/*
+ * backward compatibility for jQuery.browser
+ * This will be supported until firefox bug is fixed.
+ */
+if (!jQuery.browser) {
+  jQuery.uaMatch = function(ua) {
+    ua = ua.toLowerCase();
+
+    var match = /(chrome)[ \/]([\w.]+)/.exec(ua) ||
+      /(webkit)[ \/]([\w.]+)/.exec(ua) ||
+      /(opera)(?:.*version|)[ \/]([\w.]+)/.exec(ua) ||
+      /(msie) ([\w.]+)/.exec(ua) ||
+      ua.indexOf("compatible") < 0 && /(mozilla)(?:.*? rv:([\w.]+)|)/.exec(ua) ||
+      [];
+
+    return {
+      browser: match[ 1 ] || "",
+      version: match[ 2 ] || "0"
+    };
+  };
+  jQuery.browser = {};
+  jQuery.browser[jQuery.uaMatch(navigator.userAgent).browser] = true;
+}
+
+/**
+ * Small JavaScript module for the documentation.
+ */
+var Documentation = {
+
+  init : function() {
+    this.fixFirefoxAnchorBug();
+    this.highlightSearchWords();
+    this.initIndexTable();
+    if (DOCUMENTATION_OPTIONS.NAVIGATION_WITH_KEYS) {
+      this.initOnKeyListeners();
+    }
+  },
+
+  /**
+   * i18n support
+   */
+  TRANSLATIONS : {},
+  PLURAL_EXPR : function(n) { return n === 1 ? 0 : 1; },
+  LOCALE : 'unknown',
+
+  // gettext and ngettext don't access this so that the functions
+  // can safely bound to a different name (_ = Documentation.gettext)
+  gettext : function(string) {
+    var translated = Documentation.TRANSLATIONS[string];
+    if (typeof translated === 'undefined')
+      return string;
+    return (typeof translated === 'string') ? translated : translated[0];
+  },
+
+  ngettext : function(singular, plural, n) {
+    var translated = Documentation.TRANSLATIONS[singular];
+    if (typeof translated === 'undefined')
+      return (n == 1) ? singular : plural;
+    return translated[Documentation.PLURALEXPR(n)];
+  },
+
+  addTranslations : function(catalog) {
+    for (var key in catalog.messages)
+      this.TRANSLATIONS[key] = catalog.messages[key];
+    this.PLURAL_EXPR = new Function('n', 'return +(' + catalog.plural_expr + ')');
+    this.LOCALE = catalog.locale;
+  },
+
+  /**
+   * add context elements like header anchor links
+   */
+  addContextElements : function() {
+    $('div[id] > :header:first').each(function() {
+      $('\u00B6').
+      attr('href', '#' + this.id).
+      attr('title', _('Permalink to this headline')).
+      appendTo(this);
+    });
+    $('dt[id]').each(function() {
+      $('\u00B6').
+      attr('href', '#' + this.id).
+      attr('title', _('Permalink to this definition')).
+      appendTo(this);
+    });
+  },
+
+  /**
+   * workaround a firefox stupidity
+   * see: https://bugzilla.mozilla.org/show_bug.cgi?id=645075
+   */
+  fixFirefoxAnchorBug : function() {
+    if (document.location.hash && $.browser.mozilla)
+      window.setTimeout(function() {
+        document.location.href += '';
+      }, 10);
+  },
+
+  /**
+   * highlight the search words provided in the url in the text
+   */
+  highlightSearchWords : function() {
+    var params = $.getQueryParameters();
+    var terms = (params.highlight) ? params.highlight[0].split(/\s+/) : [];
+    if (terms.length) {
+      var body = $('div.body');
+      if (!body.length) {
+        body = $('body');
+      }
+      window.setTimeout(function() {
+        $.each(terms, function() {
+          body.highlightText(this.toLowerCase(), 'highlighted');
+        });
+      }, 10);
+      $('
' + _('Hide Search Matches') + '
')
+          .appendTo($('#searchbox'));
+    }
+  },
+
+  /**
+   * init the domain index toggle buttons
+   */
+  initIndexTable : function() {
+    var togglers = $('img.toggler').click(function() {
+      var src = $(this).attr('src');
+      var idnum = $(this).attr('id').substr(7);
+      $('tr.cg-' + idnum).toggle();
+      if (src.substr(-9) === 'minus.png')
+        $(this).attr('src', src.substr(0, src.length-9) + 'plus.png');
+      else
+        $(this).attr('src', src.substr(0, src.length-8) + 'minus.png');
+    }).css('display', '');
+    if (DOCUMENTATION_OPTIONS.COLLAPSE_INDEX) {
+        togglers.click();
+    }
+  },
+
+  /**
+   * helper function to hide the search marks again
+   */
+  hideSearchWords : function() {
+    $('#searchbox .highlight-link').fadeOut(300);
+    $('span.highlighted').removeClass('highlighted');
+  },
+
+  /**
+   * make the url absolute
+   */
+  makeURL : function(relativeURL) {
+    return DOCUMENTATION_OPTIONS.URL_ROOT + '/' + relativeURL;
+  },
+
+  /**
+   * get the current relative url
+   */
+  getCurrentURL : function() {
+    var path = document.location.pathname;
+    var parts = path.split(/\//);
+    $.each(DOCUMENTATION_OPTIONS.URL_ROOT.split(/\//), function() {
+      if (this === '..')
+        parts.pop();
+    });
+    var url = parts.join('/');
+    return path.substring(url.lastIndexOf('/') + 1, path.length - 1);
+  },
+
+  initOnKeyListeners: function() {
+    $(document).keydown(function(event) {
+      var activeElementType = document.activeElement.tagName;
+      // don't navigate when in search box, textarea, dropdown or button
+      if (activeElementType !== 'TEXTAREA' && activeElementType !== 'INPUT' && activeElementType !== 'SELECT'
+          && activeElementType !== 'BUTTON' && !event.altKey && !event.ctrlKey && !event.metaKey
+          && !event.shiftKey) {
+        switch (event.keyCode) {
+          case 37: // left
+            var prevHref = $('link[rel="prev"]').prop('href');
+            if (prevHref) {
+              window.location.href = prevHref;
+              return false;
+            }
+          case 39: // right
+            var nextHref = $('link[rel="next"]').prop('href');
+            if (nextHref) {
+              window.location.href = nextHref;
+              return false;
+            }
+        }
+      }
+    });
+  }
+};
+
+// quick alias for translations
+_ = Documentation.gettext;
+
+$(document).ready(function() {
+  Documentation.init();
+});
diff --git a/docs/development_guide/build/html/_static/documentation_options.js b/docs/development_guide/build/html/_static/documentation_options.js
new file mode 100644
index 00000000..bf1bd56d
--- /dev/null
+++ b/docs/development_guide/build/html/_static/documentation_options.js
@@ -0,0 +1,12 @@
+var DOCUMENTATION_OPTIONS = {
+    URL_ROOT: document.getElementById("documentation_options").getAttribute('data-url_root'),
+    VERSION: '0.1',
+    LANGUAGE: 'zh_CN',
+    COLLAPSE_INDEX: false,
+    BUILDER: 'html',
+    FILE_SUFFIX: '.html',
+    LINK_SUFFIX: '.html',
+    HAS_SOURCE: true,
+    SOURCELINK_SUFFIX: '.txt',
+    NAVIGATION_WITH_KEYS: false
+};
\ No newline at end of file
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new file mode 100644
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--- /dev/null
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@@ -0,0 +1,2671 @@
+
+
+
+
+Created by FontForge 20120731 at Mon Oct 24 17:37:40 2016
+ By ,,,
+Copyright Dave Gandy 2016. All rights reserved.
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+    
+    
+    
+    
+    
+    
+    
+    
+    
+    
+    
+    
+    
+    
+    
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+
diff --git a/docs/development_guide/build/html/_static/fonts/fontawesome-webfont.ttf b/docs/development_guide/build/html/_static/fonts/fontawesome-webfont.ttf
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diff --git a/docs/development_guide/build/html/_static/fonts/fontawesome-webfont.woff b/docs/development_guide/build/html/_static/fonts/fontawesome-webfont.woff
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diff --git a/docs/development_guide/build/html/_static/fonts/fontawesome-webfont.woff2 b/docs/development_guide/build/html/_static/fonts/fontawesome-webfont.woff2
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diff --git a/docs/development_guide/build/html/_static/jquery-3.4.1.js b/docs/development_guide/build/html/_static/jquery-3.4.1.js
new file mode 100644
index 00000000..773ad95c
--- /dev/null
+++ b/docs/development_guide/build/html/_static/jquery-3.4.1.js
@@ -0,0 +1,10598 @@
+/*!
+ * jQuery JavaScript Library v3.4.1
+ * https://jquery.com/
+ *
+ * Includes Sizzle.js
+ * https://sizzlejs.com/
+ *
+ * Copyright JS Foundation and other contributors
+ * Released under the MIT license
+ * https://jquery.org/license
+ *
+ * Date: 2019-05-01T21:04Z
+ */
+( function( global, factory ) {
+
+	"use strict";
+
+	if ( typeof module === "object" && typeof module.exports === "object" ) {
+
+		// For CommonJS and CommonJS-like environments where a proper `window`
+		// is present, execute the factory and get jQuery.
+		// For environments that do not have a `window` with a `document`
+		// (such as Node.js), expose a factory as module.exports.
+		// This accentuates the need for the creation of a real `window`.
+		// e.g. var jQuery = require("jquery")(window);
+		// See ticket #14549 for more info.
+		module.exports = global.document ?
+			factory( global, true ) :
+			function( w ) {
+				if ( !w.document ) {
+					throw new Error( "jQuery requires a window with a document" );
+				}
+				return factory( w );
+			};
+	} else {
+		factory( global );
+	}
+
+// Pass this if window is not defined yet
+} )( typeof window !== "undefined" ? window : this, function( window, noGlobal ) {
+
+// Edge <= 12 - 13+, Firefox <=18 - 45+, IE 10 - 11, Safari 5.1 - 9+, iOS 6 - 9.1
+// throw exceptions when non-strict code (e.g., ASP.NET 4.5) accesses strict mode
+// arguments.callee.caller (trac-13335). But as of jQuery 3.0 (2016), strict mode should be common
+// enough that all such attempts are guarded in a try block.
+"use strict";
+
+var arr = [];
+
+var document = window.document;
+
+var getProto = Object.getPrototypeOf;
+
+var slice = arr.slice;
+
+var concat = arr.concat;
+
+var push = arr.push;
+
+var indexOf = arr.indexOf;
+
+var class2type = {};
+
+var toString = class2type.toString;
+
+var hasOwn = class2type.hasOwnProperty;
+
+var fnToString = hasOwn.toString;
+
+var ObjectFunctionString = fnToString.call( Object );
+
+var support = {};
+
+var isFunction = function isFunction( obj ) {
+
+      // Support: Chrome <=57, Firefox <=52
+      // In some browsers, typeof returns "function" for HTML  elements
+      // (i.e., `typeof document.createElement( "object" ) === "function"`).
+      // We don't want to classify *any* DOM node as a function.
+      return typeof obj === "function" && typeof obj.nodeType !== "number";
+  };
+
+
+var isWindow = function isWindow( obj ) {
+		return obj != null && obj === obj.window;
+	};
+
+
+
+
+	var preservedScriptAttributes = {
+		type: true,
+		src: true,
+		nonce: true,
+		noModule: true
+	};
+
+	function DOMEval( code, node, doc ) {
+		doc = doc || document;
+
+		var i, val,
+			script = doc.createElement( "script" );
+
+		script.text = code;
+		if ( node ) {
+			for ( i in preservedScriptAttributes ) {
+
+				// Support: Firefox 64+, Edge 18+
+				// Some browsers don't support the "nonce" property on scripts.
+				// On the other hand, just using `getAttribute` is not enough as
+				// the `nonce` attribute is reset to an empty string whenever it
+				// becomes browsing-context connected.
+				// See https://github.com/whatwg/html/issues/2369
+				// See https://html.spec.whatwg.org/#nonce-attributes
+				// The `node.getAttribute` check was added for the sake of
+				// `jQuery.globalEval` so that it can fake a nonce-containing node
+				// via an object.
+				val = node[ i ] || node.getAttribute && node.getAttribute( i );
+				if ( val ) {
+					script.setAttribute( i, val );
+				}
+			}
+		}
+		doc.head.appendChild( script ).parentNode.removeChild( script );
+	}
+
+
+function toType( obj ) {
+	if ( obj == null ) {
+		return obj + "";
+	}
+
+	// Support: Android <=2.3 only (functionish RegExp)
+	return typeof obj === "object" || typeof obj === "function" ?
+		class2type[ toString.call( obj ) ] || "object" :
+		typeof obj;
+}
+/* global Symbol */
+// Defining this global in .eslintrc.json would create a danger of using the global
+// unguarded in another place, it seems safer to define global only for this module
+
+
+
+var
+	version = "3.4.1",
+
+	// Define a local copy of jQuery
+	jQuery = function( selector, context ) {
+
+		// The jQuery object is actually just the init constructor 'enhanced'
+		// Need init if jQuery is called (just allow error to be thrown if not included)
+		return new jQuery.fn.init( selector, context );
+	},
+
+	// Support: Android <=4.0 only
+	// Make sure we trim BOM and NBSP
+	rtrim = /^[\s\uFEFF\xA0]+|[\s\uFEFF\xA0]+$/g;
+
+jQuery.fn = jQuery.prototype = {
+
+	// The current version of jQuery being used
+	jquery: version,
+
+	constructor: jQuery,
+
+	// The default length of a jQuery object is 0
+	length: 0,
+
+	toArray: function() {
+		return slice.call( this );
+	},
+
+	// Get the Nth element in the matched element set OR
+	// Get the whole matched element set as a clean array
+	get: function( num ) {
+
+		// Return all the elements in a clean array
+		if ( num == null ) {
+			return slice.call( this );
+		}
+
+		// Return just the one element from the set
+		return num < 0 ? this[ num + this.length ] : this[ num ];
+	},
+
+	// Take an array of elements and push it onto the stack
+	// (returning the new matched element set)
+	pushStack: function( elems ) {
+
+		// Build a new jQuery matched element set
+		var ret = jQuery.merge( this.constructor(), elems );
+
+		// Add the old object onto the stack (as a reference)
+		ret.prevObject = this;
+
+		// Return the newly-formed element set
+		return ret;
+	},
+
+	// Execute a callback for every element in the matched set.
+	each: function( callback ) {
+		return jQuery.each( this, callback );
+	},
+
+	map: function( callback ) {
+		return this.pushStack( jQuery.map( this, function( elem, i ) {
+			return callback.call( elem, i, elem );
+		} ) );
+	},
+
+	slice: function() {
+		return this.pushStack( slice.apply( this, arguments ) );
+	},
+
+	first: function() {
+		return this.eq( 0 );
+	},
+
+	last: function() {
+		return this.eq( -1 );
+	},
+
+	eq: function( i ) {
+		var len = this.length,
+			j = +i + ( i < 0 ? len : 0 );
+		return this.pushStack( j >= 0 && j < len ? [ this[ j ] ] : [] );
+	},
+
+	end: function() {
+		return this.prevObject || this.constructor();
+	},
+
+	// For internal use only.
+	// Behaves like an Array's method, not like a jQuery method.
+	push: push,
+	sort: arr.sort,
+	splice: arr.splice
+};
+
+jQuery.extend = jQuery.fn.extend = function() {
+	var options, name, src, copy, copyIsArray, clone,
+		target = arguments[ 0 ] || {},
+		i = 1,
+		length = arguments.length,
+		deep = false;
+
+	// Handle a deep copy situation
+	if ( typeof target === "boolean" ) {
+		deep = target;
+
+		// Skip the boolean and the target
+		target = arguments[ i ] || {};
+		i++;
+	}
+
+	// Handle case when target is a string or something (possible in deep copy)
+	if ( typeof target !== "object" && !isFunction( target ) ) {
+		target = {};
+	}
+
+	// Extend jQuery itself if only one argument is passed
+	if ( i === length ) {
+		target = this;
+		i--;
+	}
+
+	for ( ; i < length; i++ ) {
+
+		// Only deal with non-null/undefined values
+		if ( ( options = arguments[ i ] ) != null ) {
+
+			// Extend the base object
+			for ( name in options ) {
+				copy = options[ name ];
+
+				// Prevent Object.prototype pollution
+				// Prevent never-ending loop
+				if ( name === "__proto__" || target === copy ) {
+					continue;
+				}
+
+				// Recurse if we're merging plain objects or arrays
+				if ( deep && copy && ( jQuery.isPlainObject( copy ) ||
+					( copyIsArray = Array.isArray( copy ) ) ) ) {
+					src = target[ name ];
+
+					// Ensure proper type for the source value
+					if ( copyIsArray && !Array.isArray( src ) ) {
+						clone = [];
+					} else if ( !copyIsArray && !jQuery.isPlainObject( src ) ) {
+						clone = {};
+					} else {
+						clone = src;
+					}
+					copyIsArray = false;
+
+					// Never move original objects, clone them
+					target[ name ] = jQuery.extend( deep, clone, copy );
+
+				// Don't bring in undefined values
+				} else if ( copy !== undefined ) {
+					target[ name ] = copy;
+				}
+			}
+		}
+	}
+
+	// Return the modified object
+	return target;
+};
+
+jQuery.extend( {
+
+	// Unique for each copy of jQuery on the page
+	expando: "jQuery" + ( version + Math.random() ).replace( /\D/g, "" ),
+
+	// Assume jQuery is ready without the ready module
+	isReady: true,
+
+	error: function( msg ) {
+		throw new Error( msg );
+	},
+
+	noop: function() {},
+
+	isPlainObject: function( obj ) {
+		var proto, Ctor;
+
+		// Detect obvious negatives
+		// Use toString instead of jQuery.type to catch host objects
+		if ( !obj || toString.call( obj ) !== "[object Object]" ) {
+			return false;
+		}
+
+		proto = getProto( obj );
+
+		// Objects with no prototype (e.g., `Object.create( null )`) are plain
+		if ( !proto ) {
+			return true;
+		}
+
+		// Objects with prototype are plain iff they were constructed by a global Object function
+		Ctor = hasOwn.call( proto, "constructor" ) && proto.constructor;
+		return typeof Ctor === "function" && fnToString.call( Ctor ) === ObjectFunctionString;
+	},
+
+	isEmptyObject: function( obj ) {
+		var name;
+
+		for ( name in obj ) {
+			return false;
+		}
+		return true;
+	},
+
+	// Evaluates a script in a global context
+	globalEval: function( code, options ) {
+		DOMEval( code, { nonce: options && options.nonce } );
+	},
+
+	each: function( obj, callback ) {
+		var length, i = 0;
+
+		if ( isArrayLike( obj ) ) {
+			length = obj.length;
+			for ( ; i < length; i++ ) {
+				if ( callback.call( obj[ i ], i, obj[ i ] ) === false ) {
+					break;
+				}
+			}
+		} else {
+			for ( i in obj ) {
+				if ( callback.call( obj[ i ], i, obj[ i ] ) === false ) {
+					break;
+				}
+			}
+		}
+
+		return obj;
+	},
+
+	// Support: Android <=4.0 only
+	trim: function( text ) {
+		return text == null ?
+			"" :
+			( text + "" ).replace( rtrim, "" );
+	},
+
+	// results is for internal usage only
+	makeArray: function( arr, results ) {
+		var ret = results || [];
+
+		if ( arr != null ) {
+			if ( isArrayLike( Object( arr ) ) ) {
+				jQuery.merge( ret,
+					typeof arr === "string" ?
+					[ arr ] : arr
+				);
+			} else {
+				push.call( ret, arr );
+			}
+		}
+
+		return ret;
+	},
+
+	inArray: function( elem, arr, i ) {
+		return arr == null ? -1 : indexOf.call( arr, elem, i );
+	},
+
+	// Support: Android <=4.0 only, PhantomJS 1 only
+	// push.apply(_, arraylike) throws on ancient WebKit
+	merge: function( first, second ) {
+		var len = +second.length,
+			j = 0,
+			i = first.length;
+
+		for ( ; j < len; j++ ) {
+			first[ i++ ] = second[ j ];
+		}
+
+		first.length = i;
+
+		return first;
+	},
+
+	grep: function( elems, callback, invert ) {
+		var callbackInverse,
+			matches = [],
+			i = 0,
+			length = elems.length,
+			callbackExpect = !invert;
+
+		// Go through the array, only saving the items
+		// that pass the validator function
+		for ( ; i < length; i++ ) {
+			callbackInverse = !callback( elems[ i ], i );
+			if ( callbackInverse !== callbackExpect ) {
+				matches.push( elems[ i ] );
+			}
+		}
+
+		return matches;
+	},
+
+	// arg is for internal usage only
+	map: function( elems, callback, arg ) {
+		var length, value,
+			i = 0,
+			ret = [];
+
+		// Go through the array, translating each of the items to their new values
+		if ( isArrayLike( elems ) ) {
+			length = elems.length;
+			for ( ; i < length; i++ ) {
+				value = callback( elems[ i ], i, arg );
+
+				if ( value != null ) {
+					ret.push( value );
+				}
+			}
+
+		// Go through every key on the object,
+		} else {
+			for ( i in elems ) {
+				value = callback( elems[ i ], i, arg );
+
+				if ( value != null ) {
+					ret.push( value );
+				}
+			}
+		}
+
+		// Flatten any nested arrays
+		return concat.apply( [], ret );
+	},
+
+	// A global GUID counter for objects
+	guid: 1,
+
+	// jQuery.support is not used in Core but other projects attach their
+	// properties to it so it needs to exist.
+	support: support
+} );
+
+if ( typeof Symbol === "function" ) {
+	jQuery.fn[ Symbol.iterator ] = arr[ Symbol.iterator ];
+}
+
+// Populate the class2type map
+jQuery.each( "Boolean Number String Function Array Date RegExp Object Error Symbol".split( " " ),
+function( i, name ) {
+	class2type[ "[object " + name + "]" ] = name.toLowerCase();
+} );
+
+function isArrayLike( obj ) {
+
+	// Support: real iOS 8.2 only (not reproducible in simulator)
+	// `in` check used to prevent JIT error (gh-2145)
+	// hasOwn isn't used here due to false negatives
+	// regarding Nodelist length in IE
+	var length = !!obj && "length" in obj && obj.length,
+		type = toType( obj );
+
+	if ( isFunction( obj ) || isWindow( obj ) ) {
+		return false;
+	}
+
+	return type === "array" || length === 0 ||
+		typeof length === "number" && length > 0 && ( length - 1 ) in obj;
+}
+var Sizzle =
+/*!
+ * Sizzle CSS Selector Engine v2.3.4
+ * https://sizzlejs.com/
+ *
+ * Copyright JS Foundation and other contributors
+ * Released under the MIT license
+ * https://js.foundation/
+ *
+ * Date: 2019-04-08
+ */
+(function( window ) {
+
+var i,
+	support,
+	Expr,
+	getText,
+	isXML,
+	tokenize,
+	compile,
+	select,
+	outermostContext,
+	sortInput,
+	hasDuplicate,
+
+	// Local document vars
+	setDocument,
+	document,
+	docElem,
+	documentIsHTML,
+	rbuggyQSA,
+	rbuggyMatches,
+	matches,
+	contains,
+
+	// Instance-specific data
+	expando = "sizzle" + 1 * new Date(),
+	preferredDoc = window.document,
+	dirruns = 0,
+	done = 0,
+	classCache = createCache(),
+	tokenCache = createCache(),
+	compilerCache = createCache(),
+	nonnativeSelectorCache = createCache(),
+	sortOrder = function( a, b ) {
+		if ( a === b ) {
+			hasDuplicate = true;
+		}
+		return 0;
+	},
+
+	// Instance methods
+	hasOwn = ({}).hasOwnProperty,
+	arr = [],
+	pop = arr.pop,
+	push_native = arr.push,
+	push = arr.push,
+	slice = arr.slice,
+	// Use a stripped-down indexOf as it's faster than native
+	// https://jsperf.com/thor-indexof-vs-for/5
+	indexOf = function( list, elem ) {
+		var i = 0,
+			len = list.length;
+		for ( ; i < len; i++ ) {
+			if ( list[i] === elem ) {
+				return i;
+			}
+		}
+		return -1;
+	},
+
+	booleans = "checked|selected|async|autofocus|autoplay|controls|defer|disabled|hidden|ismap|loop|multiple|open|readonly|required|scoped",
+
+	// Regular expressions
+
+	// http://www.w3.org/TR/css3-selectors/#whitespace
+	whitespace = "[\\x20\\t\\r\\n\\f]",
+
+	// http://www.w3.org/TR/CSS21/syndata.html#value-def-identifier
+	identifier = "(?:\\\\.|[\\w-]|[^\0-\\xa0])+",
+
+	// Attribute selectors: http://www.w3.org/TR/selectors/#attribute-selectors
+	attributes = "\\[" + whitespace + "*(" + identifier + ")(?:" + whitespace +
+		// Operator (capture 2)
+		"*([*^$|!~]?=)" + whitespace +
+		// "Attribute values must be CSS identifiers [capture 5] or strings [capture 3 or capture 4]"
+		"*(?:'((?:\\\\.|[^\\\\'])*)'|\"((?:\\\\.|[^\\\\\"])*)\"|(" + identifier + "))|)" + whitespace +
+		"*\\]",
+
+	pseudos = ":(" + identifier + ")(?:\\((" +
+		// To reduce the number of selectors needing tokenize in the preFilter, prefer arguments:
+		// 1. quoted (capture 3; capture 4 or capture 5)
+		"('((?:\\\\.|[^\\\\'])*)'|\"((?:\\\\.|[^\\\\\"])*)\")|" +
+		// 2. simple (capture 6)
+		"((?:\\\\.|[^\\\\()[\\]]|" + attributes + ")*)|" +
+		// 3. anything else (capture 2)
+		".*" +
+		")\\)|)",
+
+	// Leading and non-escaped trailing whitespace, capturing some non-whitespace characters preceding the latter
+	rwhitespace = new RegExp( whitespace + "+", "g" ),
+	rtrim = new RegExp( "^" + whitespace + "+|((?:^|[^\\\\])(?:\\\\.)*)" + whitespace + "+$", "g" ),
+
+	rcomma = new RegExp( "^" + whitespace + "*," + whitespace + "*" ),
+	rcombinators = new RegExp( "^" + whitespace + "*([>+~]|" + whitespace + ")" + whitespace + "*" ),
+	rdescend = new RegExp( whitespace + "|>" ),
+
+	rpseudo = new RegExp( pseudos ),
+	ridentifier = new RegExp( "^" + identifier + "$" ),
+
+	matchExpr = {
+		"ID": new RegExp( "^#(" + identifier + ")" ),
+		"CLASS": new RegExp( "^\\.(" + identifier + ")" ),
+		"TAG": new RegExp( "^(" + identifier + "|[*])" ),
+		"ATTR": new RegExp( "^" + attributes ),
+		"PSEUDO": new RegExp( "^" + pseudos ),
+		"CHILD": new RegExp( "^:(only|first|last|nth|nth-last)-(child|of-type)(?:\\(" + whitespace +
+			"*(even|odd|(([+-]|)(\\d*)n|)" + whitespace + "*(?:([+-]|)" + whitespace +
+			"*(\\d+)|))" + whitespace + "*\\)|)", "i" ),
+		"bool": new RegExp( "^(?:" + booleans + ")$", "i" ),
+		// For use in libraries implementing .is()
+		// We use this for POS matching in `select`
+		"needsContext": new RegExp( "^" + whitespace + "*[>+~]|:(even|odd|eq|gt|lt|nth|first|last)(?:\\(" +
+			whitespace + "*((?:-\\d)?\\d*)" + whitespace + "*\\)|)(?=[^-]|$)", "i" )
+	},
+
+	rhtml = /HTML$/i,
+	rinputs = /^(?:input|select|textarea|button)$/i,
+	rheader = /^h\d$/i,
+
+	rnative = /^[^{]+\{\s*\[native \w/,
+
+	// Easily-parseable/retrievable ID or TAG or CLASS selectors
+	rquickExpr = /^(?:#([\w-]+)|(\w+)|\.([\w-]+))$/,
+
+	rsibling = /[+~]/,
+
+	// CSS escapes
+	// http://www.w3.org/TR/CSS21/syndata.html#escaped-characters
+	runescape = new RegExp( "\\\\([\\da-f]{1,6}" + whitespace + "?|(" + whitespace + ")|.)", "ig" ),
+	funescape = function( _, escaped, escapedWhitespace ) {
+		var high = "0x" + escaped - 0x10000;
+		// NaN means non-codepoint
+		// Support: Firefox<24
+		// Workaround erroneous numeric interpretation of +"0x"
+		return high !== high || escapedWhitespace ?
+			escaped :
+			high < 0 ?
+				// BMP codepoint
+				String.fromCharCode( high + 0x10000 ) :
+				// Supplemental Plane codepoint (surrogate pair)
+				String.fromCharCode( high >> 10 | 0xD800, high & 0x3FF | 0xDC00 );
+	},
+
+	// CSS string/identifier serialization
+	// https://drafts.csswg.org/cssom/#common-serializing-idioms
+	rcssescape = /([\0-\x1f\x7f]|^-?\d)|^-$|[^\0-\x1f\x7f-\uFFFF\w-]/g,
+	fcssescape = function( ch, asCodePoint ) {
+		if ( asCodePoint ) {
+
+			// U+0000 NULL becomes U+FFFD REPLACEMENT CHARACTER
+			if ( ch === "\0" ) {
+				return "\uFFFD";
+			}
+
+			// Control characters and (dependent upon position) numbers get escaped as code points
+			return ch.slice( 0, -1 ) + "\\" + ch.charCodeAt( ch.length - 1 ).toString( 16 ) + " ";
+		}
+
+		// Other potentially-special ASCII characters get backslash-escaped
+		return "\\" + ch;
+	},
+
+	// Used for iframes
+	// See setDocument()
+	// Removing the function wrapper causes a "Permission Denied"
+	// error in IE
+	unloadHandler = function() {
+		setDocument();
+	},
+
+	inDisabledFieldset = addCombinator(
+		function( elem ) {
+			return elem.disabled === true && elem.nodeName.toLowerCase() === "fieldset";
+		},
+		{ dir: "parentNode", next: "legend" }
+	);
+
+// Optimize for push.apply( _, NodeList )
+try {
+	push.apply(
+		(arr = slice.call( preferredDoc.childNodes )),
+		preferredDoc.childNodes
+	);
+	// Support: Android<4.0
+	// Detect silently failing push.apply
+	arr[ preferredDoc.childNodes.length ].nodeType;
+} catch ( e ) {
+	push = { apply: arr.length ?
+
+		// Leverage slice if possible
+		function( target, els ) {
+			push_native.apply( target, slice.call(els) );
+		} :
+
+		// Support: IE<9
+		// Otherwise append directly
+		function( target, els ) {
+			var j = target.length,
+				i = 0;
+			// Can't trust NodeList.length
+			while ( (target[j++] = els[i++]) ) {}
+			target.length = j - 1;
+		}
+	};
+}
+
+function Sizzle( selector, context, results, seed ) {
+	var m, i, elem, nid, match, groups, newSelector,
+		newContext = context && context.ownerDocument,
+
+		// nodeType defaults to 9, since context defaults to document
+		nodeType = context ? context.nodeType : 9;
+
+	results = results || [];
+
+	// Return early from calls with invalid selector or context
+	if ( typeof selector !== "string" || !selector ||
+		nodeType !== 1 && nodeType !== 9 && nodeType !== 11 ) {
+
+		return results;
+	}
+
+	// Try to shortcut find operations (as opposed to filters) in HTML documents
+	if ( !seed ) {
+
+		if ( ( context ? context.ownerDocument || context : preferredDoc ) !== document ) {
+			setDocument( context );
+		}
+		context = context || document;
+
+		if ( documentIsHTML ) {
+
+			// If the selector is sufficiently simple, try using a "get*By*" DOM method
+			// (excepting DocumentFragment context, where the methods don't exist)
+			if ( nodeType !== 11 && (match = rquickExpr.exec( selector )) ) {
+
+				// ID selector
+				if ( (m = match[1]) ) {
+
+					// Document context
+					if ( nodeType === 9 ) {
+						if ( (elem = context.getElementById( m )) ) {
+
+							// Support: IE, Opera, Webkit
+							// TODO: identify versions
+							// getElementById can match elements by name instead of ID
+							if ( elem.id === m ) {
+								results.push( elem );
+								return results;
+							}
+						} else {
+							return results;
+						}
+
+					// Element context
+					} else {
+
+						// Support: IE, Opera, Webkit
+						// TODO: identify versions
+						// getElementById can match elements by name instead of ID
+						if ( newContext && (elem = newContext.getElementById( m )) &&
+							contains( context, elem ) &&
+							elem.id === m ) {
+
+							results.push( elem );
+							return results;
+						}
+					}
+
+				// Type selector
+				} else if ( match[2] ) {
+					push.apply( results, context.getElementsByTagName( selector ) );
+					return results;
+
+				// Class selector
+				} else if ( (m = match[3]) && support.getElementsByClassName &&
+					context.getElementsByClassName ) {
+
+					push.apply( results, context.getElementsByClassName( m ) );
+					return results;
+				}
+			}
+
+			// Take advantage of querySelectorAll
+			if ( support.qsa &&
+				!nonnativeSelectorCache[ selector + " " ] &&
+				(!rbuggyQSA || !rbuggyQSA.test( selector )) &&
+
+				// Support: IE 8 only
+				// Exclude object elements
+				(nodeType !== 1 || context.nodeName.toLowerCase() !== "object") ) {
+
+				newSelector = selector;
+				newContext = context;
+
+				// qSA considers elements outside a scoping root when evaluating child or
+				// descendant combinators, which is not what we want.
+				// In such cases, we work around the behavior by prefixing every selector in the
+				// list with an ID selector referencing the scope context.
+				// Thanks to Andrew Dupont for this technique.
+				if ( nodeType === 1 && rdescend.test( selector ) ) {
+
+					// Capture the context ID, setting it first if necessary
+					if ( (nid = context.getAttribute( "id" )) ) {
+						nid = nid.replace( rcssescape, fcssescape );
+					} else {
+						context.setAttribute( "id", (nid = expando) );
+					}
+
+					// Prefix every selector in the list
+					groups = tokenize( selector );
+					i = groups.length;
+					while ( i-- ) {
+						groups[i] = "#" + nid + " " + toSelector( groups[i] );
+					}
+					newSelector = groups.join( "," );
+
+					// Expand context for sibling selectors
+					newContext = rsibling.test( selector ) && testContext( context.parentNode ) ||
+						context;
+				}
+
+				try {
+					push.apply( results,
+						newContext.querySelectorAll( newSelector )
+					);
+					return results;
+				} catch ( qsaError ) {
+					nonnativeSelectorCache( selector, true );
+				} finally {
+					if ( nid === expando ) {
+						context.removeAttribute( "id" );
+					}
+				}
+			}
+		}
+	}
+
+	// All others
+	return select( selector.replace( rtrim, "$1" ), context, results, seed );
+}
+
+/**
+ * Create key-value caches of limited size
+ * @returns {function(string, object)} Returns the Object data after storing it on itself with
+ *	property name the (space-suffixed) string and (if the cache is larger than Expr.cacheLength)
+ *	deleting the oldest entry
+ */
+function createCache() {
+	var keys = [];
+
+	function cache( key, value ) {
+		// Use (key + " ") to avoid collision with native prototype properties (see Issue #157)
+		if ( keys.push( key + " " ) > Expr.cacheLength ) {
+			// Only keep the most recent entries
+			delete cache[ keys.shift() ];
+		}
+		return (cache[ key + " " ] = value);
+	}
+	return cache;
+}
+
+/**
+ * Mark a function for special use by Sizzle
+ * @param {Function} fn The function to mark
+ */
+function markFunction( fn ) {
+	fn[ expando ] = true;
+	return fn;
+}
+
+/**
+ * Support testing using an element
+ * @param {Function} fn Passed the created element and returns a boolean result
+ */
+function assert( fn ) {
+	var el = document.createElement("fieldset");
+
+	try {
+		return !!fn( el );
+	} catch (e) {
+		return false;
+	} finally {
+		// Remove from its parent by default
+		if ( el.parentNode ) {
+			el.parentNode.removeChild( el );
+		}
+		// release memory in IE
+		el = null;
+	}
+}
+
+/**
+ * Adds the same handler for all of the specified attrs
+ * @param {String} attrs Pipe-separated list of attributes
+ * @param {Function} handler The method that will be applied
+ */
+function addHandle( attrs, handler ) {
+	var arr = attrs.split("|"),
+		i = arr.length;
+
+	while ( i-- ) {
+		Expr.attrHandle[ arr[i] ] = handler;
+	}
+}
+
+/**
+ * Checks document order of two siblings
+ * @param {Element} a
+ * @param {Element} b
+ * @returns {Number} Returns less than 0 if a precedes b, greater than 0 if a follows b
+ */
+function siblingCheck( a, b ) {
+	var cur = b && a,
+		diff = cur && a.nodeType === 1 && b.nodeType === 1 &&
+			a.sourceIndex - b.sourceIndex;
+
+	// Use IE sourceIndex if available on both nodes
+	if ( diff ) {
+		return diff;
+	}
+
+	// Check if b follows a
+	if ( cur ) {
+		while ( (cur = cur.nextSibling) ) {
+			if ( cur === b ) {
+				return -1;
+			}
+		}
+	}
+
+	return a ? 1 : -1;
+}
+
+/**
+ * Returns a function to use in pseudos for input types
+ * @param {String} type
+ */
+function createInputPseudo( type ) {
+	return function( elem ) {
+		var name = elem.nodeName.toLowerCase();
+		return name === "input" && elem.type === type;
+	};
+}
+
+/**
+ * Returns a function to use in pseudos for buttons
+ * @param {String} type
+ */
+function createButtonPseudo( type ) {
+	return function( elem ) {
+		var name = elem.nodeName.toLowerCase();
+		return (name === "input" || name === "button") && elem.type === type;
+	};
+}
+
+/**
+ * Returns a function to use in pseudos for :enabled/:disabled
+ * @param {Boolean} disabled true for :disabled; false for :enabled
+ */
+function createDisabledPseudo( disabled ) {
+
+	// Known :disabled false positives: fieldset[disabled] > legend:nth-of-type(n+2) :can-disable
+	return function( elem ) {
+
+		// Only certain elements can match :enabled or :disabled
+		// https://html.spec.whatwg.org/multipage/scripting.html#selector-enabled
+		// https://html.spec.whatwg.org/multipage/scripting.html#selector-disabled
+		if ( "form" in elem ) {
+
+			// Check for inherited disabledness on relevant non-disabled elements:
+			// * listed form-associated elements in a disabled fieldset
+			//   https://html.spec.whatwg.org/multipage/forms.html#category-listed
+			//   https://html.spec.whatwg.org/multipage/forms.html#concept-fe-disabled
+			// * option elements in a disabled optgroup
+			//   https://html.spec.whatwg.org/multipage/forms.html#concept-option-disabled
+			// All such elements have a "form" property.
+			if ( elem.parentNode && elem.disabled === false ) {
+
+				// Option elements defer to a parent optgroup if present
+				if ( "label" in elem ) {
+					if ( "label" in elem.parentNode ) {
+						return elem.parentNode.disabled === disabled;
+					} else {
+						return elem.disabled === disabled;
+					}
+				}
+
+				// Support: IE 6 - 11
+				// Use the isDisabled shortcut property to check for disabled fieldset ancestors
+				return elem.isDisabled === disabled ||
+
+					// Where there is no isDisabled, check manually
+					/* jshint -W018 */
+					elem.isDisabled !== !disabled &&
+						inDisabledFieldset( elem ) === disabled;
+			}
+
+			return elem.disabled === disabled;
+
+		// Try to winnow out elements that can't be disabled before trusting the disabled property.
+		// Some victims get caught in our net (label, legend, menu, track), but it shouldn't
+		// even exist on them, let alone have a boolean value.
+		} else if ( "label" in elem ) {
+			return elem.disabled === disabled;
+		}
+
+		// Remaining elements are neither :enabled nor :disabled
+		return false;
+	};
+}
+
+/**
+ * Returns a function to use in pseudos for positionals
+ * @param {Function} fn
+ */
+function createPositionalPseudo( fn ) {
+	return markFunction(function( argument ) {
+		argument = +argument;
+		return markFunction(function( seed, matches ) {
+			var j,
+				matchIndexes = fn( [], seed.length, argument ),
+				i = matchIndexes.length;
+
+			// Match elements found at the specified indexes
+			while ( i-- ) {
+				if ( seed[ (j = matchIndexes[i]) ] ) {
+					seed[j] = !(matches[j] = seed[j]);
+				}
+			}
+		});
+	});
+}
+
+/**
+ * Checks a node for validity as a Sizzle context
+ * @param {Element|Object=} context
+ * @returns {Element|Object|Boolean} The input node if acceptable, otherwise a falsy value
+ */
+function testContext( context ) {
+	return context && typeof context.getElementsByTagName !== "undefined" && context;
+}
+
+// Expose support vars for convenience
+support = Sizzle.support = {};
+
+/**
+ * Detects XML nodes
+ * @param {Element|Object} elem An element or a document
+ * @returns {Boolean} True iff elem is a non-HTML XML node
+ */
+isXML = Sizzle.isXML = function( elem ) {
+	var namespace = elem.namespaceURI,
+		docElem = (elem.ownerDocument || elem).documentElement;
+
+	// Support: IE <=8
+	// Assume HTML when documentElement doesn't yet exist, such as inside loading iframes
+	// https://bugs.jquery.com/ticket/4833
+	return !rhtml.test( namespace || docElem && docElem.nodeName || "HTML" );
+};
+
+/**
+ * Sets document-related variables once based on the current document
+ * @param {Element|Object} [doc] An element or document object to use to set the document
+ * @returns {Object} Returns the current document
+ */
+setDocument = Sizzle.setDocument = function( node ) {
+	var hasCompare, subWindow,
+		doc = node ? node.ownerDocument || node : preferredDoc;
+
+	// Return early if doc is invalid or already selected
+	if ( doc === document || doc.nodeType !== 9 || !doc.documentElement ) {
+		return document;
+	}
+
+	// Update global variables
+	document = doc;
+	docElem = document.documentElement;
+	documentIsHTML = !isXML( document );
+
+	// Support: IE 9-11, Edge
+	// Accessing iframe documents after unload throws "permission denied" errors (jQuery #13936)
+	if ( preferredDoc !== document &&
+		(subWindow = document.defaultView) && subWindow.top !== subWindow ) {
+
+		// Support: IE 11, Edge
+		if ( subWindow.addEventListener ) {
+			subWindow.addEventListener( "unload", unloadHandler, false );
+
+		// Support: IE 9 - 10 only
+		} else if ( subWindow.attachEvent ) {
+			subWindow.attachEvent( "onunload", unloadHandler );
+		}
+	}
+
+	/* Attributes
+	---------------------------------------------------------------------- */
+
+	// Support: IE<8
+	// Verify that getAttribute really returns attributes and not properties
+	// (excepting IE8 booleans)
+	support.attributes = assert(function( el ) {
+		el.className = "i";
+		return !el.getAttribute("className");
+	});
+
+	/* getElement(s)By*
+	---------------------------------------------------------------------- */
+
+	// Check if getElementsByTagName("*") returns only elements
+	support.getElementsByTagName = assert(function( el ) {
+		el.appendChild( document.createComment("") );
+		return !el.getElementsByTagName("*").length;
+	});
+
+	// Support: IE<9
+	support.getElementsByClassName = rnative.test( document.getElementsByClassName );
+
+	// Support: IE<10
+	// Check if getElementById returns elements by name
+	// The broken getElementById methods don't pick up programmatically-set names,
+	// so use a roundabout getElementsByName test
+	support.getById = assert(function( el ) {
+		docElem.appendChild( el ).id = expando;
+		return !document.getElementsByName || !document.getElementsByName( expando ).length;
+	});
+
+	// ID filter and find
+	if ( support.getById ) {
+		Expr.filter["ID"] = function( id ) {
+			var attrId = id.replace( runescape, funescape );
+			return function( elem ) {
+				return elem.getAttribute("id") === attrId;
+			};
+		};
+		Expr.find["ID"] = function( id, context ) {
+			if ( typeof context.getElementById !== "undefined" && documentIsHTML ) {
+				var elem = context.getElementById( id );
+				return elem ? [ elem ] : [];
+			}
+		};
+	} else {
+		Expr.filter["ID"] =  function( id ) {
+			var attrId = id.replace( runescape, funescape );
+			return function( elem ) {
+				var node = typeof elem.getAttributeNode !== "undefined" &&
+					elem.getAttributeNode("id");
+				return node && node.value === attrId;
+			};
+		};
+
+		// Support: IE 6 - 7 only
+		// getElementById is not reliable as a find shortcut
+		Expr.find["ID"] = function( id, context ) {
+			if ( typeof context.getElementById !== "undefined" && documentIsHTML ) {
+				var node, i, elems,
+					elem = context.getElementById( id );
+
+				if ( elem ) {
+
+					// Verify the id attribute
+					node = elem.getAttributeNode("id");
+					if ( node && node.value === id ) {
+						return [ elem ];
+					}
+
+					// Fall back on getElementsByName
+					elems = context.getElementsByName( id );
+					i = 0;
+					while ( (elem = elems[i++]) ) {
+						node = elem.getAttributeNode("id");
+						if ( node && node.value === id ) {
+							return [ elem ];
+						}
+					}
+				}
+
+				return [];
+			}
+		};
+	}
+
+	// Tag
+	Expr.find["TAG"] = support.getElementsByTagName ?
+		function( tag, context ) {
+			if ( typeof context.getElementsByTagName !== "undefined" ) {
+				return context.getElementsByTagName( tag );
+
+			// DocumentFragment nodes don't have gEBTN
+			} else if ( support.qsa ) {
+				return context.querySelectorAll( tag );
+			}
+		} :
+
+		function( tag, context ) {
+			var elem,
+				tmp = [],
+				i = 0,
+				// By happy coincidence, a (broken) gEBTN appears on DocumentFragment nodes too
+				results = context.getElementsByTagName( tag );
+
+			// Filter out possible comments
+			if ( tag === "*" ) {
+				while ( (elem = results[i++]) ) {
+					if ( elem.nodeType === 1 ) {
+						tmp.push( elem );
+					}
+				}
+
+				return tmp;
+			}
+			return results;
+		};
+
+	// Class
+	Expr.find["CLASS"] = support.getElementsByClassName && function( className, context ) {
+		if ( typeof context.getElementsByClassName !== "undefined" && documentIsHTML ) {
+			return context.getElementsByClassName( className );
+		}
+	};
+
+	/* QSA/matchesSelector
+	---------------------------------------------------------------------- */
+
+	// QSA and matchesSelector support
+
+	// matchesSelector(:active) reports false when true (IE9/Opera 11.5)
+	rbuggyMatches = [];
+
+	// qSa(:focus) reports false when true (Chrome 21)
+	// We allow this because of a bug in IE8/9 that throws an error
+	// whenever `document.activeElement` is accessed on an iframe
+	// So, we allow :focus to pass through QSA all the time to avoid the IE error
+	// See https://bugs.jquery.com/ticket/13378
+	rbuggyQSA = [];
+
+	if ( (support.qsa = rnative.test( document.querySelectorAll )) ) {
+		// Build QSA regex
+		// Regex strategy adopted from Diego Perini
+		assert(function( el ) {
+			// Select is set to empty string on purpose
+			// This is to test IE's treatment of not explicitly
+			// setting a boolean content attribute,
+			// since its presence should be enough
+			// https://bugs.jquery.com/ticket/12359
+			docElem.appendChild( el ).innerHTML = "" +
+				"";
+
+			// Support: IE8, Opera 11-12.16
+			// Nothing should be selected when empty strings follow ^= or $= or *=
+			// The test attribute must be unknown in Opera but "safe" for WinRT
+			// https://msdn.microsoft.com/en-us/library/ie/hh465388.aspx#attribute_section
+			if ( el.querySelectorAll("[msallowcapture^='']").length ) {
+				rbuggyQSA.push( "[*^$]=" + whitespace + "*(?:''|\"\")" );
+			}
+
+			// Support: IE8
+			// Boolean attributes and "value" are not treated correctly
+			if ( !el.querySelectorAll("[selected]").length ) {
+				rbuggyQSA.push( "\\[" + whitespace + "*(?:value|" + booleans + ")" );
+			}
+
+			// Support: Chrome<29, Android<4.4, Safari<7.0+, iOS<7.0+, PhantomJS<1.9.8+
+			if ( !el.querySelectorAll( "[id~=" + expando + "-]" ).length ) {
+				rbuggyQSA.push("~=");
+			}
+
+			// Webkit/Opera - :checked should return selected option elements
+			// http://www.w3.org/TR/2011/REC-css3-selectors-20110929/#checked
+			// IE8 throws error here and will not see later tests
+			if ( !el.querySelectorAll(":checked").length ) {
+				rbuggyQSA.push(":checked");
+			}
+
+			// Support: Safari 8+, iOS 8+
+			// https://bugs.webkit.org/show_bug.cgi?id=136851
+			// In-page `selector#id sibling-combinator selector` fails
+			if ( !el.querySelectorAll( "a#" + expando + "+*" ).length ) {
+				rbuggyQSA.push(".#.+[+~]");
+			}
+		});
+
+		assert(function( el ) {
+			el.innerHTML = "" +
+				"";
+
+			// Support: Windows 8 Native Apps
+			// The type and name attributes are restricted during .innerHTML assignment
+			var input = document.createElement("input");
+			input.setAttribute( "type", "hidden" );
+			el.appendChild( input ).setAttribute( "name", "D" );
+
+			// Support: IE8
+			// Enforce case-sensitivity of name attribute
+			if ( el.querySelectorAll("[name=d]").length ) {
+				rbuggyQSA.push( "name" + whitespace + "*[*^$|!~]?=" );
+			}
+
+			// FF 3.5 - :enabled/:disabled and hidden elements (hidden elements are still enabled)
+			// IE8 throws error here and will not see later tests
+			if ( el.querySelectorAll(":enabled").length !== 2 ) {
+				rbuggyQSA.push( ":enabled", ":disabled" );
+			}
+
+			// Support: IE9-11+
+			// IE's :disabled selector does not pick up the children of disabled fieldsets
+			docElem.appendChild( el ).disabled = true;
+			if ( el.querySelectorAll(":disabled").length !== 2 ) {
+				rbuggyQSA.push( ":enabled", ":disabled" );
+			}
+
+			// Opera 10-11 does not throw on post-comma invalid pseudos
+			el.querySelectorAll("*,:x");
+			rbuggyQSA.push(",.*:");
+		});
+	}
+
+	if ( (support.matchesSelector = rnative.test( (matches = docElem.matches ||
+		docElem.webkitMatchesSelector ||
+		docElem.mozMatchesSelector ||
+		docElem.oMatchesSelector ||
+		docElem.msMatchesSelector) )) ) {
+
+		assert(function( el ) {
+			// Check to see if it's possible to do matchesSelector
+			// on a disconnected node (IE 9)
+			support.disconnectedMatch = matches.call( el, "*" );
+
+			// This should fail with an exception
+			// Gecko does not error, returns false instead
+			matches.call( el, "[s!='']:x" );
+			rbuggyMatches.push( "!=", pseudos );
+		});
+	}
+
+	rbuggyQSA = rbuggyQSA.length && new RegExp( rbuggyQSA.join("|") );
+	rbuggyMatches = rbuggyMatches.length && new RegExp( rbuggyMatches.join("|") );
+
+	/* Contains
+	---------------------------------------------------------------------- */
+	hasCompare = rnative.test( docElem.compareDocumentPosition );
+
+	// Element contains another
+	// Purposefully self-exclusive
+	// As in, an element does not contain itself
+	contains = hasCompare || rnative.test( docElem.contains ) ?
+		function( a, b ) {
+			var adown = a.nodeType === 9 ? a.documentElement : a,
+				bup = b && b.parentNode;
+			return a === bup || !!( bup && bup.nodeType === 1 && (
+				adown.contains ?
+					adown.contains( bup ) :
+					a.compareDocumentPosition && a.compareDocumentPosition( bup ) & 16
+			));
+		} :
+		function( a, b ) {
+			if ( b ) {
+				while ( (b = b.parentNode) ) {
+					if ( b === a ) {
+						return true;
+					}
+				}
+			}
+			return false;
+		};
+
+	/* Sorting
+	---------------------------------------------------------------------- */
+
+	// Document order sorting
+	sortOrder = hasCompare ?
+	function( a, b ) {
+
+		// Flag for duplicate removal
+		if ( a === b ) {
+			hasDuplicate = true;
+			return 0;
+		}
+
+		// Sort on method existence if only one input has compareDocumentPosition
+		var compare = !a.compareDocumentPosition - !b.compareDocumentPosition;
+		if ( compare ) {
+			return compare;
+		}
+
+		// Calculate position if both inputs belong to the same document
+		compare = ( a.ownerDocument || a ) === ( b.ownerDocument || b ) ?
+			a.compareDocumentPosition( b ) :
+
+			// Otherwise we know they are disconnected
+			1;
+
+		// Disconnected nodes
+		if ( compare & 1 ||
+			(!support.sortDetached && b.compareDocumentPosition( a ) === compare) ) {
+
+			// Choose the first element that is related to our preferred document
+			if ( a === document || a.ownerDocument === preferredDoc && contains(preferredDoc, a) ) {
+				return -1;
+			}
+			if ( b === document || b.ownerDocument === preferredDoc && contains(preferredDoc, b) ) {
+				return 1;
+			}
+
+			// Maintain original order
+			return sortInput ?
+				( indexOf( sortInput, a ) - indexOf( sortInput, b ) ) :
+				0;
+		}
+
+		return compare & 4 ? -1 : 1;
+	} :
+	function( a, b ) {
+		// Exit early if the nodes are identical
+		if ( a === b ) {
+			hasDuplicate = true;
+			return 0;
+		}
+
+		var cur,
+			i = 0,
+			aup = a.parentNode,
+			bup = b.parentNode,
+			ap = [ a ],
+			bp = [ b ];
+
+		// Parentless nodes are either documents or disconnected
+		if ( !aup || !bup ) {
+			return a === document ? -1 :
+				b === document ? 1 :
+				aup ? -1 :
+				bup ? 1 :
+				sortInput ?
+				( indexOf( sortInput, a ) - indexOf( sortInput, b ) ) :
+				0;
+
+		// If the nodes are siblings, we can do a quick check
+		} else if ( aup === bup ) {
+			return siblingCheck( a, b );
+		}
+
+		// Otherwise we need full lists of their ancestors for comparison
+		cur = a;
+		while ( (cur = cur.parentNode) ) {
+			ap.unshift( cur );
+		}
+		cur = b;
+		while ( (cur = cur.parentNode) ) {
+			bp.unshift( cur );
+		}
+
+		// Walk down the tree looking for a discrepancy
+		while ( ap[i] === bp[i] ) {
+			i++;
+		}
+
+		return i ?
+			// Do a sibling check if the nodes have a common ancestor
+			siblingCheck( ap[i], bp[i] ) :
+
+			// Otherwise nodes in our document sort first
+			ap[i] === preferredDoc ? -1 :
+			bp[i] === preferredDoc ? 1 :
+			0;
+	};
+
+	return document;
+};
+
+Sizzle.matches = function( expr, elements ) {
+	return Sizzle( expr, null, null, elements );
+};
+
+Sizzle.matchesSelector = function( elem, expr ) {
+	// Set document vars if needed
+	if ( ( elem.ownerDocument || elem ) !== document ) {
+		setDocument( elem );
+	}
+
+	if ( support.matchesSelector && documentIsHTML &&
+		!nonnativeSelectorCache[ expr + " " ] &&
+		( !rbuggyMatches || !rbuggyMatches.test( expr ) ) &&
+		( !rbuggyQSA     || !rbuggyQSA.test( expr ) ) ) {
+
+		try {
+			var ret = matches.call( elem, expr );
+
+			// IE 9's matchesSelector returns false on disconnected nodes
+			if ( ret || support.disconnectedMatch ||
+					// As well, disconnected nodes are said to be in a document
+					// fragment in IE 9
+					elem.document && elem.document.nodeType !== 11 ) {
+				return ret;
+			}
+		} catch (e) {
+			nonnativeSelectorCache( expr, true );
+		}
+	}
+
+	return Sizzle( expr, document, null, [ elem ] ).length > 0;
+};
+
+Sizzle.contains = function( context, elem ) {
+	// Set document vars if needed
+	if ( ( context.ownerDocument || context ) !== document ) {
+		setDocument( context );
+	}
+	return contains( context, elem );
+};
+
+Sizzle.attr = function( elem, name ) {
+	// Set document vars if needed
+	if ( ( elem.ownerDocument || elem ) !== document ) {
+		setDocument( elem );
+	}
+
+	var fn = Expr.attrHandle[ name.toLowerCase() ],
+		// Don't get fooled by Object.prototype properties (jQuery #13807)
+		val = fn && hasOwn.call( Expr.attrHandle, name.toLowerCase() ) ?
+			fn( elem, name, !documentIsHTML ) :
+			undefined;
+
+	return val !== undefined ?
+		val :
+		support.attributes || !documentIsHTML ?
+			elem.getAttribute( name ) :
+			(val = elem.getAttributeNode(name)) && val.specified ?
+				val.value :
+				null;
+};
+
+Sizzle.escape = function( sel ) {
+	return (sel + "").replace( rcssescape, fcssescape );
+};
+
+Sizzle.error = function( msg ) {
+	throw new Error( "Syntax error, unrecognized expression: " + msg );
+};
+
+/**
+ * Document sorting and removing duplicates
+ * @param {ArrayLike} results
+ */
+Sizzle.uniqueSort = function( results ) {
+	var elem,
+		duplicates = [],
+		j = 0,
+		i = 0;
+
+	// Unless we *know* we can detect duplicates, assume their presence
+	hasDuplicate = !support.detectDuplicates;
+	sortInput = !support.sortStable && results.slice( 0 );
+	results.sort( sortOrder );
+
+	if ( hasDuplicate ) {
+		while ( (elem = results[i++]) ) {
+			if ( elem === results[ i ] ) {
+				j = duplicates.push( i );
+			}
+		}
+		while ( j-- ) {
+			results.splice( duplicates[ j ], 1 );
+		}
+	}
+
+	// Clear input after sorting to release objects
+	// See https://github.com/jquery/sizzle/pull/225
+	sortInput = null;
+
+	return results;
+};
+
+/**
+ * Utility function for retrieving the text value of an array of DOM nodes
+ * @param {Array|Element} elem
+ */
+getText = Sizzle.getText = function( elem ) {
+	var node,
+		ret = "",
+		i = 0,
+		nodeType = elem.nodeType;
+
+	if ( !nodeType ) {
+		// If no nodeType, this is expected to be an array
+		while ( (node = elem[i++]) ) {
+			// Do not traverse comment nodes
+			ret += getText( node );
+		}
+	} else if ( nodeType === 1 || nodeType === 9 || nodeType === 11 ) {
+		// Use textContent for elements
+		// innerText usage removed for consistency of new lines (jQuery #11153)
+		if ( typeof elem.textContent === "string" ) {
+			return elem.textContent;
+		} else {
+			// Traverse its children
+			for ( elem = elem.firstChild; elem; elem = elem.nextSibling ) {
+				ret += getText( elem );
+			}
+		}
+	} else if ( nodeType === 3 || nodeType === 4 ) {
+		return elem.nodeValue;
+	}
+	// Do not include comment or processing instruction nodes
+
+	return ret;
+};
+
+Expr = Sizzle.selectors = {
+
+	// Can be adjusted by the user
+	cacheLength: 50,
+
+	createPseudo: markFunction,
+
+	match: matchExpr,
+
+	attrHandle: {},
+
+	find: {},
+
+	relative: {
+		">": { dir: "parentNode", first: true },
+		" ": { dir: "parentNode" },
+		"+": { dir: "previousSibling", first: true },
+		"~": { dir: "previousSibling" }
+	},
+
+	preFilter: {
+		"ATTR": function( match ) {
+			match[1] = match[1].replace( runescape, funescape );
+
+			// Move the given value to match[3] whether quoted or unquoted
+			match[3] = ( match[3] || match[4] || match[5] || "" ).replace( runescape, funescape );
+
+			if ( match[2] === "~=" ) {
+				match[3] = " " + match[3] + " ";
+			}
+
+			return match.slice( 0, 4 );
+		},
+
+		"CHILD": function( match ) {
+			/* matches from matchExpr["CHILD"]
+				1 type (only|nth|...)
+				2 what (child|of-type)
+				3 argument (even|odd|\d*|\d*n([+-]\d+)?|...)
+				4 xn-component of xn+y argument ([+-]?\d*n|)
+				5 sign of xn-component
+				6 x of xn-component
+				7 sign of y-component
+				8 y of y-component
+			*/
+			match[1] = match[1].toLowerCase();
+
+			if ( match[1].slice( 0, 3 ) === "nth" ) {
+				// nth-* requires argument
+				if ( !match[3] ) {
+					Sizzle.error( match[0] );
+				}
+
+				// numeric x and y parameters for Expr.filter.CHILD
+				// remember that false/true cast respectively to 0/1
+				match[4] = +( match[4] ? match[5] + (match[6] || 1) : 2 * ( match[3] === "even" || match[3] === "odd" ) );
+				match[5] = +( ( match[7] + match[8] ) || match[3] === "odd" );
+
+			// other types prohibit arguments
+			} else if ( match[3] ) {
+				Sizzle.error( match[0] );
+			}
+
+			return match;
+		},
+
+		"PSEUDO": function( match ) {
+			var excess,
+				unquoted = !match[6] && match[2];
+
+			if ( matchExpr["CHILD"].test( match[0] ) ) {
+				return null;
+			}
+
+			// Accept quoted arguments as-is
+			if ( match[3] ) {
+				match[2] = match[4] || match[5] || "";
+
+			// Strip excess characters from unquoted arguments
+			} else if ( unquoted && rpseudo.test( unquoted ) &&
+				// Get excess from tokenize (recursively)
+				(excess = tokenize( unquoted, true )) &&
+				// advance to the next closing parenthesis
+				(excess = unquoted.indexOf( ")", unquoted.length - excess ) - unquoted.length) ) {
+
+				// excess is a negative index
+				match[0] = match[0].slice( 0, excess );
+				match[2] = unquoted.slice( 0, excess );
+			}
+
+			// Return only captures needed by the pseudo filter method (type and argument)
+			return match.slice( 0, 3 );
+		}
+	},
+
+	filter: {
+
+		"TAG": function( nodeNameSelector ) {
+			var nodeName = nodeNameSelector.replace( runescape, funescape ).toLowerCase();
+			return nodeNameSelector === "*" ?
+				function() { return true; } :
+				function( elem ) {
+					return elem.nodeName && elem.nodeName.toLowerCase() === nodeName;
+				};
+		},
+
+		"CLASS": function( className ) {
+			var pattern = classCache[ className + " " ];
+
+			return pattern ||
+				(pattern = new RegExp( "(^|" + whitespace + ")" + className + "(" + whitespace + "|$)" )) &&
+				classCache( className, function( elem ) {
+					return pattern.test( typeof elem.className === "string" && elem.className || typeof elem.getAttribute !== "undefined" && elem.getAttribute("class") || "" );
+				});
+		},
+
+		"ATTR": function( name, operator, check ) {
+			return function( elem ) {
+				var result = Sizzle.attr( elem, name );
+
+				if ( result == null ) {
+					return operator === "!=";
+				}
+				if ( !operator ) {
+					return true;
+				}
+
+				result += "";
+
+				return operator === "=" ? result === check :
+					operator === "!=" ? result !== check :
+					operator === "^=" ? check && result.indexOf( check ) === 0 :
+					operator === "*=" ? check && result.indexOf( check ) > -1 :
+					operator === "$=" ? check && result.slice( -check.length ) === check :
+					operator === "~=" ? ( " " + result.replace( rwhitespace, " " ) + " " ).indexOf( check ) > -1 :
+					operator === "|=" ? result === check || result.slice( 0, check.length + 1 ) === check + "-" :
+					false;
+			};
+		},
+
+		"CHILD": function( type, what, argument, first, last ) {
+			var simple = type.slice( 0, 3 ) !== "nth",
+				forward = type.slice( -4 ) !== "last",
+				ofType = what === "of-type";
+
+			return first === 1 && last === 0 ?
+
+				// Shortcut for :nth-*(n)
+				function( elem ) {
+					return !!elem.parentNode;
+				} :
+
+				function( elem, context, xml ) {
+					var cache, uniqueCache, outerCache, node, nodeIndex, start,
+						dir = simple !== forward ? "nextSibling" : "previousSibling",
+						parent = elem.parentNode,
+						name = ofType && elem.nodeName.toLowerCase(),
+						useCache = !xml && !ofType,
+						diff = false;
+
+					if ( parent ) {
+
+						// :(first|last|only)-(child|of-type)
+						if ( simple ) {
+							while ( dir ) {
+								node = elem;
+								while ( (node = node[ dir ]) ) {
+									if ( ofType ?
+										node.nodeName.toLowerCase() === name :
+										node.nodeType === 1 ) {
+
+										return false;
+									}
+								}
+								// Reverse direction for :only-* (if we haven't yet done so)
+								start = dir = type === "only" && !start && "nextSibling";
+							}
+							return true;
+						}
+
+						start = [ forward ? parent.firstChild : parent.lastChild ];
+
+						// non-xml :nth-child(...) stores cache data on `parent`
+						if ( forward && useCache ) {
+
+							// Seek `elem` from a previously-cached index
+
+							// ...in a gzip-friendly way
+							node = parent;
+							outerCache = node[ expando ] || (node[ expando ] = {});
+
+							// Support: IE <9 only
+							// Defend against cloned attroperties (jQuery gh-1709)
+							uniqueCache = outerCache[ node.uniqueID ] ||
+								(outerCache[ node.uniqueID ] = {});
+
+							cache = uniqueCache[ type ] || [];
+							nodeIndex = cache[ 0 ] === dirruns && cache[ 1 ];
+							diff = nodeIndex && cache[ 2 ];
+							node = nodeIndex && parent.childNodes[ nodeIndex ];
+
+							while ( (node = ++nodeIndex && node && node[ dir ] ||
+
+								// Fallback to seeking `elem` from the start
+								(diff = nodeIndex = 0) || start.pop()) ) {
+
+								// When found, cache indexes on `parent` and break
+								if ( node.nodeType === 1 && ++diff && node === elem ) {
+									uniqueCache[ type ] = [ dirruns, nodeIndex, diff ];
+									break;
+								}
+							}
+
+						} else {
+							// Use previously-cached element index if available
+							if ( useCache ) {
+								// ...in a gzip-friendly way
+								node = elem;
+								outerCache = node[ expando ] || (node[ expando ] = {});
+
+								// Support: IE <9 only
+								// Defend against cloned attroperties (jQuery gh-1709)
+								uniqueCache = outerCache[ node.uniqueID ] ||
+									(outerCache[ node.uniqueID ] = {});
+
+								cache = uniqueCache[ type ] || [];
+								nodeIndex = cache[ 0 ] === dirruns && cache[ 1 ];
+								diff = nodeIndex;
+							}
+
+							// xml :nth-child(...)
+							// or :nth-last-child(...) or :nth(-last)?-of-type(...)
+							if ( diff === false ) {
+								// Use the same loop as above to seek `elem` from the start
+								while ( (node = ++nodeIndex && node && node[ dir ] ||
+									(diff = nodeIndex = 0) || start.pop()) ) {
+
+									if ( ( ofType ?
+										node.nodeName.toLowerCase() === name :
+										node.nodeType === 1 ) &&
+										++diff ) {
+
+										// Cache the index of each encountered element
+										if ( useCache ) {
+											outerCache = node[ expando ] || (node[ expando ] = {});
+
+											// Support: IE <9 only
+											// Defend against cloned attroperties (jQuery gh-1709)
+											uniqueCache = outerCache[ node.uniqueID ] ||
+												(outerCache[ node.uniqueID ] = {});
+
+											uniqueCache[ type ] = [ dirruns, diff ];
+										}
+
+										if ( node === elem ) {
+											break;
+										}
+									}
+								}
+							}
+						}
+
+						// Incorporate the offset, then check against cycle size
+						diff -= last;
+						return diff === first || ( diff % first === 0 && diff / first >= 0 );
+					}
+				};
+		},
+
+		"PSEUDO": function( pseudo, argument ) {
+			// pseudo-class names are case-insensitive
+			// http://www.w3.org/TR/selectors/#pseudo-classes
+			// Prioritize by case sensitivity in case custom pseudos are added with uppercase letters
+			// Remember that setFilters inherits from pseudos
+			var args,
+				fn = Expr.pseudos[ pseudo ] || Expr.setFilters[ pseudo.toLowerCase() ] ||
+					Sizzle.error( "unsupported pseudo: " + pseudo );
+
+			// The user may use createPseudo to indicate that
+			// arguments are needed to create the filter function
+			// just as Sizzle does
+			if ( fn[ expando ] ) {
+				return fn( argument );
+			}
+
+			// But maintain support for old signatures
+			if ( fn.length > 1 ) {
+				args = [ pseudo, pseudo, "", argument ];
+				return Expr.setFilters.hasOwnProperty( pseudo.toLowerCase() ) ?
+					markFunction(function( seed, matches ) {
+						var idx,
+							matched = fn( seed, argument ),
+							i = matched.length;
+						while ( i-- ) {
+							idx = indexOf( seed, matched[i] );
+							seed[ idx ] = !( matches[ idx ] = matched[i] );
+						}
+					}) :
+					function( elem ) {
+						return fn( elem, 0, args );
+					};
+			}
+
+			return fn;
+		}
+	},
+
+	pseudos: {
+		// Potentially complex pseudos
+		"not": markFunction(function( selector ) {
+			// Trim the selector passed to compile
+			// to avoid treating leading and trailing
+			// spaces as combinators
+			var input = [],
+				results = [],
+				matcher = compile( selector.replace( rtrim, "$1" ) );
+
+			return matcher[ expando ] ?
+				markFunction(function( seed, matches, context, xml ) {
+					var elem,
+						unmatched = matcher( seed, null, xml, [] ),
+						i = seed.length;
+
+					// Match elements unmatched by `matcher`
+					while ( i-- ) {
+						if ( (elem = unmatched[i]) ) {
+							seed[i] = !(matches[i] = elem);
+						}
+					}
+				}) :
+				function( elem, context, xml ) {
+					input[0] = elem;
+					matcher( input, null, xml, results );
+					// Don't keep the element (issue #299)
+					input[0] = null;
+					return !results.pop();
+				};
+		}),
+
+		"has": markFunction(function( selector ) {
+			return function( elem ) {
+				return Sizzle( selector, elem ).length > 0;
+			};
+		}),
+
+		"contains": markFunction(function( text ) {
+			text = text.replace( runescape, funescape );
+			return function( elem ) {
+				return ( elem.textContent || getText( elem ) ).indexOf( text ) > -1;
+			};
+		}),
+
+		// "Whether an element is represented by a :lang() selector
+		// is based solely on the element's language value
+		// being equal to the identifier C,
+		// or beginning with the identifier C immediately followed by "-".
+		// The matching of C against the element's language value is performed case-insensitively.
+		// The identifier C does not have to be a valid language name."
+		// http://www.w3.org/TR/selectors/#lang-pseudo
+		"lang": markFunction( function( lang ) {
+			// lang value must be a valid identifier
+			if ( !ridentifier.test(lang || "") ) {
+				Sizzle.error( "unsupported lang: " + lang );
+			}
+			lang = lang.replace( runescape, funescape ).toLowerCase();
+			return function( elem ) {
+				var elemLang;
+				do {
+					if ( (elemLang = documentIsHTML ?
+						elem.lang :
+						elem.getAttribute("xml:lang") || elem.getAttribute("lang")) ) {
+
+						elemLang = elemLang.toLowerCase();
+						return elemLang === lang || elemLang.indexOf( lang + "-" ) === 0;
+					}
+				} while ( (elem = elem.parentNode) && elem.nodeType === 1 );
+				return false;
+			};
+		}),
+
+		// Miscellaneous
+		"target": function( elem ) {
+			var hash = window.location && window.location.hash;
+			return hash && hash.slice( 1 ) === elem.id;
+		},
+
+		"root": function( elem ) {
+			return elem === docElem;
+		},
+
+		"focus": function( elem ) {
+			return elem === document.activeElement && (!document.hasFocus || document.hasFocus()) && !!(elem.type || elem.href || ~elem.tabIndex);
+		},
+
+		// Boolean properties
+		"enabled": createDisabledPseudo( false ),
+		"disabled": createDisabledPseudo( true ),
+
+		"checked": function( elem ) {
+			// In CSS3, :checked should return both checked and selected elements
+			// http://www.w3.org/TR/2011/REC-css3-selectors-20110929/#checked
+			var nodeName = elem.nodeName.toLowerCase();
+			return (nodeName === "input" && !!elem.checked) || (nodeName === "option" && !!elem.selected);
+		},
+
+		"selected": function( elem ) {
+			// Accessing this property makes selected-by-default
+			// options in Safari work properly
+			if ( elem.parentNode ) {
+				elem.parentNode.selectedIndex;
+			}
+
+			return elem.selected === true;
+		},
+
+		// Contents
+		"empty": function( elem ) {
+			// http://www.w3.org/TR/selectors/#empty-pseudo
+			// :empty is negated by element (1) or content nodes (text: 3; cdata: 4; entity ref: 5),
+			//   but not by others (comment: 8; processing instruction: 7; etc.)
+			// nodeType < 6 works because attributes (2) do not appear as children
+			for ( elem = elem.firstChild; elem; elem = elem.nextSibling ) {
+				if ( elem.nodeType < 6 ) {
+					return false;
+				}
+			}
+			return true;
+		},
+
+		"parent": function( elem ) {
+			return !Expr.pseudos["empty"]( elem );
+		},
+
+		// Element/input types
+		"header": function( elem ) {
+			return rheader.test( elem.nodeName );
+		},
+
+		"input": function( elem ) {
+			return rinputs.test( elem.nodeName );
+		},
+
+		"button": function( elem ) {
+			var name = elem.nodeName.toLowerCase();
+			return name === "input" && elem.type === "button" || name === "button";
+		},
+
+		"text": function( elem ) {
+			var attr;
+			return elem.nodeName.toLowerCase() === "input" &&
+				elem.type === "text" &&
+
+				// Support: IE<8
+				// New HTML5 attribute values (e.g., "search") appear with elem.type === "text"
+				( (attr = elem.getAttribute("type")) == null || attr.toLowerCase() === "text" );
+		},
+
+		// Position-in-collection
+		"first": createPositionalPseudo(function() {
+			return [ 0 ];
+		}),
+
+		"last": createPositionalPseudo(function( matchIndexes, length ) {
+			return [ length - 1 ];
+		}),
+
+		"eq": createPositionalPseudo(function( matchIndexes, length, argument ) {
+			return [ argument < 0 ? argument + length : argument ];
+		}),
+
+		"even": createPositionalPseudo(function( matchIndexes, length ) {
+			var i = 0;
+			for ( ; i < length; i += 2 ) {
+				matchIndexes.push( i );
+			}
+			return matchIndexes;
+		}),
+
+		"odd": createPositionalPseudo(function( matchIndexes, length ) {
+			var i = 1;
+			for ( ; i < length; i += 2 ) {
+				matchIndexes.push( i );
+			}
+			return matchIndexes;
+		}),
+
+		"lt": createPositionalPseudo(function( matchIndexes, length, argument ) {
+			var i = argument < 0 ?
+				argument + length :
+				argument > length ?
+					length :
+					argument;
+			for ( ; --i >= 0; ) {
+				matchIndexes.push( i );
+			}
+			return matchIndexes;
+		}),
+
+		"gt": createPositionalPseudo(function( matchIndexes, length, argument ) {
+			var i = argument < 0 ? argument + length : argument;
+			for ( ; ++i < length; ) {
+				matchIndexes.push( i );
+			}
+			return matchIndexes;
+		})
+	}
+};
+
+Expr.pseudos["nth"] = Expr.pseudos["eq"];
+
+// Add button/input type pseudos
+for ( i in { radio: true, checkbox: true, file: true, password: true, image: true } ) {
+	Expr.pseudos[ i ] = createInputPseudo( i );
+}
+for ( i in { submit: true, reset: true } ) {
+	Expr.pseudos[ i ] = createButtonPseudo( i );
+}
+
+// Easy API for creating new setFilters
+function setFilters() {}
+setFilters.prototype = Expr.filters = Expr.pseudos;
+Expr.setFilters = new setFilters();
+
+tokenize = Sizzle.tokenize = function( selector, parseOnly ) {
+	var matched, match, tokens, type,
+		soFar, groups, preFilters,
+		cached = tokenCache[ selector + " " ];
+
+	if ( cached ) {
+		return parseOnly ? 0 : cached.slice( 0 );
+	}
+
+	soFar = selector;
+	groups = [];
+	preFilters = Expr.preFilter;
+
+	while ( soFar ) {
+
+		// Comma and first run
+		if ( !matched || (match = rcomma.exec( soFar )) ) {
+			if ( match ) {
+				// Don't consume trailing commas as valid
+				soFar = soFar.slice( match[0].length ) || soFar;
+			}
+			groups.push( (tokens = []) );
+		}
+
+		matched = false;
+
+		// Combinators
+		if ( (match = rcombinators.exec( soFar )) ) {
+			matched = match.shift();
+			tokens.push({
+				value: matched,
+				// Cast descendant combinators to space
+				type: match[0].replace( rtrim, " " )
+			});
+			soFar = soFar.slice( matched.length );
+		}
+
+		// Filters
+		for ( type in Expr.filter ) {
+			if ( (match = matchExpr[ type ].exec( soFar )) && (!preFilters[ type ] ||
+				(match = preFilters[ type ]( match ))) ) {
+				matched = match.shift();
+				tokens.push({
+					value: matched,
+					type: type,
+					matches: match
+				});
+				soFar = soFar.slice( matched.length );
+			}
+		}
+
+		if ( !matched ) {
+			break;
+		}
+	}
+
+	// Return the length of the invalid excess
+	// if we're just parsing
+	// Otherwise, throw an error or return tokens
+	return parseOnly ?
+		soFar.length :
+		soFar ?
+			Sizzle.error( selector ) :
+			// Cache the tokens
+			tokenCache( selector, groups ).slice( 0 );
+};
+
+function toSelector( tokens ) {
+	var i = 0,
+		len = tokens.length,
+		selector = "";
+	for ( ; i < len; i++ ) {
+		selector += tokens[i].value;
+	}
+	return selector;
+}
+
+function addCombinator( matcher, combinator, base ) {
+	var dir = combinator.dir,
+		skip = combinator.next,
+		key = skip || dir,
+		checkNonElements = base && key === "parentNode",
+		doneName = done++;
+
+	return combinator.first ?
+		// Check against closest ancestor/preceding element
+		function( elem, context, xml ) {
+			while ( (elem = elem[ dir ]) ) {
+				if ( elem.nodeType === 1 || checkNonElements ) {
+					return matcher( elem, context, xml );
+				}
+			}
+			return false;
+		} :
+
+		// Check against all ancestor/preceding elements
+		function( elem, context, xml ) {
+			var oldCache, uniqueCache, outerCache,
+				newCache = [ dirruns, doneName ];
+
+			// We can't set arbitrary data on XML nodes, so they don't benefit from combinator caching
+			if ( xml ) {
+				while ( (elem = elem[ dir ]) ) {
+					if ( elem.nodeType === 1 || checkNonElements ) {
+						if ( matcher( elem, context, xml ) ) {
+							return true;
+						}
+					}
+				}
+			} else {
+				while ( (elem = elem[ dir ]) ) {
+					if ( elem.nodeType === 1 || checkNonElements ) {
+						outerCache = elem[ expando ] || (elem[ expando ] = {});
+
+						// Support: IE <9 only
+						// Defend against cloned attroperties (jQuery gh-1709)
+						uniqueCache = outerCache[ elem.uniqueID ] || (outerCache[ elem.uniqueID ] = {});
+
+						if ( skip && skip === elem.nodeName.toLowerCase() ) {
+							elem = elem[ dir ] || elem;
+						} else if ( (oldCache = uniqueCache[ key ]) &&
+							oldCache[ 0 ] === dirruns && oldCache[ 1 ] === doneName ) {
+
+							// Assign to newCache so results back-propagate to previous elements
+							return (newCache[ 2 ] = oldCache[ 2 ]);
+						} else {
+							// Reuse newcache so results back-propagate to previous elements
+							uniqueCache[ key ] = newCache;
+
+							// A match means we're done; a fail means we have to keep checking
+							if ( (newCache[ 2 ] = matcher( elem, context, xml )) ) {
+								return true;
+							}
+						}
+					}
+				}
+			}
+			return false;
+		};
+}
+
+function elementMatcher( matchers ) {
+	return matchers.length > 1 ?
+		function( elem, context, xml ) {
+			var i = matchers.length;
+			while ( i-- ) {
+				if ( !matchers[i]( elem, context, xml ) ) {
+					return false;
+				}
+			}
+			return true;
+		} :
+		matchers[0];
+}
+
+function multipleContexts( selector, contexts, results ) {
+	var i = 0,
+		len = contexts.length;
+	for ( ; i < len; i++ ) {
+		Sizzle( selector, contexts[i], results );
+	}
+	return results;
+}
+
+function condense( unmatched, map, filter, context, xml ) {
+	var elem,
+		newUnmatched = [],
+		i = 0,
+		len = unmatched.length,
+		mapped = map != null;
+
+	for ( ; i < len; i++ ) {
+		if ( (elem = unmatched[i]) ) {
+			if ( !filter || filter( elem, context, xml ) ) {
+				newUnmatched.push( elem );
+				if ( mapped ) {
+					map.push( i );
+				}
+			}
+		}
+	}
+
+	return newUnmatched;
+}
+
+function setMatcher( preFilter, selector, matcher, postFilter, postFinder, postSelector ) {
+	if ( postFilter && !postFilter[ expando ] ) {
+		postFilter = setMatcher( postFilter );
+	}
+	if ( postFinder && !postFinder[ expando ] ) {
+		postFinder = setMatcher( postFinder, postSelector );
+	}
+	return markFunction(function( seed, results, context, xml ) {
+		var temp, i, elem,
+			preMap = [],
+			postMap = [],
+			preexisting = results.length,
+
+			// Get initial elements from seed or context
+			elems = seed || multipleContexts( selector || "*", context.nodeType ? [ context ] : context, [] ),
+
+			// Prefilter to get matcher input, preserving a map for seed-results synchronization
+			matcherIn = preFilter && ( seed || !selector ) ?
+				condense( elems, preMap, preFilter, context, xml ) :
+				elems,
+
+			matcherOut = matcher ?
+				// If we have a postFinder, or filtered seed, or non-seed postFilter or preexisting results,
+				postFinder || ( seed ? preFilter : preexisting || postFilter ) ?
+
+					// ...intermediate processing is necessary
+					[] :
+
+					// ...otherwise use results directly
+					results :
+				matcherIn;
+
+		// Find primary matches
+		if ( matcher ) {
+			matcher( matcherIn, matcherOut, context, xml );
+		}
+
+		// Apply postFilter
+		if ( postFilter ) {
+			temp = condense( matcherOut, postMap );
+			postFilter( temp, [], context, xml );
+
+			// Un-match failing elements by moving them back to matcherIn
+			i = temp.length;
+			while ( i-- ) {
+				if ( (elem = temp[i]) ) {
+					matcherOut[ postMap[i] ] = !(matcherIn[ postMap[i] ] = elem);
+				}
+			}
+		}
+
+		if ( seed ) {
+			if ( postFinder || preFilter ) {
+				if ( postFinder ) {
+					// Get the final matcherOut by condensing this intermediate into postFinder contexts
+					temp = [];
+					i = matcherOut.length;
+					while ( i-- ) {
+						if ( (elem = matcherOut[i]) ) {
+							// Restore matcherIn since elem is not yet a final match
+							temp.push( (matcherIn[i] = elem) );
+						}
+					}
+					postFinder( null, (matcherOut = []), temp, xml );
+				}
+
+				// Move matched elements from seed to results to keep them synchronized
+				i = matcherOut.length;
+				while ( i-- ) {
+					if ( (elem = matcherOut[i]) &&
+						(temp = postFinder ? indexOf( seed, elem ) : preMap[i]) > -1 ) {
+
+						seed[temp] = !(results[temp] = elem);
+					}
+				}
+			}
+
+		// Add elements to results, through postFinder if defined
+		} else {
+			matcherOut = condense(
+				matcherOut === results ?
+					matcherOut.splice( preexisting, matcherOut.length ) :
+					matcherOut
+			);
+			if ( postFinder ) {
+				postFinder( null, results, matcherOut, xml );
+			} else {
+				push.apply( results, matcherOut );
+			}
+		}
+	});
+}
+
+function matcherFromTokens( tokens ) {
+	var checkContext, matcher, j,
+		len = tokens.length,
+		leadingRelative = Expr.relative[ tokens[0].type ],
+		implicitRelative = leadingRelative || Expr.relative[" "],
+		i = leadingRelative ? 1 : 0,
+
+		// The foundational matcher ensures that elements are reachable from top-level context(s)
+		matchContext = addCombinator( function( elem ) {
+			return elem === checkContext;
+		}, implicitRelative, true ),
+		matchAnyContext = addCombinator( function( elem ) {
+			return indexOf( checkContext, elem ) > -1;
+		}, implicitRelative, true ),
+		matchers = [ function( elem, context, xml ) {
+			var ret = ( !leadingRelative && ( xml || context !== outermostContext ) ) || (
+				(checkContext = context).nodeType ?
+					matchContext( elem, context, xml ) :
+					matchAnyContext( elem, context, xml ) );
+			// Avoid hanging onto element (issue #299)
+			checkContext = null;
+			return ret;
+		} ];
+
+	for ( ; i < len; i++ ) {
+		if ( (matcher = Expr.relative[ tokens[i].type ]) ) {
+			matchers = [ addCombinator(elementMatcher( matchers ), matcher) ];
+		} else {
+			matcher = Expr.filter[ tokens[i].type ].apply( null, tokens[i].matches );
+
+			// Return special upon seeing a positional matcher
+			if ( matcher[ expando ] ) {
+				// Find the next relative operator (if any) for proper handling
+				j = ++i;
+				for ( ; j < len; j++ ) {
+					if ( Expr.relative[ tokens[j].type ] ) {
+						break;
+					}
+				}
+				return setMatcher(
+					i > 1 && elementMatcher( matchers ),
+					i > 1 && toSelector(
+						// If the preceding token was a descendant combinator, insert an implicit any-element `*`
+						tokens.slice( 0, i - 1 ).concat({ value: tokens[ i - 2 ].type === " " ? "*" : "" })
+					).replace( rtrim, "$1" ),
+					matcher,
+					i < j && matcherFromTokens( tokens.slice( i, j ) ),
+					j < len && matcherFromTokens( (tokens = tokens.slice( j )) ),
+					j < len && toSelector( tokens )
+				);
+			}
+			matchers.push( matcher );
+		}
+	}
+
+	return elementMatcher( matchers );
+}
+
+function matcherFromGroupMatchers( elementMatchers, setMatchers ) {
+	var bySet = setMatchers.length > 0,
+		byElement = elementMatchers.length > 0,
+		superMatcher = function( seed, context, xml, results, outermost ) {
+			var elem, j, matcher,
+				matchedCount = 0,
+				i = "0",
+				unmatched = seed && [],
+				setMatched = [],
+				contextBackup = outermostContext,
+				// We must always have either seed elements or outermost context
+				elems = seed || byElement && Expr.find["TAG"]( "*", outermost ),
+				// Use integer dirruns iff this is the outermost matcher
+				dirrunsUnique = (dirruns += contextBackup == null ? 1 : Math.random() || 0.1),
+				len = elems.length;
+
+			if ( outermost ) {
+				outermostContext = context === document || context || outermost;
+			}
+
+			// Add elements passing elementMatchers directly to results
+			// Support: IE<9, Safari
+			// Tolerate NodeList properties (IE: "length"; Safari: ) matching elements by id
+			for ( ; i !== len && (elem = elems[i]) != null; i++ ) {
+				if ( byElement && elem ) {
+					j = 0;
+					if ( !context && elem.ownerDocument !== document ) {
+						setDocument( elem );
+						xml = !documentIsHTML;
+					}
+					while ( (matcher = elementMatchers[j++]) ) {
+						if ( matcher( elem, context || document, xml) ) {
+							results.push( elem );
+							break;
+						}
+					}
+					if ( outermost ) {
+						dirruns = dirrunsUnique;
+					}
+				}
+
+				// Track unmatched elements for set filters
+				if ( bySet ) {
+					// They will have gone through all possible matchers
+					if ( (elem = !matcher && elem) ) {
+						matchedCount--;
+					}
+
+					// Lengthen the array for every element, matched or not
+					if ( seed ) {
+						unmatched.push( elem );
+					}
+				}
+			}
+
+			// `i` is now the count of elements visited above, and adding it to `matchedCount`
+			// makes the latter nonnegative.
+			matchedCount += i;
+
+			// Apply set filters to unmatched elements
+			// NOTE: This can be skipped if there are no unmatched elements (i.e., `matchedCount`
+			// equals `i`), unless we didn't visit _any_ elements in the above loop because we have
+			// no element matchers and no seed.
+			// Incrementing an initially-string "0" `i` allows `i` to remain a string only in that
+			// case, which will result in a "00" `matchedCount` that differs from `i` but is also
+			// numerically zero.
+			if ( bySet && i !== matchedCount ) {
+				j = 0;
+				while ( (matcher = setMatchers[j++]) ) {
+					matcher( unmatched, setMatched, context, xml );
+				}
+
+				if ( seed ) {
+					// Reintegrate element matches to eliminate the need for sorting
+					if ( matchedCount > 0 ) {
+						while ( i-- ) {
+							if ( !(unmatched[i] || setMatched[i]) ) {
+								setMatched[i] = pop.call( results );
+							}
+						}
+					}
+
+					// Discard index placeholder values to get only actual matches
+					setMatched = condense( setMatched );
+				}
+
+				// Add matches to results
+				push.apply( results, setMatched );
+
+				// Seedless set matches succeeding multiple successful matchers stipulate sorting
+				if ( outermost && !seed && setMatched.length > 0 &&
+					( matchedCount + setMatchers.length ) > 1 ) {
+
+					Sizzle.uniqueSort( results );
+				}
+			}
+
+			// Override manipulation of globals by nested matchers
+			if ( outermost ) {
+				dirruns = dirrunsUnique;
+				outermostContext = contextBackup;
+			}
+
+			return unmatched;
+		};
+
+	return bySet ?
+		markFunction( superMatcher ) :
+		superMatcher;
+}
+
+compile = Sizzle.compile = function( selector, match /* Internal Use Only */ ) {
+	var i,
+		setMatchers = [],
+		elementMatchers = [],
+		cached = compilerCache[ selector + " " ];
+
+	if ( !cached ) {
+		// Generate a function of recursive functions that can be used to check each element
+		if ( !match ) {
+			match = tokenize( selector );
+		}
+		i = match.length;
+		while ( i-- ) {
+			cached = matcherFromTokens( match[i] );
+			if ( cached[ expando ] ) {
+				setMatchers.push( cached );
+			} else {
+				elementMatchers.push( cached );
+			}
+		}
+
+		// Cache the compiled function
+		cached = compilerCache( selector, matcherFromGroupMatchers( elementMatchers, setMatchers ) );
+
+		// Save selector and tokenization
+		cached.selector = selector;
+	}
+	return cached;
+};
+
+/**
+ * A low-level selection function that works with Sizzle's compiled
+ *  selector functions
+ * @param {String|Function} selector A selector or a pre-compiled
+ *  selector function built with Sizzle.compile
+ * @param {Element} context
+ * @param {Array} [results]
+ * @param {Array} [seed] A set of elements to match against
+ */
+select = Sizzle.select = function( selector, context, results, seed ) {
+	var i, tokens, token, type, find,
+		compiled = typeof selector === "function" && selector,
+		match = !seed && tokenize( (selector = compiled.selector || selector) );
+
+	results = results || [];
+
+	// Try to minimize operations if there is only one selector in the list and no seed
+	// (the latter of which guarantees us context)
+	if ( match.length === 1 ) {
+
+		// Reduce context if the leading compound selector is an ID
+		tokens = match[0] = match[0].slice( 0 );
+		if ( tokens.length > 2 && (token = tokens[0]).type === "ID" &&
+				context.nodeType === 9 && documentIsHTML && Expr.relative[ tokens[1].type ] ) {
+
+			context = ( Expr.find["ID"]( token.matches[0].replace(runescape, funescape), context ) || [] )[0];
+			if ( !context ) {
+				return results;
+
+			// Precompiled matchers will still verify ancestry, so step up a level
+			} else if ( compiled ) {
+				context = context.parentNode;
+			}
+
+			selector = selector.slice( tokens.shift().value.length );
+		}
+
+		// Fetch a seed set for right-to-left matching
+		i = matchExpr["needsContext"].test( selector ) ? 0 : tokens.length;
+		while ( i-- ) {
+			token = tokens[i];
+
+			// Abort if we hit a combinator
+			if ( Expr.relative[ (type = token.type) ] ) {
+				break;
+			}
+			if ( (find = Expr.find[ type ]) ) {
+				// Search, expanding context for leading sibling combinators
+				if ( (seed = find(
+					token.matches[0].replace( runescape, funescape ),
+					rsibling.test( tokens[0].type ) && testContext( context.parentNode ) || context
+				)) ) {
+
+					// If seed is empty or no tokens remain, we can return early
+					tokens.splice( i, 1 );
+					selector = seed.length && toSelector( tokens );
+					if ( !selector ) {
+						push.apply( results, seed );
+						return results;
+					}
+
+					break;
+				}
+			}
+		}
+	}
+
+	// Compile and execute a filtering function if one is not provided
+	// Provide `match` to avoid retokenization if we modified the selector above
+	( compiled || compile( selector, match ) )(
+		seed,
+		context,
+		!documentIsHTML,
+		results,
+		!context || rsibling.test( selector ) && testContext( context.parentNode ) || context
+	);
+	return results;
+};
+
+// One-time assignments
+
+// Sort stability
+support.sortStable = expando.split("").sort( sortOrder ).join("") === expando;
+
+// Support: Chrome 14-35+
+// Always assume duplicates if they aren't passed to the comparison function
+support.detectDuplicates = !!hasDuplicate;
+
+// Initialize against the default document
+setDocument();
+
+// Support: Webkit<537.32 - Safari 6.0.3/Chrome 25 (fixed in Chrome 27)
+// Detached nodes confoundingly follow *each other*
+support.sortDetached = assert(function( el ) {
+	// Should return 1, but returns 4 (following)
+	return el.compareDocumentPosition( document.createElement("fieldset") ) & 1;
+});
+
+// Support: IE<8
+// Prevent attribute/property "interpolation"
+// https://msdn.microsoft.com/en-us/library/ms536429%28VS.85%29.aspx
+if ( !assert(function( el ) {
+	el.innerHTML = "";
+	return el.firstChild.getAttribute("href") === "#" ;
+}) ) {
+	addHandle( "type|href|height|width", function( elem, name, isXML ) {
+		if ( !isXML ) {
+			return elem.getAttribute( name, name.toLowerCase() === "type" ? 1 : 2 );
+		}
+	});
+}
+
+// Support: IE<9
+// Use defaultValue in place of getAttribute("value")
+if ( !support.attributes || !assert(function( el ) {
+	el.innerHTML = "";
+	el.firstChild.setAttribute( "value", "" );
+	return el.firstChild.getAttribute( "value" ) === "";
+}) ) {
+	addHandle( "value", function( elem, name, isXML ) {
+		if ( !isXML && elem.nodeName.toLowerCase() === "input" ) {
+			return elem.defaultValue;
+		}
+	});
+}
+
+// Support: IE<9
+// Use getAttributeNode to fetch booleans when getAttribute lies
+if ( !assert(function( el ) {
+	return el.getAttribute("disabled") == null;
+}) ) {
+	addHandle( booleans, function( elem, name, isXML ) {
+		var val;
+		if ( !isXML ) {
+			return elem[ name ] === true ? name.toLowerCase() :
+					(val = elem.getAttributeNode( name )) && val.specified ?
+					val.value :
+				null;
+		}
+	});
+}
+
+return Sizzle;
+
+})( window );
+
+
+
+jQuery.find = Sizzle;
+jQuery.expr = Sizzle.selectors;
+
+// Deprecated
+jQuery.expr[ ":" ] = jQuery.expr.pseudos;
+jQuery.uniqueSort = jQuery.unique = Sizzle.uniqueSort;
+jQuery.text = Sizzle.getText;
+jQuery.isXMLDoc = Sizzle.isXML;
+jQuery.contains = Sizzle.contains;
+jQuery.escapeSelector = Sizzle.escape;
+
+
+
+
+var dir = function( elem, dir, until ) {
+	var matched = [],
+		truncate = until !== undefined;
+
+	while ( ( elem = elem[ dir ] ) && elem.nodeType !== 9 ) {
+		if ( elem.nodeType === 1 ) {
+			if ( truncate && jQuery( elem ).is( until ) ) {
+				break;
+			}
+			matched.push( elem );
+		}
+	}
+	return matched;
+};
+
+
+var siblings = function( n, elem ) {
+	var matched = [];
+
+	for ( ; n; n = n.nextSibling ) {
+		if ( n.nodeType === 1 && n !== elem ) {
+			matched.push( n );
+		}
+	}
+
+	return matched;
+};
+
+
+var rneedsContext = jQuery.expr.match.needsContext;
+
+
+
+function nodeName( elem, name ) {
+
+  return elem.nodeName && elem.nodeName.toLowerCase() === name.toLowerCase();
+
+};
+var rsingleTag = ( /^<([a-z][^\/\0>:\x20\t\r\n\f]*)[\x20\t\r\n\f]*\/?>(?:<\/\1>|)$/i );
+
+
+
+// Implement the identical functionality for filter and not
+function winnow( elements, qualifier, not ) {
+	if ( isFunction( qualifier ) ) {
+		return jQuery.grep( elements, function( elem, i ) {
+			return !!qualifier.call( elem, i, elem ) !== not;
+		} );
+	}
+
+	// Single element
+	if ( qualifier.nodeType ) {
+		return jQuery.grep( elements, function( elem ) {
+			return ( elem === qualifier ) !== not;
+		} );
+	}
+
+	// Arraylike of elements (jQuery, arguments, Array)
+	if ( typeof qualifier !== "string" ) {
+		return jQuery.grep( elements, function( elem ) {
+			return ( indexOf.call( qualifier, elem ) > -1 ) !== not;
+		} );
+	}
+
+	// Filtered directly for both simple and complex selectors
+	return jQuery.filter( qualifier, elements, not );
+}
+
+jQuery.filter = function( expr, elems, not ) {
+	var elem = elems[ 0 ];
+
+	if ( not ) {
+		expr = ":not(" + expr + ")";
+	}
+
+	if ( elems.length === 1 && elem.nodeType === 1 ) {
+		return jQuery.find.matchesSelector( elem, expr ) ? [ elem ] : [];
+	}
+
+	return jQuery.find.matches( expr, jQuery.grep( elems, function( elem ) {
+		return elem.nodeType === 1;
+	} ) );
+};
+
+jQuery.fn.extend( {
+	find: function( selector ) {
+		var i, ret,
+			len = this.length,
+			self = this;
+
+		if ( typeof selector !== "string" ) {
+			return this.pushStack( jQuery( selector ).filter( function() {
+				for ( i = 0; i < len; i++ ) {
+					if ( jQuery.contains( self[ i ], this ) ) {
+						return true;
+					}
+				}
+			} ) );
+		}
+
+		ret = this.pushStack( [] );
+
+		for ( i = 0; i < len; i++ ) {
+			jQuery.find( selector, self[ i ], ret );
+		}
+
+		return len > 1 ? jQuery.uniqueSort( ret ) : ret;
+	},
+	filter: function( selector ) {
+		return this.pushStack( winnow( this, selector || [], false ) );
+	},
+	not: function( selector ) {
+		return this.pushStack( winnow( this, selector || [], true ) );
+	},
+	is: function( selector ) {
+		return !!winnow(
+			this,
+
+			// If this is a positional/relative selector, check membership in the returned set
+			// so $("p:first").is("p:last") won't return true for a doc with two "p".
+			typeof selector === "string" && rneedsContext.test( selector ) ?
+				jQuery( selector ) :
+				selector || [],
+			false
+		).length;
+	}
+} );
+
+
+// Initialize a jQuery object
+
+
+// A central reference to the root jQuery(document)
+var rootjQuery,
+
+	// A simple way to check for HTML strings
+	// Prioritize #id over  to avoid XSS via location.hash (#9521)
+	// Strict HTML recognition (#11290: must start with <)
+	// Shortcut simple #id case for speed
+	rquickExpr = /^(?:\s*(<[\w\W]+>)[^>]*|#([\w-]+))$/,
+
+	init = jQuery.fn.init = function( selector, context, root ) {
+		var match, elem;
+
+		// HANDLE: $(""), $(null), $(undefined), $(false)
+		if ( !selector ) {
+			return this;
+		}
+
+		// Method init() accepts an alternate rootjQuery
+		// so migrate can support jQuery.sub (gh-2101)
+		root = root || rootjQuery;
+
+		// Handle HTML strings
+		if ( typeof selector === "string" ) {
+			if ( selector[ 0 ] === "<" &&
+				selector[ selector.length - 1 ] === ">" &&
+				selector.length >= 3 ) {
+
+				// Assume that strings that start and end with <> are HTML and skip the regex check
+				match = [ null, selector, null ];
+
+			} else {
+				match = rquickExpr.exec( selector );
+			}
+
+			// Match html or make sure no context is specified for #id
+			if ( match && ( match[ 1 ] || !context ) ) {
+
+				// HANDLE: $(html) -> $(array)
+				if ( match[ 1 ] ) {
+					context = context instanceof jQuery ? context[ 0 ] : context;
+
+					// Option to run scripts is true for back-compat
+					// Intentionally let the error be thrown if parseHTML is not present
+					jQuery.merge( this, jQuery.parseHTML(
+						match[ 1 ],
+						context && context.nodeType ? context.ownerDocument || context : document,
+						true
+					) );
+
+					// HANDLE: $(html, props)
+					if ( rsingleTag.test( match[ 1 ] ) && jQuery.isPlainObject( context ) ) {
+						for ( match in context ) {
+
+							// Properties of context are called as methods if possible
+							if ( isFunction( this[ match ] ) ) {
+								this[ match ]( context[ match ] );
+
+							// ...and otherwise set as attributes
+							} else {
+								this.attr( match, context[ match ] );
+							}
+						}
+					}
+
+					return this;
+
+				// HANDLE: $(#id)
+				} else {
+					elem = document.getElementById( match[ 2 ] );
+
+					if ( elem ) {
+
+						// Inject the element directly into the jQuery object
+						this[ 0 ] = elem;
+						this.length = 1;
+					}
+					return this;
+				}
+
+			// HANDLE: $(expr, $(...))
+			} else if ( !context || context.jquery ) {
+				return ( context || root ).find( selector );
+
+			// HANDLE: $(expr, context)
+			// (which is just equivalent to: $(context).find(expr)
+			} else {
+				return this.constructor( context ).find( selector );
+			}
+
+		// HANDLE: $(DOMElement)
+		} else if ( selector.nodeType ) {
+			this[ 0 ] = selector;
+			this.length = 1;
+			return this;
+
+		// HANDLE: $(function)
+		// Shortcut for document ready
+		} else if ( isFunction( selector ) ) {
+			return root.ready !== undefined ?
+				root.ready( selector ) :
+
+				// Execute immediately if ready is not present
+				selector( jQuery );
+		}
+
+		return jQuery.makeArray( selector, this );
+	};
+
+// Give the init function the jQuery prototype for later instantiation
+init.prototype = jQuery.fn;
+
+// Initialize central reference
+rootjQuery = jQuery( document );
+
+
+var rparentsprev = /^(?:parents|prev(?:Until|All))/,
+
+	// Methods guaranteed to produce a unique set when starting from a unique set
+	guaranteedUnique = {
+		children: true,
+		contents: true,
+		next: true,
+		prev: true
+	};
+
+jQuery.fn.extend( {
+	has: function( target ) {
+		var targets = jQuery( target, this ),
+			l = targets.length;
+
+		return this.filter( function() {
+			var i = 0;
+			for ( ; i < l; i++ ) {
+				if ( jQuery.contains( this, targets[ i ] ) ) {
+					return true;
+				}
+			}
+		} );
+	},
+
+	closest: function( selectors, context ) {
+		var cur,
+			i = 0,
+			l = this.length,
+			matched = [],
+			targets = typeof selectors !== "string" && jQuery( selectors );
+
+		// Positional selectors never match, since there's no _selection_ context
+		if ( !rneedsContext.test( selectors ) ) {
+			for ( ; i < l; i++ ) {
+				for ( cur = this[ i ]; cur && cur !== context; cur = cur.parentNode ) {
+
+					// Always skip document fragments
+					if ( cur.nodeType < 11 && ( targets ?
+						targets.index( cur ) > -1 :
+
+						// Don't pass non-elements to Sizzle
+						cur.nodeType === 1 &&
+							jQuery.find.matchesSelector( cur, selectors ) ) ) {
+
+						matched.push( cur );
+						break;
+					}
+				}
+			}
+		}
+
+		return this.pushStack( matched.length > 1 ? jQuery.uniqueSort( matched ) : matched );
+	},
+
+	// Determine the position of an element within the set
+	index: function( elem ) {
+
+		// No argument, return index in parent
+		if ( !elem ) {
+			return ( this[ 0 ] && this[ 0 ].parentNode ) ? this.first().prevAll().length : -1;
+		}
+
+		// Index in selector
+		if ( typeof elem === "string" ) {
+			return indexOf.call( jQuery( elem ), this[ 0 ] );
+		}
+
+		// Locate the position of the desired element
+		return indexOf.call( this,
+
+			// If it receives a jQuery object, the first element is used
+			elem.jquery ? elem[ 0 ] : elem
+		);
+	},
+
+	add: function( selector, context ) {
+		return this.pushStack(
+			jQuery.uniqueSort(
+				jQuery.merge( this.get(), jQuery( selector, context ) )
+			)
+		);
+	},
+
+	addBack: function( selector ) {
+		return this.add( selector == null ?
+			this.prevObject : this.prevObject.filter( selector )
+		);
+	}
+} );
+
+function sibling( cur, dir ) {
+	while ( ( cur = cur[ dir ] ) && cur.nodeType !== 1 ) {}
+	return cur;
+}
+
+jQuery.each( {
+	parent: function( elem ) {
+		var parent = elem.parentNode;
+		return parent && parent.nodeType !== 11 ? parent : null;
+	},
+	parents: function( elem ) {
+		return dir( elem, "parentNode" );
+	},
+	parentsUntil: function( elem, i, until ) {
+		return dir( elem, "parentNode", until );
+	},
+	next: function( elem ) {
+		return sibling( elem, "nextSibling" );
+	},
+	prev: function( elem ) {
+		return sibling( elem, "previousSibling" );
+	},
+	nextAll: function( elem ) {
+		return dir( elem, "nextSibling" );
+	},
+	prevAll: function( elem ) {
+		return dir( elem, "previousSibling" );
+	},
+	nextUntil: function( elem, i, until ) {
+		return dir( elem, "nextSibling", until );
+	},
+	prevUntil: function( elem, i, until ) {
+		return dir( elem, "previousSibling", until );
+	},
+	siblings: function( elem ) {
+		return siblings( ( elem.parentNode || {} ).firstChild, elem );
+	},
+	children: function( elem ) {
+		return siblings( elem.firstChild );
+	},
+	contents: function( elem ) {
+		if ( typeof elem.contentDocument !== "undefined" ) {
+			return elem.contentDocument;
+		}
+
+		// Support: IE 9 - 11 only, iOS 7 only, Android Browser <=4.3 only
+		// Treat the template element as a regular one in browsers that
+		// don't support it.
+		if ( nodeName( elem, "template" ) ) {
+			elem = elem.content || elem;
+		}
+
+		return jQuery.merge( [], elem.childNodes );
+	}
+}, function( name, fn ) {
+	jQuery.fn[ name ] = function( until, selector ) {
+		var matched = jQuery.map( this, fn, until );
+
+		if ( name.slice( -5 ) !== "Until" ) {
+			selector = until;
+		}
+
+		if ( selector && typeof selector === "string" ) {
+			matched = jQuery.filter( selector, matched );
+		}
+
+		if ( this.length > 1 ) {
+
+			// Remove duplicates
+			if ( !guaranteedUnique[ name ] ) {
+				jQuery.uniqueSort( matched );
+			}
+
+			// Reverse order for parents* and prev-derivatives
+			if ( rparentsprev.test( name ) ) {
+				matched.reverse();
+			}
+		}
+
+		return this.pushStack( matched );
+	};
+} );
+var rnothtmlwhite = ( /[^\x20\t\r\n\f]+/g );
+
+
+
+// Convert String-formatted options into Object-formatted ones
+function createOptions( options ) {
+	var object = {};
+	jQuery.each( options.match( rnothtmlwhite ) || [], function( _, flag ) {
+		object[ flag ] = true;
+	} );
+	return object;
+}
+
+/*
+ * Create a callback list using the following parameters:
+ *
+ *	options: an optional list of space-separated options that will change how
+ *			the callback list behaves or a more traditional option object
+ *
+ * By default a callback list will act like an event callback list and can be
+ * "fired" multiple times.
+ *
+ * Possible options:
+ *
+ *	once:			will ensure the callback list can only be fired once (like a Deferred)
+ *
+ *	memory:			will keep track of previous values and will call any callback added
+ *					after the list has been fired right away with the latest "memorized"
+ *					values (like a Deferred)
+ *
+ *	unique:			will ensure a callback can only be added once (no duplicate in the list)
+ *
+ *	stopOnFalse:	interrupt callings when a callback returns false
+ *
+ */
+jQuery.Callbacks = function( options ) {
+
+	// Convert options from String-formatted to Object-formatted if needed
+	// (we check in cache first)
+	options = typeof options === "string" ?
+		createOptions( options ) :
+		jQuery.extend( {}, options );
+
+	var // Flag to know if list is currently firing
+		firing,
+
+		// Last fire value for non-forgettable lists
+		memory,
+
+		// Flag to know if list was already fired
+		fired,
+
+		// Flag to prevent firing
+		locked,
+
+		// Actual callback list
+		list = [],
+
+		// Queue of execution data for repeatable lists
+		queue = [],
+
+		// Index of currently firing callback (modified by add/remove as needed)
+		firingIndex = -1,
+
+		// Fire callbacks
+		fire = function() {
+
+			// Enforce single-firing
+			locked = locked || options.once;
+
+			// Execute callbacks for all pending executions,
+			// respecting firingIndex overrides and runtime changes
+			fired = firing = true;
+			for ( ; queue.length; firingIndex = -1 ) {
+				memory = queue.shift();
+				while ( ++firingIndex < list.length ) {
+
+					// Run callback and check for early termination
+					if ( list[ firingIndex ].apply( memory[ 0 ], memory[ 1 ] ) === false &&
+						options.stopOnFalse ) {
+
+						// Jump to end and forget the data so .add doesn't re-fire
+						firingIndex = list.length;
+						memory = false;
+					}
+				}
+			}
+
+			// Forget the data if we're done with it
+			if ( !options.memory ) {
+				memory = false;
+			}
+
+			firing = false;
+
+			// Clean up if we're done firing for good
+			if ( locked ) {
+
+				// Keep an empty list if we have data for future add calls
+				if ( memory ) {
+					list = [];
+
+				// Otherwise, this object is spent
+				} else {
+					list = "";
+				}
+			}
+		},
+
+		// Actual Callbacks object
+		self = {
+
+			// Add a callback or a collection of callbacks to the list
+			add: function() {
+				if ( list ) {
+
+					// If we have memory from a past run, we should fire after adding
+					if ( memory && !firing ) {
+						firingIndex = list.length - 1;
+						queue.push( memory );
+					}
+
+					( function add( args ) {
+						jQuery.each( args, function( _, arg ) {
+							if ( isFunction( arg ) ) {
+								if ( !options.unique || !self.has( arg ) ) {
+									list.push( arg );
+								}
+							} else if ( arg && arg.length && toType( arg ) !== "string" ) {
+
+								// Inspect recursively
+								add( arg );
+							}
+						} );
+					} )( arguments );
+
+					if ( memory && !firing ) {
+						fire();
+					}
+				}
+				return this;
+			},
+
+			// Remove a callback from the list
+			remove: function() {
+				jQuery.each( arguments, function( _, arg ) {
+					var index;
+					while ( ( index = jQuery.inArray( arg, list, index ) ) > -1 ) {
+						list.splice( index, 1 );
+
+						// Handle firing indexes
+						if ( index <= firingIndex ) {
+							firingIndex--;
+						}
+					}
+				} );
+				return this;
+			},
+
+			// Check if a given callback is in the list.
+			// If no argument is given, return whether or not list has callbacks attached.
+			has: function( fn ) {
+				return fn ?
+					jQuery.inArray( fn, list ) > -1 :
+					list.length > 0;
+			},
+
+			// Remove all callbacks from the list
+			empty: function() {
+				if ( list ) {
+					list = [];
+				}
+				return this;
+			},
+
+			// Disable .fire and .add
+			// Abort any current/pending executions
+			// Clear all callbacks and values
+			disable: function() {
+				locked = queue = [];
+				list = memory = "";
+				return this;
+			},
+			disabled: function() {
+				return !list;
+			},
+
+			// Disable .fire
+			// Also disable .add unless we have memory (since it would have no effect)
+			// Abort any pending executions
+			lock: function() {
+				locked = queue = [];
+				if ( !memory && !firing ) {
+					list = memory = "";
+				}
+				return this;
+			},
+			locked: function() {
+				return !!locked;
+			},
+
+			// Call all callbacks with the given context and arguments
+			fireWith: function( context, args ) {
+				if ( !locked ) {
+					args = args || [];
+					args = [ context, args.slice ? args.slice() : args ];
+					queue.push( args );
+					if ( !firing ) {
+						fire();
+					}
+				}
+				return this;
+			},
+
+			// Call all the callbacks with the given arguments
+			fire: function() {
+				self.fireWith( this, arguments );
+				return this;
+			},
+
+			// To know if the callbacks have already been called at least once
+			fired: function() {
+				return !!fired;
+			}
+		};
+
+	return self;
+};
+
+
+function Identity( v ) {
+	return v;
+}
+function Thrower( ex ) {
+	throw ex;
+}
+
+function adoptValue( value, resolve, reject, noValue ) {
+	var method;
+
+	try {
+
+		// Check for promise aspect first to privilege synchronous behavior
+		if ( value && isFunction( ( method = value.promise ) ) ) {
+			method.call( value ).done( resolve ).fail( reject );
+
+		// Other thenables
+		} else if ( value && isFunction( ( method = value.then ) ) ) {
+			method.call( value, resolve, reject );
+
+		// Other non-thenables
+		} else {
+
+			// Control `resolve` arguments by letting Array#slice cast boolean `noValue` to integer:
+			// * false: [ value ].slice( 0 ) => resolve( value )
+			// * true: [ value ].slice( 1 ) => resolve()
+			resolve.apply( undefined, [ value ].slice( noValue ) );
+		}
+
+	// For Promises/A+, convert exceptions into rejections
+	// Since jQuery.when doesn't unwrap thenables, we can skip the extra checks appearing in
+	// Deferred#then to conditionally suppress rejection.
+	} catch ( value ) {
+
+		// Support: Android 4.0 only
+		// Strict mode functions invoked without .call/.apply get global-object context
+		reject.apply( undefined, [ value ] );
+	}
+}
+
+jQuery.extend( {
+
+	Deferred: function( func ) {
+		var tuples = [
+
+				// action, add listener, callbacks,
+				// ... .then handlers, argument index, [final state]
+				[ "notify", "progress", jQuery.Callbacks( "memory" ),
+					jQuery.Callbacks( "memory" ), 2 ],
+				[ "resolve", "done", jQuery.Callbacks( "once memory" ),
+					jQuery.Callbacks( "once memory" ), 0, "resolved" ],
+				[ "reject", "fail", jQuery.Callbacks( "once memory" ),
+					jQuery.Callbacks( "once memory" ), 1, "rejected" ]
+			],
+			state = "pending",
+			promise = {
+				state: function() {
+					return state;
+				},
+				always: function() {
+					deferred.done( arguments ).fail( arguments );
+					return this;
+				},
+				"catch": function( fn ) {
+					return promise.then( null, fn );
+				},
+
+				// Keep pipe for back-compat
+				pipe: function( /* fnDone, fnFail, fnProgress */ ) {
+					var fns = arguments;
+
+					return jQuery.Deferred( function( newDefer ) {
+						jQuery.each( tuples, function( i, tuple ) {
+
+							// Map tuples (progress, done, fail) to arguments (done, fail, progress)
+							var fn = isFunction( fns[ tuple[ 4 ] ] ) && fns[ tuple[ 4 ] ];
+
+							// deferred.progress(function() { bind to newDefer or newDefer.notify })
+							// deferred.done(function() { bind to newDefer or newDefer.resolve })
+							// deferred.fail(function() { bind to newDefer or newDefer.reject })
+							deferred[ tuple[ 1 ] ]( function() {
+								var returned = fn && fn.apply( this, arguments );
+								if ( returned && isFunction( returned.promise ) ) {
+									returned.promise()
+										.progress( newDefer.notify )
+										.done( newDefer.resolve )
+										.fail( newDefer.reject );
+								} else {
+									newDefer[ tuple[ 0 ] + "With" ](
+										this,
+										fn ? [ returned ] : arguments
+									);
+								}
+							} );
+						} );
+						fns = null;
+					} ).promise();
+				},
+				then: function( onFulfilled, onRejected, onProgress ) {
+					var maxDepth = 0;
+					function resolve( depth, deferred, handler, special ) {
+						return function() {
+							var that = this,
+								args = arguments,
+								mightThrow = function() {
+									var returned, then;
+
+									// Support: Promises/A+ section 2.3.3.3.3
+									// https://promisesaplus.com/#point-59
+									// Ignore double-resolution attempts
+									if ( depth < maxDepth ) {
+										return;
+									}
+
+									returned = handler.apply( that, args );
+
+									// Support: Promises/A+ section 2.3.1
+									// https://promisesaplus.com/#point-48
+									if ( returned === deferred.promise() ) {
+										throw new TypeError( "Thenable self-resolution" );
+									}
+
+									// Support: Promises/A+ sections 2.3.3.1, 3.5
+									// https://promisesaplus.com/#point-54
+									// https://promisesaplus.com/#point-75
+									// Retrieve `then` only once
+									then = returned &&
+
+										// Support: Promises/A+ section 2.3.4
+										// https://promisesaplus.com/#point-64
+										// Only check objects and functions for thenability
+										( typeof returned === "object" ||
+											typeof returned === "function" ) &&
+										returned.then;
+
+									// Handle a returned thenable
+									if ( isFunction( then ) ) {
+
+										// Special processors (notify) just wait for resolution
+										if ( special ) {
+											then.call(
+												returned,
+												resolve( maxDepth, deferred, Identity, special ),
+												resolve( maxDepth, deferred, Thrower, special )
+											);
+
+										// Normal processors (resolve) also hook into progress
+										} else {
+
+											// ...and disregard older resolution values
+											maxDepth++;
+
+											then.call(
+												returned,
+												resolve( maxDepth, deferred, Identity, special ),
+												resolve( maxDepth, deferred, Thrower, special ),
+												resolve( maxDepth, deferred, Identity,
+													deferred.notifyWith )
+											);
+										}
+
+									// Handle all other returned values
+									} else {
+
+										// Only substitute handlers pass on context
+										// and multiple values (non-spec behavior)
+										if ( handler !== Identity ) {
+											that = undefined;
+											args = [ returned ];
+										}
+
+										// Process the value(s)
+										// Default process is resolve
+										( special || deferred.resolveWith )( that, args );
+									}
+								},
+
+								// Only normal processors (resolve) catch and reject exceptions
+								process = special ?
+									mightThrow :
+									function() {
+										try {
+											mightThrow();
+										} catch ( e ) {
+
+											if ( jQuery.Deferred.exceptionHook ) {
+												jQuery.Deferred.exceptionHook( e,
+													process.stackTrace );
+											}
+
+											// Support: Promises/A+ section 2.3.3.3.4.1
+											// https://promisesaplus.com/#point-61
+											// Ignore post-resolution exceptions
+											if ( depth + 1 >= maxDepth ) {
+
+												// Only substitute handlers pass on context
+												// and multiple values (non-spec behavior)
+												if ( handler !== Thrower ) {
+													that = undefined;
+													args = [ e ];
+												}
+
+												deferred.rejectWith( that, args );
+											}
+										}
+									};
+
+							// Support: Promises/A+ section 2.3.3.3.1
+							// https://promisesaplus.com/#point-57
+							// Re-resolve promises immediately to dodge false rejection from
+							// subsequent errors
+							if ( depth ) {
+								process();
+							} else {
+
+								// Call an optional hook to record the stack, in case of exception
+								// since it's otherwise lost when execution goes async
+								if ( jQuery.Deferred.getStackHook ) {
+									process.stackTrace = jQuery.Deferred.getStackHook();
+								}
+								window.setTimeout( process );
+							}
+						};
+					}
+
+					return jQuery.Deferred( function( newDefer ) {
+
+						// progress_handlers.add( ... )
+						tuples[ 0 ][ 3 ].add(
+							resolve(
+								0,
+								newDefer,
+								isFunction( onProgress ) ?
+									onProgress :
+									Identity,
+								newDefer.notifyWith
+							)
+						);
+
+						// fulfilled_handlers.add( ... )
+						tuples[ 1 ][ 3 ].add(
+							resolve(
+								0,
+								newDefer,
+								isFunction( onFulfilled ) ?
+									onFulfilled :
+									Identity
+							)
+						);
+
+						// rejected_handlers.add( ... )
+						tuples[ 2 ][ 3 ].add(
+							resolve(
+								0,
+								newDefer,
+								isFunction( onRejected ) ?
+									onRejected :
+									Thrower
+							)
+						);
+					} ).promise();
+				},
+
+				// Get a promise for this deferred
+				// If obj is provided, the promise aspect is added to the object
+				promise: function( obj ) {
+					return obj != null ? jQuery.extend( obj, promise ) : promise;
+				}
+			},
+			deferred = {};
+
+		// Add list-specific methods
+		jQuery.each( tuples, function( i, tuple ) {
+			var list = tuple[ 2 ],
+				stateString = tuple[ 5 ];
+
+			// promise.progress = list.add
+			// promise.done = list.add
+			// promise.fail = list.add
+			promise[ tuple[ 1 ] ] = list.add;
+
+			// Handle state
+			if ( stateString ) {
+				list.add(
+					function() {
+
+						// state = "resolved" (i.e., fulfilled)
+						// state = "rejected"
+						state = stateString;
+					},
+
+					// rejected_callbacks.disable
+					// fulfilled_callbacks.disable
+					tuples[ 3 - i ][ 2 ].disable,
+
+					// rejected_handlers.disable
+					// fulfilled_handlers.disable
+					tuples[ 3 - i ][ 3 ].disable,
+
+					// progress_callbacks.lock
+					tuples[ 0 ][ 2 ].lock,
+
+					// progress_handlers.lock
+					tuples[ 0 ][ 3 ].lock
+				);
+			}
+
+			// progress_handlers.fire
+			// fulfilled_handlers.fire
+			// rejected_handlers.fire
+			list.add( tuple[ 3 ].fire );
+
+			// deferred.notify = function() { deferred.notifyWith(...) }
+			// deferred.resolve = function() { deferred.resolveWith(...) }
+			// deferred.reject = function() { deferred.rejectWith(...) }
+			deferred[ tuple[ 0 ] ] = function() {
+				deferred[ tuple[ 0 ] + "With" ]( this === deferred ? undefined : this, arguments );
+				return this;
+			};
+
+			// deferred.notifyWith = list.fireWith
+			// deferred.resolveWith = list.fireWith
+			// deferred.rejectWith = list.fireWith
+			deferred[ tuple[ 0 ] + "With" ] = list.fireWith;
+		} );
+
+		// Make the deferred a promise
+		promise.promise( deferred );
+
+		// Call given func if any
+		if ( func ) {
+			func.call( deferred, deferred );
+		}
+
+		// All done!
+		return deferred;
+	},
+
+	// Deferred helper
+	when: function( singleValue ) {
+		var
+
+			// count of uncompleted subordinates
+			remaining = arguments.length,
+
+			// count of unprocessed arguments
+			i = remaining,
+
+			// subordinate fulfillment data
+			resolveContexts = Array( i ),
+			resolveValues = slice.call( arguments ),
+
+			// the master Deferred
+			master = jQuery.Deferred(),
+
+			// subordinate callback factory
+			updateFunc = function( i ) {
+				return function( value ) {
+					resolveContexts[ i ] = this;
+					resolveValues[ i ] = arguments.length > 1 ? slice.call( arguments ) : value;
+					if ( !( --remaining ) ) {
+						master.resolveWith( resolveContexts, resolveValues );
+					}
+				};
+			};
+
+		// Single- and empty arguments are adopted like Promise.resolve
+		if ( remaining <= 1 ) {
+			adoptValue( singleValue, master.done( updateFunc( i ) ).resolve, master.reject,
+				!remaining );
+
+			// Use .then() to unwrap secondary thenables (cf. gh-3000)
+			if ( master.state() === "pending" ||
+				isFunction( resolveValues[ i ] && resolveValues[ i ].then ) ) {
+
+				return master.then();
+			}
+		}
+
+		// Multiple arguments are aggregated like Promise.all array elements
+		while ( i-- ) {
+			adoptValue( resolveValues[ i ], updateFunc( i ), master.reject );
+		}
+
+		return master.promise();
+	}
+} );
+
+
+// These usually indicate a programmer mistake during development,
+// warn about them ASAP rather than swallowing them by default.
+var rerrorNames = /^(Eval|Internal|Range|Reference|Syntax|Type|URI)Error$/;
+
+jQuery.Deferred.exceptionHook = function( error, stack ) {
+
+	// Support: IE 8 - 9 only
+	// Console exists when dev tools are open, which can happen at any time
+	if ( window.console && window.console.warn && error && rerrorNames.test( error.name ) ) {
+		window.console.warn( "jQuery.Deferred exception: " + error.message, error.stack, stack );
+	}
+};
+
+
+
+
+jQuery.readyException = function( error ) {
+	window.setTimeout( function() {
+		throw error;
+	} );
+};
+
+
+
+
+// The deferred used on DOM ready
+var readyList = jQuery.Deferred();
+
+jQuery.fn.ready = function( fn ) {
+
+	readyList
+		.then( fn )
+
+		// Wrap jQuery.readyException in a function so that the lookup
+		// happens at the time of error handling instead of callback
+		// registration.
+		.catch( function( error ) {
+			jQuery.readyException( error );
+		} );
+
+	return this;
+};
+
+jQuery.extend( {
+
+	// Is the DOM ready to be used? Set to true once it occurs.
+	isReady: false,
+
+	// A counter to track how many items to wait for before
+	// the ready event fires. See #6781
+	readyWait: 1,
+
+	// Handle when the DOM is ready
+	ready: function( wait ) {
+
+		// Abort if there are pending holds or we're already ready
+		if ( wait === true ? --jQuery.readyWait : jQuery.isReady ) {
+			return;
+		}
+
+		// Remember that the DOM is ready
+		jQuery.isReady = true;
+
+		// If a normal DOM Ready event fired, decrement, and wait if need be
+		if ( wait !== true && --jQuery.readyWait > 0 ) {
+			return;
+		}
+
+		// If there are functions bound, to execute
+		readyList.resolveWith( document, [ jQuery ] );
+	}
+} );
+
+jQuery.ready.then = readyList.then;
+
+// The ready event handler and self cleanup method
+function completed() {
+	document.removeEventListener( "DOMContentLoaded", completed );
+	window.removeEventListener( "load", completed );
+	jQuery.ready();
+}
+
+// Catch cases where $(document).ready() is called
+// after the browser event has already occurred.
+// Support: IE <=9 - 10 only
+// Older IE sometimes signals "interactive" too soon
+if ( document.readyState === "complete" ||
+	( document.readyState !== "loading" && !document.documentElement.doScroll ) ) {
+
+	// Handle it asynchronously to allow scripts the opportunity to delay ready
+	window.setTimeout( jQuery.ready );
+
+} else {
+
+	// Use the handy event callback
+	document.addEventListener( "DOMContentLoaded", completed );
+
+	// A fallback to window.onload, that will always work
+	window.addEventListener( "load", completed );
+}
+
+
+
+
+// Multifunctional method to get and set values of a collection
+// The value/s can optionally be executed if it's a function
+var access = function( elems, fn, key, value, chainable, emptyGet, raw ) {
+	var i = 0,
+		len = elems.length,
+		bulk = key == null;
+
+	// Sets many values
+	if ( toType( key ) === "object" ) {
+		chainable = true;
+		for ( i in key ) {
+			access( elems, fn, i, key[ i ], true, emptyGet, raw );
+		}
+
+	// Sets one value
+	} else if ( value !== undefined ) {
+		chainable = true;
+
+		if ( !isFunction( value ) ) {
+			raw = true;
+		}
+
+		if ( bulk ) {
+
+			// Bulk operations run against the entire set
+			if ( raw ) {
+				fn.call( elems, value );
+				fn = null;
+
+			// ...except when executing function values
+			} else {
+				bulk = fn;
+				fn = function( elem, key, value ) {
+					return bulk.call( jQuery( elem ), value );
+				};
+			}
+		}
+
+		if ( fn ) {
+			for ( ; i < len; i++ ) {
+				fn(
+					elems[ i ], key, raw ?
+					value :
+					value.call( elems[ i ], i, fn( elems[ i ], key ) )
+				);
+			}
+		}
+	}
+
+	if ( chainable ) {
+		return elems;
+	}
+
+	// Gets
+	if ( bulk ) {
+		return fn.call( elems );
+	}
+
+	return len ? fn( elems[ 0 ], key ) : emptyGet;
+};
+
+
+// Matches dashed string for camelizing
+var rmsPrefix = /^-ms-/,
+	rdashAlpha = /-([a-z])/g;
+
+// Used by camelCase as callback to replace()
+function fcamelCase( all, letter ) {
+	return letter.toUpperCase();
+}
+
+// Convert dashed to camelCase; used by the css and data modules
+// Support: IE <=9 - 11, Edge 12 - 15
+// Microsoft forgot to hump their vendor prefix (#9572)
+function camelCase( string ) {
+	return string.replace( rmsPrefix, "ms-" ).replace( rdashAlpha, fcamelCase );
+}
+var acceptData = function( owner ) {
+
+	// Accepts only:
+	//  - Node
+	//    - Node.ELEMENT_NODE
+	//    - Node.DOCUMENT_NODE
+	//  - Object
+	//    - Any
+	return owner.nodeType === 1 || owner.nodeType === 9 || !( +owner.nodeType );
+};
+
+
+
+
+function Data() {
+	this.expando = jQuery.expando + Data.uid++;
+}
+
+Data.uid = 1;
+
+Data.prototype = {
+
+	cache: function( owner ) {
+
+		// Check if the owner object already has a cache
+		var value = owner[ this.expando ];
+
+		// If not, create one
+		if ( !value ) {
+			value = {};
+
+			// We can accept data for non-element nodes in modern browsers,
+			// but we should not, see #8335.
+			// Always return an empty object.
+			if ( acceptData( owner ) ) {
+
+				// If it is a node unlikely to be stringify-ed or looped over
+				// use plain assignment
+				if ( owner.nodeType ) {
+					owner[ this.expando ] = value;
+
+				// Otherwise secure it in a non-enumerable property
+				// configurable must be true to allow the property to be
+				// deleted when data is removed
+				} else {
+					Object.defineProperty( owner, this.expando, {
+						value: value,
+						configurable: true
+					} );
+				}
+			}
+		}
+
+		return value;
+	},
+	set: function( owner, data, value ) {
+		var prop,
+			cache = this.cache( owner );
+
+		// Handle: [ owner, key, value ] args
+		// Always use camelCase key (gh-2257)
+		if ( typeof data === "string" ) {
+			cache[ camelCase( data ) ] = value;
+
+		// Handle: [ owner, { properties } ] args
+		} else {
+
+			// Copy the properties one-by-one to the cache object
+			for ( prop in data ) {
+				cache[ camelCase( prop ) ] = data[ prop ];
+			}
+		}
+		return cache;
+	},
+	get: function( owner, key ) {
+		return key === undefined ?
+			this.cache( owner ) :
+
+			// Always use camelCase key (gh-2257)
+			owner[ this.expando ] && owner[ this.expando ][ camelCase( key ) ];
+	},
+	access: function( owner, key, value ) {
+
+		// In cases where either:
+		//
+		//   1. No key was specified
+		//   2. A string key was specified, but no value provided
+		//
+		// Take the "read" path and allow the get method to determine
+		// which value to return, respectively either:
+		//
+		//   1. The entire cache object
+		//   2. The data stored at the key
+		//
+		if ( key === undefined ||
+				( ( key && typeof key === "string" ) && value === undefined ) ) {
+
+			return this.get( owner, key );
+		}
+
+		// When the key is not a string, or both a key and value
+		// are specified, set or extend (existing objects) with either:
+		//
+		//   1. An object of properties
+		//   2. A key and value
+		//
+		this.set( owner, key, value );
+
+		// Since the "set" path can have two possible entry points
+		// return the expected data based on which path was taken[*]
+		return value !== undefined ? value : key;
+	},
+	remove: function( owner, key ) {
+		var i,
+			cache = owner[ this.expando ];
+
+		if ( cache === undefined ) {
+			return;
+		}
+
+		if ( key !== undefined ) {
+
+			// Support array or space separated string of keys
+			if ( Array.isArray( key ) ) {
+
+				// If key is an array of keys...
+				// We always set camelCase keys, so remove that.
+				key = key.map( camelCase );
+			} else {
+				key = camelCase( key );
+
+				// If a key with the spaces exists, use it.
+				// Otherwise, create an array by matching non-whitespace
+				key = key in cache ?
+					[ key ] :
+					( key.match( rnothtmlwhite ) || [] );
+			}
+
+			i = key.length;
+
+			while ( i-- ) {
+				delete cache[ key[ i ] ];
+			}
+		}
+
+		// Remove the expando if there's no more data
+		if ( key === undefined || jQuery.isEmptyObject( cache ) ) {
+
+			// Support: Chrome <=35 - 45
+			// Webkit & Blink performance suffers when deleting properties
+			// from DOM nodes, so set to undefined instead
+			// https://bugs.chromium.org/p/chromium/issues/detail?id=378607 (bug restricted)
+			if ( owner.nodeType ) {
+				owner[ this.expando ] = undefined;
+			} else {
+				delete owner[ this.expando ];
+			}
+		}
+	},
+	hasData: function( owner ) {
+		var cache = owner[ this.expando ];
+		return cache !== undefined && !jQuery.isEmptyObject( cache );
+	}
+};
+var dataPriv = new Data();
+
+var dataUser = new Data();
+
+
+
+//	Implementation Summary
+//
+//	1. Enforce API surface and semantic compatibility with 1.9.x branch
+//	2. Improve the module's maintainability by reducing the storage
+//		paths to a single mechanism.
+//	3. Use the same single mechanism to support "private" and "user" data.
+//	4. _Never_ expose "private" data to user code (TODO: Drop _data, _removeData)
+//	5. Avoid exposing implementation details on user objects (eg. expando properties)
+//	6. Provide a clear path for implementation upgrade to WeakMap in 2014
+
+var rbrace = /^(?:\{[\w\W]*\}|\[[\w\W]*\])$/,
+	rmultiDash = /[A-Z]/g;
+
+function getData( data ) {
+	if ( data === "true" ) {
+		return true;
+	}
+
+	if ( data === "false" ) {
+		return false;
+	}
+
+	if ( data === "null" ) {
+		return null;
+	}
+
+	// Only convert to a number if it doesn't change the string
+	if ( data === +data + "" ) {
+		return +data;
+	}
+
+	if ( rbrace.test( data ) ) {
+		return JSON.parse( data );
+	}
+
+	return data;
+}
+
+function dataAttr( elem, key, data ) {
+	var name;
+
+	// If nothing was found internally, try to fetch any
+	// data from the HTML5 data-* attribute
+	if ( data === undefined && elem.nodeType === 1 ) {
+		name = "data-" + key.replace( rmultiDash, "-$&" ).toLowerCase();
+		data = elem.getAttribute( name );
+
+		if ( typeof data === "string" ) {
+			try {
+				data = getData( data );
+			} catch ( e ) {}
+
+			// Make sure we set the data so it isn't changed later
+			dataUser.set( elem, key, data );
+		} else {
+			data = undefined;
+		}
+	}
+	return data;
+}
+
+jQuery.extend( {
+	hasData: function( elem ) {
+		return dataUser.hasData( elem ) || dataPriv.hasData( elem );
+	},
+
+	data: function( elem, name, data ) {
+		return dataUser.access( elem, name, data );
+	},
+
+	removeData: function( elem, name ) {
+		dataUser.remove( elem, name );
+	},
+
+	// TODO: Now that all calls to _data and _removeData have been replaced
+	// with direct calls to dataPriv methods, these can be deprecated.
+	_data: function( elem, name, data ) {
+		return dataPriv.access( elem, name, data );
+	},
+
+	_removeData: function( elem, name ) {
+		dataPriv.remove( elem, name );
+	}
+} );
+
+jQuery.fn.extend( {
+	data: function( key, value ) {
+		var i, name, data,
+			elem = this[ 0 ],
+			attrs = elem && elem.attributes;
+
+		// Gets all values
+		if ( key === undefined ) {
+			if ( this.length ) {
+				data = dataUser.get( elem );
+
+				if ( elem.nodeType === 1 && !dataPriv.get( elem, "hasDataAttrs" ) ) {
+					i = attrs.length;
+					while ( i-- ) {
+
+						// Support: IE 11 only
+						// The attrs elements can be null (#14894)
+						if ( attrs[ i ] ) {
+							name = attrs[ i ].name;
+							if ( name.indexOf( "data-" ) === 0 ) {
+								name = camelCase( name.slice( 5 ) );
+								dataAttr( elem, name, data[ name ] );
+							}
+						}
+					}
+					dataPriv.set( elem, "hasDataAttrs", true );
+				}
+			}
+
+			return data;
+		}
+
+		// Sets multiple values
+		if ( typeof key === "object" ) {
+			return this.each( function() {
+				dataUser.set( this, key );
+			} );
+		}
+
+		return access( this, function( value ) {
+			var data;
+
+			// The calling jQuery object (element matches) is not empty
+			// (and therefore has an element appears at this[ 0 ]) and the
+			// `value` parameter was not undefined. An empty jQuery object
+			// will result in `undefined` for elem = this[ 0 ] which will
+			// throw an exception if an attempt to read a data cache is made.
+			if ( elem && value === undefined ) {
+
+				// Attempt to get data from the cache
+				// The key will always be camelCased in Data
+				data = dataUser.get( elem, key );
+				if ( data !== undefined ) {
+					return data;
+				}
+
+				// Attempt to "discover" the data in
+				// HTML5 custom data-* attrs
+				data = dataAttr( elem, key );
+				if ( data !== undefined ) {
+					return data;
+				}
+
+				// We tried really hard, but the data doesn't exist.
+				return;
+			}
+
+			// Set the data...
+			this.each( function() {
+
+				// We always store the camelCased key
+				dataUser.set( this, key, value );
+			} );
+		}, null, value, arguments.length > 1, null, true );
+	},
+
+	removeData: function( key ) {
+		return this.each( function() {
+			dataUser.remove( this, key );
+		} );
+	}
+} );
+
+
+jQuery.extend( {
+	queue: function( elem, type, data ) {
+		var queue;
+
+		if ( elem ) {
+			type = ( type || "fx" ) + "queue";
+			queue = dataPriv.get( elem, type );
+
+			// Speed up dequeue by getting out quickly if this is just a lookup
+			if ( data ) {
+				if ( !queue || Array.isArray( data ) ) {
+					queue = dataPriv.access( elem, type, jQuery.makeArray( data ) );
+				} else {
+					queue.push( data );
+				}
+			}
+			return queue || [];
+		}
+	},
+
+	dequeue: function( elem, type ) {
+		type = type || "fx";
+
+		var queue = jQuery.queue( elem, type ),
+			startLength = queue.length,
+			fn = queue.shift(),
+			hooks = jQuery._queueHooks( elem, type ),
+			next = function() {
+				jQuery.dequeue( elem, type );
+			};
+
+		// If the fx queue is dequeued, always remove the progress sentinel
+		if ( fn === "inprogress" ) {
+			fn = queue.shift();
+			startLength--;
+		}
+
+		if ( fn ) {
+
+			// Add a progress sentinel to prevent the fx queue from being
+			// automatically dequeued
+			if ( type === "fx" ) {
+				queue.unshift( "inprogress" );
+			}
+
+			// Clear up the last queue stop function
+			delete hooks.stop;
+			fn.call( elem, next, hooks );
+		}
+
+		if ( !startLength && hooks ) {
+			hooks.empty.fire();
+		}
+	},
+
+	// Not public - generate a queueHooks object, or return the current one
+	_queueHooks: function( elem, type ) {
+		var key = type + "queueHooks";
+		return dataPriv.get( elem, key ) || dataPriv.access( elem, key, {
+			empty: jQuery.Callbacks( "once memory" ).add( function() {
+				dataPriv.remove( elem, [ type + "queue", key ] );
+			} )
+		} );
+	}
+} );
+
+jQuery.fn.extend( {
+	queue: function( type, data ) {
+		var setter = 2;
+
+		if ( typeof type !== "string" ) {
+			data = type;
+			type = "fx";
+			setter--;
+		}
+
+		if ( arguments.length < setter ) {
+			return jQuery.queue( this[ 0 ], type );
+		}
+
+		return data === undefined ?
+			this :
+			this.each( function() {
+				var queue = jQuery.queue( this, type, data );
+
+				// Ensure a hooks for this queue
+				jQuery._queueHooks( this, type );
+
+				if ( type === "fx" && queue[ 0 ] !== "inprogress" ) {
+					jQuery.dequeue( this, type );
+				}
+			} );
+	},
+	dequeue: function( type ) {
+		return this.each( function() {
+			jQuery.dequeue( this, type );
+		} );
+	},
+	clearQueue: function( type ) {
+		return this.queue( type || "fx", [] );
+	},
+
+	// Get a promise resolved when queues of a certain type
+	// are emptied (fx is the type by default)
+	promise: function( type, obj ) {
+		var tmp,
+			count = 1,
+			defer = jQuery.Deferred(),
+			elements = this,
+			i = this.length,
+			resolve = function() {
+				if ( !( --count ) ) {
+					defer.resolveWith( elements, [ elements ] );
+				}
+			};
+
+		if ( typeof type !== "string" ) {
+			obj = type;
+			type = undefined;
+		}
+		type = type || "fx";
+
+		while ( i-- ) {
+			tmp = dataPriv.get( elements[ i ], type + "queueHooks" );
+			if ( tmp && tmp.empty ) {
+				count++;
+				tmp.empty.add( resolve );
+			}
+		}
+		resolve();
+		return defer.promise( obj );
+	}
+} );
+var pnum = ( /[+-]?(?:\d*\.|)\d+(?:[eE][+-]?\d+|)/ ).source;
+
+var rcssNum = new RegExp( "^(?:([+-])=|)(" + pnum + ")([a-z%]*)$", "i" );
+
+
+var cssExpand = [ "Top", "Right", "Bottom", "Left" ];
+
+var documentElement = document.documentElement;
+
+
+
+	var isAttached = function( elem ) {
+			return jQuery.contains( elem.ownerDocument, elem );
+		},
+		composed = { composed: true };
+
+	// Support: IE 9 - 11+, Edge 12 - 18+, iOS 10.0 - 10.2 only
+	// Check attachment across shadow DOM boundaries when possible (gh-3504)
+	// Support: iOS 10.0-10.2 only
+	// Early iOS 10 versions support `attachShadow` but not `getRootNode`,
+	// leading to errors. We need to check for `getRootNode`.
+	if ( documentElement.getRootNode ) {
+		isAttached = function( elem ) {
+			return jQuery.contains( elem.ownerDocument, elem ) ||
+				elem.getRootNode( composed ) === elem.ownerDocument;
+		};
+	}
+var isHiddenWithinTree = function( elem, el ) {
+
+		// isHiddenWithinTree might be called from jQuery#filter function;
+		// in that case, element will be second argument
+		elem = el || elem;
+
+		// Inline style trumps all
+		return elem.style.display === "none" ||
+			elem.style.display === "" &&
+
+			// Otherwise, check computed style
+			// Support: Firefox <=43 - 45
+			// Disconnected elements can have computed display: none, so first confirm that elem is
+			// in the document.
+			isAttached( elem ) &&
+
+			jQuery.css( elem, "display" ) === "none";
+	};
+
+var swap = function( elem, options, callback, args ) {
+	var ret, name,
+		old = {};
+
+	// Remember the old values, and insert the new ones
+	for ( name in options ) {
+		old[ name ] = elem.style[ name ];
+		elem.style[ name ] = options[ name ];
+	}
+
+	ret = callback.apply( elem, args || [] );
+
+	// Revert the old values
+	for ( name in options ) {
+		elem.style[ name ] = old[ name ];
+	}
+
+	return ret;
+};
+
+
+
+
+function adjustCSS( elem, prop, valueParts, tween ) {
+	var adjusted, scale,
+		maxIterations = 20,
+		currentValue = tween ?
+			function() {
+				return tween.cur();
+			} :
+			function() {
+				return jQuery.css( elem, prop, "" );
+			},
+		initial = currentValue(),
+		unit = valueParts && valueParts[ 3 ] || ( jQuery.cssNumber[ prop ] ? "" : "px" ),
+
+		// Starting value computation is required for potential unit mismatches
+		initialInUnit = elem.nodeType &&
+			( jQuery.cssNumber[ prop ] || unit !== "px" && +initial ) &&
+			rcssNum.exec( jQuery.css( elem, prop ) );
+
+	if ( initialInUnit && initialInUnit[ 3 ] !== unit ) {
+
+		// Support: Firefox <=54
+		// Halve the iteration target value to prevent interference from CSS upper bounds (gh-2144)
+		initial = initial / 2;
+
+		// Trust units reported by jQuery.css
+		unit = unit || initialInUnit[ 3 ];
+
+		// Iteratively approximate from a nonzero starting point
+		initialInUnit = +initial || 1;
+
+		while ( maxIterations-- ) {
+
+			// Evaluate and update our best guess (doubling guesses that zero out).
+			// Finish if the scale equals or crosses 1 (making the old*new product non-positive).
+			jQuery.style( elem, prop, initialInUnit + unit );
+			if ( ( 1 - scale ) * ( 1 - ( scale = currentValue() / initial || 0.5 ) ) <= 0 ) {
+				maxIterations = 0;
+			}
+			initialInUnit = initialInUnit / scale;
+
+		}
+
+		initialInUnit = initialInUnit * 2;
+		jQuery.style( elem, prop, initialInUnit + unit );
+
+		// Make sure we update the tween properties later on
+		valueParts = valueParts || [];
+	}
+
+	if ( valueParts ) {
+		initialInUnit = +initialInUnit || +initial || 0;
+
+		// Apply relative offset (+=/-=) if specified
+		adjusted = valueParts[ 1 ] ?
+			initialInUnit + ( valueParts[ 1 ] + 1 ) * valueParts[ 2 ] :
+			+valueParts[ 2 ];
+		if ( tween ) {
+			tween.unit = unit;
+			tween.start = initialInUnit;
+			tween.end = adjusted;
+		}
+	}
+	return adjusted;
+}
+
+
+var defaultDisplayMap = {};
+
+function getDefaultDisplay( elem ) {
+	var temp,
+		doc = elem.ownerDocument,
+		nodeName = elem.nodeName,
+		display = defaultDisplayMap[ nodeName ];
+
+	if ( display ) {
+		return display;
+	}
+
+	temp = doc.body.appendChild( doc.createElement( nodeName ) );
+	display = jQuery.css( temp, "display" );
+
+	temp.parentNode.removeChild( temp );
+
+	if ( display === "none" ) {
+		display = "block";
+	}
+	defaultDisplayMap[ nodeName ] = display;
+
+	return display;
+}
+
+function showHide( elements, show ) {
+	var display, elem,
+		values = [],
+		index = 0,
+		length = elements.length;
+
+	// Determine new display value for elements that need to change
+	for ( ; index < length; index++ ) {
+		elem = elements[ index ];
+		if ( !elem.style ) {
+			continue;
+		}
+
+		display = elem.style.display;
+		if ( show ) {
+
+			// Since we force visibility upon cascade-hidden elements, an immediate (and slow)
+			// check is required in this first loop unless we have a nonempty display value (either
+			// inline or about-to-be-restored)
+			if ( display === "none" ) {
+				values[ index ] = dataPriv.get( elem, "display" ) || null;
+				if ( !values[ index ] ) {
+					elem.style.display = "";
+				}
+			}
+			if ( elem.style.display === "" && isHiddenWithinTree( elem ) ) {
+				values[ index ] = getDefaultDisplay( elem );
+			}
+		} else {
+			if ( display !== "none" ) {
+				values[ index ] = "none";
+
+				// Remember what we're overwriting
+				dataPriv.set( elem, "display", display );
+			}
+		}
+	}
+
+	// Set the display of the elements in a second loop to avoid constant reflow
+	for ( index = 0; index < length; index++ ) {
+		if ( values[ index ] != null ) {
+			elements[ index ].style.display = values[ index ];
+		}
+	}
+
+	return elements;
+}
+
+jQuery.fn.extend( {
+	show: function() {
+		return showHide( this, true );
+	},
+	hide: function() {
+		return showHide( this );
+	},
+	toggle: function( state ) {
+		if ( typeof state === "boolean" ) {
+			return state ? this.show() : this.hide();
+		}
+
+		return this.each( function() {
+			if ( isHiddenWithinTree( this ) ) {
+				jQuery( this ).show();
+			} else {
+				jQuery( this ).hide();
+			}
+		} );
+	}
+} );
+var rcheckableType = ( /^(?:checkbox|radio)$/i );
+
+var rtagName = ( /<([a-z][^\/\0>\x20\t\r\n\f]*)/i );
+
+var rscriptType = ( /^$|^module$|\/(?:java|ecma)script/i );
+
+
+
+// We have to close these tags to support XHTML (#13200)
+var wrapMap = {
+
+	// Support: IE <=9 only
+	option: [ 1, "" ],
+
+	// XHTML parsers do not magically insert elements in the
+	// same way that tag soup parsers do. So we cannot shorten
+	// this by omitting  or other required elements.
+	thead: [ 1, "", "
" ],
+	col: [ 2, "", "
" ],
+	tr: [ 2, "", "
" ],
+	td: [ 3, "", "
" ],
+
+	_default: [ 0, "", "" ]
+};
+
+// Support: IE <=9 only
+wrapMap.optgroup = wrapMap.option;
+
+wrapMap.tbody = wrapMap.tfoot = wrapMap.colgroup = wrapMap.caption = wrapMap.thead;
+wrapMap.th = wrapMap.td;
+
+
+function getAll( context, tag ) {
+
+	// Support: IE <=9 - 11 only
+	// Use typeof to avoid zero-argument method invocation on host objects (#15151)
+	var ret;
+
+	if ( typeof context.getElementsByTagName !== "undefined" ) {
+		ret = context.getElementsByTagName( tag || "*" );
+
+	} else if ( typeof context.querySelectorAll !== "undefined" ) {
+		ret = context.querySelectorAll( tag || "*" );
+
+	} else {
+		ret = [];
+	}
+
+	if ( tag === undefined || tag && nodeName( context, tag ) ) {
+		return jQuery.merge( [ context ], ret );
+	}
+
+	return ret;
+}
+
+
+// Mark scripts as having already been evaluated
+function setGlobalEval( elems, refElements ) {
+	var i = 0,
+		l = elems.length;
+
+	for ( ; i < l; i++ ) {
+		dataPriv.set(
+			elems[ i ],
+			"globalEval",
+			!refElements || dataPriv.get( refElements[ i ], "globalEval" )
+		);
+	}
+}
+
+
+var rhtml = /<|&#?\w+;/;
+
+function buildFragment( elems, context, scripts, selection, ignored ) {
+	var elem, tmp, tag, wrap, attached, j,
+		fragment = context.createDocumentFragment(),
+		nodes = [],
+		i = 0,
+		l = elems.length;
+
+	for ( ; i < l; i++ ) {
+		elem = elems[ i ];
+
+		if ( elem || elem === 0 ) {
+
+			// Add nodes directly
+			if ( toType( elem ) === "object" ) {
+
+				// Support: Android <=4.0 only, PhantomJS 1 only
+				// push.apply(_, arraylike) throws on ancient WebKit
+				jQuery.merge( nodes, elem.nodeType ? [ elem ] : elem );
+
+			// Convert non-html into a text node
+			} else if ( !rhtml.test( elem ) ) {
+				nodes.push( context.createTextNode( elem ) );
+
+			// Convert html into DOM nodes
+			} else {
+				tmp = tmp || fragment.appendChild( context.createElement( "div" ) );
+
+				// Deserialize a standard representation
+				tag = ( rtagName.exec( elem ) || [ "", "" ] )[ 1 ].toLowerCase();
+				wrap = wrapMap[ tag ] || wrapMap._default;
+				tmp.innerHTML = wrap[ 1 ] + jQuery.htmlPrefilter( elem ) + wrap[ 2 ];
+
+				// Descend through wrappers to the right content
+				j = wrap[ 0 ];
+				while ( j-- ) {
+					tmp = tmp.lastChild;
+				}
+
+				// Support: Android <=4.0 only, PhantomJS 1 only
+				// push.apply(_, arraylike) throws on ancient WebKit
+				jQuery.merge( nodes, tmp.childNodes );
+
+				// Remember the top-level container
+				tmp = fragment.firstChild;
+
+				// Ensure the created nodes are orphaned (#12392)
+				tmp.textContent = "";
+			}
+		}
+	}
+
+	// Remove wrapper from fragment
+	fragment.textContent = "";
+
+	i = 0;
+	while ( ( elem = nodes[ i++ ] ) ) {
+
+		// Skip elements already in the context collection (trac-4087)
+		if ( selection && jQuery.inArray( elem, selection ) > -1 ) {
+			if ( ignored ) {
+				ignored.push( elem );
+			}
+			continue;
+		}
+
+		attached = isAttached( elem );
+
+		// Append to fragment
+		tmp = getAll( fragment.appendChild( elem ), "script" );
+
+		// Preserve script evaluation history
+		if ( attached ) {
+			setGlobalEval( tmp );
+		}
+
+		// Capture executables
+		if ( scripts ) {
+			j = 0;
+			while ( ( elem = tmp[ j++ ] ) ) {
+				if ( rscriptType.test( elem.type || "" ) ) {
+					scripts.push( elem );
+				}
+			}
+		}
+	}
+
+	return fragment;
+}
+
+
+( function() {
+	var fragment = document.createDocumentFragment(),
+		div = fragment.appendChild( document.createElement( "div" ) ),
+		input = document.createElement( "input" );
+
+	// Support: Android 4.0 - 4.3 only
+	// Check state lost if the name is set (#11217)
+	// Support: Windows Web Apps (WWA)
+	// `name` and `type` must use .setAttribute for WWA (#14901)
+	input.setAttribute( "type", "radio" );
+	input.setAttribute( "checked", "checked" );
+	input.setAttribute( "name", "t" );
+
+	div.appendChild( input );
+
+	// Support: Android <=4.1 only
+	// Older WebKit doesn't clone checked state correctly in fragments
+	support.checkClone = div.cloneNode( true ).cloneNode( true ).lastChild.checked;
+
+	// Support: IE <=11 only
+	// Make sure textarea (and checkbox) defaultValue is properly cloned
+	div.innerHTML = "";
+	support.noCloneChecked = !!div.cloneNode( true ).lastChild.defaultValue;
+} )();
+
+
+var
+	rkeyEvent = /^key/,
+	rmouseEvent = /^(?:mouse|pointer|contextmenu|drag|drop)|click/,
+	rtypenamespace = /^([^.]*)(?:\.(.+)|)/;
+
+function returnTrue() {
+	return true;
+}
+
+function returnFalse() {
+	return false;
+}
+
+// Support: IE <=9 - 11+
+// focus() and blur() are asynchronous, except when they are no-op.
+// So expect focus to be synchronous when the element is already active,
+// and blur to be synchronous when the element is not already active.
+// (focus and blur are always synchronous in other supported browsers,
+// this just defines when we can count on it).
+function expectSync( elem, type ) {
+	return ( elem === safeActiveElement() ) === ( type === "focus" );
+}
+
+// Support: IE <=9 only
+// Accessing document.activeElement can throw unexpectedly
+// https://bugs.jquery.com/ticket/13393
+function safeActiveElement() {
+	try {
+		return document.activeElement;
+	} catch ( err ) { }
+}
+
+function on( elem, types, selector, data, fn, one ) {
+	var origFn, type;
+
+	// Types can be a map of types/handlers
+	if ( typeof types === "object" ) {
+
+		// ( types-Object, selector, data )
+		if ( typeof selector !== "string" ) {
+
+			// ( types-Object, data )
+			data = data || selector;
+			selector = undefined;
+		}
+		for ( type in types ) {
+			on( elem, type, selector, data, types[ type ], one );
+		}
+		return elem;
+	}
+
+	if ( data == null && fn == null ) {
+
+		// ( types, fn )
+		fn = selector;
+		data = selector = undefined;
+	} else if ( fn == null ) {
+		if ( typeof selector === "string" ) {
+
+			// ( types, selector, fn )
+			fn = data;
+			data = undefined;
+		} else {
+
+			// ( types, data, fn )
+			fn = data;
+			data = selector;
+			selector = undefined;
+		}
+	}
+	if ( fn === false ) {
+		fn = returnFalse;
+	} else if ( !fn ) {
+		return elem;
+	}
+
+	if ( one === 1 ) {
+		origFn = fn;
+		fn = function( event ) {
+
+			// Can use an empty set, since event contains the info
+			jQuery().off( event );
+			return origFn.apply( this, arguments );
+		};
+
+		// Use same guid so caller can remove using origFn
+		fn.guid = origFn.guid || ( origFn.guid = jQuery.guid++ );
+	}
+	return elem.each( function() {
+		jQuery.event.add( this, types, fn, data, selector );
+	} );
+}
+
+/*
+ * Helper functions for managing events -- not part of the public interface.
+ * Props to Dean Edwards' addEvent library for many of the ideas.
+ */
+jQuery.event = {
+
+	global: {},
+
+	add: function( elem, types, handler, data, selector ) {
+
+		var handleObjIn, eventHandle, tmp,
+			events, t, handleObj,
+			special, handlers, type, namespaces, origType,
+			elemData = dataPriv.get( elem );
+
+		// Don't attach events to noData or text/comment nodes (but allow plain objects)
+		if ( !elemData ) {
+			return;
+		}
+
+		// Caller can pass in an object of custom data in lieu of the handler
+		if ( handler.handler ) {
+			handleObjIn = handler;
+			handler = handleObjIn.handler;
+			selector = handleObjIn.selector;
+		}
+
+		// Ensure that invalid selectors throw exceptions at attach time
+		// Evaluate against documentElement in case elem is a non-element node (e.g., document)
+		if ( selector ) {
+			jQuery.find.matchesSelector( documentElement, selector );
+		}
+
+		// Make sure that the handler has a unique ID, used to find/remove it later
+		if ( !handler.guid ) {
+			handler.guid = jQuery.guid++;
+		}
+
+		// Init the element's event structure and main handler, if this is the first
+		if ( !( events = elemData.events ) ) {
+			events = elemData.events = {};
+		}
+		if ( !( eventHandle = elemData.handle ) ) {
+			eventHandle = elemData.handle = function( e ) {
+
+				// Discard the second event of a jQuery.event.trigger() and
+				// when an event is called after a page has unloaded
+				return typeof jQuery !== "undefined" && jQuery.event.triggered !== e.type ?
+					jQuery.event.dispatch.apply( elem, arguments ) : undefined;
+			};
+		}
+
+		// Handle multiple events separated by a space
+		types = ( types || "" ).match( rnothtmlwhite ) || [ "" ];
+		t = types.length;
+		while ( t-- ) {
+			tmp = rtypenamespace.exec( types[ t ] ) || [];
+			type = origType = tmp[ 1 ];
+			namespaces = ( tmp[ 2 ] || "" ).split( "." ).sort();
+
+			// There *must* be a type, no attaching namespace-only handlers
+			if ( !type ) {
+				continue;
+			}
+
+			// If event changes its type, use the special event handlers for the changed type
+			special = jQuery.event.special[ type ] || {};
+
+			// If selector defined, determine special event api type, otherwise given type
+			type = ( selector ? special.delegateType : special.bindType ) || type;
+
+			// Update special based on newly reset type
+			special = jQuery.event.special[ type ] || {};
+
+			// handleObj is passed to all event handlers
+			handleObj = jQuery.extend( {
+				type: type,
+				origType: origType,
+				data: data,
+				handler: handler,
+				guid: handler.guid,
+				selector: selector,
+				needsContext: selector && jQuery.expr.match.needsContext.test( selector ),
+				namespace: namespaces.join( "." )
+			}, handleObjIn );
+
+			// Init the event handler queue if we're the first
+			if ( !( handlers = events[ type ] ) ) {
+				handlers = events[ type ] = [];
+				handlers.delegateCount = 0;
+
+				// Only use addEventListener if the special events handler returns false
+				if ( !special.setup ||
+					special.setup.call( elem, data, namespaces, eventHandle ) === false ) {
+
+					if ( elem.addEventListener ) {
+						elem.addEventListener( type, eventHandle );
+					}
+				}
+			}
+
+			if ( special.add ) {
+				special.add.call( elem, handleObj );
+
+				if ( !handleObj.handler.guid ) {
+					handleObj.handler.guid = handler.guid;
+				}
+			}
+
+			// Add to the element's handler list, delegates in front
+			if ( selector ) {
+				handlers.splice( handlers.delegateCount++, 0, handleObj );
+			} else {
+				handlers.push( handleObj );
+			}
+
+			// Keep track of which events have ever been used, for event optimization
+			jQuery.event.global[ type ] = true;
+		}
+
+	},
+
+	// Detach an event or set of events from an element
+	remove: function( elem, types, handler, selector, mappedTypes ) {
+
+		var j, origCount, tmp,
+			events, t, handleObj,
+			special, handlers, type, namespaces, origType,
+			elemData = dataPriv.hasData( elem ) && dataPriv.get( elem );
+
+		if ( !elemData || !( events = elemData.events ) ) {
+			return;
+		}
+
+		// Once for each type.namespace in types; type may be omitted
+		types = ( types || "" ).match( rnothtmlwhite ) || [ "" ];
+		t = types.length;
+		while ( t-- ) {
+			tmp = rtypenamespace.exec( types[ t ] ) || [];
+			type = origType = tmp[ 1 ];
+			namespaces = ( tmp[ 2 ] || "" ).split( "." ).sort();
+
+			// Unbind all events (on this namespace, if provided) for the element
+			if ( !type ) {
+				for ( type in events ) {
+					jQuery.event.remove( elem, type + types[ t ], handler, selector, true );
+				}
+				continue;
+			}
+
+			special = jQuery.event.special[ type ] || {};
+			type = ( selector ? special.delegateType : special.bindType ) || type;
+			handlers = events[ type ] || [];
+			tmp = tmp[ 2 ] &&
+				new RegExp( "(^|\\.)" + namespaces.join( "\\.(?:.*\\.|)" ) + "(\\.|$)" );
+
+			// Remove matching events
+			origCount = j = handlers.length;
+			while ( j-- ) {
+				handleObj = handlers[ j ];
+
+				if ( ( mappedTypes || origType === handleObj.origType ) &&
+					( !handler || handler.guid === handleObj.guid ) &&
+					( !tmp || tmp.test( handleObj.namespace ) ) &&
+					( !selector || selector === handleObj.selector ||
+						selector === "**" && handleObj.selector ) ) {
+					handlers.splice( j, 1 );
+
+					if ( handleObj.selector ) {
+						handlers.delegateCount--;
+					}
+					if ( special.remove ) {
+						special.remove.call( elem, handleObj );
+					}
+				}
+			}
+
+			// Remove generic event handler if we removed something and no more handlers exist
+			// (avoids potential for endless recursion during removal of special event handlers)
+			if ( origCount && !handlers.length ) {
+				if ( !special.teardown ||
+					special.teardown.call( elem, namespaces, elemData.handle ) === false ) {
+
+					jQuery.removeEvent( elem, type, elemData.handle );
+				}
+
+				delete events[ type ];
+			}
+		}
+
+		// Remove data and the expando if it's no longer used
+		if ( jQuery.isEmptyObject( events ) ) {
+			dataPriv.remove( elem, "handle events" );
+		}
+	},
+
+	dispatch: function( nativeEvent ) {
+
+		// Make a writable jQuery.Event from the native event object
+		var event = jQuery.event.fix( nativeEvent );
+
+		var i, j, ret, matched, handleObj, handlerQueue,
+			args = new Array( arguments.length ),
+			handlers = ( dataPriv.get( this, "events" ) || {} )[ event.type ] || [],
+			special = jQuery.event.special[ event.type ] || {};
+
+		// Use the fix-ed jQuery.Event rather than the (read-only) native event
+		args[ 0 ] = event;
+
+		for ( i = 1; i < arguments.length; i++ ) {
+			args[ i ] = arguments[ i ];
+		}
+
+		event.delegateTarget = this;
+
+		// Call the preDispatch hook for the mapped type, and let it bail if desired
+		if ( special.preDispatch && special.preDispatch.call( this, event ) === false ) {
+			return;
+		}
+
+		// Determine handlers
+		handlerQueue = jQuery.event.handlers.call( this, event, handlers );
+
+		// Run delegates first; they may want to stop propagation beneath us
+		i = 0;
+		while ( ( matched = handlerQueue[ i++ ] ) && !event.isPropagationStopped() ) {
+			event.currentTarget = matched.elem;
+
+			j = 0;
+			while ( ( handleObj = matched.handlers[ j++ ] ) &&
+				!event.isImmediatePropagationStopped() ) {
+
+				// If the event is namespaced, then each handler is only invoked if it is
+				// specially universal or its namespaces are a superset of the event's.
+				if ( !event.rnamespace || handleObj.namespace === false ||
+					event.rnamespace.test( handleObj.namespace ) ) {
+
+					event.handleObj = handleObj;
+					event.data = handleObj.data;
+
+					ret = ( ( jQuery.event.special[ handleObj.origType ] || {} ).handle ||
+						handleObj.handler ).apply( matched.elem, args );
+
+					if ( ret !== undefined ) {
+						if ( ( event.result = ret ) === false ) {
+							event.preventDefault();
+							event.stopPropagation();
+						}
+					}
+				}
+			}
+		}
+
+		// Call the postDispatch hook for the mapped type
+		if ( special.postDispatch ) {
+			special.postDispatch.call( this, event );
+		}
+
+		return event.result;
+	},
+
+	handlers: function( event, handlers ) {
+		var i, handleObj, sel, matchedHandlers, matchedSelectors,
+			handlerQueue = [],
+			delegateCount = handlers.delegateCount,
+			cur = event.target;
+
+		// Find delegate handlers
+		if ( delegateCount &&
+
+			// Support: IE <=9
+			// Black-hole SVG  instance trees (trac-13180)
+			cur.nodeType &&
+
+			// Support: Firefox <=42
+			// Suppress spec-violating clicks indicating a non-primary pointer button (trac-3861)
+			// https://www.w3.org/TR/DOM-Level-3-Events/#event-type-click
+			// Support: IE 11 only
+			// ...but not arrow key "clicks" of radio inputs, which can have `button` -1 (gh-2343)
+			!( event.type === "click" && event.button >= 1 ) ) {
+
+			for ( ; cur !== this; cur = cur.parentNode || this ) {
+
+				// Don't check non-elements (#13208)
+				// Don't process clicks on disabled elements (#6911, #8165, #11382, #11764)
+				if ( cur.nodeType === 1 && !( event.type === "click" && cur.disabled === true ) ) {
+					matchedHandlers = [];
+					matchedSelectors = {};
+					for ( i = 0; i < delegateCount; i++ ) {
+						handleObj = handlers[ i ];
+
+						// Don't conflict with Object.prototype properties (#13203)
+						sel = handleObj.selector + " ";
+
+						if ( matchedSelectors[ sel ] === undefined ) {
+							matchedSelectors[ sel ] = handleObj.needsContext ?
+								jQuery( sel, this ).index( cur ) > -1 :
+								jQuery.find( sel, this, null, [ cur ] ).length;
+						}
+						if ( matchedSelectors[ sel ] ) {
+							matchedHandlers.push( handleObj );
+						}
+					}
+					if ( matchedHandlers.length ) {
+						handlerQueue.push( { elem: cur, handlers: matchedHandlers } );
+					}
+				}
+			}
+		}
+
+		// Add the remaining (directly-bound) handlers
+		cur = this;
+		if ( delegateCount < handlers.length ) {
+			handlerQueue.push( { elem: cur, handlers: handlers.slice( delegateCount ) } );
+		}
+
+		return handlerQueue;
+	},
+
+	addProp: function( name, hook ) {
+		Object.defineProperty( jQuery.Event.prototype, name, {
+			enumerable: true,
+			configurable: true,
+
+			get: isFunction( hook ) ?
+				function() {
+					if ( this.originalEvent ) {
+							return hook( this.originalEvent );
+					}
+				} :
+				function() {
+					if ( this.originalEvent ) {
+							return this.originalEvent[ name ];
+					}
+				},
+
+			set: function( value ) {
+				Object.defineProperty( this, name, {
+					enumerable: true,
+					configurable: true,
+					writable: true,
+					value: value
+				} );
+			}
+		} );
+	},
+
+	fix: function( originalEvent ) {
+		return originalEvent[ jQuery.expando ] ?
+			originalEvent :
+			new jQuery.Event( originalEvent );
+	},
+
+	special: {
+		load: {
+
+			// Prevent triggered image.load events from bubbling to window.load
+			noBubble: true
+		},
+		click: {
+
+			// Utilize native event to ensure correct state for checkable inputs
+			setup: function( data ) {
+
+				// For mutual compressibility with _default, replace `this` access with a local var.
+				// `|| data` is dead code meant only to preserve the variable through minification.
+				var el = this || data;
+
+				// Claim the first handler
+				if ( rcheckableType.test( el.type ) &&
+					el.click && nodeName( el, "input" ) ) {
+
+					// dataPriv.set( el, "click", ... )
+					leverageNative( el, "click", returnTrue );
+				}
+
+				// Return false to allow normal processing in the caller
+				return false;
+			},
+			trigger: function( data ) {
+
+				// For mutual compressibility with _default, replace `this` access with a local var.
+				// `|| data` is dead code meant only to preserve the variable through minification.
+				var el = this || data;
+
+				// Force setup before triggering a click
+				if ( rcheckableType.test( el.type ) &&
+					el.click && nodeName( el, "input" ) ) {
+
+					leverageNative( el, "click" );
+				}
+
+				// Return non-false to allow normal event-path propagation
+				return true;
+			},
+
+			// For cross-browser consistency, suppress native .click() on links
+			// Also prevent it if we're currently inside a leveraged native-event stack
+			_default: function( event ) {
+				var target = event.target;
+				return rcheckableType.test( target.type ) &&
+					target.click && nodeName( target, "input" ) &&
+					dataPriv.get( target, "click" ) ||
+					nodeName( target, "a" );
+			}
+		},
+
+		beforeunload: {
+			postDispatch: function( event ) {
+
+				// Support: Firefox 20+
+				// Firefox doesn't alert if the returnValue field is not set.
+				if ( event.result !== undefined && event.originalEvent ) {
+					event.originalEvent.returnValue = event.result;
+				}
+			}
+		}
+	}
+};
+
+// Ensure the presence of an event listener that handles manually-triggered
+// synthetic events by interrupting progress until reinvoked in response to
+// *native* events that it fires directly, ensuring that state changes have
+// already occurred before other listeners are invoked.
+function leverageNative( el, type, expectSync ) {
+
+	// Missing expectSync indicates a trigger call, which must force setup through jQuery.event.add
+	if ( !expectSync ) {
+		if ( dataPriv.get( el, type ) === undefined ) {
+			jQuery.event.add( el, type, returnTrue );
+		}
+		return;
+	}
+
+	// Register the controller as a special universal handler for all event namespaces
+	dataPriv.set( el, type, false );
+	jQuery.event.add( el, type, {
+		namespace: false,
+		handler: function( event ) {
+			var notAsync, result,
+				saved = dataPriv.get( this, type );
+
+			if ( ( event.isTrigger & 1 ) && this[ type ] ) {
+
+				// Interrupt processing of the outer synthetic .trigger()ed event
+				// Saved data should be false in such cases, but might be a leftover capture object
+				// from an async native handler (gh-4350)
+				if ( !saved.length ) {
+
+					// Store arguments for use when handling the inner native event
+					// There will always be at least one argument (an event object), so this array
+					// will not be confused with a leftover capture object.
+					saved = slice.call( arguments );
+					dataPriv.set( this, type, saved );
+
+					// Trigger the native event and capture its result
+					// Support: IE <=9 - 11+
+					// focus() and blur() are asynchronous
+					notAsync = expectSync( this, type );
+					this[ type ]();
+					result = dataPriv.get( this, type );
+					if ( saved !== result || notAsync ) {
+						dataPriv.set( this, type, false );
+					} else {
+						result = {};
+					}
+					if ( saved !== result ) {
+
+						// Cancel the outer synthetic event
+						event.stopImmediatePropagation();
+						event.preventDefault();
+						return result.value;
+					}
+
+				// If this is an inner synthetic event for an event with a bubbling surrogate
+				// (focus or blur), assume that the surrogate already propagated from triggering the
+				// native event and prevent that from happening again here.
+				// This technically gets the ordering wrong w.r.t. to `.trigger()` (in which the
+				// bubbling surrogate propagates *after* the non-bubbling base), but that seems
+				// less bad than duplication.
+				} else if ( ( jQuery.event.special[ type ] || {} ).delegateType ) {
+					event.stopPropagation();
+				}
+
+			// If this is a native event triggered above, everything is now in order
+			// Fire an inner synthetic event with the original arguments
+			} else if ( saved.length ) {
+
+				// ...and capture the result
+				dataPriv.set( this, type, {
+					value: jQuery.event.trigger(
+
+						// Support: IE <=9 - 11+
+						// Extend with the prototype to reset the above stopImmediatePropagation()
+						jQuery.extend( saved[ 0 ], jQuery.Event.prototype ),
+						saved.slice( 1 ),
+						this
+					)
+				} );
+
+				// Abort handling of the native event
+				event.stopImmediatePropagation();
+			}
+		}
+	} );
+}
+
+jQuery.removeEvent = function( elem, type, handle ) {
+
+	// This "if" is needed for plain objects
+	if ( elem.removeEventListener ) {
+		elem.removeEventListener( type, handle );
+	}
+};
+
+jQuery.Event = function( src, props ) {
+
+	// Allow instantiation without the 'new' keyword
+	if ( !( this instanceof jQuery.Event ) ) {
+		return new jQuery.Event( src, props );
+	}
+
+	// Event object
+	if ( src && src.type ) {
+		this.originalEvent = src;
+		this.type = src.type;
+
+		// Events bubbling up the document may have been marked as prevented
+		// by a handler lower down the tree; reflect the correct value.
+		this.isDefaultPrevented = src.defaultPrevented ||
+				src.defaultPrevented === undefined &&
+
+				// Support: Android <=2.3 only
+				src.returnValue === false ?
+			returnTrue :
+			returnFalse;
+
+		// Create target properties
+		// Support: Safari <=6 - 7 only
+		// Target should not be a text node (#504, #13143)
+		this.target = ( src.target && src.target.nodeType === 3 ) ?
+			src.target.parentNode :
+			src.target;
+
+		this.currentTarget = src.currentTarget;
+		this.relatedTarget = src.relatedTarget;
+
+	// Event type
+	} else {
+		this.type = src;
+	}
+
+	// Put explicitly provided properties onto the event object
+	if ( props ) {
+		jQuery.extend( this, props );
+	}
+
+	// Create a timestamp if incoming event doesn't have one
+	this.timeStamp = src && src.timeStamp || Date.now();
+
+	// Mark it as fixed
+	this[ jQuery.expando ] = true;
+};
+
+// jQuery.Event is based on DOM3 Events as specified by the ECMAScript Language Binding
+// https://www.w3.org/TR/2003/WD-DOM-Level-3-Events-20030331/ecma-script-binding.html
+jQuery.Event.prototype = {
+	constructor: jQuery.Event,
+	isDefaultPrevented: returnFalse,
+	isPropagationStopped: returnFalse,
+	isImmediatePropagationStopped: returnFalse,
+	isSimulated: false,
+
+	preventDefault: function() {
+		var e = this.originalEvent;
+
+		this.isDefaultPrevented = returnTrue;
+
+		if ( e && !this.isSimulated ) {
+			e.preventDefault();
+		}
+	},
+	stopPropagation: function() {
+		var e = this.originalEvent;
+
+		this.isPropagationStopped = returnTrue;
+
+		if ( e && !this.isSimulated ) {
+			e.stopPropagation();
+		}
+	},
+	stopImmediatePropagation: function() {
+		var e = this.originalEvent;
+
+		this.isImmediatePropagationStopped = returnTrue;
+
+		if ( e && !this.isSimulated ) {
+			e.stopImmediatePropagation();
+		}
+
+		this.stopPropagation();
+	}
+};
+
+// Includes all common event props including KeyEvent and MouseEvent specific props
+jQuery.each( {
+	altKey: true,
+	bubbles: true,
+	cancelable: true,
+	changedTouches: true,
+	ctrlKey: true,
+	detail: true,
+	eventPhase: true,
+	metaKey: true,
+	pageX: true,
+	pageY: true,
+	shiftKey: true,
+	view: true,
+	"char": true,
+	code: true,
+	charCode: true,
+	key: true,
+	keyCode: true,
+	button: true,
+	buttons: true,
+	clientX: true,
+	clientY: true,
+	offsetX: true,
+	offsetY: true,
+	pointerId: true,
+	pointerType: true,
+	screenX: true,
+	screenY: true,
+	targetTouches: true,
+	toElement: true,
+	touches: true,
+
+	which: function( event ) {
+		var button = event.button;
+
+		// Add which for key events
+		if ( event.which == null && rkeyEvent.test( event.type ) ) {
+			return event.charCode != null ? event.charCode : event.keyCode;
+		}
+
+		// Add which for click: 1 === left; 2 === middle; 3 === right
+		if ( !event.which && button !== undefined && rmouseEvent.test( event.type ) ) {
+			if ( button & 1 ) {
+				return 1;
+			}
+
+			if ( button & 2 ) {
+				return 3;
+			}
+
+			if ( button & 4 ) {
+				return 2;
+			}
+
+			return 0;
+		}
+
+		return event.which;
+	}
+}, jQuery.event.addProp );
+
+jQuery.each( { focus: "focusin", blur: "focusout" }, function( type, delegateType ) {
+	jQuery.event.special[ type ] = {
+
+		// Utilize native event if possible so blur/focus sequence is correct
+		setup: function() {
+
+			// Claim the first handler
+			// dataPriv.set( this, "focus", ... )
+			// dataPriv.set( this, "blur", ... )
+			leverageNative( this, type, expectSync );
+
+			// Return false to allow normal processing in the caller
+			return false;
+		},
+		trigger: function() {
+
+			// Force setup before trigger
+			leverageNative( this, type );
+
+			// Return non-false to allow normal event-path propagation
+			return true;
+		},
+
+		delegateType: delegateType
+	};
+} );
+
+// Create mouseenter/leave events using mouseover/out and event-time checks
+// so that event delegation works in jQuery.
+// Do the same for pointerenter/pointerleave and pointerover/pointerout
+//
+// Support: Safari 7 only
+// Safari sends mouseenter too often; see:
+// https://bugs.chromium.org/p/chromium/issues/detail?id=470258
+// for the description of the bug (it existed in older Chrome versions as well).
+jQuery.each( {
+	mouseenter: "mouseover",
+	mouseleave: "mouseout",
+	pointerenter: "pointerover",
+	pointerleave: "pointerout"
+}, function( orig, fix ) {
+	jQuery.event.special[ orig ] = {
+		delegateType: fix,
+		bindType: fix,
+
+		handle: function( event ) {
+			var ret,
+				target = this,
+				related = event.relatedTarget,
+				handleObj = event.handleObj;
+
+			// For mouseenter/leave call the handler if related is outside the target.
+			// NB: No relatedTarget if the mouse left/entered the browser window
+			if ( !related || ( related !== target && !jQuery.contains( target, related ) ) ) {
+				event.type = handleObj.origType;
+				ret = handleObj.handler.apply( this, arguments );
+				event.type = fix;
+			}
+			return ret;
+		}
+	};
+} );
+
+jQuery.fn.extend( {
+
+	on: function( types, selector, data, fn ) {
+		return on( this, types, selector, data, fn );
+	},
+	one: function( types, selector, data, fn ) {
+		return on( this, types, selector, data, fn, 1 );
+	},
+	off: function( types, selector, fn ) {
+		var handleObj, type;
+		if ( types && types.preventDefault && types.handleObj ) {
+
+			// ( event )  dispatched jQuery.Event
+			handleObj = types.handleObj;
+			jQuery( types.delegateTarget ).off(
+				handleObj.namespace ?
+					handleObj.origType + "." + handleObj.namespace :
+					handleObj.origType,
+				handleObj.selector,
+				handleObj.handler
+			);
+			return this;
+		}
+		if ( typeof types === "object" ) {
+
+			// ( types-object [, selector] )
+			for ( type in types ) {
+				this.off( type, selector, types[ type ] );
+			}
+			return this;
+		}
+		if ( selector === false || typeof selector === "function" ) {
+
+			// ( types [, fn] )
+			fn = selector;
+			selector = undefined;
+		}
+		if ( fn === false ) {
+			fn = returnFalse;
+		}
+		return this.each( function() {
+			jQuery.event.remove( this, types, fn, selector );
+		} );
+	}
+} );
+
+
+var
+
+	/* eslint-disable max-len */
+
+	// See https://github.com/eslint/eslint/issues/3229
+	rxhtmlTag = /<(?!area|br|col|embed|hr|img|input|link|meta|param)(([a-z][^\/\0>\x20\t\r\n\f]*)[^>]*)\/>/gi,
+
+	/* eslint-enable */
+
+	// Support: IE <=10 - 11, Edge 12 - 13 only
+	// In IE/Edge using regex groups here causes severe slowdowns.
+	// See https://connect.microsoft.com/IE/feedback/details/1736512/
+	rnoInnerhtml = /\s*$/g;
+
+// Prefer a tbody over its parent table for containing new rows
+function manipulationTarget( elem, content ) {
+	if ( nodeName( elem, "table" ) &&
+		nodeName( content.nodeType !== 11 ? content : content.firstChild, "tr" ) ) {
+
+		return jQuery( elem ).children( "tbody" )[ 0 ] || elem;
+	}
+
+	return elem;
+}
+
+// Replace/restore the type attribute of script elements for safe DOM manipulation
+function disableScript( elem ) {
+	elem.type = ( elem.getAttribute( "type" ) !== null ) + "/" + elem.type;
+	return elem;
+}
+function restoreScript( elem ) {
+	if ( ( elem.type || "" ).slice( 0, 5 ) === "true/" ) {
+		elem.type = elem.type.slice( 5 );
+	} else {
+		elem.removeAttribute( "type" );
+	}
+
+	return elem;
+}
+
+function cloneCopyEvent( src, dest ) {
+	var i, l, type, pdataOld, pdataCur, udataOld, udataCur, events;
+
+	if ( dest.nodeType !== 1 ) {
+		return;
+	}
+
+	// 1. Copy private data: events, handlers, etc.
+	if ( dataPriv.hasData( src ) ) {
+		pdataOld = dataPriv.access( src );
+		pdataCur = dataPriv.set( dest, pdataOld );
+		events = pdataOld.events;
+
+		if ( events ) {
+			delete pdataCur.handle;
+			pdataCur.events = {};
+
+			for ( type in events ) {
+				for ( i = 0, l = events[ type ].length; i < l; i++ ) {
+					jQuery.event.add( dest, type, events[ type ][ i ] );
+				}
+			}
+		}
+	}
+
+	// 2. Copy user data
+	if ( dataUser.hasData( src ) ) {
+		udataOld = dataUser.access( src );
+		udataCur = jQuery.extend( {}, udataOld );
+
+		dataUser.set( dest, udataCur );
+	}
+}
+
+// Fix IE bugs, see support tests
+function fixInput( src, dest ) {
+	var nodeName = dest.nodeName.toLowerCase();
+
+	// Fails to persist the checked state of a cloned checkbox or radio button.
+	if ( nodeName === "input" && rcheckableType.test( src.type ) ) {
+		dest.checked = src.checked;
+
+	// Fails to return the selected option to the default selected state when cloning options
+	} else if ( nodeName === "input" || nodeName === "textarea" ) {
+		dest.defaultValue = src.defaultValue;
+	}
+}
+
+function domManip( collection, args, callback, ignored ) {
+
+	// Flatten any nested arrays
+	args = concat.apply( [], args );
+
+	var fragment, first, scripts, hasScripts, node, doc,
+		i = 0,
+		l = collection.length,
+		iNoClone = l - 1,
+		value = args[ 0 ],
+		valueIsFunction = isFunction( value );
+
+	// We can't cloneNode fragments that contain checked, in WebKit
+	if ( valueIsFunction ||
+			( l > 1 && typeof value === "string" &&
+				!support.checkClone && rchecked.test( value ) ) ) {
+		return collection.each( function( index ) {
+			var self = collection.eq( index );
+			if ( valueIsFunction ) {
+				args[ 0 ] = value.call( this, index, self.html() );
+			}
+			domManip( self, args, callback, ignored );
+		} );
+	}
+
+	if ( l ) {
+		fragment = buildFragment( args, collection[ 0 ].ownerDocument, false, collection, ignored );
+		first = fragment.firstChild;
+
+		if ( fragment.childNodes.length === 1 ) {
+			fragment = first;
+		}
+
+		// Require either new content or an interest in ignored elements to invoke the callback
+		if ( first || ignored ) {
+			scripts = jQuery.map( getAll( fragment, "script" ), disableScript );
+			hasScripts = scripts.length;
+
+			// Use the original fragment for the last item
+			// instead of the first because it can end up
+			// being emptied incorrectly in certain situations (#8070).
+			for ( ; i < l; i++ ) {
+				node = fragment;
+
+				if ( i !== iNoClone ) {
+					node = jQuery.clone( node, true, true );
+
+					// Keep references to cloned scripts for later restoration
+					if ( hasScripts ) {
+
+						// Support: Android <=4.0 only, PhantomJS 1 only
+						// push.apply(_, arraylike) throws on ancient WebKit
+						jQuery.merge( scripts, getAll( node, "script" ) );
+					}
+				}
+
+				callback.call( collection[ i ], node, i );
+			}
+
+			if ( hasScripts ) {
+				doc = scripts[ scripts.length - 1 ].ownerDocument;
+
+				// Reenable scripts
+				jQuery.map( scripts, restoreScript );
+
+				// Evaluate executable scripts on first document insertion
+				for ( i = 0; i < hasScripts; i++ ) {
+					node = scripts[ i ];
+					if ( rscriptType.test( node.type || "" ) &&
+						!dataPriv.access( node, "globalEval" ) &&
+						jQuery.contains( doc, node ) ) {
+
+						if ( node.src && ( node.type || "" ).toLowerCase()  !== "module" ) {
+
+							// Optional AJAX dependency, but won't run scripts if not present
+							if ( jQuery._evalUrl && !node.noModule ) {
+								jQuery._evalUrl( node.src, {
+									nonce: node.nonce || node.getAttribute( "nonce" )
+								} );
+							}
+						} else {
+							DOMEval( node.textContent.replace( rcleanScript, "" ), node, doc );
+						}
+					}
+				}
+			}
+		}
+	}
+
+	return collection;
+}
+
+function remove( elem, selector, keepData ) {
+	var node,
+		nodes = selector ? jQuery.filter( selector, elem ) : elem,
+		i = 0;
+
+	for ( ; ( node = nodes[ i ] ) != null; i++ ) {
+		if ( !keepData && node.nodeType === 1 ) {
+			jQuery.cleanData( getAll( node ) );
+		}
+
+		if ( node.parentNode ) {
+			if ( keepData && isAttached( node ) ) {
+				setGlobalEval( getAll( node, "script" ) );
+			}
+			node.parentNode.removeChild( node );
+		}
+	}
+
+	return elem;
+}
+
+jQuery.extend( {
+	htmlPrefilter: function( html ) {
+		return html.replace( rxhtmlTag, "<$1>" );
+	},
+
+	clone: function( elem, dataAndEvents, deepDataAndEvents ) {
+		var i, l, srcElements, destElements,
+			clone = elem.cloneNode( true ),
+			inPage = isAttached( elem );
+
+		// Fix IE cloning issues
+		if ( !support.noCloneChecked && ( elem.nodeType === 1 || elem.nodeType === 11 ) &&
+				!jQuery.isXMLDoc( elem ) ) {
+
+			// We eschew Sizzle here for performance reasons: https://jsperf.com/getall-vs-sizzle/2
+			destElements = getAll( clone );
+			srcElements = getAll( elem );
+
+			for ( i = 0, l = srcElements.length; i < l; i++ ) {
+				fixInput( srcElements[ i ], destElements[ i ] );
+			}
+		}
+
+		// Copy the events from the original to the clone
+		if ( dataAndEvents ) {
+			if ( deepDataAndEvents ) {
+				srcElements = srcElements || getAll( elem );
+				destElements = destElements || getAll( clone );
+
+				for ( i = 0, l = srcElements.length; i < l; i++ ) {
+					cloneCopyEvent( srcElements[ i ], destElements[ i ] );
+				}
+			} else {
+				cloneCopyEvent( elem, clone );
+			}
+		}
+
+		// Preserve script evaluation history
+		destElements = getAll( clone, "script" );
+		if ( destElements.length > 0 ) {
+			setGlobalEval( destElements, !inPage && getAll( elem, "script" ) );
+		}
+
+		// Return the cloned set
+		return clone;
+	},
+
+	cleanData: function( elems ) {
+		var data, elem, type,
+			special = jQuery.event.special,
+			i = 0;
+
+		for ( ; ( elem = elems[ i ] ) !== undefined; i++ ) {
+			if ( acceptData( elem ) ) {
+				if ( ( data = elem[ dataPriv.expando ] ) ) {
+					if ( data.events ) {
+						for ( type in data.events ) {
+							if ( special[ type ] ) {
+								jQuery.event.remove( elem, type );
+
+							// This is a shortcut to avoid jQuery.event.remove's overhead
+							} else {
+								jQuery.removeEvent( elem, type, data.handle );
+							}
+						}
+					}
+
+					// Support: Chrome <=35 - 45+
+					// Assign undefined instead of using delete, see Data#remove
+					elem[ dataPriv.expando ] = undefined;
+				}
+				if ( elem[ dataUser.expando ] ) {
+
+					// Support: Chrome <=35 - 45+
+					// Assign undefined instead of using delete, see Data#remove
+					elem[ dataUser.expando ] = undefined;
+				}
+			}
+		}
+	}
+} );
+
+jQuery.fn.extend( {
+	detach: function( selector ) {
+		return remove( this, selector, true );
+	},
+
+	remove: function( selector ) {
+		return remove( this, selector );
+	},
+
+	text: function( value ) {
+		return access( this, function( value ) {
+			return value === undefined ?
+				jQuery.text( this ) :
+				this.empty().each( function() {
+					if ( this.nodeType === 1 || this.nodeType === 11 || this.nodeType === 9 ) {
+						this.textContent = value;
+					}
+				} );
+		}, null, value, arguments.length );
+	},
+
+	append: function() {
+		return domManip( this, arguments, function( elem ) {
+			if ( this.nodeType === 1 || this.nodeType === 11 || this.nodeType === 9 ) {
+				var target = manipulationTarget( this, elem );
+				target.appendChild( elem );
+			}
+		} );
+	},
+
+	prepend: function() {
+		return domManip( this, arguments, function( elem ) {
+			if ( this.nodeType === 1 || this.nodeType === 11 || this.nodeType === 9 ) {
+				var target = manipulationTarget( this, elem );
+				target.insertBefore( elem, target.firstChild );
+			}
+		} );
+	},
+
+	before: function() {
+		return domManip( this, arguments, function( elem ) {
+			if ( this.parentNode ) {
+				this.parentNode.insertBefore( elem, this );
+			}
+		} );
+	},
+
+	after: function() {
+		return domManip( this, arguments, function( elem ) {
+			if ( this.parentNode ) {
+				this.parentNode.insertBefore( elem, this.nextSibling );
+			}
+		} );
+	},
+
+	empty: function() {
+		var elem,
+			i = 0;
+
+		for ( ; ( elem = this[ i ] ) != null; i++ ) {
+			if ( elem.nodeType === 1 ) {
+
+				// Prevent memory leaks
+				jQuery.cleanData( getAll( elem, false ) );
+
+				// Remove any remaining nodes
+				elem.textContent = "";
+			}
+		}
+
+		return this;
+	},
+
+	clone: function( dataAndEvents, deepDataAndEvents ) {
+		dataAndEvents = dataAndEvents == null ? false : dataAndEvents;
+		deepDataAndEvents = deepDataAndEvents == null ? dataAndEvents : deepDataAndEvents;
+
+		return this.map( function() {
+			return jQuery.clone( this, dataAndEvents, deepDataAndEvents );
+		} );
+	},
+
+	html: function( value ) {
+		return access( this, function( value ) {
+			var elem = this[ 0 ] || {},
+				i = 0,
+				l = this.length;
+
+			if ( value === undefined && elem.nodeType === 1 ) {
+				return elem.innerHTML;
+			}
+
+			// See if we can take a shortcut and just use innerHTML
+			if ( typeof value === "string" && !rnoInnerhtml.test( value ) &&
+				!wrapMap[ ( rtagName.exec( value ) || [ "", "" ] )[ 1 ].toLowerCase() ] ) {
+
+				value = jQuery.htmlPrefilter( value );
+
+				try {
+					for ( ; i < l; i++ ) {
+						elem = this[ i ] || {};
+
+						// Remove element nodes and prevent memory leaks
+						if ( elem.nodeType === 1 ) {
+							jQuery.cleanData( getAll( elem, false ) );
+							elem.innerHTML = value;
+						}
+					}
+
+					elem = 0;
+
+				// If using innerHTML throws an exception, use the fallback method
+				} catch ( e ) {}
+			}
+
+			if ( elem ) {
+				this.empty().append( value );
+			}
+		}, null, value, arguments.length );
+	},
+
+	replaceWith: function() {
+		var ignored = [];
+
+		// Make the changes, replacing each non-ignored context element with the new content
+		return domManip( this, arguments, function( elem ) {
+			var parent = this.parentNode;
+
+			if ( jQuery.inArray( this, ignored ) < 0 ) {
+				jQuery.cleanData( getAll( this ) );
+				if ( parent ) {
+					parent.replaceChild( elem, this );
+				}
+			}
+
+		// Force callback invocation
+		}, ignored );
+	}
+} );
+
+jQuery.each( {
+	appendTo: "append",
+	prependTo: "prepend",
+	insertBefore: "before",
+	insertAfter: "after",
+	replaceAll: "replaceWith"
+}, function( name, original ) {
+	jQuery.fn[ name ] = function( selector ) {
+		var elems,
+			ret = [],
+			insert = jQuery( selector ),
+			last = insert.length - 1,
+			i = 0;
+
+		for ( ; i <= last; i++ ) {
+			elems = i === last ? this : this.clone( true );
+			jQuery( insert[ i ] )[ original ]( elems );
+
+			// Support: Android <=4.0 only, PhantomJS 1 only
+			// .get() because push.apply(_, arraylike) throws on ancient WebKit
+			push.apply( ret, elems.get() );
+		}
+
+		return this.pushStack( ret );
+	};
+} );
+var rnumnonpx = new RegExp( "^(" + pnum + ")(?!px)[a-z%]+$", "i" );
+
+var getStyles = function( elem ) {
+
+		// Support: IE <=11 only, Firefox <=30 (#15098, #14150)
+		// IE throws on elements created in popups
+		// FF meanwhile throws on frame elements through "defaultView.getComputedStyle"
+		var view = elem.ownerDocument.defaultView;
+
+		if ( !view || !view.opener ) {
+			view = window;
+		}
+
+		return view.getComputedStyle( elem );
+	};
+
+var rboxStyle = new RegExp( cssExpand.join( "|" ), "i" );
+
+
+
+( function() {
+
+	// Executing both pixelPosition & boxSizingReliable tests require only one layout
+	// so they're executed at the same time to save the second computation.
+	function computeStyleTests() {
+
+		// This is a singleton, we need to execute it only once
+		if ( !div ) {
+			return;
+		}
+
+		container.style.cssText = "position:absolute;left:-11111px;width:60px;" +
+			"margin-top:1px;padding:0;border:0";
+		div.style.cssText =
+			"position:relative;display:block;box-sizing:border-box;overflow:scroll;" +
+			"margin:auto;border:1px;padding:1px;" +
+			"width:60%;top:1%";
+		documentElement.appendChild( container ).appendChild( div );
+
+		var divStyle = window.getComputedStyle( div );
+		pixelPositionVal = divStyle.top !== "1%";
+
+		// Support: Android 4.0 - 4.3 only, Firefox <=3 - 44
+		reliableMarginLeftVal = roundPixelMeasures( divStyle.marginLeft ) === 12;
+
+		// Support: Android 4.0 - 4.3 only, Safari <=9.1 - 10.1, iOS <=7.0 - 9.3
+		// Some styles come back with percentage values, even though they shouldn't
+		div.style.right = "60%";
+		pixelBoxStylesVal = roundPixelMeasures( divStyle.right ) === 36;
+
+		// Support: IE 9 - 11 only
+		// Detect misreporting of content dimensions for box-sizing:border-box elements
+		boxSizingReliableVal = roundPixelMeasures( divStyle.width ) === 36;
+
+		// Support: IE 9 only
+		// Detect overflow:scroll screwiness (gh-3699)
+		// Support: Chrome <=64
+		// Don't get tricked when zoom affects offsetWidth (gh-4029)
+		div.style.position = "absolute";
+		scrollboxSizeVal = roundPixelMeasures( div.offsetWidth / 3 ) === 12;
+
+		documentElement.removeChild( container );
+
+		// Nullify the div so it wouldn't be stored in the memory and
+		// it will also be a sign that checks already performed
+		div = null;
+	}
+
+	function roundPixelMeasures( measure ) {
+		return Math.round( parseFloat( measure ) );
+	}
+
+	var pixelPositionVal, boxSizingReliableVal, scrollboxSizeVal, pixelBoxStylesVal,
+		reliableMarginLeftVal,
+		container = document.createElement( "div" ),
+		div = document.createElement( "div" );
+
+	// Finish early in limited (non-browser) environments
+	if ( !div.style ) {
+		return;
+	}
+
+	// Support: IE <=9 - 11 only
+	// Style of cloned element affects source element cloned (#8908)
+	div.style.backgroundClip = "content-box";
+	div.cloneNode( true ).style.backgroundClip = "";
+	support.clearCloneStyle = div.style.backgroundClip === "content-box";
+
+	jQuery.extend( support, {
+		boxSizingReliable: function() {
+			computeStyleTests();
+			return boxSizingReliableVal;
+		},
+		pixelBoxStyles: function() {
+			computeStyleTests();
+			return pixelBoxStylesVal;
+		},
+		pixelPosition: function() {
+			computeStyleTests();
+			return pixelPositionVal;
+		},
+		reliableMarginLeft: function() {
+			computeStyleTests();
+			return reliableMarginLeftVal;
+		},
+		scrollboxSize: function() {
+			computeStyleTests();
+			return scrollboxSizeVal;
+		}
+	} );
+} )();
+
+
+function curCSS( elem, name, computed ) {
+	var width, minWidth, maxWidth, ret,
+
+		// Support: Firefox 51+
+		// Retrieving style before computed somehow
+		// fixes an issue with getting wrong values
+		// on detached elements
+		style = elem.style;
+
+	computed = computed || getStyles( elem );
+
+	// getPropertyValue is needed for:
+	//   .css('filter') (IE 9 only, #12537)
+	//   .css('--customProperty) (#3144)
+	if ( computed ) {
+		ret = computed.getPropertyValue( name ) || computed[ name ];
+
+		if ( ret === "" && !isAttached( elem ) ) {
+			ret = jQuery.style( elem, name );
+		}
+
+		// A tribute to the "awesome hack by Dean Edwards"
+		// Android Browser returns percentage for some values,
+		// but width seems to be reliably pixels.
+		// This is against the CSSOM draft spec:
+		// https://drafts.csswg.org/cssom/#resolved-values
+		if ( !support.pixelBoxStyles() && rnumnonpx.test( ret ) && rboxStyle.test( name ) ) {
+
+			// Remember the original values
+			width = style.width;
+			minWidth = style.minWidth;
+			maxWidth = style.maxWidth;
+
+			// Put in the new values to get a computed value out
+			style.minWidth = style.maxWidth = style.width = ret;
+			ret = computed.width;
+
+			// Revert the changed values
+			style.width = width;
+			style.minWidth = minWidth;
+			style.maxWidth = maxWidth;
+		}
+	}
+
+	return ret !== undefined ?
+
+		// Support: IE <=9 - 11 only
+		// IE returns zIndex value as an integer.
+		ret + "" :
+		ret;
+}
+
+
+function addGetHookIf( conditionFn, hookFn ) {
+
+	// Define the hook, we'll check on the first run if it's really needed.
+	return {
+		get: function() {
+			if ( conditionFn() ) {
+
+				// Hook not needed (or it's not possible to use it due
+				// to missing dependency), remove it.
+				delete this.get;
+				return;
+			}
+
+			// Hook needed; redefine it so that the support test is not executed again.
+			return ( this.get = hookFn ).apply( this, arguments );
+		}
+	};
+}
+
+
+var cssPrefixes = [ "Webkit", "Moz", "ms" ],
+	emptyStyle = document.createElement( "div" ).style,
+	vendorProps = {};
+
+// Return a vendor-prefixed property or undefined
+function vendorPropName( name ) {
+
+	// Check for vendor prefixed names
+	var capName = name[ 0 ].toUpperCase() + name.slice( 1 ),
+		i = cssPrefixes.length;
+
+	while ( i-- ) {
+		name = cssPrefixes[ i ] + capName;
+		if ( name in emptyStyle ) {
+			return name;
+		}
+	}
+}
+
+// Return a potentially-mapped jQuery.cssProps or vendor prefixed property
+function finalPropName( name ) {
+	var final = jQuery.cssProps[ name ] || vendorProps[ name ];
+
+	if ( final ) {
+		return final;
+	}
+	if ( name in emptyStyle ) {
+		return name;
+	}
+	return vendorProps[ name ] = vendorPropName( name ) || name;
+}
+
+
+var
+
+	// Swappable if display is none or starts with table
+	// except "table", "table-cell", or "table-caption"
+	// See here for display values: https://developer.mozilla.org/en-US/docs/CSS/display
+	rdisplayswap = /^(none|table(?!-c[ea]).+)/,
+	rcustomProp = /^--/,
+	cssShow = { position: "absolute", visibility: "hidden", display: "block" },
+	cssNormalTransform = {
+		letterSpacing: "0",
+		fontWeight: "400"
+	};
+
+function setPositiveNumber( elem, value, subtract ) {
+
+	// Any relative (+/-) values have already been
+	// normalized at this point
+	var matches = rcssNum.exec( value );
+	return matches ?
+
+		// Guard against undefined "subtract", e.g., when used as in cssHooks
+		Math.max( 0, matches[ 2 ] - ( subtract || 0 ) ) + ( matches[ 3 ] || "px" ) :
+		value;
+}
+
+function boxModelAdjustment( elem, dimension, box, isBorderBox, styles, computedVal ) {
+	var i = dimension === "width" ? 1 : 0,
+		extra = 0,
+		delta = 0;
+
+	// Adjustment may not be necessary
+	if ( box === ( isBorderBox ? "border" : "content" ) ) {
+		return 0;
+	}
+
+	for ( ; i < 4; i += 2 ) {
+
+		// Both box models exclude margin
+		if ( box === "margin" ) {
+			delta += jQuery.css( elem, box + cssExpand[ i ], true, styles );
+		}
+
+		// If we get here with a content-box, we're seeking "padding" or "border" or "margin"
+		if ( !isBorderBox ) {
+
+			// Add padding
+			delta += jQuery.css( elem, "padding" + cssExpand[ i ], true, styles );
+
+			// For "border" or "margin", add border
+			if ( box !== "padding" ) {
+				delta += jQuery.css( elem, "border" + cssExpand[ i ] + "Width", true, styles );
+
+			// But still keep track of it otherwise
+			} else {
+				extra += jQuery.css( elem, "border" + cssExpand[ i ] + "Width", true, styles );
+			}
+
+		// If we get here with a border-box (content + padding + border), we're seeking "content" or
+		// "padding" or "margin"
+		} else {
+
+			// For "content", subtract padding
+			if ( box === "content" ) {
+				delta -= jQuery.css( elem, "padding" + cssExpand[ i ], true, styles );
+			}
+
+			// For "content" or "padding", subtract border
+			if ( box !== "margin" ) {
+				delta -= jQuery.css( elem, "border" + cssExpand[ i ] + "Width", true, styles );
+			}
+		}
+	}
+
+	// Account for positive content-box scroll gutter when requested by providing computedVal
+	if ( !isBorderBox && computedVal >= 0 ) {
+
+		// offsetWidth/offsetHeight is a rounded sum of content, padding, scroll gutter, and border
+		// Assuming integer scroll gutter, subtract the rest and round down
+		delta += Math.max( 0, Math.ceil(
+			elem[ "offset" + dimension[ 0 ].toUpperCase() + dimension.slice( 1 ) ] -
+			computedVal -
+			delta -
+			extra -
+			0.5
+
+		// If offsetWidth/offsetHeight is unknown, then we can't determine content-box scroll gutter
+		// Use an explicit zero to avoid NaN (gh-3964)
+		) ) || 0;
+	}
+
+	return delta;
+}
+
+function getWidthOrHeight( elem, dimension, extra ) {
+
+	// Start with computed style
+	var styles = getStyles( elem ),
+
+		// To avoid forcing a reflow, only fetch boxSizing if we need it (gh-4322).
+		// Fake content-box until we know it's needed to know the true value.
+		boxSizingNeeded = !support.boxSizingReliable() || extra,
+		isBorderBox = boxSizingNeeded &&
+			jQuery.css( elem, "boxSizing", false, styles ) === "border-box",
+		valueIsBorderBox = isBorderBox,
+
+		val = curCSS( elem, dimension, styles ),
+		offsetProp = "offset" + dimension[ 0 ].toUpperCase() + dimension.slice( 1 );
+
+	// Support: Firefox <=54
+	// Return a confounding non-pixel value or feign ignorance, as appropriate.
+	if ( rnumnonpx.test( val ) ) {
+		if ( !extra ) {
+			return val;
+		}
+		val = "auto";
+	}
+
+
+	// Fall back to offsetWidth/offsetHeight when value is "auto"
+	// This happens for inline elements with no explicit setting (gh-3571)
+	// Support: Android <=4.1 - 4.3 only
+	// Also use offsetWidth/offsetHeight for misreported inline dimensions (gh-3602)
+	// Support: IE 9-11 only
+	// Also use offsetWidth/offsetHeight for when box sizing is unreliable
+	// We use getClientRects() to check for hidden/disconnected.
+	// In those cases, the computed value can be trusted to be border-box
+	if ( ( !support.boxSizingReliable() && isBorderBox ||
+		val === "auto" ||
+		!parseFloat( val ) && jQuery.css( elem, "display", false, styles ) === "inline" ) &&
+		elem.getClientRects().length ) {
+
+		isBorderBox = jQuery.css( elem, "boxSizing", false, styles ) === "border-box";
+
+		// Where available, offsetWidth/offsetHeight approximate border box dimensions.
+		// Where not available (e.g., SVG), assume unreliable box-sizing and interpret the
+		// retrieved value as a content box dimension.
+		valueIsBorderBox = offsetProp in elem;
+		if ( valueIsBorderBox ) {
+			val = elem[ offsetProp ];
+		}
+	}
+
+	// Normalize "" and auto
+	val = parseFloat( val ) || 0;
+
+	// Adjust for the element's box model
+	return ( val +
+		boxModelAdjustment(
+			elem,
+			dimension,
+			extra || ( isBorderBox ? "border" : "content" ),
+			valueIsBorderBox,
+			styles,
+
+			// Provide the current computed size to request scroll gutter calculation (gh-3589)
+			val
+		)
+	) + "px";
+}
+
+jQuery.extend( {
+
+	// Add in style property hooks for overriding the default
+	// behavior of getting and setting a style property
+	cssHooks: {
+		opacity: {
+			get: function( elem, computed ) {
+				if ( computed ) {
+
+					// We should always get a number back from opacity
+					var ret = curCSS( elem, "opacity" );
+					return ret === "" ? "1" : ret;
+				}
+			}
+		}
+	},
+
+	// Don't automatically add "px" to these possibly-unitless properties
+	cssNumber: {
+		"animationIterationCount": true,
+		"columnCount": true,
+		"fillOpacity": true,
+		"flexGrow": true,
+		"flexShrink": true,
+		"fontWeight": true,
+		"gridArea": true,
+		"gridColumn": true,
+		"gridColumnEnd": true,
+		"gridColumnStart": true,
+		"gridRow": true,
+		"gridRowEnd": true,
+		"gridRowStart": true,
+		"lineHeight": true,
+		"opacity": true,
+		"order": true,
+		"orphans": true,
+		"widows": true,
+		"zIndex": true,
+		"zoom": true
+	},
+
+	// Add in properties whose names you wish to fix before
+	// setting or getting the value
+	cssProps: {},
+
+	// Get and set the style property on a DOM Node
+	style: function( elem, name, value, extra ) {
+
+		// Don't set styles on text and comment nodes
+		if ( !elem || elem.nodeType === 3 || elem.nodeType === 8 || !elem.style ) {
+			return;
+		}
+
+		// Make sure that we're working with the right name
+		var ret, type, hooks,
+			origName = camelCase( name ),
+			isCustomProp = rcustomProp.test( name ),
+			style = elem.style;
+
+		// Make sure that we're working with the right name. We don't
+		// want to query the value if it is a CSS custom property
+		// since they are user-defined.
+		if ( !isCustomProp ) {
+			name = finalPropName( origName );
+		}
+
+		// Gets hook for the prefixed version, then unprefixed version
+		hooks = jQuery.cssHooks[ name ] || jQuery.cssHooks[ origName ];
+
+		// Check if we're setting a value
+		if ( value !== undefined ) {
+			type = typeof value;
+
+			// Convert "+=" or "-=" to relative numbers (#7345)
+			if ( type === "string" && ( ret = rcssNum.exec( value ) ) && ret[ 1 ] ) {
+				value = adjustCSS( elem, name, ret );
+
+				// Fixes bug #9237
+				type = "number";
+			}
+
+			// Make sure that null and NaN values aren't set (#7116)
+			if ( value == null || value !== value ) {
+				return;
+			}
+
+			// If a number was passed in, add the unit (except for certain CSS properties)
+			// The isCustomProp check can be removed in jQuery 4.0 when we only auto-append
+			// "px" to a few hardcoded values.
+			if ( type === "number" && !isCustomProp ) {
+				value += ret && ret[ 3 ] || ( jQuery.cssNumber[ origName ] ? "" : "px" );
+			}
+
+			// background-* props affect original clone's values
+			if ( !support.clearCloneStyle && value === "" && name.indexOf( "background" ) === 0 ) {
+				style[ name ] = "inherit";
+			}
+
+			// If a hook was provided, use that value, otherwise just set the specified value
+			if ( !hooks || !( "set" in hooks ) ||
+				( value = hooks.set( elem, value, extra ) ) !== undefined ) {
+
+				if ( isCustomProp ) {
+					style.setProperty( name, value );
+				} else {
+					style[ name ] = value;
+				}
+			}
+
+		} else {
+
+			// If a hook was provided get the non-computed value from there
+			if ( hooks && "get" in hooks &&
+				( ret = hooks.get( elem, false, extra ) ) !== undefined ) {
+
+				return ret;
+			}
+
+			// Otherwise just get the value from the style object
+			return style[ name ];
+		}
+	},
+
+	css: function( elem, name, extra, styles ) {
+		var val, num, hooks,
+			origName = camelCase( name ),
+			isCustomProp = rcustomProp.test( name );
+
+		// Make sure that we're working with the right name. We don't
+		// want to modify the value if it is a CSS custom property
+		// since they are user-defined.
+		if ( !isCustomProp ) {
+			name = finalPropName( origName );
+		}
+
+		// Try prefixed name followed by the unprefixed name
+		hooks = jQuery.cssHooks[ name ] || jQuery.cssHooks[ origName ];
+
+		// If a hook was provided get the computed value from there
+		if ( hooks && "get" in hooks ) {
+			val = hooks.get( elem, true, extra );
+		}
+
+		// Otherwise, if a way to get the computed value exists, use that
+		if ( val === undefined ) {
+			val = curCSS( elem, name, styles );
+		}
+
+		// Convert "normal" to computed value
+		if ( val === "normal" && name in cssNormalTransform ) {
+			val = cssNormalTransform[ name ];
+		}
+
+		// Make numeric if forced or a qualifier was provided and val looks numeric
+		if ( extra === "" || extra ) {
+			num = parseFloat( val );
+			return extra === true || isFinite( num ) ? num || 0 : val;
+		}
+
+		return val;
+	}
+} );
+
+jQuery.each( [ "height", "width" ], function( i, dimension ) {
+	jQuery.cssHooks[ dimension ] = {
+		get: function( elem, computed, extra ) {
+			if ( computed ) {
+
+				// Certain elements can have dimension info if we invisibly show them
+				// but it must have a current display style that would benefit
+				return rdisplayswap.test( jQuery.css( elem, "display" ) ) &&
+
+					// Support: Safari 8+
+					// Table columns in Safari have non-zero offsetWidth & zero
+					// getBoundingClientRect().width unless display is changed.
+					// Support: IE <=11 only
+					// Running getBoundingClientRect on a disconnected node
+					// in IE throws an error.
+					( !elem.getClientRects().length || !elem.getBoundingClientRect().width ) ?
+						swap( elem, cssShow, function() {
+							return getWidthOrHeight( elem, dimension, extra );
+						} ) :
+						getWidthOrHeight( elem, dimension, extra );
+			}
+		},
+
+		set: function( elem, value, extra ) {
+			var matches,
+				styles = getStyles( elem ),
+
+				// Only read styles.position if the test has a chance to fail
+				// to avoid forcing a reflow.
+				scrollboxSizeBuggy = !support.scrollboxSize() &&
+					styles.position === "absolute",
+
+				// To avoid forcing a reflow, only fetch boxSizing if we need it (gh-3991)
+				boxSizingNeeded = scrollboxSizeBuggy || extra,
+				isBorderBox = boxSizingNeeded &&
+					jQuery.css( elem, "boxSizing", false, styles ) === "border-box",
+				subtract = extra ?
+					boxModelAdjustment(
+						elem,
+						dimension,
+						extra,
+						isBorderBox,
+						styles
+					) :
+					0;
+
+			// Account for unreliable border-box dimensions by comparing offset* to computed and
+			// faking a content-box to get border and padding (gh-3699)
+			if ( isBorderBox && scrollboxSizeBuggy ) {
+				subtract -= Math.ceil(
+					elem[ "offset" + dimension[ 0 ].toUpperCase() + dimension.slice( 1 ) ] -
+					parseFloat( styles[ dimension ] ) -
+					boxModelAdjustment( elem, dimension, "border", false, styles ) -
+					0.5
+				);
+			}
+
+			// Convert to pixels if value adjustment is needed
+			if ( subtract && ( matches = rcssNum.exec( value ) ) &&
+				( matches[ 3 ] || "px" ) !== "px" ) {
+
+				elem.style[ dimension ] = value;
+				value = jQuery.css( elem, dimension );
+			}
+
+			return setPositiveNumber( elem, value, subtract );
+		}
+	};
+} );
+
+jQuery.cssHooks.marginLeft = addGetHookIf( support.reliableMarginLeft,
+	function( elem, computed ) {
+		if ( computed ) {
+			return ( parseFloat( curCSS( elem, "marginLeft" ) ) ||
+				elem.getBoundingClientRect().left -
+					swap( elem, { marginLeft: 0 }, function() {
+						return elem.getBoundingClientRect().left;
+					} )
+				) + "px";
+		}
+	}
+);
+
+// These hooks are used by animate to expand properties
+jQuery.each( {
+	margin: "",
+	padding: "",
+	border: "Width"
+}, function( prefix, suffix ) {
+	jQuery.cssHooks[ prefix + suffix ] = {
+		expand: function( value ) {
+			var i = 0,
+				expanded = {},
+
+				// Assumes a single number if not a string
+				parts = typeof value === "string" ? value.split( " " ) : [ value ];
+
+			for ( ; i < 4; i++ ) {
+				expanded[ prefix + cssExpand[ i ] + suffix ] =
+					parts[ i ] || parts[ i - 2 ] || parts[ 0 ];
+			}
+
+			return expanded;
+		}
+	};
+
+	if ( prefix !== "margin" ) {
+		jQuery.cssHooks[ prefix + suffix ].set = setPositiveNumber;
+	}
+} );
+
+jQuery.fn.extend( {
+	css: function( name, value ) {
+		return access( this, function( elem, name, value ) {
+			var styles, len,
+				map = {},
+				i = 0;
+
+			if ( Array.isArray( name ) ) {
+				styles = getStyles( elem );
+				len = name.length;
+
+				for ( ; i < len; i++ ) {
+					map[ name[ i ] ] = jQuery.css( elem, name[ i ], false, styles );
+				}
+
+				return map;
+			}
+
+			return value !== undefined ?
+				jQuery.style( elem, name, value ) :
+				jQuery.css( elem, name );
+		}, name, value, arguments.length > 1 );
+	}
+} );
+
+
+function Tween( elem, options, prop, end, easing ) {
+	return new Tween.prototype.init( elem, options, prop, end, easing );
+}
+jQuery.Tween = Tween;
+
+Tween.prototype = {
+	constructor: Tween,
+	init: function( elem, options, prop, end, easing, unit ) {
+		this.elem = elem;
+		this.prop = prop;
+		this.easing = easing || jQuery.easing._default;
+		this.options = options;
+		this.start = this.now = this.cur();
+		this.end = end;
+		this.unit = unit || ( jQuery.cssNumber[ prop ] ? "" : "px" );
+	},
+	cur: function() {
+		var hooks = Tween.propHooks[ this.prop ];
+
+		return hooks && hooks.get ?
+			hooks.get( this ) :
+			Tween.propHooks._default.get( this );
+	},
+	run: function( percent ) {
+		var eased,
+			hooks = Tween.propHooks[ this.prop ];
+
+		if ( this.options.duration ) {
+			this.pos = eased = jQuery.easing[ this.easing ](
+				percent, this.options.duration * percent, 0, 1, this.options.duration
+			);
+		} else {
+			this.pos = eased = percent;
+		}
+		this.now = ( this.end - this.start ) * eased + this.start;
+
+		if ( this.options.step ) {
+			this.options.step.call( this.elem, this.now, this );
+		}
+
+		if ( hooks && hooks.set ) {
+			hooks.set( this );
+		} else {
+			Tween.propHooks._default.set( this );
+		}
+		return this;
+	}
+};
+
+Tween.prototype.init.prototype = Tween.prototype;
+
+Tween.propHooks = {
+	_default: {
+		get: function( tween ) {
+			var result;
+
+			// Use a property on the element directly when it is not a DOM element,
+			// or when there is no matching style property that exists.
+			if ( tween.elem.nodeType !== 1 ||
+				tween.elem[ tween.prop ] != null && tween.elem.style[ tween.prop ] == null ) {
+				return tween.elem[ tween.prop ];
+			}
+
+			// Passing an empty string as a 3rd parameter to .css will automatically
+			// attempt a parseFloat and fallback to a string if the parse fails.
+			// Simple values such as "10px" are parsed to Float;
+			// complex values such as "rotate(1rad)" are returned as-is.
+			result = jQuery.css( tween.elem, tween.prop, "" );
+
+			// Empty strings, null, undefined and "auto" are converted to 0.
+			return !result || result === "auto" ? 0 : result;
+		},
+		set: function( tween ) {
+
+			// Use step hook for back compat.
+			// Use cssHook if its there.
+			// Use .style if available and use plain properties where available.
+			if ( jQuery.fx.step[ tween.prop ] ) {
+				jQuery.fx.step[ tween.prop ]( tween );
+			} else if ( tween.elem.nodeType === 1 && (
+					jQuery.cssHooks[ tween.prop ] ||
+					tween.elem.style[ finalPropName( tween.prop ) ] != null ) ) {
+				jQuery.style( tween.elem, tween.prop, tween.now + tween.unit );
+			} else {
+				tween.elem[ tween.prop ] = tween.now;
+			}
+		}
+	}
+};
+
+// Support: IE <=9 only
+// Panic based approach to setting things on disconnected nodes
+Tween.propHooks.scrollTop = Tween.propHooks.scrollLeft = {
+	set: function( tween ) {
+		if ( tween.elem.nodeType && tween.elem.parentNode ) {
+			tween.elem[ tween.prop ] = tween.now;
+		}
+	}
+};
+
+jQuery.easing = {
+	linear: function( p ) {
+		return p;
+	},
+	swing: function( p ) {
+		return 0.5 - Math.cos( p * Math.PI ) / 2;
+	},
+	_default: "swing"
+};
+
+jQuery.fx = Tween.prototype.init;
+
+// Back compat <1.8 extension point
+jQuery.fx.step = {};
+
+
+
+
+var
+	fxNow, inProgress,
+	rfxtypes = /^(?:toggle|show|hide)$/,
+	rrun = /queueHooks$/;
+
+function schedule() {
+	if ( inProgress ) {
+		if ( document.hidden === false && window.requestAnimationFrame ) {
+			window.requestAnimationFrame( schedule );
+		} else {
+			window.setTimeout( schedule, jQuery.fx.interval );
+		}
+
+		jQuery.fx.tick();
+	}
+}
+
+// Animations created synchronously will run synchronously
+function createFxNow() {
+	window.setTimeout( function() {
+		fxNow = undefined;
+	} );
+	return ( fxNow = Date.now() );
+}
+
+// Generate parameters to create a standard animation
+function genFx( type, includeWidth ) {
+	var which,
+		i = 0,
+		attrs = { height: type };
+
+	// If we include width, step value is 1 to do all cssExpand values,
+	// otherwise step value is 2 to skip over Left and Right
+	includeWidth = includeWidth ? 1 : 0;
+	for ( ; i < 4; i += 2 - includeWidth ) {
+		which = cssExpand[ i ];
+		attrs[ "margin" + which ] = attrs[ "padding" + which ] = type;
+	}
+
+	if ( includeWidth ) {
+		attrs.opacity = attrs.width = type;
+	}
+
+	return attrs;
+}
+
+function createTween( value, prop, animation ) {
+	var tween,
+		collection = ( Animation.tweeners[ prop ] || [] ).concat( Animation.tweeners[ "*" ] ),
+		index = 0,
+		length = collection.length;
+	for ( ; index < length; index++ ) {
+		if ( ( tween = collection[ index ].call( animation, prop, value ) ) ) {
+
+			// We're done with this property
+			return tween;
+		}
+	}
+}
+
+function defaultPrefilter( elem, props, opts ) {
+	var prop, value, toggle, hooks, oldfire, propTween, restoreDisplay, display,
+		isBox = "width" in props || "height" in props,
+		anim = this,
+		orig = {},
+		style = elem.style,
+		hidden = elem.nodeType && isHiddenWithinTree( elem ),
+		dataShow = dataPriv.get( elem, "fxshow" );
+
+	// Queue-skipping animations hijack the fx hooks
+	if ( !opts.queue ) {
+		hooks = jQuery._queueHooks( elem, "fx" );
+		if ( hooks.unqueued == null ) {
+			hooks.unqueued = 0;
+			oldfire = hooks.empty.fire;
+			hooks.empty.fire = function() {
+				if ( !hooks.unqueued ) {
+					oldfire();
+				}
+			};
+		}
+		hooks.unqueued++;
+
+		anim.always( function() {
+
+			// Ensure the complete handler is called before this completes
+			anim.always( function() {
+				hooks.unqueued--;
+				if ( !jQuery.queue( elem, "fx" ).length ) {
+					hooks.empty.fire();
+				}
+			} );
+		} );
+	}
+
+	// Detect show/hide animations
+	for ( prop in props ) {
+		value = props[ prop ];
+		if ( rfxtypes.test( value ) ) {
+			delete props[ prop ];
+			toggle = toggle || value === "toggle";
+			if ( value === ( hidden ? "hide" : "show" ) ) {
+
+				// Pretend to be hidden if this is a "show" and
+				// there is still data from a stopped show/hide
+				if ( value === "show" && dataShow && dataShow[ prop ] !== undefined ) {
+					hidden = true;
+
+				// Ignore all other no-op show/hide data
+				} else {
+					continue;
+				}
+			}
+			orig[ prop ] = dataShow && dataShow[ prop ] || jQuery.style( elem, prop );
+		}
+	}
+
+	// Bail out if this is a no-op like .hide().hide()
+	propTween = !jQuery.isEmptyObject( props );
+	if ( !propTween && jQuery.isEmptyObject( orig ) ) {
+		return;
+	}
+
+	// Restrict "overflow" and "display" styles during box animations
+	if ( isBox && elem.nodeType === 1 ) {
+
+		// Support: IE <=9 - 11, Edge 12 - 15
+		// Record all 3 overflow attributes because IE does not infer the shorthand
+		// from identically-valued overflowX and overflowY and Edge just mirrors
+		// the overflowX value there.
+		opts.overflow = [ style.overflow, style.overflowX, style.overflowY ];
+
+		// Identify a display type, preferring old show/hide data over the CSS cascade
+		restoreDisplay = dataShow && dataShow.display;
+		if ( restoreDisplay == null ) {
+			restoreDisplay = dataPriv.get( elem, "display" );
+		}
+		display = jQuery.css( elem, "display" );
+		if ( display === "none" ) {
+			if ( restoreDisplay ) {
+				display = restoreDisplay;
+			} else {
+
+				// Get nonempty value(s) by temporarily forcing visibility
+				showHide( [ elem ], true );
+				restoreDisplay = elem.style.display || restoreDisplay;
+				display = jQuery.css( elem, "display" );
+				showHide( [ elem ] );
+			}
+		}
+
+		// Animate inline elements as inline-block
+		if ( display === "inline" || display === "inline-block" && restoreDisplay != null ) {
+			if ( jQuery.css( elem, "float" ) === "none" ) {
+
+				// Restore the original display value at the end of pure show/hide animations
+				if ( !propTween ) {
+					anim.done( function() {
+						style.display = restoreDisplay;
+					} );
+					if ( restoreDisplay == null ) {
+						display = style.display;
+						restoreDisplay = display === "none" ? "" : display;
+					}
+				}
+				style.display = "inline-block";
+			}
+		}
+	}
+
+	if ( opts.overflow ) {
+		style.overflow = "hidden";
+		anim.always( function() {
+			style.overflow = opts.overflow[ 0 ];
+			style.overflowX = opts.overflow[ 1 ];
+			style.overflowY = opts.overflow[ 2 ];
+		} );
+	}
+
+	// Implement show/hide animations
+	propTween = false;
+	for ( prop in orig ) {
+
+		// General show/hide setup for this element animation
+		if ( !propTween ) {
+			if ( dataShow ) {
+				if ( "hidden" in dataShow ) {
+					hidden = dataShow.hidden;
+				}
+			} else {
+				dataShow = dataPriv.access( elem, "fxshow", { display: restoreDisplay } );
+			}
+
+			// Store hidden/visible for toggle so `.stop().toggle()` "reverses"
+			if ( toggle ) {
+				dataShow.hidden = !hidden;
+			}
+
+			// Show elements before animating them
+			if ( hidden ) {
+				showHide( [ elem ], true );
+			}
+
+			/* eslint-disable no-loop-func */
+
+			anim.done( function() {
+
+			/* eslint-enable no-loop-func */
+
+				// The final step of a "hide" animation is actually hiding the element
+				if ( !hidden ) {
+					showHide( [ elem ] );
+				}
+				dataPriv.remove( elem, "fxshow" );
+				for ( prop in orig ) {
+					jQuery.style( elem, prop, orig[ prop ] );
+				}
+			} );
+		}
+
+		// Per-property setup
+		propTween = createTween( hidden ? dataShow[ prop ] : 0, prop, anim );
+		if ( !( prop in dataShow ) ) {
+			dataShow[ prop ] = propTween.start;
+			if ( hidden ) {
+				propTween.end = propTween.start;
+				propTween.start = 0;
+			}
+		}
+	}
+}
+
+function propFilter( props, specialEasing ) {
+	var index, name, easing, value, hooks;
+
+	// camelCase, specialEasing and expand cssHook pass
+	for ( index in props ) {
+		name = camelCase( index );
+		easing = specialEasing[ name ];
+		value = props[ index ];
+		if ( Array.isArray( value ) ) {
+			easing = value[ 1 ];
+			value = props[ index ] = value[ 0 ];
+		}
+
+		if ( index !== name ) {
+			props[ name ] = value;
+			delete props[ index ];
+		}
+
+		hooks = jQuery.cssHooks[ name ];
+		if ( hooks && "expand" in hooks ) {
+			value = hooks.expand( value );
+			delete props[ name ];
+
+			// Not quite $.extend, this won't overwrite existing keys.
+			// Reusing 'index' because we have the correct "name"
+			for ( index in value ) {
+				if ( !( index in props ) ) {
+					props[ index ] = value[ index ];
+					specialEasing[ index ] = easing;
+				}
+			}
+		} else {
+			specialEasing[ name ] = easing;
+		}
+	}
+}
+
+function Animation( elem, properties, options ) {
+	var result,
+		stopped,
+		index = 0,
+		length = Animation.prefilters.length,
+		deferred = jQuery.Deferred().always( function() {
+
+			// Don't match elem in the :animated selector
+			delete tick.elem;
+		} ),
+		tick = function() {
+			if ( stopped ) {
+				return false;
+			}
+			var currentTime = fxNow || createFxNow(),
+				remaining = Math.max( 0, animation.startTime + animation.duration - currentTime ),
+
+				// Support: Android 2.3 only
+				// Archaic crash bug won't allow us to use `1 - ( 0.5 || 0 )` (#12497)
+				temp = remaining / animation.duration || 0,
+				percent = 1 - temp,
+				index = 0,
+				length = animation.tweens.length;
+
+			for ( ; index < length; index++ ) {
+				animation.tweens[ index ].run( percent );
+			}
+
+			deferred.notifyWith( elem, [ animation, percent, remaining ] );
+
+			// If there's more to do, yield
+			if ( percent < 1 && length ) {
+				return remaining;
+			}
+
+			// If this was an empty animation, synthesize a final progress notification
+			if ( !length ) {
+				deferred.notifyWith( elem, [ animation, 1, 0 ] );
+			}
+
+			// Resolve the animation and report its conclusion
+			deferred.resolveWith( elem, [ animation ] );
+			return false;
+		},
+		animation = deferred.promise( {
+			elem: elem,
+			props: jQuery.extend( {}, properties ),
+			opts: jQuery.extend( true, {
+				specialEasing: {},
+				easing: jQuery.easing._default
+			}, options ),
+			originalProperties: properties,
+			originalOptions: options,
+			startTime: fxNow || createFxNow(),
+			duration: options.duration,
+			tweens: [],
+			createTween: function( prop, end ) {
+				var tween = jQuery.Tween( elem, animation.opts, prop, end,
+						animation.opts.specialEasing[ prop ] || animation.opts.easing );
+				animation.tweens.push( tween );
+				return tween;
+			},
+			stop: function( gotoEnd ) {
+				var index = 0,
+
+					// If we are going to the end, we want to run all the tweens
+					// otherwise we skip this part
+					length = gotoEnd ? animation.tweens.length : 0;
+				if ( stopped ) {
+					return this;
+				}
+				stopped = true;
+				for ( ; index < length; index++ ) {
+					animation.tweens[ index ].run( 1 );
+				}
+
+				// Resolve when we played the last frame; otherwise, reject
+				if ( gotoEnd ) {
+					deferred.notifyWith( elem, [ animation, 1, 0 ] );
+					deferred.resolveWith( elem, [ animation, gotoEnd ] );
+				} else {
+					deferred.rejectWith( elem, [ animation, gotoEnd ] );
+				}
+				return this;
+			}
+		} ),
+		props = animation.props;
+
+	propFilter( props, animation.opts.specialEasing );
+
+	for ( ; index < length; index++ ) {
+		result = Animation.prefilters[ index ].call( animation, elem, props, animation.opts );
+		if ( result ) {
+			if ( isFunction( result.stop ) ) {
+				jQuery._queueHooks( animation.elem, animation.opts.queue ).stop =
+					result.stop.bind( result );
+			}
+			return result;
+		}
+	}
+
+	jQuery.map( props, createTween, animation );
+
+	if ( isFunction( animation.opts.start ) ) {
+		animation.opts.start.call( elem, animation );
+	}
+
+	// Attach callbacks from options
+	animation
+		.progress( animation.opts.progress )
+		.done( animation.opts.done, animation.opts.complete )
+		.fail( animation.opts.fail )
+		.always( animation.opts.always );
+
+	jQuery.fx.timer(
+		jQuery.extend( tick, {
+			elem: elem,
+			anim: animation,
+			queue: animation.opts.queue
+		} )
+	);
+
+	return animation;
+}
+
+jQuery.Animation = jQuery.extend( Animation, {
+
+	tweeners: {
+		"*": [ function( prop, value ) {
+			var tween = this.createTween( prop, value );
+			adjustCSS( tween.elem, prop, rcssNum.exec( value ), tween );
+			return tween;
+		} ]
+	},
+
+	tweener: function( props, callback ) {
+		if ( isFunction( props ) ) {
+			callback = props;
+			props = [ "*" ];
+		} else {
+			props = props.match( rnothtmlwhite );
+		}
+
+		var prop,
+			index = 0,
+			length = props.length;
+
+		for ( ; index < length; index++ ) {
+			prop = props[ index ];
+			Animation.tweeners[ prop ] = Animation.tweeners[ prop ] || [];
+			Animation.tweeners[ prop ].unshift( callback );
+		}
+	},
+
+	prefilters: [ defaultPrefilter ],
+
+	prefilter: function( callback, prepend ) {
+		if ( prepend ) {
+			Animation.prefilters.unshift( callback );
+		} else {
+			Animation.prefilters.push( callback );
+		}
+	}
+} );
+
+jQuery.speed = function( speed, easing, fn ) {
+	var opt = speed && typeof speed === "object" ? jQuery.extend( {}, speed ) : {
+		complete: fn || !fn && easing ||
+			isFunction( speed ) && speed,
+		duration: speed,
+		easing: fn && easing || easing && !isFunction( easing ) && easing
+	};
+
+	// Go to the end state if fx are off
+	if ( jQuery.fx.off ) {
+		opt.duration = 0;
+
+	} else {
+		if ( typeof opt.duration !== "number" ) {
+			if ( opt.duration in jQuery.fx.speeds ) {
+				opt.duration = jQuery.fx.speeds[ opt.duration ];
+
+			} else {
+				opt.duration = jQuery.fx.speeds._default;
+			}
+		}
+	}
+
+	// Normalize opt.queue - true/undefined/null -> "fx"
+	if ( opt.queue == null || opt.queue === true ) {
+		opt.queue = "fx";
+	}
+
+	// Queueing
+	opt.old = opt.complete;
+
+	opt.complete = function() {
+		if ( isFunction( opt.old ) ) {
+			opt.old.call( this );
+		}
+
+		if ( opt.queue ) {
+			jQuery.dequeue( this, opt.queue );
+		}
+	};
+
+	return opt;
+};
+
+jQuery.fn.extend( {
+	fadeTo: function( speed, to, easing, callback ) {
+
+		// Show any hidden elements after setting opacity to 0
+		return this.filter( isHiddenWithinTree ).css( "opacity", 0 ).show()
+
+			// Animate to the value specified
+			.end().animate( { opacity: to }, speed, easing, callback );
+	},
+	animate: function( prop, speed, easing, callback ) {
+		var empty = jQuery.isEmptyObject( prop ),
+			optall = jQuery.speed( speed, easing, callback ),
+			doAnimation = function() {
+
+				// Operate on a copy of prop so per-property easing won't be lost
+				var anim = Animation( this, jQuery.extend( {}, prop ), optall );
+
+				// Empty animations, or finishing resolves immediately
+				if ( empty || dataPriv.get( this, "finish" ) ) {
+					anim.stop( true );
+				}
+			};
+			doAnimation.finish = doAnimation;
+
+		return empty || optall.queue === false ?
+			this.each( doAnimation ) :
+			this.queue( optall.queue, doAnimation );
+	},
+	stop: function( type, clearQueue, gotoEnd ) {
+		var stopQueue = function( hooks ) {
+			var stop = hooks.stop;
+			delete hooks.stop;
+			stop( gotoEnd );
+		};
+
+		if ( typeof type !== "string" ) {
+			gotoEnd = clearQueue;
+			clearQueue = type;
+			type = undefined;
+		}
+		if ( clearQueue && type !== false ) {
+			this.queue( type || "fx", [] );
+		}
+
+		return this.each( function() {
+			var dequeue = true,
+				index = type != null && type + "queueHooks",
+				timers = jQuery.timers,
+				data = dataPriv.get( this );
+
+			if ( index ) {
+				if ( data[ index ] && data[ index ].stop ) {
+					stopQueue( data[ index ] );
+				}
+			} else {
+				for ( index in data ) {
+					if ( data[ index ] && data[ index ].stop && rrun.test( index ) ) {
+						stopQueue( data[ index ] );
+					}
+				}
+			}
+
+			for ( index = timers.length; index--; ) {
+				if ( timers[ index ].elem === this &&
+					( type == null || timers[ index ].queue === type ) ) {
+
+					timers[ index ].anim.stop( gotoEnd );
+					dequeue = false;
+					timers.splice( index, 1 );
+				}
+			}
+
+			// Start the next in the queue if the last step wasn't forced.
+			// Timers currently will call their complete callbacks, which
+			// will dequeue but only if they were gotoEnd.
+			if ( dequeue || !gotoEnd ) {
+				jQuery.dequeue( this, type );
+			}
+		} );
+	},
+	finish: function( type ) {
+		if ( type !== false ) {
+			type = type || "fx";
+		}
+		return this.each( function() {
+			var index,
+				data = dataPriv.get( this ),
+				queue = data[ type + "queue" ],
+				hooks = data[ type + "queueHooks" ],
+				timers = jQuery.timers,
+				length = queue ? queue.length : 0;
+
+			// Enable finishing flag on private data
+			data.finish = true;
+
+			// Empty the queue first
+			jQuery.queue( this, type, [] );
+
+			if ( hooks && hooks.stop ) {
+				hooks.stop.call( this, true );
+			}
+
+			// Look for any active animations, and finish them
+			for ( index = timers.length; index--; ) {
+				if ( timers[ index ].elem === this && timers[ index ].queue === type ) {
+					timers[ index ].anim.stop( true );
+					timers.splice( index, 1 );
+				}
+			}
+
+			// Look for any animations in the old queue and finish them
+			for ( index = 0; index < length; index++ ) {
+				if ( queue[ index ] && queue[ index ].finish ) {
+					queue[ index ].finish.call( this );
+				}
+			}
+
+			// Turn off finishing flag
+			delete data.finish;
+		} );
+	}
+} );
+
+jQuery.each( [ "toggle", "show", "hide" ], function( i, name ) {
+	var cssFn = jQuery.fn[ name ];
+	jQuery.fn[ name ] = function( speed, easing, callback ) {
+		return speed == null || typeof speed === "boolean" ?
+			cssFn.apply( this, arguments ) :
+			this.animate( genFx( name, true ), speed, easing, callback );
+	};
+} );
+
+// Generate shortcuts for custom animations
+jQuery.each( {
+	slideDown: genFx( "show" ),
+	slideUp: genFx( "hide" ),
+	slideToggle: genFx( "toggle" ),
+	fadeIn: { opacity: "show" },
+	fadeOut: { opacity: "hide" },
+	fadeToggle: { opacity: "toggle" }
+}, function( name, props ) {
+	jQuery.fn[ name ] = function( speed, easing, callback ) {
+		return this.animate( props, speed, easing, callback );
+	};
+} );
+
+jQuery.timers = [];
+jQuery.fx.tick = function() {
+	var timer,
+		i = 0,
+		timers = jQuery.timers;
+
+	fxNow = Date.now();
+
+	for ( ; i < timers.length; i++ ) {
+		timer = timers[ i ];
+
+		// Run the timer and safely remove it when done (allowing for external removal)
+		if ( !timer() && timers[ i ] === timer ) {
+			timers.splice( i--, 1 );
+		}
+	}
+
+	if ( !timers.length ) {
+		jQuery.fx.stop();
+	}
+	fxNow = undefined;
+};
+
+jQuery.fx.timer = function( timer ) {
+	jQuery.timers.push( timer );
+	jQuery.fx.start();
+};
+
+jQuery.fx.interval = 13;
+jQuery.fx.start = function() {
+	if ( inProgress ) {
+		return;
+	}
+
+	inProgress = true;
+	schedule();
+};
+
+jQuery.fx.stop = function() {
+	inProgress = null;
+};
+
+jQuery.fx.speeds = {
+	slow: 600,
+	fast: 200,
+
+	// Default speed
+	_default: 400
+};
+
+
+// Based off of the plugin by Clint Helfers, with permission.
+// https://web.archive.org/web/20100324014747/http://blindsignals.com/index.php/2009/07/jquery-delay/
+jQuery.fn.delay = function( time, type ) {
+	time = jQuery.fx ? jQuery.fx.speeds[ time ] || time : time;
+	type = type || "fx";
+
+	return this.queue( type, function( next, hooks ) {
+		var timeout = window.setTimeout( next, time );
+		hooks.stop = function() {
+			window.clearTimeout( timeout );
+		};
+	} );
+};
+
+
+( function() {
+	var input = document.createElement( "input" ),
+		select = document.createElement( "select" ),
+		opt = select.appendChild( document.createElement( "option" ) );
+
+	input.type = "checkbox";
+
+	// Support: Android <=4.3 only
+	// Default value for a checkbox should be "on"
+	support.checkOn = input.value !== "";
+
+	// Support: IE <=11 only
+	// Must access selectedIndex to make default options select
+	support.optSelected = opt.selected;
+
+	// Support: IE <=11 only
+	// An input loses its value after becoming a radio
+	input = document.createElement( "input" );
+	input.value = "t";
+	input.type = "radio";
+	support.radioValue = input.value === "t";
+} )();
+
+
+var boolHook,
+	attrHandle = jQuery.expr.attrHandle;
+
+jQuery.fn.extend( {
+	attr: function( name, value ) {
+		return access( this, jQuery.attr, name, value, arguments.length > 1 );
+	},
+
+	removeAttr: function( name ) {
+		return this.each( function() {
+			jQuery.removeAttr( this, name );
+		} );
+	}
+} );
+
+jQuery.extend( {
+	attr: function( elem, name, value ) {
+		var ret, hooks,
+			nType = elem.nodeType;
+
+		// Don't get/set attributes on text, comment and attribute nodes
+		if ( nType === 3 || nType === 8 || nType === 2 ) {
+			return;
+		}
+
+		// Fallback to prop when attributes are not supported
+		if ( typeof elem.getAttribute === "undefined" ) {
+			return jQuery.prop( elem, name, value );
+		}
+
+		// Attribute hooks are determined by the lowercase version
+		// Grab necessary hook if one is defined
+		if ( nType !== 1 || !jQuery.isXMLDoc( elem ) ) {
+			hooks = jQuery.attrHooks[ name.toLowerCase() ] ||
+				( jQuery.expr.match.bool.test( name ) ? boolHook : undefined );
+		}
+
+		if ( value !== undefined ) {
+			if ( value === null ) {
+				jQuery.removeAttr( elem, name );
+				return;
+			}
+
+			if ( hooks && "set" in hooks &&
+				( ret = hooks.set( elem, value, name ) ) !== undefined ) {
+				return ret;
+			}
+
+			elem.setAttribute( name, value + "" );
+			return value;
+		}
+
+		if ( hooks && "get" in hooks && ( ret = hooks.get( elem, name ) ) !== null ) {
+			return ret;
+		}
+
+		ret = jQuery.find.attr( elem, name );
+
+		// Non-existent attributes return null, we normalize to undefined
+		return ret == null ? undefined : ret;
+	},
+
+	attrHooks: {
+		type: {
+			set: function( elem, value ) {
+				if ( !support.radioValue && value === "radio" &&
+					nodeName( elem, "input" ) ) {
+					var val = elem.value;
+					elem.setAttribute( "type", value );
+					if ( val ) {
+						elem.value = val;
+					}
+					return value;
+				}
+			}
+		}
+	},
+
+	removeAttr: function( elem, value ) {
+		var name,
+			i = 0,
+
+			// Attribute names can contain non-HTML whitespace characters
+			// https://html.spec.whatwg.org/multipage/syntax.html#attributes-2
+			attrNames = value && value.match( rnothtmlwhite );
+
+		if ( attrNames && elem.nodeType === 1 ) {
+			while ( ( name = attrNames[ i++ ] ) ) {
+				elem.removeAttribute( name );
+			}
+		}
+	}
+} );
+
+// Hooks for boolean attributes
+boolHook = {
+	set: function( elem, value, name ) {
+		if ( value === false ) {
+
+			// Remove boolean attributes when set to false
+			jQuery.removeAttr( elem, name );
+		} else {
+			elem.setAttribute( name, name );
+		}
+		return name;
+	}
+};
+
+jQuery.each( jQuery.expr.match.bool.source.match( /\w+/g ), function( i, name ) {
+	var getter = attrHandle[ name ] || jQuery.find.attr;
+
+	attrHandle[ name ] = function( elem, name, isXML ) {
+		var ret, handle,
+			lowercaseName = name.toLowerCase();
+
+		if ( !isXML ) {
+
+			// Avoid an infinite loop by temporarily removing this function from the getter
+			handle = attrHandle[ lowercaseName ];
+			attrHandle[ lowercaseName ] = ret;
+			ret = getter( elem, name, isXML ) != null ?
+				lowercaseName :
+				null;
+			attrHandle[ lowercaseName ] = handle;
+		}
+		return ret;
+	};
+} );
+
+
+
+
+var rfocusable = /^(?:input|select|textarea|button)$/i,
+	rclickable = /^(?:a|area)$/i;
+
+jQuery.fn.extend( {
+	prop: function( name, value ) {
+		return access( this, jQuery.prop, name, value, arguments.length > 1 );
+	},
+
+	removeProp: function( name ) {
+		return this.each( function() {
+			delete this[ jQuery.propFix[ name ] || name ];
+		} );
+	}
+} );
+
+jQuery.extend( {
+	prop: function( elem, name, value ) {
+		var ret, hooks,
+			nType = elem.nodeType;
+
+		// Don't get/set properties on text, comment and attribute nodes
+		if ( nType === 3 || nType === 8 || nType === 2 ) {
+			return;
+		}
+
+		if ( nType !== 1 || !jQuery.isXMLDoc( elem ) ) {
+
+			// Fix name and attach hooks
+			name = jQuery.propFix[ name ] || name;
+			hooks = jQuery.propHooks[ name ];
+		}
+
+		if ( value !== undefined ) {
+			if ( hooks && "set" in hooks &&
+				( ret = hooks.set( elem, value, name ) ) !== undefined ) {
+				return ret;
+			}
+
+			return ( elem[ name ] = value );
+		}
+
+		if ( hooks && "get" in hooks && ( ret = hooks.get( elem, name ) ) !== null ) {
+			return ret;
+		}
+
+		return elem[ name ];
+	},
+
+	propHooks: {
+		tabIndex: {
+			get: function( elem ) {
+
+				// Support: IE <=9 - 11 only
+				// elem.tabIndex doesn't always return the
+				// correct value when it hasn't been explicitly set
+				// https://web.archive.org/web/20141116233347/http://fluidproject.org/blog/2008/01/09/getting-setting-and-removing-tabindex-values-with-javascript/
+				// Use proper attribute retrieval(#12072)
+				var tabindex = jQuery.find.attr( elem, "tabindex" );
+
+				if ( tabindex ) {
+					return parseInt( tabindex, 10 );
+				}
+
+				if (
+					rfocusable.test( elem.nodeName ) ||
+					rclickable.test( elem.nodeName ) &&
+					elem.href
+				) {
+					return 0;
+				}
+
+				return -1;
+			}
+		}
+	},
+
+	propFix: {
+		"for": "htmlFor",
+		"class": "className"
+	}
+} );
+
+// Support: IE <=11 only
+// Accessing the selectedIndex property
+// forces the browser to respect setting selected
+// on the option
+// The getter ensures a default option is selected
+// when in an optgroup
+// eslint rule "no-unused-expressions" is disabled for this code
+// since it considers such accessions noop
+if ( !support.optSelected ) {
+	jQuery.propHooks.selected = {
+		get: function( elem ) {
+
+			/* eslint no-unused-expressions: "off" */
+
+			var parent = elem.parentNode;
+			if ( parent && parent.parentNode ) {
+				parent.parentNode.selectedIndex;
+			}
+			return null;
+		},
+		set: function( elem ) {
+
+			/* eslint no-unused-expressions: "off" */
+
+			var parent = elem.parentNode;
+			if ( parent ) {
+				parent.selectedIndex;
+
+				if ( parent.parentNode ) {
+					parent.parentNode.selectedIndex;
+				}
+			}
+		}
+	};
+}
+
+jQuery.each( [
+	"tabIndex",
+	"readOnly",
+	"maxLength",
+	"cellSpacing",
+	"cellPadding",
+	"rowSpan",
+	"colSpan",
+	"useMap",
+	"frameBorder",
+	"contentEditable"
+], function() {
+	jQuery.propFix[ this.toLowerCase() ] = this;
+} );
+
+
+
+
+	// Strip and collapse whitespace according to HTML spec
+	// https://infra.spec.whatwg.org/#strip-and-collapse-ascii-whitespace
+	function stripAndCollapse( value ) {
+		var tokens = value.match( rnothtmlwhite ) || [];
+		return tokens.join( " " );
+	}
+
+
+function getClass( elem ) {
+	return elem.getAttribute && elem.getAttribute( "class" ) || "";
+}
+
+function classesToArray( value ) {
+	if ( Array.isArray( value ) ) {
+		return value;
+	}
+	if ( typeof value === "string" ) {
+		return value.match( rnothtmlwhite ) || [];
+	}
+	return [];
+}
+
+jQuery.fn.extend( {
+	addClass: function( value ) {
+		var classes, elem, cur, curValue, clazz, j, finalValue,
+			i = 0;
+
+		if ( isFunction( value ) ) {
+			return this.each( function( j ) {
+				jQuery( this ).addClass( value.call( this, j, getClass( this ) ) );
+			} );
+		}
+
+		classes = classesToArray( value );
+
+		if ( classes.length ) {
+			while ( ( elem = this[ i++ ] ) ) {
+				curValue = getClass( elem );
+				cur = elem.nodeType === 1 && ( " " + stripAndCollapse( curValue ) + " " );
+
+				if ( cur ) {
+					j = 0;
+					while ( ( clazz = classes[ j++ ] ) ) {
+						if ( cur.indexOf( " " + clazz + " " ) < 0 ) {
+							cur += clazz + " ";
+						}
+					}
+
+					// Only assign if different to avoid unneeded rendering.
+					finalValue = stripAndCollapse( cur );
+					if ( curValue !== finalValue ) {
+						elem.setAttribute( "class", finalValue );
+					}
+				}
+			}
+		}
+
+		return this;
+	},
+
+	removeClass: function( value ) {
+		var classes, elem, cur, curValue, clazz, j, finalValue,
+			i = 0;
+
+		if ( isFunction( value ) ) {
+			return this.each( function( j ) {
+				jQuery( this ).removeClass( value.call( this, j, getClass( this ) ) );
+			} );
+		}
+
+		if ( !arguments.length ) {
+			return this.attr( "class", "" );
+		}
+
+		classes = classesToArray( value );
+
+		if ( classes.length ) {
+			while ( ( elem = this[ i++ ] ) ) {
+				curValue = getClass( elem );
+
+				// This expression is here for better compressibility (see addClass)
+				cur = elem.nodeType === 1 && ( " " + stripAndCollapse( curValue ) + " " );
+
+				if ( cur ) {
+					j = 0;
+					while ( ( clazz = classes[ j++ ] ) ) {
+
+						// Remove *all* instances
+						while ( cur.indexOf( " " + clazz + " " ) > -1 ) {
+							cur = cur.replace( " " + clazz + " ", " " );
+						}
+					}
+
+					// Only assign if different to avoid unneeded rendering.
+					finalValue = stripAndCollapse( cur );
+					if ( curValue !== finalValue ) {
+						elem.setAttribute( "class", finalValue );
+					}
+				}
+			}
+		}
+
+		return this;
+	},
+
+	toggleClass: function( value, stateVal ) {
+		var type = typeof value,
+			isValidValue = type === "string" || Array.isArray( value );
+
+		if ( typeof stateVal === "boolean" && isValidValue ) {
+			return stateVal ? this.addClass( value ) : this.removeClass( value );
+		}
+
+		if ( isFunction( value ) ) {
+			return this.each( function( i ) {
+				jQuery( this ).toggleClass(
+					value.call( this, i, getClass( this ), stateVal ),
+					stateVal
+				);
+			} );
+		}
+
+		return this.each( function() {
+			var className, i, self, classNames;
+
+			if ( isValidValue ) {
+
+				// Toggle individual class names
+				i = 0;
+				self = jQuery( this );
+				classNames = classesToArray( value );
+
+				while ( ( className = classNames[ i++ ] ) ) {
+
+					// Check each className given, space separated list
+					if ( self.hasClass( className ) ) {
+						self.removeClass( className );
+					} else {
+						self.addClass( className );
+					}
+				}
+
+			// Toggle whole class name
+			} else if ( value === undefined || type === "boolean" ) {
+				className = getClass( this );
+				if ( className ) {
+
+					// Store className if set
+					dataPriv.set( this, "__className__", className );
+				}
+
+				// If the element has a class name or if we're passed `false`,
+				// then remove the whole classname (if there was one, the above saved it).
+				// Otherwise bring back whatever was previously saved (if anything),
+				// falling back to the empty string if nothing was stored.
+				if ( this.setAttribute ) {
+					this.setAttribute( "class",
+						className || value === false ?
+						"" :
+						dataPriv.get( this, "__className__" ) || ""
+					);
+				}
+			}
+		} );
+	},
+
+	hasClass: function( selector ) {
+		var className, elem,
+			i = 0;
+
+		className = " " + selector + " ";
+		while ( ( elem = this[ i++ ] ) ) {
+			if ( elem.nodeType === 1 &&
+				( " " + stripAndCollapse( getClass( elem ) ) + " " ).indexOf( className ) > -1 ) {
+					return true;
+			}
+		}
+
+		return false;
+	}
+} );
+
+
+
+
+var rreturn = /\r/g;
+
+jQuery.fn.extend( {
+	val: function( value ) {
+		var hooks, ret, valueIsFunction,
+			elem = this[ 0 ];
+
+		if ( !arguments.length ) {
+			if ( elem ) {
+				hooks = jQuery.valHooks[ elem.type ] ||
+					jQuery.valHooks[ elem.nodeName.toLowerCase() ];
+
+				if ( hooks &&
+					"get" in hooks &&
+					( ret = hooks.get( elem, "value" ) ) !== undefined
+				) {
+					return ret;
+				}
+
+				ret = elem.value;
+
+				// Handle most common string cases
+				if ( typeof ret === "string" ) {
+					return ret.replace( rreturn, "" );
+				}
+
+				// Handle cases where value is null/undef or number
+				return ret == null ? "" : ret;
+			}
+
+			return;
+		}
+
+		valueIsFunction = isFunction( value );
+
+		return this.each( function( i ) {
+			var val;
+
+			if ( this.nodeType !== 1 ) {
+				return;
+			}
+
+			if ( valueIsFunction ) {
+				val = value.call( this, i, jQuery( this ).val() );
+			} else {
+				val = value;
+			}
+
+			// Treat null/undefined as ""; convert numbers to string
+			if ( val == null ) {
+				val = "";
+
+			} else if ( typeof val === "number" ) {
+				val += "";
+
+			} else if ( Array.isArray( val ) ) {
+				val = jQuery.map( val, function( value ) {
+					return value == null ? "" : value + "";
+				} );
+			}
+
+			hooks = jQuery.valHooks[ this.type ] || jQuery.valHooks[ this.nodeName.toLowerCase() ];
+
+			// If set returns undefined, fall back to normal setting
+			if ( !hooks || !( "set" in hooks ) || hooks.set( this, val, "value" ) === undefined ) {
+				this.value = val;
+			}
+		} );
+	}
+} );
+
+jQuery.extend( {
+	valHooks: {
+		option: {
+			get: function( elem ) {
+
+				var val = jQuery.find.attr( elem, "value" );
+				return val != null ?
+					val :
+
+					// Support: IE <=10 - 11 only
+					// option.text throws exceptions (#14686, #14858)
+					// Strip and collapse whitespace
+					// https://html.spec.whatwg.org/#strip-and-collapse-whitespace
+					stripAndCollapse( jQuery.text( elem ) );
+			}
+		},
+		select: {
+			get: function( elem ) {
+				var value, option, i,
+					options = elem.options,
+					index = elem.selectedIndex,
+					one = elem.type === "select-one",
+					values = one ? null : [],
+					max = one ? index + 1 : options.length;
+
+				if ( index < 0 ) {
+					i = max;
+
+				} else {
+					i = one ? index : 0;
+				}
+
+				// Loop through all the selected options
+				for ( ; i < max; i++ ) {
+					option = options[ i ];
+
+					// Support: IE <=9 only
+					// IE8-9 doesn't update selected after form reset (#2551)
+					if ( ( option.selected || i === index ) &&
+
+							// Don't return options that are disabled or in a disabled optgroup
+							!option.disabled &&
+							( !option.parentNode.disabled ||
+								!nodeName( option.parentNode, "optgroup" ) ) ) {
+
+						// Get the specific value for the option
+						value = jQuery( option ).val();
+
+						// We don't need an array for one selects
+						if ( one ) {
+							return value;
+						}
+
+						// Multi-Selects return an array
+						values.push( value );
+					}
+				}
+
+				return values;
+			},
+
+			set: function( elem, value ) {
+				var optionSet, option,
+					options = elem.options,
+					values = jQuery.makeArray( value ),
+					i = options.length;
+
+				while ( i-- ) {
+					option = options[ i ];
+
+					/* eslint-disable no-cond-assign */
+
+					if ( option.selected =
+						jQuery.inArray( jQuery.valHooks.option.get( option ), values ) > -1
+					) {
+						optionSet = true;
+					}
+
+					/* eslint-enable no-cond-assign */
+				}
+
+				// Force browsers to behave consistently when non-matching value is set
+				if ( !optionSet ) {
+					elem.selectedIndex = -1;
+				}
+				return values;
+			}
+		}
+	}
+} );
+
+// Radios and checkboxes getter/setter
+jQuery.each( [ "radio", "checkbox" ], function() {
+	jQuery.valHooks[ this ] = {
+		set: function( elem, value ) {
+			if ( Array.isArray( value ) ) {
+				return ( elem.checked = jQuery.inArray( jQuery( elem ).val(), value ) > -1 );
+			}
+		}
+	};
+	if ( !support.checkOn ) {
+		jQuery.valHooks[ this ].get = function( elem ) {
+			return elem.getAttribute( "value" ) === null ? "on" : elem.value;
+		};
+	}
+} );
+
+
+
+
+// Return jQuery for attributes-only inclusion
+
+
+support.focusin = "onfocusin" in window;
+
+
+var rfocusMorph = /^(?:focusinfocus|focusoutblur)$/,
+	stopPropagationCallback = function( e ) {
+		e.stopPropagation();
+	};
+
+jQuery.extend( jQuery.event, {
+
+	trigger: function( event, data, elem, onlyHandlers ) {
+
+		var i, cur, tmp, bubbleType, ontype, handle, special, lastElement,
+			eventPath = [ elem || document ],
+			type = hasOwn.call( event, "type" ) ? event.type : event,
+			namespaces = hasOwn.call( event, "namespace" ) ? event.namespace.split( "." ) : [];
+
+		cur = lastElement = tmp = elem = elem || document;
+
+		// Don't do events on text and comment nodes
+		if ( elem.nodeType === 3 || elem.nodeType === 8 ) {
+			return;
+		}
+
+		// focus/blur morphs to focusin/out; ensure we're not firing them right now
+		if ( rfocusMorph.test( type + jQuery.event.triggered ) ) {
+			return;
+		}
+
+		if ( type.indexOf( "." ) > -1 ) {
+
+			// Namespaced trigger; create a regexp to match event type in handle()
+			namespaces = type.split( "." );
+			type = namespaces.shift();
+			namespaces.sort();
+		}
+		ontype = type.indexOf( ":" ) < 0 && "on" + type;
+
+		// Caller can pass in a jQuery.Event object, Object, or just an event type string
+		event = event[ jQuery.expando ] ?
+			event :
+			new jQuery.Event( type, typeof event === "object" && event );
+
+		// Trigger bitmask: & 1 for native handlers; & 2 for jQuery (always true)
+		event.isTrigger = onlyHandlers ? 2 : 3;
+		event.namespace = namespaces.join( "." );
+		event.rnamespace = event.namespace ?
+			new RegExp( "(^|\\.)" + namespaces.join( "\\.(?:.*\\.|)" ) + "(\\.|$)" ) :
+			null;
+
+		// Clean up the event in case it is being reused
+		event.result = undefined;
+		if ( !event.target ) {
+			event.target = elem;
+		}
+
+		// Clone any incoming data and prepend the event, creating the handler arg list
+		data = data == null ?
+			[ event ] :
+			jQuery.makeArray( data, [ event ] );
+
+		// Allow special events to draw outside the lines
+		special = jQuery.event.special[ type ] || {};
+		if ( !onlyHandlers && special.trigger && special.trigger.apply( elem, data ) === false ) {
+			return;
+		}
+
+		// Determine event propagation path in advance, per W3C events spec (#9951)
+		// Bubble up to document, then to window; watch for a global ownerDocument var (#9724)
+		if ( !onlyHandlers && !special.noBubble && !isWindow( elem ) ) {
+
+			bubbleType = special.delegateType || type;
+			if ( !rfocusMorph.test( bubbleType + type ) ) {
+				cur = cur.parentNode;
+			}
+			for ( ; cur; cur = cur.parentNode ) {
+				eventPath.push( cur );
+				tmp = cur;
+			}
+
+			// Only add window if we got to document (e.g., not plain obj or detached DOM)
+			if ( tmp === ( elem.ownerDocument || document ) ) {
+				eventPath.push( tmp.defaultView || tmp.parentWindow || window );
+			}
+		}
+
+		// Fire handlers on the event path
+		i = 0;
+		while ( ( cur = eventPath[ i++ ] ) && !event.isPropagationStopped() ) {
+			lastElement = cur;
+			event.type = i > 1 ?
+				bubbleType :
+				special.bindType || type;
+
+			// jQuery handler
+			handle = ( dataPriv.get( cur, "events" ) || {} )[ event.type ] &&
+				dataPriv.get( cur, "handle" );
+			if ( handle ) {
+				handle.apply( cur, data );
+			}
+
+			// Native handler
+			handle = ontype && cur[ ontype ];
+			if ( handle && handle.apply && acceptData( cur ) ) {
+				event.result = handle.apply( cur, data );
+				if ( event.result === false ) {
+					event.preventDefault();
+				}
+			}
+		}
+		event.type = type;
+
+		// If nobody prevented the default action, do it now
+		if ( !onlyHandlers && !event.isDefaultPrevented() ) {
+
+			if ( ( !special._default ||
+				special._default.apply( eventPath.pop(), data ) === false ) &&
+				acceptData( elem ) ) {
+
+				// Call a native DOM method on the target with the same name as the event.
+				// Don't do default actions on window, that's where global variables be (#6170)
+				if ( ontype && isFunction( elem[ type ] ) && !isWindow( elem ) ) {
+
+					// Don't re-trigger an onFOO event when we call its FOO() method
+					tmp = elem[ ontype ];
+
+					if ( tmp ) {
+						elem[ ontype ] = null;
+					}
+
+					// Prevent re-triggering of the same event, since we already bubbled it above
+					jQuery.event.triggered = type;
+
+					if ( event.isPropagationStopped() ) {
+						lastElement.addEventListener( type, stopPropagationCallback );
+					}
+
+					elem[ type ]();
+
+					if ( event.isPropagationStopped() ) {
+						lastElement.removeEventListener( type, stopPropagationCallback );
+					}
+
+					jQuery.event.triggered = undefined;
+
+					if ( tmp ) {
+						elem[ ontype ] = tmp;
+					}
+				}
+			}
+		}
+
+		return event.result;
+	},
+
+	// Piggyback on a donor event to simulate a different one
+	// Used only for `focus(in | out)` events
+	simulate: function( type, elem, event ) {
+		var e = jQuery.extend(
+			new jQuery.Event(),
+			event,
+			{
+				type: type,
+				isSimulated: true
+			}
+		);
+
+		jQuery.event.trigger( e, null, elem );
+	}
+
+} );
+
+jQuery.fn.extend( {
+
+	trigger: function( type, data ) {
+		return this.each( function() {
+			jQuery.event.trigger( type, data, this );
+		} );
+	},
+	triggerHandler: function( type, data ) {
+		var elem = this[ 0 ];
+		if ( elem ) {
+			return jQuery.event.trigger( type, data, elem, true );
+		}
+	}
+} );
+
+
+// Support: Firefox <=44
+// Firefox doesn't have focus(in | out) events
+// Related ticket - https://bugzilla.mozilla.org/show_bug.cgi?id=687787
+//
+// Support: Chrome <=48 - 49, Safari <=9.0 - 9.1
+// focus(in | out) events fire after focus & blur events,
+// which is spec violation - http://www.w3.org/TR/DOM-Level-3-Events/#events-focusevent-event-order
+// Related ticket - https://bugs.chromium.org/p/chromium/issues/detail?id=449857
+if ( !support.focusin ) {
+	jQuery.each( { focus: "focusin", blur: "focusout" }, function( orig, fix ) {
+
+		// Attach a single capturing handler on the document while someone wants focusin/focusout
+		var handler = function( event ) {
+			jQuery.event.simulate( fix, event.target, jQuery.event.fix( event ) );
+		};
+
+		jQuery.event.special[ fix ] = {
+			setup: function() {
+				var doc = this.ownerDocument || this,
+					attaches = dataPriv.access( doc, fix );
+
+				if ( !attaches ) {
+					doc.addEventListener( orig, handler, true );
+				}
+				dataPriv.access( doc, fix, ( attaches || 0 ) + 1 );
+			},
+			teardown: function() {
+				var doc = this.ownerDocument || this,
+					attaches = dataPriv.access( doc, fix ) - 1;
+
+				if ( !attaches ) {
+					doc.removeEventListener( orig, handler, true );
+					dataPriv.remove( doc, fix );
+
+				} else {
+					dataPriv.access( doc, fix, attaches );
+				}
+			}
+		};
+	} );
+}
+var location = window.location;
+
+var nonce = Date.now();
+
+var rquery = ( /\?/ );
+
+
+
+// Cross-browser xml parsing
+jQuery.parseXML = function( data ) {
+	var xml;
+	if ( !data || typeof data !== "string" ) {
+		return null;
+	}
+
+	// Support: IE 9 - 11 only
+	// IE throws on parseFromString with invalid input.
+	try {
+		xml = ( new window.DOMParser() ).parseFromString( data, "text/xml" );
+	} catch ( e ) {
+		xml = undefined;
+	}
+
+	if ( !xml || xml.getElementsByTagName( "parsererror" ).length ) {
+		jQuery.error( "Invalid XML: " + data );
+	}
+	return xml;
+};
+
+
+var
+	rbracket = /\[\]$/,
+	rCRLF = /\r?\n/g,
+	rsubmitterTypes = /^(?:submit|button|image|reset|file)$/i,
+	rsubmittable = /^(?:input|select|textarea|keygen)/i;
+
+function buildParams( prefix, obj, traditional, add ) {
+	var name;
+
+	if ( Array.isArray( obj ) ) {
+
+		// Serialize array item.
+		jQuery.each( obj, function( i, v ) {
+			if ( traditional || rbracket.test( prefix ) ) {
+
+				// Treat each array item as a scalar.
+				add( prefix, v );
+
+			} else {
+
+				// Item is non-scalar (array or object), encode its numeric index.
+				buildParams(
+					prefix + "[" + ( typeof v === "object" && v != null ? i : "" ) + "]",
+					v,
+					traditional,
+					add
+				);
+			}
+		} );
+
+	} else if ( !traditional && toType( obj ) === "object" ) {
+
+		// Serialize object item.
+		for ( name in obj ) {
+			buildParams( prefix + "[" + name + "]", obj[ name ], traditional, add );
+		}
+
+	} else {
+
+		// Serialize scalar item.
+		add( prefix, obj );
+	}
+}
+
+// Serialize an array of form elements or a set of
+// key/values into a query string
+jQuery.param = function( a, traditional ) {
+	var prefix,
+		s = [],
+		add = function( key, valueOrFunction ) {
+
+			// If value is a function, invoke it and use its return value
+			var value = isFunction( valueOrFunction ) ?
+				valueOrFunction() :
+				valueOrFunction;
+
+			s[ s.length ] = encodeURIComponent( key ) + "=" +
+				encodeURIComponent( value == null ? "" : value );
+		};
+
+	if ( a == null ) {
+		return "";
+	}
+
+	// If an array was passed in, assume that it is an array of form elements.
+	if ( Array.isArray( a ) || ( a.jquery && !jQuery.isPlainObject( a ) ) ) {
+
+		// Serialize the form elements
+		jQuery.each( a, function() {
+			add( this.name, this.value );
+		} );
+
+	} else {
+
+		// If traditional, encode the "old" way (the way 1.3.2 or older
+		// did it), otherwise encode params recursively.
+		for ( prefix in a ) {
+			buildParams( prefix, a[ prefix ], traditional, add );
+		}
+	}
+
+	// Return the resulting serialization
+	return s.join( "&" );
+};
+
+jQuery.fn.extend( {
+	serialize: function() {
+		return jQuery.param( this.serializeArray() );
+	},
+	serializeArray: function() {
+		return this.map( function() {
+
+			// Can add propHook for "elements" to filter or add form elements
+			var elements = jQuery.prop( this, "elements" );
+			return elements ? jQuery.makeArray( elements ) : this;
+		} )
+		.filter( function() {
+			var type = this.type;
+
+			// Use .is( ":disabled" ) so that fieldset[disabled] works
+			return this.name && !jQuery( this ).is( ":disabled" ) &&
+				rsubmittable.test( this.nodeName ) && !rsubmitterTypes.test( type ) &&
+				( this.checked || !rcheckableType.test( type ) );
+		} )
+		.map( function( i, elem ) {
+			var val = jQuery( this ).val();
+
+			if ( val == null ) {
+				return null;
+			}
+
+			if ( Array.isArray( val ) ) {
+				return jQuery.map( val, function( val ) {
+					return { name: elem.name, value: val.replace( rCRLF, "\r\n" ) };
+				} );
+			}
+
+			return { name: elem.name, value: val.replace( rCRLF, "\r\n" ) };
+		} ).get();
+	}
+} );
+
+
+var
+	r20 = /%20/g,
+	rhash = /#.*$/,
+	rantiCache = /([?&])_=[^&]*/,
+	rheaders = /^(.*?):[ \t]*([^\r\n]*)$/mg,
+
+	// #7653, #8125, #8152: local protocol detection
+	rlocalProtocol = /^(?:about|app|app-storage|.+-extension|file|res|widget):$/,
+	rnoContent = /^(?:GET|HEAD)$/,
+	rprotocol = /^\/\//,
+
+	/* Prefilters
+	 * 1) They are useful to introduce custom dataTypes (see ajax/jsonp.js for an example)
+	 * 2) These are called:
+	 *    - BEFORE asking for a transport
+	 *    - AFTER param serialization (s.data is a string if s.processData is true)
+	 * 3) key is the dataType
+	 * 4) the catchall symbol "*" can be used
+	 * 5) execution will start with transport dataType and THEN continue down to "*" if needed
+	 */
+	prefilters = {},
+
+	/* Transports bindings
+	 * 1) key is the dataType
+	 * 2) the catchall symbol "*" can be used
+	 * 3) selection will start with transport dataType and THEN go to "*" if needed
+	 */
+	transports = {},
+
+	// Avoid comment-prolog char sequence (#10098); must appease lint and evade compression
+	allTypes = "*/".concat( "*" ),
+
+	// Anchor tag for parsing the document origin
+	originAnchor = document.createElement( "a" );
+	originAnchor.href = location.href;
+
+// Base "constructor" for jQuery.ajaxPrefilter and jQuery.ajaxTransport
+function addToPrefiltersOrTransports( structure ) {
+
+	// dataTypeExpression is optional and defaults to "*"
+	return function( dataTypeExpression, func ) {
+
+		if ( typeof dataTypeExpression !== "string" ) {
+			func = dataTypeExpression;
+			dataTypeExpression = "*";
+		}
+
+		var dataType,
+			i = 0,
+			dataTypes = dataTypeExpression.toLowerCase().match( rnothtmlwhite ) || [];
+
+		if ( isFunction( func ) ) {
+
+			// For each dataType in the dataTypeExpression
+			while ( ( dataType = dataTypes[ i++ ] ) ) {
+
+				// Prepend if requested
+				if ( dataType[ 0 ] === "+" ) {
+					dataType = dataType.slice( 1 ) || "*";
+					( structure[ dataType ] = structure[ dataType ] || [] ).unshift( func );
+
+				// Otherwise append
+				} else {
+					( structure[ dataType ] = structure[ dataType ] || [] ).push( func );
+				}
+			}
+		}
+	};
+}
+
+// Base inspection function for prefilters and transports
+function inspectPrefiltersOrTransports( structure, options, originalOptions, jqXHR ) {
+
+	var inspected = {},
+		seekingTransport = ( structure === transports );
+
+	function inspect( dataType ) {
+		var selected;
+		inspected[ dataType ] = true;
+		jQuery.each( structure[ dataType ] || [], function( _, prefilterOrFactory ) {
+			var dataTypeOrTransport = prefilterOrFactory( options, originalOptions, jqXHR );
+			if ( typeof dataTypeOrTransport === "string" &&
+				!seekingTransport && !inspected[ dataTypeOrTransport ] ) {
+
+				options.dataTypes.unshift( dataTypeOrTransport );
+				inspect( dataTypeOrTransport );
+				return false;
+			} else if ( seekingTransport ) {
+				return !( selected = dataTypeOrTransport );
+			}
+		} );
+		return selected;
+	}
+
+	return inspect( options.dataTypes[ 0 ] ) || !inspected[ "*" ] && inspect( "*" );
+}
+
+// A special extend for ajax options
+// that takes "flat" options (not to be deep extended)
+// Fixes #9887
+function ajaxExtend( target, src ) {
+	var key, deep,
+		flatOptions = jQuery.ajaxSettings.flatOptions || {};
+
+	for ( key in src ) {
+		if ( src[ key ] !== undefined ) {
+			( flatOptions[ key ] ? target : ( deep || ( deep = {} ) ) )[ key ] = src[ key ];
+		}
+	}
+	if ( deep ) {
+		jQuery.extend( true, target, deep );
+	}
+
+	return target;
+}
+
+/* Handles responses to an ajax request:
+ * - finds the right dataType (mediates between content-type and expected dataType)
+ * - returns the corresponding response
+ */
+function ajaxHandleResponses( s, jqXHR, responses ) {
+
+	var ct, type, finalDataType, firstDataType,
+		contents = s.contents,
+		dataTypes = s.dataTypes;
+
+	// Remove auto dataType and get content-type in the process
+	while ( dataTypes[ 0 ] === "*" ) {
+		dataTypes.shift();
+		if ( ct === undefined ) {
+			ct = s.mimeType || jqXHR.getResponseHeader( "Content-Type" );
+		}
+	}
+
+	// Check if we're dealing with a known content-type
+	if ( ct ) {
+		for ( type in contents ) {
+			if ( contents[ type ] && contents[ type ].test( ct ) ) {
+				dataTypes.unshift( type );
+				break;
+			}
+		}
+	}
+
+	// Check to see if we have a response for the expected dataType
+	if ( dataTypes[ 0 ] in responses ) {
+		finalDataType = dataTypes[ 0 ];
+	} else {
+
+		// Try convertible dataTypes
+		for ( type in responses ) {
+			if ( !dataTypes[ 0 ] || s.converters[ type + " " + dataTypes[ 0 ] ] ) {
+				finalDataType = type;
+				break;
+			}
+			if ( !firstDataType ) {
+				firstDataType = type;
+			}
+		}
+
+		// Or just use first one
+		finalDataType = finalDataType || firstDataType;
+	}
+
+	// If we found a dataType
+	// We add the dataType to the list if needed
+	// and return the corresponding response
+	if ( finalDataType ) {
+		if ( finalDataType !== dataTypes[ 0 ] ) {
+			dataTypes.unshift( finalDataType );
+		}
+		return responses[ finalDataType ];
+	}
+}
+
+/* Chain conversions given the request and the original response
+ * Also sets the responseXXX fields on the jqXHR instance
+ */
+function ajaxConvert( s, response, jqXHR, isSuccess ) {
+	var conv2, current, conv, tmp, prev,
+		converters = {},
+
+		// Work with a copy of dataTypes in case we need to modify it for conversion
+		dataTypes = s.dataTypes.slice();
+
+	// Create converters map with lowercased keys
+	if ( dataTypes[ 1 ] ) {
+		for ( conv in s.converters ) {
+			converters[ conv.toLowerCase() ] = s.converters[ conv ];
+		}
+	}
+
+	current = dataTypes.shift();
+
+	// Convert to each sequential dataType
+	while ( current ) {
+
+		if ( s.responseFields[ current ] ) {
+			jqXHR[ s.responseFields[ current ] ] = response;
+		}
+
+		// Apply the dataFilter if provided
+		if ( !prev && isSuccess && s.dataFilter ) {
+			response = s.dataFilter( response, s.dataType );
+		}
+
+		prev = current;
+		current = dataTypes.shift();
+
+		if ( current ) {
+
+			// There's only work to do if current dataType is non-auto
+			if ( current === "*" ) {
+
+				current = prev;
+
+			// Convert response if prev dataType is non-auto and differs from current
+			} else if ( prev !== "*" && prev !== current ) {
+
+				// Seek a direct converter
+				conv = converters[ prev + " " + current ] || converters[ "* " + current ];
+
+				// If none found, seek a pair
+				if ( !conv ) {
+					for ( conv2 in converters ) {
+
+						// If conv2 outputs current
+						tmp = conv2.split( " " );
+						if ( tmp[ 1 ] === current ) {
+
+							// If prev can be converted to accepted input
+							conv = converters[ prev + " " + tmp[ 0 ] ] ||
+								converters[ "* " + tmp[ 0 ] ];
+							if ( conv ) {
+
+								// Condense equivalence converters
+								if ( conv === true ) {
+									conv = converters[ conv2 ];
+
+								// Otherwise, insert the intermediate dataType
+								} else if ( converters[ conv2 ] !== true ) {
+									current = tmp[ 0 ];
+									dataTypes.unshift( tmp[ 1 ] );
+								}
+								break;
+							}
+						}
+					}
+				}
+
+				// Apply converter (if not an equivalence)
+				if ( conv !== true ) {
+
+					// Unless errors are allowed to bubble, catch and return them
+					if ( conv && s.throws ) {
+						response = conv( response );
+					} else {
+						try {
+							response = conv( response );
+						} catch ( e ) {
+							return {
+								state: "parsererror",
+								error: conv ? e : "No conversion from " + prev + " to " + current
+							};
+						}
+					}
+				}
+			}
+		}
+	}
+
+	return { state: "success", data: response };
+}
+
+jQuery.extend( {
+
+	// Counter for holding the number of active queries
+	active: 0,
+
+	// Last-Modified header cache for next request
+	lastModified: {},
+	etag: {},
+
+	ajaxSettings: {
+		url: location.href,
+		type: "GET",
+		isLocal: rlocalProtocol.test( location.protocol ),
+		global: true,
+		processData: true,
+		async: true,
+		contentType: "application/x-www-form-urlencoded; charset=UTF-8",
+
+		/*
+		timeout: 0,
+		data: null,
+		dataType: null,
+		username: null,
+		password: null,
+		cache: null,
+		throws: false,
+		traditional: false,
+		headers: {},
+		*/
+
+		accepts: {
+			"*": allTypes,
+			text: "text/plain",
+			html: "text/html",
+			xml: "application/xml, text/xml",
+			json: "application/json, text/javascript"
+		},
+
+		contents: {
+			xml: /\bxml\b/,
+			html: /\bhtml/,
+			json: /\bjson\b/
+		},
+
+		responseFields: {
+			xml: "responseXML",
+			text: "responseText",
+			json: "responseJSON"
+		},
+
+		// Data converters
+		// Keys separate source (or catchall "*") and destination types with a single space
+		converters: {
+
+			// Convert anything to text
+			"* text": String,
+
+			// Text to html (true = no transformation)
+			"text html": true,
+
+			// Evaluate text as a json expression
+			"text json": JSON.parse,
+
+			// Parse text as xml
+			"text xml": jQuery.parseXML
+		},
+
+		// For options that shouldn't be deep extended:
+		// you can add your own custom options here if
+		// and when you create one that shouldn't be
+		// deep extended (see ajaxExtend)
+		flatOptions: {
+			url: true,
+			context: true
+		}
+	},
+
+	// Creates a full fledged settings object into target
+	// with both ajaxSettings and settings fields.
+	// If target is omitted, writes into ajaxSettings.
+	ajaxSetup: function( target, settings ) {
+		return settings ?
+
+			// Building a settings object
+			ajaxExtend( ajaxExtend( target, jQuery.ajaxSettings ), settings ) :
+
+			// Extending ajaxSettings
+			ajaxExtend( jQuery.ajaxSettings, target );
+	},
+
+	ajaxPrefilter: addToPrefiltersOrTransports( prefilters ),
+	ajaxTransport: addToPrefiltersOrTransports( transports ),
+
+	// Main method
+	ajax: function( url, options ) {
+
+		// If url is an object, simulate pre-1.5 signature
+		if ( typeof url === "object" ) {
+			options = url;
+			url = undefined;
+		}
+
+		// Force options to be an object
+		options = options || {};
+
+		var transport,
+
+			// URL without anti-cache param
+			cacheURL,
+
+			// Response headers
+			responseHeadersString,
+			responseHeaders,
+
+			// timeout handle
+			timeoutTimer,
+
+			// Url cleanup var
+			urlAnchor,
+
+			// Request state (becomes false upon send and true upon completion)
+			completed,
+
+			// To know if global events are to be dispatched
+			fireGlobals,
+
+			// Loop variable
+			i,
+
+			// uncached part of the url
+			uncached,
+
+			// Create the final options object
+			s = jQuery.ajaxSetup( {}, options ),
+
+			// Callbacks context
+			callbackContext = s.context || s,
+
+			// Context for global events is callbackContext if it is a DOM node or jQuery collection
+			globalEventContext = s.context &&
+				( callbackContext.nodeType || callbackContext.jquery ) ?
+					jQuery( callbackContext ) :
+					jQuery.event,
+
+			// Deferreds
+			deferred = jQuery.Deferred(),
+			completeDeferred = jQuery.Callbacks( "once memory" ),
+
+			// Status-dependent callbacks
+			statusCode = s.statusCode || {},
+
+			// Headers (they are sent all at once)
+			requestHeaders = {},
+			requestHeadersNames = {},
+
+			// Default abort message
+			strAbort = "canceled",
+
+			// Fake xhr
+			jqXHR = {
+				readyState: 0,
+
+				// Builds headers hashtable if needed
+				getResponseHeader: function( key ) {
+					var match;
+					if ( completed ) {
+						if ( !responseHeaders ) {
+							responseHeaders = {};
+							while ( ( match = rheaders.exec( responseHeadersString ) ) ) {
+								responseHeaders[ match[ 1 ].toLowerCase() + " " ] =
+									( responseHeaders[ match[ 1 ].toLowerCase() + " " ] || [] )
+										.concat( match[ 2 ] );
+							}
+						}
+						match = responseHeaders[ key.toLowerCase() + " " ];
+					}
+					return match == null ? null : match.join( ", " );
+				},
+
+				// Raw string
+				getAllResponseHeaders: function() {
+					return completed ? responseHeadersString : null;
+				},
+
+				// Caches the header
+				setRequestHeader: function( name, value ) {
+					if ( completed == null ) {
+						name = requestHeadersNames[ name.toLowerCase() ] =
+							requestHeadersNames[ name.toLowerCase() ] || name;
+						requestHeaders[ name ] = value;
+					}
+					return this;
+				},
+
+				// Overrides response content-type header
+				overrideMimeType: function( type ) {
+					if ( completed == null ) {
+						s.mimeType = type;
+					}
+					return this;
+				},
+
+				// Status-dependent callbacks
+				statusCode: function( map ) {
+					var code;
+					if ( map ) {
+						if ( completed ) {
+
+							// Execute the appropriate callbacks
+							jqXHR.always( map[ jqXHR.status ] );
+						} else {
+
+							// Lazy-add the new callbacks in a way that preserves old ones
+							for ( code in map ) {
+								statusCode[ code ] = [ statusCode[ code ], map[ code ] ];
+							}
+						}
+					}
+					return this;
+				},
+
+				// Cancel the request
+				abort: function( statusText ) {
+					var finalText = statusText || strAbort;
+					if ( transport ) {
+						transport.abort( finalText );
+					}
+					done( 0, finalText );
+					return this;
+				}
+			};
+
+		// Attach deferreds
+		deferred.promise( jqXHR );
+
+		// Add protocol if not provided (prefilters might expect it)
+		// Handle falsy url in the settings object (#10093: consistency with old signature)
+		// We also use the url parameter if available
+		s.url = ( ( url || s.url || location.href ) + "" )
+			.replace( rprotocol, location.protocol + "//" );
+
+		// Alias method option to type as per ticket #12004
+		s.type = options.method || options.type || s.method || s.type;
+
+		// Extract dataTypes list
+		s.dataTypes = ( s.dataType || "*" ).toLowerCase().match( rnothtmlwhite ) || [ "" ];
+
+		// A cross-domain request is in order when the origin doesn't match the current origin.
+		if ( s.crossDomain == null ) {
+			urlAnchor = document.createElement( "a" );
+
+			// Support: IE <=8 - 11, Edge 12 - 15
+			// IE throws exception on accessing the href property if url is malformed,
+			// e.g. http://example.com:80x/
+			try {
+				urlAnchor.href = s.url;
+
+				// Support: IE <=8 - 11 only
+				// Anchor's host property isn't correctly set when s.url is relative
+				urlAnchor.href = urlAnchor.href;
+				s.crossDomain = originAnchor.protocol + "//" + originAnchor.host !==
+					urlAnchor.protocol + "//" + urlAnchor.host;
+			} catch ( e ) {
+
+				// If there is an error parsing the URL, assume it is crossDomain,
+				// it can be rejected by the transport if it is invalid
+				s.crossDomain = true;
+			}
+		}
+
+		// Convert data if not already a string
+		if ( s.data && s.processData && typeof s.data !== "string" ) {
+			s.data = jQuery.param( s.data, s.traditional );
+		}
+
+		// Apply prefilters
+		inspectPrefiltersOrTransports( prefilters, s, options, jqXHR );
+
+		// If request was aborted inside a prefilter, stop there
+		if ( completed ) {
+			return jqXHR;
+		}
+
+		// We can fire global events as of now if asked to
+		// Don't fire events if jQuery.event is undefined in an AMD-usage scenario (#15118)
+		fireGlobals = jQuery.event && s.global;
+
+		// Watch for a new set of requests
+		if ( fireGlobals && jQuery.active++ === 0 ) {
+			jQuery.event.trigger( "ajaxStart" );
+		}
+
+		// Uppercase the type
+		s.type = s.type.toUpperCase();
+
+		// Determine if request has content
+		s.hasContent = !rnoContent.test( s.type );
+
+		// Save the URL in case we're toying with the If-Modified-Since
+		// and/or If-None-Match header later on
+		// Remove hash to simplify url manipulation
+		cacheURL = s.url.replace( rhash, "" );
+
+		// More options handling for requests with no content
+		if ( !s.hasContent ) {
+
+			// Remember the hash so we can put it back
+			uncached = s.url.slice( cacheURL.length );
+
+			// If data is available and should be processed, append data to url
+			if ( s.data && ( s.processData || typeof s.data === "string" ) ) {
+				cacheURL += ( rquery.test( cacheURL ) ? "&" : "?" ) + s.data;
+
+				// #9682: remove data so that it's not used in an eventual retry
+				delete s.data;
+			}
+
+			// Add or update anti-cache param if needed
+			if ( s.cache === false ) {
+				cacheURL = cacheURL.replace( rantiCache, "$1" );
+				uncached = ( rquery.test( cacheURL ) ? "&" : "?" ) + "_=" + ( nonce++ ) + uncached;
+			}
+
+			// Put hash and anti-cache on the URL that will be requested (gh-1732)
+			s.url = cacheURL + uncached;
+
+		// Change '%20' to '+' if this is encoded form body content (gh-2658)
+		} else if ( s.data && s.processData &&
+			( s.contentType || "" ).indexOf( "application/x-www-form-urlencoded" ) === 0 ) {
+			s.data = s.data.replace( r20, "+" );
+		}
+
+		// Set the If-Modified-Since and/or If-None-Match header, if in ifModified mode.
+		if ( s.ifModified ) {
+			if ( jQuery.lastModified[ cacheURL ] ) {
+				jqXHR.setRequestHeader( "If-Modified-Since", jQuery.lastModified[ cacheURL ] );
+			}
+			if ( jQuery.etag[ cacheURL ] ) {
+				jqXHR.setRequestHeader( "If-None-Match", jQuery.etag[ cacheURL ] );
+			}
+		}
+
+		// Set the correct header, if data is being sent
+		if ( s.data && s.hasContent && s.contentType !== false || options.contentType ) {
+			jqXHR.setRequestHeader( "Content-Type", s.contentType );
+		}
+
+		// Set the Accepts header for the server, depending on the dataType
+		jqXHR.setRequestHeader(
+			"Accept",
+			s.dataTypes[ 0 ] && s.accepts[ s.dataTypes[ 0 ] ] ?
+				s.accepts[ s.dataTypes[ 0 ] ] +
+					( s.dataTypes[ 0 ] !== "*" ? ", " + allTypes + "; q=0.01" : "" ) :
+				s.accepts[ "*" ]
+		);
+
+		// Check for headers option
+		for ( i in s.headers ) {
+			jqXHR.setRequestHeader( i, s.headers[ i ] );
+		}
+
+		// Allow custom headers/mimetypes and early abort
+		if ( s.beforeSend &&
+			( s.beforeSend.call( callbackContext, jqXHR, s ) === false || completed ) ) {
+
+			// Abort if not done already and return
+			return jqXHR.abort();
+		}
+
+		// Aborting is no longer a cancellation
+		strAbort = "abort";
+
+		// Install callbacks on deferreds
+		completeDeferred.add( s.complete );
+		jqXHR.done( s.success );
+		jqXHR.fail( s.error );
+
+		// Get transport
+		transport = inspectPrefiltersOrTransports( transports, s, options, jqXHR );
+
+		// If no transport, we auto-abort
+		if ( !transport ) {
+			done( -1, "No Transport" );
+		} else {
+			jqXHR.readyState = 1;
+
+			// Send global event
+			if ( fireGlobals ) {
+				globalEventContext.trigger( "ajaxSend", [ jqXHR, s ] );
+			}
+
+			// If request was aborted inside ajaxSend, stop there
+			if ( completed ) {
+				return jqXHR;
+			}
+
+			// Timeout
+			if ( s.async && s.timeout > 0 ) {
+				timeoutTimer = window.setTimeout( function() {
+					jqXHR.abort( "timeout" );
+				}, s.timeout );
+			}
+
+			try {
+				completed = false;
+				transport.send( requestHeaders, done );
+			} catch ( e ) {
+
+				// Rethrow post-completion exceptions
+				if ( completed ) {
+					throw e;
+				}
+
+				// Propagate others as results
+				done( -1, e );
+			}
+		}
+
+		// Callback for when everything is done
+		function done( status, nativeStatusText, responses, headers ) {
+			var isSuccess, success, error, response, modified,
+				statusText = nativeStatusText;
+
+			// Ignore repeat invocations
+			if ( completed ) {
+				return;
+			}
+
+			completed = true;
+
+			// Clear timeout if it exists
+			if ( timeoutTimer ) {
+				window.clearTimeout( timeoutTimer );
+			}
+
+			// Dereference transport for early garbage collection
+			// (no matter how long the jqXHR object will be used)
+			transport = undefined;
+
+			// Cache response headers
+			responseHeadersString = headers || "";
+
+			// Set readyState
+			jqXHR.readyState = status > 0 ? 4 : 0;
+
+			// Determine if successful
+			isSuccess = status >= 200 && status < 300 || status === 304;
+
+			// Get response data
+			if ( responses ) {
+				response = ajaxHandleResponses( s, jqXHR, responses );
+			}
+
+			// Convert no matter what (that way responseXXX fields are always set)
+			response = ajaxConvert( s, response, jqXHR, isSuccess );
+
+			// If successful, handle type chaining
+			if ( isSuccess ) {
+
+				// Set the If-Modified-Since and/or If-None-Match header, if in ifModified mode.
+				if ( s.ifModified ) {
+					modified = jqXHR.getResponseHeader( "Last-Modified" );
+					if ( modified ) {
+						jQuery.lastModified[ cacheURL ] = modified;
+					}
+					modified = jqXHR.getResponseHeader( "etag" );
+					if ( modified ) {
+						jQuery.etag[ cacheURL ] = modified;
+					}
+				}
+
+				// if no content
+				if ( status === 204 || s.type === "HEAD" ) {
+					statusText = "nocontent";
+
+				// if not modified
+				} else if ( status === 304 ) {
+					statusText = "notmodified";
+
+				// If we have data, let's convert it
+				} else {
+					statusText = response.state;
+					success = response.data;
+					error = response.error;
+					isSuccess = !error;
+				}
+			} else {
+
+				// Extract error from statusText and normalize for non-aborts
+				error = statusText;
+				if ( status || !statusText ) {
+					statusText = "error";
+					if ( status < 0 ) {
+						status = 0;
+					}
+				}
+			}
+
+			// Set data for the fake xhr object
+			jqXHR.status = status;
+			jqXHR.statusText = ( nativeStatusText || statusText ) + "";
+
+			// Success/Error
+			if ( isSuccess ) {
+				deferred.resolveWith( callbackContext, [ success, statusText, jqXHR ] );
+			} else {
+				deferred.rejectWith( callbackContext, [ jqXHR, statusText, error ] );
+			}
+
+			// Status-dependent callbacks
+			jqXHR.statusCode( statusCode );
+			statusCode = undefined;
+
+			if ( fireGlobals ) {
+				globalEventContext.trigger( isSuccess ? "ajaxSuccess" : "ajaxError",
+					[ jqXHR, s, isSuccess ? success : error ] );
+			}
+
+			// Complete
+			completeDeferred.fireWith( callbackContext, [ jqXHR, statusText ] );
+
+			if ( fireGlobals ) {
+				globalEventContext.trigger( "ajaxComplete", [ jqXHR, s ] );
+
+				// Handle the global AJAX counter
+				if ( !( --jQuery.active ) ) {
+					jQuery.event.trigger( "ajaxStop" );
+				}
+			}
+		}
+
+		return jqXHR;
+	},
+
+	getJSON: function( url, data, callback ) {
+		return jQuery.get( url, data, callback, "json" );
+	},
+
+	getScript: function( url, callback ) {
+		return jQuery.get( url, undefined, callback, "script" );
+	}
+} );
+
+jQuery.each( [ "get", "post" ], function( i, method ) {
+	jQuery[ method ] = function( url, data, callback, type ) {
+
+		// Shift arguments if data argument was omitted
+		if ( isFunction( data ) ) {
+			type = type || callback;
+			callback = data;
+			data = undefined;
+		}
+
+		// The url can be an options object (which then must have .url)
+		return jQuery.ajax( jQuery.extend( {
+			url: url,
+			type: method,
+			dataType: type,
+			data: data,
+			success: callback
+		}, jQuery.isPlainObject( url ) && url ) );
+	};
+} );
+
+
+jQuery._evalUrl = function( url, options ) {
+	return jQuery.ajax( {
+		url: url,
+
+		// Make this explicit, since user can override this through ajaxSetup (#11264)
+		type: "GET",
+		dataType: "script",
+		cache: true,
+		async: false,
+		global: false,
+
+		// Only evaluate the response if it is successful (gh-4126)
+		// dataFilter is not invoked for failure responses, so using it instead
+		// of the default converter is kludgy but it works.
+		converters: {
+			"text script": function() {}
+		},
+		dataFilter: function( response ) {
+			jQuery.globalEval( response, options );
+		}
+	} );
+};
+
+
+jQuery.fn.extend( {
+	wrapAll: function( html ) {
+		var wrap;
+
+		if ( this[ 0 ] ) {
+			if ( isFunction( html ) ) {
+				html = html.call( this[ 0 ] );
+			}
+
+			// The elements to wrap the target around
+			wrap = jQuery( html, this[ 0 ].ownerDocument ).eq( 0 ).clone( true );
+
+			if ( this[ 0 ].parentNode ) {
+				wrap.insertBefore( this[ 0 ] );
+			}
+
+			wrap.map( function() {
+				var elem = this;
+
+				while ( elem.firstElementChild ) {
+					elem = elem.firstElementChild;
+				}
+
+				return elem;
+			} ).append( this );
+		}
+
+		return this;
+	},
+
+	wrapInner: function( html ) {
+		if ( isFunction( html ) ) {
+			return this.each( function( i ) {
+				jQuery( this ).wrapInner( html.call( this, i ) );
+			} );
+		}
+
+		return this.each( function() {
+			var self = jQuery( this ),
+				contents = self.contents();
+
+			if ( contents.length ) {
+				contents.wrapAll( html );
+
+			} else {
+				self.append( html );
+			}
+		} );
+	},
+
+	wrap: function( html ) {
+		var htmlIsFunction = isFunction( html );
+
+		return this.each( function( i ) {
+			jQuery( this ).wrapAll( htmlIsFunction ? html.call( this, i ) : html );
+		} );
+	},
+
+	unwrap: function( selector ) {
+		this.parent( selector ).not( "body" ).each( function() {
+			jQuery( this ).replaceWith( this.childNodes );
+		} );
+		return this;
+	}
+} );
+
+
+jQuery.expr.pseudos.hidden = function( elem ) {
+	return !jQuery.expr.pseudos.visible( elem );
+};
+jQuery.expr.pseudos.visible = function( elem ) {
+	return !!( elem.offsetWidth || elem.offsetHeight || elem.getClientRects().length );
+};
+
+
+
+
+jQuery.ajaxSettings.xhr = function() {
+	try {
+		return new window.XMLHttpRequest();
+	} catch ( e ) {}
+};
+
+var xhrSuccessStatus = {
+
+		// File protocol always yields status code 0, assume 200
+		0: 200,
+
+		// Support: IE <=9 only
+		// #1450: sometimes IE returns 1223 when it should be 204
+		1223: 204
+	},
+	xhrSupported = jQuery.ajaxSettings.xhr();
+
+support.cors = !!xhrSupported && ( "withCredentials" in xhrSupported );
+support.ajax = xhrSupported = !!xhrSupported;
+
+jQuery.ajaxTransport( function( options ) {
+	var callback, errorCallback;
+
+	// Cross domain only allowed if supported through XMLHttpRequest
+	if ( support.cors || xhrSupported && !options.crossDomain ) {
+		return {
+			send: function( headers, complete ) {
+				var i,
+					xhr = options.xhr();
+
+				xhr.open(
+					options.type,
+					options.url,
+					options.async,
+					options.username,
+					options.password
+				);
+
+				// Apply custom fields if provided
+				if ( options.xhrFields ) {
+					for ( i in options.xhrFields ) {
+						xhr[ i ] = options.xhrFields[ i ];
+					}
+				}
+
+				// Override mime type if needed
+				if ( options.mimeType && xhr.overrideMimeType ) {
+					xhr.overrideMimeType( options.mimeType );
+				}
+
+				// X-Requested-With header
+				// For cross-domain requests, seeing as conditions for a preflight are
+				// akin to a jigsaw puzzle, we simply never set it to be sure.
+				// (it can always be set on a per-request basis or even using ajaxSetup)
+				// For same-domain requests, won't change header if already provided.
+				if ( !options.crossDomain && !headers[ "X-Requested-With" ] ) {
+					headers[ "X-Requested-With" ] = "XMLHttpRequest";
+				}
+
+				// Set headers
+				for ( i in headers ) {
+					xhr.setRequestHeader( i, headers[ i ] );
+				}
+
+				// Callback
+				callback = function( type ) {
+					return function() {
+						if ( callback ) {
+							callback = errorCallback = xhr.onload =
+								xhr.onerror = xhr.onabort = xhr.ontimeout =
+									xhr.onreadystatechange = null;
+
+							if ( type === "abort" ) {
+								xhr.abort();
+							} else if ( type === "error" ) {
+
+								// Support: IE <=9 only
+								// On a manual native abort, IE9 throws
+								// errors on any property access that is not readyState
+								if ( typeof xhr.status !== "number" ) {
+									complete( 0, "error" );
+								} else {
+									complete(
+
+										// File: protocol always yields status 0; see #8605, #14207
+										xhr.status,
+										xhr.statusText
+									);
+								}
+							} else {
+								complete(
+									xhrSuccessStatus[ xhr.status ] || xhr.status,
+									xhr.statusText,
+
+									// Support: IE <=9 only
+									// IE9 has no XHR2 but throws on binary (trac-11426)
+									// For XHR2 non-text, let the caller handle it (gh-2498)
+									( xhr.responseType || "text" ) !== "text"  ||
+									typeof xhr.responseText !== "string" ?
+										{ binary: xhr.response } :
+										{ text: xhr.responseText },
+									xhr.getAllResponseHeaders()
+								);
+							}
+						}
+					};
+				};
+
+				// Listen to events
+				xhr.onload = callback();
+				errorCallback = xhr.onerror = xhr.ontimeout = callback( "error" );
+
+				// Support: IE 9 only
+				// Use onreadystatechange to replace onabort
+				// to handle uncaught aborts
+				if ( xhr.onabort !== undefined ) {
+					xhr.onabort = errorCallback;
+				} else {
+					xhr.onreadystatechange = function() {
+
+						// Check readyState before timeout as it changes
+						if ( xhr.readyState === 4 ) {
+
+							// Allow onerror to be called first,
+							// but that will not handle a native abort
+							// Also, save errorCallback to a variable
+							// as xhr.onerror cannot be accessed
+							window.setTimeout( function() {
+								if ( callback ) {
+									errorCallback();
+								}
+							} );
+						}
+					};
+				}
+
+				// Create the abort callback
+				callback = callback( "abort" );
+
+				try {
+
+					// Do send the request (this may raise an exception)
+					xhr.send( options.hasContent && options.data || null );
+				} catch ( e ) {
+
+					// #14683: Only rethrow if this hasn't been notified as an error yet
+					if ( callback ) {
+						throw e;
+					}
+				}
+			},
+
+			abort: function() {
+				if ( callback ) {
+					callback();
+				}
+			}
+		};
+	}
+} );
+
+
+
+
+// Prevent auto-execution of scripts when no explicit dataType was provided (See gh-2432)
+jQuery.ajaxPrefilter( function( s ) {
+	if ( s.crossDomain ) {
+		s.contents.script = false;
+	}
+} );
+
+// Install script dataType
+jQuery.ajaxSetup( {
+	accepts: {
+		script: "text/javascript, application/javascript, " +
+			"application/ecmascript, application/x-ecmascript"
+	},
+	contents: {
+		script: /\b(?:java|ecma)script\b/
+	},
+	converters: {
+		"text script": function( text ) {
+			jQuery.globalEval( text );
+			return text;
+		}
+	}
+} );
+
+// Handle cache's special case and crossDomain
+jQuery.ajaxPrefilter( "script", function( s ) {
+	if ( s.cache === undefined ) {
+		s.cache = false;
+	}
+	if ( s.crossDomain ) {
+		s.type = "GET";
+	}
+} );
+
+// Bind script tag hack transport
+jQuery.ajaxTransport( "script", function( s ) {
+
+	// This transport only deals with cross domain or forced-by-attrs requests
+	if ( s.crossDomain || s.scriptAttrs ) {
+		var script, callback;
+		return {
+			send: function( _, complete ) {
+				script = jQuery( "
+        
+        
+        
+        
+    
+    
+
+    
+    
+    
+    
+     
+
+
+
+
+   
+  

+    
+    
+
+    

+
+      
+      
+
+
+      

+        
+        

+        
+          
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+

+
+  
+
+  
+  

+

+          

+           

+            
+  

+
1. API 分层模型

+

+
1.1. 简介

+
为了不影响用户应用层代码因为芯片驱动的不同而频繁修改，bl_mcu_sdk 的外设 API 采用了 HAL 层的思想，屏蔽了底层硬件的实现。而 HAL 层又分为两大类：

+
    
+
  • 设备驱动管理层：提供一套标准的接口，具体实现由外设驱动适配层实现。
    • 
+
  • 外设驱动适配层：实现设备驱动管理层的标准接口，并且拓展自己的独特的接口。
    • 
+

+
整体的代码分层框架如图所示：

+

+
+
code structure

+

+
    
+
  • 应用层是用户自己编写的代码，接口则是调用 hal 层的接口。
    • 
+
  • HAL 层提供给应用层接口，底层调用 std 层，不同的芯片调用不同的 std 层。
    • 
+
  • STD 层则是对硬件寄存器进行简单封装，由外设驱动适配层进行调用。
    • 
+

+

+

+
1.2. 设备驱动管理层实现

+
设备驱动管理层的实现采用了面向对象的思想，首先我们将外设看成是一个设备或者是文件，秉承 一切皆文件 的理念，而文件又都具有标准的调用接口：open、close、ctrl、write、read、callback，不同文件类别不同（比如串口设备、ADC设备、SPI设备），并且打开的方式也不同（比如轮询、中断、DMA），由此，我们可以构建出一个对象的基类（父类）。

+
基类

+
struct device
+{
+    char name[NAME_MAX];            /*name of device */
+    dlist_t list;                   /*list node of device */
+    enum device_status_type status; /*status of device */
+    enum device_class_type type;    /*type of device */
+    uint16_t oflag;                 /*oflag of device */
+
+    int (*open)(struct device *dev, uint16_t oflag);
+    int (*close)(struct device *dev);
+    int (*control)(struct device *dev, int cmd, void *args);
+    int (*write)(struct device *dev, uint32_t pos, const void *buffer, uint32_t size);
+    int (*read)(struct device *dev, uint32_t pos, void *buffer, uint32_t size);
+    void (*callback)(struct device *dev, void *args, uint32_t size, uint32_t event);
+    void *handle;
+};
+

+

+
基类成员：name

+
给设备取名，后面会使用 device_find 找到这个设备。

+
基类成员：type

+
type 记录当前设备的类别，可以选择的 type 类型如下。

+
enum device_class_type
+{
+    DEVICE_CLASS_NONE = 0,
+    DEVICE_CLASS_GPIO,
+    DEVICE_CLASS_UART,
+    DEVICE_CLASS_SPI,
+    DEVICE_CLASS_I2C,
+    DEVICE_CLASS_ADC,
+    DEVICE_CLASS_DMA,
+    DEVICE_CLASS_TIMER,
+    DEVICE_CLASS_PWM,
+    DEVICE_CLASS_SDIO,
+    DEVICE_CLASS_USB,
+    DEVICE_CLASS_I2S,
+    DEVICE_CLASS_CAMERA,
+    DEVICE_CLASS_SEC_HASH,
+} ;
+

+

+
基类成员：status

+
status 用来记录当前设备的状态，当前提供 4 种状态。

+
enum device_status_type
+{
+    DEVICE_UNREGISTER = 0,
+    DEVICE_REGISTERED,
+    DEVICE_OPENED,
+    DEVICE_CLOSED
+} ;
+

+

+
基类成员：oflag

+
oflag 记录 注册时填入的 flag 信息以及使用 device_open 时填入的 oflag 信息。

+
基类成员：list

+
设备的增加和删除使用双向链表进行存储，节省内存。

+
基类成员：标准的函数指针

+
为不同的外设提供了标准的函数接口，当外设实现此类接口并赋值给该成员，便能达到重写的功能。

+

+

+
1.3. 设备驱动管理层标准接口

+

+
1.3.1. device_register

+
device_register 用于设备的注册，将设备信息注册到链表当中。

+
int device_register(struct device *dev, const char *name, uint16_t flag);
+

+

+
    
+
  • dev 设备句柄。
    • 
+
  • name 设备名称。
    • 
+
  • flag 设备的读写属性
    • 
+
  • return 返回错误码，0 表示注册成功，其他表示错误。
    • 
+

+
flag 可以写入以下参数，表示：只读、只写、可读可写。

+
#define DEVICE_OFLAG_RDONLY 0x1000 /* 以只读方式打开设备 */
+#define DEVICE_OFLAG_WRONLY 0x2000 /* 以只写方式打开设备 */
+#define DEVICE_OFLAG_RDWR   0x3000 /* 以读写方式打开设备 */
+

+

+

+

+
1.3.2. device_unregister

+
device_unregister 用于设备的删除，将设备信息从链表中删除。

+
int device_unregister(const char *name);
+

+

+
    
+
  • dev 设备句柄
    • 
+
  • name 要删除的设备名称
    • 
+
  • return 错误码，0 表示删除，其他表示错误
    • 
+

+

+

+
1.3.3. device_find

+
device_find 用于根据 name 从链表中寻找设备，并返回设备句柄的首地址。

+
struct device *device_find(const char *name);
+

+

+
    
+
  • dev 设备句柄
    • 
+
  • name 要查找的设备名称
    • 
+
  • return 错误码，不为 0 表示找到的设备句柄，NULL 表示未找到该设备。
    • 
+

+

+

+
1.3.4. device_open

+
device_open 用于设备的打开，oflag 表示以何种方式打开，目前提供 6 种打开方式。底层调用 dev 句柄中的 open 成员。

+
int device_open(struct device *dev, uint16_t oflag);
+

+

+
    
+
  • dev 设备句柄
    • 
+
  • oflag 设备的打开方式
    • 
+
  • return 错误码，0 表示打开成功，其他表示错误
    • 
+

+
oflag 可以写入以下参数：

+
#define DEVICE_OFLAG_STREAM_TX  0x001 /* 设备以轮训发送模式打开 */
+#define DEVICE_OFLAG_STREAM_RX  0x002 /* 设备以轮训接收模式打开 */
+#define DEVICE_OFLAG_INT_TX     0x004 /* 设备以中断发送模式打开 */
+#define DEVICE_OFLAG_INT_RX     0x008 /* 设备以中断接收模式打开 */
+#define DEVICE_OFLAG_DMA_TX     0x010 /* 设备以 DMA 发送模式打开 */
+#define DEVICE_OFLAG_DMA_RX     0x020 /* 设备以 DMA 接收模式打开 */
+

+

+

+

+
1.3.5. device_close

+
device_close 用于设备的关闭。底层调用 dev 句柄中的 close 成员。

+
int device_close(struct device *dev);
+

+

+
    
+
  • dev 设备句柄
    • 
+
  • return 错误码，0 表示关闭成功，其他表示错误
    • 
+

+

+

+
1.3.6. device_control

+
device_control 用于根据命令对设备进行控制和参数的修改。底层调用 dev 句柄中的 control 成员。

+
int device_control(struct device *dev, int cmd, void *args);
+

+

+
    
+
  • dev 设备句柄
    • 
+
  • cmd 设备控制命令
    • 
+
  • args 控制参数
    • 
+
  • return 不同的控制命令返回的意义不同。
    • 
+

+
cmd 提供了以下标准命令，除此之外，不同外设还具有自己的命令

+
#define DEVICE_CTRL_SET_INT     0x01    /* 设置中断 */
+#define DEVICE_CTRL_CLR_INT     0x02    /* 清中断 */
+#define DEVICE_CTRL_GET_INT     0x03    /* 获取中断状态 */
+#define DEVICE_CTRL_RESUME      0x04    /* 恢复设备 */
+#define DEVICE_CTRL_SUSPEND     0x05    /* 挂起设备 */
+#define DEVICE_CTRL_CONFIG      0x06    /* 配置设备 */
+#define DEVICE_CTRL_GET_CONFIG  0x07    /* 获取设备配置 */
+

+

+

+

+
1.3.7. device_write

+
device_write 用于数据的发送，发送方式根据打开方式可以是轮询、中断、dma。底层调用 dev 句柄中的 write 成员。

+
int device_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size);
+

+

+
    
+
  • dev 设备句柄
    • 
+
  • pos 不同的设备 pos 的意义不同
    • 
+
  • buffer 要写入的 buffer 缓冲区
    • 
+
  • size 要写入的长度
    • 
+
  • return 错误码，0 表示写入成功，其他表示错误
    • 
+

+

+

+
1.3.8. device_read

+
device_read 用于数据的接收，接收方式根据打开方式可以是轮询、中断、dma。底层调用 dev 句柄中的 read 成员。

+
int device_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size);
+

+

+
    
+
  • dev 设备句柄
    • 
+
  • pos 不同的设备 pos 的意义不同
    • 
+
  • buffer 要读入的 buffer 缓冲区
    • 
+
  • size 要读入的长度
    • 
+
  • return 错误码，0 表示读入成功，其他表示错误
    • 
+

+

+

+
1.3.9. device_set_callback

+
device_set_callback 用于中断回调函数的注册。底层调用 dev 句柄中的 callback 成员。

+
int device_set_callback(struct device *dev, void (*callback)(struct device *dev, void *args, uint32_t size, uint32_t event));
+

+

+
    
+
  • dev 设备句柄
    • 
+
  • callback 要注册的中断回调函数
    
+
    
+
      
+
    • dev 设备句柄
      • 
+
    • args 不同外设意义不同
      • 
+
    • size 传输长度
      • 
+
    • event 中断事件类型
      • 
+
    
+
    
+
    • 
+

+

+

+

+
1.4. 外设驱动适配层实现

+
子类继承父类

+
不同的外设首成员为 struct device ，这就相当于父类的继承，从而可以使用子类来访问父类成员，当使用子类修改父类成员时，便拥有了子类自己的功能。实现原理是不同结构体的首地址是该结构体中首个成员的地址。

+
typedef struct xxx_device
+{
+    struct device parent;
+
+} xxx_device_t;
+

+

+
重写标准接口

+
每个外设都有一个 xxx_register 函数，用来重写标准接口。

+
dev->open = xxx_open;
+dev->close = xxx_close;
+dev->control = xxx_control;
+dev->write = xxx_write;
+dev->read = xxx_read;
+

+

+

+

+

+
2. 时钟树

+

+
2.1. 简介

+
博流系列芯片拥有丰富的时钟源选择，为方便用户配置，提供了时钟树配置表，不需要用户手动调用时钟设置接口，用户只需要关心最终的系统时钟和外设时钟频率即可。时钟配置表位于 bsp/board/xxx_board 目录下 xxx_clock_config.h 文件。

+

+

+
2.2. 时钟频率获取接口

+

+
2.2.1. system_clock_get

+
system_clock_get 用来获取系统时钟频率。

+
uint32_t system_clock_get(enum system_clock_type type);
+

+

+
    
+
  • type 获取的系统时钟频率类型
    • 
+

+
type 提供以下几种类型

+
enum system_clock_type
+{
+    SYSTEM_CLOCK_ROOT_CLOCK = 0,
+    SYSTEM_CLOCK_FCLK,
+    SYSTEM_CLOCK_BCLK,
+    SYSTEM_CLOCK_XCLK,
+};
+

+

+

+

+
2.2.2. peripheral_clock_get

+
peripheral_clock_get 用来获取外设时钟频率。

+
uint32_t peripheral_clock_get(enum peripheral_clock_type type);
+

+

+
    
+
  • type 获取的外设时钟频率类型
    • 
+

+
type 提供以下几种类型

+
enum peripheral_clock_type
+{
+    PERIPHERAL_CLOCK_UART = 0,
+    PERIPHERAL_CLOCK_SPI,
+    PERIPHERAL_CLOCK_I2C,
+    PERIPHERAL_CLOCK_ADC,
+    PERIPHERAL_CLOCK_DAC,
+    PERIPHERAL_CLOCK_I2S,
+};
+

+

+

+

+

+

+
3. GPIO 设备

+

+
3.1. 简介

+
GPIO 全称 General Purpose Input Output（通用输入 / 输出），博流系列芯片的 GPIO 外设主要有以下功能。

+
    
+
  • 普通输入输出带上下拉
    • 
+
  • 复用功能带上下拉
    • 
+
  • 模拟功能
    • 
+
  • 外部中断（上升沿、下降沿、高电平、低电平）
    • 
+
  • 硬件消抖
    • 
+
  • 驱动能力控制
    • 
+

+
bl mcu sdk 的引脚配置方式分为两种。

+
    
+
  • GPIO 复用功能通过专门的 pinmux table ，用户只需要修改 table 中的相关引脚和工功能，程序会自动配置这些引脚。pinmux table 位于 bsp/board/xxx_board 目录下 pinmux_config.h 文件。
    • 
+
  • 通过标准的 GPIO 设备接口配置引脚，缺点是只能配置普通的输入输出和中断功能，复用功能建议还是使用 table 进行配置。
    • 
+

+

+

+
3.2. GPIO 设备接口

+

+
3.2.1. gpio_set_mode

+
gpio_set_mode 用来配置 gpio 的模式。

+
void gpio_set_mode(uint32_t pin, uint32_t mode);
+

+

+
    
+
  • pin 要配置的引脚
    • 
+
  • mode 要配置的引脚功能
    • 
+

+
mode 提供以下几种类型

+
#define GPIO_OUTPUT_MODE                        0
+#define GPIO_OUTPUT_PP_MODE                     1
+#define GPIO_OUTPUT_PD_MODE                     2
+#define GPIO_INPUT_MODE                         3
+#define GPIO_INPUT_PP_MODE                      4
+#define GPIO_INPUT_PD_MODE                      5
+#define GPIO_ASYNC_RISING_TRIGER_INT_MODE       6
+#define GPIO_ASYNC_FALLING_TRIGER_INT_MODE      7
+#define GPIO_ASYNC_HIGH_LEVEL_INT_MODE          8
+#define GPIO_ASYNC_LOW_LEVEL_INT_MODE           9
+#define GPIO_SYNC_RISING_TRIGER_INT_MODE        10
+#define GPIO_SYNC_FALLING_TRIGER_INT_MODE       11
+#define GPIO_SYNC_HIGH_LEVEL_INT_MODE           12
+#define GPIO_SYNC_LOW_LEVEL_INT_MODE            13
+

+

+

+

+
3.2.2. gpio_write

+
gpio_write 设置引脚电平

+
void gpio_write(uint32_t pin, uint32_t value);
+

+

+
    
+
  • pin 要设置的引脚
    • 
+
  • value 要设置的电平
    • 
+

+

+

+
3.2.3. gpio_toggle

+
gpio_toggle 翻转引脚电平

+
void gpio_toggle(uint32_t pin);
+

+

+
    
+
  • pin 要翻转的引脚
    • 
+

+

+

+
3.2.4. gpio_read

+
gpio_read 读取引脚电平

+
int  gpio_read(uint32_t pin);
+

+

+
    
+
  • pin 要读取电平的引脚
    • 
+
  • return 0 为低电平，1 为高电平
    • 
+

+

+

+
3.2.5. gpio_attach_irq

+
gpio_attach_irq 为中断引脚附加中断回调函数

+
void gpio_attach_irq(uint32_t pin, void (*cbFun)(void));
+

+

+
    
+
  • pin 要附加中断回调的引脚
    • 
+
  • cbFun 中断回调函数
    • 
+

+

+

+
3.2.6. gpio_irq_enable

+
gpio_irq_enable 读取引脚电平

+
void gpio_irq_enable(uint32_t pin,uint8_t enabled);
+

+

+
    
+
  • pin 要开启或者关闭中断的引脚
    • 
+
  • enabled 0 为关闭中断，1 为打开中断
    • 
+

+

+

+

+

+
4. UART 设备

+

+
4.1. 简介

+
UART 全称（Universal Asynchronous Receiver/Transmitter）通用异步收发传输器，博流系列芯片的 UART 外设自带可配深度 硬件fifo ，并且拥有 RTO（接收超时）中断 ，在使用中断的时候，无需频繁进入中断，fifo 和 rto 的搭配能够使得 UART 的利用性更加高效，UART 设备具有以下功能。

+
    
+
  • 轮询收发模式
    • 
+
  • 中断收发模式
    • 
+
  • dma 收发模式
    • 
+
  • 自动波特率检测
    • 
+
  • 硬件 fifo
    • 
+
  • 特有的 rto 中断
    • 
+

+

+

+
4.2. UART 设备结构体定义

+
typedef struct uart_device
+{
+    struct device parent;
+    uint8_t id;
+    uint32_t baudrate;
+    uart_databits_t databits;
+    uart_stopbits_t stopbits;
+    uart_parity_t parity;
+    uint8_t fifo_threshold;
+    void* tx_dma;
+    void* rx_dma;
+} uart_device_t;
+

+

+
    
+
  • parent 继承父类属性
    • 
+
  • id 串口 id，0 表示串口 0，,1 表示串口 1，以此类推
    • 
+
  • baudrate 波特率
    • 
+
  • databits 数据位
    • 
+
  • stopbits 停止位
    • 
+
  • parity 校验位
    • 
+
  • fifo_threshold fifo 阈值,不同 mcu 最大值不同
    • 
+
  • tx_dma 附加的发送 dma 句柄
    • 
+
  • rx_dma 附加的发送 dma 句柄
    • 
+

+
databits 提供以下类型

+
typedef enum
+{
+    UART_DATA_LEN_5 = 0,  /*!< Data length is 5 bits */
+    UART_DATA_LEN_6 = 1,  /*!< Data length is 6 bits */
+    UART_DATA_LEN_7 = 2,  /*!< Data length is 7 bits */
+    UART_DATA_LEN_8 = 3   /*!< Data length is 8 bits */
+} uart_databits_t;
+

+

+
stopbits 提供以下类型

+
typedef enum
+{
+    UART_STOP_ONE = 0,  /*!< One stop bit */
+    UART_STOP_ONE_D_FIVE = 0,  /*!< 1.5 stop bit */
+    UART_STOP_TWO = 1   /*!< Two stop bits */
+} uart_stopbits_t;
+

+

+
parity 提供以下类型

+
typedef enum
+{
+    UART_PAR_NONE = 0,  /*!< No parity */
+    UART_PAR_ODD  = 1,  /*!< Parity bit is odd */
+    UART_PAR_EVEN = 2,  /*!< Parity bit is even */
+} uart_parity_t;
+

+

+

+

+
4.3. UART 设备参数配置表

+
每一个 UART 设备都有一个参数配置，配置文件位于 bsp/board/xxx_board 目录下 peripheral_config.h 文件。当用户打开对应设备的宏，该设备的配置才生效。例如打开宏 BSP_USING_UART0 ，UART0 设备就可以进行注册和使用了。

+
uart_device_t uartx_device[UART_MAX_INDEX] =
+{
+#ifdef BSP_USING_UART0
+        UART0_CONFIG,
+#endif
+#ifdef BSP_USING_UART1
+        UART1_CONFIG,
+#endif
+};
+
+#if defined(BSP_USING_UART0)
+#ifndef UART0_CONFIG
+#define UART0_CONFIG \
+{   \
+ .id = 0, \
+ .baudrate = 2000000,\
+ .databits = UART_DATA_LEN_8, \
+ .stopbits = UART_STOP_ONE, \
+ .parity = UART_PAR_NONE, \
+ .fifo_threshold = 1, \
+}
+#endif
+#endif
+

+

+

+

+
4.4. UART 设备接口

+
UART 设备接口全部遵循标准设备驱动管理层提供的接口。

+

+
4.4.1. uart_register

+
uart_register 用来注册一个 UART 设备，在注册之前需要打开对应 UART 设备的宏定义,例如 BSP_USING_UART0 方可使用 UART0 设备。注册完成以后才可以使用其他接口，如果没有定义宏，则无法使用 UART 设备。

+
int uart_register(enum uart_index_type index, const char *name, uint16_t flag);
+

+

+
    
+
  • index 要注册的设备索引
    • 
+
  • name 为注册的设备命名
    • 
+
  • flag 默认可读可写属性
    • 
+

+
index 用来选择 UART 设备配置，一个 index 对应一个 UART 设备配置，比如 UART0_INDEX 对应 UART0 配置，index 有如下可选类型

+
enum uart_index_type
+{
+#ifdef BSP_USING_UART0
+    UART0_INDEX,
+#endif
+#ifdef BSP_USING_UART1
+    UART1_INDEX,
+#endif
+#ifdef BSP_USING_UART2
+    UART2_INDEX,
+#endif
+#ifdef BSP_USING_UART3
+    UART3_INDEX,
+#endif
+#ifdef BSP_USING_UART4
+    UART4_INDEX,
+#endif
+    UART_MAX_INDEX
+};
+

+

+

+

+
4.4.2. device_open

+
device_open 用于设备的打开，oflag 表示以何种方式打开。

+
int device_open(struct device *dev, uint16_t oflag);
+

+

+
    
+
  • dev 设备句柄
    • 
+
  • oflag 设备的打开方式
    • 
+
  • return 错误码，0 表示打开成功，其他表示错误
    • 
+

+
oflag 可以写入以下参数：

+
#define DEVICE_OFLAG_STREAM_TX  0x001 /* 设备以轮训发送模式打开 */
+#define DEVICE_OFLAG_STREAM_RX  0x002 /* 设备以轮训接收模式打开 */
+#define DEVICE_OFLAG_INT_TX     0x004 /* 设备以中断发送模式打开 */
+#define DEVICE_OFLAG_INT_RX     0x008 /* 设备以中断接收模式打开 */
+#define DEVICE_OFLAG_DMA_TX     0x010 /* 设备以 DMA 发送模式打开 */
+#define DEVICE_OFLAG_DMA_RX     0x020 /* 设备以 DMA 接收模式打开 */
+

+

+

+

+
4.4.3. device_close

+
device_close 用于设备的关闭。

+
int device_close(struct device *dev);
+

+

+
    
+
  • dev 设备句柄
    • 
+
  • return 错误码，0 表示关闭成功，其他表示错误
    • 
+

+

+

+
4.4.4. device_control

+
device_control 用于根据命令对设备进行控制和参数的修改。

+
int device_control(struct device *dev, int cmd, void *args);
+

+

+
    
+
  • dev 设备句柄
    • 
+
  • cmd 设备控制命令
    • 
+
  • args 控制参数
    • 
+
  • return 不同的控制命令返回的意义不同。
    • 
+

+
串口设备除了标准的控制命令，还具有自己特殊的控制命令。

+
#define DEVICE_CTRL_UART_GET_TX_FIFO        0x10
+#define DEVICE_CTRL_UART_GET_RX_FIFO        0x11
+#define DEVICE_CTRL_UART_ATTACH_TX_DMA      0x12
+#define DEVICE_CTRL_UART_ATTACH_RX_DMA      0x13
+

+

+
args 根据不同的 cmd 传入不同，具体如下：

+
++++
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+




cmd
args
DEVICE_CTRL_SET_INT
uart_it_type
DEVICE_CTRL_CLR_INT
uart_it_type
DEVICE_CTRL_CONFIG
uart_param_cfg_t
DEVICE_CTRL_UART_ATTACH_TX_DMA
dma句柄
DEVICE_CTRL_UART_ATTACH_RX_DMA
dma句柄
DEVICE_CTRL_UART_GET_TX_FIFO
缓存变量
DEVICE_CTRL_UART_GET_RX_FIFO
缓存变量

+

+

+
4.4.5. device_write

+
device_write 用于串口数据的发送，发送方式根据打开方式可以是轮询、中断、dma。

+
int device_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size);
+

+

+
    
+
  • dev 设备句柄
    • 
+
  • pos 无作用
    • 
+
  • buffer 要写入的 buffer 缓冲区
    • 
+
  • size 要写入的长度
    • 
+
  • return 错误码，0 表示写入成功，其他表示错误
    • 
+

+

+

+
4.4.6. device_read

+
device_read 用于串口数据的接收，接收方式根据打开方式可以是轮询、中断、dma。

+
int device_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size);
+

+

+
    
+
  • dev 设备句柄
    • 
+
  • pos 无作用
    • 
+
  • buffer 要读入的 buffer 缓冲区
    • 
+
  • size 要读入的长度
    • 
+
  • return 错误码，0 表示读入成功，其他表示错误
    • 
+

+

+

+
4.4.7. device_set_callback

+
device_set_callback 用于注册一个串口中断回调函数。

+
int device_set_callback(struct device *dev, void (*callback)(struct device *dev, void *args, uint32_t size, uint32_t event));
+

+

+
    
+
  • dev 设备句柄
    • 
+
  • callback 要注册的中断回调函数
    
+
    
+
      
+
    • dev 设备句柄
      • 
+
    • args 接收发送缓冲区，数据类型为 uint8_t*
      • 
+
    • size 传输长度
      • 
+
    • event 中断事件类型
      • 
+
    
+
    
+
    • 
+

+
串口设备 event 有以下类型

+
enum uart_event_type
+{
+    UART_EVENT_TX_END,
+    UART_EVENT_TX_FIFO,
+    UART_EVENT_RX_END,
+    UART_EVENT_RX_FIFO,
+    UART_EVENT_RTO,
+    UART_EVENT_UNKNOWN
+};
+

+

+

+

+

+

+
5. PWM设备

+

+
5.1. 简介

+

+

+
5.2. PWM设备接口

+

+

+
+
+           

+           
+          

+          
+        

+      

+
+    

+
+  

+  
+
+  
+
+  
+  
+    
+   
+
+
+
\ No newline at end of file
diff --git a/docs/development_guide/build/html/blink_demo_introduce.html b/docs/development_guide/build/html/blink_demo_introduce.html
new file mode 100644
index 00000000..a568bcf5
--- /dev/null
+++ b/docs/development_guide/build/html/blink_demo_introduce.html
@@ -0,0 +1,275 @@
+
+
+
+
+
+  
+  
+  
+  
+  1. 流水灯示例 — BL_MCU_SDK 开发指南 0.1 文档
+  
+
+  
+  
+  
+
+  
+  
+
+  
+  
+
+  
+
+  
+  
+  
+    
+      
+        
+        
+        
+        
+    
+    
+
+    
+    
+    
+    
+     
+
+
+
+
+   
+  

+    
+    
+
+    

+
+      
+      
+
+
+      

+        
+        

+        
+          
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+

+
+  
+
+  
+  

+

+          

+           

+            
+  

+
1. 流水灯示例

+

+
1.1. 硬件连接

+

+
+
BL706_IOT板支持上述电路

+

+
    
+
  • 硬件连接如上图所示 GPIO29 GPIO30 GPIO31 GPIO22 分别控制四路 LED 灯
    • 
+

+

+

+
1.2. 软件实现

+
    
+
  • 软件代码见 examples/gpio/gpio_blink
    • 
+

+
1
+2
+3
+4
gpio_set_mode(GPIO_PIN_22, GPIO_OUTPUT_PP_MODE);
+gpio_set_mode(GPIO_PIN_29, GPIO_OUTPUT_PP_MODE);
+gpio_set_mode(GPIO_PIN_30, GPIO_OUTPUT_PP_MODE);
+gpio_set_mode(GPIO_PIN_31, GPIO_OUTPUT_PP_MODE);
+

+

+
    
+
  • 使用上述代码将 GPIO22 GPIO29 GPIO30 GPIO31 配置为输出模式。
    • 
+

+
1
gpio_write(GPIO_PIN_22, 0);
+

+

+
    
+
  • 使用上述代码修改输出的电平值。
    • 
+

+

+

+
1.3. 最终效果

+
见视频展示

+

+

+
+
+           

+           
+          

+          
+        

+      

+
+    

+
+  

+  
+
+  
+
+  
+  
+    
+   
+
+
+
\ No newline at end of file
diff --git a/docs/development_guide/build/html/breath_pwm_demo_introduce.html b/docs/development_guide/build/html/breath_pwm_demo_introduce.html
new file mode 100644
index 00000000..3725e92c
--- /dev/null
+++ b/docs/development_guide/build/html/breath_pwm_demo_introduce.html
@@ -0,0 +1,292 @@
+
+
+
+
+
+  
+  
+  
+  
+  2. 呼吸灯示例 — BL_MCU_SDK 开发指南 0.1 文档
+  
+
+  
+  
+  
+
+  
+  
+
+  
+  
+
+  
+
+  
+  
+  
+    
+      
+        
+        
+        
+        
+    
+    
+
+    
+    
+    
+    
+     
+
+
+
+
+   
+  

+    
+    
+
+    

+
+      
+      
+
+
+      

+        
+        

+        
+          
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+

+
+  
+
+  
+  

+

+          

+           

+            
+  

+
2. 呼吸灯示例

+

+
2.1. 硬件连接

+

+
+
BL706_IOT板支持上述电路

+

+
    
+
  • 硬件连接如上图所示 GPIO29 GPIO30 GPIO31 GPIO22 分别控制四路 LED 灯
    • 
+
  • 呼吸灯会单独使用 GPIO22 来演示效果
    • 
+

+

+

+
2.2. 软件实现

+
    
+
  • 软件代码见 examples/pwm/pwm_breath_led
    • 
+
  • PWM 的输出引脚由板级描述文件 bsp/board/bl706_iot/pinmux_config.h 来配置
    • 
+

+
1
#define CONFIG_GPIO22_FUNC GPIO_FUN_UNUSED
+

+

+
    
+
  • 可以看到，我们将 GPIO22 的功能选择为 PWM 输出，不同的电路板会存在不同的引脚配置。
    • 
+
  • 我们会使用向导来配置不同应用场景下的引脚配置，用户也可以手动修改。
    • 
+

+
1
+2
+3
+4
+5
+6
+7
+8
pwm_register(PWM0_INDEX, "led_breath", DEVICE_OFLAG_RDWR);
+
+struct device *led_breath = device_find("led_breath");
+
+if (led_breath)
+{
+    device_open(led_breath, 0);
+}
+

+

+
    
+
  • 上述代码展现了 bl_mcu_sdk 框架最一般的设备初始化流程，首先调用 pwm_register 函数注册 pwm 设备
    • 
+
  • 然后通过 find 函数找到设备对应的句柄，保存于 led_breath 对象中
    • 
+
  • 使用 device_open 来打开 led_breath 设备。
    • 
+

+
1
device_control(led_breath, DEVICE_CTRL_CONFIG, &pwm_cfg);
+

+

+
使用 device_contorl 函数，配合 DEVICE_CTRL_CONFIG 指令，输入需要配置的频率和占空比，即可配置 PWM 的输出波形。

+

+

+
2.3. 最终效果

+
见视频展示

+

+

+
+
+           

+           
+          

+          
+        

+      

+
+    

+
+  

+  
+
+  
+
+  
+  
+    
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+
+
+
\ No newline at end of file
diff --git a/docs/development_guide/build/html/connecting_hardware.html b/docs/development_guide/build/html/connecting_hardware.html
new file mode 100644
index 00000000..1b612cd4
--- /dev/null
+++ b/docs/development_guide/build/html/connecting_hardware.html
@@ -0,0 +1,333 @@
+
+
+
+
+
+  
+  
+  
+  
+  5. 硬件连接 — BL_MCU_SDK 开发指南 0.1 文档
+  
+
+  
+  
+  
+
+  
+  
+
+  
+  
+
+  
+
+  
+  
+  
+    
+      
+        
+        
+        
+        
+    
+    
+
+    
+    
+    
+    
+     
+
+
+
+
+   
+  

+    
+    
+
+    

+
+      
+      
+
+
+      

+        
+        

+        
+          
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+

+
+  
+
+  
+  

+

+          

+           

+            
+  

+
5. 硬件连接

+
本文档介绍了如何连接 BL70x 系列 MCU 的开发板

+

+
5.1. BL706_IOT 开发板

+
+
+

+
5.1.3. 使用串口烧写程序连接方法

+
    
+
  • 使用串口烧写前，请确保正确安装了 Bouffalo Lab Dev Cube 或命令行烧写工具
    
+
      
+
    • 使用 Type-C USB 数据线 or Mini USB 数据线连接到开发板上对应的 Type-C 接口 or Mini 接口上。
      • 
+
    • 按下开发板上的 Boot 键，不要释放
      • 
+
    • 按下开发板上的 RST 键，此时已经进入 Boot ROM，可以释放两个按键
      • 
+
    • 这时就可以从 Bouffalo Lab Dev Cube 中看到相应的串口 COM 号，如没有出现，请点击 Refresh 按钮刷新一下
      • 
+
    
+
    • 
+
  • 如没有合适的数据线，也可以使用一些常见的 USB-TTL 模块，连接到开发板的 UART0 端口进行烧写。 UART0 在 HD1 组上，连接方法如下：
    • 
+

+
USB-TTL      BL702_IoT
+----------------------
+  3V3   <-->   VDD
+  TXD   <-->   RX0
+  RXD   <-->   TX0
+  GND   <-->   GND
+

+

+
    
+
  • 烧写方法同上
    • 
+

+

+

+

+
5.2. BL702_AVB 开发板

+

+
5.2.1. 使用 CK-Link 烧写、调试连接方法

+
    
+
  • TO DO
    • 
+

+

+

+
5.2.2. 使用串口烧写程序连接方法

+
    
+
  • TO DO
    • 
+

+

+

+

+
+
+           

+           
+          

+          
+        

+      

+
+    

+
+  

+  
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+
\ No newline at end of file
diff --git a/docs/development_guide/build/html/genindex.html b/docs/development_guide/build/html/genindex.html
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--- /dev/null
+++ b/docs/development_guide/build/html/genindex.html
@@ -0,0 +1,227 @@
+
+
+
+
+
+  
+  
+  
+  
+  索引 — BL_MCU_SDK 开发指南 0.1 文档
+  
+
+  
+  
+  
+
+  
+  
+
+  
+  
+
+  
+
+  
+  
+  
+    
+      
+        
+        
+        
+        
+    
+    
+
+    
+    
+     
+
+
+
+
+   
+  

+    
+    
+
+    

+
+      
+      
+
+
+      

+        
+        

+        
+          
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+

+
+  
    
+    
+      
  •  »
    • 
+        
+      
  • 索引
    • 
+    
+    
+      
  • 
+        
+          
+        
+      
    • 
+    
+  

+
+  
+  

+

+          

+           

+            
+
+
索引

+
+

+ 
+

+
+
+           

+           
+          

+          

+
+  

+
+  

+    

+        © 版权所有 2021, BouffaloLab Co., Ltd.
+
+    

+  

+    
+    
+    
+    Built with Sphinx using a
+    
+    theme
+    
+    provided by Read the Docs. 
+
+

+        

+      

+
+    

+
+  

+  
+
+  
+
+  
+  
+    
+   
+
+
+
\ No newline at end of file
diff --git a/docs/development_guide/build/html/get_started.html b/docs/development_guide/build/html/get_started.html
new file mode 100644
index 00000000..2fd9d45e
--- /dev/null
+++ b/docs/development_guide/build/html/get_started.html
@@ -0,0 +1,275 @@
+
+
+
+
+
+  
+  
+  
+  
+  1. 开发前的准备 — BL_MCU_SDK 开发指南 0.1 文档
+  
+
+  
+  
+  
+
+  
+  
+
+  
+  
+
+  
+
+  
+  
+  
+    
+      
+        
+        
+        
+        
+    
+    
+
+    
+    
+    
+    
+     
+
+
+
+
+   
+  

+    
+    
+
+    

+
+      
+      
+
+
+      

+        
+        

+        
+          
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+

+
+  
+
+  
+  

+

+          

+           

+            
+  

+
1. 开发前的准备

+

+
1.1. 硬件环境准备

+
    
+
  • 一块 BL702 系列 MCU 的开发板：
    
+
      
+
    • BL706_IOT 开发板， or
      • 
+
    • BL706_AVB 开发板
      • 
+
    
+
    • 
+

+
BL706_Iot 开发板如下图所示

+

+
+
BL706_IoT

+

+
    
+
  • 一个支持标准 JTAG 功能的调试器：
    • 
+

+

+
    
+
  • CK-Link 仿真器，or
    • 
+
  • Jlink V11 仿真器，or
    • 
+
  • Sipeed USB-JTAG/TTL 调试器，or
    • 
+
  • Bouffalo Lab Debugger 调试器
    • 
+

+

+
    
+
  • 一台 PC 主机（运行 Windows 或者 Linux 系统）
    • 
+

+

+

+
1.2. 软件环境准备

+
为了更好的进行 BL702 系列 MCU 的开发，建议您应当具备以下开发环境：

+
    
+
  • Windows 使用 CDK 环境开发 (建议 Windows 7 以上版本。) ，or
    • 
+
  • Windows 使用 Eclipse 环境开发 (建议 Windows 7 以上版本。) ，or
    • 
+
  • Linux (建议使用 Ubuntu 18 以上的 LTS 版本)
    • 
+

+

+

+
+
+           

+           
+          

+          
+        

+      

+
+    

+
+  

+  
+
+  
+
+  
+  
+    
+   
+
+
+
\ No newline at end of file
diff --git a/docs/development_guide/build/html/index.html b/docs/development_guide/build/html/index.html
new file mode 100644
index 00000000..b9d53d13
--- /dev/null
+++ b/docs/development_guide/build/html/index.html
@@ -0,0 +1,262 @@
+
+
+
+
+
+  
+  
+  
+  
+  BL MCU SDK 开发指南 — BL_MCU_SDK 开发指南 0.1 文档
+  
+
+  
+  
+  
+
+  
+  
+
+  
+  
+
+  
+
+  
+  
+  
+    
+      
+        
+        
+        
+        
+    
+    
+
+    
+    
+    
+     
+
+
+
+
+   
+  

+    
+    
+
+    

+
+      
+      
+
+
+      

+        
+        

+        
+          
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+

+
+  
+
+  
+  

+

+          

+           

+            
+  

+
BL MCU SDK 开发指南

+
博流 BL702 系列产品是基于 “SiFive E24 Core” RISC-V 处理器的通用微控制器，具有 BLE 5.0、zigbee 和以太网等网络功能，同时还具备其它丰富的外设。
+可被广泛应用于 IoT 和其他低功耗领域中。
+支持通过 JTAG 对芯片进行烧写和调试，也支持通过 UART 进行程序烧录。

+
BL MCU SDK 将为您提供博流 BL70X 系列 MCU 开发的全方位支持。

+

+
快速开发指南

+
+

+

+
API 手册

+
+

+

+
示例代码

+
+

+

+
+
+           

+           
+          

+          

+    
+
+  

+
+  

+    

+        © 版权所有 2021, BouffaloLab Co., Ltd.
+
+    

+  

+    
+    
+    
+    Built with Sphinx using a
+    
+    theme
+    
+    provided by Read the Docs. 
+
+

+        

+      

+
+    

+
+  

+  
+
+  
+
+  
+  
+    
+   
+
+
+
\ No newline at end of file
diff --git a/docs/development_guide/build/html/objects.inv b/docs/development_guide/build/html/objects.inv
new file mode 100644
index 00000000..68bd010f
--- /dev/null
+++ b/docs/development_guide/build/html/objects.inv
@@ -0,0 +1,6 @@
+# Sphinx inventory version 2
+# Project: BL_MCU_SDK 开发指南
+# Version: 0.1
+# The remainder of this file is compressed using zlib.
+xڅJ@y7֝XAqҙdBu
xEZD/2D5M?9yBys. ds4ۼ.wnE}E4~UG,U|Q)MΐHj}W`dt`2yL`u
!*YVhqKb@o%jhj5q]٦Qp-I(
+oחi){n㋗=!yVʝpY"MgBF)ܴ-U,OZl	~1=kMq\ml:i
+
+
+  
+  
+  
+  
+  搜索 — BL_MCU_SDK 开发指南 0.1 文档
+  
+
+  
+  
+  
+
+  
+  
+
+  
+  
+
+  
+
+  
+    
+  
+  
+    
+      
+        
+        
+        
+        
+    
+    
+
+    
+    
+    
+    
+     
+
+
+
+
+   
+  

+    
+    
+
+    

+
+      
+      
+
+
+      

+        
+        

+        
+          
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+

+
+  
    
+    
+      
  •  »
    • 
+        
+      
  • 搜索
    • 
+    
+    
+      
  • 
+        
+      
    • 
+    
+  

+
+  
+  

+

+          

+           

+            
+  
+
+  
+  

+  
+  

+
+           

+           
+          

+          

+
+  

+
+  

+    

+        © 版权所有 2021, BouffaloLab Co., Ltd.
+
+    

+  

+    
+    
+    
+    Built with Sphinx using a
+    
+    theme
+    
+    provided by Read the Docs. 
+
+

+        

+      

+
+    

+
+  

+  
+
+  
+
+  
+  
+    
+  
+  
+  
+  
+   
+
+
+
+
\ No newline at end of file
diff --git a/docs/development_guide/build/html/searchindex.js b/docs/development_guide/build/html/searchindex.js
new file mode 100644
index 00000000..175ae822
--- /dev/null
+++ b/docs/development_guide/build/html/searchindex.js
@@ -0,0 +1 @@
+Search.setIndex({docnames:["Linux_quick_start_ubuntu","Windows_quick_start_cdk","Windows_quick_start_eclipse","api_guide","blink_demo_introduce","breath_pwm_demo_introduce","connecting_hardware","get_started","index","uart_loopback_demo_introduce"],envversion:{"sphinx.domains.c":2,"sphinx.domains.changeset":1,"sphinx.domains.citation":1,"sphinx.domains.cpp":3,"sphinx.domains.index":1,"sphinx.domains.javascript":2,"sphinx.domains.math":2,"sphinx.domains.python":2,"sphinx.domains.rst":2,"sphinx.domains.std":2,sphinx:56},filenames:["Linux_quick_start_ubuntu.rst","Windows_quick_start_cdk.rst","Windows_quick_start_eclipse.rst","api_guide.rst","blink_demo_introduce.rst","breath_pwm_demo_introduce.rst","connecting_hardware.rst","get_started.rst","index.rst","uart_loopback_demo_introduce.rst"],objects:{},objnames:{},objtypes:{},terms:{"0x001":3,"0x002":3,"0x004":3,"0x008":3,"0x01":3,"0x010":3,"0x02":3,"0x020":3,"0x03":3,"0x04":3,"0x05":3,"0x06":3,"0x07":3,"0x10":3,"0x1000":3,"0x11":3,"0x12":3,"0x13":3,"0x2000":3,"0x3000":3,"10":3,"11":3,"12":3,"13":3,"18":7,"19":0,"2000000":[0,3],"20210120":0,"3v3":6,"case":2,"char":3,"const":3,"do":6,"enum":3,"export":0,"if":[3,5,9],"import":2,"int":3,"null":3,"return":3,"void":[3,9],adc:3,add:1,api:8,app:[0,2],appli:2,applic:2,apt:0,arg:[3,9],asynchron:3,bashrc:0,baudrat:3,bflb_mcu_prefer:2,bflb_platform_init:9,bin:[0,1,2],bit:3,bl702:[0,1,2,7,8],bl702_iot:6,bl706:[2,6],bl706_avb:7,bl706_iot:[0,2,4,5,7,9],bl70x:[6,8],bl70x_flash:1,bl70x_flasher:1,bl:3,bl_clean:2,bl_make:2,bl_mcu_sdk:[3,5],ble:8,board:[0,2,3,5,6,9],boot:[0,6],boot_rom:0,borad:2,bouffalo:[2,6,7],bouffalolab:[0,1,2],bsp:[3,5,9],bsp_using_uart0:3,bsp_using_uart1:3,bsp_using_uart2:3,bsp_using_uart3:3,bsp_using_uart4:3,buffer:3,build:[0,1,2],callback:3,cancel:2,cbfun:3,cd:0,cdk:[7,8],cdk_flashload:1,cdkproj:1,ck:[1,7],ck_link:6,clean:1,clone:[0,1,2],close:3,cmd:3,code:3,com:[0,1,2,6],command:2,config_gpio14_func:9,config_gpio15_func:9,config_gpio22_func:5,connect:6,consol:2,control:3,core:8,cp:0,cpu:1,csky:1,ctrl:3,cube:6,data:3,databit:3,debug:[1,2],debug_log:9,debugg:[1,7],defin:[3,5,9],demo:2,dev:[0,2,3,6,9],devic:[3,5,9],device_class_adc:3,device_class_camera:3,device_class_dma:3,device_class_gpio:3,device_class_i2:3,device_class_i2c:3,device_class_non:3,device_class_pwm:3,device_class_sdio:3,device_class_sec_hash:3,device_class_spi:3,device_class_tim:3,device_class_typ:3,device_class_uart:3,device_class_usb:3,device_contorl:5,device_control:[5,9],device_ctrl_clr_int:3,device_ctrl_config:[3,5],device_ctrl_get_config:3,device_ctrl_get_int:3,device_ctrl_resum:3,device_ctrl_set_int:[3,9],device_ctrl_suspend:3,device_ctrl_uart_attach_rx_dma:3,device_ctrl_uart_attach_tx_dma:3,device_ctrl_uart_get_rx_fifo:3,device_ctrl_uart_get_tx_fifo:3,device_find:[5,9],device_oflag_dma_rx:3,device_oflag_dma_tx:3,device_oflag_int_rx:3,device_oflag_int_tx:3,device_oflag_rdonli:3,device_oflag_rdwr:[3,5],device_oflag_stream_rx:3,device_oflag_stream_tx:3,device_oflag_wronli:3,device_open:5,device_set_callback:9,device_status_typ:3,device_writ:9,dlist_t:3,dma:3,download:[0,1,2],e24:8,echo:0,eclips:[7,8],edit:2,elf:[0,1,2],els:9,enabl:3,endif:3,epf:2,even:3,event:3,exampl:[0,1,2,4,5,9],exe:[1,2],exist:2,fifo:3,fifo_threshold:3,file:[0,2],find:[5,9],finish:2,finsh:2,flag:3,flash:1,flashdownload:1,gdb:2,gener:[2,3],git:[0,1,2],gite:[0,1,2],gnd:[2,6],gpio22:[4,5],gpio29:[4,5],gpio30:[4,5],gpio31:[4,5],gpio:[2,4,8],gpio_async_falling_triger_int_mod:3,gpio_async_high_level_int_mod:3,gpio_async_low_level_int_mod:3,gpio_async_rising_triger_int_mod:3,gpio_blink:[2,4],gpio_fun_uart0_rx:9,gpio_fun_uart0_tx:9,gpio_fun_unus:5,gpio_input_mod:3,gpio_input_pd_mod:3,gpio_input_pp_mod:3,gpio_output_mod:3,gpio_output_pd_mod:3,gpio_output_pp_mod:[3,4],gpio_pin_14:9,gpio_pin_15:9,gpio_pin_22:4,gpio_pin_29:4,gpio_pin_30:4,gpio_pin_31:4,gpio_set_mod:4,gpio_sync_falling_triger_int_mod:3,gpio_sync_high_level_int_mod:3,gpio_sync_low_level_int_mod:3,gpio_sync_rising_triger_int_mod:3,gpio_writ:4,gz:0,hal:3,handl:3,hd1:[6,9],hd3:6,hellowd:[0,1,2],helloworld:[0,1,2],help:1,http:[0,1,2],id:3,ifdef:3,ifndef:3,index:3,input:3,instal:0,interfac:0,into:2,iot:[2,6,8],is:3,jlink:[6,7],jlink_bl_mcu_sdk:2,jtag:[6,7,8],jtag_tck:6,jtag_tdi:6,jtag_tdo:6,jtag_tm:6,keil:8,lab:[2,6,7],launch:2,led:[4,5],led_breath:5,length:3,link:[1,2,7],linux:[7,8],list:3,loader:1,log:2,lts:7,main:[0,2],make:2,mcu:[0,1,2,3,6,7],mdk:8,media:0,mini:[0,6],mkdir:0,mode:3,name:3,name_max:3,next:2,no:3,node:3,occ:1,odd:3,of:3,oflag:3,ok:1,one:3,open:3,or:[6,7],org:0,ostrac:1,out:2,output:3,over:2,pane:1,parent:3,pariti:3,path:0,pc:[2,6,7],peripher:1,peripheral_clock_adc:3,peripheral_clock_dac:3,peripheral_clock_i2:3,peripheral_clock_i2c:3,peripheral_clock_spi:3,peripheral_clock_typ:3,peripheral_clock_uart:3,peripheral_config:3,picocom:0,pin:3,pinmux:3,pinmux_config:[3,5,9],pos:3,prefer:2,printf:9,profil:1,project:[1,2],purpos:3,pwm0_index:5,pwm:[5,8,9],pwm_breath_l:5,pwm_cfg:5,pwm_regist:5,read:3,receiv:3,recurs:[0,1,2],refresh:6,regist:1,risc:[2,8],riscv64:0,rom:6,rst:[0,1,2,6],rto:3,rx0:6,rx:9,rx_dma:3,rxd0:2,rxd:6,sdk:[0,1,2,3],segger:2,serial:1,set:1,set_callback:9,setup:1,sifiv:8,sipe:7,size:[3,9],sky:1,sourc:0,spi:3,start:1,state:9,statu:3,std:3,step:2,stop:[1,3],stopbit:3,struct:[3,5,9],structur:3,success:1,sudo:0,system:1,system_clock_bclk:3,system_clock_fclk:3,system_clock_root_clock:3,system_clock_typ:3,system_clock_xclk:3,tabl:3,tar:0,target:2,tck:6,tdi:6,tdo:6,tms:6,to:6,tool:1,transmitt:3,ttl:[0,1,2,6,7],ttyusb0:0,two:3,tx0:6,tx:9,tx_dma:3,txd0:2,txd:6,type:[1,2,3,6],typedef:3,uart0:[3,6],uart0_config:3,uart0_index:3,uart1_config:3,uart1_index:3,uart2_index:3,uart3_index:3,uart4_index:3,uart:[0,8,9],uart_data_len_5:3,uart_data_len_6:3,uart_data_len_7:3,uart_data_len_8:3,uart_databits_t:3,uart_devic:3,uart_device_t:3,uart_echo:9,uart_event_rto:[3,9],uart_event_rx_end:3,uart_event_rx_fifo:[3,9],uart_event_tx_end:3,uart_event_tx_fifo:3,uart_event_typ:3,uart_event_unknown:3,uart_index_typ:3,uart_irq_callback:9,uart_it_typ:3,uart_max_index:3,uart_par_even:3,uart_par_non:3,uart_par_odd:3,uart_param_cfg_t:3,uart_parity_t:3,uart_rto_it:9,uart_rx_fifo_it:9,uart_stop_on:3,uart_stop_one_d_f:3,uart_stop_two:3,uart_stopbits_t:3,uartx_devic:3,ubuntu:7,uint16_t:3,uint32_t:[3,9],uint8_t:[3,9],univers:3,updat:0,upload:0,usb:[0,1,2,6,7],usr:0,v11:7,v3:0,valu:3,vdd33:6,vdd:6,vi:0,view:1,viewer:1,vref:6,vtref:6,welcom:2,wget:0,window:[7,8],workspac:2,write:3,x86_64:0,xxx:2,xxx_board:3,xxx_clock_config:3,xxx_close:3,xxx_control:3,xxx_devic:3,xxx_device_t:3,xxx_open:3,xxx_read:3,xxx_regist:3,xxx_write:3,zigbe:8,zxvf:0},titles:["4. Linux \u73af\u5883\u5f00\u53d1\u6307\u5357","2. Windows \u4e0b\u4f7f\u7528 CDK (\u7c7b MDK Keil)\u5f00\u53d1\u6307\u5357","3. Windows \u4e0b\u4f7f\u7528 Eclipse \u5f00\u53d1\u6307\u5357","1. API \u5206\u5c42\u6a21\u578b","1. \u6d41\u6c34\u706f\u793a\u4f8b","2. \u547c\u5438\u706f\u793a\u4f8b","5. \u786c\u4ef6\u8fde\u63a5","1. \u5f00\u53d1\u524d\u7684\u51c6\u5907","BL MCU SDK \u5f00\u53d1\u6307\u5357","3. \u4e32\u53e3\u81ea\u6536\u53d1\u793a\u4f8b"],titleterms:{api:3,bl702_avb:6,bl706_iot:6,bl:8,bl_mcu_sdk:[0,1,2],cdk:1,ck:6,cmake:0,device_clos:3,device_control:3,device_find:3,device_open:3,device_read:3,device_regist:3,device_set_callback:3,device_unregist:3,device_writ:3,eclips:2,gpio:3,gpio_attach_irq:3,gpio_irq_en:3,gpio_read:3,gpio_set_mod:3,gpio_toggl:3,gpio_writ:3,hello:[0,1,2],keil:1,link:6,linux:0,make:0,mcu:8,mdk:1,peripheral_clock_get:3,pwm:3,risc:0,sdk:8,system_clock_get:3,uart:3,uart_regist:3,window:[1,2],world:[0,1,2]}})
\ No newline at end of file
diff --git a/docs/development_guide/build/html/uart_loopback_demo_introduce.html b/docs/development_guide/build/html/uart_loopback_demo_introduce.html
new file mode 100644
index 00000000..a73bf853
--- /dev/null
+++ b/docs/development_guide/build/html/uart_loopback_demo_introduce.html
@@ -0,0 +1,328 @@
+
+
+
+
+
+  
+  
+  
+  
+  3. 串口自收发示例 — BL_MCU_SDK 开发指南 0.1 文档
+  
+
+  
+  
+  
+
+  
+  
+
+  
+  
+
+  
+
+  
+  
+  
+    
+      
+        
+        
+        
+        
+    
+    
+
+    
+    
+    
+     
+
+
+
+
+   
+  

+    
+    
+
+    

+
+      
+      
+
+
+      

+        
+        

+        
+          
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+

+
+  
+
+  
+  

+

+          

+           

+            
+  

+
3. 串口自收发示例

+

+
3.1. 硬件连接

+

+
+
BL706_IOT板支持上述电路

+

+
    
+
  • 硬件连接如上图所示 板子将芯片对应的 RX 与 TX 脚引到了排针 HD1。
    • 
+
  • 将对应的 TX 接上串口转换芯片的 RX，RX 接上串口转换芯片的 TX，将串口转换芯片连接电脑。
    • 
+

+

+

+
3.2. 软件实现

+
    
+
  • 软件代码见 examples/uart/uart_echo
    • 
+
  • pwm 的输出引脚由板级描述文件 bsp/board/bl706_iot/pinmux_config.h 来配置
    • 
+

+
1
+2
#define CONFIG_GPIO14_FUNC GPIO_FUN_UART0_TX
+#define CONFIG_GPIO15_FUNC GPIO_FUN_UART0_RX
+

+

+
    
+
  • 可以看到，我们将 GPIO_PIN_14 与 GPIO_PIN_15 的功能选择了 UART 功能。
    • 
+
  • 不同的电路板会存在不同的引脚配置，我们会使用向导来配置不同应用场景下的引脚配置，用户也可以手动修改。
    • 
+

+
1
bflb_platform_init();
+

+

+
    
+
  • 在 bflb_platform_init 函数中，我们已经注册并且打开了一个调试用的串口设备，给用户实现一个 printf 的基本功能用作打印输出报文。
    • 
+

+
1
struct device *uart = device_find("debug_log");
+

+

+
    
+
  • 我们通过 find 函数，找到在 bflb_platform_init 函数中注册并且打开的串口设备句柄，储存于 uart 变量中。
    • 
+

+
1
+2
+3
+4
+5
if (uart)
+{
+    device_set_callback(uart, uart_irq_callback);
+    device_control(uart, DEVICE_CTRL_SET_INT, (void *)(UART_RX_FIFO_IT|UART_RTO_IT));
+}
+

+

+
    
+
  • 通过 set_callback 函数，注册用户指定的中断服务函数。通过 device_control 函数打开中断使能开关
    • 
+

+
 1
+ 2
+ 3
+ 4
+ 5
+ 6
+ 7
+ 8
+ 9
+10
+11
void uart_irq_callback(struct device *dev, void *args, uint32_t size, uint32_t state)
+{
+    if (state == UART_EVENT_RX_FIFO)
+    {
+        device_write(dev,0,(uint8_t *)args,size);
+    }
+    else if (state == UART_EVENT_RTO)
+    {
+        device_write(dev,0,(uint8_t *)args,size);
+    }
+}
+

+

+
    
+
  • 此函数是示例的中断服务函数，作用是将接受到的数据原封不动的发送出去。
    
+
    
+
      
+
    • state 会返回 UART 设备的中断类型
      • 
+
    • args 包含了返回数据指针
      • 
+
    • size 包含返回数据的长度
      • 
+
    • dev 为中断的 uart 设备句柄
      • 
+
    
+
    
+
    • 
+
  • 当中断产生，将会调用 device_write 函数将接受到的数据发送回去。
    • 
+

+

+

+
3.3. 最终效果

+
见视频讲解

+

+

+
+
+           

+           
+          

+          
+        

+      

+
+    

+
+  

+  
+
+  
+
+  
+  
+    
+   
+
+
+
\ No newline at end of file
diff --git a/docs/development_guide/make.bat b/docs/development_guide/make.bat
new file mode 100644
index 00000000..6247f7e2
--- /dev/null
+++ b/docs/development_guide/make.bat
@@ -0,0 +1,35 @@
+@ECHO OFF
+
+pushd %~dp0
+
+REM Command file for Sphinx documentation
+
+if "%SPHINXBUILD%" == "" (
+	set SPHINXBUILD=sphinx-build
+)
+set SOURCEDIR=source
+set BUILDDIR=build
+
+if "%1" == "" goto help
+
+%SPHINXBUILD% >NUL 2>NUL
+if errorlevel 9009 (
+	echo.
+	echo.The 'sphinx-build' command was not found. Make sure you have Sphinx
+	echo.installed, then set the SPHINXBUILD environment variable to point
+	echo.to the full path of the 'sphinx-build' executable. Alternatively you
+	echo.may add the Sphinx directory to PATH.
+	echo.
+	echo.If you don't have Sphinx installed, grab it from
+	echo.http://sphinx-doc.org/
+	exit /b 1
+)
+
+%SPHINXBUILD% -M %1 %SOURCEDIR% %BUILDDIR% %SPHINXOPTS% %O%
+goto end
+
+:help
+%SPHINXBUILD% -M help %SOURCEDIR% %BUILDDIR% %SPHINXOPTS% %O%
+
+:end
+popd
diff --git a/docs/development_guide/source/Linux_quick_start_ubuntu.rst b/docs/development_guide/source/Linux_quick_start_ubuntu.rst
new file mode 100644
index 00000000..8f7f344e
--- /dev/null
+++ b/docs/development_guide/source/Linux_quick_start_ubuntu.rst
@@ -0,0 +1,134 @@
+Linux 环境开发指南
+=============================
+
+本文档介绍了如何在 Linux 安装配置 BL702 系列 MCU 需要的软件开发工具。
+
+
+
+需要的软硬件环境
+-----------------------------
+
+-  一根 mini USB 数据线
+-  一个 USB-TTL 串口模块
+-  杜邦线若干
+
+配置 RISC-V 工具链
+-----------------------------
+
+.. code-block:: bash
+   :linenos:
+   :emphasize-lines: 4-6
+
+   $ cd ~
+   $ wget -c https://dev.bouffalolab.com/media/upload/download/riscv64-elf-x86_64-20210120.tar.gz
+   $ mkdir -p riscv64-elf-20210120
+   $ tar -zxvf riscv64-elf-x86_64-20210120.tar.gz -C riscv64-elf-20210120
+   $ sudo cp ~/riscv64-elf-20210120  /usr/bin
+   $ echo "export PATH=\"$PATH:/usr/bin/riscv64-elf-20210120/bin\""  >> ~/.bashrc
+   $ source ~/.bashrc
+
+配置 cmake & make 工具
+----------------------------
+
+.. code-block:: bash
+   :linenos:
+   :emphasize-lines: 5-7
+
+   $ sudo apt update
+   $ sudo apt install make
+   $ cd ~
+   $ wget -c https://cmake.org/files/v3.19/cmake-3.19.3-Linux-x86_64.tar.gz 
+   $ tar -zxvf cmake-3.19.3-Linux-x86_64.tar.gz
+   $ sudo cp ~/cmake-3.19.3-Linux-x86_64  /usr/bin
+   $ echo "export PATH=\"$PATH:/usr/bin/cmake-3.19.3-Linux-x86_64/bin\""  >> ~/.bashrc
+   $ source ~/.bashrc
+
+
+硬件连接
+----------------------
+
+-  具体开发板的连接, 请参考 :ref:`connect_hardware` 部分
+-  请确保开发板正确设置后再进行下面的步骤 (建议 Linux 下采用串口连接)
+
+
+获取 bl_mcu_sdk
+---------------------------
+
+-  打开终端输入以下命令获取 bl_mcu_sdk
+
+.. code-block:: bash
+   :linenos:
+
+    $ cd ~
+    $ git clone https://gitee.com/bouffalolab/bl_mcu_sdk.git  --recursive
+
+
+测试 Hello World 工程
+------------------------------
+
+打开 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  获取到 SDK 后，进入 sdk 中的 ``examples/hellowd/helloworld`` 目录下，打开 ``main.c``，即可编辑 helloworld 的相关代码。
+
+.. code-block:: bash
+   :linenos:
+
+    $ cd ~/bl_mcu_sdk/examples/hellowd/helloworld
+    $ vi main.c
+
+-  若编辑完成后，保存修改并关闭文件，接下来进行编译
+
+编译 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+.. code-block:: bash
+   :linenos:
+
+    $ cd ~/bl_mcu_sdk
+    $ make build BOARD=bl706_iot APP=helloworld
+
+
+烧写 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  烧写前请先确认烧写方式，若采用串口烧写，请先按住板子上的 ``boot`` 键不要释放，此时在按下 ``rst`` 键，然后释放两个键，此时板子进入 boot_rom 状态。
+-  这时在终端中输入以下命令进行烧写
+
+.. code-block:: bash
+   :linenos:
+
+    $ cd ~/bl_mcu_sdk
+    $ make download INTERFACE=uart
+
+-  如果下载失败请检查：
+
+   -  1. 是否使用串口烧写，开发板是否供电，硬件连接是否正确。
+   -  2. 烧写命令是否在 ``bl_mcu_sdk`` 目录下执行
+   -  3. 是否进入 boot_rom 模式
+   -  4. 串口是否被占用
+
+运行 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  打开新的终端，安装、运行串口工具
+
+.. code-block:: bash
+   :linenos:
+
+    $ sudo apt install picocom   # 若已经安装请忽略
+    $ picocom -b 2000000 /dev/ttyUSB0 
+
+-  按一下开发板上的 ``rst`` 按键，即可在串口终端中看到 ``hello world！``
+
+.. figure:: img/linux1.png
+   :alt:
+
+   helloworld!
+
+
+调试 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+
+
diff --git a/docs/development_guide/source/Windows_quick_start_cdk.rst b/docs/development_guide/source/Windows_quick_start_cdk.rst
new file mode 100644
index 00000000..5260c052
--- /dev/null
+++ b/docs/development_guide/source/Windows_quick_start_cdk.rst
@@ -0,0 +1,164 @@
+Windows 下使用 CDK (类 MDK Keil)开发指南
+=============================
+
+本文档介绍了如何在 Windows 下使用 `平头哥半导体 `_ 开发的 CDK 集成开发环境，
+来完成博流 BL702 系列 MCU 的相关软件开发工作。
+
+关于剑池 CDK ，这是一款由平头哥半导体开发打造的集成开发环境。它拥有和传统 MCU 开发环境十分近似的操作和设置，旨在不改变用户开发习惯的基础上，全面接入云端开发资源，结合图形化的 OSTracer、Profiling 等调试分析工具，加速用户产品开发。
+
+
+需要的软硬件环境
+-----------------------------
+
+-  剑池 CDK 软件
+-  一根 USB Type-A 数据线
+-  一个 CK-Link 仿真器
+-  一个 USB-TTL 串口模块
+-  杜邦线若干
+
+
+下载剑池 CDK 软件安装包
+-----------------------------
+
+- `剑池CDK `_ 软件安装可以从平头哥半导体 OCC 官网获取到。
+
+- 下载完成后，解压缩，双击 ``setup.exe``，按照其提示，完成软件安装即可。
+
+
+下载 bl_mcu_sdk 软件开发包
+----------------------------
+
+-  从开源社区下载 bl_mcu_sdk 软件开发包。
+
+   - 可以使用 ``git clone`` 或者直接 ``download`` 的方式下 SDK
+   - 使用 ``git clone`` 前请确保已正确安装 ``git``，打开支持 ``git`` 的终端输入以下命令即可获取最新的 SDK。
+
+   .. code-block:: bash
+      :linenos:
+      :emphasize-lines: 1
+
+      $ git clone https://gitee.com/bouffalolab/bl_mcu_sdk.git  --recursive
+
+
+硬件连接
+----------------------
+
+-  具体开发板的连接, 请参考 :ref:`connect_hardware` 部分
+-  请确保开发板被正确设置后再进行下面的步骤
+   
+
+测试 Hello World 工程
+------------------------------
+
+打开 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  获取到 SDK 后，进入 sdk 中的 ``examples/hellowd/helloworld/cdk`` 目录下，双击 ``helloworld.cdkproj``，即可打开 ``Helloworld`` 工程。
+
+
+编译 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+.. figure:: img/cdk1.png
+   :alt:
+
+   helloworld.cdkproj
+
+-  在 CDK 工具栏中，点击编译图标即可编译工程
+
+   -  点击 ``1`` 处 图标 ``Build Project`` 即可编译当前选中的工程
+   -  点击 ``2`` 处 图标 ``Clean Project`` 即可清除上次编译的结果
+   -  点击 ``3`` 处 图标 ``Flash Download`` 即可将编译好的代码下载到芯片中
+   -  点击 ``4`` 处 图标 ``Start/Stop Debug`` 即可进行 debug 的相关操作
+   -  也可以在 ``Project`` 中，右击工程名称，通过右击菜单中的选项对项目进行编译等操作
+
+
+烧写 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  由于目前 CDK 软件中还没有包含我们的 flash 算法，所以需要我们手动将 flash 算法放到 CDK 安装目录，具体操作如下：
+
+   -  进入 SDK 目录下 ``tools\cdk_flashloader`` 目录
+   -  将目录下的 ``bl70x_flasher.elf`` 文件，拷贝到 CDK 工具的 ``C-Sky\CDK\CSKY\Flash`` 目录中
+
+   .. figure:: img/cdk7.png
+      :alt:
+
+      CDK Flash Loader
+
+
+
+.. figure:: img/cdk8.png
+   :alt:
+
+   CDK Project Setting
+   
+-  点击 ``Project View`` 中的项目设置按钮，打开 ``Project Setting`` 窗口，或者通过右击 ``Project`` 名称中右击菜单栏中打开
+
+- 在打开的 ``Project Setting`` 窗口中，选择 ``Flash`` 标签，配置需要的 Flash 算法
+
+.. figure:: img/cdk9.png
+   :alt:
+
+   CDK Project Flash setting
+
+-  在 ``Flash`` 标签中，点击 ``Add`` 按纽，在打开的列表中选择 ``bl70x_flash`` 算法，点击 ``Add`` 添加到工程中，``Flash`` 标签下的其他设置，如图所示：
+
+-  点击 OK 后，如配置正确，点击 ``Flash Download`` 即可将编译好的代码下载到芯片中
+   
+
+.. figure:: img/cdk5.png
+   :alt:
+
+   CDK Flashdownload Success
+
+-  如下载失败请检查：
+
+   -  1. 代码是否被正确编译，并生成 ``.elf`` ``.bin`` 等文件
+   -  2. Flash 算法是否被正确设置
+   -  3. CK-Link 与开发板是否正确连接
+   -  4. 开发板是否正常供电，电源指示灯是否点亮
+
+运行 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  从 CDK 的菜单栏 ``View->Serial Pane``，打开串口面板，在打开的 ``Serial Pane`` 中右击，进行串口设置，选择你对应的串口号和波特率
+
+.. figure:: img/cdk4.png
+.. figure:: img/cdk3.png
+   :alt:
+
+   CDK Serial Pane setting
+
+-  按下板子上的 ``RST`` 按键，即可在串口中看到代码的运行结果
+
+.. figure:: img/cdk6.png
+   :alt:
+
+   HelloWorld！
+
+
+调试 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  点击工具栏上方的 ``Start/Stop Debugger`` 按钮，进入 debug 界面，如下图所示
+
+.. figure:: img/cdk10.png
+   :alt:
+
+   Debug HelloWorld！
+
+-  在 debug 界面下，左侧的 ``Register`` 窗口中，可以查看 ``CPU`` 内部寄存器数据；右侧的 ``Peripherals`` 外设面板中，
+   可以查看相应外设寄存器数据，外设的选择可以在顶部菜单栏的 ``Peripherals->System Viewer`` 选择；
+   点击上方工具栏中的相关调试按钮可以进行断点设置、单步调试、指令单步和全速运行等操作。
+   当然这些操作都有相应的快捷键和快捷设置方法，详情请参考 ``CDK Help``，这里就不作过多介绍了。
+
+-  我们点击单步运行按钮，运行代码，即可看到指示光标移动到下一句代码，同时可以看到串口面板中显示了我们输出的 ``Hello World！`` 
+
+.. figure:: img/cdk11.png
+   :alt:
+
+   Debug HelloWorld！
+
+
+
diff --git a/docs/development_guide/source/Windows_quick_start_eclipse.rst b/docs/development_guide/source/Windows_quick_start_eclipse.rst
new file mode 100644
index 00000000..b33234e7
--- /dev/null
+++ b/docs/development_guide/source/Windows_quick_start_eclipse.rst
@@ -0,0 +1,175 @@
+Windows 下使用 Eclipse 开发指南
+=============================
+
+本文档介绍了如何在 Windows 下使用 eclipse，构建 BL702 系列 MCU 的软件开发环境。
+
+
+需要的软硬件环境
+-----------------------------
+
+-  Eclipse 免安装软件包
+-  串口助手软件
+-  一根 USB Type-A 数据线
+-  一个 j-link 仿真器
+-  一个 USB-TTL 串口模块
+-  杜邦线若干
+
+
+下载 Eclipse 安装包
+-----------------------------
+
+-  从 Bouffalo Lab 开发者社区下载带有 RISC-V 工具链的 `Eclipse https://dev.bouffalolab.com/download `_ 安装包。
+
+下载 bl_mcu_sdk
+-----------------------------
+
+-  从开源社区下载 `bl_mcu_sdk `_ 软件开发包。
+
+- 可以使用 ``git clone`` 或者直接 ``download`` 的方式下 SDK
+- 使用 ``git clone`` 前请确保已正确安装 ``git``，打开支持 ``git`` 的终端输入以下命令即可获取最新的 SDK。
+
+.. code-block:: bash
+   :linenos:
+   :emphasize-lines: 1
+
+   $ git clone https://gitee.com/bouffalolab/bl_mcu_sdk.git  --recursive
+
+
+配置 eclipse 开发环境
+----------------------------
+
+-  将获取到的 eclipse 压缩包拷贝到您的工作目录，解压 eclipse 压缩包
+-  进入 eclipse 目录，双击 ``eclipse.exe`` 启动 eclipse
+-  选择您的 ``Workspace`` 目录，点击 ``Launch`` 进入工作空间
+
+   .. figure:: img/pic1.png
+      :alt:
+
+-  点击菜单栏中 ``Window->preferences`` 打开环境配置相关页面，准备导入相关的配置环境
+
+   .. figure:: img/pic2.png
+      :alt:
+
+-  点击下图 1 处的图标，打开导入配置界面，按照如图所示步骤，选择 ``eclipse.exe`` 目录下的 ``bflb_mcu_preferences.epf`` 配置文件。
+
+   .. figure:: img/pic3.png
+      :alt:
+
+-  选择好对应的文件后，点击 ``Finish``，在弹出的对话框选中点击 ``cancel`` ，不用重新启动。
+
+   .. figure:: img/pic4.png
+      :alt:
+
+导入 bl_mcu_sdk
+--------------------------
+
+-  点击 菜单栏 ``File->Import`` ，打开导入项目的配置界面
+
+   .. figure:: img/pic5.png
+      :alt:
+
+-  在打开的 ``Import`` 窗口中选择 ``General->Existing Projects into Workspace`` ，然后点击 ``Next``
+
+   .. figure:: img/pic6.png
+      :alt:
+
+-  加载 bl_mcu_sdk 的工程路径后，点击 ``Finsh`` 完成导入
+
+   .. figure:: img/pic7.png
+      :alt:
+
+-  导入完成后，关闭 ``Welcome`` 窗口即可看到导入的工程
+
+   .. figure:: img/pic8.png
+      :alt:
+
+   .. figure:: img/pic9.png
+      :alt:
+
+-  展开 ``Build Target`` 目录，即可看到 ``bl_clean``、``bl_make``、``download`` 三个功能按钮。
+
+   -  双击 ``bl_clean`` 按钮，会清除 ``build`` 和 ``out`` 两个目录下的编译缓存
+   -  双击 ``bl_make`` 按钮，会正常编译设置的 case，若没有修改默认配置则会编译 ``helloworld`` 工程
+   -  双击 ``download`` 按钮，会下载代码到芯片中，若没有编译成功则会下载默认的或者上一次的 ``.bin`` 文件
+
+
+硬件连接
+----------------------
+
+-  具体开发板的连接, 请参考 :ref:`connect_hardware` 部分；（eclipse 环境建议使用 ``j-link`` 烧写、调试）
+-  请确保开发板正确设置后再进行下面的步骤
+
+
+测试 Hello World 工程
+------------------------------
+
+
+打开 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  打开 ``examples/hellowd/helloworld/main.c`` 文件，即可编辑、修改 ``helloworld`` 测试 demo 的代码，若修改了，请保存后在执行编译
+
+
+编译 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  双击 ``bl_make`` 即可编 helloworld 工程
+
+-  编译成功后 ``Console`` 窗口可以看到如下图所示的 log 信息
+
+.. figure:: img/pic10.png
+
+
+烧写 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  双击 ``download`` 即可烧写 helloworld 工程 ``bin`` 文件到芯片中
+
+-  下载成功后 ``Console`` 窗口可以看到如下图所示的 log 信息
+
+.. figure:: img/pic11.png
+
+
+运行 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  将开发板的 ``TXD0``、``RXD0`` 和 ``GND`` 引脚使用杜邦线连接到 USB-TTL 串口模块，将串口模块插入 PC 主机， 使用任意的串口助手软件打开串口
+-  烧写成功后，按下板子上的 ``rst`` 按键，如果下载正确，即可在串口助手软件中看到如下图所示的 log 信息。
+
+.. figure:: img/eclipse_run.png
+
+
+调试 Hello World
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  点击 eclipse 工具栏中的 ``Debug`` 按钮，进入 debug 配置窗口
+-  选择 ``GDB SEGGER J-Link Debugging->Jlink_bl_mcu_sdk``  Debug 配置，在 ``C/C++ Application:`` 选项中选择需要调试的 ``.elf`` 文件
+-  先点击 ``Apply`` 后，在点击 ``Debug`` 即可进行 ``Debug`` 
+
+.. figure:: img/pic14.png
+   :alt:
+
+-  进入 Debug 界面后，即可看到程序停在了 ``main``，点击上方工具栏中的 ``Step Over``，按钮即可对代码工程进行单步调试。
+
+.. figure:: img/pic15.png
+   :alt:
+   
+   Eclipse Debugging
+
+
+编译烧写不同的目标工程
+-----------------------
+
+-  当右击 ``bl_make`` 按钮，点击 ``Edit`` 后，会弹出更换目标工程的配置界面，如下图所示
+
+.. figure:: img/pic12.png
+   :alt:
+
+
+-  其中 ``APP=xxx`` 用户可以修改其内容，改为需要编译烧写的目标工程名，例如想要编译烧写 ``gpio/gpio_blink`` 工程，将其修改为 ``APP=gpio_blink`` 即可
+-  ``Build command`` 中 ``make BOARD=bl706_iot`` 会指定不同的 Board 类型以指定适配不同类型的开发板。
+
+-  ``Board`` 类型决定编译时选择相应的 ``borad`` 头文件。默认选择的是 BL706 的 iot 开发板 ``make build BOARD=bl706_iot``
+
+
+
diff --git a/docs/development_guide/source/api_guide.rst b/docs/development_guide/source/api_guide.rst
new file mode 100644
index 00000000..8fbae716
--- /dev/null
+++ b/docs/development_guide/source/api_guide.rst
@@ -0,0 +1,773 @@
+API 分层模型
+=========================
+
+简介
+----
+
+为了不影响用户应用层代码因为芯片驱动的不同而频繁修改，**bl_mcu_sdk** 的外设 API 采用了 HAL 层的思想，屏蔽了底层硬件的实现。而 HAL 层又分为两大类：
+
+- 设备驱动管理层：提供一套标准的接口，具体实现由外设驱动适配层实现。
+- 外设驱动适配层：实现设备驱动管理层的标准接口，并且拓展自己的独特的接口。
+
+整体的代码分层框架如图所示：
+
+.. figure:: img/api1.png
+    :alt:
+
+    code structure
+
+- 应用层是用户自己编写的代码，接口则是调用 hal 层的接口。
+- HAL 层提供给应用层接口，底层调用 std 层，不同的芯片调用不同的 std 层。
+- STD 层则是对硬件寄存器进行简单封装，由外设驱动适配层进行调用。
+
+设备驱动管理层实现
+---------------------
+
+设备驱动管理层的实现采用了面向对象的思想，首先我们将外设看成是一个设备或者是文件，秉承 **一切皆文件** 的理念，而文件又都具有标准的调用接口：``open``、``close``、``ctrl``、``write``、``read``、``callback``，不同文件类别不同（比如串口设备、ADC设备、SPI设备），并且打开的方式也不同（比如轮询、中断、DMA），由此，我们可以构建出一个对象的基类（父类）。
+
+**基类**
+
+.. code-block:: C
+
+    struct device
+    {
+        char name[NAME_MAX];            /*name of device */
+        dlist_t list;                   /*list node of device */
+        enum device_status_type status; /*status of device */
+        enum device_class_type type;    /*type of device */
+        uint16_t oflag;                 /*oflag of device */
+
+        int (*open)(struct device *dev, uint16_t oflag);
+        int (*close)(struct device *dev);
+        int (*control)(struct device *dev, int cmd, void *args);
+        int (*write)(struct device *dev, uint32_t pos, const void *buffer, uint32_t size);
+        int (*read)(struct device *dev, uint32_t pos, void *buffer, uint32_t size);
+        void (*callback)(struct device *dev, void *args, uint32_t size, uint32_t event);
+        void *handle;
+    };
+
+**基类成员：name**
+
+给设备取名，后面会使用 ``device_find`` 找到这个设备。
+
+**基类成员：type**
+
+``type`` 记录当前设备的类别，可以选择的 ``type`` 类型如下。
+
+.. code-block:: C
+
+    enum device_class_type
+    {
+        DEVICE_CLASS_NONE = 0,
+        DEVICE_CLASS_GPIO,
+        DEVICE_CLASS_UART,
+        DEVICE_CLASS_SPI,
+        DEVICE_CLASS_I2C,
+        DEVICE_CLASS_ADC,
+        DEVICE_CLASS_DMA,
+        DEVICE_CLASS_TIMER,
+        DEVICE_CLASS_PWM,
+        DEVICE_CLASS_SDIO,
+        DEVICE_CLASS_USB,
+        DEVICE_CLASS_I2S,
+        DEVICE_CLASS_CAMERA,
+        DEVICE_CLASS_SEC_HASH,
+    } ;
+
+**基类成员：status**
+
+``status`` 用来记录当前设备的状态，当前提供 4 种状态。
+
+.. code-block:: C
+
+    enum device_status_type
+    {
+        DEVICE_UNREGISTER = 0,
+        DEVICE_REGISTERED,
+        DEVICE_OPENED,
+        DEVICE_CLOSED
+    } ;
+
+**基类成员：oflag**
+
+``oflag`` 记录 注册时填入的 flag 信息以及使用 ``device_open`` 时填入的 ``oflag`` 信息。
+
+**基类成员：list**
+
+设备的增加和删除使用双向链表进行存储，节省内存。
+
+**基类成员：标准的函数指针**
+
+为不同的外设提供了标准的函数接口，当外设实现此类接口并赋值给该成员，便能达到重写的功能。
+
+设备驱动管理层标准接口
+-----------------------
+
+**device_register**
+^^^^^^^^^^^^^^^^^^^^
+
+``device_register`` 用于设备的注册，将设备信息注册到链表当中。
+
+.. code-block:: C
+
+    int device_register(struct device *dev, const char *name, uint16_t flag);   
+
+- dev 设备句柄。
+- name 设备名称。
+- flag 设备的读写属性
+- return 返回错误码，0 表示注册成功，其他表示错误。
+
+``flag`` 可以写入以下参数，表示：**只读**、**只写**、**可读可写**。
+
+.. code-block:: C
+
+    #define DEVICE_OFLAG_RDONLY 0x1000 /* 以只读方式打开设备 */
+    #define DEVICE_OFLAG_WRONLY 0x2000 /* 以只写方式打开设备 */
+    #define DEVICE_OFLAG_RDWR   0x3000 /* 以读写方式打开设备 */
+
+
+**device_unregister**
+^^^^^^^^^^^^^^^^^^^^^^^
+
+``device_unregister`` 用于设备的删除，将设备信息从链表中删除。
+
+.. code-block:: C
+
+    int device_unregister(const char *name);   
+
+- dev 设备句柄
+- name 要删除的设备名称
+- return 错误码，0 表示删除，其他表示错误
+
+**device_find**
+^^^^^^^^^^^^^^^^
+
+``device_find`` 用于根据 ``name`` 从链表中寻找设备，并返回设备句柄的首地址。
+
+.. code-block:: C
+
+    struct device *device_find(const char *name);
+
+- dev 设备句柄
+- name 要查找的设备名称
+- return 错误码，不为 0 表示找到的设备句柄，NULL 表示未找到该设备。
+
+
+**device_open**
+^^^^^^^^^^^^^^^^
+
+``device_open`` 用于设备的打开，``oflag`` 表示以何种方式打开，目前提供 6 种打开方式。底层调用 ``dev`` 句柄中的 ``open`` 成员。
+
+.. code-block:: C
+
+    int device_open(struct device *dev, uint16_t oflag);   
+
+- dev 设备句柄
+- oflag 设备的打开方式
+- return 错误码，0 表示打开成功，其他表示错误
+
+``oflag`` 可以写入以下参数：
+
+.. code-block:: C
+
+    #define DEVICE_OFLAG_STREAM_TX  0x001 /* 设备以轮训发送模式打开 */
+    #define DEVICE_OFLAG_STREAM_RX  0x002 /* 设备以轮训接收模式打开 */
+    #define DEVICE_OFLAG_INT_TX     0x004 /* 设备以中断发送模式打开 */
+    #define DEVICE_OFLAG_INT_RX     0x008 /* 设备以中断接收模式打开 */
+    #define DEVICE_OFLAG_DMA_TX     0x010 /* 设备以 DMA 发送模式打开 */
+    #define DEVICE_OFLAG_DMA_RX     0x020 /* 设备以 DMA 接收模式打开 */
+
+**device_close**
+^^^^^^^^^^^^^^^^
+
+``device_close`` 用于设备的关闭。底层调用 ``dev`` 句柄中的 ``close`` 成员。
+
+.. code-block:: C
+
+    int device_close(struct device *dev);   
+
+- dev 设备句柄
+- return 错误码，0 表示关闭成功，其他表示错误
+    
+**device_control**
+^^^^^^^^^^^^^^^^^^^
+
+``device_control`` 用于根据命令对设备进行控制和参数的修改。底层调用 ``dev`` 句柄中的 ``control`` 成员。
+
+.. code-block:: C
+
+    int device_control(struct device *dev, int cmd, void *args);   
+
+- dev 设备句柄
+- cmd 设备控制命令
+- args 控制参数
+- return 不同的控制命令返回的意义不同。
+
+``cmd`` 提供了以下标准命令，除此之外，不同外设还具有自己的命令
+
+.. code-block:: C
+
+    #define DEVICE_CTRL_SET_INT     0x01    /* 设置中断 */
+    #define DEVICE_CTRL_CLR_INT     0x02    /* 清中断 */
+    #define DEVICE_CTRL_GET_INT     0x03    /* 获取中断状态 */
+    #define DEVICE_CTRL_RESUME      0x04    /* 恢复设备 */
+    #define DEVICE_CTRL_SUSPEND     0x05    /* 挂起设备 */
+    #define DEVICE_CTRL_CONFIG      0x06    /* 配置设备 */
+    #define DEVICE_CTRL_GET_CONFIG  0x07    /* 获取设备配置 */
+
+**device_write**
+^^^^^^^^^^^^^^^^
+
+``device_write`` 用于数据的发送，发送方式根据打开方式可以是轮询、中断、dma。底层调用 ``dev`` 句柄中的 ``write`` 成员。
+
+.. code-block:: C
+
+    int device_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size);  
+
+- dev 设备句柄
+- pos 不同的设备 pos 的意义不同
+- buffer 要写入的 buffer 缓冲区
+- size 要写入的长度
+- return 错误码，0 表示写入成功，其他表示错误
+
+**device_read**
+^^^^^^^^^^^^^^^^
+
+``device_read`` 用于数据的接收，接收方式根据打开方式可以是轮询、中断、dma。底层调用 ``dev`` 句柄中的 ``read`` 成员。
+
+.. code-block:: C
+
+    int device_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size);  
+
+- dev 设备句柄
+- pos 不同的设备 pos 的意义不同
+- buffer 要读入的 buffer 缓冲区
+- size 要读入的长度
+- return 错误码，0 表示读入成功，其他表示错误
+
+**device_set_callback**
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+``device_set_callback`` 用于中断回调函数的注册。底层调用 ``dev`` 句柄中的 ``callback`` 成员。
+
+.. code-block:: C
+
+    int device_set_callback(struct device *dev, void (*callback)(struct device *dev, void *args, uint32_t size, uint32_t event));
+
+- dev 设备句柄
+- callback 要注册的中断回调函数
+
+
+    * dev 设备句柄
+    * args 不同外设意义不同
+    * size 传输长度
+    * event 中断事件类型
+
+外设驱动适配层实现
+------------------------
+
+**子类继承父类**
+
+不同的外设首成员为 ``struct device`` ，这就相当于父类的继承，从而可以使用子类来访问父类成员，当使用子类修改父类成员时，便拥有了子类自己的功能。实现原理是不同结构体的首地址是该结构体中首个成员的地址。
+
+.. code-block:: C
+
+    typedef struct xxx_device
+    {
+        struct device parent;
+
+    } xxx_device_t;
+
+**重写标准接口**
+
+每个外设都有一个 ``xxx_register`` 函数，用来重写标准接口。
+
+.. code-block:: C
+
+    dev->open = xxx_open;
+    dev->close = xxx_close;
+    dev->control = xxx_control;
+    dev->write = xxx_write;
+    dev->read = xxx_read;
+
+
+时钟树
+=========================
+
+简介
+------------------------
+
+博流系列芯片拥有丰富的时钟源选择，为方便用户配置，提供了时钟树配置表，不需要用户手动调用时钟设置接口，用户只需要关心最终的系统时钟和外设时钟频率即可。时钟配置表位于 ``bsp/board/xxx_board`` 目录下 ``xxx_clock_config.h`` 文件。
+
+
+时钟频率获取接口
+------------------------
+
+**system_clock_get**
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+``system_clock_get`` 用来获取系统时钟频率。
+
+.. code-block:: C
+
+    uint32_t system_clock_get(enum system_clock_type type);
+
+- type 获取的系统时钟频率类型
+
+``type`` 提供以下几种类型
+
+.. code-block:: C
+
+    enum system_clock_type
+    {
+        SYSTEM_CLOCK_ROOT_CLOCK = 0,
+        SYSTEM_CLOCK_FCLK,
+        SYSTEM_CLOCK_BCLK,
+        SYSTEM_CLOCK_XCLK,
+    };
+
+
+**peripheral_clock_get**
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+``peripheral_clock_get`` 用来获取外设时钟频率。
+
+.. code-block:: C
+
+    uint32_t peripheral_clock_get(enum peripheral_clock_type type);
+
+- type 获取的外设时钟频率类型
+
+``type`` 提供以下几种类型
+    
+.. code-block:: C
+    
+    enum peripheral_clock_type
+    {
+        PERIPHERAL_CLOCK_UART = 0,
+        PERIPHERAL_CLOCK_SPI,
+        PERIPHERAL_CLOCK_I2C,
+        PERIPHERAL_CLOCK_ADC,
+        PERIPHERAL_CLOCK_DAC,
+        PERIPHERAL_CLOCK_I2S,
+    };
+    
+        
+GPIO 设备
+=========================
+
+
+简介
+------------------------
+
+GPIO 全称 General Purpose Input Output（通用输入 / 输出），博流系列芯片的 GPIO 外设主要有以下功能。
+
+- 普通输入输出带上下拉
+- 复用功能带上下拉
+- 模拟功能
+- 外部中断（上升沿、下降沿、高电平、低电平）
+- 硬件消抖
+- 驱动能力控制
+
+bl mcu sdk 的引脚配置方式分为两种。
+
+- GPIO 复用功能通过专门的 **pinmux table** ，用户只需要修改 table 中的相关引脚和工功能，程序会自动配置这些引脚。**pinmux table** 位于 ``bsp/board/xxx_board`` 目录下 ``pinmux_config.h`` 文件。
+- 通过标准的 GPIO 设备接口配置引脚，缺点是只能配置普通的输入输出和中断功能，复用功能建议还是使用 table 进行配置。
+
+GPIO 设备接口
+------------------------
+
+**gpio_set_mode**
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+``gpio_set_mode`` 用来配置 gpio 的模式。
+
+.. code-block:: C
+    
+    void gpio_set_mode(uint32_t pin, uint32_t mode);
+
+- pin 要配置的引脚
+- mode 要配置的引脚功能
+
+mode 提供以下几种类型
+
+.. code-block:: C
+    
+    #define GPIO_OUTPUT_MODE                        0
+    #define GPIO_OUTPUT_PP_MODE                     1
+    #define GPIO_OUTPUT_PD_MODE                     2
+    #define GPIO_INPUT_MODE                         3
+    #define GPIO_INPUT_PP_MODE                      4
+    #define GPIO_INPUT_PD_MODE                      5
+    #define GPIO_ASYNC_RISING_TRIGER_INT_MODE       6
+    #define GPIO_ASYNC_FALLING_TRIGER_INT_MODE      7
+    #define GPIO_ASYNC_HIGH_LEVEL_INT_MODE          8
+    #define GPIO_ASYNC_LOW_LEVEL_INT_MODE           9
+    #define GPIO_SYNC_RISING_TRIGER_INT_MODE        10
+    #define GPIO_SYNC_FALLING_TRIGER_INT_MODE       11
+    #define GPIO_SYNC_HIGH_LEVEL_INT_MODE           12
+    #define GPIO_SYNC_LOW_LEVEL_INT_MODE            13
+
+**gpio_write**
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+``gpio_write`` 设置引脚电平
+
+.. code-block:: C
+    
+    void gpio_write(uint32_t pin, uint32_t value);
+
+
+- pin 要设置的引脚
+- value 要设置的电平
+  
+
+**gpio_toggle**
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+``gpio_toggle`` 翻转引脚电平
+
+.. code-block:: C
+    
+    void gpio_toggle(uint32_t pin);
+
+
+- pin 要翻转的引脚
+
+
+**gpio_read**
+^^^^^^^^^^^^^^^^^^^^^^^^
+ 
+``gpio_read`` 读取引脚电平
+
+.. code-block:: C
+    
+    int  gpio_read(uint32_t pin);
+
+
+- pin 要读取电平的引脚
+- return 0 为低电平，1 为高电平
+
+**gpio_attach_irq**
+^^^^^^^^^^^^^^^^^^^^^^^^
+ 
+``gpio_attach_irq`` 为中断引脚附加中断回调函数
+
+.. code-block:: C
+    
+    void gpio_attach_irq(uint32_t pin, void (*cbFun)(void));
+
+- pin 要附加中断回调的引脚
+- cbFun 中断回调函数
+
+**gpio_irq_enable**
+^^^^^^^^^^^^^^^^^^^^^^^^
+ 
+``gpio_irq_enable`` 读取引脚电平
+
+.. code-block:: C
+    
+    void gpio_irq_enable(uint32_t pin,uint8_t enabled);
+
+- pin 要开启或者关闭中断的引脚
+- enabled 0 为关闭中断，1 为打开中断
+
+
+UART 设备
+=========================
+
+简介
+------------------------
+
+UART 全称（Universal Asynchronous Receiver/Transmitter）通用异步收发传输器，博流系列芯片的 UART 外设自带可配深度 **硬件fifo** ，并且拥有 **RTO（接收超时）中断** ，在使用中断的时候，无需频繁进入中断，fifo 和 rto 的搭配能够使得 UART 的利用性更加高效，UART 设备具有以下功能。
+
+- 轮询收发模式
+- 中断收发模式
+- dma 收发模式
+- 自动波特率检测
+- 硬件 fifo
+- 特有的 rto 中断
+
+UART 设备结构体定义
+------------------------
+
+.. code-block:: C
+    
+    typedef struct uart_device
+    {
+        struct device parent;
+        uint8_t id;
+        uint32_t baudrate;
+        uart_databits_t databits;
+        uart_stopbits_t stopbits;
+        uart_parity_t parity;
+        uint8_t fifo_threshold;
+        void* tx_dma;
+        void* rx_dma;
+    } uart_device_t;
+
+- parent 继承父类属性
+- id 串口 id，0 表示串口 0，,1 表示串口 1，以此类推
+- baudrate 波特率
+- databits 数据位
+- stopbits 停止位
+- parity 校验位
+- fifo_threshold fifo 阈值,不同 mcu 最大值不同
+- tx_dma 附加的发送 dma 句柄
+- rx_dma 附加的发送 dma 句柄
+
+databits 提供以下类型
+
+.. code-block:: C
+
+    typedef enum  
+    {
+        UART_DATA_LEN_5 = 0,  /*!< Data length is 5 bits */
+        UART_DATA_LEN_6 = 1,  /*!< Data length is 6 bits */
+        UART_DATA_LEN_7 = 2,  /*!< Data length is 7 bits */
+        UART_DATA_LEN_8 = 3   /*!< Data length is 8 bits */
+    } uart_databits_t;
+
+stopbits 提供以下类型
+
+.. code-block:: C
+    
+    typedef enum  
+    {
+        UART_STOP_ONE = 0,  /*!< One stop bit */
+        UART_STOP_ONE_D_FIVE = 0,  /*!< 1.5 stop bit */
+        UART_STOP_TWO = 1   /*!< Two stop bits */
+    } uart_stopbits_t;
+
+``parity`` 提供以下类型
+
+.. code-block:: C
+    
+    typedef enum  
+    {
+        UART_PAR_NONE = 0,  /*!< No parity */
+        UART_PAR_ODD  = 1,  /*!< Parity bit is odd */
+        UART_PAR_EVEN = 2,  /*!< Parity bit is even */
+    } uart_parity_t;
+
+UART 设备参数配置表
+------------------------
+
+每一个 UART 设备都有一个参数配置，配置文件位于 ``bsp/board/xxx_board`` 目录下 ``peripheral_config.h`` 文件。当用户打开对应设备的宏，该设备的配置才生效。例如打开宏 ``BSP_USING_UART0`` ，UART0 设备就可以进行注册和使用了。
+
+.. code-block:: C
+
+    uart_device_t uartx_device[UART_MAX_INDEX] =
+    {
+    #ifdef BSP_USING_UART0
+            UART0_CONFIG,
+    #endif
+    #ifdef BSP_USING_UART1
+            UART1_CONFIG,
+    #endif
+    };
+
+    #if defined(BSP_USING_UART0)
+    #ifndef UART0_CONFIG
+    #define UART0_CONFIG \
+    {   \
+     .id = 0, \
+     .baudrate = 2000000,\
+     .databits = UART_DATA_LEN_8, \
+     .stopbits = UART_STOP_ONE, \
+     .parity = UART_PAR_NONE, \
+     .fifo_threshold = 1, \
+    }
+    #endif
+    #endif
+
+UART 设备接口
+------------------------
+
+UART 设备接口全部遵循标准设备驱动管理层提供的接口。
+
+**uart_register**
+^^^^^^^^^^^^^^^^^^^^^^^^
+ 
+``uart_register`` 用来注册一个 UART 设备，在注册之前需要打开对应 UART 设备的宏定义,例如 ``BSP_USING_UART0`` 方可使用 UART0 设备。注册完成以后才可以使用其他接口，如果没有定义宏，则无法使用 UART 设备。
+
+.. code-block:: C
+    
+    int uart_register(enum uart_index_type index, const char *name, uint16_t flag);
+
+- index 要注册的设备索引
+- name 为注册的设备命名
+- flag 默认可读可写属性
+
+``index`` 用来选择 UART 设备配置，一个 index 对应一个 UART 设备配置，比如 ``UART0_INDEX`` 对应 UART0 配置，``index`` 有如下可选类型
+
+.. code-block:: C
+    
+    enum uart_index_type
+    {
+    #ifdef BSP_USING_UART0
+        UART0_INDEX,
+    #endif
+    #ifdef BSP_USING_UART1
+        UART1_INDEX,
+    #endif
+    #ifdef BSP_USING_UART2
+        UART2_INDEX,
+    #endif
+    #ifdef BSP_USING_UART3
+        UART3_INDEX,
+    #endif
+    #ifdef BSP_USING_UART4
+        UART4_INDEX,
+    #endif
+        UART_MAX_INDEX
+    };
+
+**device_open**
+^^^^^^^^^^^^^^^^
+
+``device_open`` 用于设备的打开，``oflag`` 表示以何种方式打开。
+
+.. code-block:: C
+
+    int device_open(struct device *dev, uint16_t oflag);   
+
+- dev 设备句柄
+- oflag 设备的打开方式
+- return 错误码，0 表示打开成功，其他表示错误
+
+``oflag`` 可以写入以下参数：
+
+.. code-block:: C
+
+    #define DEVICE_OFLAG_STREAM_TX  0x001 /* 设备以轮训发送模式打开 */
+    #define DEVICE_OFLAG_STREAM_RX  0x002 /* 设备以轮训接收模式打开 */
+    #define DEVICE_OFLAG_INT_TX     0x004 /* 设备以中断发送模式打开 */
+    #define DEVICE_OFLAG_INT_RX     0x008 /* 设备以中断接收模式打开 */
+    #define DEVICE_OFLAG_DMA_TX     0x010 /* 设备以 DMA 发送模式打开 */
+    #define DEVICE_OFLAG_DMA_RX     0x020 /* 设备以 DMA 接收模式打开 */
+
+**device_close**
+^^^^^^^^^^^^^^^^
+
+``device_close`` 用于设备的关闭。
+
+.. code-block:: C
+
+    int device_close(struct device *dev);   
+
+- dev 设备句柄
+- return 错误码，0 表示关闭成功，其他表示错误
+    
+**device_control**
+^^^^^^^^^^^^^^^^^^^
+
+``device_control`` 用于根据命令对设备进行控制和参数的修改。
+
+.. code-block:: C
+
+    int device_control(struct device *dev, int cmd, void *args);   
+
+- dev 设备句柄
+- cmd 设备控制命令
+- args 控制参数
+- return 不同的控制命令返回的意义不同。
+
+串口设备除了标准的控制命令，还具有自己特殊的控制命令。
+
+.. code-block:: C
+
+    #define DEVICE_CTRL_UART_GET_TX_FIFO        0x10
+    #define DEVICE_CTRL_UART_GET_RX_FIFO        0x11
+    #define DEVICE_CTRL_UART_ATTACH_TX_DMA      0x12
+    #define DEVICE_CTRL_UART_ATTACH_RX_DMA      0x13
+
+``args`` 根据不同的 ``cmd`` 传入不同，具体如下：
+
++---------------------------------------+--------------------------------------+
+|         cmd                           |           args                       |
++=======================================+======================================+
+|     DEVICE_CTRL_SET_INT               |         uart_it_type                 |
++---------------------------------------+--------------------------------------+
+|     DEVICE_CTRL_CLR_INT               |         uart_it_type                 |
++---------------------------------------+--------------------------------------+
+|     DEVICE_CTRL_CONFIG                |         uart_param_cfg_t             |
++---------------------------------------+--------------------------------------+
+|     DEVICE_CTRL_UART_ATTACH_TX_DMA    |         dma句柄                      |
++---------------------------------------+--------------------------------------+
+|     DEVICE_CTRL_UART_ATTACH_RX_DMA    |         dma句柄                      |
++---------------------------------------+--------------------------------------+
+|     DEVICE_CTRL_UART_GET_TX_FIFO      |         缓存变量                     |
++---------------------------------------+--------------------------------------+
+|     DEVICE_CTRL_UART_GET_RX_FIFO      |         缓存变量                     |
++---------------------------------------+--------------------------------------+
+
+**device_write**
+^^^^^^^^^^^^^^^^
+
+``device_write`` 用于串口数据的发送，发送方式根据打开方式可以是轮询、中断、dma。
+
+.. code-block:: C
+
+    int device_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size);  
+
+- dev 设备句柄
+- pos 无作用
+- buffer 要写入的 buffer 缓冲区
+- size 要写入的长度
+- return 错误码，0 表示写入成功，其他表示错误
+
+**device_read**
+^^^^^^^^^^^^^^^^
+
+``device_read`` 用于串口数据的接收，接收方式根据打开方式可以是轮询、中断、dma。
+
+.. code-block:: C
+
+    int device_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size);  
+
+- dev 设备句柄
+- pos 无作用
+- buffer 要读入的 buffer 缓冲区
+- size 要读入的长度
+- return 错误码，0 表示读入成功，其他表示错误
+
+**device_set_callback**
+^^^^^^^^^^^^^^^^^^^^^^^^
+
+``device_set_callback`` 用于注册一个串口中断回调函数。
+
+.. code-block:: C
+
+    int device_set_callback(struct device *dev, void (*callback)(struct device *dev, void *args, uint32_t size, uint32_t event));
+
+- dev 设备句柄
+- callback 要注册的中断回调函数
+
+    - dev 设备句柄
+    - args 接收发送缓冲区，数据类型为 uint8_t*
+    - size 传输长度
+    - event 中断事件类型    
+
+串口设备 ``event`` 有以下类型
+
+.. code-block:: C
+
+    enum uart_event_type
+    {
+        UART_EVENT_TX_END,
+        UART_EVENT_TX_FIFO,
+        UART_EVENT_RX_END,
+        UART_EVENT_RX_FIFO,
+        UART_EVENT_RTO,
+        UART_EVENT_UNKNOWN
+    };
+
+PWM设备
+=========================
+
+简介
+------------------------
+
+PWM设备接口
+------------------------
\ No newline at end of file
diff --git a/docs/development_guide/source/blink_demo_introduce.rst b/docs/development_guide/source/blink_demo_introduce.rst
new file mode 100644
index 00000000..0d326f6c
--- /dev/null
+++ b/docs/development_guide/source/blink_demo_introduce.rst
@@ -0,0 +1,41 @@
+流水灯示例
+====================
+
+硬件连接
+-----------------------------
+
+.. figure:: img/blink_breath_sch.png
+    :alt:
+
+    **BL706_IOT板支持上述电路**
+
+-  硬件连接如上图所示 ``GPIO29`` ``GPIO30`` ``GPIO31`` ``GPIO22`` 分别控制四路 LED 灯
+
+
+
+软件实现
+-----------------------------
+
+-  软件代码见 ``examples/gpio/gpio_blink``
+
+.. code-block:: C
+    :linenos:
+
+    gpio_set_mode(GPIO_PIN_22, GPIO_OUTPUT_PP_MODE);
+    gpio_set_mode(GPIO_PIN_29, GPIO_OUTPUT_PP_MODE);
+    gpio_set_mode(GPIO_PIN_30, GPIO_OUTPUT_PP_MODE);
+    gpio_set_mode(GPIO_PIN_31, GPIO_OUTPUT_PP_MODE);
+
+-  使用上述代码将 ``GPIO22`` ``GPIO29`` ``GPIO30`` ``GPIO31`` 配置为输出模式。
+
+.. code-block:: C
+    :linenos:
+
+    gpio_write(GPIO_PIN_22, 0);
+
+-  使用上述代码修改输出的电平值。
+
+
+最终效果
+-----------------------------
+见视频展示
diff --git a/docs/development_guide/source/breath_pwm_demo_introduce.rst b/docs/development_guide/source/breath_pwm_demo_introduce.rst
new file mode 100644
index 00000000..399938a9
--- /dev/null
+++ b/docs/development_guide/source/breath_pwm_demo_introduce.rst
@@ -0,0 +1,64 @@
+呼吸灯示例
+====================
+
+硬件连接
+-----------------------------
+
+.. figure:: img/blink_breath_sch.png
+    :alt:
+
+    **BL706_IOT板支持上述电路**
+
+-  硬件连接如上图所示 ``GPIO29`` ``GPIO30`` ``GPIO31`` ``GPIO22`` 分别控制四路 LED 灯
+-  呼吸灯会单独使用 ``GPIO22`` 来演示效果
+
+
+
+软件实现
+-----------------------------
+
+-  软件代码见 ``examples/pwm/pwm_breath_led``
+
+
+-  ``PWM`` 的输出引脚由板级描述文件 ``bsp/board/bl706_iot/pinmux_config.h`` 来配置
+
+.. code-block:: C
+    :linenos:
+
+    #define CONFIG_GPIO22_FUNC GPIO_FUN_UNUSED
+
+
+-  可以看到，我们将 ``GPIO22`` 的功能选择为 ``PWM`` 输出，不同的电路板会存在不同的引脚配置。
+
+-  我们会使用向导来配置不同应用场景下的引脚配置，用户也可以手动修改。
+
+.. code-block:: C
+    :linenos:
+
+    pwm_register(PWM0_INDEX, "led_breath", DEVICE_OFLAG_RDWR); 
+
+    struct device *led_breath = device_find("led_breath");
+
+    if (led_breath)
+    {
+        device_open(led_breath, 0);
+    }
+
+
+-  上述代码展现了 ``bl_mcu_sdk`` 框架最一般的设备初始化流程，首先调用 ``pwm_register`` 函数注册 ``pwm`` 设备
+-  然后通过 ``find`` 函数找到设备对应的句柄，保存于 ``led_breath`` 对象中
+-  使用 ``device_open`` 来打开 ``led_breath`` 设备。
+
+.. code-block:: C
+    :linenos:
+
+    device_control(led_breath, DEVICE_CTRL_CONFIG, &pwm_cfg);  
+
+使用 ``device_contorl`` 函数，配合 ``DEVICE_CTRL_CONFIG`` 指令，输入需要配置的频率和占空比，即可配置 ``PWM`` 的输出波形。
+
+
+
+最终效果
+-----------------------------
+见视频展示
+
diff --git a/docs/development_guide/source/conf.py b/docs/development_guide/source/conf.py
new file mode 100644
index 00000000..e248e253
--- /dev/null
+++ b/docs/development_guide/source/conf.py
@@ -0,0 +1,76 @@
+# Configuration file for the Sphinx documentation builder.
+#
+# This file only contains a selection of the most common options. For a full
+# list see the documentation:
+# https://www.sphinx-doc.org/en/master/usage/configuration.html
+
+# -- Path setup --------------------------------------------------------------
+
+# If extensions (or modules to document with autodoc) are in another directory,
+# add these directories to sys.path here. If the directory is relative to the
+# documentation root, use os.path.abspath to make it absolute, like shown here.
+#
+# import os
+# import sys
+# sys.path.insert(0, os.path.abspath('.'))
+
+
+# -- Project information -----------------------------------------------------
+
+project = 'BL_MCU_SDK 开发指南'
+copyright = '2021, BouffaloLab Co., Ltd'
+author = 'BouffaloLab MCU Team'
+
+version = '0.1'
+
+# The full version, including alpha/beta/rc tags
+release = '0.1'
+
+
+# -- General configuration ---------------------------------------------------
+
+# Add any Sphinx extension module names here, as strings. They can be
+# extensions coming with Sphinx (named 'sphinx.ext.*') or your custom
+# ones.
+extensions = [
+    'sphinx.ext.autodoc',
+    'sphinx.ext.imgmath',
+]
+
+# Add any paths that contain templates here, relative to this directory.
+templates_path = ['_templates']
+
+source_suffix = '.rst'
+
+master_doc = 'index'
+
+# The language for content autogenerated by Sphinx. Refer to documentation
+# for a list of supported languages.
+#
+# This is also used if you do content translation via gettext catalogs.
+# Usually you set "language" from the command line for these cases.
+language = 'zh_CN'
+
+# List of patterns, relative to source directory, that match files and
+# directories to ignore when looking for source files.
+# This pattern also affects html_static_path and html_extra_path.
+exclude_patterns = []
+
+
+# -- Options for HTML output -------------------------------------------------
+
+# The theme to use for HTML and HTML Help pages.  See the documentation for
+# a list of builtin themes.
+#
+html_theme = 'sphinx_rtd_theme'
+
+# Add any paths that contain custom static files (such as style sheets) here,
+# relative to this directory. They are copied after the builtin static files,
+# so a file named "default.css" will overwrite the builtin "default.css".
+html_static_path = ['_static']
+
+man_pages = [
+    (master_doc, 'bl702', 'BouffaloLab Documentation',
+    [author], 1)
+]
+
diff --git a/docs/development_guide/source/connecting_hardware.rst b/docs/development_guide/source/connecting_hardware.rst
new file mode 100644
index 00000000..be2ddc03
--- /dev/null
+++ b/docs/development_guide/source/connecting_hardware.rst
@@ -0,0 +1,97 @@
+.. _connect_hardware:
+
+硬件连接
+================
+
+本文档介绍了如何连接 BL70x 系列 MCU 的开发板
+
+BL706_IOT 开发板
+-------------------------
+
+使用 CK-Link 烧写、调试连接方法
+^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  将 CK-Link USB 接口使用合适的 USB 数据线正确连接到 PC 主机
+-  将 Iot 开发板的 ``HD3`` 组的标准 ``JTAG`` 引脚使用杜邦线与 ``CK-Link`` 对应的 ``JTAG`` 引脚连接起来
+-  若没有使用 CK-Link 给开发板供电，需要给开发板单独供电
+
+::
+
+    bl706-iot board         CK-Link
+    -------------------------------
+        JTAG_TDI     <-->     TDI
+        JTAG_TDO     <-->     TDO 
+        JTAG_TCK     <-->     TCK 
+        JTAG_TMS     <-->     TMS
+        VDD33        <-->     VREF
+        GND          <-->     GND
+
+
+.. figure:: img/ck_link_connect_bl706_iot.png
+   :alt:
+
+   ck_link connect bl706-iot board
+
+
+使用 J-Link 烧写、调试连接方法
+^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  将 j-link 的 USB 接口使用合适的 USB 数据线正确连接到 PC 主机
+-  将 Iot 开发板的 ``HD3`` 组的标准 ``JTAG`` 引脚使用杜邦线与 ``j-link`` 对应的 ``JTAG`` 引脚连接起来
+-  j-link 连接的情况下需要给开发板独立供电，并且将开发板的电源接到 j-link 的 ``VTref`` 引脚
+
+::
+
+    bl706-iot board          j-link
+    -------------------------------
+        JTAG_TDI     <-->     TDI
+        JTAG_TDO     <-->     TDO 
+        JTAG_TCK     <-->     TCK 
+        JTAG_TMS     <-->     TMS
+        VDD33        <-->     VTref
+        GND          <-->     GND
+
+
+.. figure:: img/jlink_connect_bl706_iot.png
+   :alt:
+
+   jlink connect bl706-iot board
+
+
+使用串口烧写程序连接方法
+^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  使用串口烧写前，请确保正确安装了 ``Bouffalo Lab Dev Cube`` 或命令行烧写工具
+
+   -  使用 ``Type-C USB`` 数据线 or ``Mini USB`` 数据线连接到开发板上对应的 ``Type-C`` 接口 or ``Mini`` 接口上。
+   -  按下开发板上的 ``Boot`` 键，不要释放
+   -  按下开发板上的 ``RST`` 键，此时已经进入 ``Boot ROM``，可以释放两个按键
+   -  这时就可以从 ``Bouffalo Lab Dev Cube`` 中看到相应的串口 ``COM`` 号，如没有出现，请点击 ``Refresh`` 按钮刷新一下
+
+
+-  如没有合适的数据线，也可以使用一些常见的 ``USB-TTL`` 模块，连接到开发板的 ``UART0`` 端口进行烧写。 ``UART0`` 在 ``HD1`` 组上，连接方法如下：
+
+::
+
+   USB-TTL      BL702_IoT
+   ----------------------
+     3V3   <-->   VDD
+     TXD   <-->   RX0
+     RXD   <-->   TX0
+     GND   <-->   GND
+
+-  烧写方法同上
+
+BL702_AVB 开发板
+--------------------------
+
+使用 CK-Link 烧写、调试连接方法
+^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  ``TO DO``
+
+使用串口烧写程序连接方法
+^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+-  ``TO DO``
+
diff --git a/docs/development_guide/source/get_started.rst b/docs/development_guide/source/get_started.rst
new file mode 100644
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+++ b/docs/development_guide/source/get_started.rst
@@ -0,0 +1,37 @@
+开发前的准备
+=============================
+
+硬件环境准备
+-----------------------------
+
+- 一块 BL702 系列 MCU 的开发板：
+
+  - BL706_IOT 开发板， or
+  - BL706_AVB 开发板
+
+BL706_Iot 开发板如下图所示
+
+.. figure:: img/bl702_iot.png
+   :alt:
+   
+   BL706_IoT
+
+
+-  一个支持标准 JTAG 功能的调试器：
+
+  - CK-Link 仿真器，or
+  - Jlink V11 仿真器，or
+  - Sipeed USB-JTAG/TTL 调试器，or
+  - Bouffalo Lab Debugger 调试器
+
+-  一台 PC 主机（运行 Windows 或者 Linux 系统）
+
+软件环境准备
+--------------------------------
+
+为了更好的进行 BL702 系列 MCU 的开发，建议您应当具备以下开发环境：
+
+-  Windows 使用 `CDK `_ 环境开发 (建议 Windows 7 以上版本。) ，or
+-  `Windows `_ 使用 Eclipse 环境开发 (建议 Windows 7 以上版本。) ，or
+-  `Linux `_ (建议使用 Ubuntu 18 以上的 LTS 版本)
+
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diff --git a/docs/development_guide/source/index.rst b/docs/development_guide/source/index.rst
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+.. bl_mcu_sdk_development_guide documentation master file, created by
+   sphinx-quickstart on Fri Mar 12 16:32:56 2021.
+   You can adapt this file completely to your liking, but it should at least
+   contain the root `toctree` directive.
+
+========================================================
+BL MCU SDK 开发指南
+========================================================
+
+博流 `BL702 `_ 系列产品是基于 “SiFive E24 Core” `RISC-V `_ 处理器的通用微控制器，具有 BLE 5.0、zigbee 和以太网等网络功能，同时还具备其它丰富的外设。
+可被广泛应用于 `IoT `_ 和其他低功耗领域中。
+支持通过 `JTAG `_ 对芯片进行烧写和调试，也支持通过 `UART `_ 进行程序烧录。
+
+BL MCU SDK 将为您提供博流 BL70X 系列 MCU 开发的全方位支持。
+
+.. toctree::
+   :maxdepth: 1
+   :caption: 快速开发指南
+   :numbered:
+
+   get_started
+   Windows_quick_start_cdk
+   Windows_quick_start_eclipse
+   Linux_quick_start_ubuntu
+   connecting_hardware
+
+
+   
+.. toctree::
+   :maxdepth: 1
+   :caption: API 手册
+   :numbered:
+
+   api_guide
+
+   
+.. toctree::
+   :maxdepth: 1
+   :caption: 示例代码
+   :numbered:
+
+   blink_demo_introduce
+   breath_pwm_demo_introduce
+   uart_loopback_demo_introduce
+
diff --git a/docs/development_guide/source/uart_loopback_demo_introduce.rst b/docs/development_guide/source/uart_loopback_demo_introduce.rst
new file mode 100644
index 00000000..c997edb9
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@@ -0,0 +1,91 @@
+串口自收发示例
+====================
+
+硬件连接
+-----------------------------
+
+.. figure:: img/uart_loop_sch.png
+    :alt:
+
+    **BL706_IOT板支持上述电路**
+
+-  硬件连接如上图所示 板子将芯片对应的 RX 与 TX 脚引到了排针 ``HD1``。
+-  将对应的 TX 接上串口转换芯片的 RX，RX 接上串口转换芯片的 TX，将串口转换芯片连接电脑。
+
+
+
+软件实现
+-----------------------------
+
+-  软件代码见 ``examples/uart/uart_echo``
+
+-  ``pwm`` 的输出引脚由板级描述文件 ``bsp/board/bl706_iot/pinmux_config.h`` 来配置
+
+.. code-block:: C
+    :linenos:
+
+    #define CONFIG_GPIO14_FUNC GPIO_FUN_UART0_TX
+    #define CONFIG_GPIO15_FUNC GPIO_FUN_UART0_RX
+ 
+-  可以看到，我们将 ``GPIO_PIN_14`` 与 ``GPIO_PIN_15`` 的功能选择了 ``UART`` 功能。
+
+-  不同的电路板会存在不同的引脚配置，我们会使用向导来配置不同应用场景下的引脚配置，用户也可以手动修改。
+
+
+.. code-block:: C
+    :linenos:
+
+    bflb_platform_init();
+
+-  在 ``bflb_platform_init`` 函数中，我们已经注册并且打开了一个调试用的串口设备，给用户实现一个 ``printf`` 的基本功能用作打印输出报文。
+
+.. code-block:: C
+    :linenos:
+
+    struct device *uart = device_find("debug_log");
+
+-  我们通过 ``find`` 函数，找到在 ``bflb_platform_init`` 函数中注册并且打开的串口设备句柄，储存于 ``uart`` 变量中。
+
+.. code-block:: C
+    :linenos:
+
+    if (uart)
+    {
+        device_set_callback(uart, uart_irq_callback);
+        device_control(uart, DEVICE_CTRL_SET_INT, (void *)(UART_RX_FIFO_IT|UART_RTO_IT));
+    }
+
+-  通过 ``set_callback`` 函数，注册用户指定的中断服务函数。通过 ``device_control`` 函数打开中断使能开关
+
+.. code-block:: C
+    :linenos:
+
+    void uart_irq_callback(struct device *dev, void *args, uint32_t size, uint32_t state)
+    {
+        if (state == UART_EVENT_RX_FIFO)
+        {
+            device_write(dev,0,(uint8_t *)args,size);
+        }
+        else if (state == UART_EVENT_RTO)
+        {
+            device_write(dev,0,(uint8_t *)args,size);
+        }
+    }
+
+    
+-  此函数是示例的中断服务函数，作用是将接受到的数据原封不动的发送出去。
+    
+    - ``state`` 会返回 ``UART`` 设备的中断类型
+    - ``args`` 包含了返回数据指针
+    - ``size`` 包含返回数据的长度
+    - ``dev`` 为中断的 ``uart`` 设备句柄
+
+-  当中断产生，将会调用 ``device_write`` 函数将接受到的数据发送回去。
+
+
+
+最终效果
+-----------------------------
+见视频讲解
+
+
diff --git a/drivers/bl702_driver/CMakeLists.txt b/drivers/bl702_driver/CMakeLists.txt
new file mode 100644
index 00000000..bf02b027
--- /dev/null
+++ b/drivers/bl702_driver/CMakeLists.txt
@@ -0,0 +1,58 @@
+################# Add global include #################
+list(APPEND ADD_INCLUDE 
+"${CMAKE_CURRENT_SOURCE_DIR}/hal_drv/inc"
+"${CMAKE_CURRENT_SOURCE_DIR}/std_drv/inc"
+"${CMAKE_CURRENT_SOURCE_DIR}/regs"
+"${CMAKE_CURRENT_SOURCE_DIR}/startup"
+"${CMAKE_CURRENT_SOURCE_DIR}/risc-v/Core/Include"
+)
+#######################################################
+
+################# Add private include #################
+list(APPEND ADD_PRIVATE_INCLUDE 
+"${CMAKE_CURRENT_SOURCE_DIR}/hal_drv/default_config"
+)
+#######################################################
+
+############## Add current dir source files ###########
+file(GLOB_RECURSE sources 
+"${CMAKE_CURRENT_SOURCE_DIR}/std_drv/src/*.c"
+"${CMAKE_CURRENT_SOURCE_DIR}/hal_drv/src/*.c"
+"${CMAKE_CURRENT_SOURCE_DIR}/startup/interrupt.c"
+"${CMAKE_CURRENT_SOURCE_DIR}/startup/system_bl702.c"
+"${CMAKE_CURRENT_SOURCE_DIR}/startup/GCC/entry.S"
+"${CMAKE_CURRENT_SOURCE_DIR}/startup/GCC/start_load.c"
+)
+list(APPEND ADD_SRCS  ${sources})
+# aux_source_directory(src ADD_SRCS)
+list(REMOVE_ITEM ADD_SRCS "${CMAKE_CURRENT_SOURCE_DIR}/std_drv/src/bl702_snflash.c"
+)
+#######################################################
+
+########### Add required/dependent components #########
+list(APPEND ADD_REQUIREMENTS common)
+#######################################################
+
+############ Add static libs ##########################
+# if(CONFIG_COMPONENT1_INCLUDE_STATIC_LIB)
+#     list(APPEND ADD_STATIC_LIB "lib/libtest.a")
+# endif()
+#######################################################
+
+############ Add dynamic libs #########################
+# list(APPEND ADD_DYNAMIC_LIB "lib/arch/v831/libmaix_nn.so"
+#                             "lib/arch/v831/libmaix_cam.so"
+# )
+#######################################################
+
+############ Add global compile option ################
+#add components denpend on this component
+list(APPEND ADD_DEFINITIONS -DARCH_RISCV)
+#######################################################
+
+############ Add private compile option ################
+#add compile option for this component that won't affect other modules  
+# list(APPEND ADD_DEFINITIONS_PRIVATE -DAAAAA=1)
+#######################################################
+
+generate_library()
diff --git a/drivers/bl702_driver/bl702_flash.ld b/drivers/bl702_driver/bl702_flash.ld
new file mode 100644
index 00000000..14ced469
--- /dev/null
+++ b/drivers/bl702_driver/bl702_flash.ld
@@ -0,0 +1,227 @@
+/****************************************************************************************
+* @file map.txt
+*
+* @brief This file is the map file (gnuarm or armgcc).
+*
+* Copyright (C) BouffaloLab 2018
+*
+****************************************************************************************
+*/
+
+/* configure the CPU type */
+OUTPUT_ARCH( "riscv" )
+/* link with the standard c library */
+INPUT(-lc)
+/* link with the standard GCC library */
+INPUT(-lgcc)
+/* configure the entry point */
+ENTRY(_enter)
+
+StackSize = 0x1000; /*  4KB */
+HeapSize  = 0x1000; /*  4KB */
+
+MEMORY
+{
+    xip_memory  (rx)  : ORIGIN = 0x23000000, LENGTH = 4096K
+    itcm_memory (rx)  : ORIGIN = 0x22014000, LENGTH = 16K
+    dtcm_memory (rx)  : ORIGIN = 0x42018000, LENGTH = 32K
+    ram_memory  (!rx) : ORIGIN = 0x42020000, LENGTH = 48K
+}
+
+SECTIONS
+{
+    PROVIDE(__metal_chicken_bit = 0);
+
+    .text :
+    {
+        . = ALIGN(4);
+        __text_code_start__ = .;
+        
+        KEEP (*(.text.metal.init.enter))
+        KEEP (*(SORT_NONE(.init)))
+        /* section information for finsh shell */
+        . = ALIGN(4);
+        _shell_command_start = .;
+        KEEP(*(shellCommand))
+        _shell_command_end = .;
+
+        /* section information for usb desc */
+        . = ALIGN(4);
+        _usb_desc_start = .;
+        KEEP(*(usb_desc))
+        . = ALIGN(4);
+        _usb_desc_end = .;       
+                                  
+        *(.text)
+        *(.text.*)
+        
+        /*put .rodata**/
+        *(EXCLUDE_FILE( *bl602_glb.o \
+                        *bl602_pds.o \
+                        *bl602_common.o \
+                        *bl602_sf_cfg.o \
+                        *bl602_sf_ctrl.o \
+                        *bl602_sflash.o \
+                        *bl602_xip_sflash.o \
+                        *bl602_ef_ctrl.o) .rodata*)
+        *(.rodata)
+        *(.rodata.*)
+        
+        *(.srodata)
+        *(.srodata.*)
+        
+        . = ALIGN(4);
+        __text_code_end__ = .;
+    } > xip_memory
+    
+    . = ALIGN(4);
+    __itcm_load_addr = .;
+    
+    .itcm_region : AT (__itcm_load_addr)
+    {
+        . = ALIGN(4);
+        __tcm_code_start__ = .;
+        
+        *(.tcm_code)
+        *(.tcm_const)
+        *(.sclock_rlt_code)
+        *(.sclock_rlt_const)
+        
+        *bl602_glb.o*(.rodata*)
+        *bl602_pds.o*(.rodata*)
+        *bl602_common.o*(.rodata*)
+        *bl602_sf_cfg.o*(.rodata*)
+        *bl602_sf_ctrl.o*(.rodata*)
+        *bl602_sflash.o*(.rodata*)
+        *bl602_xip_sflash.o*(.rodata*)
+        *bl602_ef_ctrl.o*(.rodata*)
+        
+        . = ALIGN(4);
+        __tcm_code_end__ = .;
+    } > itcm_memory
+    
+    __dtcm_load_addr = __itcm_load_addr + SIZEOF(.itcm_region);
+    
+    .dtcm_region : AT (__dtcm_load_addr)
+    {
+        . = ALIGN(4);
+        __tcm_data_start__ = .;
+        
+        *(.tcm_data)
+        /* *finger_print.o(.data*) */
+        
+        . = ALIGN(4);
+        __tcm_data_end__ = .;
+    } > dtcm_memory
+
+    /* .heap_dummy section doesn't contains any symbols. It is only
+     * used for linker to calculate size of heap sections, and assign
+     * values to heap symbols later */
+    .heap_dummy (NOLOAD):
+    {
+        . = ALIGN(0x4);
+        . = . + HeapSize;
+        . = ALIGN(0x4);
+    } > dtcm_memory
+
+    _HeapBase = ORIGIN(dtcm_memory) + LENGTH(dtcm_memory) - StackSize - HeapSize;  
+    _HeapSize = HeapSize;
+    
+    /* Check if data + heap + stack exceeds RAM limit */
+    ASSERT(_HeapBase >= __tcm_data_end__, "region RAM overflowed with stack")
+    
+    /*************************************************************************/
+    /* .stack_dummy section doesn't contains any symbols. It is only
+     * used for linker to calculate size of stack sections, and assign
+     * values to stack symbols later */
+    .stack_dummy (NOLOAD):
+    {
+        . = ALIGN(0x4);
+        . = . + StackSize;
+        . = ALIGN(0x4);
+    } > dtcm_memory
+    
+    /* Set stack top to end of RAM, and stack limit move down by
+     * size of stack_dummy section */
+    __StackTop = ORIGIN(dtcm_memory) + LENGTH(dtcm_memory);
+    PROVIDE( __freertos_irq_stack_top = __StackTop);
+    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+    
+    /* Check if data + heap + stack exceeds RAM limit */
+    ASSERT(__StackLimit >= __tcm_data_end__, "region RAM overflowed with stack")
+    /*************************************************************************/
+    
+    __system_ram_load_addr = __dtcm_load_addr + SIZEOF(.dtcm_region);
+    
+    .system_ram_data_region : AT (__system_ram_load_addr)
+    {
+        . = ALIGN(4);
+        __system_ram_data_start__ = .;
+        
+        *(.system_ram)
+        
+        . = ALIGN(4);
+        __system_ram_data_end__ = .;
+    } > ram_memory
+    
+    __ram_load_addr = __system_ram_load_addr + SIZEOF(.system_ram_data_region);
+    
+    /* Data section */
+    RAM_DATA : AT (__ram_load_addr)
+    {
+        . = ALIGN(4);
+        __ram_data_start__ = .;
+        
+        PROVIDE( __global_pointer$ = . + 0x800 );
+        
+        *(.data)
+        *(.data.*)
+        *(.sdata)
+        *(.sdata.*)
+        *(.sdata2)
+        *(.sdata2.*)
+        
+        . = ALIGN(4);
+        __ram_data_end__ = .;
+    } > ram_memory
+    
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        __bss_start__ = .;
+        
+        *(.bss*)
+        *(.sbss*)
+        *(COMMON)
+        
+        . = ALIGN(4);
+        __bss_end__ = .;
+    } > ram_memory
+
+    .noinit_data (NOLOAD) :
+    {
+        . = ALIGN(4);
+        __noinit_data_start__ = .;
+        
+        *(.noinit_data*)
+        
+        . = ALIGN(4);
+        __noinit_data_end__ = .;
+    } > ram_memory
+    
+    .heap (NOLOAD):
+    {
+        . = ALIGN(4);
+        __HeapBase = .;
+        
+        /*__end__ = .;*/
+        /*end = __end__;*/
+        KEEP(*(.heap*))
+        
+        . = ALIGN(4);
+        __HeapLimit = .;
+    } > ram_memory
+    __HeapLimit = ORIGIN(ram_memory) + LENGTH(ram_memory);
+    
+}
+
diff --git a/drivers/bl702_driver/hal_drv/default_config/adc_config.h b/drivers/bl702_driver/hal_drv/default_config/adc_config.h
new file mode 100644
index 00000000..3992c17e
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/default_config/adc_config.h
@@ -0,0 +1,17 @@
+#ifndef _ADC_CONFIG_H
+#define _ADC_CONFIG_H
+
+#define ADC_DATA_WIDIH_12 (0)
+
+#define ADC_V18_SELECT (2)          /*!< ADC 1.8V select */
+#define ADC_V11_SELECT (1)          /*!< ADC 1.1V select */
+
+#define ADC_PGA_VCM    (0)          /*!< ADC VCM value */
+#define ADC_PGA_GAIN1  (0)          /*!< PGA gain 1 */
+#define ADC_PGA_GAIN2  (0)          /*!< PGA gain 2 */
+#define ADC_CHOP_MODE  (2)          /*!< ADC chop mode select */
+#define ADC_BIAS_SELECT (0)         /*!< ADC current form main bandgap or aon bandgap */
+#define ADC_OFFSET_CALIB_EN (0)     /*!< Offset calibration enable */
+#define ADC_OFFSER_CALIB_VAL (0)    /*!< Offset calibration value */
+
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/default_config/dac_config.h b/drivers/bl702_driver/hal_drv/default_config/dac_config.h
new file mode 100644
index 00000000..ec778437
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/default_config/dac_config.h
@@ -0,0 +1,8 @@
+#ifndef _ADC_CONFIG_H
+#define _ADC_CONFIG_H
+
+#define DAC_REF_SEL      (0)
+#define DAC_EXT_REF_GPIO (7)
+
+
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/default_config/i2c_config.h b/drivers/bl702_driver/hal_drv/default_config/i2c_config.h
new file mode 100644
index 00000000..954a0b89
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/default_config/i2c_config.h
@@ -0,0 +1,5 @@
+#ifndef _I2C_CONFIG_H
+#define _I2C_CONFIG_H
+
+
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/default_config/i2s_config.h b/drivers/bl702_driver/hal_drv/default_config/i2s_config.h
new file mode 100644
index 00000000..c41a8ae9
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/default_config/i2s_config.h
@@ -0,0 +1,11 @@
+#ifndef _I2S_CONFIG_H
+#define _I2S_CONFIG_H
+
+#define I2S_ADUIO_PLL_DEFAULT  AUDIO_PLL_12288000_HZ
+#define I2S_DATA_ENDIAN        I2S_DATA_ENDIAN_MSB
+#define I2S_MONO_CHANNEL       I2S_RX_MONO_MODE_LEFT_CHANNEL
+#define I2S_LR_EXCHANGE        DISABLE                          /*The position of L/R channel data within each entry is exchanged if enabled*/
+#define I2S_FS_INVERT          DISABLE 
+#define I2S_BCLK_INVERT        DISABLE 
+
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/default_config/pwm_config.h b/drivers/bl702_driver/hal_drv/default_config/pwm_config.h
new file mode 100644
index 00000000..0096a513
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/default_config/pwm_config.h
@@ -0,0 +1,7 @@
+#ifndef _PWM_CONFIG_H
+#define _PWM_CONFIG_H
+
+#define PWM_STOP_MODE_SEL (1)   /*PWM_STOP_GRACEFUL */
+#define PWM_POL_SEL (0)          /*!< PWM POL NORAML */
+#define PWM_MAX_CHANNEL (5)
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/default_config/spi_config.h b/drivers/bl702_driver/hal_drv/default_config/spi_config.h
new file mode 100644
index 00000000..5a0a710c
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/default_config/spi_config.h
@@ -0,0 +1,7 @@
+#ifndef _SPI_CONFIG_H
+#define _SPI_CONFIG_H
+
+#define SPI_DEGLITCH_ENABLE (0)
+#define SPI_CONTINUE_TRANSFER_ENABLE (1)
+#define SPI_SWAP_ENABLE (1)
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/default_config/uart_config.h b/drivers/bl702_driver/hal_drv/default_config/uart_config.h
new file mode 100644
index 00000000..be769fc6
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/default_config/uart_config.h
@@ -0,0 +1,17 @@
+#ifndef _UART_CONFIG_H
+#define _UART_CONFIG_H
+
+#define UART_CLOCK_SOURCE_96M_ENABLE  (1)
+#define UART_CTS_FLOWCONTROL_ENABLE   (0)
+#define UART_RTS_FLOWCONTROL_ENABLE   (0)
+#define UART_RX_DEGLITCH_ENABLE       (0)
+#define UART_MSB_FIRST_ENABLE         (0)
+#define UART_TX_SWCONTROL_ENABLE      (0)
+#define UART_TX_LINMODE_ENABLE        (0)
+#define UART_RX_LINMODE_ENABLE        (0)
+#define UART_TX_BREAKBIT_CNT          (0)
+
+#define UART_FIFO_MAX_LEN              128
+#define UART_DEFAULT_RTO_TIMEOUT       100
+
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/default_config/usb_config.h b/drivers/bl702_driver/hal_drv/default_config/usb_config.h
new file mode 100644
index 00000000..e53e12ed
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/default_config/usb_config.h
@@ -0,0 +1,10 @@
+#ifndef _USB_CONFIG_H
+#define _USB_CONFIG_H
+
+//#define USE_EXTERNAL_TRANSCEIVER
+#define USE_INTERNAL_TRANSCEIVER
+#define ENABLE_LPM_INT
+//#define ENABLE_SOF3MS_INT
+//#define ENABLE_ERROR_INT
+
+#endif
diff --git a/drivers/bl702_driver/hal_drv/inc/hal_adc.h b/drivers/bl702_driver/hal_drv/inc/hal_adc.h
new file mode 100644
index 00000000..c4b8242f
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/inc/hal_adc.h
@@ -0,0 +1,128 @@
+/**
+ * @file hal_adc.h
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#ifndef __HAL_ADC__H__
+#define __HAL_ADC__H__
+
+#include "drv_device.h"
+#include "bl702_config.h"
+
+enum adc_index_type
+{
+#ifdef BSP_USING_ADC0
+    ADC0_INDEX,
+#endif
+    ADC_MAX_INDEX
+};
+
+#define ADC_CLK_MAX (2000000)
+
+#define LEFT_SHIFT_BIT(x) (1 << x)
+
+typedef enum {
+    ADC_CHANNEL0,                              /* GPIO 0, ADC channel 0 */
+    ADC_CHANNEL1,                              /* GPIO 1, ADC channel 1 */
+    ADC_CHANNEL2,                              /* GPIO 2, ADC channel 2 */
+    ADC_CHANNEL3,                              /* GPIO 3, ADC channel 3 */
+    ADC_CHANNEL4,                              /* GPIO 4, ADC channel 4 */
+    ADC_CHANNEL5,                              /* GPIO 5, ADC channel 5 */
+    ADC_CHANNEL6,                              /* GPIO 6, ADC channel 6 */
+    ADC_CHANNEL7,                              /* GPIO 7, ADC channel 7 */
+    ADC_CHANNEL8,                              /* GPIO 8, ADC channel 8 */
+    ADC_CHANNEL9,                              /* GPIO 9, ADC channel 9 */
+    ADC_CHANNEL10,                             /* GPIO 10, ADC channel 10 */
+    ADC_CHANNEL11,                             /* GPIO 11, ADC channel 11 */
+    ADC_CHANNEL_DAC_OUTA,                      /* DACA, ADC channel 12 */
+    ADC_CHANNEL_DAC_OUTB,                      /* DACB, ADC channel 13 */
+    ADC_CHANNEL_TSEN_P,                        /* TSenp, ADC channel 14 */
+    ADC_CHANNEL_TSEN_N,                        /* TSenn, ADC channel 15 */
+    ADC_CHANNEL_VREF,                          /* Vref, ADC channel 16 */
+    ADC_CHANNEL_DCTEST,                        /* DCTest, ADC channel 17 */
+    ADC_CHANNEL_VABT_HALF,                     /* VBAT/2, ADC channel 18 */
+    ADC_CHANNEL_SENP3,                         /* SenVP3, ADC channel 19 */
+    ADC_CHANNEL_SENP2,                         /* SenVP2, ADC channel 20 */
+    ADC_CHANNEL_SENP1,                         /* SenVP1, ADC channel 21 */
+    ADC_CHANNEL_SENP0,                         /* SenVP0, ADC channel 22 */
+    ADC_CHANNEL_GND,                           /* GND, ADC channel 23 */
+}adc_channel_t;
+
+typedef enum {
+    ADC_CLK_2MHZ,
+    ADC_CLK_1P3MHZ,
+    ADC_CLK_1MHZ,
+    ADC_CLK_500KHZ,   
+}adc_clk_t;
+
+typedef enum {
+    ADC_VREF_3P2V = 0,                          /* ADC select 3.2V as reference voltage */
+    ADC_VREF_2P0V = 1,                          /* ADC select 2V as reference voltage */
+}adc_vref_t;
+
+typedef enum {
+    ADC_ONE_CONV = 0,                           /* ADC One shot conversion mode  */
+    ADC_CON_CONV = 1,                           /* ADC Continuous conversion mode */
+}adc_conv_t;
+
+/**
+ *  @brief ADC data width type definition
+ */
+typedef enum {
+    ADC_DATA_WD_12,                      /*!< ADC 12 bits */
+    ADC_DATA_WD_14_WITH_16_AVERAGE,      /*!< ADC 14 bits,and the value is average of 16 converts */
+    ADC_DATA_WD_16_WITH_64_AVERAGE,      /*!< ADC 16 bits,and the value is average of 64 converts */
+    ADC_DATA_WD_16_WITH_128_AVERAGE,     /*!< ADC 16 bits,and the value is average of 128 converts */
+    ADC_DATA_WD_16_WITH_256_AVERAGE,     /*!< ADC 16 bits,and the value is average of 256 converts */
+}adc_data_width_t;
+
+typedef enum {
+    ADC_SINGLE_ENDED_IN = 0,                    /* ADC signal is single-ended input */
+    ADC_DIFFERENTIAL_IN = 1,                    /* ADC signal is differential input*/
+}adc_inputmode_t;
+
+typedef struct {
+    uint8_t *pinList;
+    uint8_t *posChList;
+    uint8_t *negChList;
+    uint8_t  num;
+    uint8_t  dma_en;    
+    adc_conv_t   conv_mode;
+    adc_inputmode_t in_mode;    
+} adc_user_cfg_t;
+
+typedef struct {
+    int8_t posChan;                         /*!< Positive channel */
+    int8_t negChan;                         /*!< Negative channel */
+    uint16_t value;                         /*!< ADC value */
+    float volt;                             /*!< ADC voltage result */
+}adc_res_val_t;
+
+typedef struct adc_device
+{
+    struct device parent;
+    adc_clk_t  clk;                  /* CLK is not more than 2Mhz */
+    adc_vref_t vref;                 /* ADC voltage reference*/
+    adc_data_width_t resWidth;
+} adc_device_t;
+
+int adc_register(enum adc_index_type index, const char *name, uint16_t flag, adc_user_cfg_t *adc_user_cfg);
+
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/inc/hal_camera.h b/drivers/bl702_driver/hal_drv/inc/hal_camera.h
new file mode 100644
index 00000000..aa60db91
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/inc/hal_camera.h
@@ -0,0 +1,173 @@
+/**
+ * @file hal_camera.h
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#ifndef __IMAGE_SENSOR_H__
+#define __IMAGE_SENSOR_H__
+
+#include "bl702_common.h"
+#include "bl702_cam.h"
+#include "bl702_mjpeg.h"
+
+#define IMAGE_SENSOR_BF2013 0
+#define IMAGE_SENSOR_GC0308 1
+#define IMAGE_SENSOR_USE IMAGE_SENSOR_GC0308
+
+
+#define ENDADDR                        (0x42030000)
+#define CAMERA_RESOLUTION_X            640
+#define CAMERA_RESOLUTION_Y            480
+#define CAMERA_FRAME_SIZE              (CAMERA_RESOLUTION_X * CAMERA_RESOLUTION_Y * 2)
+#define MJPEG_READ_ADDR                0x42020800//0x42022000
+#define MJPEG_READ_SIZE                2
+#define YUV_USE                        1
+#if(YUV_USE == 1)
+#define CAMERA_BUFFER_SIZE_WHEN_MJPEG  (CAMERA_RESOLUTION_X * 2 * 8 * MJPEG_READ_SIZE)
+#else
+#define CAMERA_BUFFER_SIZE_WHEN_MJPEG  (CAMERA_RESOLUTION_X * 8 * MJPEG_READ_SIZE)
+#endif
+#define MJPEG_WRITE_ADDR               (MJPEG_READ_ADDR+CAMERA_BUFFER_SIZE_WHEN_MJPEG)
+#define MJPEG_WRITE_SIZE               (ENDADDR - MJPEG_READ_ADDR -CAMERA_BUFFER_SIZE_WHEN_MJPEG)
+
+extern CAM_CFG_Type cameraCfg;
+extern MJPEG_CFG_Type mjpegCfg;
+
+void Image_Sensor_PSRAM_Init(void);
+BL_Err_Type Image_Sensor_Init(BL_Fun_Type mjpegEn, CAM_CFG_Type *camCfg, MJPEG_CFG_Type *mjpegCfg);
+void Image_Sensor_Dump_Register(void);
+BL_Err_Type Image_Sensor_CAM_Get_Interleave(uint8_t **pic, uint32_t *len);
+BL_Err_Type Image_Sensor_CAM_Get_Planar(CAM_YUV_Mode_Type yuv, uint8_t **picYY, uint32_t *lenYY,
+                                        uint8_t **picUV, uint32_t *lenUV);
+uint8_t Image_Sensor_CAM_Frame_Count0(void);
+uint8_t Image_Sensor_CAM_Frame_Count1(void);
+void Image_Sensor_CAM_Release_Interleave(void);
+void Image_Sensor_CAM_Release_Planar(void);
+void Image_Sensor_CAM_Open(void);
+void Image_Sensor_CAM_Close(void);
+void Image_Sensor_CAM_Deinit(void);
+BL_Err_Type Image_Sensor_MJPEG_Get(uint8_t **pic, uint32_t *len, uint8_t *q);
+uint8_t Image_Sensor_MJPEG_Frame_Count(void);
+void Image_Sensor_MJPEG_Release(void);
+void Image_Sensor_MJPEG_Open(void);
+void Image_Sensor_MJPEG_Close(void);
+void Image_Sensor_MJPEG_Deinit(void);
+
+void ClkOutInit(void);
+BL_Err_Type Timer_Init(void);
+void Test_H(void);
+void Test_L(void);
+void Timer_Match0_Cbf(void);
+
+#endif
+
+// #ifndef __HAL_CAM__H__
+// #define __HAL_CAM__H__
+
+// #include "drv_device.h"
+// #include "bl702_config.h"
+
+// #define DEVICE_CTRL_CONFIG_CAM_START        0x10
+// #define DEVICE_CTRL_CONFIG_CAM_STOP         0x11
+
+// typedef enum
+// {
+//     CAMERA_PLANAR_MODE,
+//     CAMERA_INTERLEAVE_MODE,
+// } camera_frame_mode_t;
+
+// typedef enum
+// {
+//     CAMERA_YUV422,
+//     CAMERA_YUV420_EVEN,
+//     CAMERA_YUV420_ODD,
+//     CAMERA_YUV400_EVEN,
+//     CAMERA_YUV400_ODD,
+// } camera_yuv_mode_t;
+
+// typedef struct
+// {
+//     camera_frame_mode_t frame_mode;
+//     camera_yuv_mode_t yuv_mode;
+//     BL_Fun_Type mjpeg_enable;
+//     uint8_t mjpegQ;
+// } camera_pic_format_t;
+
+// typedef enum
+// {
+//     CAMERA_LINE_ACTIVE_POLARITY_LOW,  /*!< CAMERA line active polarity low */
+//     CAMERA_LINE_ACTIVE_POLARITY_HIGH, /*!< CAMERA line active polarity high */
+// } camera_line_active_polarity;
+
+// typedef enum
+// {
+//     CAMERA_FRAME_ACTIVE_POLARITY_LOW,  /*!< CAMERA frame active polarity low */
+//     CAMERA_FRAME_ACTIVE_POLARITY_HIGH, /*!< CAMERA frame active polarity high */
+// } camera_frame_active_polarity;
+
+// typedef struct 
+// {
+//     uint8_t mclk;
+//     uint8_t pclk;
+//     uint8_t vsync;
+//     uint8_t hsync;
+//     uint8_t data0;
+//     uint8_t data1;
+//     uint8_t data2;
+//     uint8_t data3;
+//     uint8_t data4;
+//     uint8_t data5;
+//     uint8_t data6;
+//     uint8_t data7;
+//     BL_Fun_Type mclk_enable;
+// } camera_pin_t;
+
+// typedef struct
+// {
+//     uint8_t *base1;
+//     uint8_t *addr1;
+//     uint32_t length1;
+//     uint8_t *base2;
+//     uint8_t *addr2;
+//     uint32_t length2;
+// } camera_picture_t;
+
+// typedef struct
+// {
+//     struct device parent;
+//     uint8_t id;
+//     camera_pin_t pin;
+//     uint32_t pic_reso_x;
+//     uint32_t pic_reso_y;
+//     uint8_t *buffer;
+//     uint32_t length;
+//     camera_pic_format_t pic_format;
+//     camera_line_active_polarity line_pol;
+//     camera_frame_active_polarity frame_pol;
+//     uint8_t mjpeg_quality;
+//     camera_picture_t picture;
+// } camera_device_t;
+
+// void camera_register(camera_device_t *device, const char *name, uint16_t flag);
+// int device_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size);
+
+// extern camera_device_t camera_device;
+
+// #endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/inc/hal_clock.h b/drivers/bl702_driver/hal_drv/inc/hal_clock.h
new file mode 100644
index 00000000..b959eddd
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/inc/hal_clock.h
@@ -0,0 +1,79 @@
+/**
+ * @file hal_clock.h
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#ifndef __HAL_CLOCK__H__
+#define __HAL_CLOCK__H__
+
+#include "drv_device.h"
+#include "bl702_config.h"
+
+#define INTERNAL_XTAL_32M 2
+#define EXTERNAL_XTAL_32M 1
+
+#define ROOT_CLOCK_SOURCE_RC_32K     0
+#define ROOT_CLOCK_SOURCE_XTAL_32K   1
+#define ROOT_CLOCK_SOURCE_RC_32M     2
+
+#define ROOT_CLOCK_SOURCE_XTAL_32M   3
+#define ROOT_CLOCK_SOURCE_DLL_57P6M  4
+#define ROOT_CLOCK_SOURCE_DLL_96M    5
+#define ROOT_CLOCK_SOURCE_DLL_144M   6
+
+#define ROOT_CLOCK_SOURCE_DLL_FCLK   7
+#define ROOT_CLOCK_SOURCE_DLL_HCLK   7
+#define ROOT_CLOCK_SOURCE_DLL_BCLK   8
+#define ROOT_CLOCK_SOURCE_DLL_XCLK   3
+
+#define ROOT_CLOCK_SOURCE_AUPLL      9
+
+#define OUTPUT_REF_CLOCK_SOURCE_NONE 0
+#define OUTPUT_REF_CLOCK_SOURCE_I2S  1
+
+#define BSP_ROOT_CLOCK_SOURCE   ROOT_CLOCK_SOURCE_DLL_144M
+#if (BSP_ROOT_CLOCK_SOURCE > 2) && (BSP_ROOT_CLOCK_SOURCE < 7)
+#define CLOCK_XTAL          EXTERNAL_XTAL_32M
+#else
+#define CLOCK_XTAL          INTERNAL_XTAL_32M
+#endif
+
+enum system_clock_type
+{
+    SYSTEM_CLOCK_ROOT_CLOCK = 0,
+    SYSTEM_CLOCK_FCLK,
+    SYSTEM_CLOCK_BCLK,
+    SYSTEM_CLOCK_XCLK,
+};
+enum peripheral_clock_type
+{
+    PERIPHERAL_CLOCK_UART = 0,
+    PERIPHERAL_CLOCK_SPI,
+    PERIPHERAL_CLOCK_I2C,
+    PERIPHERAL_CLOCK_ADC,
+    PERIPHERAL_CLOCK_DAC,
+    PERIPHERAL_CLOCK_I2S,
+};
+
+void system_clock_init(void);
+void peripheral_clock_init(void);
+uint32_t system_clock_get(enum system_clock_type type);
+uint32_t peripheral_clock_get(enum peripheral_clock_type type);
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/inc/hal_dac.h b/drivers/bl702_driver/hal_drv/inc/hal_dac.h
new file mode 100644
index 00000000..580b6683
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/inc/hal_dac.h
@@ -0,0 +1,73 @@
+/**
+ * @file hal_dac.h
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#ifndef __HAL_DAC__H__
+#define __HAL_DAC__H__
+
+#include "drv_device.h"
+#include "bl702_config.h"
+
+#define DEVICE_CTRL_DAC_ATTACH_TX_DMA      0x12
+
+enum dac_index_type
+{
+#ifdef BSP_USING_DAC0
+    DAC0_INDEX,
+#endif
+    DAC_MAX_INDEX
+};
+
+typedef struct 
+{
+    uint8_t dac0;
+    uint8_t dac1;
+    uint8_t pin_num;
+} dac_pin_t;
+
+typedef enum {
+    DAC_CHANNEL_0,  
+    DAC_CHANNEL_1,   
+    DAC_CHANNEL_ALL,
+}dac_channel_t;
+
+
+typedef enum {
+    DAC_CLK_500KHZ,  
+    DAC_CLK_44P1KHZ, 
+    DAC_CLK_16KHZ,     
+    DAC_CLK_8KHZ,
+}dac_clk_t;
+
+
+typedef struct dac_device
+{
+    struct device parent;
+    dac_clk_t clk;
+    dac_pin_t pin;
+    
+    void* tx_dma;
+} dac_device_t;
+
+
+int dac_register(enum dac_index_type index, const char *name, uint16_t flag);
+
+#endif
diff --git a/drivers/bl702_driver/hal_drv/inc/hal_dma.h b/drivers/bl702_driver/hal_drv/inc/hal_dma.h
new file mode 100644
index 00000000..7ce73078
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/inc/hal_dma.h
@@ -0,0 +1,191 @@
+/**
+ * @file hal_dma.h
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#ifndef __HAL_DMA__H__
+#define __HAL_DMA__H__
+
+#include "drv_device.h"
+#include "bl702_config.h"
+
+#define DMA_CHANNEL_GET_STATUS_CMD  0x10
+#define DMA_CHANNEL_START_CMD       0x11
+#define DMA_CHANNEL_STOP_CMD        0x12
+#define DMA_CHANNEL_UPDATE_CMD      0x13
+
+enum dma_index_type
+{
+#ifdef BSP_USING_DMA0_CH0
+    DMA0_CH0_INDEX,
+#endif
+#ifdef BSP_USING_DMA0_CH1
+    DMA0_CH1_INDEX,
+#endif
+#ifdef BSP_USING_DMA0_CH2
+    DMA0_CH2_INDEX,
+#endif
+#ifdef BSP_USING_DMA0_CH3
+    DMA0_CH3_INDEX,
+#endif
+#ifdef BSP_USING_DMA0_CH4
+    DMA0_CH4_INDEX,
+#endif
+#ifdef BSP_USING_DMA0_CH5
+    DMA0_CH5_INDEX,
+#endif
+#ifdef BSP_USING_DMA0_CH6
+    DMA0_CH6_INDEX,
+#endif
+#ifdef BSP_USING_DMA0_CH7
+    DMA0_CH7_INDEX,
+#endif
+    DMA_MAX_INDEX
+};
+
+#define dma_channel_start(dev)        device_control(dev,DMA_CHANNEL_START_CMD,NULL)
+#define dma_channel_stop(dev)         device_control(dev,DMA_CHANNEL_STOP_CMD,NULL)
+#define dma_channel_update(dev,list)  device_control(dev,DMA_CHANNEL_UPDATE_CMD,list)
+#define dma_channel_check_busy(dev)   device_control(dev,DMA_CHANNEL_GET_STATUS_CMD,NULL)
+
+#define DMA_ADDR_UART0_TDR  (0x4000A000+0x88)
+#define DMA_ADDR_UART0_RDR  (0x4000A000+0x8C)
+#define DMA_ADDR_UART1_TDR  (0x4000A100+0x88)
+#define DMA_ADDR_UART1_RDR  (0x4000A100+0x8C)
+#define DMA_ADDR_I2C_TDR    (0x4000A300+0x88)
+#define DMA_ADDR_I2C_RDR    (0x4000A300+0x8C)
+#define DMA_ADDR_SPI_TDR    (0x4000A200+0x88)
+#define DMA_ADDR_SPI_RDR    (0x4000A200+0x8C)
+#define DMA_ADDR_I2S_TDR    (0x4000AA00+0x88)
+#define DMA_ADDR_I2S_RDR    (0x4000AA00+0x8C)
+#define DMA_ADDR_ADC0_DR    (0x40002000+0x04)
+#define DMA_ADDR_ADC1_DR    (0x40002000+0x04)
+#define DMA_ADDR_DAC_TDR    (0x40002048)
+
+/** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode
+  * @brief    DMA peripheral incremented mode
+  * @{
+  */
+#define DMA_PINC_ENABLE        1  /*!< Peripheral increment mode enable  */
+#define DMA_PINC_DISABLE       0  /*!< Peripheral increment mode disable */
+/**
+  * @}
+  */
+
+/** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode
+  * @brief    DMA memory incremented mode
+  * @{
+  */
+#define DMA_MINC_ENABLE         1  /*!< Memory increment mode enable  */
+#define DMA_MINC_DISABLE        0  /*!< Memory increment mode disable */
+
+#define DMA_REQUEST_NONE        0x00000000 /*!< DMA request peripheral:None */
+#define DMA_REQUEST_UART0_RX    0x00000000 /*!< DMA request peripheral:UART0 RX */
+#define DMA_REQUEST_UART0_TX    0x00000001 /*!< DMA request peripheral:UART0 TX */
+#define DMA_REQUEST_UART1_RX    0x00000002 /*!< DMA request peripheral:UART1 RX */
+#define DMA_REQUEST_UART1_TX    0x00000003 /*!< DMA request peripheral:UART1 TX */
+#define DMA_REQUEST_I2C0_RX     0x00000006 /*!< DMA request peripheral:I2C RX */
+#define DMA_REQUEST_I2C0_TX     0x00000007 /*!< DMA request peripheral:I2C TX */
+#define DMA_REQUEST_SPI0_RX     0x0000000A /*!< DMA request peripheral:SPI RX */
+#define DMA_REQUEST_SPI0_TX     0x0000000B /*!< DMA request peripheral:SPI TX */
+#define DMA_REQUEST_I2S_RX      0x00000014 /*!< DMA request peripheral:I2S RX */ 
+#define DMA_REQUEST_I2S_TX      0x00000015 /*!< DMA request peripheral:I2S TX */ 
+#define DMA_REQUEST_ADC0        0x00000016 /*!< DMA request peripheral:GPADC0 */
+#define DMA_REQUEST_DAC0        0x00000017 /*!< DMA request peripheral:GPADC1 */
+
+#define DMA_BURST_1BYTE     0
+#define DMA_BURST_4BYTE     1
+#define DMA_BURST_8BYTE     2
+#define DMA_BURST_16BYTE    3
+
+#define DMA_TRANSFER_WIDTH_8BIT  0
+#define DMA_TRANSFER_WIDTH_16BIT 1
+#define DMA_TRANSFER_WIDTH_32BIT 2
+
+#define DMA_LLI_ONCE_MODE     0 
+#define DMA_LLI_CYCLE_MODE    1
+
+/**
+ *  @brief DMA transfer direction type definition
+ */
+typedef enum {
+    DMA_MEMORY_TO_MEMORY = 0,                        /*!< DMA transfer tyep:memory to memory */
+    DMA_MEMORY_TO_PERIPH,                            /*!< DMA transfer tyep:memory to peripheral */
+    DMA_PERIPH_TO_MEMORY,                            /*!< DMA transfer tyep:peripheral to memory */
+    DMA_PERIPH_TO_PERIPH,                            /*!< DMA transfer tyep:peripheral to peripheral */
+}dma_transfer_dir_type;
+
+typedef union
+{
+    struct
+    {
+        uint32_t TransferSize : 12; /* [11: 0],        r/w,        0x0 */
+        uint32_t SBSize : 2;        /* [13:12],        r/w,        0x1 */
+        uint32_t dst_min_mode : 1;  /* [   14],        r/w,        0x0 */
+        uint32_t DBSize : 2;        /* [16:15],        r/w,        0x1 */
+        uint32_t dst_add_mode : 1;  /* [   17],        r/w,        0x0 */
+        uint32_t SWidth : 2;        /* [19:18],        r/w,        0x2 */
+        uint32_t reserved_20 : 1;   /* [   20],       rsvd,        0x0 */
+        uint32_t DWidth : 2;        /* [22:21],        r/w,        0x2 */
+        uint32_t fix_cnt : 2;       /* [24:23],        r/w,        0x0 */
+        uint32_t SLargerD : 1;      /* [   25],        r/w,        0x0 */
+        uint32_t SI : 1;            /* [   26],        r/w,        0x1 */
+        uint32_t DI : 1;            /* [   27],        r/w,        0x1 */
+        uint32_t Prot : 3;          /* [30:28],        r/w,        0x0 */
+        uint32_t I : 1;             /* [   31],        r/w,        0x0 */
+    } bits;
+    uint32_t WORD;
+} dma_control_data_t;
+
+typedef struct
+{
+    uint32_t src_addr;
+    uint32_t dst_addr;
+    uint32_t nextlli;     
+    dma_control_data_t cfg;
+} dma_lli_ctrl_t;
+
+typedef struct
+{
+    uint8_t direction;
+    uint32_t src_req;
+    uint32_t dst_req;
+} dma_ctrl_param_t;
+
+typedef struct dma_device
+{
+    struct device parent;
+    uint8_t id;
+    uint8_t ch;
+    uint8_t direction;
+    uint8_t transfer_mode;
+    uint32_t src_req;
+    uint32_t dst_req;
+    uint8_t src_burst_size;
+    uint8_t dst_burst_size;
+    uint8_t src_width;
+    uint8_t dst_width;
+    dma_lli_ctrl_t *lli_cfg;    
+} dma_device_t;
+
+int dma_register(enum dma_index_type, const char *name, uint16_t flag);
+int dma_reload(struct device *dev, uint32_t src_addr, uint32_t dst_addr, uint32_t transfer_size);
+int dma_allocate_register(const char *name, uint16_t flag);
+#endif
diff --git a/drivers/bl702_driver/hal_drv/inc/hal_gpio.h b/drivers/bl702_driver/hal_drv/inc/hal_gpio.h
new file mode 100644
index 00000000..e35a2114
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/inc/hal_gpio.h
@@ -0,0 +1,99 @@
+/**
+ * @file hal_gpio.h
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#ifndef __HAL_GPIO__H__
+#define __HAL_GPIO__H__
+
+#include "drv_device.h"
+
+enum gpio_pin_type
+{
+    GPIO_PIN_0 = 0,
+    GPIO_PIN_1,
+    GPIO_PIN_2,
+    GPIO_PIN_3,
+    GPIO_PIN_4,
+    GPIO_PIN_5,
+    GPIO_PIN_6,
+    GPIO_PIN_7,
+    GPIO_PIN_8,
+    GPIO_PIN_9,
+    GPIO_PIN_10,
+    GPIO_PIN_11,
+    GPIO_PIN_12,
+    GPIO_PIN_13,
+    GPIO_PIN_14,
+    GPIO_PIN_15,
+    GPIO_PIN_16,
+    GPIO_PIN_17,
+    GPIO_PIN_18,
+    GPIO_PIN_19,
+    GPIO_PIN_20,
+    GPIO_PIN_21,
+    GPIO_PIN_22,
+    GPIO_PIN_23,
+    GPIO_PIN_24,
+    GPIO_PIN_25,
+    GPIO_PIN_26,
+    GPIO_PIN_27,
+    GPIO_PIN_28,
+    GPIO_PIN_29,
+    GPIO_PIN_30,
+    GPIO_PIN_31,
+    GPIO_PIN_32,
+    GPIO_PIN_33,
+    GPIO_PIN_34,
+    GPIO_PIN_35,
+    GPIO_PIN_36,
+    GPIO_PIN_37,
+    GPIO_PIN_MAX,
+};
+
+#define GPIO_OUTPUT_MODE                        0
+#define GPIO_OUTPUT_PP_MODE                     1
+#define GPIO_OUTPUT_PD_MODE                     2
+#define GPIO_INPUT_MODE                         3
+#define GPIO_INPUT_PP_MODE                      4
+#define GPIO_INPUT_PD_MODE                      5
+#define GPIO_ASYNC_RISING_TRIGER_INT_MODE       6
+#define GPIO_ASYNC_FALLING_TRIGER_INT_MODE      7
+#define GPIO_ASYNC_HIGH_LEVEL_INT_MODE          8
+#define GPIO_ASYNC_LOW_LEVEL_INT_MODE           9
+#define GPIO_SYNC_RISING_TRIGER_INT_MODE        10
+#define GPIO_SYNC_FALLING_TRIGER_INT_MODE       11
+#define GPIO_SYNC_HIGH_LEVEL_INT_MODE           12
+#define GPIO_SYNC_LOW_LEVEL_INT_MODE            13
+
+typedef struct gpio_device
+{
+    struct device parent;
+} gpio_device_t;
+
+void gpio_register(const char *name, uint16_t flag);
+
+void gpio_set_mode(uint32_t pin, uint32_t mode);
+void gpio_write(uint32_t pin, uint32_t value);
+void gpio_toggle(uint32_t pin);
+int  gpio_read(uint32_t pin);
+void gpio_attach_irq(uint32_t pin, void (*cbFun)(void));
+void gpio_irq_enable(uint32_t pin,uint8_t enabled);
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/inc/hal_i2c.h b/drivers/bl702_driver/hal_drv/inc/hal_i2c.h
new file mode 100644
index 00000000..2e65346c
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/inc/hal_i2c.h
@@ -0,0 +1,71 @@
+/**
+ * @file hal_i2c.h
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#ifndef __HAL_I2C__H__
+#define __HAL_I2C__H__
+
+#include "drv_device.h"
+#include "bl702_config.h"
+
+enum i2c_index_type
+{
+#ifdef BSP_USING_I2C0
+    I2C0_INDEX,
+#endif
+#ifdef BSP_USING_I2C1
+    I2C1_INDEX,
+#endif
+    I2C_MAX_INDEX
+};
+
+#define I2C_WR 0x0000
+#define I2C_RD 0x0001
+#define I2C_RW_MASK 0x0001
+
+#define SUB_ADDR_0BYTE 0x0010
+#define SUB_ADDR_1BYTE 0x0020
+#define SUB_ADDR_2BYTE 0x0040
+
+#define I2C_HW_MODE 0
+#define I2C_SW_MODE 1
+
+typedef struct i2c_msg
+{
+    uint8_t slaveaddr;
+    uint32_t subaddr;
+    uint16_t flags;
+    uint16_t len;
+    uint8_t *buf;
+} i2c_msg_t;
+
+typedef struct i2c_device
+{
+    struct device parent;
+    uint8_t id;
+    uint8_t mode;
+    uint32_t phase;
+} i2c_device_t;
+
+int i2c_register(enum i2c_index_type index, const char *name, uint16_t flag);
+uint32_t i2c_transfer(struct device *dev, i2c_msg_t msgs[], uint32_t num);
+
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/inc/hal_i2s.h b/drivers/bl702_driver/hal_drv/inc/hal_i2s.h
new file mode 100644
index 00000000..3541315a
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/inc/hal_i2s.h
@@ -0,0 +1,121 @@
+/**
+ * @file hal_i2s.h
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#ifndef __HAL_I2S__H__
+#define __HAL_I2S__H__
+
+#include "drv_device.h"
+#include "bl702_config.h"
+
+#define I2S_GET_TX_FIFO_CMD                 0x10
+#define I2S_GET_RX_FIFO_CMD                 0x11
+#define DEVICE_CTRL_I2S_ATTACH_TX_DMA       0x12
+#define DEVICE_CTRL_I2S_ATTACH_RX_DMA       0x13
+
+enum i2s_index_type
+{
+#ifdef BSP_USING_I2S0
+    I2S0_INDEX,
+#endif
+    I2S_MAX_INDEX
+};
+
+
+#define I2S_DEFAULT_RTO_TIMEOUT    15
+
+/*!
+ *  @brief    I2S mode type settings
+ *
+ *  This enumeration defines the I2S mode type
+ */
+typedef enum  
+{
+    I2S_MODE_STD,                           /*!< I2S STD Mode */
+    I2S_MODE_LEFT ,                         /*!< Left-Justified Mode */
+    I2S_MODE_RIGHT,                         /*!< Right-Justified Mode */
+    I2S_MODE_DSP_A,                         /*!< DSP/PCM Mode A*/
+    I2S_MODE_DSP_B,                         /*!< DSP/PCM Mode B*/
+} interface_mode_t;
+
+/*!
+ *  @brief    I2S frame size settings
+ *
+ *  This enumeration defines the frame size type
+ */
+typedef enum {
+    I2S_FRAME_LEN_8  = 1,                /*!< I2S frame size 8 bits */
+    I2S_FRAME_LEN_16 =2,               /*!< I2S frame size 16 bits */
+    I2S_FRAME_LEN_24 =3,               /*!< I2S frame size 24 bits */
+    I2S_FRAME_LEN_32 =4,               /*!< I2S frame size 32 bits */
+}i2s_frame_size_t;
+
+/*!
+ *  @brief    I2S data size settings
+ *
+ *  This enumeration defines the data size type
+ */
+typedef enum {
+    I2S_DATA_LEN_8 = 1,                /*!< I2S data size 8 bits */
+    I2S_DATA_LEN_16 = 2,                       /*!< I2S data size 16 bits */
+    I2S_DATA_LEN_24 = 3,                       /*!< I2S data size 24 bits */
+    I2S_DATA_LEN_32 = 4,                       /*!< I2S data size 32 bits */
+}i2s_data_size_t;
+
+
+/*!
+ *  @brief    I2S frame channel settings
+ *
+ *  This enumeration defines the frame channel mode type
+ */
+typedef enum {
+    I2S_FS_CHANNELS_NUM_MONO=1,                   /*!< I2S frame is for 1 channels */
+    I2S_FS_CHANNELS_NUM_2 =2,                      /*!< I2S frame is for 2 channels */
+    I2S_FS_CHANNELS_NUM_3 =3,                      /*!< I2S frame is for 3 channels, DSP mode only, frame_size must equal data_size*/
+    I2S_FS_CHANNELS_NUM_4 =4,                      /*!< I2S frame is for 4 channels, DSP mode only, frame_size must equal data_size*/
+}i2s_channel_num_t;
+
+
+typedef enum 
+{
+    I2S_MODE_MASTER = 0,    /*!< I2S as master */
+    I2S_MODE_SLAVE ,     /*!< I2S as slave */
+} i2s_mode_t;
+
+typedef struct i2s_device
+{
+    struct device parent;
+    uint8_t     id;
+
+    i2s_mode_t        iis_mode;
+    interface_mode_t  interface_mode;
+    uint32_t          sampl_freq_hz;          /*!< I2S sample data frequency in Hz */
+    i2s_channel_num_t channel_num;
+    i2s_frame_size_t  frame_size;
+    i2s_data_size_t   data_size;
+    uint8_t           fifo_threshold;   /*!< I2S receive and transmit threshold*/
+    void* tx_dma;
+    void* rx_dma;
+} i2s_device_t;
+
+int i2s_register(enum i2s_index_type index,const char *name,uint16_t flag);
+
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/inc/hal_mtimer.h b/drivers/bl702_driver/hal_drv/inc/hal_mtimer.h
new file mode 100644
index 00000000..d2d59fd0
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/inc/hal_mtimer.h
@@ -0,0 +1,38 @@
+/**
+ * @file hal_mtimer.h
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#ifndef __HAL_MTIMER__H__
+#define __HAL_MTIMER__H__
+
+#include "stdint.h"
+
+void mtimer_init(void);
+void mtimer_deinit(void);
+void mtimer_start(void);
+void mtimer_stop();
+void mtimer_clear_time(void);
+uint64_t mtimer_get_time_ms();
+uint64_t mtimer_get_time_us();
+void mtimer_delay_ms(uint32_t time);
+void mtimer_delay_us(uint32_t time);
+void mtimer_set_alarm_time(uint64_t time, void (*interruptFun)(void));
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/inc/hal_pwm.h b/drivers/bl702_driver/hal_drv/inc/hal_pwm.h
new file mode 100644
index 00000000..2def46b1
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/inc/hal_pwm.h
@@ -0,0 +1,66 @@
+/**
+ * @file hal_pwm.h
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#ifndef __HAL_PWM__H__
+#define __HAL_PWM__H__
+
+#include "drv_device.h"
+#include "bl702_config.h"
+
+
+enum pwm_index_type
+{
+#ifdef BSP_USING_UART0
+    PWM0_INDEX,
+#endif
+#ifdef BSP_USING_UART1
+    PWM1_INDEX,
+#endif
+#ifdef BSP_USING_UART2
+    PWM2_INDEX,
+#endif
+#ifdef BSP_USING_UART3
+    PWM3_INDEX,
+#endif
+#ifdef BSP_USING_UART4
+    PWM4_INDEX,
+#endif
+    PWM_MAX_INDEX
+};
+
+typedef struct
+{
+    uint32_t frequency;
+    uint8_t dutyCycle;
+} pwm_config_t;
+typedef struct pwm_device
+{
+    struct device parent;
+    uint8_t ch;
+    uint32_t frequency;
+    uint8_t dutyCycle;
+} pwm_device_t;
+
+
+void pwm_register(enum pwm_index_type index, const char *name, uint16_t flag);
+
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/inc/hal_spi.h b/drivers/bl702_driver/hal_drv/inc/hal_spi.h
new file mode 100644
index 00000000..94ae3950
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/inc/hal_spi.h
@@ -0,0 +1,100 @@
+/**
+ * @file hal_spi.h
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#ifndef __HAL_SPI__H__
+#define __HAL_SPI__H__
+
+#include "drv_device.h"
+#include "bl702_config.h"
+
+#define DEVICE_CTRL_SPI_ATTACH_TX_DMA_CMD      0x10
+#define DEVICE_CTRL_SPI_ATTACH_RX_DMA_CMD      0x11
+#define DEVICE_CTRL_SPI_CONFIG_CLOCK_CMD       0x12
+
+enum spi_index_type
+{
+#ifdef BSP_USING_SPI0
+    SPI0_INDEX,
+#endif
+    SPI_MAX_INDEX
+};
+
+/** @defgroup SPI_Direction SPI Direction Mode
+  * @{
+  */
+#define SPI_LSB_BYTE0_DIRECTION_FIRST 0
+#define SPI_LSB_BYTE3_DIRECTION_FIRST 1
+#define SPI_MSB_BYTE0_DIRECTION_FIRST 2
+#define SPI_MSB_BYTE3_DIRECTION_FIRST 3
+
+/** @defgroup SPI_Data_Size SPI Data Size
+  * @{
+  */
+#define SPI_DATASIZE_8BIT                            0
+#define SPI_DATASIZE_16BIT                           1
+#define SPI_DATASIZE_24BIT                           2
+#define SPI_DATASIZE_32BIT                           3
+
+/** @defgroup SPI_Clock_Polarity SPI Clock Polarity
+  * @{
+  */
+#define SPI_POLARITY_LOW                              0
+#define SPI_POLARITY_HIGH                             1
+
+/** @defgroup SPI_Clock_Phase SPI Clock Phase
+  * @{
+  */
+#define SPI_PHASE_1EDGE                               0
+#define SPI_PHASE_2EDGE                               1
+
+/** @defgroup 
+  * @{
+  */
+#define SPI_SLVAE_MODE                                0
+#define SPI_MASTER_MODE                               1
+
+#define SPI_TRANSFER_TYPE_8BIT    0
+#define SPI_TRANSFER_TYPE_16BIT   1
+#define SPI_TRANSFER_TPYE_24BIT   2
+#define SPI_TRANSFER_TYPE_32BIT   3
+
+typedef struct spi_device
+{
+    struct device parent;
+    uint8_t id;
+    uint32_t clk;
+    uint8_t mode;
+    uint8_t direction;
+    uint8_t clk_polaraity;
+    uint8_t clk_phase;
+    uint8_t datasize;
+    uint8_t fifo_threshold;
+    void* tx_dma;
+    void* rx_dma;
+} spi_device_t;
+
+int spi_register(enum spi_index_type index, const char *name, uint16_t flag);
+
+int spi_transmit(struct device *dev, void *buffer, uint32_t size, uint8_t type);
+int spi_receive(struct device *dev, void *buffer, uint32_t size, uint8_t type);
+int spi_transmit_receive(struct device *dev, const void *send_buf, void *recv_buf, uint32_t length, uint8_t type);
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/inc/hal_timer.h b/drivers/bl702_driver/hal_drv/inc/hal_timer.h
new file mode 100644
index 00000000..ea804714
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/inc/hal_timer.h
@@ -0,0 +1,40 @@
+/**
+ * @file hal_timer.h
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#ifndef __HAL_TIMER__H__
+#define __HAL_TIMER__H__
+
+#include "drv_device.h"
+#include "bl702_config.h"
+
+
+typedef struct timer_device
+{
+    struct device parent;
+    // TIMER_CFG_Type *timerAttr;
+} timer_device_t;
+
+void timer_register(timer_device_t *device, const char *name, uint16_t flag);
+
+extern timer_device_t timerx_device;
+
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/inc/hal_uart.h b/drivers/bl702_driver/hal_drv/inc/hal_uart.h
new file mode 100644
index 00000000..75a5bed0
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/inc/hal_uart.h
@@ -0,0 +1,137 @@
+/**
+ * @file hal_uart.h
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#ifndef __HAL_UART__H__
+#define __HAL_UART__H__
+
+#include "drv_device.h"
+#include "bl702_config.h"
+
+#define DEVICE_CTRL_UART_GET_TX_FIFO        0x10
+#define DEVICE_CTRL_UART_GET_RX_FIFO        0x11
+#define DEVICE_CTRL_UART_ATTACH_TX_DMA      0x12
+#define DEVICE_CTRL_UART_ATTACH_RX_DMA      0x13
+
+enum uart_index_type
+{
+#ifdef BSP_USING_UART0
+    UART0_INDEX,
+#endif
+#ifdef BSP_USING_UART1
+    UART1_INDEX,
+#endif
+#ifdef BSP_USING_UART2
+    UART2_INDEX,
+#endif
+#ifdef BSP_USING_UART3
+    UART3_INDEX,
+#endif
+#ifdef BSP_USING_UART4
+    UART4_INDEX,
+#endif
+    UART_MAX_INDEX
+};
+
+/*!
+ *  @brief    UART data length settings
+ *
+ *  This enumeration defines the UART data lengths.
+ */
+typedef enum  
+{
+    UART_DATA_LEN_5 = 0,  /*!< Data length is 5 bits */
+    UART_DATA_LEN_6 = 1,  /*!< Data length is 6 bits */
+    UART_DATA_LEN_7 = 2,  /*!< Data length is 7 bits */
+    UART_DATA_LEN_8 = 3   /*!< Data length is 8 bits */
+} uart_databits_t;
+
+/*!
+ *  @brief    UART stop bit settings
+ *
+ *  This enumeration defines the UART stop bits.
+ */
+typedef enum  
+{
+    UART_STOP_ONE = 0,  /*!< One stop bit */
+    UART_STOP_ONE_D_FIVE = 0,  /*!< 1.5 stop bit */
+    UART_STOP_TWO = 1   /*!< Two stop bits */
+} uart_stopbits_t;
+
+/*!
+ *  @brief    UART parity type settings
+ *
+ *  This enumeration defines the UART parity types.
+ */
+typedef enum  
+{
+    UART_PAR_NONE = 0,  /*!< No parity */
+    UART_PAR_ODD  = 1,  /*!< Parity bit is odd */
+    UART_PAR_EVEN = 2,  /*!< Parity bit is even */
+} uart_parity_t;
+
+enum uart_event_type
+{
+    UART_EVENT_TX_END,
+    UART_EVENT_TX_FIFO,
+    UART_EVENT_RX_END,
+    UART_EVENT_RX_FIFO,
+    UART_EVENT_RTO,
+    UART_EVENT_UNKNOWN
+};
+
+enum uart_it_type
+{
+    UART_TX_END_IT = 1 << 0,
+    UART_RX_END_IT = 1 << 1,
+    UART_TX_FIFO_IT = 1 << 2,
+    UART_RX_FIFO_IT = 1 << 3,
+    UART_RTO_IT = 1 << 4,
+    UART_PCE_IT = 1 << 5,
+    UART_TX_FER_IT = 1 << 6,
+    UART_RX_FER_IT = 1 << 7,
+    UART_ALL_IT = 1 << 8
+};
+
+typedef struct 
+{
+    uint32_t baudrate;
+    uart_databits_t databits;
+    uart_stopbits_t stopbits;
+    uart_parity_t parity;    
+}uart_param_cfg_t;
+
+typedef struct uart_device
+{
+    struct device parent;
+    uint8_t id;
+    uint32_t baudrate;
+    uart_databits_t databits;
+    uart_stopbits_t stopbits;
+    uart_parity_t parity;
+    uint8_t fifo_threshold;
+    void* tx_dma;
+    void* rx_dma;
+} uart_device_t;
+
+int uart_register(enum uart_index_type index, const char *name, uint16_t flag);
+
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/inc/hal_usb.h b/drivers/bl702_driver/hal_drv/inc/hal_usb.h
new file mode 100644
index 00000000..8fa6ba0c
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/inc/hal_usb.h
@@ -0,0 +1,220 @@
+/**
+ * @file hal_usb.h
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#ifndef __HAL_USB__H__
+#define __HAL_USB__H__
+
+#include "drv_device.h"
+#include "ring_buffer.h"
+#include "bl702_config.h"
+
+#define DEVICE_CTRL_USB_DC_SET_ADDR         0X10
+#define DEVICE_CTRL_USB_DC_SET_ACK          0X11
+#define DEVICE_CTRL_USB_DC_SET_NACK         0X12
+#define DEVICE_CTRL_USB_DC_SET_STALL        0X13
+#define DEVICE_CTRL_USB_DC_CLR_STALL        0X14
+#define DEVICE_CTRL_USB_DC_GET_STALL        0X15
+#define DEVICE_CTRL_USB_DC_CLR_NACK         0X16
+#define DEVICE_CTRL_USB_DC_CHECK_EPCAP      0X17
+#define DEVICE_CTRL_USB_DC_TX_FIFO_CNT_GET  0x18
+#define DEVICE_CTRL_USB_DC_RX_FIFO_CNT_GET  0x19
+
+enum usb_index_type
+{
+#ifdef BSP_USING_USB
+    USB_INDEX,
+#endif
+    USB_MAX_INDEX
+};
+
+/**
+ * USB endpoint Transfer Type mask.
+ */
+#define USBD_EP_TYPE_CTRL                                 0
+#define USBD_EP_TYPE_ISOC                                 1
+#define USBD_EP_TYPE_BULK                                 2
+#define USBD_EP_TYPE_INTR                                 3
+#define USBD_EP_TYPE_MASK                                 3
+
+/**
+ * USB endpoint direction and number.
+ */
+#define USB_EP_DIR_MASK		0x80U
+#define USB_EP_DIR_IN		0x80U
+#define USB_EP_DIR_OUT		0x00U
+
+#define USB_EP_OUT_MSK     0x7FU
+#define USB_EP_IN_MSK      0x80U
+
+/** Get endpoint index (number) from endpoint address */
+#define USB_EP_GET_IDX(ep) ((ep) & ~USB_EP_DIR_MASK)
+/** Get direction from endpoint address */
+#define USB_EP_GET_DIR(ep) ((ep) & USB_EP_DIR_MASK)
+/** Get endpoint address from endpoint index and direction */
+#define USB_EP_GET_ADDR(idx, dir) ((idx) | ((dir) & USB_EP_DIR_MASK))
+/** True if the endpoint is an IN endpoint */
+#define USB_EP_DIR_IS_IN(ep) (USB_EP_GET_DIR(ep) == USB_EP_DIR_IN)
+/** True if the endpoint is an OUT endpoint */
+#define USB_EP_DIR_IS_OUT(ep) (USB_EP_GET_DIR(ep) == USB_EP_DIR_OUT)
+
+#define USB_SET_EP_OUT(ep) (ep & USB_EP_OUT_MSK)
+#define USB_SET_EP_IN(ep)  (ep | USB_EP_IN_MSK)
+
+#define USB_OUT_EP_NUM 8
+#define USB_IN_EP_NUM 8
+
+#define USB_CTRL_EP_MPS	64   /**< maximum packet size (MPS) for EP 0 */
+#define USB_FS_MAX_PACKET_SIZE	    64   /**< full speed MPS for bulk EP */
+
+/* Default USB control EP, always 0 and 0x80 */
+#define USB_CONTROL_OUT_EP0         0
+#define USB_CONTROL_IN_EP0          0x80
+
+#define USB_DC_EP_TYPE_CTRL 0x5 /*0*/
+#define USB_DC_EP_TYPE_ISOC 0x2 /*1*/
+#define USB_DC_EP_TYPE_BULK 0x4 /*2*/
+#define USB_DC_EP_TYPE_INTR 0x0 /*3*/
+
+#define USB_DC_EP1_IN_DR        (0x4000D800+0x118)
+#define USB_DC_EP1_OUT_DR       (0x4000D800+0x11c)
+#define USB_DC_EP2_IN_DR        (0x4000D800+0x128)
+#define USB_DC_EP2_OUT_DR       (0x4000D800+0x12c)
+#define USB_DC_EP3_IN_DR        (0x4000D800+0x138)
+#define USB_DC_EP3_OUT_DR       (0x4000D800+0x13c)
+#define USB_DC_EP4_IN_DR        (0x4000D800+0x148)
+#define USB_DC_EP4_OUT_DR       (0x4000D800+0x14c)
+#define USB_DC_EP5_IN_DR        (0x4000D800+0x158)
+#define USB_DC_EP5_OUT_DR       (0x4000D800+0x15c)
+#define USB_DC_EP6_IN_DR        (0x4000D800+0x168)
+#define USB_DC_EP6_OUT_DR       (0x4000D800+0x16c)
+#define USB_DC_EP7_IN_DR        (0x4000D800+0x178)
+#define USB_DC_EP7_OUT_DR       (0x4000D800+0x17c)
+
+enum usb_dc_event_type 
+{
+	/** USB error reported by the controller */
+	USB_DC_EVENT_ERROR,
+	/** USB reset */
+	USB_DC_EVENT_RESET,
+	/** Start of Frame received */
+	USB_DC_EVENT_SOF,		
+	/** USB connection established, hardware enumeration is completed */
+	USB_DC_EVENT_CONNECTED,
+	/** USB configuration done */
+	USB_DC_EVENT_CONFIGURED,	
+	/** USB connection suspended by the HOST */
+	USB_DC_EVENT_SUSPEND,
+	/** USB connection lost */
+	USB_DC_EVENT_DISCONNECTED,	
+	/** USB connection resumed by the HOST */
+	USB_DC_EVENT_RESUME,	
+
+	/** setup packet received */
+	USB_DC_EVENT_SETUP_NOTIFY,
+	/** ep0 in packet received */
+	USB_DC_EVENT_EP0_IN_NOTIFY,
+	/** ep0 out packet received */
+	USB_DC_EVENT_EP0_OUT_NOTIFY,
+	/** ep in packet except ep0 received */
+	USB_DC_EVENT_EP_IN_NOTIFY,
+	/** ep out packet except ep0 received */
+	USB_DC_EVENT_EP_OUT_NOTIFY,
+	/** Initial USB connection status */
+	USB_DC_EVENT_UNKNOWN
+};
+
+enum usb_dc_ep_it_type
+{
+    USB_SOF_IT = 1 << 0,
+    USB_EP1_DATA_IN_IT = 1 << 10,
+    USB_EP1_DATA_OUT_IT = 1 << 11,
+    USB_EP2_DATA_IN_IT = 1 << 12,
+    USB_EP2_DATA_OUT_IT = 1 << 13,
+    USB_EP3_DATA_IN_IT = 1 << 14,
+    USB_EP3_DATA_OUT_IT = 1 << 15,
+    USB_EP4_DATA_IN_IT = 1 << 16,
+    USB_EP4_DATA_OUT_IT = 1 << 17,
+    USB_EP5_DATA_IN_IT = 1 << 18,
+    USB_EP5_DATA_OUT_IT = 1 << 19,
+    USB_EP6_DATA_IN_IT = 1 << 20,
+    USB_EP6_DATA_OUT_IT = 1 << 21,
+    USB_EP7_DATA_IN_IT = 1 << 22,
+    USB_EP7_DATA_OUT_IT = 1 << 23,
+};
+
+enum usb_error_type
+{
+    USB_DC_OK = 0,
+    USB_DC_EP_DIR_ERR = 1,
+    USB_DC_EP_EN_ERR = 2,   
+    USB_DC_EP_TIMEOUT_ERR = 3,     
+    USB_DC_RB_SIZE_SMALL_ERR = 4,    
+    USB_DC_ZLP_ERR = 5,
+};
+/**
+ * @brief USB Endpoint Configuration.
+ *
+ * Structure containing the USB endpoint configuration.
+ */
+struct usb_dc_ep_cfg{
+	/** The number associated with the EP in the device
+	 *  configuration structure
+	 *       IN  EP = 0x80 | \
+	 *       OUT EP = 0x00 | \
+	 */
+	uint8_t ep_addr;
+	/** Endpoint max packet size */
+	uint16_t ep_mps;
+	/** Endpoint Transfer Type.
+	 * May be Bulk, Interrupt, Control or Isochronous
+	 */
+	uint8_t ep_type;
+} ;
+
+/*
+ * USB endpoint  structure.
+ */
+typedef struct
+{
+    uint8_t ep_ena;
+    uint32_t is_stalled;
+    struct usb_dc_ep_cfg ep_cfg;
+} usb_dc_ep_state_t;
+
+typedef struct usb_dc_device
+{
+    struct device parent;
+    uint8_t id;
+    usb_dc_ep_state_t in_ep[8];  /*!< IN endpoint parameters             */
+    usb_dc_ep_state_t out_ep[8]; /*!< OUT endpoint parameters            */
+} usb_dc_device_t;
+
+int usb_dc_register(enum usb_index_type index, const char *name, uint16_t flag);
+
+int usb_dc_ep_open(struct device *dev, const struct usb_dc_ep_cfg *ep_cfg);
+int usb_dc_ep_is_stalled(struct device *dev, const uint8_t ep, uint8_t *stalled);
+int usb_dc_ep_write(struct device *dev, const uint8_t ep, const uint8_t *data, uint32_t data_len, uint32_t *ret_bytes);
+int usb_dc_ep_read(struct device *dev, const uint8_t ep, uint8_t *data, uint32_t data_len, uint32_t *read_bytes);
+uint16_t usb_dc_receive_to_ringbuffer(struct device *dev,Ring_Buffer_Type* rb,uint8_t ep);
+uint16_t usb_dc_send_from_ringbuffer(struct device *dev,Ring_Buffer_Type* rb,uint8_t ep);
+
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/src/hal_adc.c b/drivers/bl702_driver/hal_drv/src/hal_adc.c
new file mode 100644
index 00000000..eb131b6d
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/src/hal_adc.c
@@ -0,0 +1,243 @@
+/**
+ * @file hal_adc.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_adc.h"
+#include "hal_gpio.h"
+#include "bl702_glb.h"
+#include "bl702_dma.h"
+#include "bl702_adc.h"
+#include "adc_config.h"
+
+adc_device_t adcx_device[ADC_MAX_INDEX] = {
+#ifdef BSP_USING_ADC0
+    ADC_CONFIG,
+#endif
+};
+
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @param oflag 
+ * @return int 
+ */
+int adc_open(struct device *dev, uint16_t oflag)
+{
+    adc_device_t *adc_device = (adc_device_t *)dev;
+    adc_user_cfg_t *adc_user_cfg = ((adc_user_cfg_t *)(adc_device->parent.handle));
+    ADC_CFG_Type adc_cfg;
+    ADC_FIFO_Cfg_Type adc_fifo_cfg;
+ 
+    ADC_Disable();
+    ADC_Reset();
+    /*
+    MSG("adc_user_cfg->pinList = %d \r\n",adc_user_cfg->pinList[0]);
+    MSG("adc_user_cfg->pinList = %d \r\n",adc_user_cfg->pinList[1]);
+    MSG("adc_user_cfg->posChList = %d \r\n",adc_user_cfg->posChList[0]);
+    MSG("adc_user_cfg->negChList = %d \r\n",adc_user_cfg->negChList[0]);
+    MSG("adc_user_cfg->num = %d \r\n", adc_user_cfg->num);
+    */
+    GLB_GPIO_Func_Init(GPIO_FUN_ANALOG, (GLB_GPIO_Type *)&adc_user_cfg->pinList, adc_user_cfg->num);
+
+    switch (adc_device->clk)
+    {
+    case ADC_CLK_500KHZ:
+        GLB_Set_ADC_CLK(ENABLE, GLB_ADC_CLK_XCLK, 1);
+        adc_cfg.clkDiv = ADC_CLK_DIV_32;
+        break;
+    case ADC_CLK_1MHZ:
+        GLB_Set_ADC_CLK(ENABLE, GLB_ADC_CLK_XCLK, 1);
+        adc_cfg.clkDiv = ADC_CLK_DIV_16;
+        break;
+    case ADC_CLK_1P3MHZ:
+        GLB_Set_ADC_CLK(ENABLE, GLB_ADC_CLK_XCLK, 2);
+        adc_cfg.clkDiv = ADC_CLK_DIV_8;
+        break;
+    case ADC_CLK_2MHZ:
+        GLB_Set_ADC_CLK(ENABLE, GLB_ADC_CLK_XCLK, 1);
+        adc_cfg.clkDiv = ADC_CLK_DIV_8;
+        break;
+    default:
+        break;
+    }
+    
+    adc_cfg.vref = adc_device->vref;
+    adc_cfg.resWidth = adc_device->resWidth;
+    adc_cfg.inputMode = adc_user_cfg->in_mode;
+
+    adc_cfg.v18Sel = ADC_V18_SELECT;
+    adc_cfg.v11Sel = ADC_V11_SELECT;
+    adc_cfg.gain1  = ADC_PGA_GAIN1;
+    adc_cfg.gain2  = ADC_PGA_GAIN2;
+    adc_cfg.chopMode = ADC_CHOP_MODE;
+    adc_cfg.biasSel  = ADC_BIAS_SELECT;
+    adc_cfg.vcm = ADC_PGA_VCM;
+    adc_cfg.offsetCalibEn = ADC_OFFSET_CALIB_EN;
+    adc_cfg.offsetCalibVal = ADC_OFFSER_CALIB_VAL;
+
+    if(adc_user_cfg->dma_en)
+    {
+        adc_fifo_cfg.dmaEn = ENABLE;
+    }
+    else
+    {
+        adc_fifo_cfg.dmaEn = DISABLE;
+    }
+    adc_fifo_cfg.fifoThreshold = ADC_FIFO_THRESHOLD_1;
+
+    ADC_Init(&adc_cfg);
+    if(adc_user_cfg->num == 1)
+    {
+        ADC_Channel_Config((ADC_Chan_Type)adc_user_cfg->posChList[0],(ADC_Chan_Type)adc_user_cfg->negChList[0], adc_user_cfg->conv_mode);
+    }
+    else if(adc_user_cfg->num > 1)
+    {
+        ADC_Scan_Channel_Config((ADC_Chan_Type*)(adc_user_cfg->posChList), (ADC_Chan_Type*)(adc_user_cfg->negChList),adc_user_cfg->num,adc_user_cfg->conv_mode);
+    }
+    
+    ADC_FIFO_Cfg(&adc_fifo_cfg);
+    
+    if((ADC_Chan_Type)adc_user_cfg->posChList[0] == ADC_CHAN_VABT_HALF)
+    {
+        ADC_Vbat_Enable();
+    }
+    
+    ADC_Enable();
+
+    return 0;
+}
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @return int 
+ */
+int adc_close(struct device *dev)
+{
+    ADC_Disable();
+    return 0;
+}
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @param cmd 
+ * @param args 
+ * @return int 
+ */
+int adc_control(struct device *dev, int cmd, void *args)
+{
+    //adc_device_t *adc_device = (adc_device_t *)dev;
+
+    switch (cmd)
+    {
+    case DEVICE_CTRL_SET_INT /* constant-expression */:
+
+        break;
+    case DEVICE_CTRL_CLR_INT /* constant-expression */:
+        /* code */
+        /* Enable UART interrupt*/
+
+        break;
+    case DEVICE_CTRL_GET_INT /* constant-expression */:
+        /* code */
+        break;
+    case DEVICE_CTRL_CONFIG /* constant-expression */:
+        /* code */
+        break;
+    case DEVICE_CTRL_RESUME /* constant-expression */:
+        /* code */
+        ADC_Start();
+        break;
+    case DEVICE_CTRL_SUSPEND /* constant-expression */:
+        /* code */
+        ADC_Stop();
+        break;
+    default:
+        break;
+    }
+
+    return 0;
+}
+// int adc_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size)
+// {
+
+//     return 0;
+// }
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @param pos 
+ * @param buffer 
+ * @param size 
+ * @return int 
+ */
+int adc_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size)
+{
+
+    if(dev->oflag & DEVICE_OFLAG_STREAM_RX)
+    {
+        while (ADC_Get_FIFO_Count() == 0);
+        do
+        {
+            uint32_t regVal = ADC_Read_FIFO();
+            if (regVal)
+            {
+                ADC_Result_Type *result = (ADC_Result_Type *)buffer;
+                ADC_Parse_Result(®Val, size, result);
+            }
+        } while (ADC_Get_FIFO_Count() != 0);
+
+    }
+    return 0;
+}
+/**
+ * @brief 
+ * 
+ * @param index 
+ * @param name 
+ * @param flag 
+ * @param adc_user_cfg 
+ * @return int 
+ */
+int adc_register(enum adc_index_type index, const char *name, uint16_t flag, adc_user_cfg_t *adc_user_cfg)
+{
+    struct device *dev;
+
+    if (ADC_MAX_INDEX == 0)
+        return -DEVICE_EINVAL;
+
+    dev = &(adcx_device[index].parent);
+
+    dev->open = adc_open;
+    dev->close = adc_close;
+    dev->control = adc_control;
+    dev->write = NULL;
+    dev->read = adc_read;
+
+    dev->status = DEVICE_UNREGISTER;
+    dev->type = DEVICE_CLASS_ADC;
+    dev->handle = adc_user_cfg;
+
+    return device_register(dev, name, flag);
+}
diff --git a/drivers/bl702_driver/hal_drv/src/hal_camera.c b/drivers/bl702_driver/hal_drv/src/hal_camera.c
new file mode 100644
index 00000000..f3850052
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/src/hal_camera.c
@@ -0,0 +1,1874 @@
+/**
+ * @file hal_camera.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_camera.h"
+#include "bl702_i2c.h"
+#include "bl702_gpio.h"
+#include "bl702_glb.h"
+#include "bl702_psram.h"
+#include "bl702_l1c.h"
+#include "bl702_timer.h"
+
+/** @addtogroup  Image_Sensor_Driver
+ *  @{
+ */
+
+/** @addtogroup  IMAGE_SENSOR
+ *  @{
+ */
+
+/** @defgroup  IMAGE_SENSOR_Private_Macros
+ *  @{
+ */
+#define BFLB_EXTPSRAM_CLK_GPIO GLB_GPIO_PIN_27
+#define BFLB_EXTPSRAM_CS_GPIO GLB_GPIO_PIN_17
+#define BFLB_EXTPSRAM_DATA0_GPIO GLB_GPIO_PIN_28
+#define BFLB_EXTPSRAM_DATA1_GPIO GLB_GPIO_PIN_24
+#define BFLB_EXTPSRAM_DATA2_GPIO GLB_GPIO_PIN_23
+#define BFLB_EXTPSRAM_DATA3_GPIO GLB_GPIO_PIN_26
+#if (IMAGE_SENSOR_USE == IMAGE_SENSOR_BF2013)
+#define I2C_CAMERA_ADDR 0x6E
+#define BF2013_ID_MSB 0xFC
+#define BF2013_ID_LSB 0xFD
+#elif (IMAGE_SENSOR_USE == IMAGE_SENSOR_GC0308)
+#define I2C_CAMERA_ADDR 0x21
+#define GC0308_ID 0x00
+#endif
+
+void ClkOutInit(void)
+{
+    uint8_t CLKPins[] = {GLB_GPIO_PIN_9};
+    GLB_Set_I2S_CLK(ENABLE, GLB_I2S_OUT_REF_CLK_NONE);
+    PDS_Set_Audio_PLL_Freq(AUDIO_PLL_24576000_HZ);
+    GLB_GPIO_Func_Init(0, CLKPins, sizeof(CLKPins) / sizeof(CLKPins[0]));
+    GLB_Set_Chip_Out_1_CLK_Sel(GLB_CHIP_CLK_OUT_I2S_REF_CLK);
+}
+
+CAM_CFG_Type cameraCfg =
+    {
+        .swMode = CAM_SW_MODE_AUTO,
+        .swIntCnt = 0,
+        .frameMode = CAM_INTERLEAVE_MODE,
+#if (YUV_USE == 1)
+        .yuvMode = CAM_YUV422,
+#else
+        .yuvMode = CAM_YUV400_ODD,
+#endif
+        .linePol = CAM_LINE_ACTIVE_POLARITY_HIGH,
+        .framePol = CAM_FRAME_ACTIVE_POLARITY_HIGH,
+        .camSensorMode = CAM_SENSOR_MODE_V_AND_H,
+        .burstType = CAM_BURST_TYPE_INCR16,
+        .waitCount = 0x40,
+        .memStart0 = MJPEG_READ_ADDR,
+        .memSize0 = CAMERA_BUFFER_SIZE_WHEN_MJPEG,
+        .frameSize0 = CAMERA_FRAME_SIZE,
+        .memStart1 = 0,
+        .memSize1 = 0,
+        .frameSize1 = 0,
+};
+
+MJPEG_CFG_Type mjpegCfg =
+    {
+        .burst = MJPEG_BURST_INCR16,
+        .quality = 10,
+#if (YUV_USE == 1)
+        .yuv = MJPEG_YUV422_INTERLEAVE,
+#else
+        .yuv = MJPEG_YUV400,
+#endif
+        .waitCount = 0x400,
+        .bufferMjpeg = MJPEG_WRITE_ADDR,
+        .sizeMjpeg = MJPEG_WRITE_SIZE,
+        .bufferCamYY = MJPEG_READ_ADDR,
+        .sizeCamYY = MJPEG_READ_SIZE,
+        .bufferCamUV = 0,
+        .sizeCamUV = 0,
+        .resolutionX = CAMERA_RESOLUTION_X,
+        .resolutionY = CAMERA_RESOLUTION_Y,
+        .bitOrderEnable = ENABLE,
+        .evenOrderEnable = ENABLE,
+        .swapModeEnable = DISABLE,
+        .overStopEnable = ENABLE,
+        .reflectDmy = DISABLE,
+        .verticalDmy = DISABLE,
+        .horizationalDmy = DISABLE,
+};
+GLB_GPIO_Cfg_Type gpio_cfg0 = {
+    .gpioPin = GLB_GPIO_PIN_22,
+    .gpioFun = 11,
+    .gpioMode = GPIO_MODE_OUTPUT,
+    .pullType = GPIO_PULL_NONE,
+    .drive = 0,
+    .smtCtrl = 1};
+TIMER_CFG_Type timerCh0Cfg = {
+    TIMER_CH0,                /* timer channel 0 */
+    TIMER_CLKSRC_FCLK,        /* timer clock source:bus clock */
+    TIMER_PRELOAD_TRIG_COMP2, /* reaload on comaparator 2  */
+    TIMER_COUNT_PRELOAD,      /* preload when match occur */
+    0,                        /* clock division value */
+    230000,                   /* match value 0  */
+    260000,                   /* match value 1 */
+    14400000,                   /* match value 2 */
+    0,                   /* preload value */
+};
+void Test_H(void)
+{
+    GLB_GPIO_Write(gpio_cfg0.gpioPin, 1);
+}
+void Test_L(void)
+{
+    GLB_GPIO_Write(gpio_cfg0.gpioPin, 0);
+}
+BL_Err_Type Timer_Init(void)
+{
+    // TIMER_IntMask(timerCh0Cfg.timerCh, TIMER_INT_ALL, MASK);
+    // TIMER_Disable(timerCh0Cfg.timerCh);
+    // TIMER_Init(&timerCh0Cfg);
+    // TIMER_ClearIntStatus(timerCh0Cfg.timerCh, TIMER_COMP_ID_0);
+    // TIMER_ClearIntStatus(timerCh0Cfg.timerCh, TIMER_COMP_ID_1);
+    // TIMER_ClearIntStatus(timerCh0Cfg.timerCh, TIMER_COMP_ID_2);
+    // TIMER_IntMask(timerCh0Cfg.timerCh, TIMER_INT_COMP_0, UNMASK);
+    // Timer_Int_Callback_Install(timerCh0Cfg.timerCh, TIMER_INT_COMP_0, &Timer_Match0_Cbf);
+    // NVIC_ClearPendingIRQ((IRQn_Type)(timerCh0Cfg.timerCh + TIMER_CH0_IRQn));
+    // NVIC_EnableIRQ((IRQn_Type)(timerCh0Cfg.timerCh + TIMER_CH0_IRQn));
+    // TIMER_Enable(timerCh0Cfg.timerCh);
+
+    GLB_GPIO_Write(gpio_cfg0.gpioPin, 0);
+    GLB_GPIO_Init(&gpio_cfg0);
+    GLB_GPIO_OUTPUT_Enable(gpio_cfg0.gpioPin);
+
+    return SUCCESS;
+}
+
+static const uint8_t sensorRegList[][2] =
+    {
+#if (IMAGE_SENSOR_USE == IMAGE_SENSOR_BF2013)
+        {0x12, 0x80},
+        {0x67, 0x00},
+        {0x68, 0x00},
+        //{0xb9, 0x80},//use Test pattern
+        //{0x69,0x20},
+        {0x3a, 0x02},
+        {0x09, 0x01},
+        {0x15, 0x02},
+        {0x12, 0x00},
+        {0x1e, 0x00},
+        {0x13, 0x00},
+        {0x01, 0x14},
+        {0x02, 0x21},
+        {0x8c, 0x02},
+        {0x8d, 0x64},
+        {0x87, 0x18},
+        {0x13, 0x07},
+        //{0x11,0x80},//pclk=mclk
+        {0x11, 0x30}, //pclk=mclk/8
+        {0x2b, 0x20},
+        {0x92, 0x40},
+        {0x9d, 0x99},
+        {0x06, 0xe0},
+        {0x29, 0x54},
+        {0xeb, 0x30},
+        {0xbb, 0x20},
+        {0xf5, 0x21},
+        {0xe1, 0x3c},
+        {0x16, 0x01},
+        {0xe0, 0x0b},
+        {0x2f, 0xf6},
+        {0x33, 0x20},
+        {0x34, 0x08},
+        {0x35, 0x50},
+        {0x65, 0x4a},
+        {0x66, 0x50},
+        {0x36, 0x05},
+        {0x37, 0xf6},
+        {0x38, 0x46},
+        {0x9b, 0xf6},
+        {0x9c, 0x46},
+        {0xbc, 0x01},
+        {0xbd, 0xf6},
+        {0xbe, 0x46},
+        {0x82, 0x14},
+        {0x83, 0x23},
+        {0x9a, 0x23},
+        {0x70, 0x6f},
+        {0x72, 0x3f},
+        {0x73, 0x3f},
+        {0x74, 0x27},
+        {0x77, 0x90},
+        {0x79, 0x48},
+        {0x7a, 0x1e},
+        {0x7b, 0x30},
+        {0x84, 0x1a},
+        {0x85, 0x20},
+        {0x89, 0x02},
+        {0x8a, 0x64},
+        {0x86, 0x30},
+        {0x96, 0xa6},
+        {0x97, 0x0c},
+        {0x98, 0x18},
+        {0x80, 0x55},
+        {0x24, 0x70},
+        {0x25, 0x80},
+        {0x94, 0x0a},
+        {0x1f, 0x20},
+        {0x22, 0x20},
+        {0x26, 0x20},
+        {0x56, 0x40},
+        {0x61, 0xd3},
+        {0x79, 0x48},
+        {0x3b, 0x60},
+        {0x3c, 0x20},
+        {0x39, 0x80},
+        {0x3f, 0xb0},
+        {0x39, 0x80},
+        {0x40, 0x58},
+        {0x41, 0x54},
+        {0x42, 0x4e},
+        {0x43, 0x44},
+        {0x44, 0x3e},
+        {0x45, 0x39},
+        {0x46, 0x35},
+        {0x47, 0x31},
+        {0x48, 0x2e},
+        {0x49, 0x2b},
+        {0x4b, 0x29},
+        {0x4c, 0x27},
+        {0x4e, 0x23},
+        {0x4f, 0x20},
+        {0x50, 0x1e},
+        {0x51, 0x05},
+        {0x52, 0x10},
+        {0x53, 0x0b},
+        {0x54, 0x15},
+        {0x57, 0x87},
+        {0x58, 0x72},
+        {0x59, 0x5f},
+        {0x5a, 0x7e},
+        {0x5b, 0x1f},
+        {0x5c, 0x0e},
+        {0x5d, 0x95},
+        {0x60, 0x28},
+        {0xb0, 0xe0},
+        {0xb1, 0xc0},
+        {0xb2, 0xb0},
+        {0xb3, 0x88},
+        {0x6a, 0x01},
+        {0x23, 0x66},
+        {0xa0, 0x03},
+        {0xa1, 0x31},
+        {0xa2, 0x0b},
+        {0xa3, 0x26},
+        {0xa4, 0x05},
+        {0xa5, 0x25},
+        {0xa6, 0x06},
+        {0xa7, 0x80},
+        {0xa8, 0x80},
+        {0xa9, 0x20},
+        {0xaa, 0x20},
+        {0xab, 0x20},
+        {0xac, 0x3c},
+        {0xad, 0xf0},
+        {0xc8, 0x18},
+        {0xc9, 0x20},
+        {0xca, 0x17},
+        {0xcb, 0x1f},
+        {0xaf, 0x00},
+        {0xc5, 0x18},
+        {0xc6, 0x00},
+        {0xc7, 0x20},
+        {0xae, 0x80},
+        {0xcc, 0x40},
+        {0xcd, 0x58},
+        {0xee, 0x4c},
+        {0x8e, 0x07},
+        {0x8f, 0x79},
+
+#elif (IMAGE_SENSOR_USE == IMAGE_SENSOR_GC0308)
+        {0xfe, 0x80},
+        {0xfe, 0x00}, //set page0
+        {0xd2, 0x10}, //close AEC
+        {0x22, 0x55}, //close AWB
+        {0x5a, 0x56},
+        {0x5b, 0x40},
+        {0x5c, 0x4a},
+        {0x22, 0x57}, //Open AWB
+#if 0
+    //config for 39 FPS
+    {0x01 , 0x6a},//HB 106
+    //{0x02 , 0x70},//VB 112
+    {0x02 , 0x0c},//change VB from 112 to 12
+    {0x0f , 0x00},
+    {0xe2 , 0x00},//anti-flicker step [11:8]
+    {0xe3 , 0x96},//anti-flicker step [7:0]
+    {0xe4 , 0x01},//exp level 1  50.00fps or 20ms
+    {0xe5 , 0x2c},
+    {0xe6 , 0x03},//exp level 2  16.67fps
+    {0xe7 , 0x84},
+    {0xe8 , 0x04},//exp level 3  12.5fps
+    {0xe9 , 0xb0},
+    {0xea , 0x09},//exp level 4  6.00fps
+    {0xeb , 0xc4},
+#elif 0
+        //config for 33.33 FPS
+        {0x01, 0x6a}, //HB 106
+        {0x02, 0x52}, //VB 82
+        {0x0f, 0x00},
+        {0xe2, 0x00}, //anti-flicker step [11:8]
+        {0xe3, 0x96}, //anti-flicker step [7:0]
+        {0xe4, 0x01}, //exp level 1  33.33fps or 30ms
+        {0xe5, 0x2c},
+        {0xe6, 0x03}, //exp level 2  16.67fps
+        {0xe7, 0x84},
+        {0xe8, 0x04}, //exp level 3  12.5fps
+        {0xe9, 0xb0},
+        {0xea, 0x09}, //exp level 4  6.00fps
+        {0xeb, 0xc4},
+#else
+        //config for 25 FPS
+        {0x01, 0x6a}, //HB 106
+        //{0x02 , 0x70},//VB 112
+        {0x02, 0xe8}, //change VB from 112 to 232
+        {0x0f, 0x00},
+        {0xe2, 0x00}, //anti-flicker step [11:8]
+        {0xe3, 0x96}, //anti-flicker step [7:0]
+        {0xe4, 0x02}, //exp level 1  25.00fps or 40ms
+        {0xe5, 0x58},
+        {0xe6, 0x03}, //exp level 2  16.67fps
+        {0xe7, 0x84},
+        {0xe8, 0x04}, //exp level 3  12.5fps
+        {0xe9, 0xb0},
+        {0xea, 0x09}, //exp level 4  6.00fps
+        {0xeb, 0xc4},
+#endif
+        {0xec, 0x00}, //select max exposure level 1 - highest fps
+        {0x05, 0x00},
+        {0x06, 0x00},
+        {0x07, 0x00},
+        {0x08, 0x00},
+        {0x09, 0x01},
+        {0x0a, 0xe8},
+        //{0x0a , 0x70},//change win_height from 488 to 368
+        {0x0b, 0x02},
+        {0x0c, 0x88}, //win_width 648
+        {0x0d, 0x02},
+        {0x0e, 0x02},
+        {0x10, 0x22},
+        {0x11, 0xfd},
+        {0x12, 0x2a},
+        {0x13, 0x00},
+        //{0x14 , 0x10},
+        {0x14, 0x13}, //enable mirror & flip
+        //-------------H_V_Switch(4)---------------//
+        /*
+    1://normal
+    {0x14 , 0x10},
+    2://IMAGE_H_MIRROR
+    {0x14 , 0x11},
+    3://IMAGE_V_MIRROR
+    {0x14 , 0x12},
+    4://IMAGE_HV_MIRROR
+    {0x14 , 0x13},*/
+        {0x15, 0x0a},
+        {0x16, 0x05},
+        {0x17, 0x01},
+        {0x18, 0x44},
+        {0x19, 0x44},
+        {0x1a, 0x1e},
+        {0x1b, 0x00},
+        {0x1c, 0xc1},
+        {0x1d, 0x08},
+        {0x1e, 0x60},
+        {0x1f, 0x17},
+        {0x20, 0xff},
+        {0x21, 0xf8},
+        {0x22, 0x57},
+        {0x24, 0xa0}, //Cb Y Cr Y
+        {0x25, 0x0f},
+        //output sync_mode
+        //{0x26 , 0x02},//0x03  20101016 zhj
+        {0x26, 0x03}, //sync mode, high high
+        {0x2f, 0x01},
+        {0x30, 0xf7},
+        {0x31, 0x50},
+        {0x32, 0x00},
+        {0x39, 0x04},
+        {0x3a, 0x18},
+        {0x3b, 0x20},
+        {0x3c, 0x00},
+        {0x3d, 0x00},
+        {0x3e, 0x00},
+        {0x3f, 0x00},
+        {0x50, 0x10},
+        {0x53, 0x82},
+        {0x54, 0x80},
+        {0x55, 0x80},
+        {0x56, 0x82},
+        {0x8b, 0x40},
+        {0x8c, 0x40},
+        {0x8d, 0x40},
+        {0x8e, 0x2e},
+        {0x8f, 0x2e},
+        {0x90, 0x2e},
+        {0x91, 0x3c},
+        {0x92, 0x50},
+        {0x5d, 0x12},
+        {0x5e, 0x1a},
+        {0x5f, 0x24},
+        {0x60, 0x07},
+        {0x61, 0x15},
+        {0x62, 0x08},
+        {0x64, 0x03},
+        {0x66, 0xe8},
+        {0x67, 0x86},
+        {0x68, 0xa2},
+        {0x69, 0x18},
+        {0x6a, 0x0f},
+        {0x6b, 0x00},
+        {0x6c, 0x5f},
+        {0x6d, 0x8f},
+        {0x6e, 0x55},
+        {0x6f, 0x38},
+        {0x70, 0x15},
+        {0x71, 0x33},
+        {0x72, 0xdc},
+        {0x73, 0x80},
+        {0x74, 0x02},
+        {0x75, 0x3f},
+        {0x76, 0x02},
+        {0x77, 0x36},
+        {0x78, 0x88},
+        {0x79, 0x81},
+        {0x7a, 0x81},
+        {0x7b, 0x22},
+        {0x7c, 0xff},
+        {0x93, 0x48},
+        {0x94, 0x00},
+        {0x95, 0x05},
+        {0x96, 0xe8},
+        {0x97, 0x40},
+        {0x98, 0xf0},
+        {0xb1, 0x38},
+        {0xb2, 0x38},
+        {0xbd, 0x38},
+        {0xbe, 0x36},
+#if 1
+        {0xd0, 0xc9},
+        {0xd1, 0x10},
+        {0xd3, 0x80},
+        {0xd5, 0xf2},
+        {0xd6, 0x16},
+#else
+        //default AEC setting
+        {0xd0, 0xca},
+        {0xd1, 0xa1},
+        {0xd3, 0xa0},
+        {0xd5, 0xf2},
+        {0xd6, 0x18},
+#endif
+        {0xdb, 0x92},
+        {0xdc, 0xa5},
+        {0xdf, 0x23},
+        {0xd9, 0x00},
+        {0xda, 0x00},
+        {0xe0, 0x09},
+        {0xed, 0x04},
+#if 0
+    //default max dgain
+    {0xee , 0xa0},
+    {0xef , 0x40},
+#else
+        //increased max dgain
+        {0xee, 0xf0},
+        {0xef, 0x60},
+#endif
+        {0x80, 0x03},
+        {0x80, 0x03},
+        {0x9F, 0x10},
+        {0xA0, 0x20},
+        {0xA1, 0x38},
+        {0xA2, 0x4E},
+        {0xA3, 0x63},
+        {0xA4, 0x76},
+        {0xA5, 0x87},
+        {0xA6, 0xA2},
+        {0xA7, 0xB8},
+        {0xA8, 0xCA},
+        {0xA9, 0xD8},
+        {0xAA, 0xE3},
+        {0xAB, 0xEB},
+        {0xAC, 0xF0},
+        {0xAD, 0xF8},
+        {0xAE, 0xFD},
+        {0xAF, 0xFF},
+        /*
+    GC0308_GAMMA_Select,
+    1://smallest gamma curve
+    {0x9F , 0x0B},
+    {0xA0 , 0x16},
+    {0xA1 , 0x29},
+    {0xA2 , 0x3C},
+    {0xA3 , 0x4F},
+    {0xA4 , 0x5F},
+    {0xA5 , 0x6F},
+    {0xA6 , 0x8A},
+    {0xA7 , 0x9F},
+    {0xA8 , 0xB4}, 
+    {0xA9 , 0xC6},
+    {0xAA , 0xD3},
+    {0xAB , 0xDD},
+    {0xAC , 0xE5},
+    {0xAD , 0xF1},
+    {0xAE , 0xFA},
+    {0xAF , 0xFF},
+    2:
+    {0x9F , 0x0E},
+    {0xA0 , 0x1C},
+    {0xA1 , 0x34},
+    {0xA2 , 0x48},
+    {0xA3 , 0x5A},
+    {0xA4 , 0x6B},
+    {0xA5 , 0x7B},
+    {0xA6 , 0x95},
+    {0xA7 , 0xAB},
+    {0xA8 , 0xBF},
+    {0xA9 , 0xCE},
+    {0xAA , 0xD9},
+    {0xAB , 0xE4},
+    {0xAC , 0xEC},
+    {0xAD , 0xF7},
+    {0xAE , 0xFD},
+    {0xAF , 0xFF},
+    3:
+    {0x9F , 0x10},
+    {0xA0 , 0x20},
+    {0xA1 , 0x38},
+    {0xA2 , 0x4E},
+    {0xA3 , 0x63},
+    {0xA4 , 0x76},
+    {0xA5 , 0x87},
+    {0xA6 , 0xA2},
+    {0xA7 , 0xB8},
+    {0xA8 , 0xCA},
+    {0xA9 , 0xD8},
+    {0xAA , 0xE3},
+    {0xAB , 0xEB},
+    {0xAC , 0xF0},
+    {0xAD , 0xF8},
+    {0xAE , 0xFD},
+    {0xAF , 0xFF},
+    4:
+    {0x9F , 0x14},
+    {0xA0 , 0x28},
+    {0xA1 , 0x44},
+    {0xA2 , 0x5D},
+    {0xA3 , 0x72},
+    {0xA4 , 0x86},
+    {0xA5 , 0x95},
+    {0xA6 , 0xB1},
+    {0xA7 , 0xC6},
+    {0xA8 , 0xD5},
+    {0xA9 , 0xE1},
+    {0xAA , 0xEA},
+    {0xAB , 0xF1},
+    {0xAC , 0xF5},
+    {0xAD , 0xFB},
+    {0xAE , 0xFE},
+    {0xAF , 0xFF},
+    5://largest gamma curve
+    {0x9F , 0x15},
+    {0xA0 , 0x2A},
+    {0xA1 , 0x4A},
+    {0xA2 , 0x67},
+    {0xA3 , 0x79},
+    {0xA4 , 0x8C},
+    {0xA5 , 0x9A},
+    {0xA6 , 0xB3},
+    {0xA7 , 0xC5},
+    {0xA8 , 0xD5},
+    {0xA9 , 0xDF},
+    {0xAA , 0xE8},
+    {0xAB , 0xEE},
+    {0xAC , 0xF3},
+    {0xAD , 0xFA},
+    {0xAE , 0xFD},
+    {0xAF , 0xFF},
+    */
+        //-----------GAMMA Select End--------------//
+        {0xc0, 0x00},
+        {0xc1, 0x10},
+        {0xc2, 0x1C},
+        {0xc3, 0x30},
+        {0xc4, 0x43},
+        {0xc5, 0x54},
+        {0xc6, 0x65},
+        {0xc7, 0x75},
+        {0xc8, 0x93},
+        {0xc9, 0xB0},
+        {0xca, 0xCB},
+        {0xcb, 0xE6},
+        {0xcc, 0xFF},
+        {0xf0, 0x02},
+        {0xf1, 0x01},
+        {0xf2, 0x01},
+        {0xf3, 0x30},
+        {0xf9, 0x9f},
+        {0xfa, 0x78},
+        //{0xfa , 0x58},//Change measure window Y1 from 480 to 352
+        //-------------------------------------------------
+        {0xfe, 0x01}, // set page1
+        {0x00, 0xf5},
+        {0x02, 0x1a},
+        {0x0a, 0xa0},
+        {0x0b, 0x60},
+        {0x0c, 0x08},
+        {0x0e, 0x4c},
+        {0x0f, 0x39},
+        {0x11, 0x3f},
+        {0x12, 0x72},
+        {0x13, 0x13},
+        {0x14, 0x42},
+        {0x15, 0x43},
+        {0x16, 0xc2},
+        {0x17, 0xa8},
+        {0x18, 0x18},
+        {0x19, 0x40},
+        {0x1a, 0xd0},
+        {0x1b, 0xf5},
+        {0x70, 0x40},
+        {0x71, 0x58},
+        {0x72, 0x30},
+        {0x73, 0x48},
+        {0x74, 0x20},
+        {0x75, 0x60},
+        {0x77, 0x20},
+        {0x78, 0x32},
+        {0x30, 0x03},
+        {0x31, 0x40},
+        {0x32, 0xe0},
+        {0x33, 0xe0},
+        {0x34, 0xe0},
+        {0x35, 0xb0},
+        {0x36, 0xc0},
+        {0x37, 0xc0},
+        {0x38, 0x04},
+        {0x39, 0x09},
+        {0x3a, 0x12},
+        {0x3b, 0x1C},
+        {0x3c, 0x28},
+        {0x3d, 0x31},
+        {0x3e, 0x44},
+        {0x3f, 0x57},
+        {0x40, 0x6C},
+        {0x41, 0x81},
+        {0x42, 0x94},
+        {0x43, 0xA7},
+        {0x44, 0xB8},
+        {0x45, 0xD6},
+        {0x46, 0xEE},
+        {0x47, 0x0d},
+        {0xfe, 0x00}, //set page0
+        //-----------Update the registers 2010/07/06-------------//
+        //Registers of Page0
+        {0xfe, 0x00}, //set page0
+        {0x10, 0x26},
+        {0x11, 0x0d}, //fd,modified by mormo 2010/07/06
+        {0x1a, 0x2a}, //1e,modified by mormo 2010/07/06
+        {0x1c, 0x49}, //c1,modified by mormo 2010/07/06
+        {0x1d, 0x9a}, //08,modified by mormo 2010/07/06
+        {0x1e, 0x61}, //60,modified by mormo 2010/07/06
+        {0x3a, 0x20},
+        {0x50, 0x14}, //10,modified by mormo 2010/07/06
+        {0x53, 0x80},
+        {0x56, 0x80},
+        {0x8b, 0x20}, //LSC
+        {0x8c, 0x20},
+        {0x8d, 0x20},
+        {0x8e, 0x14},
+        {0x8f, 0x10},
+        {0x90, 0x14},
+        {0x94, 0x02},
+        {0x95, 0x07},
+        {0x96, 0xe0},
+        {0xb1, 0x40}, //YCPT
+        {0xb2, 0x40},
+        {0xb3, 0x40},
+        {0xb6, 0xe0},
+        //{0xd0 , 0xcb},//AECT    c9,modifed by mormo 2010/07/06
+        //{0xd3 , 0x48},//80,modified by mormor 2010/07/06
+        {0xf2, 0x02},
+        //{0xf7 , 0x12},
+        //{0xf8 , 0x0a},
+        //Registers
+        {0xfe, 0x01}, // set page1
+        {0x02, 0x20},
+        {0x04, 0x10},
+        {0x05, 0x08},
+        {0x06, 0x20},
+        {0x08, 0x0a},
+        {0x0e, 0x44},
+        {0x0f, 0x32},
+        {0x10, 0x41},
+        {0x11, 0x37},
+        {0x12, 0x22},
+        {0x13, 0x19},
+        {0x14, 0x44},
+        {0x15, 0x44},
+        {0x19, 0x50},
+        {0x1a, 0xd8},
+        {0x32, 0x10},
+        {0x35, 0x00},
+        {0x36, 0x80},
+        {0x37, 0x00},
+        //-----------Update the registers end---------//
+        {0xfe, 0x00}, //set page0
+        {0xd2, 0x90},
+#endif
+};
+
+SPI_Psram_Cfg_Type apMemory1604 = {
+    .readIdCmd = 0x9F,
+    .readIdDmyClk = 0,
+    .burstToggleCmd = 0xC0,
+    .resetEnableCmd = 0x66,
+    .resetCmd = 0x99,
+    .enterQuadModeCmd = 0x35,
+    .exitQuadModeCmd = 0xF5,
+    .readRegCmd = 0xB5,
+    .readRegDmyClk = 1,
+    .writeRegCmd = 0xB1,
+    .readCmd = 0x03,
+    .readDmyClk = 0,
+    .fReadCmd = 0x0B,
+    .fReadDmyClk = 1,
+    .fReadQuadCmd = 0xEB,
+    .fReadQuadDmyClk = 3,
+    .writeCmd = 0x02,
+    .quadWriteCmd = 0x38,
+    .pageSize = 512,
+    .ctrlMode = PSRAM_SPI_CTRL_MODE,
+    .driveStrength = PSRAM_DRIVE_STRENGTH_50_OHMS,
+    .burstLength = PSRAM_BURST_LENGTH_512_BYTES,
+};
+
+SF_Ctrl_Cmds_Cfg cmdsCfg = {
+    .cmdsEn = ENABLE,
+    .burstToggleEn = ENABLE,
+    .wrapModeEn = DISABLE,
+    .wrapLen = SF_CTRL_WRAP_LEN_512,
+};
+
+SF_Ctrl_Psram_Cfg sfCtrlPsramCfg = {
+    .owner = SF_CTRL_OWNER_SAHB,
+    .padSel = SF_CTRL_PAD_SEL_DUAL_CS_SF2,
+    .bankSel = SF_CTRL_SEL_PSRAM,
+    .psramRxClkInvertSrc = ENABLE,
+    .psramRxClkInvertSel = ENABLE,
+    .psramDelaySrc = ENABLE,
+    .psramClkDelay = 0,
+};
+
+/*@} end of group IMAGE_SENSOR_Private_Variables */
+
+/** @defgroup  IMAGE_SENSOR_Global_Variables
+ *  @{
+ */
+
+/*@} end of group IMAGE_SENSOR_Global_Variables */
+
+/** @defgroup  IMAGE_SENSOR_Private_Fun_Declaration
+ *  @{
+ */
+static void CAM_GPIO_Init(void);
+static void I2C_GPIO_Init(void);
+static BL_Err_Type CAM_Write_Byte8(uint8_t data, uint8_t cmd);
+static uint8_t CAM_Read_Byte8(uint8_t cmd);
+static BL_Err_Type CAM_Read_ID(void);
+static BL_Err_Type CAM_Reg_Config(void);
+
+/*@} end of group IMAGE_SENSOR_Private_Fun_Declaration */
+
+/** @defgroup  IMAGE_SENSOR_Private_Functions
+ *  @{
+ */
+
+/****************************************************************************/ /**
+ * @brief  CAMERA GPIO Initialization
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+static void CAM_GPIO_Init(void)
+{
+    GLB_GPIO_Cfg_Type cfg;
+
+    cfg.drive = 0;
+    cfg.smtCtrl = 1;
+    cfg.gpioPin = GLB_GPIO_PIN_0;
+    cfg.gpioFun = GPIO0_FUN_PIX_CLK;
+    cfg.gpioMode = GPIO_MODE_INPUT;
+    cfg.pullType = GPIO_PULL_NONE;
+    GLB_GPIO_Init(&cfg);
+
+    cfg.drive = 0;
+    cfg.smtCtrl = 1;
+    cfg.gpioPin = GLB_GPIO_PIN_1;
+    cfg.gpioFun = GPIO1_FUN_FRAME_VLD;
+    cfg.gpioMode = GPIO_MODE_INPUT;
+    cfg.pullType = GPIO_PULL_NONE;
+    GLB_GPIO_Init(&cfg);
+
+    cfg.drive = 0;
+    cfg.smtCtrl = 1;
+    cfg.gpioPin = GLB_GPIO_PIN_2;
+    cfg.gpioFun = GPIO2_FUN_LINE_VLD;
+    cfg.gpioMode = GPIO_MODE_INPUT;
+    cfg.pullType = GPIO_PULL_NONE;
+    GLB_GPIO_Init(&cfg);
+
+    cfg.drive = 0;
+    cfg.smtCtrl = 1;
+    cfg.gpioPin = GLB_GPIO_PIN_3;
+    cfg.gpioFun = GPIO3_FUN_PIX_DAT0;
+    cfg.gpioMode = GPIO_MODE_INPUT;
+    cfg.pullType = GPIO_PULL_NONE;
+    GLB_GPIO_Init(&cfg);
+
+    cfg.drive = 0;
+    cfg.smtCtrl = 1;
+    cfg.gpioPin = GLB_GPIO_PIN_4;
+    cfg.gpioFun = GPIO4_FUN_PIX_DAT1;
+    cfg.gpioMode = GPIO_MODE_INPUT;
+    cfg.pullType = GPIO_PULL_NONE;
+    GLB_GPIO_Init(&cfg);
+
+    cfg.drive = 0;
+    cfg.smtCtrl = 1;
+    cfg.gpioPin = GLB_GPIO_PIN_5;
+    cfg.gpioFun = GPIO5_FUN_PIX_DAT2;
+    cfg.gpioMode = GPIO_MODE_INPUT;
+    cfg.pullType = GPIO_PULL_NONE;
+    GLB_GPIO_Init(&cfg);
+
+    cfg.drive = 0;
+    cfg.smtCtrl = 1;
+    cfg.gpioPin = GLB_GPIO_PIN_6;
+    cfg.gpioFun = GPIO6_FUN_PIX_DAT3;
+    cfg.gpioMode = GPIO_MODE_INPUT;
+    cfg.pullType = GPIO_PULL_NONE;
+    GLB_GPIO_Init(&cfg);
+
+    cfg.drive = 0;
+    cfg.smtCtrl = 1;
+    cfg.gpioPin = GLB_GPIO_PIN_12;
+    cfg.gpioFun = GPIO12_FUN_PIX_DAT4;
+    cfg.gpioMode = GPIO_MODE_INPUT;
+    cfg.pullType = GPIO_PULL_NONE;
+    GLB_GPIO_Init(&cfg);
+
+    cfg.drive = 0;
+    cfg.smtCtrl = 1;
+    cfg.gpioPin = GLB_GPIO_PIN_29;
+    cfg.gpioFun = GPIO29_FUN_PIX_DAT5;
+    cfg.gpioMode = GPIO_MODE_INPUT;
+    cfg.pullType = GPIO_PULL_NONE;
+    GLB_GPIO_Init(&cfg);
+
+    cfg.drive = 0;
+    cfg.smtCtrl = 1;
+    cfg.gpioPin = GLB_GPIO_PIN_30;
+    cfg.gpioFun = GPIO30_FUN_PIX_DAT6;
+    cfg.gpioMode = GPIO_MODE_INPUT;
+    cfg.pullType = GPIO_PULL_NONE;
+    GLB_GPIO_Init(&cfg);
+
+    cfg.drive = 0;
+    cfg.smtCtrl = 1;
+    cfg.gpioPin = GLB_GPIO_PIN_31;
+    cfg.gpioFun = GPIO31_FUN_PIX_DAT7;
+    cfg.gpioMode = GPIO_MODE_INPUT;
+    cfg.pullType = GPIO_PULL_NONE;
+    GLB_GPIO_Init(&cfg);
+
+    cfg.drive = 1;
+    cfg.smtCtrl = 1;
+    cfg.gpioPin = GLB_GPIO_PIN_10;
+    cfg.gpioFun = GPIO10_FUN_CAM_REF_CLK;
+    cfg.gpioMode = GPIO_MODE_OUTPUT;
+    cfg.pullType = GPIO_PULL_NONE;
+    //GLB_GPIO_Init(&cfg);
+}
+
+/****************************************************************************/ /**
+ * @brief  Dump image sensor register while is set
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Image_Sensor_Dump_Register(void)
+{
+    uint32_t i;
+
+    for (i = 0; i < sizeof(sensorRegList) / sizeof(sensorRegList[0]); i++)
+    {
+        MSG("reg[%02x]: %02x\n", sensorRegList[i][0], CAM_Read_Byte8(sensorRegList[i][0]));
+    }
+}
+
+/****************************************************************************/ /**
+ * @brief  I2C GPIO Initialization
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+static void I2C_GPIO_Init(void)
+{
+    uint8_t i;
+    GLB_GPIO_Cfg_Type cfg;
+    uint8_t gpiopins[2];
+    uint8_t gpiofuns[2];
+    uint8_t gpioMode[2];
+
+    cfg.gpioMode = GPIO_MODE_AF;
+    cfg.pullType = GPIO_PULL_UP;
+    cfg.drive = 1;
+    cfg.smtCtrl = 1;
+    cfg.gpioMode = GPIO_MODE_OUTPUT;
+
+    gpiopins[0] = GLB_GPIO_PIN_16;
+    gpiopins[1] = GLB_GPIO_PIN_11;
+    gpiofuns[0] = GPIO16_FUN_I2C0_SCL;
+    gpiofuns[1] = GPIO11_FUN_I2C0_SDA;
+    gpioMode[0] = GPIO_MODE_AF;
+    gpioMode[1] = GPIO_MODE_AF;
+
+    for (i = 0; i < sizeof(gpiopins) / sizeof(gpiopins[0]); i++)
+    {
+        cfg.gpioPin = gpiopins[i];
+        cfg.gpioFun = gpiofuns[i];
+        cfg.gpioMode = gpioMode[i];
+        GLB_GPIO_Init(&cfg);
+    }
+}
+
+/****************************************************************************/ /**
+ * @brief  PSRAM GPIO Initialization
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+static void ATTR_TCM_SECTION SF_Cfg_Init_Ext_Psram_Gpio(void)
+{
+    GLB_GPIO_Cfg_Type cfg;
+    uint8_t gpiopins[6];
+    uint8_t i = 0;
+
+    cfg.gpioMode = GPIO_MODE_AF;
+    cfg.pullType = GPIO_PULL_UP;
+    cfg.drive = 1;
+    cfg.smtCtrl = 1;
+    cfg.gpioFun = GPIO_FUN_FLASH_PSRAM;
+
+    gpiopins[0] = BFLB_EXTPSRAM_CLK_GPIO;
+    gpiopins[1] = BFLB_EXTPSRAM_CS_GPIO;
+    gpiopins[2] = BFLB_EXTPSRAM_DATA0_GPIO;
+    gpiopins[3] = BFLB_EXTPSRAM_DATA1_GPIO;
+    gpiopins[4] = BFLB_EXTPSRAM_DATA2_GPIO;
+    gpiopins[5] = BFLB_EXTPSRAM_DATA3_GPIO;
+
+    for (i = 0; i < sizeof(gpiopins); i++)
+    {
+        cfg.gpioPin = gpiopins[i];
+        if (i == 0 || i == 1)
+        {
+            /*flash clk and cs is output*/
+            cfg.gpioMode = GPIO_MODE_OUTPUT;
+        }
+        else
+        {
+            /*data are bidir*/
+            cfg.gpioMode = GPIO_MODE_AF;
+        }
+        GLB_GPIO_Init(&cfg);
+    }
+}
+
+/****************************************************************************/ /**
+ * @brief  I2C CAMERA Write 8 bits
+ *
+ * @param  data: Reg Value
+ * @param  cmd: Reg Addr
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+static BL_Err_Type CAM_Write_Byte8(uint8_t data, uint8_t cmd)
+{
+    uint8_t temp = data;
+    I2C_Transfer_Cfg tranCfg;
+
+    tranCfg.slaveAddr = I2C_CAMERA_ADDR;
+    tranCfg.stopEveryByte = DISABLE;
+    tranCfg.subAddrSize = 1;
+    tranCfg.subAddr = cmd;
+    tranCfg.dataSize = 1;
+    tranCfg.data = &temp;
+    return I2C_MasterSendBlocking(I2C0_ID, &tranCfg);
+}
+
+/****************************************************************************/ /**
+ * @brief  I2C CAMERA Read 8 bits
+ *
+ * @param  cmd: Reg Addr
+ *
+ * @return Reg Value
+ *
+*******************************************************************************/
+static uint8_t CAM_Read_Byte8(uint8_t cmd)
+{
+    uint8_t temp = 0;
+    I2C_Transfer_Cfg tranCfg;
+
+    tranCfg.slaveAddr = I2C_CAMERA_ADDR;
+    tranCfg.stopEveryByte = DISABLE;
+    tranCfg.subAddrSize = 1;
+    tranCfg.subAddr = cmd;
+    tranCfg.dataSize = 1;
+    tranCfg.data = &temp;
+    I2C_MasterReceiveBlocking(I2C0_ID, &tranCfg);
+
+    return temp;
+}
+
+/****************************************************************************/ /**
+ * @brief  CAMERA Read ID
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+static BL_Err_Type CAM_Read_ID(void)
+{
+    uint8_t buf[2] = {0};
+#if (IMAGE_SENSOR_USE == IMAGE_SENSOR_BF2013)
+    buf[0] = CAM_Read_Byte8(BF2013_ID_MSB);
+    bflb_platform_delay_ms(10);
+    buf[1] = CAM_Read_Byte8(BF2013_ID_LSB);
+
+    if (buf[0] == 0x37 && buf[1] == 0x03)
+    {
+        return SUCCESS;
+    }
+    else
+    {
+        return ERROR;
+    }
+#elif (IMAGE_SENSOR_USE == IMAGE_SENSOR_GC0308)
+    buf[0] = CAM_Read_Byte8(GC0308_ID);
+
+    if (buf[0] == 0x9b)
+    {
+        return SUCCESS;
+    }
+    else
+    {
+        return ERROR;
+    }
+#endif
+}
+
+/****************************************************************************/ /**
+ * @brief  CAMERA Reg Config
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+static BL_Err_Type CAM_Reg_Config(void)
+{
+    int i;
+
+    for (i = 0; i < sizeof(sensorRegList) / sizeof(sensorRegList[0]); i++)
+    {
+        if (CAM_Write_Byte8(sensorRegList[i][1], sensorRegList[i][0]) != SUCCESS)
+        {
+            return ERROR;
+        }
+        //if(i == 0){
+        bflb_platform_delay_ms(1);
+        //}
+    }
+    return SUCCESS;
+}
+
+/*@} end of group IMAGE_SENSOR_Private_Functions */
+
+/** @defgroup  IMAGE_SENSOR_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************/ /**
+ * @brief  PSRAM Config Initialization
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Image_Sensor_PSRAM_Init(void)
+{
+    uint8_t psramId[8] = {0};
+
+    GLB_Set_SF_CLK(1, GLB_SFLASH_CLK_72M, 1);
+    SF_Cfg_Init_Ext_Psram_Gpio();
+
+    Psram_Init(&apMemory1604, &cmdsCfg, &sfCtrlPsramCfg);
+    Psram_ReadId(&apMemory1604, psramId);
+    MSG("PSRAM ID: %02X %02X %02X %02X %02X %02X %02X %02X.\r\n",
+        psramId[0], psramId[1], psramId[2], psramId[3], psramId[4], psramId[5], psramId[6], psramId[7]);
+
+    Psram_Cache_Write_Set(&apMemory1604, SF_CTRL_QIO_MODE, DISABLE, ENABLE, ENABLE);
+    L1C_Cache_Enable_Set(0x0f);
+}
+
+/****************************************************************************/ /**
+ * @brief  Image sensor initialization
+ *
+ * @param  mjpegEn: Enable or disable mjpeg
+ * @param  camCfg: CAM configuration structure pointer
+ * @param  mjpegCfg: MJPEG configuration structure pointer
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type Image_Sensor_Init(BL_Fun_Type mjpegEn, CAM_CFG_Type *camCfg, MJPEG_CFG_Type *mjpegCfg)
+{
+    /* Gpio init */
+    CAM_GPIO_Init();
+    I2C_GPIO_Init();
+
+    /* Set clock */
+    GLB_AHB_Slave1_Clock_Gate(DISABLE, BL_AHB_SLAVE1_I2C);
+    GLB_AHB_Slave1_Clock_Gate(DISABLE, BL_AHB_SLAVE1_CAM);
+    GLB_AHB_Slave1_Clock_Gate(DISABLE, BL_AHB_SLAVE1_MJPEG);
+    GLB_Set_I2C_CLK(1, 9);
+    GLB_Set_CAM_CLK(ENABLE, GLB_CAM_CLK_DLL96M, 3);
+    GLB_SWAP_EMAC_CAM_Pin(GLB_EMAC_CAM_PIN_CAM);
+
+    if (CAM_Read_ID() != SUCCESS)
+    {
+        return ERROR;
+    }
+    if (CAM_Reg_Config() != SUCCESS)
+    {
+        return ERROR;
+    }
+    CAM_Disable();
+    MJPEG_Disable();
+
+    if (mjpegEn)
+    {
+        CAM_Init(camCfg);
+        MJPEG_Init(mjpegCfg);
+        MJPEG_Enable();
+    }
+    else
+    {
+        CAM_Init(camCfg);
+    }
+
+    CAM_Enable();
+
+    return SUCCESS;
+}
+
+/****************************************************************************/ /**
+ * @brief  Get one camera frame in interleave mode
+ *
+ * @param  pic: Pointer of picture start address
+ * @param  len: Length of picture
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type Image_Sensor_CAM_Get_Interleave(uint8_t **pic, uint32_t *len)
+{
+    CAM_Interleave_Frame_Info info;
+    BL702_MemSet(&info, 0, sizeof(info));
+
+    CAM_Interleave_Get_Frame_Info(&info);
+
+    if (info.validFrames == 0)
+    {
+        return ERROR;
+    }
+
+    *pic = (uint8_t *)(info.curFrameAddr);
+    *len = info.curFrameBytes;
+
+    return SUCCESS;
+}
+
+/****************************************************************************/ /**
+ * @brief  Get one camera frame in planar mode
+ *
+ * @param  yuv: YUV mode
+ * @param  picYY: Pointer of picture YY data start address(YUYV)
+ * @param  lenYY: Length of picture YY data
+ * @param  picUV: Pointer of picture UV data start address(YUYV)
+ * @param  lenUV: Length of picture UV data
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type Image_Sensor_CAM_Get_Planar(CAM_YUV_Mode_Type yuv, uint8_t **picYY, uint32_t *lenYY, uint8_t **picUV, uint32_t *lenUV)
+{
+    CAM_Planar_Frame_Info info;
+    BL702_MemSet(&info, 0, sizeof(info));
+
+    CAM_Planar_Get_Frame_Info(&info);
+
+    if (yuv == CAM_YUV400_EVEN || yuv == CAM_YUV400_ODD)
+    {
+        if (info.validFrames0 == 0 && info.validFrames1 == 0)
+        {
+            return ERROR;
+        }
+    }
+    else
+    {
+        if (info.validFrames0 == 0 || info.validFrames1 == 0)
+        {
+            return ERROR;
+        }
+    }
+
+    *picYY = (uint8_t *)(info.curFrameAddr0);
+    *lenYY = info.curFrameBytes0;
+    *picUV = (uint8_t *)(info.curFrameAddr1);
+    *lenUV = info.curFrameBytes1;
+
+    return SUCCESS;
+}
+
+/****************************************************************************/ /**
+ * @brief  Get available count0 of camera frames
+ *
+ * @param  None
+ *
+ * @return Frames count
+ *
+*******************************************************************************/
+uint8_t Image_Sensor_CAM_Frame_Count0(void)
+{
+    return CAM_Get_Frame_Count_0();
+}
+
+/****************************************************************************/ /**
+ * @brief  Get available count1 of camera frames
+ *
+ * @param  None
+ *
+ * @return Frames count
+ *
+*******************************************************************************/
+uint8_t Image_Sensor_CAM_Frame_Count1(void)
+{
+    return CAM_Get_Frame_Count_1();
+}
+
+/****************************************************************************/ /**
+ * @brief  Pop one camera frame in interleave mode
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Image_Sensor_CAM_Release_Interleave(void)
+{
+    CAM_Interleave_Pop_Frame();
+}
+
+/****************************************************************************/ /**
+ * @brief  Pop one camera frame in planar mode
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Image_Sensor_CAM_Release_Planar(void)
+{
+    CAM_Planar_Pop_Frame();
+}
+
+/****************************************************************************/ /**
+ * @brief  Open camera function
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Image_Sensor_CAM_Open(void)
+{
+    CAM_Enable();
+}
+
+/****************************************************************************/ /**
+ * @brief  Close camera function
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Image_Sensor_CAM_Close(void)
+{
+    CAM_Disable();
+}
+
+/****************************************************************************/ /**
+ * @brief  Deinit camera module
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Image_Sensor_CAM_Deinit(void)
+{
+    CAM_Deinit();
+}
+
+/****************************************************************************/ /**
+ * @brief  Get one mjpeg frame
+ *
+ * @param  pic: Pointer of picture start address
+ * @param  len: Length of picture
+ * @param  q: Quantization
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type Image_Sensor_MJPEG_Get(uint8_t **pic, uint32_t *len, uint8_t *q)
+{
+    MJPEG_Frame_Info info;
+    BL702_MemSet(&info, 0, sizeof(info));
+
+    MJPEG_Get_Frame_Info(&info);
+
+    if (info.validFrames == 0)
+    {
+        return ERROR;
+    }
+
+    *pic = (uint8_t *)(info.curFrameAddr);
+    *len = info.curFrameBytes;
+    *q = info.curFrameQ;
+
+    return SUCCESS;
+}
+
+/****************************************************************************/ /**
+ * @brief  Get available count of mjpeg frames
+ *
+ * @param  None
+ *
+ * @return Frames count
+ *
+*******************************************************************************/
+uint8_t Image_Sensor_MJPEG_Frame_Count(void)
+{
+    return MJPEG_Get_Frame_Count();
+}
+
+/****************************************************************************/ /**
+ * @brief  Pop one mjpeg frame
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Image_Sensor_MJPEG_Release(void)
+{
+    MJPEG_Pop_Frame();
+}
+
+/****************************************************************************/ /**
+ * @brief  Open mjpeg function
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Image_Sensor_MJPEG_Open(void)
+{
+    MJPEG_Enable();
+}
+
+/****************************************************************************/ /**
+ * @brief  Close mjpeg function
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Image_Sensor_MJPEG_Close(void)
+{
+    MJPEG_Disable();
+}
+
+/****************************************************************************/ /**
+ * @brief  Deinit mjpeg module
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Image_Sensor_MJPEG_Deinit(void)
+{
+    MJPEG_Deinit();
+}
+
+
+
+// #include "hal_camera.h"
+// #include "bl702_cam.h"
+// #include "bl702_mjpeg.h"
+// #include "bl702_i2c_gpio_sim.h"
+// #include "bl702_glb.h"
+// #include "bl702_config.h"
+
+// static void camera_gpio_init(camera_device_t *dev);
+// /**
+//  * @brief 
+//  * 
+//  * @param dev 
+//  * @param oflag 
+//  * @return int 
+//  */
+// int camera_open(struct device *dev, uint16_t oflag)
+// {
+//     camera_device_t *camera_device = (camera_device_t *)dev;
+//     CAM_CFG_Type camCfg;
+//     uint32_t size;
+
+//     GLB_AHB_Slave1_Clock_Gate(DISABLE, BL_AHB_SLAVE1_CAM);
+//     GLB_AHB_Slave1_Clock_Gate(DISABLE, BL_AHB_SLAVE1_MJPEG);
+//     camera_gpio_init(camera_device);
+//     GLB_Set_CAM_CLK(ENABLE, GLB_CAM_CLK_DLL96M, 3);
+//     GLB_SWAP_EMAC_CAM_Pin(GLB_EMAC_CAM_PIN_CAM);
+//     CAM_Disable();
+//     MJPEG_Disable();
+//     camCfg.swIntCnt = 1;
+//     camCfg.frameMode = camera_device->pic_format.frame_mode;
+//     camCfg.yuvMode = camera_device->pic_format.yuv_mode;
+//     camCfg.linePol = camera_device->line_pol;
+//     camCfg.framePol = camera_device->frame_pol;
+//     camCfg.camSensorMode = CAM_SENSOR_MODE_V_OR_H;
+//     camCfg.burstType = CAM_BURST_TYPE_INCR8;
+//     camCfg.waitCount = 0x40;
+//     size = camera_device->pic_reso_x * camera_device->pic_reso_y;
+//     if (camera_device->pic_format.mjpeg_enable == ENABLE)
+//     {
+//         MJPEG_CFG_Type mjpegCfg;
+//         camCfg.swMode = CAM_SW_MODE_AUTO;
+//         camCfg.memStart0 = (uint32_t)camera_device->buffer;
+//         camCfg.memSize0 = camera_device->pic_reso_x * 2 * 8 * 3;
+//         camCfg.frameSize0 = size * 2;
+//         camCfg.memStart1 = 0;
+//         camCfg.memSize1 = 0;
+//         camCfg.frameSize1 = 0;
+//         mjpegCfg.burst = MJPEG_BURST_INCR16;
+//         mjpegCfg.quality = camera_device->pic_format.mjpegQ;
+//         mjpegCfg.yuv = MJPEG_YUV422_INTERLEAVE;
+//         mjpegCfg.waitCount = 0x400;
+//         mjpegCfg.bufferMjpeg = camCfg.memStart0 + camCfg.memSize0;
+//         mjpegCfg.sizeMjpeg = camera_device->length - camCfg.memSize0;
+//         mjpegCfg.bufferCamYY = (uint32_t)camera_device->buffer;
+//         mjpegCfg.sizeCamYY = 3;
+//         mjpegCfg.bufferCamUV = 0;
+//         mjpegCfg.sizeCamUV = 0;
+//         mjpegCfg.resolutionX = camera_device->pic_reso_x;
+//         mjpegCfg.resolutionY = camera_device->pic_reso_y;
+//         mjpegCfg.bitOrderEnable = ENABLE,
+//         mjpegCfg.evenOrderEnable = ENABLE,
+//         mjpegCfg.swapModeEnable = DISABLE,
+//         mjpegCfg.overStopEnable = ENABLE,
+//         mjpegCfg.reflectDmy = DISABLE,
+//         mjpegCfg.verticalDmy = DISABLE,
+//         mjpegCfg.horizationalDmy = DISABLE,
+//         camera_device->picture.base1 = (uint8_t*)mjpegCfg.bufferMjpeg;
+//         camera_device->picture.base2 = (uint8_t *)0;
+//         CAM_Init(&camCfg);
+//         MJPEG_Init(&mjpegCfg);
+//         MJPEG_Enable();
+//     }
+//     else
+//     {
+//         camCfg.swMode = CAM_SW_MODE_MANUAL;
+//         if (camera_device->pic_format.frame_mode == CAMERA_INTERLEAVE_MODE)
+//         {
+//             camCfg.memStart0 = (uint32_t)camera_device->buffer;
+//             camCfg.memSize0 = camera_device->length;
+//             camCfg.memStart1 = 0;
+//             camCfg.memSize1 = 0;
+//             camCfg.frameSize1 = 0;
+//             switch (camera_device->pic_format.yuv_mode)
+//             {
+//             case CAMERA_YUV422:
+//                 camCfg.frameSize0 = size * 2;
+//                 break;
+//             case CAMERA_YUV420_EVEN:
+//                 camCfg.frameSize0 = size * 2 * 3 / 4;
+//                 break;
+//             case CAMERA_YUV420_ODD:
+//                 camCfg.frameSize0 = size * 2 * 3 / 4;
+//                 break;
+//             case CAMERA_YUV400_EVEN:
+//                 camCfg.frameSize0 = size;
+//                 break;
+//             case CAMERA_YUV400_ODD:
+//                 camCfg.frameSize0 = size;
+//                 break;
+//             default:
+//                 break;
+//             }
+//             camera_device->picture.base1 = (uint8_t *)camCfg.memStart0;
+//             camera_device->picture.base2 = (uint8_t *)0;
+//         }
+//         else
+//         {
+//             camCfg.memStart0 = (uint32_t)camera_device->buffer;
+//             camCfg.memSize0 = camera_device->length / 2;
+//             camCfg.memStart1 = (uint32_t)camera_device->buffer + camera_device->length / 2;
+//             camCfg.memSize1 = camera_device->length / 2;
+//             camCfg.frameSize1 = size;
+//             switch (camera_device->pic_format.yuv_mode)
+//             {
+//             case CAMERA_YUV422:
+//                 camCfg.frameSize0 = size;
+//                 break;
+//             case CAMERA_YUV420_EVEN:
+//                 camCfg.frameSize0 = size / 2;
+//                 break;
+//             case CAMERA_YUV420_ODD:
+//                 camCfg.frameSize0 = size / 2;
+//                 break;
+//             case CAMERA_YUV400_EVEN:
+//                 camCfg.frameSize0 = 0;
+//                 break;
+//             case CAMERA_YUV400_ODD:
+//                 camCfg.frameSize0 = 0;
+//                 break;
+//             default:
+//                 break;
+//             }
+//             camera_device->picture.base1 = (uint8_t *)camCfg.memStart0;
+//             camera_device->picture.base2 = (uint8_t *)camCfg.memStart1;
+//         }
+//         CAM_Init(&camCfg);
+//     }
+//     CAM_Enable();
+
+//     return 0;
+// }
+
+// int camera_close(struct device *dev)
+// {
+//     CAM_Disable();
+
+//     return 0;
+// }
+
+// int camera_control(struct device *dev, int cmd, void *args)
+// {
+//     //i2c_device_t *i2c_device = (i2c_device_t *)dev;
+
+//     switch (cmd)
+//     {
+//     case DEVICE_CTRL_SET_INT /* constant-expression */:
+
+//         break;
+//     case DEVICE_CTRL_CLR_INT /* constant-expression */:
+//         /* code */
+//         /* Enable UART interrupt*/
+
+//         break;
+//     case DEVICE_CTRL_GET_INT /* constant-expression */:
+//         /* code */
+//         break;
+//     case DEVICE_CTRL_CONFIG /* constant-expression */:
+//         if (args == (void *)DEVICE_CTRL_CONFIG_CAM_START)
+//         {
+
+//         }
+//         else if (args == (void *)DEVICE_CTRL_CONFIG_CAM_STOP)
+//         {
+
+//         }
+//         break;
+//     case 4 /* constant-expression */:
+//         /* code */
+//         break;
+//     case 5 /* constant-expression */:
+//         /* code */
+//         break;
+//     default:
+//         break;
+//     }
+
+//     return 0;
+// }
+
+// int camera_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size)
+// {
+//     camera_device_t *camera_device = (camera_device_t *)dev;
+//     camera_picture_t *pic = buffer;
+
+//     if(camera_device->pic_format.mjpeg_enable == ENABLE)
+//     {
+//         MJPEG_Frame_Info info =
+//             {
+//                 .validFrames = 0,
+//                 .curFrameAddr = 0,
+//                 .curFrameBytes = 0,
+//                 .curFrameQ = 0,
+//                 .status = 0,
+//             };
+//         MJPEG_Get_Frame_Info(&info);
+//         if (info.validFrames == 0)
+//         {
+//             return ERROR;
+//         }
+//         pic->addr1 = (uint8_t *)(info.curFrameAddr);
+//         pic->length1 = info.curFrameBytes;
+//         return SUCCESS;
+//     }
+//     else
+//     {
+//         if (camera_device->pic_format.frame_mode == CAMERA_INTERLEAVE_MODE)
+//         {
+//             CAM_Interleave_Frame_Info info =
+//                 {
+//                     .validFrames = 0,
+//                     .curFrameAddr = 0,
+//                     .curFrameBytes = 0,
+//                     .status = 0,
+//                 };
+//             CAM_Interleave_Get_Frame_Info(&info);
+//             if (info.validFrames == 0)
+//             {
+//                 return ERROR;
+//             }
+//             pic->addr1 = (uint8_t *)(info.curFrameAddr);
+//             pic->length1 = info.curFrameBytes;
+//         }
+//         else
+//         {
+//             CAM_Planar_Frame_Info info =
+//                 {
+//                     .validFrames0 = 0,
+//                     .validFrames1 = 0,
+//                     .curFrameAddr0 = 0,
+//                     .curFrameAddr1 = 0,
+//                     .curFrameBytes0 = 0,
+//                     .curFrameBytes1 = 0,
+//                     .status = 0,
+//                 };
+//             CAM_Planar_Get_Frame_Info(&info);
+//             if (camera_device->pic_format.yuv_mode == CAMERA_YUV400_EVEN || camera_device->pic_format.yuv_mode == CAMERA_YUV400_ODD)
+//             {
+//                 if (info.validFrames0 == 0 && info.validFrames1 == 0)
+//                 {
+//                     return ERROR;
+//                 }
+//             }
+//             else
+//             {
+//                 if (info.validFrames0 == 0 || info.validFrames1 == 0)
+//                 {
+//                     return ERROR;
+//                 }
+//             }
+//             pic->addr1 = (uint8_t *)(info.curFrameAddr0);
+//             pic->length1 = info.curFrameBytes0;
+//             pic->addr2 = (uint8_t *)(info.curFrameAddr1);
+//             pic->length2 = info.curFrameBytes1;
+//             return SUCCESS;
+//         }
+//     }
+//     return ERROR;
+// }
+
+// #ifdef USING_DEVICE_OPS
+// struct device_drv_ops cam_driver =
+//     {
+//         cam_open,
+//         cam_close,
+//         cam_control,
+//         cam_write,
+//         cam_read
+//     };
+// #endif
+
+// void camera_register(camera_device_t *device, const char *name, uint16_t flag)
+// {
+//     struct device *dev;
+
+//     dev = &(device->parent);
+// #ifdef USING_DEVICE_OPS
+//     dev->api = &cam_driver;
+// #else
+//     dev->open = camera_open;
+//     dev->close = camera_close;
+//     dev->control = camera_control;
+//     dev->write = NULL;
+//     dev->read = camera_read;
+// #endif
+
+//     dev->status = DEVICE_UNREGISTER;
+//     dev->type = DEVICE_CLASS_CAMERA;
+//     dev->handle = NULL;
+
+//     device_register(dev, name, flag);
+// }
+
+// static void camera_gpio_init(camera_device_t *dev)
+// {
+//     GLB_GPIO_Cfg_Type cfg;
+
+//     cfg.drive = 0;
+//     cfg.smtCtrl = 1;
+//     cfg.gpioPin = dev->pin.pclk;
+//     cfg.gpioFun = GPIO0_FUN_PIX_CLK;
+//     cfg.gpioMode = GPIO_MODE_INPUT;
+//     cfg.pullType = GPIO_PULL_NONE;
+//     GLB_GPIO_Init(&cfg);
+
+//     cfg.drive = 0;
+//     cfg.smtCtrl = 1;
+//     cfg.gpioPin = dev->pin.vsync;
+//     cfg.gpioFun = GPIO1_FUN_FRAME_VLD;
+//     cfg.gpioMode = GPIO_MODE_INPUT;
+//     cfg.pullType = GPIO_PULL_NONE;
+//     GLB_GPIO_Init(&cfg);
+
+//     cfg.drive = 0;
+//     cfg.smtCtrl = 1;
+//     cfg.gpioPin = dev->pin.hsync;
+//     cfg.gpioFun = GPIO2_FUN_LINE_VLD;
+//     cfg.gpioMode = GPIO_MODE_INPUT;
+//     cfg.pullType = GPIO_PULL_NONE;
+//     GLB_GPIO_Init(&cfg);
+
+//     cfg.drive = 0;
+//     cfg.smtCtrl = 1;
+//     cfg.gpioPin = dev->pin.data0;
+//     cfg.gpioFun = GPIO3_FUN_PIX_DAT0;
+//     cfg.gpioMode = GPIO_MODE_INPUT;
+//     cfg.pullType = GPIO_PULL_NONE;
+//     GLB_GPIO_Init(&cfg);
+
+//     cfg.drive = 0;
+//     cfg.smtCtrl = 1;
+//     cfg.gpioPin = dev->pin.data1;
+//     cfg.gpioFun = GPIO4_FUN_PIX_DAT1;
+//     cfg.gpioMode = GPIO_MODE_INPUT;
+//     cfg.pullType = GPIO_PULL_NONE;
+//     GLB_GPIO_Init(&cfg);
+
+//     cfg.drive = 0;
+//     cfg.smtCtrl = 1;
+//     cfg.gpioPin = dev->pin.data2;
+//     cfg.gpioFun = GPIO5_FUN_PIX_DAT2;
+//     cfg.gpioMode = GPIO_MODE_INPUT;
+//     cfg.pullType = GPIO_PULL_NONE;
+//     GLB_GPIO_Init(&cfg);
+
+//     cfg.drive = 0;
+//     cfg.smtCtrl = 1;
+//     cfg.gpioPin = dev->pin.data3;
+//     cfg.gpioFun = GPIO6_FUN_PIX_DAT3;
+//     cfg.gpioMode = GPIO_MODE_INPUT;
+//     cfg.pullType = GPIO_PULL_NONE;
+//     GLB_GPIO_Init(&cfg);
+
+//     cfg.drive = 0;
+//     cfg.smtCtrl = 1;
+//     cfg.gpioPin = dev->pin.data4;
+//     cfg.gpioFun = GPIO12_FUN_PIX_DAT4;
+//     cfg.gpioMode = GPIO_MODE_INPUT;
+//     cfg.pullType = GPIO_PULL_NONE;
+//     GLB_GPIO_Init(&cfg);
+
+//     cfg.drive = 0;
+//     cfg.smtCtrl = 1;
+//     cfg.gpioPin = dev->pin.data5;
+//     cfg.gpioFun = GPIO29_FUN_PIX_DAT5;
+//     cfg.gpioMode = GPIO_MODE_INPUT;
+//     cfg.pullType = GPIO_PULL_NONE;
+//     GLB_GPIO_Init(&cfg);
+
+//     cfg.drive = 0;
+//     cfg.smtCtrl = 1;
+//     cfg.gpioPin = dev->pin.data6;
+//     cfg.gpioFun = GPIO30_FUN_PIX_DAT6;
+//     cfg.gpioMode = GPIO_MODE_INPUT;
+//     cfg.pullType = GPIO_PULL_NONE;
+//     GLB_GPIO_Init(&cfg);
+
+//     cfg.drive = 0;
+//     cfg.smtCtrl = 1;
+//     cfg.gpioPin = dev->pin.data7;
+//     cfg.gpioFun = GPIO31_FUN_PIX_DAT7;
+//     cfg.gpioMode = GPIO_MODE_INPUT;
+//     cfg.pullType = GPIO_PULL_NONE;
+//     GLB_GPIO_Init(&cfg);
+
+//     if(ENABLE == dev->pin.mclk_enable)
+//     {
+//         cfg.drive = 1;
+//         cfg.smtCtrl = 1;
+//         cfg.gpioPin = dev->pin.mclk;
+//         cfg.gpioFun = GPIO10_FUN_CAM_REF_CLK;
+//         cfg.gpioMode = GPIO_MODE_OUTPUT;
+//         cfg.pullType = GPIO_PULL_NONE;
+//         GLB_GPIO_Init(&cfg);
+//     }
+    
+// }
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/src/hal_clock.c b/drivers/bl702_driver/hal_drv/src/hal_clock.c
new file mode 100644
index 00000000..1bad61f7
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/src/hal_clock.c
@@ -0,0 +1,149 @@
+/**
+ * @file hal_clock.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+
+#include "bl702_glb.h"
+#include "hal_clock.h"
+
+void system_clock_init(void)
+{
+    /*select root clock*/
+    GLB_Set_System_CLK(CLOCK_XTAL,BSP_ROOT_CLOCK_SOURCE-2);
+    /*set fclk/hclk and bclk clock*/
+    GLB_Set_System_CLK_Div(BSP_HCLK_DIV,BSP_BCLK_DIV);
+    /* Set MTimer the same frequency as SystemCoreClock */
+    GLB_Set_MTimer_CLK(1, GLB_MTIMER_CLK_BCLK, 7);
+}
+void peripheral_clock_init(void)
+{
+#if defined(BSP_USING_UART0)||defined(BSP_USING_UART1)
+#if BSP_UART_CLOCK_SOURCE == ROOT_CLOCK_SOURCE_DLL_96M
+    GLB_Set_UART_CLK(ENABLE,HBN_UART_CLK_96M,BSP_UART_CLOCK_DIV);
+#elif BSP_UART_CLOCK_SOURCE == ROOT_CLOCK_SOURCE_DLL_FCLK
+    GLB_Set_UART_CLK(ENABLE,HBN_UART_CLK_FCLK,BSP_UART_CLOCK_DIV);
+#endif
+#endif
+
+#if defined(BSP_USING_I2C0)
+    GLB_Set_I2C_CLK(ENABLE,BSP_I2C_CLOCK_DIV);
+#endif
+
+#if defined(BSP_USING_SPI0)
+    GLB_Set_SPI_CLK(ENABLE,BSP_SPI_CLOCK_DIV);
+#endif
+
+#if defined(BSP_USING_PWM)
+#if BSP_PWM_CLOCK_SOURCE == ROOT_CLOCK_SOURCE_RC_32K
+  
+#elif BSP_PWM_CLOCK_SOURCE == ROOT_CLOCK_SOURCE_DLL_BCLK
+
+#elif BSP_PWM_CLOCK_SOURCE == ROOT_CLOCK_SOURCE_DLL_XCLK
+
+#endif
+#endif
+
+#if defined(BSP_USING_IR)
+    GLB_Set_IR_CLK(ENABLE,0,BSP_IR_CLOCK_DIV);
+#endif
+
+#if defined(BSP_USING_I2S0)
+    GLB_Set_Chip_Out_0_CLK_Sel(GLB_CHIP_CLK_OUT_I2S_REF_CLK);
+    GLB_Set_I2S_CLK(ENABLE,GLB_I2S_OUT_REF_CLK_SRC);
+#endif
+#if defined(BSP_USING_ADC0)
+#if BSP_ADC_CLOCK_SOURCE == ROOT_CLOCK_SOURCE_AUPLL
+    GLB_Set_ADC_CLK(ENABLE,GLB_ADC_CLK_AUDIO_PLL,BSP_ADC_CLOCK_DIV);
+#elif BSP_ADC_CLOCK_SOURCE == ROOT_CLOCK_SOURCE_DLL_XCLK
+    GLB_Set_ADC_CLK(ENABLE,GLB_ADC_CLK_XCLK,BSP_ADC_CLOCK_DIV);
+#endif
+    
+#endif
+
+#if defined(BSP_USING_DAC0)
+#if BSP_ADC_CLOCK_SOURCE == ROOT_CLOCK_SOURCE_AUPLL
+    GLB_Set_DAC_CLK(ENABLE,GLB_ADC_CLK_AUDIO_PLL,BSP_DAC_CLOCK_DIV);
+#elif BSP_ADC_CLOCK_SOURCE == ROOT_CLOCK_SOURCE_DLL_XCLK
+    GLB_Set_DAC_CLK(ENABLE,GLB_ADC_CLK_XCLK,BSP_DAC_CLOCK_DIV);
+#endif
+#endif
+
+#if defined(BSP_USING_USB)
+    GLB_Set_USB_CLK(1);
+#endif
+
+}
+uint32_t system_clock_get(enum system_clock_type type)
+{
+    switch (type)
+    {
+    case SYSTEM_CLOCK_ROOT_CLOCK:
+        return SystemCoreClockGet();
+    case SYSTEM_CLOCK_FCLK:
+        return (SystemCoreClockGet()/(GLB_Get_HCLK_Div()+1)); 
+    case SYSTEM_CLOCK_BCLK:
+        return (SystemCoreClockGet()/((GLB_Get_HCLK_Div()+1)*(GLB_Get_BCLK_Div()+1)));
+    case SYSTEM_CLOCK_XCLK:
+        return 32000000;   
+    default:
+        break;
+    }
+    return 0;
+}
+uint32_t peripheral_clock_get(enum peripheral_clock_type type)
+{
+    uint32_t tmpVal;
+    uint32_t div;
+    switch (type)
+    {
+    case PERIPHERAL_CLOCK_UART:
+    #if defined(BSP_USING_UART0)||defined(BSP_USING_UART1)
+    #if BSP_UART_CLOCK_SOURCE == ROOT_CLOCK_SOURCE_DLL_96M
+        return 96000000;
+    #elif BSP_UART_CLOCK_SOURCE == ROOT_CLOCK_SOURCE_DLL_FCLK
+        return system_clock_get(SYSTEM_CLOCK_FCLK)/(GLB_Get_HCLK_Div()+1));
+    #endif
+    #endif
+    case PERIPHERAL_CLOCK_SPI:
+#if defined(BSP_USING_SPI0)
+#if BSP_SPI_CLOCK_SOURCE == ROOT_CLOCK_SOURCE_DLL_BCLK
+        tmpVal=BL_RD_REG(GLB_BASE,GLB_CLK_CFG3);
+        div = BL_GET_REG_BITS_VAL(tmpVal,GLB_SPI_CLK_DIV);
+        return system_clock_get(SYSTEM_CLOCK_BCLK)/(div+1);
+#endif
+#endif
+    case PERIPHERAL_CLOCK_I2C:
+#if defined(BSP_USING_I2C0)
+#if BSP_I2C_CLOCK_SOURCE == ROOT_CLOCK_SOURCE_DLL_BCLK
+        tmpVal=BL_RD_REG(GLB_BASE,GLB_CLK_CFG3);
+        div = BL_GET_REG_BITS_VAL(tmpVal,GLB_I2C_CLK_DIV);
+        return system_clock_get(SYSTEM_CLOCK_BCLK)/(div+1);
+#endif
+#endif
+    case PERIPHERAL_CLOCK_I2S:
+        return 0;
+    case PERIPHERAL_CLOCK_ADC:
+        return 32000000;   
+    default:
+        break;
+    }
+    return 0;
+}
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/src/hal_dac.c b/drivers/bl702_driver/hal_drv/src/hal_dac.c
new file mode 100644
index 00000000..7a43356f
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/src/hal_dac.c
@@ -0,0 +1,232 @@
+/**
+ * @file hal_dac.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_dac.h"
+#include "hal_dma.h"
+#include "bl702_gpio.h"
+#include "bl702_dac.h"
+#include "bl702_dma.h"
+#include "bl702_config.h"
+#include "bl702_glb.h"
+#include "dac_config.h"
+
+dac_device_t dacx_device[] = {
+#ifdef BSP_USING_DAC0
+    DAC_CONFIG,
+#endif
+};
+
+int dac_open(struct device *dev, uint16_t oflag)
+{
+    GLB_GPIP_DAC_ChanA_Cfg_Type chCfg;
+    GLB_GPIP_DAC_Cfg_Type dacCfg ;
+    dac_device_t *dac_device = (dac_device_t *)dev;
+    uint8_t dac_ext_ref_pin =0;
+
+    if(dac_device->pin.pin_num == 2){
+        GLB_GPIO_Func_Init(GPIO_FUN_ANALOG, (GLB_GPIO_Type *)&dac_device->pin.dac0, 2);
+    }else if(dac_device->pin.pin_num == 1){
+        GLB_GPIO_Func_Init(GPIO_FUN_ANALOG, (GLB_GPIO_Type *)&dac_device->pin.dac0, 1);
+    }else{
+        return ERROR;
+    }
+
+    switch(dac_device->clk){
+        case DAC_CLK_500KHZ:
+            PDS_Set_Audio_PLL_Freq(AUDIO_PLL_24000000_HZ);
+            /* 24.0000MHZ / 3 / 16 = 500KHZ*/
+            GLB_Set_DAC_CLK(ENABLE,GLB_DAC_CLK_AUDIO_PLL,3);  
+            dacCfg.div = DAC_CLK_DIV_16;  
+            break;
+        case DAC_CLK_8KHZ:
+            /* set audio pll as 12.288MHZ*/
+            PDS_Set_Audio_PLL_Freq(AUDIO_PLL_12288000_HZ);
+            /* 12.2880MHZ / 24 / 64 = 8KHZ*/
+            GLB_Set_DAC_CLK(ENABLE,GLB_DAC_CLK_AUDIO_PLL,24); 
+            dacCfg.div = DAC_CLK_DIV_64;  
+        case DAC_CLK_16KHZ:
+            /* set audio pll as 12.288MHZ*/
+            PDS_Set_Audio_PLL_Freq(AUDIO_PLL_12288000_HZ);
+            /* 12.2880MHZ / 24 / 32 = 16KHZ*/
+            GLB_Set_DAC_CLK(ENABLE,GLB_DAC_CLK_AUDIO_PLL,24); 
+            dacCfg.div = DAC_CLK_DIV_32; 
+        case DAC_CLK_44P1KHZ:
+            /* set audio pll as 11.2896MHZ*/
+            PDS_Set_Audio_PLL_Freq(AUDIO_PLL_11289600_HZ);
+            /* 11.2896MHZ / 16 / 16 = 44.1KHZ*/
+            GLB_Set_DAC_CLK(ENABLE,GLB_DAC_CLK_AUDIO_PLL,16);  
+            dacCfg.div = DAC_CLK_DIV_16;  
+            break;    
+        default : break;
+    }
+
+    if(DAC_REF_SEL == GLB_DAC_REF_SEL_EXTERNAL){
+        dac_ext_ref_pin = DAC_EXT_REF_GPIO;
+        dacCfg.refSel = GLB_DAC_REF_SEL_EXTERNAL;
+        GLB_GPIO_Func_Init(GPIO_FUN_ANALOG, (GLB_GPIO_Type *)&dac_ext_ref_pin, 1);
+    }else{
+    	dacCfg.refSel = GLB_DAC_REF_SEL_INTERNAL;
+    }
+
+    if (oflag & DEVICE_OFLAG_STREAM_TX){
+        dacCfg.dmaEn=DISABLE;
+        dacCfg.resetChanA = ENABLE;
+        dacCfg.resetChanB = ENABLE;
+        dacCfg.dmaFmt = GPIP_DAC_DMA_FORMAT_0;
+
+        chCfg.chanCovtEn = ENABLE;
+        chCfg.outputEn = ENABLE;
+        chCfg.chanEn = ENABLE;
+        chCfg.src = GPIP_DAC_ChanA_SRC_REG;
+
+        GLB_GPIP_DAC_Init(&dacCfg);
+        GLB_GPIP_DAC_Set_ChanA_Config(&chCfg);
+        GLB_GPIP_DAC_Set_ChanB_Config((GLB_GPIP_DAC_ChanB_Cfg_Type *)&chCfg);
+
+    }else if(oflag & DEVICE_OFLAG_DMA_TX){
+        dacCfg.dmaEn=ENABLE;
+        dacCfg.resetChanA = ENABLE;
+        dacCfg.resetChanB = ENABLE;
+        if(dac_device->pin.pin_num == 2){
+            dacCfg.dmaFmt = GPIP_DAC_DMA_FORMAT_1; 
+        }else{
+            dacCfg.dmaFmt = GPIP_DAC_DMA_FORMAT_0;             
+        }
+
+        chCfg.chanCovtEn = ENABLE;
+        chCfg.outputEn = ENABLE;
+        chCfg.chanEn = ENABLE;
+        chCfg.src = GPIP_DAC_ChanA_SRC_DMA;
+
+        GLB_GPIP_DAC_Init(&dacCfg);
+        GLB_GPIP_DAC_Set_ChanA_Config(&chCfg);
+        GLB_GPIP_DAC_Set_ChanB_Config((GLB_GPIP_DAC_ChanB_Cfg_Type *)&chCfg);
+
+        GPIP_Set_DAC_DMA_TX_FORMAT_SEL(dacCfg.dmaFmt);
+        GPIP_Set_DAC_DMA_TX_Enable();
+
+    }else{
+
+    }
+    
+    return 0;
+}
+int dac_close(struct device *dev)
+{
+    return 0;
+}
+int dac_control(struct device *dev, int cmd, void *args)
+{
+    dac_device_t *dac_device = (dac_device_t *)dev;
+    switch (cmd)
+    {
+    case DEVICE_CTRL_SET_INT /* constant-expression */:
+
+        break;
+    case DEVICE_CTRL_CLR_INT /* constant-expression */:
+
+        break;
+    case DEVICE_CTRL_GET_INT /* constant-expression */:
+        /* code */
+        break;
+    case DEVICE_CTRL_CONFIG /* constant-expression */:
+        /* code */
+        break;
+    case DEVICE_CTRL_RESUME /* constant-expression */:
+
+        break;
+    case DEVICE_CTRL_SUSPEND /* constant-expression */:
+
+        break;
+    case DEVICE_CTRL_DAC_ATTACH_TX_DMA /* constant-expression */:
+        dac_device->tx_dma = (struct device *)args;
+        break;
+    default:
+        break;
+    }
+
+    return 0;
+}
+int dac_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size)
+{
+    dac_channel_t channel = (dac_channel_t)pos;
+    dac_device_t *dac_device = (dac_device_t *)dev;
+    uint32_t i=0;
+
+    if (dev->oflag & DEVICE_OFLAG_DMA_TX)
+    {
+        struct device *dma_ch = (struct device *)dac_device->tx_dma;
+
+        if (!dma_ch)
+            return -1;
+ 
+        dma_reload(dma_ch, (uint32_t)buffer, (uint32_t)DMA_ADDR_DAC_TDR, size);
+        dma_channel_start(dma_ch);
+
+    }
+    if (dev->oflag & DEVICE_OFLAG_STREAM_TX){
+        if(channel==DAC_CHANNEL_0){
+            for(i=0;iopen = dac_open;
+    dev->close = dac_close;
+    dev->control = dac_control;
+    dev->write = dac_write;
+    dev->read = NULL;
+
+    dev->status = DEVICE_UNREGISTER;
+    dev->type = DEVICE_CLASS_ADC;
+    dev->handle = NULL;
+
+    device_register(dev, name, flag);
+
+    return 0;
+}
diff --git a/drivers/bl702_driver/hal_drv/src/hal_dma.c b/drivers/bl702_driver/hal_drv/src/hal_dma.c
new file mode 100644
index 00000000..f230df6f
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/src/hal_dma.c
@@ -0,0 +1,477 @@
+/**
+ * @file hal_dma.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_dma.h"
+#include "drv_mmheap.h"
+#include "bl702_dma.h"
+
+dma_control_data_t dma_ctrl_cfg;
+
+void DMA0_IRQ(void);
+
+dma_device_t dmax_device[DMA_MAX_INDEX] =
+{
+#ifdef BSP_USING_DMA0_CH0
+    DMA0_CH0_CONFIG,
+#endif
+#ifdef BSP_USING_DMA0_CH1
+    DMA0_CH1_CONFIG,
+#endif
+#ifdef BSP_USING_DMA0_CH2
+    DMA0_CH2_CONFIG,
+#endif
+#ifdef BSP_USING_DMA0_CH3
+    DMA0_CH3_CONFIG,
+#endif
+#ifdef BSP_USING_DMA0_CH4
+    DMA0_CH4_CONFIG,
+#endif
+#ifdef BSP_USING_DMA0_CH5
+    DMA0_CH5_CONFIG,
+#endif
+#ifdef BSP_USING_DMA0_CH6
+    DMA0_CH6_CONFIG,
+#endif
+#ifdef BSP_USING_DMA0_CH7
+    DMA0_CH7_CONFIG,
+#endif
+};
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @param oflag 
+ * @return int 
+ */
+int dma_open(struct device *dev, uint16_t oflag)
+{
+    dma_device_t *dma_device = (dma_device_t *)dev;
+
+    DMA_LLI_Cfg_Type lliCfg;
+
+    /* Disable all interrupt */
+    DMA_IntMask(dma_device->ch, DMA_INT_ALL, MASK);
+    /* Enable uart interrupt*/
+    NVIC_DisableIRQ(DMA_ALL_IRQn);
+
+    DMA_Disable();
+
+    DMA_Channel_Disable(dma_device->ch);
+
+    lliCfg.dir = dma_device->direction;
+    lliCfg.srcPeriph = dma_device->src_req;
+    lliCfg.dstPeriph = dma_device->dst_req;
+
+    DMA_LLI_Init(dma_device->ch, &lliCfg);
+
+    dma_ctrl_cfg.bits.fix_cnt = 0;
+    dma_ctrl_cfg.bits.dst_min_mode = 0;
+    dma_ctrl_cfg.bits.dst_add_mode = 0;
+
+    DMA_Enable();
+
+    Interrupt_Handler_Register(DMA_ALL_IRQn, DMA0_IRQ);
+
+    return 0;
+}
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @param cmd 
+ * @param args 
+ * @return int 
+ */
+int dma_control(struct device *dev, int cmd, void *args)
+{
+    dma_device_t *dma_device = (dma_device_t *)dev;
+
+    switch (cmd)
+    {
+        case DEVICE_CTRL_SET_INT /* constant-expression */:
+            /* Dma interrupt configuration */
+            DMA_IntMask(dma_device->ch, DMA_INT_TCOMPLETED, UNMASK);
+            DMA_IntMask(dma_device->ch, DMA_INT_ERR, UNMASK);
+
+            /* Enable uart interrupt*/
+            NVIC_EnableIRQ(DMA_ALL_IRQn);
+            break;
+        case DEVICE_CTRL_CLR_INT /* constant-expression */:
+            /* Dma interrupt configuration */
+            DMA_IntMask(dma_device->ch, DMA_INT_TCOMPLETED, MASK);
+            DMA_IntMask(dma_device->ch, DMA_INT_ERR, MASK);
+
+            /* Enable uart interrupt*/
+            NVIC_DisableIRQ(DMA_ALL_IRQn);
+            break;
+        case DEVICE_CTRL_GET_INT /* constant-expression */:
+            /* code */
+            break;
+        case DEVICE_CTRL_CONFIG /* constant-expression */:
+        {
+            dma_ctrl_param_t *cfg = (dma_ctrl_param_t *)args;
+            DMA_LLI_Cfg_Type lliCfg;
+
+            lliCfg.dir = cfg->direction;
+            lliCfg.srcPeriph = cfg->src_req;
+            lliCfg.dstPeriph = cfg->dst_req;
+
+            DMA_LLI_Init(dma_device->ch, &lliCfg);
+
+            break;
+        }
+        case DMA_CHANNEL_UPDATE_CMD:
+            DMA_LLI_Update(dma_device->ch, (uint32_t)args);
+            break;
+        case DMA_CHANNEL_GET_STATUS_CMD /* constant-expression */:
+            return DMA_Channel_Is_Busy(dma_device->ch);
+        case DMA_CHANNEL_START_CMD /* constant-expression */:
+            DMA_Channel_Enable(dma_device->ch);
+            break;
+        case DMA_CHANNEL_STOP_CMD /* constant-expression */:
+            DMA_Channel_Disable(dma_device->ch);
+            break;
+        default:
+            break;
+    }
+
+    return 0;
+}
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @return int 
+ */
+int dma_close(struct device *dev)
+{
+    DMA_Disable();
+    return 0;
+}
+
+int dma_register(enum dma_index_type index, const char *name, uint16_t flag)
+{
+    struct device *dev;
+
+    if (DMA_MAX_INDEX == 0)
+        return -DEVICE_EINVAL;
+
+    dev = &(dmax_device[index].parent);
+
+    dev->open = dma_open;
+    dev->close = dma_close;
+    dev->control = dma_control;
+    // dev->write = dma_write;
+    // dev->read = dma_read;
+
+    dev->status = DEVICE_UNREGISTER;
+    dev->type = DEVICE_CLASS_DMA;
+    dev->handle = NULL;
+
+    return device_register(dev, name, flag);
+}
+
+static BL_Err_Type dma_scan_unregister_device(uint8_t * allocate_index){
+    struct device *dev;
+    dlist_t *node;
+    uint8_t dma_index=0;
+    uint32_t dma_handle[DMA_MAX_INDEX];
+
+    for(dma_index = 0;dma_indextype == DEVICE_CLASS_DMA){
+            dma_handle[(((uint32_t)dev - (uint32_t)dmax_device) / sizeof(dma_device_t)) % DMA_MAX_INDEX] = SET;
+        }
+    }
+
+    for(dma_index = 0;dma_indexopen = dma_open;
+    dev->close = dma_close;
+    dev->control = dma_control;
+    // dev->write = dma_write;
+    // dev->read = dma_read;
+
+    dev->status = DEVICE_UNREGISTER;
+    dev->type = DEVICE_CLASS_DMA;
+    dev->handle = NULL;
+
+    return device_register(dev, name, flag);
+}
+
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @param src_addr 
+ * @param dst_addr 
+ * @param transfer_size 
+ * @return int 
+ */
+int dma_reload(struct device *dev, uint32_t src_addr, uint32_t dst_addr, uint32_t transfer_size)
+{
+    uint32_t malloc_count;
+    uint32_t remain_len;
+    uint32_t actual_transfer_len = 0;
+    uint32_t actual_transfer_offset = 0;
+
+    dma_device_t *dma_device = (dma_device_t *)dev;
+
+    DMA_Channel_Disable(dma_device->ch);
+
+    if (dma_device->direction == DMA_MEMORY_TO_MEMORY)
+    {
+        dma_ctrl_cfg.bits.SI = 1;
+        dma_ctrl_cfg.bits.DI = 1;
+    }
+    else if (dma_device->direction == DMA_MEMORY_TO_PERIPH)
+    {
+        dma_ctrl_cfg.bits.SI = 1;
+        dma_ctrl_cfg.bits.DI = 0;
+    }
+    else if (dma_device->direction == DMA_PERIPH_TO_MEMORY)
+    {
+        dma_ctrl_cfg.bits.SI = 0;
+        dma_ctrl_cfg.bits.DI = 1;
+    }
+    else if (dma_device->direction == DMA_PERIPH_TO_PERIPH)
+    {
+        dma_ctrl_cfg.bits.SI = 0;
+        dma_ctrl_cfg.bits.DI = 0;
+    }
+
+    dma_ctrl_cfg.bits.SBSize = dma_device->src_burst_size;
+    dma_ctrl_cfg.bits.DBSize = dma_device->dst_burst_size;
+    dma_ctrl_cfg.bits.SWidth = dma_device->src_width;
+    dma_ctrl_cfg.bits.DWidth = dma_device->dst_width;
+
+    if (dma_device->src_width == DMA_TRANSFER_WIDTH_8BIT)
+    {
+        actual_transfer_offset = 4095;
+        actual_transfer_len = transfer_size;
+    }
+    else if (dma_device->src_width == DMA_TRANSFER_WIDTH_16BIT)
+    {
+        if (transfer_size % 2)
+            return -1;
+
+        actual_transfer_offset = (4095 * 2);
+        actual_transfer_len = transfer_size/2;
+    }
+    else if (dma_device->src_width == DMA_TRANSFER_WIDTH_32BIT)
+    {
+        if (transfer_size % 4)
+            return -1;
+
+        actual_transfer_offset = (4095 * 4);
+        actual_transfer_len = transfer_size/4;
+    }
+
+    malloc_count = actual_transfer_len / 4095;
+    remain_len = actual_transfer_len % 4095;
+
+    if (remain_len)
+    {
+        malloc_count++;
+    }
+
+    if(dma_device->lli_cfg)
+    {
+        mmheap_free(dma_device->lli_cfg);
+        dma_device->lli_cfg = (dma_lli_ctrl_t *)mmheap_alloc(sizeof(dma_lli_ctrl_t) * malloc_count);
+    }
+    else
+    {
+         dma_device->lli_cfg = (dma_lli_ctrl_t *)mmheap_alloc(sizeof(dma_lli_ctrl_t) * malloc_count);
+    }
+
+    if (dma_device->lli_cfg)
+    {
+        /*transfer_size will be 4095 or 4095*2 or 4095*4 in different transfer width*/
+        if ((!remain_len) && (malloc_count == 1))
+        {
+            dma_device->lli_cfg[0].src_addr = src_addr;
+            dma_device->lli_cfg[0].dst_addr = dst_addr;
+            dma_device->lli_cfg[0].nextlli = 0;
+            dma_ctrl_cfg.bits.TransferSize = remain_len;
+            dma_ctrl_cfg.bits.I = 1;
+            memcpy(&dma_device->lli_cfg[0].cfg, &dma_ctrl_cfg, sizeof(dma_control_data_t));
+        }
+        /*transfer_size will be 4095*n or 4095*2*n or 4095*4*n,(n>1) in different transfer width*/
+        else if ((!remain_len) && (malloc_count > 1))
+        {
+            for (uint32_t i = 0; i < malloc_count; i++)
+            {
+                dma_device->lli_cfg[i].src_addr = src_addr;
+                dma_device->lli_cfg[i].dst_addr = dst_addr;
+                dma_device->lli_cfg[i].nextlli = 0;
+
+                dma_ctrl_cfg.bits.TransferSize = 4095;
+                dma_ctrl_cfg.bits.I = 0;
+                if (dma_ctrl_cfg.bits.SI)
+                    src_addr += actual_transfer_offset;
+                if (dma_ctrl_cfg.bits.DI)
+                    dst_addr += actual_transfer_offset;
+
+                if (i == malloc_count - 1)
+                {
+                    dma_ctrl_cfg.bits.I = 1;
+
+                    if (dma_device->transfer_mode == DMA_LLI_CYCLE_MODE)
+                        dma_device->lli_cfg[i].nextlli = (uint32_t)&dma_device->lli_cfg[0];
+                }
+                if (i)
+                {
+                    dma_device->lli_cfg[i - 1].nextlli = (uint32_t)&dma_device->lli_cfg[i];
+                }
+                memcpy(&dma_device->lli_cfg[i].cfg, &dma_ctrl_cfg, sizeof(dma_control_data_t));
+            }
+        }
+        else
+        {
+            for (uint32_t i = 0; i < malloc_count; i++)
+            {
+                dma_device->lli_cfg[i].src_addr = src_addr;
+                dma_device->lli_cfg[i].dst_addr = dst_addr;
+                dma_device->lli_cfg[i].nextlli = 0;
+
+                dma_ctrl_cfg.bits.TransferSize = 4095;
+                dma_ctrl_cfg.bits.I = 0;
+                if (dma_ctrl_cfg.bits.SI)
+                    src_addr += actual_transfer_offset;
+                if (dma_ctrl_cfg.bits.DI)
+                    dst_addr += actual_transfer_offset;
+
+                if (i == malloc_count - 1)
+                {
+                    dma_ctrl_cfg.bits.TransferSize = remain_len;
+                    dma_ctrl_cfg.bits.I = 1;
+
+                    if (dma_device->transfer_mode == DMA_LLI_CYCLE_MODE)
+                        dma_device->lli_cfg[i].nextlli = (uint32_t)&dma_device->lli_cfg[0];
+
+                }
+                if (i)
+                {
+                    dma_device->lli_cfg[i - 1].nextlli = (uint32_t)&dma_device->lli_cfg[i];
+                }
+                memcpy(&dma_device->lli_cfg[i].cfg, &dma_ctrl_cfg, sizeof(dma_control_data_t));
+            }
+        }
+        DMA_LLI_Update(dma_device->ch, (uint32_t)dma_device->lli_cfg);
+    }
+    else
+    {
+        return -2;
+    }
+
+    return 0;
+}
+/**
+ * @brief 
+ * 
+ * @param handle 
+ */
+void dma_isr(dma_device_t *handle)
+{
+    uint32_t tmpVal;
+    uint32_t intClr;
+
+    /* Get DMA register */
+    if (handle->id == 0)
+    {
+        uint32_t DMAChs = DMA_BASE;
+        for (uint8_t i = 0; i < DMA_CH_MAX; i++)
+        {
+            tmpVal = BL_RD_REG(DMAChs, DMA_INTTCSTATUS);
+            if ((BL_GET_REG_BITS_VAL(tmpVal, DMA_INTTCSTATUS) & (1 << handle[i].ch)) != 0)
+            {
+                /* Clear interrupt */
+                tmpVal = BL_RD_REG(DMAChs, DMA_INTTCCLEAR);
+                intClr = BL_GET_REG_BITS_VAL(tmpVal, DMA_INTTCCLEAR);
+                intClr |= (1 << handle[i].ch);
+                tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_INTTCCLEAR, intClr);
+                BL_WR_REG(DMAChs, DMA_INTTCCLEAR, tmpVal);
+
+                if (handle[i].parent.callback)
+                    handle[i].parent.callback(&handle[i].parent, NULL, 0, DMA_INT_TCOMPLETED);
+            }
+        }
+
+        for (uint8_t i = 0; i < DMA_CH_MAX; i++)
+        {
+            tmpVal = BL_RD_REG(DMAChs, DMA_INTERRORSTATUS);
+            if ((BL_GET_REG_BITS_VAL(tmpVal, DMA_INTERRORSTATUS) & (1 << handle[i].ch)) != 0)
+            {
+                /*Clear interrupt */
+                tmpVal = BL_RD_REG(DMAChs, DMA_INTERRCLR);
+                intClr = BL_GET_REG_BITS_VAL(tmpVal, DMA_INTERRCLR);
+                intClr |= (1 << handle[i].ch);
+                tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_INTERRCLR, intClr);
+                BL_WR_REG(DMAChs, DMA_INTERRCLR, tmpVal);
+
+                if (handle[i].parent.callback)
+                    handle[i].parent.callback(&handle->parent, NULL, 0, DMA_INT_ERR);
+            }
+        }
+    }
+    else
+    {
+    }
+}
+/**
+ * @brief 
+ * 
+ */
+void DMA0_IRQ(void)
+{
+    dma_isr(&dmax_device[0]);
+}
diff --git a/drivers/bl702_driver/hal_drv/src/hal_gpio.c b/drivers/bl702_driver/hal_drv/src/hal_gpio.c
new file mode 100644
index 00000000..d6f7c52d
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/src/hal_gpio.c
@@ -0,0 +1,205 @@
+/**
+ * @file hal_gpio.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "bl702_glb.h"
+#include "bl702_gpio.h"
+#include "hal_gpio.h"
+
+gpio_device_t gpio_device;
+/**
+ * @brief 
+ * 
+ * @param pin 
+ * @param mode 
+ */
+void gpio_set_mode(uint32_t pin, uint32_t mode)
+{
+    GLB_GPIO_Cfg_Type gpio_cfg;
+
+    gpio_cfg.gpioFun = GPIO_FUN_GPIO;
+    gpio_cfg.gpioPin = pin;
+    gpio_cfg.drive = 0;
+    gpio_cfg.smtCtrl = 1;
+    switch (mode)
+    {
+        case GPIO_OUTPUT_MODE:
+            gpio_cfg.gpioMode = GPIO_MODE_OUTPUT;
+            gpio_cfg.pullType = GPIO_PULL_NONE;
+            break;
+        case GPIO_OUTPUT_PP_MODE:
+            gpio_cfg.gpioMode = GPIO_MODE_OUTPUT;
+            gpio_cfg.pullType = GPIO_PULL_UP;
+            break;
+        case GPIO_OUTPUT_PD_MODE:
+            gpio_cfg.gpioMode = GPIO_MODE_OUTPUT;
+            gpio_cfg.pullType = GPIO_PULL_DOWN;
+            break;
+        case GPIO_INPUT_MODE:
+            gpio_cfg.gpioMode = GPIO_MODE_INPUT;
+            gpio_cfg.pullType = GPIO_PULL_NONE;
+            break;
+        case GPIO_INPUT_PP_MODE:
+            gpio_cfg.gpioMode = GPIO_MODE_INPUT;
+            gpio_cfg.pullType = GPIO_PULL_UP;
+            break;
+        case GPIO_INPUT_PD_MODE:
+            gpio_cfg.gpioMode = GPIO_MODE_INPUT;
+            gpio_cfg.pullType = GPIO_PULL_DOWN;
+            break;
+        default:
+            NVIC_DisableIRQ(GPIO_INT0_IRQn);
+            GLB_GPIO_IntMask(pin, MASK);
+
+            gpio_cfg.gpioMode = GPIO_MODE_INPUT;
+
+            GLB_GPIO_INT0_IRQHandler_Install();
+            if (mode == GPIO_ASYNC_RISING_TRIGER_INT_MODE)
+            {
+                gpio_cfg.pullType = GPIO_PULL_DOWN;
+                GLB_Set_GPIO_IntMod(pin, GLB_GPIO_INT_CONTROL_ASYNC, GLB_GPIO_INT_TRIG_POS_PULSE);
+            }
+
+            else if (mode == GPIO_ASYNC_FALLING_TRIGER_INT_MODE)
+            {
+                gpio_cfg.pullType = GPIO_PULL_UP;
+                GLB_Set_GPIO_IntMod(pin, GLB_GPIO_INT_CONTROL_ASYNC, GLB_GPIO_INT_TRIG_NEG_PULSE);
+            }
+
+            else if (mode == GPIO_ASYNC_HIGH_LEVEL_INT_MODE)
+            {
+                gpio_cfg.pullType = GPIO_PULL_DOWN;
+                GLB_Set_GPIO_IntMod(pin, GLB_GPIO_INT_CONTROL_ASYNC, GLB_GPIO_INT_TRIG_POS_LEVEL);
+            }
+
+            else if (mode == GPIO_ASYNC_LOW_LEVEL_INT_MODE)
+            {
+                gpio_cfg.pullType = GPIO_PULL_UP;
+                GLB_Set_GPIO_IntMod(pin, GLB_GPIO_INT_CONTROL_ASYNC, GLB_GPIO_INT_TRIG_NEG_LEVEL);
+            }
+
+            else if (mode == GPIO_SYNC_RISING_TRIGER_INT_MODE)
+            {
+                gpio_cfg.pullType = GPIO_PULL_DOWN;
+                GLB_Set_GPIO_IntMod(pin, GLB_GPIO_INT_CONTROL_SYNC, GLB_GPIO_INT_TRIG_POS_PULSE);
+            }
+
+            else if (mode == GPIO_SYNC_FALLING_TRIGER_INT_MODE)
+            {
+                gpio_cfg.pullType = GPIO_PULL_UP;
+                GLB_Set_GPIO_IntMod(pin, GLB_GPIO_INT_CONTROL_SYNC, GLB_GPIO_INT_TRIG_NEG_PULSE);
+            }
+
+            else if (mode == GPIO_SYNC_HIGH_LEVEL_INT_MODE)
+            {
+                gpio_cfg.pullType = GPIO_PULL_DOWN;
+                GLB_Set_GPIO_IntMod(pin, GLB_GPIO_INT_CONTROL_SYNC, GLB_GPIO_INT_TRIG_POS_LEVEL);
+            }
+
+            else if (mode == GPIO_SYNC_LOW_LEVEL_INT_MODE)
+            {
+                gpio_cfg.pullType = GPIO_PULL_UP;
+                GLB_Set_GPIO_IntMod(pin, GLB_GPIO_INT_CONTROL_SYNC, GLB_GPIO_INT_TRIG_NEG_LEVEL);
+            }
+
+            else
+                return;
+            NVIC_EnableIRQ(GPIO_INT0_IRQn);
+            break;
+
+    }
+    GLB_GPIO_Init(&gpio_cfg);
+}
+/**
+ * @brief 
+ * 
+ * @param pin 
+ * @param value 
+ */
+void gpio_write(uint32_t pin, uint32_t value)
+{
+    GLB_GPIO_Write(pin, value);
+}
+/**
+ * @brief 
+ * 
+ * @param pin 
+ */
+void gpio_toggle(uint32_t pin)
+{
+
+}
+/**
+ * @brief 
+ * 
+ * @param pin 
+ * @return int 
+ */
+int gpio_read(uint32_t pin)
+{
+    return GLB_GPIO_Read(pin);
+}
+/**
+ * @brief 
+ * 
+ * @param pin 
+ * @param cbFun 
+ */
+void gpio_attach_irq(uint32_t pin, void (*cbFun)(void))
+{
+    GLB_GPIO_INT0_Callback_Install(pin, cbFun);
+}
+/**
+ * @brief 
+ * 
+ * @param pin 
+ * @param enabled 
+ */
+void gpio_irq_enable(uint32_t pin, uint8_t enabled)
+{
+    if (enabled)
+    {
+        GLB_GPIO_IntMask(pin, UNMASK);
+    }
+    else
+    {
+        GLB_GPIO_IntMask(pin, MASK);
+    }
+
+}
+
+void pin_register(const char *name, uint16_t flag)
+{
+    struct device *dev;
+    dev = &(gpio_device.parent);
+
+    dev->open = NULL;
+    dev->close = NULL;
+    dev->control = NULL;
+    dev->write = NULL;
+    dev->read = NULL;
+
+    dev->status = DEVICE_UNREGISTER;
+    dev->type = DEVICE_CLASS_GPIO;
+    dev->handle = NULL;
+
+    device_register(dev, name, flag);
+}
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/src/hal_i2c.c b/drivers/bl702_driver/hal_drv/src/hal_i2c.c
new file mode 100644
index 00000000..aaa38cbe
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/src/hal_i2c.c
@@ -0,0 +1,188 @@
+/**
+ * @file hal_i2c.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_i2c.h"
+#include "hal_gpio.h"
+#include "bl702_i2c.h"
+#include "bl702_i2c_gpio_sim.h"
+#include "bl702_glb.h"
+
+i2c_device_t i2cx_device[I2C_MAX_INDEX] =
+{
+#ifdef BSP_USING_I2C0
+    I2C0_CONFIG,
+#endif
+#ifdef BSP_USING_I2C1
+    I2C1_CONFIG,
+#endif
+};
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @param oflag 
+ * @return int 
+ */
+int i2c_open(struct device *dev, uint16_t oflag)
+{
+    i2c_device_t *i2c_device = (i2c_device_t *)dev;
+
+    if (i2c_device->mode == I2C_HW_MODE)
+    {
+        I2C_SetPrd(i2c_device->id, i2c_device->phase);
+    }
+    return 0;
+}
+
+// int i2c_close(struct device *dev)
+// {
+
+//     return 0;
+// }
+
+// int i2c_control(struct device *dev, int cmd, void *args)
+// {
+//     //i2c_device_t *i2c_device = (i2c_device_t *)dev;
+
+//     switch (cmd)
+//     {
+//     case DEVICE_CTRL_SET_INT /* constant-expression */:
+
+//         break;
+//     case DEVICE_CTRL_CLR_INT /* constant-expression */:
+//         /* code */
+//         /* Enable UART interrupt*/
+
+//         break;
+//     case DEVICE_CTRL_GET_INT /* constant-expression */:
+//         /* code */
+//         break;
+//     case DEVICE_CTRL_CONFIG /* constant-expression */:
+//         /* code */
+//         break;
+//     case 4 /* constant-expression */:
+//         /* code */
+//         break;
+//     case 5 /* constant-expression */:
+//         /* code */
+//         break;
+//     default:
+//         break;
+//     }
+
+//     return 0;
+// }
+// int i2c_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size)
+// {
+
+//     return 0;
+// }
+// int i2c_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size)
+// {
+
+//     return 0;
+// }
+/**
+ * @brief 
+ * 
+ * @param index 
+ * @param name 
+ * @param flag 
+ * @return int 
+ */
+int i2c_register(enum i2c_index_type index, const char *name, uint16_t flag)
+{
+    struct device *dev;
+
+    if (I2C_MAX_INDEX == 0)
+        return -DEVICE_EINVAL;
+
+    dev = &(i2cx_device[index].parent);
+
+    dev->open = i2c_open;
+    dev->close = NULL;
+    dev->control = NULL;
+    dev->write = NULL;
+    dev->read = NULL;
+
+    dev->status = DEVICE_UNREGISTER;
+    dev->type = DEVICE_CLASS_I2C;
+    dev->handle = NULL;
+
+    return device_register(dev, name, flag);
+}
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @param msgs 
+ * @param num 
+ * @return uint32_t 
+ */
+uint32_t i2c_transfer(struct device *dev, i2c_msg_t msgs[], uint32_t num)
+{
+    i2c_msg_t *msg;
+    I2C_Transfer_Cfg i2cCfg;
+
+    i2c_device_t *i2c_device = (i2c_device_t *)dev;
+
+    if (i2c_device->mode == I2C_HW_MODE)
+    {
+        for (uint32_t i = 0; i < num; i++)
+        {
+            msg = &msgs[i];
+            i2cCfg.slaveAddr = msg->slaveaddr;
+            i2cCfg.stopEveryByte = DISABLE;
+            i2cCfg.subAddr = msg->subaddr;
+            i2cCfg.dataSize = msg->len;
+            i2cCfg.data = msg->buf;
+
+            if (msg->flags & SUB_ADDR_0BYTE)
+            {
+                i2cCfg.subAddrSize = 0;
+            }
+            else if (msg->flags & SUB_ADDR_1BYTE)
+            {
+                i2cCfg.subAddrSize = 1;
+            }
+            else if (msg->flags & SUB_ADDR_2BYTE)
+            {
+                i2cCfg.subAddrSize = 2;
+            }
+
+            if ((msg->flags & I2C_RW_MASK) == I2C_WR)
+            {
+                return I2C_MasterSendBlocking(i2c_device->id, &i2cCfg);
+            }
+            else if ((msg->flags & I2C_RW_MASK) == I2C_RD)
+            {
+                return I2C_MasterReceiveBlocking(i2c_device->id, &i2cCfg);
+            }
+
+        }
+    }
+    else
+    {
+
+    }
+    return 0;
+}
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/src/hal_i2s.c b/drivers/bl702_driver/hal_drv/src/hal_i2s.c
new file mode 100644
index 00000000..aafff4c6
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/src/hal_i2s.c
@@ -0,0 +1,365 @@
+/**
+ * @file hal_i2s.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_i2s.h"
+#include "hal_dma.h"
+#include "bl702_i2s.h"
+#include "bl702_glb.h"
+#include "i2s_config.h"
+
+i2s_device_t i2sx_device[I2S_MAX_INDEX] = 
+{
+#ifdef BSP_USING_I2S0
+    I2S0_CONFIG,
+#endif
+};
+
+int i2s_open(struct device *dev, uint16_t oflag)
+{
+    i2s_device_t *i2s_device = (i2s_device_t *)dev;
+    I2S_CFG_Type i2sCfg;
+    I2S_FifoCfg_Type fifoCfg;
+
+    /*Finding the right frequency*/
+    if(12288000 %(i2s_device->sampl_freq_hz) == 0)
+    {
+        i2sCfg.audioFreqHz = 12288000;
+        PDS_Set_Audio_PLL_Freq(AUDIO_PLL_12288000_HZ);
+    }
+    else if(11289600%(i2s_device->sampl_freq_hz) == 0)
+    {
+        i2sCfg.audioFreqHz = 11289600;
+        PDS_Set_Audio_PLL_Freq(AUDIO_PLL_11289600_HZ);
+    }
+    else if(5644800%(i2s_device->sampl_freq_hz) == 0)
+    {
+        i2sCfg.audioFreqHz = 5644800;
+        PDS_Set_Audio_PLL_Freq(AUDIO_PLL_5644800_HZ);
+    }
+    else
+    {
+        switch (I2S_ADUIO_PLL_DEFAULT)
+        {
+        case AUDIO_PLL_12288000_HZ:
+            i2sCfg.audioFreqHz = 12288000;
+            break;
+        case AUDIO_PLL_11289600_HZ:
+            i2sCfg.audioFreqHz = 11289600;
+            break;
+        case AUDIO_PLL_5644800_HZ:
+            i2sCfg.audioFreqHz = 5644800;
+            break;
+        default:
+            return ERROR;
+            break;
+        }
+        PDS_Set_Audio_PLL_Freq(I2S_ADUIO_PLL_DEFAULT);
+    }
+    i2sCfg.sampleFreqHz = i2s_device->sampl_freq_hz;
+
+    /*!< default I2S msb first */
+    i2sCfg.endianType = I2S_DATA_ENDIAN;
+
+    /* Config the I2S type */
+    switch (i2s_device->interface_mode)
+    {
+    case I2S_MODE_STD:
+        i2sCfg.modeType = I2S_MODE_I2S_LEFT;
+        i2sCfg.fsMode = I2S_FS_MODE_EVEN;
+        i2sCfg.dataOffset = 1;
+        break;
+    case I2S_MODE_LEFT:
+        i2sCfg.modeType = I2S_MODE_I2S_LEFT;
+        i2sCfg.fsMode = I2S_FS_MODE_EVEN;
+        i2sCfg.dataOffset = 0;
+        break;
+    case I2S_MODE_RIGHT:
+        i2sCfg.modeType = I2S_MODE_I2S_RIGHT;
+        i2sCfg.fsMode = I2S_FS_MODE_EVEN;
+        i2sCfg.dataOffset = 0;
+        break;
+    case I2S_MODE_DSP_A:
+        i2sCfg.modeType = I2S_MODE_I2S_DSP;
+        i2sCfg.fsMode = I2S_FS_MODE_1T;
+        i2sCfg.dataOffset = 1;
+        break;
+    case I2S_MODE_DSP_B:
+        i2sCfg.modeType = I2S_MODE_I2S_DSP;
+        i2sCfg.fsMode = I2S_FS_MODE_1T;
+        i2sCfg.dataOffset = 0;
+        break;
+    default:
+        return ERROR;
+        break;
+    }
+
+    /* Config the frame/data Size */
+    switch (i2s_device->frame_size)
+    {
+    case I2S_FRAME_LEN_8:
+        i2sCfg.frameSize = I2S_SIZE_FRAME_8;
+        break;
+    case I2S_FRAME_LEN_16:
+        i2sCfg.frameSize = I2S_SIZE_FRAME_16;
+        break;
+    case I2S_FRAME_LEN_24:
+        i2sCfg.frameSize = I2S_SIZE_FRAME_24;
+        break;
+    case I2S_FRAME_LEN_32:
+        i2sCfg.frameSize = I2S_SIZE_FRAME_32;
+        break;
+    default:
+        return ERROR;
+        break;
+    }
+    switch (i2s_device->data_size)
+    {
+    case I2S_DATA_LEN_8:
+        i2sCfg.dataSize = I2S_SIZE_DATA_8;
+        break;
+    case I2S_DATA_LEN_16:
+        i2sCfg.dataSize = I2S_SIZE_DATA_16;
+        break;
+    case I2S_DATA_LEN_24:
+        i2sCfg.dataSize = I2S_SIZE_DATA_24;
+        break;
+    case I2S_DATA_LEN_32:
+        i2sCfg.dataSize = I2S_SIZE_DATA_32;
+        break;
+    default:
+        return ERROR;
+        break;
+
+    }
+
+    fifoCfg.lRMerge = DISABLE;
+    fifoCfg.frameDataExchange = DISABLE;
+
+    /* Config the Channel number */
+    switch (i2s_device->channel_num)
+    {
+    case I2S_FS_CHANNELS_NUM_MONO:
+        i2sCfg.monoMode = ENABLE;
+        i2sCfg.fsChannel = I2S_FS_CHANNELS_2; 
+        i2sCfg.monoModeChannel = I2S_MONO_CHANNEL;
+        break;
+    case I2S_FS_CHANNELS_NUM_2:
+        i2sCfg.monoMode = DISABLE;
+        i2sCfg.fsChannel = I2S_FS_CHANNELS_2; 
+        if(i2s_device->data_size==I2S_DATA_LEN_8 || i2s_device->data_size==I2S_DATA_LEN_16)
+        {
+            fifoCfg.lRMerge = ENABLE;
+            fifoCfg.frameDataExchange = I2S_LR_EXCHANGE;
+        }
+        break;
+    case I2S_FS_CHANNELS_NUM_3:
+        if((i2s_device->interface_mode !=I2S_MODE_DSP_A) && (i2s_device->interface_mode !=I2S_MODE_DSP_B))
+           return ERROR; 
+        i2sCfg.monoMode = DISABLE;
+        i2sCfg.fsChannel = I2S_FS_CHANNELS_3;
+        break;
+    case I2S_FS_CHANNELS_NUM_4:
+        if((i2s_device->interface_mode !=I2S_MODE_DSP_A) && (i2s_device->interface_mode !=I2S_MODE_DSP_B))
+           return ERROR; 
+        i2sCfg.monoMode = DISABLE;
+        i2sCfg.fsChannel = I2S_FS_CHANNELS_4;
+    default:
+        return ERROR;
+        break;
+    }
+
+    /* Config the bclk/fs invert */
+    i2sCfg.bclkInvert = I2S_BCLK_INVERT;
+    i2sCfg.fsInvert = I2S_FS_INVERT;
+
+    if(oflag & DEVICE_OFLAG_INT_TX)
+    {
+
+    }
+    if(oflag & DEVICE_OFLAG_INT_RX)
+    {
+
+    }
+
+    fifoCfg.txfifoDmaEnable = (oflag & DEVICE_OFLAG_DMA_TX)?ENABLE:DISABLE;
+    fifoCfg.rxfifoDmaEnable = (oflag & DEVICE_OFLAG_DMA_RX)?ENABLE:DISABLE;
+    fifoCfg.rxFifoLevel = i2s_device->fifo_threshold;
+
+    /* I2S Init */
+    I2S_Disable();
+    I2S_Init(&i2sCfg);
+    I2S_FifoConfig(&fifoCfg);
+    I2S_Enable(I2S_ROLE_MASTER);
+    return SUCCESS;
+}
+
+int i2s_close(struct device *dev)
+{
+    //i2s_device_t* uart_device = (i2s_device_t*)dev;
+    I2S_Disable();
+    return SUCCESS;
+}
+
+int i2s_control(struct device *dev, int cmd, void *args)
+{
+    i2s_device_t* i2s_device = (i2s_device_t*)dev;
+    switch (cmd)
+    {
+    case DEVICE_CTRL_SET_INT:
+        for(uint16_t i=0,j=1; i<8; i++,j<<=1)
+        {
+            if((uint32_t)args & j)
+            {
+                /* code */
+            }
+        }
+        break;
+    case DEVICE_CTRL_CLR_INT:
+        for(uint16_t i=0,j=1; i<8; i++,j<<=1)
+        {
+            if((uint32_t)args & j)
+            {
+                /* code */
+            }
+        }
+        break;
+    case DEVICE_CTRL_GET_INT:
+        /* code */
+        break;
+    case DEVICE_CTRL_RESUME:
+        /* code */
+        break;
+    case DEVICE_CTRL_SUSPEND:
+        /* code */
+        break;
+    case DEVICE_CTRL_CONFIG:
+        /* code */
+        break;
+    case DEVICE_CTRL_I2S_ATTACH_TX_DMA /* constant-expression */:
+        i2s_device->tx_dma = (struct device *)args;
+        break;
+    case DEVICE_CTRL_I2S_ATTACH_RX_DMA /* constant-expression */:
+        i2s_device->rx_dma = (struct device *)args;
+        break;
+    case DEVICE_CTRL_GET_CONFIG:
+        switch((uint32_t)args)
+        {
+        case I2S_GET_TX_FIFO_CMD: 
+            return I2S_GetTxFIFO_AvlCnt();
+        case I2S_GET_RX_FIFO_CMD: 
+            return I2S_GetRxFIFO_AvlCnt();
+        default:
+            break;
+        }
+        break;
+    default:
+        return ERROR;
+        break;
+    }
+    return SUCCESS;
+}
+
+
+int i2s_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size)
+{
+    i2s_device_t* i2s_device = (i2s_device_t*)dev;
+    if (dev->oflag & DEVICE_OFLAG_DMA_TX)
+    {
+        struct device *dma_ch = (struct device *)i2s_device->tx_dma;
+        if (!dma_ch)
+            return -1;
+            
+        if(i2s_device->id == 0)
+        {
+            dma_reload(dma_ch, (uint32_t)buffer, (uint32_t)DMA_ADDR_I2S_TDR, size);
+            dma_channel_start(dma_ch);
+        }
+        else if(i2s_device->id == 1)
+        {
+            dma_reload(dma_ch, (uint32_t)buffer, (uint32_t)DMA_ADDR_I2S_TDR, size);
+            dma_channel_start(dma_ch);
+        }
+        return 0;
+    }
+    else
+    return 0;
+}
+
+int i2s_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size)
+{
+    i2s_device_t* i2s_device = (i2s_device_t*)dev;
+    if (dev->oflag & DEVICE_OFLAG_DMA_RX)
+    {
+        struct device *dma_ch = (struct device *)i2s_device->rx_dma;
+        if (!dma_ch)
+            return -1;
+            
+        if(i2s_device->id == 0)
+        {
+            dma_reload(dma_ch, (uint32_t)DMA_ADDR_I2S_RDR, (uint32_t)buffer, size);
+            dma_channel_start(dma_ch);
+        }
+        else if(i2s_device->id == 1)
+        {
+            dma_reload(dma_ch, (uint32_t)DMA_ADDR_I2S_RDR, (uint32_t)buffer, size);
+            dma_channel_start(dma_ch);
+        }
+        return 0;
+    }
+    else
+    return 0;
+}
+
+int i2s_register(enum i2s_index_type index,const char *name,uint16_t flag)
+{
+    struct device *dev;
+
+    if (I2S_MAX_INDEX == 0)
+        return -DEVICE_EINVAL;
+
+    dev = &(i2sx_device[index].parent);
+
+    dev->open = i2s_open;
+    dev->close = i2s_close;
+    dev->control = i2s_control;
+    dev->write = i2s_write;
+    dev->read = i2s_read;
+
+    dev->status = DEVICE_UNREGISTER;
+    dev->type = DEVICE_CLASS_I2S;   
+    dev->handle = NULL; 
+
+    return device_register(dev,name,flag);
+
+}
+
+void i2s_isr(i2s_device_t *handle)
+{
+    return ;
+}
+
+void I2S_IRQ(void)
+{
+    i2s_isr(&i2sx_device[0]);
+}
+
+
diff --git a/drivers/bl702_driver/hal_drv/src/hal_mtimer.c b/drivers/bl702_driver/hal_drv/src/hal_mtimer.c
new file mode 100644
index 00000000..9751633f
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/src/hal_mtimer.c
@@ -0,0 +1,176 @@
+/**
+ * @file hal_mtimer.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_mtimer.h"
+#include "bl702_glb.h"
+/**
+ * @brief 
+ * 
+ */
+void mtimer_init(void)
+{
+    NVIC_DisableIRQ(MTIME_IRQn);
+    /* Set MTimer the same frequency as SystemCoreClock */
+    GLB_Set_MTimer_CLK(1, GLB_MTIMER_CLK_BCLK, 7);
+    *(volatile uint64_t *)(CLIC_CTRL_ADDR + CLIC_MTIME) = 0;
+}
+/**
+ * @brief 
+ * 
+ */
+void mtimer_deinit()
+{
+    NVIC_DisableIRQ(MTIME_IRQn);
+    mtimer_stop();
+}
+/**
+ * @brief 
+ * 
+ * @param time 
+ * @param interruptFun 
+ */
+void mtimer_set_alarm_time(uint64_t time, void (*interruptFun)(void))
+{
+    uint32_t tmp;
+
+    tmp = (SystemCoreClockGet() / (GLB_Get_BCLK_Div() + 1));
+    tmp = (tmp >> 3) / 1000;
+
+    time = time * tmp;
+
+    *(volatile uint64_t *)(CLIC_CTRL_ADDR + CLIC_MTIMECMP) = (*(volatile uint64_t *)(CLIC_CTRL_ADDR + CLIC_MTIME) + time);
+
+    Interrupt_Handler_Register(MTIME_IRQn, interruptFun);
+    NVIC_EnableIRQ(MTIME_IRQn);
+}
+/**
+ * @brief 
+ * 
+ */
+void mtimer_start()
+{
+    *(volatile uint64_t *)(CLIC_CTRL_ADDR + CLIC_MTIME) = 0;
+}
+/**
+ * @brief 
+ * 
+ */
+void mtimer_stop()
+{
+}
+/**
+ * @brief 
+ * 
+ */
+void mtimer_clear_time()
+{
+    *(volatile uint64_t *)(CLIC_CTRL_ADDR + CLIC_MTIME) = 0;
+}
+
+/**
+ * @brief 
+ * 
+ * @return uint64_t 
+ */
+uint64_t mtimer_get_time_ms()
+{
+    return mtimer_get_time_us()/1000;
+}
+/**
+ * @brief 
+ * 
+ * @return uint64_t 
+ */
+uint64_t mtimer_get_time_us()
+{
+
+    uint32_t tmpValLow, tmpValHigh, tmpValLow1, tmpValHigh1;
+    uint32_t cnt = 0, tmp;
+
+    do
+    {
+        tmpValLow = *(volatile uint32_t *)(CLIC_CTRL_ADDR + CLIC_MTIME);
+        tmpValHigh = *(volatile uint32_t *)(CLIC_CTRL_ADDR + CLIC_MTIME + 4);
+        tmpValLow1 = *(volatile uint32_t *)(CLIC_CTRL_ADDR + CLIC_MTIME);
+        tmpValHigh1 = *(volatile uint32_t *)(CLIC_CTRL_ADDR + CLIC_MTIME + 4);
+        cnt++;
+        if (cnt > 4)
+        {
+            break;
+        }
+    } while (tmpValLow > tmpValLow1 || tmpValHigh > tmpValHigh1);
+
+    tmp = (SystemCoreClockGet() / (GLB_Get_BCLK_Div() + 1));
+    tmp = (tmp >> 3) / 1000 / 1000;
+
+    if (tmpValHigh1 == 0)
+    {
+        return (uint64_t)(tmpValLow1 / tmp);
+    }
+    else
+    {
+        return (((uint64_t)tmpValHigh1 << 32) + tmpValLow1) / tmp;
+    }
+}
+/**
+ * @brief 
+ * 
+ * @param time 
+ */
+void mtimer_delay_ms(uint32_t time)
+{
+    uint64_t cnt = 0;
+    uint32_t clock = SystemCoreClockGet();
+    uint64_t startTime = mtimer_get_time_ms();
+
+    while (mtimer_get_time_ms() - startTime < time)
+    {
+        cnt++;
+        /* assume BFLB_BSP_Get_Time_Ms take 32 cycles*/
+        if (cnt > (time * (clock >> (10 + 5))) * 2)
+        {
+            break;
+        }
+    }
+}
+/**
+ * @brief 
+ * 
+ * @param time 
+ */
+void mtimer_delay_us(uint32_t time)
+{
+    uint64_t cnt = 0;
+    uint32_t clock = SystemCoreClockGet();
+    uint64_t startTime = mtimer_get_time_us();
+
+    while (mtimer_get_time_us() - startTime < time)
+    {
+        cnt++;
+        /* assume BFLB_BSP_Get_Time_Ms take 32 cycles*/
+        if (cnt > (time * (clock >> (10 + 5))) * 2)
+        {
+            break;
+        }
+    }
+}
+
diff --git a/drivers/bl702_driver/hal_drv/src/hal_pwm.c b/drivers/bl702_driver/hal_drv/src/hal_pwm.c
new file mode 100644
index 00000000..a29796d1
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/src/hal_pwm.c
@@ -0,0 +1,203 @@
+/**
+ * @file hal_pwm.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_pwm.h"
+#include "hal_gpio.h"
+#include "bl702_pwm.h"
+#include "bl702_gpio.h"
+#include "bl702_glb.h"
+#include "bl702_config.h"
+#include "pwm_config.h"
+
+pwm_device_t pwmx_device[PWM_MAX_INDEX] = {
+#ifdef BSP_USING_PWM0
+    PWM_CONFIG_0,
+#endif
+#ifdef BSP_USING_PWM1
+    PWM_CONFIG_1,
+#endif
+#ifdef BSP_USING_PWM2
+    PWM_CONFIG_2,
+#endif
+#ifdef BSP_USING_PWM3
+    PWM_CONFIG_3,
+#endif
+#ifdef BSP_USING_PWM4
+    PWM_CONFIG_4,
+#endif
+};
+
+typedef enum{
+    HZ=0,
+    KHZ,
+    MHZ,
+}frequency_unit_t;
+
+static void pwm_set(struct device *dev, PWM_CH_CFG_Type * pwmCfg ,uint32_t freq ,frequency_unit_t unit, uint8_t duty){
+    
+    pwm_device_t *pwm_device = (pwm_device_t *)dev;
+    
+
+    switch(unit)
+    {
+    case HZ:
+        if(freq <= 70){
+            pwmCfg->clkDiv = 1200;
+            pwmCfg->period = 60000/freq;
+            pwmCfg->threshold2 = 600*duty/freq;
+        }else if(freq <= 140){
+            pwmCfg->clkDiv = 16;
+            pwmCfg->period = 4500000/freq;
+            pwmCfg->threshold2 = 45000*duty/freq;
+        }else if(freq <= 275){
+            pwmCfg->clkDiv = 8;
+            pwmCfg->period = 9000000/freq;
+            pwmCfg->threshold2 = 90000*duty/freq;
+        }else if(freq <=550){
+            pwmCfg->clkDiv = 4;
+            pwmCfg->period = 18000000/freq;
+            pwmCfg->threshold2 = 180000*duty/freq;
+        }else if(freq <=1100){
+            pwmCfg->clkDiv = 2;
+            pwmCfg->period = 36000000/freq;
+            pwmCfg->threshold2 = 360000*duty/freq;
+        }else{
+            pwmCfg->clkDiv = 1;
+            pwmCfg->period = 72000000/freq;
+            pwmCfg->threshold2 = 720000*duty/freq;
+        }
+        break;
+    case KHZ:
+        if(freq <= 2){
+            pwmCfg->clkDiv = 2;
+            pwmCfg->period = 36000/freq;
+            pwmCfg->threshold2 = 360*duty/freq;
+        }else{
+            pwmCfg->clkDiv = 1;
+            pwmCfg->period = 72000/freq;
+            pwmCfg->threshold2 = 720*duty/freq;
+        }
+        break;
+    case MHZ:
+        pwmCfg->clkDiv = 1;
+        pwmCfg->period = 72/freq;
+        pwmCfg->threshold2 = 72*duty/freq/100;
+        break;
+    default:
+        break;
+        }
+
+    PWM_Channel_Set_Div(pwm_device->ch  ,pwmCfg->clkDiv);
+    PWM_Channel_Update(pwm_device->ch  ,pwmCfg->period,0,pwmCfg->threshold2);
+    
+}
+
+int pwm_open(struct device *dev, uint16_t oflag)
+{
+    PWM_CH_CFG_Type pwmCfg = {
+		0,                                   			     /* PWM channel */
+		PWM_CLK_BCLK,                                        /* PWM Clock */
+		PWM_STOP_GRACEFUL,                                   /* PWM Stop Mode */
+		PWM_POL_NORMAL,                                      /* PWM mode type */
+		1,                                                   /* PWM clkDiv num */
+		100,                                                 /* PWM period set */
+		0,                                                   /* PWM threshold1 num */
+		50,                                                  /* PWM threshold2 num */
+		0,                                                   /* PWM interrupt pulse count */
+	};
+    pwm_device_t *pwm_device = (pwm_device_t *)dev;
+
+    pwmCfg.ch = pwm_device->ch;
+    /* todo clk init at clock tree now clk fix set as bclk*/
+    pwmCfg.clk = PWM_CLK_BCLK;
+
+    pwmCfg.stopMode = PWM_STOP_MODE_SEL;
+    pwmCfg.pol = PWM_POL_SEL;
+
+
+    if(pwm_device->frequency < 1000){
+        pwm_set(dev,&pwmCfg,pwm_device->frequency,HZ,pwm_device->dutyCycle);
+    }else if(pwm_device->frequency < 999999){
+        pwm_set(dev,&pwmCfg,pwm_device->frequency /1000,KHZ,pwm_device->dutyCycle);
+    }else{
+        pwm_set(dev,&pwmCfg,pwm_device->frequency /1000000,MHZ,pwm_device->dutyCycle);
+    }
+	
+    PWM_Channel_Init(&pwmCfg);
+    PWM_Channel_Enable(pwm_device->ch);
+    return 0;
+}
+int pwm_close(struct device *dev)
+{
+    pwm_device_t *pwm_device = (pwm_device_t *)dev;
+    PWM_Channel_Disable(pwm_device->ch);
+    return 0;
+}
+
+int pwm_control(struct device *dev, int cmd, void *args)
+{
+    pwm_device_t *pwm_device = (pwm_device_t *)dev;
+    pwm_config_t *pwm_config = (pwm_config_t *)args;
+    PWM_CH_CFG_Type pwmCfg;
+    switch (cmd)
+    {
+    case DEVICE_CTRL_CONFIG/* constant-expression */:
+        if(pwm_device->frequency < 1000){
+            pwm_set(dev,&pwmCfg,pwm_config->frequency,HZ,pwm_config->dutyCycle);
+        }else if(pwm_device->frequency < 999999){
+            pwm_set(dev,&pwmCfg,pwm_config->frequency /1000,KHZ,pwm_config->dutyCycle);
+        }else{
+            pwm_set(dev,&pwmCfg,pwm_config->frequency /1000000,MHZ,pwm_config->dutyCycle);
+        }
+        break;
+    case DEVICE_CTRL_RESUME /* constant-expression */:
+        PWM_Channel_Enable(pwm_device->ch);
+        break;
+    case DEVICE_CTRL_SUSPEND /* constant-expression */:
+        PWM_Channel_Disable(pwm_device->ch);
+        break;    
+    default:
+        break;
+    }
+
+    return 0;
+}
+
+
+void pwm_register(enum pwm_index_type index, const char *name, uint16_t flag)
+{
+    struct device *dev;
+
+    dev = &(pwmx_device[index].parent);
+
+    dev->open = pwm_open;
+    dev->close = pwm_close;
+    dev->control = pwm_control;
+    dev->write = NULL;
+    dev->read = NULL;
+
+    dev->status = DEVICE_UNREGISTER;
+    dev->type = DEVICE_CLASS_PWM;
+    dev->handle = NULL;
+
+    device_register(dev, name, flag);
+}
diff --git a/drivers/bl702_driver/hal_drv/src/hal_spi.c b/drivers/bl702_driver/hal_drv/src/hal_spi.c
new file mode 100644
index 00000000..9f494c16
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/src/hal_spi.c
@@ -0,0 +1,482 @@
+/**
+ * @file hal_spi.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_spi.h"
+#include "hal_dma.h"
+#include "hal_gpio.h"
+#include "bl702_glb.h"
+#include "bl702_spi.h"
+#include "spi_config.h"
+
+#ifdef BSP_USING_SPI0
+void SPI0_IRQ(void);
+#endif
+
+spi_device_t spix_device[SPI_MAX_INDEX] =
+{
+#ifdef BSP_USING_SPI0
+    SPI0_CONFIG,
+#endif
+};
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @param oflag 
+ * @return int 
+ */
+int spi_open(struct device *dev, uint16_t oflag)
+{
+    spi_device_t *spi_device = (spi_device_t *)dev;
+    SPI_CFG_Type spiCfg;
+    SPI_FifoCfg_Type fifoCfg;
+#if SPI_SWAP_ENABLE
+    GLB_Swap_SPI_0_MOSI_With_MISO(ENABLE);
+#endif
+
+    SPI_IntMask(spi_device->id, SPI_INT_ALL, MASK);
+    /* Enable uart interrupt*/
+    NVIC_DisableIRQ(SPI_IRQn);
+
+    SPI_Disable(spi_device->id, spi_device->mode);
+
+    GLB_Set_SPI_0_ACT_MOD_Sel(spi_device->mode);
+    GLB_Set_SPI_CLK(ENABLE, 0);
+    /* Set SPI clock */
+    SPI_ClockCfg_Type clockCfg =
+    {
+        2,  /* Length of start condition */
+        2,  /* Length of stop condition */
+        2, /* Length of data phase 0,affecting clock */
+        2, /* Length of data phase 1,affecting clock */
+        2   /* Length of interval between frame */
+    };
+
+    if (spi_device->clk > 72 * 1000000)
+        return -1;
+
+    uint8_t length = 72 * 1000000 / spi_device->clk;
+
+    if (!(length % 2))
+    {
+        clockCfg.dataPhase0Len = length / 2;
+        clockCfg.dataPhase1Len = length / 2;
+    }
+    else
+    {
+        clockCfg.dataPhase0Len = length % 2;
+        clockCfg.dataPhase1Len = length / 2;
+    }
+    SPI_ClockConfig(spi_device->id, &clockCfg);
+
+    spiCfg.deglitchEnable = SPI_DEGLITCH_ENABLE;
+    spiCfg.continuousEnable = SPI_CONTINUE_TRANSFER_ENABLE;
+
+    if (spi_device->direction == SPI_LSB_BYTE0_DIRECTION_FIRST)
+    {
+        spiCfg.bitSequence = SPI_BIT_INVERSE_LSB_FIRST;
+        spiCfg.byteSequence = SPI_BYTE_INVERSE_BYTE0_FIRST;
+    }
+    else if (spi_device->direction == SPI_LSB_BYTE3_DIRECTION_FIRST)
+    {
+        spiCfg.bitSequence = SPI_BIT_INVERSE_LSB_FIRST;
+        spiCfg.byteSequence = SPI_BYTE_INVERSE_BYTE3_FIRST;
+    }
+    else if (spi_device->direction == SPI_MSB_BYTE0_DIRECTION_FIRST)
+    {
+        spiCfg.bitSequence = SPI_BIT_INVERSE_MSB_FIRST;
+        spiCfg.byteSequence = SPI_BYTE_INVERSE_BYTE0_FIRST;
+    }
+    else if (spi_device->direction == SPI_MSB_BYTE3_DIRECTION_FIRST)
+    {
+        spiCfg.bitSequence = SPI_BIT_INVERSE_MSB_FIRST;
+        spiCfg.byteSequence = SPI_BYTE_INVERSE_BYTE3_FIRST;
+    }
+
+    spiCfg.clkPolarity = spi_device->clk_polaraity;
+    spiCfg.clkPhaseInv = spi_device->clk_phase;
+    spiCfg.frameSize = spi_device->datasize;
+
+    /* SPI config */
+    SPI_Init(spi_device->id, &spiCfg);
+
+    fifoCfg.txFifoThreshold = spi_device->fifo_threshold;
+    fifoCfg.txFifoDmaEnable = DISABLE;
+    fifoCfg.rxFifoThreshold = spi_device->fifo_threshold;
+    fifoCfg.rxFifoDmaEnable = DISABLE;
+
+    if (oflag & DEVICE_OFLAG_INT_TX || oflag & DEVICE_OFLAG_INT_RX)
+    {
+#ifdef BSP_USING_SPI0
+        Interrupt_Handler_Register(SPI_IRQn, SPI0_IRQ);
+#endif
+#ifdef BSP_USING_SPI1
+        Interrupt_Handler_Register(SPI_IRQn, UART1_IRQ);
+#endif
+    }
+    if (oflag & DEVICE_OFLAG_DMA_TX)
+    {
+        fifoCfg.txFifoDmaEnable = ENABLE;
+    }
+    if (oflag & DEVICE_OFLAG_DMA_RX)
+    {
+        fifoCfg.rxFifoDmaEnable = ENABLE;
+    }
+    SPI_FifoConfig(spi_device->id, &fifoCfg);
+    /* Enable spi master mode */
+    SPI_Enable(spi_device->id, spi_device->mode);
+
+    return 0;
+}
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @return int 
+ */
+int spi_close(struct device *dev)
+{
+    spi_device_t *spi_device = (spi_device_t *)dev;
+
+    SPI_Disable(spi_device->id, spi_device->mode);
+    return 0;
+}
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @param cmd 
+ * @param args 
+ * @return int 
+ */
+int spi_control(struct device *dev, int cmd, void *args)
+{
+    spi_device_t *spi_device = (spi_device_t *)dev;
+
+    switch (cmd)
+    {
+        case DEVICE_CTRL_SET_INT /* constant-expression */:
+
+            break;
+        case DEVICE_CTRL_CLR_INT /* constant-expression */:
+            /* code */
+            break;
+        case DEVICE_CTRL_GET_INT /* constant-expression */:
+            /* code */
+            break;
+        case DEVICE_CTRL_RESUME:
+            /* code */
+            SPI_Enable(spi_device->id, spi_device->mode);
+            break;
+        case DEVICE_CTRL_SUSPEND:
+            SPI_Disable(spi_device->id, spi_device->mode);
+            break;            
+        case DEVICE_CTRL_CONFIG /* constant-expression */:
+            /* code */
+            break;
+        case DEVICE_CTRL_SPI_ATTACH_TX_DMA_CMD /* constant-expression */:
+            spi_device->tx_dma = (struct device *)args;
+            break;
+        case DEVICE_CTRL_SPI_ATTACH_RX_DMA_CMD /* constant-expression */:
+            spi_device->rx_dma = (struct device *)args;
+            break;
+        case DEVICE_CTRL_SPI_CONFIG_CLOCK_CMD /* constant-expression */:
+            SPI_SetClock(spi_device->id,(uint32_t)args);
+            break;
+        default:
+            break;
+    }
+
+    return 0;
+}
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @param pos 
+ * @param buffer 
+ * @param size 
+ * @return int 
+ */
+int spi_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size)
+{
+    spi_device_t *spi_device = (spi_device_t *)dev;
+
+    if (dev->oflag & DEVICE_OFLAG_DMA_TX)
+    {
+        struct device *dma_ch = (struct device *)spi_device->tx_dma;
+        if (!dma_ch)
+            return -1;
+        if (spi_device->id == 0)
+        {
+            dma_reload(dma_ch, (uint32_t)buffer, (uint32_t)DMA_ADDR_SPI_TDR, size);
+            dma_channel_start(dma_ch);
+        }
+        return 0;
+    }
+    else
+    {
+        if (spi_device->datasize == SPI_DATASIZE_32BIT)
+        {
+            SPI_Send_32bits(spi_device->id, (uint32_t *)buffer, size, SPI_TIMEOUT_DISABLE);
+            return 0;
+        }
+        else if (spi_device->datasize == SPI_DATASIZE_24BIT)
+        {
+
+        }
+        else if (spi_device->datasize == SPI_DATASIZE_16BIT)
+        {
+            uint32_t residue32 = size % 2;
+            uint32_t trade32 = size / 2;
+            SPI_Send_32bits(spi_device->id, (uint32_t *)buffer, trade32, SPI_TIMEOUT_DISABLE);
+            buffer += sizeof(uint32_t) * trade32;
+            SPI_Send_16bits(spi_device->id, (uint16_t *)buffer, residue32, SPI_TIMEOUT_DISABLE);
+            return 0;
+        }
+        else if (spi_device->datasize == SPI_DATASIZE_8BIT)
+        {
+            uint32_t residue32 = size % 4;
+            uint32_t trade32 = size / 4;
+            SPI_Send_32bits(spi_device->id, (uint32_t *)buffer, trade32, SPI_TIMEOUT_DISABLE);
+            buffer += sizeof(uint32_t) * trade32;
+
+            uint32_t residue16 = residue32 % 2;
+            uint32_t trade16 = residue32 / 2;
+            SPI_Send_16bits(spi_device->id, (uint16_t *)buffer, trade16, SPI_TIMEOUT_DISABLE);
+            buffer += sizeof(uint16_t) * trade16;
+
+            SPI_Send_8bits(spi_device->id, (uint8_t *)buffer, residue16, SPI_TIMEOUT_DISABLE);
+            return 0;
+        }
+    }
+    return -2;
+}
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @param pos 
+ * @param buffer 
+ * @param size 
+ * @return int 
+ */
+int spi_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size)
+{
+    spi_device_t *spi_device = (spi_device_t *)dev;
+    if (dev->oflag & DEVICE_OFLAG_DMA_RX)
+    {
+        struct device *dma_ch = (struct device *)spi_device->rx_dma;
+        if (!dma_ch)
+            return -1;
+        if (spi_device->id == 0)
+        {
+            dma_reload(dma_ch, (uint32_t)DMA_ADDR_SPI_RDR, (uint32_t)buffer, size);
+            dma_channel_start(dma_ch);
+        }
+        return 0;
+    }
+    else
+    {
+
+    }
+
+    return -2;
+}
+/**
+ * @brief 
+ * 
+ * @param index 
+ * @param name 
+ * @param flag 
+ * @return int 
+ */
+int spi_register(enum spi_index_type index, const char *name, uint16_t flag)
+{
+    struct device *dev;
+
+    if (SPI_MAX_INDEX == 0)
+        return -DEVICE_EINVAL;
+
+    dev = &(spix_device[index].parent);
+
+    dev->open = spi_open;
+    dev->close = spi_close;
+    dev->control = spi_control;
+    dev->write = spi_write;
+    dev->read = spi_read;
+
+    dev->status = DEVICE_UNREGISTER;
+    dev->type = DEVICE_CLASS_SPI;
+    dev->handle = NULL;
+
+    return device_register(dev, name, flag);
+}
+
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @param buffer 
+ * @param size 
+ * @param type 
+ * @return int 
+ */
+int spi_transmit(struct device *dev, void *buffer, uint32_t size, uint8_t type)
+{
+    spi_device_t *spi_device = (spi_device_t *)dev;
+    if (type == 0)
+    {
+        return SPI_Send_8bits(spi_device->id, (uint8_t *)buffer, size, SPI_TIMEOUT_DISABLE);
+    }
+    else if (type == 1)
+    {
+        return SPI_Send_16bits(spi_device->id, (uint16_t *)buffer, size, SPI_TIMEOUT_DISABLE);
+    }
+    else if (type == 2)
+    {
+        return SPI_Send_24bits(spi_device->id, (uint32_t *)buffer, size, SPI_TIMEOUT_DISABLE);
+    }
+    else if (type == 3)
+    {
+        return SPI_Send_32bits(spi_device->id, (uint32_t *)buffer, size, SPI_TIMEOUT_DISABLE);
+    }
+    return -1;
+}
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @param buffer 
+ * @param size 
+ * @param type 
+ * @return int 
+ */
+int spi_receive(struct device *dev, void *buffer, uint32_t size, uint8_t type)
+{
+    spi_device_t *spi_device = (spi_device_t *)dev;
+    if (type == 0)
+    {
+        return SPI_Recv_8bits(spi_device->id, (uint8_t *)buffer, size, SPI_TIMEOUT_DISABLE);
+    }
+    else if (type == 1)
+    {
+        return SPI_Recv_16bits(spi_device->id, (uint16_t *)buffer, size, SPI_TIMEOUT_DISABLE);
+    }
+    else if (type == 2)
+    {
+        return SPI_Recv_24bits(spi_device->id, (uint32_t *)buffer, size, SPI_TIMEOUT_DISABLE);
+    }
+    else if (type == 3)
+    {
+        return SPI_Recv_32bits(spi_device->id, (uint32_t *)buffer, size, SPI_TIMEOUT_DISABLE);
+    }
+    return -1;
+}
+
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @param send_buf 
+ * @param recv_buf 
+ * @param length 
+ * @param type 
+ * @return int 
+ */
+int spi_transmit_receive(struct device *dev, const void *send_buf, void *recv_buf, uint32_t length, uint8_t type)
+{
+    spi_device_t *spi_device = (spi_device_t *)dev;
+    if (type == 0)
+    {
+        return SPI_SendRecv_8bits(spi_device->id, (uint8_t *)send_buf, (uint8_t *)recv_buf, length, SPI_TIMEOUT_DISABLE);
+    }
+    else if (type == 1)
+    {
+        return SPI_SendRecv_16bits(spi_device->id, (uint16_t *)send_buf, (uint16_t *)recv_buf, length, SPI_TIMEOUT_DISABLE);
+    }
+    else if (type == 2)
+    {
+        return SPI_SendRecv_24bits(spi_device->id, (uint32_t *)send_buf, (uint32_t *)recv_buf, length, SPI_TIMEOUT_DISABLE);
+    }
+    else if (type == 3)
+    {
+        return SPI_SendRecv_32bits(spi_device->id, (uint32_t *)send_buf, (uint32_t *)recv_buf, length, SPI_TIMEOUT_DISABLE);
+    }
+    return -1;
+}
+/**
+ * @brief 
+ * 
+ * @param handle 
+ */
+void spi_isr(spi_device_t *handle)
+{
+    uint32_t tmpVal;
+    uint32_t SPIx = SPI_BASE + handle->id * 0x100;
+
+    tmpVal = BL_RD_REG(SPIx, SPI_INT_STS);
+
+    if (!handle->parent.callback)
+        return;
+
+    /* Transfer end interrupt,shared by both master and slave mode */
+    if (BL_IS_REG_BIT_SET(tmpVal, SPI_END_INT) && !BL_IS_REG_BIT_SET(tmpVal, SPI_CR_SPI_END_MASK))
+    {
+        BL_WR_REG(SPIx, SPI_INT_STS, BL_SET_REG_BIT(tmpVal, SPI_CR_SPI_END_CLR));
+        handle->parent.callback(&handle->parent, NULL, 0, SPI_INT_END);
+    }
+    /* TX fifo ready interrupt(fifo count > fifo threshold) */
+    if (BL_IS_REG_BIT_SET(tmpVal, SPI_TXF_INT) && !BL_IS_REG_BIT_SET(tmpVal, SPI_CR_SPI_TXF_MASK))
+    {
+        handle->parent.callback(&handle->parent, NULL, 0, SPI_INT_TX_FIFO_REQ);
+    }
+    /*  RX fifo ready interrupt(fifo count > fifo threshold) */
+    if (BL_IS_REG_BIT_SET(tmpVal, SPI_RXF_INT) && !BL_IS_REG_BIT_SET(tmpVal, SPI_CR_SPI_RXF_MASK))
+    {
+        handle->parent.callback(&handle->parent, NULL, 0, SPI_INT_RX_FIFO_REQ);
+    }
+    /* Slave mode transfer time-out interrupt,triggered when bus is idle for the given value */
+    if (BL_IS_REG_BIT_SET(tmpVal, SPI_STO_INT) && !BL_IS_REG_BIT_SET(tmpVal, SPI_CR_SPI_STO_MASK))
+    {
+        BL_WR_REG(SPIx, SPI_INT_STS, BL_SET_REG_BIT(tmpVal, SPI_CR_SPI_STO_CLR));
+        handle->parent.callback(&handle->parent, NULL, 0, SPI_INT_SLAVE_TIMEOUT);
+    }
+    /* Slave mode tx underrun error interrupt,trigged when tx is not ready during transfer */
+    if (BL_IS_REG_BIT_SET(tmpVal, SPI_TXU_INT) && !BL_IS_REG_BIT_SET(tmpVal, SPI_CR_SPI_TXU_MASK))
+    {
+        BL_WR_REG(SPIx, SPI_INT_STS, BL_SET_REG_BIT(tmpVal, SPI_CR_SPI_TXU_CLR));
+        handle->parent.callback(&handle->parent, NULL, 0, SPI_INT_SLAVE_UNDERRUN);
+    }
+    /* TX/RX fifo overflow/underflow interrupt */
+    if (BL_IS_REG_BIT_SET(tmpVal, SPI_FER_INT) && !BL_IS_REG_BIT_SET(tmpVal, SPI_CR_SPI_FER_MASK))
+    {
+        handle->parent.callback(&handle->parent, NULL, 0, SPI_INT_FIFO_ERROR);
+    }
+}
+
+#ifdef BSP_USING_SPI0
+void SPI0_IRQ()
+{
+    spi_isr(&spix_device[SPI0_INDEX]);
+}
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/src/hal_timer.c b/drivers/bl702_driver/hal_drv/src/hal_timer.c
new file mode 100644
index 00000000..8ec130fa
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/src/hal_timer.c
@@ -0,0 +1,140 @@
+/**
+ * @file hal_timer.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_timer.h"
+#include "bl702_timer.h"
+
+// extern struct device * timer;
+// /****************************************************************************/ /**
+//  * @brief  TIMER match 0 interrupt calllbaeck funtion
+//  *
+//  * @param  None
+//  *
+//  * @return None
+//  *
+// *******************************************************************************/
+// static void Timer_Match0_Cbf(void)
+// {
+//     MSG("Timer_Match0_Cbf\r\n"); //match0Arrived=1;
+//     //device_close(timer);
+// }
+
+// /****************************************************************************/ /**
+//  * @brief  TIMER match 1 interrupt calllbaeck funtion
+//  *
+//  * @param  None
+//  *
+//  * @return None
+//  *
+// *******************************************************************************/
+// static void Timer_Match1_Cbf(void)
+// {
+//     MSG("Timer_Match1_Cbf\r\n"); //match1Arrived=1;
+//   //  device_close(timer);
+// }
+
+// /****************************************************************************/ /**
+//  * @brief  TIMER match 2 interrupt calllbaeck funtion
+//  *
+//  * @param  None
+//  *
+//  * @return None
+//  *
+// *******************************************************************************/
+// static void Timer_Match2_Cbf(void)
+// {
+//     MSG("Timer_Match2_Cbf\r\n"); //match2Arrived=1;
+//     device_close(timer);
+// }
+
+int timer_open(struct device *dev, uint16_t oflag)
+{
+
+    return 0;
+}
+int timer_close(struct device *dev)
+{
+
+    return 0;
+}
+int timer_control(struct device *dev, int cmd, void *args)
+{
+
+    switch (cmd)
+    {
+    case DEVICE_CTRL_SET_INT /* constant-expression */:
+    
+        break;
+    case DEVICE_CTRL_CLR_INT /* constant-expression */:
+        /* code */
+
+        break;
+    case DEVICE_CTRL_GET_INT /* constant-expression */:
+        /* code */
+        break;
+    case DEVICE_CTRL_CONFIG /* constant-expression */:
+        /* code */
+        break;
+    case DEVICE_CTRL_RESUME /* constant-expression */:
+        /* code */
+        break;
+    case DEVICE_CTRL_SUSPEND /* constant-expression */:
+        /* code */
+        break;
+    default:
+        break;
+    }
+
+    return 0;
+
+
+    return 0;
+}
+int timer_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size)
+{
+
+    return 0;
+}
+int timer_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size)
+{
+
+    return 0;
+}
+
+void timer_register(timer_device_t *device, const char *name, uint16_t flag)
+{
+    struct device *dev;
+
+    dev = &(device->parent);
+
+    dev->open = timer_open;
+    dev->close = timer_close;
+    dev->control = timer_control;
+    dev->write = NULL;
+    dev->read = NULL;
+    
+    dev->status = DEVICE_UNREGISTER;
+    dev->type = DEVICE_CLASS_TIMER;
+    dev->handle = NULL;
+
+    device_register(dev, name, flag);
+}
diff --git a/drivers/bl702_driver/hal_drv/src/hal_uart.c b/drivers/bl702_driver/hal_drv/src/hal_uart.c
new file mode 100644
index 00000000..01e95c33
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/src/hal_uart.c
@@ -0,0 +1,424 @@
+/**
+ * @file hal_uart.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_uart.h"
+#include "hal_dma.h"
+#include "hal_gpio.h"
+#include "hal_clock.h"
+#include "bl702_uart.h"
+#include "bl702_glb.h"
+#include "uart_config.h"
+
+#ifdef BSP_USING_UART0
+void UART0_IRQ(void);
+#endif
+#ifdef BSP_USING_UART1
+void UART1_IRQ(void);
+#endif
+
+uart_device_t uartx_device[UART_MAX_INDEX] =
+{
+#ifdef BSP_USING_UART0
+        UART0_CONFIG,
+#endif
+#ifdef BSP_USING_UART1
+        UART1_CONFIG,
+#endif
+};
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @param oflag 
+ * @return int 
+ */
+int uart_open(struct device *dev, uint16_t oflag)
+{
+    uart_device_t *uart_device = (uart_device_t *)dev;
+    UART_FifoCfg_Type fifoCfg;
+    UART_CFG_Type uart_cfg;
+
+    /* disable all interrupt */
+    UART_IntMask(uart_device->id, UART_INT_ALL, MASK);
+    /* disable uart before config */
+    UART_Disable(uart_device->id, UART_TXRX);
+    
+    uint32_t uart_clk = peripheral_clock_get(PERIPHERAL_CLOCK_UART);
+    uart_cfg.baudRate = uart_device->baudrate;
+    uart_cfg.dataBits = uart_device->databits;
+    uart_cfg.stopBits = uart_device->stopbits;
+    uart_cfg.parity = uart_device->parity;
+    uart_cfg.uartClk = uart_clk;
+    uart_cfg.ctsFlowControl = UART_CTS_FLOWCONTROL_ENABLE;
+    uart_cfg.rtsSoftwareControl = UART_RTS_FLOWCONTROL_ENABLE;
+    uart_cfg.byteBitInverse = UART_MSB_FIRST_ENABLE;
+    uart_cfg.txSoftwareControl = UART_TX_SWCONTROL_ENABLE;
+    uart_cfg.txLinMode = UART_TX_LINMODE_ENABLE;
+    uart_cfg.rxLinMode = UART_RX_LINMODE_ENABLE;
+    uart_cfg.txBreakBitCnt = UART_TX_BREAKBIT_CNT;
+
+    /* uart init with default configuration */
+    UART_Init(uart_device->id, &uart_cfg);
+
+    /* Enable tx free run mode */
+    UART_TxFreeRun(uart_device->id, ENABLE);
+
+    /* Set rx time-out value */
+    UART_SetRxTimeoutValue(uart_device->id, UART_DEFAULT_RTO_TIMEOUT);
+
+    fifoCfg.txFifoDmaThreshold = uart_device->fifo_threshold;
+    fifoCfg.txFifoDmaEnable = DISABLE;
+    fifoCfg.rxFifoDmaThreshold = uart_device->fifo_threshold;
+    fifoCfg.rxFifoDmaEnable = DISABLE;
+
+    if (oflag & DEVICE_OFLAG_STREAM_TX)
+    {
+    }
+    if ((oflag & DEVICE_OFLAG_INT_TX) || (oflag & DEVICE_OFLAG_INT_RX))
+    {
+#ifdef BSP_USING_UART0
+        if (uart_device->id == UART0_ID)
+            Interrupt_Handler_Register(UART0_IRQn, UART0_IRQ);
+#endif   
+#ifdef BSP_USING_UART1         
+        if (uart_device->id == UART1_ID)
+            Interrupt_Handler_Register(UART1_IRQn, UART1_IRQ);
+#endif
+    }
+    if (oflag & DEVICE_OFLAG_DMA_TX)
+    {
+        fifoCfg.txFifoDmaEnable = ENABLE;
+    }
+    if (oflag & DEVICE_OFLAG_DMA_RX)
+    {
+        fifoCfg.rxFifoDmaEnable = ENABLE;
+    }
+
+    UART_FifoConfig(uart_device->id, &fifoCfg);
+    /* enable uart */
+    UART_Enable(uart_device->id, UART_TXRX);
+    return 0;
+}
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @return int 
+ */
+int uart_close(struct device *dev)
+{
+    uart_device_t *uart_device = (uart_device_t *)dev;
+
+    UART_Disable(uart_device->id, UART_TXRX);
+    return 0;
+}
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @param cmd 
+ * @param args 
+ * @return int 
+ */
+int uart_control(struct device *dev, int cmd, void *args)
+{
+    uart_device_t *uart_device = (uart_device_t *)dev;
+
+    switch (cmd)
+    {
+    case DEVICE_CTRL_SET_INT /* constant-expression */:
+    {
+        uint32_t offset = __builtin_ctz((uint32_t)args);
+        while ((0 <= offset) && (offset < 9))
+        {
+            if ((uint32_t)args & (1 << offset))
+            {
+                UART_IntMask(uart_device->id, offset, UNMASK);
+            }
+            offset++;
+        }
+        if (uart_device->id == UART0_ID)
+            NVIC_EnableIRQ(UART0_IRQn);
+        else if (uart_device->id == UART1_ID)
+            NVIC_EnableIRQ(UART1_IRQn);
+
+        break;
+    }
+    case DEVICE_CTRL_CLR_INT /* constant-expression */:
+    {
+        uint32_t offset = __builtin_ctz((uint32_t)args);
+        while ((0 <= offset) && (offset < 9))
+        {
+            if ((uint32_t)args & (1 << offset))
+            {
+                UART_IntMask(uart_device->id, offset, MASK);
+            }
+            offset++;
+        }
+        if (uart_device->id == UART0_ID)
+            NVIC_DisableIRQ(UART0_IRQn);
+        else if (uart_device->id == UART1_ID)
+            NVIC_DisableIRQ(UART1_IRQn);
+
+        break;
+    }
+    case DEVICE_CTRL_GET_INT /* constant-expression */:
+        /* code */
+        break;
+    case DEVICE_CTRL_CONFIG /* constant-expression */:
+    {
+        uart_param_cfg_t* cfg = (uart_param_cfg_t *)args;
+        UART_CFG_Type uart_cfg;
+
+        /* Disable uart before config */
+        UART_Disable(uart_device->id, UART_TXRX);
+        uint32_t uart_clk = peripheral_clock_get(PERIPHERAL_CLOCK_UART);
+
+        uart_cfg.uartClk = uart_clk;
+        uart_cfg.baudRate = cfg->baudrate;
+        uart_cfg.stopBits = cfg->stopbits;
+        uart_cfg.parity = cfg->parity;
+        uart_cfg.dataBits = cfg->databits;
+        uart_cfg.ctsFlowControl = UART_CTS_FLOWCONTROL_ENABLE;
+        uart_cfg.rtsSoftwareControl = UART_RTS_FLOWCONTROL_ENABLE;
+        uart_cfg.byteBitInverse = UART_MSB_FIRST_ENABLE;
+        uart_cfg.txSoftwareControl = UART_TX_SWCONTROL_ENABLE;
+        uart_cfg.txLinMode = UART_TX_LINMODE_ENABLE;
+        uart_cfg.rxLinMode = UART_RX_LINMODE_ENABLE;
+        uart_cfg.txBreakBitCnt = UART_TX_BREAKBIT_CNT;
+        UART_Init(uart_device->id, &uart_cfg);
+#ifdef BSP_USING_UART0
+        if (uart_device->id == UART0_ID)
+            Interrupt_Handler_Register(UART0_IRQn, UART0_IRQ);
+#endif   
+#ifdef BSP_USING_UART1         
+        if (uart_device->id == UART1_ID)
+            Interrupt_Handler_Register(UART1_IRQn, UART1_IRQ);
+#endif
+        /* Enable uart */
+        UART_Enable(uart_device->id, UART_TXRX);
+        break;
+    }
+    case DEVICE_CTRL_GET_CONFIG /* constant-expression */:
+        break;
+    case DEVICE_CTRL_UART_ATTACH_TX_DMA /* constant-expression */:
+        uart_device->tx_dma = (struct device *)args;
+        break;
+    case DEVICE_CTRL_UART_ATTACH_RX_DMA /* constant-expression */:
+        uart_device->rx_dma = (struct device *)args;
+        break;
+    case DEVICE_CTRL_UART_GET_TX_FIFO /* constant-expression */:
+        return UART_GetTxFifoCount(uart_device->id);
+    case DEVICE_CTRL_UART_GET_RX_FIFO /* constant-expression */:
+        return UART_GetRxFifoCount(uart_device->id);
+    default:
+        break;
+    }
+
+    return 0;
+}
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @param pos 
+ * @param buffer 
+ * @param size 
+ * @return int 
+ */
+int uart_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size)
+{
+    uart_device_t *uart_device = (uart_device_t *)dev;
+    if (dev->oflag & DEVICE_OFLAG_DMA_TX)
+    {
+        struct device *dma_ch = (struct device *)uart_device->tx_dma;
+        if (!dma_ch)
+            return -1;
+            
+        if(uart_device->id == 0)
+        {
+            dma_reload(dma_ch, (uint32_t)buffer, (uint32_t)DMA_ADDR_UART0_TDR, size);
+            dma_channel_start(dma_ch);
+        }
+        else if(uart_device->id == 1)
+        {
+            dma_reload(dma_ch, (uint32_t)buffer, (uint32_t)DMA_ADDR_UART1_TDR, size);
+            dma_channel_start(dma_ch);
+        }
+        return 0;
+    }
+    return UART_SendData(uart_device->id, (uint8_t *)buffer, size);
+}
+/**
+ * @brief 
+ * 
+ * @param dev 
+ * @param pos 
+ * @param buffer 
+ * @param size 
+ * @return int 
+ */
+int uart_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size)
+{
+    uart_device_t *uart_device = (uart_device_t *)dev;
+    if (dev->oflag & DEVICE_OFLAG_DMA_RX)
+    {
+        struct device *dma_ch = (struct device *)uart_device->rx_dma;
+        if (!dma_ch)
+            return -1;
+                    
+        if(uart_device->id == 0)
+        {
+            dma_reload(dma_ch, (uint32_t)DMA_ADDR_UART0_RDR, (uint32_t)buffer, size);
+            dma_channel_start(dma_ch);
+        }
+        else if(uart_device->id == 1)
+        {
+            dma_reload(dma_ch,(uint32_t)DMA_ADDR_UART1_RDR, (uint32_t)buffer, size);
+            dma_channel_start(dma_ch);
+        }
+    }
+    return UART_ReceiveData(uart_device->id, (uint8_t *)buffer, size);
+}
+/**
+ * @brief 
+ * 
+ * @param index 
+ * @param name 
+ * @param flag 
+ * @return int 
+ */
+int uart_register(enum uart_index_type index, const char *name, uint16_t flag)
+{
+    struct device *dev;
+
+    if(UART_MAX_INDEX == 0)
+    return -DEVICE_EINVAL;
+
+    dev = &(uartx_device[index].parent);
+
+    dev->open = uart_open;
+    dev->close = uart_close;
+    dev->control = uart_control;
+    dev->write = uart_write;
+    dev->read = uart_read;
+
+    dev->status = DEVICE_UNREGISTER;
+    dev->type = DEVICE_CLASS_UART;
+    dev->handle = NULL;
+
+    return device_register(dev, name, flag);
+}
+/**
+ * @brief 
+ * 
+ * @param handle 
+ */
+void uart_isr(uart_device_t *handle)
+{
+    uint32_t tmpVal = 0;
+    uint32_t maskVal = 0;
+    uint32_t UARTx = (UART0_BASE + handle->id * 0x100);
+
+    tmpVal = BL_RD_REG(UARTx, UART_INT_STS);
+    maskVal = BL_RD_REG(UARTx, UART_INT_MASK);
+
+    if (!handle->parent.callback)
+        return;
+
+    /* Length of uart tx data transfer arrived interrupt */
+    if (BL_IS_REG_BIT_SET(tmpVal, UART_UTX_END_INT) && !BL_IS_REG_BIT_SET(maskVal, UART_CR_UTX_END_MASK))
+    {
+        BL_WR_REG(UARTx, UART_INT_CLEAR, 0x1);
+        handle->parent.callback(&handle->parent, NULL, 0, UART_EVENT_TX_END);
+    }
+
+    /* Length of uart rx data transfer arrived interrupt */
+    if (BL_IS_REG_BIT_SET(tmpVal, UART_URX_END_INT) && !BL_IS_REG_BIT_SET(maskVal, UART_CR_URX_END_MASK))
+    {
+        BL_WR_REG(UARTx, UART_INT_CLEAR, 0x2);
+        handle->parent.callback(&handle->parent,NULL, 0, UART_EVENT_RX_END);
+    }
+
+    /* Tx fifo ready interrupt,auto-cleared when data is pushed */
+    if (BL_IS_REG_BIT_SET(tmpVal, UART_UTX_FIFO_INT) && !BL_IS_REG_BIT_SET(maskVal, UART_CR_UTX_FIFO_MASK))
+    {
+        handle->parent.callback(&handle->parent, NULL, 0, UART_EVENT_TX_FIFO);
+    }
+
+    /* Rx fifo ready interrupt,auto-cleared when data is popped */
+    if (BL_IS_REG_BIT_SET(tmpVal, UART_URX_FIFO_INT) && !BL_IS_REG_BIT_SET(maskVal, UART_CR_URX_FIFO_MASK))
+    {
+        uint8_t buffer[UART_FIFO_MAX_LEN];
+        UART_ReceiveData(handle->id, buffer, handle->fifo_threshold);
+        handle->parent.callback(&handle->parent, &buffer[0], handle->fifo_threshold, UART_EVENT_RX_FIFO);
+    }
+
+    /* Rx time-out interrupt */
+    if (BL_IS_REG_BIT_SET(tmpVal, UART_URX_RTO_INT) && !BL_IS_REG_BIT_SET(maskVal, UART_CR_URX_RTO_MASK))
+    {
+        uint8_t buffer[UART_FIFO_MAX_LEN];
+        uint8_t len = UART_ReceiveData(handle->id, buffer, handle->fifo_threshold);
+        handle->parent.callback(&handle->parent, &buffer[0], len, UART_EVENT_RTO);
+        BL_WR_REG(UARTx, UART_INT_CLEAR, 0x10);
+    }
+
+    /* Rx parity check error interrupt */
+    if (BL_IS_REG_BIT_SET(tmpVal, UART_URX_PCE_INT) && !BL_IS_REG_BIT_SET(maskVal, UART_CR_URX_PCE_MASK))
+    {
+        BL_WR_REG(UARTx, UART_INT_CLEAR, 0x20);
+        handle->parent.callback(&handle->parent, NULL, 0, UART_PCE_IT);
+    }
+
+    /* Tx fifo overflow/underflow error interrupt */
+    if (BL_IS_REG_BIT_SET(tmpVal, UART_UTX_FER_INT) && !BL_IS_REG_BIT_SET(maskVal, UART_CR_UTX_FER_MASK))
+    {
+        handle->parent.callback(&handle->parent, NULL, 0, UART_TX_FER_IT);
+    }
+
+    /* Rx fifo overflow/underflow error interrupt */
+    if (BL_IS_REG_BIT_SET(tmpVal, UART_URX_FER_INT) && !BL_IS_REG_BIT_SET(maskVal, UART_CR_URX_FER_MASK))
+    {
+        handle->parent.callback(&handle->parent, NULL, 0, UART_RX_FER_IT);
+    }
+}
+
+#ifdef BSP_USING_UART0
+/**
+ * @brief 
+ * 
+ */
+void UART0_IRQ(void)
+{
+    uart_isr(&uartx_device[UART0_INDEX]);
+}
+#endif
+#ifdef BSP_USING_UART1
+/**
+ * @brief 
+ * 
+ */
+void UART1_IRQ(void)
+{
+    uart_isr(&uartx_device[UART1_INDEX]);
+}
+#endif
\ No newline at end of file
diff --git a/drivers/bl702_driver/hal_drv/src/hal_usb.c b/drivers/bl702_driver/hal_drv/src/hal_usb.c
new file mode 100644
index 00000000..245bf8dd
--- /dev/null
+++ b/drivers/bl702_driver/hal_drv/src/hal_usb.c
@@ -0,0 +1,1046 @@
+/**
+ * @file hal_usb.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_usb.h"
+#include "hal_mtimer.h"
+#include "bl702_usb.h"
+#include "bl702_glb.h"
+#include "bl702_gpio.h"
+#include "usb_config.h"
+
+#define MIN(a, b) (((a) < (b)) ? (a) : (b))
+
+#define USB_DC_LOG_WRN(a, ...) bflb_platform_printf(a, ##__VA_ARGS__)
+#define USB_DC_LOG_DBG(a, ...)
+#define USB_DC_LOG_ERR(a, ...) bflb_platform_printf(a, ##__VA_ARGS__)
+#define USB_DC_LOG(a, ...)
+
+usb_dc_device_t usb_fs_device;
+
+static void usb_set_power_up(void)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal = BL_RD_REG(GLB_BASE, GLB_USB_XCVR);
+    tmpVal = BL_SET_REG_BIT(tmpVal, GLB_PU_USB);
+    BL_WR_REG(GLB_BASE, GLB_USB_XCVR, tmpVal);
+}
+
+static void usb_set_power_off(void)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal = BL_RD_REG(GLB_BASE, GLB_USB_XCVR);
+    tmpVal = BL_CLR_REG_BIT(tmpVal, GLB_PU_USB);
+    BL_WR_REG(GLB_BASE, GLB_USB_XCVR, tmpVal);
+}
+
+static uint8_t usb_ep_is_enabled(uint8_t ep)
+{
+    uint8_t ep_idx = USB_EP_GET_IDX(ep);
+
+    /* Check if ep enabled */
+    if ((USB_EP_DIR_IS_OUT(ep)) &&
+            usb_fs_device.out_ep[ep_idx].ep_ena)
+    {
+        return 1;
+    }
+    else if ((USB_EP_DIR_IS_IN(ep)) &&
+             usb_fs_device.in_ep[ep_idx].ep_ena)
+    {
+        return 1;
+    }
+
+    return 0;
+}
+
+static void usb_xcvr_config(BL_Fun_Type NewState)
+{
+    uint32_t tmpVal = 0;
+
+    if (NewState != DISABLE)
+    {
+#if defined(USE_EXTERNAL_TRANSCEIVER)
+        tmpVal = BL_RD_REG(GLB_BASE, GLB_USB_XCVR_CONFIG);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_REG_USB_USE_XCVR, 0); //use external tranceiver
+        BL_WR_REG(GLB_BASE, GLB_USB_XCVR_CONFIG, tmpVal);
+#elif defined(USE_INTERNAL_TRANSCEIVER)
+#if 1
+        tmpVal = BL_RD_REG(GLB_BASE, GLB_USB_XCVR);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_PU_USB, 1);
+        BL_WR_REG(GLB_BASE, GLB_USB_XCVR, tmpVal);
+
+        tmpVal = BL_RD_REG(GLB_BASE, GLB_USB_XCVR);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_SUS, 0);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_SPD, 1); //0 for 1.1 ls,1 for 1.1 fs
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_DATA_CONVERT, 0);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_OEB_SEL, 0);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_ROUT_PMOS, 3);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_ROUT_NMOS, 3);
+        BL_WR_REG(GLB_BASE, GLB_USB_XCVR, tmpVal);
+
+        tmpVal = BL_RD_REG(GLB_BASE, GLB_USB_XCVR_CONFIG);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_SLEWRATE_P_RISE, 2); //1 for 1.1 ls
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_SLEWRATE_P_FALL, 2); //1 for 1.1 ls
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_SLEWRATE_M_RISE, 2); //1 for 1.1 ls
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_SLEWRATE_M_FALL, 2); //1 for 1.1 ls
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_RES_PULLUP_TUNE, 5);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_REG_USB_USE_XCVR, 1);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_BD_VTH, 1);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_V_HYS_P, 2);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_V_HYS_M, 2);
+        BL_WR_REG(GLB_BASE, GLB_USB_XCVR_CONFIG, tmpVal);
+
+        ///* force BD=1, not use */
+        //tmpVal=BL_RD_REG(GLB_BASE,GLB_USB_XCVR);
+        //tmpVal=BL_SET_REG_BIT(tmpVal,GLB_PU_USB_LDO);
+        //BL_WR_REG(GLB_BASE,GLB_USB_XCVR,tmpVal);
+
+        /* BD_voltage_thresdhold=2.8V */
+        tmpVal = BL_RD_REG(GLB_BASE, GLB_USB_XCVR_CONFIG);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_BD_VTH, 7);
+        BL_WR_REG(GLB_BASE, GLB_USB_XCVR_CONFIG, tmpVal);
+
+#else
+        tmpVal = BL_RD_REG(GLB_BASE, GLB_USB_XCVR);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_PU_USB, 1);
+        BL_WR_REG(GLB_BASE, GLB_USB_XCVR, tmpVal);
+
+        tmpVal = BL_RD_REG(GLB_BASE, GLB_USB_XCVR);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_SUS, 0);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_SPD, 0); //0 for 1.1 ls,1 for 1.1 fs
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_DATA_CONVERT, 0);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_OEB_SEL, 0);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_ROUT_PMOS, 3);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_ROUT_NMOS, 3);
+        BL_WR_REG(GLB_BASE, GLB_USB_XCVR, tmpVal);
+
+        tmpVal = BL_RD_REG(GLB_BASE, GLB_USB_XCVR_CONFIG);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_SLEWRATE_P_RISE, 1); //4 for 1.1 fs
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_SLEWRATE_P_FALL, 1); //3 for 1.1 fs
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_SLEWRATE_M_RISE, 1); //4 for 1.1 fs
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_SLEWRATE_M_FALL, 1); //3 for 1.1 fs
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_RES_PULLUP_TUNE, 5);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_REG_USB_USE_XCVR, 1);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_BD_VTH, 1);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_V_HYS_P, 2);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_V_HYS_M, 2);
+        BL_WR_REG(GLB_BASE, GLB_USB_XCVR_CONFIG, tmpVal);
+#endif
+
+        tmpVal = BL_RD_REG(GLB_BASE, GLB_USB_XCVR);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_ENUM, 1);
+        BL_WR_REG(GLB_BASE, GLB_USB_XCVR, tmpVal);
+#endif
+    }
+    else
+    {
+#ifdef USE_INTERNAL_TRANSCEIVER
+        tmpVal = BL_RD_REG(GLB_BASE, GLB_USB_XCVR);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_ENUM, 0);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_PU_USB, 0);
+        BL_WR_REG(GLB_BASE, GLB_USB_XCVR, tmpVal);
+
+        ///* force BD=1, not use */
+        //tmpVal=BL_RD_REG(GLB_BASE,GLB_USB_XCVR);
+        //tmpVal=BL_SET_REG_BIT(tmpVal,GLB_PU_USB_LDO);
+        //BL_WR_REG(GLB_BASE,GLB_USB_XCVR,tmpVal);
+
+        /* BD_voltage_thresdhold=2.8V */
+        tmpVal = BL_RD_REG(GLB_BASE, GLB_USB_XCVR_CONFIG);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_BD_VTH, 7);
+        BL_WR_REG(GLB_BASE, GLB_USB_XCVR_CONFIG, tmpVal);
+
+#else
+        tmpVal = BL_RD_REG(GLB_BASE, GLB_USB_XCVR_CONFIG);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_REG_USB_USE_XCVR, 1); //use internal tranceiver
+        BL_WR_REG(GLB_BASE, GLB_USB_XCVR_CONFIG, tmpVal);
+
+        tmpVal = BL_RD_REG(GLB_BASE, GLB_USB_XCVR);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_USB_ENUM, 0);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, GLB_PU_USB, 1);
+        BL_WR_REG(GLB_BASE, GLB_USB_XCVR, tmpVal);
+#endif
+    }
+}
+
+/**
+ * @brief
+ *
+ * @param dev
+ * @param oflag
+ * @return int
+ */
+int usb_open(struct device *dev, uint16_t oflag)
+{
+    USB_Config_Type usbCfg;
+
+    usb_set_power_off();
+    mtimer_delay_ms(10);
+    usb_set_power_up();
+
+    usb_xcvr_config(DISABLE);
+    usb_xcvr_config(ENABLE);
+
+    NVIC_DisableIRQ(USB_IRQn);
+
+    usbCfg.DeviceAddress = 0;
+    usbCfg.EnumInEn = ENABLE;
+    usbCfg.EnumOutEn = ENABLE;
+    usbCfg.RomBaseDescriptorUsed = 0;
+    usbCfg.SoftwareCtrl = 1;
+    usbCfg.EnumMaxPacketSize = USB_CTRL_EP_MPS;
+
+    /* Init Device */
+    USB_Set_Config(DISABLE, &usbCfg);
+
+    /* USB interrupt enable config */
+    USB_IntEn(USB_INT_ALL, DISABLE);           //all
+    USB_IntEn(USB_INT_RESET, ENABLE);          //1
+    USB_IntEn(USB_INT_EP0_SETUP_DONE, ENABLE); //5
+    USB_IntEn(USB_INT_EP0_IN_DONE, ENABLE);    //7
+    USB_IntEn(USB_INT_EP0_OUT_DONE, ENABLE);   //9
+    USB_IntEn(USB_INT_RESET_END, ENABLE);      //27
+
+    /* USB interrupt mask config */
+    USB_IntMask(USB_INT_ALL, MASK);              //all
+    USB_IntMask(USB_INT_RESET, UNMASK);          //1
+    USB_IntMask(USB_INT_EP0_SETUP_DONE, UNMASK); //5
+    USB_IntMask(USB_INT_EP0_IN_DONE, UNMASK);    //7
+    USB_IntMask(USB_INT_EP0_OUT_DONE, UNMASK);   //9
+    USB_IntMask(USB_INT_RESET_END, UNMASK);      //27
+
+#ifdef ENABLE_LPM_INT
+    USB_IntEn(USB_INT_LPM_PACKET, ENABLE);
+    USB_IntEn(USB_INT_LPM_WAKEUP, ENABLE);
+    USB_IntMask(USB_INT_LPM_PACKET, UNMASK);
+    USB_IntMask(USB_INT_LPM_WAKEUP, UNMASK);
+
+    USB_LPM_Enable();
+    USB_Set_LPM_Default_Response(USB_LPM_DEFAULT_RESP_ACK);
+
+#endif
+
+#ifdef ENABLE_SOF3MS_INT
+    /* disable sof3ms until reset_end */
+    USB_IntEn(USB_INT_LOST_SOF_3_TIMES, DISABLE);
+    USB_IntMask(USB_INT_LOST_SOF_3_TIMES, MASK);
+
+    /* recommended enable sof3ms after reset_end */
+    USB_IntEn(USB_INT_LOST_SOF_3_TIMES, ENABLE);
+    USB_IntMask(USB_INT_LOST_SOF_3_TIMES, UNMASK);
+#endif
+
+#ifdef ENABLE_ERROR_INT
+    USB_IntEn(USB_INT_ERROR, ENABLE);
+    USB_IntMask(USB_INT_ERROR, UNMASK);
+#endif
+    /*Clear pending interrupts*/
+    USB_Clr_IntStatus(USB_INT_ALL);
+    
+    Interrupt_Handler_Register(USB_IRQn, USB_IRQHandler);
+    NVIC_EnableIRQ(USB_IRQn);
+    USB_Enable();
+
+    return 0;
+}
+/**
+ * @brief
+ *
+ * @param dev
+ * @return int
+ */
+int usb_close(struct device *dev)
+{
+    /* disable all interrupts and force USB reset */
+    NVIC_DisableIRQ(USB_IRQn);
+    USB_IntMask(USB_INT_LPM_WAKEUP, MASK);
+    USB_IntMask(USB_INT_LPM_PACKET, MASK);
+
+    USB_Disable();
+
+    /* clear interrupt status register */
+    USB_Clr_IntStatus(USB_INT_ALL);
+
+    usb_set_power_off();
+
+    usb_xcvr_config(DISABLE);
+    GLB_Set_USB_CLK(DISABLE);
+
+    return 0;
+}
+/**
+ * @brief
+ *
+ * @param dev
+ * @param cmd
+ * @param args
+ * @return int
+ */
+int usb_control(struct device *dev, int cmd, void *args)
+{
+    switch (cmd)
+    {
+        case DEVICE_CTRL_SET_INT /* constant-expression */:
+        {
+            uint32_t offset = __builtin_ctz((uint32_t)args);
+            while (offset < 24)
+            {
+                if ((uint32_t)args & (1 << offset))
+                {
+                    USB_IntEn(offset, ENABLE);
+                    USB_IntMask(offset, UNMASK); //11
+                    //USB_DC_LOG("offset:%d\r\n",offset);
+                }
+                offset++;
+            }
+        }
+        break;
+        case DEVICE_CTRL_CLR_INT /* constant-expression */:
+            /* code */
+
+            break;
+        case DEVICE_CTRL_GET_INT /* constant-expression */:
+            /* code */
+            break;
+        case DEVICE_CTRL_CONFIG /* constant-expression */:
+            break;
+        case DEVICE_CTRL_GET_CONFIG /* constant-expression */:
+            break;
+        case DEVICE_CTRL_USB_DC_SET_ADDR /* constant-expression */:
+            USB_Set_Device_Addr(((uint32_t)args) & 0x7f);
+            return 0;
+        case DEVICE_CTRL_USB_DC_SET_ACK /* constant-expression */:
+            USB_Set_EPx_Status(USB_EP_GET_IDX(((uint32_t)args) & 0x7f), USB_EP_STATUS_ACK);
+            return 0;
+        case DEVICE_CTRL_USB_DC_SET_NACK /* constant-expression */:
+            USB_Set_EPx_Status(USB_EP_GET_IDX(((uint32_t)args) & 0x7f), USB_EP_STATUS_NACK);
+            return 0;
+        case DEVICE_CTRL_USB_DC_SET_STALL /* constant-expression */:
+        {
+            uint8_t ep_idx = USB_EP_GET_IDX(((uint32_t)args) & 0x7f);
+
+            if (USB_EP_DIR_IS_OUT(((uint32_t)args) & 0x7f))
+            {
+                USB_Set_EPx_Status(ep_idx, USB_EP_STATUS_STALL);
+                usb_fs_device.out_ep[ep_idx].is_stalled = 1U;
+            }
+            else
+            {
+                USB_Set_EPx_Status(ep_idx, USB_EP_STATUS_STALL);
+                usb_fs_device.in_ep[ep_idx].is_stalled = 1U;
+            }
+        }
+        return 0;
+        case DEVICE_CTRL_USB_DC_CLR_STALL /* constant-expression */:
+        {
+            uint8_t ep_idx = USB_EP_GET_IDX(((uint32_t)args) & 0x7f);
+            if (USB_EP_DIR_IS_OUT(((uint32_t)args) & 0x7f))
+            {
+                USB_Set_EPx_Status(ep_idx, USB_EP_STATUS_NSTALL);
+                usb_fs_device.out_ep[ep_idx].is_stalled = 0;
+            }
+            else
+            {
+                USB_Set_EPx_Status(ep_idx, USB_EP_STATUS_NSTALL);
+                usb_fs_device.in_ep[ep_idx].is_stalled = 0;
+            }
+        }
+        return 0;
+        case DEVICE_CTRL_USB_DC_TX_FIFO_CNT_GET:
+            return USB_Get_EPx_TX_FIFO_CNT(((uint32_t)args) & 0x7f);
+        case DEVICE_CTRL_USB_DC_RX_FIFO_CNT_GET:
+            return USB_Get_EPx_RX_FIFO_CNT(((uint32_t)args) & 0x7f);
+        default:
+            break;
+    }
+    return 0;
+}
+
+// int usb_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size)
+// {
+
+// }
+
+// int usb_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size)
+// {
+
+// }
+
+/**
+ * @brief configure and enable endpoint
+ * This function sets endpoint configuration according to one specified in USB
+ * endpoint descriptor and then enables it for data transfers.
+ *
+ * @param dev
+ * @param ep_cfg  ep_cfg Endpoint 
+ * @return int
+ */
+int usb_dc_ep_open(struct device *dev, const struct usb_dc_ep_cfg *ep_cfg)
+{
+    uint8_t ep;
+    EP_Config_Type epCfg;
+
+    if (!ep_cfg)
+    {
+        return -1;
+    }
+    ep = ep_cfg->ep_addr;
+
+    uint8_t ep_idx = USB_EP_GET_IDX(ep);
+
+    USB_DC_LOG_DBG("%s ep %x, mps %d, type %d\r\n", __func__, ep, ep_cfg->ep_mps, ep_cfg->ep_type);
+
+    if (USB_EP_DIR_IS_OUT(ep))
+    {
+        epCfg.dir = EP_OUT;
+        epCfg.EPMaxPacketSize = ep_cfg->ep_mps;
+        usb_fs_device.out_ep[ep_idx].ep_cfg.ep_mps = ep_cfg->ep_mps;
+        usb_fs_device.out_ep[ep_idx].ep_cfg.ep_type = ep_cfg->ep_type;
+    }
+    else
+    {
+        epCfg.dir = EP_IN;
+        epCfg.EPMaxPacketSize = ep_cfg->ep_mps;
+        usb_fs_device.in_ep[ep_idx].ep_cfg.ep_mps = ep_cfg->ep_mps;
+        usb_fs_device.in_ep[ep_idx].ep_cfg.ep_type = ep_cfg->ep_type;
+    }
+
+    if (ep_idx)
+    {
+        switch (ep_cfg->ep_type)
+        {
+            case USBD_EP_TYPE_CTRL:
+                epCfg.type = USB_DC_EP_TYPE_CTRL;
+                break;
+            case USBD_EP_TYPE_ISOC:
+                epCfg.type = USB_DC_EP_TYPE_ISOC;
+                break;
+            case USBD_EP_TYPE_BULK:
+                epCfg.type = USB_DC_EP_TYPE_BULK;
+                break;
+            case USBD_EP_TYPE_INTR:
+                epCfg.type = USB_DC_EP_TYPE_INTR;
+                break;
+            default:
+                return -1;
+        }
+        USB_Set_EPx_Config(ep_idx, &epCfg);
+        if (USB_EP_DIR_IS_OUT(ep))
+        {
+            /* Clear NAK and enable ep */
+            USB_Set_EPx_Status(USB_EP_GET_IDX(ep), USB_EP_STATUS_ACK);
+            usb_fs_device.out_ep[ep_idx].ep_ena = 1U;
+        }
+        else
+        {
+            //USB_Set_EPx_Status(USB_EP_GET_IDX(ep), USB_EP_STATUS_ACK);
+            USB_Set_EPx_Status(USB_EP_GET_IDX(ep), USB_EP_STATUS_NACK);
+            usb_fs_device.in_ep[ep_idx].ep_ena = 1U;
+        }
+    }
+    else
+    {
+        if (USB_EP_DIR_IS_OUT(ep))
+        {
+            usb_fs_device.out_ep[ep_idx].ep_ena = 1U;
+        }
+        else
+        {
+            usb_fs_device.in_ep[ep_idx].ep_ena = 1U;
+        }
+    }
+
+    return 0;
+}
+
+/**
+ * @brief Check if the selected endpoint is stalled
+ *
+ * @param[in]  ep       Endpoint address corresponding to the one
+ *                      listed in the device configuration table
+ * @param[out] stalled  Endpoint stall status
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+
+/**
+ * @brief
+ *
+ * @param dev
+ * @param ep
+ * @param stalled
+ * @return int
+ */
+int usb_dc_ep_is_stalled(struct device *dev, const uint8_t ep, uint8_t *stalled)
+{
+    uint8_t ep_idx = USB_EP_GET_IDX(ep);
+
+    if (!stalled)
+    {
+        return -1;
+    }
+
+    *stalled = 0U;
+    if (USB_EP_DIR_IS_OUT(ep))
+    {
+        if (USB_Get_EPx_Status(ep_idx) & USB_EP_STATUS_STALL && usb_fs_device.out_ep[ep_idx].is_stalled)
+            *stalled = 1U;
+    }
+    else
+    {
+        if (USB_Get_EPx_Status(ep_idx) & USB_EP_STATUS_STALL && usb_fs_device.in_ep[ep_idx].is_stalled)
+            *stalled = 1U;
+    }
+
+    return 0;
+}
+/**
+ * @brief Write data to the specified endpoint
+ *
+ * This function is called to write data to the specified endpoint. The
+ * supplied usbd_endpoint_callback function will be called when data is transmitted
+ * out.
+ *
+ * @param[in]  ep        Endpoint address corresponding to the one
+ *                       listed in the device configuration table
+ * @param[in]  data      Pointer to data to write
+ * @param[in]  data_len  Length of the data requested to write. This may
+ *                       be zero for a zero length status packet.
+ * @param[out] ret_bytes Bytes scheduled for transmission. This value
+ *                       may be NULL if the application expects all
+ *                       bytes to be written
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+
+/**
+ * @brief
+ *
+ * @param dev
+ * @param ep
+ * @param data
+ * @param data_len
+ * @param ret_bytes
+ * @return int
+ */
+int usb_dc_ep_write(struct device *dev, const uint8_t ep, const uint8_t *data, uint32_t data_len, uint32_t *ret_bytes)
+{
+    uint8_t ep_idx = USB_EP_GET_IDX(ep);
+    uint32_t timeout = 0x00FFFFFF;
+    uint32_t ep_tx_fifo_addr;
+
+    /* Check if IN ep */
+    if (USB_EP_GET_DIR(ep) != USB_EP_DIR_IN)
+    {
+        return -1;
+    }
+
+    /* Check if ep enabled */
+    if (!usb_ep_is_enabled(ep))
+    {
+        return -2;
+    }
+
+    while (!USB_Is_EPx_RDY_Free(ep_idx))
+    {
+        timeout--;
+        if (!timeout)
+        {
+            USB_DC_LOG_ERR("ep%d wait free timeout\r\n", ep);
+            return -3;
+        }
+    }
+
+    // key = irq_lock();
+    if (!data)
+    {
+        if (!data_len)
+        {
+            /* Zero length packet */
+            /* Clear NAK and enable ep */
+            USB_Set_EPx_Status(USB_EP_GET_IDX(ep), USB_EP_STATUS_ACK);
+            return 0;
+        }
+        else
+        {
+            USB_DC_LOG_ERR("data is null\r\n");
+            return -4;
+        }
+    }
+
+    if (data_len > usb_fs_device.in_ep[ep_idx].ep_cfg.ep_mps)
+    {
+        /* Check if transfer len is too big */
+        data_len = usb_fs_device.in_ep[ep_idx].ep_cfg.ep_mps;
+    }
+
+    /* Wait for FIFO space available */
+    do
+    {
+        uint32_t avail_space = USB_Get_EPx_TX_FIFO_CNT(ep_idx);
+        if (avail_space == usb_fs_device.in_ep[ep_idx].ep_cfg.ep_mps)
+        {
+            break;
+        }
+        /* Make sure we don't hog the CPU */
+        // k_yield();
+        //USB_DC_LOG_ERR("EP%d have remain data\r\n", ep_idx);
+    }
+    while (1);
+
+    /*
+     * Write data to FIFO, make sure that we are protected against
+     * other USB register accesses.  According to "DesignWare Cores
+     * USB 1.1/2.0 Device Subsystem-AHB/VCI Databook": "During FIFO
+     * access, the application must not access the UDC/Subsystem
+     * registers or vendor registers (for ULPI mode). After starting
+     * to access a FIFO, the application must complete the transaction
+     * before accessing the register."
+     */
+    ep_tx_fifo_addr = USB_BASE + USB_EP0_TX_FIFO_WDATA_OFFSET + ep_idx * 0x10;
+    memcopy_to_fifo((void *)ep_tx_fifo_addr, (uint8_t *)data, data_len);
+    /* Clear NAK and enable ep */
+    USB_Set_EPx_Status(USB_EP_GET_IDX(ep), USB_EP_STATUS_ACK);
+
+    // irq_unlock(key);
+
+    USB_DC_LOG_DBG("EP%d write %u bytes\r\n", ep_idx, data_len);
+
+    if (ret_bytes)
+    {
+        *ret_bytes = data_len;
+    }
+
+    return 0;
+}
+/**
+ * @brief Read data from the specified endpoint
+ *
+ * This is similar to usb_dc_ep_read, the difference being that, it doesn't
+ * clear the endpoint NAKs so that the consumer is not bogged down by further
+ * upcalls till he is done with the processing of the data. The caller should
+ * reactivate ep by invoking usb_dc_ep_read_continue() do so.
+ *
+ * @param[in]  ep           Endpoint address corresponding to the one
+ *                          listed in the device configuration table
+ * @param[in]  data         Pointer to data buffer to write to
+ * @param[in]  max_data_len Max length of data to read
+ * @param[out] read_bytes   Number of bytes read. If data is NULL and
+ *                          max_data_len is 0 the number of bytes
+ *                          available for read should be returned.
+ *
+ * @return 0 on success, negative errno code on fail.
+ */
+
+/**
+ * @brief
+ *
+ * @param dev
+ * @param ep
+ * @param data
+ * @param data_len
+ * @param read_bytes
+ * @return int
+ */
+int usb_dc_ep_read(struct device *dev, const uint8_t ep, uint8_t *data, uint32_t data_len, uint32_t *read_bytes)
+{
+    uint8_t ep_idx = USB_EP_GET_IDX(ep);
+    uint32_t read_count;
+    uint32_t ep_rx_fifo_addr;
+    uint32_t timeout = 0x00FFFFFF;
+    /* Check if OUT ep */
+    if (USB_EP_GET_DIR(ep) != USB_EP_DIR_OUT)
+    {
+        USB_DC_LOG_ERR("Wrong endpoint direction\r\n");
+        return -1;
+    }
+
+    /* Check if ep enabled */
+    if (!usb_ep_is_enabled(ep))
+    {
+        USB_DC_LOG_ERR("Not enabled endpoint\r\n");
+        return -1;
+    }
+    
+    if(ep_idx)
+    {
+        while (!USB_Is_EPx_RDY_Free(ep_idx))
+        {
+            timeout--;
+            if (!timeout)
+            {
+                USB_DC_LOG_ERR("ep%d wait free timeout\r\n", ep);
+                return -USB_DC_EP_TIMEOUT_ERR;
+            }
+        }
+    }
+
+    /* Allow to read 0 bytes */
+    if (!data_len)
+    {
+        /* Clear NAK and enable ep */
+        USB_Set_EPx_Status(USB_EP_GET_IDX(ep), USB_EP_STATUS_ACK);
+        return 0;
+    }
+
+    read_count = USB_Get_EPx_RX_FIFO_CNT(ep_idx);
+    read_count = MIN(read_count, data_len);
+
+    /* Data in the FIFOs is always stored per 8-bit word*/
+    ep_rx_fifo_addr = (USB_BASE + USB_EP0_RX_FIFO_RDATA_OFFSET + ep_idx * 0x10);
+    fifocopy_to_mem((void *)ep_rx_fifo_addr, data, read_count);
+    USB_DC_LOG_DBG("Read EP%d, req %d, read %d bytes\r\n", ep, data_len, read_count);
+
+    if (read_bytes)
+    {
+        *read_bytes = read_count;
+    }
+
+    return 0;
+}
+/**
+ * @brief
+ *
+ * @param index
+ * @param name
+ * @param flag
+ * @return int
+ */
+int usb_dc_register(enum usb_index_type index, const char *name, uint16_t flag)
+{
+    struct device *dev;
+
+    if (USB_MAX_INDEX == 0)
+        return -DEVICE_EINVAL;
+
+    dev = &(usb_fs_device.parent);
+
+    dev->open = usb_open;
+    dev->close = usb_close;
+    dev->control = usb_control;
+    // dev->write = usb_write;
+    // dev->read = usb_read;
+
+    dev->status = DEVICE_UNREGISTER;
+    dev->type = DEVICE_CLASS_USB;
+    dev->handle = NULL;
+
+    return device_register(dev, name, flag);
+}
+
+/**
+ * @brief
+ *
+ * @param dev
+ * @param rb
+ * @param ep
+ * @return uint16_t
+ */
+uint16_t usb_dc_receive_to_ringbuffer(struct device *dev, Ring_Buffer_Type *rb, uint8_t ep)
+{
+    uint8_t ep_idx;
+    uint8_t recv_len;
+    uint32_t timeout = 0x00FFFFFF;
+    static bool overflow_flag = false;
+
+    /* Check if OUT ep */
+    if (USB_EP_GET_DIR(ep) != USB_EP_DIR_OUT)
+    {
+        USB_DC_LOG_ERR("Wrong endpoint direction\r\n");
+        return -USB_DC_EP_DIR_ERR;
+    }
+    /* Check if ep enabled */
+    if (!usb_ep_is_enabled(ep))
+    {
+        return -USB_DC_EP_EN_ERR;
+    }
+
+    ep_idx = USB_EP_GET_IDX(ep);
+
+    while (!USB_Is_EPx_RDY_Free(ep_idx))
+    {
+        timeout--;
+        if (!timeout)
+        {
+            USB_DC_LOG_ERR("ep%d wait free timeout\r\n", ep);
+            return -USB_DC_EP_TIMEOUT_ERR;
+        }
+    }
+    recv_len = USB_Get_EPx_RX_FIFO_CNT(ep_idx);
+    
+    /*if rx fifo count equal 0,it means last is send nack and ringbuffer is smaller than 64,
+    * so,if ringbuffer is larger than 64,set ack to recv next data.
+    */
+    if(overflow_flag && (Ring_Buffer_Get_Empty_Length(rb)>64))
+    {
+        overflow_flag = false;
+        USB_Set_EPx_Rdy(ep_idx);
+        return -USB_DC_RB_SIZE_SMALL_ERR;
+    }
+
+    else if(recv_len)
+    {
+        uint32_t addr = USB_BASE + 0x11C + (ep_idx - 1) * 0x10;
+        uint32_t actual_len = Ring_Buffer_Write_Callback(rb, recv_len, fifocopy_to_mem, (void *)addr);
+
+        if(Ring_Buffer_Get_Empty_Length(rb) < 64)
+        {
+            overflow_flag = true;
+            return actual_len;
+        }
+
+        USB_Set_EPx_Rdy(ep_idx);
+        return actual_len;
+    }
+    return 0;
+}
+/**
+ * @brief
+ *
+ * @param dev
+ * @param rb
+ * @param ep
+ * @return uint16_t
+ */
+uint16_t usb_dc_send_from_ringbuffer(struct device *dev, Ring_Buffer_Type *rb, uint8_t ep)
+{
+    uint8_t ep_idx;
+    uint32_t timeout = 0x00FFFFFF;
+    static bool zlp_flag = false;
+    static uint32_t send_total_len = 0;
+    ep_idx = USB_EP_GET_IDX(ep);
+    /* Check if IN ep */
+    if (USB_EP_GET_DIR(ep) != USB_EP_DIR_IN)
+    {
+        return -USB_DC_EP_DIR_ERR;
+    }
+
+    /* Check if ep enabled */
+    if (!usb_ep_is_enabled(ep))
+    {
+        return -USB_DC_EP_EN_ERR;
+    }
+    
+    while (!USB_Is_EPx_RDY_Free(ep_idx))
+    {
+        timeout--;
+        if (!timeout)
+        {
+            USB_DC_LOG_ERR("ep%d wait free timeout\r\n", ep);
+            return -USB_DC_EP_TIMEOUT_ERR;
+        }
+    }
+
+    uint32_t addr = USB_BASE + 0x118 + (ep_idx - 1) * 0x10;
+
+    if(zlp_flag == false)
+    {
+        if (USB_Get_EPx_TX_FIFO_CNT(ep_idx) == USB_FS_MAX_PACKET_SIZE && Ring_Buffer_Get_Length(rb))
+        {
+            uint32_t actual_len = Ring_Buffer_Read_Callback(rb, USB_FS_MAX_PACKET_SIZE, memcopy_to_fifo, (void *)addr);
+            send_total_len += actual_len;
+            if(!Ring_Buffer_Get_Length(rb) && (!(send_total_len % 64)))
+            {
+                zlp_flag = true;
+            }
+            USB_Set_EPx_Rdy(ep_idx);
+
+            return actual_len;
+        }
+        else
+        {
+            return -USB_DC_RB_SIZE_SMALL_ERR;
+        }
+    }
+    else
+    {
+        zlp_flag = false; 
+        send_total_len = 0;
+        USB_Set_EPx_Rdy(ep_idx);
+        return -USB_DC_ZLP_ERR;
+    }
+
+    return 0;
+}
+
+/**
+  * @brief  This function handles PCD interrupt request.
+  * @param  hpcd PCD handle
+  * @retval HAL status
+  */
+
+/**
+ * @brief
+ *
+ * @param device
+ */
+void usb_dc_isr(usb_dc_device_t *device)
+{
+    USB_EP_ID epnum = EP_ID0;
+
+    /* EP1_DONE -> EP2_DONE -> ...... -> EP7_DONE*/
+    for (USB_INT_Type epint = USB_INT_EP1_DONE; epint <= USB_INT_EP7_DONE; epint += 2)
+    {
+        if (USB_Get_IntStatus(epint))
+        {
+            epnum = (epint - USB_INT_EP0_OUT_CMD) >> 1;
+            device->parent.callback(&device->parent,(void*)((uint32_t)USB_SET_EP_OUT(epnum)),0,USB_DC_EVENT_EP_OUT_NOTIFY);
+            USB_Clr_IntStatus(epint);
+            return;
+        }
+    }
+
+    /* EP1_CMD -> EP2_CMD -> ...... -> EP7_CMD*/
+    for (USB_INT_Type epint = USB_INT_EP1_CMD; epint <= USB_INT_EP7_CMD; epint += 2)
+    {
+        if (USB_Get_IntStatus(epint))
+        {
+            epnum = (epint - USB_INT_EP0_OUT_CMD) >> 1;
+            device->parent.callback(&device->parent,(void*)((uint32_t)USB_SET_EP_IN(epnum)),0,USB_DC_EVENT_EP_IN_NOTIFY);
+            USB_Clr_IntStatus(epint);
+            return;
+        }
+    }
+
+    /* reset */
+    if (USB_Get_IntStatus(USB_INT_SOF))
+    {
+        USB_DC_LOG("sof\r\n");
+        device->parent.callback(&device->parent,NULL,0,USB_DC_EVENT_SOF);
+        USB_Clr_IntStatus(USB_INT_SOF);
+        return;
+    }
+
+    /* reset */
+    if (USB_Get_IntStatus(USB_INT_RESET))
+    {
+        USB_DC_LOG("reset\r\n");
+        device->parent.callback(&device->parent,NULL,0,USB_DC_EVENT_RESET);
+        USB_Clr_IntStatus(USB_INT_RESET);
+        return;
+    }
+
+    /* vbus toggle */
+    if (USB_Get_IntStatus(USB_INT_VBUS_TGL))
+    {
+        USB_DC_LOG("vbus toggle\r\n");
+        /*************************************/
+        /*************************************/
+        USB_Clr_IntStatus(USB_INT_VBUS_TGL);
+        return;
+    }
+
+    /* EP0 setup done */
+    if (USB_Get_IntStatus(USB_INT_EP0_SETUP_DONE))
+    {
+        USB_DC_LOG("S\r\n");
+        device->parent.callback(&device->parent,NULL,0,USB_DC_EVENT_SETUP_NOTIFY);
+        USB_Clr_IntStatus(USB_INT_EP0_SETUP_DONE);
+        return;
+    }
+
+    /* EP0 in done */
+    if (USB_Get_IntStatus(USB_INT_EP0_IN_DONE))
+    {
+        USB_DC_LOG("I\r\n");
+        device->parent.callback(&device->parent,(void*)0x80,0,USB_DC_EVENT_EP0_IN_NOTIFY);
+        USB_Clr_IntStatus(USB_INT_EP0_IN_DONE);
+        return;
+    }
+
+    /* EP0 out done */
+    if (USB_Get_IntStatus(USB_INT_EP0_OUT_DONE))
+    {
+        USB_DC_LOG("O\r\n");
+        device->parent.callback(&device->parent,(void*)0x00,0,USB_DC_EVENT_EP0_OUT_NOTIFY);
+        /*************************************/
+        USB_Clr_IntStatus(USB_INT_EP0_OUT_DONE);
+        return;
+    }
+
+    /* reset end */
+    if (USB_Get_IntStatus(USB_INT_RESET_END))
+    {
+        USB_DC_LOG("re\r\n");
+        /*************************************/
+        USB_Set_EPx_Rdy(EP_ID0);
+        /*************************************/
+        USB_Clr_IntStatus(USB_INT_RESET_END);
+        return;
+    }
+
+    /* LPM wakeup */
+    /* usb wakeup interrupt, need update by reg_excel_files */
+    if (USB_Get_IntStatus(USB_INT_LPM_WAKEUP))
+    {
+        /*************************************/
+        /*set wInterrupt_Mask global variable*/
+        //HAL_PCD_ResumeCallback(hpcd);
+        /*************************************/
+        USB_Clr_IntStatus(USB_INT_LPM_WAKEUP);
+        return;
+    }
+
+    /* LPM packet */
+    /* usb suspend interrupt, need update by reg_excel_files */
+    if (USB_Get_IntStatus(USB_INT_LPM_PACKET))
+    {
+        /*************************************/
+        /* Force low-power mode in the macrocell */
+        if (USB_Get_IntStatus(USB_INT_LPM_WAKEUP) == 0)
+        {
+            //HAL_PCD_SuspendCallback(hpcd);
+        }
+        /*************************************/
+        USB_Clr_IntStatus(USB_INT_LPM_PACKET);
+        return;
+    }
+
+    /* lost 3 SOF */
+    if (USB_Get_IntStatus(USB_INT_LOST_SOF_3_TIMES))
+    {
+        USB_DC_LOG_ERR("Lost 3 SOFs\r\n");
+        /*************************************/
+        /*************************************/
+        USB_Clr_IntStatus(USB_INT_LOST_SOF_3_TIMES);
+        return;
+    }
+    /* error */
+    if (USB_Get_IntStatus(USB_INT_ERROR))
+    {
+        USB_DC_LOG("USB bus error 0x%08x; EP2 fifo status 0x%08x\r\n", *(volatile uint32_t *)(0x4000D81C), *(volatile uint32_t *)(0x4000D920));
+        /*************************************/
+        /*************************************/
+        device->parent.callback(&device->parent,NULL,0,USB_DC_EVENT_ERROR);
+        USB_Clr_IntStatus(USB_INT_ERROR);
+        return;
+    }
+}
+/**
+ * @brief
+ *
+ */
+void USB_IRQHandler(void)
+{
+    usb_dc_isr(&usb_fs_device);
+}
\ No newline at end of file
diff --git a/drivers/bl702_driver/regs/aon_reg.h b/drivers/bl702_driver/regs/aon_reg.h
new file mode 100644
index 00000000..6816d00f
--- /dev/null
+++ b/drivers/bl702_driver/regs/aon_reg.h
@@ -0,0 +1,1554 @@
+/**
+  ******************************************************************************
+  * @file    aon_reg.h
+  * @version V1.2
+  * @date    2020-03-30
+  * @brief   This file is the description of.IP register
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __AON_REG_H__
+#define  __AON_REG_H__
+
+#include "bl702.h"
+
+/* 0x800 : aon */
+#define AON_OFFSET                                              (0x800)
+#define AON_RESV                                                AON_RESV
+#define AON_RESV_POS                                            (0U)
+#define AON_RESV_LEN                                            (8U)
+#define AON_RESV_MSK                                            (((1U<>8)&0xff;p[2]=(val>>16)&0xff;p[3]=(val>>24)&0xff;}
+/**
+ * @brief Register access macro
+ */
+#define BL_RD_REG16(addr,regname)                    BL_RD_SHORT(addr+regname##_OFFSET)
+#define BL_WR_REG16(addr,regname,val)                BL_WR_SHORT(addr+regname##_OFFSET,val)
+#define BL_RD_REG(addr,regname)                      BL_RD_WORD(addr+regname##_OFFSET)
+#define BL_WR_REG(addr,regname,val)                  BL_WR_WORD(addr+regname##_OFFSET,val)
+#define BL_SET_REG_BIT(val,bitname)                  ( (val) |(1U<> bitname##_POS )
+#define BL_SET_REG_BITS_VAL(val,bitname,bitval)      ( ((val)&bitname##_UMSK) | ((uint32_t)(bitval)<
+#include 
+/* ARM CPU include files */
+#ifdef ARCH_ARM
+#ifdef CPU_AP_CM4
+    #include "core_cm4.h"             /* Cortex-M4 processor and core peripherals */
+#endif
+#ifdef CPU_NP_CM0
+    #include "core_cm0.h"             /* Cortex-M0 processor and core peripherals */
+#endif
+#endif
+/* RISCV CPU include files */
+#ifdef ARCH_RISCV
+#ifdef __GNUC__
+    #include "cmsis_compatible_gcc.h"
+    #include "clic.h"
+    #include "riscv_encoding.h"
+#endif
+#endif
+
+/**
+  * @}
+  */
+
+
+
+
+
+
+
+#endif
diff --git a/drivers/bl702_driver/regs/bl70x_reg.svc b/drivers/bl702_driver/regs/bl70x_reg.svc
new file mode 100644
index 00000000..c7c3d31a
--- /dev/null
+++ b/drivers/bl702_driver/regs/bl70x_reg.svc
@@ -0,0 +1,6063 @@
+
+
+	
+		
+			
+				
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+	
+
\ No newline at end of file
diff --git a/drivers/bl702_driver/regs/cam_reg.h b/drivers/bl702_driver/regs/cam_reg.h
new file mode 100644
index 00000000..e1b33be3
--- /dev/null
+++ b/drivers/bl702_driver/regs/cam_reg.h
@@ -0,0 +1,1158 @@
+/**
+  ******************************************************************************
+  * @file    cam_reg.h
+  * @version V1.2
+  * @date    2020-03-30
+  * @brief   This file is the description of.IP register
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __CAM_REG_H__
+#define  __CAM_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : dvp2axi_configue */
+#define CAM_DVP2AXI_CONFIGUE_OFFSET                             (0x0)
+#define CAM_REG_DVP_ENABLE                                      CAM_REG_DVP_ENABLE
+#define CAM_REG_DVP_ENABLE_POS                                  (0U)
+#define CAM_REG_DVP_ENABLE_LEN                                  (1U)
+#define CAM_REG_DVP_ENABLE_MSK                                  (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __CCI_REG_H__
+#define  __CCI_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : cci_cfg */
+#define CCI_CFG_OFFSET                                          (0x0)
+#define CCI_EN                                                  CCI_EN
+#define CCI_EN_POS                                              (0U)
+#define CCI_EN_LEN                                              (1U)
+#define CCI_EN_MSK                                              (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __CKS_REG_H__
+#define  __CKS_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : cks_config */
+#define CKS_CONFIG_OFFSET                                       (0x0)
+#define CKS_CR_CKS_CLR                                          CKS_CR_CKS_CLR
+#define CKS_CR_CKS_CLR_POS                                      (0U)
+#define CKS_CR_CKS_CLR_LEN                                      (1U)
+#define CKS_CR_CKS_CLR_MSK                                      (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __DMA_REG_H__
+#define  __DMA_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : DMA_IntStatus */
+#define DMA_INTSTATUS_OFFSET                                    (0x0)
+#define DMA_INTSTATUS                                           DMA_INTSTATUS
+#define DMA_INTSTATUS_POS                                       (0U)
+#define DMA_INTSTATUS_LEN                                       (8U)
+#define DMA_INTSTATUS_MSK                                       (((1U<
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __EF_CTRL_REG_H__
+#define  __EF_CTRL_REG_H__
+
+#include "bl702.h"
+
+/* 0x800 : ef_if_ctrl_0 */
+#define EF_CTRL_EF_IF_CTRL_0_OFFSET                             (0x800)
+#define EF_CTRL_EF_IF_0_AUTOLOAD_P1_DONE                        EF_CTRL_EF_IF_0_AUTOLOAD_P1_DONE
+#define EF_CTRL_EF_IF_0_AUTOLOAD_P1_DONE_POS                    (0U)
+#define EF_CTRL_EF_IF_0_AUTOLOAD_P1_DONE_LEN                    (1U)
+#define EF_CTRL_EF_IF_0_AUTOLOAD_P1_DONE_MSK                    (((1U<
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __EF_DATA_0_REG_H__
+#define  __EF_DATA_0_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : ef_cfg_0 */
+#define EF_DATA_0_EF_CFG_0_OFFSET                               (0x0)
+#define EF_DATA_0_EF_SF_AES_MODE                                EF_DATA_0_EF_SF_AES_MODE
+#define EF_DATA_0_EF_SF_AES_MODE_POS                            (0U)
+#define EF_DATA_0_EF_SF_AES_MODE_LEN                            (2U)
+#define EF_DATA_0_EF_SF_AES_MODE_MSK                            (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __EF_DATA_1_REG_H__
+#define  __EF_DATA_1_REG_H__
+
+#include "bl702.h"
+
+/* 0x80 : reg_key_slot_6_w0 */
+#define EF_DATA_1_REG_KEY_SLOT_6_W0_OFFSET                      (0x80)
+#define EF_DATA_1_REG_KEY_SLOT_6_W0                             EF_DATA_1_REG_KEY_SLOT_6_W0
+#define EF_DATA_1_REG_KEY_SLOT_6_W0_POS                         (0U)
+#define EF_DATA_1_REG_KEY_SLOT_6_W0_LEN                         (32U)
+#define EF_DATA_1_REG_KEY_SLOT_6_W0_MSK                         (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __EMAC_REG_H__
+#define  __EMAC_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : MODE */
+#define EMAC_MODE_OFFSET                                        (0x0)
+#define EMAC_RXEN                                               EMAC_RXEN
+#define EMAC_RXEN_POS                                           (0U)
+#define EMAC_RXEN_LEN                                           (1U)
+#define EMAC_RXEN_MSK                                           (((1U<
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __GLB_REG_H__
+#define  __GLB_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : clk_cfg0 */
+#define GLB_CLK_CFG0_OFFSET                                     (0x0)
+#define GLB_REG_PLL_EN                                          GLB_REG_PLL_EN
+#define GLB_REG_PLL_EN_POS                                      (0U)
+#define GLB_REG_PLL_EN_LEN                                      (1U)
+#define GLB_REG_PLL_EN_MSK                                      (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __GPIP_REG_H__
+#define  __GPIP_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : gpadc_config */
+#define GPIP_GPADC_CONFIG_OFFSET                                (0x0)
+#define GPIP_GPADC_DMA_EN                                       GPIP_GPADC_DMA_EN
+#define GPIP_GPADC_DMA_EN_POS                                   (0U)
+#define GPIP_GPADC_DMA_EN_LEN                                   (1U)
+#define GPIP_GPADC_DMA_EN_MSK                                   (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __HBN_REG_H__
+#define  __HBN_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : HBN_CTL */
+#define HBN_CTL_OFFSET                                          (0x0)
+#define HBN_RTC_CTL                                             HBN_RTC_CTL
+#define HBN_RTC_CTL_POS                                         (0U)
+#define HBN_RTC_CTL_LEN                                         (7U)
+#define HBN_RTC_CTL_MSK                                         (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __I2C_REG_H__
+#define  __I2C_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : i2c_config */
+#define I2C_CONFIG_OFFSET                                       (0x0)
+#define I2C_CR_I2C_M_EN                                         I2C_CR_I2C_M_EN
+#define I2C_CR_I2C_M_EN_POS                                     (0U)
+#define I2C_CR_I2C_M_EN_LEN                                     (1U)
+#define I2C_CR_I2C_M_EN_MSK                                     (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __I2S_REG_H__
+#define  __I2S_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : i2s_config */
+#define I2S_CONFIG_OFFSET                                       (0x0)
+#define I2S_CR_I2S_M_EN                                         I2S_CR_I2S_M_EN
+#define I2S_CR_I2S_M_EN_POS                                     (0U)
+#define I2S_CR_I2S_M_EN_LEN                                     (1U)
+#define I2S_CR_I2S_M_EN_MSK                                     (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __IR_REG_H__
+#define  __IR_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : irtx_config */
+#define IRTX_CONFIG_OFFSET                                      (0x0)
+#define IR_CR_IRTX_EN                                           IR_CR_IRTX_EN
+#define IR_CR_IRTX_EN_POS                                       (0U)
+#define IR_CR_IRTX_EN_LEN                                       (1U)
+#define IR_CR_IRTX_EN_MSK                                       (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __KYS_REG_H__
+#define  __KYS_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : ks_ctrl */
+#define KYS_KS_CTRL_OFFSET                                      (0x0)
+#define KYS_KS_EN                                               KYS_KS_EN
+#define KYS_KS_EN_POS                                           (0U)
+#define KYS_KS_EN_LEN                                           (1U)
+#define KYS_KS_EN_MSK                                           (((1U<
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __L1C_REG_H__
+#define  __L1C_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : l1c_config */
+#define L1C_CONFIG_OFFSET                                       (0x0)
+#define L1C_CACHEABLE                                           L1C_CACHEABLE
+#define L1C_CACHEABLE_POS                                       (0U)
+#define L1C_CACHEABLE_LEN                                       (1U)
+#define L1C_CACHEABLE_MSK                                       (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __MJPEG_REG_H__
+#define  __MJPEG_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : mjpeg_control_1 */
+#define MJPEG_CONTROL_1_OFFSET                                  (0x0)
+#define MJPEG_REG_MJPEG_ENABLE                                  MJPEG_REG_MJPEG_ENABLE
+#define MJPEG_REG_MJPEG_ENABLE_POS                              (0U)
+#define MJPEG_REG_MJPEG_ENABLE_LEN                              (1U)
+#define MJPEG_REG_MJPEG_ENABLE_MSK                              (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __PDM_REG_H__
+#define  __PDM_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : pdm_datapath_config */
+#define PDM_DATAPATH_CONFIG_OFFSET                              (0x0)
+#define PDM_EN                                                  PDM_EN
+#define PDM_EN_POS                                              (0U)
+#define PDM_EN_LEN                                              (1U)
+#define PDM_EN_MSK                                              (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __PDS_REG_H__
+#define  __PDS_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : PDS_CTL */
+#define PDS_CTL_OFFSET                                          (0x0)
+#define PDS_START_PS                                            PDS_START_PS
+#define PDS_START_PS_POS                                        (0U)
+#define PDS_START_PS_LEN                                        (1U)
+#define PDS_START_PS_MSK                                        (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __PWM_REG_H__
+#define  __PWM_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : pwm_int_config */
+#define PWM_INT_CONFIG_OFFSET                                   (0x0)
+#define PWM_INTERRUPT_STS                                       PWM_INTERRUPT_STS
+#define PWM_INTERRUPT_STS_POS                                   (0U)
+#define PWM_INTERRUPT_STS_LEN                                   (6U)
+#define PWM_INTERRUPT_STS_MSK                                   (((1U<
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __QDEC_REG_H__
+#define  __QDEC_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : qdec0_ctrl0 */
+#define QDEC0_CTRL0_OFFSET                                      (0x0)
+#define QDEC_EN                                                 QDEC_EN
+#define QDEC_EN_POS                                             (0U)
+#define QDEC_EN_LEN                                             (1U)
+#define QDEC_EN_MSK                                             (((1U<
© COPYRIGHT(c) 2018 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __RF_FPGA_REG_H__
+#define  __RF_FPGA_REG_H__
+
+#include "bl702.h"
+
+/* 0x600 : rf_fpga_ctrl_0 */
+#define RF_FPGA_CTRL_0_OFFSET                                   (0x600)
+#define RF_FPGA_RF_FSM_ST_CCI_4S                                RF_FPGA_RF_FSM_ST_CCI_4S
+#define RF_FPGA_RF_FSM_ST_CCI_4S_POS                            (0U)
+#define RF_FPGA_RF_FSM_ST_CCI_4S_LEN                            (5U)
+#define RF_FPGA_RF_FSM_ST_CCI_4S_MSK                            (((1U<
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __RF_REG_H__
+#define  __RF_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : Silicon revision */
+#define RF_REV_OFFSET                                           (0x0)
+#define RF_REV                                                  RF_REV
+#define RF_REV_POS                                              (0U)
+#define RF_REV_LEN                                              (8U)
+#define RF_REV_MSK                                              (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __SEC_DBG_REG_H__
+#define  __SEC_DBG_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : sd_chip_id_low */
+#define SEC_DBG_SD_CHIP_ID_LOW_OFFSET                           (0x0)
+#define SEC_DBG_SD_CHIP_ID_LOW                                  SEC_DBG_SD_CHIP_ID_LOW
+#define SEC_DBG_SD_CHIP_ID_LOW_POS                              (0U)
+#define SEC_DBG_SD_CHIP_ID_LOW_LEN                              (32U)
+#define SEC_DBG_SD_CHIP_ID_LOW_MSK                              (((1U<
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __SEC_ENG_REG_H__
+#define  __SEC_ENG_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : se_sha_0_ctrl */
+#define SEC_ENG_SE_SHA_0_CTRL_OFFSET                            (0x0)
+#define SEC_ENG_SE_SHA_0_BUSY                                   SEC_ENG_SE_SHA_0_BUSY
+#define SEC_ENG_SE_SHA_0_BUSY_POS                               (0U)
+#define SEC_ENG_SE_SHA_0_BUSY_LEN                               (1U)
+#define SEC_ENG_SE_SHA_0_BUSY_MSK                               (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __SF_CTRL_REG_H__
+#define  __SF_CTRL_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : sf_ctrl_0 */
+#define SF_CTRL_0_OFFSET                                        (0x0)
+#define SF_CTRL_SF_CLK_SF_RX_INV_SEL                            SF_CTRL_SF_CLK_SF_RX_INV_SEL
+#define SF_CTRL_SF_CLK_SF_RX_INV_SEL_POS                        (2U)
+#define SF_CTRL_SF_CLK_SF_RX_INV_SEL_LEN                        (1U)
+#define SF_CTRL_SF_CLK_SF_RX_INV_SEL_MSK                        (((1U<
+	
+		bouffalolab
+		bouffalolab
+		702
+		WiFi BT
+		high-performance, 32-bit RV32IMAFC core
+		8
+		32
+		32
+		0x00000000
+		0xFFFFFFFF
+		
+			702
+			little
+		
+		
+			
+				glb
+				glb.
+				0x40000000
+				glb
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						clk_cfg0
+						clk_cfg0.
+						0x0
+						
+							
+								glb_id
+								28
+								31
+							
+							
+								chip_rdy
+								27
+								27
+							
+							
+								fclk_sw_state
+								24
+								26
+							
+							
+								reg_bclk_div
+								16
+								23
+							
+							
+								reg_hclk_div
+								8
+								15
+							
+							
+								hbn_root_clk_sel
+								6
+								7
+							
+							
+								reg_pll_sel
+								4
+								5
+							
+							
+								reg_bclk_en
+								3
+								3
+							
+							
+								reg_hclk_en
+								2
+								2
+							
+							
+								reg_fclk_en
+								1
+								1
+							
+							
+								reg_pll_en
+								0
+								0
+							
+						
+					
+					
+						clk_cfg1
+						clk_cfg1.
+						0x4
+						
+							
+								reg_cam_ref_clk_div
+								30
+								31
+							
+							
+								reg_cam_ref_clk_src_sel
+								29
+								29
+							
+							
+								reg_cam_ref_clk_en
+								28
+								28
+							
+							
+								m154_zbEn
+								25
+								25
+							
+							
+								ble_en
+								24
+								24
+							
+							
+								ble_clk_sel
+								16
+								21
+							
+							
+								reg_i2s_0_ref_clk_oe
+								14
+								14
+							
+							
+								reg_i2s0_clk_en
+								13
+								13
+							
+							
+								reg_i2s_clk_sel
+								12
+								12
+							
+							
+								dll_48m_div_en
+								9
+								9
+							
+							
+								usb_clk_en
+								8
+								8
+							
+							
+								qdec_clk_sel
+								7
+								7
+							
+							
+								qdec_clk_div
+								0
+								4
+							
+						
+					
+					
+						clk_cfg2
+						clk_cfg2.
+						0x8
+						
+							
+								dma_clk_en
+								24
+								31
+							
+							
+								ir_clk_en
+								23
+								23
+							
+							
+								ir_clk_div
+								16
+								21
+							
+							
+								sf_clk_sel2
+								14
+								15
+							
+							
+								sf_clk_sel
+								12
+								13
+							
+							
+								sf_clk_en
+								11
+								11
+							
+							
+								sf_clk_div
+								8
+								10
+							
+							
+								hbn_uart_clk_sel
+								7
+								7
+							
+							
+								uart_clk_en
+								4
+								4
+							
+							
+								uart_clk_div
+								0
+								2
+							
+						
+					
+					
+						clk_cfg3
+						clk_cfg3.
+						0xC
+						
+							
+								chip_clk_out_1_sel
+								30
+								31
+							
+							
+								chip_clk_out_0_sel
+								28
+								29
+							
+							
+								i2c_clk_en
+								24
+								24
+							
+							
+								i2c_clk_div
+								16
+								23
+							
+							
+								cfg_inv_eth_rx_clk
+								10
+								10
+							
+							
+								cfg_inv_rf_test_clk_o
+								9
+								9
+							
+							
+								spi_clk_en
+								8
+								8
+							
+							
+								cfg_inv_eth_tx_clk
+								7
+								7
+							
+							
+								cfg_inv_eth_ref_clk_o
+								6
+								6
+							
+							
+								cfg_sel_eth_ref_clk_o
+								5
+								5
+							
+							
+								spi_clk_div
+								0
+								4
+							
+						
+					
+					
+						swrst_cfg0
+						swrst_cfg0.
+						0x10
+						
+							
+								swrst_s30
+								8
+								8
+							
+							
+								swrst_s20
+								4
+								4
+							
+							
+								swrst_s01
+								1
+								1
+							
+							
+								swrst_s00
+								0
+								0
+							
+						
+					
+					
+						swrst_cfg1
+						swrst_cfg1.
+						0x14
+						
+							
+								swrst_s1ae
+								30
+								30
+							
+							
+								swrst_s1ad
+								29
+								29
+							
+							
+								swrst_s1ac
+								28
+								28
+							
+							
+								swrst_s1ab
+								27
+								27
+							
+							
+								swrst_s1aa
+								26
+								26
+							
+							
+								swrst_s1a9
+								25
+								25
+							
+							
+								swrst_s1a8
+								24
+								24
+							
+							
+								swrst_s1a7
+								23
+								23
+							
+							
+								swrst_s1a6
+								22
+								22
+							
+							
+								swrst_s1a5
+								21
+								21
+							
+							
+								swrst_s1a4
+								20
+								20
+							
+							
+								swrst_s1a3
+								19
+								19
+							
+							
+								swrst_s1a2
+								18
+								18
+							
+							
+								swrst_s1a1
+								17
+								17
+							
+							
+								swrst_s1a0
+								16
+								16
+							
+							
+								swrst_s1f
+								15
+								15
+							
+							
+								swrst_s1e
+								14
+								14
+							
+							
+								swrst_s1d
+								13
+								13
+							
+							
+								swrst_s1c
+								12
+								12
+							
+							
+								swrst_s1b
+								11
+								11
+							
+							
+								swrst_s1a
+								10
+								10
+							
+							
+								swrst_s19
+								9
+								9
+							
+							
+								swrst_s18
+								8
+								8
+							
+							
+								swrst_s17
+								7
+								7
+							
+							
+								swrst_s16
+								6
+								6
+							
+							
+								swrst_s15
+								5
+								5
+							
+							
+								swrst_s14
+								4
+								4
+							
+							
+								swrst_s13
+								3
+								3
+							
+							
+								swrst_s12
+								2
+								2
+							
+							
+								swrst_s11
+								1
+								1
+							
+							
+								swrst_s10
+								0
+								0
+							
+						
+					
+					
+						swrst_cfg2
+						swrst_cfg2.
+						0x18
+						
+							
+								pka_clk_sel
+								24
+								24
+							
+							
+								reg_ctrl_reset_dummy
+								4
+								7
+							
+							
+								reg_ctrl_sys_reset
+								2
+								2
+							
+							
+								reg_ctrl_cpu_reset
+								1
+								1
+							
+							
+								reg_ctrl_pwron_rst
+								0
+								0
+							
+						
+					
+					
+						swrst_cfg3
+						swrst_cfg3.
+						0x1C
+						
+					
+					
+						cgen_cfg0
+						cgen_cfg0.
+						0x20
+						
+							
+								cgen_m
+								0
+								7
+							
+						
+					
+					
+						cgen_cfg1
+						cgen_cfg1.
+						0x24
+						
+							
+								cgen_s1a
+								16
+								31
+							
+							
+								cgen_s1
+								0
+								15
+							
+						
+					
+					
+						cgen_cfg2
+						cgen_cfg2.
+						0x28
+						
+							
+								cgen_s3
+								4
+								4
+							
+							
+								cgen_s2
+								0
+								0
+							
+						
+					
+					
+						cgen_cfg3
+						cgen_cfg3.
+						0x2C
+						
+					
+					
+						MBIST_CTL
+						MBIST_CTL.
+						0x30
+						
+							
+								reg_mbist_rst_n
+								31
+								31
+							
+							
+								em_ram_mbist_mode
+								5
+								5
+							
+							
+								ocram_mbist_mode
+								4
+								4
+							
+							
+								tag_mbist_mode
+								3
+								3
+							
+							
+								hsram_cache_mbist_mode
+								2
+								2
+							
+							
+								hsram_mem_mbist_mode
+								1
+								1
+							
+							
+								irom_mbist_mode
+								0
+								0
+							
+						
+					
+					
+						MBIST_STAT
+						MBIST_STAT.
+						0x34
+						
+							
+								em_ram_mbist_fail
+								21
+								21
+							
+							
+								ocram_mbist_fail
+								20
+								20
+							
+							
+								tag_mbist_fail
+								19
+								19
+							
+							
+								hsram_cache_mbist_fail
+								18
+								18
+							
+							
+								hsram_mem_mbist_fail
+								17
+								17
+							
+							
+								irom_mbist_fail
+								16
+								16
+							
+							
+								em_ram_mbist_done
+								5
+								5
+							
+							
+								ocram_mbist_done
+								4
+								4
+							
+							
+								tag_mbist_done
+								3
+								3
+							
+							
+								hsram_cache_mbist_done
+								2
+								2
+							
+							
+								hsram_mem_mbist_done
+								1
+								1
+							
+							
+								irom_mbist_done
+								0
+								0
+							
+						
+					
+					
+						bmx_cfg1
+						bmx_cfg1.
+						0x50
+						
+							
+								hbn_apb_cfg
+								24
+								31
+							
+							
+								pds_apb_cfg
+								16
+								23
+							
+							
+								hsel_option
+								12
+								15
+							
+							
+								bmx_gating_dis
+								10
+								10
+							
+							
+								bmx_busy_option_dis
+								9
+								9
+							
+							
+								bmx_err_en
+								8
+								8
+							
+							
+								bmx_arb_mode
+								4
+								5
+							
+							
+								bmx_timeout_en
+								0
+								3
+							
+						
+					
+					
+						bmx_cfg2
+						bmx_cfg2.
+						0x54
+						
+							
+								bmx_dbg_sel
+								28
+								31
+							
+							
+								reg_w_thre_l1c
+								10
+								11
+							
+							
+								reg_w_thre_bmx
+								8
+								9
+							
+							
+								bmx_err_tz
+								5
+								5
+							
+							
+								bmx_err_dec
+								4
+								4
+							
+							
+								bmx_err_addr_dis
+								0
+								0
+							
+						
+					
+					
+						bmx_err_addr
+						bmx_err_addr.
+						0x58
+						
+							
+								bmx_err_addr
+								0
+								31
+							
+						
+					
+					
+						bmx_dbg_out
+						bmx_dbg_out.
+						0x5C
+						
+							
+								bmx_dbg_out
+								0
+								31
+							
+						
+					
+					
+						rsv0
+						rsv0.
+						0x60
+						
+							
+								rsvd_31_0
+								0
+								31
+							
+						
+					
+					
+						rsv1
+						rsv1.
+						0x64
+						
+							
+								rsvd_31_0
+								0
+								31
+							
+						
+					
+					
+						rsv2
+						rsv2.
+						0x68
+						
+							
+								rsvd_31_0
+								0
+								31
+							
+						
+					
+					
+						rsv3
+						rsv3.
+						0x6C
+						
+							
+								rsvd_31_0
+								0
+								31
+							
+						
+					
+					
+						sram_ret
+						sram_ret.
+						0x70
+						
+							
+								reg_sram_ret
+								0
+								31
+							
+						
+					
+					
+						sram_slp
+						sram_slp.
+						0x74
+						
+							
+								reg_sram_slp
+								0
+								31
+							
+						
+					
+					
+						sram_parm
+						sram_parm.
+						0x78
+						
+							
+								reg_sram_parm
+								0
+								31
+							
+						
+					
+					
+						seam_misc
+						seam_misc.
+						0x7C
+						
+							
+								em_sel
+								0
+								3
+							
+						
+					
+					
+						glb_parm
+						glb_parm.
+						0x80
+						
+							
+								pin_sel_emac_cam
+								31
+								31
+							
+							
+								reg_ext_rst_smt
+								30
+								30
+							
+							
+								reg_kys_drv_val
+								29
+								29
+							
+							
+								uart_swap_set
+								24
+								27
+							
+							
+								p6_jtag_use_io_0_2_7
+								23
+								23
+							
+							
+								p5_dac_test_with_jtag
+								21
+								21
+							
+							
+								p4_adc_test_with_jtag
+								20
+								20
+							
+							
+								p3_cci_use_io_0_2_7
+								19
+								19
+							
+							
+								p2_dac_test_with_cci
+								18
+								18
+							
+							
+								p1_adc_test_with_cci
+								17
+								17
+							
+							
+								reg_cci_use_jtag_pin
+								16
+								16
+							
+							
+								reg_spi_0_swap
+								13
+								13
+							
+							
+								reg_spi_0_master_mode
+								12
+								12
+							
+							
+								cfg_flash_scenario
+								10
+								11
+							
+							
+								cfg_sflash2_swap_cs_io2
+								9
+								9
+							
+							
+								cfg_sflash2_swap_io0_io3
+								8
+								8
+							
+							
+								jtag_swap_set
+								0
+								7
+							
+						
+					
+					
+						PDM_CLK_CTRL
+						PDM_CLK_CTRL.
+						0x84
+						
+							
+								reg_pdm0_clk_en
+								7
+								7
+							
+							
+								reg_pdm0_clk_div
+								0
+								5
+							
+						
+					
+					
+						GPIO_USE_PSRAM__IO
+						GPIO_USE_PSRAM__IO.
+						0x88
+						
+							
+								cfg_gpio_use_psram_io
+								0
+								5
+							
+						
+					
+					
+						CPU_CLK_CFG
+						CPU_CLK_CFG.
+						0x90
+						
+							
+								debug_ndreset_gate
+								20
+								20
+							
+							
+								cpu_rtc_sel
+								19
+								19
+							
+							
+								cpu_rtc_en
+								18
+								18
+							
+							
+								cpu_rtc_div
+								0
+								16
+							
+						
+					
+					
+						GPADC_32M_SRC_CTRL
+						GPADC_32M_SRC_CTRL.
+						0xA4
+						
+							
+								gpadc_32m_div_en
+								8
+								8
+							
+							
+								gpadc_32m_clk_sel
+								7
+								7
+							
+							
+								gpadc_32m_clk_div
+								0
+								5
+							
+						
+					
+					
+						DIG32K_WAKEUP_CTRL
+						DIG32K_WAKEUP_CTRL.
+						0xA8
+						
+							
+								reg_en_platform_wakeup
+								31
+								31
+							
+							
+								dig_clk_src_sel
+								28
+								29
+							
+							
+								dig_512k_comp
+								25
+								25
+							
+							
+								dig_512k_en
+								24
+								24
+							
+							
+								dig_512k_div
+								16
+								22
+							
+							
+								dig_32k_comp
+								13
+								13
+							
+							
+								dig_32k_en
+								12
+								12
+							
+							
+								dig_32k_div
+								0
+								10
+							
+						
+					
+					
+						WIFI_BT_COEX_CTRL
+						WIFI_BT_COEX_CTRL.
+						0xAC
+						
+							
+								en_gpio_bt_coex
+								12
+								12
+							
+							
+								coex_bt_bw
+								11
+								11
+							
+							
+								coex_bt_pti
+								7
+								10
+							
+							
+								coex_bt_channel
+								0
+								6
+							
+						
+					
+					
+						BZ_COEX_CTRL
+						BZ_COEX_CTRL.
+						0xB0
+						
+							
+								coex_arb
+								28
+								31
+							
+							
+								ble_tx_abort_dis
+								27
+								27
+							
+							
+								ble_rx_abort_dis
+								26
+								26
+							
+							
+								m154_tx_abort_dis
+								25
+								25
+							
+							
+								m154_rx_abort_dis
+								24
+								24
+							
+							
+								coex_force_ch
+								16
+								22
+							
+							
+								coex_option
+								15
+								15
+							
+							
+								force_ble_win
+								14
+								14
+							
+							
+								force_m154_win
+								13
+								13
+							
+							
+								coex_pri
+								12
+								12
+							
+							
+								bz_abort_pol
+								11
+								11
+							
+							
+								bz_active_pol
+								10
+								10
+							
+							
+								bz_pri_pol
+								9
+								9
+							
+							
+								bz_pri_en
+								8
+								8
+							
+							
+								bz_pri_thr
+								4
+								7
+							
+							
+								m154_rx_ignore
+								3
+								3
+							
+							
+								ble_rx_ignore
+								2
+								2
+							
+							
+								wlan_en
+								1
+								1
+							
+							
+								coex_en
+								0
+								0
+							
+						
+					
+					
+						UART_SIG_SEL_0
+						UART_SIG_SEL_0.
+						0xC0
+						
+							
+								uart_sig_7_sel
+								28
+								31
+							
+							
+								uart_sig_6_sel
+								24
+								27
+							
+							
+								uart_sig_5_sel
+								20
+								23
+							
+							
+								uart_sig_4_sel
+								16
+								19
+							
+							
+								uart_sig_3_sel
+								12
+								15
+							
+							
+								uart_sig_2_sel
+								8
+								11
+							
+							
+								uart_sig_1_sel
+								4
+								7
+							
+							
+								uart_sig_0_sel
+								0
+								3
+							
+						
+					
+					
+						DBG_SEL_LL
+						DBG_SEL_LL.
+						0xD0
+						
+							
+								reg_dbg_ll_ctrl
+								0
+								31
+							
+						
+					
+					
+						DBG_SEL_LH
+						DBG_SEL_LH.
+						0xD4
+						
+							
+								reg_dbg_lh_ctrl
+								0
+								31
+							
+						
+					
+					
+						DBG_SEL_HL
+						DBG_SEL_HL.
+						0xD8
+						
+							
+								reg_dbg_hl_ctrl
+								0
+								31
+							
+						
+					
+					
+						DBG_SEL_HH
+						DBG_SEL_HH.
+						0xDC
+						
+							
+								reg_dbg_hh_ctrl
+								0
+								31
+							
+						
+					
+					
+						debug
+						debug.
+						0xE0
+						
+							
+								debug_i
+								1
+								31
+							
+							
+								debug_oe
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL0
+						GPIO_CFGCTL0.
+						0x100
+						
+							
+								reg_gpio_1_func_sel
+								24
+								28
+							
+							
+								reg_gpio_1_pd
+								21
+								21
+							
+							
+								reg_gpio_1_pu
+								20
+								20
+							
+							
+								reg_gpio_1_drv
+								18
+								19
+							
+							
+								reg_gpio_1_smt
+								17
+								17
+							
+							
+								reg_gpio_1_ie
+								16
+								16
+							
+							
+								reg_gpio_0_func_sel
+								8
+								12
+							
+							
+								reg_gpio_0_pd
+								5
+								5
+							
+							
+								reg_gpio_0_pu
+								4
+								4
+							
+							
+								reg_gpio_0_drv
+								2
+								3
+							
+							
+								reg_gpio_0_smt
+								1
+								1
+							
+							
+								reg_gpio_0_ie
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL1
+						GPIO_CFGCTL1.
+						0x104
+						
+							
+								reg_gpio_3_func_sel
+								24
+								28
+							
+							
+								reg_gpio_3_pd
+								21
+								21
+							
+							
+								reg_gpio_3_pu
+								20
+								20
+							
+							
+								reg_gpio_3_drv
+								18
+								19
+							
+							
+								reg_gpio_3_smt
+								17
+								17
+							
+							
+								reg_gpio_3_ie
+								16
+								16
+							
+							
+								reg_gpio_2_func_sel
+								8
+								12
+							
+							
+								reg_gpio_2_pd
+								5
+								5
+							
+							
+								reg_gpio_2_pu
+								4
+								4
+							
+							
+								reg_gpio_2_drv
+								2
+								3
+							
+							
+								reg_gpio_2_smt
+								1
+								1
+							
+							
+								reg_gpio_2_ie
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL2
+						GPIO_CFGCTL2.
+						0x108
+						
+							
+								reg_gpio_5_func_sel
+								24
+								28
+							
+							
+								reg_gpio_5_pd
+								21
+								21
+							
+							
+								reg_gpio_5_pu
+								20
+								20
+							
+							
+								reg_gpio_5_drv
+								18
+								19
+							
+							
+								reg_gpio_5_smt
+								17
+								17
+							
+							
+								reg_gpio_5_ie
+								16
+								16
+							
+							
+								reg_gpio_4_func_sel
+								8
+								12
+							
+							
+								reg_gpio_4_pd
+								5
+								5
+							
+							
+								reg_gpio_4_pu
+								4
+								4
+							
+							
+								reg_gpio_4_drv
+								2
+								3
+							
+							
+								reg_gpio_4_smt
+								1
+								1
+							
+							
+								reg_gpio_4_ie
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL3
+						GPIO_CFGCTL3.
+						0x10C
+						
+							
+								reg_gpio_7_func_sel
+								24
+								28
+							
+							
+								reg_gpio_7_pd
+								21
+								21
+							
+							
+								reg_gpio_7_pu
+								20
+								20
+							
+							
+								reg_gpio_7_drv
+								18
+								19
+							
+							
+								reg_gpio_7_smt
+								17
+								17
+							
+							
+								reg_gpio_7_ie
+								16
+								16
+							
+							
+								reg_gpio_6_func_sel
+								8
+								12
+							
+							
+								reg_gpio_6_pd
+								5
+								5
+							
+							
+								reg_gpio_6_pu
+								4
+								4
+							
+							
+								reg_gpio_6_drv
+								2
+								3
+							
+							
+								reg_gpio_6_smt
+								1
+								1
+							
+							
+								reg_gpio_6_ie
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL4
+						GPIO_CFGCTL4.
+						0x110
+						
+							
+								reg_gpio_9_func_sel
+								24
+								28
+							
+							
+								reg_gpio_9_pd
+								21
+								21
+							
+							
+								reg_gpio_9_pu
+								20
+								20
+							
+							
+								reg_gpio_9_drv
+								18
+								19
+							
+							
+								reg_gpio_9_smt
+								17
+								17
+							
+							
+								reg_gpio_9_ie
+								16
+								16
+							
+							
+								reg_gpio_8_func_sel
+								8
+								12
+							
+							
+								reg_gpio_8_pd
+								5
+								5
+							
+							
+								reg_gpio_8_pu
+								4
+								4
+							
+							
+								reg_gpio_8_drv
+								2
+								3
+							
+							
+								reg_gpio_8_smt
+								1
+								1
+							
+							
+								reg_gpio_8_ie
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL5
+						GPIO_CFGCTL5.
+						0x114
+						
+							
+								reg_gpio_11_func_sel
+								24
+								28
+							
+							
+								reg_gpio_11_pd
+								21
+								21
+							
+							
+								reg_gpio_11_pu
+								20
+								20
+							
+							
+								reg_gpio_11_drv
+								18
+								19
+							
+							
+								reg_gpio_11_smt
+								17
+								17
+							
+							
+								reg_gpio_11_ie
+								16
+								16
+							
+							
+								reg_gpio_10_func_sel
+								8
+								12
+							
+							
+								reg_gpio_10_pd
+								5
+								5
+							
+							
+								reg_gpio_10_pu
+								4
+								4
+							
+							
+								reg_gpio_10_drv
+								2
+								3
+							
+							
+								reg_gpio_10_smt
+								1
+								1
+							
+							
+								reg_gpio_10_ie
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL6
+						GPIO_CFGCTL6.
+						0x118
+						
+							
+								reg_gpio_13_func_sel
+								24
+								28
+							
+							
+								reg_gpio_13_pd
+								21
+								21
+							
+							
+								reg_gpio_13_pu
+								20
+								20
+							
+							
+								reg_gpio_13_drv
+								18
+								19
+							
+							
+								reg_gpio_13_smt
+								17
+								17
+							
+							
+								reg_gpio_13_ie
+								16
+								16
+							
+							
+								reg_gpio_12_func_sel
+								8
+								12
+							
+							
+								reg_gpio_12_pd
+								5
+								5
+							
+							
+								reg_gpio_12_pu
+								4
+								4
+							
+							
+								reg_gpio_12_drv
+								2
+								3
+							
+							
+								reg_gpio_12_smt
+								1
+								1
+							
+							
+								reg_gpio_12_ie
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL7
+						GPIO_CFGCTL7.
+						0x11C
+						
+							
+								reg_gpio_15_func_sel
+								24
+								28
+							
+							
+								reg_gpio_15_pd
+								21
+								21
+							
+							
+								reg_gpio_15_pu
+								20
+								20
+							
+							
+								reg_gpio_15_drv
+								18
+								19
+							
+							
+								reg_gpio_15_smt
+								17
+								17
+							
+							
+								reg_gpio_15_ie
+								16
+								16
+							
+							
+								reg_gpio_14_func_sel
+								8
+								12
+							
+							
+								reg_gpio_14_pd
+								5
+								5
+							
+							
+								reg_gpio_14_pu
+								4
+								4
+							
+							
+								reg_gpio_14_drv
+								2
+								3
+							
+							
+								reg_gpio_14_smt
+								1
+								1
+							
+							
+								reg_gpio_14_ie
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL8
+						GPIO_CFGCTL8.
+						0x120
+						
+							
+								reg_gpio_17_func_sel
+								24
+								28
+							
+							
+								reg_gpio_17_pd
+								21
+								21
+							
+							
+								reg_gpio_17_pu
+								20
+								20
+							
+							
+								reg_gpio_17_drv
+								18
+								19
+							
+							
+								reg_gpio_17_smt
+								17
+								17
+							
+							
+								reg_gpio_17_ie
+								16
+								16
+							
+							
+								reg_gpio_16_func_sel
+								8
+								12
+							
+							
+								reg_gpio_16_pd
+								5
+								5
+							
+							
+								reg_gpio_16_pu
+								4
+								4
+							
+							
+								reg_gpio_16_drv
+								2
+								3
+							
+							
+								reg_gpio_16_smt
+								1
+								1
+							
+							
+								reg_gpio_16_ie
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL9
+						GPIO_CFGCTL9.
+						0x124
+						
+							
+								reg_gpio_19_func_sel
+								24
+								28
+							
+							
+								reg_gpio_19_pd
+								21
+								21
+							
+							
+								reg_gpio_19_pu
+								20
+								20
+							
+							
+								reg_gpio_19_drv
+								18
+								19
+							
+							
+								reg_gpio_19_smt
+								17
+								17
+							
+							
+								reg_gpio_19_ie
+								16
+								16
+							
+							
+								reg_gpio_18_func_sel
+								8
+								12
+							
+							
+								reg_gpio_18_pd
+								5
+								5
+							
+							
+								reg_gpio_18_pu
+								4
+								4
+							
+							
+								reg_gpio_18_drv
+								2
+								3
+							
+							
+								reg_gpio_18_smt
+								1
+								1
+							
+							
+								reg_gpio_18_ie
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL10
+						GPIO_CFGCTL10.
+						0x128
+						
+							
+								reg_gpio_21_func_sel
+								24
+								28
+							
+							
+								reg_gpio_21_pd
+								21
+								21
+							
+							
+								reg_gpio_21_pu
+								20
+								20
+							
+							
+								reg_gpio_21_drv
+								18
+								19
+							
+							
+								reg_gpio_21_smt
+								17
+								17
+							
+							
+								reg_gpio_21_ie
+								16
+								16
+							
+							
+								reg_gpio_20_func_sel
+								8
+								12
+							
+							
+								reg_gpio_20_pd
+								5
+								5
+							
+							
+								reg_gpio_20_pu
+								4
+								4
+							
+							
+								reg_gpio_20_drv
+								2
+								3
+							
+							
+								reg_gpio_20_smt
+								1
+								1
+							
+							
+								reg_gpio_20_ie
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL11
+						GPIO_CFGCTL11.
+						0x12C
+						
+							
+								reg_gpio_23_func_sel
+								24
+								28
+							
+							
+								reg_gpio_23_pd
+								21
+								21
+							
+							
+								reg_gpio_23_pu
+								20
+								20
+							
+							
+								reg_gpio_23_drv
+								18
+								19
+							
+							
+								reg_gpio_23_smt
+								17
+								17
+							
+							
+								reg_gpio_23_ie
+								16
+								16
+							
+							
+								reg_gpio_22_func_sel
+								8
+								12
+							
+							
+								reg_gpio_22_pd
+								5
+								5
+							
+							
+								reg_gpio_22_pu
+								4
+								4
+							
+							
+								reg_gpio_22_drv
+								2
+								3
+							
+							
+								reg_gpio_22_smt
+								1
+								1
+							
+							
+								reg_gpio_22_ie
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL12
+						GPIO_CFGCTL12.
+						0x130
+						
+							
+								reg_gpio_25_func_sel
+								24
+								28
+							
+							
+								reg_gpio_25_pd
+								21
+								21
+							
+							
+								reg_gpio_25_pu
+								20
+								20
+							
+							
+								reg_gpio_25_drv
+								18
+								19
+							
+							
+								reg_gpio_25_smt
+								17
+								17
+							
+							
+								reg_gpio_25_ie
+								16
+								16
+							
+							
+								reg_gpio_24_func_sel
+								8
+								12
+							
+							
+								reg_gpio_24_pd
+								5
+								5
+							
+							
+								reg_gpio_24_pu
+								4
+								4
+							
+							
+								reg_gpio_24_drv
+								2
+								3
+							
+							
+								reg_gpio_24_smt
+								1
+								1
+							
+							
+								reg_gpio_24_ie
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL13
+						GPIO_CFGCTL13.
+						0x134
+						
+							
+								reg_gpio_27_func_sel
+								24
+								28
+							
+							
+								reg_gpio_27_pd
+								21
+								21
+							
+							
+								reg_gpio_27_pu
+								20
+								20
+							
+							
+								reg_gpio_27_drv
+								18
+								19
+							
+							
+								reg_gpio_27_smt
+								17
+								17
+							
+							
+								reg_gpio_27_ie
+								16
+								16
+							
+							
+								reg_gpio_26_func_sel
+								8
+								12
+							
+							
+								reg_gpio_26_pd
+								5
+								5
+							
+							
+								reg_gpio_26_pu
+								4
+								4
+							
+							
+								reg_gpio_26_drv
+								2
+								3
+							
+							
+								reg_gpio_26_smt
+								1
+								1
+							
+							
+								reg_gpio_26_ie
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL14
+						GPIO_CFGCTL14.
+						0x138
+						
+							
+								reg_gpio_29_func_sel
+								24
+								28
+							
+							
+								reg_gpio_29_pd
+								21
+								21
+							
+							
+								reg_gpio_29_pu
+								20
+								20
+							
+							
+								reg_gpio_29_drv
+								18
+								19
+							
+							
+								reg_gpio_29_smt
+								17
+								17
+							
+							
+								reg_gpio_29_ie
+								16
+								16
+							
+							
+								reg_gpio_28_func_sel
+								8
+								12
+							
+							
+								reg_gpio_28_pd
+								5
+								5
+							
+							
+								reg_gpio_28_pu
+								4
+								4
+							
+							
+								reg_gpio_28_drv
+								2
+								3
+							
+							
+								reg_gpio_28_smt
+								1
+								1
+							
+							
+								reg_gpio_28_ie
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL15
+						GPIO_CFGCTL15.
+						0x13C
+						
+							
+								reg_gpio_31_func_sel
+								24
+								28
+							
+							
+								reg_gpio_31_pd
+								21
+								21
+							
+							
+								reg_gpio_31_pu
+								20
+								20
+							
+							
+								reg_gpio_31_drv
+								18
+								19
+							
+							
+								reg_gpio_31_smt
+								17
+								17
+							
+							
+								reg_gpio_31_ie
+								16
+								16
+							
+							
+								reg_gpio_30_func_sel
+								8
+								12
+							
+							
+								reg_gpio_30_pd
+								5
+								5
+							
+							
+								reg_gpio_30_pu
+								4
+								4
+							
+							
+								reg_gpio_30_drv
+								2
+								3
+							
+							
+								reg_gpio_30_smt
+								1
+								1
+							
+							
+								reg_gpio_30_ie
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL16
+						GPIO_CFGCTL16.
+						0x140
+						
+							
+								reg_gpio_33_pd
+								21
+								21
+							
+							
+								reg_gpio_33_pu
+								20
+								20
+							
+							
+								reg_gpio_33_drv
+								18
+								19
+							
+							
+								reg_gpio_33_smt
+								17
+								17
+							
+							
+								reg_gpio_33_ie
+								16
+								16
+							
+							
+								reg_gpio_32_pd
+								5
+								5
+							
+							
+								reg_gpio_32_pu
+								4
+								4
+							
+							
+								reg_gpio_32_drv
+								2
+								3
+							
+							
+								reg_gpio_32_smt
+								1
+								1
+							
+							
+								reg_gpio_32_ie
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL17
+						GPIO_CFGCTL17.
+						0x144
+						
+							
+								reg_gpio_35_pd
+								21
+								21
+							
+							
+								reg_gpio_35_pu
+								20
+								20
+							
+							
+								reg_gpio_35_drv
+								18
+								19
+							
+							
+								reg_gpio_35_smt
+								17
+								17
+							
+							
+								reg_gpio_35_ie
+								16
+								16
+							
+							
+								reg_gpio_34_pd
+								5
+								5
+							
+							
+								reg_gpio_34_pu
+								4
+								4
+							
+							
+								reg_gpio_34_drv
+								2
+								3
+							
+							
+								reg_gpio_34_smt
+								1
+								1
+							
+							
+								reg_gpio_34_ie
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL18
+						GPIO_CFGCTL18.
+						0x148
+						
+							
+								reg_gpio_37_pd
+								21
+								21
+							
+							
+								reg_gpio_37_pu
+								20
+								20
+							
+							
+								reg_gpio_37_drv
+								18
+								19
+							
+							
+								reg_gpio_37_smt
+								17
+								17
+							
+							
+								reg_gpio_37_ie
+								16
+								16
+							
+							
+								reg_gpio_36_pd
+								5
+								5
+							
+							
+								reg_gpio_36_pu
+								4
+								4
+							
+							
+								reg_gpio_36_drv
+								2
+								3
+							
+							
+								reg_gpio_36_smt
+								1
+								1
+							
+							
+								reg_gpio_36_ie
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL30
+						GPIO_CFGCTL30.
+						0x180
+						
+							
+								reg_gpio_31_i
+								31
+								31
+							
+							
+								reg_gpio_30_i
+								30
+								30
+							
+							
+								reg_gpio_29_i
+								29
+								29
+							
+							
+								reg_gpio_28_i
+								28
+								28
+							
+							
+								reg_gpio_27_i
+								27
+								27
+							
+							
+								reg_gpio_26_i
+								26
+								26
+							
+							
+								reg_gpio_25_i
+								25
+								25
+							
+							
+								reg_gpio_24_i
+								24
+								24
+							
+							
+								reg_gpio_23_i
+								23
+								23
+							
+							
+								reg_gpio_22_i
+								22
+								22
+							
+							
+								reg_gpio_21_i
+								21
+								21
+							
+							
+								reg_gpio_20_i
+								20
+								20
+							
+							
+								reg_gpio_19_i
+								19
+								19
+							
+							
+								reg_gpio_18_i
+								18
+								18
+							
+							
+								reg_gpio_17_i
+								17
+								17
+							
+							
+								reg_gpio_16_i
+								16
+								16
+							
+							
+								reg_gpio_15_i
+								15
+								15
+							
+							
+								reg_gpio_14_i
+								14
+								14
+							
+							
+								reg_gpio_13_i
+								13
+								13
+							
+							
+								reg_gpio_12_i
+								12
+								12
+							
+							
+								reg_gpio_11_i
+								11
+								11
+							
+							
+								reg_gpio_10_i
+								10
+								10
+							
+							
+								reg_gpio_9_i
+								9
+								9
+							
+							
+								reg_gpio_8_i
+								8
+								8
+							
+							
+								reg_gpio_7_i
+								7
+								7
+							
+							
+								reg_gpio_6_i
+								6
+								6
+							
+							
+								reg_gpio_5_i
+								5
+								5
+							
+							
+								reg_gpio_4_i
+								4
+								4
+							
+							
+								reg_gpio_3_i
+								3
+								3
+							
+							
+								reg_gpio_2_i
+								2
+								2
+							
+							
+								reg_gpio_1_i
+								1
+								1
+							
+							
+								reg_gpio_0_i
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL31
+						GPIO_CFGCTL31.
+						0x184
+						
+					
+					
+						GPIO_CFGCTL32
+						GPIO_CFGCTL32.
+						0x188
+						
+							
+								reg_gpio_31_o
+								31
+								31
+							
+							
+								reg_gpio_30_o
+								30
+								30
+							
+							
+								reg_gpio_29_o
+								29
+								29
+							
+							
+								reg_gpio_28_o
+								28
+								28
+							
+							
+								reg_gpio_27_o
+								27
+								27
+							
+							
+								reg_gpio_26_o
+								26
+								26
+							
+							
+								reg_gpio_25_o
+								25
+								25
+							
+							
+								reg_gpio_24_o
+								24
+								24
+							
+							
+								reg_gpio_23_o
+								23
+								23
+							
+							
+								reg_gpio_22_o
+								22
+								22
+							
+							
+								reg_gpio_21_o
+								21
+								21
+							
+							
+								reg_gpio_20_o
+								20
+								20
+							
+							
+								reg_gpio_19_o
+								19
+								19
+							
+							
+								reg_gpio_18_o
+								18
+								18
+							
+							
+								reg_gpio_17_o
+								17
+								17
+							
+							
+								reg_gpio_16_o
+								16
+								16
+							
+							
+								reg_gpio_15_o
+								15
+								15
+							
+							
+								reg_gpio_14_o
+								14
+								14
+							
+							
+								reg_gpio_13_o
+								13
+								13
+							
+							
+								reg_gpio_12_o
+								12
+								12
+							
+							
+								reg_gpio_11_o
+								11
+								11
+							
+							
+								reg_gpio_10_o
+								10
+								10
+							
+							
+								reg_gpio_9_o
+								9
+								9
+							
+							
+								reg_gpio_8_o
+								8
+								8
+							
+							
+								reg_gpio_7_o
+								7
+								7
+							
+							
+								reg_gpio_6_o
+								6
+								6
+							
+							
+								reg_gpio_5_o
+								5
+								5
+							
+							
+								reg_gpio_4_o
+								4
+								4
+							
+							
+								reg_gpio_3_o
+								3
+								3
+							
+							
+								reg_gpio_2_o
+								2
+								2
+							
+							
+								reg_gpio_1_o
+								1
+								1
+							
+							
+								reg_gpio_0_o
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL33
+						GPIO_CFGCTL33.
+						0x18C
+						
+					
+					
+						GPIO_CFGCTL34
+						GPIO_CFGCTL34.
+						0x190
+						
+							
+								reg_gpio_31_oe
+								31
+								31
+							
+							
+								reg_gpio_30_oe
+								30
+								30
+							
+							
+								reg_gpio_29_oe
+								29
+								29
+							
+							
+								reg_gpio_28_oe
+								28
+								28
+							
+							
+								reg_gpio_27_oe
+								27
+								27
+							
+							
+								reg_gpio_26_oe
+								26
+								26
+							
+							
+								reg_gpio_25_oe
+								25
+								25
+							
+							
+								reg_gpio_24_oe
+								24
+								24
+							
+							
+								reg_gpio_23_oe
+								23
+								23
+							
+							
+								reg_gpio_22_oe
+								22
+								22
+							
+							
+								reg_gpio_21_oe
+								21
+								21
+							
+							
+								reg_gpio_20_oe
+								20
+								20
+							
+							
+								reg_gpio_19_oe
+								19
+								19
+							
+							
+								reg_gpio_18_oe
+								18
+								18
+							
+							
+								reg_gpio_17_oe
+								17
+								17
+							
+							
+								reg_gpio_16_oe
+								16
+								16
+							
+							
+								reg_gpio_15_oe
+								15
+								15
+							
+							
+								reg_gpio_14_oe
+								14
+								14
+							
+							
+								reg_gpio_13_oe
+								13
+								13
+							
+							
+								reg_gpio_12_oe
+								12
+								12
+							
+							
+								reg_gpio_11_oe
+								11
+								11
+							
+							
+								reg_gpio_10_oe
+								10
+								10
+							
+							
+								reg_gpio_9_oe
+								9
+								9
+							
+							
+								reg_gpio_8_oe
+								8
+								8
+							
+							
+								reg_gpio_7_oe
+								7
+								7
+							
+							
+								reg_gpio_6_oe
+								6
+								6
+							
+							
+								reg_gpio_5_oe
+								5
+								5
+							
+							
+								reg_gpio_4_oe
+								4
+								4
+							
+							
+								reg_gpio_3_oe
+								3
+								3
+							
+							
+								reg_gpio_2_oe
+								2
+								2
+							
+							
+								reg_gpio_1_oe
+								1
+								1
+							
+							
+								reg_gpio_0_oe
+								0
+								0
+							
+						
+					
+					
+						GPIO_CFGCTL35
+						GPIO_CFGCTL35.
+						0x194
+						
+					
+					
+						GPIO_INT_MASK1
+						GPIO_INT_MASK1.
+						0x1A0
+						
+							
+								reg_gpio_int_mask1
+								0
+								31
+							
+						
+					
+					
+						GPIO_INT_STAT1
+						GPIO_INT_STAT1.
+						0x1A8
+						
+							
+								gpio_int_stat1
+								0
+								31
+							
+						
+					
+					
+						GPIO_INT_CLR1
+						GPIO_INT_CLR1.
+						0x1B0
+						
+							
+								reg_gpio_int_clr1
+								0
+								31
+							
+						
+					
+					
+						GPIO_INT_MODE_SET1
+						GPIO_INT_MODE_SET1.
+						0x1C0
+						
+							
+								reg_gpio_int_mode_set1
+								0
+								29
+							
+						
+					
+					
+						GPIO_INT_MODE_SET2
+						GPIO_INT_MODE_SET2.
+						0x1C4
+						
+							
+								reg_gpio_int_mode_set2
+								0
+								29
+							
+						
+					
+					
+						GPIO_INT_MODE_SET3
+						GPIO_INT_MODE_SET3.
+						0x1C8
+						
+							
+								reg_gpio_int_mode_set3
+								0
+								29
+							
+						
+					
+					
+						GPIO_INT_MODE_SET4
+						GPIO_INT_MODE_SET4.
+						0x1CC
+						
+							
+								reg_gpio_int_mode_set4
+								0
+								5
+							
+						
+					
+					
+						GPIO_INT2_MASK1
+						GPIO_INT2_MASK1.
+						0x1D0
+						
+							
+								reg_gpio_int2_mask1
+								0
+								31
+							
+						
+					
+					
+						GPIO_INT2_STAT1
+						GPIO_INT2_STAT1.
+						0x1D4
+						
+							
+								gpio_int2_stat1
+								0
+								31
+							
+						
+					
+					
+						GPIO_INT2_CLR1
+						GPIO_INT2_CLR1.
+						0x1D8
+						
+							
+								reg_gpio_int2_clr1
+								0
+								31
+							
+						
+					
+					
+						GPIO_INT2_MODE_SET1
+						GPIO_INT2_MODE_SET1.
+						0x1DC
+						
+							
+								reg_gpio_int2_mode_set1
+								0
+								29
+							
+						
+					
+					
+						GPIO_INT2_MODE_SET2
+						GPIO_INT2_MODE_SET2.
+						0x1E0
+						
+							
+								reg_gpio_int2_mode_set2
+								0
+								29
+							
+						
+					
+					
+						GPIO_INT2_MODE_SET3
+						GPIO_INT2_MODE_SET3.
+						0x1E4
+						
+							
+								reg_gpio_int2_mode_set3
+								0
+								29
+							
+						
+					
+					
+						GPIO_INT2_MODE_SET4
+						GPIO_INT2_MODE_SET4.
+						0x1E8
+						
+							
+								reg_gpio_int2_mode_set4
+								0
+								5
+							
+						
+					
+					
+						dll
+						dll.
+						0x200
+						
+							
+								ppu_dll
+								31
+								31
+							
+							
+								pu_dll
+								30
+								30
+							
+							
+								dll_reset
+								29
+								29
+							
+							
+								dll_refclk_sel
+								28
+								28
+							
+							
+								dll_cp_hiz
+								23
+								23
+							
+							
+								dll_cp_op_en
+								22
+								22
+							
+							
+								dll_delay_sel
+								20
+								21
+							
+							
+								dll_post_div
+								16
+								19
+							
+							
+								dll_vctrl_force_en
+								15
+								15
+							
+							
+								dll_prechg_en
+								14
+								14
+							
+							
+								dll_prechg_reg
+								13
+								13
+							
+							
+								dll_prechg_sel
+								12
+								12
+							
+							
+								dll_vctrl_sel
+								8
+								10
+							
+							
+								dll_clk_57p6M_en
+								7
+								7
+							
+							
+								dll_clk_96M_en
+								6
+								6
+							
+							
+								dll_clk_144M_en
+								5
+								5
+							
+							
+								dll_clk_288M_en
+								4
+								4
+							
+							
+								dll_clk_mmdiv_en
+								3
+								3
+							
+							
+								ten_dll
+								2
+								2
+							
+							
+								dtest_en_dll_outclk
+								1
+								1
+							
+							
+								dtest_en_dll_refclk
+								0
+								0
+							
+						
+					
+					
+						led_driver
+						led_driver.
+						0x224
+						
+							
+								pu_leddrv
+								31
+								31
+							
+							
+								leddrv_out_en
+								28
+								29
+							
+							
+								ir_rx_gpio_sel
+								8
+								11
+							
+							
+								leddrv_ibias
+								4
+								7
+							
+							
+								led_din_polarity_sel
+								2
+								2
+							
+							
+								led_din_sel
+								1
+								1
+							
+							
+								led_din_reg
+								0
+								0
+							
+						
+					
+					
+						usb_xcvr
+						usb_xcvr.
+						0x228
+						
+							
+								usb_rcv
+								27
+								27
+							
+							
+								usb_vip
+								26
+								26
+							
+							
+								usb_vim
+								25
+								25
+							
+							
+								usb_bd
+								24
+								24
+							
+							
+								pu_usb
+								23
+								23
+							
+							
+								usb_sus
+								22
+								22
+							
+							
+								usb_spd
+								21
+								21
+							
+							
+								usb_enum
+								20
+								20
+							
+							
+								usb_data_convert
+								16
+								16
+							
+							
+								usb_oeb
+								14
+								14
+							
+							
+								usb_oeb_reg
+								13
+								13
+							
+							
+								usb_oeb_sel
+								12
+								12
+							
+							
+								usb_rout_pmos
+								8
+								10
+							
+							
+								usb_rout_nmos
+								4
+								6
+							
+							
+								pu_usb_ldo
+								3
+								3
+							
+							
+								usb_ldo_vfb
+								0
+								2
+							
+						
+					
+					
+						usb_xcvr_config
+						usb_xcvr_config.
+						0x22C
+						
+							
+								usb_slewrate_p_rise
+								28
+								30
+							
+							
+								usb_slewrate_p_fall
+								24
+								26
+							
+							
+								usb_slewrate_m_rise
+								20
+								22
+							
+							
+								usb_slewrate_m_fall
+								16
+								18
+							
+							
+								usb_res_pullup_tune
+								12
+								14
+							
+							
+								reg_usb_use_ctrl
+								11
+								11
+							
+							
+								usb_str_drv
+								8
+								10
+							
+							
+								reg_usb_use_xcvr
+								7
+								7
+							
+							
+								usb_bd_vth
+								4
+								6
+							
+							
+								usb_v_hys_p
+								2
+								3
+							
+							
+								usb_v_hys_m
+								0
+								1
+							
+						
+					
+					
+						gpdac_ctrl
+						gpdac_ctrl.
+						0x308
+						
+							
+								gpdac_reserved
+								24
+								31
+							
+							
+								gpdac_test_sel
+								9
+								11
+							
+							
+								gpdac_ref_sel
+								8
+								8
+							
+							
+								gpdac_test_en
+								7
+								7
+							
+							
+								gpdacb_rstn_ana
+								1
+								1
+							
+							
+								gpdaca_rstn_ana
+								0
+								0
+							
+						
+					
+					
+						gpdac_actrl
+						gpdac_actrl.
+						0x30C
+						
+							
+								gpdac_a_outmux
+								20
+								22
+							
+							
+								gpdac_a_rng
+								18
+								19
+							
+							
+								gpdac_ioa_en
+								1
+								1
+							
+							
+								gpdac_a_en
+								0
+								0
+							
+						
+					
+					
+						gpdac_bctrl
+						gpdac_bctrl.
+						0x310
+						
+							
+								gpdac_b_outmux
+								20
+								22
+							
+							
+								gpdac_b_rng
+								18
+								19
+							
+							
+								gpdac_iob_en
+								1
+								1
+							
+							
+								gpdac_b_en
+								0
+								0
+							
+						
+					
+					
+						gpdac_data
+						gpdac_data.
+						0x314
+						
+							
+								gpdac_a_data
+								16
+								25
+							
+							
+								gpdac_b_data
+								0
+								9
+							
+						
+					
+					
+						chip_revision
+						chip_revision.
+						0xE00
+						
+							
+								chip_rev
+								0
+								3
+							
+						
+					
+					
+						tzc_glb_ctrl_0
+						tzc_glb_ctrl_0.
+						0xF00
+						
+							
+								tzc_glb_clk_lock
+								31
+								31
+							
+							
+								tzc_glb_mbist_lock
+								30
+								30
+							
+							
+								tzc_glb_dbg_lock
+								29
+								29
+							
+							
+								tzc_glb_bmx_lock
+								28
+								28
+							
+							
+								tzc_glb_l2c_lock
+								27
+								27
+							
+							
+								tzc_glb_sram_lock
+								26
+								26
+							
+							
+								tzc_glb_misc_lock
+								25
+								25
+							
+							
+								tzc_glb_ctrl_ungated_ap_lock
+								15
+								15
+							
+							
+								tzc_glb_ctrl_sys_reset_lock
+								14
+								14
+							
+							
+								tzc_glb_ctrl_cpu_reset_lock
+								13
+								13
+							
+							
+								tzc_glb_ctrl_pwron_rst_lock
+								12
+								12
+							
+							
+								tzc_glb_swrst_s30_lock
+								8
+								8
+							
+							
+								tzc_glb_swrst_s01_lock
+								1
+								1
+							
+							
+								tzc_glb_swrst_s00_lock
+								0
+								0
+							
+						
+					
+					
+						tzc_glb_ctrl_1
+						tzc_glb_ctrl_1.
+						0xF04
+						
+							
+								tzc_glb_swrst_s1f_lock
+								31
+								31
+							
+							
+								tzc_glb_swrst_s1e_lock
+								30
+								30
+							
+							
+								tzc_glb_swrst_s1d_lock
+								29
+								29
+							
+							
+								tzc_glb_swrst_s1c_lock
+								28
+								28
+							
+							
+								tzc_glb_swrst_s1b_lock
+								27
+								27
+							
+							
+								tzc_glb_swrst_s1a_lock
+								26
+								26
+							
+							
+								tzc_glb_swrst_s19_lock
+								25
+								25
+							
+							
+								tzc_glb_swrst_s18_lock
+								24
+								24
+							
+							
+								tzc_glb_swrst_s17_lock
+								23
+								23
+							
+							
+								tzc_glb_swrst_s16_lock
+								22
+								22
+							
+							
+								tzc_glb_swrst_s15_lock
+								21
+								21
+							
+							
+								tzc_glb_swrst_s14_lock
+								20
+								20
+							
+							
+								tzc_glb_swrst_s13_lock
+								19
+								19
+							
+							
+								tzc_glb_swrst_s12_lock
+								18
+								18
+							
+							
+								tzc_glb_swrst_s11_lock
+								17
+								17
+							
+							
+								tzc_glb_swrst_s10_lock
+								16
+								16
+							
+							
+								tzc_glb_swrst_s2f_lock
+								15
+								15
+							
+							
+								tzc_glb_swrst_s2e_lock
+								14
+								14
+							
+							
+								tzc_glb_swrst_s2d_lock
+								13
+								13
+							
+							
+								tzc_glb_swrst_s2c_lock
+								12
+								12
+							
+							
+								tzc_glb_swrst_s2b_lock
+								11
+								11
+							
+							
+								tzc_glb_swrst_s2a_lock
+								10
+								10
+							
+							
+								tzc_glb_swrst_s29_lock
+								9
+								9
+							
+							
+								tzc_glb_swrst_s28_lock
+								8
+								8
+							
+							
+								tzc_glb_swrst_s27_lock
+								7
+								7
+							
+							
+								tzc_glb_swrst_s26_lock
+								6
+								6
+							
+							
+								tzc_glb_swrst_s25_lock
+								5
+								5
+							
+							
+								tzc_glb_swrst_s24_lock
+								4
+								4
+							
+							
+								tzc_glb_swrst_s23_lock
+								3
+								3
+							
+							
+								tzc_glb_swrst_s22_lock
+								2
+								2
+							
+							
+								tzc_glb_swrst_s21_lock
+								1
+								1
+							
+							
+								tzc_glb_swrst_s20_lock
+								0
+								0
+							
+						
+					
+					
+						tzc_glb_ctrl_2
+						tzc_glb_ctrl_2.
+						0xF08
+						
+							
+								tzc_glb_gpio_31_lock
+								31
+								31
+							
+							
+								tzc_glb_gpio_30_lock
+								30
+								30
+							
+							
+								tzc_glb_gpio_29_lock
+								29
+								29
+							
+							
+								tzc_glb_gpio_28_lock
+								28
+								28
+							
+							
+								tzc_glb_gpio_27_lock
+								27
+								27
+							
+							
+								tzc_glb_gpio_26_lock
+								26
+								26
+							
+							
+								tzc_glb_gpio_25_lock
+								25
+								25
+							
+							
+								tzc_glb_gpio_24_lock
+								24
+								24
+							
+							
+								tzc_glb_gpio_23_lock
+								23
+								23
+							
+							
+								tzc_glb_gpio_22_lock
+								22
+								22
+							
+							
+								tzc_glb_gpio_21_lock
+								21
+								21
+							
+							
+								tzc_glb_gpio_20_lock
+								20
+								20
+							
+							
+								tzc_glb_gpio_19_lock
+								19
+								19
+							
+							
+								tzc_glb_gpio_18_lock
+								18
+								18
+							
+							
+								tzc_glb_gpio_17_lock
+								17
+								17
+							
+							
+								tzc_glb_gpio_16_lock
+								16
+								16
+							
+							
+								tzc_glb_gpio_15_lock
+								15
+								15
+							
+							
+								tzc_glb_gpio_14_lock
+								14
+								14
+							
+							
+								tzc_glb_gpio_13_lock
+								13
+								13
+							
+							
+								tzc_glb_gpio_12_lock
+								12
+								12
+							
+							
+								tzc_glb_gpio_11_lock
+								11
+								11
+							
+							
+								tzc_glb_gpio_10_lock
+								10
+								10
+							
+							
+								tzc_glb_gpio_9_lock
+								9
+								9
+							
+							
+								tzc_glb_gpio_8_lock
+								8
+								8
+							
+							
+								tzc_glb_gpio_7_lock
+								7
+								7
+							
+							
+								tzc_glb_gpio_6_lock
+								6
+								6
+							
+							
+								tzc_glb_gpio_5_lock
+								5
+								5
+							
+							
+								tzc_glb_gpio_4_lock
+								4
+								4
+							
+							
+								tzc_glb_gpio_3_lock
+								3
+								3
+							
+							
+								tzc_glb_gpio_2_lock
+								2
+								2
+							
+							
+								tzc_glb_gpio_1_lock
+								1
+								1
+							
+							
+								tzc_glb_gpio_0_lock
+								0
+								0
+							
+						
+					
+					
+						tzc_glb_ctrl_3
+						tzc_glb_ctrl_3.
+						0xF0C
+						
+							
+								tzc_glb_gpio_37_lock
+								5
+								5
+							
+							
+								tzc_glb_gpio_36_lock
+								4
+								4
+							
+							
+								tzc_glb_gpio_35_lock
+								3
+								3
+							
+							
+								tzc_glb_gpio_34_lock
+								2
+								2
+							
+							
+								tzc_glb_gpio_33_lock
+								1
+								1
+							
+							
+								tzc_glb_gpio_32_lock
+								0
+								0
+							
+						
+					
+				
+			
+			
+				rf
+				rf.
+				0x40001000
+				rf
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						rf_rev
+						Silicon revision
+						0x0
+						
+							
+								hw_rev
+								16
+								23
+							
+							
+								fw_rev
+								8
+								15
+							
+							
+								rf_rev
+								0
+								7
+							
+						
+					
+					
+						dsp_readback
+						dsp_readback.
+						0x4
+						
+							
+								rbb_bw_ind_ctrl_hw
+								31
+								31
+							
+							
+								rbb_bw_ind
+								30
+								30
+							
+							
+								rbb_ind_ctrl_hw
+								29
+								29
+							
+							
+								rbb_ind
+								24
+								28
+							
+							
+								ch_ind_ctrl_hw
+								23
+								23
+							
+							
+								ch_ind
+								16
+								22
+							
+							
+								rbb_bw_ind_hw
+								14
+								14
+							
+							
+								rbb_ind_hw
+								9
+								13
+							
+							
+								ch_ind_hw
+								2
+								8
+							
+						
+					
+					
+						rf_ctrl_source
+						Control logic switch
+						0x8
+						
+							
+								vco_idac_ctrl_hw
+								28
+								28
+							
+							
+								inc_fcal_en_ctrl_hw
+								24
+								24
+							
+							
+								lo_fcw_ctrl_hw
+								20
+								20
+							
+							
+								rbb_bw_ctrl_hw
+								16
+								16
+							
+							
+								kcal_ratio_ctrl_hw
+								12
+								12
+							
+							
+								rosdac_ctrl_rccal
+								9
+								9
+							
+							
+								rosdac_ctrl_hw
+								8
+								8
+							
+							
+								gain_ctrl_rx_hw
+								4
+								4
+							
+							
+								gain_ctrl_tx_hw
+								3
+								3
+							
+							
+								pu_ctrl_hw
+								0
+								0
+							
+						
+					
+					
+						rf_cal_state_ctrl
+						rf calibration state enable in full cal list
+						0xC
+						
+							
+								inc_roscal_state_en
+								7
+								7
+							
+							
+								inc_acal_state_en
+								6
+								6
+							
+							
+								inc_fcal_state_en
+								5
+								5
+							
+							
+								rccal_state_en
+								4
+								4
+							
+							
+								roscal_state_en
+								3
+								3
+							
+							
+								kcal_state_en
+								2
+								2
+							
+							
+								acal_state_en
+								1
+								1
+							
+							
+								fcal_state_en
+								0
+								0
+							
+						
+					
+					
+						rf_cal_switch_ctrl
+						Calibration mode register
+						0x10
+						
+							
+								inc_fcal_en_hw
+								17
+								17
+							
+							
+								inc_fcal_en
+								16
+								16
+							
+							
+								inc_acal_en
+								12
+								12
+							
+							
+								rccal_en
+								8
+								8
+							
+							
+								kcal_en
+								4
+								4
+							
+							
+								acal_en
+								0
+								0
+							
+						
+					
+					
+						rf_cal_status
+						rf_cal_status.
+						0x14
+						
+							
+								dl_rfcal_table_status
+								30
+								31
+							
+							
+								rccal_status
+								8
+								9
+							
+							
+								roscal_status
+								6
+								7
+							
+							
+								kcal_status
+								4
+								5
+							
+							
+								acal_status
+								2
+								3
+							
+						
+					
+					
+						pu_delay_confg
+						pu_delay_confg.
+						0x18
+						
+							
+								adpll_reset_width
+								20
+								21
+							
+							
+								lo_reset_width
+								16
+								17
+							
+							
+								lo_reset_delay
+								12
+								13
+							
+							
+								pud_delay
+								4
+								5
+							
+							
+								ppu_lead
+								0
+								1
+							
+						
+					
+					
+						pucr_reg
+						Register control of power up signals
+						0x100
+						
+							
+								rst_fbdv
+								27
+								27
+							
+							
+								rst_lotpm_hfp
+								26
+								26
+							
+							
+								rst_adpll
+								25
+								25
+							
+							
+								pa_seri_cap_en
+								24
+								24
+							
+							
+								rx_bypass_en
+								23
+								23
+							
+							
+								pu_pa
+								22
+								22
+							
+							
+								pu_lna
+								21
+								21
+							
+							
+								pu_rmx
+								20
+								20
+							
+							
+								pu_rbb
+								19
+								19
+							
+							
+								pu_rbb_pkdet
+								18
+								18
+							
+							
+								pu_rosdac
+								17
+								17
+							
+							
+								pu_rxadc
+								16
+								16
+							
+							
+								rxadc_clk_en
+								15
+								15
+							
+							
+								pu_lodist_body_bias
+								14
+								14
+							
+							
+								pu_vco_ldo
+								13
+								13
+							
+							
+								pu_vco
+								12
+								12
+							
+							
+								pu_fbdv
+								11
+								11
+							
+							
+								pu_fbdv_buf
+								10
+								10
+							
+							
+								lotpm_hfp_clk_en
+								9
+								9
+							
+							
+								lotpm_lfp_bypass
+								8
+								8
+							
+							
+								lotpm_hfp_bypass
+								7
+								7
+							
+							
+								adpll_clk_en
+								6
+								6
+							
+							
+								pu_adpll_adc
+								5
+								5
+							
+							
+								pu_adpll_sfreg
+								4
+								4
+							
+							
+								pu_dtc
+								3
+								3
+							
+							
+								pu_rxbuf
+								2
+								2
+							
+							
+								pu_txbuf
+								1
+								1
+							
+							
+								lodist_tx_en
+								0
+								0
+							
+						
+					
+					
+						pucr_sb
+						Power up setting in SB state
+						0x104
+						
+							
+								pa_seri_cap_en_sb
+								24
+								24
+							
+							
+								rx_bypass_en_sb
+								23
+								23
+							
+							
+								pu_pa_sb
+								22
+								22
+							
+							
+								pu_lna_sb
+								21
+								21
+							
+							
+								pu_rmx_sb
+								20
+								20
+							
+							
+								pu_rbb_sb
+								19
+								19
+							
+							
+								pu_rbb_pkdet_sb
+								18
+								18
+							
+							
+								pu_rosdac_sb
+								17
+								17
+							
+							
+								pu_rxadc_sb
+								16
+								16
+							
+							
+								rxadc_clk_en_sb
+								15
+								15
+							
+							
+								pu_lodist_body_bias_sb
+								14
+								14
+							
+							
+								pu_vco_ldo_sb
+								13
+								13
+							
+							
+								pu_vco_sb
+								12
+								12
+							
+							
+								pu_fbdv_sb
+								11
+								11
+							
+							
+								pu_fbdv_buf_sb
+								10
+								10
+							
+							
+								lotpm_hfp_clk_en_sb
+								9
+								9
+							
+							
+								lotpm_lfp_bypass_sb
+								8
+								8
+							
+							
+								lotpm_hfp_bypass_sb
+								7
+								7
+							
+							
+								adpll_clk_en_sb
+								6
+								6
+							
+							
+								pu_adpll_adc_sb
+								5
+								5
+							
+							
+								pu_adpll_sfreg_sb
+								4
+								4
+							
+							
+								pu_dtc_sb
+								3
+								3
+							
+							
+								pu_rxbuf_sb
+								2
+								2
+							
+							
+								pu_txbuf_sb
+								1
+								1
+							
+							
+								lodist_tx_en_sb
+								0
+								0
+							
+						
+					
+					
+						pucr_lotx
+						Power up in LOTX state
+						0x108
+						
+							
+								pa_seri_cap_en_lotx
+								24
+								24
+							
+							
+								rx_bypass_en_lotx
+								23
+								23
+							
+							
+								pu_pa_lotx
+								22
+								22
+							
+							
+								pu_lna_lotx
+								21
+								21
+							
+							
+								pu_rmx_lotx
+								20
+								20
+							
+							
+								pu_rbb_lotx
+								19
+								19
+							
+							
+								pu_rbb_pkdet_lotx
+								18
+								18
+							
+							
+								pu_rosdac_lotx
+								17
+								17
+							
+							
+								pu_rxadc_lotx
+								16
+								16
+							
+							
+								rxadc_clk_en_lotx
+								15
+								15
+							
+							
+								pu_lodist_body_bias_lotx
+								14
+								14
+							
+							
+								pu_vco_ldo_lotx
+								13
+								13
+							
+							
+								pu_vco_lotx
+								12
+								12
+							
+							
+								pu_fbdv_lotx
+								11
+								11
+							
+							
+								pu_fbdv_buf_lotx
+								10
+								10
+							
+							
+								lotpm_hfp_clk_en_lotx
+								9
+								9
+							
+							
+								lotpm_lfp_bypass_lotx
+								8
+								8
+							
+							
+								lotpm_hfp_bypass_lotx
+								7
+								7
+							
+							
+								adpll_clk_en_lotx
+								6
+								6
+							
+							
+								pu_adpll_adc_lotx
+								5
+								5
+							
+							
+								pu_adpll_sfreg_lotx
+								4
+								4
+							
+							
+								pu_dtc_lotx
+								3
+								3
+							
+							
+								pu_rxbuf_lotx
+								2
+								2
+							
+							
+								pu_txbuf_lotx
+								1
+								1
+							
+							
+								lodist_tx_en_lotx
+								0
+								0
+							
+						
+					
+					
+						pucr_lorx
+						Power up in LORX state
+						0x10C
+						
+							
+								pa_seri_cap_en_lorx
+								24
+								24
+							
+							
+								rx_bypass_en_lorx
+								23
+								23
+							
+							
+								pu_pa_lorx
+								22
+								22
+							
+							
+								pu_lna_lorx
+								21
+								21
+							
+							
+								pu_rmx_lorx
+								20
+								20
+							
+							
+								pu_rbb_lorx
+								19
+								19
+							
+							
+								pu_rbb_pkdet_lorx
+								18
+								18
+							
+							
+								pu_rosdac_lorx
+								17
+								17
+							
+							
+								pu_rxadc_lorx
+								16
+								16
+							
+							
+								rxadc_clk_en_lorx
+								15
+								15
+							
+							
+								pu_lodist_body_bias_lorx
+								14
+								14
+							
+							
+								pu_vco_ldo_lorx
+								13
+								13
+							
+							
+								pu_vco_lorx
+								12
+								12
+							
+							
+								pu_fbdv_lorx
+								11
+								11
+							
+							
+								pu_fbdv_buf_lorx
+								10
+								10
+							
+							
+								lotpm_hfp_clk_en_lorx
+								9
+								9
+							
+							
+								lotpm_lfp_bypass_lorx
+								8
+								8
+							
+							
+								lotpm_hfp_bypass_lorx
+								7
+								7
+							
+							
+								adpll_clk_en_lorx
+								6
+								6
+							
+							
+								pu_adpll_adc_lorx
+								5
+								5
+							
+							
+								pu_adpll_sfreg_lorx
+								4
+								4
+							
+							
+								pu_dtc_lorx
+								3
+								3
+							
+							
+								pu_rxbuf_lorx
+								2
+								2
+							
+							
+								pu_txbuf_lorx
+								1
+								1
+							
+							
+								lodist_tx_en_lorx
+								0
+								0
+							
+						
+					
+					
+						pucr_tx
+						Power up in TX state
+						0x110
+						
+							
+								pa_seri_cap_en_tx
+								24
+								24
+							
+							
+								rx_bypass_en_tx
+								23
+								23
+							
+							
+								pu_pa_tx
+								22
+								22
+							
+							
+								pu_lna_tx
+								21
+								21
+							
+							
+								pu_rmx_tx
+								20
+								20
+							
+							
+								pu_rbb_tx
+								19
+								19
+							
+							
+								pu_rbb_pkdet_tx
+								18
+								18
+							
+							
+								pu_rosdac_tx
+								17
+								17
+							
+							
+								pu_rxadc_tx
+								16
+								16
+							
+							
+								rxadc_clk_en_tx
+								15
+								15
+							
+							
+								pu_lodist_body_bias_tx
+								14
+								14
+							
+							
+								pu_vco_ldo_tx
+								13
+								13
+							
+							
+								pu_vco_tx
+								12
+								12
+							
+							
+								pu_fbdv_tx
+								11
+								11
+							
+							
+								pu_fbdv_buf_tx
+								10
+								10
+							
+							
+								lotpm_hfp_clk_en_tx
+								9
+								9
+							
+							
+								lotpm_lfp_bypass_tx
+								8
+								8
+							
+							
+								lotpm_hfp_bypass_tx
+								7
+								7
+							
+							
+								adpll_clk_en_tx
+								6
+								6
+							
+							
+								pu_adpll_adc_tx
+								5
+								5
+							
+							
+								pu_adpll_sfreg_tx
+								4
+								4
+							
+							
+								pu_dtc_tx
+								3
+								3
+							
+							
+								pu_rxbuf_tx
+								2
+								2
+							
+							
+								pu_txbuf_tx
+								1
+								1
+							
+							
+								lodist_tx_en_tx
+								0
+								0
+							
+						
+					
+					
+						pucr_rx
+						Power up in RX state
+						0x114
+						
+							
+								pa_seri_cap_en_rx
+								24
+								24
+							
+							
+								rx_bypass_en_rx
+								23
+								23
+							
+							
+								pu_pa_rx
+								22
+								22
+							
+							
+								pu_lna_rx
+								21
+								21
+							
+							
+								pu_rmx_rx
+								20
+								20
+							
+							
+								pu_rbb_rx
+								19
+								19
+							
+							
+								pu_rbb_pkdet_rx
+								18
+								18
+							
+							
+								pu_rosdac_rx
+								17
+								17
+							
+							
+								pu_rxadc_rx
+								16
+								16
+							
+							
+								rxadc_clk_en_rx
+								15
+								15
+							
+							
+								pu_lodist_body_bias_rx
+								14
+								14
+							
+							
+								pu_vco_ldo_rx
+								13
+								13
+							
+							
+								pu_vco_rx
+								12
+								12
+							
+							
+								pu_fbdv_rx
+								11
+								11
+							
+							
+								pu_fbdv_buf_rx
+								10
+								10
+							
+							
+								lotpm_hfp_clk_en_rx
+								9
+								9
+							
+							
+								lotpm_lfp_bypass_rx
+								8
+								8
+							
+							
+								lotpm_hfp_bypass_rx
+								7
+								7
+							
+							
+								adpll_clk_en_rx
+								6
+								6
+							
+							
+								pu_adpll_adc_rx
+								5
+								5
+							
+							
+								pu_adpll_sfreg_rx
+								4
+								4
+							
+							
+								pu_dtc_rx
+								3
+								3
+							
+							
+								pu_rxbuf_rx
+								2
+								2
+							
+							
+								pu_txbuf_rx
+								1
+								1
+							
+							
+								lodist_tx_en_rx
+								0
+								0
+							
+						
+					
+					
+						pucr_hw
+						Hardware read back of power up signals
+						0x118
+						
+							
+								rst_fbdv_hw
+								27
+								27
+							
+							
+								rst_lotpm_hfp_hw
+								26
+								26
+							
+							
+								rst_adpll_hw
+								25
+								25
+							
+							
+								pa_seri_cap_en_hw
+								24
+								24
+							
+							
+								rx_bypass_en_hw
+								23
+								23
+							
+							
+								pu_pa_hw
+								22
+								22
+							
+							
+								pu_lna_hw
+								21
+								21
+							
+							
+								pu_rmx_hw
+								20
+								20
+							
+							
+								pu_rbb_hw
+								19
+								19
+							
+							
+								pu_rbb_pkdet_hw
+								18
+								18
+							
+							
+								pu_rosdac_hw
+								17
+								17
+							
+							
+								pu_rxadc_hw
+								16
+								16
+							
+							
+								rxadc_clk_en_hw
+								15
+								15
+							
+							
+								pu_lodist_body_bias_hw
+								14
+								14
+							
+							
+								pu_vco_ldo_hw
+								13
+								13
+							
+							
+								pu_vco_hw
+								12
+								12
+							
+							
+								pu_fbdv_hw
+								11
+								11
+							
+							
+								pu_fbdv_buf_hw
+								10
+								10
+							
+							
+								lotpm_hfp_clk_en_hw
+								9
+								9
+							
+							
+								lotpm_lfp_bypass_hw
+								8
+								8
+							
+							
+								lotpm_hfp_bypass_hw
+								7
+								7
+							
+							
+								adpll_clk_en_hw
+								6
+								6
+							
+							
+								pu_adpll_adc_hw
+								5
+								5
+							
+							
+								pu_adpll_sfreg_hw
+								4
+								4
+							
+							
+								pu_dtc_hw
+								3
+								3
+							
+							
+								pu_rxbuf_hw
+								2
+								2
+							
+							
+								pu_txbuf_hw
+								1
+								1
+							
+							
+								lodist_tx_en_hw
+								0
+								0
+							
+						
+					
+					
+						non_reg_readback
+						non_reg_readback.
+						0x11C
+						
+							
+								ppu_lna_hw
+								16
+								16
+							
+							
+								ppu_rbb_hw
+								15
+								15
+							
+							
+								ppu_lodist_body_bias_hw
+								13
+								13
+							
+							
+								ppu_vco_ldo_hw
+								12
+								12
+							
+							
+								ppu_vco_hw
+								11
+								11
+							
+							
+								pud_vco_hw
+								10
+								10
+							
+							
+								ppu_fbdv_hw
+								9
+								9
+							
+							
+								ppu_adpll_sfreg_hw
+								8
+								8
+							
+							
+								ppu_rxbuf_hw
+								7
+								7
+							
+							
+								ppu_txbuf_hw
+								6
+								6
+							
+							
+								ppu_testbuf_hw
+								5
+								5
+							
+						
+					
+					
+						trx_gain_bw
+						Register control of TX/RX gain
+						0x120
+						
+							
+								pa_inbuf_unit
+								20
+								22
+							
+							
+								pa_ref_dac
+								12
+								16
+							
+							
+								rbb_bw
+								8
+								8
+							
+							
+								gc_rbb2
+								5
+								7
+							
+							
+								gc_rbb1
+								3
+								4
+							
+							
+								gc_lna
+								0
+								2
+							
+						
+					
+					
+						trx_gain_bw_hw
+						Hardware read back of TX/RX gain
+						0x124
+						
+							
+								pa_inbuf_unit_hw
+								20
+								22
+							
+							
+								pa_ref_dac_hw
+								12
+								16
+							
+							
+								rbb_bw_hw
+								8
+								8
+							
+							
+								gc_rbb2_hw
+								5
+								7
+							
+							
+								gc_rbb1_hw
+								3
+								4
+							
+							
+								gc_lna_hw
+								0
+								2
+							
+						
+					
+					
+						dctest_actest
+						DC Test register 0
+						0x128
+						
+							
+								ten_mbg
+								31
+								31
+							
+							
+								ten_dll
+								28
+								28
+							
+							
+								ten_lodist
+								27
+								27
+							
+							
+								ten_pa_0
+								26
+								26
+							
+							
+								ten_pa_1
+								25
+								25
+							
+							
+								ten_rrf0
+								24
+								24
+							
+							
+								ten_rrf1
+								23
+								23
+							
+							
+								ten_rxadc
+								22
+								22
+							
+							
+								ten_vco
+								21
+								21
+							
+							
+								ten_adpll_adc
+								20
+								20
+							
+							
+								ten_rbb_actest
+								19
+								19
+							
+							
+								ten_rbb
+								18
+								18
+							
+							
+								ten_dtc
+								17
+								17
+							
+							
+								atest_out_en
+								6
+								7
+							
+							
+								dc_tp_out_en
+								4
+								5
+							
+						
+					
+					
+						dtest
+						LO Bias Mode registers
+						0x12C
+						
+							
+								dtest_en_dtc_in
+								29
+								29
+							
+							
+								dtest_en_dtc_out
+								28
+								28
+							
+							
+								dtest_en_fref
+								27
+								27
+							
+							
+								dtest_en_mod4
+								26
+								26
+							
+							
+								dtest_en_adpll_adc
+								25
+								25
+							
+							
+								dtest_en_rxadc_i
+								24
+								24
+							
+							
+								dtest_en_rxadc_q
+								23
+								23
+							
+							
+								dtest_pulldown
+								0
+								0
+							
+						
+					
+					
+						adpll_test
+						adpll_test.
+						0x130
+						
+							
+								adpll_test_start
+								25
+								25
+							
+							
+								adpll_test_en
+								24
+								24
+							
+							
+								adpll_test_start_sel
+								20
+								21
+							
+							
+								adpll_test_data_sel
+								16
+								18
+							
+							
+								adpll_test_out
+								0
+								15
+							
+						
+					
+					
+						rf_ext_pa
+						rf_ext_pa.
+						0x134
+						
+							
+								rf_ext_pa_rx
+								20
+								24
+							
+							
+								rf_ext_pa_lorx
+								15
+								19
+							
+							
+								rf_ext_pa_tx
+								10
+								14
+							
+							
+								rf_ext_pa_lotx
+								5
+								9
+							
+							
+								rf_ext_pa_sb
+								0
+								4
+							
+						
+					
+					
+						cip_ldo15
+						cip_ldo15.
+						0x200
+						
+							
+								vg11_sel
+								0
+								1
+							
+						
+					
+					
+						pa
+						PA register
+						0x204
+						
+							
+								pa_force_short_open
+								30
+								30
+							
+							
+								pa_hp_en
+								29
+								29
+							
+							
+								pa_lp_en
+								28
+								28
+							
+							
+								pa_ldo_bm
+								24
+								26
+							
+							
+								pa_vdd11_sel
+								20
+								22
+							
+							
+								pa_para_cs
+								12
+								15
+							
+							
+								pa_seri_cs_hw
+								8
+								11
+							
+							
+								pa_seri_cs_rx
+								4
+								7
+							
+							
+								pa_seri_cs_tx
+								0
+								3
+							
+						
+					
+					
+						lna_mx
+						LNA mixer register
+						0x208
+						
+							
+								lna_bm_hw
+								28
+								31
+							
+							
+								lna_bm_hg
+								24
+								27
+							
+							
+								lna_bm_lg
+								20
+								23
+							
+							
+								lna_cap_lg
+								18
+								19
+							
+							
+								lna_cap_match
+								15
+								17
+							
+							
+								lna_lg_gsel
+								12
+								14
+							
+							
+								lna_load_csw
+								8
+								11
+							
+							
+								lna_vdd13_sel
+								6
+								7
+							
+							
+								lna_rfb_match
+								3
+								5
+							
+							
+								rmx_bm
+								0
+								2
+							
+						
+					
+					
+						rbb_rosdac
+						rbb_rosdac.
+						0x20C
+						
+							
+								rosdac_i
+								24
+								29
+							
+							
+								rosdac_q
+								16
+								21
+							
+							
+								rosdac_i_hw
+								8
+								13
+							
+							
+								rosdac_q_hw
+								0
+								5
+							
+						
+					
+					
+						rbb_cap_1
+						rbb_cap_1.
+						0x210
+						
+							
+								rbb_cap1_fc_i
+								24
+								29
+							
+							
+								rbb_cap1_fc_q
+								16
+								21
+							
+							
+								rbb_cap2_fc_i
+								8
+								13
+							
+							
+								rbb_cap2_fc_q
+								0
+								5
+							
+						
+					
+					
+						rbb_cap_2
+						rbb_cap_2.
+						0x214
+						
+							
+								rbb_cap1_fc_i_hw
+								24
+								29
+							
+							
+								rbb_cap1_fc_q_hw
+								16
+								21
+							
+							
+								rbb_cap2_fc_i_hw
+								8
+								13
+							
+							
+								rbb_cap2_fc_q_hw
+								0
+								5
+							
+						
+					
+					
+						rbb_cap_3
+						rbb_cap_3.
+						0x218
+						
+							
+								rbb_cap1_fc_i_bw0
+								24
+								29
+							
+							
+								rbb_cap1_fc_q_bw0
+								16
+								21
+							
+							
+								rbb_cap2_fc_i_bw0
+								8
+								13
+							
+							
+								rbb_cap2_fc_q_bw0
+								0
+								5
+							
+						
+					
+					
+						rbb_cap4
+						rbb_cap4.
+						0x21C
+						
+							
+								rbb_cap1_fc_i_bw1
+								24
+								29
+							
+							
+								rbb_cap1_fc_q_bw1
+								16
+								21
+							
+							
+								rbb_cap2_fc_i_bw1
+								8
+								13
+							
+							
+								rbb_cap2_fc_q_bw1
+								0
+								5
+							
+						
+					
+					
+						rbb_rx
+						rbb_rx.
+						0x220
+						
+							
+								rbb_rx1
+								28
+								30
+							
+							
+								rbb_rx2
+								24
+								26
+							
+							
+								rbb_rx1_hw
+								20
+								22
+							
+							
+								rbb_rx2_hw
+								16
+								18
+							
+							
+								rbb_rx1_bw0
+								12
+								14
+							
+							
+								rbb_rx2_bw0
+								8
+								10
+							
+							
+								rbb_rx1_bw1
+								4
+								6
+							
+							
+								rbb_rx2_bw1
+								0
+								2
+							
+						
+					
+					
+						rbb
+						rbb.
+						0x224
+						
+							
+								rbb_bm_op
+								28
+								29
+							
+							
+								rbb_vcm
+								24
+								25
+							
+							
+								rbb_deq
+								20
+								21
+							
+							
+								rbb_lpf_en
+								19
+								19
+							
+							
+								rosdac_range
+								16
+								17
+							
+							
+								rbb_pkdet_vth
+								12
+								15
+							
+							
+								rbb_pkdet_en
+								10
+								10
+							
+							
+								rbb_pkdet_en_hw
+								9
+								9
+							
+							
+								rbb_pkdet_en_ctrl_hw
+								8
+								8
+							
+							
+								rbb_pkdet_out_rstn
+								6
+								6
+							
+							
+								rbb_pkdet_out_rstn_hw
+								5
+								5
+							
+							
+								rbb_pkdet_out_rstn_ctrl_hw
+								4
+								4
+							
+							
+								pkdet_out_raw
+								1
+								1
+							
+							
+								pkdet_out_latch
+								0
+								0
+							
+						
+					
+					
+						rxadc
+						rxadc.
+						0x228
+						
+							
+								rxadc_dly_ctrl
+								24
+								25
+							
+							
+								rxadc_glitch_remove
+								20
+								20
+							
+							
+								rxadc_clk_div_sel
+								16
+								16
+							
+							
+								rxadc_clk_inv
+								12
+								12
+							
+							
+								rxadc_clk_sync_inv
+								8
+								8
+							
+							
+								rxadc_vref_sel
+								4
+								5
+							
+							
+								rxadc_oscal_en
+								0
+								0
+							
+						
+					
+					
+						rxadc_readback
+						rxadc_readback.
+						0x22C
+						
+							
+								rxadc_dout_i
+								16
+								24
+							
+							
+								rxadc_dout_q
+								0
+								8
+							
+						
+					
+					
+						rf_adc_osdata
+						rf_adc_osdata.
+						0x230
+						
+							
+								rxadc_os_i
+								16
+								24
+							
+							
+								rxadc_os_q
+								0
+								8
+							
+						
+					
+					
+						testbuf
+						testbuf.
+						0x234
+						
+							
+								pu_testbuf
+								24
+								24
+							
+							
+								testbuf_vcm
+								20
+								21
+							
+							
+								testbuf_bm
+								16
+								18
+							
+							
+								testbuf_boost
+								12
+								12
+							
+							
+								testbuf_op_cc
+								8
+								11
+							
+							
+								testbuf_rfb
+								4
+								4
+							
+							
+								testbuf_rin
+								0
+								0
+							
+						
+					
+					
+						vco
+						vco.
+						0x238
+						
+							
+								vco_acal_ud
+								31
+								31
+							
+							
+								vco_idac_hw
+								24
+								29
+							
+							
+								vco_idac
+								16
+								21
+							
+							
+								vco_ldo_bypass
+								15
+								15
+							
+							
+								vco_ldo_vsel
+								13
+								14
+							
+							
+								vco_idac_boost
+								12
+								12
+							
+							
+								vco_vbias
+								8
+								9
+							
+							
+								vco_acal_vref
+								4
+								6
+							
+							
+								vco_modcap_sel
+								2
+								3
+							
+							
+								vco_short_idac_filter
+								1
+								1
+							
+							
+								vco_short_vbias_filter
+								0
+								0
+							
+						
+					
+					
+						lodist
+						lodist.
+						0x23C
+						
+							
+								lodist_75dc_sel
+								16
+								16
+							
+							
+								lodist_nwell_bias
+								12
+								13
+							
+							
+								lodist_rwell_bias
+								8
+								9
+							
+							
+								lodist_rxbuf_supply_boost
+								6
+								6
+							
+							
+								lodist_rxbuf_supply_mode
+								4
+								5
+							
+							
+								lodist_txbuf_supply_mode
+								0
+								1
+							
+						
+					
+					
+						fbdv
+						fbdv.
+						0x240
+						
+							
+								dco_dither_clk_polarity
+								29
+								29
+							
+							
+								lotpm_fmash_clk_polarity
+								28
+								28
+							
+							
+								rst_mmdiv
+								24
+								24
+							
+							
+								fbdv_stg_sel
+								20
+								20
+							
+							
+								fbdv_sample_clk_sel
+								16
+								17
+							
+							
+								fbdv_fb_clk_sel
+								12
+								12
+							
+							
+								fbdv_dco_dither_clk_sel
+								8
+								8
+							
+							
+								fbdv_adpll_clk_sel
+								4
+								4
+							
+							
+								fbdv_tpm_clk_sel
+								0
+								2
+							
+						
+					
+					
+						kcal1
+						kcal1.
+						0x244
+						
+							
+								kcal_ratio
+								20
+								29
+							
+							
+								kcal_cnt_start
+								16
+								16
+							
+							
+								kcal_div
+								0
+								15
+							
+						
+					
+					
+						kcal2
+						kcal2.
+						0x248
+						
+							
+								kcal_ratio_hw
+								20
+								29
+							
+							
+								kcal_cnt_rdy
+								16
+								16
+							
+							
+								kcal_cnt_op
+								0
+								15
+							
+						
+					
+					
+						adpll_slope_gen
+						adpll_slope_gen.
+						0x24C
+						
+							
+								adpll_slope_gen_pulse_width_enhance
+								6
+								6
+							
+							
+								adpll_slope_gen_dc_corr
+								4
+								5
+							
+							
+								adpll_slope_gen_r_sel
+								0
+								2
+							
+						
+					
+					
+						adpll_adc
+						adpll_adc.
+						0x250
+						
+							
+								adpll_adc_clk_en
+								29
+								29
+							
+							
+								adpll_adc_clk_inv
+								28
+								28
+							
+							
+								adpll_adc_clk_div_sel
+								24
+								24
+							
+							
+								adpll_adc_clk_sync_inv
+								16
+								16
+							
+							
+								adpll_adc_oscal_en
+								12
+								12
+							
+							
+								adpll_adc_vref_coarse
+								8
+								9
+							
+							
+								adpll_adc_vref_fine
+								4
+								5
+							
+							
+								adpll_adc_data_sign_sel
+								2
+								2
+							
+							
+								adpll_adc_vth_en
+								1
+								1
+							
+							
+								adpll_adc_vth_bias_mode
+								0
+								0
+							
+						
+					
+					
+						adpll_dtc
+						adpll_dtc.
+						0x254
+						
+							
+								adpll_dtc_inv_vth_sel
+								8
+								9
+							
+							
+								adpll_dtc_r_sel
+								4
+								6
+							
+							
+								adpll_dtc_bypass
+								0
+								0
+							
+						
+					
+					
+						lo_fc_config1
+						lo_fc_config1.
+						0x258
+						
+							
+								lo_fcw
+								0
+								24
+							
+						
+					
+					
+						lo_fcw_config2
+						lo_fcw_config2.
+						0x25C
+						
+							
+								lo_fcw_hw
+								0
+								24
+							
+						
+					
+					
+						lo_fcw3
+						lo_fcw3.
+						0x260
+						
+							
+								tx_freq_mod_hp
+								16
+								25
+							
+							
+								tx_freq_mod_lp
+								0
+								11
+							
+						
+					
+					
+						lotpm
+						lotpm.
+						0x264
+						
+							
+								lotpm_hfp_mash1_sel
+								16
+								16
+							
+							
+								lotpm_hfp_polarity
+								12
+								12
+							
+							
+								lotpm_hfp_delay_fref
+								8
+								9
+							
+							
+								lotpm_hfp_delay_fmash
+								4
+								7
+							
+							
+								lotpm_lfp_delay_sel
+								0
+								1
+							
+						
+					
+					
+						adpll1
+						adpll1.
+						0x268
+						
+							
+								adpll_force_inc_fcal_en
+								26
+								26
+							
+							
+								adpll_lo_unlock_intrpt_clear_sel
+								25
+								25
+							
+							
+								adpll_sfreg_sel
+								24
+								24
+							
+							
+								adpll_lo_open
+								23
+								23
+							
+							
+								adpll_mom_search_en_ext
+								22
+								22
+							
+							
+								adpll_freqerr_det_start_ext
+								21
+								21
+							
+							
+								adpll_mom_update_en_ext
+								20
+								20
+							
+							
+								adpll_vctrl_det_en_ext
+								19
+								19
+							
+							
+								adpll_vctrl_det_start_ext
+								18
+								18
+							
+							
+								adpll_abnormal_dealed
+								15
+								15
+							
+							
+								adpll_lock_fail_en
+								14
+								14
+							
+							
+								adpll_fsm_en
+								12
+								12
+							
+							
+								adpll_lo_fsm_ext
+								11
+								11
+							
+							
+								adpll_lo_lock_directly
+								10
+								10
+							
+							
+								adpll_fcal_start_ext
+								9
+								9
+							
+							
+								adpll_fcal_done_ext
+								8
+								8
+							
+							
+								adpll_loop_lock_ext
+								7
+								7
+							
+							
+								adpll_rst_spd_det_ext
+								6
+								6
+							
+							
+								adpll_rst_coarse_det_ext
+								5
+								5
+							
+							
+								adpll_momhold_lmsenb_ext
+								4
+								4
+							
+							
+								adpll_timeout_cnt_sel
+								3
+								3
+							
+							
+								adpll_timeout_cnt1_sel
+								2
+								2
+							
+							
+								adpll_lo_lock_sel
+								1
+								1
+							
+							
+								adpll_lo_unlock_intrpt_clear
+								0
+								0
+							
+						
+					
+					
+						adpll_lf_reg
+						adpll_lf_reg.
+						0x26C
+						
+							
+								adpll_lf_ctrl_hw
+								28
+								28
+							
+							
+								adpll_lf_alpha_base
+								27
+								27
+							
+							
+								adpll_lf_alpha_exp
+								24
+								26
+							
+							
+								adpll_lf_alpha_fast
+								20
+								21
+							
+							
+								adpll_lf_beta_base
+								17
+								18
+							
+							
+								adpll_lf_beta_exp
+								14
+								16
+							
+							
+								adpll_lf_beta_fast
+								13
+								13
+							
+							
+								adpll_lf_f_p3
+								10
+								11
+							
+							
+								adpll_lf_avg_en
+								9
+								9
+							
+							
+								adpll_lf_lsb_ext
+								2
+								8
+							
+							
+								adpll_lf_vctrl_range_ext
+								0
+								1
+							
+						
+					
+					
+						adpll_lf_tx
+						adpll_lf_tx.
+						0x270
+						
+							
+								adpll_lf_alpha_base_tx
+								27
+								27
+							
+							
+								adpll_lf_alpha_exp_tx
+								24
+								26
+							
+							
+								adpll_lf_alpha_fast_tx
+								20
+								21
+							
+							
+								adpll_lf_beta_base_tx
+								17
+								18
+							
+							
+								adpll_lf_beta_exp_tx
+								14
+								16
+							
+							
+								adpll_lf_beta_fast_tx
+								13
+								13
+							
+							
+								adpll_lf_f_p3_tx
+								10
+								11
+							
+						
+					
+					
+						adpll_lf_rx
+						adpll_lf_rx.
+						0x274
+						
+							
+								adpll_lf_alpha_base_rx
+								27
+								27
+							
+							
+								adpll_lf_alpha_exp_rx
+								24
+								26
+							
+							
+								adpll_lf_alpha_fast_rx
+								20
+								21
+							
+							
+								adpll_lf_beta_base_rx
+								17
+								18
+							
+							
+								adpll_lf_beta_exp_rx
+								14
+								16
+							
+							
+								adpll_lf_beta_fast_rx
+								13
+								13
+							
+							
+								adpll_lf_f_p3_rx
+								10
+								11
+							
+						
+					
+					
+						adpll_lf_hw
+						adpll_lf_hw.
+						0x278
+						
+							
+								adpll_lf_alpha_base_hw
+								27
+								27
+							
+							
+								adpll_lf_alpha_exp_hw
+								24
+								26
+							
+							
+								adpll_lf_alpha_fast_hw
+								20
+								21
+							
+							
+								adpll_lf_beta_base_hw
+								17
+								18
+							
+							
+								adpll_lf_beta_exp_hw
+								14
+								16
+							
+							
+								adpll_lf_beta_fast_hw
+								13
+								13
+							
+							
+								adpll_lf_f_p3_hw
+								10
+								11
+							
+						
+					
+					
+						adpll_vctrl
+						adpll_vctrl.
+						0x27C
+						
+							
+								adpll_vctrl_range_sel_ext_en
+								27
+								27
+							
+							
+								adpll_vctrl_lock_win_sel
+								26
+								26
+							
+							
+								adpll_vctrl_moni_win_sel
+								25
+								25
+							
+							
+								adpll_vctrl_det_cons_en
+								24
+								24
+							
+							
+								adpll_mom_update_period
+								20
+								21
+							
+							
+								adpll_force_mom_hold
+								16
+								16
+							
+							
+								adpll_dco_mash_bypass
+								15
+								15
+							
+							
+								adpll_capcode_bypass
+								14
+								14
+							
+							
+								sdm_order
+								12
+								12
+							
+							
+								sdm_dither
+								8
+								9
+							
+							
+								sdm_bypass
+								4
+								4
+							
+							
+								sdmout_dly_sel
+								0
+								1
+							
+						
+					
+					
+						adpll_lms
+						adpll_lms.
+						0x280
+						
+							
+								adpll_fref_div2_en
+								31
+								31
+							
+							
+								adpll_lms_ext_value_en
+								29
+								29
+							
+							
+								adpll_lms_ext_value
+								20
+								28
+							
+							
+								adpll_sdm_dither_en
+								19
+								19
+							
+							
+								adpll_sdm_dither_en_ctrl_hw
+								18
+								18
+							
+							
+								adpll_lms_step
+								16
+								17
+							
+							
+								adpll_sdm_dither_prbs_en
+								15
+								15
+							
+							
+								adpll_pha_dem_en
+								14
+								14
+							
+							
+								adpll_pha_dither_en
+								13
+								13
+							
+							
+								adpll_lms_step_enlarge
+								12
+								12
+							
+							
+								adpll_pha_prbs_sel
+								10
+								11
+							
+							
+								adpll_lms_q_delay
+								8
+								9
+							
+							
+								adpll_pha_cancel_en
+								4
+								4
+							
+							
+								adpll_pha_cancel_delay
+								0
+								1
+							
+						
+					
+					
+						adpll_spd
+						adpll_spd.
+						0x284
+						
+							
+								adpll_spd_in_range_delay_1
+								30
+								31
+							
+							
+								adpll_coarsepha_dly_sel
+								29
+								29
+							
+							
+								adpll_force_coarse_path_on
+								28
+								28
+							
+							
+								adpll_spd_lms_sstp_win_sel
+								27
+								27
+							
+							
+								adpll_spd_outrange_dly_sel_ext
+								25
+								26
+							
+							
+								adpll_coarse_path_offtime_sel
+								24
+								24
+							
+							
+								adpll_coarse_phaerr_en
+								23
+								23
+							
+							
+								adpll_force_lf_fast_mode_hw
+								22
+								22
+							
+							
+								adpll_force_lf_fast_mode
+								21
+								21
+							
+							
+								adpll_force_lf_fast_mode_ctrl_hw
+								20
+								20
+							
+							
+								adpll_coarse_gain
+								18
+								19
+							
+							
+								adpll_spd_gain
+								16
+								17
+							
+							
+								adpll_coarse_in_range_cons
+								14
+								15
+							
+							
+								adpll_spd_threshold
+								12
+								13
+							
+							
+								adpll_coarse_path_turnoff
+								10
+								11
+							
+							
+								adpll_spd_in_range_cons
+								8
+								9
+							
+							
+								adpll_spd_out_range_delay
+								4
+								4
+							
+							
+								adpll_spd_in_range_delay
+								0
+								1
+							
+						
+					
+					
+						fcal
+						fcal.
+						0x288
+						
+							
+								fcal_mom_ini_ext
+								16
+								23
+							
+							
+								fcal_mode
+								6
+								7
+							
+							
+								fcal_clk_period
+								4
+								5
+							
+							
+								fcal_mom_toggle_cnt
+								3
+								3
+							
+							
+								fcal_coarse_pha_threshold
+								1
+								2
+							
+							
+								fcal_div_ratio_adj_en
+								0
+								0
+							
+						
+					
+					
+						adpll_polarity
+						adpll_polarity.
+						0x28C
+						
+							
+								adpll_lp_polarity
+								20
+								20
+							
+							
+								adpll_fcal_polarity
+								16
+								16
+							
+							
+								adpll_lms_polarity
+								12
+								12
+							
+							
+								adpll_lp_mom_polarity
+								8
+								8
+							
+						
+					
+					
+						adpll_output
+						adpll_output.
+						0x290
+						
+							
+								adpll_freqerr_det_done
+								21
+								21
+							
+							
+								adpll_freqerr_ou
+								20
+								20
+							
+							
+								adpll_freqerr_sign
+								19
+								19
+							
+							
+								adpll_vctrl_det_done
+								18
+								18
+							
+							
+								adpll_capcode_ud
+								17
+								17
+							
+							
+								adpll_mom_update_total_ou
+								15
+								16
+							
+							
+								adpll_capcode_out_range
+								14
+								14
+							
+							
+								adpll_fcal_done_fsm
+								13
+								13
+							
+							
+								adpll_spd_lock_fsm
+								12
+								12
+							
+							
+								adpll_spd_unlock_fsm
+								11
+								11
+							
+							
+								adpll_mom_update_ou_fsm
+								10
+								10
+							
+							
+								adpll_mom_update_fail_fsm
+								9
+								9
+							
+							
+								adpll_vctrl_out_range_fsm
+								8
+								8
+							
+							
+								adpll_spd_unlock_sign
+								7
+								7
+							
+							
+								adpll_fsm_state
+								3
+								6
+							
+							
+								adpll_lo_lock
+								1
+								1
+							
+							
+								adpll_unlock_intrpt
+								0
+								0
+							
+						
+					
+					
+						adpll_reserved
+						adpll_reserved.
+						0x294
+						
+							
+								adpll_resv0
+								16
+								31
+							
+							
+								adpll_resv1
+								0
+								15
+							
+						
+					
+					
+						rf_reserved
+						rf_reserved.
+						0x298
+						
+							
+								rf_resv0
+								16
+								31
+							
+							
+								rf_resv1
+								0
+								15
+							
+						
+					
+					
+						rf_reserved_2
+						rf_reserved_2.
+						0x29C
+						
+							
+								rf_resv
+								0
+								31
+							
+						
+					
+					
+						rbb_gain_ctrl0
+						rbb_gain_ctrl0.
+						0x300
+						
+							
+								gain_ctrl0_g_rbb1
+								28
+								29
+							
+							
+								gain_ctrl0_g_rbb2
+								24
+								26
+							
+							
+								gain_ctrl0_rosdac_i_bw1
+								18
+								23
+							
+							
+								gain_ctrl0_rosdac_q_bw1
+								12
+								17
+							
+							
+								gain_ctrl0_rosdac_i_bw0
+								6
+								11
+							
+							
+								gain_ctrl0_rosdac_q_bw0
+								0
+								5
+							
+						
+					
+					
+						rbb_gain_ctrl1
+						rbb_gain_ctrl1.
+						0x304
+						
+							
+								gain_ctrl1_g_rbb1
+								28
+								29
+							
+							
+								gain_ctrl1_g_rbb2
+								24
+								26
+							
+							
+								gain_ctrl1_rosdac_i_bw1
+								18
+								23
+							
+							
+								gain_ctrl1_rosdac_q_bw1
+								12
+								17
+							
+							
+								gain_ctrl1_rosdac_i_bw0
+								6
+								11
+							
+							
+								gain_ctrl1_rosdac_q_bw0
+								0
+								5
+							
+						
+					
+					
+						rbb_gain_ctrl2
+						rbb_gain_ctrl2.
+						0x308
+						
+							
+								gain_ctrl2_g_rbb1
+								28
+								29
+							
+							
+								gain_ctrl2_g_rbb2
+								24
+								26
+							
+							
+								gain_ctrl2_rosdac_i_bw1
+								18
+								23
+							
+							
+								gain_ctrl2_rosdac_q_bw1
+								12
+								17
+							
+							
+								gain_ctrl2_rosdac_i_bw0
+								6
+								11
+							
+							
+								gain_ctrl2_rosdac_q_bw0
+								0
+								5
+							
+						
+					
+					
+						rbb_gain_ctrl3
+						rbb_gain_ctrl3.
+						0x30C
+						
+							
+								gain_ctrl3_g_rbb1
+								28
+								29
+							
+							
+								gain_ctrl3_g_rbb2
+								24
+								26
+							
+							
+								gain_ctrl3_rosdac_i_bw1
+								18
+								23
+							
+							
+								gain_ctrl3_rosdac_q_bw1
+								12
+								17
+							
+							
+								gain_ctrl3_rosdac_i_bw0
+								6
+								11
+							
+							
+								gain_ctrl3_rosdac_q_bw0
+								0
+								5
+							
+						
+					
+					
+						rbb_gain_ctrl4
+						rbb_gain_ctrl4.
+						0x310
+						
+							
+								gain_ctrl4_g_rbb1
+								28
+								29
+							
+							
+								gain_ctrl4_g_rbb2
+								24
+								26
+							
+							
+								gain_ctrl4_rosdac_i_bw1
+								18
+								23
+							
+							
+								gain_ctrl4_rosdac_q_bw1
+								12
+								17
+							
+							
+								gain_ctrl4_rosdac_i_bw0
+								6
+								11
+							
+							
+								gain_ctrl4_rosdac_q_bw0
+								0
+								5
+							
+						
+					
+					
+						rbb_gain_ctrl5
+						rbb_gain_ctrl5.
+						0x314
+						
+							
+								gain_ctrl5_g_rbb1
+								28
+								29
+							
+							
+								gain_ctrl5_g_rbb2
+								24
+								26
+							
+							
+								gain_ctrl5_rosdac_i_bw1
+								18
+								23
+							
+							
+								gain_ctrl5_rosdac_q_bw1
+								12
+								17
+							
+							
+								gain_ctrl5_rosdac_i_bw0
+								6
+								11
+							
+							
+								gain_ctrl5_rosdac_q_bw0
+								0
+								5
+							
+						
+					
+					
+						rbb_gain_ctrl6
+						rbb_gain_ctrl6.
+						0x318
+						
+							
+								gain_ctrl6_g_rbb1
+								28
+								29
+							
+							
+								gain_ctrl6_g_rbb2
+								24
+								26
+							
+							
+								gain_ctrl6_rosdac_i_bw1
+								18
+								23
+							
+							
+								gain_ctrl6_rosdac_q_bw1
+								12
+								17
+							
+							
+								gain_ctrl6_rosdac_i_bw0
+								6
+								11
+							
+							
+								gain_ctrl6_rosdac_q_bw0
+								0
+								5
+							
+						
+					
+					
+						rbb_gain_ctrl7
+						rbb_gain_ctrl7.
+						0x31C
+						
+							
+								gain_ctrl7_g_rbb1
+								28
+								29
+							
+							
+								gain_ctrl7_g_rbb2
+								24
+								26
+							
+							
+								gain_ctrl7_rosdac_i_bw1
+								18
+								23
+							
+							
+								gain_ctrl7_rosdac_q_bw1
+								12
+								17
+							
+							
+								gain_ctrl7_rosdac_i_bw0
+								6
+								11
+							
+							
+								gain_ctrl7_rosdac_q_bw0
+								0
+								5
+							
+						
+					
+					
+						rbb_gain_ctrl8
+						rbb_gain_ctrl8.
+						0x320
+						
+							
+								gain_ctrl8_g_rbb1
+								28
+								29
+							
+							
+								gain_ctrl8_g_rbb2
+								24
+								26
+							
+							
+								gain_ctrl8_rosdac_i_bw1
+								18
+								23
+							
+							
+								gain_ctrl8_rosdac_q_bw1
+								12
+								17
+							
+							
+								gain_ctrl8_rosdac_i_bw0
+								6
+								11
+							
+							
+								gain_ctrl8_rosdac_q_bw0
+								0
+								5
+							
+						
+					
+					
+						rbb_gain_ctrl9
+						rbb_gain_ctrl9.
+						0x324
+						
+							
+								gain_ctrl9_g_rbb1
+								28
+								29
+							
+							
+								gain_ctrl9_g_rbb2
+								24
+								26
+							
+							
+								gain_ctrl9_rosdac_i_bw1
+								18
+								23
+							
+							
+								gain_ctrl9_rosdac_q_bw1
+								12
+								17
+							
+							
+								gain_ctrl9_rosdac_i_bw0
+								6
+								11
+							
+							
+								gain_ctrl9_rosdac_q_bw0
+								0
+								5
+							
+						
+					
+					
+						rbb_gain_ctrl10
+						rbb_gain_ctrl10.
+						0x328
+						
+							
+								gain_ctrl10_g_rbb1
+								28
+								29
+							
+							
+								gain_ctrl10_g_rbb2
+								24
+								26
+							
+							
+								gain_ctrl10_rosdac_i_bw1
+								18
+								23
+							
+							
+								gain_ctrl10_rosdac_q_bw1
+								12
+								17
+							
+							
+								gain_ctrl10_rosdac_i_bw0
+								6
+								11
+							
+							
+								gain_ctrl10_rosdac_q_bw0
+								0
+								5
+							
+						
+					
+					
+						rbb_gain_ctrl11
+						rbb_gain_ctrl11.
+						0x32C
+						
+							
+								gain_ctrl11_g_rbb1
+								28
+								29
+							
+							
+								gain_ctrl11_g_rbb2
+								24
+								26
+							
+							
+								gain_ctrl11_rosdac_i_bw1
+								18
+								23
+							
+							
+								gain_ctrl11_rosdac_q_bw1
+								12
+								17
+							
+							
+								gain_ctrl11_rosdac_i_bw0
+								6
+								11
+							
+							
+								gain_ctrl11_rosdac_q_bw0
+								0
+								5
+							
+						
+					
+					
+						rbb_gain_ctrl12
+						rbb_gain_ctrl12.
+						0x330
+						
+							
+								gain_ctrl12_g_rbb1
+								28
+								29
+							
+							
+								gain_ctrl12_g_rbb2
+								24
+								26
+							
+							
+								gain_ctrl12_rosdac_i_bw1
+								18
+								23
+							
+							
+								gain_ctrl12_rosdac_q_bw1
+								12
+								17
+							
+							
+								gain_ctrl12_rosdac_i_bw0
+								6
+								11
+							
+							
+								gain_ctrl12_rosdac_q_bw0
+								0
+								5
+							
+						
+					
+					
+						rbb_gain_ctrl13
+						rbb_gain_ctrl13.
+						0x334
+						
+							
+								gain_ctrl13_g_rbb1
+								28
+								29
+							
+							
+								gain_ctrl13_g_rbb2
+								24
+								26
+							
+							
+								gain_ctrl13_rosdac_i_bw1
+								18
+								23
+							
+							
+								gain_ctrl13_rosdac_q_bw1
+								12
+								17
+							
+							
+								gain_ctrl13_rosdac_i_bw0
+								6
+								11
+							
+							
+								gain_ctrl13_rosdac_q_bw0
+								0
+								5
+							
+						
+					
+					
+						rbb_gain_ctrl14
+						rbb_gain_ctrl14.
+						0x338
+						
+							
+								gain_ctrl14_g_rbb1
+								28
+								29
+							
+							
+								gain_ctrl14_g_rbb2
+								24
+								26
+							
+							
+								gain_ctrl14_rosdac_i_bw1
+								18
+								23
+							
+							
+								gain_ctrl14_rosdac_q_bw1
+								12
+								17
+							
+							
+								gain_ctrl14_rosdac_i_bw0
+								6
+								11
+							
+							
+								gain_ctrl14_rosdac_q_bw0
+								0
+								5
+							
+						
+					
+					
+						rbb_gain_ctrl15
+						rbb_gain_ctrl15.
+						0x33C
+						
+							
+								gain_ctrl15_g_rbb1
+								28
+								29
+							
+							
+								gain_ctrl15_g_rbb2
+								24
+								26
+							
+							
+								gain_ctrl15_rosdac_i_bw1
+								18
+								23
+							
+							
+								gain_ctrl15_rosdac_q_bw1
+								12
+								17
+							
+							
+								gain_ctrl15_rosdac_i_bw0
+								6
+								11
+							
+							
+								gain_ctrl15_rosdac_q_bw0
+								0
+								5
+							
+						
+					
+					
+						acal_config
+						acal_config.
+						0x400
+						
+							
+								vco_idac_hh
+								24
+								29
+							
+							
+								vco_idac_hl
+								16
+								21
+							
+							
+								vco_idac_lh
+								8
+								13
+							
+							
+								vco_idac_ll
+								0
+								5
+							
+						
+					
+					
+						lo_config_2402
+						lo_config_2402.
+						0x404
+						
+							
+								adpll_sdm_dither_en_2402
+								12
+								12
+							
+							
+								kcal_ratio_2402
+								0
+								9
+							
+						
+					
+					
+						lo_config_2404
+						lo_config_2404.
+						0x408
+						
+							
+								adpll_sdm_dither_en_2404
+								12
+								12
+							
+							
+								kcal_ratio_2404
+								0
+								9
+							
+						
+					
+					
+						lo_config_2406
+						lo_config_2406.
+						0x40C
+						
+							
+								adpll_sdm_dither_en_2406
+								12
+								12
+							
+							
+								kcal_ratio_2406
+								0
+								9
+							
+						
+					
+					
+						lo_config_2408
+						lo_config_2408.
+						0x410
+						
+							
+								adpll_sdm_dither_en_2408
+								12
+								12
+							
+							
+								kcal_ratio_2408
+								0
+								9
+							
+						
+					
+					
+						lo_config_2410
+						lo_config_2410.
+						0x414
+						
+							
+								adpll_sdm_dither_en_2410
+								12
+								12
+							
+							
+								kcal_ratio_2410
+								0
+								9
+							
+						
+					
+					
+						lo_config_2412
+						lo_config_2412.
+						0x418
+						
+							
+								adpll_sdm_dither_en_2412
+								12
+								12
+							
+							
+								kcal_ratio_2412
+								0
+								9
+							
+						
+					
+					
+						lo_config_2414
+						lo_config_2414.
+						0x41C
+						
+							
+								adpll_sdm_dither_en_2414
+								12
+								12
+							
+							
+								kcal_ratio_2414
+								0
+								9
+							
+						
+					
+					
+						lo_config_2416
+						lo_config_2416.
+						0x420
+						
+							
+								adpll_sdm_dither_en_2416
+								12
+								12
+							
+							
+								kcal_ratio_2416
+								0
+								9
+							
+						
+					
+					
+						lo_config_2418
+						lo_config_2418.
+						0x424
+						
+							
+								adpll_sdm_dither_en_2418
+								12
+								12
+							
+							
+								kcal_ratio_2418
+								0
+								9
+							
+						
+					
+					
+						lo_config_2420
+						lo_config_2420.
+						0x428
+						
+							
+								adpll_sdm_dither_en_2420
+								12
+								12
+							
+							
+								kcal_ratio_2420
+								0
+								9
+							
+						
+					
+					
+						lo_config_2422
+						lo_config_2422.
+						0x42C
+						
+							
+								adpll_sdm_dither_en_2422
+								12
+								12
+							
+							
+								kcal_ratio_2422
+								0
+								9
+							
+						
+					
+					
+						lo_config_2424
+						lo_config_2424.
+						0x430
+						
+							
+								adpll_sdm_dither_en_2424
+								12
+								12
+							
+							
+								kcal_ratio_2424
+								0
+								9
+							
+						
+					
+					
+						lo_config_2426
+						lo_config_2426.
+						0x434
+						
+							
+								adpll_sdm_dither_en_2426
+								12
+								12
+							
+							
+								kcal_ratio_2426
+								0
+								9
+							
+						
+					
+					
+						lo_config_2428
+						lo_config_2428.
+						0x438
+						
+							
+								adpll_sdm_dither_en_2428
+								12
+								12
+							
+							
+								kcal_ratio_2428
+								0
+								9
+							
+						
+					
+					
+						lo_config_2430
+						lo_config_2430.
+						0x43C
+						
+							
+								adpll_sdm_dither_en_2430
+								12
+								12
+							
+							
+								kcal_ratio_2430
+								0
+								9
+							
+						
+					
+					
+						lo_config_2432
+						lo_config_2432.
+						0x440
+						
+							
+								adpll_sdm_dither_en_2432
+								12
+								12
+							
+							
+								kcal_ratio_2432
+								0
+								9
+							
+						
+					
+					
+						lo_config_2434
+						lo_config_2434.
+						0x444
+						
+							
+								adpll_sdm_dither_en_2434
+								12
+								12
+							
+							
+								kcal_ratio_2434
+								0
+								9
+							
+						
+					
+					
+						lo_config_2436
+						lo_config_2436.
+						0x448
+						
+							
+								adpll_sdm_dither_en_2436
+								12
+								12
+							
+							
+								kcal_ratio_2436
+								0
+								9
+							
+						
+					
+					
+						lo_config_2438
+						lo_config_2438.
+						0x44C
+						
+							
+								adpll_sdm_dither_en_2438
+								12
+								12
+							
+							
+								kcal_ratio_2438
+								0
+								9
+							
+						
+					
+					
+						lo_config_2440
+						lo_config_2440.
+						0x450
+						
+							
+								adpll_sdm_dither_en_2440
+								12
+								12
+							
+							
+								kcal_ratio_2440
+								0
+								9
+							
+						
+					
+					
+						lo_config_2442
+						lo_config_2442.
+						0x454
+						
+							
+								adpll_sdm_dither_en_2442
+								12
+								12
+							
+							
+								kcal_ratio_2442
+								0
+								9
+							
+						
+					
+					
+						lo_config_2444
+						lo_config_2444.
+						0x458
+						
+							
+								adpll_sdm_dither_en_2444
+								12
+								12
+							
+							
+								kcal_ratio_2444
+								0
+								9
+							
+						
+					
+					
+						lo_config_2446
+						lo_config_2446.
+						0x45C
+						
+							
+								adpll_sdm_dither_en_2446
+								12
+								12
+							
+							
+								kcal_ratio_2446
+								0
+								9
+							
+						
+					
+					
+						lo_config_2448
+						lo_config_2448.
+						0x460
+						
+							
+								adpll_sdm_dither_en_2448
+								12
+								12
+							
+							
+								kcal_ratio_2448
+								0
+								9
+							
+						
+					
+					
+						lo_config_2450
+						lo_config_2450.
+						0x464
+						
+							
+								adpll_sdm_dither_en_2450
+								12
+								12
+							
+							
+								kcal_ratio_2450
+								0
+								9
+							
+						
+					
+					
+						lo_config_2452
+						lo_config_2452.
+						0x468
+						
+							
+								adpll_sdm_dither_en_2452
+								12
+								12
+							
+							
+								kcal_ratio_2452
+								0
+								9
+							
+						
+					
+					
+						lo_config_2454
+						lo_config_2454.
+						0x46C
+						
+							
+								adpll_sdm_dither_en_2454
+								12
+								12
+							
+							
+								kcal_ratio_2454
+								0
+								9
+							
+						
+					
+					
+						lo_config_2456
+						lo_config_2456.
+						0x470
+						
+							
+								adpll_sdm_dither_en_2456
+								12
+								12
+							
+							
+								kcal_ratio_2456
+								0
+								9
+							
+						
+					
+					
+						lo_config_2458
+						lo_config_2458.
+						0x474
+						
+							
+								adpll_sdm_dither_en_2458
+								12
+								12
+							
+							
+								kcal_ratio_2458
+								0
+								9
+							
+						
+					
+					
+						lo_config_2460
+						lo_config_2460.
+						0x478
+						
+							
+								adpll_sdm_dither_en_2460
+								12
+								12
+							
+							
+								kcal_ratio_2460
+								0
+								9
+							
+						
+					
+					
+						lo_config_2462
+						lo_config_2462.
+						0x47C
+						
+							
+								adpll_sdm_dither_en_2462
+								12
+								12
+							
+							
+								kcal_ratio_2462
+								0
+								9
+							
+						
+					
+					
+						lo_config_2464
+						lo_config_2464.
+						0x480
+						
+							
+								adpll_sdm_dither_en_2464
+								12
+								12
+							
+							
+								kcal_ratio_2464
+								0
+								9
+							
+						
+					
+					
+						lo_config_2466
+						lo_config_2466.
+						0x484
+						
+							
+								adpll_sdm_dither_en_2466
+								12
+								12
+							
+							
+								kcal_ratio_2466
+								0
+								9
+							
+						
+					
+					
+						lo_config_2468
+						lo_config_2468.
+						0x488
+						
+							
+								adpll_sdm_dither_en_2468
+								12
+								12
+							
+							
+								kcal_ratio_2468
+								0
+								9
+							
+						
+					
+					
+						lo_config_2470
+						lo_config_2470.
+						0x48C
+						
+							
+								adpll_sdm_dither_en_2470
+								12
+								12
+							
+							
+								kcal_ratio_2470
+								0
+								9
+							
+						
+					
+					
+						lo_config_2472
+						lo_config_2472.
+						0x490
+						
+							
+								adpll_sdm_dither_en_2472
+								12
+								12
+							
+							
+								kcal_ratio_2472
+								0
+								9
+							
+						
+					
+					
+						lo_config_2474
+						lo_config_2474.
+						0x494
+						
+							
+								adpll_sdm_dither_en_2474
+								12
+								12
+							
+							
+								kcal_ratio_2474
+								0
+								9
+							
+						
+					
+					
+						lo_config_2476
+						lo_config_2476.
+						0x498
+						
+							
+								adpll_sdm_dither_en_2476
+								12
+								12
+							
+							
+								kcal_ratio_2476
+								0
+								9
+							
+						
+					
+					
+						lo_config_2478
+						lo_config_2478.
+						0x49C
+						
+							
+								adpll_sdm_dither_en_2478
+								12
+								12
+							
+							
+								kcal_ratio_2478
+								0
+								9
+							
+						
+					
+					
+						lo_config_2480
+						lo_config_2480.
+						0x4A0
+						
+							
+								adpll_sdm_dither_en_2480
+								12
+								12
+							
+							
+								kcal_ratio_2480
+								0
+								9
+							
+						
+					
+					
+						lo_config_2405
+						lo_config_2405.
+						0x4A4
+						
+							
+								adpll_sdm_dither_en_2405
+								12
+								12
+							
+							
+								kcal_ratio_2405
+								0
+								9
+							
+						
+					
+					
+						lo_config_2415
+						lo_config_2415.
+						0x4A8
+						
+							
+								adpll_sdm_dither_en_2415
+								12
+								12
+							
+							
+								kcal_ratio_2415
+								0
+								9
+							
+						
+					
+					
+						lo_config_2425
+						lo_config_2425.
+						0x4AC
+						
+							
+								adpll_sdm_dither_en_2425
+								12
+								12
+							
+							
+								kcal_ratio_2425
+								0
+								9
+							
+						
+					
+					
+						lo_config_2435
+						lo_config_2435.
+						0x4B0
+						
+							
+								adpll_sdm_dither_en_2435
+								12
+								12
+							
+							
+								kcal_ratio_2435
+								0
+								9
+							
+						
+					
+					
+						lo_config_2445
+						lo_config_2445.
+						0x4B4
+						
+							
+								adpll_sdm_dither_en_2445
+								12
+								12
+							
+							
+								kcal_ratio_2445
+								0
+								9
+							
+						
+					
+					
+						lo_config_2455
+						lo_config_2455.
+						0x4B8
+						
+							
+								adpll_sdm_dither_en_2455
+								12
+								12
+							
+							
+								kcal_ratio_2455
+								0
+								9
+							
+						
+					
+					
+						lo_config_2465
+						lo_config_2465.
+						0x4BC
+						
+							
+								adpll_sdm_dither_en_2465
+								12
+								12
+							
+							
+								kcal_ratio_2465
+								0
+								9
+							
+						
+					
+					
+						lo_config_2475
+						lo_config_2475.
+						0x4C0
+						
+							
+								adpll_sdm_dither_en_2475
+								12
+								12
+							
+							
+								kcal_ratio_2475
+								0
+								9
+							
+						
+					
+					
+						dg_testbus_0
+						dg_testbus_0.
+						0x500
+						
+							
+								rf_testbus_read
+								0
+								31
+							
+						
+					
+					
+						dg_testbus_1
+						dg_testbus_1.
+						0x504
+						
+							
+								rf_testbus_sel
+								0
+								3
+							
+						
+					
+					
+						dg_ppud_0
+						dg_ppud_0.
+						0x508
+						
+							
+								ppud_manaual_en
+								30
+								30
+							
+							
+								ppud_cnt1
+								25
+								29
+							
+							
+								ppud_cnt2
+								16
+								24
+							
+						
+					
+					
+						rf_top
+						rf_top.
+						0x50C
+						
+							
+								rf_tx_en_src
+								31
+								31
+							
+							
+								rf_tx_en_4s
+								30
+								30
+							
+							
+								rf_rx_en_src
+								29
+								29
+							
+							
+								rf_rx_en_4s
+								28
+								28
+							
+							
+								rf_rx_mode_4s_en
+								26
+								26
+							
+							
+								rf_rx_mode_4s
+								24
+								25
+							
+							
+								rf_rx_mode_hw
+								22
+								23
+							
+							
+								rf_mac_lo_time_offset
+								16
+								21
+							
+							
+								rfckg_afifo_tx_inv
+								2
+								2
+							
+							
+								rfckg_afifo_rxadc_inv
+								1
+								1
+							
+							
+								rfckg_afifo_adpll_inv
+								0
+								0
+							
+						
+					
+					
+						rf_fsm
+						rf_fsm.
+						0x510
+						
+							
+								rf_fsm_afifo_dly_time
+								26
+								31
+							
+							
+								rf_fsm_tx_afifo_4s_en
+								25
+								25
+							
+							
+								rf_fsm_tx_afifo_4s
+								24
+								24
+							
+							
+								rf_fsm_rx_afifo_4s_en
+								23
+								23
+							
+							
+								rf_fsm_rx_afifo_4s
+								22
+								22
+							
+							
+								rf_fsm_en
+								21
+								21
+							
+							
+								rf_fsm_st_4s_en
+								20
+								20
+							
+							
+								rf_fsm_st_4s
+								16
+								18
+							
+							
+								rf_fsm_state
+								12
+								14
+							
+							
+								rf_fsm_lo_time
+								0
+								11
+							
+						
+					
+					
+						rf_singen_0
+						rf_singen_0.
+						0x514
+						
+							
+								singen_en
+								31
+								31
+							
+							
+								singen_clkdiv_n
+								29
+								30
+							
+							
+								singen_unsign_en
+								28
+								28
+							
+							
+								singen_inc_step0
+								16
+								25
+							
+							
+								singen_inc_step1
+								0
+								9
+							
+						
+					
+					
+						rf_singen_1
+						rf_singen_1.
+						0x518
+						
+							
+								singen_mode_i
+								28
+								31
+							
+							
+								singen_clkdiv_i
+								16
+								25
+							
+							
+								singen_mode_q
+								12
+								15
+							
+							
+								singen_clkdiv_q
+								0
+								9
+							
+						
+					
+					
+						rf_singen_2
+						rf_singen_2.
+						0x51C
+						
+							
+								singen_start_addr0_i
+								22
+								31
+							
+							
+								singen_start_addr1_i
+								12
+								21
+							
+							
+								singen_gain_i
+								0
+								10
+							
+						
+					
+					
+						rf_singen_3
+						rf_singen_3.
+						0x520
+						
+							
+								singen_start_addr0_q
+								22
+								31
+							
+							
+								singen_start_addr1_q
+								12
+								21
+							
+							
+								singen_gain_q
+								0
+								10
+							
+						
+					
+					
+						rf_singen_4
+						rf_singen_4.
+						0x524
+						
+							
+								singen_fix_en_i
+								28
+								28
+							
+							
+								singen_fix_i
+								16
+								27
+							
+							
+								singen_fix_en_q
+								12
+								12
+							
+							
+								singen_fix_q
+								0
+								11
+							
+						
+					
+					
+						rf_sram_ctrl0
+						rf_sram_ctrl0.
+						0x528
+						
+							
+								rf_sram_done_cnt
+								16
+								31
+							
+							
+								rf_sram_mode
+								4
+								5
+							
+							
+								rf_sram_sts_clr
+								3
+								3
+							
+							
+								rf_sram_loop_en
+								2
+								2
+							
+							
+								rf_sram_en
+								1
+								1
+							
+							
+								rf_sram_done
+								0
+								0
+							
+						
+					
+					
+						rf_sram_ctrl1
+						rf_sram_ctrl1.
+						0x52C
+						
+							
+								rf_sram_addr_start
+								16
+								31
+							
+							
+								rf_sram_addr_end
+								0
+								15
+							
+						
+					
+					
+						rf_sram_ctrl2
+						rf_sram_ctrl2.
+						0x530
+						
+							
+								rf_sram_sts
+								0
+								31
+							
+						
+					
+					
+						rf_test_mode
+						rf_test_mode.
+						0x534
+						
+							
+								rf_test_mode_en
+								30
+								30
+							
+							
+								dacout_4s_sram_en
+								29
+								29
+							
+							
+								dacout_4s_en
+								28
+								28
+							
+							
+								dacout_4s
+								16
+								27
+							
+							
+								dacout_hw
+								0
+								11
+							
+						
+					
+					
+						rf_rx_pulse_filter
+						rf_rx_pulse_filter.
+						0x538
+						
+							
+								pf_en_i
+								21
+								21
+							
+							
+								pf_en_q
+								20
+								20
+							
+							
+								pf_th1
+								10
+								18
+							
+							
+								pf_th2
+								0
+								8
+							
+						
+					
+				
+			
+			
+				gpip
+				gpip.
+				0x40002000
+				gpip
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						gpadc_config
+						gpadc_config.
+						0x0
+						
+							
+								rsvd_31_24
+								24
+								31
+							
+							
+								gpadc_fifo_thl
+								22
+								23
+							
+							
+								gpadc_fifo_data_count
+								16
+								21
+							
+							
+								gpadc_fifo_rdy_mask
+								15
+								15
+							
+							
+								gpadc_fifo_underrun_mask
+								14
+								14
+							
+							
+								gpadc_fifo_overrun_mask
+								13
+								13
+							
+							
+								gpadc_rdy_mask
+								12
+								12
+							
+							
+								gpadc_fifo_underrun_clr
+								10
+								10
+							
+							
+								gpadc_fifo_overrun_clr
+								9
+								9
+							
+							
+								gpadc_rdy_clr
+								8
+								8
+							
+							
+								gpadc_fifo_rdy
+								7
+								7
+							
+							
+								gpadc_fifo_underrun
+								6
+								6
+							
+							
+								gpadc_fifo_overrun
+								5
+								5
+							
+							
+								gpadc_rdy
+								4
+								4
+							
+							
+								gpadc_fifo_full
+								3
+								3
+							
+							
+								gpadc_fifo_ne
+								2
+								2
+							
+							
+								gpadc_fifo_clr
+								1
+								1
+							
+							
+								gpadc_dma_en
+								0
+								0
+							
+						
+					
+					
+						gpadc_dma_rdata
+						gpadc_dma_rdata.
+						0x4
+						
+							
+								rsvd_31_26
+								26
+								31
+							
+							
+								gpadc_dma_rdata
+								0
+								25
+							
+						
+					
+					
+						gpdac_config
+						gpdac_config.
+						0x40
+						
+							
+								rsvd_31_24
+								24
+								31
+							
+							
+								gpdac_ch_b_sel
+								20
+								23
+							
+							
+								gpdac_ch_a_sel
+								16
+								19
+							
+							
+								gpdac_mode
+								8
+								10
+							
+							
+								dsm_mode
+								4
+								5
+							
+							
+								gpdac_en2
+								1
+								1
+							
+							
+								gpdac_en
+								0
+								0
+							
+						
+					
+					
+						gpdac_dma_config
+						gpdac_dma_config.
+						0x44
+						
+							
+								gpdac_dma_format
+								4
+								5
+							
+							
+								gpdac_dma_tx_en
+								0
+								0
+							
+						
+					
+					
+						gpdac_dma_wdata
+						gpdac_dma_wdata.
+						0x48
+						
+							
+								gpdac_dma_wdata
+								0
+								31
+							
+						
+					
+					
+						gpdac_tx_fifo_status
+						gpdac_tx_fifo_status.
+						0x4C
+						
+							
+								TxFifoWrPtr
+								8
+								9
+							
+							
+								TxFifoRdPtr
+								4
+								6
+							
+							
+								tx_cs
+								2
+								3
+							
+							
+								tx_fifo_full
+								1
+								1
+							
+							
+								tx_fifo_empty
+								0
+								0
+							
+						
+					
+				
+			
+			
+				sec_dbg
+				sec_dbg.
+				0x40003000
+				sec_dbg
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						sd_chip_id_low
+						sd_chip_id_low.
+						0x0
+						
+							
+								sd_chip_id_low
+								0
+								31
+							
+						
+					
+					
+						sd_chip_id_high
+						sd_chip_id_high.
+						0x4
+						
+							
+								sd_chip_id_high
+								0
+								31
+							
+						
+					
+					
+						sd_wifi_mac_low
+						sd_wifi_mac_low.
+						0x8
+						
+							
+								sd_wifi_mac_low
+								0
+								31
+							
+						
+					
+					
+						sd_wifi_mac_high
+						sd_wifi_mac_high.
+						0xC
+						
+							
+								sd_wifi_mac_high
+								0
+								31
+							
+						
+					
+					
+						sd_dbg_pwd_low
+						sd_dbg_pwd_low.
+						0x10
+						
+							
+								sd_dbg_pwd_low
+								0
+								31
+							
+						
+					
+					
+						sd_dbg_pwd_high
+						sd_dbg_pwd_high.
+						0x14
+						
+							
+								sd_dbg_pwd_high
+								0
+								31
+							
+						
+					
+					
+						sd_status
+						sd_status.
+						0x18
+						
+							
+								sd_dbg_ena
+								28
+								31
+							
+							
+								sd_dbg_mode
+								24
+								27
+							
+							
+								sd_dbg_pwd_cnt
+								4
+								23
+							
+							
+								sd_dbg_cci_clk_sel
+								3
+								3
+							
+							
+								sd_dbg_cci_read_en
+								2
+								2
+							
+							
+								sd_dbg_pwd_trig
+								1
+								1
+							
+							
+								sd_dbg_pwd_busy
+								0
+								0
+							
+						
+					
+					
+						sd_dbg_reserved
+						sd_dbg_reserved.
+						0x1C
+						
+							
+								sd_dbg_reserved
+								0
+								31
+							
+						
+					
+				
+			
+			
+				sec_eng
+				sec_eng.
+				0x40004000
+				sec_eng
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						se_sha_0_ctrl
+						se_sha_0_ctrl.
+						0x0
+						
+							
+								se_sha_0_msg_len
+								16
+								31
+							
+							
+								se_sha_0_link_mode
+								15
+								15
+							
+							
+								se_sha_0_int_mask
+								11
+								11
+							
+							
+								se_sha_0_int_set_1t
+								10
+								10
+							
+							
+								se_sha_0_int_clr_1t
+								9
+								9
+							
+							
+								se_sha_0_int
+								8
+								8
+							
+							
+								se_sha_0_hash_sel
+								6
+								6
+							
+							
+								se_sha_0_en
+								5
+								5
+							
+							
+								se_sha_0_mode
+								2
+								4
+							
+							
+								se_sha_0_trig_1t
+								1
+								1
+							
+							
+								se_sha_0_busy
+								0
+								0
+							
+						
+					
+					
+						se_sha_0_msa
+						se_sha_0_msa.
+						0x4
+						
+							
+								se_sha_0_msa
+								0
+								31
+							
+						
+					
+					
+						se_sha_0_status
+						se_sha_0_status.
+						0x8
+						
+							
+								se_sha_0_status
+								0
+								31
+							
+						
+					
+					
+						se_sha_0_endian
+						se_sha_0_endian.
+						0xC
+						
+							
+								se_sha_0_dout_endian
+								0
+								0
+							
+						
+					
+					
+						se_sha_0_hash_l_0
+						se_sha_0_hash_l_0.
+						0x10
+						
+							
+								se_sha_0_hash_l_0
+								0
+								31
+							
+						
+					
+					
+						se_sha_0_hash_l_1
+						se_sha_0_hash_l_1.
+						0x14
+						
+							
+								se_sha_0_hash_l_1
+								0
+								31
+							
+						
+					
+					
+						se_sha_0_hash_l_2
+						se_sha_0_hash_l_2.
+						0x18
+						
+							
+								se_sha_0_hash_l_2
+								0
+								31
+							
+						
+					
+					
+						se_sha_0_hash_l_3
+						se_sha_0_hash_l_3.
+						0x1C
+						
+							
+								se_sha_0_hash_l_3
+								0
+								31
+							
+						
+					
+					
+						se_sha_0_hash_l_4
+						se_sha_0_hash_l_4.
+						0x20
+						
+							
+								se_sha_0_hash_l_4
+								0
+								31
+							
+						
+					
+					
+						se_sha_0_hash_l_5
+						se_sha_0_hash_l_5.
+						0x24
+						
+							
+								se_sha_0_hash_l_5
+								0
+								31
+							
+						
+					
+					
+						se_sha_0_hash_l_6
+						se_sha_0_hash_l_6.
+						0x28
+						
+							
+								se_sha_0_hash_l_6
+								0
+								31
+							
+						
+					
+					
+						se_sha_0_hash_l_7
+						se_sha_0_hash_l_7.
+						0x2C
+						
+							
+								se_sha_0_hash_l_7
+								0
+								31
+							
+						
+					
+					
+						se_sha_0_hash_h_0
+						se_sha_0_hash_h_0.
+						0x30
+						
+							
+								se_sha_0_hash_h_0
+								0
+								31
+							
+						
+					
+					
+						se_sha_0_hash_h_1
+						se_sha_0_hash_h_1.
+						0x34
+						
+							
+								se_sha_0_hash_h_1
+								0
+								31
+							
+						
+					
+					
+						se_sha_0_hash_h_2
+						se_sha_0_hash_h_2.
+						0x38
+						
+							
+								se_sha_0_hash_h_2
+								0
+								31
+							
+						
+					
+					
+						se_sha_0_hash_h_3
+						se_sha_0_hash_h_3.
+						0x3C
+						
+							
+								se_sha_0_hash_h_3
+								0
+								31
+							
+						
+					
+					
+						se_sha_0_hash_h_4
+						se_sha_0_hash_h_4.
+						0x40
+						
+							
+								se_sha_0_hash_h_4
+								0
+								31
+							
+						
+					
+					
+						se_sha_0_hash_h_5
+						se_sha_0_hash_h_5.
+						0x44
+						
+							
+								se_sha_0_hash_h_5
+								0
+								31
+							
+						
+					
+					
+						se_sha_0_hash_h_6
+						se_sha_0_hash_h_6.
+						0x48
+						
+							
+								se_sha_0_hash_h_6
+								0
+								31
+							
+						
+					
+					
+						se_sha_0_hash_h_7
+						se_sha_0_hash_h_7.
+						0x4C
+						
+							
+								se_sha_0_hash_h_7
+								0
+								31
+							
+						
+					
+					
+						se_sha_0_link
+						se_sha_0_link.
+						0x50
+						
+							
+								se_sha_0_lca
+								0
+								31
+							
+						
+					
+					
+						se_sha_0_ctrl_prot
+						se_sha_0_ctrl_prot.
+						0xFC
+						
+							
+								se_sha_id1_en
+								2
+								2
+							
+							
+								se_sha_id0_en
+								1
+								1
+							
+							
+								se_sha_prot_en
+								0
+								0
+							
+						
+					
+					
+						se_aes_0_ctrl
+						se_aes_0_ctrl.
+						0x100
+						
+							
+								se_aes_0_msg_len
+								16
+								31
+							
+							
+								se_aes_0_link_mode
+								15
+								15
+							
+							
+								se_aes_0_iv_sel
+								14
+								14
+							
+							
+								se_aes_0_block_mode
+								12
+								13
+							
+							
+								se_aes_0_int_mask
+								11
+								11
+							
+							
+								se_aes_0_int_set_1t
+								10
+								10
+							
+							
+								se_aes_0_int_clr_1t
+								9
+								9
+							
+							
+								se_aes_0_int
+								8
+								8
+							
+							
+								se_aes_0_hw_key_en
+								7
+								7
+							
+							
+								se_aes_0_dec_key_sel
+								6
+								6
+							
+							
+								se_aes_0_dec_en
+								5
+								5
+							
+							
+								se_aes_0_mode
+								3
+								4
+							
+							
+								se_aes_0_en
+								2
+								2
+							
+							
+								se_aes_0_trig_1t
+								1
+								1
+							
+							
+								se_aes_0_busy
+								0
+								0
+							
+						
+					
+					
+						se_aes_0_msa
+						se_aes_0_msa.
+						0x104
+						
+							
+								se_aes_0_msa
+								0
+								31
+							
+						
+					
+					
+						se_aes_0_mda
+						se_aes_0_mda.
+						0x108
+						
+							
+								se_aes_0_mda
+								0
+								31
+							
+						
+					
+					
+						se_aes_0_status
+						se_aes_0_status.
+						0x10C
+						
+							
+								se_aes_0_status
+								0
+								31
+							
+						
+					
+					
+						se_aes_0_iv_0
+						se_aes_0_iv_0.
+						0x110
+						
+							
+								se_aes_0_iv_0
+								0
+								31
+							
+						
+					
+					
+						se_aes_0_iv_1
+						se_aes_0_iv_1.
+						0x114
+						
+							
+								se_aes_0_iv_1
+								0
+								31
+							
+						
+					
+					
+						se_aes_0_iv_2
+						se_aes_0_iv_2.
+						0x118
+						
+							
+								se_aes_0_iv_2
+								0
+								31
+							
+						
+					
+					
+						se_aes_0_iv_3
+						se_aes_0_iv_3.
+						0x11C
+						
+							
+								se_aes_0_iv_3
+								0
+								31
+							
+						
+					
+					
+						se_aes_0_key_0
+						se_aes_0_key_0.
+						0x120
+						
+							
+								se_aes_0_key_0
+								0
+								31
+							
+						
+					
+					
+						se_aes_0_key_1
+						se_aes_0_key_1.
+						0x124
+						
+							
+								se_aes_0_key_1
+								0
+								31
+							
+						
+					
+					
+						se_aes_0_key_2
+						se_aes_0_key_2.
+						0x128
+						
+							
+								se_aes_0_key_2
+								0
+								31
+							
+						
+					
+					
+						se_aes_0_key_3
+						se_aes_0_key_3.
+						0x12C
+						
+							
+								se_aes_0_key_3
+								0
+								31
+							
+						
+					
+					
+						se_aes_0_key_4
+						se_aes_0_key_4.
+						0x130
+						
+							
+								se_aes_0_key_4
+								0
+								31
+							
+						
+					
+					
+						se_aes_0_key_5
+						se_aes_0_key_5.
+						0x134
+						
+							
+								se_aes_0_key_5
+								0
+								31
+							
+						
+					
+					
+						se_aes_0_key_6
+						se_aes_0_key_6.
+						0x138
+						
+							
+								se_aes_0_key_6
+								0
+								31
+							
+						
+					
+					
+						se_aes_0_key_7
+						se_aes_0_key_7.
+						0x13C
+						
+							
+								se_aes_0_key_7
+								0
+								31
+							
+						
+					
+					
+						se_aes_0_key_sel_0
+						se_aes_0_key_sel_0.
+						0x140
+						
+							
+								se_aes_0_key_sel_0
+								0
+								1
+							
+						
+					
+					
+						se_aes_0_key_sel_1
+						se_aes_0_key_sel_1.
+						0x144
+						
+							
+								se_aes_0_key_sel_1
+								0
+								1
+							
+						
+					
+					
+						se_aes_0_endian
+						se_aes_0_endian.
+						0x148
+						
+							
+								se_aes_0_ctr_len
+								30
+								31
+							
+							
+								se_aes_0_iv_endian
+								3
+								3
+							
+							
+								se_aes_0_key_endian
+								2
+								2
+							
+							
+								se_aes_0_din_endian
+								1
+								1
+							
+							
+								se_aes_0_dout_endian
+								0
+								0
+							
+						
+					
+					
+						se_aes_0_sboot
+						se_aes_0_sboot.
+						0x14C
+						
+							
+								se_aes_0_sboot_key_sel
+								0
+								0
+							
+						
+					
+					
+						se_aes_0_link
+						se_aes_0_link.
+						0x150
+						
+							
+								se_aes_0_lca
+								0
+								31
+							
+						
+					
+					
+						se_aes_0_ctrl_prot
+						se_aes_0_ctrl_prot.
+						0x1FC
+						
+							
+								se_aes_id1_en
+								2
+								2
+							
+							
+								se_aes_id0_en
+								1
+								1
+							
+							
+								se_aes_prot_en
+								0
+								0
+							
+						
+					
+					
+						se_trng_0_ctrl_0
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+						0x200
+						
+							
+								se_trng_0_manual_en
+								15
+								15
+							
+							
+								se_trng_0_manual_reseed
+								14
+								14
+							
+							
+								se_trng_0_manual_fun_sel
+								13
+								13
+							
+							
+								se_trng_0_int_mask
+								11
+								11
+							
+							
+								se_trng_0_int_set_1t
+								10
+								10
+							
+							
+								se_trng_0_int_clr_1t
+								9
+								9
+							
+							
+								se_trng_0_int
+								8
+								8
+							
+							
+								se_trng_0_ht_error
+								4
+								4
+							
+							
+								se_trng_0_dout_clr_1t
+								3
+								3
+							
+							
+								se_trng_0_en
+								2
+								2
+							
+							
+								se_trng_0_trig_1t
+								1
+								1
+							
+							
+								se_trng_0_busy
+								0
+								0
+							
+						
+					
+					
+						se_trng_0_status
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+						0x204
+						
+							
+								se_trng_0_status
+								0
+								31
+							
+						
+					
+					
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+						0x208
+						
+							
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+								0
+								31
+							
+						
+					
+					
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+						0x20C
+						
+							
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+								0
+								31
+							
+						
+					
+					
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+						0x210
+						
+							
+								se_trng_0_dout_2
+								0
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+							
+						
+					
+					
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+						se_trng_0_dout_3.
+						0x214
+						
+							
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+								0
+								31
+							
+						
+					
+					
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+						se_trng_0_dout_4.
+						0x218
+						
+							
+								se_trng_0_dout_4
+								0
+								31
+							
+						
+					
+					
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+						se_trng_0_dout_5.
+						0x21C
+						
+							
+								se_trng_0_dout_5
+								0
+								31
+							
+						
+					
+					
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+						se_trng_0_dout_6.
+						0x220
+						
+							
+								se_trng_0_dout_6
+								0
+								31
+							
+						
+					
+					
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+						se_trng_0_dout_7.
+						0x224
+						
+							
+								se_trng_0_dout_7
+								0
+								31
+							
+						
+					
+					
+						se_trng_0_test
+						se_trng_0_test.
+						0x228
+						
+							
+								se_trng_0_ht_alarm_n
+								4
+								11
+							
+							
+								se_trng_0_ht_dis
+								3
+								3
+							
+							
+								se_trng_0_cp_bypass
+								2
+								2
+							
+							
+								se_trng_0_cp_test_en
+								1
+								1
+							
+							
+								se_trng_0_test_en
+								0
+								0
+							
+						
+					
+					
+						se_trng_0_ctrl_1
+						se_trng_0_ctrl_1.
+						0x22C
+						
+							
+								se_trng_0_reseed_n_lsb
+								0
+								31
+							
+						
+					
+					
+						se_trng_0_ctrl_2
+						se_trng_0_ctrl_2.
+						0x230
+						
+							
+								se_trng_0_reseed_n_msb
+								0
+								15
+							
+						
+					
+					
+						se_trng_0_ctrl_3
+						se_trng_0_ctrl_3.
+						0x234
+						
+							
+								se_trng_0_rosc_en
+								31
+								31
+							
+							
+								se_trng_0_ht_od_en
+								26
+								26
+							
+							
+								se_trng_0_ht_apt_c
+								16
+								25
+							
+							
+								se_trng_0_ht_rct_c
+								8
+								15
+							
+							
+								se_trng_0_cp_ratio
+								0
+								7
+							
+						
+					
+					
+						se_trng_0_test_out_0
+						se_trng_0_test_out_0.
+						0x240
+						
+							
+								se_trng_0_test_out_0
+								0
+								31
+							
+						
+					
+					
+						se_trng_0_test_out_1
+						se_trng_0_test_out_1.
+						0x244
+						
+							
+								se_trng_0_test_out_1
+								0
+								31
+							
+						
+					
+					
+						se_trng_0_test_out_2
+						se_trng_0_test_out_2.
+						0x248
+						
+							
+								se_trng_0_test_out_2
+								0
+								31
+							
+						
+					
+					
+						se_trng_0_test_out_3
+						se_trng_0_test_out_3.
+						0x24C
+						
+							
+								se_trng_0_test_out_3
+								0
+								31
+							
+						
+					
+					
+						se_trng_0_ctrl_prot
+						se_trng_0_ctrl_prot.
+						0x2FC
+						
+							
+								se_trng_id1_en
+								2
+								2
+							
+							
+								se_trng_id0_en
+								1
+								1
+							
+							
+								se_trng_prot_en
+								0
+								0
+							
+						
+					
+					
+						se_pka_0_ctrl_0
+						se_pka_0_ctrl_0.
+						0x300
+						
+							
+								se_pka_0_status
+								16
+								31
+							
+							
+								se_pka_0_status_clr_1t
+								15
+								15
+							
+							
+								se_pka_0_ram_clr_md
+								13
+								13
+							
+							
+								se_pka_0_endian
+								12
+								12
+							
+							
+								se_pka_0_int_mask
+								11
+								11
+							
+							
+								se_pka_0_int_set
+								10
+								10
+							
+							
+								se_pka_0_int_clr_1t
+								9
+								9
+							
+							
+								se_pka_0_int
+								8
+								8
+							
+							
+								se_pka_0_prot_md
+								4
+								7
+							
+							
+								se_pka_0_en
+								3
+								3
+							
+							
+								se_pka_0_busy
+								2
+								2
+							
+							
+								se_pka_0_done_clr_1t
+								1
+								1
+							
+							
+								se_pka_0_done
+								0
+								0
+							
+						
+					
+					
+						se_pka_0_seed
+						se_pka_0_seed.
+						0x30C
+						
+							
+								se_pka_0_seed
+								0
+								31
+							
+						
+					
+					
+						se_pka_0_ctrl_1
+						se_pka_0_ctrl_1.
+						0x310
+						
+							
+								se_pka_0_hbypass
+								3
+								3
+							
+							
+								se_pka_0_hburst
+								0
+								2
+							
+						
+					
+					
+						se_pka_0_rw
+						se_pka_0_rw.
+						0x340
+						
+					
+					
+						se_pka_0_rw_burst
+						se_pka_0_rw_burst.
+						0x360
+						
+					
+					
+						se_pka_0_ctrl_prot
+						se_pka_0_ctrl_prot.
+						0x3FC
+						
+							
+								se_pka_id1_en
+								2
+								2
+							
+							
+								se_pka_id0_en
+								1
+								1
+							
+							
+								se_pka_prot_en
+								0
+								0
+							
+						
+					
+					
+						se_cdet_0_ctrl_0
+						se_cdet_0_ctrl_0.
+						0x400
+						
+							
+								se_cdet_0_g_loop_min
+								24
+								31
+							
+							
+								se_cdet_0_g_loop_max
+								16
+								23
+							
+							
+								se_cdet_0_status
+								2
+								15
+							
+							
+								se_cdet_0_error
+								1
+								1
+							
+							
+								se_cdet_0_en
+								0
+								0
+							
+						
+					
+					
+						se_cdet_0_ctrl_1
+						se_cdet_0_ctrl_1.
+						0x404
+						
+							
+								se_cdet_0_g_slp_n
+								16
+								23
+							
+							
+								se_cdet_0_t_dly_n
+								8
+								15
+							
+							
+								se_cdet_0_t_loop_n
+								0
+								7
+							
+						
+					
+					
+						se_cdet_0_ctrl_prot
+						se_cdet_0_ctrl_prot.
+						0x4FC
+						
+							
+								se_cdet_id1_en
+								2
+								2
+							
+							
+								se_cdet_id0_en
+								1
+								1
+							
+							
+								se_cdet_prot_en
+								0
+								0
+							
+						
+					
+					
+						se_gmac_0_ctrl_0
+						se_gmac_0_ctrl_0.
+						0x500
+						
+							
+								se_gmac_0_x_endian
+								14
+								14
+							
+							
+								se_gmac_0_h_endian
+								13
+								13
+							
+							
+								se_gmac_0_t_endian
+								12
+								12
+							
+							
+								se_gmac_0_int_mask
+								11
+								11
+							
+							
+								se_gmac_0_int_set_1t
+								10
+								10
+							
+							
+								se_gmac_0_int_clr_1t
+								9
+								9
+							
+							
+								se_gmac_0_int
+								8
+								8
+							
+							
+								se_gmac_0_en
+								2
+								2
+							
+							
+								se_gmac_0_trig_1t
+								1
+								1
+							
+							
+								se_gmac_0_busy
+								0
+								0
+							
+						
+					
+					
+						se_gmac_0_lca
+						se_gmac_0_lca.
+						0x504
+						
+							
+								se_gmac_0_lca
+								0
+								31
+							
+						
+					
+					
+						se_gmac_0_status
+						se_gmac_0_status.
+						0x508
+						
+							
+								se_gmac_0_status
+								0
+								31
+							
+						
+					
+					
+						se_gmac_0_ctrl_prot
+						se_gmac_0_ctrl_prot.
+						0x5FC
+						
+							
+								se_gmac_id1_en
+								2
+								2
+							
+							
+								se_gmac_id0_en
+								1
+								1
+							
+							
+								se_gmac_prot_en
+								0
+								0
+							
+						
+					
+					
+						se_ctrl_prot_rd
+						se_ctrl_prot_rd.
+						0xF00
+						
+							
+								se_dbg_dis
+								31
+								31
+							
+							
+								se_gmac_id1_en_rd
+								22
+								22
+							
+							
+								se_gmac_id0_en_rd
+								21
+								21
+							
+							
+								se_gmac_prot_en_rd
+								20
+								20
+							
+							
+								se_cdet_id1_en_rd
+								18
+								18
+							
+							
+								se_cdet_id0_en_rd
+								17
+								17
+							
+							
+								se_cdet_prot_en_rd
+								16
+								16
+							
+							
+								se_pka_id1_en_rd
+								14
+								14
+							
+							
+								se_pka_id0_en_rd
+								13
+								13
+							
+							
+								se_pka_prot_en_rd
+								12
+								12
+							
+							
+								se_trng_id1_en_rd
+								10
+								10
+							
+							
+								se_trng_id0_en_rd
+								9
+								9
+							
+							
+								se_trng_prot_en_rd
+								8
+								8
+							
+							
+								se_aes_id1_en_rd
+								6
+								6
+							
+							
+								se_aes_id0_en_rd
+								5
+								5
+							
+							
+								se_aes_prot_en_rd
+								4
+								4
+							
+							
+								se_sha_id1_en_rd
+								2
+								2
+							
+							
+								se_sha_id0_en_rd
+								1
+								1
+							
+							
+								se_sha_prot_en_rd
+								0
+								0
+							
+						
+					
+					
+						se_ctrl_reserved_0
+						se_ctrl_reserved_0.
+						0xF04
+						
+							
+								se_ctrl_reserved_0
+								0
+								31
+							
+						
+					
+					
+						se_ctrl_reserved_1
+						se_ctrl_reserved_1.
+						0xF08
+						
+							
+								se_ctrl_reserved_1
+								0
+								31
+							
+						
+					
+					
+						se_ctrl_reserved_2
+						se_ctrl_reserved_2.
+						0xF0C
+						
+							
+								se_ctrl_reserved_2
+								0
+								31
+							
+						
+					
+				
+			
+			
+				tzc_sec
+				tzc_sec.
+				0x40005000
+				tzc_sec
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						tzc_rom_ctrl
+						tzc_rom_ctrl.
+						0x40
+						
+							
+								tzc_sboot_done
+								28
+								31
+							
+							
+								tzc_rom1_r1_lock
+								27
+								27
+							
+							
+								tzc_rom1_r0_lock
+								26
+								26
+							
+							
+								tzc_rom0_r1_lock
+								25
+								25
+							
+							
+								tzc_rom0_r0_lock
+								24
+								24
+							
+							
+								tzc_rom1_r1_en
+								19
+								19
+							
+							
+								tzc_rom1_r0_en
+								18
+								18
+							
+							
+								tzc_rom0_r1_en
+								17
+								17
+							
+							
+								tzc_rom0_r0_en
+								16
+								16
+							
+							
+								tzc_rom1_r1_id1_en
+								11
+								11
+							
+							
+								tzc_rom1_r0_id1_en
+								10
+								10
+							
+							
+								tzc_rom0_r1_id1_en
+								9
+								9
+							
+							
+								tzc_rom0_r0_id1_en
+								8
+								8
+							
+							
+								tzc_rom1_r1_id0_en
+								3
+								3
+							
+							
+								tzc_rom1_r0_id0_en
+								2
+								2
+							
+							
+								tzc_rom0_r1_id0_en
+								1
+								1
+							
+							
+								tzc_rom0_r0_id0_en
+								0
+								0
+							
+						
+					
+					
+						tzc_rom0_r0
+						tzc_rom0_r0.
+						0x44
+						
+							
+								tzc_rom0_r0_start
+								16
+								31
+							
+							
+								tzc_rom0_r0_end
+								0
+								15
+							
+						
+					
+					
+						tzc_rom0_r1
+						tzc_rom0_r1.
+						0x48
+						
+							
+								tzc_rom0_r1_start
+								16
+								31
+							
+							
+								tzc_rom0_r1_end
+								0
+								15
+							
+						
+					
+					
+						tzc_rom1_r0
+						tzc_rom1_r0.
+						0x4C
+						
+							
+								tzc_rom1_r0_start
+								16
+								31
+							
+							
+								tzc_rom1_r0_end
+								0
+								15
+							
+						
+					
+					
+						tzc_rom1_r1
+						tzc_rom1_r1.
+						0x50
+						
+							
+								tzc_rom1_r1_start
+								16
+								31
+							
+							
+								tzc_rom1_r1_end
+								0
+								15
+							
+						
+					
+				
+			
+			
+				tzc_nsec
+				tzc_nsec.
+				0x40006000
+				tzc_nsec
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						tzc_rom_ctrl
+						tzc_rom_ctrl.
+						0x40
+						
+							
+								tzc_sboot_done
+								28
+								31
+							
+							
+								tzc_rom1_r1_lock
+								27
+								27
+							
+							
+								tzc_rom1_r0_lock
+								26
+								26
+							
+							
+								tzc_rom0_r1_lock
+								25
+								25
+							
+							
+								tzc_rom0_r0_lock
+								24
+								24
+							
+							
+								tzc_rom1_r1_en
+								19
+								19
+							
+							
+								tzc_rom1_r0_en
+								18
+								18
+							
+							
+								tzc_rom0_r1_en
+								17
+								17
+							
+							
+								tzc_rom0_r0_en
+								16
+								16
+							
+							
+								tzc_rom1_r1_id1_en
+								11
+								11
+							
+							
+								tzc_rom1_r0_id1_en
+								10
+								10
+							
+							
+								tzc_rom0_r1_id1_en
+								9
+								9
+							
+							
+								tzc_rom0_r0_id1_en
+								8
+								8
+							
+							
+								tzc_rom1_r1_id0_en
+								3
+								3
+							
+							
+								tzc_rom1_r0_id0_en
+								2
+								2
+							
+							
+								tzc_rom0_r1_id0_en
+								1
+								1
+							
+							
+								tzc_rom0_r0_id0_en
+								0
+								0
+							
+						
+					
+					
+						tzc_rom0_r0
+						tzc_rom0_r0.
+						0x44
+						
+							
+								tzc_rom0_r0_start
+								16
+								31
+							
+							
+								tzc_rom0_r0_end
+								0
+								15
+							
+						
+					
+					
+						tzc_rom0_r1
+						tzc_rom0_r1.
+						0x48
+						
+							
+								tzc_rom0_r1_start
+								16
+								31
+							
+							
+								tzc_rom0_r1_end
+								0
+								15
+							
+						
+					
+					
+						tzc_rom1_r0
+						tzc_rom1_r0.
+						0x4C
+						
+							
+								tzc_rom1_r0_start
+								16
+								31
+							
+							
+								tzc_rom1_r0_end
+								0
+								15
+							
+						
+					
+					
+						tzc_rom1_r1
+						tzc_rom1_r1.
+						0x50
+						
+							
+								tzc_rom1_r1_start
+								16
+								31
+							
+							
+								tzc_rom1_r1_end
+								0
+								15
+							
+						
+					
+				
+			
+			
+				ef_data_0
+				ef_data_0.
+				0x40007000
+				ef_data_0
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						ef_cfg_0
+						ef_cfg_0.
+						0x0
+						
+							
+								ef_dbg_mode
+								28
+								31
+							
+							
+								ef_dbg_jtag_0_dis
+								26
+								27
+							
+							
+								ef_dbg_jtag_1_dis
+								24
+								25
+							
+							
+								ef_efuse_dbg_dis
+								23
+								23
+							
+							
+								ef_se_dbg_dis
+								22
+								22
+							
+							
+								ef_cpu_rst_dbg_dis
+								21
+								21
+							
+							
+								ef_cpu1_dis
+								20
+								20
+							
+							
+								ef_sf_dis
+								19
+								19
+							
+							
+								ef_cam_dis
+								18
+								18
+							
+							
+								ef_0_key_enc_en
+								17
+								17
+							
+							
+								ef_wifi_dis
+								16
+								16
+							
+							
+								ef_ble_dis
+								15
+								15
+							
+							
+								ef_sdu_dis
+								14
+								14
+							
+							
+								ef_sf_key_0_sel
+								12
+								13
+							
+							
+								ef_boot_sel
+								8
+								11
+							
+							
+								ef_cpu0_enc_en
+								7
+								7
+							
+							
+								ef_cpu1_enc_en
+								6
+								6
+							
+							
+								ef_sboot_en
+								4
+								5
+							
+							
+								ef_sboot_sign_mode
+								2
+								3
+							
+							
+								ef_sf_aes_mode
+								0
+								1
+							
+						
+					
+					
+						ef_dbg_pwd_low
+						ef_dbg_pwd_low.
+						0x4
+						
+							
+								ef_dbg_pwd_low
+								0
+								31
+							
+						
+					
+					
+						ef_dbg_pwd_high
+						ef_dbg_pwd_high.
+						0x8
+						
+							
+								ef_dbg_pwd_high
+								0
+								31
+							
+						
+					
+					
+						ef_ana_trim_0
+						ef_ana_trim_0.
+						0xC
+						
+							
+								ef_ana_trim_0
+								0
+								31
+							
+						
+					
+					
+						ef_sw_usage_0
+						ef_sw_usage_0.
+						0x10
+						
+							
+								ef_sw_usage_0
+								0
+								31
+							
+						
+					
+					
+						ef_wifi_mac_low
+						ef_wifi_mac_low.
+						0x14
+						
+							
+								ef_wifi_mac_low
+								0
+								31
+							
+						
+					
+					
+						ef_wifi_mac_high
+						ef_wifi_mac_high.
+						0x18
+						
+							
+								ef_wifi_mac_high
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_0_w0
+						ef_key_slot_0_w0.
+						0x1C
+						
+							
+								ef_key_slot_0_w0
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_0_w1
+						ef_key_slot_0_w1.
+						0x20
+						
+							
+								ef_key_slot_0_w1
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_0_w2
+						ef_key_slot_0_w2.
+						0x24
+						
+							
+								ef_key_slot_0_w2
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_0_w3
+						ef_key_slot_0_w3.
+						0x28
+						
+							
+								ef_key_slot_0_w3
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_1_w0
+						ef_key_slot_1_w0.
+						0x2C
+						
+							
+								ef_key_slot_1_w0
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_1_w1
+						ef_key_slot_1_w1.
+						0x30
+						
+							
+								ef_key_slot_1_w1
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_1_w2
+						ef_key_slot_1_w2.
+						0x34
+						
+							
+								ef_key_slot_1_w2
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_1_w3
+						ef_key_slot_1_w3.
+						0x38
+						
+							
+								ef_key_slot_1_w3
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_2_w0
+						ef_key_slot_2_w0.
+						0x3C
+						
+							
+								ef_key_slot_2_w0
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_2_w1
+						ef_key_slot_2_w1.
+						0x40
+						
+							
+								ef_key_slot_2_w1
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_2_w2
+						ef_key_slot_2_w2.
+						0x44
+						
+							
+								ef_key_slot_2_w2
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_2_w3
+						ef_key_slot_2_w3.
+						0x48
+						
+							
+								ef_key_slot_2_w3
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_3_w0
+						ef_key_slot_3_w0.
+						0x4C
+						
+							
+								ef_key_slot_3_w0
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_3_w1
+						ef_key_slot_3_w1.
+						0x50
+						
+							
+								ef_key_slot_3_w1
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_3_w2
+						ef_key_slot_3_w2.
+						0x54
+						
+							
+								ef_key_slot_3_w2
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_3_w3
+						ef_key_slot_3_w3.
+						0x58
+						
+							
+								ef_key_slot_3_w3
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_4_w0
+						ef_key_slot_4_w0.
+						0x5C
+						
+							
+								ef_key_slot_4_w0
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_4_w1
+						ef_key_slot_4_w1.
+						0x60
+						
+							
+								ef_key_slot_4_w1
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_4_w2
+						ef_key_slot_4_w2.
+						0x64
+						
+							
+								ef_key_slot_4_w2
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_4_w3
+						ef_key_slot_4_w3.
+						0x68
+						
+							
+								ef_key_slot_4_w3
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_5_w0
+						ef_key_slot_5_w0.
+						0x6C
+						
+							
+								ef_key_slot_5_w0
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_5_w1
+						ef_key_slot_5_w1.
+						0x70
+						
+							
+								ef_key_slot_5_w1
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_5_w2
+						ef_key_slot_5_w2.
+						0x74
+						
+							
+								ef_key_slot_5_w2
+								0
+								31
+							
+						
+					
+					
+						ef_key_slot_5_w3
+						ef_key_slot_5_w3.
+						0x78
+						
+							
+								ef_key_slot_5_w3
+								0
+								31
+							
+						
+					
+					
+						ef_data_0_lock
+						ef_data_0_lock.
+						0x7C
+						
+							
+								rd_lock_key_slot_5
+								31
+								31
+							
+							
+								rd_lock_key_slot_4
+								30
+								30
+							
+							
+								rd_lock_key_slot_3
+								29
+								29
+							
+							
+								rd_lock_key_slot_2
+								28
+								28
+							
+							
+								rd_lock_key_slot_1
+								27
+								27
+							
+							
+								rd_lock_key_slot_0
+								26
+								26
+							
+							
+								rd_lock_dbg_pwd
+								25
+								25
+							
+							
+								wr_lock_key_slot_5_h
+								24
+								24
+							
+							
+								wr_lock_key_slot_4_h
+								23
+								23
+							
+							
+								wr_lock_key_slot_3
+								22
+								22
+							
+							
+								wr_lock_key_slot_2
+								21
+								21
+							
+							
+								wr_lock_key_slot_1
+								20
+								20
+							
+							
+								wr_lock_key_slot_0
+								19
+								19
+							
+							
+								wr_lock_wifi_mac
+								18
+								18
+							
+							
+								wr_lock_sw_usage_0
+								17
+								17
+							
+							
+								wr_lock_dbg_pwd
+								16
+								16
+							
+							
+								wr_lock_boot_mode
+								15
+								15
+							
+							
+								wr_lock_key_slot_5_l
+								14
+								14
+							
+							
+								wr_lock_key_slot_4_l
+								13
+								13
+							
+							
+								ef_ana_trim_1
+								0
+								12
+							
+						
+					
+				
+			
+			
+				ef_data_1
+				ef_data_1.
+				0x40007000
+				ef_data_1
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						reg_key_slot_6_w0
+						reg_key_slot_6_w0.
+						0x80
+						
+							
+								reg_key_slot_6_w0
+								0
+								31
+							
+						
+					
+					
+						reg_key_slot_6_w1
+						reg_key_slot_6_w1.
+						0x84
+						
+							
+								reg_key_slot_6_w1
+								0
+								31
+							
+						
+					
+					
+						reg_key_slot_6_w2
+						reg_key_slot_6_w2.
+						0x88
+						
+							
+								reg_key_slot_6_w2
+								0
+								31
+							
+						
+					
+					
+						reg_key_slot_6_w3
+						reg_key_slot_6_w3.
+						0x8C
+						
+							
+								reg_key_slot_6_w3
+								0
+								31
+							
+						
+					
+					
+						reg_key_slot_7_w0
+						reg_key_slot_7_w0.
+						0x90
+						
+							
+								reg_key_slot_7_w0
+								0
+								31
+							
+						
+					
+					
+						reg_key_slot_7_w1
+						reg_key_slot_7_w1.
+						0x94
+						
+							
+								reg_key_slot_7_w1
+								0
+								31
+							
+						
+					
+					
+						reg_key_slot_7_w2
+						reg_key_slot_7_w2.
+						0x98
+						
+							
+								reg_key_slot_7_w2
+								0
+								31
+							
+						
+					
+					
+						reg_key_slot_7_w3
+						reg_key_slot_7_w3.
+						0x9C
+						
+							
+								reg_key_slot_7_w3
+								0
+								31
+							
+						
+					
+					
+						reg_key_slot_8_w0
+						reg_key_slot_8_w0.
+						0xA0
+						
+							
+								reg_key_slot_8_w0
+								0
+								31
+							
+						
+					
+					
+						reg_key_slot_8_w1
+						reg_key_slot_8_w1.
+						0xA4
+						
+							
+								reg_key_slot_8_w1
+								0
+								31
+							
+						
+					
+					
+						reg_key_slot_8_w2
+						reg_key_slot_8_w2.
+						0xA8
+						
+							
+								reg_key_slot_8_w2
+								0
+								31
+							
+						
+					
+					
+						reg_key_slot_8_w3
+						reg_key_slot_8_w3.
+						0xAC
+						
+							
+								reg_key_slot_8_w3
+								0
+								31
+							
+						
+					
+					
+						reg_key_slot_9_w0
+						reg_key_slot_9_w0.
+						0xB0
+						
+							
+								reg_key_slot_9_w0
+								0
+								31
+							
+						
+					
+					
+						reg_key_slot_9_w1
+						reg_key_slot_9_w1.
+						0xB4
+						
+							
+								reg_key_slot_9_w1
+								0
+								31
+							
+						
+					
+					
+						reg_key_slot_9_w2
+						reg_key_slot_9_w2.
+						0xB8
+						
+							
+								reg_key_slot_9_w2
+								0
+								31
+							
+						
+					
+					
+						reg_key_slot_9_w3
+						reg_key_slot_9_w3.
+						0xBC
+						
+							
+								reg_key_slot_9_w3
+								0
+								31
+							
+						
+					
+					
+						reg_key_slot_10_w0
+						reg_key_slot_10_w0.
+						0xC0
+						
+					
+					
+						reg_key_slot_10_w1
+						reg_key_slot_10_w1.
+						0xC4
+						
+					
+					
+						reg_key_slot_10_w2
+						reg_key_slot_10_w2.
+						0xC8
+						
+					
+					
+						reg_key_slot_10_w3
+						reg_key_slot_10_w3.
+						0xCC
+						
+					
+					
+						reg_key_slot_11_w0
+						reg_key_slot_11_w0.
+						0xD0
+						
+					
+					
+						reg_key_slot_11_w1
+						reg_key_slot_11_w1.
+						0xD4
+						
+					
+					
+						reg_key_slot_11_w2
+						reg_key_slot_11_w2.
+						0xD8
+						
+					
+					
+						reg_key_slot_11_w3
+						reg_key_slot_11_w3.
+						0xDC
+						
+					
+					
+						reg_data_1_lock
+						reg_data_1_lock.
+						0xE0
+						
+							
+								rd_lock_key_slot_9
+								29
+								29
+							
+							
+								rd_lock_key_slot_8
+								28
+								28
+							
+							
+								rd_lock_key_slot_7
+								27
+								27
+							
+							
+								rd_lock_key_slot_6
+								26
+								26
+							
+							
+								RESERVED_25_16
+								16
+								25
+							
+							
+								wr_lock_key_slot_9
+								13
+								13
+							
+							
+								wr_lock_key_slot_8
+								12
+								12
+							
+							
+								wr_lock_key_slot_7
+								11
+								11
+							
+							
+								wr_lock_key_slot_6
+								10
+								10
+							
+							
+								RESERVED_9_0
+								0
+								9
+							
+						
+					
+				
+			
+			
+				ef_ctrl
+				ef_ctrl.
+				0x40007000
+				ef_ctrl
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						ef_if_ctrl_0
+						ef_if_ctrl_0.
+						0x800
+						
+							
+								ef_if_prot_code_cyc
+								24
+								31
+							
+							
+								ef_if_0_int_set
+								22
+								22
+							
+							
+								ef_if_0_int_clr
+								21
+								21
+							
+							
+								ef_if_0_int
+								20
+								20
+							
+							
+								ef_if_cyc_modify_lock
+								19
+								19
+							
+							
+								ef_if_auto_rd_en
+								18
+								18
+							
+							
+								ef_clk_sahb_data_gate
+								17
+								17
+							
+							
+								ef_if_por_dig
+								16
+								16
+							
+							
+								ef_if_prot_code_ctrl
+								8
+								15
+							
+							
+								ef_clk_sahb_data_sel
+								7
+								7
+							
+							
+								ef_if_0_cyc_modify
+								6
+								6
+							
+							
+								ef_if_0_manual_en
+								5
+								5
+							
+							
+								ef_if_0_trig
+								4
+								4
+							
+							
+								ef_if_0_rw
+								3
+								3
+							
+							
+								ef_if_0_busy
+								2
+								2
+							
+							
+								ef_if_0_autoload_done
+								1
+								1
+							
+							
+								ef_if_0_autoload_p1_done
+								0
+								0
+							
+						
+					
+					
+						ef_if_cyc_0
+						ef_if_cyc_0.
+						0x804
+						
+							
+								ef_if_cyc_pd_cs_s
+								24
+								31
+							
+							
+								ef_if_cyc_cs
+								18
+								23
+							
+							
+								ef_if_cyc_rd_adr
+								12
+								17
+							
+							
+								ef_if_cyc_rd_dat
+								6
+								11
+							
+							
+								ef_if_cyc_rd_dmy
+								0
+								5
+							
+						
+					
+					
+						ef_if_cyc_1
+						ef_if_cyc_1.
+						0x808
+						
+							
+								ef_if_cyc_pd_cs_h
+								26
+								31
+							
+							
+								ef_if_cyc_ps_cs
+								20
+								25
+							
+							
+								ef_if_cyc_wr_adr
+								14
+								19
+							
+							
+								ef_if_cyc_pp
+								6
+								13
+							
+							
+								ef_if_cyc_pi
+								0
+								5
+							
+						
+					
+					
+						ef_if_0_manual
+						ef_if_0_manual.
+						0x80C
+						
+							
+								ef_if_prot_code_manual
+								24
+								31
+							
+							
+								ef_if_0_q
+								16
+								23
+							
+							
+								ef_if_csb
+								15
+								15
+							
+							
+								ef_if_load
+								14
+								14
+							
+							
+								ef_if_pgenb
+								13
+								13
+							
+							
+								ef_if_strobe
+								12
+								12
+							
+							
+								ef_if_ps
+								11
+								11
+							
+							
+								ef_if_pd
+								10
+								10
+							
+							
+								ef_if_a
+								0
+								9
+							
+						
+					
+					
+						ef_if_0_status
+						ef_if_0_status.
+						0x810
+						
+							
+								ef_if_0_status
+								0
+								31
+							
+						
+					
+					
+						ef_if_cfg_0
+						ef_if_cfg_0.
+						0x814
+						
+							
+								ef_if_dbg_mode
+								28
+								31
+							
+							
+								ef_if_dbg_jtag_0_dis
+								26
+								27
+							
+							
+								ef_if_dbg_jtag_1_dis
+								24
+								25
+							
+							
+								ef_if_efuse_dbg_dis
+								23
+								23
+							
+							
+								ef_if_se_dbg_dis
+								22
+								22
+							
+							
+								ef_if_cpu_rst_dbg_dis
+								21
+								21
+							
+							
+								ef_if_cpu1_dis
+								20
+								20
+							
+							
+								ef_if_sf_dis
+								19
+								19
+							
+							
+								ef_if_cam_dis
+								18
+								18
+							
+							
+								ef_if_0_key_enc_en
+								17
+								17
+							
+							
+								ef_if_wifi_dis
+								16
+								16
+							
+							
+								ef_if_ble_dis
+								15
+								15
+							
+							
+								ef_if_sdu_dis
+								14
+								14
+							
+							
+								ef_if_sf_key_0_sel
+								12
+								13
+							
+							
+								ef_if_boot_sel
+								8
+								11
+							
+							
+								ef_if_cpu0_enc_en
+								7
+								7
+							
+							
+								ef_if_cpu1_enc_en
+								6
+								6
+							
+							
+								ef_if_sboot_en
+								4
+								5
+							
+							
+								ef_if_sboot_sign_mode
+								2
+								3
+							
+							
+								ef_if_sf_aes_mode
+								0
+								1
+							
+						
+					
+					
+						ef_sw_cfg_0
+						ef_sw_cfg_0.
+						0x818
+						
+							
+								ef_sw_dbg_mode
+								28
+								31
+							
+							
+								ef_sw_dbg_jtag_0_dis
+								26
+								27
+							
+							
+								ef_sw_dbg_jtag_1_dis
+								24
+								25
+							
+							
+								ef_sw_efuse_dbg_dis
+								23
+								23
+							
+							
+								ef_sw_se_dbg_dis
+								22
+								22
+							
+							
+								ef_sw_cpu_rst_dbg_dis
+								21
+								21
+							
+							
+								ef_sw_cpu1_dis
+								20
+								20
+							
+							
+								ef_sw_sf_dis
+								19
+								19
+							
+							
+								ef_sw_cam_dis
+								18
+								18
+							
+							
+								ef_sw_0_key_enc_en
+								17
+								17
+							
+							
+								ef_sw_wifi_dis
+								16
+								16
+							
+							
+								ef_sw_ble_dis
+								15
+								15
+							
+							
+								ef_sw_sdu_dis
+								14
+								14
+							
+							
+								ef_sw_sf_key_0_sel
+								12
+								13
+							
+							
+								ef_sw_cpu0_enc_en
+								7
+								7
+							
+							
+								ef_sw_cpu1_enc_en
+								6
+								6
+							
+							
+								ef_sw_sboot_en
+								4
+								5
+							
+							
+								ef_sw_sboot_sign_mode
+								2
+								3
+							
+							
+								ef_sw_sf_aes_mode
+								0
+								1
+							
+						
+					
+					
+						ef_reserved
+						ef_reserved.
+						0x81C
+						
+							
+								ef_reserved
+								0
+								31
+							
+						
+					
+					
+						ef_if_ana_trim_0
+						ef_if_ana_trim_0.
+						0x820
+						
+							
+								ef_if_ana_trim_0
+								0
+								31
+							
+						
+					
+					
+						ef_if_sw_usage_0
+						ef_if_sw_usage_0.
+						0x824
+						
+							
+								ef_if_sw_usage_0
+								0
+								31
+							
+						
+					
+					
+						ef_crc_ctrl_0
+						ef_crc_ctrl_0.
+						0xA00
+						
+							
+								ef_crc_slp_n
+								16
+								31
+							
+							
+								ef_crc_lock
+								11
+								11
+							
+							
+								ef_crc_int_set
+								10
+								10
+							
+							
+								ef_crc_int_clr
+								9
+								9
+							
+							
+								ef_crc_int
+								8
+								8
+							
+							
+								ef_crc_din_endian
+								7
+								7
+							
+							
+								ef_crc_dout_endian
+								6
+								6
+							
+							
+								ef_crc_dout_inv_en
+								5
+								5
+							
+							
+								ef_crc_error
+								4
+								4
+							
+							
+								ef_crc_mode
+								3
+								3
+							
+							
+								ef_crc_en
+								2
+								2
+							
+							
+								ef_crc_trig
+								1
+								1
+							
+							
+								ef_crc_busy
+								0
+								0
+							
+						
+					
+					
+						ef_crc_ctrl_1
+						ef_crc_ctrl_1.
+						0xA04
+						
+							
+								ef_crc_data_0_en
+								0
+								31
+							
+						
+					
+					
+						ef_crc_ctrl_2
+						ef_crc_ctrl_2.
+						0xA08
+						
+							
+								ef_crc_data_1_en
+								0
+								31
+							
+						
+					
+					
+						ef_crc_ctrl_3
+						ef_crc_ctrl_3.
+						0xA0C
+						
+							
+								ef_crc_iv
+								0
+								31
+							
+						
+					
+					
+						ef_crc_ctrl_4
+						ef_crc_ctrl_4.
+						0xA10
+						
+							
+								ef_crc_golden
+								0
+								31
+							
+						
+					
+					
+						ef_crc_ctrl_5
+						ef_crc_ctrl_5.
+						0xA14
+						
+							
+								ef_crc_dout
+								0
+								31
+							
+						
+					
+				
+			
+			
+				cci
+				cci.
+				0x40008000
+				cci
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						cci_cfg
+						cci_cfg.
+						0x0
+						
+							
+								reg_mcci_clk_inv
+								9
+								9
+							
+							
+								reg_scci_clk_inv
+								8
+								8
+							
+							
+								cfg_cci1_pre_read
+								7
+								7
+							
+							
+								reg_div_m_cci_sclk
+								5
+								6
+							
+							
+								reg_m_cci_sclk_en
+								4
+								4
+							
+							
+								cci_mas_hw_mode
+								3
+								3
+							
+							
+								cci_mas_sel_cci2
+								2
+								2
+							
+							
+								cci_slv_sel_cci2
+								1
+								1
+							
+							
+								cci_en
+								0
+								0
+							
+						
+					
+					
+						cci_addr
+						cci_addr.
+						0x4
+						
+							
+								apb_cci_addr
+								0
+								31
+							
+						
+					
+					
+						cci_wdata
+						cci_wdata.
+						0x8
+						
+							
+								apb_cci_wdata
+								0
+								31
+							
+						
+					
+					
+						cci_rdata
+						cci_rdata.
+						0xC
+						
+							
+								apb_cci_rdata
+								0
+								31
+							
+						
+					
+					
+						cci_ctl
+						cci_ctl.
+						0x10
+						
+							
+								ahb_state
+								2
+								3
+							
+							
+								cci_read_flag
+								1
+								1
+							
+							
+								cci_write_flag
+								0
+								0
+							
+						
+					
+				
+			
+			
+				l1c
+				l1c.
+				0x40009000
+				l1c
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						l1c_config
+						l1c_config.
+						0x0
+						
+							
+								reserved_31_30
+								30
+								31
+							
+							
+								l1c_flush_done
+								29
+								29
+							
+							
+								l1c_flush_en
+								28
+								28
+							
+							
+								wrap_dis
+								26
+								26
+							
+							
+								early_resp_dis
+								25
+								25
+							
+							
+								l1c_bmx_busy_option_dis
+								24
+								24
+							
+							
+								l1c_bmx_timeout_en
+								20
+								23
+							
+							
+								l1c_bmx_arb_mode
+								16
+								17
+							
+							
+								l1c_bmx_err_en
+								15
+								15
+							
+							
+								l1c_bypass
+								14
+								14
+							
+							
+								irom_2t_access
+								12
+								12
+							
+							
+								l1c_way_dis
+								8
+								11
+							
+							
+								l1c_wa_en
+								6
+								6
+							
+							
+								l1c_wb_en
+								5
+								5
+							
+							
+								l1c_wt_en
+								4
+								4
+							
+							
+								l1c_invalid_done
+								3
+								3
+							
+							
+								l1c_invalid_en
+								2
+								2
+							
+							
+								l1c_cnt_en
+								1
+								1
+							
+							
+								l1c_cacheable
+								0
+								0
+							
+						
+					
+					
+						hit_cnt_lsb
+						hit_cnt_lsb.
+						0x4
+						
+							
+								hit_cnt_lsb
+								0
+								31
+							
+						
+					
+					
+						hit_cnt_msb
+						hit_cnt_msb.
+						0x8
+						
+							
+								hit_cnt_msb
+								0
+								31
+							
+						
+					
+					
+						miss_cnt
+						miss_cnt.
+						0xC
+						
+							
+								miss_cnt
+								0
+								31
+							
+						
+					
+					
+						l1c_misc
+						l1c_misc.
+						0x10
+						
+							
+								l1c_fsm
+								28
+								30
+							
+						
+					
+					
+						l1c_bmx_err_addr_en
+						l1c_bmx_err_addr_en.
+						0x200
+						
+							
+								l1c_hsel_option
+								16
+								19
+							
+							
+								l1c_bmx_err_tz
+								5
+								5
+							
+							
+								l1c_bmx_err_dec
+								4
+								4
+							
+							
+								l1c_bmx_err_addr_dis
+								0
+								0
+							
+						
+					
+					
+						l1c_bmx_err_addr
+						l1c_bmx_err_addr.
+						0x204
+						
+							
+								l1c_bmx_err_addr
+								0
+								31
+							
+						
+					
+					
+						irom1_misr_dataout_0
+						irom1_misr_dataout_0.
+						0x208
+						
+							
+								irom1_misr_dataout_0
+								0
+								31
+							
+						
+					
+					
+						irom1_misr_dataout_1
+						irom1_misr_dataout_1.
+						0x20C
+						
+							
+								irom1_misr_dataout_1
+								0
+								31
+							
+						
+					
+					
+						cpu_clk_gate
+						cpu_clk_gate.
+						0x210
+						
+							
+								force_e21_clock_on_2
+								2
+								2
+							
+							
+								force_e21_clock_on_1
+								1
+								1
+							
+							
+								force_e21_clock_on_0
+								0
+								0
+							
+						
+					
+				
+			
+			
+				uart
+				uart.
+				0x4000A000
+				uart
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						utx_config
+						utx_config.
+						0x0
+						
+							
+								cr_utx_len
+								16
+								31
+							
+							
+								cr_utx_bit_cnt_b
+								13
+								15
+							
+							
+								cr_utx_bit_cnt_p
+								11
+								12
+							
+							
+								cr_utx_bit_cnt_d
+								8
+								10
+							
+							
+								cr_utx_ir_inv
+								7
+								7
+							
+							
+								cr_utx_ir_en
+								6
+								6
+							
+							
+								cr_utx_prt_sel
+								5
+								5
+							
+							
+								cr_utx_prt_en
+								4
+								4
+							
+							
+								cr_utx_lin_en
+								3
+								3
+							
+							
+								cr_utx_frm_en
+								2
+								2
+							
+							
+								cr_utx_cts_en
+								1
+								1
+							
+							
+								cr_utx_en
+								0
+								0
+							
+						
+					
+					
+						urx_config
+						urx_config.
+						0x4
+						
+							
+								cr_urx_len
+								16
+								31
+							
+							
+								cr_urx_deg_cnt
+								12
+								15
+							
+							
+								cr_urx_deg_en
+								11
+								11
+							
+							
+								cr_urx_bit_cnt_d
+								8
+								10
+							
+							
+								cr_urx_ir_inv
+								7
+								7
+							
+							
+								cr_urx_ir_en
+								6
+								6
+							
+							
+								cr_urx_prt_sel
+								5
+								5
+							
+							
+								cr_urx_prt_en
+								4
+								4
+							
+							
+								cr_urx_lin_en
+								3
+								3
+							
+							
+								cr_urx_abr_en
+								1
+								1
+							
+							
+								cr_urx_en
+								0
+								0
+							
+						
+					
+					
+						uart_bit_prd
+						uart_bit_prd.
+						0x8
+						
+							
+								cr_urx_bit_prd
+								16
+								31
+							
+							
+								cr_utx_bit_prd
+								0
+								15
+							
+						
+					
+					
+						data_config
+						data_config.
+						0xC
+						
+							
+								cr_uart_bit_inv
+								0
+								0
+							
+						
+					
+					
+						utx_ir_position
+						utx_ir_position.
+						0x10
+						
+							
+								cr_utx_ir_pos_p
+								16
+								31
+							
+							
+								cr_utx_ir_pos_s
+								0
+								15
+							
+						
+					
+					
+						urx_ir_position
+						urx_ir_position.
+						0x14
+						
+							
+								cr_urx_ir_pos_s
+								0
+								15
+							
+						
+					
+					
+						urx_rto_timer
+						urx_rto_timer.
+						0x18
+						
+							
+								cr_urx_rto_value
+								0
+								7
+							
+						
+					
+					
+						uart_sw_mode
+						uart_sw_mode.
+						0x1C
+						
+							
+								cr_urx_rts_sw_val
+								3
+								3
+							
+							
+								cr_urx_rts_sw_mode
+								2
+								2
+							
+							
+								cr_utx_txd_sw_val
+								1
+								1
+							
+							
+								cr_utx_txd_sw_mode
+								0
+								0
+							
+						
+					
+					
+						uart_int_sts
+						UART interrupt status
+						0x20
+						
+							
+								urx_lse_int
+								8
+								8
+							
+							
+								urx_fer_int
+								7
+								7
+							
+							
+								utx_fer_int
+								6
+								6
+							
+							
+								urx_pce_int
+								5
+								5
+							
+							
+								urx_rto_int
+								4
+								4
+							
+							
+								urx_fifo_int
+								3
+								3
+							
+							
+								utx_fifo_int
+								2
+								2
+							
+							
+								urx_end_int
+								1
+								1
+							
+							
+								utx_end_int
+								0
+								0
+							
+						
+					
+					
+						uart_int_mask
+						UART interrupt mask
+						0x24
+						
+							
+								cr_urx_lse_mask
+								8
+								8
+							
+							
+								cr_urx_fer_mask
+								7
+								7
+							
+							
+								cr_utx_fer_mask
+								6
+								6
+							
+							
+								cr_urx_pce_mask
+								5
+								5
+							
+							
+								cr_urx_rto_mask
+								4
+								4
+							
+							
+								cr_urx_fifo_mask
+								3
+								3
+							
+							
+								cr_utx_fifo_mask
+								2
+								2
+							
+							
+								cr_urx_end_mask
+								1
+								1
+							
+							
+								cr_utx_end_mask
+								0
+								0
+							
+						
+					
+					
+						uart_int_clear
+						UART interrupt clear
+						0x28
+						
+							
+								cr_urx_lse_clr
+								8
+								8
+							
+							
+								rsvd_7
+								7
+								7
+							
+							
+								rsvd_6
+								6
+								6
+							
+							
+								cr_urx_pce_clr
+								5
+								5
+							
+							
+								cr_urx_rto_clr
+								4
+								4
+							
+							
+								rsvd_3
+								3
+								3
+							
+							
+								rsvd_2
+								2
+								2
+							
+							
+								cr_urx_end_clr
+								1
+								1
+							
+							
+								cr_utx_end_clr
+								0
+								0
+							
+						
+					
+					
+						uart_int_en
+						UART interrupt enable
+						0x2C
+						
+							
+								cr_urx_lse_en
+								8
+								8
+							
+							
+								cr_urx_fer_en
+								7
+								7
+							
+							
+								cr_utx_fer_en
+								6
+								6
+							
+							
+								cr_urx_pce_en
+								5
+								5
+							
+							
+								cr_urx_rto_en
+								4
+								4
+							
+							
+								cr_urx_fifo_en
+								3
+								3
+							
+							
+								cr_utx_fifo_en
+								2
+								2
+							
+							
+								cr_urx_end_en
+								1
+								1
+							
+							
+								cr_utx_end_en
+								0
+								0
+							
+						
+					
+					
+						uart_status
+						uart_status.
+						0x30
+						
+							
+								sts_urx_bus_busy
+								1
+								1
+							
+							
+								sts_utx_bus_busy
+								0
+								0
+							
+						
+					
+					
+						sts_urx_abr_prd
+						sts_urx_abr_prd.
+						0x34
+						
+							
+								sts_urx_abr_prd_0x55
+								16
+								31
+							
+							
+								sts_urx_abr_prd_start
+								0
+								15
+							
+						
+					
+					
+						uart_fifo_config_0
+						uart_fifo_config_0.
+						0x80
+						
+							
+								rx_fifo_underflow
+								7
+								7
+							
+							
+								rx_fifo_overflow
+								6
+								6
+							
+							
+								tx_fifo_underflow
+								5
+								5
+							
+							
+								tx_fifo_overflow
+								4
+								4
+							
+							
+								rx_fifo_clr
+								3
+								3
+							
+							
+								tx_fifo_clr
+								2
+								2
+							
+							
+								uart_dma_rx_en
+								1
+								1
+							
+							
+								uart_dma_tx_en
+								0
+								0
+							
+						
+					
+					
+						uart_fifo_config_1
+						uart_fifo_config_1.
+						0x84
+						
+							
+								rx_fifo_th
+								24
+								30
+							
+							
+								tx_fifo_th
+								16
+								22
+							
+							
+								rx_fifo_cnt
+								8
+								15
+							
+							
+								tx_fifo_cnt
+								0
+								7
+							
+						
+					
+					
+						uart_fifo_wdata
+						uart_fifo_wdata.
+						0x88
+						
+							
+								uart_fifo_wdata
+								0
+								7
+							
+						
+					
+					
+						uart_fifo_rdata
+						uart_fifo_rdata.
+						0x8C
+						
+							
+								uart_fifo_rdata
+								0
+								7
+							
+						
+					
+				
+			
+			
+				spi
+				spi.
+				0x4000A200
+				spi
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						spi_config
+						spi_config.
+						0x0
+						
+							
+								cr_spi_deg_cnt
+								12
+								15
+							
+							
+								cr_spi_deg_en
+								11
+								11
+							
+							
+								cr_spi_m_cont_en
+								9
+								9
+							
+							
+								cr_spi_rxd_ignr_en
+								8
+								8
+							
+							
+								cr_spi_byte_inv
+								7
+								7
+							
+							
+								cr_spi_bit_inv
+								6
+								6
+							
+							
+								cr_spi_sclk_ph
+								5
+								5
+							
+							
+								cr_spi_sclk_pol
+								4
+								4
+							
+							
+								cr_spi_frame_size
+								2
+								3
+							
+							
+								cr_spi_s_en
+								1
+								1
+							
+							
+								cr_spi_m_en
+								0
+								0
+							
+						
+					
+					
+						spi_int_sts
+						spi_int_sts.
+						0x4
+						
+							
+								cr_spi_fer_en
+								29
+								29
+							
+							
+								cr_spi_txu_en
+								28
+								28
+							
+							
+								cr_spi_sto_en
+								27
+								27
+							
+							
+								cr_spi_rxf_en
+								26
+								26
+							
+							
+								cr_spi_txf_en
+								25
+								25
+							
+							
+								cr_spi_end_en
+								24
+								24
+							
+							
+								rsvd_21
+								21
+								21
+							
+							
+								cr_spi_txu_clr
+								20
+								20
+							
+							
+								cr_spi_sto_clr
+								19
+								19
+							
+							
+								rsvd_18
+								18
+								18
+							
+							
+								rsvd_17
+								17
+								17
+							
+							
+								cr_spi_end_clr
+								16
+								16
+							
+							
+								cr_spi_fer_mask
+								13
+								13
+							
+							
+								cr_spi_txu_mask
+								12
+								12
+							
+							
+								cr_spi_sto_mask
+								11
+								11
+							
+							
+								cr_spi_rxf_mask
+								10
+								10
+							
+							
+								cr_spi_txf_mask
+								9
+								9
+							
+							
+								cr_spi_end_mask
+								8
+								8
+							
+							
+								spi_fer_int
+								5
+								5
+							
+							
+								spi_txu_int
+								4
+								4
+							
+							
+								spi_sto_int
+								3
+								3
+							
+							
+								spi_rxf_int
+								2
+								2
+							
+							
+								spi_txf_int
+								1
+								1
+							
+							
+								spi_end_int
+								0
+								0
+							
+						
+					
+					
+						spi_bus_busy
+						spi_bus_busy.
+						0x8
+						
+							
+								sts_spi_bus_busy
+								0
+								0
+							
+						
+					
+					
+						spi_prd_0
+						spi_prd_0.
+						0x10
+						
+							
+								cr_spi_prd_d_ph_1
+								24
+								31
+							
+							
+								cr_spi_prd_d_ph_0
+								16
+								23
+							
+							
+								cr_spi_prd_p
+								8
+								15
+							
+							
+								cr_spi_prd_s
+								0
+								7
+							
+						
+					
+					
+						spi_prd_1
+						spi_prd_1.
+						0x14
+						
+							
+								cr_spi_prd_i
+								0
+								7
+							
+						
+					
+					
+						spi_rxd_ignr
+						spi_rxd_ignr.
+						0x18
+						
+							
+								cr_spi_rxd_ignr_s
+								16
+								20
+							
+							
+								cr_spi_rxd_ignr_p
+								0
+								4
+							
+						
+					
+					
+						spi_sto_value
+						spi_sto_value.
+						0x1C
+						
+							
+								cr_spi_sto_value
+								0
+								11
+							
+						
+					
+					
+						spi_fifo_config_0
+						spi_fifo_config_0.
+						0x80
+						
+							
+								rx_fifo_underflow
+								7
+								7
+							
+							
+								rx_fifo_overflow
+								6
+								6
+							
+							
+								tx_fifo_underflow
+								5
+								5
+							
+							
+								tx_fifo_overflow
+								4
+								4
+							
+							
+								rx_fifo_clr
+								3
+								3
+							
+							
+								tx_fifo_clr
+								2
+								2
+							
+							
+								spi_dma_rx_en
+								1
+								1
+							
+							
+								spi_dma_tx_en
+								0
+								0
+							
+						
+					
+					
+						spi_fifo_config_1
+						spi_fifo_config_1.
+						0x84
+						
+							
+								rx_fifo_th
+								24
+								25
+							
+							
+								tx_fifo_th
+								16
+								17
+							
+							
+								rx_fifo_cnt
+								8
+								10
+							
+							
+								tx_fifo_cnt
+								0
+								2
+							
+						
+					
+					
+						spi_fifo_wdata
+						spi_fifo_wdata.
+						0x88
+						
+							
+								spi_fifo_wdata
+								0
+								31
+							
+						
+					
+					
+						spi_fifo_rdata
+						spi_fifo_rdata.
+						0x8C
+						
+							
+								spi_fifo_rdata
+								0
+								31
+							
+						
+					
+				
+			
+			
+				i2c
+				i2c.
+				0x4000A300
+				i2c
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						i2c_config
+						i2c_config.
+						0x0
+						
+							
+								cr_i2c_deg_cnt
+								28
+								31
+							
+							
+								cr_i2c_pkt_len
+								16
+								23
+							
+							
+								cr_i2c_slv_addr
+								8
+								14
+							
+							
+								cr_i2c_sub_addr_bc
+								5
+								6
+							
+							
+								cr_i2c_sub_addr_en
+								4
+								4
+							
+							
+								cr_i2c_scl_sync_en
+								3
+								3
+							
+							
+								cr_i2c_deg_en
+								2
+								2
+							
+							
+								cr_i2c_pkt_dir
+								1
+								1
+							
+							
+								cr_i2c_m_en
+								0
+								0
+							
+						
+					
+					
+						i2c_int_sts
+						i2c_int_sts.
+						0x4
+						
+							
+								cr_i2c_fer_en
+								29
+								29
+							
+							
+								cr_i2c_arb_en
+								28
+								28
+							
+							
+								cr_i2c_nak_en
+								27
+								27
+							
+							
+								cr_i2c_rxf_en
+								26
+								26
+							
+							
+								cr_i2c_txf_en
+								25
+								25
+							
+							
+								cr_i2c_end_en
+								24
+								24
+							
+							
+								rsvd_21
+								21
+								21
+							
+							
+								cr_i2c_arb_clr
+								20
+								20
+							
+							
+								cr_i2c_nak_clr
+								19
+								19
+							
+							
+								rsvd_18
+								18
+								18
+							
+							
+								rsvd_17
+								17
+								17
+							
+							
+								cr_i2c_end_clr
+								16
+								16
+							
+							
+								cr_i2c_fer_mask
+								13
+								13
+							
+							
+								cr_i2c_arb_mask
+								12
+								12
+							
+							
+								cr_i2c_nak_mask
+								11
+								11
+							
+							
+								cr_i2c_rxf_mask
+								10
+								10
+							
+							
+								cr_i2c_txf_mask
+								9
+								9
+							
+							
+								cr_i2c_end_mask
+								8
+								8
+							
+							
+								i2c_fer_int
+								5
+								5
+							
+							
+								i2c_arb_int
+								4
+								4
+							
+							
+								i2c_nak_int
+								3
+								3
+							
+							
+								i2c_rxf_int
+								2
+								2
+							
+							
+								i2c_txf_int
+								1
+								1
+							
+							
+								i2c_end_int
+								0
+								0
+							
+						
+					
+					
+						i2c_sub_addr
+						i2c_sub_addr.
+						0x8
+						
+							
+								cr_i2c_sub_addr_b3
+								24
+								31
+							
+							
+								cr_i2c_sub_addr_b2
+								16
+								23
+							
+							
+								cr_i2c_sub_addr_b1
+								8
+								15
+							
+							
+								cr_i2c_sub_addr_b0
+								0
+								7
+							
+						
+					
+					
+						i2c_bus_busy
+						i2c_bus_busy.
+						0xC
+						
+							
+								cr_i2c_bus_busy_clr
+								1
+								1
+							
+							
+								sts_i2c_bus_busy
+								0
+								0
+							
+						
+					
+					
+						i2c_prd_start
+						i2c_prd_start.
+						0x10
+						
+							
+								cr_i2c_prd_s_ph_3
+								24
+								31
+							
+							
+								cr_i2c_prd_s_ph_2
+								16
+								23
+							
+							
+								cr_i2c_prd_s_ph_1
+								8
+								15
+							
+							
+								cr_i2c_prd_s_ph_0
+								0
+								7
+							
+						
+					
+					
+						i2c_prd_stop
+						i2c_prd_stop.
+						0x14
+						
+							
+								cr_i2c_prd_p_ph_3
+								24
+								31
+							
+							
+								cr_i2c_prd_p_ph_2
+								16
+								23
+							
+							
+								cr_i2c_prd_p_ph_1
+								8
+								15
+							
+							
+								cr_i2c_prd_p_ph_0
+								0
+								7
+							
+						
+					
+					
+						i2c_prd_data
+						i2c_prd_data.
+						0x18
+						
+							
+								cr_i2c_prd_d_ph_3
+								24
+								31
+							
+							
+								cr_i2c_prd_d_ph_2
+								16
+								23
+							
+							
+								cr_i2c_prd_d_ph_1
+								8
+								15
+							
+							
+								cr_i2c_prd_d_ph_0
+								0
+								7
+							
+						
+					
+					
+						i2c_fifo_config_0
+						i2c_fifo_config_0.
+						0x80
+						
+							
+								rx_fifo_underflow
+								7
+								7
+							
+							
+								rx_fifo_overflow
+								6
+								6
+							
+							
+								tx_fifo_underflow
+								5
+								5
+							
+							
+								tx_fifo_overflow
+								4
+								4
+							
+							
+								rx_fifo_clr
+								3
+								3
+							
+							
+								tx_fifo_clr
+								2
+								2
+							
+							
+								i2c_dma_rx_en
+								1
+								1
+							
+							
+								i2c_dma_tx_en
+								0
+								0
+							
+						
+					
+					
+						i2c_fifo_config_1
+						i2c_fifo_config_1.
+						0x84
+						
+							
+								rx_fifo_th
+								24
+								24
+							
+							
+								tx_fifo_th
+								16
+								16
+							
+							
+								rx_fifo_cnt
+								8
+								9
+							
+							
+								tx_fifo_cnt
+								0
+								1
+							
+						
+					
+					
+						i2c_fifo_wdata
+						i2c_fifo_wdata.
+						0x88
+						
+							
+								i2c_fifo_wdata
+								0
+								31
+							
+						
+					
+					
+						i2c_fifo_rdata
+						i2c_fifo_rdata.
+						0x8C
+						
+							
+								i2c_fifo_rdata
+								0
+								31
+							
+						
+					
+				
+			
+			
+				pwm
+				pwm.
+				0x4000A400
+				pwm
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						pwm_int_config
+						pwm_int_config.
+						0x0
+						
+							
+								pwm_int_clear
+								8
+								13
+							
+							
+								pwm_interrupt_sts
+								0
+								5
+							
+						
+					
+					
+						pwm0_clkdiv
+						pwm0_clkdiv.
+						0x20
+						
+							
+								pwm_clk_div
+								0
+								15
+							
+						
+					
+					
+						pwm0_thre1
+						pwm0_thre1.
+						0x24
+						
+							
+								pwm_thre1
+								0
+								15
+							
+						
+					
+					
+						pwm0_thre2
+						pwm0_thre2.
+						0x28
+						
+							
+								pwm_thre2
+								0
+								15
+							
+						
+					
+					
+						pwm0_period
+						pwm0_period.
+						0x2C
+						
+							
+								pwm_period
+								0
+								15
+							
+						
+					
+					
+						pwm0_config
+						pwm0_config.
+						0x30
+						
+							
+								pwm_sts_top
+								7
+								7
+							
+							
+								pwm_stop_en
+								6
+								6
+							
+							
+								pwm_sw_mode
+								5
+								5
+							
+							
+								pwm_sw_force_val
+								4
+								4
+							
+							
+								pwm_stop_mode
+								3
+								3
+							
+							
+								pwm_out_inv
+								2
+								2
+							
+							
+								reg_clk_sel
+								0
+								1
+							
+						
+					
+					
+						pwm0_interrupt
+						pwm0_interrupt.
+						0x34
+						
+							
+								pwm_int_enable
+								16
+								16
+							
+							
+								pwm_int_period_cnt
+								0
+								15
+							
+						
+					
+					
+						pwm1_clkdiv
+						pwm1_clkdiv.
+						0x40
+						
+							
+								pwm_clk_div
+								0
+								15
+							
+						
+					
+					
+						pwm1_thre1
+						pwm1_thre1.
+						0x44
+						
+							
+								pwm_thre1
+								0
+								15
+							
+						
+					
+					
+						pwm1_thre2
+						pwm1_thre2.
+						0x48
+						
+							
+								pwm_thre2
+								0
+								15
+							
+						
+					
+					
+						pwm1_period
+						pwm1_period.
+						0x4C
+						
+							
+								pwm_period
+								0
+								15
+							
+						
+					
+					
+						pwm1_config
+						pwm1_config.
+						0x50
+						
+							
+								pwm_sts_top
+								7
+								7
+							
+							
+								pwm_stop_en
+								6
+								6
+							
+							
+								pwm_sw_mode
+								5
+								5
+							
+							
+								pwm_sw_force_val
+								4
+								4
+							
+							
+								pwm_stop_mode
+								3
+								3
+							
+							
+								pwm_out_inv
+								2
+								2
+							
+							
+								reg_clk_sel
+								0
+								1
+							
+						
+					
+					
+						pwm1_interrupt
+						pwm1_interrupt.
+						0x54
+						
+							
+								pwm_int_enable
+								16
+								16
+							
+							
+								pwm_int_period_cnt
+								0
+								15
+							
+						
+					
+					
+						pwm2_clkdiv
+						pwm2_clkdiv.
+						0x60
+						
+							
+								pwm_clk_div
+								0
+								15
+							
+						
+					
+					
+						pwm2_thre1
+						pwm2_thre1.
+						0x64
+						
+							
+								pwm_thre1
+								0
+								15
+							
+						
+					
+					
+						pwm2_thre2
+						pwm2_thre2.
+						0x68
+						
+							
+								pwm_thre2
+								0
+								15
+							
+						
+					
+					
+						pwm2_period
+						pwm2_period.
+						0x6C
+						
+							
+								pwm_period
+								0
+								15
+							
+						
+					
+					
+						pwm2_config
+						pwm2_config.
+						0x70
+						
+							
+								pwm_sts_top
+								7
+								7
+							
+							
+								pwm_stop_en
+								6
+								6
+							
+							
+								pwm_sw_mode
+								5
+								5
+							
+							
+								pwm_sw_force_val
+								4
+								4
+							
+							
+								pwm_stop_mode
+								3
+								3
+							
+							
+								pwm_out_inv
+								2
+								2
+							
+							
+								reg_clk_sel
+								0
+								1
+							
+						
+					
+					
+						pwm2_interrupt
+						pwm2_interrupt.
+						0x74
+						
+							
+								pwm_int_enable
+								16
+								16
+							
+							
+								pwm_int_period_cnt
+								0
+								15
+							
+						
+					
+					
+						pwm3_clkdiv
+						pwm3_clkdiv.
+						0x80
+						
+							
+								pwm_clk_div
+								0
+								15
+							
+						
+					
+					
+						pwm3_thre1
+						pwm3_thre1.
+						0x84
+						
+							
+								pwm_thre1
+								0
+								15
+							
+						
+					
+					
+						pwm3_thre2
+						pwm3_thre2.
+						0x88
+						
+							
+								pwm_thre2
+								0
+								15
+							
+						
+					
+					
+						pwm3_period
+						pwm3_period.
+						0x8C
+						
+							
+								pwm_period
+								0
+								15
+							
+						
+					
+					
+						pwm3_config
+						pwm3_config.
+						0x90
+						
+							
+								pwm_sts_top
+								7
+								7
+							
+							
+								pwm_stop_en
+								6
+								6
+							
+							
+								pwm_sw_mode
+								5
+								5
+							
+							
+								pwm_sw_force_val
+								4
+								4
+							
+							
+								pwm_stop_mode
+								3
+								3
+							
+							
+								pwm_out_inv
+								2
+								2
+							
+							
+								reg_clk_sel
+								0
+								1
+							
+						
+					
+					
+						pwm3_interrupt
+						pwm3_interrupt.
+						0x94
+						
+							
+								pwm_int_enable
+								16
+								16
+							
+							
+								pwm_int_period_cnt
+								0
+								15
+							
+						
+					
+					
+						pwm4_clkdiv
+						pwm4_clkdiv.
+						0xA0
+						
+							
+								pwm_clk_div
+								0
+								15
+							
+						
+					
+					
+						pwm4_thre1
+						pwm4_thre1.
+						0xA4
+						
+							
+								pwm_thre1
+								0
+								15
+							
+						
+					
+					
+						pwm4_thre2
+						pwm4_thre2.
+						0xA8
+						
+							
+								pwm_thre2
+								0
+								15
+							
+						
+					
+					
+						pwm4_period
+						pwm4_period.
+						0xAC
+						
+							
+								pwm_period
+								0
+								15
+							
+						
+					
+					
+						pwm4_config
+						pwm4_config.
+						0xB0
+						
+							
+								pwm_sts_top
+								7
+								7
+							
+							
+								pwm_stop_en
+								6
+								6
+							
+							
+								pwm_sw_mode
+								5
+								5
+							
+							
+								pwm_sw_force_val
+								4
+								4
+							
+							
+								pwm_stop_mode
+								3
+								3
+							
+							
+								pwm_out_inv
+								2
+								2
+							
+							
+								reg_clk_sel
+								0
+								1
+							
+						
+					
+					
+						pwm4_interrupt
+						pwm4_interrupt.
+						0xB4
+						
+							
+								pwm_int_enable
+								16
+								16
+							
+							
+								pwm_int_period_cnt
+								0
+								15
+							
+						
+					
+				
+			
+			
+				timer
+				timer.
+				0x4000A500
+				timer
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						TCCR
+						TCCR.
+						0x0
+						
+							
+								cs_wdt
+								8
+								9
+							
+							
+								RESERVED_7
+								7
+								7
+							
+							
+								cs_2
+								5
+								6
+							
+							
+								RESERVED_4
+								4
+								4
+							
+							
+								cs_1
+								2
+								3
+							
+						
+					
+					
+						TMR2_0
+						TMR2_0.
+						0x10
+						
+							
+								tmr
+								0
+								31
+							
+						
+					
+					
+						TMR2_1
+						TMR2_1.
+						0x14
+						
+							
+								tmr
+								0
+								31
+							
+						
+					
+					
+						TMR2_2
+						TMR2_2.
+						0x18
+						
+							
+								tmr
+								0
+								31
+							
+						
+					
+					
+						TMR3_0
+						TMR3_0.
+						0x1C
+						
+							
+								tmr
+								0
+								31
+							
+						
+					
+					
+						TMR3_1
+						TMR3_1.
+						0x20
+						
+							
+								tmr
+								0
+								31
+							
+						
+					
+					
+						TMR3_2
+						TMR3_2.
+						0x24
+						
+							
+								tmr
+								0
+								31
+							
+						
+					
+					
+						TCR2
+						TCR2.
+						0x2C
+						
+							
+								tcr
+								0
+								31
+							
+						
+					
+					
+						TCR3
+						TCR3.
+						0x30
+						
+							
+								tcr
+								0
+								31
+							
+						
+					
+					
+						TMSR2
+						TMSR2.
+						0x38
+						
+							
+								tmsr_2
+								2
+								2
+							
+							
+								tmsr_1
+								1
+								1
+							
+							
+								tmsr_0
+								0
+								0
+							
+						
+					
+					
+						TMSR3
+						TMSR3.
+						0x3C
+						
+							
+								tmsr_2
+								2
+								2
+							
+							
+								tmsr_1
+								1
+								1
+							
+							
+								tmsr_0
+								0
+								0
+							
+						
+					
+					
+						TIER2
+						TIER2.
+						0x44
+						
+							
+								tier_2
+								2
+								2
+							
+							
+								tier_1
+								1
+								1
+							
+							
+								tier_0
+								0
+								0
+							
+						
+					
+					
+						TIER3
+						TIER3.
+						0x48
+						
+							
+								tier_2
+								2
+								2
+							
+							
+								tier_1
+								1
+								1
+							
+							
+								tier_0
+								0
+								0
+							
+						
+					
+					
+						TPLVR2
+						TPLVR2.
+						0x50
+						
+							
+								tplvr
+								0
+								31
+							
+						
+					
+					
+						TPLVR3
+						TPLVR3.
+						0x54
+						
+							
+								tplvr
+								0
+								31
+							
+						
+					
+					
+						TPLCR2
+						TPLCR2.
+						0x5C
+						
+							
+								tplcr
+								0
+								1
+							
+						
+					
+					
+						TPLCR3
+						TPLCR3.
+						0x60
+						
+							
+								tplcr
+								0
+								1
+							
+						
+					
+					
+						WMER
+						WMER.
+						0x64
+						
+							
+								wrie
+								1
+								1
+							
+							
+								we
+								0
+								0
+							
+						
+					
+					
+						WMR
+						WMR.
+						0x68
+						
+							
+								wmr
+								0
+								15
+							
+						
+					
+					
+						WVR
+						WVR.
+						0x6C
+						
+							
+								wvr
+								0
+								15
+							
+						
+					
+					
+						WSR
+						WSR.
+						0x70
+						
+							
+								wts
+								0
+								0
+							
+						
+					
+					
+						TICR2
+						TICR2.
+						0x78
+						
+							
+								tclr_2
+								2
+								2
+							
+							
+								tclr_1
+								1
+								1
+							
+							
+								tclr_0
+								0
+								0
+							
+						
+					
+					
+						TICR3
+						TICR3.
+						0x7C
+						
+							
+								tclr_2
+								2
+								2
+							
+							
+								tclr_1
+								1
+								1
+							
+							
+								tclr_0
+								0
+								0
+							
+						
+					
+					
+						WICR
+						WICR.
+						0x80
+						
+							
+								wiclr
+								0
+								0
+							
+						
+					
+					
+						TCER
+						TCER.
+						0x84
+						
+							
+								timer3_en
+								2
+								2
+							
+							
+								timer2_en
+								1
+								1
+							
+						
+					
+					
+						TCMR
+						TCMR.
+						0x88
+						
+							
+								timer3_mode
+								2
+								2
+							
+							
+								timer2_mode
+								1
+								1
+							
+						
+					
+					
+						TILR2
+						TILR2.
+						0x90
+						
+							
+								tilr_2
+								2
+								2
+							
+							
+								tilr_1
+								1
+								1
+							
+							
+								tilr_0
+								0
+								0
+							
+						
+					
+					
+						TILR3
+						TILR3.
+						0x94
+						
+							
+								tilr_2
+								2
+								2
+							
+							
+								tilr_1
+								1
+								1
+							
+							
+								tilr_0
+								0
+								0
+							
+						
+					
+					
+						WCR
+						WCR.
+						0x98
+						
+							
+								wcr
+								0
+								0
+							
+						
+					
+					
+						WFAR
+						WFAR.
+						0x9C
+						
+							
+								wfar
+								0
+								15
+							
+						
+					
+					
+						WSAR
+						WSAR.
+						0xA0
+						
+							
+								wsar
+								0
+								15
+							
+						
+					
+					
+						TCVWR2
+						TCVWR2.
+						0xA8
+						
+							
+								tcvwr
+								0
+								31
+							
+						
+					
+					
+						TCVWR3
+						TCVWR3.
+						0xAC
+						
+							
+								tcvwr
+								0
+								31
+							
+						
+					
+					
+						TCVSYN2
+						TCVSYN2.
+						0xB4
+						
+							
+								tcvsyn2
+								0
+								31
+							
+						
+					
+					
+						TCVSYN3
+						TCVSYN3.
+						0xB8
+						
+							
+								tcvsyn3
+								0
+								31
+							
+						
+					
+					
+						TCDR
+						TCDR.
+						0xBC
+						
+							
+								wcdr
+								24
+								31
+							
+							
+								tcdr3
+								16
+								23
+							
+							
+								tcdr2
+								8
+								15
+							
+						
+					
+				
+			
+			
+				ir
+				ir.
+				0x4000A600
+				ir
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						irtx_config
+						irtx_config.
+						0x0
+						
+							
+								cr_irtx_data_num
+								12
+								17
+							
+							
+								cr_irtx_tail_hl_inv
+								11
+								11
+							
+							
+								cr_irtx_tail_en
+								10
+								10
+							
+							
+								cr_irtx_head_hl_inv
+								9
+								9
+							
+							
+								cr_irtx_head_en
+								8
+								8
+							
+							
+								cr_irtx_logic1_hl_inv
+								6
+								6
+							
+							
+								cr_irtx_logic0_hl_inv
+								5
+								5
+							
+							
+								cr_irtx_data_en
+								4
+								4
+							
+							
+								cr_irtx_swm_en
+								3
+								3
+							
+							
+								cr_irtx_mod_en
+								2
+								2
+							
+							
+								cr_irtx_out_inv
+								1
+								1
+							
+							
+								cr_irtx_en
+								0
+								0
+							
+						
+					
+					
+						irtx_int_sts
+						irtx_int_sts.
+						0x4
+						
+							
+								cr_irtx_end_en
+								24
+								24
+							
+							
+								cr_irtx_end_clr
+								16
+								16
+							
+							
+								cr_irtx_end_mask
+								8
+								8
+							
+							
+								irtx_end_int
+								0
+								0
+							
+						
+					
+					
+						irtx_data_word0
+						irtx_data_word0.
+						0x8
+						
+							
+								cr_irtx_data_word0
+								0
+								31
+							
+						
+					
+					
+						irtx_data_word1
+						irtx_data_word1.
+						0xC
+						
+							
+								cr_irtx_data_word1
+								0
+								31
+							
+						
+					
+					
+						irtx_pulse_width
+						irtx_pulse_width.
+						0x10
+						
+							
+								cr_irtx_mod_ph1_w
+								24
+								31
+							
+							
+								cr_irtx_mod_ph0_w
+								16
+								23
+							
+							
+								cr_irtx_pw_unit
+								0
+								11
+							
+						
+					
+					
+						irtx_pw
+						irtx_pw.
+						0x14
+						
+							
+								cr_irtx_tail_ph1_w
+								28
+								31
+							
+							
+								cr_irtx_tail_ph0_w
+								24
+								27
+							
+							
+								cr_irtx_head_ph1_w
+								20
+								23
+							
+							
+								cr_irtx_head_ph0_w
+								16
+								19
+							
+							
+								cr_irtx_logic1_ph1_w
+								12
+								15
+							
+							
+								cr_irtx_logic1_ph0_w
+								8
+								11
+							
+							
+								cr_irtx_logic0_ph1_w
+								4
+								7
+							
+							
+								cr_irtx_logic0_ph0_w
+								0
+								3
+							
+						
+					
+					
+						irtx_swm_pw_0
+						irtx_swm_pw_0.
+						0x40
+						
+							
+								cr_irtx_swm_pw_0
+								0
+								31
+							
+						
+					
+					
+						irtx_swm_pw_1
+						irtx_swm_pw_1.
+						0x44
+						
+							
+								cr_irtx_swm_pw_1
+								0
+								31
+							
+						
+					
+					
+						irtx_swm_pw_2
+						irtx_swm_pw_2.
+						0x48
+						
+							
+								cr_irtx_swm_pw_2
+								0
+								31
+							
+						
+					
+					
+						irtx_swm_pw_3
+						irtx_swm_pw_3.
+						0x4C
+						
+							
+								cr_irtx_swm_pw_3
+								0
+								31
+							
+						
+					
+					
+						irtx_swm_pw_4
+						irtx_swm_pw_4.
+						0x50
+						
+							
+								cr_irtx_swm_pw_4
+								0
+								31
+							
+						
+					
+					
+						irtx_swm_pw_5
+						irtx_swm_pw_5.
+						0x54
+						
+							
+								cr_irtx_swm_pw_5
+								0
+								31
+							
+						
+					
+					
+						irtx_swm_pw_6
+						irtx_swm_pw_6.
+						0x58
+						
+							
+								cr_irtx_swm_pw_6
+								0
+								31
+							
+						
+					
+					
+						irtx_swm_pw_7
+						irtx_swm_pw_7.
+						0x5C
+						
+							
+								cr_irtx_swm_pw_7
+								0
+								31
+							
+						
+					
+					
+						irrx_config
+						irrx_config.
+						0x80
+						
+							
+								cr_irrx_deg_cnt
+								8
+								11
+							
+							
+								cr_irrx_deg_en
+								4
+								4
+							
+							
+								cr_irrx_mode
+								2
+								3
+							
+							
+								cr_irrx_in_inv
+								1
+								1
+							
+							
+								cr_irrx_en
+								0
+								0
+							
+						
+					
+					
+						irrx_int_sts
+						irrx_int_sts.
+						0x84
+						
+							
+								cr_irrx_end_en
+								24
+								24
+							
+							
+								cr_irrx_end_clr
+								16
+								16
+							
+							
+								cr_irrx_end_mask
+								8
+								8
+							
+							
+								irrx_end_int
+								0
+								0
+							
+						
+					
+					
+						irrx_pw_config
+						irrx_pw_config.
+						0x88
+						
+							
+								cr_irrx_end_th
+								16
+								31
+							
+							
+								cr_irrx_data_th
+								0
+								15
+							
+						
+					
+					
+						irrx_data_count
+						irrx_data_count.
+						0x90
+						
+							
+								sts_irrx_data_cnt
+								0
+								6
+							
+						
+					
+					
+						irrx_data_word0
+						irrx_data_word0.
+						0x94
+						
+							
+								sts_irrx_data_word0
+								0
+								31
+							
+						
+					
+					
+						irrx_data_word1
+						irrx_data_word1.
+						0x98
+						
+							
+								sts_irrx_data_word1
+								0
+								31
+							
+						
+					
+					
+						irrx_swm_fifo_config_0
+						irrx_swm_fifo_config_0.
+						0xC0
+						
+							
+								rx_fifo_cnt
+								4
+								10
+							
+							
+								rx_fifo_underflow
+								3
+								3
+							
+							
+								rx_fifo_overflow
+								2
+								2
+							
+							
+								rx_fifo_clr
+								0
+								0
+							
+						
+					
+					
+						irrx_swm_fifo_rdata
+						irrx_swm_fifo_rdata.
+						0xC4
+						
+							
+								rx_fifo_rdata
+								0
+								15
+							
+						
+					
+				
+			
+			
+				cks
+				cks.
+				0x4000A700
+				cks
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						cks_config
+						cks_config.
+						0x0
+						
+							
+								cr_cks_byte_swap
+								1
+								1
+							
+							
+								cr_cks_clr
+								0
+								0
+							
+						
+					
+					
+						data_in
+						data_in.
+						0x4
+						
+							
+								data_in
+								0
+								7
+							
+						
+					
+					
+						cks_out
+						cks_out.
+						0x8
+						
+							
+								cks_out
+								0
+								15
+							
+						
+					
+				
+			
+			
+				qdec
+				qdec.
+				0x4000A800
+				qdec
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						qdec_ctrl
+						qdec_ctrl.
+						0x0
+						
+							
+								input_swap
+								31
+								31
+							
+							
+								rpt_mode
+								30
+								30
+							
+							
+								spl_mode
+								29
+								29
+							
+							
+								led_period
+								20
+								28
+							
+							
+								rpt_period
+								12
+								19
+							
+							
+								spl_period
+								8
+								11
+							
+							
+								deg_cnt
+								4
+								7
+							
+							
+								deg_en
+								3
+								3
+							
+							
+								led_pol
+								2
+								2
+							
+							
+								led_en
+								1
+								1
+							
+							
+								qdec_en
+								0
+								0
+							
+						
+					
+					
+						qdec_value
+						qdec_value.
+						0x4
+						
+							
+								spl_val
+								28
+								29
+							
+							
+								acc2_val
+								16
+								19
+							
+							
+								acc1_val
+								0
+								10
+							
+						
+					
+					
+						qdec_int_en
+						qdec_int_en.
+						0x10
+						
+							
+								overflow_en
+								3
+								3
+							
+							
+								dbl_rdy_en
+								2
+								2
+							
+							
+								spl_rdy_en
+								1
+								1
+							
+							
+								rpt_rdy_en
+								0
+								0
+							
+						
+					
+					
+						qdec_int_sts
+						qdec_int_sts.
+						0x14
+						
+							
+								overflow_sts
+								3
+								3
+							
+							
+								dbl_rdy_sts
+								2
+								2
+							
+							
+								spl_rdy_sts
+								1
+								1
+							
+							
+								rpt_rdy_sts
+								0
+								0
+							
+						
+					
+					
+						qdec_int_clr
+						qdec_int_clr.
+						0x18
+						
+							
+								overflow_clr
+								3
+								3
+							
+							
+								dbl_rdy_clr
+								2
+								2
+							
+							
+								spl_rdy_clr
+								1
+								1
+							
+							
+								rpt_rdy_clr
+								0
+								0
+							
+						
+					
+				
+			
+			
+				kys
+				kys.
+				0x4000AB00
+				kys
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						ks_ctrl
+						ks_ctrl.
+						0x0
+						
+							
+								col_num
+								20
+								24
+							
+							
+								row_num
+								16
+								18
+							
+							
+								rc_ext
+								8
+								9
+							
+							
+								deg_cnt
+								4
+								7
+							
+							
+								deg_en
+								3
+								3
+							
+							
+								ghost_en
+								2
+								2
+							
+							
+								ks_en
+								0
+								0
+							
+						
+					
+					
+						ks_int_en
+						ks_int_en.
+						0x10
+						
+							
+								ks_int_en
+								0
+								0
+							
+						
+					
+					
+						ks_int_sts
+						ks_int_sts.
+						0x14
+						
+							
+								keycode_valid
+								0
+								3
+							
+						
+					
+					
+						keycode_clr
+						keycode_clr.
+						0x18
+						
+							
+								keycode_clr
+								0
+								3
+							
+						
+					
+					
+						keycode_value
+						keycode_value.
+						0x1C
+						
+							
+								keycode3
+								24
+								31
+							
+							
+								keycode2
+								16
+								23
+							
+							
+								keycode1
+								8
+								15
+							
+							
+								keycode0
+								0
+								7
+							
+						
+					
+				
+			
+			
+				i2s
+				i2s.
+				0x4000AA00
+				i2s
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						i2s_config
+						i2s_config.
+						0x0
+						
+							
+								cr_ofs_en
+								25
+								25
+							
+							
+								cr_ofs_cnt
+								20
+								24
+							
+							
+								cr_mono_rx_ch
+								19
+								19
+							
+							
+								cr_endian
+								18
+								18
+							
+							
+								cr_i2s_mode
+								16
+								17
+							
+							
+								cr_data_size
+								14
+								15
+							
+							
+								cr_frame_size
+								12
+								13
+							
+							
+								cr_fs_3ch_mode
+								8
+								8
+							
+							
+								cr_fs_4ch_mode
+								7
+								7
+							
+							
+								cr_fs_1t_mode
+								6
+								6
+							
+							
+								cr_mute_mode
+								5
+								5
+							
+							
+								cr_mono_mode
+								4
+								4
+							
+							
+								cr_i2s_rxd_en
+								3
+								3
+							
+							
+								cr_i2s_txd_en
+								2
+								2
+							
+							
+								cr_i2s_s_en
+								1
+								1
+							
+							
+								cr_i2s_m_en
+								0
+								0
+							
+						
+					
+					
+						i2s_int_sts
+						i2s_int_sts.
+						0x4
+						
+							
+								cr_i2s_fer_en
+								26
+								26
+							
+							
+								cr_i2s_rxf_en
+								25
+								25
+							
+							
+								cr_i2s_txf_en
+								24
+								24
+							
+							
+								cr_i2s_fer_mask
+								10
+								10
+							
+							
+								cr_i2s_rxf_mask
+								9
+								9
+							
+							
+								cr_i2s_txf_mask
+								8
+								8
+							
+							
+								i2s_fer_int
+								2
+								2
+							
+							
+								i2s_rxf_int
+								1
+								1
+							
+							
+								i2s_txf_int
+								0
+								0
+							
+						
+					
+					
+						i2s_bclk_config
+						i2s_bclk_config.
+						0x10
+						
+							
+								cr_bclk_div_h
+								16
+								27
+							
+							
+								cr_bclk_div_l
+								0
+								11
+							
+						
+					
+					
+						i2s_fifo_config_0
+						i2s_fifo_config_0.
+						0x80
+						
+							
+								cr_fifo_24b_lj
+								10
+								10
+							
+							
+								cr_fifo_lr_exchg
+								9
+								9
+							
+							
+								cr_fifo_lr_merge
+								8
+								8
+							
+							
+								rx_fifo_underflow
+								7
+								7
+							
+							
+								rx_fifo_overflow
+								6
+								6
+							
+							
+								tx_fifo_underflow
+								5
+								5
+							
+							
+								tx_fifo_overflow
+								4
+								4
+							
+							
+								rx_fifo_clr
+								3
+								3
+							
+							
+								tx_fifo_clr
+								2
+								2
+							
+							
+								i2s_dma_rx_en
+								1
+								1
+							
+							
+								i2s_dma_tx_en
+								0
+								0
+							
+						
+					
+					
+						i2s_fifo_config_1
+						i2s_fifo_config_1.
+						0x84
+						
+							
+								rx_fifo_th
+								24
+								27
+							
+							
+								tx_fifo_th
+								16
+								19
+							
+							
+								rx_fifo_cnt
+								8
+								12
+							
+							
+								tx_fifo_cnt
+								0
+								4
+							
+						
+					
+					
+						i2s_fifo_wdata
+						i2s_fifo_wdata.
+						0x88
+						
+							
+								i2s_fifo_wdata
+								0
+								31
+							
+						
+					
+					
+						i2s_fifo_rdata
+						i2s_fifo_rdata.
+						0x8C
+						
+							
+								i2s_fifo_rdata
+								0
+								31
+							
+						
+					
+					
+						i2s_io_config
+						i2s_io_config.
+						0xFC
+						
+							
+								cr_deg_en
+								7
+								7
+							
+							
+								cr_deg_cnt
+								4
+								6
+							
+							
+								cr_i2s_bclk_inv
+								3
+								3
+							
+							
+								cr_i2s_fs_inv
+								2
+								2
+							
+							
+								cr_i2s_rxd_inv
+								1
+								1
+							
+							
+								cr_i2s_txd_inv
+								0
+								0
+							
+						
+					
+				
+			
+			
+				cam
+				cam.
+				0x4000AD00
+				cam
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						dvp2axi_configue
+						dvp2axi_configue.
+						0x0
+						
+							
+								reg_dvp_wait_cycle
+								24
+								31
+							
+							
+								reg_dvp_pix_clk_cg
+								20
+								20
+							
+							
+								reg_interlv_mode
+								16
+								16
+							
+							
+								reg_subsample_even
+								15
+								15
+							
+							
+								reg_subsample_en
+								14
+								14
+							
+							
+								reg_drop_even
+								13
+								13
+							
+							
+								reg_drop_en
+								12
+								12
+							
+							
+								reg_hw_mode_fwrap
+								11
+								11
+							
+							
+								reg_dvp_mode
+								8
+								10
+							
+							
+								reg_hburst
+								4
+								5
+							
+							
+								reg_line_vld_pol
+								3
+								3
+							
+							
+								reg_fram_vld_pol
+								2
+								2
+							
+							
+								reg_sw_mode
+								1
+								1
+							
+							
+								reg_dvp_enable
+								0
+								0
+							
+						
+					
+					
+						dvp2ahb_addr_start_0
+						dvp2ahb_addr_start_0.
+						0x4
+						
+							
+								reg_addr_start_0
+								0
+								31
+							
+						
+					
+					
+						dvp2ahb_mem_bcnt_0
+						dvp2ahb_mem_bcnt_0.
+						0x8
+						
+							
+								reg_mem_burst_cnt_0
+								0
+								31
+							
+						
+					
+					
+						dvp2ahb_frame_bcnt_0
+						dvp2ahb_frame_bcnt_0.
+						0xC
+						
+							
+								reg_frame_burst_cnt_0
+								0
+								31
+							
+						
+					
+					
+						dvp2ahb_addr_start_1
+						dvp2ahb_addr_start_1.
+						0x10
+						
+							
+								reg_addr_start_1
+								0
+								31
+							
+						
+					
+					
+						dvp2ahb_mem_bcnt_1
+						dvp2ahb_mem_bcnt_1.
+						0x14
+						
+							
+								reg_mem_burst_cnt_1
+								0
+								31
+							
+						
+					
+					
+						dvp2ahb_frame_bcnt_1
+						dvp2ahb_frame_bcnt_1.
+						0x18
+						
+							
+								reg_frame_burst_cnt_1
+								0
+								31
+							
+						
+					
+					
+						dvp_status_and_error
+						dvp_status_and_error.
+						0x1C
+						
+							
+								st_bus_flsh
+								31
+								31
+							
+							
+								st_bus_wait
+								30
+								30
+							
+							
+								st_bus_func
+								29
+								29
+							
+							
+								st_bus_idle
+								28
+								28
+							
+							
+								frame_valid_cnt_1
+								24
+								27
+							
+							
+								frame_valid_cnt_0
+								20
+								23
+							
+							
+								st_dvp_idle
+								19
+								19
+							
+							
+								ahb_idle_1
+								17
+								17
+							
+							
+								ahb_idle_0
+								16
+								16
+							
+							
+								sts_vcnt_int
+								9
+								9
+							
+							
+								sts_hcnt_int
+								8
+								8
+							
+							
+								sts_fifo_int_1
+								7
+								7
+							
+							
+								sts_fifo_int_0
+								6
+								6
+							
+							
+								sts_frame_int_1
+								5
+								5
+							
+							
+								sts_frame_int_0
+								4
+								4
+							
+							
+								sts_mem_int_1
+								3
+								3
+							
+							
+								sts_mem_int_0
+								2
+								2
+							
+							
+								sts_normal_int_1
+								1
+								1
+							
+							
+								sts_normal_int_0
+								0
+								0
+							
+						
+					
+					
+						dvp_frame_fifo_pop
+						dvp_frame_fifo_pop.
+						0x20
+						
+							
+								reg_int_fifo_clr_1
+								19
+								19
+							
+							
+								reg_int_frame_clr_1
+								18
+								18
+							
+							
+								reg_int_mem_clr_1
+								17
+								17
+							
+							
+								reg_int_normal_clr_1
+								16
+								16
+							
+							
+								reg_int_vcnt_clr_0
+								9
+								9
+							
+							
+								reg_int_hcnt_clr_0
+								8
+								8
+							
+							
+								reg_int_fifo_clr_0
+								7
+								7
+							
+							
+								reg_int_frame_clr_0
+								6
+								6
+							
+							
+								reg_int_mem_clr_0
+								5
+								5
+							
+							
+								reg_int_normal_clr_0
+								4
+								4
+							
+							
+								rfifo_pop_1
+								1
+								1
+							
+							
+								rfifo_pop_0
+								0
+								0
+							
+						
+					
+					
+						snsr_control
+						snsr_control.
+						0x24
+						
+							
+								reg_cam_pwdn
+								1
+								1
+							
+							
+								reg_cam_rst
+								0
+								0
+							
+						
+					
+					
+						int_control
+						int_control.
+						0x28
+						
+							
+								reg_frame_cnt_trgr_int
+								28
+								31
+							
+							
+								reg_int_vcnt_en
+								6
+								6
+							
+							
+								reg_int_hcnt_en
+								5
+								5
+							
+							
+								reg_int_fifo_en
+								4
+								4
+							
+							
+								reg_int_frame_en
+								3
+								3
+							
+							
+								reg_int_mem_en
+								2
+								2
+							
+							
+								reg_int_normal_1_en
+								1
+								1
+							
+							
+								reg_int_normal_0_en
+								0
+								0
+							
+						
+					
+					
+						hsync_control
+						hsync_control.
+						0x30
+						
+							
+								reg_hsync_act_start
+								16
+								31
+							
+							
+								reg_hsync_act_end
+								0
+								15
+							
+						
+					
+					
+						vsync_control
+						vsync_control.
+						0x34
+						
+							
+								reg_vsync_act_start
+								16
+								31
+							
+							
+								reg_vsync_act_end
+								0
+								15
+							
+						
+					
+					
+						frame_size_control
+						frame_size_control.
+						0x38
+						
+							
+								reg_total_vcnt
+								16
+								31
+							
+							
+								reg_total_hcnt
+								0
+								15
+							
+						
+					
+					
+						frame_start_addr0_0
+						frame_start_addr0_0.
+						0x40
+						
+							
+								frame_start_addr_0_0
+								0
+								31
+							
+						
+					
+					
+						frame_byte_cnt0_0
+						frame_byte_cnt0_0.
+						0x44
+						
+							
+								frame_byte_cnt_0_0
+								0
+								31
+							
+						
+					
+					
+						frame_start_addr0_1
+						frame_start_addr0_1.
+						0x48
+						
+							
+								frame_start_addr_0_1
+								0
+								31
+							
+						
+					
+					
+						frame_byte_cnt0_1
+						frame_byte_cnt0_1.
+						0x4C
+						
+							
+								frame_byte_cnt_0_1
+								0
+								31
+							
+						
+					
+					
+						frame_start_addr0_2
+						frame_start_addr0_2.
+						0x50
+						
+							
+								frame_start_addr_0_2
+								0
+								31
+							
+						
+					
+					
+						frame_byte_cnt0_2
+						frame_byte_cnt0_2.
+						0x54
+						
+							
+								frame_byte_cnt_0_2
+								0
+								31
+							
+						
+					
+					
+						frame_start_addr0_3
+						frame_start_addr0_3.
+						0x58
+						
+							
+								frame_start_addr_0_3
+								0
+								31
+							
+						
+					
+					
+						frame_byte_cnt0_3
+						frame_byte_cnt0_3.
+						0x5C
+						
+							
+								frame_byte_cnt_0_3
+								0
+								31
+							
+						
+					
+					
+						frame_start_addr0_4
+						frame_start_addr0_4.
+						0x60
+						
+							
+								frame_start_addr_0_4
+								0
+								31
+							
+						
+					
+					
+						frame_byte_cnt0_4
+						frame_byte_cnt0_4.
+						0x64
+						
+							
+								frame_byte_cnt_0_4
+								0
+								31
+							
+						
+					
+					
+						frame_start_addr0_5
+						frame_start_addr0_5.
+						0x68
+						
+							
+								frame_start_addr_0_5
+								0
+								31
+							
+						
+					
+					
+						frame_byte_cnt0_5
+						frame_byte_cnt0_5.
+						0x6C
+						
+							
+								frame_byte_cnt_0_5
+								0
+								31
+							
+						
+					
+					
+						frame_start_addr0_6
+						frame_start_addr0_6.
+						0x70
+						
+							
+								frame_start_addr_0_6
+								0
+								31
+							
+						
+					
+					
+						frame_byte_cnt0_6
+						frame_byte_cnt0_6.
+						0x74
+						
+							
+								frame_byte_cnt_0_6
+								0
+								31
+							
+						
+					
+					
+						frame_start_addr0_7
+						frame_start_addr0_7.
+						0x78
+						
+							
+								frame_start_addr_0_7
+								0
+								31
+							
+						
+					
+					
+						frame_byte_cnt0_7
+						frame_byte_cnt0_7.
+						0x7C
+						
+							
+								frame_byte_cnt_0_7
+								0
+								31
+							
+						
+					
+					
+						frame_start_addr1_0
+						frame_start_addr1_0.
+						0x80
+						
+							
+								frame_start_addr_1_0
+								0
+								31
+							
+						
+					
+					
+						frame_byte_cnt1_0
+						frame_byte_cnt1_0.
+						0x84
+						
+							
+								frame_byte_cnt_1_0
+								0
+								31
+							
+						
+					
+					
+						frame_start_addr1_1
+						frame_start_addr1_1.
+						0x88
+						
+							
+								frame_start_addr_1_1
+								0
+								31
+							
+						
+					
+					
+						frame_byte_cnt1_1
+						frame_byte_cnt1_1.
+						0x8C
+						
+							
+								frame_byte_cnt_1_1
+								0
+								31
+							
+						
+					
+					
+						frame_start_addr1_2
+						frame_start_addr1_2.
+						0x90
+						
+							
+								frame_start_addr_1_2
+								0
+								31
+							
+						
+					
+					
+						frame_byte_cnt1_2
+						frame_byte_cnt1_2.
+						0x94
+						
+							
+								frame_byte_cnt_1_2
+								0
+								31
+							
+						
+					
+					
+						frame_start_addr1_3
+						frame_start_addr1_3.
+						0x98
+						
+							
+								frame_start_addr_1_3
+								0
+								31
+							
+						
+					
+					
+						frame_byte_cnt1_3
+						frame_byte_cnt1_3.
+						0x9C
+						
+							
+								frame_byte_cnt_1_3
+								0
+								31
+							
+						
+					
+					
+						frame_start_addr1_4
+						frame_start_addr1_4.
+						0xA0
+						
+							
+								frame_start_addr_1_4
+								0
+								31
+							
+						
+					
+					
+						frame_byte_cnt1_4
+						frame_byte_cnt1_4.
+						0xA4
+						
+							
+								frame_byte_cnt_1_4
+								0
+								31
+							
+						
+					
+					
+						frame_start_addr1_5
+						frame_start_addr1_5.
+						0xA8
+						
+							
+								frame_start_addr_1_5
+								0
+								31
+							
+						
+					
+					
+						frame_byte_cnt1_5
+						frame_byte_cnt1_5.
+						0xAC
+						
+							
+								frame_byte_cnt_1_5
+								0
+								31
+							
+						
+					
+					
+						frame_start_addr1_6
+						frame_start_addr1_6.
+						0xB0
+						
+							
+								frame_start_addr_1_6
+								0
+								31
+							
+						
+					
+					
+						frame_byte_cnt1_6
+						frame_byte_cnt1_6.
+						0xB4
+						
+							
+								frame_byte_cnt_1_6
+								0
+								31
+							
+						
+					
+					
+						frame_start_addr1_7
+						frame_start_addr1_7.
+						0xB8
+						
+							
+								frame_start_addr_1_7
+								0
+								31
+							
+						
+					
+					
+						frame_byte_cnt1_7
+						frame_byte_cnt1_7.
+						0xBC
+						
+							
+								frame_byte_cnt_1_7
+								0
+								31
+							
+						
+					
+					
+						dvp_debug
+						dvp_debug.
+						0xFF0
+						
+							
+								reg_dvp_dbg_sel
+								1
+								3
+							
+							
+								reg_dvp_dbg_en
+								0
+								0
+							
+						
+					
+					
+						dvp_dummy_reg
+						dvp_dummy_reg.
+						0xFFC
+						
+							
+								RESERVED_31_0
+								0
+								31
+							
+						
+					
+				
+			
+			
+				mjpeg
+				mjpeg.
+				0x4000AE00
+				mjpeg
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						mjpeg_control_1
+						mjpeg_control_1.
+						0x0
+						
+							
+								reg_v0_order
+								30
+								31
+							
+							
+								reg_y1_order
+								28
+								29
+							
+							
+								reg_u0_order
+								26
+								27
+							
+							
+								reg_y0_order
+								24
+								25
+							
+							
+								reg_q_mode
+								16
+								22
+							
+							
+								reg_yuv_mode
+								12
+								13
+							
+							
+								reg_h_bust
+								8
+								9
+							
+							
+								reg_reflect_dmy
+								6
+								6
+							
+							
+								reg_last_hf_hblk_dmy
+								5
+								5
+							
+							
+								reg_last_hf_wblk_dmy
+								4
+								4
+							
+							
+								reg_wr_over_stop
+								3
+								3
+							
+							
+								reg_order_u_even
+								2
+								2
+							
+							
+								reg_mjpeg_bit_order
+								1
+								1
+							
+							
+								reg_mjpeg_enable
+								0
+								0
+							
+						
+					
+					
+						mjpeg_control_2
+						mjpeg_control_2.
+						0x4
+						
+							
+								reg_mjpeg_wait_cycle
+								16
+								31
+							
+							
+								reg_uv_dvp2ahb_fsel
+								15
+								15
+							
+							
+								reg_uv_dvp2ahb_lsel
+								14
+								14
+							
+							
+								reg_yy_dvp2ahb_fsel
+								13
+								13
+							
+							
+								reg_yy_dvp2ahb_lsel
+								12
+								12
+							
+							
+								reg_mjpeg_sw_run
+								9
+								9
+							
+							
+								reg_mjpeg_sw_mode
+								8
+								8
+							
+							
+								reg_sw_frame
+								0
+								4
+							
+						
+					
+					
+						mjpeg_yy_frame_addr
+						mjpeg_yy_frame_addr.
+						0x08
+						
+							
+								reg_yy_addr_start
+								0
+								31
+							
+						
+					
+					
+						mjpeg_uv_frame_addr
+						mjpeg_uv_frame_addr.
+						0x0C
+						
+							
+								reg_uv_addr_start
+								0
+								31
+							
+						
+					
+					
+						mjpeg_yuv_mem
+						mjpeg_yuv_mem.
+						0x10
+						
+							
+								reg_uv_mem_hblk
+								16
+								28
+							
+							
+								reg_yy_mem_hblk
+								0
+								12
+							
+						
+					
+					
+						jpeg_frame_addr
+						jpeg_frame_addr.
+						0x14
+						
+							
+								reg_w_addr_start
+								0
+								31
+							
+						
+					
+					
+						jpeg_store_memory
+						jpeg_store_memory.
+						0x18
+						
+							
+								reg_w_burst_cnt
+								0
+								31
+							
+						
+					
+					
+						mjpeg_control_3
+						mjpeg_control_3.
+						0x1C
+						
+							
+								sts_swap_int
+								30
+								30
+							
+							
+								reg_int_swap_en
+								29
+								29
+							
+							
+								frame_valid_cnt
+								24
+								28
+							
+							
+								sts_idle_int
+								22
+								22
+							
+							
+								reg_int_idle_en
+								21
+								21
+							
+							
+								reg_frame_cnt_trgr_int
+								16
+								20
+							
+							
+								ahb_idle
+								14
+								14
+							
+							
+								mjpeg_manf
+								13
+								13
+							
+							
+								mjpeg_mans
+								12
+								12
+							
+							
+								mjpeg_flsh
+								11
+								11
+							
+							
+								mjpeg_wait
+								10
+								10
+							
+							
+								mjpeg_func
+								9
+								9
+							
+							
+								mjpeg_idle
+								8
+								8
+							
+							
+								sts_frame_int
+								7
+								7
+							
+							
+								sts_mem_int
+								6
+								6
+							
+							
+								sts_cam_int
+								5
+								5
+							
+							
+								sts_normal_int
+								4
+								4
+							
+							
+								reg_int_frame_en
+								3
+								3
+							
+							
+								reg_int_mem_en
+								2
+								2
+							
+							
+								reg_int_cam_en
+								1
+								1
+							
+							
+								reg_int_normal_en
+								0
+								0
+							
+						
+					
+					
+						mjpeg_frame_fifo_pop
+						mjpeg_frame_fifo_pop.
+						0x20
+						
+							
+								reg_int_swap_clr
+								13
+								13
+							
+							
+								reg_int_idle_clr
+								12
+								12
+							
+							
+								reg_int_frame_clr
+								11
+								11
+							
+							
+								reg_int_mem_clr
+								10
+								10
+							
+							
+								reg_int_cam_clr
+								9
+								9
+							
+							
+								reg_int_normal_clr
+								8
+								8
+							
+							
+								reg_w_swap_clr
+								1
+								1
+							
+							
+								rfifo_pop
+								0
+								0
+							
+						
+					
+					
+						mjpeg_frame_size
+						mjpeg_frame_size.
+						0x24
+						
+							
+								reg_frame_hblk
+								16
+								27
+							
+							
+								reg_frame_wblk
+								0
+								11
+							
+						
+					
+					
+						mjpeg_header_byte
+						mjpeg_header_byte.
+						0x28
+						
+							
+								reg_tail_exp
+								16
+								16
+							
+							
+								reg_head_byte
+								0
+								11
+							
+						
+					
+					
+						mjpeg_swap_mode
+						mjpeg_swap_mode.
+						0x30
+						
+							
+								sts_swap_fend
+								12
+								12
+							
+							
+								sts_swap_fstart
+								11
+								11
+							
+							
+								sts_read_swap_idx
+								10
+								10
+							
+							
+								sts_swap1_full
+								9
+								9
+							
+							
+								sts_swap0_full
+								8
+								8
+							
+							
+								reg_w_swap_mode
+								0
+								0
+							
+						
+					
+					
+						mjpeg_swap_bit_cnt
+						mjpeg_swap_bit_cnt.
+						0x34
+						
+							
+								frame_swap_end_bit_cnt
+								0
+								31
+							
+						
+					
+					
+						mjpeg_paket_ctrl
+						mjpeg_paket_ctrl.
+						0x38
+						
+							
+								reg_pket_body_byte
+								16
+								31
+							
+							
+								reg_jend_to_pend
+								1
+								1
+							
+							
+								reg_pket_en
+								0
+								0
+							
+						
+					
+					
+						mjpeg_paket_head_tail
+						mjpeg_paket_head_tail.
+						0x3C
+						
+							
+								reg_pket_tail_byte
+								16
+								27
+							
+							
+								reg_pket_head_byte
+								0
+								11
+							
+						
+					
+					
+						mjpeg_Y_frame_read_status_1
+						mjpeg_Y_frame_read_status_1.
+						0x40
+						
+							
+								yy_frm_hblk_r
+								16
+								28
+							
+							
+								yy_mem_hblk_r
+								0
+								12
+							
+						
+					
+					
+						mjpeg_Y_frame_read_status_2
+						mjpeg_Y_frame_read_status_2.
+						0x44
+						
+							
+								yy_frm_cnt_r
+								24
+								31
+							
+							
+								yy_mem_rnd_r
+								16
+								23
+							
+							
+								yy_wblk_r
+								0
+								12
+							
+						
+					
+					
+						mjpeg_Y_frame_write_status
+						mjpeg_Y_frame_write_status.
+						0x48
+						
+							
+								yy_frm_cnt_w
+								24
+								31
+							
+							
+								yy_mem_rnd_w
+								16
+								23
+							
+							
+								yy_mem_hblk_w
+								0
+								12
+							
+						
+					
+					
+						mjpeg_UV_frame_read_status_1
+						mjpeg_UV_frame_read_status_1.
+						0x4C
+						
+							
+								uv_frm_hblk_r
+								16
+								28
+							
+							
+								uv_mem_hblk_r
+								0
+								12
+							
+						
+					
+					
+						mjpeg_UV_frame_read_status_2
+						mjpeg_UV_frame_read_status_2.
+						0x50
+						
+							
+								uv_frm_cnt_r
+								24
+								31
+							
+							
+								uv_mem_rnd_r
+								16
+								23
+							
+							
+								uv_wblk_r
+								0
+								12
+							
+						
+					
+					
+						mjpeg_UV_frame_write_status
+						mjpeg_UV_frame_write_status.
+						0x54
+						
+							
+								uv_frm_cnt_w
+								24
+								31
+							
+							
+								uv_mem_rnd_w
+								16
+								23
+							
+							
+								uv_mem_hblk_w
+								0
+								12
+							
+						
+					
+					
+						mjpeg_start_addr0
+						mjpeg_start_addr0.
+						0x80
+						
+							
+								frame_start_addr_0
+								0
+								31
+							
+						
+					
+					
+						mjpeg_bit_cnt0
+						mjpeg_bit_cnt0.
+						0x84
+						
+							
+								frame_bit_cnt_0
+								0
+								31
+							
+						
+					
+					
+						mjpeg_start_addr1
+						mjpeg_start_addr1.
+						0x88
+						
+							
+								frame_start_addr_1
+								0
+								31
+							
+						
+					
+					
+						mjpeg_bit_cnt1
+						mjpeg_bit_cnt1.
+						0x8C
+						
+							
+								frame_bit_cnt_1
+								0
+								31
+							
+						
+					
+					
+						mjpeg_start_addr2
+						mjpeg_start_addr2.
+						0x90
+						
+							
+								frame_start_addr_2
+								0
+								31
+							
+						
+					
+					
+						mjpeg_bit_cnt2
+						mjpeg_bit_cnt2.
+						0x94
+						
+							
+								frame_bit_cnt_2
+								0
+								31
+							
+						
+					
+					
+						mjpeg_start_addr3
+						mjpeg_start_addr3.
+						0x98
+						
+							
+								frame_start_addr_3
+								0
+								31
+							
+						
+					
+					
+						mjpeg_bit_cnt3
+						mjpeg_bit_cnt3.
+						0x9C
+						
+							
+								frame_bit_cnt_3
+								0
+								31
+							
+						
+					
+					
+						mjpeg_start_addr4
+						mjpeg_start_addr4.
+						0xA0
+						
+							
+								frame_start_addr_4
+								0
+								31
+							
+						
+					
+					
+						mjpeg_bit_cnt4
+						mjpeg_bit_cnt4.
+						0xA4
+						
+							
+								frame_bit_cnt_4
+								0
+								31
+							
+						
+					
+					
+						mjpeg_start_addr5
+						mjpeg_start_addr5.
+						0xA8
+						
+							
+								frame_start_addr_5
+								0
+								31
+							
+						
+					
+					
+						mjpeg_bit_cnt5
+						mjpeg_bit_cnt5.
+						0xAC
+						
+							
+								frame_bit_cnt_5
+								0
+								31
+							
+						
+					
+					
+						mjpeg_start_addr6
+						mjpeg_start_addr6.
+						0xB0
+						
+							
+								frame_start_addr_6
+								0
+								31
+							
+						
+					
+					
+						mjpeg_bit_cnt6
+						mjpeg_bit_cnt6.
+						0xB4
+						
+							
+								frame_bit_cnt_6
+								0
+								31
+							
+						
+					
+					
+						mjpeg_start_addr7
+						mjpeg_start_addr7.
+						0xB8
+						
+							
+								frame_start_addr_7
+								0
+								31
+							
+						
+					
+					
+						mjpeg_bit_cnt7
+						mjpeg_bit_cnt7.
+						0xBC
+						
+							
+								frame_bit_cnt_7
+								0
+								31
+							
+						
+					
+					
+						mjpeg_start_addr_8
+						mjpeg_start_addr_8.
+						0xC0
+						
+							
+								frame_start_addr_8
+								0
+								31
+							
+						
+					
+					
+						mjpeg_bit_cnt_8
+						mjpeg_bit_cnt_8.
+						0xC4
+						
+							
+								frame_bit_cnt_8
+								0
+								31
+							
+						
+					
+					
+						mjpeg_start_addr_9
+						mjpeg_start_addr_9.
+						0xC8
+						
+							
+								frame_start_addr_9
+								0
+								31
+							
+						
+					
+					
+						mjpeg_bit_cnt_9
+						mjpeg_bit_cnt_9.
+						0xCC
+						
+							
+								frame_bit_cnt_9
+								0
+								31
+							
+						
+					
+					
+						mjpeg_start_addr_a
+						mjpeg_start_addr_a.
+						0xD0
+						
+							
+								frame_start_addr_a
+								0
+								31
+							
+						
+					
+					
+						mjpeg_bit_cnt_a
+						mjpeg_bit_cnt_a.
+						0xD4
+						
+							
+								frame_bit_cnt_a
+								0
+								31
+							
+						
+					
+					
+						mjpeg_start_addr_b
+						mjpeg_start_addr_b.
+						0xD8
+						
+							
+								frame_start_addr_b
+								0
+								31
+							
+						
+					
+					
+						mjpeg_bit_cnt_b
+						mjpeg_bit_cnt_b.
+						0xDC
+						
+							
+								frame_bit_cnt_b
+								0
+								31
+							
+						
+					
+					
+						mjpeg_start_addr_c
+						mjpeg_start_addr_c.
+						0xE0
+						
+							
+								frame_start_addr_c
+								0
+								31
+							
+						
+					
+					
+						mjpeg_bit_cnt_c
+						mjpeg_bit_cnt_c.
+						0xE4
+						
+							
+								frame_bit_cnt_c
+								0
+								31
+							
+						
+					
+					
+						mjpeg_start_addr_d
+						mjpeg_start_addr_d.
+						0xE8
+						
+							
+								frame_start_addr_d
+								0
+								31
+							
+						
+					
+					
+						mjpeg_bit_cnt_d
+						mjpeg_bit_cnt_d.
+						0xEC
+						
+							
+								frame_bit_cnt_d
+								0
+								31
+							
+						
+					
+					
+						mjpeg_start_addr_e
+						mjpeg_start_addr_e.
+						0xF0
+						
+							
+								frame_start_addr_e
+								0
+								31
+							
+						
+					
+					
+						mjpeg_bit_cnt_e
+						mjpeg_bit_cnt_e.
+						0xF4
+						
+							
+								frame_bit_cnt_e
+								0
+								31
+							
+						
+					
+					
+						mjpeg_start_addr_f
+						mjpeg_start_addr_f.
+						0xF8
+						
+							
+								frame_start_addr_f
+								0
+								31
+							
+						
+					
+					
+						mjpeg_bit_cnt_f
+						mjpeg_bit_cnt_f.
+						0xFC
+						
+							
+								frame_bit_cnt_f
+								0
+								31
+							
+						
+					
+					
+						mjpeg_q_mode0
+						mjpeg_q_mode0.
+						0x100
+						
+							
+								frame_q_mode_0
+								0
+								6
+							
+						
+					
+					
+						mjpeg_q_mode1
+						mjpeg_q_mode1.
+						0x104
+						
+							
+								frame_q_mode_1
+								0
+								6
+							
+						
+					
+					
+						mjpeg_q_mode2
+						mjpeg_q_mode2.
+						0x108
+						
+							
+								frame_q_mode_2
+								0
+								6
+							
+						
+					
+					
+						mjpeg_q_mode3
+						mjpeg_q_mode3.
+						0x10C
+						
+							
+								frame_q_mode_3
+								0
+								6
+							
+						
+					
+					
+						mjpeg_q_mode4
+						mjpeg_q_mode4.
+						0x110
+						
+							
+								frame_q_mode_4
+								0
+								6
+							
+						
+					
+					
+						mjpeg_q_mode5
+						mjpeg_q_mode5.
+						0x114
+						
+							
+								frame_q_mode_5
+								0
+								6
+							
+						
+					
+					
+						mjpeg_q_mode6
+						mjpeg_q_mode6.
+						0x118
+						
+							
+								frame_q_mode_6
+								0
+								6
+							
+						
+					
+					
+						mjpeg_q_mode7
+						mjpeg_q_mode7.
+						0x11C
+						
+							
+								frame_q_mode_7
+								0
+								6
+							
+						
+					
+					
+						mjpeg_q_mode_8
+						mjpeg_q_mode_8.
+						0x120
+						
+							
+								frame_q_mode_8
+								0
+								6
+							
+						
+					
+					
+						mjpeg_q_mode_9
+						mjpeg_q_mode_9.
+						0x124
+						
+							
+								frame_q_mode_9
+								0
+								6
+							
+						
+					
+					
+						mjpeg_q_mode_a
+						mjpeg_q_mode_a.
+						0x128
+						
+							
+								frame_q_mode_a
+								0
+								6
+							
+						
+					
+					
+						mjpeg_q_mode_b
+						mjpeg_q_mode_b.
+						0x12C
+						
+							
+								frame_q_mode_b
+								0
+								6
+							
+						
+					
+					
+						mjpeg_q_mode_c
+						mjpeg_q_mode_c.
+						0x130
+						
+							
+								frame_q_mode_c
+								0
+								6
+							
+						
+					
+					
+						mjpeg_q_mode_d
+						mjpeg_q_mode_d.
+						0x134
+						
+							
+								frame_q_mode_d
+								0
+								6
+							
+						
+					
+					
+						mjpeg_q_mode_e
+						mjpeg_q_mode_e.
+						0x138
+						
+							
+								frame_q_mode_e
+								0
+								6
+							
+						
+					
+					
+						mjpeg_q_mode_f
+						mjpeg_q_mode_f.
+						0x13C
+						
+							
+								frame_q_mode_f
+								0
+								6
+							
+						
+					
+					
+						mjpeg_debug
+						mjpeg_debug.
+						0x1F0
+						
+							
+								reg_mjpeg_dbg_sel
+								4
+								7
+							
+							
+								reg_mjpeg_dbg_en
+								0
+								0
+							
+						
+					
+					
+						mjpeg_dummy_reg
+						mjpeg_dummy_reg.
+						0x1FC
+						
+							
+								mjpeg_dummy_reg
+								0
+								31
+							
+						
+					
+				
+			
+			
+				sf_ctrl
+				sf_ctrl.
+				0x4000B000
+				sf_ctrl
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						sf_ctrl_0
+						sf_ctrl_0.
+						0x0
+						
+							
+								sf_id
+								24
+								31
+							
+							
+								sf_aes_iv_endian
+								23
+								23
+							
+							
+								sf_aes_key_endian
+								22
+								22
+							
+							
+								sf_aes_ctr_plus_en
+								21
+								21
+							
+							
+								sf_aes_dout_endian
+								20
+								20
+							
+							
+								sf_aes_dly_mode
+								19
+								19
+							
+							
+								sf_if_int_set
+								18
+								18
+							
+							
+								sf_if_int_clr
+								17
+								17
+							
+							
+								sf_if_int
+								16
+								16
+							
+							
+								sf_if_read_dly_en
+								11
+								11
+							
+							
+								sf_if_read_dly_n
+								8
+								10
+							
+							
+								sf_clk_sahb_sram_sel
+								5
+								5
+							
+							
+								sf_clk_out_inv_sel
+								4
+								4
+							
+							
+								sf_clk_out_gate_en
+								3
+								3
+							
+							
+								sf_clk_sf_rx_inv_sel
+								2
+								2
+							
+						
+					
+					
+						sf_ctrl_1
+						sf_ctrl_1.
+						0x4
+						
+							
+								sf_ahb2sram_en
+								31
+								31
+							
+							
+								sf_ahb2sif_en
+								30
+								30
+							
+							
+								sf_if_en
+								29
+								29
+							
+							
+								sf_if_fn_sel
+								28
+								28
+							
+							
+								sf_ahb2sif_stop
+								27
+								27
+							
+							
+								sf_ahb2sif_stopped
+								26
+								26
+							
+							
+								sf_if_reg_wp
+								25
+								25
+							
+							
+								sf_if_reg_hold
+								24
+								24
+							
+							
+								sf_if_0_ack_lat
+								20
+								22
+							
+							
+								sf_if_sr_int_set
+								18
+								18
+							
+							
+								sf_if_sr_int_en
+								17
+								17
+							
+							
+								sf_if_sr_int
+								16
+								16
+							
+							
+								sf_if_sr_pat
+								8
+								15
+							
+							
+								sf_if_sr_pat_mask
+								0
+								7
+							
+						
+					
+					
+						sf_if_sahb_0
+						sf_if_sahb_0.
+						0x8
+						
+							
+								sf_if_0_qpi_mode_en
+								31
+								31
+							
+							
+								sf_if_0_spi_mode
+								28
+								30
+							
+							
+								sf_if_0_cmd_en
+								27
+								27
+							
+							
+								sf_if_0_adr_en
+								26
+								26
+							
+							
+								sf_if_0_dmy_en
+								25
+								25
+							
+							
+								sf_if_0_dat_en
+								24
+								24
+							
+							
+								sf_if_0_dat_rw  
+								23
+								23
+							
+							
+								sf_if_0_cmd_byte
+								20
+								22
+							
+							
+								sf_if_0_adr_byte
+								17
+								19
+							
+							
+								sf_if_0_dmy_byte
+								12
+								16
+							
+							
+								sf_if_0_dat_byte
+								2
+								11
+							
+							
+								sf_if_0_trig
+								1
+								1
+							
+							
+								sf_if_busy
+								0
+								0
+							
+						
+					
+					
+						sf_if_sahb_1
+						sf_if_sahb_1.
+						0xC
+						
+							
+								sf_if_0_cmd_buf_0
+								0
+								31
+							
+						
+					
+					
+						sf_if_sahb_2
+						sf_if_sahb_2.
+						0x10
+						
+							
+								sf_if_0_cmd_buf_1
+								0
+								31
+							
+						
+					
+					
+						sf_if_iahb_0
+						sf_if_iahb_0.
+						0x14
+						
+							
+								sf_if_1_qpi_mode_en
+								31
+								31
+							
+							
+								sf_if_1_spi_mode
+								28
+								30
+							
+							
+								sf_if_1_cmd_en
+								27
+								27
+							
+							
+								sf_if_1_adr_en
+								26
+								26
+							
+							
+								sf_if_1_dmy_en
+								25
+								25
+							
+							
+								sf_if_1_dat_en
+								24
+								24
+							
+							
+								sf_if_1_dat_rw  
+								23
+								23
+							
+							
+								sf_if_1_cmd_byte
+								20
+								22
+							
+							
+								sf_if_1_adr_byte
+								17
+								19
+							
+							
+								sf_if_1_dmy_byte
+								12
+								16
+							
+						
+					
+					
+						sf_if_iahb_1
+						sf_if_iahb_1.
+						0x18
+						
+							
+								sf_if_1_cmd_buf_0
+								0
+								31
+							
+						
+					
+					
+						sf_if_iahb_2
+						sf_if_iahb_2.
+						0x1C
+						
+							
+								sf_if_1_cmd_buf_1
+								0
+								31
+							
+						
+					
+					
+						sf_if_status_0
+						sf_if_status_0.
+						0x20
+						
+							
+								sf_if_status_0
+								0
+								31
+							
+						
+					
+					
+						sf_if_status_1
+						sf_if_status_1.
+						0x24
+						
+							
+								sf_if_status_1
+								0
+								31
+							
+						
+					
+					
+						sf_aes
+						sf_aes.
+						0x28
+						
+							
+								sf_aes_status
+								5
+								31
+							
+							
+								sf_aes_pref_busy
+								4
+								4
+							
+							
+								sf_aes_pref_trig
+								3
+								3
+							
+							
+								sf_aes_mode
+								1
+								2
+							
+							
+								sf_aes_en
+								0
+								0
+							
+						
+					
+					
+						sf_ahb2sif_status
+						sf_ahb2sif_status.
+						0x2C
+						
+							
+								sf_ahb2sif_status
+								0
+								31
+							
+						
+					
+					
+						sf_if_io_dly_0
+						sf_if_io_dly_0.
+						0x30
+						
+							
+								sf_dqs_do_dly_sel
+								30
+								31
+							
+							
+								sf_dqs_di_dly_sel
+								28
+								29
+							
+							
+								sf_dqs_oe_dly_sel
+								26
+								27
+							
+							
+								sf_clk_out_dly_sel
+								8
+								9
+							
+							
+								sf_cs2_dly_sel
+								2
+								3
+							
+							
+								sf_cs_dly_sel
+								0
+								1
+							
+						
+					
+					
+						sf_if_io_dly_1
+						sf_if_io_dly_1.
+						0x34
+						
+							
+								sf_io_0_do_dly_sel
+								16
+								17
+							
+							
+								sf_io_0_di_dly_sel
+								8
+								9
+							
+							
+								sf_io_0_oe_dly_sel
+								0
+								1
+							
+						
+					
+					
+						sf_if_io_dly_2
+						sf_if_io_dly_2.
+						0x38
+						
+							
+								sf_io_1_do_dly_sel
+								16
+								17
+							
+							
+								sf_io_1_di_dly_sel
+								8
+								9
+							
+							
+								sf_io_1_oe_dly_sel
+								0
+								1
+							
+						
+					
+					
+						sf_if_io_dly_3
+						sf_if_io_dly_3.
+						0x3C
+						
+							
+								sf_io_2_do_dly_sel
+								16
+								17
+							
+							
+								sf_io_2_di_dly_sel
+								8
+								9
+							
+							
+								sf_io_2_oe_dly_sel
+								0
+								1
+							
+						
+					
+					
+						sf_if_io_dly_4
+						sf_if_io_dly_4.
+						0x40
+						
+							
+								sf_io_3_do_dly_sel
+								16
+								17
+							
+							
+								sf_io_3_di_dly_sel
+								8
+								9
+							
+							
+								sf_io_3_oe_dly_sel
+								0
+								1
+							
+						
+					
+					
+						sf_reserved
+						sf_reserved.
+						0x44
+						
+							
+								sf_reserved
+								0
+								31
+							
+						
+					
+					
+						sf2_if_io_dly_0
+						sf2_if_io_dly_0.
+						0x48
+						
+							
+								sf2_dqs_do_dly_sel
+								30
+								31
+							
+							
+								sf2_dqs_di_dly_sel
+								28
+								29
+							
+							
+								sf2_dqs_oe_dly_sel
+								26
+								27
+							
+							
+								sf2_clk_out_dly_sel
+								8
+								9
+							
+							
+								sf2_cs2_dly_sel
+								2
+								3
+							
+							
+								sf2_cs_dly_sel
+								0
+								1
+							
+						
+					
+					
+						sf2_if_io_dly_1
+						sf2_if_io_dly_1.
+						0x4C
+						
+							
+								sf2_io_0_do_dly_sel
+								16
+								17
+							
+							
+								sf2_io_0_di_dly_sel
+								8
+								9
+							
+							
+								sf2_io_0_oe_dly_sel
+								0
+								1
+							
+						
+					
+					
+						sf2_if_io_dly_2
+						sf2_if_io_dly_2.
+						0x50
+						
+							
+								sf2_io_1_do_dly_sel
+								16
+								17
+							
+							
+								sf2_io_1_di_dly_sel
+								8
+								9
+							
+							
+								sf2_io_1_oe_dly_sel
+								0
+								1
+							
+						
+					
+					
+						sf2_if_io_dly_3
+						sf2_if_io_dly_3.
+						0x54
+						
+							
+								sf2_io_2_do_dly_sel
+								16
+								17
+							
+							
+								sf2_io_2_di_dly_sel
+								8
+								9
+							
+							
+								sf2_io_2_oe_dly_sel
+								0
+								1
+							
+						
+					
+					
+						sf2_if_io_dly_4
+						sf2_if_io_dly_4.
+						0x58
+						
+							
+								sf2_io_3_do_dly_sel
+								16
+								17
+							
+							
+								sf2_io_3_di_dly_sel
+								8
+								9
+							
+							
+								sf2_io_3_oe_dly_sel
+								0
+								1
+							
+						
+					
+					
+						sf3_if_io_dly_0
+						sf3_if_io_dly_0.
+						0x5C
+						
+							
+								sf3_dqs_do_dly_sel
+								30
+								31
+							
+							
+								sf3_dqs_di_dly_sel
+								28
+								29
+							
+							
+								sf3_dqs_oe_dly_sel
+								26
+								27
+							
+							
+								sf3_clk_out_dly_sel
+								8
+								9
+							
+							
+								sf3_cs2_dly_sel
+								2
+								3
+							
+							
+								sf3_cs_dly_sel
+								0
+								1
+							
+						
+					
+					
+						sf3_if_io_dly_1
+						sf3_if_io_dly_1.
+						0x60
+						
+							
+								sf3_io_0_do_dly_sel
+								16
+								17
+							
+							
+								sf3_io_0_di_dly_sel
+								8
+								9
+							
+							
+								sf3_io_0_oe_dly_sel
+								0
+								1
+							
+						
+					
+					
+						sf3_if_io_dly_2
+						sf3_if_io_dly_2.
+						0x64
+						
+							
+								sf3_io_1_do_dly_sel
+								16
+								17
+							
+							
+								sf3_io_1_di_dly_sel
+								8
+								9
+							
+							
+								sf3_io_1_oe_dly_sel
+								0
+								1
+							
+						
+					
+					
+						sf3_if_io_dly_3
+						sf3_if_io_dly_3.
+						0x68
+						
+							
+								sf3_io_2_do_dly_sel
+								16
+								17
+							
+							
+								sf3_io_2_di_dly_sel
+								8
+								9
+							
+							
+								sf3_io_2_oe_dly_sel
+								0
+								1
+							
+						
+					
+					
+						sf3_if_io_dly_4
+						sf3_if_io_dly_4.
+						0x6C
+						
+							
+								sf3_io_3_do_dly_sel
+								16
+								17
+							
+							
+								sf3_io_3_di_dly_sel
+								8
+								9
+							
+							
+								sf3_io_3_oe_dly_sel
+								0
+								1
+							
+						
+					
+					
+						sf_ctrl_2
+						sf_ctrl_2.
+						0x70
+						
+							
+								sf_if_0_bk_sel
+								31
+								31
+							
+							
+								sf_if_bk2_en
+								30
+								30
+							
+							
+								sf_if_bk2_mode
+								29
+								29
+							
+							
+								sf_if_bk_swap
+								28
+								28
+							
+							
+								sf_if_dqs_en
+								5
+								5
+							
+							
+								sf_if_dtr_en
+								4
+								4
+							
+							
+								sf_if_pad_sel_lock
+								3
+								3
+							
+							
+								sf_if_pad_sel
+								0
+								1
+							
+						
+					
+					
+						sf_ctrl_3
+						sf_ctrl_3.
+						0x74
+						
+							
+								sf_if_1_ack_lat
+								29
+								31
+							
+							
+								sf_cmds_wrap_q
+								11
+								11
+							
+							
+								sf_cmds_wrap_mode
+								10
+								10
+							
+							
+								sf_cmds_wrap_q_ini
+								9
+								9
+							
+							
+								sf_cmds_bt_en
+								8
+								8
+							
+							
+								sf_cmds_bt_dly
+								5
+								7
+							
+							
+								sf_cmds_en
+								4
+								4
+							
+							
+								sf_cmds_wrap_len
+								0
+								3
+							
+						
+					
+					
+						sf_if_iahb_3
+						sf_if_iahb_3.
+						0x78
+						
+							
+								sf_if_2_qpi_mode_en
+								31
+								31
+							
+							
+								sf_if_2_spi_mode
+								28
+								30
+							
+							
+								sf_if_2_cmd_en
+								27
+								27
+							
+							
+								sf_if_2_adr_en
+								26
+								26
+							
+							
+								sf_if_2_dmy_en
+								25
+								25
+							
+							
+								sf_if_2_dat_en
+								24
+								24
+							
+							
+								sf_if_2_dat_rw  
+								23
+								23
+							
+							
+								sf_if_2_cmd_byte
+								20
+								22
+							
+							
+								sf_if_2_adr_byte
+								17
+								19
+							
+							
+								sf_if_2_dmy_byte
+								12
+								16
+							
+						
+					
+					
+						sf_if_iahb_4
+						sf_if_iahb_4.
+						0x7C
+						
+							
+								sf_if_2_cmd_buf_0
+								0
+								31
+							
+						
+					
+					
+						sf_if_iahb_5
+						sf_if_iahb_5.
+						0x80
+						
+							
+								sf_if_2_cmd_buf_1
+								0
+								31
+							
+						
+					
+					
+						sf_if_iahb_6
+						sf_if_iahb_6.
+						0x84
+						
+							
+								sf_if_3_qpi_mode_en
+								31
+								31
+							
+							
+								sf_if_3_spi_mode
+								28
+								30
+							
+							
+								sf_if_3_cmd_en
+								27
+								27
+							
+							
+								sf_if_3_adr_en
+								26
+								26
+							
+							
+								sf_if_3_cmd_byte
+								20
+								22
+							
+							
+								sf_if_3_adr_byte
+								17
+								19
+							
+						
+					
+					
+						sf_if_iahb_7
+						sf_if_iahb_7.
+						0x88
+						
+							
+								sf_if_3_cmd_buf_0
+								0
+								31
+							
+						
+					
+					
+						sf_if_iahb_8
+						sf_if_iahb_8.
+						0x8C
+						
+							
+								sf_if_3_cmd_buf_1
+								0
+								31
+							
+						
+					
+					
+						sf_if_iahb_9
+						sf_if_iahb_9.
+						0x90
+						
+							
+								sf_if_4_qpi_mode_en
+								31
+								31
+							
+							
+								sf_if_4_spi_mode
+								28
+								30
+							
+							
+								sf_if_4_cmd_en
+								27
+								27
+							
+							
+								sf_if_4_adr_en
+								26
+								26
+							
+							
+								sf_if_4_dmy_en
+								25
+								25
+							
+							
+								sf_if_4_dat_en
+								24
+								24
+							
+							
+								sf_if_4_dat_rw  
+								23
+								23
+							
+							
+								sf_if_4_cmd_byte
+								20
+								22
+							
+							
+								sf_if_4_adr_byte
+								17
+								19
+							
+							
+								sf_if_4_dmy_byte
+								12
+								16
+							
+						
+					
+					
+						sf_if_iahb_10
+						sf_if_iahb_10.
+						0x94
+						
+							
+								sf_if_4_cmd_buf_0
+								0
+								31
+							
+						
+					
+					
+						sf_if_iahb_11
+						sf_if_iahb_11.
+						0x98
+						
+							
+								sf_if_4_cmd_buf_1
+								0
+								31
+							
+						
+					
+					
+						sf_if_iahb_12
+						sf_if_iahb_12.
+						0x9C
+						
+							
+								sf2_if_read_dly_src
+								12
+								12
+							
+							
+								sf2_if_read_dly_en
+								11
+								11
+							
+							
+								sf2_if_read_dly_n
+								8
+								10
+							
+							
+								sf3_clk_out_inv_sel
+								5
+								5
+							
+							
+								sf2_clk_out_inv_sel
+								4
+								4
+							
+							
+								sf2_clk_sf_rx_inv_src
+								3
+								3
+							
+							
+								sf2_clk_sf_rx_inv_sel
+								2
+								2
+							
+						
+					
+					
+						sf_ctrl_prot_en_rd
+						sf_ctrl_prot_en_rd.
+						0x100
+						
+							
+								sf_dbg_dis
+								31
+								31
+							
+							
+								sf_if_0_trig_wr_lock
+								30
+								30
+							
+							
+								sf_ctrl_id1_en_rd
+								2
+								2
+							
+							
+								sf_ctrl_id0_en_rd
+								1
+								1
+							
+							
+								sf_ctrl_prot_en_rd
+								0
+								0
+							
+						
+					
+					
+						sf_ctrl_prot_en
+						sf_ctrl_prot_en.
+						0x104
+						
+							
+								sf_ctrl_id1_en
+								2
+								2
+							
+							
+								sf_ctrl_id0_en
+								1
+								1
+							
+							
+								sf_ctrl_prot_en
+								0
+								0
+							
+						
+					
+					
+						sf_aes_key_r0_0
+						sf_aes_key_r0_0.
+						0x200
+						
+							
+								sf_aes_key_r0_0
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r0_1
+						sf_aes_key_r0_1.
+						0x204
+						
+							
+								sf_aes_key_r0_1
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r0_2
+						sf_aes_key_r0_2.
+						0x208
+						
+							
+								sf_aes_key_r0_2
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r0_3
+						sf_aes_key_r0_3.
+						0x20C
+						
+							
+								sf_aes_key_r0_3
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r0_4
+						sf_aes_key_r0_4.
+						0x210
+						
+							
+								sf_aes_key_r0_4
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r0_5
+						sf_aes_key_r0_5.
+						0x214
+						
+							
+								sf_aes_key_r0_5
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r0_6
+						sf_aes_key_r0_6.
+						0x218
+						
+							
+								sf_aes_key_r0_6
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r0_7
+						sf_aes_key_r0_7.
+						0x21C
+						
+							
+								sf_aes_key_r0_7
+								0
+								31
+							
+						
+					
+					
+						sf_aes_iv_r0_w0
+						sf_aes_iv_r0_w0.
+						0x220
+						
+							
+								sf_aes_iv_r0_w0
+								0
+								31
+							
+						
+					
+					
+						sf_aes_iv_r0_w1
+						sf_aes_iv_r0_w1.
+						0x224
+						
+							
+								sf_aes_iv_r0_w1
+								0
+								31
+							
+						
+					
+					
+						sf_aes_iv_r0_w2
+						sf_aes_iv_r0_w2.
+						0x228
+						
+							
+								sf_aes_iv_r0_w2
+								0
+								31
+							
+						
+					
+					
+						sf_aes_iv_r0_w3
+						sf_aes_iv_r0_w3.
+						0x22C
+						
+							
+								sf_aes_iv_r0_w3
+								0
+								31
+							
+						
+					
+					
+						sf_aes_cfg_r0
+						sf_aes_cfg_r0.
+						0x230
+						
+							
+								sf_aes_region_r0_lock
+								31
+								31
+							
+							
+								sf_aes_region_r0_en
+								30
+								30
+							
+							
+								sf_aes_region_r0_hw_key_en
+								29
+								29
+							
+							
+								sf_aes_region_r0_start
+								14
+								27
+							
+							
+								sf_aes_region_r0_end
+								0
+								13
+							
+						
+					
+					
+						sf_aes_key_r1_0
+						sf_aes_key_r1_0.
+						0x300
+						
+							
+								sf_aes_key_r1_0
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r1_1
+						sf_aes_key_r1_1.
+						0x304
+						
+							
+								sf_aes_key_r1_1
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r1_2
+						sf_aes_key_r1_2.
+						0x308
+						
+							
+								sf_aes_key_r1_2
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r1_3
+						sf_aes_key_r1_3.
+						0x30C
+						
+							
+								sf_aes_key_r1_3
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r1_4
+						sf_aes_key_r1_4.
+						0x310
+						
+							
+								sf_aes_key_r1_4
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r1_5
+						sf_aes_key_r1_5.
+						0x314
+						
+							
+								sf_aes_key_r1_5
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r1_6
+						sf_aes_key_r1_6.
+						0x318
+						
+							
+								sf_aes_key_r1_6
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r1_7
+						sf_aes_key_r1_7.
+						0x31C
+						
+							
+								sf_aes_key_r1_7
+								0
+								31
+							
+						
+					
+					
+						sf_aes_iv_r1_w0
+						sf_aes_iv_r1_w0.
+						0x320
+						
+							
+								sf_aes_iv_r1_w0
+								0
+								31
+							
+						
+					
+					
+						sf_aes_iv_r1_w1
+						sf_aes_iv_r1_w1.
+						0x324
+						
+							
+								sf_aes_iv_r1_w1
+								0
+								31
+							
+						
+					
+					
+						sf_aes_iv_r1_w2
+						sf_aes_iv_r1_w2.
+						0x328
+						
+							
+								sf_aes_iv_r1_w2
+								0
+								31
+							
+						
+					
+					
+						sf_aes_iv_r1_w3
+						sf_aes_iv_r1_w3.
+						0x32C
+						
+							
+								sf_aes_iv_r1_w3
+								0
+								31
+							
+						
+					
+					
+						sf_aes_r1
+						sf_aes_r1.
+						0x330
+						
+							
+								sf_aes_r1_lock
+								31
+								31
+							
+							
+								sf_aes_r1_en
+								30
+								30
+							
+							
+								sf_aes_r1_hw_key_en
+								29
+								29
+							
+							
+								sf_aes_r1_start
+								14
+								27
+							
+							
+								sf_aes_r1_end
+								0
+								13
+							
+						
+					
+					
+						sf_aes_key_r2_0
+						sf_aes_key_r2_0.
+						0x400
+						
+							
+								sf_aes_key_r2_0
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r2_1
+						sf_aes_key_r2_1.
+						0x404
+						
+							
+								sf_aes_key_r2_1
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r2_2
+						sf_aes_key_r2_2.
+						0x408
+						
+							
+								sf_aes_key_r2_2
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r2_3
+						sf_aes_key_r2_3.
+						0x40C
+						
+							
+								sf_aes_key_r2_3
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r2_4
+						sf_aes_key_r2_4.
+						0x410
+						
+							
+								sf_aes_key_r2_4
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r2_5
+						sf_aes_key_r2_5.
+						0x414
+						
+							
+								sf_aes_key_r2_5
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r2_6
+						sf_aes_key_r2_6.
+						0x418
+						
+							
+								sf_aes_key_r2_6
+								0
+								31
+							
+						
+					
+					
+						sf_aes_key_r2_7
+						sf_aes_key_r2_7.
+						0x41C
+						
+							
+								sf_aes_key_r2_7
+								0
+								31
+							
+						
+					
+					
+						sf_aes_iv_r2_w0
+						sf_aes_iv_r2_w0.
+						0x420
+						
+							
+								sf_aes_iv_r2_w0
+								0
+								31
+							
+						
+					
+					
+						sf_aes_iv_r2_w1
+						sf_aes_iv_r2_w1.
+						0x424
+						
+							
+								sf_aes_iv_r2_w1
+								0
+								31
+							
+						
+					
+					
+						sf_aes_iv_r2_w2
+						sf_aes_iv_r2_w2.
+						0x428
+						
+							
+								sf_aes_iv_r2_w2
+								0
+								31
+							
+						
+					
+					
+						sf_aes_iv_r2_w3
+						sf_aes_iv_r2_w3.
+						0x42C
+						
+							
+								sf_aes_iv_r2_w3
+								0
+								31
+							
+						
+					
+					
+						sf_aes_r2
+						sf_aes_r2.
+						0x430
+						
+							
+								sf_aes_r2_lock
+								31
+								31
+							
+							
+								sf_aes_r2_en
+								30
+								30
+							
+							
+								sf_aes_r2_hw_key_en
+								29
+								29
+							
+							
+								sf_aes_r2_start
+								14
+								27
+							
+							
+								sf_aes_r2_end
+								0
+								13
+							
+						
+					
+					
+						sf_id0_offset
+						sf_id0_offset.
+						0x434
+						
+							
+								sf_id0_offset
+								0
+								23
+							
+						
+					
+					
+						sf_id1_offset
+						sf_id1_offset.
+						0x438
+						
+							
+								sf_id1_offset
+								0
+								23
+							
+						
+					
+					
+						sf_bk2_id0_offset
+						sf_bk2_id0_offset.
+						0x43C
+						
+							
+								sf_bk2_id0_offset
+								0
+								23
+							
+						
+					
+					
+						sf_bk2_id1_offset
+						sf_bk2_id1_offset.
+						0x440
+						
+							
+								sf_bk2_id1_offset
+								0
+								23
+							
+						
+					
+				
+			
+			
+				dma
+				dma.
+				0x40007000
+				dma
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						DMA_IntStatus
+						DMA_IntStatus.
+						0x0
+						
+							
+								IntStatus
+								0
+								7
+							
+						
+					
+					
+						DMA_IntTCStatus
+						DMA_IntTCStatus.
+						0x4
+						
+							
+								IntTCStatus
+								0
+								7
+							
+						
+					
+					
+						DMA_IntTCClear
+						DMA_IntTCClear.
+						0x8
+						
+							
+								IntTCClear
+								0
+								7
+							
+						
+					
+					
+						DMA_IntErrorStatus
+						DMA_IntErrorStatus.
+						0xC
+						
+							
+								IntErrorStatus
+								0
+								7
+							
+						
+					
+					
+						DMA_IntErrClr
+						DMA_IntErrClr.
+						0x10
+						
+							
+								IntErrClr
+								0
+								7
+							
+						
+					
+					
+						DMA_RawIntTCStatus
+						DMA_RawIntTCStatus.
+						0x14
+						
+							
+								RawIntTCStatus
+								0
+								7
+							
+						
+					
+					
+						DMA_RawIntErrorStatus
+						DMA_RawIntErrorStatus.
+						0x18
+						
+							
+								RawIntErrorStatus
+								0
+								7
+							
+						
+					
+					
+						DMA_EnbldChns
+						DMA_EnbldChns.
+						0x1C
+						
+							
+								EnabledChannels
+								0
+								7
+							
+						
+					
+					
+						DMA_SoftBReq
+						DMA_SoftBReq.
+						0x20
+						
+							
+								SoftBReq
+								0
+								31
+							
+						
+					
+					
+						DMA_SoftSReq
+						DMA_SoftSReq.
+						0x24
+						
+							
+								SoftSReq
+								0
+								31
+							
+						
+					
+					
+						DMA_SoftLBReq
+						DMA_SoftLBReq.
+						0x28
+						
+							
+								SoftLBReq
+								0
+								31
+							
+						
+					
+					
+						DMA_SoftLSReq
+						DMA_SoftLSReq.
+						0x2C
+						
+							
+								SoftLSReq
+								0
+								31
+							
+						
+					
+					
+						DMA_Top_Config
+						DMA_Top_Config.
+						0x30
+						
+							
+								M
+								1
+								1
+							
+							
+								E
+								0
+								0
+							
+						
+					
+					
+						DMA_Sync
+						DMA_Sync.
+						0x34
+						
+							
+								DMA_Sync
+								0
+								31
+							
+						
+					
+					
+						DMA_C0SrcAddr
+						DMA_C0SrcAddr.
+						0x100
+						
+							
+								SrcAddr
+								0
+								31
+							
+						
+					
+					
+						DMA_C0DstAddr
+						DMA_C0DstAddr.
+						0x104
+						
+							
+								DstAddr
+								0
+								31
+							
+						
+					
+					
+						DMA_C0LLI
+						DMA_C0LLI.
+						0x108
+						
+							
+								LLI
+								0
+								31
+							
+						
+					
+					
+						DMA_C0Control
+						DMA_C0Control.
+						0x10C
+						
+							
+								I
+								31
+								31
+							
+							
+								Prot
+								28
+								30
+							
+							
+								DI
+								27
+								27
+							
+							
+								SI
+								26
+								26
+							
+							
+								SLargerD
+								25
+								25
+							
+							
+								fix_cnt
+								23
+								24
+							
+							
+								DWidth
+								21
+								22
+							
+							
+								SWidth
+								18
+								19
+							
+							
+								dst_add_mode
+								17
+								17
+							
+							
+								DBSize
+								15
+								16
+							
+							
+								dst_min_mode
+								14
+								14
+							
+							
+								SBSize
+								12
+								13
+							
+							
+								TransferSize
+								0
+								11
+							
+						
+					
+					
+						DMA_C0Config
+						DMA_C0Config.
+						0x110
+						
+							
+								LLICounter
+								20
+								29
+							
+							
+								H
+								18
+								18
+							
+							
+								A
+								17
+								17
+							
+							
+								L
+								16
+								16
+							
+							
+								ITC
+								15
+								15
+							
+							
+								IE
+								14
+								14
+							
+							
+								FlowCntrl
+								11
+								13
+							
+							
+								DstPeripheral
+								6
+								10
+							
+							
+								SrcPeripheral
+								1
+								5
+							
+							
+								E
+								0
+								0
+							
+						
+					
+					
+						DMA_C1SrcAddr
+						DMA_C1SrcAddr.
+						0x200
+						
+							
+								SrcAddr
+								0
+								31
+							
+						
+					
+					
+						DMA_C1DstAddr
+						DMA_C1DstAddr.
+						0x204
+						
+							
+								DstAddr
+								0
+								31
+							
+						
+					
+					
+						DMA_C1LLI
+						DMA_C1LLI.
+						0x208
+						
+							
+								LLI
+								2
+								31
+							
+						
+					
+					
+						DMA_C1Control
+						DMA_C1Control.
+						0x20C
+						
+							
+								I
+								31
+								31
+							
+							
+								Prot
+								28
+								30
+							
+							
+								DI
+								27
+								27
+							
+							
+								SI
+								26
+								26
+							
+							
+								fix_cnt
+								23
+								24
+							
+							
+								DWidth
+								21
+								23
+							
+							
+								SWidth
+								18
+								20
+							
+							
+								dst_add_mode
+								17
+								17
+							
+							
+								DBSize
+								15
+								16
+							
+							
+								dst_min_mode
+								14
+								14
+							
+							
+								SBSize
+								12
+								13
+							
+							
+								TransferSize
+								0
+								11
+							
+						
+					
+					
+						DMA_C1Config
+						DMA_C1Config.
+						0x210
+						
+							
+								H
+								18
+								18
+							
+							
+								A
+								17
+								17
+							
+							
+								L
+								16
+								16
+							
+							
+								ITC
+								15
+								15
+							
+							
+								IE
+								14
+								14
+							
+							
+								FlowCntrl
+								11
+								13
+							
+							
+								DstPeripheral
+								6
+								10
+							
+							
+								SrcPeripheral
+								1
+								5
+							
+							
+								E
+								0
+								0
+							
+						
+					
+					
+						DMA_C2SrcAddr
+						DMA_C2SrcAddr.
+						0x300
+						
+							
+								SrcAddr
+								0
+								31
+							
+						
+					
+					
+						DMA_C2DstAddr
+						DMA_C2DstAddr.
+						0x304
+						
+							
+								DstAddr
+								0
+								31
+							
+						
+					
+					
+						DMA_C2LLI
+						DMA_C2LLI.
+						0x308
+						
+							
+								LLI
+								2
+								31
+							
+						
+					
+					
+						DMA_C2Control
+						DMA_C2Control.
+						0x30C
+						
+							
+								I
+								31
+								31
+							
+							
+								Prot
+								28
+								30
+							
+							
+								DI
+								27
+								27
+							
+							
+								SI
+								26
+								26
+							
+							
+								fix_cnt
+								23
+								24
+							
+							
+								DWidth
+								21
+								23
+							
+							
+								SWidth
+								18
+								20
+							
+							
+								dst_add_mode
+								17
+								17
+							
+							
+								DBSize
+								15
+								16
+							
+							
+								dst_min_mode
+								14
+								14
+							
+							
+								SBSize
+								12
+								13
+							
+							
+								TransferSize
+								0
+								11
+							
+						
+					
+					
+						DMA_C2Config
+						DMA_C2Config.
+						0x310
+						
+							
+								H
+								18
+								18
+							
+							
+								A
+								17
+								17
+							
+							
+								L
+								16
+								16
+							
+							
+								ITC
+								15
+								15
+							
+							
+								IE
+								14
+								14
+							
+							
+								FlowCntrl
+								11
+								13
+							
+							
+								DstPeripheral
+								6
+								10
+							
+							
+								SrcPeripheral
+								1
+								5
+							
+							
+								E
+								0
+								0
+							
+						
+					
+					
+						DMA_C3SrcAddr
+						DMA_C3SrcAddr.
+						0x400
+						
+							
+								SrcAddr
+								0
+								31
+							
+						
+					
+					
+						DMA_C3DstAddr
+						DMA_C3DstAddr.
+						0x404
+						
+							
+								DstAddr
+								0
+								31
+							
+						
+					
+					
+						DMA_C3LLI
+						DMA_C3LLI.
+						0x408
+						
+							
+								LLI
+								2
+								31
+							
+						
+					
+					
+						DMA_C3Control
+						DMA_C3Control.
+						0x40C
+						
+							
+								I
+								31
+								31
+							
+							
+								Prot
+								28
+								30
+							
+							
+								DI
+								27
+								27
+							
+							
+								SI
+								26
+								26
+							
+							
+								fix_cnt
+								23
+								24
+							
+							
+								DWidth
+								21
+								23
+							
+							
+								SWidth
+								18
+								20
+							
+							
+								dst_add_mode
+								17
+								17
+							
+							
+								DBSize
+								15
+								16
+							
+							
+								dst_min_mode
+								14
+								14
+							
+							
+								SBSize
+								12
+								13
+							
+							
+								TransferSize
+								0
+								11
+							
+						
+					
+					
+						DMA_C3Config
+						DMA_C3Config.
+						0x410
+						
+							
+								H
+								18
+								18
+							
+							
+								A
+								17
+								17
+							
+							
+								L
+								16
+								16
+							
+							
+								ITC
+								15
+								15
+							
+							
+								IE
+								14
+								14
+							
+							
+								FlowCntrl
+								11
+								13
+							
+							
+								DstPeripheral
+								6
+								10
+							
+							
+								SrcPeripheral
+								1
+								5
+							
+							
+								E
+								0
+								0
+							
+						
+					
+					
+						DMA_C4SrcAddr
+						DMA_C4SrcAddr.
+						0x500
+						
+							
+								SrcAddr
+								0
+								31
+							
+						
+					
+					
+						DMA_C4DstAddr
+						DMA_C4DstAddr.
+						0x504
+						
+							
+								DstAddr
+								0
+								31
+							
+						
+					
+					
+						DMA_C4LLI
+						DMA_C4LLI.
+						0x508
+						
+							
+								LLI
+								2
+								31
+							
+						
+					
+					
+						DMA_C4Control
+						DMA_C4Control.
+						0x50C
+						
+							
+								I
+								31
+								31
+							
+							
+								Prot
+								28
+								30
+							
+							
+								DI
+								27
+								27
+							
+							
+								SI
+								26
+								26
+							
+							
+								fix_cnt
+								23
+								24
+							
+							
+								DWidth
+								21
+								23
+							
+							
+								SWidth
+								18
+								20
+							
+							
+								dst_add_mode
+								17
+								17
+							
+							
+								DBSize
+								15
+								16
+							
+							
+								dst_min_mode
+								14
+								14
+							
+							
+								SBSize
+								12
+								13
+							
+							
+								TransferSize
+								0
+								11
+							
+						
+					
+					
+						DMA_C4Config
+						DMA_C4Config.
+						0x510
+						
+							
+								H
+								18
+								18
+							
+							
+								A
+								17
+								17
+							
+							
+								L
+								16
+								16
+							
+							
+								ITC
+								15
+								15
+							
+							
+								IE
+								14
+								14
+							
+							
+								FlowCntrl
+								11
+								13
+							
+							
+								DstPeripheral
+								6
+								10
+							
+							
+								SrcPeripheral
+								1
+								5
+							
+							
+								E
+								0
+								0
+							
+						
+					
+					
+						DMA_C5SrcAddr
+						DMA_C5SrcAddr.
+						0x600
+						
+							
+								SrcAddr
+								0
+								31
+							
+						
+					
+					
+						DMA_C5DstAddr
+						DMA_C5DstAddr.
+						0x604
+						
+							
+								DstAddr
+								0
+								31
+							
+						
+					
+					
+						DMA_C5LLI
+						DMA_C5LLI.
+						0x608
+						
+							
+								LLI
+								2
+								31
+							
+						
+					
+					
+						DMA_C5Control
+						DMA_C5Control.
+						0x60C
+						
+							
+								I
+								31
+								31
+							
+							
+								Prot
+								28
+								30
+							
+							
+								DI
+								27
+								27
+							
+							
+								SI
+								26
+								26
+							
+							
+								fix_cnt
+								23
+								24
+							
+							
+								DWidth
+								21
+								23
+							
+							
+								SWidth
+								18
+								20
+							
+							
+								dst_add_mode
+								17
+								17
+							
+							
+								DBSize
+								15
+								16
+							
+							
+								dst_min_mode
+								14
+								14
+							
+							
+								SBSize
+								12
+								13
+							
+							
+								TransferSize
+								0
+								11
+							
+						
+					
+					
+						DMA_C5Config
+						DMA_C5Config.
+						0x610
+						
+							
+								H
+								18
+								18
+							
+							
+								A
+								17
+								17
+							
+							
+								L
+								16
+								16
+							
+							
+								ITC
+								15
+								15
+							
+							
+								IE
+								14
+								14
+							
+							
+								FlowCntrl
+								11
+								13
+							
+							
+								DstPeripheral
+								6
+								10
+							
+							
+								SrcPeripheral
+								1
+								5
+							
+							
+								E
+								0
+								0
+							
+						
+					
+					
+						DMA_C6SrcAddr
+						DMA_C6SrcAddr.
+						0x700
+						
+							
+								SrcAddr
+								0
+								31
+							
+						
+					
+					
+						DMA_C6DstAddr
+						DMA_C6DstAddr.
+						0x704
+						
+							
+								DstAddr
+								0
+								31
+							
+						
+					
+					
+						DMA_C6LLI
+						DMA_C6LLI.
+						0x708
+						
+							
+								LLI
+								2
+								31
+							
+						
+					
+					
+						DMA_C6Control
+						DMA_C6Control.
+						0x70C
+						
+							
+								I
+								31
+								31
+							
+							
+								Prot
+								28
+								30
+							
+							
+								DI
+								27
+								27
+							
+							
+								SI
+								26
+								26
+							
+							
+								fix_cnt
+								23
+								24
+							
+							
+								DWidth
+								21
+								23
+							
+							
+								SWidth
+								18
+								20
+							
+							
+								dst_add_mode
+								17
+								17
+							
+							
+								DBSize
+								15
+								16
+							
+							
+								dst_min_mode
+								14
+								14
+							
+							
+								SBSize
+								12
+								13
+							
+							
+								TransferSize
+								0
+								11
+							
+						
+					
+					
+						DMA_C6Config
+						DMA_C6Config.
+						0x710
+						
+							
+								H
+								18
+								18
+							
+							
+								A
+								17
+								17
+							
+							
+								L
+								16
+								16
+							
+							
+								ITC
+								15
+								15
+							
+							
+								IE
+								14
+								14
+							
+							
+								FlowCntrl
+								11
+								13
+							
+							
+								DstPeripheral
+								6
+								10
+							
+							
+								SrcPeripheral
+								1
+								5
+							
+							
+								E
+								0
+								0
+							
+						
+					
+					
+						DMA_C7SrcAddr
+						DMA_C7SrcAddr.
+						0x800
+						
+							
+								SrcAddr
+								0
+								31
+							
+						
+					
+					
+						DMA_C7DstAddr
+						DMA_C7DstAddr.
+						0x804
+						
+							
+								DstAddr
+								0
+								31
+							
+						
+					
+					
+						DMA_C7LLI
+						DMA_C7LLI.
+						0x808
+						
+							
+								LLI
+								2
+								31
+							
+						
+					
+					
+						DMA_C7Control
+						DMA_C7Control.
+						0x80C
+						
+							
+								I
+								31
+								31
+							
+							
+								Prot
+								28
+								30
+							
+							
+								DI
+								27
+								27
+							
+							
+								SI
+								26
+								26
+							
+							
+								fix_cnt
+								23
+								24
+							
+							
+								DWidth
+								21
+								23
+							
+							
+								SWidth
+								18
+								20
+							
+							
+								dst_add_mode
+								17
+								17
+							
+							
+								DBSize
+								15
+								16
+							
+							
+								dst_min_mode
+								14
+								14
+							
+							
+								SBSize
+								12
+								13
+							
+							
+								TransferSize
+								0
+								11
+							
+						
+					
+					
+						DMA_C7Config
+						DMA_C7Config.
+						0x810
+						
+							
+								H
+								18
+								18
+							
+							
+								A
+								17
+								17
+							
+							
+								L
+								16
+								16
+							
+							
+								ITC
+								15
+								15
+							
+							
+								IE
+								14
+								14
+							
+							
+								FlowCntrl
+								11
+								13
+							
+							
+								DstPeripheral
+								6
+								10
+							
+							
+								SrcPeripheral
+								1
+								5
+							
+							
+								E
+								0
+								0
+							
+						
+					
+				
+			
+			
+				emac
+				emac.
+				0x4000D000
+				emac
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						MODE
+						MODE.
+						0x0
+						
+							
+								rsvd_23_18
+								18
+								23
+							
+							
+								RMII_EN
+								17
+								17
+							
+							
+								RECSMALL
+								16
+								16
+							
+							
+								PAD
+								15
+								15
+							
+							
+								HUGEN
+								14
+								14
+							
+							
+								CRCEN
+								13
+								13
+							
+							
+								rsvd_12_11
+								11
+								12
+							
+							
+								FULLD
+								10
+								10
+							
+							
+								rsvd_9_7
+								7
+								9
+							
+							
+								IFG
+								6
+								6
+							
+							
+								PRO
+								5
+								5
+							
+							
+								rsvd_4
+								4
+								4
+							
+							
+								BRO
+								3
+								3
+							
+							
+								NOPRE
+								2
+								2
+							
+							
+								TXEN
+								1
+								1
+							
+							
+								RXEN
+								0
+								0
+							
+						
+					
+					
+						INT_SOURCE
+						INT_SOURCE.
+						0x4
+						
+							
+								RXC
+								6
+								6
+							
+							
+								TXC
+								5
+								5
+							
+							
+								BUSY
+								4
+								4
+							
+							
+								RXE
+								3
+								3
+							
+							
+								RXB
+								2
+								2
+							
+							
+								TXE
+								1
+								1
+							
+							
+								TXB
+								0
+								0
+							
+						
+					
+					
+						INT_MASK
+						INT_MASK.
+						0x8
+						
+							
+								RXC_M
+								6
+								6
+							
+							
+								TXC_M
+								5
+								5
+							
+							
+								BUSY_M
+								4
+								4
+							
+							
+								RXE_M
+								3
+								3
+							
+							
+								RXB_M
+								2
+								2
+							
+							
+								TXE_M
+								1
+								1
+							
+							
+								TXB_M
+								0
+								0
+							
+						
+					
+					
+						IPGT
+						IPGT.
+						0xC
+						
+							
+								IPGT
+								0
+								6
+							
+						
+					
+					
+						PACKETLEN
+						PACKETLEN.
+						0x18
+						
+							
+								MINFL
+								16
+								31
+							
+							
+								MAXFL
+								0
+								15
+							
+						
+					
+					
+						COLLCONFIG
+						COLLCONFIG.
+						0x1C
+						
+							
+								MAXRET
+								16
+								19
+							
+							
+								COLLVALID
+								0
+								5
+							
+						
+					
+					
+						TX_BD_NUM
+						TX_BD_NUM.
+						0x20
+						
+							
+								RXBDPTR
+								24
+								30
+							
+							
+								TXBDPTR
+								16
+								22
+							
+							
+								TXBDNUM
+								0
+								7
+							
+						
+					
+					
+						MIIMODE
+						MIIMODE.
+						0x28
+						
+							
+								MIINOPRE
+								8
+								8
+							
+							
+								CLKDIV
+								0
+								7
+							
+						
+					
+					
+						MIICOMMAND
+						MIICOMMAND.
+						0x2C
+						
+							
+								WCTRLDATA
+								2
+								2
+							
+							
+								RSTAT
+								1
+								1
+							
+							
+								SCANSTAT
+								0
+								0
+							
+						
+					
+					
+						MIIADDRESS
+						MIIADDRESS.
+						0x30
+						
+							
+								RGAD
+								8
+								12
+							
+							
+								FIAD
+								0
+								4
+							
+						
+					
+					
+						MIITX_DATA
+						MIITX_DATA.
+						0x34
+						
+							
+								CTRLDATA
+								0
+								15
+							
+						
+					
+					
+						MIIRX_DATA
+						MIIRX_DATA.
+						0x38
+						
+							
+								PRSD
+								0
+								15
+							
+						
+					
+					
+						MIISTATUS
+						MIISTATUS.
+						0x3C
+						
+							
+								MIIM_BUSY
+								1
+								1
+							
+							
+								MIIM_LINKFAIL
+								0
+								0
+							
+						
+					
+					
+						MAC_ADDR0
+						MAC_ADDR0.
+						0x40
+						
+							
+								MAC_B2
+								24
+								31
+							
+							
+								MAC_B3
+								16
+								23
+							
+							
+								MAC_B4
+								8
+								15
+							
+							
+								MAC_B5
+								0
+								7
+							
+						
+					
+					
+						MAC_ADDR1
+						MAC_ADDR1.
+						0x44
+						
+							
+								MAC_B0
+								8
+								15
+							
+							
+								MAC_B1
+								0
+								7
+							
+						
+					
+					
+						HASH0_ADDR
+						HASH0_ADDR.
+						0x48
+						
+							
+								HASH0
+								0
+								31
+							
+						
+					
+					
+						HASH1_ADDR
+						HASH1_ADDR.
+						0x4C
+						
+							
+								HASH1
+								0
+								31
+							
+						
+					
+					
+						TXCTRL
+						TXCTRL.
+						0x50
+						
+							
+								TXPAUSERQ
+								16
+								16
+							
+							
+								TXPAUSETV
+								0
+								15
+							
+						
+					
+				
+			
+			
+				usb
+				usb.
+				0x4000D800
+				usb
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						usb_config
+						usb_config.
+						0x0
+						
+							
+								sts_usb_ep0_sw_rdy
+								28
+								28
+							
+							
+								cr_usb_ep0_sw_rdy
+								27
+								27
+							
+							
+								cr_usb_ep0_sw_nack_out
+								26
+								26
+							
+							
+								cr_usb_ep0_sw_nack_in
+								25
+								25
+							
+							
+								cr_usb_ep0_sw_stall
+								24
+								24
+							
+							
+								cr_usb_ep0_sw_size
+								16
+								23
+							
+							
+								cr_usb_ep0_sw_addr
+								9
+								15
+							
+							
+								cr_usb_ep0_sw_ctrl
+								8
+								8
+							
+							
+								cr_usb_rom_dct_en
+								4
+								4
+							
+							
+								cr_usb_en
+								0
+								0
+							
+						
+					
+					
+						usb_lpm_config
+						usb_lpm_config.
+						0x4
+						
+							
+								sts_lpm
+								31
+								31
+							
+							
+								sts_lpm_attr
+								20
+								30
+							
+							
+								cr_lpm_resp
+								2
+								3
+							
+							
+								cr_lpm_resp_upd
+								1
+								1
+							
+							
+								cr_lpm_en
+								0
+								0
+							
+						
+					
+					
+						usb_resume_config
+						usb_resume_config.
+						0x8
+						
+							
+								cr_res_force
+								31
+								31
+							
+							
+								cr_res_trig
+								12
+								12
+							
+							
+								cr_res_width
+								0
+								10
+							
+						
+					
+					
+						usb_setup_data_0
+						usb_setup_data_0.
+						0x10
+						
+							
+								sts_setup_data_b3
+								24
+								31
+							
+							
+								sts_setup_data_b2
+								16
+								23
+							
+							
+								sts_setup_data_b1
+								8
+								15
+							
+							
+								sts_setup_data_b0
+								0
+								7
+							
+						
+					
+					
+						usb_setup_data_1
+						usb_setup_data_1.
+						0x14
+						
+							
+								sts_setup_data_b7
+								24
+								31
+							
+							
+								sts_setup_data_b6
+								16
+								23
+							
+							
+								sts_setup_data_b5
+								8
+								15
+							
+							
+								sts_setup_data_b4
+								0
+								7
+							
+						
+					
+					
+						usb_frame_no
+						usb_frame_no.
+						0x18
+						
+							
+								sts_ep_no
+								16
+								19
+							
+							
+								sts_pid
+								12
+								15
+							
+							
+								sts_frame_no
+								0
+								10
+							
+						
+					
+					
+						usb_error
+						usb_error.
+						0x1C
+						
+							
+								crc16_err
+								6
+								6
+							
+							
+								crc5_err
+								5
+								5
+							
+							
+								pid_cks_err
+								4
+								4
+							
+							
+								pid_seq_err
+								3
+								3
+							
+							
+								ivld_ep_err
+								2
+								2
+							
+							
+								xfer_to_err
+								1
+								1
+							
+							
+								utmi_rx_err
+								0
+								0
+							
+						
+					
+					
+						usb_int_en
+						USB interrupt enable
+						0x20
+						
+							
+								cr_usb_err_en
+								31
+								31
+							
+							
+								cr_sof_3ms_en
+								30
+								30
+							
+							
+								cr_lpm_pkt_en
+								29
+								29
+							
+							
+								cr_lpm_wkup_en
+								28
+								28
+							
+							
+								rsvd_27_24
+								24
+								27
+							
+							
+								cr_ep7_done_en
+								23
+								23
+							
+							
+								cr_ep7_cmd_en
+								22
+								22
+							
+							
+								cr_ep6_done_en
+								21
+								21
+							
+							
+								cr_ep6_cmd_en
+								20
+								20
+							
+							
+								cr_ep5_done_en
+								19
+								19
+							
+							
+								cr_ep5_cmd_en
+								18
+								18
+							
+							
+								cr_ep4_done_en
+								17
+								17
+							
+							
+								cr_ep4_cmd_en
+								16
+								16
+							
+							
+								cr_ep3_done_en
+								15
+								15
+							
+							
+								cr_ep3_cmd_en
+								14
+								14
+							
+							
+								cr_ep2_done_en
+								13
+								13
+							
+							
+								cr_ep2_cmd_en
+								12
+								12
+							
+							
+								cr_ep1_done_en
+								11
+								11
+							
+							
+								cr_ep1_cmd_en
+								10
+								10
+							
+							
+								cr_ep0_out_done_en
+								9
+								9
+							
+							
+								cr_ep0_out_cmd_en
+								8
+								8
+							
+							
+								cr_ep0_in_done_en
+								7
+								7
+							
+							
+								cr_ep0_in_cmd_en
+								6
+								6
+							
+							
+								cr_ep0_setup_done_en
+								5
+								5
+							
+							
+								cr_ep0_setup_cmd_en
+								4
+								4
+							
+							
+								cr_get_dct_cmd_en
+								3
+								3
+							
+							
+								cr_vbus_tgl_en
+								2
+								2
+							
+							
+								cr_usb_reset_en
+								1
+								1
+							
+							
+								cr_sof_en
+								0
+								0
+							
+						
+					
+					
+						usb_int_sts
+						USB interrupt status
+						0x24
+						
+							
+								usb_err_int
+								31
+								31
+							
+							
+								sof_3ms_int
+								30
+								30
+							
+							
+								lpm_pkt_int
+								29
+								29
+							
+							
+								lpm_wkup_int
+								28
+								28
+							
+							
+								rsvd_27_24
+								24
+								27
+							
+							
+								ep7_done_int
+								23
+								23
+							
+							
+								ep7_cmd_int
+								22
+								22
+							
+							
+								ep6_done_int
+								21
+								21
+							
+							
+								ep6_cmd_int
+								20
+								20
+							
+							
+								ep5_done_int
+								19
+								19
+							
+							
+								ep5_cmd_int
+								18
+								18
+							
+							
+								ep4_done_int
+								17
+								17
+							
+							
+								ep4_cmd_int
+								16
+								16
+							
+							
+								ep3_done_int
+								15
+								15
+							
+							
+								ep3_cmd_int
+								14
+								14
+							
+							
+								ep2_done_int
+								13
+								13
+							
+							
+								ep2_cmd_int
+								12
+								12
+							
+							
+								ep1_done_int
+								11
+								11
+							
+							
+								ep1_cmd_int
+								10
+								10
+							
+							
+								ep0_out_done_int
+								9
+								9
+							
+							
+								ep0_out_cmd_int
+								8
+								8
+							
+							
+								ep0_in_done_int
+								7
+								7
+							
+							
+								ep0_in_cmd_int
+								6
+								6
+							
+							
+								ep0_setup_done_int
+								5
+								5
+							
+							
+								ep0_setup_cmd_int
+								4
+								4
+							
+							
+								get_dct_cmd_int
+								3
+								3
+							
+							
+								vbus_tgl_int
+								2
+								2
+							
+							
+								usb_reset_int
+								1
+								1
+							
+							
+								sof_int
+								0
+								0
+							
+						
+					
+					
+						usb_int_mask
+						USB interrupt mask
+						0x28
+						
+							
+								cr_usb_err_mask
+								31
+								31
+							
+							
+								cr_sof_3ms_mask
+								30
+								30
+							
+							
+								cr_lpm_pkt_mask
+								29
+								29
+							
+							
+								cr_lpm_wkup_mask
+								28
+								28
+							
+							
+								rsvd_27_24
+								24
+								27
+							
+							
+								cr_ep7_done_mask
+								23
+								23
+							
+							
+								cr_ep7_cmd_mask
+								22
+								22
+							
+							
+								cr_ep6_done_mask
+								21
+								21
+							
+							
+								cr_ep6_cmd_mask
+								20
+								20
+							
+							
+								cr_ep5_done_mask
+								19
+								19
+							
+							
+								cr_ep5_cmd_mask
+								18
+								18
+							
+							
+								cr_ep4_done_mask
+								17
+								17
+							
+							
+								cr_ep4_cmd_mask
+								16
+								16
+							
+							
+								cr_ep3_done_mask
+								15
+								15
+							
+							
+								cr_ep3_cmd_mask
+								14
+								14
+							
+							
+								cr_ep2_done_mask
+								13
+								13
+							
+							
+								cr_ep2_cmd_mask
+								12
+								12
+							
+							
+								cr_ep1_done_mask
+								11
+								11
+							
+							
+								cr_ep1_cmd_mask
+								10
+								10
+							
+							
+								cr_ep0_out_done_mask
+								9
+								9
+							
+							
+								cr_ep0_out_cmd_mask
+								8
+								8
+							
+							
+								cr_ep0_in_done_mask
+								7
+								7
+							
+							
+								cr_ep0_in_cmd_mask
+								6
+								6
+							
+							
+								cr_ep0_setup_done_mask
+								5
+								5
+							
+							
+								cr_ep0_setup_cmd_mask
+								4
+								4
+							
+							
+								cr_get_dct_cmd_mask
+								3
+								3
+							
+							
+								cr_vbus_tgl_mask
+								2
+								2
+							
+							
+								cr_usb_reset_mask
+								1
+								1
+							
+							
+								cr_sof_mask
+								0
+								0
+							
+						
+					
+					
+						usb_int_clear
+						USB interrupt clear
+						0x2C
+						
+							
+								cr_usb_err_clr
+								31
+								31
+							
+							
+								cr_sof_3ms_clr
+								30
+								30
+							
+							
+								cr_lpm_pkt_clr
+								29
+								29
+							
+							
+								cr_lpm_wkup_clr
+								28
+								28
+							
+							
+								rsvd_27_24
+								24
+								27
+							
+							
+								cr_ep7_done_clr
+								23
+								23
+							
+							
+								cr_ep7_cmd_clr
+								22
+								22
+							
+							
+								cr_ep6_done_clr
+								21
+								21
+							
+							
+								cr_ep6_cmd_clr
+								20
+								20
+							
+							
+								cr_ep5_done_clr
+								19
+								19
+							
+							
+								cr_ep5_cmd_clr
+								18
+								18
+							
+							
+								cr_ep4_done_clr
+								17
+								17
+							
+							
+								cr_ep4_cmd_clr
+								16
+								16
+							
+							
+								cr_ep3_done_clr
+								15
+								15
+							
+							
+								cr_ep3_cmd_clr
+								14
+								14
+							
+							
+								cr_ep2_done_clr
+								13
+								13
+							
+							
+								cr_ep2_cmd_clr
+								12
+								12
+							
+							
+								cr_ep1_done_clr
+								11
+								11
+							
+							
+								cr_ep1_cmd_clr
+								10
+								10
+							
+							
+								cr_ep0_out_done_clr
+								9
+								9
+							
+							
+								cr_ep0_out_cmd_clr
+								8
+								8
+							
+							
+								cr_ep0_in_done_clr
+								7
+								7
+							
+							
+								cr_ep0_in_cmd_clr
+								6
+								6
+							
+							
+								cr_ep0_setup_done_clr
+								5
+								5
+							
+							
+								cr_ep0_setup_cmd_clr
+								4
+								4
+							
+							
+								cr_get_dct_cmd_clr
+								3
+								3
+							
+							
+								cr_vbus_tgl_clr
+								2
+								2
+							
+							
+								cr_usb_reset_clr
+								1
+								1
+							
+							
+								cr_sof_clr
+								0
+								0
+							
+						
+					
+					
+						ep1_config
+						ep1_config.
+						0x40
+						
+							
+								sts_ep1_rdy
+								19
+								19
+							
+							
+								cr_ep1_rdy
+								18
+								18
+							
+							
+								cr_ep1_nack
+								17
+								17
+							
+							
+								cr_ep1_stall
+								16
+								16
+							
+							
+								cr_ep1_type
+								13
+								15
+							
+							
+								cr_ep1_dir
+								11
+								12
+							
+							
+								cr_ep1_size
+								0
+								10
+							
+						
+					
+					
+						ep2_config
+						ep2_config.
+						0x44
+						
+							
+								sts_ep2_rdy
+								19
+								19
+							
+							
+								cr_ep2_rdy
+								18
+								18
+							
+							
+								cr_ep2_nack
+								17
+								17
+							
+							
+								cr_ep2_stall
+								16
+								16
+							
+							
+								cr_ep2_type
+								13
+								15
+							
+							
+								cr_ep2_dir
+								11
+								12
+							
+							
+								cr_ep2_size
+								0
+								10
+							
+						
+					
+					
+						ep3_config
+						ep3_config.
+						0x48
+						
+							
+								sts_ep3_rdy
+								19
+								19
+							
+							
+								cr_ep3_rdy
+								18
+								18
+							
+							
+								cr_ep3_nack
+								17
+								17
+							
+							
+								cr_ep3_stall
+								16
+								16
+							
+							
+								cr_ep3_type
+								13
+								15
+							
+							
+								cr_ep3_dir
+								11
+								12
+							
+							
+								cr_ep3_size
+								0
+								10
+							
+						
+					
+					
+						ep4_config
+						ep4_config.
+						0x4C
+						
+							
+								sts_ep4_rdy
+								19
+								19
+							
+							
+								cr_ep4_rdy
+								18
+								18
+							
+							
+								cr_ep4_nack
+								17
+								17
+							
+							
+								cr_ep4_stall
+								16
+								16
+							
+							
+								cr_ep4_type
+								13
+								15
+							
+							
+								cr_ep4_dir
+								11
+								12
+							
+							
+								cr_ep4_size
+								0
+								10
+							
+						
+					
+					
+						ep5_config
+						ep5_config.
+						0x50
+						
+							
+								sts_ep5_rdy
+								19
+								19
+							
+							
+								cr_ep5_rdy
+								18
+								18
+							
+							
+								cr_ep5_nack
+								17
+								17
+							
+							
+								cr_ep5_stall
+								16
+								16
+							
+							
+								cr_ep5_type
+								13
+								15
+							
+							
+								cr_ep5_dir
+								11
+								12
+							
+							
+								cr_ep5_size
+								0
+								10
+							
+						
+					
+					
+						ep6_config
+						ep6_config.
+						0x54
+						
+							
+								sts_ep6_rdy
+								19
+								19
+							
+							
+								cr_ep6_rdy
+								18
+								18
+							
+							
+								cr_ep6_nack
+								17
+								17
+							
+							
+								cr_ep6_stall
+								16
+								16
+							
+							
+								cr_ep6_type
+								13
+								15
+							
+							
+								cr_ep6_dir
+								11
+								12
+							
+							
+								cr_ep6_size
+								0
+								10
+							
+						
+					
+					
+						ep7_config
+						ep7_config.
+						0x58
+						
+							
+								sts_ep7_rdy
+								19
+								19
+							
+							
+								cr_ep7_rdy
+								18
+								18
+							
+							
+								cr_ep7_nack
+								17
+								17
+							
+							
+								cr_ep7_stall
+								16
+								16
+							
+							
+								cr_ep7_type
+								13
+								15
+							
+							
+								cr_ep7_dir
+								11
+								12
+							
+							
+								cr_ep7_size
+								0
+								10
+							
+						
+					
+					
+						ep0_fifo_config
+						ep0_fifo_config.
+						0x100
+						
+							
+								ep0_rx_fifo_underflow
+								7
+								7
+							
+							
+								ep0_rx_fifo_overflow
+								6
+								6
+							
+							
+								ep0_tx_fifo_underflow
+								5
+								5
+							
+							
+								ep0_tx_fifo_overflow
+								4
+								4
+							
+							
+								ep0_rx_fifo_clr
+								3
+								3
+							
+							
+								ep0_tx_fifo_clr
+								2
+								2
+							
+							
+								ep0_dma_rx_en
+								1
+								1
+							
+							
+								ep0_dma_tx_en
+								0
+								0
+							
+						
+					
+					
+						ep0_fifo_status
+						ep0_fifo_status.
+						0x104
+						
+							
+								ep0_rx_fifo_full
+								31
+								31
+							
+							
+								ep0_rx_fifo_empty
+								30
+								30
+							
+							
+								ep0_rx_fifo_cnt
+								16
+								22
+							
+							
+								ep0_tx_fifo_full
+								15
+								15
+							
+							
+								ep0_tx_fifo_empty
+								14
+								14
+							
+							
+								ep0_tx_fifo_cnt
+								0
+								6
+							
+						
+					
+					
+						ep0_tx_fifo_wdata
+						ep0_tx_fifo_wdata.
+						0x108
+						
+							
+								ep0_tx_fifo_wdata
+								0
+								7
+							
+						
+					
+					
+						ep0_rx_fifo_rdata
+						ep0_rx_fifo_rdata.
+						0x10C
+						
+							
+								ep0_rx_fifo_rdata
+								0
+								7
+							
+						
+					
+					
+						ep1_fifo_config
+						ep1_fifo_config.
+						0x110
+						
+							
+								ep1_rx_fifo_underflow
+								7
+								7
+							
+							
+								ep1_rx_fifo_overflow
+								6
+								6
+							
+							
+								ep1_tx_fifo_underflow
+								5
+								5
+							
+							
+								ep1_tx_fifo_overflow
+								4
+								4
+							
+							
+								ep1_rx_fifo_clr
+								3
+								3
+							
+							
+								ep1_tx_fifo_clr
+								2
+								2
+							
+							
+								ep1_dma_rx_en
+								1
+								1
+							
+							
+								ep1_dma_tx_en
+								0
+								0
+							
+						
+					
+					
+						ep1_fifo_status
+						ep1_fifo_status.
+						0x114
+						
+							
+								ep1_rx_fifo_full
+								31
+								31
+							
+							
+								ep1_rx_fifo_empty
+								30
+								30
+							
+							
+								ep1_rx_fifo_cnt
+								16
+								22
+							
+							
+								ep1_tx_fifo_full
+								15
+								15
+							
+							
+								ep1_tx_fifo_empty
+								14
+								14
+							
+							
+								ep1_tx_fifo_cnt
+								0
+								6
+							
+						
+					
+					
+						ep1_tx_fifo_wdata
+						ep1_tx_fifo_wdata.
+						0x118
+						
+							
+								ep1_tx_fifo_wdata
+								0
+								7
+							
+						
+					
+					
+						ep1_rx_fifo_rdata
+						ep1_rx_fifo_rdata.
+						0x11C
+						
+							
+								ep1_rx_fifo_rdata
+								0
+								7
+							
+						
+					
+					
+						ep2_fifo_config
+						ep2_fifo_config.
+						0x120
+						
+							
+								ep2_rx_fifo_underflow
+								7
+								7
+							
+							
+								ep2_rx_fifo_overflow
+								6
+								6
+							
+							
+								ep2_tx_fifo_underflow
+								5
+								5
+							
+							
+								ep2_tx_fifo_overflow
+								4
+								4
+							
+							
+								ep2_rx_fifo_clr
+								3
+								3
+							
+							
+								ep2_tx_fifo_clr
+								2
+								2
+							
+							
+								ep2_dma_rx_en
+								1
+								1
+							
+							
+								ep2_dma_tx_en
+								0
+								0
+							
+						
+					
+					
+						ep2_fifo_status
+						ep2_fifo_status.
+						0x124
+						
+							
+								ep2_rx_fifo_full
+								31
+								31
+							
+							
+								ep2_rx_fifo_empty
+								30
+								30
+							
+							
+								ep2_rx_fifo_cnt
+								16
+								22
+							
+							
+								ep2_tx_fifo_full
+								15
+								15
+							
+							
+								ep2_tx_fifo_empty
+								14
+								14
+							
+							
+								ep2_tx_fifo_cnt
+								0
+								6
+							
+						
+					
+					
+						ep2_tx_fifo_wdata
+						ep2_tx_fifo_wdata.
+						0x128
+						
+							
+								ep2_tx_fifo_wdata
+								0
+								7
+							
+						
+					
+					
+						ep2_rx_fifo_rdata
+						ep2_rx_fifo_rdata.
+						0x12C
+						
+							
+								ep2_rx_fifo_rdata
+								0
+								7
+							
+						
+					
+					
+						ep3_fifo_config
+						ep3_fifo_config.
+						0x130
+						
+							
+								ep3_rx_fifo_underflow
+								7
+								7
+							
+							
+								ep3_rx_fifo_overflow
+								6
+								6
+							
+							
+								ep3_tx_fifo_underflow
+								5
+								5
+							
+							
+								ep3_tx_fifo_overflow
+								4
+								4
+							
+							
+								ep3_rx_fifo_clr
+								3
+								3
+							
+							
+								ep3_tx_fifo_clr
+								2
+								2
+							
+							
+								ep3_dma_rx_en
+								1
+								1
+							
+							
+								ep3_dma_tx_en
+								0
+								0
+							
+						
+					
+					
+						ep3_fifo_status
+						ep3_fifo_status.
+						0x134
+						
+							
+								ep3_rx_fifo_full
+								31
+								31
+							
+							
+								ep3_rx_fifo_empty
+								30
+								30
+							
+							
+								ep3_rx_fifo_cnt
+								16
+								22
+							
+							
+								ep3_tx_fifo_full
+								15
+								15
+							
+							
+								ep3_tx_fifo_empty
+								14
+								14
+							
+							
+								ep3_tx_fifo_cnt
+								0
+								6
+							
+						
+					
+					
+						ep3_tx_fifo_wdata
+						ep3_tx_fifo_wdata.
+						0x138
+						
+							
+								ep3_tx_fifo_wdata
+								0
+								7
+							
+						
+					
+					
+						ep3_rx_fifo_rdata
+						ep3_rx_fifo_rdata.
+						0x13C
+						
+							
+								ep3_rx_fifo_rdata
+								0
+								7
+							
+						
+					
+					
+						ep4_fifo_config
+						ep4_fifo_config.
+						0x140
+						
+							
+								ep4_rx_fifo_underflow
+								7
+								7
+							
+							
+								ep4_rx_fifo_overflow
+								6
+								6
+							
+							
+								ep4_tx_fifo_underflow
+								5
+								5
+							
+							
+								ep4_tx_fifo_overflow
+								4
+								4
+							
+							
+								ep4_rx_fifo_clr
+								3
+								3
+							
+							
+								ep4_tx_fifo_clr
+								2
+								2
+							
+							
+								ep4_dma_rx_en
+								1
+								1
+							
+							
+								ep4_dma_tx_en
+								0
+								0
+							
+						
+					
+					
+						ep4_fifo_status
+						ep4_fifo_status.
+						0x144
+						
+							
+								ep4_rx_fifo_full
+								31
+								31
+							
+							
+								ep4_rx_fifo_empty
+								30
+								30
+							
+							
+								ep4_rx_fifo_cnt
+								16
+								22
+							
+							
+								ep4_tx_fifo_full
+								15
+								15
+							
+							
+								ep4_tx_fifo_empty
+								14
+								14
+							
+							
+								ep4_tx_fifo_cnt
+								0
+								6
+							
+						
+					
+					
+						ep4_tx_fifo_wdata
+						ep4_tx_fifo_wdata.
+						0x148
+						
+							
+								ep4_tx_fifo_wdata
+								0
+								7
+							
+						
+					
+					
+						ep4_rx_fifo_rdata
+						ep4_rx_fifo_rdata.
+						0x14C
+						
+							
+								ep4_rx_fifo_rdata
+								0
+								7
+							
+						
+					
+					
+						ep5_fifo_config
+						ep5_fifo_config.
+						0x150
+						
+							
+								ep5_rx_fifo_underflow
+								7
+								7
+							
+							
+								ep5_rx_fifo_overflow
+								6
+								6
+							
+							
+								ep5_tx_fifo_underflow
+								5
+								5
+							
+							
+								ep5_tx_fifo_overflow
+								4
+								4
+							
+							
+								ep5_rx_fifo_clr
+								3
+								3
+							
+							
+								ep5_tx_fifo_clr
+								2
+								2
+							
+							
+								ep5_dma_rx_en
+								1
+								1
+							
+							
+								ep5_dma_tx_en
+								0
+								0
+							
+						
+					
+					
+						ep5_fifo_status
+						ep5_fifo_status.
+						0x154
+						
+							
+								ep5_rx_fifo_full
+								31
+								31
+							
+							
+								ep5_rx_fifo_empty
+								30
+								30
+							
+							
+								ep5_rx_fifo_cnt
+								16
+								22
+							
+							
+								ep5_tx_fifo_full
+								15
+								15
+							
+							
+								ep5_tx_fifo_empty
+								14
+								14
+							
+							
+								ep5_tx_fifo_cnt
+								0
+								6
+							
+						
+					
+					
+						ep5_tx_fifo_wdata
+						ep5_tx_fifo_wdata.
+						0x158
+						
+							
+								ep5_tx_fifo_wdata
+								0
+								7
+							
+						
+					
+					
+						ep5_rx_fifo_rdata
+						ep5_rx_fifo_rdata.
+						0x15C
+						
+							
+								ep5_rx_fifo_rdata
+								0
+								7
+							
+						
+					
+					
+						ep6_fifo_config
+						ep6_fifo_config.
+						0x160
+						
+							
+								ep6_rx_fifo_underflow
+								7
+								7
+							
+							
+								ep6_rx_fifo_overflow
+								6
+								6
+							
+							
+								ep6_tx_fifo_underflow
+								5
+								5
+							
+							
+								ep6_tx_fifo_overflow
+								4
+								4
+							
+							
+								ep6_rx_fifo_clr
+								3
+								3
+							
+							
+								ep6_tx_fifo_clr
+								2
+								2
+							
+							
+								ep6_dma_rx_en
+								1
+								1
+							
+							
+								ep6_dma_tx_en
+								0
+								0
+							
+						
+					
+					
+						ep6_fifo_status
+						ep6_fifo_status.
+						0x164
+						
+							
+								ep6_rx_fifo_full
+								31
+								31
+							
+							
+								ep6_rx_fifo_empty
+								30
+								30
+							
+							
+								ep6_rx_fifo_cnt
+								16
+								22
+							
+							
+								ep6_tx_fifo_full
+								15
+								15
+							
+							
+								ep6_tx_fifo_empty
+								14
+								14
+							
+							
+								ep6_tx_fifo_cnt
+								0
+								6
+							
+						
+					
+					
+						ep6_tx_fifo_wdata
+						ep6_tx_fifo_wdata.
+						0x168
+						
+							
+								ep6_tx_fifo_wdata
+								0
+								7
+							
+						
+					
+					
+						ep6_rx_fifo_rdata
+						ep6_rx_fifo_rdata.
+						0x16C
+						
+							
+								ep6_rx_fifo_rdata
+								0
+								7
+							
+						
+					
+					
+						ep7_fifo_config
+						ep7_fifo_config.
+						0x170
+						
+							
+								ep7_rx_fifo_underflow
+								7
+								7
+							
+							
+								ep7_rx_fifo_overflow
+								6
+								6
+							
+							
+								ep7_tx_fifo_underflow
+								5
+								5
+							
+							
+								ep7_tx_fifo_overflow
+								4
+								4
+							
+							
+								ep7_rx_fifo_clr
+								3
+								3
+							
+							
+								ep7_tx_fifo_clr
+								2
+								2
+							
+							
+								ep7_dma_rx_en
+								1
+								1
+							
+							
+								ep7_dma_tx_en
+								0
+								0
+							
+						
+					
+					
+						ep7_fifo_status
+						ep7_fifo_status.
+						0x174
+						
+							
+								ep7_rx_fifo_full
+								31
+								31
+							
+							
+								ep7_rx_fifo_empty
+								30
+								30
+							
+							
+								ep7_rx_fifo_cnt
+								16
+								22
+							
+							
+								ep7_tx_fifo_full
+								15
+								15
+							
+							
+								ep7_tx_fifo_empty
+								14
+								14
+							
+							
+								ep7_tx_fifo_cnt
+								0
+								6
+							
+						
+					
+					
+						ep7_tx_fifo_wdata
+						ep7_tx_fifo_wdata.
+						0x178
+						
+							
+								ep7_tx_fifo_wdata
+								0
+								7
+							
+						
+					
+					
+						ep7_rx_fifo_rdata
+						ep7_rx_fifo_rdata.
+						0x17C
+						
+							
+								ep7_rx_fifo_rdata
+								0
+								7
+							
+						
+					
+					
+						rsvd_0
+						rsvd_0.
+						0x1F0
+						
+							
+								rsvd_0
+								0
+								31
+							
+						
+					
+					
+						rsvd_1
+						rsvd_1.
+						0x1F4
+						
+							
+								rsvd_1
+								0
+								31
+							
+						
+					
+					
+						xcvr_if_config
+						xcvr_if_config.
+						0x1FC
+						
+							
+								sts_vbus_det
+								31
+								31
+							
+							
+								cr_xcvr_om_rx_dn
+								11
+								11
+							
+							
+								cr_xcvr_om_rx_dp
+								10
+								10
+							
+							
+								cr_xcvr_om_rx_d
+								9
+								9
+							
+							
+								cr_xcvr_om_rx_sel
+								8
+								8
+							
+							
+								cr_xcvr_force_rx_dn
+								7
+								7
+							
+							
+								cr_xcvr_force_rx_dp
+								6
+								6
+							
+							
+								cr_xcvr_force_rx_d
+								5
+								5
+							
+							
+								cr_xcvr_force_rx_en
+								4
+								4
+							
+							
+								cr_xcvr_force_tx_dn
+								3
+								3
+							
+							
+								cr_xcvr_force_tx_dp
+								2
+								2
+							
+							
+								cr_xcvr_force_tx_oe
+								1
+								1
+							
+							
+								cr_xcvr_force_tx_en
+								0
+								0
+							
+						
+					
+				
+			
+			
+				pds
+				pds.
+				0x4000E000
+				pds
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						PDS_CTL
+						PDS_CTL.
+						0x0
+						
+							
+								cr_pds_ctrl_pll
+								30
+								31
+							
+							
+								cr_pds_ctrl_rf
+								28
+								29
+							
+							
+								cr_pds_ldo_vol
+								24
+								27
+							
+							
+								cr_pds_force_ram_clk_en
+								23
+								23
+							
+							
+								cr_pds_pd_ldo11
+								22
+								22
+							
+							
+								cr_np_wfi_mask
+								21
+								21
+							
+							
+								cr_pds_ram_lp_with_clk_en
+								19
+								19
+							
+							
+								cr_pds_ldo_vsel_en
+								18
+								18
+							
+							
+								cr_pds_rc32m_off_dis
+								17
+								17
+							
+							
+								cr_pds_rst_soc_en
+								16
+								16
+							
+							
+								cr_pds_soc_enb_force_on
+								15
+								15
+							
+							
+								cr_pds_pd_xtal
+								14
+								14
+							
+							
+								cr_pds_pwr_off
+								13
+								13
+							
+							
+								cr_pds_wait_xtal_rdy
+								12
+								12
+							
+							
+								cr_pds_iso_en
+								11
+								11
+							
+							
+								cr_sw_pu_flash
+								10
+								10
+							
+							
+								cr_pds_mem_stby
+								9
+								9
+							
+							
+								cr_pds_gate_clk
+								8
+								8
+							
+							
+								cr_pds_ctrl_pu_flash
+								7
+								7
+							
+							
+								cr_pds_ctrl_gpio_ie_pu_pd
+								6
+								6
+							
+							
+								cr_pds_pd_bg_sys
+								5
+								5
+							
+							
+								cr_pds_pd_dcdc18
+								4
+								4
+							
+							
+								cr_wifi_pds_save_state
+								3
+								3
+							
+							
+								cr_xtal_force_off
+								2
+								2
+							
+							
+								cr_sleep_forever
+								1
+								1
+							
+							
+								pds_start_ps
+								0
+								0
+							
+						
+					
+					
+						PDS_TIME1
+						PDS_TIME1.
+						0x4
+						
+							
+								cr_sleep_duration
+								0
+								31
+							
+						
+					
+					
+						PDS_INT
+						PDS_INT.
+						0xC
+						
+							
+								ro_pds_wakeup_event
+								24
+								31
+							
+							
+								cr_pds_wakeup_src_en
+								16
+								23
+							
+							
+								cr_pds_int_clr
+								15
+								15
+							
+							
+								cr_pds_pll_done_int_mask
+								11
+								11
+							
+							
+								cr_pds_rf_done_int_mask
+								10
+								10
+							
+							
+								cr_pds_wake_int_mask
+								8
+								8
+							
+							
+								pds_clr_reset_event
+								7
+								7
+							
+							
+								pds_reset_event
+								4
+								6
+							
+							
+								ro_pds_pll_done_int
+								3
+								3
+							
+							
+								ro_pds_rf_done_int
+								2
+								2
+							
+							
+								ro_pds_wake_int
+								0
+								0
+							
+						
+					
+					
+						PDS_CTL2
+						PDS_CTL2.
+						0x10
+						
+							
+								cr_pds_force_usb_gate_clk
+								19
+								19
+							
+							
+								cr_pds_force_bz_gate_clk
+								18
+								18
+							
+							
+								cr_pds_force_np_gate_clk
+								16
+								16
+							
+							
+								cr_pds_force_usb_mem_stby
+								15
+								15
+							
+							
+								cr_pds_force_bz_mem_stby
+								14
+								14
+							
+							
+								cr_pds_force_np_mem_stby
+								12
+								12
+							
+							
+								cr_pds_force_usb_pds_rst
+								11
+								11
+							
+							
+								cr_pds_force_bz_pds_rst
+								10
+								10
+							
+							
+								cr_pds_force_np_pds_rst
+								8
+								8
+							
+							
+								cr_pds_force_usb_iso_en
+								7
+								7
+							
+							
+								cr_pds_force_bz_iso_en
+								6
+								6
+							
+							
+								cr_pds_force_np_iso_en
+								4
+								4
+							
+							
+								cr_pds_force_usb_pwr_off
+								3
+								3
+							
+							
+								cr_pds_force_bz_pwr_off
+								2
+								2
+							
+							
+								cr_pds_force_np_pwr_off
+								0
+								0
+							
+						
+					
+					
+						PDS_CTL3
+						PDS_CTL3.
+						0x14
+						
+							
+								cr_pds_misc_iso_en
+								30
+								30
+							
+							
+								cr_pds_usb_iso_en
+								29
+								29
+							
+							
+								cr_pds_ble_iso_en
+								28
+								28
+							
+							
+								cr_pds_bz_iso_en
+								27
+								27
+							
+							
+								cr_pds_np_iso_en
+								24
+								24
+							
+							
+								cr_pds_force_ble_gate_clk
+								14
+								14
+							
+							
+								cr_pds_force_misc_gate_clk
+								13
+								13
+							
+							
+								cr_pds_force_ble_mem_stby
+								11
+								11
+							
+							
+								cr_pds_force_misc_mem_stby
+								10
+								10
+							
+							
+								cr_pds_force_ble_pds_rst
+								8
+								8
+							
+							
+								cr_pds_force_misc_pds_rst
+								7
+								7
+							
+							
+								cr_pds_force_ble_iso_en
+								5
+								5
+							
+							
+								cr_pds_force_ble_pwr_off
+								2
+								2
+							
+							
+								cr_pds_force_misc_pwr_off
+								1
+								1
+							
+						
+					
+					
+						PDS_CTL4
+						PDS_CTL4.
+						0x18
+						
+							
+								cr_pds_misc_dig_pwr_off
+								31
+								31
+							
+							
+								cr_pds_misc_ana_pwr_off
+								30
+								30
+							
+							
+								cr_pds_misc_gate_clk
+								27
+								27
+							
+							
+								cr_pds_misc_mem_stby
+								26
+								26
+							
+							
+								cr_pds_misc_reset
+								25
+								25
+							
+							
+								cr_pds_misc_pwr_off
+								24
+								24
+							
+							
+								cr_pds_usb_gate_clk
+								23
+								23
+							
+							
+								cr_pds_usb_mem_stby
+								22
+								22
+							
+							
+								cr_pds_usb_reset
+								21
+								21
+							
+							
+								cr_pds_usb_pwr_off
+								20
+								20
+							
+							
+								cr_pds_ble_gate_clk
+								19
+								19
+							
+							
+								cr_pds_ble_mem_stby
+								18
+								18
+							
+							
+								cr_pds_ble_reset
+								17
+								17
+							
+							
+								cr_pds_ble_pwr_off
+								16
+								16
+							
+							
+								cr_pds_bz_gate_clk
+								15
+								15
+							
+							
+								cr_pds_bz_mem_stby
+								14
+								14
+							
+							
+								cr_pds_bz_reset
+								13
+								13
+							
+							
+								cr_pds_bz_pwr_off
+								12
+								12
+							
+							
+								cr_pds_np_gate_clk
+								3
+								3
+							
+							
+								cr_pds_np_mem_stby
+								2
+								2
+							
+							
+								cr_pds_np_reset
+								1
+								1
+							
+							
+								cr_pds_np_pwr_off
+								0
+								0
+							
+						
+					
+					
+						pds_stat
+						pds_stat.
+						0x1C
+						
+							
+								ro_pds_pll_state
+								16
+								17
+							
+							
+								ro_pds_rf_state
+								8
+								11
+							
+							
+								ro_pds_state
+								0
+								3
+							
+						
+					
+					
+						pds_ram1
+						pds_ram1.
+						0x20
+						
+							
+								cr_pds_ram_pgen
+								8
+								11
+							
+							
+								cr_pds_ram_ret2n
+								4
+								7
+							
+							
+								cr_pds_ram_ret1n
+								0
+								3
+							
+						
+					
+					
+						pds_gpio_set_pu_pd
+						pds_gpio_set_pu_pd.
+						0x30
+						
+							
+								cr_pds_gpio_28_23_pu
+								24
+								29
+							
+							
+								cr_pds_gpio_28_23_pd
+								16
+								21
+							
+							
+								cr_pds_gpio_22_17_pu
+								8
+								13
+							
+							
+								cr_pds_gpio_22_17_pd
+								0
+								5
+							
+						
+					
+					
+						pds_gpio_int
+						pds_gpio_int.
+						0x40
+						
+							
+								pds_gpio_int_select
+								8
+								10
+							
+							
+								pds_gpio_int_mode
+								4
+								6
+							
+							
+								pds_gpio_int_clr
+								2
+								2
+							
+							
+								pds_gpio_int_stat
+								1
+								1
+							
+							
+								pds_gpio_int_mask
+								0
+								0
+							
+						
+					
+					
+						rc32m_ctrl0
+						rc32m_ctrl0.
+						0x300
+						
+							
+								rc32m_code_fr_ext
+								22
+								29
+							
+							
+								rc32m_pd
+								21
+								21
+							
+							
+								rc32m_cal_en
+								20
+								20
+							
+							
+								rc32m_ext_code_en
+								19
+								19
+							
+							
+								rc32m_refclk_half
+								18
+								18
+							
+							
+								rc32m_allow_cal
+								17
+								17
+							
+							
+								rc32m_dig_code_fr_cal
+								6
+								13
+							
+							
+								rc32m_cal_precharge
+								5
+								5
+							
+							
+								rc32m_cal_div
+								3
+								4
+							
+							
+								rc32m_cal_inprogress
+								2
+								2
+							
+							
+								rc32m_rdy
+								1
+								1
+							
+							
+								rc32m_cal_done
+								0
+								0
+							
+						
+					
+					
+						rc32m_ctrl1
+						rc32m_ctrl1.
+						0x304
+						
+							
+								rc32m_reserved
+								24
+								31
+							
+							
+								rc32m_clk_force_on
+								4
+								4
+							
+							
+								rc32m_clk_inv
+								3
+								3
+							
+							
+								rc32m_clk_soft_rst
+								2
+								2
+							
+							
+								rc32m_soft_rst
+								1
+								1
+							
+							
+								rc32m_test_en
+								0
+								0
+							
+						
+					
+					
+						pu_rst_clkpll
+						pu_rst_clkpll.
+						0x400
+						
+							
+								pu_clkpll
+								10
+								10
+							
+							
+								pu_clkpll_sfreg
+								9
+								9
+							
+							
+								clkpll_pu_cp
+								8
+								8
+							
+							
+								clkpll_pu_pfd
+								7
+								7
+							
+							
+								clkpll_pu_clamp_op
+								6
+								6
+							
+							
+								clkpll_pu_fbdv
+								5
+								5
+							
+							
+								clkpll_pu_postdiv
+								4
+								4
+							
+							
+								clkpll_reset_refdiv
+								3
+								3
+							
+							
+								clkpll_reset_fbdv
+								2
+								2
+							
+							
+								clkpll_reset_postdiv
+								1
+								1
+							
+							
+								clkpll_sdm_reset
+								0
+								0
+							
+						
+					
+					
+						clkpll_top_ctrl
+						clkpll_top_ctrl.
+						0x404
+						
+							
+								clkpll_resv
+								24
+								25
+							
+							
+								clkpll_vg11_sel
+								20
+								21
+							
+							
+								clkpll_refclk_sel
+								16
+								16
+							
+							
+								clkpll_xtal_rc32m_sel
+								12
+								12
+							
+							
+								clkpll_refdiv_ratio
+								8
+								11
+							
+							
+								clkpll_postdiv
+								0
+								6
+							
+						
+					
+					
+						clkpll_cp
+						clkpll_cp.
+						0x408
+						
+							
+								clkpll_cp_opamp_en
+								10
+								10
+							
+							
+								clkpll_cp_startup_en
+								9
+								9
+							
+							
+								clkpll_int_frac_sw
+								8
+								8
+							
+							
+								clkpll_icp_1u
+								6
+								7
+							
+							
+								clkpll_icp_5u
+								4
+								5
+							
+							
+								clkpll_sel_cp_bias
+								0
+								0
+							
+						
+					
+					
+						clkpll_rz
+						clkpll_rz.
+						0x40C
+						
+							
+								clkpll_rz
+								16
+								18
+							
+							
+								clkpll_cz
+								14
+								15
+							
+							
+								clkpll_c3
+								12
+								13
+							
+							
+								clkpll_r4_short
+								8
+								8
+							
+							
+								clkpll_r4
+								4
+								5
+							
+							
+								clkpll_c4_en
+								0
+								0
+							
+						
+					
+					
+						clkpll_fbdv
+						clkpll_fbdv.
+						0x410
+						
+							
+								clkpll_sel_fb_clk
+								2
+								3
+							
+							
+								clkpll_sel_sample_clk
+								0
+								1
+							
+						
+					
+					
+						clkpll_vco
+						clkpll_vco.
+						0x414
+						
+							
+								clkpll_shrtr
+								3
+								3
+							
+							
+								clkpll_vco_speed
+								0
+								2
+							
+						
+					
+					
+						clkpll_sdm
+						clkpll_sdm.
+						0x418
+						
+							
+								clkpll_sdm_bypass
+								29
+								29
+							
+							
+								clkpll_sdm_flag
+								28
+								28
+							
+							
+								clkpll_dither_sel
+								24
+								25
+							
+							
+								clkpll_sdmin
+								0
+								23
+							
+						
+					
+					
+						clkpll_output_en
+						clkpll_output_en.
+						0x41C
+						
+							
+								clkpll_en_div2_480m
+								9
+								9
+							
+							
+								clkpll_en_32m
+								8
+								8
+							
+							
+								clkpll_en_48m
+								7
+								7
+							
+							
+								clkpll_en_80m
+								6
+								6
+							
+							
+								clkpll_en_96m
+								5
+								5
+							
+							
+								clkpll_en_120m
+								4
+								4
+							
+							
+								clkpll_en_160m
+								3
+								3
+							
+							
+								clkpll_en_192m
+								2
+								2
+							
+							
+								clkpll_en_240m
+								1
+								1
+							
+							
+								clkpll_en_480m
+								0
+								0
+							
+						
+					
+					
+						clkpll_test_enable
+						clkpll_test_enable.
+						0x420
+						
+							
+								clkpll_dc_tp_out_en
+								8
+								8
+							
+							
+								ten_clkpll
+								7
+								7
+							
+							
+								ten_clkpll_sfreg
+								6
+								6
+							
+							
+								dten_clkpll_fin
+								5
+								5
+							
+							
+								dten_clkpll_fref
+								4
+								4
+							
+							
+								dten_clkpll_fsdm
+								3
+								3
+							
+							
+								dten_clk32M
+								2
+								2
+							
+							
+								dten_clk96M
+								1
+								1
+							
+							
+								dten_clkpll_postdiv_clk
+								0
+								0
+							
+						
+					
+				
+			
+			
+				HBN
+				HBN.
+				0x4000F000
+				HBN
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						HBN_CTL
+						HBN_CTL.
+						0x0
+						
+							
+								hbn_state
+								28
+								31
+							
+							
+								sram_slp
+								27
+								27
+							
+							
+								sram_slp_option
+								26
+								26
+							
+							
+								pwr_on_option
+								25
+								25
+							
+							
+								rtc_dly_option
+								24
+								24
+							
+							
+								pu_dcdc18_aon
+								23
+								23
+							
+							
+								hbn_ldo11_aon_vout_sel
+								19
+								22
+							
+							
+								hbn_ldo11_rt_vout_sel
+								15
+								18
+							
+							
+								hbn_dis_pwr_off_ldo11_rt
+								14
+								14
+							
+							
+								hbn_dis_pwr_off_ldo11
+								13
+								13
+							
+							
+								sw_rst
+								12
+								12
+							
+							
+								pwrdn_hbn_rtc
+								11
+								11
+							
+							
+								pwrdn_hbn_core
+								9
+								9
+							
+							
+								trap_mode
+								8
+								8
+							
+							
+								hbn_mode
+								7
+								7
+							
+							
+								rtc_ctl
+								0
+								6
+							
+						
+					
+					
+						HBN_TIME_L
+						HBN_TIME_L.
+						0x4
+						
+							
+								hbn_time_l
+								0
+								31
+							
+						
+					
+					
+						HBN_TIME_H
+						HBN_TIME_H.
+						0x8
+						
+							
+								hbn_time_h
+								0
+								7
+							
+						
+					
+					
+						RTC_TIME_L
+						RTC_TIME_L.
+						0xC
+						
+							
+								rtc_time_latch_l
+								0
+								31
+							
+						
+					
+					
+						RTC_TIME_H
+						RTC_TIME_H.
+						0x10
+						
+							
+								rtc_time_latch
+								31
+								31
+							
+							
+								rtc_time_latch_h
+								0
+								7
+							
+						
+					
+					
+						HBN_IRQ_MODE
+						HBN_IRQ_MODE.
+						0x14
+						
+							
+								pin_wakeup_en
+								27
+								27
+							
+							
+								pin_wakeup_sel
+								24
+								26
+							
+							
+								irq_acomp1_en
+								22
+								23
+							
+							
+								irq_acomp0_en
+								20
+								21
+							
+							
+								irq_bor_en
+								18
+								18
+							
+							
+								reg_en_hw_pu_pd
+								16
+								16
+							
+							
+								reg_aon_pad_ie_smt
+								8
+								12
+							
+							
+								hbn_pin_wakeup_mask
+								3
+								7
+							
+							
+								hbn_pin_wakeup_mode
+								0
+								2
+							
+						
+					
+					
+						HBN_IRQ_STAT
+						HBN_IRQ_STAT.
+						0x18
+						
+							
+								irq_stat
+								0
+								31
+							
+						
+					
+					
+						HBN_IRQ_CLR
+						HBN_IRQ_CLR.
+						0x1C
+						
+							
+								irq_clr
+								0
+								31
+							
+						
+					
+					
+						HBN_PIR_CFG
+						HBN_PIR_CFG.
+						0x20
+						
+							
+								gpadc_nosync
+								9
+								9
+							
+							
+								gpadc_cgen
+								8
+								8
+							
+							
+								pir_en
+								7
+								7
+							
+							
+								pir_dis
+								4
+								5
+							
+							
+								pir_lpf_sel
+								2
+								2
+							
+							
+								pir_hpf_sel
+								0
+								1
+							
+						
+					
+					
+						HBN_PIR_VTH
+						HBN_PIR_VTH.
+						0x24
+						
+							
+								pir_vth
+								0
+								13
+							
+						
+					
+					
+						HBN_PIR_INTERVAL
+						HBN_PIR_INTERVAL.
+						0x28
+						
+							
+								pir_interval
+								0
+								11
+							
+						
+					
+					
+						HBN_MISC
+						HBN_MISC.
+						0x2C
+						
+							
+								hbn_flash_pulldown_aon
+								24
+								29
+							
+							
+								hbn_flash_pullup_aon
+								16
+								21
+							
+							
+								r_bor_out
+								3
+								3
+							
+							
+								pu_bor
+								2
+								2
+							
+							
+								bor_vth
+								1
+								1
+							
+							
+								bor_sel
+								0
+								0
+							
+						
+					
+					
+						HBN_GLB
+						HBN_GLB.
+						0x30
+						
+							
+								sw_ldo11_aon_vout_sel
+								28
+								31
+							
+							
+								sw_ldo11_rt_vout_sel
+								24
+								27
+							
+							
+								sw_ldo11soc_vout_sel_aon
+								16
+								19
+							
+							
+								hbn_clear_reset_event
+								13
+								13
+							
+							
+								hbn_reset_event
+								8
+								12
+							
+							
+								ldo11_rt_iload_sel
+								6
+								7
+							
+							
+								hbn_pu_rc32k
+								5
+								5
+							
+							
+								hbn_f32k_sel
+								3
+								4
+							
+							
+								hbn_uart_clk_sel
+								2
+								2
+							
+							
+								hbn_root_clk_sel
+								0
+								1
+							
+						
+					
+					
+						HBN_SRAM
+						HBN_SRAM.
+						0x34
+						
+							
+								retram_slp
+								7
+								7
+							
+							
+								retram_ret
+								6
+								6
+							
+							
+								retram_emaw
+								3
+								4
+							
+							
+								retram_ema
+								0
+								2
+							
+						
+					
+					
+						HBN_RSV0
+						HBN_RSV0.
+						0x100
+						
+							
+								HBN_RSV0
+								0
+								31
+							
+						
+					
+					
+						HBN_RSV1
+						HBN_RSV1.
+						0x104
+						
+							
+								HBN_RSV1
+								0
+								31
+							
+						
+					
+					
+						HBN_RSV2
+						HBN_RSV2.
+						0x108
+						
+							
+								HBN_RSV2
+								0
+								31
+							
+						
+					
+					
+						HBN_RSV3
+						HBN_RSV3.
+						0x10C
+						
+							
+								HBN_RSV3
+								0
+								31
+							
+						
+					
+					
+						rc32k_ctrl0
+						rc32k_ctrl0.
+						0x200
+						
+							
+								rc32k_code_fr_ext
+								22
+								31
+							
+							
+								rc32k_cal_en
+								20
+								20
+							
+							
+								rc32k_ext_code_en
+								19
+								19
+							
+							
+								rc32k_allow_cal
+								18
+								18
+							
+							
+								rc32k_vref_dly
+								16
+								17
+							
+							
+								rc32k_dig_code_fr_cal
+								6
+								15
+							
+							
+								rc32k_cal_precharge
+								5
+								5
+							
+							
+								rc32k_cal_div
+								3
+								4
+							
+							
+								rc32k_cal_inprogress
+								2
+								2
+							
+							
+								rc32k_rdy
+								1
+								1
+							
+							
+								rc32k_cal_done
+								0
+								0
+							
+						
+					
+					
+						xtal32k
+						xtal32k.
+						0x204
+						
+							
+								pu_xtal32k
+								19
+								19
+							
+							
+								pu_xtal32k_buf
+								18
+								18
+							
+							
+								xtal32k_ac_cap_short
+								17
+								17
+							
+							
+								xtal32k_capbank
+								11
+								16
+							
+							
+								xtal32k_inv_stre
+								9
+								10
+							
+							
+								xtal32k_otf_short
+								8
+								8
+							
+							
+								xtal32k_outbuf_stre
+								7
+								7
+							
+							
+								xtal32k_reg
+								5
+								6
+							
+							
+								xtal32k_amp_ctrl
+								3
+								4
+							
+							
+								xtal32k_ext_sel
+								2
+								2
+							
+							
+								xtal32k_lowv_en
+								1
+								1
+							
+							
+								xtal32k_hiz_en
+								0
+								0
+							
+						
+					
+				
+			
+			
+				AON
+				AON.
+				
+				AON
+				32
+				read-write
+				
+					0
+					0x1000
+					registers
+				
+				
+					
+						aon
+						aon.
+						0x800
+						
+							
+								sw_pu_ldo11_rt
+								22
+								22
+							
+							
+								ldo11_rt_pulldown_sel
+								21
+								21
+							
+							
+								ldo11_rt_pulldown
+								20
+								20
+							
+							
+								pu_aon_dc_tbuf
+								12
+								12
+							
+							
+								aon_resv
+								0
+								7
+							
+						
+					
+					
+						aon_common
+						aon_common.
+						0x804
+						
+							
+								ten_cip_misc_aon
+								20
+								20
+							
+							
+								ten_mbg_aon
+								19
+								19
+							
+							
+								dten_xtal_aon
+								18
+								18
+							
+							
+								ten_xtal_aon
+								17
+								17
+							
+							
+								ten_ldo15rf_aon
+								16
+								16
+							
+							
+								ten_bg_sys_aon
+								12
+								12
+							
+							
+								ten_dcdc18_1_aon
+								11
+								11
+							
+							
+								ten_dcdc18_0_aon
+								10
+								10
+							
+							
+								ten_ldo11soc_aon
+								9
+								9
+							
+							
+								ten_vddcore_aon
+								8
+								8
+							
+							
+								ten_xtal32k
+								6
+								6
+							
+							
+								dten_xtal32k
+								5
+								5
+							
+							
+								ten_aon
+								4
+								4
+							
+							
+								tmux_aon
+								0
+								2
+							
+						
+					
+					
+						aon_misc
+						aon_misc.
+						0x808
+						
+							
+								sw_bz_en_aon
+								1
+								1
+							
+							
+								sw_soc_en_aon
+								0
+								0
+							
+						
+					
+					
+						bg_sys_top
+						bg_sys_top.
+						0x810
+						
+							
+								bg_sys_start_ctrl_aon
+								12
+								12
+							
+							
+								pu_bg_sys_aon
+								8
+								8
+							
+							
+								pmip_resv
+								0
+								7
+							
+						
+					
+					
+						dcdc18_top_0
+						dcdc18_top_0.
+						0x814
+						
+							
+								dcdc18_rdy_aon
+								31
+								31
+							
+							
+								dcdc18_sstart_time_aon
+								28
+								29
+							
+							
+								dcdc18_osc_inhibit_t2_aon
+								27
+								27
+							
+							
+								dcdc18_slow_osc_aon
+								26
+								26
+							
+							
+								dcdc18_stop_osc_aon
+								25
+								25
+							
+							
+								dcdc18_slope_curr_sel_aon
+								20
+								24
+							
+							
+								dcdc18_osc_freq_trim_aon
+								16
+								19
+							
+							
+								dcdc18_osc_2m_mode_aon
+								12
+								12
+							
+							
+								dcdc18_vpfm_aon
+								8
+								11
+							
+							
+								dcdc18_vout_sel_aon
+								1
+								5
+							
+						
+					
+					
+						dcdc18_top_1
+						dcdc18_top_1.
+						0x818
+						
+							
+								dcdc18_pulldown_aon
+								29
+								29
+							
+							
+								dcdc18_en_antiring_aon
+								28
+								28
+							
+							
+								dcdc18_cfb_sel_aon
+								24
+								27
+							
+							
+								dcdc18_chf_sel_aon
+								20
+								23
+							
+							
+								dcdc18_rc_sel_aon
+								16
+								19
+							
+							
+								dcdc18_nonoverlap_td_aon
+								8
+								12
+							
+							
+								dcdc18_zvs_td_opt_aon
+								4
+								6
+							
+							
+								dcdc18_cs_delay_aon
+								1
+								3
+							
+							
+								dcdc18_force_cs_zvs_aon
+								0
+								0
+							
+						
+					
+					
+						ldo11soc_and_dctest
+						ldo11soc_and_dctest.
+						0x81C
+						
+							
+								pmip_dc_tp_out_en_aon
+								31
+								31
+							
+							
+								pu_vddcore_misc_aon
+								30
+								30
+							
+							
+								ldo11soc_power_good_aon
+								29
+								29
+							
+							
+								ldo11soc_rdy_aon
+								28
+								28
+							
+							
+								ldo11soc_cc_aon
+								24
+								25
+							
+							
+								ldo11soc_vth_sel_aon
+								12
+								13
+							
+							
+								ldo11soc_pulldown_sel_aon
+								11
+								11
+							
+							
+								ldo11soc_pulldown_aon
+								10
+								10
+							
+							
+								ldo11soc_sstart_delay_aon
+								8
+								9
+							
+							
+								ldo11soc_sstart_sel_aon
+								4
+								4
+							
+							
+								pu_ldo11soc_aon
+								0
+								0
+							
+						
+					
+					
+						psw_irrcv
+						psw_irrcv.
+						0x820
+						
+							
+								pu_ir_psw_aon
+								0
+								0
+							
+						
+					
+					
+						rf_top_aon
+						rf_top_aon.
+						0x880
+						
+							
+								ldo15rf_bypass_aon
+								28
+								28
+							
+							
+								ldo15rf_cc_aon
+								24
+								25
+							
+							
+								ldo15rf_vout_sel_aon
+								16
+								18
+							
+							
+								ldo15rf_pulldown_sel_aon
+								13
+								13
+							
+							
+								ldo15rf_pulldown_aon
+								12
+								12
+							
+							
+								ldo15rf_sstart_delay_aon
+								9
+								10
+							
+							
+								ldo15rf_sstart_sel_aon
+								8
+								8
+							
+							
+								pu_xtal_aon
+								5
+								5
+							
+							
+								pu_xtal_buf_aon
+								4
+								4
+							
+							
+								pu_sfreg_aon
+								2
+								2
+							
+							
+								pu_ldo15rf_aon
+								1
+								1
+							
+							
+								pu_mbg_aon
+								0
+								0
+							
+						
+					
+					
+						xtal_cfg
+						xtal_cfg.
+						0x884
+						
+							
+								xtal_rdy_sel_aon
+								30
+								31
+							
+							
+								xtal_gm_boost_aon
+								28
+								29
+							
+							
+								xtal_capcode_in_aon
+								22
+								27
+							
+							
+								xtal_capcode_out_aon
+								16
+								21
+							
+							
+								xtal_amp_ctrl_aon
+								14
+								15
+							
+							
+								xtal_sleep_aon
+								13
+								13
+							
+							
+								xtal_fast_startup_aon
+								12
+								12
+							
+							
+								xtal_buf_hp_aon
+								8
+								11
+							
+							
+								xtal_buf_en_aon
+								4
+								7
+							
+							
+								xtal_ext_sel_aon
+								3
+								3
+							
+							
+								xtal_capcode_extra_aon
+								2
+								2
+							
+							
+								xtal_bk_aon
+								0
+								1
+							
+						
+					
+					
+						tsen
+						tsen.
+						0x888
+						
+							
+								xtal_rdy_int_sel_aon
+								30
+								31
+							
+							
+								xtal_inn_cfg_en_aon
+								29
+								29
+							
+							
+								xtal_rdy
+								28
+								28
+							
+							
+								tsen_refcode_rfcal
+								16
+								27
+							
+							
+								tsen_refcode_corner
+								0
+								11
+							
+						
+					
+					
+						acomp0_ctrl
+						acomp0_ctrl.
+						0x900
+						
+							
+								acomp0_muxen
+								26
+								26
+							
+							
+								acomp0_pos_sel
+								22
+								25
+							
+							
+								acomp0_neg_sel
+								18
+								21
+							
+							
+								acomp0_level_sel
+								12
+								17
+							
+							
+								acomp0_bias_prog
+								10
+								11
+							
+							
+								acomp0_hyst_selp
+								7
+								9
+							
+							
+								acomp0_hyst_seln
+								4
+								6
+							
+							
+								acomp0_en
+								0
+								0
+							
+						
+					
+					
+						acomp1_ctrl
+						acomp1_ctrl.
+						0x904
+						
+							
+								acomp1_muxen
+								26
+								26
+							
+							
+								acomp1_pos_sel
+								22
+								25
+							
+							
+								acomp1_neg_sel
+								18
+								21
+							
+							
+								acomp1_level_sel
+								12
+								17
+							
+							
+								acomp1_bias_prog
+								10
+								11
+							
+							
+								acomp1_hyst_selp
+								7
+								9
+							
+							
+								acomp1_hyst_seln
+								4
+								6
+							
+							
+								acomp1_en
+								0
+								0
+							
+						
+					
+					
+						acomp_ctrl
+						acomp_ctrl.
+						0x908
+						
+							
+								acomp_reserved
+								24
+								31
+							
+							
+								acomp0_out_raw
+								19
+								19
+							
+							
+								acomp1_out_raw
+								17
+								17
+							
+							
+								acomp0_test_sel
+								12
+								13
+							
+							
+								acomp1_test_sel
+								10
+								11
+							
+							
+								acomp0_test_en
+								9
+								9
+							
+							
+								acomp1_test_en
+								8
+								8
+							
+							
+								acomp0_rstn_ana
+								1
+								1
+							
+							
+								acomp1_rstn_ana
+								0
+								0
+							
+						
+					
+					
+						gpadc_reg_cmd
+						gpadc_reg_cmd.
+						0x90C
+						
+							
+								gpadc_sen_test_en
+								30
+								30
+							
+							
+								gpadc_sen_sel
+								28
+								29
+							
+							
+								gpadc_chip_sen_pu
+								27
+								27
+							
+							
+								gpadc_micboost_32db_en
+								23
+								23
+							
+							
+								gpadc_mic_pga2_gain
+								21
+								22
+							
+							
+								gpadc_mic1_diff
+								20
+								20
+							
+							
+								gpadc_mic2_diff
+								19
+								19
+							
+							
+								gpadc_dwa_en
+								18
+								18
+							
+							
+								gpadc_byp_micboost
+								16
+								16
+							
+							
+								gpadc_micpga_en
+								15
+								15
+							
+							
+								gpadc_micbias_en
+								14
+								14
+							
+							
+								gpadc_neg_gnd
+								13
+								13
+							
+							
+								gpadc_pos_sel
+								8
+								12
+							
+							
+								gpadc_neg_sel
+								3
+								7
+							
+							
+								gpadc_soft_rst
+								2
+								2
+							
+							
+								gpadc_conv_start
+								1
+								1
+							
+							
+								gpadc_global_en
+								0
+								0
+							
+						
+					
+					
+						gpadc_reg_config1
+						gpadc_reg_config1.
+						0x910
+						
+							
+								gpadc_v18_sel
+								29
+								30
+							
+							
+								gpadc_v11_sel
+								27
+								28
+							
+							
+								gpadc_dither_en
+								26
+								26
+							
+							
+								gpadc_scan_en
+								25
+								25
+							
+							
+								gpadc_scan_length
+								21
+								24
+							
+							
+								gpadc_clk_div_ratio
+								18
+								20
+							
+							
+								gpadc_clk_ana_inv
+								17
+								17
+							
+							
+								gpadc_lowv_det_en
+								10
+								10
+							
+							
+								gpadc_vcm_hyst_sel
+								9
+								9
+							
+							
+								gpadc_vcm_sel_en
+								8
+								8
+							
+							
+								gpadc_res_sel
+								2
+								4
+							
+							
+								gpadc_cont_conv_en
+								1
+								1
+							
+							
+								gpadc_cal_os_en
+								0
+								0
+							
+						
+					
+					
+						gpadc_reg_config2
+						gpadc_reg_config2.
+						0x914
+						
+							
+								gpadc_tsvbe_low
+								31
+								31
+							
+							
+								gpadc_dly_sel
+								28
+								30
+							
+							
+								gpadc_pga1_gain
+								25
+								27
+							
+							
+								gpadc_pga2_gain
+								22
+								24
+							
+							
+								gpadc_test_sel
+								19
+								21
+							
+							
+								gpadc_test_en
+								18
+								18
+							
+							
+								gpadc_bias_sel
+								17
+								17
+							
+							
+								gpadc_chop_mode
+								15
+								16
+							
+							
+								gpadc_pga_vcmi_en
+								14
+								14
+							
+							
+								gpadc_pga_en
+								13
+								13
+							
+							
+								gpadc_pga_os_cal
+								9
+								12
+							
+							
+								gpadc_pga_vcm
+								7
+								8
+							
+							
+								gpadc_ts_en
+								6
+								6
+							
+							
+								gpadc_tsext_sel
+								5
+								5
+							
+							
+								gpadc_vbat_en
+								4
+								4
+							
+							
+								gpadc_vref_sel
+								3
+								3
+							
+							
+								gpadc_diff_mode
+								2
+								2
+							
+						
+					
+					
+						gpadc_reg_scn_pos1
+						adc converation sequence 1
+						0x918
+						
+							
+								gpadc_scan_pos_5
+								25
+								29
+							
+							
+								gpadc_scan_pos_4
+								20
+								24
+							
+							
+								gpadc_scan_pos_3
+								15
+								19
+							
+							
+								gpadc_scan_pos_2
+								10
+								14
+							
+							
+								gpadc_scan_pos_1
+								5
+								9
+							
+							
+								gpadc_scan_pos_0
+								0
+								4
+							
+						
+					
+					
+						gpadc_reg_scn_pos2
+						adc converation sequence 2
+						0x91C
+						
+							
+								gpadc_scan_pos_11
+								25
+								29
+							
+							
+								gpadc_scan_pos_10
+								20
+								24
+							
+							
+								gpadc_scan_pos_9
+								15
+								19
+							
+							
+								gpadc_scan_pos_8
+								10
+								14
+							
+							
+								gpadc_scan_pos_7
+								5
+								9
+							
+							
+								gpadc_scan_pos_6
+								0
+								4
+							
+						
+					
+					
+						gpadc_reg_scn_neg1
+						adc converation sequence 3
+						0x920
+						
+							
+								gpadc_scan_neg_5
+								25
+								29
+							
+							
+								gpadc_scan_neg_4
+								20
+								24
+							
+							
+								gpadc_scan_neg_3
+								15
+								19
+							
+							
+								gpadc_scan_neg_2
+								10
+								14
+							
+							
+								gpadc_scan_neg_1
+								5
+								9
+							
+							
+								gpadc_scan_neg_0
+								0
+								4
+							
+						
+					
+					
+						gpadc_reg_scn_neg2
+						adc converation sequence 4
+						0x924
+						
+							
+								gpadc_scan_neg_11
+								25
+								29
+							
+							
+								gpadc_scan_neg_10
+								20
+								24
+							
+							
+								gpadc_scan_neg_9
+								15
+								19
+							
+							
+								gpadc_scan_neg_8
+								10
+								14
+							
+							
+								gpadc_scan_neg_7
+								5
+								9
+							
+							
+								gpadc_scan_neg_6
+								0
+								4
+							
+						
+					
+					
+						gpadc_reg_status
+						gpadc_reg_status.
+						0x928
+						
+							
+								gpadc_reserved
+								16
+								31
+							
+							
+								gpadc_data_rdy
+								0
+								0
+							
+						
+					
+					
+						gpadc_reg_isr
+						gpadc_reg_isr.
+						0x92C
+						
+							
+								gpadc_pos_satur_mask
+								9
+								9
+							
+							
+								gpadc_neg_satur_mask
+								8
+								8
+							
+							
+								gpadc_pos_satur_clr
+								5
+								5
+							
+							
+								gpadc_neg_satur_clr
+								4
+								4
+							
+							
+								gpadc_pos_satur
+								1
+								1
+							
+							
+								gpadc_neg_satur
+								0
+								0
+							
+						
+					
+					
+						gpadc_reg_result
+						gpadc_reg_result.
+						0x930
+						
+							
+								gpadc_data_out
+								0
+								25
+							
+						
+					
+					
+						gpadc_reg_raw_result
+						gpadc_reg_raw_result.
+						0x934
+						
+							
+								gpadc_raw_data
+								0
+								11
+							
+						
+					
+					
+						gpadc_reg_define
+						gpadc_reg_define.
+						0x938
+						
+							
+								gpadc_os_cal_data
+								0
+								15
+							
+						
+					
+					
+						hbncore_resv0
+						hbncore_resv0.
+						0x93C
+						
+							
+								hbncore_resv0_data
+								0
+								31
+							
+						
+					
+					
+						hbncore_resv1
+						hbncore_resv1.
+						0x940
+						
+							
+								hbncore_resv1_data
+								0
+								31
+							
+						
+					
+				
+			
+		
+	
diff --git a/drivers/bl702_driver/regs/spi_reg.h b/drivers/bl702_driver/regs/spi_reg.h
new file mode 100644
index 00000000..a0efd2b2
--- /dev/null
+++ b/drivers/bl702_driver/regs/spi_reg.h
@@ -0,0 +1,513 @@
+/**
+  ******************************************************************************
+  * @file    spi_reg.h
+  * @version V1.2
+  * @date    2020-03-30
+  * @brief   This file is the description of.IP register
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __SPI_REG_H__
+#define  __SPI_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : spi_config */
+#define SPI_CONFIG_OFFSET                                       (0x0)
+#define SPI_CR_SPI_M_EN                                         SPI_CR_SPI_M_EN
+#define SPI_CR_SPI_M_EN_POS                                     (0U)
+#define SPI_CR_SPI_M_EN_LEN                                     (1U)
+#define SPI_CR_SPI_M_EN_MSK                                     (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __TIMER_REG_H__
+#define  __TIMER_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : TCCR */
+#define TIMER_TCCR_OFFSET                                       (0x0)
+#define TIMER_CS_1                                              TIMER_CS_1
+#define TIMER_CS_1_POS                                          (2U)
+#define TIMER_CS_1_LEN                                          (2U)
+#define TIMER_CS_1_MSK                                          (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __TZC_NSEC_REG_H__
+#define  __TZC_NSEC_REG_H__
+
+#include "bl702.h"
+
+/* 0x40 : tzc_rom_ctrl */
+#define TZC_NSEC_TZC_ROM_CTRL_OFFSET                            (0x40)
+#define TZC_NSEC_TZC_ROM0_R0_ID0_EN                             TZC_NSEC_TZC_ROM0_R0_ID0_EN
+#define TZC_NSEC_TZC_ROM0_R0_ID0_EN_POS                         (0U)
+#define TZC_NSEC_TZC_ROM0_R0_ID0_EN_LEN                         (1U)
+#define TZC_NSEC_TZC_ROM0_R0_ID0_EN_MSK                         (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __TZC_SEC_REG_H__
+#define  __TZC_SEC_REG_H__
+
+#include "bl702.h"
+
+/* 0x40 : tzc_rom_ctrl */
+#define TZC_SEC_TZC_ROM_CTRL_OFFSET                             (0x40)
+#define TZC_SEC_TZC_ROM0_R0_ID0_EN                              TZC_SEC_TZC_ROM0_R0_ID0_EN
+#define TZC_SEC_TZC_ROM0_R0_ID0_EN_POS                          (0U)
+#define TZC_SEC_TZC_ROM0_R0_ID0_EN_LEN                          (1U)
+#define TZC_SEC_TZC_ROM0_R0_ID0_EN_MSK                          (((1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __UART_REG_H__
+#define  __UART_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : utx_config */
+#define UART_UTX_CONFIG_OFFSET                                  (0x0)
+#define UART_CR_UTX_EN                                          UART_CR_UTX_EN
+#define UART_CR_UTX_EN_POS                                      (0U)
+#define UART_CR_UTX_EN_LEN                                      (1U)
+#define UART_CR_UTX_EN_MSK                                      (((1U<
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef  __USB_REG_H__
+#define  __USB_REG_H__
+
+#include "bl702.h"
+
+/* 0x0 : usb_config */
+#define USB_CONFIG_OFFSET                                       (0x0)
+#define USB_CR_USB_EN                                           USB_CR_USB_EN
+#define USB_CR_USB_EN_POS                                       (0U)
+#define USB_CR_USB_EN_LEN                                       (1U)
+#define USB_CR_USB_EN_MSK                                       (((1U<> 24);
+    res &= 0xFF0000FF; /* only for sure */
+    res |= ((value >> 8) & 0x0000FF00) | ((value << 8) & 0x00FF0000);
+
+    return res;
+}
+
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
+{
+  return __builtin_bswap16(value);
+}
+
+extern void clic_enable_interrupt (uint32_t source);
+extern void clic_disable_interrupt ( uint32_t source);
+extern void clic_set_pending(uint32_t source);
+extern void clic_clear_pending(uint32_t source);
+
+#define NVIC_EnableIRQ                      clic_enable_interrupt
+
+#define NVIC_DisableIRQ                     clic_disable_interrupt
+
+#define NVIC_ClearPendingIRQ                clic_clear_pending
+
+//#define __set_MSP(val)						__ASM volatile ("lw sp,0(%0)":: "r"(val))
+#define __set_MSP(msp)                      __ASM volatile ("add sp, x0, %0":: "r"(msp))
+
+#endif /* __CMSIS_COMPATIBLE_GCC_H */
diff --git a/drivers/bl702_driver/risc-v/Core/Include/riscv_bits.h b/drivers/bl702_driver/risc-v/Core/Include/riscv_bits.h
new file mode 100644
index 00000000..bfe656fe
--- /dev/null
+++ b/drivers/bl702_driver/risc-v/Core/Include/riscv_bits.h
@@ -0,0 +1,36 @@
+// See LICENSE for license details.
+#ifndef _RISCV_BITS_H
+#define _RISCV_BITS_H
+
+#define likely(x) __builtin_expect((x), 1)
+#define unlikely(x) __builtin_expect((x), 0)
+
+#define ROUNDUP(a, b) ((((a)-1)/(b)+1)*(b))
+#define ROUNDDOWN(a, b) ((a)/(b)*(b))
+
+#define MAX(a, b) ((a) > (b) ? (a) : (b))
+#define MIN(a, b) ((a) < (b) ? (a) : (b))
+#define CLAMP(a, lo, hi) MIN(MAX(a, lo), hi)
+
+#define EXTRACT_FIELD(val, which) (((val) & (which)) / ((which) & ~((which)-1)))
+#define INSERT_FIELD(val, which, fieldval) (((val) & ~(which)) | ((fieldval) * ((which) & ~((which)-1))))
+
+#define STR(x) XSTR(x)
+#define XSTR(x) #x
+
+#if __riscv_xlen == 64
+# define SLL32    sllw
+# define STORE    sd
+# define LOAD     ld
+# define LWU      lwu
+# define LOG_REGBYTES 3
+#else
+# define SLL32    sll
+# define STORE    sw
+# define LOAD     lw
+# define LWU      lw
+# define LOG_REGBYTES 2
+#endif
+#define REGBYTES (1 << LOG_REGBYTES)
+
+#endif
diff --git a/drivers/bl702_driver/risc-v/Core/Include/riscv_const.h b/drivers/bl702_driver/risc-v/Core/Include/riscv_const.h
new file mode 100644
index 00000000..d5dec8ac
--- /dev/null
+++ b/drivers/bl702_driver/risc-v/Core/Include/riscv_const.h
@@ -0,0 +1,18 @@
+// See LICENSE for license details.
+/* Derived from  */
+
+#ifndef _RISCV_CONST_H
+#define _RISCV_CONST_H
+
+#ifdef __ASSEMBLER__
+#define _AC(X,Y)        X
+#define _AT(T,X)        X
+#else
+#define _AC(X,Y)        (X##Y)
+#define _AT(T,X)        ((T)(X))
+#endif /* !__ASSEMBLER__*/
+
+#define _BITUL(x)       (_AC(1,UL) << (x))
+#define _BITULL(x)      (_AC(1,ULL) << (x))
+
+#endif /* _NUCLEI_CONST_H */
diff --git a/drivers/bl702_driver/risc-v/Core/Include/riscv_encoding.h b/drivers/bl702_driver/risc-v/Core/Include/riscv_encoding.h
new file mode 100644
index 00000000..65fdbb16
--- /dev/null
+++ b/drivers/bl702_driver/risc-v/Core/Include/riscv_encoding.h
@@ -0,0 +1,1370 @@
+// See LICENSE for license details.
+
+#ifndef RISCV_CSR_ENCODING_H
+#define RISCV_CSR_ENCODING_H
+
+#define MSTATUS_UIE         0x00000001
+#define MSTATUS_SIE         0x00000002
+#define MSTATUS_HIE         0x00000004
+#define MSTATUS_MIE         0x00000008
+#define MSTATUS_UPIE        0x00000010
+#define MSTATUS_SPIE        0x00000020
+#define MSTATUS_HPIE        0x00000040
+#define MSTATUS_MPIE        0x00000080
+#define MSTATUS_SPP         0x00000100
+#define MSTATUS_MPP         0x00001800
+#define MSTATUS_FS          0x00006000
+#define MSTATUS_XS          0x00018000
+#define MSTATUS_MPRV        0x00020000
+#define MSTATUS_PUM         0x00040000
+#define MSTATUS_MXR         0x00080000
+#define MSTATUS_VM          0x1F000000
+#define MSTATUS32_SD        0x80000000
+#define MSTATUS64_SD        0x8000000000000000
+
+
+#define SSTATUS_UIE         0x00000001
+#define SSTATUS_SIE         0x00000002
+#define SSTATUS_UPIE        0x00000010
+#define SSTATUS_SPIE        0x00000020
+#define SSTATUS_SPP         0x00000100
+#define SSTATUS_FS          0x00006000
+#define SSTATUS_XS          0x00018000
+#define SSTATUS_PUM         0x00040000
+#define SSTATUS32_SD        0x80000000
+#define SSTATUS64_SD        0x8000000000000000
+
+#define DCSR_XDEBUGVER      (3U<<30)
+#define DCSR_NDRESET        (1<<29)
+#define DCSR_FULLRESET      (1<<28)
+#define DCSR_EBREAKM        (1<<15)
+#define DCSR_EBREAKH        (1<<14)
+#define DCSR_EBREAKS        (1<<13)
+#define DCSR_EBREAKU        (1<<12)
+#define DCSR_STOPCYCLE      (1<<10)
+#define DCSR_STOPTIME       (1<<9)
+#define DCSR_CAUSE          (7<<6)
+#define DCSR_DEBUGINT       (1<<5)
+#define DCSR_HALT           (1<<3)
+#define DCSR_STEP           (1<<2)
+#define DCSR_PRV            (3<<0)
+
+#define DCSR_CAUSE_NONE     0
+#define DCSR_CAUSE_SWBP     1
+#define DCSR_CAUSE_HWBP     2
+#define DCSR_CAUSE_DEBUGINT 3
+#define DCSR_CAUSE_STEP     4
+#define DCSR_CAUSE_HALT     5
+
+#define MCONTROL_TYPE(xlen)    (0xfULL<<((xlen)-4))
+#define MCONTROL_DMODE(xlen)   (1ULL<<((xlen)-5))
+#define MCONTROL_MASKMAX(xlen) (0x3fULL<<((xlen)-11))
+
+#define MCONTROL_SELECT     (1<<19)
+#define MCONTROL_TIMING     (1<<18)
+#define MCONTROL_ACTION     (0x3f<<12)
+#define MCONTROL_CHAIN      (1<<11)
+#define MCONTROL_MATCH      (0xf<<7)
+#define MCONTROL_M          (1<<6)
+#define MCONTROL_H          (1<<5)
+#define MCONTROL_S          (1<<4)
+#define MCONTROL_U          (1<<3)
+#define MCONTROL_EXECUTE    (1<<2)
+#define MCONTROL_STORE      (1<<1)
+#define MCONTROL_LOAD       (1<<0)
+
+#define MCONTROL_TYPE_NONE      0
+#define MCONTROL_TYPE_MATCH     2
+
+#define MCONTROL_ACTION_DEBUG_EXCEPTION   0
+#define MCONTROL_ACTION_DEBUG_MODE        1
+#define MCONTROL_ACTION_TRACE_START       2
+#define MCONTROL_ACTION_TRACE_STOP        3
+#define MCONTROL_ACTION_TRACE_EMIT        4
+
+#define MCONTROL_MATCH_EQUAL     0
+#define MCONTROL_MATCH_NAPOT     1
+#define MCONTROL_MATCH_GE        2
+#define MCONTROL_MATCH_LT        3
+#define MCONTROL_MATCH_MASK_LOW  4
+#define MCONTROL_MATCH_MASK_HIGH 5
+
+#define MIP_SSIP            (1 << IRQ_S_SOFT)
+#define MIP_HSIP            (1 << IRQ_H_SOFT)
+#define MIP_MSIP            (1 << IRQ_M_SOFT)
+#define MIP_STIP            (1 << IRQ_S_TIMER)
+#define MIP_HTIP            (1 << IRQ_H_TIMER)
+#define MIP_MTIP            (1 << IRQ_M_TIMER)
+#define MIP_SEIP            (1 << IRQ_S_EXT)
+#define MIP_HEIP            (1 << IRQ_H_EXT)
+#define MIP_MEIP            (1 << IRQ_M_EXT)
+
+#define MIE_SSIE            MIP_SSIP 
+#define MIE_HSIE            MIP_HSIP 
+#define MIE_MSIE            MIP_MSIP 
+#define MIE_STIE            MIP_STIP 
+#define MIE_HTIE            MIP_HTIP 
+#define MIE_MTIE            MIP_MTIP 
+#define MIE_SEIE            MIP_SEIP 
+#define MIE_HEIE            MIP_HEIP 
+#define MIE_MEIE            MIP_MEIP 
+
+#define SIP_SSIP MIP_SSIP
+#define SIP_STIP MIP_STIP
+
+#define PRV_U 0
+#define PRV_S 1
+#define PRV_H 2
+#define PRV_M 3
+
+#define VM_MBARE 0
+#define VM_MBB   1
+#define VM_MBBID 2
+#define VM_SV32  8
+#define VM_SV39  9
+#define VM_SV48  10
+
+#define IRQ_S_SOFT   1
+#define IRQ_H_SOFT   2
+#define IRQ_M_SOFT   3
+#define IRQ_S_TIMER  5
+#define IRQ_H_TIMER  6
+#define IRQ_M_TIMER  7
+#define IRQ_S_EXT    9
+#define IRQ_H_EXT    10
+#define IRQ_M_EXT    11
+#define IRQ_COP      12
+#define IRQ_HOST     13
+
+#define DEFAULT_RSTVEC     0x00001000
+#define DEFAULT_NMIVEC     0x00001004
+#define DEFAULT_MTVEC      0x00001010
+#define CONFIG_STRING_ADDR 0x0000100C
+#define EXT_IO_BASE        0x40000000
+#define DRAM_BASE          0x80000000
+
+// page table entry (PTE) fields
+#define PTE_V     0x001 // Valid
+#define PTE_R     0x002 // Read
+#define PTE_W     0x004 // Write
+#define PTE_X     0x008 // Execute
+#define PTE_U     0x010 // User
+#define PTE_G     0x020 // Global
+#define PTE_A     0x040 // Accessed
+#define PTE_D     0x080 // Dirty
+#define PTE_SOFT  0x300 // Reserved for Software
+
+#define PTE_PPN_SHIFT 10
+
+#define PTE_TABLE(PTE) (((PTE) & (PTE_V | PTE_R | PTE_W | PTE_X)) == PTE_V)
+
+#ifdef __riscv
+
+#ifdef __riscv64
+# define MSTATUS_SD MSTATUS64_SD
+# define SSTATUS_SD SSTATUS64_SD
+# define RISCV_PGLEVEL_BITS 9
+#else
+# define MSTATUS_SD MSTATUS32_SD
+# define SSTATUS_SD SSTATUS32_SD
+# define RISCV_PGLEVEL_BITS 10
+#endif
+#define RISCV_PGSHIFT 12
+#define RISCV_PGSIZE (1 << RISCV_PGSHIFT)
+
+#ifndef __ASSEMBLER__
+
+#ifdef __GNUC__
+
+#define asm     __asm 
+
+#define read_fpu(reg) ({ unsigned long __tmp; \
+  asm volatile ("fmv.x.w %0, " #reg : "=r"(__tmp)); \
+  __tmp; })
+
+#define write_fpu(reg, val) ({ \
+  if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
+    asm volatile ("fmv.w.x " #reg ", %0" :: "i"(val)); \
+  else \
+    asm volatile ("fmv.w.x " #reg ", %0" :: "r"(val)); })
+    
+
+#define read_csr(reg) ({ unsigned long __tmp; \
+  asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \
+  __tmp; })
+
+#define write_csr(reg, val) ({ \
+  if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
+    asm volatile ("csrw " #reg ", %0" :: "i"(val)); \
+  else \
+    asm volatile ("csrw " #reg ", %0" :: "r"(val)); })
+
+#define swap_csr(reg, val) ({ unsigned long __tmp; \
+  if (__builtin_constant_p(val) && (unsigned long)(val) < 32) \
+    asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "i"(val)); \
+  else \
+    asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "r"(val)); \
+  __tmp; })
+
+#define set_csr(reg, bit) ({ unsigned long __tmp; \
+  if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
+    asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
+  else \
+    asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \
+  __tmp; })
+
+#define clear_csr(reg, bit) ({ unsigned long __tmp; \
+  if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) \
+    asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "i"(bit)); \
+  else \
+    asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "r"(bit)); \
+  __tmp; })
+
+#define rdtime() read_csr(time)
+#define rdcycle() read_csr(cycle)
+#define rdinstret() read_csr(instret)
+
+
+
+
+
+
+#endif
+
+#endif
+
+#endif
+
+#endif
+/* Automatically generated by parse-opcodes */
+#ifndef RISCV_ENCODING_H
+#define RISCV_ENCODING_H
+#define MATCH_BEQ 0x63
+#define MASK_BEQ  0x707f
+#define MATCH_BNE 0x1063
+#define MASK_BNE  0x707f
+#define MATCH_BLT 0x4063
+#define MASK_BLT  0x707f
+#define MATCH_BGE 0x5063
+#define MASK_BGE  0x707f
+#define MATCH_BLTU 0x6063
+#define MASK_BLTU  0x707f
+#define MATCH_BGEU 0x7063
+#define MASK_BGEU  0x707f
+#define MATCH_JALR 0x67
+#define MASK_JALR  0x707f
+#define MATCH_JAL 0x6f
+#define MASK_JAL  0x7f
+#define MATCH_LUI 0x37
+#define MASK_LUI  0x7f
+#define MATCH_AUIPC 0x17
+#define MASK_AUIPC  0x7f
+#define MATCH_ADDI 0x13
+#define MASK_ADDI  0x707f
+#define MATCH_SLLI 0x1013
+#define MASK_SLLI  0xfc00707f
+#define MATCH_SLTI 0x2013
+#define MASK_SLTI  0x707f
+#define MATCH_SLTIU 0x3013
+#define MASK_SLTIU  0x707f
+#define MATCH_XORI 0x4013
+#define MASK_XORI  0x707f
+#define MATCH_SRLI 0x5013
+#define MASK_SRLI  0xfc00707f
+#define MATCH_SRAI 0x40005013
+#define MASK_SRAI  0xfc00707f
+#define MATCH_ORI 0x6013
+#define MASK_ORI  0x707f
+#define MATCH_ANDI 0x7013
+#define MASK_ANDI  0x707f
+#define MATCH_ADD 0x33
+#define MASK_ADD  0xfe00707f
+#define MATCH_SUB 0x40000033
+#define MASK_SUB  0xfe00707f
+#define MATCH_SLL 0x1033
+#define MASK_SLL  0xfe00707f
+#define MATCH_SLT 0x2033
+#define MASK_SLT  0xfe00707f
+#define MATCH_SLTU 0x3033
+#define MASK_SLTU  0xfe00707f
+#define MATCH_XOR 0x4033
+#define MASK_XOR  0xfe00707f
+#define MATCH_SRL 0x5033
+#define MASK_SRL  0xfe00707f
+#define MATCH_SRA 0x40005033
+#define MASK_SRA  0xfe00707f
+#define MATCH_OR 0x6033
+#define MASK_OR  0xfe00707f
+#define MATCH_AND 0x7033
+#define MASK_AND  0xfe00707f
+#define MATCH_ADDIW 0x1b
+#define MASK_ADDIW  0x707f
+#define MATCH_SLLIW 0x101b
+#define MASK_SLLIW  0xfe00707f
+#define MATCH_SRLIW 0x501b
+#define MASK_SRLIW  0xfe00707f
+#define MATCH_SRAIW 0x4000501b
+#define MASK_SRAIW  0xfe00707f
+#define MATCH_ADDW 0x3b
+#define MASK_ADDW  0xfe00707f
+#define MATCH_SUBW 0x4000003b
+#define MASK_SUBW  0xfe00707f
+#define MATCH_SLLW 0x103b
+#define MASK_SLLW  0xfe00707f
+#define MATCH_SRLW 0x503b
+#define MASK_SRLW  0xfe00707f
+#define MATCH_SRAW 0x4000503b
+#define MASK_SRAW  0xfe00707f
+#define MATCH_LB 0x3
+#define MASK_LB  0x707f
+#define MATCH_LH 0x1003
+#define MASK_LH  0x707f
+#define MATCH_LW 0x2003
+#define MASK_LW  0x707f
+#define MATCH_LD 0x3003
+#define MASK_LD  0x707f
+#define MATCH_LBU 0x4003
+#define MASK_LBU  0x707f
+#define MATCH_LHU 0x5003
+#define MASK_LHU  0x707f
+#define MATCH_LWU 0x6003
+#define MASK_LWU  0x707f
+#define MATCH_SB 0x23
+#define MASK_SB  0x707f
+#define MATCH_SH 0x1023
+#define MASK_SH  0x707f
+#define MATCH_SW 0x2023
+#define MASK_SW  0x707f
+#define MATCH_SD 0x3023
+#define MASK_SD  0x707f
+#define MATCH_FENCE 0xf
+#define MASK_FENCE  0x707f
+#define MATCH_FENCE_I 0x100f
+#define MASK_FENCE_I  0x707f
+#define MATCH_MUL 0x2000033
+#define MASK_MUL  0xfe00707f
+#define MATCH_MULH 0x2001033
+#define MASK_MULH  0xfe00707f
+#define MATCH_MULHSU 0x2002033
+#define MASK_MULHSU  0xfe00707f
+#define MATCH_MULHU 0x2003033
+#define MASK_MULHU  0xfe00707f
+#define MATCH_DIV 0x2004033
+#define MASK_DIV  0xfe00707f
+#define MATCH_DIVU 0x2005033
+#define MASK_DIVU  0xfe00707f
+#define MATCH_REM 0x2006033
+#define MASK_REM  0xfe00707f
+#define MATCH_REMU 0x2007033
+#define MASK_REMU  0xfe00707f
+#define MATCH_MULW 0x200003b
+#define MASK_MULW  0xfe00707f
+#define MATCH_DIVW 0x200403b
+#define MASK_DIVW  0xfe00707f
+#define MATCH_DIVUW 0x200503b
+#define MASK_DIVUW  0xfe00707f
+#define MATCH_REMW 0x200603b
+#define MASK_REMW  0xfe00707f
+#define MATCH_REMUW 0x200703b
+#define MASK_REMUW  0xfe00707f
+#define MATCH_AMOADD_W 0x202f
+#define MASK_AMOADD_W  0xf800707f
+#define MATCH_AMOXOR_W 0x2000202f
+#define MASK_AMOXOR_W  0xf800707f
+#define MATCH_AMOOR_W 0x4000202f
+#define MASK_AMOOR_W  0xf800707f
+#define MATCH_AMOAND_W 0x6000202f
+#define MASK_AMOAND_W  0xf800707f
+#define MATCH_AMOMIN_W 0x8000202f
+#define MASK_AMOMIN_W  0xf800707f
+#define MATCH_AMOMAX_W 0xa000202f
+#define MASK_AMOMAX_W  0xf800707f
+#define MATCH_AMOMINU_W 0xc000202f
+#define MASK_AMOMINU_W  0xf800707f
+#define MATCH_AMOMAXU_W 0xe000202f
+#define MASK_AMOMAXU_W  0xf800707f
+#define MATCH_AMOSWAP_W 0x800202f
+#define MASK_AMOSWAP_W  0xf800707f
+#define MATCH_LR_W 0x1000202f
+#define MASK_LR_W  0xf9f0707f
+#define MATCH_SC_W 0x1800202f
+#define MASK_SC_W  0xf800707f
+#define MATCH_AMOADD_D 0x302f
+#define MASK_AMOADD_D  0xf800707f
+#define MATCH_AMOXOR_D 0x2000302f
+#define MASK_AMOXOR_D  0xf800707f
+#define MATCH_AMOOR_D 0x4000302f
+#define MASK_AMOOR_D  0xf800707f
+#define MATCH_AMOAND_D 0x6000302f
+#define MASK_AMOAND_D  0xf800707f
+#define MATCH_AMOMIN_D 0x8000302f
+#define MASK_AMOMIN_D  0xf800707f
+#define MATCH_AMOMAX_D 0xa000302f
+#define MASK_AMOMAX_D  0xf800707f
+#define MATCH_AMOMINU_D 0xc000302f
+#define MASK_AMOMINU_D  0xf800707f
+#define MATCH_AMOMAXU_D 0xe000302f
+#define MASK_AMOMAXU_D  0xf800707f
+#define MATCH_AMOSWAP_D 0x800302f
+#define MASK_AMOSWAP_D  0xf800707f
+#define MATCH_LR_D 0x1000302f
+#define MASK_LR_D  0xf9f0707f
+#define MATCH_SC_D 0x1800302f
+#define MASK_SC_D  0xf800707f
+#define MATCH_ECALL 0x73
+#define MASK_ECALL  0xffffffff
+#define MATCH_EBREAK 0x100073
+#define MASK_EBREAK  0xffffffff
+#define MATCH_URET 0x200073
+#define MASK_URET  0xffffffff
+#define MATCH_SRET 0x10200073
+#define MASK_SRET  0xffffffff
+#define MATCH_HRET 0x20200073
+#define MASK_HRET  0xffffffff
+#define MATCH_MRET 0x30200073
+#define MASK_MRET  0xffffffff
+#define MATCH_DRET 0x7b200073
+#define MASK_DRET  0xffffffff
+#define MATCH_SFENCE_VM 0x10400073
+#define MASK_SFENCE_VM  0xfff07fff
+#define MATCH_WFI 0x10500073
+#define MASK_WFI  0xffffffff
+#define MATCH_CSRRW 0x1073
+#define MASK_CSRRW  0x707f
+#define MATCH_CSRRS 0x2073
+#define MASK_CSRRS  0x707f
+#define MATCH_CSRRC 0x3073
+#define MASK_CSRRC  0x707f
+#define MATCH_CSRRWI 0x5073
+#define MASK_CSRRWI  0x707f
+#define MATCH_CSRRSI 0x6073
+#define MASK_CSRRSI  0x707f
+#define MATCH_CSRRCI 0x7073
+#define MASK_CSRRCI  0x707f
+#define MATCH_FADD_S 0x53
+#define MASK_FADD_S  0xfe00007f
+#define MATCH_FSUB_S 0x8000053
+#define MASK_FSUB_S  0xfe00007f
+#define MATCH_FMUL_S 0x10000053
+#define MASK_FMUL_S  0xfe00007f
+#define MATCH_FDIV_S 0x18000053
+#define MASK_FDIV_S  0xfe00007f
+#define MATCH_FSGNJ_S 0x20000053
+#define MASK_FSGNJ_S  0xfe00707f
+#define MATCH_FSGNJN_S 0x20001053
+#define MASK_FSGNJN_S  0xfe00707f
+#define MATCH_FSGNJX_S 0x20002053
+#define MASK_FSGNJX_S  0xfe00707f
+#define MATCH_FMIN_S 0x28000053
+#define MASK_FMIN_S  0xfe00707f
+#define MATCH_FMAX_S 0x28001053
+#define MASK_FMAX_S  0xfe00707f
+#define MATCH_FSQRT_S 0x58000053
+#define MASK_FSQRT_S  0xfff0007f
+#define MATCH_FADD_D 0x2000053
+#define MASK_FADD_D  0xfe00007f
+#define MATCH_FSUB_D 0xa000053
+#define MASK_FSUB_D  0xfe00007f
+#define MATCH_FMUL_D 0x12000053
+#define MASK_FMUL_D  0xfe00007f
+#define MATCH_FDIV_D 0x1a000053
+#define MASK_FDIV_D  0xfe00007f
+#define MATCH_FSGNJ_D 0x22000053
+#define MASK_FSGNJ_D  0xfe00707f
+#define MATCH_FSGNJN_D 0x22001053
+#define MASK_FSGNJN_D  0xfe00707f
+#define MATCH_FSGNJX_D 0x22002053
+#define MASK_FSGNJX_D  0xfe00707f
+#define MATCH_FMIN_D 0x2a000053
+#define MASK_FMIN_D  0xfe00707f
+#define MATCH_FMAX_D 0x2a001053
+#define MASK_FMAX_D  0xfe00707f
+#define MATCH_FCVT_S_D 0x40100053
+#define MASK_FCVT_S_D  0xfff0007f
+#define MATCH_FCVT_D_S 0x42000053
+#define MASK_FCVT_D_S  0xfff0007f
+#define MATCH_FSQRT_D 0x5a000053
+#define MASK_FSQRT_D  0xfff0007f
+#define MATCH_FLE_S 0xa0000053
+#define MASK_FLE_S  0xfe00707f
+#define MATCH_FLT_S 0xa0001053
+#define MASK_FLT_S  0xfe00707f
+#define MATCH_FEQ_S 0xa0002053
+#define MASK_FEQ_S  0xfe00707f
+#define MATCH_FLE_D 0xa2000053
+#define MASK_FLE_D  0xfe00707f
+#define MATCH_FLT_D 0xa2001053
+#define MASK_FLT_D  0xfe00707f
+#define MATCH_FEQ_D 0xa2002053
+#define MASK_FEQ_D  0xfe00707f
+#define MATCH_FCVT_W_S 0xc0000053
+#define MASK_FCVT_W_S  0xfff0007f
+#define MATCH_FCVT_WU_S 0xc0100053
+#define MASK_FCVT_WU_S  0xfff0007f
+#define MATCH_FCVT_L_S 0xc0200053
+#define MASK_FCVT_L_S  0xfff0007f
+#define MATCH_FCVT_LU_S 0xc0300053
+#define MASK_FCVT_LU_S  0xfff0007f
+#define MATCH_FMV_X_S 0xe0000053
+#define MASK_FMV_X_S  0xfff0707f
+#define MATCH_FCLASS_S 0xe0001053
+#define MASK_FCLASS_S  0xfff0707f
+#define MATCH_FCVT_W_D 0xc2000053
+#define MASK_FCVT_W_D  0xfff0007f
+#define MATCH_FCVT_WU_D 0xc2100053
+#define MASK_FCVT_WU_D  0xfff0007f
+#define MATCH_FCVT_L_D 0xc2200053
+#define MASK_FCVT_L_D  0xfff0007f
+#define MATCH_FCVT_LU_D 0xc2300053
+#define MASK_FCVT_LU_D  0xfff0007f
+#define MATCH_FMV_X_D 0xe2000053
+#define MASK_FMV_X_D  0xfff0707f
+#define MATCH_FCLASS_D 0xe2001053
+#define MASK_FCLASS_D  0xfff0707f
+#define MATCH_FCVT_S_W 0xd0000053
+#define MASK_FCVT_S_W  0xfff0007f
+#define MATCH_FCVT_S_WU 0xd0100053
+#define MASK_FCVT_S_WU  0xfff0007f
+#define MATCH_FCVT_S_L 0xd0200053
+#define MASK_FCVT_S_L  0xfff0007f
+#define MATCH_FCVT_S_LU 0xd0300053
+#define MASK_FCVT_S_LU  0xfff0007f
+#define MATCH_FMV_S_X 0xf0000053
+#define MASK_FMV_S_X  0xfff0707f
+#define MATCH_FCVT_D_W 0xd2000053
+#define MASK_FCVT_D_W  0xfff0007f
+#define MATCH_FCVT_D_WU 0xd2100053
+#define MASK_FCVT_D_WU  0xfff0007f
+#define MATCH_FCVT_D_L 0xd2200053
+#define MASK_FCVT_D_L  0xfff0007f
+#define MATCH_FCVT_D_LU 0xd2300053
+#define MASK_FCVT_D_LU  0xfff0007f
+#define MATCH_FMV_D_X 0xf2000053
+#define MASK_FMV_D_X  0xfff0707f
+#define MATCH_FLW 0x2007
+#define MASK_FLW  0x707f
+#define MATCH_FLD 0x3007
+#define MASK_FLD  0x707f
+#define MATCH_FSW 0x2027
+#define MASK_FSW  0x707f
+#define MATCH_FSD 0x3027
+#define MASK_FSD  0x707f
+#define MATCH_FMADD_S 0x43
+#define MASK_FMADD_S  0x600007f
+#define MATCH_FMSUB_S 0x47
+#define MASK_FMSUB_S  0x600007f
+#define MATCH_FNMSUB_S 0x4b
+#define MASK_FNMSUB_S  0x600007f
+#define MATCH_FNMADD_S 0x4f
+#define MASK_FNMADD_S  0x600007f
+#define MATCH_FMADD_D 0x2000043
+#define MASK_FMADD_D  0x600007f
+#define MATCH_FMSUB_D 0x2000047
+#define MASK_FMSUB_D  0x600007f
+#define MATCH_FNMSUB_D 0x200004b
+#define MASK_FNMSUB_D  0x600007f
+#define MATCH_FNMADD_D 0x200004f
+#define MASK_FNMADD_D  0x600007f
+#define MATCH_C_NOP 0x1
+#define MASK_C_NOP  0xffff
+#define MATCH_C_ADDI16SP 0x6101
+#define MASK_C_ADDI16SP  0xef83
+#define MATCH_C_JR 0x8002
+#define MASK_C_JR  0xf07f
+#define MATCH_C_JALR 0x9002
+#define MASK_C_JALR  0xf07f
+#define MATCH_C_EBREAK 0x9002
+#define MASK_C_EBREAK  0xffff
+#define MATCH_C_LD 0x6000
+#define MASK_C_LD  0xe003
+#define MATCH_C_SD 0xe000
+#define MASK_C_SD  0xe003
+#define MATCH_C_ADDIW 0x2001
+#define MASK_C_ADDIW  0xe003
+#define MATCH_C_LDSP 0x6002
+#define MASK_C_LDSP  0xe003
+#define MATCH_C_SDSP 0xe002
+#define MASK_C_SDSP  0xe003
+#define MATCH_C_ADDI4SPN 0x0
+#define MASK_C_ADDI4SPN  0xe003
+#define MATCH_C_FLD 0x2000
+#define MASK_C_FLD  0xe003
+#define MATCH_C_LW 0x4000
+#define MASK_C_LW  0xe003
+#define MATCH_C_FLW 0x6000
+#define MASK_C_FLW  0xe003
+#define MATCH_C_FSD 0xa000
+#define MASK_C_FSD  0xe003
+#define MATCH_C_SW 0xc000
+#define MASK_C_SW  0xe003
+#define MATCH_C_FSW 0xe000
+#define MASK_C_FSW  0xe003
+#define MATCH_C_ADDI 0x1
+#define MASK_C_ADDI  0xe003
+#define MATCH_C_JAL 0x2001
+#define MASK_C_JAL  0xe003
+#define MATCH_C_LI 0x4001
+#define MASK_C_LI  0xe003
+#define MATCH_C_LUI 0x6001
+#define MASK_C_LUI  0xe003
+#define MATCH_C_SRLI 0x8001
+#define MASK_C_SRLI  0xec03
+#define MATCH_C_SRAI 0x8401
+#define MASK_C_SRAI  0xec03
+#define MATCH_C_ANDI 0x8801
+#define MASK_C_ANDI  0xec03
+#define MATCH_C_SUB 0x8c01
+#define MASK_C_SUB  0xfc63
+#define MATCH_C_XOR 0x8c21
+#define MASK_C_XOR  0xfc63
+#define MATCH_C_OR 0x8c41
+#define MASK_C_OR  0xfc63
+#define MATCH_C_AND 0x8c61
+#define MASK_C_AND  0xfc63
+#define MATCH_C_SUBW 0x9c01
+#define MASK_C_SUBW  0xfc63
+#define MATCH_C_ADDW 0x9c21
+#define MASK_C_ADDW  0xfc63
+#define MATCH_C_J 0xa001
+#define MASK_C_J  0xe003
+#define MATCH_C_BEQZ 0xc001
+#define MASK_C_BEQZ  0xe003
+#define MATCH_C_BNEZ 0xe001
+#define MASK_C_BNEZ  0xe003
+#define MATCH_C_SLLI 0x2
+#define MASK_C_SLLI  0xe003
+#define MATCH_C_FLDSP 0x2002
+#define MASK_C_FLDSP  0xe003
+#define MATCH_C_LWSP 0x4002
+#define MASK_C_LWSP  0xe003
+#define MATCH_C_FLWSP 0x6002
+#define MASK_C_FLWSP  0xe003
+#define MATCH_C_MV 0x8002
+#define MASK_C_MV  0xf003
+#define MATCH_C_ADD 0x9002
+#define MASK_C_ADD  0xf003
+#define MATCH_C_FSDSP 0xa002
+#define MASK_C_FSDSP  0xe003
+#define MATCH_C_SWSP 0xc002
+#define MASK_C_SWSP  0xe003
+#define MATCH_C_FSWSP 0xe002
+#define MASK_C_FSWSP  0xe003
+#define MATCH_CUSTOM0 0xb
+#define MASK_CUSTOM0  0x707f
+#define MATCH_CUSTOM0_RS1 0x200b
+#define MASK_CUSTOM0_RS1  0x707f
+#define MATCH_CUSTOM0_RS1_RS2 0x300b
+#define MASK_CUSTOM0_RS1_RS2  0x707f
+#define MATCH_CUSTOM0_RD 0x400b
+#define MASK_CUSTOM0_RD  0x707f
+#define MATCH_CUSTOM0_RD_RS1 0x600b
+#define MASK_CUSTOM0_RD_RS1  0x707f
+#define MATCH_CUSTOM0_RD_RS1_RS2 0x700b
+#define MASK_CUSTOM0_RD_RS1_RS2  0x707f
+#define MATCH_CUSTOM1 0x2b
+#define MASK_CUSTOM1  0x707f
+#define MATCH_CUSTOM1_RS1 0x202b
+#define MASK_CUSTOM1_RS1  0x707f
+#define MATCH_CUSTOM1_RS1_RS2 0x302b
+#define MASK_CUSTOM1_RS1_RS2  0x707f
+#define MATCH_CUSTOM1_RD 0x402b
+#define MASK_CUSTOM1_RD  0x707f
+#define MATCH_CUSTOM1_RD_RS1 0x602b
+#define MASK_CUSTOM1_RD_RS1  0x707f
+#define MATCH_CUSTOM1_RD_RS1_RS2 0x702b
+#define MASK_CUSTOM1_RD_RS1_RS2  0x707f
+#define MATCH_CUSTOM2 0x5b
+#define MASK_CUSTOM2  0x707f
+#define MATCH_CUSTOM2_RS1 0x205b
+#define MASK_CUSTOM2_RS1  0x707f
+#define MATCH_CUSTOM2_RS1_RS2 0x305b
+#define MASK_CUSTOM2_RS1_RS2  0x707f
+#define MATCH_CUSTOM2_RD 0x405b
+#define MASK_CUSTOM2_RD  0x707f
+#define MATCH_CUSTOM2_RD_RS1 0x605b
+#define MASK_CUSTOM2_RD_RS1  0x707f
+#define MATCH_CUSTOM2_RD_RS1_RS2 0x705b
+#define MASK_CUSTOM2_RD_RS1_RS2  0x707f
+#define MATCH_CUSTOM3 0x7b
+#define MASK_CUSTOM3  0x707f
+#define MATCH_CUSTOM3_RS1 0x207b
+#define MASK_CUSTOM3_RS1  0x707f
+#define MATCH_CUSTOM3_RS1_RS2 0x307b
+#define MASK_CUSTOM3_RS1_RS2  0x707f
+#define MATCH_CUSTOM3_RD 0x407b
+#define MASK_CUSTOM3_RD  0x707f
+#define MATCH_CUSTOM3_RD_RS1 0x607b
+#define MASK_CUSTOM3_RD_RS1  0x707f
+#define MATCH_CUSTOM3_RD_RS1_RS2 0x707b
+#define MASK_CUSTOM3_RD_RS1_RS2  0x707f
+#define CSR_FFLAGS 0x1
+#define CSR_FRM 0x2
+#define CSR_FCSR 0x3
+#define CSR_CYCLE 0xc00
+#define CSR_TIME 0xc01
+#define CSR_INSTRET 0xc02
+#define CSR_HPMCOUNTER3 0xc03
+#define CSR_HPMCOUNTER4 0xc04
+#define CSR_HPMCOUNTER5 0xc05
+#define CSR_HPMCOUNTER6 0xc06
+#define CSR_HPMCOUNTER7 0xc07
+#define CSR_HPMCOUNTER8 0xc08
+#define CSR_HPMCOUNTER9 0xc09
+#define CSR_HPMCOUNTER10 0xc0a
+#define CSR_HPMCOUNTER11 0xc0b
+#define CSR_HPMCOUNTER12 0xc0c
+#define CSR_HPMCOUNTER13 0xc0d
+#define CSR_HPMCOUNTER14 0xc0e
+#define CSR_HPMCOUNTER15 0xc0f
+#define CSR_HPMCOUNTER16 0xc10
+#define CSR_HPMCOUNTER17 0xc11
+#define CSR_HPMCOUNTER18 0xc12
+#define CSR_HPMCOUNTER19 0xc13
+#define CSR_HPMCOUNTER20 0xc14
+#define CSR_HPMCOUNTER21 0xc15
+#define CSR_HPMCOUNTER22 0xc16
+#define CSR_HPMCOUNTER23 0xc17
+#define CSR_HPMCOUNTER24 0xc18
+#define CSR_HPMCOUNTER25 0xc19
+#define CSR_HPMCOUNTER26 0xc1a
+#define CSR_HPMCOUNTER27 0xc1b
+#define CSR_HPMCOUNTER28 0xc1c
+#define CSR_HPMCOUNTER29 0xc1d
+#define CSR_HPMCOUNTER30 0xc1e
+#define CSR_HPMCOUNTER31 0xc1f
+#define CSR_SSTATUS 0x100
+#define CSR_SIE 0x104
+#define CSR_STVEC 0x105
+#define CSR_SSCRATCH 0x140
+#define CSR_SEPC 0x141
+#define CSR_SCAUSE 0x142
+#define CSR_SBADADDR 0x143
+#define CSR_SIP 0x144
+#define CSR_SPTBR 0x180
+#define CSR_MSTATUS 0x300
+#define CSR_MISA 0x301
+#define CSR_MEDELEG 0x302
+#define CSR_MIDELEG 0x303
+#define CSR_MIE 0x304
+#define CSR_MTVEC 0x305
+#define CSR_MCOUNTEREN 0x306
+#define CSR_MSCRATCH 0x340
+#define CSR_MEPC 0x341
+#define CSR_MCAUSE 0x342
+#define CSR_MBADADDR 0x343
+#define CSR_MIP 0x344
+#define CSR_TSELECT 0x7a0
+#define CSR_TDATA1 0x7a1
+#define CSR_TDATA2 0x7a2
+#define CSR_TDATA3 0x7a3
+#define CSR_DCSR 0x7b0
+#define CSR_DPC 0x7b1
+#define CSR_DSCRATCH 0x7b2
+#define CSR_MCYCLE 0xb00
+#define CSR_MINSTRET 0xb02
+#define CSR_MHPMCOUNTER3 0xb03
+#define CSR_MHPMCOUNTER4 0xb04
+#define CSR_MHPMCOUNTER5 0xb05
+#define CSR_MHPMCOUNTER6 0xb06
+#define CSR_MHPMCOUNTER7 0xb07
+#define CSR_MHPMCOUNTER8 0xb08
+#define CSR_MHPMCOUNTER9 0xb09
+#define CSR_MHPMCOUNTER10 0xb0a
+#define CSR_MHPMCOUNTER11 0xb0b
+#define CSR_MHPMCOUNTER12 0xb0c
+#define CSR_MHPMCOUNTER13 0xb0d
+#define CSR_MHPMCOUNTER14 0xb0e
+#define CSR_MHPMCOUNTER15 0xb0f
+#define CSR_MHPMCOUNTER16 0xb10
+#define CSR_MHPMCOUNTER17 0xb11
+#define CSR_MHPMCOUNTER18 0xb12
+#define CSR_MHPMCOUNTER19 0xb13
+#define CSR_MHPMCOUNTER20 0xb14
+#define CSR_MHPMCOUNTER21 0xb15
+#define CSR_MHPMCOUNTER22 0xb16
+#define CSR_MHPMCOUNTER23 0xb17
+#define CSR_MHPMCOUNTER24 0xb18
+#define CSR_MHPMCOUNTER25 0xb19
+#define CSR_MHPMCOUNTER26 0xb1a
+#define CSR_MHPMCOUNTER27 0xb1b
+#define CSR_MHPMCOUNTER28 0xb1c
+#define CSR_MHPMCOUNTER29 0xb1d
+#define CSR_MHPMCOUNTER30 0xb1e
+#define CSR_MHPMCOUNTER31 0xb1f
+#define CSR_MUCOUNTEREN 0x320
+#define CSR_MSCOUNTEREN 0x321
+#define CSR_MHPMEVENT3 0x323
+#define CSR_MHPMEVENT4 0x324
+#define CSR_MHPMEVENT5 0x325
+#define CSR_MHPMEVENT6 0x326
+#define CSR_MHPMEVENT7 0x327
+#define CSR_MHPMEVENT8 0x328
+#define CSR_MHPMEVENT9 0x329
+#define CSR_MHPMEVENT10 0x32a
+#define CSR_MHPMEVENT11 0x32b
+#define CSR_MHPMEVENT12 0x32c
+#define CSR_MHPMEVENT13 0x32d
+#define CSR_MHPMEVENT14 0x32e
+#define CSR_MHPMEVENT15 0x32f
+#define CSR_MHPMEVENT16 0x330
+#define CSR_MHPMEVENT17 0x331
+#define CSR_MHPMEVENT18 0x332
+#define CSR_MHPMEVENT19 0x333
+#define CSR_MHPMEVENT20 0x334
+#define CSR_MHPMEVENT21 0x335
+#define CSR_MHPMEVENT22 0x336
+#define CSR_MHPMEVENT23 0x337
+#define CSR_MHPMEVENT24 0x338
+#define CSR_MHPMEVENT25 0x339
+#define CSR_MHPMEVENT26 0x33a
+#define CSR_MHPMEVENT27 0x33b
+#define CSR_MHPMEVENT28 0x33c
+#define CSR_MHPMEVENT29 0x33d
+#define CSR_MHPMEVENT30 0x33e
+#define CSR_MHPMEVENT31 0x33f
+#define CSR_MVENDORID 0xf11
+#define CSR_MARCHID 0xf12
+#define CSR_MIMPID 0xf13
+#define CSR_MHARTID 0xf14
+#define CSR_CYCLEH 0xc80
+#define CSR_TIMEH 0xc81
+#define CSR_INSTRETH 0xc82
+#define CSR_HPMCOUNTER3H 0xc83
+#define CSR_HPMCOUNTER4H 0xc84
+#define CSR_HPMCOUNTER5H 0xc85
+#define CSR_HPMCOUNTER6H 0xc86
+#define CSR_HPMCOUNTER7H 0xc87
+#define CSR_HPMCOUNTER8H 0xc88
+#define CSR_HPMCOUNTER9H 0xc89
+#define CSR_HPMCOUNTER10H 0xc8a
+#define CSR_HPMCOUNTER11H 0xc8b
+#define CSR_HPMCOUNTER12H 0xc8c
+#define CSR_HPMCOUNTER13H 0xc8d
+#define CSR_HPMCOUNTER14H 0xc8e
+#define CSR_HPMCOUNTER15H 0xc8f
+#define CSR_HPMCOUNTER16H 0xc90
+#define CSR_HPMCOUNTER17H 0xc91
+#define CSR_HPMCOUNTER18H 0xc92
+#define CSR_HPMCOUNTER19H 0xc93
+#define CSR_HPMCOUNTER20H 0xc94
+#define CSR_HPMCOUNTER21H 0xc95
+#define CSR_HPMCOUNTER22H 0xc96
+#define CSR_HPMCOUNTER23H 0xc97
+#define CSR_HPMCOUNTER24H 0xc98
+#define CSR_HPMCOUNTER25H 0xc99
+#define CSR_HPMCOUNTER26H 0xc9a
+#define CSR_HPMCOUNTER27H 0xc9b
+#define CSR_HPMCOUNTER28H 0xc9c
+#define CSR_HPMCOUNTER29H 0xc9d
+#define CSR_HPMCOUNTER30H 0xc9e
+#define CSR_HPMCOUNTER31H 0xc9f
+#define CSR_MCYCLEH 0xb80
+#define CSR_MINSTRETH 0xb82
+#define CSR_MHPMCOUNTER3H 0xb83
+#define CSR_MHPMCOUNTER4H 0xb84
+#define CSR_MHPMCOUNTER5H 0xb85
+#define CSR_MHPMCOUNTER6H 0xb86
+#define CSR_MHPMCOUNTER7H 0xb87
+#define CSR_MHPMCOUNTER8H 0xb88
+#define CSR_MHPMCOUNTER9H 0xb89
+#define CSR_MHPMCOUNTER10H 0xb8a
+#define CSR_MHPMCOUNTER11H 0xb8b
+#define CSR_MHPMCOUNTER12H 0xb8c
+#define CSR_MHPMCOUNTER13H 0xb8d
+#define CSR_MHPMCOUNTER14H 0xb8e
+#define CSR_MHPMCOUNTER15H 0xb8f
+#define CSR_MHPMCOUNTER16H 0xb90
+#define CSR_MHPMCOUNTER17H 0xb91
+#define CSR_MHPMCOUNTER18H 0xb92
+#define CSR_MHPMCOUNTER19H 0xb93
+#define CSR_MHPMCOUNTER20H 0xb94
+#define CSR_MHPMCOUNTER21H 0xb95
+#define CSR_MHPMCOUNTER22H 0xb96
+#define CSR_MHPMCOUNTER23H 0xb97
+#define CSR_MHPMCOUNTER24H 0xb98
+#define CSR_MHPMCOUNTER25H 0xb99
+#define CSR_MHPMCOUNTER26H 0xb9a
+#define CSR_MHPMCOUNTER27H 0xb9b
+#define CSR_MHPMCOUNTER28H 0xb9c
+#define CSR_MHPMCOUNTER29H 0xb9d
+#define CSR_MHPMCOUNTER30H 0xb9e
+#define CSR_MHPMCOUNTER31H 0xb9f
+
+
+#define CSR_MTVT               0x307
+#define CSR_MNXTI              0x345
+
+#define CSR_MCOUNTINHIBIT      0x320
+
+#define CSR_MNVEC              0x7C3
+
+#define CSR_MTVT2             0x7EC
+#define CSR_JALMNXTI          0x7ED
+#define CSR_PUSHMCAUSE        0x7EE
+#define CSR_PUSHMEPC          0x7EF
+#define CSR_PUSHMSUBM         0x7EB
+
+#define CSR_WFE            0x810
+#define CSR_SLEEPVALUE     0x811
+#define CSR_TXEVT          0x812
+
+#define CSR_MMISC_CTL      0x7d0
+#define CSR_MSUBM          0x7c4
+
+
+#define CAUSE_MISALIGNED_FETCH 0x0
+#define CAUSE_FAULT_FETCH 0x1
+#define CAUSE_ILLEGAL_INSTRUCTION 0x2
+#define CAUSE_BREAKPOINT 0x3
+#define CAUSE_MISALIGNED_LOAD 0x4
+#define CAUSE_FAULT_LOAD 0x5
+#define CAUSE_MISALIGNED_STORE 0x6
+#define CAUSE_FAULT_STORE 0x7
+#define CAUSE_USER_ECALL 0x8
+#define CAUSE_SUPERVISOR_ECALL 0x9
+#define CAUSE_HYPERVISOR_ECALL 0xa
+#define CAUSE_MACHINE_ECALL 0xb
+#endif
+#ifdef DECLARE_INSN
+DECLARE_INSN(beq, MATCH_BEQ, MASK_BEQ)
+DECLARE_INSN(bne, MATCH_BNE, MASK_BNE)
+DECLARE_INSN(blt, MATCH_BLT, MASK_BLT)
+DECLARE_INSN(bge, MATCH_BGE, MASK_BGE)
+DECLARE_INSN(bltu, MATCH_BLTU, MASK_BLTU)
+DECLARE_INSN(bgeu, MATCH_BGEU, MASK_BGEU)
+DECLARE_INSN(jalr, MATCH_JALR, MASK_JALR)
+DECLARE_INSN(jal, MATCH_JAL, MASK_JAL)
+DECLARE_INSN(lui, MATCH_LUI, MASK_LUI)
+DECLARE_INSN(auipc, MATCH_AUIPC, MASK_AUIPC)
+DECLARE_INSN(addi, MATCH_ADDI, MASK_ADDI)
+DECLARE_INSN(slli, MATCH_SLLI, MASK_SLLI)
+DECLARE_INSN(slti, MATCH_SLTI, MASK_SLTI)
+DECLARE_INSN(sltiu, MATCH_SLTIU, MASK_SLTIU)
+DECLARE_INSN(xori, MATCH_XORI, MASK_XORI)
+DECLARE_INSN(srli, MATCH_SRLI, MASK_SRLI)
+DECLARE_INSN(srai, MATCH_SRAI, MASK_SRAI)
+DECLARE_INSN(ori, MATCH_ORI, MASK_ORI)
+DECLARE_INSN(andi, MATCH_ANDI, MASK_ANDI)
+DECLARE_INSN(add, MATCH_ADD, MASK_ADD)
+DECLARE_INSN(sub, MATCH_SUB, MASK_SUB)
+DECLARE_INSN(sll, MATCH_SLL, MASK_SLL)
+DECLARE_INSN(slt, MATCH_SLT, MASK_SLT)
+DECLARE_INSN(sltu, MATCH_SLTU, MASK_SLTU)
+DECLARE_INSN(xor, MATCH_XOR, MASK_XOR)
+DECLARE_INSN(srl, MATCH_SRL, MASK_SRL)
+DECLARE_INSN(sra, MATCH_SRA, MASK_SRA)
+DECLARE_INSN(or, MATCH_OR, MASK_OR)
+DECLARE_INSN(and, MATCH_AND, MASK_AND)
+DECLARE_INSN(addiw, MATCH_ADDIW, MASK_ADDIW)
+DECLARE_INSN(slliw, MATCH_SLLIW, MASK_SLLIW)
+DECLARE_INSN(srliw, MATCH_SRLIW, MASK_SRLIW)
+DECLARE_INSN(sraiw, MATCH_SRAIW, MASK_SRAIW)
+DECLARE_INSN(addw, MATCH_ADDW, MASK_ADDW)
+DECLARE_INSN(subw, MATCH_SUBW, MASK_SUBW)
+DECLARE_INSN(sllw, MATCH_SLLW, MASK_SLLW)
+DECLARE_INSN(srlw, MATCH_SRLW, MASK_SRLW)
+DECLARE_INSN(sraw, MATCH_SRAW, MASK_SRAW)
+DECLARE_INSN(lb, MATCH_LB, MASK_LB)
+DECLARE_INSN(lh, MATCH_LH, MASK_LH)
+DECLARE_INSN(lw, MATCH_LW, MASK_LW)
+DECLARE_INSN(ld, MATCH_LD, MASK_LD)
+DECLARE_INSN(lbu, MATCH_LBU, MASK_LBU)
+DECLARE_INSN(lhu, MATCH_LHU, MASK_LHU)
+DECLARE_INSN(lwu, MATCH_LWU, MASK_LWU)
+DECLARE_INSN(sb, MATCH_SB, MASK_SB)
+DECLARE_INSN(sh, MATCH_SH, MASK_SH)
+DECLARE_INSN(sw, MATCH_SW, MASK_SW)
+DECLARE_INSN(sd, MATCH_SD, MASK_SD)
+DECLARE_INSN(fence, MATCH_FENCE, MASK_FENCE)
+DECLARE_INSN(fence_i, MATCH_FENCE_I, MASK_FENCE_I)
+DECLARE_INSN(mul, MATCH_MUL, MASK_MUL)
+DECLARE_INSN(mulh, MATCH_MULH, MASK_MULH)
+DECLARE_INSN(mulhsu, MATCH_MULHSU, MASK_MULHSU)
+DECLARE_INSN(mulhu, MATCH_MULHU, MASK_MULHU)
+DECLARE_INSN(div, MATCH_DIV, MASK_DIV)
+DECLARE_INSN(divu, MATCH_DIVU, MASK_DIVU)
+DECLARE_INSN(rem, MATCH_REM, MASK_REM)
+DECLARE_INSN(remu, MATCH_REMU, MASK_REMU)
+DECLARE_INSN(mulw, MATCH_MULW, MASK_MULW)
+DECLARE_INSN(divw, MATCH_DIVW, MASK_DIVW)
+DECLARE_INSN(divuw, MATCH_DIVUW, MASK_DIVUW)
+DECLARE_INSN(remw, MATCH_REMW, MASK_REMW)
+DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW)
+DECLARE_INSN(amoadd_w, MATCH_AMOADD_W, MASK_AMOADD_W)
+DECLARE_INSN(amoxor_w, MATCH_AMOXOR_W, MASK_AMOXOR_W)
+DECLARE_INSN(amoor_w, MATCH_AMOOR_W, MASK_AMOOR_W)
+DECLARE_INSN(amoand_w, MATCH_AMOAND_W, MASK_AMOAND_W)
+DECLARE_INSN(amomin_w, MATCH_AMOMIN_W, MASK_AMOMIN_W)
+DECLARE_INSN(amomax_w, MATCH_AMOMAX_W, MASK_AMOMAX_W)
+DECLARE_INSN(amominu_w, MATCH_AMOMINU_W, MASK_AMOMINU_W)
+DECLARE_INSN(amomaxu_w, MATCH_AMOMAXU_W, MASK_AMOMAXU_W)
+DECLARE_INSN(amoswap_w, MATCH_AMOSWAP_W, MASK_AMOSWAP_W)
+DECLARE_INSN(lr_w, MATCH_LR_W, MASK_LR_W)
+DECLARE_INSN(sc_w, MATCH_SC_W, MASK_SC_W)
+DECLARE_INSN(amoadd_d, MATCH_AMOADD_D, MASK_AMOADD_D)
+DECLARE_INSN(amoxor_d, MATCH_AMOXOR_D, MASK_AMOXOR_D)
+DECLARE_INSN(amoor_d, MATCH_AMOOR_D, MASK_AMOOR_D)
+DECLARE_INSN(amoand_d, MATCH_AMOAND_D, MASK_AMOAND_D)
+DECLARE_INSN(amomin_d, MATCH_AMOMIN_D, MASK_AMOMIN_D)
+DECLARE_INSN(amomax_d, MATCH_AMOMAX_D, MASK_AMOMAX_D)
+DECLARE_INSN(amominu_d, MATCH_AMOMINU_D, MASK_AMOMINU_D)
+DECLARE_INSN(amomaxu_d, MATCH_AMOMAXU_D, MASK_AMOMAXU_D)
+DECLARE_INSN(amoswap_d, MATCH_AMOSWAP_D, MASK_AMOSWAP_D)
+DECLARE_INSN(lr_d, MATCH_LR_D, MASK_LR_D)
+DECLARE_INSN(sc_d, MATCH_SC_D, MASK_SC_D)
+DECLARE_INSN(ecall, MATCH_ECALL, MASK_ECALL)
+DECLARE_INSN(ebreak, MATCH_EBREAK, MASK_EBREAK)
+DECLARE_INSN(uret, MATCH_URET, MASK_URET)
+DECLARE_INSN(sret, MATCH_SRET, MASK_SRET)
+DECLARE_INSN(hret, MATCH_HRET, MASK_HRET)
+DECLARE_INSN(mret, MATCH_MRET, MASK_MRET)
+DECLARE_INSN(dret, MATCH_DRET, MASK_DRET)
+DECLARE_INSN(sfence_vm, MATCH_SFENCE_VM, MASK_SFENCE_VM)
+DECLARE_INSN(wfi, MATCH_WFI, MASK_WFI)
+DECLARE_INSN(csrrw, MATCH_CSRRW, MASK_CSRRW)
+DECLARE_INSN(csrrs, MATCH_CSRRS, MASK_CSRRS)
+DECLARE_INSN(csrrc, MATCH_CSRRC, MASK_CSRRC)
+DECLARE_INSN(csrrwi, MATCH_CSRRWI, MASK_CSRRWI)
+DECLARE_INSN(csrrsi, MATCH_CSRRSI, MASK_CSRRSI)
+DECLARE_INSN(csrrci, MATCH_CSRRCI, MASK_CSRRCI)
+DECLARE_INSN(fadd_s, MATCH_FADD_S, MASK_FADD_S)
+DECLARE_INSN(fsub_s, MATCH_FSUB_S, MASK_FSUB_S)
+DECLARE_INSN(fmul_s, MATCH_FMUL_S, MASK_FMUL_S)
+DECLARE_INSN(fdiv_s, MATCH_FDIV_S, MASK_FDIV_S)
+DECLARE_INSN(fsgnj_s, MATCH_FSGNJ_S, MASK_FSGNJ_S)
+DECLARE_INSN(fsgnjn_s, MATCH_FSGNJN_S, MASK_FSGNJN_S)
+DECLARE_INSN(fsgnjx_s, MATCH_FSGNJX_S, MASK_FSGNJX_S)
+DECLARE_INSN(fmin_s, MATCH_FMIN_S, MASK_FMIN_S)
+DECLARE_INSN(fmax_s, MATCH_FMAX_S, MASK_FMAX_S)
+DECLARE_INSN(fsqrt_s, MATCH_FSQRT_S, MASK_FSQRT_S)
+DECLARE_INSN(fadd_d, MATCH_FADD_D, MASK_FADD_D)
+DECLARE_INSN(fsub_d, MATCH_FSUB_D, MASK_FSUB_D)
+DECLARE_INSN(fmul_d, MATCH_FMUL_D, MASK_FMUL_D)
+DECLARE_INSN(fdiv_d, MATCH_FDIV_D, MASK_FDIV_D)
+DECLARE_INSN(fsgnj_d, MATCH_FSGNJ_D, MASK_FSGNJ_D)
+DECLARE_INSN(fsgnjn_d, MATCH_FSGNJN_D, MASK_FSGNJN_D)
+DECLARE_INSN(fsgnjx_d, MATCH_FSGNJX_D, MASK_FSGNJX_D)
+DECLARE_INSN(fmin_d, MATCH_FMIN_D, MASK_FMIN_D)
+DECLARE_INSN(fmax_d, MATCH_FMAX_D, MASK_FMAX_D)
+DECLARE_INSN(fcvt_s_d, MATCH_FCVT_S_D, MASK_FCVT_S_D)
+DECLARE_INSN(fcvt_d_s, MATCH_FCVT_D_S, MASK_FCVT_D_S)
+DECLARE_INSN(fsqrt_d, MATCH_FSQRT_D, MASK_FSQRT_D)
+DECLARE_INSN(fle_s, MATCH_FLE_S, MASK_FLE_S)
+DECLARE_INSN(flt_s, MATCH_FLT_S, MASK_FLT_S)
+DECLARE_INSN(feq_s, MATCH_FEQ_S, MASK_FEQ_S)
+DECLARE_INSN(fle_d, MATCH_FLE_D, MASK_FLE_D)
+DECLARE_INSN(flt_d, MATCH_FLT_D, MASK_FLT_D)
+DECLARE_INSN(feq_d, MATCH_FEQ_D, MASK_FEQ_D)
+DECLARE_INSN(fcvt_w_s, MATCH_FCVT_W_S, MASK_FCVT_W_S)
+DECLARE_INSN(fcvt_wu_s, MATCH_FCVT_WU_S, MASK_FCVT_WU_S)
+DECLARE_INSN(fcvt_l_s, MATCH_FCVT_L_S, MASK_FCVT_L_S)
+DECLARE_INSN(fcvt_lu_s, MATCH_FCVT_LU_S, MASK_FCVT_LU_S)
+DECLARE_INSN(fmv_x_s, MATCH_FMV_X_S, MASK_FMV_X_S)
+DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S)
+DECLARE_INSN(fcvt_w_d, MATCH_FCVT_W_D, MASK_FCVT_W_D)
+DECLARE_INSN(fcvt_wu_d, MATCH_FCVT_WU_D, MASK_FCVT_WU_D)
+DECLARE_INSN(fcvt_l_d, MATCH_FCVT_L_D, MASK_FCVT_L_D)
+DECLARE_INSN(fcvt_lu_d, MATCH_FCVT_LU_D, MASK_FCVT_LU_D)
+DECLARE_INSN(fmv_x_d, MATCH_FMV_X_D, MASK_FMV_X_D)
+DECLARE_INSN(fclass_d, MATCH_FCLASS_D, MASK_FCLASS_D)
+DECLARE_INSN(fcvt_s_w, MATCH_FCVT_S_W, MASK_FCVT_S_W)
+DECLARE_INSN(fcvt_s_wu, MATCH_FCVT_S_WU, MASK_FCVT_S_WU)
+DECLARE_INSN(fcvt_s_l, MATCH_FCVT_S_L, MASK_FCVT_S_L)
+DECLARE_INSN(fcvt_s_lu, MATCH_FCVT_S_LU, MASK_FCVT_S_LU)
+DECLARE_INSN(fmv_s_x, MATCH_FMV_S_X, MASK_FMV_S_X)
+DECLARE_INSN(fcvt_d_w, MATCH_FCVT_D_W, MASK_FCVT_D_W)
+DECLARE_INSN(fcvt_d_wu, MATCH_FCVT_D_WU, MASK_FCVT_D_WU)
+DECLARE_INSN(fcvt_d_l, MATCH_FCVT_D_L, MASK_FCVT_D_L)
+DECLARE_INSN(fcvt_d_lu, MATCH_FCVT_D_LU, MASK_FCVT_D_LU)
+DECLARE_INSN(fmv_d_x, MATCH_FMV_D_X, MASK_FMV_D_X)
+DECLARE_INSN(flw, MATCH_FLW, MASK_FLW)
+DECLARE_INSN(fld, MATCH_FLD, MASK_FLD)
+DECLARE_INSN(fsw, MATCH_FSW, MASK_FSW)
+DECLARE_INSN(fsd, MATCH_FSD, MASK_FSD)
+DECLARE_INSN(fmadd_s, MATCH_FMADD_S, MASK_FMADD_S)
+DECLARE_INSN(fmsub_s, MATCH_FMSUB_S, MASK_FMSUB_S)
+DECLARE_INSN(fnmsub_s, MATCH_FNMSUB_S, MASK_FNMSUB_S)
+DECLARE_INSN(fnmadd_s, MATCH_FNMADD_S, MASK_FNMADD_S)
+DECLARE_INSN(fmadd_d, MATCH_FMADD_D, MASK_FMADD_D)
+DECLARE_INSN(fmsub_d, MATCH_FMSUB_D, MASK_FMSUB_D)
+DECLARE_INSN(fnmsub_d, MATCH_FNMSUB_D, MASK_FNMSUB_D)
+DECLARE_INSN(fnmadd_d, MATCH_FNMADD_D, MASK_FNMADD_D)
+DECLARE_INSN(c_nop, MATCH_C_NOP, MASK_C_NOP)
+DECLARE_INSN(c_addi16sp, MATCH_C_ADDI16SP, MASK_C_ADDI16SP)
+DECLARE_INSN(c_jr, MATCH_C_JR, MASK_C_JR)
+DECLARE_INSN(c_jalr, MATCH_C_JALR, MASK_C_JALR)
+DECLARE_INSN(c_ebreak, MATCH_C_EBREAK, MASK_C_EBREAK)
+DECLARE_INSN(c_ld, MATCH_C_LD, MASK_C_LD)
+DECLARE_INSN(c_sd, MATCH_C_SD, MASK_C_SD)
+DECLARE_INSN(c_addiw, MATCH_C_ADDIW, MASK_C_ADDIW)
+DECLARE_INSN(c_ldsp, MATCH_C_LDSP, MASK_C_LDSP)
+DECLARE_INSN(c_sdsp, MATCH_C_SDSP, MASK_C_SDSP)
+DECLARE_INSN(c_addi4spn, MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN)
+DECLARE_INSN(c_fld, MATCH_C_FLD, MASK_C_FLD)
+DECLARE_INSN(c_lw, MATCH_C_LW, MASK_C_LW)
+DECLARE_INSN(c_flw, MATCH_C_FLW, MASK_C_FLW)
+DECLARE_INSN(c_fsd, MATCH_C_FSD, MASK_C_FSD)
+DECLARE_INSN(c_sw, MATCH_C_SW, MASK_C_SW)
+DECLARE_INSN(c_fsw, MATCH_C_FSW, MASK_C_FSW)
+DECLARE_INSN(c_addi, MATCH_C_ADDI, MASK_C_ADDI)
+DECLARE_INSN(c_jal, MATCH_C_JAL, MASK_C_JAL)
+DECLARE_INSN(c_li, MATCH_C_LI, MASK_C_LI)
+DECLARE_INSN(c_lui, MATCH_C_LUI, MASK_C_LUI)
+DECLARE_INSN(c_srli, MATCH_C_SRLI, MASK_C_SRLI)
+DECLARE_INSN(c_srai, MATCH_C_SRAI, MASK_C_SRAI)
+DECLARE_INSN(c_andi, MATCH_C_ANDI, MASK_C_ANDI)
+DECLARE_INSN(c_sub, MATCH_C_SUB, MASK_C_SUB)
+DECLARE_INSN(c_xor, MATCH_C_XOR, MASK_C_XOR)
+DECLARE_INSN(c_or, MATCH_C_OR, MASK_C_OR)
+DECLARE_INSN(c_and, MATCH_C_AND, MASK_C_AND)
+DECLARE_INSN(c_subw, MATCH_C_SUBW, MASK_C_SUBW)
+DECLARE_INSN(c_addw, MATCH_C_ADDW, MASK_C_ADDW)
+DECLARE_INSN(c_j, MATCH_C_J, MASK_C_J)
+DECLARE_INSN(c_beqz, MATCH_C_BEQZ, MASK_C_BEQZ)
+DECLARE_INSN(c_bnez, MATCH_C_BNEZ, MASK_C_BNEZ)
+DECLARE_INSN(c_slli, MATCH_C_SLLI, MASK_C_SLLI)
+DECLARE_INSN(c_fldsp, MATCH_C_FLDSP, MASK_C_FLDSP)
+DECLARE_INSN(c_lwsp, MATCH_C_LWSP, MASK_C_LWSP)
+DECLARE_INSN(c_flwsp, MATCH_C_FLWSP, MASK_C_FLWSP)
+DECLARE_INSN(c_mv, MATCH_C_MV, MASK_C_MV)
+DECLARE_INSN(c_add, MATCH_C_ADD, MASK_C_ADD)
+DECLARE_INSN(c_fsdsp, MATCH_C_FSDSP, MASK_C_FSDSP)
+DECLARE_INSN(c_swsp, MATCH_C_SWSP, MASK_C_SWSP)
+DECLARE_INSN(c_fswsp, MATCH_C_FSWSP, MASK_C_FSWSP)
+DECLARE_INSN(custom0, MATCH_CUSTOM0, MASK_CUSTOM0)
+DECLARE_INSN(custom0_rs1, MATCH_CUSTOM0_RS1, MASK_CUSTOM0_RS1)
+DECLARE_INSN(custom0_rs1_rs2, MATCH_CUSTOM0_RS1_RS2, MASK_CUSTOM0_RS1_RS2)
+DECLARE_INSN(custom0_rd, MATCH_CUSTOM0_RD, MASK_CUSTOM0_RD)
+DECLARE_INSN(custom0_rd_rs1, MATCH_CUSTOM0_RD_RS1, MASK_CUSTOM0_RD_RS1)
+DECLARE_INSN(custom0_rd_rs1_rs2, MATCH_CUSTOM0_RD_RS1_RS2, 
+MASK_CUSTOM0_RD_RS1_RS2)
+DECLARE_INSN(custom1, MATCH_CUSTOM1, MASK_CUSTOM1)
+DECLARE_INSN(custom1_rs1, MATCH_CUSTOM1_RS1, MASK_CUSTOM1_RS1)
+DECLARE_INSN(custom1_rs1_rs2, MATCH_CUSTOM1_RS1_RS2, MASK_CUSTOM1_RS1_RS2)
+DECLARE_INSN(custom1_rd, MATCH_CUSTOM1_RD, MASK_CUSTOM1_RD)
+DECLARE_INSN(custom1_rd_rs1, MATCH_CUSTOM1_RD_RS1, MASK_CUSTOM1_RD_RS1)
+DECLARE_INSN(custom1_rd_rs1_rs2, MATCH_CUSTOM1_RD_RS1_RS2, 
+MASK_CUSTOM1_RD_RS1_RS2)
+DECLARE_INSN(custom2, MATCH_CUSTOM2, MASK_CUSTOM2)
+DECLARE_INSN(custom2_rs1, MATCH_CUSTOM2_RS1, MASK_CUSTOM2_RS1)
+DECLARE_INSN(custom2_rs1_rs2, MATCH_CUSTOM2_RS1_RS2, MASK_CUSTOM2_RS1_RS2)
+DECLARE_INSN(custom2_rd, MATCH_CUSTOM2_RD, MASK_CUSTOM2_RD)
+DECLARE_INSN(custom2_rd_rs1, MATCH_CUSTOM2_RD_RS1, MASK_CUSTOM2_RD_RS1)
+DECLARE_INSN(custom2_rd_rs1_rs2, MATCH_CUSTOM2_RD_RS1_RS2, 
+MASK_CUSTOM2_RD_RS1_RS2)
+DECLARE_INSN(custom3, MATCH_CUSTOM3, MASK_CUSTOM3)
+DECLARE_INSN(custom3_rs1, MATCH_CUSTOM3_RS1, MASK_CUSTOM3_RS1)
+DECLARE_INSN(custom3_rs1_rs2, MATCH_CUSTOM3_RS1_RS2, MASK_CUSTOM3_RS1_RS2)
+DECLARE_INSN(custom3_rd, MATCH_CUSTOM3_RD, MASK_CUSTOM3_RD)
+DECLARE_INSN(custom3_rd_rs1, MATCH_CUSTOM3_RD_RS1, MASK_CUSTOM3_RD_RS1)
+DECLARE_INSN(custom3_rd_rs1_rs2, MATCH_CUSTOM3_RD_RS1_RS2, 
+MASK_CUSTOM3_RD_RS1_RS2)
+#endif
+#ifdef DECLARE_CSR
+DECLARE_CSR(fflags, CSR_FFLAGS)
+DECLARE_CSR(frm, CSR_FRM)
+DECLARE_CSR(fcsr, CSR_FCSR)
+DECLARE_CSR(cycle, CSR_CYCLE)
+DECLARE_CSR(time, CSR_TIME)
+DECLARE_CSR(instret, CSR_INSTRET)
+DECLARE_CSR(hpmcounter3, CSR_HPMCOUNTER3)
+DECLARE_CSR(hpmcounter4, CSR_HPMCOUNTER4)
+DECLARE_CSR(hpmcounter5, CSR_HPMCOUNTER5)
+DECLARE_CSR(hpmcounter6, CSR_HPMCOUNTER6)
+DECLARE_CSR(hpmcounter7, CSR_HPMCOUNTER7)
+DECLARE_CSR(hpmcounter8, CSR_HPMCOUNTER8)
+DECLARE_CSR(hpmcounter9, CSR_HPMCOUNTER9)
+DECLARE_CSR(hpmcounter10, CSR_HPMCOUNTER10)
+DECLARE_CSR(hpmcounter11, CSR_HPMCOUNTER11)
+DECLARE_CSR(hpmcounter12, CSR_HPMCOUNTER12)
+DECLARE_CSR(hpmcounter13, CSR_HPMCOUNTER13)
+DECLARE_CSR(hpmcounter14, CSR_HPMCOUNTER14)
+DECLARE_CSR(hpmcounter15, CSR_HPMCOUNTER15)
+DECLARE_CSR(hpmcounter16, CSR_HPMCOUNTER16)
+DECLARE_CSR(hpmcounter17, CSR_HPMCOUNTER17)
+DECLARE_CSR(hpmcounter18, CSR_HPMCOUNTER18)
+DECLARE_CSR(hpmcounter19, CSR_HPMCOUNTER19)
+DECLARE_CSR(hpmcounter20, CSR_HPMCOUNTER20)
+DECLARE_CSR(hpmcounter21, CSR_HPMCOUNTER21)
+DECLARE_CSR(hpmcounter22, CSR_HPMCOUNTER22)
+DECLARE_CSR(hpmcounter23, CSR_HPMCOUNTER23)
+DECLARE_CSR(hpmcounter24, CSR_HPMCOUNTER24)
+DECLARE_CSR(hpmcounter25, CSR_HPMCOUNTER25)
+DECLARE_CSR(hpmcounter26, CSR_HPMCOUNTER26)
+DECLARE_CSR(hpmcounter27, CSR_HPMCOUNTER27)
+DECLARE_CSR(hpmcounter28, CSR_HPMCOUNTER28)
+DECLARE_CSR(hpmcounter29, CSR_HPMCOUNTER29)
+DECLARE_CSR(hpmcounter30, CSR_HPMCOUNTER30)
+DECLARE_CSR(hpmcounter31, CSR_HPMCOUNTER31)
+DECLARE_CSR(sstatus, CSR_SSTATUS)
+DECLARE_CSR(sie, CSR_SIE)
+DECLARE_CSR(stvec, CSR_STVEC)
+DECLARE_CSR(sscratch, CSR_SSCRATCH)
+DECLARE_CSR(sepc, CSR_SEPC)
+DECLARE_CSR(scause, CSR_SCAUSE)
+DECLARE_CSR(sbadaddr, CSR_SBADADDR)
+DECLARE_CSR(sip, CSR_SIP)
+DECLARE_CSR(sptbr, CSR_SPTBR)
+DECLARE_CSR(mstatus, CSR_MSTATUS)
+DECLARE_CSR(misa, CSR_MISA)
+DECLARE_CSR(medeleg, CSR_MEDELEG)
+DECLARE_CSR(mideleg, CSR_MIDELEG)
+DECLARE_CSR(mie, CSR_MIE)
+DECLARE_CSR(mtvec, CSR_MTVEC)
+DECLARE_CSR(mscratch, CSR_MSCRATCH)
+DECLARE_CSR(mepc, CSR_MEPC)
+DECLARE_CSR(mcause, CSR_MCAUSE)
+DECLARE_CSR(mbadaddr, CSR_MBADADDR)
+DECLARE_CSR(mip, CSR_MIP)
+DECLARE_CSR(tselect, CSR_TSELECT)
+DECLARE_CSR(tdata1, CSR_TDATA1)
+DECLARE_CSR(tdata2, CSR_TDATA2)
+DECLARE_CSR(tdata3, CSR_TDATA3)
+DECLARE_CSR(dcsr, CSR_DCSR)
+DECLARE_CSR(dpc, CSR_DPC)
+DECLARE_CSR(dscratch, CSR_DSCRATCH)
+DECLARE_CSR(mcycle, CSR_MCYCLE)
+DECLARE_CSR(minstret, CSR_MINSTRET)
+DECLARE_CSR(mhpmcounter3, CSR_MHPMCOUNTER3)
+DECLARE_CSR(mhpmcounter4, CSR_MHPMCOUNTER4)
+DECLARE_CSR(mhpmcounter5, CSR_MHPMCOUNTER5)
+DECLARE_CSR(mhpmcounter6, CSR_MHPMCOUNTER6)
+DECLARE_CSR(mhpmcounter7, CSR_MHPMCOUNTER7)
+DECLARE_CSR(mhpmcounter8, CSR_MHPMCOUNTER8)
+DECLARE_CSR(mhpmcounter9, CSR_MHPMCOUNTER9)
+DECLARE_CSR(mhpmcounter10, CSR_MHPMCOUNTER10)
+DECLARE_CSR(mhpmcounter11, CSR_MHPMCOUNTER11)
+DECLARE_CSR(mhpmcounter12, CSR_MHPMCOUNTER12)
+DECLARE_CSR(mhpmcounter13, CSR_MHPMCOUNTER13)
+DECLARE_CSR(mhpmcounter14, CSR_MHPMCOUNTER14)
+DECLARE_CSR(mhpmcounter15, CSR_MHPMCOUNTER15)
+DECLARE_CSR(mhpmcounter16, CSR_MHPMCOUNTER16)
+DECLARE_CSR(mhpmcounter17, CSR_MHPMCOUNTER17)
+DECLARE_CSR(mhpmcounter18, CSR_MHPMCOUNTER18)
+DECLARE_CSR(mhpmcounter19, CSR_MHPMCOUNTER19)
+DECLARE_CSR(mhpmcounter20, CSR_MHPMCOUNTER20)
+DECLARE_CSR(mhpmcounter21, CSR_MHPMCOUNTER21)
+DECLARE_CSR(mhpmcounter22, CSR_MHPMCOUNTER22)
+DECLARE_CSR(mhpmcounter23, CSR_MHPMCOUNTER23)
+DECLARE_CSR(mhpmcounter24, CSR_MHPMCOUNTER24)
+DECLARE_CSR(mhpmcounter25, CSR_MHPMCOUNTER25)
+DECLARE_CSR(mhpmcounter26, CSR_MHPMCOUNTER26)
+DECLARE_CSR(mhpmcounter27, CSR_MHPMCOUNTER27)
+DECLARE_CSR(mhpmcounter28, CSR_MHPMCOUNTER28)
+DECLARE_CSR(mhpmcounter29, CSR_MHPMCOUNTER29)
+DECLARE_CSR(mhpmcounter30, CSR_MHPMCOUNTER30)
+DECLARE_CSR(mhpmcounter31, CSR_MHPMCOUNTER31)
+DECLARE_CSR(mucounteren, CSR_MUCOUNTEREN)
+DECLARE_CSR(mscounteren, CSR_MSCOUNTEREN)
+DECLARE_CSR(mhpmevent3, CSR_MHPMEVENT3)
+DECLARE_CSR(mhpmevent4, CSR_MHPMEVENT4)
+DECLARE_CSR(mhpmevent5, CSR_MHPMEVENT5)
+DECLARE_CSR(mhpmevent6, CSR_MHPMEVENT6)
+DECLARE_CSR(mhpmevent7, CSR_MHPMEVENT7)
+DECLARE_CSR(mhpmevent8, CSR_MHPMEVENT8)
+DECLARE_CSR(mhpmevent9, CSR_MHPMEVENT9)
+DECLARE_CSR(mhpmevent10, CSR_MHPMEVENT10)
+DECLARE_CSR(mhpmevent11, CSR_MHPMEVENT11)
+DECLARE_CSR(mhpmevent12, CSR_MHPMEVENT12)
+DECLARE_CSR(mhpmevent13, CSR_MHPMEVENT13)
+DECLARE_CSR(mhpmevent14, CSR_MHPMEVENT14)
+DECLARE_CSR(mhpmevent15, CSR_MHPMEVENT15)
+DECLARE_CSR(mhpmevent16, CSR_MHPMEVENT16)
+DECLARE_CSR(mhpmevent17, CSR_MHPMEVENT17)
+DECLARE_CSR(mhpmevent18, CSR_MHPMEVENT18)
+DECLARE_CSR(mhpmevent19, CSR_MHPMEVENT19)
+DECLARE_CSR(mhpmevent20, CSR_MHPMEVENT20)
+DECLARE_CSR(mhpmevent21, CSR_MHPMEVENT21)
+DECLARE_CSR(mhpmevent22, CSR_MHPMEVENT22)
+DECLARE_CSR(mhpmevent23, CSR_MHPMEVENT23)
+DECLARE_CSR(mhpmevent24, CSR_MHPMEVENT24)
+DECLARE_CSR(mhpmevent25, CSR_MHPMEVENT25)
+DECLARE_CSR(mhpmevent26, CSR_MHPMEVENT26)
+DECLARE_CSR(mhpmevent27, CSR_MHPMEVENT27)
+DECLARE_CSR(mhpmevent28, CSR_MHPMEVENT28)
+DECLARE_CSR(mhpmevent29, CSR_MHPMEVENT29)
+DECLARE_CSR(mhpmevent30, CSR_MHPMEVENT30)
+DECLARE_CSR(mhpmevent31, CSR_MHPMEVENT31)
+DECLARE_CSR(mvendorid, CSR_MVENDORID)
+DECLARE_CSR(marchid, CSR_MARCHID)
+DECLARE_CSR(mimpid, CSR_MIMPID)
+DECLARE_CSR(mhartid, CSR_MHARTID)
+DECLARE_CSR(cycleh, CSR_CYCLEH)
+DECLARE_CSR(timeh, CSR_TIMEH)
+DECLARE_CSR(instreth, CSR_INSTRETH)
+DECLARE_CSR(hpmcounter3h, CSR_HPMCOUNTER3H)
+DECLARE_CSR(hpmcounter4h, CSR_HPMCOUNTER4H)
+DECLARE_CSR(hpmcounter5h, CSR_HPMCOUNTER5H)
+DECLARE_CSR(hpmcounter6h, CSR_HPMCOUNTER6H)
+DECLARE_CSR(hpmcounter7h, CSR_HPMCOUNTER7H)
+DECLARE_CSR(hpmcounter8h, CSR_HPMCOUNTER8H)
+DECLARE_CSR(hpmcounter9h, CSR_HPMCOUNTER9H)
+DECLARE_CSR(hpmcounter10h, CSR_HPMCOUNTER10H)
+DECLARE_CSR(hpmcounter11h, CSR_HPMCOUNTER11H)
+DECLARE_CSR(hpmcounter12h, CSR_HPMCOUNTER12H)
+DECLARE_CSR(hpmcounter13h, CSR_HPMCOUNTER13H)
+DECLARE_CSR(hpmcounter14h, CSR_HPMCOUNTER14H)
+DECLARE_CSR(hpmcounter15h, CSR_HPMCOUNTER15H)
+DECLARE_CSR(hpmcounter16h, CSR_HPMCOUNTER16H)
+DECLARE_CSR(hpmcounter17h, CSR_HPMCOUNTER17H)
+DECLARE_CSR(hpmcounter18h, CSR_HPMCOUNTER18H)
+DECLARE_CSR(hpmcounter19h, CSR_HPMCOUNTER19H)
+DECLARE_CSR(hpmcounter20h, CSR_HPMCOUNTER20H)
+DECLARE_CSR(hpmcounter21h, CSR_HPMCOUNTER21H)
+DECLARE_CSR(hpmcounter22h, CSR_HPMCOUNTER22H)
+DECLARE_CSR(hpmcounter23h, CSR_HPMCOUNTER23H)
+DECLARE_CSR(hpmcounter24h, CSR_HPMCOUNTER24H)
+DECLARE_CSR(hpmcounter25h, CSR_HPMCOUNTER25H)
+DECLARE_CSR(hpmcounter26h, CSR_HPMCOUNTER26H)
+DECLARE_CSR(hpmcounter27h, CSR_HPMCOUNTER27H)
+DECLARE_CSR(hpmcounter28h, CSR_HPMCOUNTER28H)
+DECLARE_CSR(hpmcounter29h, CSR_HPMCOUNTER29H)
+DECLARE_CSR(hpmcounter30h, CSR_HPMCOUNTER30H)
+DECLARE_CSR(hpmcounter31h, CSR_HPMCOUNTER31H)
+DECLARE_CSR(mcycleh, CSR_MCYCLEH)
+DECLARE_CSR(minstreth, CSR_MINSTRETH)
+DECLARE_CSR(mhpmcounter3h, CSR_MHPMCOUNTER3H)
+DECLARE_CSR(mhpmcounter4h, CSR_MHPMCOUNTER4H)
+DECLARE_CSR(mhpmcounter5h, CSR_MHPMCOUNTER5H)
+DECLARE_CSR(mhpmcounter6h, CSR_MHPMCOUNTER6H)
+DECLARE_CSR(mhpmcounter7h, CSR_MHPMCOUNTER7H)
+DECLARE_CSR(mhpmcounter8h, CSR_MHPMCOUNTER8H)
+DECLARE_CSR(mhpmcounter9h, CSR_MHPMCOUNTER9H)
+DECLARE_CSR(mhpmcounter10h, CSR_MHPMCOUNTER10H)
+DECLARE_CSR(mhpmcounter11h, CSR_MHPMCOUNTER11H)
+DECLARE_CSR(mhpmcounter12h, CSR_MHPMCOUNTER12H)
+DECLARE_CSR(mhpmcounter13h, CSR_MHPMCOUNTER13H)
+DECLARE_CSR(mhpmcounter14h, CSR_MHPMCOUNTER14H)
+DECLARE_CSR(mhpmcounter15h, CSR_MHPMCOUNTER15H)
+DECLARE_CSR(mhpmcounter16h, CSR_MHPMCOUNTER16H)
+DECLARE_CSR(mhpmcounter17h, CSR_MHPMCOUNTER17H)
+DECLARE_CSR(mhpmcounter18h, CSR_MHPMCOUNTER18H)
+DECLARE_CSR(mhpmcounter19h, CSR_MHPMCOUNTER19H)
+DECLARE_CSR(mhpmcounter20h, CSR_MHPMCOUNTER20H)
+DECLARE_CSR(mhpmcounter21h, CSR_MHPMCOUNTER21H)
+DECLARE_CSR(mhpmcounter22h, CSR_MHPMCOUNTER22H)
+DECLARE_CSR(mhpmcounter23h, CSR_MHPMCOUNTER23H)
+DECLARE_CSR(mhpmcounter24h, CSR_MHPMCOUNTER24H)
+DECLARE_CSR(mhpmcounter25h, CSR_MHPMCOUNTER25H)
+DECLARE_CSR(mhpmcounter26h, CSR_MHPMCOUNTER26H)
+DECLARE_CSR(mhpmcounter27h, CSR_MHPMCOUNTER27H)
+DECLARE_CSR(mhpmcounter28h, CSR_MHPMCOUNTER28H)
+DECLARE_CSR(mhpmcounter29h, CSR_MHPMCOUNTER29H)
+DECLARE_CSR(mhpmcounter30h, CSR_MHPMCOUNTER30H)
+DECLARE_CSR(mhpmcounter31h, CSR_MHPMCOUNTER31H)
+#endif
+#ifdef DECLARE_CAUSE
+DECLARE_CAUSE("misaligned fetch", CAUSE_MISALIGNED_FETCH)
+DECLARE_CAUSE("fault fetch", CAUSE_FAULT_FETCH)
+DECLARE_CAUSE("illegal instruction", CAUSE_ILLEGAL_INSTRUCTION)
+DECLARE_CAUSE("breakpoint", CAUSE_BREAKPOINT)
+DECLARE_CAUSE("misaligned load", CAUSE_MISALIGNED_LOAD)
+DECLARE_CAUSE("fault load", CAUSE_FAULT_LOAD)
+DECLARE_CAUSE("misaligned store", CAUSE_MISALIGNED_STORE)
+DECLARE_CAUSE("fault store", CAUSE_FAULT_STORE)
+DECLARE_CAUSE("user_ecall", CAUSE_USER_ECALL)
+DECLARE_CAUSE("supervisor_ecall", CAUSE_SUPERVISOR_ECALL)
+DECLARE_CAUSE("hypervisor_ecall", CAUSE_HYPERVISOR_ECALL)
+DECLARE_CAUSE("machine_ecall", CAUSE_MACHINE_ECALL)
+#endif
+
diff --git a/drivers/bl702_driver/startup/GCC/entry.S b/drivers/bl702_driver/startup/GCC/entry.S
new file mode 100644
index 00000000..dccee584
--- /dev/null
+++ b/drivers/bl702_driver/startup/GCC/entry.S
@@ -0,0 +1,131 @@
+/* Copyright 2018 SiFive, Inc */
+/* SPDX-License-Identifier: Apache-2.0 */
+#include "riscv_encoding.h"
+
+/* This code executes before _start, which is contained inside the C library.
+ * In embedded systems we want to ensure that _enter, which contains the first
+ * code to be executed, can be loaded at a specific address.  To enable this
+ * feature we provide the '.text.metal.init.enter' section, which is
+ * defined to have the first address being where execution should start. */
+.section .text.metal.init.enter
+.global _enter
+_enter:
+    .cfi_startproc
+
+    /* Inform the debugger that there is nowhere to backtrace past _enter. */
+    .cfi_undefined ra
+
+    /* The absolute first thing that must happen is configuring the global
+     * pointer register, which must be done with relaxation disabled because
+     * it's not valid to obtain the address of any symbol without GP
+     * configured.  The C environment might go ahead and do this again, but
+     * that's safe as it's a fixed register. */
+.option push
+.option norelax
+    la gp, __global_pointer$
+.option pop
+
+    /* Disable global interrupt */
+    /*clear_csr(mstatus, MSTATUS_MIE);*/
+    csrci mstatus,8
+
+    /* Set up a simple trap vector to catch anything that goes wrong early in
+     * the boot process. */
+    la t0, Trap_Handler_Stub
+    /* enable CLIC Vectored mode */
+    ori	t0,t0,3
+    csrw mtvec, t0
+    /* enable chicken bit if core is bullet series*/
+    la t0, __metal_chicken_bit
+    beqz t0, 1f
+    csrwi 0x7C1, 0
+1:
+
+    /* There may be pre-initialization routines inside the MBI code that run in
+     * C, so here we set up a C environment.  First we set up a stack pointer,
+     * which is left as a weak reference in order to allow initialization
+     * routines that do not need a stack to be set up to transparently be
+     * called. */
+    .weak __StackTop
+    la sp, __StackTop
+    
+    /* Intial the mtvt, MUST BE 64 bytes aligned*/
+    .weak __Vectors
+    la t0, __Vectors
+    csrw mtvt, t0
+
+#if __riscv_float_abi_single
+    /* deal with FP */
+    /* Is F extension present? */
+    csrr t0, misa
+    andi t0, t0, (1 << ('F' - 'A'))
+    beqz t0, 1f
+    /* If so, enable it */
+    li t0, MSTATUS_FS
+    csrs mstatus, t0
+    fssr x0
+1:
+#endif
+
+    /* Check for an initialization routine and call it if one exists, otherwise
+     * just skip over the call entirely.   Note that __metal_initialize isn't
+     * actually a full C function, as it doesn't end up with the .bss or .data
+     * segments having been initialized.  This is done to avoid putting a
+     * burden on systems that can be initialized without having a C environment
+     * set up. */
+    call SystemInit
+
+    /* start load code to itcm like. */
+    call start_load
+
+    /* At this point we can enter the C runtime's startup file.  The arguments
+     * to this function are designed to match those provided to the SEE, just
+     * so we don't have to write another ABI. */
+    csrr a0, mhartid
+    li a1, 0
+    li a2, 0
+    call main
+
+    /* If we've made it back here then there's probably something wrong.  We
+     * allow the METAL to register a handler here. */
+    .weak __metal_after_main
+    la ra, __metal_after_main
+    beqz ra, 1f
+    jalr ra
+1:
+
+    /* If that handler returns then there's not a whole lot we can do.  Just
+     * try to make some noise. */
+     la t0, 1f
+     csrw mtvec, t0
+1:
+     lw t1, 0(x0)
+     j 1b
+
+    .cfi_endproc
+
+/* For sanity's sake we set up an early trap vector that just does nothing.  If
+ * you end up here then there's a bug in the early boot code somewhere. */
+.weak Trap_Handler_Stub
+.section .text.metal.init.trapvec
+.align 2
+Trap_Handler_Stub:
+    .cfi_startproc
+    csrr t0, mcause
+    csrr t1, mepc
+    csrr t2, mtval
+    j Trap_Handler_Stub
+    .cfi_endproc
+
+/* The GCC port might not emit a __register_frame_info symbol, which eventually
+ * results in a weak undefined reference that eventually causes crash when it
+ * is dereference early in boot.  We really shouldn't need to put this here,
+ * but to deal with what I think is probably a bug in the linker script I'm
+ * going to leave this in for now.  At least it's fairly cheap :) */
+.weak __register_frame_info
+.global __register_frame_info
+.section .text.metal.init.__register_frame_info
+__register_frame_info:
+    .cfi_startproc
+    ret
+    .cfi_endproc
diff --git a/drivers/bl702_driver/startup/GCC/start_load.c b/drivers/bl702_driver/startup/GCC/start_load.c
new file mode 100644
index 00000000..be5aec4a
--- /dev/null
+++ b/drivers/bl702_driver/startup/GCC/start_load.c
@@ -0,0 +1,109 @@
+/**
+ * @file start_load.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+
+#include 
+#include "bl702.h"
+
+#define __STARTUP_CLEAR_BSS             1
+
+/*----------------------------------------------------------------------------
+  Linker generated Symbols
+ *----------------------------------------------------------------------------*/
+extern uint32_t __itcm_load_addr;
+extern uint32_t __dtcm_load_addr;
+extern uint32_t __system_ram_load_addr;
+extern uint32_t __ram_load_addr;
+
+extern uint32_t __text_code_start__;
+extern uint32_t __text_code_end__;
+extern uint32_t __tcm_code_start__;
+extern uint32_t __tcm_code_end__;
+extern uint32_t __tcm_data_start__;
+extern uint32_t __tcm_data_end__;
+extern uint32_t __system_ram_data_start__;
+extern uint32_t __system_ram_data_end__;
+extern uint32_t __ram_data_start__;
+extern uint32_t __ram_data_end__;
+extern uint32_t __bss_start__;
+extern uint32_t __bss_end__;
+extern uint32_t __noinit_data_start__;
+extern uint32_t __noinit_data_end__;
+
+extern uint32_t __StackTop;
+extern uint32_t __StackLimit;
+extern uint32_t __HeapBase;
+extern uint32_t __HeapLimit;
+
+//extern uint32_t __copy_table_start__;
+//extern uint32_t __copy_table_end__;
+//extern uint32_t __zero_table_start__;
+//extern uint32_t __zero_table_end__;
+
+
+void start_load(void) {
+    uint32_t *pSrc, *pDest;
+    uint32_t *pTable __attribute__((unused));  
+
+    /* Copy ITCM code */
+    pSrc  = &__itcm_load_addr;
+    pDest = &__tcm_code_start__;
+    for ( ; pDest < &__tcm_code_end__ ; ) {
+        *pDest++ = *pSrc++;
+    }
+
+    /* Copy DTCM code */
+    pSrc  = &__dtcm_load_addr;
+    pDest = &__tcm_data_start__;
+    for( ; pDest < &__tcm_data_end__; ){
+        *pDest++ = *pSrc++;
+    }
+
+    /* BF Add system RAM data copy */
+    pSrc  = &__system_ram_load_addr;
+    pDest = &__system_ram_data_start__;
+    for ( ; pDest < &__system_ram_data_end__ ; ) {
+        *pDest++ = *pSrc++;
+    }
+
+    /* BF Add OCARAM data copy */
+    pSrc  = &__ram_load_addr;
+    pDest = &__ram_data_start__;
+    for ( ; pDest < &__ram_data_end__ ; ) {
+        *pDest++ = *pSrc++;
+    }
+
+#ifdef __STARTUP_CLEAR_BSS
+    /*  Single BSS section scheme.
+     *
+     *  The BSS section is specified by following symbols
+     *    __bss_start__: start of the BSS section.
+     *    __bss_end__: end of the BSS section.
+     *
+     *  Both addresses must be aligned to 4 bytes boundary.
+     */
+    pDest = &__bss_start__;
+    for ( ; pDest < &__bss_end__ ; ) {
+        *pDest++ = 0ul;
+    }
+#endif 
+}
\ No newline at end of file
diff --git a/drivers/bl702_driver/startup/interrupt.c b/drivers/bl702_driver/startup/interrupt.c
new file mode 100644
index 00000000..c1d66dcc
--- /dev/null
+++ b/drivers/bl702_driver/startup/interrupt.c
@@ -0,0 +1,216 @@
+/**
+ * @file interrupt.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+
+#include 
+
+#include "../risc-v/Core/Include/clic.h"
+#include "../risc-v/Core/Include/cmsis_compatible_gcc.h"
+
+typedef void( *pFunc )( void );
+extern void Trap_Handler(void);
+extern void Interrupt_Handler(void);
+void Interrupt_Handler_Stub(void);
+
+void clic_msip_handler_Wrapper                  (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void clic_mtimer_handler_Wrapper                (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void clic_mext_handler_Wrapper                  (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void clic_csoft_handler_Wrapper                 (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void BMX_ERR_IRQHandler_Wrapper                 (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void BMX_TO_IRQHandler_Wrapper                  (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void L1C_BMX_ERR_IRQHandler_Wrapper             (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void L1C_BMX_TO_IRQHandler_Wrapper              (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void SEC_BMX_ERR_IRQHandler_Wrapper             (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void RF_TOP_INT0_IRQHandler_Wrapper             (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void RF_TOP_INT1_IRQHandler_Wrapper             (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void DMA_BMX_ERR_IRQHandler_Wrapper             (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void SEC_GMAC_IRQHandler_Wrapper                (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void SEC_CDET_IRQHandler_Wrapper                (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void SEC_PKA_IRQHandler_Wrapper                 (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void SEC_TRNG_IRQHandler_Wrapper                (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void SEC_AES_IRQHandler_Wrapper                 (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void SEC_SHA_IRQHandler_Wrapper                 (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void DMA_ALL_IRQHandler_Wrapper                 (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void MJPEG_IRQHandler_Wrapper                   (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void CAM_IRQHandler_Wrapper                     (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void I2S_IRQHandler_Wrapper                     (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void IRTX_IRQHandler_Wrapper                    (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void IRRX_IRQHandler_Wrapper                    (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void USB_IRQHandler_Wrapper                     (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void EMAC_IRQHandler_Wrapper                    (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void SF_CTRL_IRQHandler_Wrapper                 (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void GPADC_DMA_IRQHandler_Wrapper               (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void EFUSE_IRQHandler_Wrapper                   (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void SPI_IRQHandler_Wrapper                     (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void UART0_IRQHandler_Wrapper                   (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void UART1_IRQHandler_Wrapper                   (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void I2C_IRQHandler_Wrapper                     (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void PWM_IRQHandler_Wrapper                     (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void TIMER_CH0_IRQHandler_Wrapper               (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void TIMER_CH1_IRQHandler_Wrapper               (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void TIMER_WDT_IRQHandler_Wrapper               (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void KYS_IRQHandler_Wrapper                     (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void QDEC0_IRQHandler_Wrapper                   (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void QDEC1_IRQHandler_Wrapper                   (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void QDEC2_IRQHandler_Wrapper                   (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void GPIO_INT0_IRQHandler_Wrapper               (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void TOUCH_IRQHandler_Wrapper                   (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void M154_REQ_ENH_ACK_IRQHandler_Wrapper        (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void M154_IRQHandler_Wrapper                    (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void M154_AES_IRQHandler_Wrapper                (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void PDS_WAKEUP_IRQHandler_Wrapper              (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void HBN_OUT0_IRQHandler_Wrapper                (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void HBN_OUT1_IRQHandler_Wrapper                (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void BOR_IRQHandler_Wrapper                     (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void WIFI_IRQHandler_Wrapper                    (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void BZ_PHY_IRQHandler_Wrapper                  (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void BLE_IRQHandler_Wrapper                     (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void MAC_TXRX_TIMER_IRQHandler_Wrapper          (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void MAC_TXRX_MISC_IRQHandler_Wrapper           (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void MAC_RX_TRG_IRQHandler_Wrapper              (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void MAC_TX_TRG_IRQHandler_Wrapper              (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void MAC_GEN_IRQHandler_Wrapper                 (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void MAC_PORT_TRG_IRQHandler_Wrapper            (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+void WIFI_IPC_PUBLIC_IRQHandler_Wrapper         (void) __attribute__ ((weak, alias("Interrupt_Handler_Stub")));
+
+const pFunc __Vectors[] __attribute__ ((section(".init"),aligned(64))) = {
+    0,                                       /*         */
+    0,                                       /*         */
+    0,                                       /*         */
+    clic_msip_handler_Wrapper,               /* 3       */
+    0,                                       /*         */
+    0,                                       /*         */
+    0,                                       /*         */
+    clic_mtimer_handler_Wrapper,             /* 7       */
+    (pFunc)0x00000001,                       /*         */
+    0,                                       /*         */
+    (pFunc)0x00000000,                       /*         */
+    clic_mext_handler_Wrapper,               /* 11      */
+    clic_csoft_handler_Wrapper,              /* 12      */
+    0,                                       /*         */
+    0,                                       /*         */
+    0,                                       /*         */
+    BMX_ERR_IRQHandler_Wrapper,              /* 16 +  0 */
+    BMX_TO_IRQHandler_Wrapper,               /* 16 +  1 */
+    L1C_BMX_ERR_IRQHandler_Wrapper,          /* 16 +  2 */
+    L1C_BMX_TO_IRQHandler_Wrapper,           /* 16 +  3 */
+    SEC_BMX_ERR_IRQHandler_Wrapper,          /* 16 +  4 */
+    RF_TOP_INT0_IRQHandler_Wrapper,          /* 16 +  5 */
+    RF_TOP_INT1_IRQHandler_Wrapper,          /* 16 +  6 */
+    0,                                       /* 16 +  7 */
+    DMA_BMX_ERR_IRQHandler_Wrapper,          /* 16 +  8 */
+    SEC_GMAC_IRQHandler_Wrapper,             /* 16 +  9 */
+    SEC_CDET_IRQHandler_Wrapper,             /* 16 + 10 */
+    SEC_PKA_IRQHandler_Wrapper,              /* 16 + 11 */
+    SEC_TRNG_IRQHandler_Wrapper,             /* 16 + 12 */
+    SEC_AES_IRQHandler_Wrapper,              /* 16 + 13 */
+    SEC_SHA_IRQHandler_Wrapper,              /* 16 + 14 */
+    DMA_ALL_IRQHandler_Wrapper,              /* 16 + 15 */
+    MJPEG_IRQHandler_Wrapper,                /* 16 + 16 */
+    CAM_IRQHandler_Wrapper,                  /* 16 + 17 */
+    I2S_IRQHandler_Wrapper,                  /* 16 + 18 */
+    IRTX_IRQHandler_Wrapper,                 /* 16 + 19 */
+    IRRX_IRQHandler_Wrapper,                 /* 16 + 20 */
+    USB_IRQHandler_Wrapper,                  /* 16 + 21 */
+    EMAC_IRQHandler_Wrapper,                 /* 16 + 22 */
+    SF_CTRL_IRQHandler_Wrapper,              /* 16 + 23 */
+    0,                                       /* 16 + 24 */
+    GPADC_DMA_IRQHandler_Wrapper,            /* 16 + 25 */
+    EFUSE_IRQHandler_Wrapper,                /* 16 + 26 */
+    SPI_IRQHandler_Wrapper,                  /* 16 + 27 */
+    0,                                       /* 16 + 28 */
+    UART0_IRQHandler_Wrapper,                /* 16 + 29 */
+    UART1_IRQHandler_Wrapper,                /* 16 + 30 */
+    0,                                       /* 16 + 31 */
+    I2C_IRQHandler_Wrapper,                  /* 16 + 32 */
+    0,                                       /* 16 + 33 */
+    PWM_IRQHandler_Wrapper,                  /* 16 + 34 */
+    0,                                       /* 16 + 35 */
+    TIMER_CH0_IRQHandler_Wrapper,            /* 16 + 36 */
+    TIMER_CH1_IRQHandler_Wrapper,            /* 16 + 37 */
+    TIMER_WDT_IRQHandler_Wrapper,            /* 16 + 38 */
+    KYS_IRQHandler_Wrapper,                  /* 16 + 39 */
+    QDEC0_IRQHandler_Wrapper,                /* 16 + 40 */
+    QDEC1_IRQHandler_Wrapper,                /* 16 + 41 */
+    QDEC2_IRQHandler_Wrapper,                /* 16 + 42 */
+    0,                                       /* 16 + 43 */
+    GPIO_INT0_IRQHandler_Wrapper,            /* 16 + 44 */
+    TOUCH_IRQHandler_Wrapper,                /* 16 + 45 */
+    0,                                       /* 16 + 46 */
+    M154_REQ_ENH_ACK_IRQHandler_Wrapper,     /* 16 + 47 */
+    M154_IRQHandler_Wrapper,                 /* 16 + 48 */
+    M154_AES_IRQHandler_Wrapper,             /* 16 + 49 */
+    PDS_WAKEUP_IRQHandler_Wrapper,           /* 16 + 50 */
+    HBN_OUT0_IRQHandler_Wrapper,             /* 16 + 51 */
+    HBN_OUT1_IRQHandler_Wrapper,             /* 16 + 52 */
+    BOR_IRQHandler_Wrapper,                  /* 16 + 53 */
+    WIFI_IRQHandler_Wrapper,                 /* 16 + 54 */
+    BZ_PHY_IRQHandler_Wrapper,               /* 16 + 55 */
+    BLE_IRQHandler_Wrapper,                  /* 16 + 56 */
+    MAC_TXRX_TIMER_IRQHandler_Wrapper,       /* 16 + 57 */
+    MAC_TXRX_MISC_IRQHandler_Wrapper,        /* 16 + 58 */
+    MAC_RX_TRG_IRQHandler_Wrapper,           /* 16 + 59 */
+    MAC_TX_TRG_IRQHandler_Wrapper,           /* 16 + 60 */
+    MAC_GEN_IRQHandler_Wrapper,              /* 16 + 61 */
+    MAC_PORT_TRG_IRQHandler_Wrapper,         /* 16 + 62 */
+    WIFI_IPC_PUBLIC_IRQHandler_Wrapper,      /* 16 + 63 */
+};
+
+void __IRQ_ALIGN64 Trap_Handler_Stub(void){
+    Trap_Handler();
+}
+
+void __IRQ Interrupt_Handler_Stub(void){
+    Interrupt_Handler();
+}
+
+void clic_enable_interrupt (uint32_t source) {
+    *(volatile uint8_t*)(CLIC_HART0_ADDR+CLIC_INTIE+source) = 1;
+}
+
+void clic_disable_interrupt ( uint32_t source){
+  *(volatile uint8_t*)(CLIC_HART0_ADDR+CLIC_INTIE+source) = 0;
+}
+
+void clic_set_pending(uint32_t source){
+  *(volatile uint8_t*)(CLIC_HART0_ADDR+CLIC_INTIP+source) = 1;
+}
+
+void clic_clear_pending(uint32_t source){
+  *(volatile uint8_t*)(CLIC_HART0_ADDR+CLIC_INTIP+source) = 0;
+}
+
+void clic_set_intcfg (uint32_t source, uint32_t intcfg){
+  *(volatile uint8_t*)(CLIC_HART0_ADDR+CLIC_INTCFG+source) = intcfg;
+}
+
+uint8_t clic_get_intcfg  ( uint32_t source){
+  return *(volatile uint8_t*)(CLIC_HART0_ADDR+CLIC_INTCFG+source);
+}
+
+void clic_set_cliccfg ( uint32_t cfg){
+  *(volatile uint8_t*)(CLIC_HART0_ADDR+CLIC_CFG) = cfg;
+}
+
+uint8_t clic_get_cliccfg  (void){
+  return *(volatile uint8_t*)(CLIC_HART0_ADDR+CLIC_CFG);
+}
diff --git a/drivers/bl702_driver/startup/system_bl702.c b/drivers/bl702_driver/startup/system_bl702.c
new file mode 100644
index 00000000..67150992
--- /dev/null
+++ b/drivers/bl702_driver/startup/system_bl702.c
@@ -0,0 +1,174 @@
+/**
+ * @file system_bl702.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+
+#include "bl702.h"
+#include "bl702_glb.h"
+#include "bl702_hbn.h"
+#include "system_bl702.h"
+
+#ifdef BOOTROM
+#include "bflb_bootrom.h"
+#endif
+
+
+#ifdef BFLB_EFLASH_LOADER
+#include "bl702_usb.h"
+void USB_DoNothing_IRQHandler(void)
+{
+	/* clear all USB int sts */
+	USB_Clr_IntStatus(32);
+}
+#endif
+
+
+/*----------------------------------------------------------------------------
+  Define clocks
+ *----------------------------------------------------------------------------*/
+#define  SYSTEM_CLOCK     ( 32000000UL )
+
+/*----------------------------------------------------------------------------
+  Vector Table
+ *----------------------------------------------------------------------------*/
+#define VECT_TAB_OFFSET  0x00 /*!< Vector Table base offset field.
+                                   This value must be a multiple of 0x200. */
+
+/*----------------------------------------------------------------------------
+  System initialization function
+ *----------------------------------------------------------------------------*/
+
+void system_bor_init(void)
+{
+    HBN_BOR_CFG_Type borCfg = {1/* pu_bor */, 0/* irq_bor_en */, 1/* bor_vth */, 1/* bor_sel */};
+    HBN_Set_BOR_Cfg(&borCfg);
+}
+void SystemInit (void)
+{
+    uint32_t *p;
+    uint32_t i=0;
+    uint32_t tmpVal=0;
+
+#ifdef BOOTROM
+    extern void GLB_Power_On_LDO18_IO(void);
+    extern void WDT_Disable(void);
+    extern void HBN_Clear_RTC_INT(void);
+
+    BMX_Cfg_Type bmxCfg={
+            .timeoutEn=0,
+            .errEn=DISABLE,
+            .arbMod=BMX_ARB_FIX
+    };
+    L1C_BMX_Cfg_Type  l1cBmxCfg={
+            .timeoutEn=0,
+            .errEn=DISABLE,
+            .arbMod=L1C_BMX_ARB_FIX,
+    };
+    
+    /* NP boot log Flag */
+    p= (uint32_t *)(BFLB_BOOTROM_NP_BOOT_LOG_ADDR);
+    *p=0x5A5AA5A5;
+    /*diable BMX error incase Sbooten=0xf,while user send vector(core) reset and CPU read deadbeef,
+    if not disable this bit, CPU will also get hardfault at the same time*/
+    //GLB->bmx_cfg1.BF.bmx_err_en=0;
+    //GLB->bmx_cfg1.BF.bmx_timeout_en=0;
+    //GLB->bmx_cfg2.BF.bmx_err_addr_dis=1;
+    GLB_BMX_Init(&bmxCfg);
+    GLB_BMX_Addr_Monitor_Disable();
+    //L1C->l1c_config.BF.l1c_bmx_err_en=0;
+    //L1C->l1c_config.BF.l1c_bmx_timeout_en=0;
+    //L1C->l1c_bmx_err_addr_en.BF.l1c_bmx_err_addr_dis=1;
+    L1C_BMX_Init(&l1cBmxCfg);
+    L1C_BMX_Addr_Monitor_Disable();
+    //L1C->l1c_config.BF.l1c_way_dis=0xf;
+    L1C_Set_Way_Disable(0x0f);
+    /* Disable Watchdog */
+    WDT_Disable();
+    /* Clear RTC */
+    HBN_Clear_RTC_INT();
+    /* Make OCRAM Idle from retention or sleep */
+    GLB_Set_OCRAM_Idle();
+    /* Disable embedded flash power up*/
+    HBN_Set_Embedded_Flash_Pullup(DISABLE);
+#endif
+
+    /* disable hardware_pullup_pull_down (reg_en_hw_pu_pd = 0) */
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_IRQ_MODE);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_REG_EN_HW_PU_PD);
+    BL_WR_REG(HBN_BASE,HBN_IRQ_MODE,tmpVal);
+
+    /* disable aon_pad_ie_smt (reg_aon_pad_ie_smt = 0) */
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_IRQ_MODE);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_REG_AON_PAD_IE_SMT);
+    BL_WR_REG(HBN_BASE,HBN_IRQ_MODE,tmpVal);
+
+    /* GLB_Set_EM_Sel(GLB_EM_0KB); */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_SEAM_MISC);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_EM_SEL,GLB_EM_0KB);
+    BL_WR_REG(GLB_BASE,GLB_SEAM_MISC,tmpVal);
+
+    /* Restore default setting*/
+    /* GLB_UART_Sig_Swap_Set(UART_SIG_SWAP_NONE); */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_PARM);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_UART_SWAP_SET,UART_SIG_SWAP_NONE);
+    BL_WR_REG(GLB_BASE,GLB_PARM,tmpVal);
+//    GLB_JTAG_Sig_Swap_Set(JTAG_SIG_SWAP_NONE);
+//    /* update SystemCoreClock value */
+//    SystemCoreClockSet(SYSTEM_CLOCK);
+
+    /* fix 57.6M */
+    if(SystemCoreClockGet()==57*6000*1000){
+        SystemCoreClockSet(57.6*1000*1000)
+    }
+
+    /* CLear all interrupt */
+    p=(uint32_t *)(CLIC_HART0_ADDR+CLIC_INTIE);
+    for(i=0;i<(IRQn_LAST+3)/4;i++){
+        p[i]=0;
+    }
+    p=(uint32_t *)(CLIC_HART0_ADDR+CLIC_INTIP);
+    for(i=0;i<(IRQn_LAST+3)/4;i++){
+        p[i]=0;
+    }
+
+#ifdef BFLB_EFLASH_LOADER
+    Interrupt_Handler_Register(USB_IRQn,USB_DoNothing_IRQHandler);
+#endif
+
+    /* global IRQ enable */
+    __enable_irq();
+
+    /* init bor for all platform */
+    system_bor_init();
+
+#ifdef BOOTROM
+    /*Power up soc 11 power domain,TODO: This should be optional */
+    //AON_Power_On_SOC_11();
+    /* Record LDO18 pu flag before power up. This maybe not neccessary but copy from 606*/
+    //BL_WR_WORD(BFLB_BOOTROM_AP_BOOT_LOG_ADDR,GLB->ldo18io.BF.pu_ldo18io);
+    /* Power up flash power*/
+    //GLB_Power_On_LDO18_IO();
+#endif
+	
+}
+void System_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+}
diff --git a/drivers/bl702_driver/startup/system_bl702.h b/drivers/bl702_driver/startup/system_bl702.h
new file mode 100644
index 00000000..efd9a449
--- /dev/null
+++ b/drivers/bl702_driver/startup/system_bl702.h
@@ -0,0 +1,39 @@
+/**
+ * @file system_bl702.h
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+
+#ifndef __SYSTEM_BL702_H__
+#define __SYSTEM_BL702_H__
+
+/**
+ *  @brief PLL Clock type definition
+ */
+
+extern uint32_t SystemCoreClock;
+
+extern void SystemCoreClockUpdate (void);
+extern void SystemInit (void);
+extern void System_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority);
+extern void Systick_Stop(void);
+extern void Systick_Start(void);
+
+#endif
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_acomp.h b/drivers/bl702_driver/std_drv/inc/bl702_acomp.h
new file mode 100644
index 00000000..b205dd9b
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_acomp.h
@@ -0,0 +1,212 @@
+/**
+  ******************************************************************************
+  * @file    bl702_acomp.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_ACOMP_H__
+#define __BL702_ACOMP_H__
+
+#include "aon_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  ACOMP
+ *  @{
+ */
+
+/** @defgroup  ACOMP_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief Analog compare id type definition
+ */
+typedef enum {
+    AON_ACOMP0_ID,                          /*!< Analog compare 0 */
+    AON_ACOMP1_ID,                          /*!< Analog compare 1 */
+}AON_ACOMP_ID_Type;
+
+/**
+ *  @brief Analog compare level type definition
+ */
+typedef enum {
+    AON_ACOMP_LEVEL_FACTOR_0P25,            /*!< Analog compare level scaling factor 0.25 */
+    AON_ACOMP_LEVEL_FACTOR_0P5,             /*!< Analog compare level scaling factor 0.5 */
+    AON_ACOMP_LEVEL_FACTOR_0P75,            /*!< Analog compare level scaling factor 0.75 */
+    AON_ACOMP_LEVEL_FACTOR_1,               /*!< Analog compare level scaling factor 1 */
+}AON_ACOMP_Level_Factor_Type;
+
+/**
+ *  @brief Analog compare channel type definition
+ */
+typedef enum {
+    AON_ACOMP_CHAN_ADC0,                    /*!< Analog compare channel,ADC input channel 0 */
+    AON_ACOMP_CHAN_ADC1,                    /*!< Analog compare channel,ADC input channel 1 */
+    AON_ACOMP_CHAN_ADC2,                    /*!< Analog compare channel,ADC input channel 2 */
+    AON_ACOMP_CHAN_ADC3,                    /*!< Analog compare channel,ADC input channel 3 */
+    AON_ACOMP_CHAN_ADC4,                    /*!< Analog compare channel,ADC input channel 4 */
+    AON_ACOMP_CHAN_ADC5,                    /*!< Analog compare channel,ADC input channel 5 */
+    AON_ACOMP_CHAN_ADC6,                    /*!< Analog compare channel,ADC input channel 6 */
+    AON_ACOMP_CHAN_ADC7,                    /*!< Analog compare channel,ADC input channel 7 */
+    AON_ACOMP_CHAN_DACA,                    /*!< Analog compare channel,DAC output channel A */
+    AON_ACOMP_CHAN_DACB,                    /*!< Analog compare channel,DAC output channel B */
+    AON_ACOMP_CHAN_VREF_1P2V,               /*!< Analog compare channel,1.2V ref voltage */
+    AON_ACOMP_CHAN_0P375VBAT_NOT_IMP,       /*!< Analog compare channel,6/16Vbat */
+    AON_ACOMP_CHAN_0P25VBAT,                /*!< Analog compare channel,4/16Vbat */
+    AON_ACOMP_CHAN_0P1875VBAT,              /*!< Analog compare channel,3/16Vbat */
+    AON_ACOMP_CHAN_0P3125VBAT,              /*!< Analog compare channel,5/16Vbat */
+    AON_ACOMP_CHAN_VSS,                     /*!< Analog compare channel,vss */
+}AON_ACOMP_Chan_Type;
+
+/**
+ *  @brief Analog compare bias current control type definition
+ */
+typedef enum {
+    AON_ACOMP_BIAS_POWER_MODE1,             /*!< Analog compare power mode 1,slow response mode */
+    AON_ACOMP_BIAS_POWER_MODE2,             /*!< Analog compare power mode 2,medium response mode */
+    AON_ACOMP_BIAS_POWER_MODE3,             /*!< Analog compare power mode 3,fast response mode */
+    AON_ACOMP_BIAS_POWER_NONE,              /*!< Analog compare power mode none */
+}AON_ACOMP_Bias_Prog_Type;
+
+/**
+ *  @brief Analog compare hysteresis voltage type definition
+ */
+typedef enum {
+    AON_ACOMP_HYSTERESIS_VOLT_NONE,         /*!< Analog compare hysteresis voltage none */
+    AON_ACOMP_HYSTERESIS_VOLT_10MV,         /*!< Analog compare hysteresis voltage 10mv */
+    AON_ACOMP_HYSTERESIS_VOLT_20MV,         /*!< Analog compare hysteresis voltage 20mv */
+    AON_ACOMP_HYSTERESIS_VOLT_30MV,         /*!< Analog compare hysteresis voltage 30mv */
+    AON_ACOMP_HYSTERESIS_VOLT_40MV,         /*!< Analog compare hysteresis voltage 40mv */
+    AON_ACOMP_HYSTERESIS_VOLT_50MV,         /*!< Analog compare hysteresis voltage 50mv */
+    AON_ACOMP_HYSTERESIS_VOLT_60MV,         /*!< Analog compare hysteresis voltage 60mv */
+    AON_ACOMP_HYSTERESIS_VOLT_70MV,         /*!< Analog compare hysteresis voltage 70mv */
+}AON_ACOMP_Hysteresis_Volt_Type;
+
+/**
+ *  @brief AON ACOMP configuration type definition
+ */
+typedef struct {
+    BL_Fun_Type muxEn;                      /*!< ACOMP mux enable */
+    uint8_t posChanSel;                     /*!< ACOMP positive channel select */
+    uint8_t negChanSel;                     /*!< ACOMP negtive channel select */
+    AON_ACOMP_Level_Factor_Type levelFactor;    /*!< ACOMP level select factor */
+    AON_ACOMP_Bias_Prog_Type biasProg;      /*!< ACOMP bias current control */
+    AON_ACOMP_Hysteresis_Volt_Type hysteresisPosVolt;    /*!< ACOMP hysteresis voltage for positive */
+    AON_ACOMP_Hysteresis_Volt_Type hysteresisNegVolt;    /*!< ACOMP hysteresis voltage for negtive */
+}AON_ACOMP_CFG_Type;
+
+/*@} end of group ACOMP_Public_Types */
+
+/** @defgroup  ACOMP_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  AON_ACOMP_ID_TYPE
+ *  @{
+ */
+#define IS_AON_ACOMP_ID_TYPE(type)                       (((type) == AON_ACOMP0_ID) || \
+                                                          ((type) == AON_ACOMP1_ID))
+
+/** @defgroup  AON_ACOMP_LEVEL_FACTOR_TYPE
+ *  @{
+ */
+#define IS_AON_ACOMP_LEVEL_FACTOR_TYPE(type)             (((type) == AON_ACOMP_LEVEL_FACTOR_0P25) || \
+                                                          ((type) == AON_ACOMP_LEVEL_FACTOR_0P5) || \
+                                                          ((type) == AON_ACOMP_LEVEL_FACTOR_0P75) || \
+                                                          ((type) == AON_ACOMP_LEVEL_FACTOR_1))
+
+/** @defgroup  AON_ACOMP_CHAN_TYPE
+ *  @{
+ */
+#define IS_AON_ACOMP_CHAN_TYPE(type)                     (((type) == AON_ACOMP_CHAN_ADC0) || \
+                                                          ((type) == AON_ACOMP_CHAN_ADC1) || \
+                                                          ((type) == AON_ACOMP_CHAN_ADC2) || \
+                                                          ((type) == AON_ACOMP_CHAN_ADC3) || \
+                                                          ((type) == AON_ACOMP_CHAN_ADC4) || \
+                                                          ((type) == AON_ACOMP_CHAN_ADC5) || \
+                                                          ((type) == AON_ACOMP_CHAN_ADC6) || \
+                                                          ((type) == AON_ACOMP_CHAN_ADC7) || \
+                                                          ((type) == AON_ACOMP_CHAN_DACA) || \
+                                                          ((type) == AON_ACOMP_CHAN_DACB) || \
+                                                          ((type) == AON_ACOMP_CHAN_VREF_1P2V) || \
+                                                          ((type) == AON_ACOMP_CHAN_0P375VBAT_NOT_IMP) || \
+                                                          ((type) == AON_ACOMP_CHAN_0P25VBAT) || \
+                                                          ((type) == AON_ACOMP_CHAN_0P1875VBAT) || \
+                                                          ((type) == AON_ACOMP_CHAN_0P3125VBAT) || \
+                                                          ((type) == AON_ACOMP_CHAN_VSS))
+
+/** @defgroup  AON_ACOMP_BIAS_PROG_TYPE
+ *  @{
+ */
+#define IS_AON_ACOMP_BIAS_PROG_TYPE(type)                (((type) == AON_ACOMP_BIAS_POWER_MODE1) || \
+                                                          ((type) == AON_ACOMP_BIAS_POWER_MODE2) || \
+                                                          ((type) == AON_ACOMP_BIAS_POWER_MODE3) || \
+                                                          ((type) == AON_ACOMP_BIAS_POWER_NONE))
+
+/** @defgroup  AON_ACOMP_HYSTERESIS_VOLT_TYPE
+ *  @{
+ */
+#define IS_AON_ACOMP_HYSTERESIS_VOLT_TYPE(type)          (((type) == AON_ACOMP_HYSTERESIS_VOLT_NONE) || \
+                                                          ((type) == AON_ACOMP_HYSTERESIS_VOLT_10MV) || \
+                                                          ((type) == AON_ACOMP_HYSTERESIS_VOLT_20MV) || \
+                                                          ((type) == AON_ACOMP_HYSTERESIS_VOLT_30MV) || \
+                                                          ((type) == AON_ACOMP_HYSTERESIS_VOLT_40MV) || \
+                                                          ((type) == AON_ACOMP_HYSTERESIS_VOLT_50MV) || \
+                                                          ((type) == AON_ACOMP_HYSTERESIS_VOLT_60MV) || \
+                                                          ((type) == AON_ACOMP_HYSTERESIS_VOLT_70MV))
+
+/*@} end of group ACOMP_Public_Constants */
+
+/** @defgroup  ACOMP_Public_Macros
+ *  @{
+ */
+
+/*@} end of group ACOMP_Public_Macros */
+
+/** @defgroup  ACOMP_Public_Functions
+ *  @{
+ */
+void AON_ACOMP_Init(AON_ACOMP_ID_Type acompNo,AON_ACOMP_CFG_Type *cfg);
+void AON_ACOMP_Enable(AON_ACOMP_ID_Type acompNo);
+BL_Sts_Type AON_ACOMP_Get_Result(AON_ACOMP_ID_Type acompNo);
+
+/*@} end of group ACOMP_Public_Functions */
+
+/*@} end of group ACOMP */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_ACOMP_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_adc.h b/drivers/bl702_driver/std_drv/inc/bl702_adc.h
new file mode 100644
index 00000000..cb36e4d3
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_adc.h
@@ -0,0 +1,542 @@
+/**
+  ******************************************************************************
+  * @file    bl702_adc.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_ADC_H__
+#define __BL702_ADC_H__
+
+#include "aon_reg.h"
+#include "gpip_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  ADC
+ *  @{
+ */
+
+/** @defgroup  ADC_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief ADC channel type definition
+ */
+typedef enum {
+    ADC_CHAN0,                              /*!< GPIO 0, ADC channel 0 */
+    ADC_CHAN1,                              /*!< GPIO 1, ADC channel 1 */
+    ADC_CHAN2,                              /*!< GPIO 2, ADC channel 2 */
+    ADC_CHAN3,                              /*!< GPIO 3, ADC channel 3 */
+    ADC_CHAN4,                              /*!< GPIO 4, ADC channel 4 */
+    ADC_CHAN5,                              /*!< GPIO 5, ADC channel 5 */
+    ADC_CHAN6,                              /*!< GPIO 6, ADC channel 6 */
+    ADC_CHAN7,                              /*!< GPIO 7, ADC channel 7 */
+    ADC_CHAN8,                              /*!< GPIO 8, ADC channel 8 */
+    ADC_CHAN9,                              /*!< GPIO 9, ADC channel 9 */
+    ADC_CHAN10,                             /*!< GPIO 10, ADC channel 10 */
+    ADC_CHAN11,                             /*!< GPIO 11, ADC channel 11 */
+    ADC_CHAN_DAC_OUTA,                      /*!< DACA, ADC channel 12 */
+    ADC_CHAN_DAC_OUTB,                      /*!< DACB, ADC channel 13 */
+    ADC_CHAN_TSEN_P,                        /*!< TSenp, ADC channel 14 */
+    ADC_CHAN_TSEN_N,                        /*!< TSenn, ADC channel 15 */
+    ADC_CHAN_VREF,                          /*!< Vref, ADC channel 16 */
+    ADC_CHAN_DCTEST,                        /*!< DCTest, ADC channel 17 */
+    ADC_CHAN_VABT_HALF,                     /*!< VBAT/2, ADC channel 18 */
+    ADC_CHAN_SENP3,                         /*!< SenVP3, ADC channel 19 */
+    ADC_CHAN_SENP2,                         /*!< SenVP2, ADC channel 20 */
+    ADC_CHAN_SENP1,                         /*!< SenVP1, ADC channel 21 */
+    ADC_CHAN_SENP0,                         /*!< SenVP0, ADC channel 22 */
+    ADC_CHAN_GND,                           /*!< GND, ADC channel 23 */
+}ADC_Chan_Type;
+
+/**
+ *  @brief ADC V18 selection type definition
+ */
+typedef enum {
+    ADC_V18_SEL_1P62V,                      /*!< V18 select 1.62V */
+    ADC_V18_SEL_1P72V,                      /*!< V18 select 1.72V */
+    ADC_V18_SEL_1P82V,                      /*!< V18 select 1.82V */
+    ADC_V18_SEL_1P92V,                      /*!< V18 select 1.92V */
+}ADC_V18_SEL_Type;
+
+/**
+ *  @brief ADC V11 selection type definition
+ */
+typedef enum {
+    ADC_V11_SEL_1P0V,                       /*!< V11 select 1.0V */
+    ADC_V11_SEL_1P1V,                       /*!< V11 select 1.1V */
+    ADC_V11_SEL_1P18V,                      /*!< V11 select 1.18V */
+    ADC_V11_SEL_1P26V,                      /*!< V11 select 1.26V */
+}ADC_V11_SEL_Type;
+
+/**
+ *  @brief ADC clock type definition
+ */
+typedef enum {
+    ADC_CLK_DIV_1,                          /*!< ADC clock:on 32M clock is 32M */
+    ADC_CLK_DIV_4,                          /*!< ADC clock:on 32M clock is 8M */
+    ADC_CLK_DIV_8,                          /*!< ADC clock:on 32M clock is 4M */
+    ADC_CLK_DIV_12,                         /*!< ADC clock:on 32M clock is 2.666M */
+    ADC_CLK_DIV_16,                         /*!< ADC clock:on 32M clock is 2M */
+    ADC_CLK_DIV_20,                         /*!< ADC clock:on 32M clock is 1.6M */
+    ADC_CLK_DIV_24,                         /*!< ADC clock:on 32M clock is 1.333M */
+    ADC_CLK_DIV_32,                         /*!< ADC clock:on 32M clock is 1M */
+}ADC_CLK_Type;
+
+/**
+ *  @brief ADC conversion speed type definition
+ */
+typedef enum {
+    ADC_DELAY_SEL_0,                        /*!< Select delay 0 */
+    ADC_DELAY_SEL_1,                        /*!< Select delay 1 */
+    ADC_DELAY_SEL_2,                        /*!< Select delay 2 */
+    ADC_DELAY_SEL_3,                        /*!< Select delay 3 */
+    ADC_DELAY_SEL_4,                        /*!< Select delay 4, not recommend */
+    ADC_DELAY_SEL_5,                        /*!< Select delay 5, not recommend */
+    ADC_DELAY_SEL_6,                        /*!< Select delay 6, not recommend */
+    ADC_DELAY_SEL_7,                        /*!< Select delay 7, not recommend */
+}ADC_DELAY_SEL_Type;
+
+/**
+ *  @brief ADC PGA gain type definition
+ */
+typedef enum {
+    ADC_PGA_GAIN_NONE,                      /*!< No PGA gain */
+    ADC_PGA_GAIN_1,                         /*!< PGA gain 1 */
+    ADC_PGA_GAIN_2,                         /*!< PGA gain 2 */
+    ADC_PGA_GAIN_4,                         /*!< PGA gain 4 */
+    ADC_PGA_GAIN_8,                         /*!< PGA gain 8 */
+    ADC_PGA_GAIN_16,                        /*!< PGA gain 16 */
+    ADC_PGA_GAIN_32,                        /*!< PGA gain 32 */
+}ADC_PGA_GAIN_Type;
+
+/**
+ *  @brief ADC analog portion low power mode selection type definition
+ */
+typedef enum {
+    ADC_BIAS_SEL_MAIN_BANDGAP,              /*!< ADC current from main bandgap */
+    ADC_BIAS_SEL_AON_BANDGAP,               /*!< ADC current from aon bandgap for HBN mode */
+}ADC_BIAS_SEL_Type;
+
+/**
+ *  @brief ADC chop mode type definition
+ */
+typedef enum {
+    ADC_CHOP_MOD_ALL_OFF,                   /*!< all off */
+    ADC_CHOP_MOD_AZ_ON,                     /*!< Vref AZ on */
+    ADC_CHOP_MOD_AZ_PGA_ON,                 /*!< Vref AZ and PGA chop on */
+    ADC_CHOP_MOD_AZ_PGA_RPC_ON,             /*!< Vref AZ and PGA chop+RPC on */
+}ADC_CHOP_MOD_Type;
+
+/**
+ *  @brief ADC audio PGA output common mode control type definition
+ */
+typedef enum {
+    ADC_PGA_VCM_1V,                         /*!< ADC VCM=1V */
+    ADC_PGA_VCM_1P2V,                       /*!< ADC VCM=1.2V */
+    ADC_PGA_VCM_1P4V,                       /*!< ADC VCM=1.4V */
+    ADC_PGA_VCM_1P6V,                       /*!< ADC VCM=1.6V */
+}ADC_PGA_VCM_Type;
+
+/**
+ *  @brief ADC tsen diode mode type definition
+ */
+typedef enum {
+    ADC_TSEN_MOD_INTERNAL_DIODE,            /*!< Internal diode mode */
+    ADC_TSEN_MOD_EXTERNAL_DIODE,            /*!< External diode mode */
+}ADC_TSEN_MOD_Type;
+
+/**
+ *  @brief ADC voltage reference type definition
+ */
+typedef enum {
+    ADC_VREF_3P3V,                          /*!< ADC select 3.3V as reference voltage */
+    ADC_VREF_2V,                            /*!< ADC select 2V as reference voltage */
+}ADC_VREF_Type;
+
+/**
+ *  @brief ADC signal input type definition
+ */
+typedef enum {
+    ADC_INPUT_SINGLE_END,                   /*!< ADC signal is single end */
+    ADC_INPUT_DIFF,                         /*!< ADC signal is differential */
+}ADC_SIG_INPUT_Type;
+
+/**
+ *  @brief ADC data width type definition
+ */
+typedef enum {
+    ADC_DATA_WIDTH_12,                      /*!< ADC 12 bits */
+    ADC_DATA_WIDTH_14_WITH_16_AVERAGE,      /*!< ADC 14 bits,and the value is average of 16 converts */
+    ADC_DATA_WIDTH_16_WITH_64_AVERAGE,      /*!< ADC 16 bits,and the value is average of 64 converts */
+    ADC_DATA_WIDTH_16_WITH_128_AVERAGE,     /*!< ADC 16 bits,and the value is average of 128 converts */
+    ADC_DATA_WIDTH_16_WITH_256_AVERAGE,     /*!< ADC 16 bits,and the value is average of 256 converts */
+}ADC_Data_Width_Type;
+
+/**
+ *  @brief ADC micboost 32db type definition
+ */
+typedef enum {
+    ADC_MICBOOST_DB_16DB,                   /*!< MIC boost 16db */
+    ADC_MICBOOST_DB_32DB,                   /*!< MIC boost 32db */
+}ADC_MICBOOST_DB_Type;
+
+/**
+ *  @brief ADC pga2 gain type definition
+ */
+typedef enum {
+    ADC_PGA2_GAIN_0DB,                      /*!< MIC pga2 gain 0db */
+    ADC_PGA2_GAIN_6DB,                      /*!< MIC pga2 gain 6db */
+    ADC_PGA2_GAIN_N6DB,                     /*!< MIC pga2 gain -6db */
+    ADC_PGA2_GAIN_12DB,                     /*!< MIC pga2 gain 12db */
+}ADC_PGA2_GAIN_Type;
+
+/**
+ *  @brief ADC mic mode type definition
+ */
+typedef enum {
+    ADC_MIC_MODE_SINGLE,                    /*!< MIC single mode */
+    ADC_MIC_MODE_DIFF,                      /*!< MIC diff mode */
+}ADC_MIC_MODE_Type;
+
+/**
+ *  @brief ADC mic type definition
+ */
+typedef struct {
+    ADC_MICBOOST_DB_Type micboostDb;        /*!< MIC boost db */
+    ADC_PGA2_GAIN_Type micPga2Gain;         /*!< MIC pga2 gain */
+    ADC_MIC_MODE_Type mic1Mode;             /*!< MIC1 single or diff */
+    ADC_MIC_MODE_Type mic2Mode;             /*!< MIC2 single or diff */
+    BL_Fun_Type dwaEn;                      /*!< Improve dynamic performance */
+    BL_Fun_Type micboostBypassEn;           /*!< MIC boost amp bypass enable or disable */
+    BL_Fun_Type micPgaEn;                   /*!< MIC pga enable or disable */
+    BL_Fun_Type micBiasEn;                  /*!< MIC bias enable or disable */
+}ADC_MIC_Type;
+
+/**
+ *  @brief ADC configuration type definition
+ */
+typedef struct {
+    ADC_V18_SEL_Type v18Sel;                /*!< ADC 1.8V select */
+    ADC_V11_SEL_Type v11Sel;                /*!< ADC 1.1V select */
+    ADC_CLK_Type clkDiv;                    /*!< Clock divider */
+    ADC_PGA_GAIN_Type gain1;                /*!< PGA gain 1 */
+    ADC_PGA_GAIN_Type gain2;                /*!< PGA gain 2 */
+    ADC_CHOP_MOD_Type chopMode;             /*!< ADC chop mode select */
+    ADC_BIAS_SEL_Type biasSel;              /*!< ADC current form main bandgap or aon bandgap */
+    ADC_PGA_VCM_Type vcm;                   /*!< ADC VCM value */
+    ADC_VREF_Type vref;                     /*!< ADC voltage reference */
+    ADC_SIG_INPUT_Type inputMode;           /*!< ADC input signal type */
+    ADC_Data_Width_Type resWidth;           /*!< ADC resolution and oversample rate */
+    BL_Fun_Type offsetCalibEn;              /*!< Offset calibration enable */
+    int16_t offsetCalibVal;                 /*!< Offset calibration value */
+}ADC_CFG_Type;
+
+/**
+ *  @brief ADC configuration type definition
+ */
+typedef struct {
+    int8_t posChan;                         /*!< Positive channel */
+    int8_t negChan;                         /*!< Negative channel */
+    uint16_t value;                         /*!< ADC value */
+    float volt;                             /*!< ADC voltage result */
+}ADC_Result_Type;
+
+/**
+ *  @brief ADC FIFO threshold type definition
+ */
+typedef enum {
+    ADC_FIFO_THRESHOLD_1,                   /*!< ADC FIFO threshold is 1 */
+    ADC_FIFO_THRESHOLD_4,                   /*!< ADC FIFO threshold is 4 */
+    ADC_FIFO_THRESHOLD_8,                   /*!< ADC FIFO threshold is 8 */
+    ADC_FIFO_THRESHOLD_16,                  /*!< ADC FIFO threshold is 16 */
+}ADC_FIFO_Threshold_Type;
+
+/**
+ *  @brief ADC interrupt type definition
+ */
+typedef enum {
+    ADC_INT_POS_SATURATION,                  /*!< ADC positive channel saturation */
+    ADC_INT_NEG_SATURATION,                  /*!< ADC negative channel saturation */
+    ADC_INT_FIFO_UNDERRUN,                  /*!< ADC FIFO underrun interrupt */
+    ADC_INT_FIFO_OVERRUN,                   /*!< ADC FIFO overrun interrupt */
+    ADC_INT_ADC_READY,                      /*!< ADC data ready interrupt */
+    ADC_INT_FIFO_READY,                      /*!< ADC FIFO count upper to threhold interrupt */
+    ADC_INT_ALL,                             /*!< ADC all the interrupt */
+}ADC_INT_Type;
+
+/**
+ *  @brief ADC FIFO configuration structure type definition
+ */
+typedef struct {
+    ADC_FIFO_Threshold_Type fifoThreshold;  /*!< ADC FIFO threshold */
+    BL_Fun_Type dmaEn;                      /*!< ADC DMA enable */
+}ADC_FIFO_Cfg_Type;
+
+/**
+ *  @brief ADC REG GAIN CAL
+ */
+typedef struct {
+    BL_Fun_Type adcGainCoeffEnable;         /*!< ADC_Gain_Coeff enable */
+    uint16_t adcgainCoeffVal;                /*!< ADC_Gain_Coeff value */
+    float coe;                              /*!< ADC_Gain_Coeff result */
+}ADC_Gain_Coeff_Type;
+
+/*@} end of group ADC_Public_Types */
+
+/** @defgroup  ADC_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  ADC_CHAN_TYPE
+ *  @{
+ */
+#define IS_ADC_CHAN_TYPE(type)                           (((type) == ADC_CHAN0) || \
+                                                          ((type) == ADC_CHAN1) || \
+                                                          ((type) == ADC_CHAN2) || \
+                                                          ((type) == ADC_CHAN3) || \
+                                                          ((type) == ADC_CHAN4) || \
+                                                          ((type) == ADC_CHAN5) || \
+                                                          ((type) == ADC_CHAN6) || \
+                                                          ((type) == ADC_CHAN7) || \
+                                                          ((type) == ADC_CHAN8) || \
+                                                          ((type) == ADC_CHAN9) || \
+                                                          ((type) == ADC_CHAN10) || \
+                                                          ((type) == ADC_CHAN11) || \
+                                                          ((type) == ADC_CHAN_DAC_OUTA) || \
+                                                          ((type) == ADC_CHAN_DAC_OUTB) || \
+                                                          ((type) == ADC_CHAN_TSEN_P) || \
+                                                          ((type) == ADC_CHAN_TSEN_N) || \
+                                                          ((type) == ADC_CHAN_VREF) || \
+                                                          ((type) == ADC_CHAN_DCTEST) || \
+                                                          ((type) == ADC_CHAN_VABT_HALF) || \
+                                                          ((type) == ADC_CHAN_SENP3) || \
+                                                          ((type) == ADC_CHAN_SENP2) || \
+                                                          ((type) == ADC_CHAN_SENP1) || \
+                                                          ((type) == ADC_CHAN_SENP0) || \
+                                                          ((type) == ADC_CHAN_GND))
+
+/** @defgroup  ADC_V18_SEL_TYPE
+ *  @{
+ */
+#define IS_ADC_V18_SEL_TYPE(type)                        (((type) == ADC_V18_SEL_1P62V) || \
+                                                          ((type) == ADC_V18_SEL_1P72V) || \
+                                                          ((type) == ADC_V18_SEL_1P82V) || \
+                                                          ((type) == ADC_V18_SEL_1P92V))
+
+/** @defgroup  ADC_V11_SEL_TYPE
+ *  @{
+ */
+#define IS_ADC_V11_SEL_TYPE(type)                        (((type) == ADC_V11_SEL_1P0V) || \
+                                                          ((type) == ADC_V11_SEL_1P1V) || \
+                                                          ((type) == ADC_V11_SEL_1P18V) || \
+                                                          ((type) == ADC_V11_SEL_1P26V))
+
+/** @defgroup  ADC_CLK_TYPE
+ *  @{
+ */
+#define IS_ADC_CLK_TYPE(type)                            (((type) == ADC_CLK_DIV_1) || \
+                                                          ((type) == ADC_CLK_DIV_4) || \
+                                                          ((type) == ADC_CLK_DIV_8) || \
+                                                          ((type) == ADC_CLK_DIV_12) || \
+                                                          ((type) == ADC_CLK_DIV_16) || \
+                                                          ((type) == ADC_CLK_DIV_20) || \
+                                                          ((type) == ADC_CLK_DIV_24) || \
+                                                          ((type) == ADC_CLK_DIV_32))
+
+/** @defgroup  ADC_DELAY_SEL_TYPE
+ *  @{
+ */
+#define IS_ADC_DELAY_SEL_TYPE(type)                      (((type) == ADC_DELAY_SEL_0) || \
+                                                          ((type) == ADC_DELAY_SEL_1) || \
+                                                          ((type) == ADC_DELAY_SEL_2) || \
+                                                          ((type) == ADC_DELAY_SEL_3) || \
+                                                          ((type) == ADC_DELAY_SEL_4) || \
+                                                          ((type) == ADC_DELAY_SEL_5) || \
+                                                          ((type) == ADC_DELAY_SEL_6) || \
+                                                          ((type) == ADC_DELAY_SEL_7))
+
+/** @defgroup  ADC_PGA_GAIN_TYPE
+ *  @{
+ */
+#define IS_ADC_PGA_GAIN_TYPE(type)                       (((type) == ADC_PGA_GAIN_NONE) || \
+                                                          ((type) == ADC_PGA_GAIN_1) || \
+                                                          ((type) == ADC_PGA_GAIN_2) || \
+                                                          ((type) == ADC_PGA_GAIN_4) || \
+                                                          ((type) == ADC_PGA_GAIN_8) || \
+                                                          ((type) == ADC_PGA_GAIN_16) || \
+                                                          ((type) == ADC_PGA_GAIN_32))
+
+/** @defgroup  ADC_BIAS_SEL_TYPE
+ *  @{
+ */
+#define IS_ADC_BIAS_SEL_TYPE(type)                       (((type) == ADC_BIAS_SEL_MAIN_BANDGAP) || \
+                                                          ((type) == ADC_BIAS_SEL_AON_BANDGAP))
+
+/** @defgroup  ADC_CHOP_MOD_TYPE
+ *  @{
+ */
+#define IS_ADC_CHOP_MOD_TYPE(type)                       (((type) == ADC_CHOP_MOD_ALL_OFF) || \
+                                                          ((type) == ADC_CHOP_MOD_AZ_ON) || \
+                                                          ((type) == ADC_CHOP_MOD_AZ_PGA_ON) || \
+                                                          ((type) == ADC_CHOP_MOD_AZ_PGA_RPC_ON))
+
+/** @defgroup  ADC_PGA_VCM_TYPE
+ *  @{
+ */
+#define IS_ADC_PGA_VCM_TYPE(type)                        (((type) == ADC_PGA_VCM_1V) || \
+                                                          ((type) == ADC_PGA_VCM_1P2V) || \
+                                                          ((type) == ADC_PGA_VCM_1P4V) || \
+                                                          ((type) == ADC_PGA_VCM_1P6V))
+
+/** @defgroup  ADC_TSEN_MOD_TYPE
+ *  @{
+ */
+#define IS_ADC_TSEN_MOD_TYPE(type)                       (((type) == ADC_TSEN_MOD_INTERNAL_DIODE) || \
+                                                          ((type) == ADC_TSEN_MOD_EXTERNAL_DIODE))
+
+/** @defgroup  ADC_VREF_TYPE
+ *  @{
+ */
+#define IS_ADC_VREF_TYPE(type)                           (((type) == ADC_VREF_3P3V) || \
+                                                          ((type) == ADC_VREF_2V))
+
+/** @defgroup  ADC_SIG_INPUT_TYPE
+ *  @{
+ */
+#define IS_ADC_SIG_INPUT_TYPE(type)                      (((type) == ADC_INPUT_SINGLE_END) || \
+                                                          ((type) == ADC_INPUT_DIFF))
+
+/** @defgroup  ADC_DATA_WIDTH_TYPE
+ *  @{
+ */
+#define IS_ADC_DATA_WIDTH_TYPE(type)                     (((type) == ADC_DATA_WIDTH_12) || \
+                                                          ((type) == ADC_DATA_WIDTH_14_WITH_16_AVERAGE) || \
+                                                          ((type) == ADC_DATA_WIDTH_16_WITH_64_AVERAGE) || \
+                                                          ((type) == ADC_DATA_WIDTH_16_WITH_128_AVERAGE) || \
+                                                          ((type) == ADC_DATA_WIDTH_16_WITH_256_AVERAGE))
+
+/** @defgroup  ADC_MICBOOST_DB_TYPE
+ *  @{
+ */
+#define IS_ADC_MICBOOST_DB_TYPE(type)                    (((type) == ADC_MICBOOST_DB_16DB) || \
+                                                          ((type) == ADC_MICBOOST_DB_32DB))
+
+/** @defgroup  ADC_PGA2_GAIN_TYPE
+ *  @{
+ */
+#define IS_ADC_PGA2_GAIN_TYPE(type)                      (((type) == ADC_PGA2_GAIN_0DB) || \
+                                                          ((type) == ADC_PGA2_GAIN_6DB) || \
+                                                          ((type) == ADC_PGA2_GAIN_N6DB) || \
+                                                          ((type) == ADC_PGA2_GAIN_12DB))
+
+/** @defgroup  ADC_MIC_MODE_TYPE
+ *  @{
+ */
+#define IS_ADC_MIC_MODE_TYPE(type)                       (((type) == ADC_MIC_MODE_SINGLE) || \
+                                                          ((type) == ADC_MIC_MODE_DIFF))
+
+/** @defgroup  ADC_FIFO_THRESHOLD_TYPE
+ *  @{
+ */
+#define IS_ADC_FIFO_THRESHOLD_TYPE(type)                 (((type) == ADC_FIFO_THRESHOLD_1) || \
+                                                          ((type) == ADC_FIFO_THRESHOLD_4) || \
+                                                          ((type) == ADC_FIFO_THRESHOLD_8) || \
+                                                          ((type) == ADC_FIFO_THRESHOLD_16))
+
+/** @defgroup  ADC_INT_TYPE
+ *  @{
+ */
+#define IS_ADC_INT_TYPE(type)                            (((type) == ADC_INT_POS_SATURATION) || \
+                                                          ((type) == ADC_INT_NEG_SATURATION) || \
+                                                          ((type) == ADC_INT_FIFO_UNDERRUN) || \
+                                                          ((type) == ADC_INT_FIFO_OVERRUN) || \
+                                                          ((type) == ADC_INT_ADC_READY) || \
+                                                          ((type) == ADC_INT_FIFO_READY) || \
+                                                          ((type) == ADC_INT_ALL))
+
+/*@} end of group ADC_Public_Constants */
+
+/** @defgroup  ADC_Public_Macros
+ *  @{
+ */
+
+/*@} end of group ADC_Public_Macros */
+
+/** @defgroup  ADC_Public_Functions
+ *  @{
+ */
+#ifndef BFLB_USE_HAL_DRIVER
+void GPADC_DMA_IRQHandler(void);
+#endif
+void ADC_Vbat_Enable(void);
+void ADC_Vbat_Disable(void);
+void ADC_Reset(void);
+void ADC_Enable(void);
+void ADC_Disable(void);
+void ADC_Init(ADC_CFG_Type* cfg);
+void ADC_Channel_Config(ADC_Chan_Type posCh,ADC_Chan_Type negCh,BL_Fun_Type contEn);
+void ADC_Scan_Channel_Config(ADC_Chan_Type posChList[],ADC_Chan_Type negChList[],uint8_t scanLength,BL_Fun_Type contEn);
+void ADC_Start(void);
+void ADC_Stop(void);
+void ADC_FIFO_Cfg(ADC_FIFO_Cfg_Type *fifoCfg);
+uint8_t ADC_Get_FIFO_Count(void);
+BL_Sts_Type ADC_FIFO_Is_Empty(void);
+BL_Sts_Type ADC_FIFO_Is_Full(void);
+uint32_t ADC_Read_FIFO(void);
+void ADC_Parse_Result(uint32_t *orgVal,uint32_t len,ADC_Result_Type *result);
+void ADC_IntClr(ADC_INT_Type intType);
+BL_Sts_Type ADC_GetIntStatus(ADC_INT_Type intType);
+void ADC_Int_Callback_Install(ADC_INT_Type intType,intCallback_Type* cbFun);
+void ADC_IntMask(ADC_INT_Type intType, BL_Mask_Type intMask);
+void ADC_SET_TSVBE_LOW(void);
+void ADC_SET_TSVBE_HIGH(void);
+void ADC_Tsen_Init(ADC_TSEN_MOD_Type tsenMod);
+BL_Err_Type ADC_Mic_Init(ADC_MIC_Type * adc_mic_config);
+void ADC_MIC_Bias_Disable(void);
+void ADC_MIC_Bias_Enable(void);
+BL_Err_Type ADC_Trim_TSEN(uint16_t * tsen_offset);
+BL_Err_Type ADC_Gain_Trim(void);
+uint32_t ADC_Cal_Reg_Coeff_Value(uint32_t raw_reg);
+float TSEN_Get_Temp(uint32_t tsen_offset);
+
+/*@} end of group ADC_Public_Functions */
+
+/*@} end of group ADC */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_ADC_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_aon.h b/drivers/bl702_driver/std_drv/inc/bl702_aon.h
new file mode 100644
index 00000000..ab1a3379
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_aon.h
@@ -0,0 +1,107 @@
+/**
+  ******************************************************************************
+  * @file    bl702_aon.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_AON_H__
+#define __BL702_AON_H__
+
+#include "aon_reg.h"
+#include "glb_reg.h"
+#include "hbn_reg.h"
+#include "pds_reg.h"
+#include "bl702_ef_ctrl.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  AON
+ *  @{
+ */
+
+/** @defgroup  AON_Public_Types
+ *  @{
+ */
+
+/*@} end of group AON_Public_Types */
+
+/** @defgroup  AON_Public_Constants
+ *  @{
+ */
+
+/*@} end of group AON_Public_Constants */
+
+/** @defgroup  AON_Public_Macros
+ *  @{
+ */
+
+/*@} end of group AON_Public_Macros */
+
+/** @defgroup  AON_Public_Functions
+ *  @{
+ */
+/*----------*/
+BL_Err_Type AON_Power_On_MBG(void);
+BL_Err_Type AON_Power_Off_MBG(void);
+/*----------*/
+BL_Err_Type AON_Power_On_XTAL(void);
+BL_Err_Type AON_Set_Xtal_CapCode(uint8_t capIn,uint8_t capOut);
+uint8_t AON_Get_Xtal_CapCode(void);
+BL_Err_Type AON_Power_Off_XTAL(void);
+/*----------*/
+BL_Err_Type AON_Power_On_BG(void);
+BL_Err_Type AON_Power_Off_BG(void);
+/*----------*/
+BL_Err_Type AON_Power_On_LDO11_SOC(void);
+BL_Err_Type AON_Power_Off_LDO11_SOC(void);
+/*----------*/
+BL_Err_Type AON_Power_On_LDO15_RF(void);
+BL_Err_Type AON_Power_Off_LDO15_RF(void);
+/*----------*/
+BL_Err_Type AON_Power_On_SFReg(void);
+BL_Err_Type AON_Power_Off_SFReg(void);
+/*----------*/
+BL_Err_Type AON_LowPower_Enter_PDS0(void);
+BL_Err_Type AON_LowPower_Exit_PDS0(void);
+/*----------*/
+BL_Err_Type AON_Set_LDO11_SOC_Sstart_Delay(uint8_t delay);
+
+/*@} end of group AON_Public_Functions */
+
+/*@} end of group AON */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_AON_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_cam.h b/drivers/bl702_driver/std_drv/inc/bl702_cam.h
new file mode 100644
index 00000000..2fe125b3
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_cam.h
@@ -0,0 +1,289 @@
+/**
+  ******************************************************************************
+  * @file    bl702_cam.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_CAM_H__
+#define __BL702_CAM_H__
+
+#include "cam_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  CAM
+ *  @{
+ */
+
+/** @defgroup  CAM_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief CAM AHB burst type definition
+ */
+typedef enum {
+    CAM_BURST_TYPE_SINGLE,                  /*!< Camera AHB burst type:single */
+    CAM_BURST_TYPE_INCR4,                   /*!< Camera AHB burst type:incrementing 4 */
+    CAM_BURST_TYPE_INCR8,                   /*!< Camera AHB burst type:incrementing 8 */
+    CAM_BURST_TYPE_INCR16,                  /*!< Camera AHB burst type:incrementing 16 */
+}CAM_Burst_Type;
+
+/**
+ *  @brief CAM software mode type definition
+ */
+typedef enum {
+    CAM_SW_MODE_AUTO,                       /*!< CAM auto mode with mjpeg */
+    CAM_SW_MODE_MANUAL,                     /*!< CAM manual mode(software mode) */
+}CAM_SW_Mode_Type;
+
+/**
+ *  @brief CAM frame mode type definition
+ */
+typedef enum {
+    CAM_PLANAR_MODE,                        /*!< CAM planar mode(YYYY.../UVUV...) */
+    CAM_INTERLEAVE_MODE,                    /*!< CAM interleave mode(YUYVYUYV...) */
+}CAM_Frame_Mode_Type;
+
+/**
+ *  @brief CAM YUV mode type definition
+ */
+typedef enum {
+    CAM_YUV422,                             /*!< CAM YUV422 mode */
+    CAM_YUV420_EVEN,                        /*!< CAM YUV420 mode(raw data:YUYV YUYV..., processed data:YUYV YY...) which dropped odd pix data in 
+                                                 odd rows */
+    CAM_YUV420_ODD,                         /*!< CAM YUV420 mode(raw data:UYVY UYVY..., processed data:UYVY YY...) which dropped even pix data 
+                                                 in odd rows */
+    CAM_YUV400_EVEN,                        /*!< CAM YUV400 mode(raw data:YUYV YUYV..., processed data:YY YY...) which dropped odd pix data */
+    CAM_YUV400_ODD,                         /*!< CAM YUV400 mode(raw data:UYVY UYVY..., processed data:YY YY...) which dropped even pix data */
+}CAM_YUV_Mode_Type;
+
+/**
+ *  @brief CAM line active polarity type definition
+ */
+typedef enum {
+    CAM_LINE_ACTIVE_POLARITY_LOW,           /*!< CAM line active polarity low */
+    CAM_LINE_ACTIVE_POLARITY_HIGH,          /*!< CAM line active polarity high */
+}CAM_Line_Active_Pol;
+
+/**
+ *  @brief CAM frame active polarity type definition
+ */
+typedef enum {
+    CAM_FRAME_ACTIVE_POLARITY_LOW,          /*!< CAM frame active polarity low */
+    CAM_FRAME_ACTIVE_POLARITY_HIGH,         /*!< CAM frame active polarity high */
+}CAM_Frame_Active_Pol;
+
+/**
+ *  @brief CAM sensor mode type definition
+ */
+typedef enum {
+    CAM_SENSOR_MODE_V_AND_H,                /*!< CAM sensor type v and h */
+    CAM_SENSOR_MODE_V_OR_H,                 /*!< CAM sensor type v  or h */
+    CAM_SENSOR_MODE_V,                      /*!< CAM sensor type v */
+    CAM_SENSOR_MODE_H,                      /*!< CAM sensor type h */
+}CAM_Sensor_Mode_Type;
+
+/**
+ *  @brief CAM interrupt type definition
+ */
+typedef enum {
+    CAM_INT_NORMAL_0,                       /*!< Interleave mode: normal write interrupt,     planar mode:even byte normal write interrupt */
+    CAM_INT_NORMAL_1,                       /*!< Interleave mode: no use,                     planar mode:odd byte normal write interrupt */
+    CAM_INT_MEMORY_OVERWRITE_0,             /*!< Interleave mode: memory overwrite interrupt, planar mode:even byte memory overwrite interrupt */
+    CAM_INT_MEMORY_OVERWRITE_1,             /*!< Interleave mode: no use,                     planar mode:odd byte memory overwrite interrupt */
+    CAM_INT_FRAME_OVERWRITE_0,              /*!< Interleave mode: frame overwrite interrupt,  planar mode:even byte frame overwrite interrupt */
+    CAM_INT_FRAME_OVERWRITE_1,              /*!< Interleave mode: no use,                     planar mode:odd byte frame overwrite interrupt */
+    CAM_INT_FIFO_OVERWRITE_0,               /*!< Interleave mode: fifo overwrite interrupt,   planar mode:even byte fifo overwrite interrupt */
+    CAM_INT_FIFO_OVERWRITE_1,               /*!< Interleave mode: no use,                     planar mode:odd byte fifo overwrite interrupt */
+    CAM_INT_VSYNC_CNT_ERROR,                /*!< Vsync valid line count non-match interrupt */
+    CAM_INT_HSYNC_CNT_ERROR,                /*!< Hsync valid pixel count non-match interrupt */
+    CAM_INT_ALL,                            /*!< All of interrupt */
+}CAM_INT_Type;
+
+/**
+ *  @brief CAM configuration strcut definition
+ */
+typedef struct {
+    CAM_SW_Mode_Type swMode;                /*!< Software mode */
+    uint8_t swIntCnt;                       /*!< Set frame count to issue interrupt at software mode */
+    CAM_Frame_Mode_Type frameMode;          /*!< Frame mode */
+    CAM_YUV_Mode_Type yuvMode;              /*!< YUV mode */
+    CAM_Frame_Active_Pol framePol;          /*!< Frame polarity */
+    CAM_Line_Active_Pol linePol;            /*!< Line polarity */
+    CAM_Burst_Type burstType;               /*!< AHB burst type */
+    CAM_Sensor_Mode_Type camSensorMode;     /*!< CAM sensor mode */
+    uint8_t waitCount;                      /*!< cycles in FSM wait mode, default value:0x40 */
+    uint32_t memStart0;                     /*!< Interleave mode:data start address,   planar mode:even byte start address */
+    uint32_t memSize0;                      /*!< Interleave mode:memory size in burst, planar mode:even byte memory size in burst */
+    uint32_t frameSize0;                    /*!< Interleave mode:frame size in burst,  planar mode:even byte frame size in burst */
+    uint32_t memStart1;                     /*!< Interleave mode:no use,               planar mode:odd byte start address */
+    uint32_t memSize1;                      /*!< Interleave mode:no use,               planar mode:odd byte memory size in burst */
+    uint32_t frameSize1;                    /*!< Interleave mode:no use,               planar mode:odd byte frame size in burst */
+}CAM_CFG_Type;
+
+/**
+ *  @brief CAM interleave mode frame information strcut definition
+ */
+typedef struct {
+    uint8_t validFrames;                    /*!< Valid frames */
+    uint32_t curFrameAddr;                  /*!< Current frame address */
+    uint32_t curFrameBytes;                 /*!< Current frame bytes */
+    uint32_t status;                        /*!< CAM module status */
+}CAM_Interleave_Frame_Info;
+
+/**
+ *  @brief CAM planar mode frame information strcut definition
+ */
+typedef struct {
+    uint8_t validFrames0;                   /*!< Even byte frame counts in memory */
+    uint8_t validFrames1;                   /*!< Odd byte frame counts in memory */
+    uint32_t curFrameAddr0;                 /*!< Current even frame address */
+    uint32_t curFrameAddr1;                 /*!< Current odd frame address */
+    uint32_t curFrameBytes0;                /*!< Current even frame bytes */
+    uint32_t curFrameBytes1;                /*!< Current odd frame bytes */
+    uint32_t status;                        /*!< CAM module status */
+}CAM_Planar_Frame_Info;
+
+/*@} end of group CAM_Public_Types */
+
+/** @defgroup  CAM_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  CAM_BURST_TYPE
+ *  @{
+ */
+#define IS_CAM_BURST_TYPE(type)                          (((type) == CAM_BURST_TYPE_SINGLE) || \
+                                                          ((type) == CAM_BURST_TYPE_INCR4) || \
+                                                          ((type) == CAM_BURST_TYPE_INCR8) || \
+                                                          ((type) == CAM_BURST_TYPE_INCR16))
+
+/** @defgroup  CAM_SW_MODE_TYPE
+ *  @{
+ */
+#define IS_CAM_SW_MODE_TYPE(type)                        (((type) == CAM_SW_MODE_AUTO) || \
+                                                          ((type) == CAM_SW_MODE_MANUAL))
+
+/** @defgroup  CAM_FRAME_MODE_TYPE
+ *  @{
+ */
+#define IS_CAM_FRAME_MODE_TYPE(type)                     (((type) == CAM_PLANAR_MODE) || \
+                                                          ((type) == CAM_INTERLEAVE_MODE))
+
+/** @defgroup  CAM_YUV_MODE_TYPE
+ *  @{
+ */
+#define IS_CAM_YUV_MODE_TYPE(type)                       (((type) == CAM_YUV422) || \
+                                                          ((type) == CAM_YUV420_EVEN) || \
+                                                          ((type) == CAM_YUV420_ODD) || \
+                                                          ((type) == CAM_YUV400_EVEN) || \
+                                                          ((type) == CAM_YUV400_ODD))
+
+/** @defgroup  CAM_LINE_ACTIVE_POL
+ *  @{
+ */
+#define IS_CAM_LINE_ACTIVE_POL(type)                     (((type) == CAM_LINE_ACTIVE_POLARITY_LOW) || \
+                                                          ((type) == CAM_LINE_ACTIVE_POLARITY_HIGH))
+
+/** @defgroup  CAM_FRAME_ACTIVE_POL
+ *  @{
+ */
+#define IS_CAM_FRAME_ACTIVE_POL(type)                    (((type) == CAM_FRAME_ACTIVE_POLARITY_LOW) || \
+                                                          ((type) == CAM_FRAME_ACTIVE_POLARITY_HIGH))
+
+/** @defgroup  CAM_SENSOR_MODE_TYPE
+ *  @{
+ */
+#define IS_CAM_SENSOR_MODE_TYPE(type)                    (((type) == CAM_SENSOR_MODE_V_AND_H) || \
+                                                          ((type) == CAM_SENSOR_MODE_V_OR_H) || \
+                                                          ((type) == CAM_SENSOR_MODE_V) || \
+                                                          ((type) == CAM_SENSOR_MODE_H))
+
+/** @defgroup  CAM_INT_TYPE
+ *  @{
+ */
+#define IS_CAM_INT_TYPE(type)                            (((type) == CAM_INT_NORMAL_0) || \
+                                                          ((type) == CAM_INT_NORMAL_1) || \
+                                                          ((type) == CAM_INT_MEMORY_OVERWRITE_0) || \
+                                                          ((type) == CAM_INT_MEMORY_OVERWRITE_1) || \
+                                                          ((type) == CAM_INT_FRAME_OVERWRITE_0) || \
+                                                          ((type) == CAM_INT_FRAME_OVERWRITE_1) || \
+                                                          ((type) == CAM_INT_FIFO_OVERWRITE_0) || \
+                                                          ((type) == CAM_INT_FIFO_OVERWRITE_1) || \
+                                                          ((type) == CAM_INT_VSYNC_CNT_ERROR) || \
+                                                          ((type) == CAM_INT_HSYNC_CNT_ERROR) || \
+                                                          ((type) == CAM_INT_ALL))
+
+/*@} end of group CAM_Public_Constants */
+
+/** @defgroup  CAM_Public_Macros
+ *  @{
+ */
+
+/*@} end of group CAM_Public_Macros */
+
+/** @defgroup  CAM_Public_Functions
+ *  @{
+ */
+#ifndef BFLB_USE_HAL_DRIVER
+void CAM_IRQHandler(void);
+#endif
+void CAM_Init(CAM_CFG_Type *cfg);
+void CAM_Deinit(void);
+void CAM_Enable(void);
+void CAM_Disable(void);
+void CAM_Clock_Gate(BL_Fun_Type enable);
+void CAM_Hsync_Crop(uint16_t start,uint16_t end);
+void CAM_Vsync_Crop(uint16_t start,uint16_t end);
+void CAM_Set_Hsync_Total_Count(uint16_t count);
+void CAM_Set_Vsync_Total_Count(uint16_t count);
+void CAM_Interleave_Get_Frame_Info(CAM_Interleave_Frame_Info *info);
+void CAM_Planar_Get_Frame_Info(CAM_Planar_Frame_Info *info);
+uint8_t CAM_Get_Frame_Count_0(void);
+uint8_t CAM_Get_Frame_Count_1(void);
+void CAM_Interleave_Pop_Frame(void);
+void CAM_Planar_Pop_Frame(void);
+void CAM_IntMask(CAM_INT_Type intType,BL_Mask_Type intMask);
+void CAM_IntClr(CAM_INT_Type intType);
+void CAM_Int_Callback_Install(CAM_INT_Type intType,intCallback_Type* cbFun);
+
+/*@} end of group CAM_Public_Functions */
+
+/*@} end of group CAM */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_CAM_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_clock.h b/drivers/bl702_driver/std_drv/inc/bl702_clock.h
new file mode 100644
index 00000000..0af8d947
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_clock.h
@@ -0,0 +1,114 @@
+/**
+  ******************************************************************************
+  * @file    bl702_glb.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_GLB_H__
+#define __BL702_GLB_H__
+
+#include "glb_reg.h"
+#include "bl702_hbn.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  GLB
+ *  @{
+ */
+
+/** @defgroup  GLB_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief System clock type definition
+ */
+typedef enum {
+    BL_SYSTEM_CLOCK_FCLK,                   /*!< Fast clock/CPU clock */
+    BL_SYSTEM_CLOCK_BCLK,                   /*!< BUS clock */
+    BL_SYSTEM_CLOCK_F32K,                   /*!< F32K clock */
+    BL_SYSTEM_CLOCK_XCLK,                   /*!< XCLK:RC32M or XTAL */
+    BL_SYSTEM_CLOCK_XTAL,                   /*!< XTAL clock */
+    BL_SYSTEM_CLOCK_MAX,                    /*!< MAX type of system clock */
+}BL_System_Clock_Type;
+
+/**
+ *  @brief SOC clock config type
+ */
+typedef struct {
+    uint16_t systemClock[BL_SYSTEM_CLOCK_MAX];    /*!< System lock value */
+    uint16_t peripheralClock[BL_AHB_SLAVE1_MAX];    /*!< Pewripherals clock value */
+    uint32_t i2sClock;                      /*!< I2S clock */
+}Clock_Cfg_Type;
+
+/*@} end of group GLB_Public_Types */
+
+/** @defgroup  GLB_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  BL_SYSTEM_CLOCK_TYPE
+ *  @{
+ */
+#define IS_BL_SYSTEM_CLOCK_TYPE(type)                    (((type) == BL_SYSTEM_CLOCK_FCLK) || \
+                                                          ((type) == BL_SYSTEM_CLOCK_BCLK) || \
+                                                          ((type) == BL_SYSTEM_CLOCK_F32K) || \
+                                                          ((type) == BL_SYSTEM_CLOCK_XCLK) || \
+                                                          ((type) == BL_SYSTEM_CLOCK_XTAL) || \
+                                                          ((type) == BL_SYSTEM_CLOCK_MAX))
+
+/*@} end of group GLB_Public_Constants */
+
+/** @defgroup  GLB_Public_Macros
+ *  @{
+ */
+
+/*@} end of group GLB_Public_Macros */
+
+/** @defgroup  GLB_Public_Functions
+ *  @{
+ */
+void Clock_System_Clock_Set(BL_System_Clock_Type type,uint32_t clock);
+void Clock_Peripheral_Clock_Set(BL_AHB_Slave1_Type type,uint32_t clock);
+uint32_t Clock_System_Clock_Get(BL_System_Clock_Type type);
+uint32_t Clock_Peripheral_Clock_Get(BL_AHB_Slave1_Type type);
+
+/*@} end of group GLB_Public_Functions */
+
+/*@} end of group GLB */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_GLB_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_common.h b/drivers/bl702_driver/std_drv/inc/bl702_common.h
new file mode 100644
index 00000000..1cea50c4
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_common.h
@@ -0,0 +1,61 @@
+#ifndef __BL702_COMMON_H__
+#define __BL702_COMMON_H__
+
+#include "bl702.h"
+#include "bflb_platform.h"
+
+/** @addtogroup  BL606_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  COMMON
+ *  @{
+ */
+
+/** @defgroup  COMMON_Public_Types
+ *  @{
+ */
+
+/*@} end of group COMMON_Public_Types */
+
+/** @defgroup  COMMON_Public_Constants
+ *  @{
+ */
+ 
+/** @defgroup DRIVER_INT_PERIPH
+ *  @{
+ */
+#define IS_INT_PERIPH(INT_PERIPH)       ((INT_PERIPH) < IRQn_LAST)
+
+/*@} end of group DRIVER_INT_PERIPH */
+
+/** @defgroup DRIVER_INT_MASK     
+ *  @{
+ */
+#define IS_BL_MASK_TYPE(type)          (((type) == MASK) || ((type) == UNMASK))
+
+/*@} end of group COMMON_Public_Constants */
+
+/** @defgroup  COMMON_Public_Macros
+ *  @{
+ */
+
+/*@} end of group DRIVER_Public_Macro */
+
+/** @defgroup DRIVER_Public_FunctionDeclaration
+ *  @brief DRIVER functions declaration
+ *  @{
+ */
+
+#define ARCH_Delay_US                               BL702_Delay_US
+#define ARCH_Delay_MS                               BL702_Delay_MS
+
+void Interrupt_Handler_Register(IRQn_Type irq,pFunc interruptFun);
+void ASM_Delay_Us(uint32_t core,uint32_t cnt);
+void BL702_Delay_US(uint32_t cnt);
+void BL702_Delay_MS(uint32_t cnt);
+/*@} end of group DRIVER_COMMON  */
+
+#endif /* __BL702_COMMON_H__ */
+
+
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_dac.h b/drivers/bl702_driver/std_drv/inc/bl702_dac.h
new file mode 100644
index 00000000..f248c882
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_dac.h
@@ -0,0 +1,285 @@
+/**
+  ******************************************************************************
+  * @file    bl702_dac.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_DAC_H__
+#define __BL702_DAC_H__
+
+#include "aon_reg.h"
+#include "glb_reg.h"
+#include "gpip_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  DAC
+ *  @{
+ */
+
+/** @defgroup  DAC_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief DAC reference voltage definition
+ */
+typedef enum {
+    GLB_DAC_REF_SEL_INTERNAL,               /*!< DAC reference select internal */
+    GLB_DAC_REF_SEL_EXTERNAL,               /*!< DAC reference select external */
+}GLB_DAC_Ref_Sel_Type;
+
+/**
+ *  @brief DAC reference voltage definition
+ */
+typedef enum {
+    GLB_DAC_Output_Volt_0P2_1,              /*!< DAC output voltage is 0.2-1V */
+    GLB_DAC_Output_Volt_0P225_1P425,        /*!< DAC output voltage is 0.225-1.425V */
+    GLB_DAC_Output_Volt_RESEVED,            /*!< DAC output voltage is 0.225-1.425V */
+    GLB_DAC_Output_Volt_0P2_1P8,            /*!< DAC output voltage is 0.2-1.8V */
+}GLB_DAC_Output_Volt_Range_Type;
+
+/**
+ *  @brief DAC channel type definition
+ */
+typedef enum {
+    GLB_DAC_CHAN0,                          /*!< DAC channel 0 */
+    GLB_DAC_CHAN1,                          /*!< DAC channel 1 */
+    GLB_DAC_CHAN2,                          /*!< DAC channel 2 */
+    GLB_DAC_CHAN3,                          /*!< DAC channel 3 */
+    GLB_DAC_CHAN4,                          /*!< DAC channel 4 */
+    GLB_DAC_CHAN5,                          /*!< DAC channel 5 */
+    GLB_DAC_CHAN6,                          /*!< DAC channel 6 */
+    GLB_DAC_CHAN7,                          /*!< DAC channel 7 */
+    GLB_DAC_CHAN_ALL,                       /*!< DAC channel all */
+}GLB_DAC_Chan_Type;
+
+/**
+ *  @brief DAC channel configuration structure type definition
+ */
+typedef struct {
+    BL_Fun_Type chanEn;                     /*!< Enable this channel or not */
+    BL_Fun_Type outputEn;                   /*!< Output this channel result to PAD */
+    GLB_DAC_Chan_Type outMux;               /*!< DAC output mux,NOT implement yet,DAC use fixed GPIO9 and GPIO10 */
+    GLB_DAC_Output_Volt_Range_Type outRange;    /*!< DAC output voltage range */
+}GLB_DAC_Chan_Cfg_Type;
+
+/**
+ *  @brief DAC configuration structure type definition
+ */
+typedef struct {
+    GLB_DAC_Ref_Sel_Type refSel;            /*!< DAC reference voltage select */
+    BL_Fun_Type resetChanA;                 /*!< Reset DAC channel A */
+    BL_Fun_Type resetChanB;                 /*!< Reset DAC channel B */
+}GLB_DAC_Cfg_Type;
+
+/**
+ *  @brief DAC channel B source selection type definition
+ */
+typedef enum {
+    GPIP_DAC_ChanB_SRC_REG,                 /*!< select Reg as source of DAC channel B */
+    GPIP_DAC_ChanB_SRC_DMA,                 /*!< select DMA as source of DAC channel B */
+    GPIP_DAC_ChanB_SRC_DMA_WITH_FILTER,     /*!< select DMA with Filter as source of DAC channel B */
+    GPIP_DAC_ChanB_SRC_SIN_GEN,             /*!< select Sin Gen as source of DAC channel B */
+    GPIP_DAC_ChanB_SRC_A,                   /*!< select channel A as source of DAC channel B */
+    GPIP_DAC_ChanB_SRC_INVERSE_A,           /*!< select inverse of channel A as source of DAC channel B */
+}GPIP_DAC_ChanB_SRC_Type;
+
+/**
+ *  @brief DAC channel A source selection type definition
+ */
+typedef enum {
+    GPIP_DAC_ChanA_SRC_REG,                 /*!< select Reg as source of DAC channel A */
+    GPIP_DAC_ChanA_SRC_DMA,                 /*!< select DMA as source of DAC channel A */
+    GPIP_DAC_ChanA_SRC_DMA_WITH_FILTER,     /*!< select DMA with Filter as source of DAC channel A */
+    GPIP_DAC_ChanA_SRC_SIN_GEN,             /*!< select Sin Gen as source of DAC channel A */
+}GPIP_DAC_ChanA_SRC_Type;
+
+/**
+ *  @brief DAC clock divider type definition
+ */
+typedef enum {
+    DAC_CLK_DIV_16,                         /*!< ADC clock:on 32M clock is 2M */
+    DAC_CLK_DIV_32,                         /*!< ADC clock:on 32M clock is 1M */
+    DAC_CLK_DIV_RESERVE,                    /*!< reserved */
+    DAC_CLK_DIV_64,                         /*!< ADC clock:on 32M clock is 0.5M */
+    DAC_CLK_DIV_1,                          /*!< ADC clock:on 32M clock is 32M */
+}DAC_CLK_Type;
+
+/**
+ *  @brief DAC DMA TX format selection type definition
+ */
+typedef enum {
+    GPIP_DAC_DMA_FORMAT_0,                  /*!< {A0},{A1},{A2},... */
+    GPIP_DAC_DMA_FORMAT_1,                  /*!< {B0,A0},{B1,A1},{B2,A2},... */
+    GPIP_DAC_DMA_FORMAT_2,                  /*!< {A1,A0},{A3,A2},{A5,A4},... */
+}GPIP_DAC_DMA_TX_FORMAT_Type;
+
+/**
+ *  @brief AON and GPIP DAC configuration structure type definition
+ */
+typedef struct {
+    GLB_DAC_Ref_Sel_Type refSel;            /*!< DAC reference voltage select */
+    BL_Fun_Type resetChanA;                 /*!< Reset DAC channel A */
+    BL_Fun_Type resetChanB;                 /*!< Reset DAC channel B */
+    DAC_CLK_Type div;                       /*!< DAC clock div */
+    BL_Fun_Type dmaEn;                      /*!< DAC DMA transfer enable */
+    GPIP_DAC_DMA_TX_FORMAT_Type dmaFmt;     /*!< DAC DMA TX format selection */
+}GLB_GPIP_DAC_Cfg_Type;
+
+/**
+ *  @brief AON and GPIP DAC channel A configuration structure type definition
+ */
+typedef struct {
+    BL_Fun_Type chanCovtEn;                 /*!< Enable this channel conversion or not */
+    BL_Fun_Type outputEn;                   /*!< Output this channel result to PAD */
+    BL_Fun_Type chanEn;                     /*!< Enable this channel or not */
+    GPIP_DAC_ChanA_SRC_Type src;            /*!< DAC channel A source */
+}GLB_GPIP_DAC_ChanA_Cfg_Type;
+
+/**
+ *  @brief AON and GPIP DAC channel B configuration structure type definition
+ */
+typedef struct {
+    BL_Fun_Type chanCovtEn;                 /*!< Enable this channel conversion or not */
+    BL_Fun_Type outputEn;                   /*!< Output this channel result to PAD */
+    BL_Fun_Type chanEn;                     /*!< Enable this channel or not */
+    GPIP_DAC_ChanB_SRC_Type src;            /*!< DAC channel B source */
+}GLB_GPIP_DAC_ChanB_Cfg_Type;
+
+/*@} end of group DAC_Public_Types */
+
+/** @defgroup  DAC_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  GLB_DAC_REF_SEL_TYPE
+ *  @{
+ */
+#define IS_GLB_DAC_REF_SEL_TYPE(type)                    (((type) == GLB_DAC_REF_SEL_INTERNAL) || \
+                                                          ((type) == GLB_DAC_REF_SEL_EXTERNAL))
+
+/** @defgroup  GLB_DAC_OUTPUT_VOLT_RANGE_TYPE
+ *  @{
+ */
+#define IS_GLB_DAC_OUTPUT_VOLT_RANGE_TYPE(type)          (((type) == GLB_DAC_Output_Volt_0P2_1) || \
+                                                          ((type) == GLB_DAC_Output_Volt_0P225_1P425) || \
+                                                          ((type) == GLB_DAC_Output_Volt_RESEVED) || \
+                                                          ((type) == GLB_DAC_Output_Volt_0P2_1P8))
+
+/** @defgroup  GLB_DAC_CHAN_TYPE
+ *  @{
+ */
+#define IS_GLB_DAC_CHAN_TYPE(type)                       (((type) == GLB_DAC_CHAN0) || \
+                                                          ((type) == GLB_DAC_CHAN1) || \
+                                                          ((type) == GLB_DAC_CHAN2) || \
+                                                          ((type) == GLB_DAC_CHAN3) || \
+                                                          ((type) == GLB_DAC_CHAN4) || \
+                                                          ((type) == GLB_DAC_CHAN5) || \
+                                                          ((type) == GLB_DAC_CHAN6) || \
+                                                          ((type) == GLB_DAC_CHAN7) || \
+                                                          ((type) == GLB_DAC_CHAN_ALL))
+
+/** @defgroup  GPIP_DAC_CHANB_SRC_TYPE
+ *  @{
+ */
+#define IS_GPIP_DAC_CHANB_SRC_TYPE(type)                 (((type) == GPIP_DAC_ChanB_SRC_REG) || \
+                                                          ((type) == GPIP_DAC_ChanB_SRC_DMA) || \
+                                                          ((type) == GPIP_DAC_ChanB_SRC_DMA_WITH_FILTER) || \
+                                                          ((type) == GPIP_DAC_ChanB_SRC_SIN_GEN) || \
+                                                          ((type) == GPIP_DAC_ChanB_SRC_A) || \
+                                                          ((type) == GPIP_DAC_ChanB_SRC_INVERSE_A))
+
+/** @defgroup  GPIP_DAC_CHANA_SRC_TYPE
+ *  @{
+ */
+#define IS_GPIP_DAC_CHANA_SRC_TYPE(type)                 (((type) == GPIP_DAC_ChanA_SRC_REG) || \
+                                                          ((type) == GPIP_DAC_ChanA_SRC_DMA) || \
+                                                          ((type) == GPIP_DAC_ChanA_SRC_DMA_WITH_FILTER) || \
+                                                          ((type) == GPIP_DAC_ChanA_SRC_SIN_GEN))
+
+/** @defgroup  DAC_CLK_TYPE
+ *  @{
+ */
+#define IS_DAC_CLK_TYPE(type)                            (((type) == DAC_CLK_DIV_16) || \
+                                                          ((type) == DAC_CLK_DIV_32) || \
+                                                          ((type) == DAC_CLK_DIV_RESERVE) || \
+                                                          ((type) == DAC_CLK_DIV_64) || \
+                                                          ((type) == DAC_CLK_DIV_1))
+
+/** @defgroup  GPIP_DAC_DMA_TX_FORMAT_TYPE
+ *  @{
+ */
+#define IS_GPIP_DAC_DMA_TX_FORMAT_TYPE(type)             (((type) == GPIP_DAC_DMA_FORMAT_0) || \
+                                                          ((type) == GPIP_DAC_DMA_FORMAT_1) || \
+                                                          ((type) == GPIP_DAC_DMA_FORMAT_2))
+
+/*@} end of group DAC_Public_Constants */
+
+/** @defgroup  DAC_Public_Macros
+ *  @{
+ */
+
+/*@} end of group DAC_Public_Macros */
+
+/** @defgroup  DAC_Public_Functions
+ *  @{
+ */
+void GLB_DAC_Init(GLB_DAC_Cfg_Type *cfg);
+void GLB_DAC_Set_ChanA_Config(GLB_DAC_Chan_Cfg_Type *cfg);
+void GLB_DAC_Set_ChanB_Config(GLB_DAC_Chan_Cfg_Type *cfg);
+void GPIP_Set_DAC_ChanB_SRC_SEL(GPIP_DAC_ChanB_SRC_Type src);
+void GPIP_Set_DAC_ChanA_SRC_SEL(GPIP_DAC_ChanA_SRC_Type src);
+void GPIP_DAC_ChanB_Enable(void);
+void GPIP_DAC_ChanB_Disable(void);
+void GPIP_DAC_ChanA_Enable(void);
+void GPIP_DAC_ChanA_Disable(void);
+void GPIP_Set_DAC_DMA_TX_FORMAT_SEL(GPIP_DAC_DMA_TX_FORMAT_Type fmt);
+void GPIP_Set_DAC_DMA_TX_Enable(void);
+void GPIP_Set_DAC_DMA_TX_Disable(void);
+void GPIP_DAC_DMA_WriteData(uint32_t data);
+BL_Err_Type GLB_GPIP_DAC_Init(GLB_GPIP_DAC_Cfg_Type* cfg);
+void GLB_GPIP_DAC_Set_ChanA_Config(GLB_GPIP_DAC_ChanA_Cfg_Type *cfg);
+void GLB_GPIP_DAC_Set_ChanB_Config(GLB_GPIP_DAC_ChanB_Cfg_Type *cfg);
+void GLB_DAC_Set_ChanA_Value(uint16_t val);
+void GLB_DAC_Set_ChanB_Value(uint16_t val);
+
+/*@} end of group DAC_Public_Functions */
+
+/*@} end of group DAC */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_DAC_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_dma.h b/drivers/bl702_driver/std_drv/inc/bl702_dma.h
new file mode 100644
index 00000000..10e4166c
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_dma.h
@@ -0,0 +1,360 @@
+/**
+  ******************************************************************************
+  * @file    bl702_dma.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_DMA_H__
+#define __BL702_DMA_H__
+
+#include "dma_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  DMA
+ *  @{
+ */
+
+/** @defgroup  DMA_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief DMA endian type definition
+ */
+typedef enum {
+    DMA_LITTLE_ENDIAN = 0,                   /*!< DMA use little endian */
+    DMA_BIG_ENDIAN,                          /*!< DMA use big endian */
+}DMA_Endian_Type;
+
+/**
+ *  @brief DMA synchronization logic  type definition
+ */
+typedef enum {
+    DMA_SYNC_LOGIC_ENABLE = 0,               /*!< DMA synchronization logic enable */
+    DMA_SYNC_LOGIC_DISABLE,                  /*!< DMA synchronization logic disable */
+}DMA_Sync_Logic_Type;
+
+/**
+ *  @brief DMA transfer width type definition
+ */
+typedef enum {
+    DMA_TRNS_WIDTH_8BITS = 0,                /*!< DMA transfer width:8 bits */
+    DMA_TRNS_WIDTH_16BITS,                   /*!< DMA transfer width:16 bits */
+    DMA_TRNS_WIDTH_32BITS,                   /*!< DMA transfer width:32 bits */
+}DMA_Trans_Width_Type;
+
+/**
+ *  @brief DMA transfer direction type definition
+ */
+typedef enum {
+    DMA_TRNS_M2M = 0,                        /*!< DMA transfer tyep:memory to memory */
+    DMA_TRNS_M2P,                            /*!< DMA transfer tyep:memory to peripheral */
+    DMA_TRNS_P2M,                            /*!< DMA transfer tyep:peripheral to memory */
+    DMA_TRNS_P2P,                            /*!< DMA transfer tyep:peripheral to peripheral */
+}DMA_Trans_Dir_Type;
+
+/**
+ *  @brief DMA burst size type definition
+ */
+typedef enum {
+    DMA_BURST_SIZE_1 = 0,                    /*!< DMA transfer width:8 bits */
+    DMA_BURST_SIZE_4,                        /*!< DMA transfer width:16 bits */
+    DMA_BURST_SIZE_8,                        /*!< DMA transfer width:32 bits */
+    DMA_BURST_SIZE_16,                       /*!< DMA transfer width:64 bits */
+}DMA_Burst_Size_Type;
+
+/**
+ *  @brief DMA destination peripheral type definition
+ */
+typedef enum {
+    DMA_REQ_UART0_RX = 0,                    /*!< DMA request peripheral:UART0 RX */
+    DMA_REQ_UART0_TX,                        /*!< DMA request peripheral:UART0 TX */
+    DMA_REQ_UART1_RX,                        /*!< DMA request peripheral:UART1 RX */
+    DMA_REQ_UART1_TX,                        /*!< DMA request peripheral:UART1 TX */
+    DMA_REQ_I2C_RX = 6,                      /*!< DMA request peripheral:I2C RX */
+    DMA_REQ_I2C_TX,                          /*!< DMA request peripheral:I2C TX */
+    DMA_REQ_SPI_RX = 10,                     /*!< DMA request peripheral:SPI RX */
+    DMA_REQ_SPI_TX,                          /*!< DMA request peripheral:SPI TX */
+    DMA_REQ_I2S_RX = 20,                     /*!< DMA request peripheral:SPI RX */
+    DMA_REQ_I2S_TX,                          /*!< DMA request peripheral:SPI TX */
+    DMA_REQ_GPADC0 = 22,                     /*!< DMA request peripheral:GPADC0 */
+    DMA_REQ_GPADC1,                          /*!< DMA request peripheral:GPADC1 */
+    DMA_REQ_NONE = 0,                        /*!< DMA request peripheral:None */
+}DMA_Periph_Req_Type;
+
+/**
+ *  @brief DMA channel type definition
+ */
+typedef enum {
+    DMA_CH0 = 0,                             /*!< DMA channel 0 */
+    DMA_CH1,                                 /*!< DMA channel 1 */
+    DMA_CH2,                                 /*!< DMA channel 2 */
+    DMA_CH3,                                 /*!< DMA channel 3 */
+    DMA_CH4,                                 /*!< DMA channel 4 */
+    DMA_CH5,                                 /*!< DMA channel 5 */
+    DMA_CH6,                                 /*!< DMA channel 6 */
+    DMA_CH7,                                 /*!< DMA channel 7 */
+    DMA_CH_MAX,                              /*!<  */
+}DMA_Chan_Type;
+
+/**
+ *  @brief DMA LLI Structure PING-PONG
+ */
+typedef enum {
+    PING_INDEX = 0,                          /*!< PING INDEX */
+    PONG_INDEX,                              /*!< PONG INDEX */
+}DMA_LLI_PP_Index_Type;
+
+/**
+ *  @brief DMA interrupt type definition
+ */
+typedef enum {
+    DMA_INT_TCOMPLETED = 0,                  /*!< DMA completed interrupt */
+    DMA_INT_ERR,                             /*!< DMA error interrupt */
+    DMA_INT_ALL,                             /*!< All the interrupt */
+}DMA_INT_Type;
+
+/**
+ *  @brief DMA Configuration Structure type definition
+ */
+typedef struct {
+    DMA_Endian_Type endian;                  /*!< DMA endian type */
+    DMA_Sync_Logic_Type syncLogic;           /*!< DMA synchronization logic */
+}DMA_Cfg_Type;
+
+/**
+ *  @brief DMA channel Configuration Structure type definition
+ */
+typedef struct {
+    uint32_t srcDmaAddr;                     /*!< Source address of DMA transfer */
+    uint32_t destDmaAddr;                    /*!< Destination address of DMA transfer */
+    uint32_t transfLength;                   /*!< Transfer length, 0~4095, this is burst count */
+    DMA_Trans_Dir_Type dir;                  /*!< Transfer dir control. 0: Memory to Memory, 1: Memory to peripheral, 2: Peripheral to memory */
+    DMA_Chan_Type ch;                        /*!< Channel select 0-7 */
+    DMA_Trans_Width_Type srcTransfWidth;     /*!< Transfer width. 0: 8  bits, 1: 16  bits, 2: 32  bits */
+    DMA_Trans_Width_Type dstTransfWidth;     /*!< Transfer width. 0: 8  bits, 1: 16  bits, 2: 32  bits */
+    DMA_Burst_Size_Type srcBurstSzie;        /*!< Number of data items for burst transaction length. Each item width is as same as tansfer width. 
+                                                 0: 1 item, 1: 4 items, 2: 8 items, 3: 16 items */
+    DMA_Burst_Size_Type dstBurstSzie;        /*!< Number of data items for burst transaction length. Each item width is as same as tansfer width. 
+                                                 0: 1 item, 1: 4 items, 2: 8 items, 3: 16 items */
+    BL_Fun_Type dstAddMode;                  /*!<  */
+    BL_Fun_Type dstMinMode;                  /*!<  */
+    uint8_t fixCnt;                          /*!<  */
+    uint8_t srcAddrInc;                      /*!< Source address increment. 0: No change, 1: Increment */
+    uint8_t destAddrInc;                     /*!< Destination address increment. 0: No change, 1: Increment */
+    DMA_Periph_Req_Type srcPeriph;           /*!< Source peripheral select */
+    DMA_Periph_Req_Type dstPeriph;           /*!< Destination peripheral select */
+}DMA_Channel_Cfg_Type;
+
+/**
+ *  @brief DMA LLI control structure type definition
+ */
+typedef struct {
+    uint32_t srcDmaAddr;                     /*!< Source address of DMA transfer */
+    uint32_t destDmaAddr;                    /*!< Destination address of DMA transfer */
+    uint32_t nextLLI;                        /*!< Next LLI address */
+    struct DMA_Control_Reg dmaCtrl;          /*!< DMA transaction control */
+}DMA_LLI_Ctrl_Type;
+
+/**
+ *  @brief DMA LLI configuration structure type definition
+ */
+typedef struct {
+    DMA_Trans_Dir_Type dir;                  /*!< Transfer dir control. 0: Memory to Memory, 1: Memory to peripheral, 2: Peripheral to memory */
+    DMA_Periph_Req_Type srcPeriph;           /*!< Source peripheral select */
+    DMA_Periph_Req_Type dstPeriph;           /*!< Destination peripheral select */
+}DMA_LLI_Cfg_Type;
+
+/**
+ *  @brief DMA LLI Ping-Pong Buf definition
+ */
+typedef struct {
+    uint8_t idleIndex;                       /*!< Index Idle lliListHeader */
+    uint8_t dmaChan;                         /*!< DMA LLI Channel used */
+    DMA_LLI_Ctrl_Type *lliListHeader[2];     /*!< Ping-Pong BUf List Header */
+    void (* onTransCompleted)(DMA_LLI_Ctrl_Type *);    /*!< Completed Transmit One List Callback Function */
+}DMA_LLI_PP_Buf;
+
+/**
+ *  @brief DMA LLI Ping-Pong Structure definition
+ */
+typedef struct {
+    uint8_t trans_index;                     /*!< Ping or Pong Trigger TC */
+    uint8_t dmaChan;                         /*!< DMA LLI Channel used */
+    struct DMA_Control_Reg dmaCtrlRegVal;    /*!< DMA Basic Pararmeter */
+    DMA_LLI_Cfg_Type *DMA_LLI_Cfg;           /*!< LLI Config parameter */
+    uint32_t operatePeriphAddr;              /*!< Operate Peripheral register address */
+    uint32_t chache_buf_addr[2];             /*!< Ping-Pong structure chache */
+    BL_Fun_Type is_single_mode;              /*!< is Ping-pong running forever or single mode ,if is single mode ping-pong will run only once 
+                                                 after one start */
+}DMA_LLI_PP_Struct;
+
+/*@} end of group DMA_Public_Types */
+
+/** @defgroup  DMA_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  DMA_ENDIAN_TYPE
+ *  @{
+ */
+#define IS_DMA_ENDIAN_TYPE(type)                         (((type) == DMA_LITTLE_ENDIAN ) || \
+                                                          ((type) == DMA_BIG_ENDIAN))
+
+/** @defgroup  DMA_SYNC_LOGIC_TYPE
+ *  @{
+ */
+#define IS_DMA_SYNC_LOGIC_TYPE(type)                     (((type) == DMA_SYNC_LOGIC_ENABLE ) || \
+                                                          ((type) == DMA_SYNC_LOGIC_DISABLE))
+
+/** @defgroup  DMA_TRANS_WIDTH_TYPE
+ *  @{
+ */
+#define IS_DMA_TRANS_WIDTH_TYPE(type)                    (((type) == DMA_TRNS_WIDTH_8BITS ) || \
+                                                          ((type) == DMA_TRNS_WIDTH_16BITS) || \
+                                                          ((type) == DMA_TRNS_WIDTH_32BITS))
+
+/** @defgroup  DMA_TRANS_DIR_TYPE
+ *  @{
+ */
+#define IS_DMA_TRANS_DIR_TYPE(type)                      (((type) == DMA_TRNS_M2M ) || \
+                                                          ((type) == DMA_TRNS_M2P) || \
+                                                          ((type) == DMA_TRNS_P2M) || \
+                                                          ((type) == DMA_TRNS_P2P))
+
+/** @defgroup  DMA_BURST_SIZE_TYPE
+ *  @{
+ */
+#define IS_DMA_BURST_SIZE_TYPE(type)                     (((type) == DMA_BURST_SIZE_1 ) || \
+                                                          ((type) == DMA_BURST_SIZE_4) || \
+                                                          ((type) == DMA_BURST_SIZE_8) || \
+                                                          ((type) == DMA_BURST_SIZE_16))
+
+/** @defgroup  DMA_PERIPH_REQ_TYPE
+ *  @{
+ */
+#define IS_DMA_PERIPH_REQ_TYPE(type)                     (((type) == DMA_REQ_UART0_RX ) || \
+                                                          ((type) == DMA_REQ_UART0_TX) || \
+                                                          ((type) == DMA_REQ_UART1_RX) || \
+                                                          ((type) == DMA_REQ_UART1_TX) || \
+                                                          ((type) == DMA_REQ_I2C_RX ) || \
+                                                          ((type) == DMA_REQ_I2C_TX) || \
+                                                          ((type) == DMA_REQ_SPI_RX ) || \
+                                                          ((type) == DMA_REQ_SPI_TX) || \
+                                                          ((type) == DMA_REQ_I2S_RX ) || \
+                                                          ((type) == DMA_REQ_I2S_TX) || \
+                                                          ((type) == DMA_REQ_GPADC0 ) || \
+                                                          ((type) == DMA_REQ_GPADC1) || \
+                                                          ((type) == DMA_REQ_NONE ))
+
+/** @defgroup  DMA_CHAN_TYPE
+ *  @{
+ */
+#define IS_DMA_CHAN_TYPE(type)                           (((type) == DMA_CH0 ) || \
+                                                          ((type) == DMA_CH1) || \
+                                                          ((type) == DMA_CH2) || \
+                                                          ((type) == DMA_CH3) || \
+                                                          ((type) == DMA_CH4) || \
+                                                          ((type) == DMA_CH5) || \
+                                                          ((type) == DMA_CH6) || \
+                                                          ((type) == DMA_CH7) || \
+                                                          ((type) == DMA_CH_MAX))
+
+/** @defgroup  DMA_LLI_PP_INDEX_TYPE
+ *  @{
+ */
+#define IS_DMA_LLI_PP_INDEX_TYPE(type)                   (((type) == PING_INDEX ) || \
+                                                          ((type) == PONG_INDEX))
+
+/** @defgroup  DMA_INT_TYPE
+ *  @{
+ */
+#define IS_DMA_INT_TYPE(type)                            (((type) == DMA_INT_TCOMPLETED ) || \
+                                                          ((type) == DMA_INT_ERR) || \
+                                                          ((type) == DMA_INT_ALL))
+
+/*@} end of group DMA_Public_Constants */
+
+/** @defgroup  DMA_Public_Macros
+ *  @{
+ */
+#define DMA_PINC_ENABLE         1
+#define DMA_PINC_DISABLE        0
+#define DMA_MINC_ENABLE         1
+#define DMA_MINC_DISABLE        0
+
+/*@} end of group DMA_Public_Macros */
+
+/** @defgroup  DMA_Public_Functions
+ *  @{
+ */
+
+/**
+ *  @brief DMA Functions
+ */
+#ifndef BFLB_USE_HAL_DRIVER
+void DMA_ALL_IRQHandler(void);
+#endif
+void DMA_Enable(void);
+void DMA_Disable(void);
+void DMA_Channel_Init(DMA_Channel_Cfg_Type *chCfg);
+void DMA_Channel_Update_SrcMemcfg(uint8_t ch, uint32_t memAddr, uint32_t len);
+void DMA_Channel_Update_DstMemcfg(uint8_t ch, uint32_t memAddr, uint32_t len);
+uint32_t DMA_Channel_TranferSize(uint8_t ch);
+BL_Sts_Type DMA_Channel_Is_Busy(uint8_t ch);
+void DMA_Channel_Enable(uint8_t ch);
+void DMA_Channel_Disable(uint8_t ch);
+void DMA_LLI_Init(uint8_t ch,DMA_LLI_Cfg_Type *lliCfg);
+void DMA_LLI_Update(uint8_t ch, uint32_t LLI);
+void DMA_IntMask(uint8_t ch,DMA_INT_Type intType, BL_Mask_Type intMask);
+void DMA_LLI_PpBuf_Start_New_Transmit(DMA_LLI_PP_Buf *dmaPpBuf);
+DMA_LLI_Ctrl_Type * DMA_LLI_PpBuf_Remove_Completed_List(DMA_LLI_PP_Buf *dmaPpBuf);
+void DMA_LLI_PpBuf_Append(DMA_LLI_PP_Buf *dmaPpBuf, DMA_LLI_Ctrl_Type *dmaLliList);
+void DMA_LLI_PpBuf_Destroy(DMA_LLI_PP_Buf *dmaPpBuf);
+void DMA_Int_Callback_Install(DMA_Chan_Type dmaChan,DMA_INT_Type intType,intCallback_Type* cbFun);
+void DMA_LLI_PpStruct_Start(DMA_LLI_PP_Struct *dmaPpStruct);
+void DMA_LLI_PpStruct_Stop(DMA_LLI_PP_Struct *dmaPpStruct);
+BL_Err_Type DMA_LLI_PpStruct_Init(DMA_LLI_PP_Struct *dmaPpStruct);
+BL_Err_Type DMA_LLI_PpStruct_Set_Transfer_Len(DMA_LLI_PP_Struct *dmaPpStruct,
+                                              uint16_t Ping_Transfer_len,uint16_t Pong_Transfer_len);
+
+/*@} end of group DMA_Public_Functions */
+
+/*@} end of group DMA */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_DMA_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_ef_ctrl.h b/drivers/bl702_driver/std_drv/inc/bl702_ef_ctrl.h
new file mode 100644
index 00000000..ccc77497
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_ef_ctrl.h
@@ -0,0 +1,322 @@
+/**
+  ******************************************************************************
+  * @file    bl702_ef_ctrl.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_EF_CTRL_H__
+#define __BL702_EF_CTRL_H__
+
+#include "ef_ctrl_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  EF_CTRL
+ *  @{
+ */
+
+/** @defgroup  EF_CTRL_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief Efuse Ctrl key slot type definition
+ */
+typedef enum {
+    EF_CTRL_KEY_SLOT0,                      /*!< key slot 0 */
+    EF_CTRL_KEY_SLOT1,                      /*!< key slot 1 */
+    EF_CTRL_KEY_SLOT2,                      /*!< key slot 2 */
+    EF_CTRL_KEY_SLOT3,                      /*!< key slot 3 */
+    EF_CTRL_KEY_SLOT4,                      /*!< key slot 4 */
+    EF_CTRL_KEY_SLOT5,                      /*!< key slot 5 */
+    EF_CTRL_KEY_MAX,                        /*!<  */
+}EF_Ctrl_Key_Type;
+
+/**
+ *  @brief Efuse Ctrl sign type definition
+ */
+typedef enum {
+    EF_CTRL_SIGN_NONE,                      /*!< no sign */
+    EF_CTRL_SIGN_RSA,                       /*!< use RSA to sign */
+    EF_CTRL_SIGN_ECC,                       /*!< use ECC to sign */
+}EF_Ctrl_Sign_Type;
+
+/**
+ *  @brief Efuse Ctrl flash AES type definition
+ */
+typedef enum {
+    EF_CTRL_SF_AES_NONE,                    /*!< No AES */
+    EF_CTRL_SF_AES_128,                     /*!< AES 128 */
+    EF_CTRL_SF_AES_192,                     /*!< AES 192 */
+    EF_CTRL_SF_AES_256,                     /*!< AES 256 */
+}EF_Ctrl_SF_AES_Type;
+
+/**
+ *  @brief Efuse Ctrl Dbg type definition
+ */
+typedef enum {
+    EF_CTRL_DBG_OPEN = 0,                   /*!< Open debug */
+    EF_CTRL_DBG_PASSWORD,                   /*!< Open debug with password */
+    EF_CTRL_DBG_CLOSE=4,                    /*!< Close debug */
+}EF_Ctrl_Dbg_Mode_Type;
+
+/**
+ *  @brief Efuse Ctrl clock type definition
+ */
+typedef enum {
+    EF_CTRL_EF_CLK,                         /*!< Select efuse clock */
+    EF_CTRL_SAHB_CLK,                       /*!< Select SAHB clock */
+}EF_Ctrl_CLK_Type;
+
+/**
+ *  @brief Efuse Ctrl clock type definition
+ */
+typedef enum {
+    EF_CTRL_PARA_DFT ,                      /*!< Select default cyc parameter */
+    EF_CTRL_PARA_MANUAL,                     /*!< Select manual cyc parameter */
+}EF_Ctrl_CYC_PARA_Type;
+
+/**
+ *  @brief Efuse Ctrl clock type definition
+ */
+typedef enum {
+    EF_CTRL_OP_MODE_AUTO ,                  /*!< Select efuse program auto mode */
+    EF_CTRL_OP_MODE_MANUAL,                 /*!< Select efuse program manual mode */
+}EF_Ctrl_OP_MODE_Type;
+
+/**
+ *  @brief Efuse Ctrl secure configuration structure type definition
+ */
+typedef struct {
+    EF_Ctrl_Dbg_Mode_Type ef_dbg_mode;      /*!< Efuse debug mode */
+    uint8_t ef_dbg_jtag_0_dis;              /*!< Jtag debug disable config value */
+    uint8_t ef_sboot_en;                    /*!< Secure boot enable config value */
+}EF_Ctrl_Sec_Param_Type;
+
+/**
+ *  @brief Efuse analog RC32M trim type definition
+ */
+typedef struct {
+    uint32_t trimRc32mCodeFrExt                      :  8;    /*!< Efuse analog trim:trim_rc32m_code_fr_ext */
+    uint32_t trimRc32mCodeFrExtParity                :  1;    /*!< Efuse analog trim:trim_rc32m_ext_code_en_parity */
+    uint32_t trimRc32mExtCodeEn                      :  1;    /*!< Efuse analog trim:trim_rc32m_ext_code_en */
+    uint32_t reserved                                :  22;    /*!< Efuse analog trim:reserved */
+}Efuse_Ana_RC32M_Trim_Type;
+
+/**
+ *  @brief Efuse analog RC32K trim type definition
+ */
+typedef struct {
+    uint32_t trimRc32kCodeFrExt                      :  10;    /*!< Efuse analog trim:trim_rc32k_code_fr_ext */
+    uint32_t trimRc32kCodeFrExtParity                :  1;    /*!< Efuse analog trim:trim_rc32k_code_fr_ext_parity */
+    uint32_t trimRc32kExtCodeEn                      :  1;    /*!< Efuse analog trim:trim_rc32k_ext_code_en */
+    uint32_t reserved                                :  20;    /*!< Efuse analog trim:reserved */
+}Efuse_Ana_RC32K_Trim_Type;
+
+/**
+ *  @brief Efuse analog TSEN trim type definition
+ */
+typedef struct {
+    uint32_t tsenRefcodeCorner                       :  12;    /*!< TSEN refcode */
+    uint32_t tsenRefcodeCornerParity                 :  1;    /*!< TSEN refcode parity */
+    uint32_t tsenRefcodeCornerEn                     :  1;    /*!< TSEN refcode enable */
+    uint32_t tsenRefcodeCornerVersion                :  1;    /*!< TSEN ATE Version */
+    uint32_t reserved                                :  18;    /*!< TSEN analog trim:reserved */
+}Efuse_TSEN_Refcode_Corner_Type;
+
+/**
+ *  @brief Efuse analog ADC Gain trim type definition
+ */
+typedef struct {
+    uint32_t adcGainCoeff                            :  12;    /*!< ADC gain coeff */
+    uint32_t adcGainCoeffParity                      :  1;    /*!< ADC gain coeff parity */
+    uint32_t adcGainCoeffEn                          :  1;    /*!< ADC gain coeff enable */
+    uint32_t reserved                                :  18;    /*!< ADC gain coeff:reserved */
+}Efuse_ADC_Gain_Coeff_Type;
+
+/**
+ *  @brief Efuse analog device info type definition
+ */
+typedef struct {
+    uint32_t rsvd_21_0                               :  22;    /*!< Reserved */
+    uint32_t sf_swap_cfg                             :  2;    /*!< 0:swap none, 1:swap SF2_CS & SF2_IO2, 2:swap SF2_IO0 & SF2_IO3, 3:swap both */
+    uint32_t psram_cfg                               :  2;    /*!< 0:no psram, 1:2MB psram, 2:external psram, 3:reserved */
+    uint32_t flash_cfg                               :  2;    /*!< 0:external flash SF2, 1:0.5MB flash, 2:1MB flash, 3:external flash SF1 */
+    uint32_t rsvd_29_28                              :  2;    /*!< Reserved */
+    uint32_t pkg_info                                :  2;    /*!< 0:QFN32, 1:QFN40, 2:QFN48, 3:reserved */
+}Efuse_Device_Info_Type;
+
+/**
+ *  @brief Efuse Capcode type definition
+ */
+typedef struct {
+    uint32_t capCode                                 :  6;    /*!< Cap code value */
+    uint32_t parity                                  :  1;    /*!< Parity of capcode */
+    uint32_t en                                      :  1;    /*!< Enable status */
+    uint32_t rsvd                                    : 24;    /*!< Reserved */
+}Efuse_Capcode_Info_Type;
+
+/*@} end of group EF_CTRL_Public_Types */
+
+/** @defgroup  EF_CTRL_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  EF_CTRL_KEY_TYPE
+ *  @{
+ */
+#define IS_EF_CTRL_KEY_TYPE(type)                        (((type) == EF_CTRL_KEY_SLOT0) || \
+                                                          ((type) == EF_CTRL_KEY_SLOT1) || \
+                                                          ((type) == EF_CTRL_KEY_SLOT2) || \
+                                                          ((type) == EF_CTRL_KEY_SLOT3) || \
+                                                          ((type) == EF_CTRL_KEY_SLOT4) || \
+                                                          ((type) == EF_CTRL_KEY_SLOT5) || \
+                                                          ((type) == EF_CTRL_KEY_MAX))
+
+/** @defgroup  EF_CTRL_SIGN_TYPE
+ *  @{
+ */
+#define IS_EF_CTRL_SIGN_TYPE(type)                       (((type) == EF_CTRL_SIGN_NONE) || \
+                                                          ((type) == EF_CTRL_SIGN_RSA) || \
+                                                          ((type) == EF_CTRL_SIGN_ECC))
+
+/** @defgroup  EF_CTRL_SF_AES_TYPE
+ *  @{
+ */
+#define IS_EF_CTRL_SF_AES_TYPE(type)                     (((type) == EF_CTRL_SF_AES_NONE) || \
+                                                          ((type) == EF_CTRL_SF_AES_128) || \
+                                                          ((type) == EF_CTRL_SF_AES_192) || \
+                                                          ((type) == EF_CTRL_SF_AES_256))
+
+/** @defgroup  EF_CTRL_DBG_MODE_TYPE
+ *  @{
+ */
+#define IS_EF_CTRL_DBG_MODE_TYPE(type)                   (((type) == EF_CTRL_DBG_OPEN ) || \
+                                                          ((type) == EF_CTRL_DBG_PASSWORD) || \
+                                                          ((type) == EF_CTRL_DBG_CLOSE))
+
+/** @defgroup  EF_CTRL_CLK_TYPE
+ *  @{
+ */
+#define IS_EF_CTRL_CLK_TYPE(type)                        (((type) == EF_CTRL_EF_CLK) || \
+                                                          ((type) == EF_CTRL_SAHB_CLK))
+
+/** @defgroup  EF_CTRL_CYC_PARA_TYPE
+ *  @{
+ */
+#define IS_EF_CTRL_CYC_PARA_TYPE(type)                   (((type) == EF_CTRL_PARA_DFT ) || \
+                                                          ((type) == EF_CTRL_PARA_MANUAL))
+
+/** @defgroup  EF_CTRL_OP_MODE_TYPE
+ *  @{
+ */
+#define IS_EF_CTRL_OP_MODE_TYPE(type)                    (((type) == EF_CTRL_OP_MODE_AUTO ) || \
+                                                          ((type) == EF_CTRL_OP_MODE_MANUAL))
+
+/*@} end of group EF_CTRL_Public_Constants */
+
+/** @defgroup  EF_CTRL_Public_Macros
+ *  @{
+ */
+#define EF_CTRL_EFUSE_R0_SIZE                           128
+
+/*@} end of group EF_CTRL_Public_Macros */
+
+/** @defgroup  EF_CTRL_Public_Functions
+ *  @{
+ */
+void EF_Ctrl_Load_Efuse_R0(void);
+BL_Sts_Type EF_Ctrl_Busy(void);
+BL_Sts_Type EF_Ctrl_AutoLoad_Done(void);
+void EF_Ctrl_Write_Dbg_Pwd(uint32_t passWdLow, uint32_t passWdHigh,uint8_t program);
+void EF_Ctrl_Read_Dbg_Pwd(uint32_t *passWdLow, uint32_t *passWdHigh);
+void EF_Ctrl_Readlock_Dbg_Pwd(uint8_t program);
+void EF_Ctrl_Writelock_Dbg_Pwd(uint8_t program);
+void EF_Ctrl_Write_Secure_Cfg(EF_Ctrl_Sec_Param_Type *cfg,uint8_t program);
+void EF_Ctrl_Read_Secure_Cfg(EF_Ctrl_Sec_Param_Type *cfg);
+void EF_Ctrl_Write_Secure_Boot(EF_Ctrl_Sign_Type sign[1], EF_Ctrl_SF_AES_Type aes[1],uint8_t program);
+void EF_Ctrl_Read_Secure_Boot(EF_Ctrl_Sign_Type sign[1], EF_Ctrl_SF_AES_Type aes[1]);
+void EF_Ctrl_Read_CPU_Cfg(uint8_t *apDisabled,uint8_t *npDisabled,uint8_t *npCpuType);
+uint8_t EF_Ctrl_Get_Trim_Parity(uint32_t val,uint8_t len);
+void EF_Ctrl_Write_Ana_Trim(uint32_t index, uint32_t trim,uint8_t program);
+void EF_Ctrl_Read_Ana_Trim( uint32_t index, uint32_t *trim);
+void EF_Ctrl_Read_RC32M_Trim( Efuse_Ana_RC32M_Trim_Type *trim);
+void EF_Ctrl_Read_RC32K_Trim( Efuse_Ana_RC32K_Trim_Type *trim);
+void EF_Ctrl_Read_TSEN_Trim( Efuse_TSEN_Refcode_Corner_Type *trim);
+void EF_Ctrl_Read_ADC_Gain_Trim( Efuse_ADC_Gain_Coeff_Type *trim);
+void EF_Ctrl_Write_Sw_Usage(uint32_t index, uint32_t usage,uint8_t program);
+void EF_Ctrl_Read_Sw_Usage( uint32_t index, uint32_t *usage);
+void EF_Ctrl_Writelock_Sw_Usage(uint32_t index, uint8_t program);
+void EF_Ctrl_Write_MAC_Address(uint8_t mac[6],uint8_t program);
+BL_Err_Type EF_Ctrl_Read_MAC_Address(uint8_t mac[8]);
+BL_Err_Type EF_Ctrl_Read_MAC_Address_Raw(uint8_t mac[7]);
+void EF_Ctrl_Writelock_MAC_Address(uint8_t program);
+uint8_t  EF_Ctrl_Is_MAC_Address_Slot_Empty(uint8_t slot,uint8_t reload);
+BL_Err_Type EF_Ctrl_Write_MAC_Address_Opt(uint8_t slot,uint8_t mac[6],uint8_t program);
+BL_Err_Type EF_Ctrl_Read_MAC_Address_Opt(uint8_t slot,uint8_t mac[6],uint8_t reload);
+BL_Err_Type EF_Ctrl_Read_Chip_ID(uint8_t id[8]);
+/*----------*/
+BL_Err_Type EF_Ctrl_Get_Chip_PIDVID(uint16_t pid[1],uint16_t vid[1]);
+BL_Err_Type EF_Ctrl_Get_Customer_PIDVID(uint16_t pid[1],uint16_t vid[1]);
+/*----------*/
+void EF_Ctrl_Read_Device_Info(Efuse_Device_Info_Type *deviceInfo);
+uint8_t  EF_Ctrl_Is_CapCode_Empty(uint8_t reload);
+BL_Err_Type EF_Ctrl_Write_CapCode_Opt(uint8_t code,uint8_t program);
+BL_Err_Type EF_Ctrl_Read_CapCode_Opt(uint8_t *code,uint8_t reload);
+uint8_t  EF_Ctrl_Is_PowerOffset_Slot_Empty(uint8_t slot,uint8_t reload);
+BL_Err_Type EF_Ctrl_Write_PowerOffset_Opt(uint8_t slot,int8_t pwrOffset[3],uint8_t program);
+BL_Err_Type EF_Ctrl_Read_PowerOffset_Opt(uint8_t slot,int8_t pwrOffset[3],uint8_t reload);
+void EF_Ctrl_Write_AES_Key(uint8_t index,uint32_t *keyData,uint32_t len,uint8_t program);
+void EF_Ctrl_Read_AES_Key(uint8_t index,uint32_t *keyData,uint32_t len);
+void EF_Ctrl_Writelock_AES_Key(uint8_t index,uint8_t program);
+void EF_Ctrl_Readlock_AES_Key(uint8_t index,uint8_t program);
+void EF_Ctrl_Program_Direct_R0(uint32_t index, uint32_t *data, uint32_t len);
+void EF_Ctrl_Read_Direct_R0(uint32_t index, uint32_t *data, uint32_t len);
+void EF_Ctrl_Program_Direct(uint32_t index, uint32_t *data, uint32_t len);
+void EF_Ctrl_Read_Direct(uint32_t index, uint32_t *data, uint32_t len);
+void EF_Ctrl_Clear(uint32_t index, uint32_t len);
+void EF_Ctrl_Crc_Enable(void);
+BL_Sts_Type EF_Ctrl_Crc_Is_Busy(void);
+void EF_Ctrl_Crc_Set_Golden(uint32_t goldenValue);
+BL_Err_Type EF_Ctrl_Crc_Result(void);
+void EF_Ctrl_Sw_AHB_Clk_0(void);
+
+/*@} end of group EF_CTRL_Public_Functions */
+
+/*@} end of group EF_CTRL */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_EF_CTRL_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_emac.h b/drivers/bl702_driver/std_drv/inc/bl702_emac.h
new file mode 100644
index 00000000..b24ca3e1
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_emac.h
@@ -0,0 +1,340 @@
+/**
+  ******************************************************************************
+  * @file    bl702_emac.h
+  * @version V1.2
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2018 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_EMAC_H__
+#define __BL702_EMAC_H__
+
+#include "emac_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  EMAC
+ *  @{
+ */
+
+/** @defgroup  EMAC_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief EMAC half/full-duplex type definition
+ */
+typedef enum {
+    EMAC_MODE_HALFDUPLEX,                 /*!< ETH half-duplex */
+    EMAC_MODE_FULLDUPLEX,                 /*!< ETH full-duplex */
+}EMAC_Duplex_Type;
+
+/**
+ *  @brief EMAC speed type definition
+ */
+typedef enum {
+    EMAC_SPEED_10M,                       /*!< ETH speed 10M */
+    EMAC_SPEED_100M,                      /*!< ETH speed 100M */
+}EMAC_Speed_Type;
+
+/**
+ *  @brief EMAC interrupt type definition
+ */
+typedef enum {
+    EMAC_INT_TX_DONE=0x01,                /*!< Transmit one frame done */
+    EMAC_INT_TX_ERROR=0x02,               /*!< Transmit error occur */
+    EMAC_INT_RX_DONE=0x04,                /*!< Receive one frame done */
+    EMAC_INT_RX_ERROR=0x08,               /*!< Receive error occur */
+    EMAC_INT_RX_BUSY=0x10,                /*!< Receive busy due to no free RX buffer Descripter */
+    EMAC_INT_TX_CTRL=0x20,                /*!< Transmit control frame */
+    EMAC_INT_RX_CTRL=0x40,                /*!< Receive control frame */
+    EMAC_INT_ALL = 0x7F,                  /*!<  */
+}EMAC_INT_Type;
+
+typedef enum {
+    EMAC_INT_TX_DONE_IDX=0x0,                /*!< Transmit one frame done */
+    EMAC_INT_TX_ERROR_IDX=0x1,               /*!< Transmit error occur */
+    EMAC_INT_RX_DONE_IDX=0x2,                /*!< Receive one frame done */
+    EMAC_INT_RX_ERROR_IDX=0x3,               /*!< Receive error occur */
+    EMAC_INT_RX_BUSY_IDX=0x4,                /*!< Receive busy due to no free RX buffer Descripter */
+    EMAC_INT_TX_CTRL_IDX=0x5,                /*!< Transmit control frame */
+    EMAC_INT_RX_CTRL_IDX=0x6,                /*!< Receive control frame */
+
+    EMAC_INT_CNT                             /* EMAC INT source count */
+}EMAC_INT_Index;
+
+/**
+ *  @brief EMAC configuration type definition
+ */
+typedef struct {
+    BL_Fun_Type recvSmallFrame;             /*!< Receive small frmae or not */
+    BL_Fun_Type recvHugeFrame;              /*!< Receive huge frmae(>64K bytes) or not */
+    BL_Fun_Type padEnable;                  /*!< Enable padding for frame which is less than MINFL or not */
+    BL_Fun_Type crcEnable;                  /*!< Enable hardware CRC or not */
+    BL_Fun_Type noPreamble;                 /*!< Enable preamble or not */
+    BL_Fun_Type recvBroadCast;              /*!< Receive broadcast frame or not */
+    BL_Fun_Type interFrameGapCheck;         /*!< Check inter frame gap or not */
+    BL_Fun_Type miiNoPreamble;              /*!< Enable MII interface preamble or not */
+    uint8_t miiClkDiv;                      /*!< MII interface clock divider from bus clock */
+    uint8_t maxTxRetry;                     /*!< Maximum tx retry count */
+    uint16_t interFrameGapValue;            /*!< Inter frame gap vaule in clock cycles(default 24),which equals 9.6 us for 10 Mbps and 0.96 us 
+                                                 for 100 Mbps mode */
+    uint16_t minFrameLen;                   /*!< Minimum frame length */
+    uint16_t maxFrameLen;                   /*!< Maximum frame length */
+    uint16_t collisionValid;                /*!< Collision valid value */
+    uint8_t macAddr[6];                     /*!< MAC Address */
+}EMAC_CFG_Type;
+
+/**
+ *  @brief EMAC PHY configuration type definition
+ */
+typedef struct {
+    BL_Fun_Type autoNegotiation;            /*!< Speed and mode auto negotiation */
+    EMAC_Duplex_Type duplex;              /*!< Duplex mode */
+    EMAC_Speed_Type speed;                /*!< Speed mode */
+    uint8_t rsvd;                           /*!< Reserved */
+    uint16_t phyAddress;                    /*!< PHY address */
+}ETHPHY_CFG_Type;
+
+#define BD_TX_CS_POS                     (0)  /*!< Carrier Sense Lost */
+#    define BD_TX_CS_LEN                     (1)
+#define BD_TX_DF_POS                     (1)  /*!< Defer Indication */
+#    define BD_TX_DF_LEN                     (1)
+#define BD_TX_LC_POS                     (2)  /*!< Late Collision */
+#    define BD_TX_LC_LEN                     (1)
+#define BD_TX_RL_POS                     (3)  /*!< Retransmission Limit */
+#    define BD_TX_RL_LEN                     (1)
+#define BD_TX_RTRY_POS                   (4)  /*!< Retry Count */
+#    define BD_TX_RTRY_LEN                   (4)
+#define BD_TX_UR_POS                     (8)  /*!< Underrun */
+#    define BD_TX_UR_LEN                     (1)
+#define BD_TX_CRC_POS                    (11) /*!< CRC Enable */
+#    define BD_TX_CRC_LEN                    (1)
+#define BD_TX_PAD_POS                    (12) /*!< PAD enable */
+#    define BD_TX_PAD_LEN                    (1)
+#define BD_TX_WR_POS                     (13) /*!< Wrap */
+#    define BD_TX_WR_LEN                     (1)
+#define BD_TX_IRQ_POS                    (14) /*!< Interrupt Request Enable */
+#    define BD_TX_IRQ_LEN                    (1)
+#define BD_TX_RD_POS                     (15) /*!< The data buffer is ready for transmission or is currently being transmitted. You are not allowed to change it */
+#    define BD_TX_RD_LEN                     (1)
+#define BD_TX_LEN_POS                    (16) /*!< TX Data buffer length */
+#    define BD_TX_LEN_LEN                    (16)
+
+#define BD_RX_LC_POS                     (0)  /*!< Late Collision */
+#    define BD_RX_LC_LEN                     (1)
+#define BD_RX_CRC_POS                    (1)  /*!< RX CRC Error */
+#    define BD_RX_CRC_LEN                    (1)
+#define BD_RX_SF_POS                     (2)  /*!< Short Frame */
+#    define BD_RX_SF_LEN                     (1)
+#define BD_RX_TL_POS                     (3)  /*!< Too Long */
+#    define BD_RX_TL_LEN                     (1)
+#define BD_RX_DN_POS                     (4)  /*!< Dribble Nibble */
+#    define BD_RX_DN_LEN                     (1)
+#define BD_RX_RE_POS                     (5)  /*!< Receive Error */
+#    define BD_RX_RE_LEN                     (1)
+#define BD_RX_OR_POS                     (6)  /*!< Overrun */
+#    define BD_RX_OR_LEN                     (1)
+#define BD_RX_M_POS                      (7)  /*!< Miss */
+#    define BD_RX_M_LEN                      (1)
+#define BD_RX_CF_POS                     (8)  /*!< Control Frame Received */
+#    define BD_RX_CF_LEN                     (1)
+#define BD_RX_WR_POS                     (13) /*!< Wrap */
+#    define BD_RX_WR_LEN                     (1)
+#define BD_RX_IRQ_POS                    (14) /*!< Interrupt Request Enable */
+#    define BD_RX_IRQ_LEN                    (1)
+#define BD_RX_E_POS                      (15) /*!< The data buffer is empty (and ready for receiving data) or currently receiving data */
+#    define BD_RX_E_LEN                      (1)
+#define BD_RX_LEN_POS                    (16) /*!< RX Data buffer length */
+#    define BD_RX_LEN_LEN                    (16)
+
+#define EMAC_BD_FIELD_MSK(field)         (((1U << BD_##field##_LEN) - 1) << BD_##field##_POS)
+#define EMAC_BD_FIELD_UMSK(field)        (~(((1U << BD_##field##_LEN) - 1) << BD_##field##_POS))
+
+/**
+ *  @brief EMAC TX DMA description type definition
+ */
+/**
+ * Note: Always write DWORD1 (buffer addr) first then DWORD0 for racing concern.
+ */
+typedef struct {
+    uint32_t C_S_L;                         /*!< Buffer Descriptors(BD) control,status,length */
+    uint32_t Buffer;                        /*!< BD buffer address */
+}EMAC_BD_Desc_Type;
+
+/**
+ *  @brief EMAC Handle type definition
+ */
+typedef struct {
+    EMAC_BD_Desc_Type *bd;                /*!< Tx descriptor header pointer */
+    uint8_t txIndexEMAC;                  /*!< TX index: EMAC */
+    uint8_t txIndexCPU;                   /*!< TX index: CPU/SW */
+    uint8_t txBuffLimit;                  /*!< TX index max */
+    uint8_t rsv0;
+    uint8_t rxIndexEMAC;                  /*!< RX index: EMAC */
+    uint8_t rxIndexCPU;                   /*!< RX index: CPU/SW */
+    uint8_t rxBuffLimit;                  /*!< RX index max */
+    uint8_t rsv1;
+}EMAC_Handle_Type;
+
+/*@} end of group EMAC_Public_Types */
+
+/** @defgroup  EMAC_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  EMAC_DUPLEX_TYPE
+ *  @{
+ */
+#define IS_EMAC_DUPLEX_TYPE(type)                      (((type) == EMAC_MODE_HALFDUPLEX) || \
+                                                          ((type) == EMAC_MODE_FULLDUPLEX))
+
+/** @defgroup  EMAC_SPEED_TYPE
+ *  @{
+ */
+#define IS_EMAC_SPEED_TYPE(type)                       (((type) == EMAC_SPEED_10M) || \
+                                                          ((type) == EMAC_SPEED_100M))
+
+/** @defgroup  EMAC_INT_TYPE
+ *  @{
+ */
+#define IS_EMAC_INT_TYPE(type)                         (((type) == EMAC_INT_TX_DONE) || \
+                                                          ((type) == EMAC_INT_TX_ERROR) || \
+                                                          ((type) == EMAC_INT_RX_DONE) || \
+                                                          ((type) == EMAC_INT_RX_ERROR) || \
+                                                          ((type) == EMAC_INT_RX_BUSY) || \
+                                                          ((type) == EMAC_INT_TX_CTRL) || \
+                                                          ((type) == EMAC_INT_RX_CTRL) || \
+                                                          ((type) == EMAC_INT_ALL))
+
+/*@} end of group EMAC_Public_Constants */
+
+/** @defgroup  EMAC_Public_Macros
+ *  @{
+ */
+/* DMA Descriptor offset */
+#define EMAC_DMA_DESC_OFFSET                          0x400
+/* ETH packet size */
+#define ETH_MAX_PACKET_SIZE                             ((uint32_t)1524U)  /*!< ETH_HEADER + ETH_EXTRA + ETH_VLAN_TAG + ETH_MAX_ETH_PAYLOAD + ETH_CRC */
+#define ETH_HEADER_SZIE                                 ((uint32_t)14U)    /*!< 6 byte Dest addr, 6 byte Src addr, 2 byte length/type */
+#define ETH_CRC_SIZE                                    ((uint32_t)4U)     /*!< Ethernet CRC */
+#define ETH_EXTRA_SIZE                                  ((uint32_t)2U)     /*!< Extra bytes in some cases */
+#define ETH_VLAN_TAG_SIZE                               ((uint32_t)4U)     /*!< optional 802.1q VLAN Tag */
+#define ETH_MIN_ETH_PAYLOAD_SIZE                        ((uint32_t)46U)    /*!< Minimum Ethernet payload size */
+#define ETH_MAX_ETH_PAYLOAD_SIZE                        ((uint32_t)1500U)  /*!< Maximum Ethernet payload size */
+#define ETH_JUMBO_FRAME_PAYLOAD_SIZE                    ((uint32_t)9000U)  /*!< Jumbo frame payload size */
+/* DP83848 PHY Address*/
+#define EMAC_PHY_ADDRESS                              0x00U
+#define PHY_LINK_TO                                     ((uint32_t)0x00000FFFU)
+#define PHY_AUTONEGO_COMPLETED_TO                       ((uint32_t)0x00000FFFU)
+/* Section 3: Common PHY Registers */
+#define PHY_BCR                                         ((uint16_t)0x00U)    /*!< Transceiver Basic Control Register   */
+#define PHY_BSR                                         ((uint16_t)0x01U)    /*!< Transceiver Basic Status Register    */
+#    define PHY_BSR_100BASETXFULL                       (1 << 14)
+#    define PHY_BSR_100BASETXHALF                       (1 << 13)
+#    define PHY_BSR_10BASETXFULL                        (1 << 12)
+#    define PHY_BSR_10BASETXHALF                        (1 << 11)
+#define PHY_RESET                                       ((uint16_t)0x8000U)  /*!< PHY Reset */
+#define PHY_LOOPBACK                                    ((uint16_t)0x4000U)  /*!< Select loop-back mode */
+#define PHY_FULLDUPLEX_100M                             ((uint16_t)0x2100U)  /*!< Set the full-duplex mode at 100 Mb/s */
+#define PHY_HALFDUPLEX_100M                             ((uint16_t)0x2000U)  /*!< Set the half-duplex mode at 100 Mb/s */
+#define PHY_FULLDUPLEX_10M                              ((uint16_t)0x0100U)  /*!< Set the full-duplex mode at 10 Mb/s  */
+#define PHY_HALFDUPLEX_10M                              ((uint16_t)0x0000U)  /*!< Set the half-duplex mode at 10 Mb/s  */
+#define PHY_AUTONEGOTIATION                             ((uint16_t)0x1000U)  /*!< Enable auto-negotiation function     */
+#define PHY_RESTART_AUTONEGOTIATION                     ((uint16_t)0x0200U)  /*!< Restart auto-negotiation function    */
+#define PHY_POWERDOWN                                   ((uint16_t)0x0800U)  /*!< Select the power down mode           */
+#define PHY_ISOLATE                                     ((uint16_t)0x0400U)  /*!< Isolate PHY from MII                 */
+#define PHY_AUTONEGO_COMPLETE                           ((uint16_t)0x0020U)  /*!< Auto-Negotiation process completed   */
+#define PHY_LINKED_STATUS                               ((uint16_t)0x0004U)  /*!< Valid link established               */
+#define PHY_JABBER_DETECTION                            ((uint16_t)0x0002U)  /*!< Jabber condition detected            */
+
+#define PHY_PHYID1                                      ((uint16_t)0x02U)    /*!< PHY ID 1    */
+#define PHY_PHYID2                                      ((uint16_t)0x03U)    /*!< PHY ID 2    */
+#define PHY_ADVERTISE                                   ((uint16_t)0x04U)    /*!< Auto-negotiation advertisement       */
+#    define PHY_ADVERTISE_100BASETXFULL                 (1 << 8)
+#    define PHY_ADVERTISE_100BASETXHALF                 (1 << 7)
+#    define PHY_ADVERTISE_10BASETXFULL                  (1 << 6)
+#    define PHY_ADVERTISE_10BASETXHALF                  (1 << 5)
+#    define PHY_ADVERTISE_8023                          (1 << 0)
+#define PHY_LPA                                         ((uint16_t)0x05U)    /*!< Auto-negotiation link partner base page ability    */
+#define PHY_EXPANSION                                   ((uint16_t)0x06U)    /*!< Auto-negotiation expansion           */
+/* Section 4: Extended PHY Registers */
+#define PHY_SR                                          ((uint16_t)0x1FU)    /*!< PHY special control/ status register Offset     */
+#    define PHY_SR_SPEED_OFFSET                         (2)
+#    define PHY_SR_SPEED_MASK                           (0x7 << PHY_SR_SPEED_OFFSET)
+#    define PHY_SR_SPEED_10BASETXHALF                   (0x1 << PHY_SR_SPEED_OFFSET)
+#    define PHY_SR_SPEED_10BASETXFULL                   (0x5 << PHY_SR_SPEED_OFFSET)
+#    define PHY_SR_SPEED_100BASETXHALF                  (0x2 << PHY_SR_SPEED_OFFSET)
+#    define PHY_SR_SPEED_100BASETXFULL                  (0x6 << PHY_SR_SPEED_OFFSET)
+#    define PHY_SR_SPEED_MODE_COMPARE(status, mode)     (!!(mode == (status & PHY_SR_SPEED_MASK)))
+#define PHY_SPEED_STATUS                                ((uint16_t)0x0004U)  /*!< PHY Speed mask                                  */
+#define PHY_DUPLEX_STATUS                               ((uint16_t)0x0010U)  /*!< PHY Duplex mask                                 */
+#define PHY_ISFR                                        ((uint16_t)0x1DU)    /*!< PHY Interrupt Source Flag register Offset       */
+#define PHY_ISFR_INT4                                   ((uint16_t)0x0010U)  /*!< PHY Link down inturrupt                         */
+
+/*@} end of group EMAC_Public_Macros */
+
+/** @defgroup  EMAC_Public_Functions
+ *  @{
+ */
+#ifndef BFLB_USE_HAL_DRIVER
+void EMAC_IRQHandler(void);
+#endif
+BL_Err_Type EMAC_Init(EMAC_CFG_Type *cfg);
+BL_Err_Type EMAC_PhyInit(ETHPHY_CFG_Type *cfg);
+BL_Err_Type EMAC_DeInit(void);
+BL_Err_Type EMAC_DMADescListInit(EMAC_Handle_Type *handle,uint8_t *txBuff, uint32_t txBuffCount,
+                                   uint8_t *rxBuff, uint32_t rxBuffCount);
+BL_Err_Type EMAC_DMATxDescGet(EMAC_Handle_Type *handle,EMAC_BD_Desc_Type **txDMADesc);
+BL_Err_Type EMAC_StartTx(EMAC_Handle_Type *handle,EMAC_BD_Desc_Type *txDMADesc, uint32_t len);
+BL_Err_Type EMAC_Enable(void);
+BL_Err_Type EMAC_Disable(void);
+BL_Err_Type EMAC_IntMask(EMAC_INT_Type intType,BL_Mask_Type intMask);
+BL_Sts_Type EMAC_GetIntStatus(EMAC_INT_Type intType);
+BL_Err_Type EMAC_ClrIntStatus(EMAC_INT_Type intType);
+BL_Err_Type EMAC_Int_Callback_Install(EMAC_INT_Index intIdx, intCallback_Type* cbFun);
+BL_Err_Type EMAC_TxPauseReq(uint16_t timeCount);
+BL_Err_Type EMAC_SetHash(uint32_t hash0,uint32_t hash1);
+BL_Err_Type EMAC_Phy_Read(uint16_t phyReg, uint16_t *regValue);
+BL_Err_Type EMAC_Phy_Write(uint16_t phyReg, uint16_t regValue);
+
+BL_Err_Type EMAC_Enable_TX(void);
+BL_Err_Type EMAC_Disable_TX(void);
+
+/*@} end of group EMAC_Public_Functions */
+
+/*@} end of group EMAC */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_EMAC_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_glb.h b/drivers/bl702_driver/std_drv/inc/bl702_glb.h
new file mode 100644
index 00000000..e2a629d9
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_glb.h
@@ -0,0 +1,723 @@
+/**
+  ******************************************************************************
+  * @file    bl702_glb.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_GLB_H__
+#define __BL702_GLB_H__
+
+#include "glb_reg.h"
+#include "pds_reg.h"
+#include "bl702_gpio.h"
+#include "bl702_l1c.h"
+#include "bl702_hbn.h"
+#include "bl702_sf_ctrl.h"
+#include "bl702_sf_cfg.h"
+#include "bl702_aon.h"
+#include "bl702_ef_ctrl.h"
+#include "bl702_pds.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  GLB
+ *  @{
+ */
+
+/** @defgroup  GLB_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief GLB root clock type definition
+ */
+typedef enum {
+    GLB_ROOT_CLK_RC32M,                     /*!< root clock select RC32M */
+    GLB_ROOT_CLK_XTAL,                      /*!< root clock select XTAL */
+    GLB_ROOT_CLK_DLL,                       /*!< root clock select DLL others, PLL120M not recommend */
+}GLB_ROOT_CLK_Type;
+
+/**
+ *  @brief GLB system clock type definition
+ */
+typedef enum {
+    GLB_SYS_CLK_RC32M,                      /*!< use RC32M as system clock frequency */
+    GLB_SYS_CLK_XTAL,                       /*!< use XTAL as system clock */
+    GLB_SYS_CLK_DLL57P6M,                   /*!< use DLL output 57.6M as system clock */
+    GLB_SYS_CLK_DLL96M,                     /*!< use DLL output 96M as system clock */
+    GLB_SYS_CLK_DLL144M,                    /*!< use DLL output 144M as system clock, PLL120M not recommend */
+}GLB_SYS_CLK_Type;
+
+/**
+ *  @brief GLB CAM clock type definition
+ */
+typedef enum {
+    GLB_CAM_CLK_XCLK,                       /*!< Select XCLK as CAM clock */
+    GLB_CAM_CLK_DLL96M,                     /*!< Select DLL96M as CAM clock */
+}GLB_CAM_CLK_Type;
+
+/**
+ *  @brief GLB I2S output ref clock type definition
+ */
+typedef enum {
+    GLB_I2S_OUT_REF_CLK_NONE,               /*!< no output reference clock on I2S_0 ref_clock port */
+    GLB_I2S_OUT_REF_CLK_SRC,                /*!< output reference clock on I2S_0 ref_clock port */
+}GLB_I2S_OUT_REF_CLK_Type;
+
+/**
+ *  @brief GLB qdec clock type definition
+ */
+typedef enum {
+    GLB_QDEC_CLK_XCLK,                      /*!< Select XCLK as QDEC clock */
+    GLB_QDEC_CLK_F32K,                      /*!< Select f32k as QDEC clock (PDS mode) */
+}GLB_QDEC_CLK_Type;
+
+/**
+ *  @brief GLB DMA clock ID type definition
+ */
+typedef enum {
+    GLB_DMA_CLK_DMA0_CH0,                   /*!< DMA clock ID:channel 0 */
+    GLB_DMA_CLK_DMA0_CH1,                   /*!< DMA clock ID:channel 1 */
+    GLB_DMA_CLK_DMA0_CH2,                   /*!< DMA clock ID:channel 2 */
+    GLB_DMA_CLK_DMA0_CH3,                   /*!< DMA clock ID:channel 3 */
+    GLB_DMA_CLK_DMA0_CH4,                   /*!< DMA clock ID:channel 4 */
+    GLB_DMA_CLK_DMA0_CH5,                   /*!< DMA clock ID:channel 5 */
+    GLB_DMA_CLK_DMA0_CH6,                   /*!< DMA clock ID:channel 6 */
+    GLB_DMA_CLK_DMA0_CH7,                   /*!< DMA clock ID:channel 7 */
+}GLB_DMA_CLK_ID_Type;
+
+/**
+ *  @brief GLB clock source type definition
+ */
+typedef enum {
+    GLB_IR_CLK_SRC_XCLK,                    /*!< IR clock source select XCLK */
+}GLB_IR_CLK_SRC_Type;
+
+/**
+ *  @brief GLB flash clock type definition
+ */
+typedef enum {
+    GLB_SFLASH_CLK_144M,                    /*!< Select 144M as flash clock */
+    GLB_SFLASH_CLK_XCLK,                    /*!< Select XCLK as flash clock */
+    GLB_SFLASH_CLK_57P6M,                   /*!< Select 57.6M as flash clock */
+    GLB_SFLASH_CLK_72M,                     /*!< Select 72M as flash clock */
+    GLB_SFLASH_CLK_BCLK,                    /*!< Select BCLK as flash clock */
+    GLB_SFLASH_CLK_96M,                     /*!< Select 96M as flash clock */
+}GLB_SFLASH_CLK_Type;
+
+/**
+ *  @brief GLB chip clock out type definition
+ */
+typedef enum {
+    GLB_CHIP_CLK_OUT_NONE,                  /*!< no chip clock out */
+    GLB_CHIP_CLK_OUT_I2S_REF_CLK,           /*!< i2s_ref_clk out */
+    GLB_CHIP_CLK_OUT_AUDIO_PLL_CLK,         /*!< audio_pll_clk out */
+    GLB_CHIP_CLK_OUT_XTAL_SOC_32M,          /*!< clk_xtal_soc_32M */
+}GLB_CHIP_CLK_OUT_Type;
+
+/**
+ *  @brief GLB eth ref clock out type definition
+ */
+typedef enum {
+    GLB_ETH_REF_CLK_OUT_OUTSIDE_50M,        /*!< select outside 50MHz RMII ref clock */
+    GLB_ETH_REF_CLK_OUT_INSIDE_50M,         /*!< select inside 50MHz RMII ref clock */
+}GLB_ETH_REF_CLK_OUT_Type;
+
+/**
+ *  @brief GLB SPI pad action type definition
+ */
+typedef enum {
+    GLB_SPI_PAD_ACT_AS_SLAVE,               /*!< SPI pad act as slave */
+    GLB_SPI_PAD_ACT_AS_MASTER,              /*!< SPI pad act as master */
+}GLB_SPI_PAD_ACT_AS_Type;
+
+/**
+ *  @brief GLB PKA clock type definition
+ */
+typedef enum {
+    GLB_PKA_CLK_HCLK,                       /*!< Select HCLK as PKA clock */
+    GLB_PKA_CLK_DLL96M,                     /*!< Select DLL 96M as PKA clock */
+}GLB_PKA_CLK_Type;
+
+/**
+ *  @brief BMX arb mode type definition
+ */
+typedef enum {
+    BMX_ARB_FIX,                            /*!< 0->fix */
+    BMX_ARB_ROUND_ROBIN,                    /*!< 2->round-robin */
+    BMX_ARB_RANDOM,                         /*!< 3->random */
+}BMX_ARB_Type;
+
+/**
+ *  @brief BMX configuration structure type definition
+ */
+typedef struct {
+    uint8_t timeoutEn;                      /*!< Bus timeout enable: detect slave no reaponse in 1024 cycles */
+    BL_Fun_Type errEn;                      /*!< Bus error response enable */
+    BMX_ARB_Type arbMod;                    /*!< 0->fix, 2->round-robin, 3->random */
+}BMX_Cfg_Type;
+
+/**
+ *  @brief BMX bus err type definition
+ */
+typedef enum {
+    BMX_BUS_ERR_TRUSTZONE_DECODE,           /*!< Bus trustzone decode error */
+    BMX_BUS_ERR_ADDR_DECODE,                /*!< Bus addr decode error */
+}BMX_BUS_ERR_Type;
+
+/**
+ *  @brief BMX bus err interrupt type definition
+ */
+typedef enum {
+    BMX_ERR_INT_ERR,                        /*!< BMX bus err interrupt */
+    BMX_ERR_INT_ALL,                        /*!< BMX bus err interrupt max num */
+}BMX_ERR_INT_Type;
+
+/**
+ *  @brief BMX time out interrupt type definition
+ */
+typedef enum {
+    BMX_TO_INT_TIMEOUT,                     /*!< BMX timeout interrupt */
+    BMX_TO_INT_ALL,                         /*!< BMX timeout interrupt max num */
+}BMX_TO_INT_Type;
+
+/**
+ *  @brief GLB EM type definition
+ */
+typedef enum {
+    GLB_EM_0KB=0x0,                         /*!< 0x0 --> 0KB */
+    GLB_EM_8KB=0x3,                         /*!< 0x3 --> 8KB */
+    GLB_EM_16KB=0xF,                        /*!< 0xF --> 16KB */
+}GLB_EM_Type;
+
+/**
+ *  @brief GLB EMAC and CAM pin type definition
+ */
+typedef enum {
+    GLB_EMAC_CAM_PIN_EMAC,                  /*!< select pin as emac */
+    GLB_EMAC_CAM_PIN_CAM,                   /*!< select pin as cam */
+}GLB_EMAC_CAM_PIN_Type;
+
+/**
+ *  @brief GLB RTC clock type definition
+ */
+typedef enum {
+    GLB_MTIMER_CLK_BCLK,                    /*!< BUS clock */
+    GLB_MTIMER_CLK_32K,                     /*!< 32KHz */
+}GLB_MTIMER_CLK_Type;
+
+/**
+ *  @brief GLB ADC clock type definition
+ */
+typedef enum {
+    GLB_ADC_CLK_AUDIO_PLL,                  /*!< use Audio PLL as ADC clock */
+    GLB_ADC_CLK_XCLK,                       /*!< use XCLK as ADC clock */
+}GLB_ADC_CLK_Type;
+
+/**
+ *  @brief GLB DAC clock type definition
+ */
+typedef enum {
+    GLB_DAC_CLK_PLL_32M,                    /*!< select PLL 32M as DAC clock source */
+    GLB_DAC_CLK_XCLK,                       /*!< select XCLK as DAC clock source */
+    GLB_DAC_CLK_AUDIO_PLL,                  /*!< select Audio PLL as DAC clock source */
+}GLB_DAC_CLK_Type;
+
+/**
+ *  @brief GLB DIG clock source select type definition
+ */
+typedef enum {
+    GLB_DIG_CLK_PLL_32M,                    /*!< select PLL 32M as DIG clock source */
+    GLB_DIG_CLK_XCLK,                       /*!< select XCLK as DIG clock source */
+    GLB_DIG_CLK_AUDIO_PLL,                  /*!< select Audio PLL as DIG clock source */
+}GLB_DIG_CLK_Type;
+
+/**
+ *  @brief GLB BT bandwidth type definition
+ */
+typedef enum {
+    GLB_BT_BANDWIDTH_1M,                    /*!< BT bandwidth 1MHz */
+    GLB_BT_BANDWIDTH_2M,                    /*!< BT bandwidth 2MHz */
+}GLB_BT_BANDWIDTH_Type;
+
+/**
+ *  @brief GLB UART signal type definition
+ */
+typedef enum {
+    GLB_UART_SIG_0,                         /*!< UART signal 0 */
+    GLB_UART_SIG_1,                         /*!< UART signal 1 */
+    GLB_UART_SIG_2,                         /*!< UART signal 2 */
+    GLB_UART_SIG_3,                         /*!< UART signal 3 */
+    GLB_UART_SIG_4,                         /*!< UART signal 4 */
+    GLB_UART_SIG_5,                         /*!< UART signal 5 */
+    GLB_UART_SIG_6,                         /*!< UART signal 6 */
+    GLB_UART_SIG_7,                         /*!< UART signal 7 */
+}GLB_UART_SIG_Type;
+
+/**
+ *  @brief GLB UART signal  function type definition
+ */
+typedef enum {
+    GLB_UART_SIG_FUN_UART0_RTS,             /*!< UART funtion: UART 0 RTS */
+    GLB_UART_SIG_FUN_UART0_CTS,             /*!< UART funtion: UART 0 CTS */
+    GLB_UART_SIG_FUN_UART0_TXD,             /*!< UART funtion: UART 0 TXD */
+    GLB_UART_SIG_FUN_UART0_RXD,             /*!< UART funtion: UART 0 RXD */
+    GLB_UART_SIG_FUN_UART1_RTS,             /*!< UART funtion: UART 1 RTS */
+    GLB_UART_SIG_FUN_UART1_CTS,             /*!< UART funtion: UART 1 CTS */
+    GLB_UART_SIG_FUN_UART1_TXD,             /*!< UART funtion: UART 1 TXD */
+    GLB_UART_SIG_FUN_UART1_RXD,             /*!< UART funtion: UART 1 RXD */
+}GLB_UART_SIG_FUN_Type;
+
+/**
+ *  @brief GLB DLL output clock type definition
+ */
+typedef enum {
+    GLB_DLL_CLK_57P6M,                      /*!< DLL output 57P6M clock */
+    GLB_DLL_CLK_96M,                        /*!< DLL output 96M clock */
+    GLB_DLL_CLK_144M,                       /*!< DLL output 144M clock */
+    GLB_DLL_CLK_288M,                       /*!< DLL output 288M clock */
+    GLB_DLL_CLK_MMDIV,                      /*!< DLL output mmdiv clock */
+}GLB_DLL_CLK_Type;
+
+/**
+ *  @brief GLB GPIO interrupt trigger mode type definition
+ */
+typedef enum {
+    GLB_GPIO_INT_TRIG_NEG_PULSE,            /*!< GPIO negedge pulse trigger interrupt */
+    GLB_GPIO_INT_TRIG_POS_PULSE,            /*!< GPIO posedge pulse trigger interrupt */
+    GLB_GPIO_INT_TRIG_NEG_LEVEL,            /*!< GPIO negedge level trigger interrupt (32k 3T) */
+    GLB_GPIO_INT_TRIG_POS_LEVEL,            /*!< GPIO posedge level trigger interrupt (32k 3T) */
+}GLB_GPIO_INT_TRIG_Type;
+
+/**
+ *  @brief GLB GPIO interrupt control mode type definition
+ */
+typedef enum {
+    GLB_GPIO_INT_CONTROL_SYNC,              /*!< GPIO interrupt sync mode */
+    GLB_GPIO_INT_CONTROL_ASYNC,             /*!< GPIO interrupt async mode */
+}GLB_GPIO_INT_CONTROL_Type;
+
+/**
+ *  @brief PLL XTAL type definition
+ */
+typedef enum {
+    GLB_DLL_XTAL_NONE,                      /*!< XTAL is none */
+    GLB_DLL_XTAL_32M,                       /*!< XTAL is 32M */
+    GLB_DLL_XTAL_RC32M,                     /*!< XTAL is RC32M */
+}GLB_DLL_XTAL_Type;
+
+/*@} end of group GLB_Public_Types */
+
+/** @defgroup  GLB_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  GLB_ROOT_CLK_TYPE
+ *  @{
+ */
+#define IS_GLB_ROOT_CLK_TYPE(type)                       (((type) == GLB_ROOT_CLK_RC32M) || \
+                                                          ((type) == GLB_ROOT_CLK_XTAL) || \
+                                                          ((type) == GLB_ROOT_CLK_DLL))
+
+/** @defgroup  GLB_SYS_CLK_TYPE
+ *  @{
+ */
+#define IS_GLB_SYS_CLK_TYPE(type)                        (((type) == GLB_SYS_CLK_RC32M) || \
+                                                          ((type) == GLB_SYS_CLK_XTAL) || \
+                                                          ((type) == GLB_SYS_CLK_DLL57P6M) || \
+                                                          ((type) == GLB_SYS_CLK_DLL96M) || \
+                                                          ((type) == GLB_SYS_CLK_DLL144M))
+
+/** @defgroup  GLB_CAM_CLK_TYPE
+ *  @{
+ */
+#define IS_GLB_CAM_CLK_TYPE(type)                        (((type) == GLB_CAM_CLK_XCLK) || \
+                                                          ((type) == GLB_CAM_CLK_DLL96M))
+
+/** @defgroup  GLB_I2S_OUT_REF_CLK_TYPE
+ *  @{
+ */
+#define IS_GLB_I2S_OUT_REF_CLK_TYPE(type)                (((type) == GLB_I2S_OUT_REF_CLK_NONE) || \
+                                                          ((type) == GLB_I2S_OUT_REF_CLK_SRC))
+
+/** @defgroup  GLB_QDEC_CLK_TYPE
+ *  @{
+ */
+#define IS_GLB_QDEC_CLK_TYPE(type)                       (((type) == GLB_QDEC_CLK_XCLK) || \
+                                                          ((type) == GLB_QDEC_CLK_F32K))
+
+/** @defgroup  GLB_DMA_CLK_ID_TYPE
+ *  @{
+ */
+#define IS_GLB_DMA_CLK_ID_TYPE(type)                     (((type) == GLB_DMA_CLK_DMA0_CH0) || \
+                                                          ((type) == GLB_DMA_CLK_DMA0_CH1) || \
+                                                          ((type) == GLB_DMA_CLK_DMA0_CH2) || \
+                                                          ((type) == GLB_DMA_CLK_DMA0_CH3) || \
+                                                          ((type) == GLB_DMA_CLK_DMA0_CH4) || \
+                                                          ((type) == GLB_DMA_CLK_DMA0_CH5) || \
+                                                          ((type) == GLB_DMA_CLK_DMA0_CH6) || \
+                                                          ((type) == GLB_DMA_CLK_DMA0_CH7))
+
+/** @defgroup  GLB_IR_CLK_SRC_TYPE
+ *  @{
+ */
+#define IS_GLB_IR_CLK_SRC_TYPE(type)                     (((type) == GLB_IR_CLK_SRC_XCLK))
+
+/** @defgroup  GLB_SFLASH_CLK_TYPE
+ *  @{
+ */
+#define IS_GLB_SFLASH_CLK_TYPE(type)                     (((type) == GLB_SFLASH_CLK_144M) || \
+                                                          ((type) == GLB_SFLASH_CLK_XCLK) || \
+                                                          ((type) == GLB_SFLASH_CLK_57P6M) || \
+                                                          ((type) == GLB_SFLASH_CLK_72M) || \
+                                                          ((type) == GLB_SFLASH_CLK_BCLK) || \
+                                                          ((type) == GLB_SFLASH_CLK_96M))
+
+/** @defgroup  GLB_CHIP_CLK_OUT_TYPE
+ *  @{
+ */
+#define IS_GLB_CHIP_CLK_OUT_TYPE(type)                   (((type) == GLB_CHIP_CLK_OUT_NONE) || \
+                                                          ((type) == GLB_CHIP_CLK_OUT_I2S_REF_CLK) || \
+                                                          ((type) == GLB_CHIP_CLK_OUT_AUDIO_PLL_CLK) || \
+                                                          ((type) == GLB_CHIP_CLK_OUT_XTAL_SOC_32M))
+
+/** @defgroup  GLB_ETH_REF_CLK_OUT_TYPE
+ *  @{
+ */
+#define IS_GLB_ETH_REF_CLK_OUT_TYPE(type)                (((type) == GLB_ETH_REF_CLK_OUT_OUTSIDE_50M) || \
+                                                          ((type) == GLB_ETH_REF_CLK_OUT_INSIDE_50M))
+
+/** @defgroup  GLB_SPI_PAD_ACT_AS_TYPE
+ *  @{
+ */
+#define IS_GLB_SPI_PAD_ACT_AS_TYPE(type)                 (((type) == GLB_SPI_PAD_ACT_AS_SLAVE) || \
+                                                          ((type) == GLB_SPI_PAD_ACT_AS_MASTER))
+
+/** @defgroup  GLB_PKA_CLK_TYPE
+ *  @{
+ */
+#define IS_GLB_PKA_CLK_TYPE(type)                        (((type) == GLB_PKA_CLK_HCLK) || \
+                                                          ((type) == GLB_PKA_CLK_DLL96M))
+
+/** @defgroup  BMX_ARB_TYPE
+ *  @{
+ */
+#define IS_BMX_ARB_TYPE(type)                            (((type) == BMX_ARB_FIX) || \
+                                                          ((type) == BMX_ARB_ROUND_ROBIN) || \
+                                                          ((type) == BMX_ARB_RANDOM))
+
+/** @defgroup  BMX_BUS_ERR_TYPE
+ *  @{
+ */
+#define IS_BMX_BUS_ERR_TYPE(type)                        (((type) == BMX_BUS_ERR_TRUSTZONE_DECODE) || \
+                                                          ((type) == BMX_BUS_ERR_ADDR_DECODE))
+
+/** @defgroup  BMX_ERR_INT_TYPE
+ *  @{
+ */
+#define IS_BMX_ERR_INT_TYPE(type)                        (((type) == BMX_ERR_INT_ERR) || \
+                                                          ((type) == BMX_ERR_INT_ALL))
+
+/** @defgroup  BMX_TO_INT_TYPE
+ *  @{
+ */
+#define IS_BMX_TO_INT_TYPE(type)                         (((type) == BMX_TO_INT_TIMEOUT) || \
+                                                          ((type) == BMX_TO_INT_ALL))
+
+/** @defgroup  GLB_EM_TYPE
+ *  @{
+ */
+#define IS_GLB_EM_TYPE(type)                             (((type) == GLB_EM_0KB) || \
+                                                          ((type) == GLB_EM_8KB) || \
+                                                          ((type) == GLB_EM_16KB))
+
+/** @defgroup  GLB_EMAC_CAM_PIN_TYPE
+ *  @{
+ */
+#define IS_GLB_EMAC_CAM_PIN_TYPE(type)                   (((type) == GLB_EMAC_CAM_PIN_EMAC) || \
+                                                          ((type) == GLB_EMAC_CAM_PIN_CAM))
+
+/** @defgroup  GLB_MTIMER_CLK_TYPE
+ *  @{
+ */
+#define IS_GLB_MTIMER_CLK_TYPE(type)                     (((type) == GLB_MTIMER_CLK_BCLK) || \
+                                                          ((type) == GLB_MTIMER_CLK_32K))
+
+/** @defgroup  GLB_ADC_CLK_TYPE
+ *  @{
+ */
+#define IS_GLB_ADC_CLK_TYPE(type)                        (((type) == GLB_ADC_CLK_AUDIO_PLL) || \
+                                                          ((type) == GLB_ADC_CLK_XCLK))
+
+/** @defgroup  GLB_DAC_CLK_TYPE
+ *  @{
+ */
+#define IS_GLB_DAC_CLK_TYPE(type)                        (((type) == GLB_DAC_CLK_PLL_32M) || \
+                                                          ((type) == GLB_DAC_CLK_XCLK) || \
+                                                          ((type) == GLB_DAC_CLK_AUDIO_PLL))
+
+/** @defgroup  GLB_DIG_CLK_TYPE
+ *  @{
+ */
+#define IS_GLB_DIG_CLK_TYPE(type)                        (((type) == GLB_DIG_CLK_PLL_32M) || \
+                                                          ((type) == GLB_DIG_CLK_XCLK) || \
+                                                          ((type) == GLB_DIG_CLK_AUDIO_PLL))
+
+/** @defgroup  GLB_BT_BANDWIDTH_TYPE
+ *  @{
+ */
+#define IS_GLB_BT_BANDWIDTH_TYPE(type)                   (((type) == GLB_BT_BANDWIDTH_1M) || \
+                                                          ((type) == GLB_BT_BANDWIDTH_2M))
+
+/** @defgroup  GLB_UART_SIG_TYPE
+ *  @{
+ */
+#define IS_GLB_UART_SIG_TYPE(type)                       (((type) == GLB_UART_SIG_0) || \
+                                                          ((type) == GLB_UART_SIG_1) || \
+                                                          ((type) == GLB_UART_SIG_2) || \
+                                                          ((type) == GLB_UART_SIG_3) || \
+                                                          ((type) == GLB_UART_SIG_4) || \
+                                                          ((type) == GLB_UART_SIG_5) || \
+                                                          ((type) == GLB_UART_SIG_6) || \
+                                                          ((type) == GLB_UART_SIG_7))
+
+/** @defgroup  GLB_UART_SIG_FUN_TYPE
+ *  @{
+ */
+#define IS_GLB_UART_SIG_FUN_TYPE(type)                   (((type) == GLB_UART_SIG_FUN_UART0_RTS) || \
+                                                          ((type) == GLB_UART_SIG_FUN_UART0_CTS) || \
+                                                          ((type) == GLB_UART_SIG_FUN_UART0_TXD) || \
+                                                          ((type) == GLB_UART_SIG_FUN_UART0_RXD) || \
+                                                          ((type) == GLB_UART_SIG_FUN_UART1_RTS) || \
+                                                          ((type) == GLB_UART_SIG_FUN_UART1_CTS) || \
+                                                          ((type) == GLB_UART_SIG_FUN_UART1_TXD) || \
+                                                          ((type) == GLB_UART_SIG_FUN_UART1_RXD))
+
+/** @defgroup  GLB_DLL_CLK_TYPE
+ *  @{
+ */
+#define IS_GLB_DLL_CLK_TYPE(type)                        (((type) == GLB_DLL_CLK_57P6M) || \
+                                                          ((type) == GLB_DLL_CLK_96M) || \
+                                                          ((type) == GLB_DLL_CLK_144M) || \
+                                                          ((type) == GLB_DLL_CLK_288M) || \
+                                                          ((type) == GLB_DLL_CLK_MMDIV))
+
+/** @defgroup  GLB_GPIO_INT_TRIG_TYPE
+ *  @{
+ */
+#define IS_GLB_GPIO_INT_TRIG_TYPE(type)                  (((type) == GLB_GPIO_INT_TRIG_NEG_PULSE) || \
+                                                          ((type) == GLB_GPIO_INT_TRIG_POS_PULSE) || \
+                                                          ((type) == GLB_GPIO_INT_TRIG_NEG_LEVEL) || \
+                                                          ((type) == GLB_GPIO_INT_TRIG_POS_LEVEL))
+
+/** @defgroup  GLB_GPIO_INT_CONTROL_TYPE
+ *  @{
+ */
+#define IS_GLB_GPIO_INT_CONTROL_TYPE(type)               (((type) == GLB_GPIO_INT_CONTROL_SYNC) || \
+                                                          ((type) == GLB_GPIO_INT_CONTROL_ASYNC))
+
+/** @defgroup  GLB_DLL_XTAL_TYPE
+ *  @{
+ */
+#define IS_GLB_DLL_XTAL_TYPE(type)                       (((type) == GLB_DLL_XTAL_NONE) || \
+                                                          ((type) == GLB_DLL_XTAL_32M) || \
+                                                          ((type) == GLB_DLL_XTAL_RC32M))
+
+/*@} end of group GLB_Public_Constants */
+
+/** @defgroup  GLB_Public_Macros
+ *  @{
+ */
+#define UART_SIG_SWAP_GPIO0_GPIO7            0x01    /* GPIO0-7   uart_sig[0:7] -> uart_sig[4:7], uart_sig[0:3] */
+#define UART_SIG_SWAP_GPIO8_GPIO15           0x02    /* GPIO8-15  uart_sig[0:7] -> uart_sig[4:7], uart_sig[0:3] */
+#define UART_SIG_SWAP_GPIO16_GPIO22          0x04    /* GPIO16-22 uart_sig[0:7] -> uart_sig[4:7], uart_sig[0:3] */
+#define UART_SIG_SWAP_NONE                   0x00    /* GPIO0-22  uart_sig[0:7] <- uart_sig[4:7], uart_sig[0:3] */
+#define JTAG_SIG_SWAP_GPIO0_GPIO3            0x01    /* GPIO0-3   E21_TMS/E21_TDI/E21_TCK/E21_TDO -> E21_TCK/E21_TDO/E21_TMS/E21_TDI */
+#define JTAG_SIG_SWAP_GPIO4_GPIO7            0x02    /* GPIO4-7   E21_TMS/E21_TDI/E21_TCK/E21_TDO -> E21_TCK/E21_TDO/E21_TMS/E21_TDI */
+#define JTAG_SIG_SWAP_GPIO8_GPIO11           0x04    /* GPIO8-11  E21_TMS/E21_TDI/E21_TCK/E21_TDO -> E21_TCK/E21_TDO/E21_TMS/E21_TDI */
+#define JTAG_SIG_SWAP_GPIO12_GPIO15          0x08    /* GPIO12-15 E21_TMS/E21_TDI/E21_TCK/E21_TDO -> E21_TCK/E21_TDO/E21_TMS/E21_TDI */
+#define JTAG_SIG_SWAP_GPIO16_GPIO19          0x10    /* GPIO16-19 E21_TMS/E21_TDI/E21_TCK/E21_TDO -> E21_TCK/E21_TDO/E21_TMS/E21_TDI */
+#define JTAG_SIG_SWAP_GPIO20_GPIO22          0x20    /* GPIO20-22 E21_TMS/E21_TDI/E21_TCK/E21_TDO -> E21_TCK/E21_TDO/E21_TMS/E21_TDI */
+#define JTAG_SIG_SWAP_NONE                   0x00    /* GPIO0-22  E21_TMS/E21_TDI/E21_TCK/E21_TDO <- E21_TCK/E21_TDO/E21_TMS/E21_TDI */
+
+/*@} end of group GLB_Public_Macros */
+
+/** @defgroup  GLB_Public_Functions
+ *  @{
+ */
+/*----------*/
+#ifndef BFLB_USE_HAL_DRIVER
+void BMX_ERR_IRQHandler(void);
+void BMX_TO_IRQHandler(void);
+void GPIO_INT0_IRQHandler(void);
+#endif
+/*----------*/
+GLB_ROOT_CLK_Type GLB_Get_Root_CLK_Sel(void);
+BL_Err_Type GLB_Set_System_CLK_Div(uint8_t hclkDiv,uint8_t bclkDiv);
+uint8_t GLB_Get_BCLK_Div(void);
+uint8_t GLB_Get_HCLK_Div(void);
+BL_Err_Type Update_SystemCoreClockWith_XTAL(GLB_DLL_XTAL_Type xtalType);
+BL_Err_Type GLB_Set_System_CLK(GLB_DLL_XTAL_Type xtalType,GLB_SYS_CLK_Type clkFreq);
+BL_Err_Type System_Core_Clock_Update_From_RC32M(void);
+/*----------*/
+BL_Err_Type GLB_Set_CAM_CLK(uint8_t enable,GLB_CAM_CLK_Type clkSel,uint8_t div);
+BL_Err_Type GLB_Set_MAC154_ZIGBEE_CLK(uint8_t enable);
+BL_Err_Type GLB_Set_BLE_CLK(uint8_t enable);
+BL_Err_Type GLB_Set_I2S_CLK(uint8_t enable,GLB_I2S_OUT_REF_CLK_Type outRef);
+BL_Err_Type GLB_Set_USB_CLK(uint8_t enable);
+BL_Err_Type GLB_Set_QDEC_CLK(GLB_QDEC_CLK_Type clkSel,uint8_t div);
+/*----------*/
+BL_Err_Type GLB_Set_DMA_CLK(uint8_t enable,GLB_DMA_CLK_ID_Type clk);
+BL_Err_Type GLB_Set_IR_CLK(uint8_t enable,GLB_IR_CLK_SRC_Type clkSel,uint8_t div);
+BL_Err_Type GLB_Set_SF_CLK(uint8_t enable,GLB_SFLASH_CLK_Type clkSel,uint8_t div);
+BL_Err_Type GLB_Set_UART_CLK(uint8_t enable,HBN_UART_CLK_Type clkSel,uint8_t div);
+/*----------*/
+BL_Err_Type GLB_Set_Chip_Out_0_CLK_Sel(GLB_CHIP_CLK_OUT_Type clkSel);
+BL_Err_Type GLB_Set_Chip_Out_1_CLK_Sel(GLB_CHIP_CLK_OUT_Type clkSel);
+BL_Err_Type GLB_Set_I2C_CLK(uint8_t enable,uint8_t div);
+BL_Err_Type GLB_Invert_ETH_RX_CLK(uint8_t enable);
+BL_Err_Type GLB_Invert_RF_TEST_O_CLK(uint8_t enable);
+BL_Err_Type GLB_Set_SPI_CLK(uint8_t enable,uint8_t div);
+BL_Err_Type GLB_Invert_ETH_TX_CLK(uint8_t enable);
+BL_Err_Type GLB_Invert_ETH_REF_O_CLK(uint8_t enable);
+BL_Err_Type GLB_Set_ETH_REF_O_CLK_Sel(GLB_ETH_REF_CLK_OUT_Type clkSel);
+/*----------*/
+BL_Err_Type GLB_Set_PKA_CLK_Sel(GLB_PKA_CLK_Type clkSel);
+BL_Err_Type GLB_SW_System_Reset(void);
+BL_Err_Type GLB_SW_CPU_Reset(void);
+BL_Err_Type GLB_SW_POR_Reset(void);
+BL_Err_Type GLB_AHB_Slave1_Reset(BL_AHB_Slave1_Type slave1);
+BL_Err_Type GLB_AHB_Slave1_Clock_Gate(uint8_t enable,BL_AHB_Slave1_Type slave1);
+/*----------*/
+BL_Err_Type GLB_BMX_Init(BMX_Cfg_Type *BmxCfg);
+BL_Err_Type GLB_BMX_Addr_Monitor_Enable(void);
+BL_Err_Type GLB_BMX_Addr_Monitor_Disable(void);
+BL_Err_Type GLB_BMX_BusErrResponse_Enable(void);
+BL_Err_Type GLB_BMX_BusErrResponse_Disable(void);
+BL_Sts_Type GLB_BMX_Get_Status(BMX_BUS_ERR_Type errType);
+uint32_t GLB_BMX_Get_Err_Addr(void);
+BL_Err_Type BMX_ERR_INT_Callback_Install(BMX_ERR_INT_Type intType,intCallback_Type* cbFun);
+BL_Err_Type BMX_TIMEOUT_INT_Callback_Install(BMX_TO_INT_Type intType,intCallback_Type* cbFun);
+/*----------*/
+BL_Err_Type GLB_Set_SRAM_RET(uint32_t value);
+uint32_t GLB_Get_SRAM_RET(void);
+BL_Err_Type GLB_Set_SRAM_SLP(uint32_t value);
+uint32_t GLB_Get_SRAM_SLP(void);
+BL_Err_Type GLB_Set_SRAM_PARM(uint32_t value);
+uint32_t GLB_Get_SRAM_PARM(void);
+/*----------*/
+BL_Err_Type GLB_Set_EM_Sel(GLB_EM_Type emType);
+/*----------*/
+BL_Err_Type GLB_SWAP_EMAC_CAM_Pin(GLB_EMAC_CAM_PIN_Type pinType);
+BL_Err_Type GLB_Set_Ext_Rst_Smt(uint8_t enable);
+BL_Err_Type GLB_Set_Kys_Drv_Col(uint8_t enable);
+BL_Err_Type GLB_UART_Sig_Swap_Set(uint8_t swapSel);
+BL_Err_Type GLB_JTAG_Sig_Swap_Set(uint8_t swapSel);
+BL_Err_Type GLB_CCI_Use_IO_0_1_2_7(uint8_t enable);
+BL_Err_Type GLB_CCI_Use_Jtag_Pin(uint8_t enable);
+BL_Err_Type GLB_Swap_SPI_0_MOSI_With_MISO(BL_Fun_Type newState);
+BL_Err_Type GLB_Set_SPI_0_ACT_MOD_Sel(GLB_SPI_PAD_ACT_AS_Type mod);
+BL_Err_Type GLB_Select_Internal_Flash(void);
+BL_Err_Type GLB_Select_External_Flash(void);
+BL_Err_Type GLB_Deswap_Flash_Pin(void);
+BL_Err_Type GLB_Swap_Flash_CS_IO2_Pin();
+BL_Err_Type GLB_Swap_Flash_IO0_IO3_Pin();
+BL_Err_Type GLB_Swap_Flash_Pin(void);
+BL_Err_Type GLB_Select_Internal_PSram(void);
+/*----------*/
+BL_Err_Type GLB_Set_PDM_CLK(uint8_t enable,uint8_t div);
+/*----------*/
+BL_Err_Type GLB_Set_MTimer_CLK(uint8_t enable,GLB_MTIMER_CLK_Type clkSel,uint32_t div);
+/*----------*/
+BL_Err_Type GLB_Set_ADC_CLK(uint8_t enable,GLB_ADC_CLK_Type clkSel,uint8_t div);
+BL_Err_Type GLB_Set_DAC_CLK(uint8_t enable,GLB_DAC_CLK_Type clkSel,uint8_t div);
+/*----------*/
+BL_Err_Type GLB_Set_DIG_CLK_Sel(GLB_DIG_CLK_Type clkSel);
+BL_Err_Type GLB_Set_DIG_512K_CLK(uint8_t enable,uint8_t compensation,uint8_t div);
+BL_Err_Type GLB_Set_DIG_32K_CLK(uint8_t enable,uint8_t compensation,uint8_t div);
+/*----------*/
+BL_Err_Type GLB_Set_BT_Coex_Signal(uint8_t enable,GLB_BT_BANDWIDTH_Type bandWidth,
+                                                  uint8_t pti,uint8_t channel);
+/*----------*/
+BL_Err_Type GLB_UART_Fun_Sel(GLB_UART_SIG_Type sig,GLB_UART_SIG_FUN_Type fun);
+/*----------*/
+BL_Err_Type GLB_Power_Off_DLL(void);
+BL_Err_Type GLB_Power_On_DLL(GLB_DLL_XTAL_Type xtalType);
+BL_Err_Type GLB_Enable_DLL_All_Clks(void);
+BL_Err_Type GLB_Enable_DLL_Clk(GLB_DLL_CLK_Type dllClk);
+BL_Err_Type GLB_Disable_DLL_All_Clks(void);
+BL_Err_Type GLB_Disable_DLL_Clk(GLB_DLL_CLK_Type dllClk);
+/*----------*/
+BL_Err_Type GLB_IR_RX_GPIO_Sel(GLB_GPIO_Type gpio);
+BL_Err_Type GLB_IR_LED_Driver_Enable(void);
+BL_Err_Type GLB_IR_LED_Driver_Disable(void);
+BL_Err_Type GLB_IR_LED_Driver_Output_Enable(GLB_GPIO_Type gpio);
+BL_Err_Type GLB_IR_LED_Driver_Output_Disable(GLB_GPIO_Type gpio);
+BL_Err_Type GLB_IR_LED_Driver_Ibias(uint8_t ibias);
+/*----------*/
+BL_Err_Type GLB_GPIO_Init(GLB_GPIO_Cfg_Type *cfg);
+BL_Err_Type GLB_GPIO_Func_Init(GLB_GPIO_FUNC_Type gpioFun,GLB_GPIO_Type *pinList,uint8_t cnt);
+BL_Err_Type GLB_GPIO_INPUT_Enable(GLB_GPIO_Type gpioPin);
+BL_Err_Type GLB_GPIO_INPUT_Disable(GLB_GPIO_Type gpioPin);
+BL_Err_Type GLB_GPIO_OUTPUT_Enable(GLB_GPIO_Type gpioPin);
+BL_Err_Type GLB_GPIO_OUTPUT_Disable(GLB_GPIO_Type gpioPin);
+BL_Err_Type GLB_GPIO_Set_HZ(GLB_GPIO_Type gpioPin);
+uint8_t GLB_GPIO_Get_Fun(GLB_GPIO_Type gpioPin);
+BL_Err_Type GLB_GPIO_Write(GLB_GPIO_Type gpioPin,uint32_t val);
+uint32_t GLB_GPIO_Read(GLB_GPIO_Type gpioPin);
+BL_Err_Type GLB_GPIO_IntMask(GLB_GPIO_Type gpioPin,BL_Mask_Type intMask);
+BL_Err_Type GLB_GPIO_IntClear(GLB_GPIO_Type gpioPin,BL_Sts_Type intClear);
+BL_Sts_Type GLB_Get_GPIO_IntStatus(GLB_GPIO_Type gpioPin);
+BL_Err_Type GLB_Set_GPIO_IntMod(GLB_GPIO_Type gpioPin,GLB_GPIO_INT_CONTROL_Type intCtlMod,
+                                GLB_GPIO_INT_TRIG_Type intTrgMod);
+GLB_GPIO_INT_CONTROL_Type GLB_Get_GPIO_IntCtlMod(GLB_GPIO_Type gpioPin);
+BL_Err_Type GLB_GPIO_Int2Mask(GLB_GPIO_Type gpioPin,BL_Mask_Type intMask);
+BL_Err_Type GLB_GPIO_Int2Clear(GLB_GPIO_Type gpioPin,BL_Sts_Type intClear);
+BL_Sts_Type GLB_Get_GPIO_Int2Status(GLB_GPIO_Type gpioPin);
+BL_Err_Type GLB_Set_GPIO_Int2Mod(GLB_GPIO_Type gpioPin,GLB_GPIO_INT_CONTROL_Type intCtlMod,
+                                 GLB_GPIO_INT_TRIG_Type intTrgMod);
+GLB_GPIO_INT_CONTROL_Type GLB_Get_GPIO_Int2CtlMod(GLB_GPIO_Type gpioPin);
+BL_Err_Type GLB_GPIO_INT0_IRQHandler_Install(void);
+BL_Err_Type GLB_GPIO_INT0_Callback_Install(GLB_GPIO_Type gpioPin,intCallback_Type* cbFun);
+BL_Err_Type GLB_GPIO_INT0_Callback_Install2(GLB_GPIO_Type gpioPin,intCallback_Type* cbFun);
+/*----------*/;
+
+/*@} end of group GLB_Public_Functions */
+
+/*@} end of group GLB */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_GLB_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_gpio.h b/drivers/bl702_driver/std_drv/inc/bl702_gpio.h
new file mode 100644
index 00000000..aca6e011
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_gpio.h
@@ -0,0 +1,945 @@
+/**
+
+  ******************************************************************************
+
+  * @file    bl702_gpio.h
+
+  * @version V1.2
+
+  * @date    2020-09-04
+
+  * @brief   This file is the description of.IP register
+
+  ******************************************************************************
+
+  * @attention
+
+  *
+
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+
+  *
+
+  * Redistribution and use in source and binary forms, with or without modification,
+
+  * are permitted provided that the following conditions are met:
+
+  *   1. Redistributions of source code must retain the above copyright notice,
+
+  *      this list of conditions and the following disclaimer.
+
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+
+  *      this list of conditions and the following disclaimer in the documentation
+
+  *      and/or other materials provided with the distribution.
+
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+
+  *      may be used to endorse or promote products derived from this software
+
+  *      without specific prior written permission.
+
+  *
+
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+  *
+
+  ******************************************************************************
+
+  */
+
+#ifndef  __BL702_GPIO_H__
+#define  __BL702_GPIO_H__
+
+
+typedef enum
+{
+    GLB_GPIO_PIN_0 = 0,
+    GLB_GPIO_PIN_1,
+    GLB_GPIO_PIN_2,
+    GLB_GPIO_PIN_3,
+    GLB_GPIO_PIN_4,
+    GLB_GPIO_PIN_5,
+    GLB_GPIO_PIN_6,
+    GLB_GPIO_PIN_7,
+    GLB_GPIO_PIN_8,
+    GLB_GPIO_PIN_9,
+    GLB_GPIO_PIN_10,
+    GLB_GPIO_PIN_11,
+    GLB_GPIO_PIN_12,
+    GLB_GPIO_PIN_13,
+    GLB_GPIO_PIN_14,
+    GLB_GPIO_PIN_15,
+    GLB_GPIO_PIN_16,
+    GLB_GPIO_PIN_17,
+    GLB_GPIO_PIN_18,
+    GLB_GPIO_PIN_19,
+    GLB_GPIO_PIN_20,
+    GLB_GPIO_PIN_21,
+    GLB_GPIO_PIN_22,
+    GLB_GPIO_PIN_23,
+    GLB_GPIO_PIN_24,
+    GLB_GPIO_PIN_25,
+    GLB_GPIO_PIN_26,
+    GLB_GPIO_PIN_27,
+    GLB_GPIO_PIN_28,
+    GLB_GPIO_PIN_29,
+    GLB_GPIO_PIN_30,
+    GLB_GPIO_PIN_31,
+    GLB_GPIO_PIN_32,
+    GLB_GPIO_PIN_33,
+    GLB_GPIO_PIN_34,
+    GLB_GPIO_PIN_35,
+    GLB_GPIO_PIN_36,
+    GLB_GPIO_PIN_37,
+    GLB_GPIO_PIN_MAX,
+}GLB_GPIO_Type;
+
+#define  GPIO_MODE_INPUT                                        ((uint32_t)0x00000000U)   /*!< Input Floating Mode                   */
+#define  GPIO_MODE_OUTPUT                                       ((uint32_t)0x00000001U)   /*!< Output Push Pull Mode                 */
+#define  GPIO_MODE_AF                                           ((uint32_t)0x00000002U)   /*!< Alternate function                    */
+#define  GPIO_MODE_ANALOG                                       ((uint32_t)0x00000003U)   /*!< Analog function                       */
+#define  GPIO_PULL_UP                                           ((uint32_t)0x00000000U)   /*!< GPIO pull up                          */
+#define  GPIO_PULL_DOWN                                         ((uint32_t)0x00000001U)   /*!< GPIO pull down                        */
+#define  GPIO_PULL_NONE                                         ((uint32_t)0x00000002U)   /*!< GPIO no pull up or down               */
+
+typedef enum
+{
+    GPIO_FUN_CLK_OUT        = 0 ,
+    GPIO_FUN_BT_COEXIST     = 1 ,
+    GPIO_FUN_FLASH_PSRAM    = 2 ,
+    GPIO_FUN_I2S            = 3 ,
+    GPIO_FUN_SPI            = 4 ,
+    GPIO_FUN_I2C            = 6 ,
+    GPIO_FUN_UART           = 7 ,
+    GPIO_FUN_PWM            = 8 ,
+    GPIO_FUN_CAM            = 9 ,
+    GPIO_FUN_ANALOG         = 10,
+    GPIO_FUN_USB            = 10,
+    GPIO_FUN_GPIO           = 11,
+    GPIO_FUN_RF_TEST        = 12,
+    GPIO_FUN_SCAN           = 13,
+    GPIO_FUN_E21_JTAG       = 14,
+    GPIO_FUN_DEBUG          = 15,
+    GPIO_FUN_EXTERNAL_PA    = 16,
+    GPIO_FUN_USB_TRANCEIVER = 17,
+    GPIO_FUN_USB_CONTROLLER = 18,
+    GPIO_FUN_ETHER_MAC      = 19,
+    GPIO_FUN_QDEC           = 20,
+    GPIO_FUN_KEY_SCAN_IN    = 21,
+    GPIO_FUN_KEY_SCAN_DRIVE = 22,
+    GPIO_FUN_CAM_MISC       = 23,
+    GPIO_FUN_UART0_RTS      = 0x70 ,
+    GPIO_FUN_UART0_CTS      = 0x71 ,
+    GPIO_FUN_UART0_TX       = 0x72 ,
+    GPIO_FUN_UART0_RX       = 0x73 ,
+    GPIO_FUN_UART1_RTS      = 0x74 ,
+    GPIO_FUN_UART1_CTS      = 0x75 ,
+    GPIO_FUN_UART1_TX       = 0x76 ,
+    GPIO_FUN_UART1_RX       = 0x77 ,
+    GPIO_FUN_GPIO_OUTPUT    = 0x80,
+    GPIO_FUN_GPIO_INPUT     = 0x81,
+    GPIO_FUN_UNUSED         = 255
+}GLB_GPIO_FUNC_Type;
+
+
+typedef struct
+{
+    uint8_t gpioPin;
+    uint8_t gpioFun;
+    uint8_t gpioMode;
+    uint8_t pullType;
+    uint8_t drive;
+    uint8_t smtCtrl;
+}GLB_GPIO_Cfg_Type;
+
+/* GPIO0 function definition */
+#define GPIO0_FUN_CLK_OUT_0                                     0
+#define GPIO0_FUN_BT_ABORT                                      1
+#define GPIO0_FUN_UNUSED2                                       2
+#define GPIO0_FUN_I2S0_BCLK                                     3
+#define GPIO0_FUN_SPI_0_MISO_SPI_0_MOSI                         4
+#define GPIO0_FUN_I2C0_SCL                                      6
+#define GPIO0_FUN_UART_SIG0_UART_SIG4                           7
+#define GPIO0_FUN_PWM_CH0                                       8
+#define GPIO0_FUN_PIX_CLK                                       9
+#define GPIO0_FUN_UNUSED10                                      10
+#define GPIO0_FUN_REG_GPIO_0                                    11
+#define GPIO0_FUN_UNUSED12                                      12
+#define GPIO0_FUN_SCAN_IN_0                                     13
+#define GPIO0_FUN_E21_TMS_E21_TCK                               14
+#define GPIO0_FUN_S_CCI_CLK                                     15
+#define GPIO0_FUN_FEM_GPIO_0                                    16
+#define GPIO0_FUN_USB_TX_DN_USB_RX_DN                           17
+#define GPIO0_FUN_USB_SUS                                       18
+#define GPIO0_FUN_MII_REF_CLK                                   19
+#define GPIO0_FUN_QDEC0_A                                       20
+#define GPIO0_FUN_ROW_I_0                                       21
+#define GPIO0_FUN_COL_O_0                                       22
+#define GPIO0_FUN_CAM_PWRDN                                     23
+/* GPIO1 function definition */
+#define GPIO1_FUN_CLK_OUT_1                                     0
+#define GPIO1_FUN_BT_ACTIVE                                     1
+#define GPIO1_FUN_UNUSED2                                       2
+#define GPIO1_FUN_I2S0_FS                                       3
+#define GPIO1_FUN_SPI_0_MOSI_SPI_0_MISO                         4
+#define GPIO1_FUN_I2C0_SDA                                      6
+#define GPIO1_FUN_UART_SIG1_UART_SIG5                           7
+#define GPIO1_FUN_PWM_CH1                                       8
+#define GPIO1_FUN_FRAME_VLD                                     9
+#define GPIO1_FUN_UNUSED10                                      10
+#define GPIO1_FUN_REG_GPIO_1                                    11
+#define GPIO1_FUN_UNUSED12                                      12
+#define GPIO1_FUN_SCAN_IN_1                                     13
+#define GPIO1_FUN_E21_TDI_E21_TDO                               14
+#define GPIO1_FUN_S_CCI_CS                                      15
+#define GPIO1_FUN_FEM_GPIO_1                                    16
+#define GPIO1_FUN_USB_TX_OE                                     17
+#define GPIO1_FUN_USB_ENUM                                      18
+#define GPIO1_FUN_MII_TXD_0                                     19
+#define GPIO1_FUN_QDEC0_B                                       20
+#define GPIO1_FUN_ROW_I_1                                       21
+#define GPIO1_FUN_COL_O_1                                       22
+#define GPIO1_FUN_CAM_REF_CLK                                   23
+/* GPIO2 function definition */
+#define GPIO2_FUN_CLK_OUT_0                                     0
+#define GPIO2_FUN_BT_PRI                                        1
+#define GPIO2_FUN_UNUSED2                                       2
+#define GPIO2_FUN_I2S0_DIO_I2S0_DO                              3
+#define GPIO2_FUN_SPI_0_SS                                      4
+#define GPIO2_FUN_I2C0_SCL                                      6
+#define GPIO2_FUN_UART_SIG2_UART_SIG6                           7
+#define GPIO2_FUN_PWM_CH2                                       8
+#define GPIO2_FUN_LINE_VLD                                      9
+#define GPIO2_FUN_UNUSED10                                      10
+#define GPIO2_FUN_REG_GPIO_2                                    11
+#define GPIO2_FUN_UNUSED12                                      12
+#define GPIO2_FUN_SCAN_IN_2                                     13
+#define GPIO2_FUN_E21_TCK_E21_TMS                               14
+#define GPIO2_FUN_S_CCI_DATA_0                                  15
+#define GPIO2_FUN_FEM_GPIO_2                                    16
+#define GPIO2_FUN_USB_TX_DP_USB_RX_DP                           17
+#define GPIO2_FUN_USB_OEB                                       18
+#define GPIO2_FUN_MII_TXD_1                                     19
+#define GPIO2_FUN_QDEC0_LED                                     20
+#define GPIO2_FUN_ROW_I_2                                       21
+#define GPIO2_FUN_COL_O_2                                       22
+#define GPIO2_FUN_CAM_RESET                                     23
+/* GPIO3 function definition */
+#define GPIO3_FUN_CLK_OUT_1                                     0
+#define GPIO3_FUN_BT_ABORT                                      1
+#define GPIO3_FUN_UNUSED2                                       2
+#define GPIO3_FUN_I2S0_RCLK_O_I2S0_DI                           3
+#define GPIO3_FUN_SPI_0_SCLK                                    4
+#define GPIO3_FUN_I2C0_SDA                                      6
+#define GPIO3_FUN_UART_SIG3_UART_SIG7                           7
+#define GPIO3_FUN_PWM_CH3                                       8
+#define GPIO3_FUN_PIX_DAT0                                      9
+#define GPIO3_FUN_UNUSED10                                      10
+#define GPIO3_FUN_REG_GPIO_3                                    11
+#define GPIO3_FUN_RF_TEST_0                                     12
+#define GPIO3_FUN_UNUSED13                                      13
+#define GPIO3_FUN_E21_TDO_E21_TDI                               14
+#define GPIO3_FUN_DEBUG_0                                       15
+#define GPIO3_FUN_FEM_GPIO_3                                    16
+#define GPIO3_FUN_USB_SUS_EXT                                   17
+#define GPIO3_FUN_VOP                                           18
+#define GPIO3_FUN_UNUSED19                                      19
+#define GPIO3_FUN_QDEC1_A                                       20
+#define GPIO3_FUN_ROW_I_3                                       21
+#define GPIO3_FUN_COL_O_3                                       22
+#define GPIO3_FUN_CAM_PWRDN                                     23
+/* GPIO4 function definition */
+#define GPIO4_FUN_CLK_OUT_0                                     0
+#define GPIO4_FUN_BT_ACTIVE                                     1
+#define GPIO4_FUN_UNUSED2                                       2
+#define GPIO4_FUN_I2S0_BCLK                                     3
+#define GPIO4_FUN_SPI_0_MISO_SPI_0_MOSI                         4
+#define GPIO4_FUN_I2C0_SCL                                      6
+#define GPIO4_FUN_UART_SIG4_UART_SIG0                           7
+#define GPIO4_FUN_PWM_CH4                                       8
+#define GPIO4_FUN_PIX_DAT1                                      9
+#define GPIO4_FUN_UNUSED10                                      10
+#define GPIO4_FUN_REG_GPIO_4                                    11
+#define GPIO4_FUN_RF_TEST_1                                     12
+#define GPIO4_FUN_UNUSED13                                      13
+#define GPIO4_FUN_E21_TMS_E21_TCK                               14
+#define GPIO4_FUN_DEBUG_1                                       15
+#define GPIO4_FUN_FEM_GPIO_4                                    16
+#define GPIO4_FUN_USB_ENUM_EXT                                  17
+#define GPIO4_FUN_VOM                                           18
+#define GPIO4_FUN_UNUSED19                                      19
+#define GPIO4_FUN_QDEC1_B                                       20
+#define GPIO4_FUN_ROW_I_4                                       21
+#define GPIO4_FUN_COL_O_4                                       22
+#define GPIO4_FUN_CAM_REF_CLK                                   23
+/* GPIO5 function definition */
+#define GPIO5_FUN_CLK_OUT_1                                     0
+#define GPIO5_FUN_BT_PRI                                        1
+#define GPIO5_FUN_UNUSED2                                       2
+#define GPIO5_FUN_I2S0_FS                                       3
+#define GPIO5_FUN_SPI_0_MOSI_SPI_0_MISO                         4
+#define GPIO5_FUN_I2C0_SDA                                      6
+#define GPIO5_FUN_UART_SIG5_UART_SIG1                           7
+#define GPIO5_FUN_PWM_CH0                                       8
+#define GPIO5_FUN_PIX_DAT2                                      9
+#define GPIO5_FUN_UNUSED10                                      10
+#define GPIO5_FUN_REG_GPIO_5                                    11
+#define GPIO5_FUN_RF_TEST_2                                     12
+#define GPIO5_FUN_UNUSED13                                      13
+#define GPIO5_FUN_E21_TDI_E21_TDO                               14
+#define GPIO5_FUN_DEBUG_2                                       15
+#define GPIO5_FUN_FEM_GPIO_0                                    16
+#define GPIO5_FUN_USB_TX_DN_USB_RX_DN                           17
+#define GPIO5_FUN_BD                                            18
+#define GPIO5_FUN_UNUSED19                                      19
+#define GPIO5_FUN_QDEC1_LED                                     20
+#define GPIO5_FUN_ROW_I_5                                       21
+#define GPIO5_FUN_COL_O_5                                       22
+#define GPIO5_FUN_CAM_RESET                                     23
+/* GPIO6 function definition */
+#define GPIO6_FUN_CLK_OUT_0                                     0
+#define GPIO6_FUN_BT_ABORT                                      1
+#define GPIO6_FUN_UNUSED2                                       2
+#define GPIO6_FUN_I2S0_DIO_I2S0_DO                              3
+#define GPIO6_FUN_SPI_0_SS                                      4
+#define GPIO6_FUN_I2C0_SCL                                      6
+#define GPIO6_FUN_UART_SIG6_UART_SIG2                           7
+#define GPIO6_FUN_PWM_CH1                                       8
+#define GPIO6_FUN_PIX_DAT3                                      9
+#define GPIO6_FUN_UNUSED10                                      10
+#define GPIO6_FUN_REG_GPIO_6                                    11
+#define GPIO6_FUN_RF_TEST_3                                     12
+#define GPIO6_FUN_UNUSED13                                      13
+#define GPIO6_FUN_E21_TCK_E21_TMS                               14
+#define GPIO6_FUN_DEBUG_3                                       15
+#define GPIO6_FUN_FEM_GPIO_1                                    16
+#define GPIO6_FUN_USB_TX_OE                                     17
+#define GPIO6_FUN_VIP                                           18
+#define GPIO6_FUN_UNUSED19                                      19
+#define GPIO6_FUN_QDEC2_A                                       20
+#define GPIO6_FUN_ROW_I_6                                       21
+#define GPIO6_FUN_COL_O_6                                       22
+#define GPIO6_FUN_CAM_PWRDN                                     23
+/* GPIO7 function definition */
+#define GPIO7_FUN_CLK_OUT_1                                     0
+#define GPIO7_FUN_BT_ACTIVE                                     1
+#define GPIO7_FUN_UNUSED2                                       2
+#define GPIO7_FUN_I2S0_RCLK_O_I2S0_DI                           3
+#define GPIO7_FUN_SPI_0_SCLK                                    4
+#define GPIO7_FUN_I2C0_SDA                                      6
+#define GPIO7_FUN_UART_SIG7_UART_SIG3                           7
+#define GPIO7_FUN_PWM_CH2                                       8
+#define GPIO7_FUN_UNUSED9                                       9
+#define GPIO7_FUN_USB_DP_GPIP_CH_6_GPDAC_VREF_EXT               10
+#define GPIO7_FUN_REG_GPIO_7                                    11
+#define GPIO7_FUN_UNUSED12                                      12
+#define GPIO7_FUN_SCAN_RSTB                                     13
+#define GPIO7_FUN_E21_TDO_E21_TDI                               14
+#define GPIO7_FUN_S_CCI_DATA_1                                  15
+#define GPIO7_FUN_FEM_GPIO_2                                    16
+#define GPIO7_FUN_USB_TX_DP_USB_RX_DP                           17
+#define GPIO7_FUN_VIM                                           18
+#define GPIO7_FUN_MII_RXD_0                                     19
+#define GPIO7_FUN_QDEC2_B                                       20
+#define GPIO7_FUN_ROW_I_7                                       21
+#define GPIO7_FUN_COL_O_7                                       22
+#define GPIO7_FUN_CAM_REF_CLK                                   23
+/* GPIO8 function definition */
+#define GPIO8_FUN_CLK_OUT_0                                     0
+#define GPIO8_FUN_BT_PRI                                        1
+#define GPIO8_FUN_UNUSED2                                       2
+#define GPIO8_FUN_I2S0_BCLK                                     3
+#define GPIO8_FUN_SPI_0_MISO_SPI_0_MOSI                         4
+#define GPIO8_FUN_I2C0_SCL                                      6
+#define GPIO8_FUN_UART_SIG0_UART_SIG4                           7
+#define GPIO8_FUN_PWM_CH3                                       8
+#define GPIO8_FUN_UNUSED9                                       9
+#define GPIO8_FUN_USB_DM_GPIP_CH_0                              10
+#define GPIO8_FUN_REG_GPIO_8                                    11
+#define GPIO8_FUN_RF_TEST_4                                     12
+#define GPIO8_FUN_SCAN_CLK                                      13
+#define GPIO8_FUN_E21_TMS_E21_TCK                               14
+#define GPIO8_FUN_DEBUG_4                                       15
+#define GPIO8_FUN_FEM_GPIO_3                                    16
+#define GPIO8_FUN_USB_SUS_EXT                                   17
+#define GPIO8_FUN_RCV                                           18
+#define GPIO8_FUN_MII_RXD_1                                     19
+#define GPIO8_FUN_QDEC2_LED                                     20
+#define GPIO8_FUN_ROW_I_0                                       21
+#define GPIO8_FUN_COL_O_8                                       22
+#define GPIO8_FUN_CAM_RESET                                     23
+/* GPIO9 function definition */
+#define GPIO9_FUN_CLK_OUT_1                                     0
+#define GPIO9_FUN_BT_ABORT                                      1
+#define GPIO9_FUN_UNUSED2                                       2
+#define GPIO9_FUN_I2S0_FS                                       3
+#define GPIO9_FUN_SPI_0_MOSI_SPI_0_MISO                         4
+#define GPIO9_FUN_I2C0_SDA                                      6
+#define GPIO9_FUN_UART_SIG1_UART_SIG5                           7
+#define GPIO9_FUN_PWM_CH4                                       8
+#define GPIO9_FUN_UNUSED9                                       9
+#define GPIO9_FUN_PMIP_DC_TP_CLKPLL_DC_TP_GPIP_CH_7             10
+#define GPIO9_FUN_REG_GPIO_9                                    11
+#define GPIO9_FUN_RF_TEST_5                                     12
+#define GPIO9_FUN_SCAN_EN                                       13
+#define GPIO9_FUN_E21_TDI_E21_TDO                               14
+#define GPIO9_FUN_DEBUG_5                                       15
+#define GPIO9_FUN_FEM_GPIO_4                                    16
+#define GPIO9_FUN_USB_ENUM_EXT                                  17
+#define GPIO9_FUN_USB_SUS                                       18
+#define GPIO9_FUN_UNUSED19                                      19
+#define GPIO9_FUN_QDEC0_A                                       20
+#define GPIO9_FUN_ROW_I_1                                       21
+#define GPIO9_FUN_COL_O_9                                       22
+#define GPIO9_FUN_CAM_PWRDN                                     23
+/* GPIO10 function definition */
+#define GPIO10_FUN_CLK_OUT_0                                    0
+#define GPIO10_FUN_BT_ACTIVE                                    1
+#define GPIO10_FUN_UNUSED2                                      2
+#define GPIO10_FUN_I2S0_DIO_I2S0_DO                             3
+#define GPIO10_FUN_SPI_0_SS                                     4
+#define GPIO10_FUN_I2C0_SCL                                     6
+#define GPIO10_FUN_UART_SIG2_UART_SIG6                          7
+#define GPIO10_FUN_PWM_CH0                                      8
+#define GPIO10_FUN_UNUSED9                                      9
+#define GPIO10_FUN_MICBIAS                                      10
+#define GPIO10_FUN_REG_GPIO_10                                  11
+#define GPIO10_FUN_RF_TEST_6                                    12
+#define GPIO10_FUN_UNUSED13                                     13
+#define GPIO10_FUN_E21_TCK_E21_TMS                              14
+#define GPIO10_FUN_DEBUG_6                                      15
+#define GPIO10_FUN_FEM_GPIO_0                                   16
+#define GPIO10_FUN_USB_TX_DN_USB_RX_DN                          17
+#define GPIO10_FUN_USB_ENUM                                     18
+#define GPIO10_FUN_UNUSED19                                     19
+#define GPIO10_FUN_QDEC0_B                                      20
+#define GPIO10_FUN_ROW_I_2                                      21
+#define GPIO10_FUN_COL_O_10                                     22
+#define GPIO10_FUN_CAM_REF_CLK                                  23
+/* GPIO11 function definition */
+#define GPIO11_FUN_CLK_OUT_1                                    0
+#define GPIO11_FUN_BT_PRI                                       1
+#define GPIO11_FUN_UNUSED2                                      2
+#define GPIO11_FUN_I2S0_RCLK_O_I2S0_DI                          3
+#define GPIO11_FUN_SPI_0_SCLK                                   4
+#define GPIO11_FUN_I2C0_SDA                                     6
+#define GPIO11_FUN_UART_SIG3_UART_SIG7                          7
+#define GPIO11_FUN_PWM_CH1                                      8
+#define GPIO11_FUN_UNUSED9                                      9
+#define GPIO11_FUN_GPIP_CH_3                                    10
+#define GPIO11_FUN_REG_GPIO_11                                  11
+#define GPIO11_FUN_RF_TEST_7                                    12
+#define GPIO11_FUN_UNUSED13                                     13
+#define GPIO11_FUN_E21_TDO_E21_TDI                              14
+#define GPIO11_FUN_DEBUG_7                                      15
+#define GPIO11_FUN_FEM_GPIO_1                                   16
+#define GPIO11_FUN_USB_TX_OE                                    17
+#define GPIO11_FUN_USB_OEB                                      18
+#define GPIO11_FUN_UNUSED19                                     19
+#define GPIO11_FUN_QDEC0_LED                                    20
+#define GPIO11_FUN_ROW_I_3                                      21
+#define GPIO11_FUN_COL_O_11                                     22
+#define GPIO11_FUN_CAM_RESET                                    23
+/* GPIO12 function definition */
+#define GPIO12_FUN_CLK_OUT_0                                    0
+#define GPIO12_FUN_BT_ABORT                                     1
+#define GPIO12_FUN_UNUSED2                                      2
+#define GPIO12_FUN_I2S0_BCLK                                    3
+#define GPIO12_FUN_SPI_0_MISO_SPI_0_MOSI                        4
+#define GPIO12_FUN_I2C0_SCL                                     6
+#define GPIO12_FUN_UART_SIG4_UART_SIG0                          7
+#define GPIO12_FUN_PWM_CH2                                      8
+#define GPIO12_FUN_PIX_DAT4                                     9
+#define GPIO12_FUN_GPIP_CH_4                                    10
+#define GPIO12_FUN_REG_GPIO_12                                  11
+#define GPIO12_FUN_RF_TEST_8                                    12
+#define GPIO12_FUN_UNUSED13                                     13
+#define GPIO12_FUN_E21_TMS_E21_TCK                              14
+#define GPIO12_FUN_DEBUG_8                                      15
+#define GPIO12_FUN_FEM_GPIO_2                                   16
+#define GPIO12_FUN_USB_TX_DP_USB_RX_DP                          17
+#define GPIO12_FUN_VOP                                          18
+#define GPIO12_FUN_UNUSED19                                     19
+#define GPIO12_FUN_QDEC1_A                                      20
+#define GPIO12_FUN_ROW_I_4                                      21
+#define GPIO12_FUN_COL_O_12                                     22
+#define GPIO12_FUN_CAM_PWRDN                                    23
+/* GPIO13 function definition */
+#define GPIO13_FUN_CLK_OUT_1                                    0
+#define GPIO13_FUN_BT_ACTIVE                                    1
+#define GPIO13_FUN_UNUSED2                                      2
+#define GPIO13_FUN_I2S0_FS                                      3
+#define GPIO13_FUN_SPI_0_MOSI_SPI_0_MISO                        4
+#define GPIO13_FUN_I2C0_SDA                                     6
+#define GPIO13_FUN_UART_SIG5_UART_SIG1                          7
+#define GPIO13_FUN_PWM_CH3                                      8
+#define GPIO13_FUN_UNUSED9                                      9
+#define GPIO13_FUN_UNUSED10                                     10
+#define GPIO13_FUN_REG_GPIO_13                                  11
+#define GPIO13_FUN_UNUSED12                                     12
+#define GPIO13_FUN_UNUSED13                                     13
+#define GPIO13_FUN_E21_TDI_E21_TDO                              14
+#define GPIO13_FUN_DEBUG_9                                      15
+#define GPIO13_FUN_FEM_GPIO_3                                   16
+#define GPIO13_FUN_USB_SUS_EXT                                  17
+#define GPIO13_FUN_VOM                                          18
+#define GPIO13_FUN_UNUSED19                                     19
+#define GPIO13_FUN_QDEC1_B                                      20
+#define GPIO13_FUN_ROW_I_5                                      21
+#define GPIO13_FUN_COL_O_13                                     22
+#define GPIO13_FUN_CAM_REF_CLK                                  23
+/* GPIO14 function definition */
+#define GPIO14_FUN_CLK_OUT_0                                    0
+#define GPIO14_FUN_BT_PRI                                       1
+#define GPIO14_FUN_UNUSED2                                      2
+#define GPIO14_FUN_I2S0_DIO_I2S0_DO                             3
+#define GPIO14_FUN_SPI_0_SS                                     4
+#define GPIO14_FUN_I2C0_SCL                                     6
+#define GPIO14_FUN_UART_SIG6_UART_SIG2                          7
+#define GPIO14_FUN_PWM_CH4                                      8
+#define GPIO14_FUN_UNUSED9                                      9
+#define GPIO14_FUN_GPIP_CH_5_ATEST_OUT_0                        10
+#define GPIO14_FUN_REG_GPIO_14                                  11
+#define GPIO14_FUN_RF_TEST_9                                    12
+#define GPIO14_FUN_SCAN_OUT_0                                   13
+#define GPIO14_FUN_E21_TCK_E21_TMS                              14
+#define GPIO14_FUN_DEBUG_10                                     15
+#define GPIO14_FUN_FEM_GPIO_4                                   16
+#define GPIO14_FUN_USB_ENUM_EXT                                 17
+#define GPIO14_FUN_BD                                           18
+#define GPIO14_FUN_UNUSED19                                     19
+#define GPIO14_FUN_QDEC1_LED                                    20
+#define GPIO14_FUN_ROW_I_6                                      21
+#define GPIO14_FUN_COL_O_14                                     22
+#define GPIO14_FUN_CAM_RESET                                    23
+/* GPIO15 function definition */
+#define GPIO15_FUN_CLK_OUT_1                                    0
+#define GPIO15_FUN_BT_ABORT                                     1
+#define GPIO15_FUN_UNUSED2                                      2
+#define GPIO15_FUN_I2S0_RCLK_O_I2S0_DI                          3
+#define GPIO15_FUN_SPI_0_SCLK                                   4
+#define GPIO15_FUN_I2C0_SDA                                     6
+#define GPIO15_FUN_UART_SIG7_UART_SIG3                          7
+#define GPIO15_FUN_PWM_CH0                                      8
+#define GPIO15_FUN_UNUSED9                                      9
+#define GPIO15_FUN_GPIP_CH_1_ATEST_OUT_1                        10
+#define GPIO15_FUN_REG_GPIO_15                                  11
+#define GPIO15_FUN_RF_TEST_10                                   12
+#define GPIO15_FUN_SCAN_OUT_1                                   13
+#define GPIO15_FUN_E21_TDO_E21_TDI                              14
+#define GPIO15_FUN_DEBUG_11                                     15
+#define GPIO15_FUN_FEM_GPIO_0                                   16
+#define GPIO15_FUN_USB_TX_DN_USB_RX_DN                          17
+#define GPIO15_FUN_VIP                                          18
+#define GPIO15_FUN_UNUSED19                                     19
+#define GPIO15_FUN_QDEC2_A                                      20
+#define GPIO15_FUN_ROW_I_7                                      21
+#define GPIO15_FUN_COL_O_15                                     22
+#define GPIO15_FUN_CAM_PWRDN                                    23
+/* GPIO16 function definition */
+#define GPIO16_FUN_CLK_OUT_0                                    0
+#define GPIO16_FUN_BT_ACTIVE                                    1
+#define GPIO16_FUN_UNUSED2                                      2
+#define GPIO16_FUN_I2S0_BCLK                                    3
+#define GPIO16_FUN_SPI_0_MISO_SPI_0_MOSI                        4
+#define GPIO16_FUN_I2C0_SCL                                     6
+#define GPIO16_FUN_UART_SIG0_UART_SIG4                          7
+#define GPIO16_FUN_PWM_CH1                                      8
+#define GPIO16_FUN_UNUSED9                                      9
+#define GPIO16_FUN_UNUSED10                                     10
+#define GPIO16_FUN_REG_GPIO_16                                  11
+#define GPIO16_FUN_RF_TEST_11                                   12
+#define GPIO16_FUN_UNUSED13                                     13
+#define GPIO16_FUN_E21_TMS_E21_TCK                              14
+#define GPIO16_FUN_DEBUG_12                                     15
+#define GPIO16_FUN_FEM_GPIO_1                                   16
+#define GPIO16_FUN_USB_TX_OE                                    17
+#define GPIO16_FUN_VIM                                          18
+#define GPIO16_FUN_UNUSED19                                     19
+#define GPIO16_FUN_QDEC2_B                                      20
+#define GPIO16_FUN_ROW_I_0                                      21
+#define GPIO16_FUN_COL_O_16                                     22
+#define GPIO16_FUN_CAM_REF_CLK                                  23
+/* GPIO17 function definition */
+#define GPIO17_FUN_CLK_OUT_1                                    0
+#define GPIO17_FUN_BT_PRI                                       1
+#define GPIO17_FUN_SF_IO_0_SF2_CS2                              2
+#define GPIO17_FUN_I2S0_FS                                      3
+#define GPIO17_FUN_SPI_0_MOSI_SPI_0_MISO                        4
+#define GPIO17_FUN_I2C0_SDA                                     6
+#define GPIO17_FUN_UART_SIG1_UART_SIG5                          7
+#define GPIO17_FUN_PWM_CH2                                      8
+#define GPIO17_FUN_PIX_DAT4                                     9
+#define GPIO17_FUN_GPIP_CH_2_PSW_IRRCV                          10
+#define GPIO17_FUN_REG_GPIO_17                                  11
+#define GPIO17_FUN_RF_TEST_12                                   12
+#define GPIO17_FUN_SCAN_OUT_2                                   13
+#define GPIO17_FUN_E21_TDI_E21_TDO                              14
+#define GPIO17_FUN_DEBUG_13                                     15
+#define GPIO17_FUN_FEM_GPIO_2                                   16
+#define GPIO17_FUN_USB_TX_DP_USB_RX_DP                          17
+#define GPIO17_FUN_RCV                                          18
+#define GPIO17_FUN_UNUSED19                                     19
+#define GPIO17_FUN_QDEC2_LED                                    20
+#define GPIO17_FUN_ROW_I_1                                      21
+#define GPIO17_FUN_COL_O_17                                     22
+#define GPIO17_FUN_CAM_RESET                                    23
+/* GPIO18 function definition */
+#define GPIO18_FUN_CLK_OUT_0                                    0
+#define GPIO18_FUN_BT_ABORT                                     1
+#define GPIO18_FUN_SF_IO_1                                      2
+#define GPIO18_FUN_I2S0_DIO_I2S0_DO                             3
+#define GPIO18_FUN_SPI_0_SS                                     4
+#define GPIO18_FUN_I2C0_SCL                                     6
+#define GPIO18_FUN_UART_SIG2_UART_SIG6                          7
+#define GPIO18_FUN_PWM_CH3                                      8
+#define GPIO18_FUN_PIX_DAT5                                     9
+#define GPIO18_FUN_GPIP_CH_8                                    10
+#define GPIO18_FUN_REG_GPIO_18                                  11
+#define GPIO18_FUN_RF_TEST_13                                   12
+#define GPIO18_FUN_UNUSED13                                     13
+#define GPIO18_FUN_E21_TCK_E21_TMS                              14
+#define GPIO18_FUN_M_CCI_CLK_DEBUG_14                           15
+#define GPIO18_FUN_FEM_GPIO_3                                   16
+#define GPIO18_FUN_USB_SUS_EXT                                  17
+#define GPIO18_FUN_USB_SUS                                      18
+#define GPIO18_FUN_RMII_MDC                                     19
+#define GPIO18_FUN_QDEC0_A                                      20
+#define GPIO18_FUN_ROW_I_2                                      21
+#define GPIO18_FUN_COL_O_18                                     22
+#define GPIO18_FUN_CAM_PWRDN                                    23
+/* GPIO19 function definition */
+#define GPIO19_FUN_CLK_OUT_1                                    0
+#define GPIO19_FUN_BT_ACTIVE                                    1
+#define GPIO19_FUN_SF_CS                                        2
+#define GPIO19_FUN_I2S0_RCLK_O_I2S0_DI                          3
+#define GPIO19_FUN_SPI_0_SCLK                                   4
+#define GPIO19_FUN_I2C0_SDA                                     6
+#define GPIO19_FUN_UART_SIG3_UART_SIG7                          7
+#define GPIO19_FUN_PWM_CH4                                      8
+#define GPIO19_FUN_PIX_DAT6                                     9
+#define GPIO19_FUN_GPIP_CH_9                                    10
+#define GPIO19_FUN_REG_GPIO_19                                  11
+#define GPIO19_FUN_RF_TEST_14                                   12
+#define GPIO19_FUN_UNUSED13                                     13
+#define GPIO19_FUN_E21_TDO_E21_TDI                              14
+#define GPIO19_FUN_M_CCI_CS_DEBUG_15                            15
+#define GPIO19_FUN_FEM_GPIO_4                                   16
+#define GPIO19_FUN_USB_ENUM_EXT                                 17
+#define GPIO19_FUN_USB_ENUM                                     18
+#define GPIO19_FUN_RMII_MDIO                                    19
+#define GPIO19_FUN_QDEC0_B                                      20
+#define GPIO19_FUN_ROW_I_3                                      21
+#define GPIO19_FUN_COL_O_19                                     22
+#define GPIO19_FUN_CAM_REF_CLK                                  23
+/* GPIO20 function definition */
+#define GPIO20_FUN_CLK_OUT_0                                    0
+#define GPIO20_FUN_BT_PRI                                       1
+#define GPIO20_FUN_SF_IO_3                                      2
+#define GPIO20_FUN_I2S0_BCLK                                    3
+#define GPIO20_FUN_SPI_0_MISO_SPI_0_MOSI                        4
+#define GPIO20_FUN_I2C0_SCL                                     6
+#define GPIO20_FUN_UART_SIG4_UART_SIG0                          7
+#define GPIO20_FUN_PWM_CH0                                      8
+#define GPIO20_FUN_PIX_DAT7                                     9
+#define GPIO20_FUN_GPIP_CH_10                                   10
+#define GPIO20_FUN_REG_GPIO_20                                  11
+#define GPIO20_FUN_RF_TEST_15                                   12
+#define GPIO20_FUN_UNUSED13                                     13
+#define GPIO20_FUN_E21_TMS_E21_TCK                              14
+#define GPIO20_FUN_M_CCI_DI_DEBUG_16                            15
+#define GPIO20_FUN_FEM_GPIO_0                                   16
+#define GPIO20_FUN_USB_TX_DN_USB_RX_DN                          17
+#define GPIO20_FUN_USB_OEB                                      18
+#define GPIO20_FUN_RMII_RXERR                                   19
+#define GPIO20_FUN_QDEC0_LED                                    20
+#define GPIO20_FUN_ROW_I_4                                      21
+#define GPIO20_FUN_COL_O_0                                      22
+#define GPIO20_FUN_CAM_RESET                                    23
+/* GPIO21 function definition */
+#define GPIO21_FUN_CLK_OUT_1                                    0
+#define GPIO21_FUN_BT_ABORT                                     1
+#define GPIO21_FUN_SF_CLK                                       2
+#define GPIO21_FUN_I2S0_FS                                      3
+#define GPIO21_FUN_SPI_0_MOSI_SPI_0_MISO                        4
+#define GPIO21_FUN_I2C0_SDA                                     6
+#define GPIO21_FUN_UART_SIG5_UART_SIG1                          7
+#define GPIO21_FUN_PWM_CH1                                      8
+#define GPIO21_FUN_UNUSED9                                      9
+#define GPIO21_FUN_GPIP_CH_11                                   10
+#define GPIO21_FUN_REG_GPIO_21                                  11
+#define GPIO21_FUN_RF_TEST_16                                   12
+#define GPIO21_FUN_UNUSED13                                     13
+#define GPIO21_FUN_E21_TDI_E21_TDO                              14
+#define GPIO21_FUN_M_CCI_DO_DEBUG_17                            15
+#define GPIO21_FUN_FEM_GPIO_1                                   16
+#define GPIO21_FUN_USB_TX_OE                                    17
+#define GPIO21_FUN_VOP                                          18
+#define GPIO21_FUN_RMII_TX_EN                                   19
+#define GPIO21_FUN_QDEC1_A                                      20
+#define GPIO21_FUN_ROW_I_5                                      21
+#define GPIO21_FUN_COL_O_1                                      22
+#define GPIO21_FUN_CAM_PWRDN                                    23
+/* GPIO22 function definition */
+#define GPIO22_FUN_CLK_OUT_0                                    0
+#define GPIO22_FUN_BT_ACTIVE                                    1
+#define GPIO22_FUN_SF_IO_2                                      2
+#define GPIO22_FUN_I2S0_DIO_I2S0_DO                             3
+#define GPIO22_FUN_SPI_0_SS                                     4
+#define GPIO22_FUN_I2C0_SCL                                     6
+#define GPIO22_FUN_UART_SIG6_UART_SIG2                          7
+#define GPIO22_FUN_PWM_CH2                                      8
+#define GPIO22_FUN_UNUSED9                                      9
+#define GPIO22_FUN_LEDDRV_0                                     10
+#define GPIO22_FUN_REG_GPIO_22                                  11
+#define GPIO22_FUN_RF_TEST_17                                   12
+#define GPIO22_FUN_UNUSED13                                     13
+#define GPIO22_FUN_E21_TCK_E21_TMS                              14
+#define GPIO22_FUN_DEBUG_18                                     15
+#define GPIO22_FUN_FEM_GPIO_2                                   16
+#define GPIO22_FUN_USB_TX_DP_USB_RX_DP                          17
+#define GPIO22_FUN_VOM                                          18
+#define GPIO22_FUN_RMII_RX_DV                                   19
+#define GPIO22_FUN_QDEC1_B                                      20
+#define GPIO22_FUN_ROW_I_6                                      21
+#define GPIO22_FUN_COL_O_2                                      22
+#define GPIO22_FUN_CAM_REF_CLK                                  23
+/* GPIO23 function definition */
+#define GPIO23_FUN_CLK_OUT_1                                    0
+#define GPIO23_FUN_BT_PRI                                       1
+#define GPIO23_FUN_SF2_IO_2_SF3_CS2                             2
+#define GPIO23_FUN_I2S0_RCLK_O_I2S0_DI                          3
+#define GPIO23_FUN_SPI_0_SCLK                                   4
+#define GPIO23_FUN_I2C0_SDA                                     6
+#define GPIO23_FUN_UART_SIG7_UART_SIG3                          7
+#define GPIO23_FUN_PWM_CH3                                      8
+#define GPIO23_FUN_PIX_DAT4                                     9
+#define GPIO23_FUN_LEDDRV_1_FLASH_PULL_OUT_0                    10
+#define GPIO23_FUN_REG_GPIO_23                                  11
+#define GPIO23_FUN_RF_TEST_18                                   12
+#define GPIO23_FUN_UNUSED13                                     13
+#define GPIO23_FUN_E21_TDO_E21_TDI                              14
+#define GPIO23_FUN_DEBUG_19                                     15
+#define GPIO23_FUN_FEM_GPIO_3                                   16
+#define GPIO23_FUN_USB_SUS_EXT                                  17
+#define GPIO23_FUN_BD                                           18
+#define GPIO23_FUN_UNUSED19                                     19
+#define GPIO23_FUN_QDEC1_LED                                    20
+#define GPIO23_FUN_ROW_I_7                                      21
+#define GPIO23_FUN_COL_O_3                                      22
+#define GPIO23_FUN_CAM_RESET                                    23
+/* GPIO24 function definition */
+#define GPIO24_FUN_CLK_OUT_0                                    0
+#define GPIO24_FUN_BT_ABORT                                     1
+#define GPIO24_FUN_SF2_IO_1                                     2
+#define GPIO24_FUN_I2S0_BCLK                                    3
+#define GPIO24_FUN_SPI_0_MISO_SPI_0_MOSI                        4
+#define GPIO24_FUN_I2C0_SCL                                     6
+#define GPIO24_FUN_UART_SIG0_UART_SIG4                          7
+#define GPIO24_FUN_PWM_CH4                                      8
+#define GPIO24_FUN_PIX_DAT5                                     9
+#define GPIO24_FUN_FLASH_PULL_OUT_1                             10
+#define GPIO24_FUN_REG_GPIO_24                                  11
+#define GPIO24_FUN_RF_TEST_19                                   12
+#define GPIO24_FUN_UNUSED13                                     13
+#define GPIO24_FUN_E21_TMS_E21_TCK                              14
+#define GPIO24_FUN_DEBUG_20                                     15
+#define GPIO24_FUN_FEM_GPIO_4                                   16
+#define GPIO24_FUN_USB_ENUM_EXT                                 17
+#define GPIO24_FUN_VIP                                          18
+#define GPIO24_FUN_RMII_MDC                                     19
+#define GPIO24_FUN_QDEC2_A                                      20
+#define GPIO24_FUN_ROW_I_0                                      21
+#define GPIO24_FUN_COL_O_4                                      22
+#define GPIO24_FUN_CAM_PWRDN                                    23
+/* GPIO25 function definition */
+#define GPIO25_FUN_CLK_OUT_1                                    0
+#define GPIO25_FUN_BT_ACTIVE                                    1
+#define GPIO25_FUN_SF2_CS                                       2
+#define GPIO25_FUN_I2S0_FS                                      3
+#define GPIO25_FUN_SPI_0_MOSI_SPI_0_MISO                        4
+#define GPIO25_FUN_I2C0_SDA                                     6
+#define GPIO25_FUN_UART_SIG1_UART_SIG5                          7
+#define GPIO25_FUN_PWM_CH0                                      8
+#define GPIO25_FUN_PIX_DAT6                                     9
+#define GPIO25_FUN_FLASH_PULL_OUT_2                             10
+#define GPIO25_FUN_REG_GPIO_25                                  11
+#define GPIO25_FUN_RF_TEST_20                                   12
+#define GPIO25_FUN_UNUSED13                                     13
+#define GPIO25_FUN_E21_TDI_E21_TDO                              14
+#define GPIO25_FUN_DEBUG_21                                     15
+#define GPIO25_FUN_FEM_GPIO_0                                   16
+#define GPIO25_FUN_USB_TX_DN_USB_RX_DN                          17
+#define GPIO25_FUN_VIM                                          18
+#define GPIO25_FUN_RMII_MDIO                                    19
+#define GPIO25_FUN_QDEC2_B                                      20
+#define GPIO25_FUN_ROW_I_1                                      21
+#define GPIO25_FUN_COL_O_5                                      22
+#define GPIO25_FUN_CAM_REF_CLK                                  23
+/* GPIO26 function definition */
+#define GPIO26_FUN_CLK_OUT_0                                    0
+#define GPIO26_FUN_BT_PRI                                       1
+#define GPIO26_FUN_SF2_IO_3                                     2
+#define GPIO26_FUN_I2S0_DIO_I2S0_DO                             3
+#define GPIO26_FUN_SPI_0_SS                                     4
+#define GPIO26_FUN_I2C0_SCL                                     6
+#define GPIO26_FUN_UART_SIG2_UART_SIG6                          7
+#define GPIO26_FUN_PWM_CH1                                      8
+#define GPIO26_FUN_PIX_DAT7                                     9
+#define GPIO26_FUN_FLASH_PULL_OUT_3                             10
+#define GPIO26_FUN_REG_GPIO_26                                  11
+#define GPIO26_FUN_RF_TEST_21                                   12
+#define GPIO26_FUN_UNUSED13                                     13
+#define GPIO26_FUN_E21_TCK_E21_TMS                              14
+#define GPIO26_FUN_DEBUG_22                                     15
+#define GPIO26_FUN_FEM_GPIO_1                                   16
+#define GPIO26_FUN_USB_TX_OE                                    17
+#define GPIO26_FUN_RCV                                          18
+#define GPIO26_FUN_RMII_RXERR                                   19
+#define GPIO26_FUN_QDEC2_LED                                    20
+#define GPIO26_FUN_ROW_I_2                                      21
+#define GPIO26_FUN_COL_O_6                                      22
+#define GPIO26_FUN_CAM_RESET                                    23
+/* GPIO27 function definition */
+#define GPIO27_FUN_CLK_OUT_1                                    0
+#define GPIO27_FUN_BT_ABORT                                     1
+#define GPIO27_FUN_SF2_CLK                                      2
+#define GPIO27_FUN_I2S0_RCLK_O_I2S0_DI                          3
+#define GPIO27_FUN_SPI_0_SCLK                                   4
+#define GPIO27_FUN_I2C0_SDA                                     6
+#define GPIO27_FUN_UART_SIG3_UART_SIG7                          7
+#define GPIO27_FUN_PWM_CH2                                      8
+#define GPIO27_FUN_UNUSED9                                      9
+#define GPIO27_FUN_FLASH_PULL_OUT_4                             10
+#define GPIO27_FUN_REG_GPIO_27                                  11
+#define GPIO27_FUN_RF_TEST_22                                   12
+#define GPIO27_FUN_UNUSED13                                     13
+#define GPIO27_FUN_E21_TDO_E21_TDI                              14
+#define GPIO27_FUN_DEBUG_23                                     15
+#define GPIO27_FUN_FEM_GPIO_2                                   16
+#define GPIO27_FUN_USB_TX_DP_USB_RX_DP                          17
+#define GPIO27_FUN_USB_SUS                                      18
+#define GPIO27_FUN_RMII_TX_EN                                   19
+#define GPIO27_FUN_QDEC0_A                                      20
+#define GPIO27_FUN_ROW_I_3                                      21
+#define GPIO27_FUN_COL_O_7                                      22
+#define GPIO27_FUN_CAM_PWRDN                                    23
+/* GPIO28 function definition */
+#define GPIO28_FUN_CLK_OUT_0                                    0
+#define GPIO28_FUN_BT_ACTIVE                                    1
+#define GPIO28_FUN_SF2_IO_0                                     2
+#define GPIO28_FUN_I2S0_BCLK                                    3
+#define GPIO28_FUN_SPI_0_MISO_SPI_0_MOSI                        4
+#define GPIO28_FUN_I2C0_SCL                                     6
+#define GPIO28_FUN_UART_SIG4_UART_SIG0                          7
+#define GPIO28_FUN_PWM_CH3                                      8
+#define GPIO28_FUN_PIX_DAT4                                     9
+#define GPIO28_FUN_FLASH_PULL_OUT_5                             10
+#define GPIO28_FUN_REG_GPIO_28                                  11
+#define GPIO28_FUN_RF_TEST_23                                   12
+#define GPIO28_FUN_UNUSED13                                     13
+#define GPIO28_FUN_E21_TMS_E21_TCK                              14
+#define GPIO28_FUN_DEBUG_24                                     15
+#define GPIO28_FUN_FEM_GPIO_3                                   16
+#define GPIO28_FUN_USB_SUS_EXT                                  17
+#define GPIO28_FUN_USB_ENUM                                     18
+#define GPIO28_FUN_RMII_RX_DV                                   19
+#define GPIO28_FUN_QDEC0_B                                      20
+#define GPIO28_FUN_ROW_I_4                                      21
+#define GPIO28_FUN_COL_O_8                                      22
+#define GPIO28_FUN_CAM_REF_CLK                                  23
+/* GPIO29 function definition */
+#define GPIO29_FUN_CLK_OUT_1                                    0
+#define GPIO29_FUN_BT_PRI                                       1
+#define GPIO29_FUN_UNUSED2                                      2
+#define GPIO29_FUN_I2S0_FS                                      3
+#define GPIO29_FUN_SPI_0_MOSI_SPI_0_MISO                        4
+#define GPIO29_FUN_I2C0_SDA                                     6
+#define GPIO29_FUN_UART_SIG5_UART_SIG1                          7
+#define GPIO29_FUN_PWM_CH4                                      8
+#define GPIO29_FUN_PIX_DAT5                                     9
+#define GPIO29_FUN_UNUSED10                                     10
+#define GPIO29_FUN_REG_GPIO_29                                  11
+#define GPIO29_FUN_RF_TEST_24                                   12
+#define GPIO29_FUN_UNUSED13                                     13
+#define GPIO29_FUN_E21_TDI_E21_TDO                              14
+#define GPIO29_FUN_DEBUG_25                                     15
+#define GPIO29_FUN_FEM_GPIO_4                                   16
+#define GPIO29_FUN_USB_ENUM_EXT                                 17
+#define GPIO29_FUN_USB_OEB                                      18
+#define GPIO29_FUN_UNUSED19                                     19
+#define GPIO29_FUN_QDEC0_LED                                    20
+#define GPIO29_FUN_ROW_I_5                                      21
+#define GPIO29_FUN_COL_O_9                                      22
+#define GPIO29_FUN_CAM_RESET                                    23
+/* GPIO30 function definition */
+#define GPIO30_FUN_CLK_OUT_0                                    0
+#define GPIO30_FUN_BT_ABORT                                     1
+#define GPIO30_FUN_UNUSED2                                      2
+#define GPIO30_FUN_I2S0_DIO_I2S0_DO                             3
+#define GPIO30_FUN_SPI_0_SS                                     4
+#define GPIO30_FUN_I2C0_SCL                                     6
+#define GPIO30_FUN_UART_SIG6_UART_SIG2                          7
+#define GPIO30_FUN_PWM_CH0                                      8
+#define GPIO30_FUN_PIX_DAT6                                     9
+#define GPIO30_FUN_UNUSED10                                     10
+#define GPIO30_FUN_REG_GPIO_30                                  11
+#define GPIO30_FUN_RF_TEST_25                                   12
+#define GPIO30_FUN_UNUSED13                                     13
+#define GPIO30_FUN_E21_TCK_E21_TMS                              14
+#define GPIO30_FUN_DEBUG_26                                     15
+#define GPIO30_FUN_FEM_GPIO_0                                   16
+#define GPIO30_FUN_USB_TX_DN_USB_RX_DN                          17
+#define GPIO30_FUN_VOP                                          18
+#define GPIO30_FUN_UNUSED19                                     19
+#define GPIO30_FUN_QDEC1_A                                      20
+#define GPIO30_FUN_ROW_I_6                                      21
+#define GPIO30_FUN_COL_O_10                                     22
+#define GPIO30_FUN_CAM_PWRDN                                    23
+/* GPIO31 function definition */
+#define GPIO31_FUN_CLK_OUT_1                                    0
+#define GPIO31_FUN_BT_ACTIVE                                    1
+#define GPIO31_FUN_UNUSED2                                      2
+#define GPIO31_FUN_I2S0_RCLK_O_I2S0_DI                          3
+#define GPIO31_FUN_SPI_0_SCLK                                   4
+#define GPIO31_FUN_I2C0_SDA                                     6
+#define GPIO31_FUN_UART_SIG7_UART_SIG3                          7
+#define GPIO31_FUN_PWM_CH1                                      8
+#define GPIO31_FUN_PIX_DAT7                                     9
+#define GPIO31_FUN_UNUSED10                                     10
+#define GPIO31_FUN_REG_GPIO_31                                  11
+#define GPIO31_FUN_RF_TEST_26                                   12
+#define GPIO31_FUN_UNUSED13                                     13
+#define GPIO31_FUN_E21_TDO_E21_TDI                              14
+#define GPIO31_FUN_DEBUG_27                                     15
+#define GPIO31_FUN_FEM_GPIO_1                                   16
+#define GPIO31_FUN_USB_TX_OE                                    17
+#define GPIO31_FUN_VOM                                          18
+#define GPIO31_FUN_UNUSED19                                     19
+#define GPIO31_FUN_QDEC1_B                                      20
+#define GPIO31_FUN_ROW_I_7                                      21
+#define GPIO31_FUN_COL_O_11                                     22
+#define GPIO31_FUN_CAM_REF_CLK                                  23
+
+#endif  /*__BL702_GPIO_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_hbn.h b/drivers/bl702_driver/std_drv/inc/bl702_hbn.h
new file mode 100644
index 00000000..57f57b77
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_hbn.h
@@ -0,0 +1,560 @@
+/**
+  ******************************************************************************
+  * @file    bl702_hbn.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_HBN_H__
+#define __BL702_HBN_H__
+
+#include "hbn_reg.h"
+#include "bl702_aon.h"
+#include "bl702_sflash.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  HBN
+ *  @{
+ */
+
+/** @defgroup  HBN_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief HBN PIR interrupt configuration type definition
+ */
+typedef struct {
+    BL_Fun_Type lowIntEn;                   /*!< Low will trigger interrupt */
+    BL_Fun_Type highIntEn;                  /*!< High will trigger interrupt */
+}HBN_PIR_INT_CFG_Type;
+
+/**
+ *  @brief HBN PIR low pass filter type definition
+ */
+typedef enum {
+    HBN_PIR_LPF_DIV1,                       /*!< HBN PIR lpf div 1 */
+    HBN_PIR_LPF_DIV2,                       /*!< HBN PIR lpf div 2 */
+}HBN_PIR_LPF_Type;
+
+/**
+ *  @brief HBN PIR high pass filter type definition
+ */
+typedef enum {
+    HBN_PIR_HPF_METHOD0,                    /*!< HBN PIR hpf calc method 0, 1-z^-1 */
+    HBN_PIR_HPF_METHOD1,                    /*!< HBN PIR hpf calc method 1, 1-z^-2 */
+    HBN_PIR_HPF_METHOD2,                    /*!< HBN PIR hpf calc method 2, 1-z^-3 */
+}HBN_PIR_HPF_Type;
+
+/**
+ *  @brief HBN BOR threshold type definition
+ */
+typedef enum {
+    HBN_BOR_THRES_2P0V,                     /*!< BOR threshold 2.0V */
+    HBN_BOR_THRES_2P4V,                     /*!< BOR threshold 2.4V */
+}HBN_BOR_THRES_Type;
+
+/**
+ *  @brief HBN BOR mode type definition
+ */
+typedef enum {
+    HBN_BOR_MODE_POR_INDEPENDENT,           /*!< POR is independent of BOR */
+    HBN_BOR_MODE_POR_RELEVANT,              /*!< POR is relevant to BOR */
+}HBN_BOR_MODE_Type;
+
+/**
+ *  @brief HBN 32K clock type definition
+ */
+typedef enum {
+    HBN_32K_RC=0,                           /*!< HBN use rc 32k */
+    HBN_32K_XTAL,                           /*!< HBN use xtal 32k */
+    HBN_32K_DIG=3,                          /*!< HBN use dig 32k */
+}HBN_32K_CLK_Type;
+
+/**
+ *  @brief HBN xclk clock type definition
+ */
+typedef enum {
+    HBN_XCLK_CLK_RC32M,                     /*!< use RC32M as xclk clock */
+    HBN_XCLK_CLK_XTAL,                      /*!< use XTAL as xclk clock */
+}HBN_XCLK_CLK_Type;
+
+/**
+ *  @brief HBN root clock type definition
+ */
+typedef enum {
+    HBN_ROOT_CLK_RC32M,                     /*!< use RC32M as root clock */
+    HBN_ROOT_CLK_XTAL,                      /*!< use XTAL as root clock */
+    HBN_ROOT_CLK_DLL,                       /*!< use DLL as root clock */
+}HBN_ROOT_CLK_Type;
+
+/**
+ *  @brief HBN UART clock type definition
+ */
+typedef enum {
+    HBN_UART_CLK_FCLK=0,                    /*!< Select FCLK as UART clock */
+    HBN_UART_CLK_96M,                       /*!< Select 96M as UART clock */
+}HBN_UART_CLK_Type;
+
+/**
+ *  @brief HBN RTC interrupt delay type definition
+ */
+typedef enum {
+    HBN_RTC_INT_DELAY_32T=0,                /*!< HBN RTC interrupt delay 32T */
+    HBN_RTC_INT_DELAY_0T=1,                 /*!< HBN RTC interrupt delay 0T */
+}HBN_RTC_INT_Delay_Type;
+
+/**
+ *  @brief HBN interrupt type definition
+ */
+typedef enum {
+    HBN_INT_GPIO9=0,                        /*!< HBN interrupt type: GPIO9 */
+    HBN_INT_GPIO10=1,                       /*!< HBN interrupt type: GPIO10 */
+    HBN_INT_GPIO11=2,                       /*!< HBN interrupt type: GPIO11 */
+    HBN_INT_GPIO12=3,                       /*!< HBN interrupt type: GPIO12 */
+    HBN_INT_GPIO13=4,                       /*!< HBN interrupt type: GPIO13 */
+    HBN_INT_RTC=16,                         /*!< HBN interrupt type: RTC */
+    HBN_INT_PIR,                            /*!< HBN interrupt type: PIR */
+    HBN_INT_BOR,                            /*!< HBN interrupt type: BOR */
+    HBN_INT_ACOMP0=20,                      /*!< HBN interrupt type: ACOMP0 */
+    HBN_INT_ACOMP1=22,                      /*!< HBN interrupt type: ACOMP1 */
+}HBN_INT_Type;
+
+/**
+ *  @brief HBN acomp interrupt type definition
+ */
+typedef enum {
+    HBN_ACOMP_INT_EDGE_POSEDGE=0,           /*!< HBN acomp interrupt edge posedge */
+    HBN_ACOMP_INT_EDGE_NEGEDGE=1,           /*!< HBN acomp interrupt edge negedge */
+}HBN_ACOMP_INT_EDGE_Type;
+
+/**
+ *  @brief HBN reset event type definition
+ */
+typedef enum {
+    HBN_RST_EVENT_POR_OUT,                  /*!< por_out event */
+    HBN_RST_EVENT_EXT_RST_N,                /*!< ext_rst_n event */
+    HBN_RST_EVENT_SW_RST,                   /*!< sw_rst event */
+    HBN_RST_EVENT_PWR_RST_N,                /*!< pwr_rst_n event */
+    HBN_RST_EVENT_BOR_OUT,                  /*!< bor_out_ event */
+}HBN_RST_EVENT_Type;
+
+/**
+ *  @brief HBN GPIO interrupt trigger type definition
+ */
+typedef enum {
+    HBN_GPIO_INT_TRIGGER_SYNC_FALLING_EDGE, /*!< HBN GPIO INT trigger type: sync falling edge trigger */
+    HBN_GPIO_INT_TRIGGER_SYNC_RISING_EDGE,  /*!< HBN GPIO INT trigger type: sync rising edge trigger */
+    HBN_GPIO_INT_TRIGGER_SYNC_LOW_LEVEL,    /*!< HBN GPIO INT trigger type: sync low level trigger */
+    HBN_GPIO_INT_TRIGGER_SYNC_HIGH_LEVEL,   /*!< HBN GPIO INT trigger type: sync high level trigger */
+    HBN_GPIO_INT_TRIGGER_ASYNC_FALLING_EDGE,    /*!< HBN GPIO INT trigger type: async falling edge trigger */
+    HBN_GPIO_INT_TRIGGER_ASYNC_RISING_EDGE, /*!< HBN GPIO INT trigger type: async rising edge trigger */
+    HBN_GPIO_INT_TRIGGER_ASYNC_LOW_LEVEL,   /*!< HBN GPIO INT trigger type: async low level trigger */
+    HBN_GPIO_INT_TRIGGER_ASYNC_HIGH_LEVEL,  /*!< HBN GPIO INT trigger type: async high level trigger */
+}HBN_GPIO_INT_Trigger_Type;
+
+/**
+ *  @brief HBN OUT0 interrupt type definition
+ */
+typedef enum {
+    HBN_OUT0_INT_GPIO9=0,                   /*!< HBN out 0 interrupt type: GPIO9 */
+    HBN_OUT0_INT_GPIO10=1,                  /*!< HBN out 0 interrupt type: GPIO10 */
+    HBN_OUT0_INT_GPIO11=2,                  /*!< HBN out 0 interrupt type: GPIO11 */
+    HBN_OUT0_INT_GPIO12=3,                  /*!< HBN out 0 interrupt type: GPIO12 */
+    HBN_OUT0_INT_GPIO13=4,                  /*!< HBN out 0 interrupt type: GPIO13 */
+    HBN_OUT0_INT_RTC,                       /*!< HBN out 0 interrupt type: RTC */
+    HBN_OUT0_MAX,                           /*!< HBN out 0 max num */
+}HBN_OUT0_INT_Type;
+
+/**
+ *  @brief HBN OUT0 interrupt type definition
+ */
+typedef enum {
+    HBN_OUT1_INT_PIR,                       /*!< HBN out 1 interrupt type: PIR */
+    HBN_OUT1_INT_BOR,                       /*!< HBN out 1 interrupt type: BOR */
+    HBN_OUT1_INT_ACOMP0,                    /*!< HBN out 1 interrupt type: ACOMP0 */
+    HBN_OUT1_INT_ACOMP1,                    /*!< HBN out 1 interrupt type: ACOMP1 */
+    HBN_OUT1_MAX,                           /*!< HBN out 1 max num */
+}HBN_OUT1_INT_Type;
+
+/**
+ *  @brief HBN LDO level type definition
+ */
+typedef enum {
+    HBN_LDO_LEVEL_0P60V=0,                  /*!< HBN LDO voltage 0.60V */
+    HBN_LDO_LEVEL_0P65V=1,                  /*!< HBN LDO voltage 0.65V */
+    HBN_LDO_LEVEL_0P70V=2,                  /*!< HBN LDO voltage 0.70V */
+    HBN_LDO_LEVEL_0P75V=3,                  /*!< HBN LDO voltage 0.75V */
+    HBN_LDO_LEVEL_0P80V=4,                  /*!< HBN LDO voltage 0.80V */
+    HBN_LDO_LEVEL_0P85V=5,                  /*!< HBN LDO voltage 0.85V */
+    HBN_LDO_LEVEL_0P90V=6,                  /*!< HBN LDO voltage 0.90V */
+    HBN_LDO_LEVEL_0P95V=7,                  /*!< HBN LDO voltage 0.95V */
+    HBN_LDO_LEVEL_1P00V=8,                  /*!< HBN LDO voltage 1.00V */
+    HBN_LDO_LEVEL_1P05V=9,                  /*!< HBN LDO voltage 1.05V */
+    HBN_LDO_LEVEL_1P10V=10,                 /*!< HBN LDO voltage 1.10V */
+    HBN_LDO_LEVEL_1P15V=11,                 /*!< HBN LDO voltage 1.15V */
+    HBN_LDO_LEVEL_1P20V=12,                 /*!< HBN LDO voltage 1.20V */
+    HBN_LDO_LEVEL_1P25V=13,                 /*!< HBN LDO voltage 1.25V */
+    HBN_LDO_LEVEL_1P30V=14,                 /*!< HBN LDO voltage 1.30V */
+    HBN_LDO_LEVEL_1P35V=15,                 /*!< HBN LDO voltage 1.35V */
+}HBN_LDO_LEVEL_Type;
+
+/**
+ *  @brief HBN LDO11RT drive strength type definition
+ */
+typedef enum {
+    HBN_LDO11RT_DRIVE_STRENGTH_5_50UA=0,    /*!< HBN LDO11RT drive strength 0: 5uA to 50uA */
+    HBN_LDO11RT_DRIVE_STRENGTH_10_100UA=1,  /*!< HBN LDO11RT drive strength 1: 10uA to 100uA */
+    HBN_LDO11RT_DRIVE_STRENGTH_15_150UA=2,  /*!< HBN LDO11RT drive strength 2: 15uA to 150uA */
+    HBN_LDO11RT_DRIVE_STRENGTH_25_250UA=3,  /*!< HBN LDO11RT drive strength 3: 25uA to 250uA */
+}HBN_LDO11RT_DRIVE_STRENGTH_Type;
+
+/**
+ *  @brief HBN level type definition
+ */
+typedef enum {
+    HBN_LEVEL_0,                            /*!< HBN pd_core */
+    HBN_LEVEL_1,                            /*!< HBN pd_aon_hbncore + pd_core */
+    HBN_LEVEL_2,                            /*!< HBN pd_aon_hbncore + pd_core */
+    HBN_LEVEL_3,                            /*!< HBN pd_aon_hbnrtc + pd_aon_hbncore + pd_core */
+}HBN_LEVEL_Type;
+
+/**
+ *  @brief HBN BOR configuration type definition
+ */
+typedef struct {
+    uint8_t enableBor;                      /*!< Enable BOR or not */
+    uint8_t enableBorInt;                   /*!< Enable BOR interrupt or not */
+    uint8_t borThreshold;                   /*!< BOR threshold */
+    uint8_t enablePorInBor;                 /*!< Enable POR when BOR occure or not */
+}HBN_BOR_CFG_Type;
+
+/**
+ *  @brief HBN APP configuration type definition
+ */
+typedef struct {
+    uint8_t useXtal32k;                     /*!< Whether use xtal 32K as 32K clock source,otherwise use rc32k */
+    uint32_t sleepTime;                     /*!< HBN sleep time */
+    uint8_t gpioWakeupSrc;                  /*!< GPIO Wakeup source */
+    HBN_GPIO_INT_Trigger_Type gpioTrigType; /*!< GPIO Triger type */
+    SPI_Flash_Cfg_Type *flashCfg;           /*!< Flash config pointer, used when power down flash */
+    uint8_t flashPinCfg;                    /*!< 0 ext flash 23-28, 1 internal flash 23-28, 2 internal flash 23-28, 3 ext flash 17-22 */
+    HBN_LEVEL_Type hbnLevel;                /*!< HBN level */
+    HBN_LDO_LEVEL_Type ldoLevel;            /*!< LDO level */
+}HBN_APP_CFG_Type;
+
+/*@} end of group HBN_Public_Types */
+
+/** @defgroup  HBN_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  HBN_PIR_LPF_TYPE
+ *  @{
+ */
+#define IS_HBN_PIR_LPF_TYPE(type)                        (((type) == HBN_PIR_LPF_DIV1) || \
+                                                          ((type) == HBN_PIR_LPF_DIV2))
+
+/** @defgroup  HBN_PIR_HPF_TYPE
+ *  @{
+ */
+#define IS_HBN_PIR_HPF_TYPE(type)                        (((type) == HBN_PIR_HPF_METHOD0) || \
+                                                          ((type) == HBN_PIR_HPF_METHOD1) || \
+                                                          ((type) == HBN_PIR_HPF_METHOD2))
+
+/** @defgroup  HBN_BOR_THRES_TYPE
+ *  @{
+ */
+#define IS_HBN_BOR_THRES_TYPE(type)                      (((type) == HBN_BOR_THRES_2P0V) || \
+                                                          ((type) == HBN_BOR_THRES_2P4V))
+
+/** @defgroup  HBN_BOR_MODE_TYPE
+ *  @{
+ */
+#define IS_HBN_BOR_MODE_TYPE(type)                       (((type) == HBN_BOR_MODE_POR_INDEPENDENT) || \
+                                                          ((type) == HBN_BOR_MODE_POR_RELEVANT))
+
+/** @defgroup  HBN_32K_CLK_TYPE
+ *  @{
+ */
+#define IS_HBN_32K_CLK_TYPE(type)                        (((type) == HBN_32K_RC) || \
+                                                          ((type) == HBN_32K_XTAL) || \
+                                                          ((type) == HBN_32K_DIG))
+
+/** @defgroup  HBN_XCLK_CLK_TYPE
+ *  @{
+ */
+#define IS_HBN_XCLK_CLK_TYPE(type)                       (((type) == HBN_XCLK_CLK_RC32M) || \
+                                                          ((type) == HBN_XCLK_CLK_XTAL))
+
+/** @defgroup  HBN_ROOT_CLK_TYPE
+ *  @{
+ */
+#define IS_HBN_ROOT_CLK_TYPE(type)                       (((type) == HBN_ROOT_CLK_RC32M) || \
+                                                          ((type) == HBN_ROOT_CLK_XTAL) || \
+                                                          ((type) == HBN_ROOT_CLK_DLL))
+
+/** @defgroup  HBN_UART_CLK_TYPE
+ *  @{
+ */
+#define IS_HBN_UART_CLK_TYPE(type)                       (((type) == HBN_UART_CLK_FCLK) || \
+                                                          ((type) == HBN_UART_CLK_96M))
+
+/** @defgroup  HBN_RTC_INT_DELAY_TYPE
+ *  @{
+ */
+#define IS_HBN_RTC_INT_DELAY_TYPE(type)                  (((type) == HBN_RTC_INT_DELAY_32T) || \
+                                                          ((type) == HBN_RTC_INT_DELAY_0T))
+
+/** @defgroup  HBN_INT_TYPE
+ *  @{
+ */
+#define IS_HBN_INT_TYPE(type)                            (((type) == HBN_INT_GPIO9) || \
+                                                          ((type) == HBN_INT_GPIO10) || \
+                                                          ((type) == HBN_INT_GPIO11) || \
+                                                          ((type) == HBN_INT_GPIO12) || \
+                                                          ((type) == HBN_INT_GPIO13) || \
+                                                          ((type) == HBN_INT_RTC) || \
+                                                          ((type) == HBN_INT_PIR) || \
+                                                          ((type) == HBN_INT_BOR) || \
+                                                          ((type) == HBN_INT_ACOMP0) || \
+                                                          ((type) == HBN_INT_ACOMP1))
+
+/** @defgroup  HBN_ACOMP_INT_EDGE_TYPE
+ *  @{
+ */
+#define IS_HBN_ACOMP_INT_EDGE_TYPE(type)                 (((type) == HBN_ACOMP_INT_EDGE_POSEDGE) || \
+                                                          ((type) == HBN_ACOMP_INT_EDGE_NEGEDGE))
+
+/** @defgroup  HBN_RST_EVENT_TYPE
+ *  @{
+ */
+#define IS_HBN_RST_EVENT_TYPE(type)                      (((type) == HBN_RST_EVENT_POR_OUT) || \
+                                                          ((type) == HBN_RST_EVENT_EXT_RST_N) || \
+                                                          ((type) == HBN_RST_EVENT_SW_RST) || \
+                                                          ((type) == HBN_RST_EVENT_PWR_RST_N) || \
+                                                          ((type) == HBN_RST_EVENT_BOR_OUT))
+
+/** @defgroup  HBN_GPIO_INT_TRIGGER_TYPE
+ *  @{
+ */
+#define IS_HBN_GPIO_INT_TRIGGER_TYPE(type)               (((type) == HBN_GPIO_INT_TRIGGER_SYNC_FALLING_EDGE) || \
+                                                          ((type) == HBN_GPIO_INT_TRIGGER_SYNC_RISING_EDGE) || \
+                                                          ((type) == HBN_GPIO_INT_TRIGGER_SYNC_LOW_LEVEL) || \
+                                                          ((type) == HBN_GPIO_INT_TRIGGER_SYNC_HIGH_LEVEL) || \
+                                                          ((type) == HBN_GPIO_INT_TRIGGER_ASYNC_FALLING_EDGE) || \
+                                                          ((type) == HBN_GPIO_INT_TRIGGER_ASYNC_RISING_EDGE) || \
+                                                          ((type) == HBN_GPIO_INT_TRIGGER_ASYNC_LOW_LEVEL) || \
+                                                          ((type) == HBN_GPIO_INT_TRIGGER_ASYNC_HIGH_LEVEL))
+
+/** @defgroup  HBN_OUT0_INT_TYPE
+ *  @{
+ */
+#define IS_HBN_OUT0_INT_TYPE(type)                       (((type) == HBN_OUT0_INT_GPIO9) || \
+                                                          ((type) == HBN_OUT0_INT_GPIO10) || \
+                                                          ((type) == HBN_OUT0_INT_GPIO11) || \
+                                                          ((type) == HBN_OUT0_INT_GPIO12) || \
+                                                          ((type) == HBN_OUT0_INT_GPIO13) || \
+                                                          ((type) == HBN_OUT0_INT_RTC) || \
+                                                          ((type) == HBN_OUT0_MAX))
+
+/** @defgroup  HBN_OUT1_INT_TYPE
+ *  @{
+ */
+#define IS_HBN_OUT1_INT_TYPE(type)                       (((type) == HBN_OUT1_INT_PIR) || \
+                                                          ((type) == HBN_OUT1_INT_BOR) || \
+                                                          ((type) == HBN_OUT1_INT_ACOMP0) || \
+                                                          ((type) == HBN_OUT1_INT_ACOMP1) || \
+                                                          ((type) == HBN_OUT1_MAX))
+
+/** @defgroup  HBN_LDO_LEVEL_TYPE
+ *  @{
+ */
+#define IS_HBN_LDO_LEVEL_TYPE(type)                      (((type) == HBN_LDO_LEVEL_0P60V) || \
+                                                          ((type) == HBN_LDO_LEVEL_0P65V) || \
+                                                          ((type) == HBN_LDO_LEVEL_0P70V) || \
+                                                          ((type) == HBN_LDO_LEVEL_0P75V) || \
+                                                          ((type) == HBN_LDO_LEVEL_0P80V) || \
+                                                          ((type) == HBN_LDO_LEVEL_0P85V) || \
+                                                          ((type) == HBN_LDO_LEVEL_0P90V) || \
+                                                          ((type) == HBN_LDO_LEVEL_0P95V) || \
+                                                          ((type) == HBN_LDO_LEVEL_1P00V) || \
+                                                          ((type) == HBN_LDO_LEVEL_1P05V) || \
+                                                          ((type) == HBN_LDO_LEVEL_1P10V) || \
+                                                          ((type) == HBN_LDO_LEVEL_1P15V) || \
+                                                          ((type) == HBN_LDO_LEVEL_1P20V) || \
+                                                          ((type) == HBN_LDO_LEVEL_1P25V) || \
+                                                          ((type) == HBN_LDO_LEVEL_1P30V) || \
+                                                          ((type) == HBN_LDO_LEVEL_1P35V))
+
+/** @defgroup  HBN_LDO11RT_DRIVE_STRENGTH_TYPE
+ *  @{
+ */
+#define IS_HBN_LDO11RT_DRIVE_STRENGTH_TYPE(type)         (((type) == HBN_LDO11RT_DRIVE_STRENGTH_5_50UA) || \
+                                                          ((type) == HBN_LDO11RT_DRIVE_STRENGTH_10_100UA) || \
+                                                          ((type) == HBN_LDO11RT_DRIVE_STRENGTH_15_150UA) || \
+                                                          ((type) == HBN_LDO11RT_DRIVE_STRENGTH_25_250UA))
+
+/** @defgroup  HBN_LEVEL_TYPE
+ *  @{
+ */
+#define IS_HBN_LEVEL_TYPE(type)                          (((type) == HBN_LEVEL_0) || \
+                                                          ((type) == HBN_LEVEL_1) || \
+                                                          ((type) == HBN_LEVEL_2) || \
+                                                          ((type) == HBN_LEVEL_3))
+
+/*@} end of group HBN_Public_Constants */
+
+/** @defgroup  HBN_Public_Macros
+ *  @{
+ */
+#define HBN_RAM_SIZE                    (4*1024)
+#define HBN_RTC_COMP_BIT0_39            0x01
+#define HBN_RTC_COMP_BIT0_23            0x02
+#define HBN_RTC_COMP_BIT13_39           0x04
+#define HBN_STATUS_ENTER_FLAG           0x4e424845
+#define HBN_STATUS_WAKEUP_FLAG          0x4e424857
+#define HBN_WAKEUP_GPIO_NONE            0x00
+#define HBN_WAKEUP_GPIO_10              0x02
+#define HBN_WAKEUP_GPIO_11              0x04
+#define HBN_WAKEUP_GPIO_12              0x08
+#define HBN_WAKEUP_GPIO_13              0x10
+#define HBN_WAKEUP_GPIO_ALL             0x1E
+
+/*@} end of group HBN_Public_Macros */
+
+/** @defgroup  HBN_Public_Functions
+ *  @{
+ */
+/*----------*/
+#ifndef BFLB_USE_HAL_DRIVER
+void HBN_OUT0_IRQHandler(void);
+void HBN_OUT1_IRQHandler(void);
+#endif
+/*----------*/
+void HBN_Mode_Enter(HBN_APP_CFG_Type *cfg);
+void HBN_Power_Down_Flash(SPI_Flash_Cfg_Type *flashCfg);
+void HBN_Enable_Ext(uint8_t aGPIOIeCfg,HBN_LDO_LEVEL_Type ldoLevel,HBN_LEVEL_Type hbnLevel);
+BL_Err_Type HBN_Reset(void);
+BL_Err_Type HBN_App_Reset(uint8_t npXtalType,uint8_t bclkDiv,uint8_t apXtalType,uint8_t fclkDiv);
+BL_Err_Type HBN_Disable(void);
+/*----------*/
+BL_Err_Type HBN_PIR_Enable(void);
+BL_Err_Type HBN_PIR_Disable(void);
+BL_Err_Type HBN_PIR_INT_Config(HBN_PIR_INT_CFG_Type* pirIntCfg);
+BL_Err_Type HBN_PIR_LPF_Sel(HBN_PIR_LPF_Type lpf);
+BL_Err_Type HBN_PIR_HPF_Sel(HBN_PIR_HPF_Type hpf);
+BL_Err_Type HBN_Set_PIR_Threshold(uint16_t threshold);
+uint16_t HBN_Get_PIR_Threshold(void);
+BL_Err_Type HBN_Set_PIR_Interval(uint16_t interval);
+uint16_t HBN_Get_PIR_Interval(void);
+/*----------*/
+BL_Sts_Type HBN_Get_BOR_OUT_State(void);
+BL_Err_Type HBN_Set_BOR_Config(uint8_t enable,HBN_BOR_THRES_Type threshold,HBN_BOR_MODE_Type mode);
+/*----------*/
+BL_Err_Type HBN_Set_Ldo11_Aon_Vout(HBN_LDO_LEVEL_Type ldoLevel);
+BL_Err_Type HBN_Set_Ldo11_Rt_Vout(HBN_LDO_LEVEL_Type ldoLevel);
+BL_Err_Type HBN_Set_Ldo11_Soc_Vout(HBN_LDO_LEVEL_Type ldoLevel);
+BL_Err_Type HBN_Set_Ldo11_All_Vout(HBN_LDO_LEVEL_Type ldoLevel);
+BL_Err_Type HBN_Set_Ldo11rt_Drive_Strength(HBN_LDO11RT_DRIVE_STRENGTH_Type strength);
+/*----------*/
+BL_Err_Type HBN_32K_Sel(HBN_32K_CLK_Type clkType);
+BL_Err_Type HBN_Set_UART_CLK_Sel(HBN_UART_CLK_Type clkSel);
+BL_Err_Type HBN_Set_XCLK_CLK_Sel(HBN_XCLK_CLK_Type xClk);
+BL_Err_Type HBN_Set_ROOT_CLK_Sel(HBN_ROOT_CLK_Type rootClk);
+/*----------*/
+BL_Err_Type HBN_Set_HRAM_slp(void);
+BL_Err_Type HBN_Set_HRAM_Ret(void);
+/*----------*/
+uint32_t HBN_Get_Status_Flag(void);
+BL_Err_Type HBN_Set_Status_Flag(uint32_t flag);
+uint32_t HBN_Get_Wakeup_Addr(void);
+BL_Err_Type HBN_Set_Wakeup_Addr(uint32_t addr);
+/*----------*/
+BL_Err_Type HBN_Clear_RTC_Counter(void);
+BL_Err_Type HBN_Enable_RTC_Counter(void);
+BL_Err_Type HBN_Set_RTC_Timer(HBN_RTC_INT_Delay_Type delay,uint32_t compValLow,uint32_t compValHigh,uint8_t compMode);
+BL_Err_Type HBN_Get_RTC_Timer_Val(uint32_t *valLow,uint32_t *valHigh);
+BL_Err_Type HBN_Clear_RTC_IRQ(void);
+/*----------*/
+BL_Err_Type HBN_GPIO_INT_Enable(HBN_GPIO_INT_Trigger_Type gpioIntTrigType);
+BL_Err_Type HBN_GPIO_INT_Disable(void);
+BL_Sts_Type HBN_Get_INT_State(HBN_INT_Type irqType);
+uint8_t HBN_Get_Pin_Wakeup_Mode(void);
+BL_Err_Type HBN_Clear_IRQ(HBN_INT_Type irqType);
+BL_Err_Type HBN_Hw_Pu_Pd_Cfg(uint8_t enable);
+BL_Err_Type HBN_Aon_Pad_IeSmt_Cfg(uint8_t padCfg);
+BL_Err_Type HBN_Pin_WakeUp_Mask(uint8_t maskVal);
+/*----------*/
+BL_Err_Type HBN_Enable_AComp0_IRQ(HBN_ACOMP_INT_EDGE_Type edge);
+BL_Err_Type HBN_Disable_AComp0_IRQ(HBN_ACOMP_INT_EDGE_Type edge);
+BL_Err_Type HBN_Enable_AComp1_IRQ(HBN_ACOMP_INT_EDGE_Type edge);
+BL_Err_Type HBN_Disable_AComp1_IRQ(HBN_ACOMP_INT_EDGE_Type edge);
+/*----------*/
+BL_Err_Type HBN_Enable_BOR_IRQ(void);
+BL_Err_Type HBN_Disable_BOR_IRQ(void);
+/*----------*/
+BL_Sts_Type HBN_Get_Reset_Event(HBN_RST_EVENT_Type event);
+BL_Err_Type HBN_Clear_Reset_Event(void);
+/*----------*/
+BL_Err_Type HBN_Out0_IRQHandler_Install(void);
+BL_Err_Type HBN_Out0_Callback_Install(HBN_OUT0_INT_Type intType,intCallback_Type* cbFun);
+BL_Err_Type HBN_Out1_IRQHandler_Install(void);
+BL_Err_Type HBN_Out1_Callback_Install(HBN_OUT1_INT_Type intType,intCallback_Type* cbFun);
+/*----------*/
+BL_Err_Type HBN_GPIO_Dbg_Pull_Cfg(BL_Fun_Type pupdEn,BL_Fun_Type dlyEn,
+                                                 uint8_t dlySec,HBN_INT_Type gpioIrq,BL_Mask_Type gpioMask);
+/*----------*/
+BL_Err_Type HBN_Power_On_Xtal_32K(void);
+BL_Err_Type HBN_Power_Off_Xtal_32K(void);
+BL_Err_Type HBN_Power_On_RC32K(void);
+BL_Err_Type HBN_Power_Off_RC32K(void);
+BL_Err_Type HBN_Trim_RC32K(void);
+BL_Err_Type HBN_Set_Pad_23_28_Pullnone(void);
+BL_Err_Type HBN_Set_Pad_23_28_Pullup(void);
+BL_Err_Type HBN_Set_Pad_23_28_Pulldown(void);
+BL_Err_Type HBN_Set_Pad_23_28_ActiveIE(void);
+BL_Err_Type HBN_Set_BOR_Cfg(HBN_BOR_CFG_Type *cfg);
+/*----------*/
+void HBN_Enable(uint8_t aGPIOIeCfg,HBN_LDO_LEVEL_Type ldoLevel,HBN_LEVEL_Type hbnLevel);
+/*----------*/;
+
+/*@} end of group HBN_Public_Functions */
+
+/*@} end of group HBN */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_HBN_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_i2c.h b/drivers/bl702_driver/std_drv/inc/bl702_i2c.h
new file mode 100644
index 00000000..15d157c5
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_i2c.h
@@ -0,0 +1,194 @@
+/**
+  ******************************************************************************
+  * @file    bl702_i2c.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_I2C_H__
+#define __BL702_I2C_H__
+
+#include "i2c_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  I2C
+ *  @{
+ */
+
+/** @defgroup  I2C_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief I2C No. type definition
+ */
+typedef enum {
+    I2C0_ID = 0,                             /*!< I2C0 define */
+    I2C_ID_MAX,                              /*!< I2C max define */
+}I2C_ID_Type;
+
+/**
+ *  @brief I2C read/write type definition
+ */
+typedef enum {
+    I2C_WRITE = 0,                           /*!< I2C write direction */
+    I2C_READ,                                /*!< I2C read direction */
+}I2C_Direction_Type;
+
+/**
+ *  @brief I2C interrupt type definition
+ */
+typedef enum {
+    I2C_TRANS_END_INT,                       /*!< I2C transfer end interrupt */
+    I2C_TX_FIFO_READY_INT,                   /*!< I2C TX fifo ready interrupt */
+    I2C_RX_FIFO_READY_INT,                   /*!< I2C RX fifo ready interrupt */
+    I2C_NACK_RECV_INT,                       /*!< I2C nack received interrupt */
+    I2C_ARB_LOST_INT,                        /*!< I2C arbitration lost interrupt */
+    I2C_FIFO_ERR_INT,                        /*!< I2C TX/RX FIFO error interrupt */
+    I2C_INT_ALL,                             /*!< I2C interrupt all type */
+}I2C_INT_Type;
+
+/**
+ *  @brief I2S start condition phase structure type definition
+ */
+typedef struct {
+    uint8_t len0;                            /*!< Length of START condition phase 0 */
+    uint8_t len1;                            /*!< Length of START condition phase 1 */
+    uint8_t len2;                            /*!< Length of START condition phase 2 */
+    uint8_t len3;                            /*!< Length of START condition phase 3 */
+}I2C_Start_Condition_Phase_Type;
+
+/**
+ *  @brief I2S stop condition phase structure type definition
+ */
+typedef struct {
+    uint8_t len0;                            /*!< Length of STOP condition phase 0 */
+    uint8_t len1;                            /*!< Length of STOP condition phase 1 */
+    uint8_t len2;                            /*!< Length of STOP condition phase 2 */
+    uint8_t len3;                            /*!< Length of STOP condition phase 3 */
+}I2C_Stop_Condition_Phase_Type;
+
+/**
+ *  @brief I2S data phase structure type definition
+ */
+typedef struct {
+    uint8_t len0;                            /*!< Length of DATA phase 0 */
+    uint8_t len1;                            /*!< Length of DATA phase 1 */
+    uint8_t len2;                            /*!< Length of DATA phase 2 */
+    uint8_t len3;                            /*!< Length of DATA phase 3 */
+}I2C_Data_Phase_Type;
+
+/**
+ *  @brief I2S transfer structure type definition
+ */
+typedef struct {
+    uint8_t slaveAddr;                       /*!< I2C slave address */
+    BL_Fun_Type stopEveryByte;               /*!< I2C all data byte with stop bit */
+    uint8_t subAddrSize;                     /*!< Specifies the size of I2C sub address section */
+    uint32_t subAddr;                        /*!< I2C sub address */
+    uint16_t dataSize;                       /*!< Specifies the size of I2C data section */
+    uint8_t* data;                           /*!< Specifies the pointer of I2C R/W data */
+}I2C_Transfer_Cfg;
+
+/*@} end of group I2C_Public_Types */
+
+/** @defgroup  I2C_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  I2C_ID_TYPE
+ *  @{
+ */
+#define IS_I2C_ID_TYPE(type)                             (((type) == I2C0_ID ) || \
+                                                          ((type) == I2C_ID_MAX))
+
+/** @defgroup  I2C_DIRECTION_TYPE
+ *  @{
+ */
+#define IS_I2C_DIRECTION_TYPE(type)                      (((type) == I2C_WRITE ) || \
+                                                          ((type) == I2C_READ))
+
+/** @defgroup  I2C_INT_TYPE
+ *  @{
+ */
+#define IS_I2C_INT_TYPE(type)                            (((type) == I2C_TRANS_END_INT) || \
+                                                          ((type) == I2C_TX_FIFO_READY_INT) || \
+                                                          ((type) == I2C_RX_FIFO_READY_INT) || \
+                                                          ((type) == I2C_NACK_RECV_INT) || \
+                                                          ((type) == I2C_ARB_LOST_INT) || \
+                                                          ((type) == I2C_FIFO_ERR_INT) || \
+                                                          ((type) == I2C_INT_ALL))
+
+/*@} end of group I2C_Public_Constants */
+
+/** @defgroup  I2C_Public_Macros
+ *  @{
+ */
+
+/*@} end of group I2C_Public_Macros */
+
+/** @defgroup  I2C_Public_Functions
+ *  @{
+ */
+
+/**
+ *  @brief I2C Functions
+ */
+#ifndef BFLB_USE_HAL_DRIVER
+void I2C_IRQHandler(void);
+#endif
+void I2C_SendWord(I2C_ID_Type i2cNo, uint32_t data);
+uint32_t I2C_RecieveWord(I2C_ID_Type i2cNo);
+void I2C_Enable(I2C_ID_Type i2cNo);
+void I2C_Disable(I2C_ID_Type i2cNo);
+BL_Err_Type I2C_Reset(I2C_ID_Type i2cNo);
+void I2C_SetPrd(I2C_ID_Type i2cNo, uint8_t phase);
+void I2C_ClockSet(I2C_ID_Type i2cNo, uint32_t clk);
+void I2C_SetSclSync(I2C_ID_Type i2cNo, uint8_t enable);
+void I2C_Init(I2C_ID_Type i2cNo,I2C_Direction_Type direct,I2C_Transfer_Cfg *cfg);
+BL_Sts_Type I2C_IsBusy(I2C_ID_Type i2cNo);
+BL_Sts_Type I2C_TransferEndStatus(I2C_ID_Type i2cNo);
+BL_Err_Type I2C_MasterSendBlocking(I2C_ID_Type i2cNo, I2C_Transfer_Cfg *cfg);
+BL_Err_Type I2C_MasterReceiveBlocking(I2C_ID_Type i2cNo, I2C_Transfer_Cfg *cfg);
+void I2C_IntMask(I2C_ID_Type i2cNo,I2C_INT_Type intType, BL_Mask_Type intMask);
+void I2C_Int_Callback_Install(I2C_ID_Type i2cNo, I2C_INT_Type intType, intCallback_Type* cbFun);
+
+/*@} end of group I2C_Public_Functions */
+
+/*@} end of group I2C */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_I2C_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_i2c_gpio_sim.h b/drivers/bl702_driver/std_drv/inc/bl702_i2c_gpio_sim.h
new file mode 100644
index 00000000..bdf4a883
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_i2c_gpio_sim.h
@@ -0,0 +1,79 @@
+/**
+  ******************************************************************************
+  * @file    bl702_i2c_gpio_sim.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_I2C_GPIO_SIM_H__
+#define __BL702_I2C_GPIO_SIM_H__
+
+#include "bl702_glb.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  I2C_GPIO_SIM
+ *  @{
+ */
+
+/** @defgroup  I2C_GPIO_SIM_Public_Types
+ *  @{
+ */
+
+/*@} end of group I2C_GPIO_SIM_Public_Types */
+
+/** @defgroup  I2C_GPIO_SIM_Public_Functions
+ *  @{
+ */
+
+/**
+ *  @brief I2C Functions
+ */
+void I2C_GPIO_Sim_Init(GLB_GPIO_Type sclGPIOPin,GLB_GPIO_Type  sdaGPIOPin);
+int I2C_Start(void);
+void I2C_Stop(void);
+uint8_t I2C_GetAck(void);
+void I2C_SendByte(uint8_t Data);
+uint8_t I2C_ReadByte(uint8_t ack);
+int SCCB_Init(GLB_GPIO_Type sclGPIOPin,GLB_GPIO_Type  sdaGPIOPin);
+int SCCB_Write(uint8_t slave_addr, uint8_t* data,uint32_t wrsize);
+int SCCB_Read(uint8_t slave_addr, uint8_t* data,uint32_t rdsize);
+
+/*@} end of group I2C_GPIO_SIM_Public_Functions */
+
+/*@} end of group I2C_GPIO_SIM */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_I2C_GPIO_SIM_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_i2s.h b/drivers/bl702_driver/std_drv/inc/bl702_i2s.h
new file mode 100644
index 00000000..425c66a0
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_i2s.h
@@ -0,0 +1,292 @@
+/**
+  ******************************************************************************
+  * @file    bl702_i2s.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_I2S_H__
+#define __BL702_I2S_H__
+
+#include "i2s_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  I2S
+ *  @{
+ */
+
+/** @defgroup  I2S_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief I2S mode type definition
+ */
+typedef enum {
+    I2S_MODE_I2S_LEFT,                       /*!< Left-Justified Mode */
+    I2S_MODE_I2S_RIGHT,                      /*!< Right-Justified Mode */
+    I2S_MODE_I2S_DSP,                        /*!< DSP Mode */
+}I2S_Mode_Type;
+
+/**
+ *  @brief I2S role type definition
+ */
+typedef enum {
+    I2S_ROLE_MASTER = 0,                     /*!< I2S as master */
+    I2S_ROLE_SLAVE = 1,                      /*!< I2S as slave */
+}I2S_Role_Type;
+
+/**
+ *  @brief I2S data size type definition
+ */
+typedef enum {
+    I2S_SIZE_DATA_8 = 0,                     /*!< I2S data size 8 bits */
+    I2S_SIZE_DATA_16,                        /*!< I2S data size 16 bits */
+    I2S_SIZE_DATA_24,                        /*!< I2S data size 24 bits */
+    I2S_SIZE_DATA_32,                        /*!< I2S data size 32 bits */
+}I2S_Data_Size_Type;
+
+/**
+ *  @brief I2S frame size type definition
+ */
+typedef enum {
+    I2S_SIZE_FRAME_8 = 0,                    /*!< I2S frame size 8 bits */
+    I2S_SIZE_FRAME_16,                       /*!< I2S frame size 16 bits */
+    I2S_SIZE_FRAME_24,                       /*!< I2S frame size 24 bits */
+    I2S_SIZE_FRAME_32,                       /*!< I2S frame size 32 bits */
+}I2S_Frame_Size_Type;
+
+/**
+ *  @brief I2S endian data type definition
+ */
+typedef enum {
+    I2S_DATA_ENDIAN_MSB = 0,                 /*!< I2S use MSB first */
+    I2S_DATA_ENDIAN_LSB,                     /*!< I2S use LSB first */
+}I2S_Endian_Type;
+
+/**
+ *  @brief I2S frame select mode type definition
+ */
+typedef enum {
+    I2S_FS_MODE_EVEN = 0,                    /*!< I2S frame is even */
+    I2S_FS_MODE_1T,                          /*!< I2S frame is only 1T high */
+}I2S_Fs_Mode_Type;
+
+/**
+ *  @brief I2S rx mono mode channel select type definition
+ */
+typedef enum {
+    I2S_RX_MONO_MODE_LEFT_CHANNEL,           /*!< I2S rx mono mode left channel */
+    I2S_RX_MONO_MODE_RIGHT_CHANNEL,          /*!< I2S rx mono mode right channel */
+}I2S_Mono_Mode_Channel;
+
+/**
+ *  @brief I2S frame channel mode type definition
+ */
+typedef enum {
+    I2S_FS_CHANNELS_2 = 0,                   /*!< I2S frame is for 2 channels */
+    I2S_FS_CHANNELS_3,                       /*!< I2S frame is for 3 channels */
+    I2S_FS_CHANNELS_4,                       /*!< I2S frame is for 4 channels */
+}I2S_Fs_Channel_Type;
+
+/**
+ *  @brief I2S mono control definition
+ */
+typedef enum {
+    I2S_MONO_CONTROL_STEREO = 0,             /*!< I2S output stereo */
+    I2S_MONO_CONTROL_MONO,                   /*!< I2S output mono */
+}I2S_MonoControl_Type;
+
+/**
+ *  @brief I2S fifo 24-bit data align type definition
+ */
+typedef enum {
+    I2S_FIFO_24_RIGHT_JUSTIFIED = 0,         /*!< I2S fifo:[31:24]0x00,[23:0]24bit_data */
+    I2S_FIFO_24_LEFT_JUSTIFIED,              /*!< I2S fifo:[31:8]24bit_data,[7:0]0x00 */
+}I2S_FIFO_24_Justified_Type;
+
+/**
+ *  @brief I2S configuration structure type definition
+ */
+typedef struct {
+    I2S_Endian_Type endianType;             /*!< I2S endian configuration */
+    I2S_Mode_Type modeType;                 /*!< I2S mode configuration */
+    uint32_t audioFreqHz;                   /*!< I2S audio pll output frequency in Hz */
+    uint32_t sampleFreqHz;                  /*!< I2S sample data frequency in Hz */
+    BL_Fun_Type bclkInvert;                 /*!< I2S bclk invert configuration */
+    I2S_Frame_Size_Type frameSize;          /*!< I2S frame size configuration */
+    BL_Fun_Type fsInvert;                   /*!< I2S frame select invert configuration */
+    I2S_Fs_Mode_Type fsMode;                /*!< I2S frame mode configuration */
+    I2S_Fs_Channel_Type fsChannel;          /*!< I2S frame channels configuration */
+    uint32_t dataOffset;                    /*!< I2S data output offset configuration */
+    I2S_Data_Size_Type dataSize;            /*!< I2S data size configuration */
+    BL_Fun_Type monoMode;                   /*!< I2S enable mono mode,when this mode enable,lRMerge must be disabled */
+    I2S_Mono_Mode_Channel monoModeChannel;  /*!< I2S mono mode channel configuration */
+}I2S_CFG_Type;
+
+/**
+ *  @brief I2S FIFO configuration structure type definition
+ */
+typedef struct {
+    BL_Fun_Type lRMerge;                     /*!< I2S FIFO contains both left and right channel data in one entry */
+    BL_Fun_Type frameDataExchange;           /*!< I2S exchange left and right channel data in one entry */
+    BL_Fun_Type txfifoDmaEnable;             /*!< Enable or disable I2S tx fifo dma function. */
+    BL_Fun_Type rxfifoDmaEnable;             /*!< Enable or disable I2S rx fifo dma function. */
+    uint8_t rxFifoLevel;                     /*!< I2S receive fifo interrupt trigger level. only valid when fifo mode enabled. */
+    uint8_t txFifoLevel;                     /*!< I2S transmit fifo interrupt trigger level. only valid when fifo mode enabled. */
+}I2S_FifoCfg_Type;
+
+/**
+ *  @brief I2S IO configuration structure type definition
+ */
+typedef struct {
+    BL_Fun_Type deglitchEn;                  /*!< Enable or disable deglitch(for all the input pins) */
+    uint8_t deglitchCnt;                     /*!< Deglitch cycle count(unit:cycle of I2S kernel clock) */
+    BL_Fun_Type inverseBCLK;                 /*!< Enable or disable inverse BCLK signal */
+    BL_Fun_Type inverseFS;                   /*!< Enable or disable inverse FS signal */
+    BL_Fun_Type inverseRX;                   /*!< Enable or disable inverse RX signal */
+    BL_Fun_Type inverseTX;                   /*!< Enable or disable inverse TX signal */
+}I2S_IOCfg_Type;
+
+/*@} end of group I2S_Public_Types */
+
+/** @defgroup  I2S_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  I2S_MODE_TYPE
+ *  @{
+ */
+#define IS_I2S_MODE_TYPE(type)                           (((type) == I2S_MODE_I2S_LEFT) || \
+                                                          ((type) == I2S_MODE_I2S_RIGHT) || \
+                                                          ((type) == I2S_MODE_I2S_DSP))
+
+/** @defgroup  I2S_ROLE_TYPE
+ *  @{
+ */
+#define IS_I2S_ROLE_TYPE(type)                           (((type) == I2S_ROLE_MASTER ) || \
+                                                          ((type) == I2S_ROLE_SLAVE ))
+
+/** @defgroup  I2S_DATA_SIZE_TYPE
+ *  @{
+ */
+#define IS_I2S_DATA_SIZE_TYPE(type)                      (((type) == I2S_SIZE_DATA_8 ) || \
+                                                          ((type) == I2S_SIZE_DATA_16) || \
+                                                          ((type) == I2S_SIZE_DATA_24) || \
+                                                          ((type) == I2S_SIZE_DATA_32))
+
+/** @defgroup  I2S_FRAME_SIZE_TYPE
+ *  @{
+ */
+#define IS_I2S_FRAME_SIZE_TYPE(type)                     (((type) == I2S_SIZE_FRAME_8 ) || \
+                                                          ((type) == I2S_SIZE_FRAME_16) || \
+                                                          ((type) == I2S_SIZE_FRAME_24) || \
+                                                          ((type) == I2S_SIZE_FRAME_32))
+
+/** @defgroup  I2S_ENDIAN_TYPE
+ *  @{
+ */
+#define IS_I2S_ENDIAN_TYPE(type)                         (((type) == I2S_DATA_ENDIAN_MSB ) || \
+                                                          ((type) == I2S_DATA_ENDIAN_LSB))
+
+/** @defgroup  I2S_FS_MODE_TYPE
+ *  @{
+ */
+#define IS_I2S_FS_MODE_TYPE(type)                        (((type) == I2S_FS_MODE_EVEN ) || \
+                                                          ((type) == I2S_FS_MODE_1T))
+
+/** @defgroup  I2S_MONO_MODE_CHANNEL
+ *  @{
+ */
+#define IS_I2S_MONO_MODE_CHANNEL(type)                   (((type) == I2S_RX_MONO_MODE_LEFT_CHANNEL) || \
+                                                          ((type) == I2S_RX_MONO_MODE_RIGHT_CHANNEL))
+
+/** @defgroup  I2S_FS_CHANNEL_TYPE
+ *  @{
+ */
+#define IS_I2S_FS_CHANNEL_TYPE(type)                     (((type) == I2S_FS_CHANNELS_2 ) || \
+                                                          ((type) == I2S_FS_CHANNELS_3) || \
+                                                          ((type) == I2S_FS_CHANNELS_4))
+
+/** @defgroup  I2S_MONOCONTROL_TYPE
+ *  @{
+ */
+#define IS_I2S_MONOCONTROL_TYPE(type)                    (((type) == I2S_MONO_CONTROL_STEREO ) || \
+                                                          ((type) == I2S_MONO_CONTROL_MONO))
+
+/** @defgroup  I2S_FIFO_24_JUSTIFIED_TYPE
+ *  @{
+ */
+#define IS_I2S_FIFO_24_JUSTIFIED_TYPE(type)              (((type) == I2S_FIFO_24_RIGHT_JUSTIFIED ) || \
+                                                          ((type) == I2S_FIFO_24_LEFT_JUSTIFIED))
+
+/*@} end of group I2S_Public_Constants */
+
+/** @defgroup  I2S_Public_Macros
+ *  @{
+ */
+#define I2S_TX_FIFO_SIZE               16
+#define I2S_RX_FIFO_SIZE               16
+
+/*@} end of group I2S_Public_Macros */
+
+/** @defgroup  I2S_Public_Functions
+ *  @{
+ */
+
+/**
+ *  @brief I2S Functions
+ */
+void I2S_SetBclkPeriod(I2S_CFG_Type *i2sCfg);
+void I2S_Init(I2S_CFG_Type *i2sCfg);
+void I2S_FifoConfig(I2S_FifoCfg_Type *fifoCfg);
+void I2S_IOConfig(I2S_IOCfg_Type *ioCfg);
+void I2S_Enable(I2S_Role_Type roleType);
+void I2S_Disable(void);
+uint32_t I2S_Read(void);
+void I2S_Write(uint32_t data);
+void I2S_Mute(BL_Fun_Type enabled);
+void I2S_SetFifoJustified(I2S_FIFO_24_Justified_Type justType);
+uint32_t I2S_GetTxFIFO_AvlCnt(void);
+uint32_t I2S_GetRxFIFO_AvlCnt(void);
+void I2S_Flush(void);
+
+/*@} end of group I2S_Public_Functions */
+
+/*@} end of group I2S */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_I2S_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_ir.h b/drivers/bl702_driver/std_drv/inc/bl702_ir.h
new file mode 100644
index 00000000..0303af10
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_ir.h
@@ -0,0 +1,253 @@
+/**
+  ******************************************************************************
+  * @file    bl702_ir.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_IR_H__
+#define __BL702_IR_H__
+
+#include "ir_reg.h"
+#include "bl702_common.h"
+#include "bl702_hbn.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  IR
+ *  @{
+ */
+
+/** @defgroup  IR_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief IR direction type definition
+ */
+typedef enum {
+    IR_TX,                                   /*!< IR TX direction */
+    IR_RX,                                   /*!< IR RX direction */
+    IR_TXRX,                                 /*!< IR TX and RX direction */
+}IR_Direction_Type;
+
+/**
+ *  @brief IR word type definition
+ */
+typedef enum {
+    IR_WORD_0,                               /*!< IR data word 0 */
+    IR_WORD_1,                               /*!< IR data word 1 */
+}IR_Word_Type;
+
+/**
+ *  @brief IR RX mode type definition
+ */
+typedef enum {
+    IR_RX_NEC,                               /*!< IR RX NEC mode */
+    IR_RX_RC5,                               /*!< IR RX RC5 mode */
+    IR_RX_SWM,                               /*!< IR RX software pulse-width detection mode */
+}IR_RxMode_Type;
+
+/**
+ *  @brief IR interrupt type definition
+ */
+typedef enum {
+    IR_INT_TX,                               /*!< IR TX transfer end interrupt */
+    IR_INT_RX,                               /*!< IR RX transfer end interrupt */
+    IR_INT_ALL,                              /*!< IR all interrupt */
+}IR_INT_Type;
+
+/**
+ *  @brief IR fifo underflow or overflow type definition
+ */
+typedef enum {
+    IR_RX_FIFO_UNDERFLOW,                    /*!< Underflow flag of rx fifo */
+    IR_RX_FIFO_OVERFLOW,                     /*!< Overflow flag of rx fifo */
+}IR_FifoStatus_Type;
+
+/**
+ *  @brief IR TX configuration structure type definition
+ */
+typedef struct {
+    uint8_t dataBits;                        /*!< Bit count of data phase */
+    BL_Fun_Type tailPulseInverse;            /*!< Enable or disable signal of tail pulse inverse (don't care if SWM is enabled) */
+    BL_Fun_Type tailPulse;                   /*!< Enable or disable signal of tail pulse (don't care if SWM is enabled) */
+    BL_Fun_Type headPulseInverse;            /*!< Enable or disable signal of head pulse inverse (don't care if SWM is enabled) */
+    BL_Fun_Type headPulse;                   /*!< Enable or disable signal of head pulse (don't care if SWM is enabled) */
+    BL_Fun_Type logic1PulseInverse;          /*!< Enable or disable signal of logic 1 pulse inverse (don't care if SWM is enabled) */
+    BL_Fun_Type logic0PulseInverse;          /*!< Enable or disable signal of logic 0 pulse inverse (don't care if SWM is enabled) */
+    BL_Fun_Type dataPulse;                   /*!< Enable or disable signal of data pulse (don't care if SWM is enabled) */
+    BL_Fun_Type outputModulation;            /*!< Enable or disable signal of output modulation */
+    BL_Fun_Type outputInverse;               /*!< Enable or disable signal of output inverse,0:output stays at low during idle state,1:stay at high */
+}IR_TxCfg_Type;
+
+/**
+ *  @brief IR TX pulse width configuration structure type definition
+ */
+typedef struct {
+    uint8_t logic0PulseWidth_1;              /*!< Pulse width of logic 0 pulse phase 1 (don't care if SWM is enabled) */
+    uint8_t logic0PulseWidth_0;              /*!< Pulse width of logic 0 pulse phase 0 (don't care if SWM is enabled) */
+    uint8_t logic1PulseWidth_1;              /*!< Pulse width of logic 1 pulse phase 1 (don't care if SWM is enabled) */
+    uint8_t logic1PulseWidth_0;              /*!< Pulse width of logic 1 pulse phase 0 (don't care if SWM is enabled) */
+    uint8_t headPulseWidth_1;                /*!< Pulse width of head pulse phase 1 (don't care if SWM is enabled) */
+    uint8_t headPulseWidth_0;                /*!< Pulse width of head pulse phase 0 (don't care if SWM is enabled) */
+    uint8_t tailPulseWidth_1;                /*!< Pulse width of tail pulse phase 1 (don't care if SWM is enabled) */
+    uint8_t tailPulseWidth_0;                /*!< Pulse width of tail pulse phase 0 (don't care if SWM is enabled) */
+    uint8_t moduWidth_1;                     /*!< Modulation phase 1 width */
+    uint8_t moduWidth_0;                     /*!< Modulation phase 0 width */
+    uint16_t pulseWidthUnit;                 /*!< Pulse width unit */
+}IR_TxPulseWidthCfg_Type;
+
+/**
+ *  @brief IR TX software mode pulse width(multiples of pulse width unit) configuration structure type definition
+ */
+typedef struct {
+    uint32_t swmData0;                       /*!< SWM pulse width data   0~7,multiples of pulse width unit,each pulse is represented by 4-bit */
+    uint32_t swmData1;                       /*!< SWM pulse width data  8~15,multiples of pulse width unit,each pulse is represented by 4-bit */
+    uint32_t swmData2;                       /*!< SWM pulse width data 16~23,multiples of pulse width unit,each pulse is represented by 4-bit */
+    uint32_t swmData3;                       /*!< SWM pulse width data 24~31,multiples of pulse width unit,each pulse is represented by 4-bit */
+    uint32_t swmData4;                       /*!< SWM pulse width data 32~39,multiples of pulse width unit,each pulse is represented by 4-bit */
+    uint32_t swmData5;                       /*!< SWM pulse width data 40~47,multiples of pulse width unit,each pulse is represented by 4-bit */
+    uint32_t swmData6;                       /*!< SWM pulse width data 48~55,multiples of pulse width unit,each pulse is represented by 4-bit */
+    uint32_t swmData7;                       /*!< SWM pulse width data 56~63,multiples of pulse width unit,each pulse is represented by 4-bit */
+}IR_TxSWMPulseWidthCfg_Type;
+
+/**
+ *  @brief IR RX configuration structure type definition
+ */
+typedef struct {
+    IR_RxMode_Type rxMode;                   /*!< Set ir rx mode */
+    BL_Fun_Type inputInverse;                /*!< Enable or disable signal of input inverse */
+    uint16_t endThreshold;                   /*!< Pulse width threshold to trigger end condition */
+    uint16_t dataThreshold;                  /*!< Pulse width threshold for logic 0/1 detection (don't care if SWM is enabled) */
+    BL_Fun_Type rxDeglitch;                  /*!< Enable or disable signal of rx input de-glitch function */
+    uint8_t DeglitchCnt;                     /*!< De-glitch function cycle count */
+}IR_RxCfg_Type;
+
+/*@} end of group IR_Public_Types */
+
+/** @defgroup  IR_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  IR_DIRECTION_TYPE
+ *  @{
+ */
+#define IS_IR_DIRECTION_TYPE(type)                       (((type) == IR_TX) || \
+                                                          ((type) == IR_RX) || \
+                                                          ((type) == IR_TXRX))
+
+/** @defgroup  IR_WORD_TYPE
+ *  @{
+ */
+#define IS_IR_WORD_TYPE(type)                            (((type) == IR_WORD_0) || \
+                                                          ((type) == IR_WORD_1))
+
+/** @defgroup  IR_RXMODE_TYPE
+ *  @{
+ */
+#define IS_IR_RXMODE_TYPE(type)                          (((type) == IR_RX_NEC) || \
+                                                          ((type) == IR_RX_RC5) || \
+                                                          ((type) == IR_RX_SWM))
+
+/** @defgroup  IR_INT_TYPE
+ *  @{
+ */
+#define IS_IR_INT_TYPE(type)                             (((type) == IR_INT_TX) || \
+                                                          ((type) == IR_INT_RX) || \
+                                                          ((type) == IR_INT_ALL))
+
+/** @defgroup  IR_FIFOSTATUS_TYPE
+ *  @{
+ */
+#define IS_IR_FIFOSTATUS_TYPE(type)                      (((type) == IR_RX_FIFO_UNDERFLOW) || \
+                                                          ((type) == IR_RX_FIFO_OVERFLOW))
+
+/*@} end of group IR_Public_Constants */
+
+/** @defgroup  IR_Public_Macros
+ *  @{
+ */
+#define IR_RX_FIFO_SIZE                                  64
+
+/*@} end of group IR_Public_Macros */
+
+/** @defgroup  IR_Public_Functions
+ *  @{
+ */
+
+/**
+ *  @brief IR Functions
+ */
+#ifndef BFLB_USE_HAL_DRIVER
+void IRRX_IRQHandler(void);
+void IRTX_IRQHandler(void);
+#endif
+BL_Err_Type IR_TxInit(IR_TxCfg_Type *irTxCfg);
+BL_Err_Type IR_TxPulseWidthConfig(IR_TxPulseWidthCfg_Type *irTxPulseWidthCfg);
+BL_Err_Type IR_TxSWMPulseWidthConfig(IR_TxSWMPulseWidthCfg_Type *irTxSWMPulseWidthCfg);
+BL_Err_Type IR_RxInit(IR_RxCfg_Type *irRxCfg);
+BL_Err_Type IR_DeInit(void);
+BL_Err_Type IR_Enable(IR_Direction_Type direct);
+BL_Err_Type IR_Disable(IR_Direction_Type direct);
+BL_Err_Type IR_TxSWM(BL_Fun_Type txSWM);
+BL_Err_Type IR_RxFIFOClear(void);
+BL_Err_Type IR_SendData(IR_Word_Type irWord,uint32_t data);
+BL_Err_Type IR_SWMSendData(uint16_t *data,uint8_t length);
+BL_Err_Type IR_SendCommand(uint32_t word1,uint32_t word0);
+BL_Err_Type IR_SWMSendCommand(uint16_t *data,uint8_t length);
+BL_Err_Type IR_SendNEC(uint8_t address,uint8_t command);
+BL_Err_Type IR_IntMask(IR_INT_Type intType,BL_Mask_Type intMask);
+BL_Err_Type IR_ClrIntStatus(IR_INT_Type intType);
+BL_Err_Type IR_Int_Callback_Install(IR_INT_Type intType,intCallback_Type *cbFun);
+BL_Sts_Type IR_GetIntStatus(IR_INT_Type intType);
+BL_Sts_Type IR_GetRxFIFOStatus(IR_FifoStatus_Type fifoSts);
+uint32_t IR_ReceiveData(IR_Word_Type irWord);
+uint8_t IR_SWMReceiveData(uint16_t *data,uint8_t length);
+BL_Err_Type IR_ReceiveNEC(uint8_t *address,uint8_t *command);
+uint8_t IR_GetRxDataBitCount(void);
+uint8_t IR_GetRxFIFOCount(void);
+IR_RxMode_Type IR_LearnToInit(uint32_t *data,uint8_t *length);
+BL_Err_Type IR_LearnToSend(IR_RxMode_Type mode,uint32_t *data,uint8_t length);
+uint8_t IR_LearnToReceive(IR_RxMode_Type mode,uint32_t *data);
+BL_Sts_Type IR_LEDInit(HBN_XCLK_CLK_Type clk,uint8_t div,uint8_t unit,uint8_t code0H,uint8_t code0L,uint8_t code1H,
+                       uint8_t code1L);
+BL_Sts_Type IR_LEDSend(uint32_t data);
+
+/*@} end of group IR_Public_Functions */
+
+/*@} end of group IR */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_IR_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_it.h b/drivers/bl702_driver/std_drv/inc/bl702_it.h
new file mode 100644
index 00000000..dccb1212
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_it.h
@@ -0,0 +1,51 @@
+#ifndef __BL702_IT_H__
+#define __BL702_IT_H__
+
+#include "bl702.h"
+#include "bl_common.h"
+
+/** @addtogroup  BL606_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  COMMON
+ *  @{
+ */
+
+/** @defgroup  COMMON_Public_Types
+ *  @{
+ */
+
+/*@} end of group COMMON_Public_Types */
+
+/** @defgroup  COMMON_Public_Constants
+ *  @{
+ */
+ 
+/** @defgroup DRIVER_INT_PERIPH
+ *  @{
+ */
+#define IS_INT_PERIPH(INT_PERIPH)       ((INT_PERIPH) < IRQn_LAST)
+
+/*@} end of group DRIVER_INT_PERIPH */
+
+/** @defgroup DRIVER_INT_MASK     
+ *  @{
+ */
+#define IS_BL_MASK_TYPE(type)          (((type) == MASK) || ((type) == UNMASK))
+
+/*@} end of group COMMON_Public_Constants */
+
+/*@} end of group DRIVER_Public_Macro */
+
+/** @defgroup DRIVER_Public_FunctionDeclaration
+ *  @brief DRIVER functions declaration
+ *  @{
+ */
+void Interrupt_Handler_Register(IRQn_Type irq,pFunc interruptFun);
+
+/*@} end of group DRIVER_COMMON  */
+
+#endif /* __BL602_COMMON_H__ */
+
+
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_kys.h b/drivers/bl702_driver/std_drv/inc/bl702_kys.h
new file mode 100644
index 00000000..870adc44
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_kys.h
@@ -0,0 +1,123 @@
+/**
+  ******************************************************************************
+  * @file    bl702_kys.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_KYS_H__
+#define __BL702_KYS_H__
+
+#include "kys_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  KYS
+ *  @{
+ */
+
+/** @defgroup  KYS_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief KYS keycode type definition
+ */
+typedef enum {
+    KYS_KEYCODE_0,                           /*!< KYS keycode 0 */
+    KYS_KEYCODE_1,                           /*!< KYS keycode 1 */
+    KYS_KEYCODE_2,                           /*!< KYS keycode 2 */
+    KYS_KEYCODE_3,                           /*!< KYS keycode 3 */
+}KYS_Keycode_Type;
+
+/**
+ *  @brief KYS configuration structure type definition
+ */
+typedef struct {
+    uint8_t col;                             /*!< Col of keyboard,max:20 */
+    uint8_t row;                             /*!< Row of keyboard,max:8 */
+    uint8_t idleDuration;                    /*!< Idle duration between column scans */
+    BL_Fun_Type ghostEn;                     /*!< Enable or disable ghost key event detection */
+    BL_Fun_Type deglitchEn;                  /*!< Enable or disable deglitch function */
+    uint8_t deglitchCnt;                     /*!< Deglitch count */
+}KYS_CFG_Type;
+
+/*@} end of group KYS_Public_Types */
+
+/** @defgroup  KYS_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  KYS_KEYCODE_TYPE
+ *  @{
+ */
+#define IS_KYS_KEYCODE_TYPE(type)                        (((type) == KYS_KEYCODE_0) || \
+                                                          ((type) == KYS_KEYCODE_1) || \
+                                                          ((type) == KYS_KEYCODE_2) || \
+                                                          ((type) == KYS_KEYCODE_3))
+
+/*@} end of group KYS_Public_Constants */
+
+/** @defgroup  KYS_Public_Macros
+ *  @{
+ */
+
+/*@} end of group KYS_Public_Macros */
+
+/** @defgroup  KYS_Public_Functions
+ *  @{
+ */
+
+/**
+ *  @brief UART Functions
+ */
+#ifndef BFLB_USE_HAL_DRIVER
+void KYS_IRQHandler(void);
+#endif
+BL_Err_Type KYS_Init(KYS_CFG_Type *kysCfg);
+BL_Err_Type KYS_Enable(void);
+BL_Err_Type KYS_Disable(void);
+BL_Err_Type KYS_IntMask(BL_Mask_Type intMask);
+BL_Err_Type KYS_IntClear(void);
+BL_Err_Type KYS_Int_Callback_Install(intCallback_Type *cbFun);
+uint8_t KYS_GetIntStatus(void);
+uint8_t KYS_GetKeycode(KYS_Keycode_Type keycode,uint8_t *col,uint8_t *row);
+
+/*@} end of group KYS_Public_Functions */
+
+/*@} end of group KYS */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_KYS_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_l1c.h b/drivers/bl702_driver/std_drv/inc/bl702_l1c.h
new file mode 100644
index 00000000..6978b119
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_l1c.h
@@ -0,0 +1,200 @@
+/**
+  ******************************************************************************
+  * @file    bl702_l1c.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_L1C_H__
+#define __BL702_L1C_H__
+
+#include "l1c_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  L1C
+ *  @{
+ */
+
+/** @defgroup  L1C_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief L1C configuration structure type definition
+ */
+typedef struct {
+    BL_Fun_Type wrapDis;                    /*!< wrap disable */
+    BL_Fun_Type bypassEn;                   /*!< bypass cache enable */
+    uint8_t wayDis;                         /*!< Disable part of cache ways & used as ITCM */
+    BL_Fun_Type cntEn;                      /*!< l1c count enable */
+}L1C_CACHE_Cfg_Type;
+
+/**
+ *  @brief L1C BMX arb mode type definition
+ */
+typedef enum {
+    L1C_BMX_ARB_FIX,                        /*!< 0->fix */
+    L1C_BMX_ARB_ROUND_ROBIN,                /*!< 2->round-robin */
+    L1C_BMX_ARB_RANDOM,                     /*!< 3->random */
+}L1C_BMX_ARB_Type;
+
+/**
+ *  @brief L1C BMX configuration structure type definition
+ */
+typedef struct {
+    uint8_t timeoutEn;                      /*!< Bus timeout enable: detect slave no reaponse in 1024 cycles */
+    BL_Fun_Type errEn;                      /*!< Bus error response enable */
+    L1C_BMX_ARB_Type arbMod;                /*!< 0->fix, 2->round-robin, 3->random */
+}L1C_BMX_Cfg_Type;
+
+/**
+ *  @brief L1C BMX bus err type definition
+ */
+typedef enum {
+    L1C_BMX_BUS_ERR_TRUSTZONE_DECODE,       /*!< Bus trustzone decode error */
+    L1C_BMX_BUS_ERR_ADDR_DECODE,            /*!< Bus addr decode error */
+}L1C_BMX_BUS_ERR_Type;
+
+/**
+ *  @brief L1C BMX bus err interrupt type definition
+ */
+typedef enum {
+    L1C_BMX_ERR_INT_ERR,                    /*!< L1C BMX bus err interrupt */
+    L1C_BMX_ERR_INT_ALL,                    /*!< L1C BMX bus err interrupt max num */
+}L1C_BMX_ERR_INT_Type;
+
+/**
+ *  @brief L1C BMX time out interrupt type definition
+ */
+typedef enum {
+    L1C_BMX_TO_INT_TIMEOUT,                 /*!< L1C_BMX timeout interrupt */
+    L1C_BMX_TO_INT_ALL,                     /*!< L1C_BMX timeout interrupt max num */
+}L1C_BMX_TO_INT_Type;
+
+/*@} end of group L1C_Public_Types */
+
+/** @defgroup  L1C_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  L1C_BMX_ARB_TYPE
+ *  @{
+ */
+#define IS_L1C_BMX_ARB_TYPE(type)                        (((type) == L1C_BMX_ARB_FIX) || \
+                                                          ((type) == L1C_BMX_ARB_ROUND_ROBIN) || \
+                                                          ((type) == L1C_BMX_ARB_RANDOM))
+
+/** @defgroup  L1C_BMX_BUS_ERR_TYPE
+ *  @{
+ */
+#define IS_L1C_BMX_BUS_ERR_TYPE(type)                    (((type) == L1C_BMX_BUS_ERR_TRUSTZONE_DECODE) || \
+                                                          ((type) == L1C_BMX_BUS_ERR_ADDR_DECODE))
+
+/** @defgroup  L1C_BMX_ERR_INT_TYPE
+ *  @{
+ */
+#define IS_L1C_BMX_ERR_INT_TYPE(type)                    (((type) == L1C_BMX_ERR_INT_ERR) || \
+                                                          ((type) == L1C_BMX_ERR_INT_ALL))
+
+/** @defgroup  L1C_BMX_TO_INT_TYPE
+ *  @{
+ */
+#define IS_L1C_BMX_TO_INT_TYPE(type)                     (((type) == L1C_BMX_TO_INT_TIMEOUT) || \
+                                                          ((type) == L1C_BMX_TO_INT_ALL))
+
+/*@} end of group L1C_Public_Constants */
+
+/** @defgroup  L1C_Public_Macros
+ *  @{
+ */
+#define L1C_WAY_DISABLE_NONE                     0x00
+#define L1C_WAY_DISABLE_ONE                      0x01
+#define L1C_WAY_DISABLE_TWO                      0x03
+#define L1C_WAY_DISABLE_THREE                    0x07
+#define L1C_WAY_DISABLE_ALL                      0x0F
+#define L1C_WAY_DISABLE_USER                     0xFF
+#if 1
+/*NP config address */
+#define L1C_CONF_REG                             (L1C_BASE+0x00)
+#define L1C_HIT_CNT_LSB_REG                      (L1C_BASE+0x04)
+#define L1C_HIT_CNT_MSB_REG                      (L1C_BASE+0x08)
+#define L1C_MISS_CNT_REG                         (L1C_BASE+0x0C)
+/* Get miss and hit count */
+#define L1C_Get_Miss_Cnt()                       BL702_REG_RD(L1C_MISS_CNT_REG)
+#define L1C_Get_Hit_Cnt_LSB()                    BL702_REG_RD(L1C_HIT_CNT_LSB_REG)
+#define L1C_Get_Hit_Cnt_MSB()                    BL702_REG_RD(L1C_HIT_CNT_MSB_REG)
+#endif
+
+/*@} end of group L1C_Public_Macros */
+
+/** @defgroup  L1C_Public_Functions
+ *  @{
+ */
+/*----------*/
+#ifndef BFLB_USE_HAL_DRIVER
+void L1C_BMX_ERR_IRQHandler(void);
+void L1C_BMX_TO_IRQHandler(void);
+#endif
+/*----------*/
+BL_Err_Type L1C_Cache_Enable_Set(uint8_t wayDisable);
+void L1C_Cache_Write_Set(BL_Fun_Type wtEn, BL_Fun_Type wbEn, BL_Fun_Type waEn);
+BL_Err_Type L1C_Cache_Flush(uint8_t wayDisable);
+void L1C_Cache_Hit_Count_Get(uint32_t *hitCountLow,uint32_t *hitCountHigh);
+uint32_t L1C_Cache_Miss_Count_Get(void);
+void L1C_Cache_Read_Disable(void);
+/*----------*/
+BL_Err_Type L1C_Set_Wrap(BL_Fun_Type wrap);
+BL_Err_Type L1C_Set_Way_Disable(uint8_t disableVal);
+BL_Err_Type L1C_IROM_2T_Access_Set(uint8_t enable);
+/*----------*/
+BL_Err_Type L1C_BMX_Init(L1C_BMX_Cfg_Type *l1cBmxCfg);
+BL_Err_Type L1C_BMX_Addr_Monitor_Enable(void);
+BL_Err_Type L1C_BMX_Addr_Monitor_Disable(void);
+BL_Err_Type L1C_BMX_BusErrResponse_Enable(void);
+BL_Err_Type L1C_BMX_BusErrResponse_Disable(void);
+BL_Sts_Type L1C_BMX_Get_Status(L1C_BMX_BUS_ERR_Type errType);
+uint32_t L1C_BMX_Get_Err_Addr(void);
+BL_Err_Type L1C_BMX_ERR_INT_Callback_Install(L1C_BMX_ERR_INT_Type intType,intCallback_Type* cbFun);
+BL_Err_Type L1C_BMX_TIMEOUT_INT_Callback_Install(L1C_BMX_TO_INT_Type intType,
+                                                 intCallback_Type* cbFun);
+/*----------*/;
+
+/*@} end of group L1C_Public_Functions */
+
+/*@} end of group L1C */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_L1C_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_mjpeg.h b/drivers/bl702_driver/std_drv/inc/bl702_mjpeg.h
new file mode 100644
index 00000000..3d4589ff
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_mjpeg.h
@@ -0,0 +1,226 @@
+/**
+  ******************************************************************************
+  * @file    bl702_mjpeg.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_MJPEG_H__
+#define __BL702_MJPEG_H__
+
+#include "mjpeg_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  MJPEG
+ *  @{
+ */
+
+/** @defgroup  MJPEG_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief MJPEG YUV format definition
+ */
+typedef enum {
+    MJPEG_YUV420,                           /*!< MJPEG YUV420 planar mode */
+    MJPEG_YUV400,                           /*!< MJPEG YUV400 grey scale mode */
+    MJPEG_YUV422_PLANAR,                    /*!< MJPEG YUV422 planar mode */
+    MJPEG_YUV422_INTERLEAVE,                /*!< MJPEG YUV422 interleave mode */
+}MJPEG_YUV_Mode_Type;
+
+/**
+ *  @brief MJPEG burst type definition
+ */
+typedef enum {
+    MJPEG_BURST_SINGLE,                     /*!< MJPEG burst single */
+    MJPEG_BURST_INCR4,                      /*!< MJPEG burst incr4 */
+    MJPEG_BURST_INCR8,                      /*!< MJPEG burst incr8 */
+    MJPEG_BURST_INCR16,                     /*!< MJPEG burst incr16 */
+}MJPEG_Burst_Type;
+
+/**
+ *  @brief MJPEG swap mode block definition
+ */
+typedef enum {
+    MJPEG_BLOCK_0,                          /*!< Memory block 0 */
+    MJPEG_BLOCK_1,                          /*!< Memory block 1 */
+}MJPEG_Swap_Block_Type;
+
+/**
+ *  @brief MJPEG interrupt type definition
+ */
+typedef enum {
+    MJPEG_INT_NORMAL,                       /*!< MJPEG normal write interrupt */
+    MJPEG_INT_CAM_OVERWRITE,                /*!< MJPEG camera overwrite interrupt */
+    MJPEG_INT_MEM_OVERWRITE,                /*!< MJPEG memory overwrite interrupt */
+    MJPEG_INT_FRAME_OVERWRITE,              /*!< MJPEG frame overwrite interrupt */
+    MJPEG_INT_BACK_IDLE,                    /*!< MJPEG back idle interrupt */
+    MJPEG_INT_SWAP,                         /*!< MJPEG swap memory block interrupt */
+    MJPEG_INT_ALL,                          /*!< MJPEG all interrupt type */
+}MJPEG_INT_Type;
+
+/**
+ *  @brief MJPEG configuration strcut definition
+ */
+typedef struct {
+    MJPEG_Burst_Type burst;                 /*!< MJPEG burst type */
+    uint8_t quality;                        /*!< MJPEG quantization selection, 1-75:Q table selection, others:Q100(lossless) */
+    MJPEG_YUV_Mode_Type yuv;                /*!< MJPEG control YUV mode */
+    uint16_t waitCount;                     /*!< Cycle count in wait state, default value:0x400 */
+    uint32_t bufferMjpeg;                   /*!< MJPEG buffer addr */
+    uint32_t sizeMjpeg;                     /*!< MJPEG buffer size */
+    uint32_t bufferCamYY;                   /*!< CAM buffer address of Y frame */
+    uint32_t sizeCamYY;                     /*!< CAM buffer size of Y frame */
+    uint32_t bufferCamUV;                   /*!< CAM buffer address of UV frame */
+    uint32_t sizeCamUV;                     /*!< CAM buffer size of UV frame */
+    uint16_t resolutionX;                   /*!< CAM RESOLUTION X */
+    uint16_t resolutionY;                   /*!< CAM RESOLUTION Y */
+    BL_Fun_Type bitOrderEnable;             /*!< MJPEG bitstream order adjustment */
+    BL_Fun_Type evenOrderEnable;            /*!< Enable:U is even byte of UV frame and V is odd byte of UV frame */
+    BL_Fun_Type swapModeEnable;             /*!< Enable or disable write swap mode */
+    BL_Fun_Type overStopEnable;             /*!< Enable:if camera overwrite error occur,mjpeg will stop fetch data */
+    BL_Fun_Type reflectDmy;                 /*!< UV dummy with relect */
+    BL_Fun_Type verticalDmy;                /*!< MJPEG last half vertical block with dummy data 0x80 */
+    BL_Fun_Type horizationalDmy;            /*!< MJPEG last half horizational block with dummy data 0x80 */
+}MJPEG_CFG_Type;
+
+/**
+ *  @brief MJPEG packet configuration strcut definition
+ */
+typedef struct {
+    BL_Fun_Type packetEnable;               /*!< Enable or disable packet mode */
+    BL_Fun_Type endToTail;                  /*!< Enable or disable jpeg end jump to packet tail */
+    uint16_t frameHead;                     /*!< Preserve head memory space for each frame */
+    BL_Fun_Type frameTail;                  /*!< Enable:auto fill tail 0xFF and 0xD9 */
+    uint16_t packetHead;                    /*!< Packet head byte count */
+    uint16_t packetBody;                    /*!< Packet body byte count */
+    uint16_t packetTail;                    /*!< Packet tail byte count */
+}MJPEG_Packet_Type;
+
+/**
+ *  @brief MJPEG frame information strcut definition
+ */
+typedef struct {
+    uint8_t validFrames;                    /*!< Valid frames */
+    uint32_t curFrameAddr;                  /*!< Current frame address */
+    uint32_t curFrameBytes;                 /*!< Current frame bytes */
+    uint8_t curFrameQ;                      /*!< Current frame Q mode */
+    uint32_t status;                        /*!< MJPEG module status */
+}MJPEG_Frame_Info;
+
+/*@} end of group MJPEG_Public_Types */
+
+/** @defgroup  MJPEG_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  MJPEG_YUV_MODE_TYPE
+ *  @{
+ */
+#define IS_MJPEG_YUV_MODE_TYPE(type)                     (((type) == MJPEG_YUV420) || \
+                                                          ((type) == MJPEG_YUV400) || \
+                                                          ((type) == MJPEG_YUV422_PLANAR) || \
+                                                          ((type) == MJPEG_YUV422_INTERLEAVE))
+
+/** @defgroup  MJPEG_BURST_TYPE
+ *  @{
+ */
+#define IS_MJPEG_BURST_TYPE(type)                        (((type) == MJPEG_BURST_SINGLE) || \
+                                                          ((type) == MJPEG_BURST_INCR4) || \
+                                                          ((type) == MJPEG_BURST_INCR8) || \
+                                                          ((type) == MJPEG_BURST_INCR16))
+
+/** @defgroup  MJPEG_SWAP_BLOCK_TYPE
+ *  @{
+ */
+#define IS_MJPEG_SWAP_BLOCK_TYPE(type)                   (((type) == MJPEG_BLOCK_0) || \
+                                                          ((type) == MJPEG_BLOCK_1))
+
+/** @defgroup  MJPEG_INT_TYPE
+ *  @{
+ */
+#define IS_MJPEG_INT_TYPE(type)                          (((type) == MJPEG_INT_NORMAL) || \
+                                                          ((type) == MJPEG_INT_CAM_OVERWRITE) || \
+                                                          ((type) == MJPEG_INT_MEM_OVERWRITE) || \
+                                                          ((type) == MJPEG_INT_FRAME_OVERWRITE) || \
+                                                          ((type) == MJPEG_INT_BACK_IDLE) || \
+                                                          ((type) == MJPEG_INT_SWAP) || \
+                                                          ((type) == MJPEG_INT_ALL))
+
+/*@} end of group MJPEG_Public_Constants */
+
+/** @defgroup  MJPEG_Public_Macros
+ *  @{
+ */
+
+/*@} end of group MJPEG_Public_Macros */
+
+/** @defgroup  MJPEG_Public_Functions
+ *  @{
+ */
+#ifndef BFLB_USE_HAL_DRIVER
+void MJPEG_IRQHandler(void);
+#endif
+void MJPEG_Init(MJPEG_CFG_Type *cfg);
+void MJPEG_Packet_Config(MJPEG_Packet_Type *cfg);
+void MJPEG_Set_YUYV_Order_Interleave(uint8_t y0,uint8_t u0,uint8_t y1,uint8_t v0);
+void MJPEG_Set_YUYV_Order_Planar(uint8_t yy,uint8_t uv);
+void MJPEG_Deinit(void);
+void MJPEG_Enable(void);
+void MJPEG_Disable(void);
+void MJPEG_SW_Enable(uint8_t count);
+void MJPEG_SW_Run(void);
+void MJPEG_Get_Frame_Info(MJPEG_Frame_Info *info);
+uint8_t MJPEG_Get_Frame_Count(void);
+void MJPEG_Pop_Frame(void);
+void MJPEG_Current_Block_Clear(void);
+MJPEG_Swap_Block_Type MJPEG_Get_Current_Block(void);
+BL_Sts_Type MJPEG_Block_Is_Full(MJPEG_Swap_Block_Type block);
+BL_Sts_Type MJPEG_Current_Block_Is_Start(void);
+BL_Sts_Type MJPEG_Current_Block_Is_End(void);
+uint32_t MJPEG_Get_Remain_Bit(void);
+void MJPEG_Set_Frame_Threshold(uint8_t count);
+void MJPEG_IntMask(MJPEG_INT_Type intType,BL_Mask_Type intMask);
+void MJPEG_IntClr(MJPEG_INT_Type intType);
+void MJPEG_Int_Callback_Install(MJPEG_INT_Type intType,intCallback_Type* cbFun);
+
+/*@} end of group MJPEG_Public_Functions */
+
+/*@} end of group MJPEG */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_MJPEG_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_nf_cfg.h b/drivers/bl702_driver/std_drv/inc/bl702_nf_cfg.h
new file mode 100644
index 00000000..026da4db
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_nf_cfg.h
@@ -0,0 +1,49 @@
+/**
+  ******************************************************************************
+  * @file    bl702_nf_cfg.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_NF_CFG_H__
+#define __BL702_NF_CFG_H__
+
+#include "string.h"
+#include "bl702_nflash.h"
+#include "bl702_sf_ctrl.h"
+
+/** @defgroup  NF_CFG_Public_Functions
+ *  @{
+ */
+uint32_t NF_Cfg_Flash_Identify(uint8_t callFromFlash, uint32_t autoScan, uint32_t flashPinCfg, uint8_t restoreDefault, Nand_Flash_Cfg_Type *pFlashCfg);
+
+
+#endif /* __BL702_NF_CFG_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_nflash.h b/drivers/bl702_driver/std_drv/inc/bl702_nflash.h
new file mode 100644
index 00000000..b9cc9af5
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_nflash.h
@@ -0,0 +1,196 @@
+/**
+  ******************************************************************************
+  * @file    bl702_nflah.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_NFLAH_H__
+#define __BL702_NFLAH_H__
+
+#include "bl702_common.h"
+#include "bl702_sf_ctrl.h"
+
+/** @addtogroup  BL602_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  SFLAH
+ *  @{
+ */
+
+/** @defgroup  SFLAH_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief Serial flash configuration structure type definition
+ */
+/*@} end of group SFLAH_Public_Types */
+
+/** @defgroup  SFLAH_Public_Constants
+ *  @{
+ */
+
+/*@} end of group SFLAH_Public_Constants */
+
+/** @defgroup  SFLAH_Public_Macros
+ *  @{
+ */
+#define BFLB_NAND_FLASH_BLK_DATA_SIZE       (128 * 1024)
+#define BFLB_NAND_FLASH_BLK_TOTAL_SIZE      ((128 + 4) * 1024)
+#define BFLB_NAND_FLASH_PAGE_SIZE           (2048)
+#define BFLB_NAND_FLASH_PAGE_TOTAL_SIZE     (2048 + 64)
+#define BFLB_NAND_FLASH_PAGES_PER_BLOCK     (64)
+#define BFLB_NAND_FLASH_CMD_INVALID         (0xff)
+#define DISK_SECTOR_SIZE               		(512)
+typedef unsigned char	BYTE;
+typedef unsigned long	DWORD;
+typedef unsigned int	UINT;
+typedef BYTE	DSTATUS;
+typedef enum {
+	RES_OK = 0,		/* 0: Successful */
+	RES_ERROR,		/* 1: R/W Error */
+	RES_WRPRT,		/* 2: Write Protected */
+	RES_NOTRDY,		/* 3: Not Ready */
+	RES_PARERR		/* 4: Invalid Parameter */
+} DRESULT;
+
+typedef enum
+{
+	READ_DATA_FROM_CACHE = 0,//date:2048 bytes in each page
+	READ_SPARE_DATA_FROM_CACHE = 1,//spare date:64 bytes in each page
+}BL_Nand_Flash_READ_DATE_TYPE;
+
+typedef struct {
+    uint8_t ioMode;                         /*!< Serail flash interface mode,bit0-3:IF mode,bit4:unwrap */
+    uint8_t cReadSupport;                   /*!< Support continuous read mode,bit0:continuous read mode support,bit1:read mode cfg */
+    uint8_t clkDelay;                       /*!< SPI clock delay,bit0-3:delay,bit4-6:pad delay */
+    uint8_t clkInvert;                      /*!< SPI clock phase invert,bit0:clck invert,bit1:rx invert,bit2-4:pad delay,bit5-7:pad delay */
+    uint8_t resetEnCmd;                     /*!< Flash enable reset command */
+    uint8_t resetCmd;                       /*!< Flash reset command */
+    uint8_t resetCreadCmd;                  /*!< Flash reset continuous read command */
+    uint8_t resetCreadCmdSize;              /*!< Flash reset continuous read command size */
+    uint8_t jedecIdCmd;                     /*!< JEDEC ID command */
+    uint8_t jedecIdCmdDmyClk;               /*!< JEDEC ID command dummy clock */
+    uint8_t qpiJedecIdCmd;                  /*!< QPI JEDEC ID comamnd */
+    uint8_t qpiJedecIdCmdDmyClk;            /*!< QPI JEDEC ID command dummy clock */
+    uint8_t sectorSize;                     /*!< *1024bytes */
+    uint8_t mid;                            /*!< Manufacturer ID */
+    uint16_t pageSize;                      /*!< Page size */
+    uint8_t chipEraseCmd;                   /*!< Chip erase cmd */
+    uint8_t sectorEraseCmd;                 /*!< Sector erase command */
+    uint8_t blk128EraseCmd;                  /*!< Block 128K erase command */
+    uint8_t writeEnableCmd;                 /*!< Need before every erase or program */
+    uint8_t programLoadCmd;                 /*!< Program Load cmd */
+    uint8_t qprogramLoadCmd;					/*!< Program Load cmd x4*/
+    uint8_t pageProgramCmd;                 /*!< Page program cmd */
+    uint8_t qpageProgramCmd;                /*!< QIO page program cmd */
+    uint8_t qppAddrMode;                    /*!< QIO page program address mode */
+    uint8_t pageReadToCacheCmd;             /*!< Page read comamnd */
+    uint8_t getFeaturesCmd;                 /*!< GET FEATURES command to read the status */
+    uint8_t setFeaturesCmd;                 /*!< SET FEATURES command to read the status */
+    uint8_t readFromCacheCmd;               /*!< Read from cache command */
+    uint8_t fastReadCmd;                    /*!< Fast read command */
+    uint8_t frDmyClk;                       /*!< Fast read command dummy clock */
+    uint8_t qpiFastReadCmd;                 /*!< QPI fast read command */
+    uint8_t qpiFrDmyClk;                    /*!< QPI fast read command dummy clock */
+    uint8_t fastReadDoCmd;                  /*!< Fast read dual output command */
+    uint8_t frDoDmyClk;                     /*!< Fast read dual output command dummy clock */
+    uint8_t fastReadDioCmd;                 /*!< Fast read dual io comamnd */
+    uint8_t frDioDmyClk;                    /*!< Fast read dual io command dummy clock */
+    uint8_t fastReadQoCmd;                  /*!< Fast read quad output comamnd */
+    uint8_t frQoDmyClk;                     /*!< Fast read quad output comamnd dummy clock */
+    uint8_t fastReadQioCmd;                 /*!< Fast read quad io comamnd */
+    uint8_t frQioDmyClk;                    /*!< Fast read quad io comamnd dummy clock */
+    uint8_t qpiFastReadQioCmd;              /*!< QPI fast read quad io comamnd */
+    uint8_t qpiFrQioDmyClk;                 /*!< QPI fast read QIO dummy clock */
+    uint8_t qpiPageProgramCmd;              /*!< QPI program command */
+    uint8_t writeVregEnableCmd;             /*!< Enable write reg */
+    uint8_t wrEnableIndex;                  /*!< Write enable register index */
+    uint8_t qeIndex;                        /*!< Quad mode enable register index */
+    uint8_t busyIndex;                      /*!< Busy status register index */
+    uint8_t wrEnableBit;                    /*!< Write enable bit pos */
+    uint8_t qeBit;                          /*!< Quad enable bit pos */
+    uint8_t busyBit;                        /*!< Busy status bit pos */
+    uint8_t wrEnableWriteRegLen;            /*!< Register length of write enable */
+    uint8_t wrEnableReadRegLen;             /*!< Register length of write enable status */
+    uint8_t qeWriteRegLen;                  /*!< Register length of contain quad enable */
+    uint8_t qeReadRegLen;                   /*!< Register length of contain quad enable status */
+    uint8_t releasePowerDown;               /*!< Release power down command */
+    uint8_t busyReadRegLen;                 /*!< Register length of contain busy status */
+    uint8_t readRegCmd[4];                  /*!< Read register command buffer */
+    uint8_t writeRegCmd[4];                 /*!< Write register command buffer */
+    uint8_t enterQpi;                       /*!< Enter qpi command */
+    uint8_t exitQpi;                        /*!< Exit qpi command */
+    uint8_t cReadMode;                      /*!< Config data for continuous read mode */
+    uint8_t cRExit;                         /*!< Config data for exit continuous read mode */
+    uint8_t burstWrapCmd;                   /*!< Enable burst wrap command */
+    uint8_t burstWrapCmdDmyClk;             /*!< Enable burst wrap command dummy clock */
+    uint8_t burstWrapDataMode;              /*!< Data and address mode for this command */
+    uint8_t burstWrapData;                  /*!< Data to enable burst wrap */
+    uint8_t deBurstWrapCmd;                 /*!< Disable burst wrap command */
+    uint8_t deBurstWrapCmdDmyClk;           /*!< Disable burst wrap command dummy clock */
+    uint8_t deBurstWrapDataMode;            /*!< Data and address mode for this command */
+    uint8_t deBurstWrapData;                /*!< Data to disable burst wrap */
+    uint16_t timeEsector;                   /*!< 4K erase time */
+    uint16_t timeE132k;                      /*!< 132K erase time */
+    uint16_t timePagePgm;                   /*!< Page program time */
+    uint16_t timeCe;                        /*!< Chip erase time in ms */
+    uint8_t pdDelay;                        /*!< Release power down command delay time for wake up */
+    uint8_t qeData;                         /*!< QE set data */
+}__attribute__ ((packed)) Nand_Flash_Cfg_Type;
+
+//BL_Nand_Flash_Program_Bit_Err_Type ATTR_TCM_SECTION NFlash_Pass(uint8_t errorCode, BL_Nand_Flash_OP_Type opType);
+BL_Err_Type NFlash_GetJedecId(Nand_Flash_Cfg_Type *flashCfg, uint8_t *data);
+BL_Err_Type ATTR_TCM_SECTION NFlash_Erase(Nand_Flash_Cfg_Type *flashCfg, uint32_t startAddr, uint32_t endAddr);
+BL_Err_Type ATTR_TCM_SECTION NFlash_Blk128_Erase(Nand_Flash_Cfg_Type *flashCfg, uint32_t blockNum);
+BL_Err_Type ATTR_TCM_SECTION NFlash_Write_Enable(Nand_Flash_Cfg_Type *flashCfg);
+BL_Err_Type ATTR_TCM_SECTION NFlash_Read(Nand_Flash_Cfg_Type *flashCfg, uint32_t addr, uint8_t *data, uint32_t len);
+BL_Err_Type ATTR_TCM_SECTION NFlash_Program(Nand_Flash_Cfg_Type *flashCfg, uint32_t addr, const uint8_t *data, uint32_t len);
+BL_Err_Type ATTR_TCM_SECTION NFlash_Page_Read_To_Cache(Nand_Flash_Cfg_Type *flashCfg, uint32_t absolutePageNum);
+BL_Err_Type ATTR_TCM_SECTION NFlash_Get_Feature(Nand_Flash_Cfg_Type *flashCfg, uint8_t *data, uint8_t cmdType);
+BL_Err_Type ATTR_TCM_SECTION NFlash_Read_From_Cache(Nand_Flash_Cfg_Type *flashCfg, uint32_t addr, uint8_t *data, uint32_t len, uint8_t readType);
+BL_Err_Type ATTR_TCM_SECTION NFlash_Program_Execute(Nand_Flash_Cfg_Type *flashCfg, uint32_t addr);
+BL_Err_Type ATTR_TCM_SECTION NFlash_Set_Feature(Nand_Flash_Cfg_Type *flashCfg);
+BL_Err_Type ATTR_TCM_SECTION NFlash_Program_Load(Nand_Flash_Cfg_Type *flashCfg, uint32_t addr, const uint8_t *data, uint32_t len);
+BL_Err_Type ATTR_TCM_SECTION NFlash_Check_Bad_Block(Nand_Flash_Cfg_Type *flashCfg, uint32_t blockNum, uint8_t *data, uint32_t len);
+DRESULT ff_disk_read(BYTE pdrv, BYTE *buff, DWORD sector, UINT count);
+DRESULT ff_disk_write(BYTE pdrv, const BYTE *buff, DWORD sector, UINT count);
+DSTATUS ff_disk_initialize (BYTE pdrv);
+
+/*@} end of group SFLAH_Public_Functions */
+
+/*@} end of group SFLAH */
+
+/*@} end of group BL602_Peripheral_Driver */
+
+#endif /* __BL602_SFLAH_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_pds.h b/drivers/bl702_driver/std_drv/inc/bl702_pds.h
new file mode 100644
index 00000000..6932b806
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_pds.h
@@ -0,0 +1,785 @@
+/**
+  ******************************************************************************
+  * @file    bl702_pds.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_PDS_H__
+#define __BL702_PDS_H__
+
+#include "pds_reg.h"
+#include "bl702_ef_ctrl.h"
+#include "bl702_aon.h"
+#include "bl702_hbn.h"
+#include "bl702_sflash.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  PDS
+ *  @{
+ */
+
+/** @defgroup  PDS_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief PDS LDO level type definition
+ */
+typedef enum {
+    PDS_LDO_LEVEL_0P60V=0,                  /*!< PDS LDO voltage 0.60V */
+    PDS_LDO_LEVEL_0P65V=1,                  /*!< PDS LDO voltage 0.65V */
+    PDS_LDO_LEVEL_0P70V=2,                  /*!< PDS LDO voltage 0.70V */
+    PDS_LDO_LEVEL_0P75V=3,                  /*!< PDS LDO voltage 0.75V */
+    PDS_LDO_LEVEL_0P80V=4,                  /*!< PDS LDO voltage 0.80V */
+    PDS_LDO_LEVEL_0P85V=5,                  /*!< PDS LDO voltage 0.85V */
+    PDS_LDO_LEVEL_0P90V=6,                  /*!< PDS LDO voltage 0.90V */
+    PDS_LDO_LEVEL_0P95V=7,                  /*!< PDS LDO voltage 0.95V */
+    PDS_LDO_LEVEL_1P00V=8,                  /*!< PDS LDO voltage 1.00V */
+    PDS_LDO_LEVEL_1P05V=9,                  /*!< PDS LDO voltage 1.05V */
+    PDS_LDO_LEVEL_1P10V=10,                 /*!< PDS LDO voltage 1.10V */
+    PDS_LDO_LEVEL_1P15V=11,                 /*!< PDS LDO voltage 1.15V */
+    PDS_LDO_LEVEL_1P20V=12,                 /*!< PDS LDO voltage 1.20V */
+    PDS_LDO_LEVEL_1P25V=13,                 /*!< PDS LDO voltage 1.25V */
+    PDS_LDO_LEVEL_1P30V=14,                 /*!< PDS LDO voltage 1.30V */
+    PDS_LDO_LEVEL_1P35V=15,                 /*!< PDS LDO voltage 1.35V */
+}PDS_LDO_LEVEL_Type;
+
+/**
+ *  @brief PDS RAM configuration type definition
+ */
+typedef struct {
+    uint32_t PDS_RAM_CFG_0KB_16KB_CPU_RAM_RET1N     :  1;    /*!< [0] 0~16KB cpu_ram RET1N */
+    uint32_t PDS_RAM_CFG_16KB_32KB_CPU_RAM_RET1N    :  1;    /*!< [1] 16~32KB cpu_ram RET1N */
+    uint32_t PDS_RAM_CFG_32KB_48KB_CPU_RAM_RET1N    :  1;    /*!< [2] 32~48KB cpu_ram RET1N */
+    uint32_t PDS_RAM_CFG_48KB_64KB_CPU_RAM_RET1N    :  1;    /*!< [3] 48~64KB cpu_ram RET1N */
+    uint32_t PDS_RAM_CFG_0KB_16KB_CPU_RAM_RET2N     :  1;    /*!< [4] 0~16KB cpu_ram RET2N */
+    uint32_t PDS_RAM_CFG_16KB_32KB_CPU_RAM_RET2N    :  1;    /*!< [5] 16~32KB cpu_ram RET2N */
+    uint32_t PDS_RAM_CFG_32KB_48KB_CPU_RAM_RET2N    :  1;    /*!< [6] 32~48KB cpu_ram RET2N */
+    uint32_t PDS_RAM_CFG_48KB_64KB_CPU_RAM_RET2N    :  1;    /*!< [7] 48~64KB cpu_ram RET2N */
+    uint32_t PDS_RAM_CFG_0KB_16KB_CPU_RAM_PGEN      :  1;    /*!< [8] 0~16KB cpu_ram PGEN */
+    uint32_t PDS_RAM_CFG_16KB_32KB_CPU_RAM_PGEN     :  1;    /*!< [9] 16~32KB cpu_ram PGEN */
+    uint32_t PDS_RAM_CFG_32KB_48KB_CPU_RAM_PGEN     :  1;    /*!< [10] 32~48KB cpu_ram PGEN */
+    uint32_t PDS_RAM_CFG_48KB_64KB_CPU_RAM_PGEN     :  1;    /*!< [11] 48~64KB cpu_ram PGEN */
+    uint32_t PDS_RAM_CFG_RSV                        : 20;    /*!< [31:12]reserve */
+}PDS_RAM_CFG_Type;
+
+/**
+ *  @brief PDS PAD pin configuration type definition
+ */
+typedef enum {
+    PDS_PAD_PIN_GPIO_17,                    /*!< PAD GPIO 17 */
+    PDS_PAD_PIN_GPIO_18,                    /*!< PAD GPIO 18 */
+    PDS_PAD_PIN_GPIO_19,                    /*!< PAD GPIO 19 */
+    PDS_PAD_PIN_GPIO_20,                    /*!< PAD GPIO 20 */
+    PDS_PAD_PIN_GPIO_21,                    /*!< PAD GPIO 21 */
+    PDS_PAD_PIN_GPIO_22,                    /*!< PAD GPIO 22 */
+    PDS_PAD_PIN_GPIO_23,                    /*!< PAD GPIO 23 */
+    PDS_PAD_PIN_GPIO_24,                    /*!< PAD GPIO 24 */
+    PDS_PAD_PIN_GPIO_25,                    /*!< PAD GPIO 25 */
+    PDS_PAD_PIN_GPIO_26,                    /*!< PAD GPIO 26 */
+    PDS_PAD_PIN_GPIO_27,                    /*!< PAD GPIO 27 */
+    PDS_PAD_PIN_GPIO_28,                    /*!< PAD GPIO 28 */
+}PDS_PAD_PIN_Type;
+
+/**
+ *  @brief PDS PAD configuration type definition
+ */
+typedef enum {
+    PDS_PAD_CFG_PULL_NONE,                  /*!< no PD/PU/IE on PAD */
+    PDS_PAD_CFG_PULL_DOWN,                  /*!< Pulldown PAD */
+    PDS_PAD_CFG_PULL_UP,                    /*!< Pullup PAD */
+    PDS_PAD_CFG_ACTIVE_IE,                  /*!< Active IE */
+}PDS_PAD_CFG_Type;
+
+/**
+ *  @brief PDS configuration type definition
+ */
+typedef struct {
+    uint32_t pdsStart                      :  1;    /*!< [0]PDS Start */
+    uint32_t sleepForever                  :  1;    /*!< [1]PDS sleep forever */
+    uint32_t xtalForceOff                  :  1;    /*!< [2]Power off xtal force */
+    uint32_t saveWifiState                 :  1;    /*!< [3]Save WIFI State Before Enter PDS */
+    uint32_t dcdc18Off                     :  1;    /*!< [4]power down dcdc18 during PDS */
+    uint32_t bgSysOff                      :  1;    /*!< [5]power down bg_sys during PDS */
+    uint32_t gpioIePuPd                    :  1;    /*!< [6]allow PDS Control the GPIO IE/PU/PD at Sleep Mode */
+    uint32_t puFlash                       :  1;    /*!< [7]turn off Flash Power During PDS */
+    uint32_t clkOff                        :  1;    /*!< [8]gate clock during PDS (each pwr domain has its own control) */
+    uint32_t memStby                       :  1;    /*!< [9]mem_stby during PDS (each power domain can has its own control) */
+    uint32_t swPuFlash                     :  1;    /*!< [10]SW Turn on Flash */
+    uint32_t isolation                     :  1;    /*!< [11]Isolation during PDS (each power domain can has its own control) */
+    uint32_t waitXtalRdy                   :  1;    /*!< [12]wait XTAL Ready during before PDS Interrupt */
+    uint32_t pdsPwrOff                     :  1;    /*!< [13]Power off during PDS (each power domain can has its own control) */
+    uint32_t xtalOff                       :  1;    /*!< [14]xtal power down during PDS */
+    uint32_t socEnbForceOn                 :  1;    /*!< [15]pds_soc_enb always active */
+    uint32_t pdsRstSocEn                   :  1;    /*!< [16]pds_rst controlled by PDS */
+    uint32_t pdsRC32mOn                    :  1;    /*!< [17]RC32M always on or RC32M on/off controlled by PDS state */
+    uint32_t pdsLdoVselEn                  :  1;    /*!< [18]PDS "SLEEP" control LDO voltage enable */
+    uint32_t pdsRamLowPowerWithClkEn       :  1;    /*!< [19]Control SRAM Low Power with CLK (Sync) */
+    uint32_t reserved20                    :  1;    /*!< [20]Reserved */
+    uint32_t cpu0WfiMask                   :  1;    /*!< [21]pds start condition mask np_wfi */
+    uint32_t ldo11Off                      :  1;    /*!< [22]power down ldo11 during PDS */
+    uint32_t pdsForceRamClkEn              :  1;    /*!< [23]Force SRAM CLK Enable */
+    uint32_t pdsLdoVol                     :  4;    /*!< [27:24]LDO voltage value in PDS mode */
+    uint32_t pdsCtlRfSel                   :  2;    /*!< [29:28]select the way RF controlled by PDS */
+    uint32_t pdsCtlPllSel                  :  2;    /*!< [31:30]select the way PLL controlled by PDS */
+}PDS_CFG_Type;
+
+/**
+ *  @brief PDS configuration type definition
+ */
+typedef struct {
+    uint32_t pdsStart                      :  1;    /*!< [0]PDS Start */
+    uint32_t sleepForever                  :  1;    /*!< [1]PDS sleep forever */
+    uint32_t xtalForceOff                  :  1;    /*!< [2]Power off xtal force */
+    uint32_t saveWifiState                 :  1;    /*!< [3]Save WIFI State Before Enter PDS */
+    uint32_t dcdc18Off                     :  1;    /*!< [4]power down dcdc18 during PDS */
+    uint32_t bgSysOff                      :  1;    /*!< [5]power down bg_sys during PDS */
+    uint32_t gpioIePuPd                    :  1;    /*!< [6]allow PDS Control the GPIO IE/PU/PD at Sleep Mode */
+    uint32_t puFlash                       :  1;    /*!< [7]turn off Flash Power During PDS */
+    uint32_t clkOff                        :  1;    /*!< [8]gate clock during PDS (each pwr domain has its own control) */
+    uint32_t memStby                       :  1;    /*!< [9]mem_stby during PDS (each power domain can has its own control) */
+    uint32_t swPuFlash                     :  1;    /*!< [10]SW Turn on Flash */
+    uint32_t isolation                     :  1;    /*!< [11]Isolation during PDS (each power domain can has its own control) */
+    uint32_t waitXtalRdy                   :  1;    /*!< [12]wait XTAL Ready during before PDS Interrupt */
+    uint32_t pdsPwrOff                     :  1;    /*!< [13]Power off during PDS (each power domain can has its own control) */
+    uint32_t xtalOff                       :  1;    /*!< [14]xtal power down during PDS */
+    uint32_t socEnbForceOn                 :  1;    /*!< [15]pds_soc_enb always active */
+    uint32_t pdsRstSocEn                   :  1;    /*!< [16]pds_rst controlled by PDS */
+    uint32_t pdsRC32mOn                    :  1;    /*!< [17]RC32M always on or RC32M on/off controlled by PDS state */
+    uint32_t pdsLdoVselEn                  :  1;    /*!< [18]PDS "SLEEP" control LDO voltage enable */
+    uint32_t pdsRamLowPowerWithClkEn       :  1;    /*!< [19]Control SRAM Low Power with CLK (Sync) */
+    uint32_t reserved20                    :  1;    /*!< [20]Reserved */
+    uint32_t cpu0WfiMask                   :  1;    /*!< [21]pds start condition mask np_wfi */
+    uint32_t ldo11Off                      :  1;    /*!< [22]power down ldo11 during PDS */
+    uint32_t pdsForceRamClkEn              :  1;    /*!< [23]Force SRAM CLK Enable */
+    uint32_t pdsLdoVol                     :  4;    /*!< [27:24]LDO voltage value in PDS mode */
+    uint32_t pdsCtlRfSel                   :  2;    /*!< [29:28]select the way RF controlled by PDS */
+    uint32_t pdsCtlPllSel                  :  2;    /*!< [31:30]select the way PLL controlled by PDS */
+}PDS_CTL_Type;
+
+/**
+ *  @brief PDS force configuration type definition
+ */
+typedef struct {
+    uint32_t forceCpuPwrOff                :  1;    /*!< [0]manual force NP power off */
+    uint32_t rsv1                          :  1;    /*!< [1]reserve */
+    uint32_t forceBzPwrOff                 :  1;    /*!< [2]manual force BZ power off */
+    uint32_t forceUsbPwrOff                :  1;    /*!< [3]manual force USB power off */
+    uint32_t forceCpuIsoEn                 :  1;    /*!< [4]manual force NP isolation */
+    uint32_t rsv5                          :  1;    /*!< [5]reserve */
+    uint32_t forceBzIsoEn                  :  1;    /*!< [6]manual force BZ isolation */
+    uint32_t forceUsbIsoEn                 :  1;    /*!< [7]manual force USB isolation */
+    uint32_t forceCpuPdsRst                :  1;    /*!< [8]manual force NP pds reset */
+    uint32_t rsv9                          :  1;    /*!< [9]reserve */
+    uint32_t forceBzPdsRst                 :  1;    /*!< [10]manual force BZ pds reset */
+    uint32_t forceUsbPdsRst                :  1;    /*!< [11]manual force USB pds reset */
+    uint32_t forceCpuMemStby               :  1;    /*!< [12]manual force NP memory sleep */
+    uint32_t rsv13                         :  1;    /*!< [13]reserve */
+    uint32_t forceBzMemStby                :  1;    /*!< [14]manual force BZ memory sleep */
+    uint32_t forceUsbMemStby               :  1;    /*!< [15]manual force USB memory sleep */
+    uint32_t forceCpuGateClk               :  1;    /*!< [16]manual force NP clock gated */
+    uint32_t rsv17                         :  1;    /*!< [17]reserve */
+    uint32_t forceBzGateClk                :  1;    /*!< [18]manual force BZ clock gated */
+    uint32_t forceUsbGateClk               :  1;    /*!< [19]manual force USB clock gated */
+    uint32_t rsv20_31                      : 12;    /*!< [31:20]reserve */
+}PDS_CTL2_Type;
+
+/**
+ *  @brief PDS force configuration type definition
+ */
+typedef struct {
+    uint32_t rsv0                          :  1;    /*!< [0]reserve */
+    uint32_t forceMiscPwrOff               :  1;    /*!< [1]manual force MISC pwr_off */
+    uint32_t forceBlePwrOff                :  1;    /*!< [2]manual force BZ_BLE pwr_off */
+    uint32_t rsv3_4                        :  2;    /*!< [4:3]reserve */
+    uint32_t forceBleIsoEn                 :  1;    /*!< [5]manual force BZ_BLE iso_en */
+    uint32_t rsv6                          :  1;    /*!< [6]reserve */
+    uint32_t forceMiscPdsRst               :  1;    /*!< [7]manual force MISC pds_rst */
+    uint32_t forceBlePdsRst                :  1;    /*!< [8]manual force BZ_BLE pds_rst */
+    uint32_t rsv9                          :  1;    /*!< [9]reserve */
+    uint32_t forceMiscMemStby              :  1;    /*!< [10]manual force MISC mem_stby */
+    uint32_t forceBleMemStby               :  1;    /*!< [11]manual force BZ_BLE mem_stby */
+    uint32_t rsv12                         :  1;    /*!< [12]reserve */
+    uint32_t forceMiscGateClk              :  1;    /*!< [13]manual force MISC gate_clk */
+    uint32_t forceBleGateClk               :  1;    /*!< [14]manual force BZ_BLE gate_clk */
+    uint32_t rsv15_23                      :  9;    /*!< [23:15]reserve */
+    uint32_t CpuIsoEn                      :  1;    /*!< [24]make NP isolated at PDS Sleep state */
+    uint32_t rsv25_26                      :  2;    /*!< [26:25]reserve */
+    uint32_t BzIsoEn                       :  1;    /*!< [27]make BZ isolated at PDS Sleep state */
+    uint32_t BleIsoEn                      :  1;    /*!< [28]make Ble isolated at PDS Sleep state */
+    uint32_t UsbIsoEn                      :  1;    /*!< [29]make USB isolated at PDS Sleep state */
+    uint32_t MiscIsoEn                     :  1;    /*!< [30]make misc isolated at PDS Sleep state */
+    uint32_t rsv31                         :  1;    /*!< [31]reserve */
+}PDS_CTL3_Type;
+
+/**
+ *  @brief PDS force configuration type definition
+ */
+typedef struct {
+    uint32_t cpuPwrOff                     :  1;    /*!< [0] */
+    uint32_t cpuRst                        :  1;    /*!< [1] */
+    uint32_t cpuMemStby                    :  1;    /*!< [2] */
+    uint32_t cpuGateClk                    :  1;    /*!< [3] */
+    uint32_t rsv4_11                       :  8;    /*!< [11:4]reserve */
+    uint32_t BzPwrOff                      :  1;    /*!< [12] */
+    uint32_t BzRst                         :  1;    /*!< [13] */
+    uint32_t BzMemStby                     :  1;    /*!< [14] */
+    uint32_t BzGateClk                     :  1;    /*!< [15] */
+    uint32_t BlePwrOff                     :  1;    /*!< [16] */
+    uint32_t BleRst                        :  1;    /*!< [17] */
+    uint32_t BleMemStby                    :  1;    /*!< [18] */
+    uint32_t BleGateClk                    :  1;    /*!< [19] */
+    uint32_t UsbPwrOff                     :  1;    /*!< [20] */
+    uint32_t UsbRst                        :  1;    /*!< [21] */
+    uint32_t UsbMemStby                    :  1;    /*!< [22] */
+    uint32_t UsbGateClk                    :  1;    /*!< [23] */
+    uint32_t MiscPwrOff                    :  1;    /*!< [24] */
+    uint32_t MiscRst                       :  1;    /*!< [25] */
+    uint32_t MiscMemStby                   :  1;    /*!< [26] */
+    uint32_t MiscGateClk                   :  1;    /*!< [27] */
+    uint32_t rsv28_29                      :  2;    /*!< [29:28]reserve */
+    uint32_t MiscAnaPwrOff                 :  1;    /*!< [30] */
+    uint32_t MiscDigPwrOff                 :  1;    /*!< [31] */
+}PDS_CTL4_Type;
+
+/**
+ *  @brief PDS default level configuration type definition
+ */
+typedef struct {
+    PDS_CTL_Type pdsCtl;                    /*!< PDS_CTL configuration */
+    PDS_CTL2_Type pdsCtl2;                  /*!< PDS_CTL2 configuration */
+    PDS_CTL3_Type pdsCtl3;                  /*!< PDS_CTL3 configuration */
+    PDS_CTL4_Type pdsCtl4;                  /*!< PDS_CTL4 configuration */
+}PDS_DEFAULT_LV_CFG_Type;
+
+/**
+ *  @brief PDS interrupt type definition
+ */
+typedef enum {
+    PDS_INT_WAKEUP=0,                       /*!< PDS wakeup interrupt(assert bit while wakeup, include PDS_Timer/...) */
+    PDS_INT_RF_DONE,                        /*!< PDS RF done interrupt */
+    PDS_INT_PLL_DONE,                       /*!< PDS PLL done interrupt */
+    PDS_INT_PDS_SLEEP_CNT,                  /*!< wakeup trigger by pds_sleep_cnt=0 */
+    PDS_INT_HBN_IRQ_OUT0,                   /*!< wakeup trigger by hbn_irq_out[0] */
+    PDS_INT_HBN_IRQ_OUT1,                   /*!< wakeup trigger by hbn_irq_out[1] */
+    PDS_INT_GPIO_IRQ,                       /*!< wakeup trigger by gpio_irq */
+    PDS_INT_IRRX,                           /*!< wakeup trigger by irrx_int */
+    PDS_INT_BLE_SLP_IRQ,                    /*!< wakeup trigger by ble_slp_irq */
+    PDS_INT_USB_WKUP,                       /*!< wakeup trigger by usb_wkup */
+    PDS_INT_KYS_QDEC,                       /*!< wakeup trigger by kys_int or qdec */
+    PDS_INT_MAX,                            /*!< PDS int max number */
+}PDS_INT_Type;
+
+/**
+ *  @brief PDS vddcore GPIO interrupt type definition
+ */
+typedef enum {
+    PDS_VDDCORE_GPIO_SRC_GPIO_0,            /*!< PDS VDDCORE GPIO0 as PDS interrupt source */
+    PDS_VDDCORE_GPIO_SRC_GPIO_1,            /*!< PDS VDDCORE GPIO1 as PDS interrupt source */
+    PDS_VDDCORE_GPIO_SRC_GPIO_2,            /*!< PDS VDDCORE GPIO2 as PDS interrupt source */
+    PDS_VDDCORE_GPIO_SRC_GPIO_3,            /*!< PDS VDDCORE GPIO3 as PDS interrupt source */
+    PDS_VDDCORE_GPIO_SRC_GPIO_4,            /*!< PDS VDDCORE GPIO4 as PDS interrupt source */
+    PDS_VDDCORE_GPIO_SRC_GPIO_5,            /*!< PDS VDDCORE GPIO5 as PDS interrupt source */
+    PDS_VDDCORE_GPIO_SRC_GPIO_6,            /*!< PDS VDDCORE GPIO6 as PDS interrupt source */
+    PDS_VDDCORE_GPIO_SRC_GPIO_7,            /*!< PDS VDDCORE GPIO7 as PDS interrupt source */
+}PDS_VDDCORE_GPIO_SRC_Type;
+
+/**
+ *  @brief PDS reset event type definition
+ */
+typedef enum {
+    PDS_RST_EVENT_BUS_RST,                  /*!< hreset_n (Bus Reset) */
+    PDS_RST_EVENT_HBN_PWR_ON_RST,           /*!< pwr_rst_n (hbn power on reset) */
+    PDS_RST_EVENT_PDS_RST,                  /*!< pds_rst_n (pds reset) */
+    PDS_RST_EVENT_MAX,                      /*!< PDS rst event max number */
+}PDS_RST_EVENT_Type;
+
+/**
+ *  @brief PDS PLL status type definition
+ */
+typedef enum {
+    PDS_PLL_STS_OFF=0,                      /*!< 2'b00 */
+    PDS_PLL_STS_SFREG=1,                    /*!< 2'b01 */
+    PDS_PLL_STS_PU=2,                       /*!< 2'b10 */
+    PDS_PLL_STS_RDY=3,                      /*!< 2'b11 */
+}PDS_PLL_STS_Type;
+
+/**
+ *  @brief PDS RF status type definition
+ */
+typedef enum {
+    PDS_RF_STS_OFF=0,                       /*!< 4'b0000 */
+    PDS_RF_STS_PU_MBG=1,                    /*!< 4'b0001 */
+    PDS_RF_STS_PU_LDO15RF=3,                /*!< 4'b0011 */
+    PDS_RF_STS_PU_SFREG=7,                  /*!< 4'b0111 */
+    PDS_RF_STS_BZ_EN_AON=15,                /*!< 4'b1111 */
+}PDS_RF_STS_Type;
+
+/**
+ *  @brief PDS status type definition
+ */
+typedef enum {
+    PDS_STS_IDLE=0,                         /*!< 4'b0000 */
+    PDS_STS_ECG=8,                          /*!< 4'b1000 */
+    PDS_STS_ERST=12,                        /*!< 4'b1100 */
+    PDS_STS_EISO=15,                        /*!< 4'b1111 */
+    PDS_STS_POFF=7,                         /*!< 4'b0111 */
+    PDS_STS_PRE_BGON=3,                     /*!< 4'b0011 */
+    PDS_STS_PRE_BGON1=1,                    /*!< 4'b0001 */
+    PDS_STS_BGON=5,                         /*!< 4'b0101 */
+    PDS_STS_CLK_SW_32M=4,                   /*!< 4'b0100 */
+    PDS_STS_PON_DCDC=6,                     /*!< 4'b0110 */
+    PDS_STS_PON_LDO11_MISC=14,              /*!< 4'b1110 */
+    PDS_STS_PON=10,                         /*!< 4'b1010 */
+    PDS_STS_DISO=2,                         /*!< 4'b0010 */
+    PDS_STS_DCG=13,                         /*!< 4'b1101 */
+    PDS_STS_DRST=11,                        /*!< 4'b1011 */
+    PDS_STS_WAIT_EFUSE=9,                   /*!< 4'b1001 */
+}PDS_STS_Type;
+
+/**
+ *  @brief PLL XTAL type definition
+ */
+typedef enum {
+    PDS_PLL_XTAL_NONE,                      /*!< XTAL is none */
+    PDS_PLL_XTAL_32M,                       /*!< XTAL is 32M */
+    PDS_PLL_XTAL_RC32M,                     /*!< XTAL is RC32M */
+}PDS_PLL_XTAL_Type;
+
+/**
+ *  @brief PLL output clock type definition
+ */
+typedef enum {
+    PDS_PLL_CLK_480M,                       /*!< PLL output clock:480M */
+    PDS_PLL_CLK_240M,                       /*!< PLL output clock:240M */
+    PDS_PLL_CLK_192M,                       /*!< PLL output clock:192M */
+    PDS_PLL_CLK_160M,                       /*!< PLL output clock:160M */
+    PDS_PLL_CLK_120M,                       /*!< PLL output clock:120M */
+    PDS_PLL_CLK_96M,                        /*!< PLL output clock:96M */
+    PDS_PLL_CLK_80M,                        /*!< PLL output clock:80M */
+    PDS_PLL_CLK_48M,                        /*!< PLL output clock:48M */
+    PDS_PLL_CLK_32M,                        /*!< PLL output clock:32M */
+}PDS_PLL_CLK_Type;
+
+/**
+ *  @brief PDS level 0-7 mode HBN GPIO interrupt trigger type definition
+ */
+typedef enum {
+    PDS_AON_GPIO_INT_TRIGGER_SYNC_FALLING_EDGE,    /*!< PDS level 0-7 mode HBN GPIO INT trigger type: sync falling edge trigger */
+    PDS_AON_GPIO_INT_TRIGGER_SYNC_RISING_EDGE,    /*!< PDS level 0-7 mode HBN GPIO INT trigger type: sync rising edge trigger */
+    PDS_AON_GPIO_INT_TRIGGER_SYNC_LOW_LEVEL,    /*!< PDS level 0-7 mode HBN GPIO INT trigger type: sync low level trigger */
+    PDS_AON_GPIO_INT_TRIGGER_SYNC_HIGH_LEVEL,    /*!< PDS level 0-7 mode HBN GPIO INT trigger type: sync high level trigger */
+    PDS_AON_GPIO_INT_TRIGGER_ASYNC_FALLING_EDGE,    /*!< PDS level 0-7 mode HBN GPIO INT trigger type: async falling edge trigger */
+    PDS_AON_GPIO_INT_TRIGGER_ASYNC_RISING_EDGE,    /*!< PDS level 0-7 mode HBN GPIO INT trigger type: async rising edge trigger */
+    PDS_AON_GPIO_INT_TRIGGER_ASYNC_LOW_LEVEL,    /*!< PDS level 0-7 mode HBN GPIO INT trigger type: async low level trigger */
+    PDS_AON_GPIO_INT_TRIGGER_ASYNC_HIGH_LEVEL,    /*!< PDS level 0-7 mode HBN GPIO INT trigger type: async high level trigger */
+}PDS_AON_GPIO_INT_Trigger_Type;
+
+/**
+ *  @brief PDS APP configuration type definition
+ */
+typedef struct {
+    uint8_t pdsLevel;                       /*!< PDS level */
+    uint8_t turnOffXtal32m;                 /*!< Wheather turn off XTAL32M */
+    uint8_t turnOffDll;                     /*!< Wheather turn off DLL */
+    uint8_t turnOffRF;                      /*!< Wheather turn off RF */
+    uint8_t useXtal32k;                     /*!< Wheather use xtal 32K as 32K clock source,otherwise use rc32k */
+    uint8_t pdsAonGpioWakeupSrc;            /*!< PDS level 0-7,31 mode aon GPIO Wakeup source(HBN wakeup pin) */
+    PDS_AON_GPIO_INT_Trigger_Type pdsAonGpioTrigType;    /*!< PDS level 0-7,31 mode aon GPIO Triger type(HBN wakeup pin) */
+    uint8_t powerDownFlash;                 /*!< Whether power down flash */
+    uint8_t pdsHoldGpio;                    /*!< Whether pds hold gpio level */
+    uint8_t turnOffFlashPad;                /*!< Whether turn off flash pad(GPIO17-GPIO22, GPIO23-GPIO28) */
+    uint8_t flashPinCfg;                    /*!< 0 ext flash 23-28, 1 internal flash 23-28, 2 internal flash 23-28, 3 ext flash 17-22 */
+    uint8_t turnoffPLL;                     /*!< Whether trun off PLL */
+    uint8_t xtalType;                       /*!< XTal type, used when user choose turn off PLL, PDS will turn on when exit PDS mode */
+    uint8_t flashContRead;                  /*!< Whether enable flash continue read */
+    uint32_t sleepTime;                     /*!< PDS sleep time */
+    SPI_Flash_Cfg_Type *flashCfg;           /*!< Flash config pointer, used when power down flash */
+    HBN_LDO_LEVEL_Type ldoLevel;            /*!< LDO level */
+    void (*preCbFun)(void);                 /*!< Pre callback function */
+    void (*postCbFun)(void);                /*!< Post callback function */
+}PDS_APP_CFG_Type;
+
+/**
+ *  @brief PDS LDO voltage type definition
+ */
+typedef enum {
+    PDS_LDO_VOLTAGE_0P60V,                  /*!< PDS LDO voltage 0.60V */
+    PDS_LDO_VOLTAGE_0P65V,                  /*!< PDS LDO voltage 0.65V */
+    PDS_LDO_VOLTAGE_0P70V,                  /*!< PDS LDO voltage 0.70V */
+    PDS_LDO_VOLTAGE_0P75V,                  /*!< PDS LDO voltage 0.75V */
+    PDS_LDO_VOLTAGE_0P80V,                  /*!< PDS LDO voltage 0.80V */
+    PDS_LDO_VOLTAGE_0P85V,                  /*!< PDS LDO voltage 0.85V */
+    PDS_LDO_VOLTAGE_0P90V,                  /*!< PDS LDO voltage 0.9V */
+    PDS_LDO_VOLTAGE_0P95V,                  /*!< PDS LDO voltage 0.95V */
+    PDS_LDO_VOLTAGE_1P00V,                  /*!< PDS LDO voltage 1.0V */
+    PDS_LDO_VOLTAGE_1P05V,                  /*!< PDS LDO voltage 1.05V */
+    PDS_LDO_VOLTAGE_1P10V,                  /*!< PDS LDO voltage 1.1V */
+    PDS_LDO_VOLTAGE_1P15V,                  /*!< PDS LDO voltage 1.15V */
+    PDS_LDO_VOLTAGE_1P20V,                  /*!< PDS LDO voltage 1.2V */
+    PDS_LDO_VOLTAGE_1P25V,                  /*!< PDS LDO voltage 1.25V */
+    PDS_LDO_VOLTAGE_1P30V,                  /*!< PDS LDO voltage 1.3V */
+    PDS_LDO_VOLTAGE_1P35V,                  /*!< PDS LDO voltage 1.35V */
+}PDS_LDO_VOLTAGE_Type;
+
+/**
+ *  @brief PDS auto power down configuration type definition
+ */
+typedef struct {
+    BL_Fun_Type mbgPower;                   /*!< PDS auto [31] MBG power */
+    BL_Fun_Type ldo18rfPower;               /*!< PDS auto [30] LDO18RF power */
+    BL_Fun_Type sfregPower;                 /*!< PDS auto [29] SF_REG power */
+    BL_Fun_Type pllPower;                   /*!< PDS auto [28] PLL power */
+    BL_Fun_Type cpu0Power;                  /*!< PDS auto [19] NP power */
+    BL_Fun_Type rc32mPower;                 /*!< PDS auto [17] RC32M power */
+    BL_Fun_Type xtalPower;                  /*!< PDS auto [14] XTAL power */
+    BL_Fun_Type allPower;                   /*!< PDS auto [13] all power */
+    BL_Fun_Type isoPower;                   /*!< PDS auto [11] ISO power */
+    BL_Fun_Type bzPower;                    /*!< PDS auto [10] BZ power */
+    BL_Fun_Type sramDisStanby;              /*!< PDS auto [9] SRAM memory stanby disable */
+    BL_Fun_Type cgPower;                    /*!< PDS auto [8] CG power */
+    BL_Fun_Type cpu1Power;                  /*!< PDS auto [7] AP power */
+    BL_Fun_Type usbPower;                   /*!< PDS auto [3] USB power */
+}PDS_AUTO_POWER_DOWN_CFG_Type;
+
+/**
+ *  @brief PDS auto configuration type definition
+ */
+typedef struct {
+    PDS_LDO_VOLTAGE_Type vddcoreVol;        /*!< PDS auto [27:24] VDDCORE voltage, reference 0x4001F80C[27:24], recommended 0xA */
+    BL_Fun_Type vddcoreVolEn;               /*!< PDS auto [18] VDDCORE voltage enable bit */
+    BL_Fun_Type cpu0NotNeedWFI;             /*!< PDS auto [21] NP not need WFI to get in PDS mode */
+    BL_Fun_Type cpu1NotNeedWFI;             /*!< PDS auto [20] AP not need WFI to get in PDS mode */
+    BL_Fun_Type busReset;                   /*!< PDS auto [16] bus reset bit, reset after wake up from PDS mode */
+    BL_Fun_Type disIrqWakeUp;               /*!< PDS auto [15] disable IRQ request to wake up from PDS mode, except PDS counter IRQ */
+    BL_Fun_Type powerOffXtalForever;        /*!< PDS auto [2] power off xtal after get in PDS mode, and never power on xtal after wake up */
+    BL_Fun_Type sleepForever;               /*!< PDS auto [1] sleep forever after get in PDS mode, need reset system to restart */
+}PDS_AUTO_NORMAL_CFG_Type;
+
+/**
+ *  @brief PDS force type definition
+ */
+typedef enum {
+    PDS_FORCE_NP,                           /*!< PDS force NP */
+    PDS_FORCE_RSV,                          /*!< rsv */
+    PDS_FORCE_BZ,                           /*!< PDS force BZ */
+    PDS_FORCE_USB,                          /*!< PDS force USB */
+}PDS_FORCE_Type;
+
+/**
+ *  @brief PDS force type definition
+ */
+typedef enum {
+    AUDIO_PLL_12288000_HZ,                  /*!< PDS AUDIO PLL SET AS 12.288MHZ */
+    AUDIO_PLL_11289600_HZ,                  /*!< PDS AUDIO PLL SET AS 11.2896HZ */
+    AUDIO_PLL_5644800_HZ,                   /*!< PDS AUDIO PLL SET AS 2.822400HZ */
+    AUDIO_PLL_24576000_HZ,                  /*!< PDS AUDIO PLL SET AS 24.576000MHZ */
+    AUDIO_PLL_24000000_HZ,                  /*!< PDS AUDIO PLL SET AS 24.000000MHZ */
+}PDS_AUDIO_PLL_Type;
+
+/*@} end of group PDS_Public_Types */
+
+/** @defgroup  PDS_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  PDS_LDO_LEVEL_TYPE
+ *  @{
+ */
+#define IS_PDS_LDO_LEVEL_TYPE(type)                      (((type) == PDS_LDO_LEVEL_0P60V) || \
+                                                          ((type) == PDS_LDO_LEVEL_0P65V) || \
+                                                          ((type) == PDS_LDO_LEVEL_0P70V) || \
+                                                          ((type) == PDS_LDO_LEVEL_0P75V) || \
+                                                          ((type) == PDS_LDO_LEVEL_0P80V) || \
+                                                          ((type) == PDS_LDO_LEVEL_0P85V) || \
+                                                          ((type) == PDS_LDO_LEVEL_0P90V) || \
+                                                          ((type) == PDS_LDO_LEVEL_0P95V) || \
+                                                          ((type) == PDS_LDO_LEVEL_1P00V) || \
+                                                          ((type) == PDS_LDO_LEVEL_1P05V) || \
+                                                          ((type) == PDS_LDO_LEVEL_1P10V) || \
+                                                          ((type) == PDS_LDO_LEVEL_1P15V) || \
+                                                          ((type) == PDS_LDO_LEVEL_1P20V) || \
+                                                          ((type) == PDS_LDO_LEVEL_1P25V) || \
+                                                          ((type) == PDS_LDO_LEVEL_1P30V) || \
+                                                          ((type) == PDS_LDO_LEVEL_1P35V))
+
+/** @defgroup  PDS_PAD_PIN_TYPE
+ *  @{
+ */
+#define IS_PDS_PAD_PIN_TYPE(type)                        (((type) == PDS_PAD_PIN_GPIO_17) || \
+                                                          ((type) == PDS_PAD_PIN_GPIO_18) || \
+                                                          ((type) == PDS_PAD_PIN_GPIO_19) || \
+                                                          ((type) == PDS_PAD_PIN_GPIO_20) || \
+                                                          ((type) == PDS_PAD_PIN_GPIO_21) || \
+                                                          ((type) == PDS_PAD_PIN_GPIO_22) || \
+                                                          ((type) == PDS_PAD_PIN_GPIO_23) || \
+                                                          ((type) == PDS_PAD_PIN_GPIO_24) || \
+                                                          ((type) == PDS_PAD_PIN_GPIO_25) || \
+                                                          ((type) == PDS_PAD_PIN_GPIO_26) || \
+                                                          ((type) == PDS_PAD_PIN_GPIO_27) || \
+                                                          ((type) == PDS_PAD_PIN_GPIO_28))
+
+/** @defgroup  PDS_PAD_CFG_TYPE
+ *  @{
+ */
+#define IS_PDS_PAD_CFG_TYPE(type)                        (((type) == PDS_PAD_CFG_PULL_NONE) || \
+                                                          ((type) == PDS_PAD_CFG_PULL_DOWN) || \
+                                                          ((type) == PDS_PAD_CFG_PULL_UP) || \
+                                                          ((type) == PDS_PAD_CFG_ACTIVE_IE))
+
+/** @defgroup  PDS_INT_TYPE
+ *  @{
+ */
+#define IS_PDS_INT_TYPE(type)                            (((type) == PDS_INT_WAKEUP) || \
+                                                          ((type) == PDS_INT_RF_DONE) || \
+                                                          ((type) == PDS_INT_PLL_DONE) || \
+                                                          ((type) == PDS_INT_PDS_SLEEP_CNT) || \
+                                                          ((type) == PDS_INT_HBN_IRQ_OUT0) || \
+                                                          ((type) == PDS_INT_HBN_IRQ_OUT1) || \
+                                                          ((type) == PDS_INT_GPIO_IRQ) || \
+                                                          ((type) == PDS_INT_IRRX) || \
+                                                          ((type) == PDS_INT_BLE_SLP_IRQ) || \
+                                                          ((type) == PDS_INT_USB_WKUP) || \
+                                                          ((type) == PDS_INT_KYS_QDEC) || \
+                                                          ((type) == PDS_INT_MAX))
+
+/** @defgroup  PDS_VDDCORE_GPIO_SRC_TYPE
+ *  @{
+ */
+#define IS_PDS_VDDCORE_GPIO_SRC_TYPE(type)               (((type) == PDS_VDDCORE_GPIO_SRC_GPIO_0) || \
+                                                          ((type) == PDS_VDDCORE_GPIO_SRC_GPIO_1) || \
+                                                          ((type) == PDS_VDDCORE_GPIO_SRC_GPIO_2) || \
+                                                          ((type) == PDS_VDDCORE_GPIO_SRC_GPIO_3) || \
+                                                          ((type) == PDS_VDDCORE_GPIO_SRC_GPIO_4) || \
+                                                          ((type) == PDS_VDDCORE_GPIO_SRC_GPIO_5) || \
+                                                          ((type) == PDS_VDDCORE_GPIO_SRC_GPIO_6) || \
+                                                          ((type) == PDS_VDDCORE_GPIO_SRC_GPIO_7))
+
+/** @defgroup  PDS_RST_EVENT_TYPE
+ *  @{
+ */
+#define IS_PDS_RST_EVENT_TYPE(type)                      (((type) == PDS_RST_EVENT_BUS_RST) || \
+                                                          ((type) == PDS_RST_EVENT_HBN_PWR_ON_RST) || \
+                                                          ((type) == PDS_RST_EVENT_PDS_RST) || \
+                                                          ((type) == PDS_RST_EVENT_MAX))
+
+/** @defgroup  PDS_PLL_STS_TYPE
+ *  @{
+ */
+#define IS_PDS_PLL_STS_TYPE(type)                        (((type) == PDS_PLL_STS_OFF) || \
+                                                          ((type) == PDS_PLL_STS_SFREG) || \
+                                                          ((type) == PDS_PLL_STS_PU) || \
+                                                          ((type) == PDS_PLL_STS_RDY))
+
+/** @defgroup  PDS_RF_STS_TYPE
+ *  @{
+ */
+#define IS_PDS_RF_STS_TYPE(type)                         (((type) == PDS_RF_STS_OFF) || \
+                                                          ((type) == PDS_RF_STS_PU_MBG) || \
+                                                          ((type) == PDS_RF_STS_PU_LDO15RF) || \
+                                                          ((type) == PDS_RF_STS_PU_SFREG) || \
+                                                          ((type) == PDS_RF_STS_BZ_EN_AON))
+
+/** @defgroup  PDS_STS_TYPE
+ *  @{
+ */
+#define IS_PDS_STS_TYPE(type)                            (((type) == PDS_STS_IDLE) || \
+                                                          ((type) == PDS_STS_ECG) || \
+                                                          ((type) == PDS_STS_ERST) || \
+                                                          ((type) == PDS_STS_EISO) || \
+                                                          ((type) == PDS_STS_POFF) || \
+                                                          ((type) == PDS_STS_PRE_BGON) || \
+                                                          ((type) == PDS_STS_PRE_BGON1) || \
+                                                          ((type) == PDS_STS_BGON) || \
+                                                          ((type) == PDS_STS_CLK_SW_32M) || \
+                                                          ((type) == PDS_STS_PON_DCDC) || \
+                                                          ((type) == PDS_STS_PON_LDO11_MISC) || \
+                                                          ((type) == PDS_STS_PON) || \
+                                                          ((type) == PDS_STS_DISO) || \
+                                                          ((type) == PDS_STS_DCG) || \
+                                                          ((type) == PDS_STS_DRST) || \
+                                                          ((type) == PDS_STS_WAIT_EFUSE))
+
+/** @defgroup  PDS_PLL_XTAL_TYPE
+ *  @{
+ */
+#define IS_PDS_PLL_XTAL_TYPE(type)                       (((type) == PDS_PLL_XTAL_NONE) || \
+                                                          ((type) == PDS_PLL_XTAL_32M) || \
+                                                          ((type) == PDS_PLL_XTAL_RC32M))
+
+/** @defgroup  PDS_PLL_CLK_TYPE
+ *  @{
+ */
+#define IS_PDS_PLL_CLK_TYPE(type)                        (((type) == PDS_PLL_CLK_480M) || \
+                                                          ((type) == PDS_PLL_CLK_240M) || \
+                                                          ((type) == PDS_PLL_CLK_192M) || \
+                                                          ((type) == PDS_PLL_CLK_160M) || \
+                                                          ((type) == PDS_PLL_CLK_120M) || \
+                                                          ((type) == PDS_PLL_CLK_96M) || \
+                                                          ((type) == PDS_PLL_CLK_80M) || \
+                                                          ((type) == PDS_PLL_CLK_48M) || \
+                                                          ((type) == PDS_PLL_CLK_32M))
+
+/** @defgroup  PDS_AON_GPIO_INT_TRIGGER_TYPE
+ *  @{
+ */
+#define IS_PDS_AON_GPIO_INT_TRIGGER_TYPE(type)           (((type) == PDS_AON_GPIO_INT_TRIGGER_SYNC_FALLING_EDGE) || \
+                                                          ((type) == PDS_AON_GPIO_INT_TRIGGER_SYNC_RISING_EDGE) || \
+                                                          ((type) == PDS_AON_GPIO_INT_TRIGGER_SYNC_LOW_LEVEL) || \
+                                                          ((type) == PDS_AON_GPIO_INT_TRIGGER_SYNC_HIGH_LEVEL) || \
+                                                          ((type) == PDS_AON_GPIO_INT_TRIGGER_ASYNC_FALLING_EDGE) || \
+                                                          ((type) == PDS_AON_GPIO_INT_TRIGGER_ASYNC_RISING_EDGE) || \
+                                                          ((type) == PDS_AON_GPIO_INT_TRIGGER_ASYNC_LOW_LEVEL) || \
+                                                          ((type) == PDS_AON_GPIO_INT_TRIGGER_ASYNC_HIGH_LEVEL))
+
+/** @defgroup  PDS_LDO_VOLTAGE_TYPE
+ *  @{
+ */
+#define IS_PDS_LDO_VOLTAGE_TYPE(type)                    (((type) == PDS_LDO_VOLTAGE_0P60V) || \
+                                                          ((type) == PDS_LDO_VOLTAGE_0P65V) || \
+                                                          ((type) == PDS_LDO_VOLTAGE_0P70V) || \
+                                                          ((type) == PDS_LDO_VOLTAGE_0P75V) || \
+                                                          ((type) == PDS_LDO_VOLTAGE_0P80V) || \
+                                                          ((type) == PDS_LDO_VOLTAGE_0P85V) || \
+                                                          ((type) == PDS_LDO_VOLTAGE_0P90V) || \
+                                                          ((type) == PDS_LDO_VOLTAGE_0P95V) || \
+                                                          ((type) == PDS_LDO_VOLTAGE_1P00V) || \
+                                                          ((type) == PDS_LDO_VOLTAGE_1P05V) || \
+                                                          ((type) == PDS_LDO_VOLTAGE_1P10V) || \
+                                                          ((type) == PDS_LDO_VOLTAGE_1P15V) || \
+                                                          ((type) == PDS_LDO_VOLTAGE_1P20V) || \
+                                                          ((type) == PDS_LDO_VOLTAGE_1P25V) || \
+                                                          ((type) == PDS_LDO_VOLTAGE_1P30V) || \
+                                                          ((type) == PDS_LDO_VOLTAGE_1P35V))
+
+/** @defgroup  PDS_FORCE_TYPE
+ *  @{
+ */
+#define IS_PDS_FORCE_TYPE(type)                          (((type) == PDS_FORCE_NP) || \
+                                                          ((type) == PDS_FORCE_RSV) || \
+                                                          ((type) == PDS_FORCE_BZ) || \
+                                                          ((type) == PDS_FORCE_USB))
+
+/** @defgroup  PDS_AUDIO_PLL_TYPE
+ *  @{
+ */
+#define IS_PDS_AUDIO_PLL_TYPE(type)                      (((type) == AUDIO_PLL_12288000_HZ) || \
+                                                          ((type) == AUDIO_PLL_11289600_HZ) || \
+                                                          ((type) == AUDIO_PLL_5644800_HZ))
+
+/*@} end of group PDS_Public_Constants */
+
+/** @defgroup  PDS_Public_Macros
+ *  @{
+ */
+#define PDS_LDO_MIN_PU_CNT                              (25)  /* LDO need 25 cycles to power up */
+#define PDS_WARMUP_CNT                                  (38)  /* LDO hw warmup compensation latency cycles */
+#define PDS_WARMUP_LATENCY_CNT                          (38)  /* LDO hw warmup compensation latency cycles */
+#define PDS_FORCE_PWR_OFF_OFFSET                        (0)
+#define PDS_FORCE_ISO_EN_OFFSET                         (4)
+#define PDS_FORCE_PDS_RST_OFFSET                        (8)
+#define PDS_FORCE_MEM_STBY_OFFSET                       (12)
+#define PDS_FORCE_GATE_CLK_OFFSET                       (16)
+#define PDS_INT_MASK_BIT_OFFSET                         (8)
+#define PDS_AON_WAKEUP_GPIO_NONE                        (0x00)
+#define PDS_AON_WAKEUP_GPIO_10                          (0x02)
+#define PDS_AON_WAKEUP_GPIO_11                          (0x04)
+#define PDS_AON_WAKEUP_GPIO_12                          (0x08)
+#define PDS_AON_WAKEUP_GPIO_13                          (0x10)
+#define PDS_AON_WAKEUP_GPIO_ALL                         (0x1E)
+
+/*@} end of group PDS_Public_Macros */
+
+/** @defgroup  PDS_Public_Functions
+ *  @{
+ */
+#ifndef BFLB_USE_HAL_DRIVER
+void PDS_WAKEUP_IRQHandler(void);
+#endif
+/*----------*/
+BL_Err_Type PDS_RAM_Config(PDS_RAM_CFG_Type *ramCfg);
+BL_Err_Type PDS_Set_Pad_Config(PDS_PAD_PIN_Type pin,PDS_PAD_CFG_Type cfg);
+/*----------*/
+BL_Err_Type PDS_App_Enable(PDS_CTL_Type *cfg,PDS_CTL4_Type *cfg4,uint32_t pdsSleepCnt);
+BL_Err_Type PDS_Force_Config(PDS_CTL2_Type *cfg2,PDS_CTL3_Type *cfg3);
+BL_Err_Type PDS_Default_Level_Config(PDS_DEFAULT_LV_CFG_Type *defaultLvCfg,uint32_t pdsSleepCnt);
+/*----------*/
+BL_Err_Type PDS_IntEn(PDS_INT_Type intType,BL_Fun_Type enable);
+BL_Err_Type PDS_IntMask(PDS_INT_Type intType,BL_Mask_Type intMask);
+BL_Sts_Type PDS_Get_IntStatus(PDS_INT_Type intType);
+BL_Err_Type PDS_IntClear(void);
+PDS_PLL_STS_Type PDS_Get_PdsPllStstus(void);
+PDS_RF_STS_Type PDS_Get_PdsRfStstus(void);
+PDS_STS_Type PDS_Get_PdsStstus(void);
+/*----------*/
+BL_Err_Type PDS_Clear_Reset_Event(void);
+BL_Sts_Type PDS_Get_Reset_Event(PDS_RST_EVENT_Type event);
+/*----------*/
+BL_Err_Type PDS_Set_Vddcore_GPIO_IntCfg(PDS_VDDCORE_GPIO_SRC_Type src,
+                                                       PDS_AON_GPIO_INT_Trigger_Type mode);
+BL_Err_Type PDS_Set_Vddcore_GPIO_IntMask(BL_Mask_Type intMask);
+PDS_STS_Type PDS_Get_Vddcore_GPIO_IntStatus(void);
+BL_Err_Type PDS_Set_Vddcore_GPIO_IntClear(void);
+/*----------*/
+BL_Err_Type PDS_WAKEUP_IRQHandler_Install(void);
+BL_Err_Type PDS_Int_Callback_Install(PDS_INT_Type intType,intCallback_Type* cbFun);
+/*----------*/
+BL_Err_Type PDS_Trim_RC32M(void);
+BL_Err_Type PDS_Select_RC32M_As_PLL_Ref(void);
+BL_Err_Type PDS_Select_XTAL_As_PLL_Ref(void);
+BL_Err_Type PDS_Power_On_PLL(PDS_PLL_XTAL_Type xtalType);
+BL_Err_Type PDS_Enable_PLL_All_Clks(void);
+BL_Err_Type PDS_Enable_PLL_Clk(PDS_PLL_CLK_Type pllClk);
+BL_Err_Type PDS_Disable_PLL_All_Clks(void);
+BL_Err_Type PDS_Disable_PLL_Clk(PDS_PLL_CLK_Type pllClk);
+BL_Err_Type PDS_Power_Off_PLL(void);
+BL_Err_Type PDS_Set_Audio_PLL_Freq(PDS_AUDIO_PLL_Type audioPLLFreq);
+/*----------*/
+void PDS_Reset(void);
+void PDS_Enable(PDS_CFG_Type *cfg,uint32_t pdsSleepCnt);
+void PDS_Auto_Time_Config(uint32_t sleepDuration);
+void PDS_Auto_Enable(PDS_AUTO_POWER_DOWN_CFG_Type *powerCfg,PDS_AUTO_NORMAL_CFG_Type *normalCfg,BL_Fun_Type enable);
+void PDS_Manual_Force_Turn_Off(PDS_FORCE_Type domain);
+void PDS_Manual_Force_Turn_On(PDS_FORCE_Type domain);
+/*----------*/;
+
+/*@} end of group PDS_Public_Functions */
+
+/*@} end of group PDS */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_PDS_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_psram.h b/drivers/bl702_driver/std_drv/inc/bl702_psram.h
new file mode 100644
index 00000000..f71e5267
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_psram.h
@@ -0,0 +1,174 @@
+/**
+  ******************************************************************************
+  * @file    bl702_psram.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_PSRAM_H__
+#define __BL702_PSRAM_H__
+
+#include "sf_ctrl_reg.h"
+#include "bl702_common.h"
+#include "bl702_sf_ctrl.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  PSRAM
+ *  @{
+ */
+
+/** @defgroup  PSRAM_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief Psram drive strength type definition
+ */
+typedef enum {
+    PSRAM_DRIVE_STRENGTH_50_OHMS,            /*!< Drive strength 50 ohms(default) */
+    PSRAM_DRIVE_STRENGTH_100_OHMS,           /*!< Drive strength 100 ohms */
+    PSRAM_DRIVE_STRENGTH_200_OHMS,           /*!< Drive strength 200 ohms */
+}PSRAM_Drive_Strength;
+
+/**
+ *  @brief Psram burst length size type definition
+ */
+typedef enum {
+    PSRAM_BURST_LENGTH_16_BYTES,             /*!< Burst Length 16 bytes */
+    PSRAM_BURST_LENGTH_32_BYTES,             /*!< Burst Length 32 bytes */
+    PSRAM_BURST_LENGTH_64_BYTES,             /*!< Burst Length 64 bytes */
+    PSRAM_BURST_LENGTH_512_BYTES,            /*!< Burst Length 512 bytes(default) */
+}PSRAM_Burst_Length;
+
+/**
+ *  @brief Psram ctrl mode type definition
+ */
+typedef enum {
+    PSRAM_SPI_CTRL_MODE,                     /*!< Psram SPI ctrl mode */
+    PSRAM_QPI_CTRL_MODE,                     /*!< Psram QPI ctrl mode */
+}PSRAM_Ctrl_Mode;
+
+/**
+ *  @brief Psram ctrl configuration structure type definition
+ */
+typedef struct {
+    uint8_t readIdCmd;                       /*!< Read ID command */
+    uint8_t readIdDmyClk;                    /*!< Read ID command dummy clock */
+    uint8_t burstToggleCmd;                  /*!< Burst toggle length command */
+    uint8_t resetEnableCmd;                  /*!< Psram reset enable command */
+    uint8_t resetCmd;                        /*!< Psram reset command */
+    uint8_t enterQuadModeCmd;                /*!< Psram enter quad mode command */
+    uint8_t exitQuadModeCmd;                 /*!< Psram exit quad mode command */
+    uint8_t readRegCmd;                      /*!< Read register command */
+    uint8_t readRegDmyClk;                   /*!< Read register command dummy clock */
+    uint8_t writeRegCmd;                     /*!< Write register command */
+    uint8_t readCmd;                         /*!< Psram read command */
+    uint8_t readDmyClk;                      /*!< Psram read command dummy clock */
+    uint8_t fReadCmd;                        /*!< Psram fast read command */
+    uint8_t fReadDmyClk;                     /*!< Psram fast read command dummy clock */
+    uint8_t fReadQuadCmd;                    /*!< Psram fast read quad command */
+    uint8_t fReadQuadDmyClk;                 /*!< Psram fast read quad command dummy clock */
+    uint8_t writeCmd;                        /*!< Psram write command */
+    uint8_t quadWriteCmd;                    /*!< Psram quad write command */
+    uint16_t pageSize;                       /*!< Psram page size */
+    PSRAM_Ctrl_Mode ctrlMode;                /*!< Psram ctrl mode */
+    PSRAM_Drive_Strength driveStrength;      /*!< Psram drive strength */
+    PSRAM_Burst_Length burstLength;          /*!< Psram burst length size */
+}SPI_Psram_Cfg_Type;
+
+/*@} end of group PSRAM_Public_Types */
+
+/** @defgroup  PSRAM_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  PSRAM_DRIVE_STRENGTH
+ *  @{
+ */
+#define IS_PSRAM_DRIVE_STRENGTH(type)                    (((type) == PSRAM_DRIVE_STRENGTH_50_OHMS) || \
+                                                          ((type) == PSRAM_DRIVE_STRENGTH_100_OHMS) || \
+                                                          ((type) == PSRAM_DRIVE_STRENGTH_200_OHMS))
+
+/** @defgroup  PSRAM_BURST_LENGTH
+ *  @{
+ */
+#define IS_PSRAM_BURST_LENGTH(type)                      (((type) == PSRAM_BURST_LENGTH_16_BYTES) || \
+                                                          ((type) == PSRAM_BURST_LENGTH_32_BYTES) || \
+                                                          ((type) == PSRAM_BURST_LENGTH_64_BYTES) || \
+                                                          ((type) == PSRAM_BURST_LENGTH_512_BYTES))
+
+/** @defgroup  PSRAM_CTRL_MODE
+ *  @{
+ */
+#define IS_PSRAM_CTRL_MODE(type)                         (((type) == PSRAM_SPI_CTRL_MODE) || \
+                                                          ((type) == PSRAM_QPI_CTRL_MODE))
+
+/*@} end of group PSRAM_Public_Constants */
+
+/** @defgroup  PSRAM_Public_Macros
+ *  @{
+ */
+
+/*@} end of group PSRAM_Public_Macros */
+
+/** @defgroup  PSRAM_Public_Functions
+ *  @{
+ */
+
+/**
+ *  @brief PSRAM Functions
+ */
+void Psram_Init(SPI_Psram_Cfg_Type *psramCfg, SF_Ctrl_Cmds_Cfg *cmdsCfg, SF_Ctrl_Psram_Cfg *sfCtrlPsramCfg);
+void Psram_ReadReg(SPI_Psram_Cfg_Type *psramCfg, uint8_t *regValue);
+void Psram_WriteReg(SPI_Psram_Cfg_Type *psramCfg, uint8_t *regValue);
+BL_Err_Type Psram_SetDriveStrength(SPI_Psram_Cfg_Type *psramCfg);
+BL_Err_Type Psram_SetBurstWrap(SPI_Psram_Cfg_Type *psramCfg);
+void Psram_ReadId(SPI_Psram_Cfg_Type *psramCfg, uint8_t *data);
+BL_Err_Type Psram_EnterQuadMode(SPI_Psram_Cfg_Type *psramCfg);
+BL_Err_Type Psram_ExitQuadMode(SPI_Psram_Cfg_Type *psramCfg);
+BL_Err_Type Psram_ToggleBurstLength(SPI_Psram_Cfg_Type *psramCfg, PSRAM_Ctrl_Mode ctrlMode);
+BL_Err_Type Psram_SoftwareReset(SPI_Psram_Cfg_Type *psramCfg, PSRAM_Ctrl_Mode ctrlMode);
+BL_Err_Type Psram_Set_IDbus_Cfg(SPI_Psram_Cfg_Type *psramCfg, SF_Ctrl_IO_Type ioMode, uint32_t addr, uint32_t len);
+BL_Err_Type Psram_Cache_Write_Set(SPI_Psram_Cfg_Type *psramCfg, SF_Ctrl_IO_Type ioMode, BL_Fun_Type wtEn,
+                                  BL_Fun_Type wbEn, BL_Fun_Type waEn);
+BL_Err_Type Psram_Write(SPI_Psram_Cfg_Type *psramCfg, SF_Ctrl_IO_Type ioMode, uint32_t addr, uint8_t *data, uint32_t len);
+BL_Err_Type Psram_Read(SPI_Psram_Cfg_Type *psramCfg, SF_Ctrl_IO_Type ioMode, uint32_t addr, uint8_t *data, uint32_t len);
+
+/*@} end of group PSRAM_Public_Functions */
+
+/*@} end of group PSRAM */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_PSRAM_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_pwm.h b/drivers/bl702_driver/std_drv/inc/bl702_pwm.h
new file mode 100644
index 00000000..057f0875
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_pwm.h
@@ -0,0 +1,194 @@
+/**
+  ******************************************************************************
+  * @file    bl702_pwm.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_PWM_H__
+#define __BL702_PWM_H__
+
+#include "pwm_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  PWM
+ *  @{
+ */
+
+/** @defgroup  PWM_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief PWM No. type definition
+ */
+typedef enum {
+    PWM_CH0 = 0,                             /*!< PWM Channel 0 define */
+    PWM_CH1,                                 /*!< PWM Channel 1 define */
+    PWM_CH2,                                 /*!< PWM Channel 2 define */
+    PWM_CH3,                                 /*!< PWM Channel 3 define */
+    PWM_CH4,                                 /*!< PWM Channel 4 define */
+    PWM_CH_MAX,                              /*!<  */
+}PWM_CH_ID_Type;
+
+/**
+ *  @brief PWM Clock definition
+ */
+typedef enum {
+    PWM_CLK_XCLK = 0,                        /*!< PWM Clock source :XTAL CLK */
+    PWM_CLK_BCLK,                            /*!< PWM Clock source :Bus CLK */
+    PWM_CLK_32K,                             /*!< PWM Clock source :32K CLK */
+}PWM_Clk_Type;
+
+/**
+ *  @brief PWM Stop Mode definition
+ */
+typedef enum {
+    PWM_STOP_ABRUPT = 0,                     /*!< PWM stop abrupt select define */
+    PWM_STOP_GRACEFUL,                       /*!< PWM stop graceful select define */
+}PWM_Stop_Mode_Type;
+
+/**
+ *  @brief PWM mode type def
+ */
+typedef enum {
+    PWM_POL_NORMAL = 0,                      /*!< PWM normal polarity mode define */
+    PWM_POL_INVERT,                          /*!< PWM invert polarity mode define */
+}PWM_Polarity_Type;
+
+/**
+ *  @brief PWM interrupt type def
+ */
+typedef enum {
+    PWM_INT_PULSE_CNT = 0,                   /*!< PWM Pulse count interrupt define */
+    PWM_INT_ALL,                             /*!<  */
+}PWM_INT_Type;
+
+/**
+ *  @brief PWM configuration structure type definition
+ */
+typedef struct {
+    PWM_CH_ID_Type ch;                       /*!< PWM channel */
+    PWM_Clk_Type clk;                        /*!< PWM Clock */
+    PWM_Stop_Mode_Type stopMode;             /*!< PWM Stop Mode */
+    PWM_Polarity_Type pol;                   /*!< PWM mode type */
+    uint16_t clkDiv;                         /*!< PWM clkDiv num */
+    uint16_t period;                         /*!< PWM period set */
+    uint16_t threshold1;                     /*!< PWM threshold1 num */
+    uint16_t threshold2;                     /*!< PWM threshold2 num */
+    uint16_t intPulseCnt;                    /*!< PWM interrupt pulse count */
+}PWM_CH_CFG_Type;
+
+/*@} end of group PWM_Public_Types */
+
+/** @defgroup  PWM_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  PWM_CH_ID_TYPE
+ *  @{
+ */
+#define IS_PWM_CH_ID_TYPE(type)                          (((type) == PWM_CH0 ) || \
+                                                          ((type) == PWM_CH1) || \
+                                                          ((type) == PWM_CH2) || \
+                                                          ((type) == PWM_CH3) || \
+                                                          ((type) == PWM_CH4) || \
+                                                          ((type) == PWM_CH_MAX))
+
+/** @defgroup  PWM_CLK_TYPE
+ *  @{
+ */
+#define IS_PWM_CLK_TYPE(type)                            (((type) == PWM_CLK_XCLK ) || \
+                                                          ((type) == PWM_CLK_BCLK) || \
+                                                          ((type) == PWM_CLK_32K))
+
+/** @defgroup  PWM_STOP_MODE_TYPE
+ *  @{
+ */
+#define IS_PWM_STOP_MODE_TYPE(type)                      (((type) == PWM_STOP_ABRUPT ) || \
+                                                          ((type) == PWM_STOP_GRACEFUL))
+
+/** @defgroup  PWM_POLARITY_TYPE
+ *  @{
+ */
+#define IS_PWM_POLARITY_TYPE(type)                       (((type) == PWM_POL_NORMAL ) || \
+                                                          ((type) == PWM_POL_INVERT))
+
+/** @defgroup  PWM_INT_TYPE
+ *  @{
+ */
+#define IS_PWM_INT_TYPE(type)                            (((type) == PWM_INT_PULSE_CNT ) || \
+                                                          ((type) == PWM_INT_ALL))
+
+/*@} end of group PWM_Public_Constants */
+
+/** @defgroup  PWM_Public_Macros
+ *  @{
+ */
+#define IS_PWM_CH(CH)               ((CH) < PWM_CH_MAX)
+
+/*@} end of group PWM_Public_Macros */
+
+/** @defgroup  PWM_Public_Functions
+ *  @{
+ */
+
+/**
+ *  @brief PWM Functions
+ */
+#ifndef BFLB_USE_HAL_DRIVER
+void PWM_IRQHandler(void);
+#endif
+BL_Err_Type PWM_Channel_Init(PWM_CH_CFG_Type *chCfg);
+void PWM_Channel_Update(PWM_CH_ID_Type ch,uint16_t period,uint16_t threshold1,uint16_t threshold2);
+void PWM_Channel_Set_Div(PWM_CH_ID_Type ch,uint16_t div);
+void PWM_Channel_Set_Threshold1(PWM_CH_ID_Type ch,uint16_t threshold1);
+void PWM_Channel_Set_Threshold2(PWM_CH_ID_Type ch,uint16_t threshold2);
+void PWM_Channel_Set_Period(PWM_CH_ID_Type ch,uint16_t period);
+void PWM_Channel_Get(PWM_CH_ID_Type ch,uint16_t *period,uint16_t *threshold1,uint16_t *threshold2);
+void PWM_IntMask(PWM_CH_ID_Type ch,PWM_INT_Type intType,BL_Mask_Type intMask);
+void PWM_Channel_Enable(PWM_CH_ID_Type ch);
+void PWM_Channel_Disable(PWM_CH_ID_Type ch);
+void PWM_SW_Mode(PWM_CH_ID_Type ch,BL_Fun_Type enable);
+void PWM_SW_Force_Value(PWM_CH_ID_Type ch,uint8_t value);
+void PWM_Int_Callback_Install(PWM_CH_ID_Type ch,uint32_t intType,intCallback_Type* cbFun);
+
+/*@} end of group PWM_Public_Functions */
+
+/*@} end of group PWM */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_PWM_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_qdec.h b/drivers/bl702_driver/std_drv/inc/bl702_qdec.h
new file mode 100644
index 00000000..079be08c
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_qdec.h
@@ -0,0 +1,278 @@
+/**
+  ******************************************************************************
+  * @file    bl702_qdec.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_QDEC_H__
+#define __BL702_QDEC_H__
+
+#include "qdec_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  QDEC
+ *  @{
+ */
+
+/** @defgroup  QDEC_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief QDEC port type definition
+ */
+typedef enum {
+    QDEC0_ID,                                /*!< QDEC0 port define */
+    QDEC1_ID,                                /*!< QDEC1 port define */
+    QDEC2_ID,                                /*!< QDEC2 port define */
+    QDEC_ID_MAX,                             /*!< QDEC MAX ID define */
+}QDEC_ID_Type;
+
+/**
+ *  @brief QDEC sample work mode type definition
+ */
+typedef enum {
+    QDEC_SAMPLE_SINGLE_MOD,                 /*!< Stop sample if rpt_rdy */
+    QDEC_SAMPLE_CONTINUE_MOD,               /*!< Continue sample */
+}QDEC_SAMPLE_MODE_Type;
+
+/**
+ *  @brief QDEC sample period type definition
+ */
+typedef enum {
+    QDEC_SAMPLE_PERIOD_32US,                /*!< 32  us at clock 1MHz */
+    QDEC_SAMPLE_PERIOD_64US,                /*!< 64  us at clock 1MHz */
+    QDEC_SAMPLE_PERIOD_128US,               /*!< 128 us at clock 1MHz */
+    QDEC_SAMPLE_PERIOD_256US,               /*!< 256 us at clock 1MHz */
+    QDEC_SAMPLE_PERIOD_512US,               /*!< 512 us at clock 1MHz */
+    QDEC_SAMPLE_PERIOD_1MS,                 /*!< 1   ms at clock 1MHz */
+    QDEC_SAMPLE_PERIOD_2MS,                 /*!< 2   ms at clock 1MHz */
+    QDEC_SAMPLE_PERIOD_4MS,                 /*!< 4   ms at clock 1MHz */
+    QDEC_SAMPLE_PERIOD_8MS,                 /*!< 8   ms at clock 1MHz */
+    QDEC_SAMPLE_PERIOD_16MS,                /*!< 16  ms at clock 1MHz */
+    QDEC_SAMPLE_PERIOD_32MS,                /*!< 32  ms at clock 1MHz */
+    QDEC_SAMPLE_PERIOD_65MS,                /*!< 65  ms at clock 1MHz */
+    QDEC_SAMPLE_PERIOD_131MS,               /*!< 131 ms at clock 1MHz */
+}QDEC_SAMPLE_PERIOD_Type;
+
+/**
+ *  @brief QDEC report work mode type definition
+ */
+typedef enum {
+    QDEC_REPORT_SAMPLE_CHANGE_MOD,          /*!< Count time only if sample change */
+    QDEC_REPORT_TIME_MOD,                   /*!< Continue time */
+}QDEC_REPORT_MODE_Type;
+
+/**
+ *  @brief QDEC sample config structure type definition
+ */
+typedef struct {
+    QDEC_SAMPLE_MODE_Type sampleMod;        /*!< Sample work mode */
+    QDEC_SAMPLE_PERIOD_Type samplePeriod;   /*!< Sample period time */
+}QDEC_SAMPLE_Type;
+
+/**
+ *  @brief QDEC report config structure type definition
+ */
+typedef struct {
+    QDEC_REPORT_MODE_Type reportMod;        /*!< Report work mode */
+    uint16_t reportPeriod;                  /*!< RPT_US report period in [us/report] = SP * RP */
+}QDEC_REPORT_Type;
+
+/**
+ *  @brief QDEC acc work mode type definition
+ */
+typedef enum {
+    QDEC_ACC_STOP_SAMPLE_IF_OVERFLOW,       /*!< Stop accumulate if overflow */
+    QDEC_ACC_CONTINUE_ACCUMULATE,           /*!< Continue accumulate */
+}QDEC_ACC_MODE_Type;
+
+/**
+ *  @brief QDEC led config structure type definition
+ */
+typedef struct {
+    BL_Fun_Type ledEn;                      /*!< LED enable */
+    BL_Fun_Type ledSwap;                    /*!< LED on/off polarity swap */
+    uint16_t ledPeriod;                     /*!< Period in us the LED is switched on prior to sampling */
+}QDEC_LED_Type;
+
+/**
+ *  @brief QDEC deglitch config structure type definition
+ */
+typedef struct {
+    BL_Fun_Type deglitchEn;                 /*!< deglitch enable */
+    uint8_t deglitchStrength;               /*!< deglitch strength */
+}QDEC_DEGLITCH_Type;
+
+/**
+ *  @brief QDEC config structure type definition
+ */
+typedef struct {
+    QDEC_SAMPLE_Type sampleCfg;             /*!< QDEC sample config structure */
+    QDEC_REPORT_Type reportCfg;             /*!< QDEC report config structure */
+    QDEC_ACC_MODE_Type accMod;              /*!< QDEC acc mode config */
+    QDEC_LED_Type ledCfg;                   /*!< QDEC led config structure */
+    QDEC_DEGLITCH_Type deglitchCfg;         /*!< QDEC deglitch config structure */
+}QDEC_CFG_Type;
+
+/**
+ *  @brief QDEC direction type definition
+ */
+typedef enum {
+    QDEC_DIRECTION_NO_CHANGE,               /*!< Direction of last change no change */
+    QDEC_DIRECTION_CLOCKWISE,               /*!< Direction of last change clockwise */
+    QDEC_DIRECTION_COUNTER_CLOCKWISE,       /*!< Direction of last change counter-clockwise */
+    QDEC_DIRECTION_ERROR,                   /*!< Direction of last change error */
+}QDEC_DIRECTION_Type;
+
+/**
+ *  @brief QDEC interrupt type definition
+ */
+typedef enum {
+    QDEC_INT_REPORT,                        /*!< report interrupt */
+    QDEC_INT_SAMPLE,                        /*!< sample interrupt */
+    QDEC_INT_ERROR,                         /*!< error interrupt */
+    QDEC_INT_OVERFLOW,                      /*!< ACC1 and ACC2 overflow interrupt */
+    QDEC_INT_ALL,                           /*!< interrupt max num */
+}QDEC_INT_Type;
+
+/*@} end of group QDEC_Public_Types */
+
+/** @defgroup  QDEC_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  QDEC_ID_TYPE
+ *  @{
+ */
+#define IS_QDEC_ID_TYPE(type)                            (((type) == QDEC0_ID) || \
+                                                          ((type) == QDEC1_ID) || \
+                                                          ((type) == QDEC2_ID) || \
+                                                          ((type) == QDEC_ID_MAX))
+
+/** @defgroup  QDEC_SAMPLE_MODE_TYPE
+ *  @{
+ */
+#define IS_QDEC_SAMPLE_MODE_TYPE(type)                   (((type) == QDEC_SAMPLE_SINGLE_MOD) || \
+                                                          ((type) == QDEC_SAMPLE_CONTINUE_MOD))
+
+/** @defgroup  QDEC_SAMPLE_PERIOD_TYPE
+ *  @{
+ */
+#define IS_QDEC_SAMPLE_PERIOD_TYPE(type)                 (((type) == QDEC_SAMPLE_PERIOD_32US) || \
+                                                          ((type) == QDEC_SAMPLE_PERIOD_64US) || \
+                                                          ((type) == QDEC_SAMPLE_PERIOD_128US) || \
+                                                          ((type) == QDEC_SAMPLE_PERIOD_256US) || \
+                                                          ((type) == QDEC_SAMPLE_PERIOD_512US) || \
+                                                          ((type) == QDEC_SAMPLE_PERIOD_1MS) || \
+                                                          ((type) == QDEC_SAMPLE_PERIOD_2MS) || \
+                                                          ((type) == QDEC_SAMPLE_PERIOD_4MS) || \
+                                                          ((type) == QDEC_SAMPLE_PERIOD_8MS) || \
+                                                          ((type) == QDEC_SAMPLE_PERIOD_16MS) || \
+                                                          ((type) == QDEC_SAMPLE_PERIOD_32MS) || \
+                                                          ((type) == QDEC_SAMPLE_PERIOD_65MS) || \
+                                                          ((type) == QDEC_SAMPLE_PERIOD_131MS))
+
+/** @defgroup  QDEC_REPORT_MODE_TYPE
+ *  @{
+ */
+#define IS_QDEC_REPORT_MODE_TYPE(type)                   (((type) == QDEC_REPORT_SAMPLE_CHANGE_MOD) || \
+                                                          ((type) == QDEC_REPORT_TIME_MOD))
+
+/** @defgroup  QDEC_ACC_MODE_TYPE
+ *  @{
+ */
+#define IS_QDEC_ACC_MODE_TYPE(type)                      (((type) == QDEC_ACC_STOP_SAMPLE_IF_OVERFLOW) || \
+                                                          ((type) == QDEC_ACC_CONTINUE_ACCUMULATE))
+
+/** @defgroup  QDEC_DIRECTION_TYPE
+ *  @{
+ */
+#define IS_QDEC_DIRECTION_TYPE(type)                     (((type) == QDEC_DIRECTION_NO_CHANGE) || \
+                                                          ((type) == QDEC_DIRECTION_CLOCKWISE) || \
+                                                          ((type) == QDEC_DIRECTION_COUNTER_CLOCKWISE) || \
+                                                          ((type) == QDEC_DIRECTION_ERROR))
+
+/** @defgroup  QDEC_INT_TYPE
+ *  @{
+ */
+#define IS_QDEC_INT_TYPE(type)                           (((type) == QDEC_INT_REPORT) || \
+                                                          ((type) == QDEC_INT_SAMPLE) || \
+                                                          ((type) == QDEC_INT_ERROR) || \
+                                                          ((type) == QDEC_INT_OVERFLOW) || \
+                                                          ((type) == QDEC_INT_ALL))
+
+/*@} end of group QDEC_Public_Constants */
+
+/** @defgroup  QDEC_Public_Macros
+ *  @{
+ */
+
+/*@} end of group QDEC_Public_Macros */
+
+/** @defgroup  QDEC_Public_Functions
+ *  @{
+ */
+
+/**
+ *  @brief QDEC Functions
+ */
+#ifndef BFLB_USE_HAL_DRIVER
+void QDEC0_IRQHandler(void);
+void QDEC1_IRQHandler(void);
+void QDEC2_IRQHandler(void);
+#endif
+void QDEC_Init(QDEC_ID_Type qdecId,QDEC_CFG_Type *qdecCfg);
+void QDEC_DeInit(QDEC_ID_Type qdecId);
+void QDEC_Enable(QDEC_ID_Type qdecId);
+void QDEC_Disable(QDEC_ID_Type qdecId);
+void QDEC_SetIntMask(QDEC_ID_Type qdecId,QDEC_INT_Type intType,BL_Mask_Type intMask);
+BL_Mask_Type QDEC_GetIntMask(QDEC_ID_Type qdecId,QDEC_INT_Type intType);
+void QDEC_Int_Callback_Install(QDEC_ID_Type qdecId,QDEC_INT_Type intType,intCallback_Type* cbFun);
+BL_Sts_Type QDEC_Get_Int_Status(QDEC_ID_Type qdecId,QDEC_INT_Type intType);
+void QDEC_Clr_Int_Status(QDEC_ID_Type qdecId,QDEC_INT_Type intType);
+QDEC_DIRECTION_Type QDEC_Get_Sample_Direction(QDEC_ID_Type qdecId);
+uint8_t QDEC_Get_Err_Cnt(QDEC_ID_Type qdecId);
+uint16_t QDEC_Get_Sample_Val(QDEC_ID_Type qdecId);
+void QDEC_IntHandler(QDEC_ID_Type qdecId,QDEC_INT_Type intType);
+
+/*@} end of group QDEC_Public_Functions */
+
+/*@} end of group QDEC */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_QDEC_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_romdriver.h b/drivers/bl702_driver/std_drv/inc/bl702_romdriver.h
new file mode 100644
index 00000000..32d49b0b
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_romdriver.h
@@ -0,0 +1,632 @@
+/**
+  ******************************************************************************
+  * @file    bl702_romdriver.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_ROMDRIVER_H__
+#define __BL702_ROMDRIVER_H__
+
+#include "bl702_common.h"
+#include "bl702_aon.h"
+#include "bl702_glb.h"
+#include "bl702_hbn.h"
+#include "bl702_xip_sflash.h"
+#include "bl702_sflash.h"
+#include "bl702_sf_ctrl.h"
+#include "bl702_psram.h"
+#include "softcrc.h"
+
+#define ROMAPI_INDEX_SECT_SIZE     (0x800)
+#define ROMAPI_INDEX_MAX           (ROMAPI_INDEX_SECT_SIZE / 4 - 1)
+
+typedef enum {
+    ROM_API_INDEX_REV = 0,
+    
+    ROM_API_INDEX_FUNC_START = 4,
+    
+    ROM_API_INDEX_AON_Power_On_MBG = ROM_API_INDEX_FUNC_START,
+    ROM_API_INDEX_AON_Power_Off_MBG,
+    ROM_API_INDEX_AON_Power_On_XTAL,
+    ROM_API_INDEX_AON_Set_Xtal_CapCode,
+    ROM_API_INDEX_AON_Power_Off_XTAL,
+    
+    ROM_API_INDEX_ASM_Delay_Us,
+    ROM_API_INDEX_BL702_Delay_US,
+    ROM_API_INDEX_BL702_Delay_MS,
+    ROM_API_INDEX_BL702_MemCpy,
+    ROM_API_INDEX_BL702_MemCpy4,
+    ROM_API_INDEX_BL702_MemCpy_Fast,
+    ROM_API_INDEX_ARCH_MemCpy_Fast,
+    ROM_API_INDEX_BL702_MemSet,
+    ROM_API_INDEX_BL702_MemSet4,
+    ROM_API_INDEX_BL702_MemCmp,
+    ROM_API_INDEX_BFLB_Soft_CRC32,
+    
+    ROM_API_INDEX_GLB_Get_Root_CLK_Sel,
+    ROM_API_INDEX_GLB_Set_System_CLK_Div,
+    ROM_API_INDEX_GLB_Get_BCLK_Div,
+    ROM_API_INDEX_GLB_Get_HCLK_Div,
+    ROM_API_INDEX_Update_SystemCoreClockWith_XTAL,
+    ROM_API_INDEX_GLB_Set_System_CLK,
+    ROM_API_INDEX_System_Core_Clock_Update_From_RC32M,
+    ROM_API_INDEX_GLB_Set_SF_CLK,
+    ROM_API_INDEX_GLB_Power_Off_DLL,
+    ROM_API_INDEX_GLB_Power_On_DLL,
+    ROM_API_INDEX_GLB_Enable_DLL_All_Clks,
+    ROM_API_INDEX_GLB_Enable_DLL_Clk,
+    ROM_API_INDEX_GLB_Disable_DLL_All_Clks,
+    ROM_API_INDEX_GLB_Disable_DLL_Clk,
+    ROM_API_INDEX_GLB_SW_System_Reset,
+    ROM_API_INDEX_GLB_SW_CPU_Reset,
+    ROM_API_INDEX_GLB_SW_POR_Reset,
+    ROM_API_INDEX_GLB_Select_Internal_Flash,
+    ROM_API_INDEX_GLB_Swap_Flash_Pin,
+    ROM_API_INDEX_GLB_Swap_Flash_CS_IO2_Pin,
+    ROM_API_INDEX_GLB_Swap_Flash_IO0_IO3_Pin,
+    ROM_API_INDEX_GLB_Select_Internal_PSram,
+    ROM_API_INDEX_GLB_GPIO_Init,
+    ROM_API_INDEX_GLB_GPIO_OUTPUT_Enable,
+    ROM_API_INDEX_GLB_GPIO_OUTPUT_Disable,
+    ROM_API_INDEX_GLB_GPIO_Set_HZ,
+    ROM_API_INDEX_GLB_Deswap_Flash_Pin,
+    ROM_API_INDEX_GLB_Select_External_Flash,
+    ROM_API_INDEX_GLB_GPIO_Get_Fun,
+    
+    ROM_API_INDEX_EF_Ctrl_Busy,
+    ROM_API_INDEX_EF_Ctrl_Sw_AHB_Clk_0,
+    ROM_API_INDEX_EF_Ctrl_Load_Efuse_R0,
+    ROM_API_INDEX_EF_Ctrl_Clear,
+    ROM_API_INDEX_EF_Ctrl_Get_Trim_Parity,
+    ROM_API_INDEX_EF_Ctrl_Read_RC32K_Trim,
+    ROM_API_INDEX_EF_Ctrl_Read_RC32M_Trim,
+    
+    ROM_API_INDEX_PDS_Trim_RC32M,
+    ROM_API_INDEX_PDS_Select_RC32M_As_PLL_Ref,
+    ROM_API_INDEX_PDS_Select_XTAL_As_PLL_Ref,
+    ROM_API_INDEX_PDS_Power_On_PLL,
+    ROM_API_INDEX_PDS_Enable_PLL_All_Clks,
+    ROM_API_INDEX_PDS_Disable_PLL_All_Clks,
+    ROM_API_INDEX_PDS_Enable_PLL_Clk,
+    ROM_API_INDEX_PDS_Disable_PLL_Clk,
+    ROM_API_INDEX_PDS_Power_Off_PLL,
+    ROM_API_INDEX_PDS_Reset,
+    ROM_API_INDEX_PDS_Enable,
+    ROM_API_INDEX_PDS_Auto_Time_Config,
+    ROM_API_INDEX_PDS_Auto_Enable,
+    ROM_API_INDEX_PDS_Manual_Force_Turn_Off,
+    ROM_API_INDEX_PDS_Manual_Force_Turn_On,
+    
+    ROM_API_INDEX_HBN_Enable,
+    ROM_API_INDEX_HBN_Reset,
+    ROM_API_INDEX_HBN_GPIO_Dbg_Pull_Cfg,
+    ROM_API_INDEX_HBN_Trim_RC32K,
+    ROM_API_INDEX_HBN_Set_ROOT_CLK_Sel,
+    
+    ROM_API_INDEX_XIP_SFlash_State_Save,
+    ROM_API_INDEX_XIP_SFlash_State_Restore,
+    ROM_API_INDEX_XIP_SFlash_Erase_Need_Lock,
+    ROM_API_INDEX_XIP_SFlash_Write_Need_Lock,
+    ROM_API_INDEX_XIP_SFlash_Read_Need_Lock,
+    ROM_API_INDEX_XIP_SFlash_GetJedecId_Need_Lock,
+    ROM_API_INDEX_XIP_SFlash_GetDeviceId_Need_Lock,
+    ROM_API_INDEX_XIP_SFlash_GetUniqueId_Need_Lock,
+    ROM_API_INDEX_XIP_SFlash_Read_Via_Cache_Need_Lock,
+    ROM_API_INDEX_XIP_SFlash_Read_With_Lock,
+    ROM_API_INDEX_XIP_SFlash_Write_With_Lock,
+    ROM_API_INDEX_XIP_SFlash_Erase_With_Lock,
+    
+    ROM_API_INDEX_SFlash_Init,
+    ROM_API_INDEX_SFlash_SetSPIMode,
+    ROM_API_INDEX_SFlash_Read_Reg,
+    ROM_API_INDEX_SFlash_Write_Reg,
+    ROM_API_INDEX_SFlash_Read_Reg_With_Cmd,
+    ROM_API_INDEX_SFlash_Write_Reg_With_Cmd,
+    ROM_API_INDEX_SFlash_Busy,
+    ROM_API_INDEX_SFlash_Write_Enable,
+    ROM_API_INDEX_SFlash_Qspi_Enable,
+    ROM_API_INDEX_SFlash_Volatile_Reg_Write_Enable,
+    ROM_API_INDEX_SFlash_Chip_Erase,
+    ROM_API_INDEX_SFlash_Sector_Erase,
+    ROM_API_INDEX_SFlash_Blk32_Erase,
+    ROM_API_INDEX_SFlash_Blk64_Erase,
+    ROM_API_INDEX_SFlash_Erase,
+    ROM_API_INDEX_SFlash_Program,
+    ROM_API_INDEX_SFlash_GetUniqueId,
+    ROM_API_INDEX_SFlash_GetJedecId,
+    ROM_API_INDEX_SFlash_GetDeviceId,
+    ROM_API_INDEX_SFlash_Powerdown,
+    ROM_API_INDEX_SFlash_Releae_Powerdown,
+    ROM_API_INDEX_SFlash_Restore_From_Powerdown,
+    ROM_API_INDEX_SFlash_SetBurstWrap,
+    ROM_API_INDEX_SFlash_DisableBurstWrap,
+    ROM_API_INDEX_SFlash_Software_Reset,
+    ROM_API_INDEX_SFlash_Reset_Continue_Read,
+    ROM_API_INDEX_SFlash_Set_IDbus_Cfg,
+    ROM_API_INDEX_SFlash_IDbus_Read_Enable,
+    ROM_API_INDEX_SFlash_Cache_Read_Enable,
+    ROM_API_INDEX_SFlash_Cache_Read_Disable,
+    ROM_API_INDEX_SFlash_Read,
+    
+    ROM_API_INDEX_L1C_Cache_Enable_Set,
+    ROM_API_INDEX_L1C_Cache_Write_Set,
+    ROM_API_INDEX_L1C_Cache_Flush,
+    ROM_API_INDEX_L1C_Cache_Hit_Count_Get,
+    ROM_API_INDEX_L1C_Cache_Miss_Count_Get,
+    ROM_API_INDEX_L1C_Cache_Read_Disable,
+    ROM_API_INDEX_L1C_Set_Wrap,
+    ROM_API_INDEX_L1C_Set_Way_Disable,
+    ROM_API_INDEX_L1C_IROM_2T_Access_Set,
+    
+    ROM_API_INDEX_SF_Ctrl_Enable,
+    ROM_API_INDEX_SF_Ctrl_Psram_Init,
+    ROM_API_INDEX_SF_Ctrl_Get_Clock_Delay,
+    ROM_API_INDEX_SF_Ctrl_Set_Clock_Delay,
+    ROM_API_INDEX_SF_Ctrl_Cmds_Set,
+    ROM_API_INDEX_SF_Ctrl_Set_Owner,
+    ROM_API_INDEX_SF_Ctrl_Disable,
+    ROM_API_INDEX_SF_Ctrl_Select_Pad,
+    ROM_API_INDEX_SF_Ctrl_Select_Bank,
+    ROM_API_INDEX_SF_Ctrl_AES_Enable_BE,
+    ROM_API_INDEX_SF_Ctrl_AES_Enable_LE,
+    ROM_API_INDEX_SF_Ctrl_AES_Set_Region,
+    ROM_API_INDEX_SF_Ctrl_AES_Set_Key,
+    ROM_API_INDEX_SF_Ctrl_AES_Set_Key_BE,
+    ROM_API_INDEX_SF_Ctrl_AES_Set_IV,
+    ROM_API_INDEX_SF_Ctrl_AES_Set_IV_BE,
+    ROM_API_INDEX_SF_Ctrl_AES_Enable,
+    ROM_API_INDEX_SF_Ctrl_AES_Disable,
+    ROM_API_INDEX_SF_Ctrl_Is_AES_Enable,
+    ROM_API_INDEX_SF_Ctrl_Set_Flash_Image_Offset,
+    ROM_API_INDEX_SF_Ctrl_Get_Flash_Image_Offset,
+    ROM_API_INDEX_SF_Ctrl_Select_Clock,
+    ROM_API_INDEX_SF_Ctrl_SendCmd,
+    ROM_API_INDEX_SF_Ctrl_Flash_Read_Icache_Set,
+    ROM_API_INDEX_SF_Ctrl_Psram_Write_Icache_Set,
+    ROM_API_INDEX_SF_Ctrl_Psram_Read_Icache_Set,
+    ROM_API_INDEX_SF_Ctrl_GetBusyState,
+    ROM_API_INDEX_SF_Cfg_Deinit_Ext_Flash_Gpio,
+    ROM_API_INDEX_SF_Cfg_Init_Ext_Flash_Gpio,
+    ROM_API_INDEX_SF_Cfg_Get_Flash_Cfg_Need_Lock,
+    ROM_API_INDEX_SF_Cfg_Init_Flash_Gpio,
+    ROM_API_INDEX_SF_Cfg_Flash_Identify,
+    
+    ROM_API_INDEX_Psram_Init,
+    ROM_API_INDEX_Psram_ReadReg,
+    ROM_API_INDEX_Psram_WriteReg,
+    ROM_API_INDEX_Psram_SetDriveStrength,
+    ROM_API_INDEX_Psram_SetBurstWrap,
+    ROM_API_INDEX_Psram_ReadId,
+    ROM_API_INDEX_Psram_EnterQuadMode,
+    ROM_API_INDEX_Psram_ExitQuadMode,
+    ROM_API_INDEX_Psram_ToggleBurstLength,
+    ROM_API_INDEX_Psram_SoftwareReset,
+    ROM_API_INDEX_Psram_Set_IDbus_Cfg,
+    ROM_API_INDEX_Psram_Cache_Write_Set,
+    ROM_API_INDEX_Psram_Write,
+    ROM_API_INDEX_Psram_Read,
+    
+    ROM_API_INDEX_FUNC_LAST = ROM_API_INDEX_Psram_Read,
+    
+    ROM_API_INDEX_FUNC_INVALID_START,
+    
+    ROM_API_INDEX_FUNC_LAST_ENTRY = ROMAPI_INDEX_MAX
+} ROM_API_INDEX_e;
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  ROMDRIVER
+ *  @{
+ */
+
+/** @defgroup  ROMDRIVER_Public_Types
+ *  @{
+ */
+#define ROM_APITABLE            ((uint32_t *)0x21018800)
+
+#define RomDriver_AON_Power_On_MBG        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_AON_Power_On_MBG])
+#define RomDriver_AON_Power_Off_MBG        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_AON_Power_Off_MBG])
+#define RomDriver_AON_Power_On_XTAL        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_AON_Power_On_XTAL])
+#define RomDriver_AON_Set_Xtal_CapCode        \
+        ((BL_Err_Type (*)(uint8_t capIn,uint8_t capOut))ROM_APITABLE[ROM_API_INDEX_AON_Set_Xtal_CapCode])
+#define RomDriver_AON_Power_Off_XTAL        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_AON_Power_Off_XTAL])
+
+#define RomDriver_ASM_Delay_Us        \
+        ((void (*)(uint32_t core,uint32_t cnt))ROM_APITABLE[ROM_API_INDEX_ASM_Delay_Us])
+#define RomDriver_BL702_Delay_US        \
+        ((void (*)(uint32_t cnt))ROM_APITABLE[ROM_API_INDEX_BL702_Delay_US])
+#define RomDriver_BL702_Delay_MS        \
+        ((void (*)(uint32_t cnt))ROM_APITABLE[ROM_API_INDEX_BL702_Delay_MS])
+#define RomDriver_BL702_MemCpy        \
+        ((void* (*)(void *dst, const void *src, uint32_t n))ROM_APITABLE[ROM_API_INDEX_BL702_MemCpy])
+#define RomDriver_BL702_MemCpy4        \
+        ((uint32_t* (*)(uint32_t *dst, const uint32_t *src, uint32_t n))ROM_APITABLE[ROM_API_INDEX_BL702_MemCpy4])
+#define RomDriver_BL702_MemCpy_Fast        \
+        ((void* (*)(void *pdst, const void *psrc, uint32_t n))ROM_APITABLE[ROM_API_INDEX_BL702_MemCpy_Fast])
+#define RomDriver_ARCH_MemCpy_Fast        \
+        ((void* (*)(void *pdst, const void *psrc, uint32_t n))ROM_APITABLE[ROM_API_INDEX_ARCH_MemCpy_Fast])
+#define RomDriver_BL702_MemSet        \
+        ((void* (*)(void *s, uint8_t c, uint32_t n))ROM_APITABLE[ROM_API_INDEX_BL702_MemSet])
+#define RomDriver_BL702_MemSet4        \
+        ((uint32_t* (*)(uint32_t *dst, const uint32_t val, uint32_t n))ROM_APITABLE[ROM_API_INDEX_BL702_MemSet4])
+#define RomDriver_BL702_MemCmp        \
+        ((int (*)(const void *s1, const void *s2, uint32_t n))ROM_APITABLE[ROM_API_INDEX_BL702_MemCmp])
+#define RomDriver_BFLB_Soft_CRC32        \
+        ((uint32_t (*)(void *dataIn, uint32_t len))ROM_APITABLE[ROM_API_INDEX_BFLB_Soft_CRC32])
+
+#define RomDriver_GLB_Get_Root_CLK_Sel        \
+        ((GLB_ROOT_CLK_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_Get_Root_CLK_Sel])
+#define RomDriver_GLB_Set_System_CLK_Div        \
+        ((BL_Err_Type (*)(uint8_t hclkDiv,uint8_t bclkDiv))ROM_APITABLE[ROM_API_INDEX_GLB_Set_System_CLK_Div])
+#define RomDriver_GLB_Get_BCLK_Div        \
+        ((uint8_t (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_Get_BCLK_Div])
+#define RomDriver_GLB_Get_HCLK_Div        \
+        ((uint8_t (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_Get_HCLK_Div])
+#define RomDriver_Update_SystemCoreClockWith_XTAL        \
+        ((BL_Err_Type (*)(GLB_DLL_XTAL_Type xtalType))ROM_APITABLE[ROM_API_INDEX_Update_SystemCoreClockWith_XTAL])
+#define RomDriver_GLB_Set_System_CLK        \
+        ((BL_Err_Type (*)(GLB_DLL_XTAL_Type xtalType,GLB_SYS_CLK_Type clkFreq))ROM_APITABLE[ROM_API_INDEX_GLB_Set_System_CLK])
+#define RomDriver_System_Core_Clock_Update_From_RC32M        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_System_Core_Clock_Update_From_RC32M])
+#define RomDriver_GLB_Set_SF_CLK        \
+        ((BL_Err_Type (*)(uint8_t enable,GLB_SFLASH_CLK_Type clkSel,uint8_t div))ROM_APITABLE[ROM_API_INDEX_GLB_Set_SF_CLK])
+#define RomDriver_GLB_Power_Off_DLL        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_Power_Off_DLL])
+#define RomDriver_GLB_Power_On_DLL        \
+        ((BL_Err_Type (*)(GLB_DLL_XTAL_Type xtalType))ROM_APITABLE[ROM_API_INDEX_GLB_Power_On_DLL])
+#define RomDriver_GLB_Enable_DLL_All_Clks        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_Enable_DLL_All_Clks])
+#define RomDriver_GLB_Enable_DLL_Clk        \
+        ((BL_Err_Type (*)(GLB_DLL_CLK_Type dllClk))ROM_APITABLE[ROM_API_INDEX_GLB_Enable_DLL_Clk])
+#define RomDriver_GLB_Disable_DLL_All_Clks        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_Disable_DLL_All_Clks])
+#define RomDriver_GLB_Disable_DLL_Clk        \
+        ((BL_Err_Type (*)(GLB_DLL_CLK_Type dllClk))ROM_APITABLE[ROM_API_INDEX_GLB_Disable_DLL_Clk])
+#define RomDriver_GLB_SW_System_Reset        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_SW_System_Reset])
+#define RomDriver_GLB_SW_CPU_Reset        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_SW_CPU_Reset])
+#define RomDriver_GLB_SW_POR_Reset        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_SW_POR_Reset])
+#define RomDriver_GLB_Select_Internal_Flash        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_Select_Internal_Flash])
+#define RomDriver_GLB_Swap_Flash_Pin        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_Swap_Flash_Pin])
+#define RomDriver_GLB_Swap_Flash_CS_IO2_Pin        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_Swap_Flash_CS_IO2_Pin])
+#define RomDriver_GLB_Swap_Flash_IO0_IO3_Pin        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_Swap_Flash_IO0_IO3_Pin])
+#define RomDriver_GLB_Select_Internal_PSram        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_Select_Internal_PSram])
+#define RomDriver_GLB_GPIO_Init        \
+        ((BL_Err_Type (*)(GLB_GPIO_Cfg_Type *cfg))ROM_APITABLE[ROM_API_INDEX_GLB_GPIO_Init])
+#define RomDriver_GLB_GPIO_OUTPUT_Enable        \
+        ((BL_Err_Type (*)(GLB_GPIO_Type gpioPin))ROM_APITABLE[ROM_API_INDEX_GLB_GPIO_OUTPUT_Enable])
+#define RomDriver_GLB_GPIO_OUTPUT_Disable        \
+        ((BL_Err_Type (*)(GLB_GPIO_Type gpioPin))ROM_APITABLE[ROM_API_INDEX_GLB_GPIO_OUTPUT_Disable])
+#define RomDriver_GLB_GPIO_Set_HZ        \
+        ((BL_Err_Type (*)(GLB_GPIO_Type gpioPin))ROM_APITABLE[ROM_API_INDEX_GLB_GPIO_Set_HZ])
+#define RomDriver_GLB_Deswap_Flash_Pin        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_Deswap_Flash_Pin])
+#define RomDriver_GLB_Select_External_Flash        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_GLB_Select_External_Flash])
+#define RomDriver_GLB_GPIO_Get_Fun        \
+        ((uint8_t (*)(GLB_GPIO_Type gpioPin))ROM_APITABLE[ROM_API_INDEX_GLB_GPIO_Get_Fun])
+
+#define RomDriver_EF_Ctrl_Busy        \
+        ((BL_Sts_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_EF_Ctrl_Busy])
+#define RomDriver_EF_Ctrl_Sw_AHB_Clk_0        \
+        ((void (*)(void))ROM_APITABLE[ROM_API_INDEX_EF_Ctrl_Sw_AHB_Clk_0])
+#define RomDriver_EF_Ctrl_Load_Efuse_R0        \
+        ((void (*)(void))ROM_APITABLE[ROM_API_INDEX_EF_Ctrl_Load_Efuse_R0])
+#define RomDriver_EF_Ctrl_Clear        \
+        ((void (*)(uint32_t index, uint32_t len))ROM_APITABLE[ROM_API_INDEX_EF_Ctrl_Clear])
+#define RomDriver_EF_Ctrl_Get_Trim_Parity        \
+        ((uint8_t (*)(uint32_t val,uint8_t len))ROM_APITABLE[ROM_API_INDEX_EF_Ctrl_Get_Trim_Parity])
+#define RomDriver_EF_Ctrl_Read_RC32K_Trim        \
+        ((void (*)(Efuse_Ana_RC32K_Trim_Type *trim))ROM_APITABLE[ROM_API_INDEX_EF_Ctrl_Read_RC32K_Trim])
+#define RomDriver_EF_Ctrl_Read_RC32M_Trim        \
+        ((void (*)(Efuse_Ana_RC32M_Trim_Type *trim))ROM_APITABLE[ROM_API_INDEX_EF_Ctrl_Read_RC32M_Trim])
+
+#define RomDriver_PDS_Trim_RC32M        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_PDS_Trim_RC32M])
+#define RomDriver_PDS_Select_RC32M_As_PLL_Ref        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_PDS_Select_RC32M_As_PLL_Ref])
+#define RomDriver_PDS_Select_XTAL_As_PLL_Ref        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_PDS_Select_XTAL_As_PLL_Ref])
+#define RomDriver_PDS_Power_On_PLL        \
+        ((BL_Err_Type (*)(PDS_PLL_XTAL_Type xtalType))ROM_APITABLE[ROM_API_INDEX_PDS_Power_On_PLL])
+#define RomDriver_PDS_Enable_PLL_All_Clks        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_PDS_Enable_PLL_All_Clks])
+#define RomDriver_PDS_Disable_PLL_All_Clks        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_PDS_Disable_PLL_All_Clks])
+#define RomDriver_PDS_Enable_PLL_Clk        \
+        ((BL_Err_Type (*)(PDS_PLL_CLK_Type pllClk))ROM_APITABLE[ROM_API_INDEX_PDS_Enable_PLL_Clk])
+#define RomDriver_PDS_Disable_PLL_Clk        \
+        ((BL_Err_Type (*)(PDS_PLL_CLK_Type pllClk))ROM_APITABLE[ROM_API_INDEX_PDS_Disable_PLL_Clk])
+#define RomDriver_PDS_Power_Off_PLL        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_PDS_Power_Off_PLL])
+#define RomDriver_PDS_Reset        \
+        ((void (*)(void))ROM_APITABLE[ROM_API_INDEX_PDS_Reset])
+#define RomDriver_PDS_Enable        \
+        ((void (*)(PDS_CFG_Type *cfg,uint32_t pdsSleepCnt))ROM_APITABLE[ROM_API_INDEX_PDS_Enable])
+#define RomDriver_PDS_Auto_Time_Config        \
+        ((void (*)(uint32_t sleepDuration))ROM_APITABLE[ROM_API_INDEX_PDS_Auto_Time_Config])
+#define RomDriver_PDS_Auto_Enable        \
+        ((void (*)(PDS_AUTO_POWER_DOWN_CFG_Type *powerCfg, PDS_AUTO_NORMAL_CFG_Type *normalCfg, BL_Fun_Type enable))ROM_APITABLE[ROM_API_INDEX_PDS_Auto_Enable])
+#define RomDriver_PDS_Manual_Force_Turn_Off        \
+        ((void (*)(PDS_FORCE_Type domain))ROM_APITABLE[ROM_API_INDEX_PDS_Manual_Force_Turn_Off])
+#define RomDriver_PDS_Manual_Force_Turn_On        \
+        ((void (*)(PDS_FORCE_Type domain))ROM_APITABLE[ROM_API_INDEX_PDS_Manual_Force_Turn_On])
+
+#define RomDriver_HBN_Enable        \
+        ((void (*)(uint8_t aGPIOIeCfg,HBN_LDO_LEVEL_Type ldoLevel,HBN_LEVEL_Type hbnLevel))ROM_APITABLE[ROM_API_INDEX_HBN_Enable])
+#define RomDriver_HBN_Reset        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_HBN_Reset])
+#define RomDriver_HBN_GPIO_Dbg_Pull_Cfg        \
+        ((BL_Err_Type (*)(BL_Fun_Type pupdEn,BL_Fun_Type dlyEn,uint8_t dlySec,HBN_INT_Type gpioIrq,BL_Mask_Type gpioMask))ROM_APITABLE[ROM_API_INDEX_HBN_GPIO_Dbg_Pull_Cfg])
+#define RomDriver_HBN_Trim_RC32K        \
+        ((BL_Err_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_HBN_Trim_RC32K])
+#define RomDriver_HBN_Set_ROOT_CLK_Sel        \
+        ((BL_Err_Type (*)(HBN_ROOT_CLK_Type rootClk))ROM_APITABLE[ROM_API_INDEX_HBN_Set_ROOT_CLK_Sel])
+
+#define RomDriver_XIP_SFlash_State_Save        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t *offset))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_State_Save])
+#define RomDriver_XIP_SFlash_State_Restore        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint32_t offset))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_State_Restore])
+#define RomDriver_XIP_SFlash_Erase_Need_Lock        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint32_t startaddr,uint32_t endaddr))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_Erase_Need_Lock])
+#define RomDriver_XIP_SFlash_Write_Need_Lock        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint32_t addr,uint8_t *data, uint32_t len))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_Write_Need_Lock])
+#define RomDriver_XIP_SFlash_Read_Need_Lock        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint32_t addr,uint8_t *data, uint32_t len))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_Read_Need_Lock])
+#define RomDriver_XIP_SFlash_GetJedecId_Need_Lock        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint8_t *data))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_GetJedecId_Need_Lock])
+#define RomDriver_XIP_SFlash_GetDeviceId_Need_Lock        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint8_t *data))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_GetDeviceId_Need_Lock])
+#define RomDriver_XIP_SFlash_GetUniqueId_Need_Lock        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint8_t *data,uint8_t idLen))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_GetUniqueId_Need_Lock])
+#define RomDriver_XIP_SFlash_Read_Via_Cache_Need_Lock        \
+        ((BL_Err_Type (*)(uint32_t addr,uint8_t *data, uint32_t len))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_Read_Via_Cache_Need_Lock])
+#define RomDriver_XIP_SFlash_Read_With_Lock        \
+        ((int (*)(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint32_t addr, uint8_t *dst, int len))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_Read_With_Lock])
+#define RomDriver_XIP_SFlash_Write_With_Lock        \
+        ((int (*)(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint32_t addr, uint8_t *src, int len))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_Write_With_Lock])
+#define RomDriver_XIP_SFlash_Erase_With_Lock        \
+        ((int (*)(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint32_t addr, int len))ROM_APITABLE[ROM_API_INDEX_XIP_SFlash_Erase_With_Lock])
+
+#define RomDriver_SFlash_Init        \
+        ((void (*)(const SF_Ctrl_Cfg_Type *pSfCtrlCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_Init])
+#define RomDriver_SFlash_SetSPIMode        \
+        ((BL_Err_Type (*)(SF_Ctrl_Mode_Type mode))ROM_APITABLE[ROM_API_INDEX_SFlash_SetSPIMode])
+#define RomDriver_SFlash_Read_Reg        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,uint8_t regIndex,uint8_t *regValue,uint8_t regLen))ROM_APITABLE[ROM_API_INDEX_SFlash_Read_Reg])
+#define RomDriver_SFlash_Write_Reg        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,uint8_t regIndex,uint8_t *regValue,uint8_t regLen))ROM_APITABLE[ROM_API_INDEX_SFlash_Write_Reg])
+#define RomDriver_SFlash_Read_Reg_With_Cmd        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,uint8_t readRegCmd,uint8_t *regValue,uint8_t regLen))ROM_APITABLE[ROM_API_INDEX_SFlash_Read_Reg_With_Cmd])
+#define RomDriver_SFlash_Write_Reg_With_Cmd        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,uint8_t writeRegCmd,uint8_t *regValue,uint8_t regLen))ROM_APITABLE[ROM_API_INDEX_SFlash_Write_Reg_With_Cmd])
+#define RomDriver_SFlash_Busy        \
+        ((BL_Sts_Type (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_Busy])
+#define RomDriver_SFlash_Write_Enable        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_Write_Enable])
+#define RomDriver_SFlash_Qspi_Enable        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_Qspi_Enable])
+#define RomDriver_SFlash_Volatile_Reg_Write_Enable        \
+        ((void (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_Volatile_Reg_Write_Enable])
+#define RomDriver_SFlash_Chip_Erase        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_Chip_Erase])
+#define RomDriver_SFlash_Sector_Erase        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,uint32_t secNum))ROM_APITABLE[ROM_API_INDEX_SFlash_Sector_Erase])
+#define RomDriver_SFlash_Blk32_Erase        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,uint32_t blkNum))ROM_APITABLE[ROM_API_INDEX_SFlash_Blk32_Erase])
+#define RomDriver_SFlash_Blk64_Erase        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,uint32_t blkNum))ROM_APITABLE[ROM_API_INDEX_SFlash_Blk64_Erase])
+#define RomDriver_SFlash_Erase        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,uint32_t startaddr,uint32_t endaddr))ROM_APITABLE[ROM_API_INDEX_SFlash_Erase])
+#define RomDriver_SFlash_Program        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,SF_Ctrl_IO_Type ioMode,uint32_t addr,uint8_t *data, uint32_t len))ROM_APITABLE[ROM_API_INDEX_SFlash_Program])
+#define RomDriver_SFlash_GetUniqueId        \
+        ((void (*)(uint8_t *data,uint8_t idLen))ROM_APITABLE[ROM_API_INDEX_SFlash_GetUniqueId])
+#define RomDriver_SFlash_GetJedecId        \
+        ((void (*)(SPI_Flash_Cfg_Type *flashCfg,uint8_t *data))ROM_APITABLE[ROM_API_INDEX_SFlash_GetJedecId])
+#define RomDriver_SFlash_GetDeviceId        \
+        ((void (*)(uint8_t *data))ROM_APITABLE[ROM_API_INDEX_SFlash_GetDeviceId])
+#define RomDriver_SFlash_Powerdown        \
+        ((void (*)(void))ROM_APITABLE[ROM_API_INDEX_SFlash_Powerdown])
+#define RomDriver_SFlash_Releae_Powerdown        \
+        ((void (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_Releae_Powerdown])
+#define RomDriver_SFlash_Restore_From_Powerdown        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *pFlashCfg,uint8_t flashContRead))ROM_APITABLE[ROM_API_INDEX_SFlash_Restore_From_Powerdown])
+#define RomDriver_SFlash_SetBurstWrap        \
+        ((void (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_SetBurstWrap])
+#define RomDriver_SFlash_DisableBurstWrap        \
+        ((void (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_DisableBurstWrap])
+#define RomDriver_SFlash_Software_Reset        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_Software_Reset])
+#define RomDriver_SFlash_Reset_Continue_Read        \
+        ((void (*)(SPI_Flash_Cfg_Type *flashCfg))ROM_APITABLE[ROM_API_INDEX_SFlash_Reset_Continue_Read])
+#define RomDriver_SFlash_Set_IDbus_Cfg        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,SF_Ctrl_IO_Type ioMode,uint8_t contRead,uint32_t addr,uint32_t len))ROM_APITABLE[ROM_API_INDEX_SFlash_Set_IDbus_Cfg])
+#define RomDriver_SFlash_IDbus_Read_Enable        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,SF_Ctrl_IO_Type ioMode,uint8_t contRead))ROM_APITABLE[ROM_API_INDEX_SFlash_IDbus_Read_Enable])
+#define RomDriver_SFlash_Cache_Read_Enable        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,SF_Ctrl_IO_Type ioMode,uint8_t contRead,uint8_t wayDisable))ROM_APITABLE[ROM_API_INDEX_SFlash_Cache_Read_Enable])
+#define RomDriver_SFlash_Cache_Read_Disable        \
+        ((void (*)(void))ROM_APITABLE[ROM_API_INDEX_SFlash_Cache_Read_Disable])
+#define RomDriver_SFlash_Read        \
+        ((BL_Err_Type (*)(SPI_Flash_Cfg_Type *flashCfg,SF_Ctrl_IO_Type ioMode,uint8_t contRead,uint32_t addr,uint8_t *data, uint32_t len))ROM_APITABLE[ROM_API_INDEX_SFlash_Read])
+
+#define RomDriver_L1C_Cache_Enable_Set        \
+        ((BL_Err_Type (*)(uint8_t wayDisable))ROM_APITABLE[ROM_API_INDEX_L1C_Cache_Enable_Set])
+#define RomDriver_L1C_Cache_Write_Set        \
+        ((void (*)(BL_Fun_Type wtEn, BL_Fun_Type wbEn, BL_Fun_Type waEn))ROM_APITABLE[ROM_API_INDEX_L1C_Cache_Write_Set])
+#define RomDriver_L1C_Cache_Flush        \
+        ((BL_Err_Type (*)(uint8_t wayDisable))ROM_APITABLE[ROM_API_INDEX_L1C_Cache_Flush])
+#define RomDriver_L1C_Cache_Hit_Count_Get        \
+        ((void (*)(uint32_t *hitCountLow,uint32_t *hitCountHigh))ROM_APITABLE[ROM_API_INDEX_L1C_Cache_Hit_Count_Get])
+#define RomDriver_L1C_Cache_Miss_Count_Get        \
+        ((uint32_t (*)(void))ROM_APITABLE[ROM_API_INDEX_L1C_Cache_Miss_Count_Get])
+#define RomDriver_L1C_Cache_Read_Disable        \
+        ((void (*)(void))ROM_APITABLE[ROM_API_INDEX_L1C_Cache_Read_Disable])
+#define RomDriver_L1C_Set_Wrap        \
+        ((BL_Err_Type (*)(BL_Fun_Type wrap))ROM_APITABLE[ROM_API_INDEX_L1C_Set_Wrap])
+#define RomDriver_L1C_Set_Way_Disable        \
+        ((BL_Err_Type (*)(uint8_t disableVal))ROM_APITABLE[ROM_API_INDEX_L1C_Set_Way_Disable])
+#define RomDriver_L1C_IROM_2T_Access_Set        \
+        ((BL_Err_Type (*)(uint8_t enable))ROM_APITABLE[ROM_API_INDEX_L1C_IROM_2T_Access_Set])
+
+#define RomDriver_SF_Ctrl_Enable        \
+        ((void (*)(const SF_Ctrl_Cfg_Type *cfg))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Enable])
+#define RomDriver_SF_Ctrl_Psram_Init        \
+        ((void (*)(SF_Ctrl_Psram_Cfg *sfCtrlPsramCfg))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Psram_Init])
+#define RomDriver_SF_Ctrl_Get_Clock_Delay        \
+        ((uint8_t (*)(void))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Get_Clock_Delay])
+#define RomDriver_SF_Ctrl_Set_Clock_Delay        \
+        ((void (*)(uint8_t delay))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Set_Clock_Delay])
+#define RomDriver_SF_Ctrl_Cmds_Set        \
+        ((void (*)(SF_Ctrl_Cmds_Cfg *cmdsCfg))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Cmds_Set])
+#define RomDriver_SF_Ctrl_Set_Owner        \
+        ((void (*)(SF_Ctrl_Owner_Type owner))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Set_Owner])
+#define RomDriver_SF_Ctrl_Disable        \
+        ((void (*)(void))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Disable])
+#define RomDriver_SF_Ctrl_Select_Pad        \
+        ((void (*)(SF_Ctrl_Pad_Select sel))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Select_Pad])
+#define RomDriver_SF_Ctrl_Select_Bank        \
+        ((void (*)(SF_Ctrl_Select sel))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Select_Bank])
+#define RomDriver_SF_Ctrl_AES_Enable_BE        \
+        ((void (*)(void))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_AES_Enable_BE])
+#define RomDriver_SF_Ctrl_AES_Enable_LE        \
+        ((void (*)(void))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_AES_Enable_LE])
+#define RomDriver_SF_Ctrl_AES_Set_Region        \
+        ((void (*)(uint8_t region,uint8_t enable,uint8_t hwKey,uint32_t startAddr,uint32_t endAddr,uint8_t locked))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_AES_Set_Region])
+#define RomDriver_SF_Ctrl_AES_Set_Key        \
+        ((void (*)(uint8_t region,uint8_t *key, SF_Ctrl_AES_Key_Type keyType))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_AES_Set_Key])
+#define RomDriver_SF_Ctrl_AES_Set_Key_BE        \
+        ((void (*)(uint8_t region,uint8_t *key, SF_Ctrl_AES_Key_Type keyType))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_AES_Set_Key_BE])
+#define RomDriver_SF_Ctrl_AES_Set_IV        \
+        ((void (*)(uint8_t region,uint8_t *iv,uint32_t addrOffset))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_AES_Set_IV])
+#define RomDriver_SF_Ctrl_AES_Set_IV_BE        \
+        ((void (*)(uint8_t region,uint8_t *iv,uint32_t addrOffset))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_AES_Set_IV_BE])
+#define RomDriver_SF_Ctrl_AES_Enable        \
+        ((void (*)(void))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_AES_Enable])
+#define RomDriver_SF_Ctrl_AES_Disable        \
+        ((void (*)(void))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_AES_Disable])
+#define RomDriver_SF_Ctrl_Is_AES_Enable        \
+        ((uint8_t (*)(void))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Is_AES_Enable])
+#define RomDriver_SF_Ctrl_Set_Flash_Image_Offset        \
+        ((void (*)(uint32_t addrOffset))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Set_Flash_Image_Offset])
+#define RomDriver_SF_Ctrl_Get_Flash_Image_Offset        \
+        ((uint32_t (*)(void))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Get_Flash_Image_Offset])
+#define RomDriver_SF_Ctrl_Select_Clock        \
+        ((void (*)(SF_Ctrl_Sahb_Type sahbType))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Select_Clock])
+#define RomDriver_SF_Ctrl_SendCmd        \
+        ((void (*)(SF_Ctrl_Cmd_Cfg_Type *cfg))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_SendCmd])
+#define RomDriver_SF_Ctrl_Flash_Read_Icache_Set        \
+        ((void (*)(SF_Ctrl_Cmd_Cfg_Type *cfg,uint8_t cmdValid))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Flash_Read_Icache_Set])
+#define RomDriver_SF_Ctrl_Psram_Write_Icache_Set        \
+        ((void (*)(SF_Ctrl_Cmd_Cfg_Type *cfg,uint8_t cmdValid))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Psram_Write_Icache_Set])
+#define RomDriver_SF_Ctrl_Psram_Read_Icache_Set        \
+        ((void (*)(SF_Ctrl_Cmd_Cfg_Type *cfg,uint8_t cmdValid))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_Psram_Read_Icache_Set])
+#define RomDriver_SF_Ctrl_GetBusyState        \
+        ((BL_Sts_Type (*)(void))ROM_APITABLE[ROM_API_INDEX_SF_Ctrl_GetBusyState])
+#define RomDriver_SF_Cfg_Deinit_Ext_Flash_Gpio        \
+        ((void (*)(uint8_t extFlashPin))ROM_APITABLE[ROM_API_INDEX_SF_Cfg_Deinit_Ext_Flash_Gpio])
+#define RomDriver_SF_Cfg_Init_Ext_Flash_Gpio        \
+        ((void (*)(uint8_t extFlashPin))ROM_APITABLE[ROM_API_INDEX_SF_Cfg_Init_Ext_Flash_Gpio])
+#define RomDriver_SF_Cfg_Get_Flash_Cfg_Need_Lock        \
+        ((BL_Err_Type (*)(uint32_t flashID,SPI_Flash_Cfg_Type * pFlashCfg))ROM_APITABLE[ROM_API_INDEX_SF_Cfg_Get_Flash_Cfg_Need_Lock])
+#define RomDriver_SF_Cfg_Init_Flash_Gpio        \
+        ((void (*)(uint8_t flashPinCfg,uint8_t restoreDefault))ROM_APITABLE[ROM_API_INDEX_SF_Cfg_Init_Flash_Gpio])
+#define RomDriver_SF_Cfg_Flash_Identify        \
+        ((uint32_t (*)(uint8_t callFromFlash,uint32_t autoScan,uint32_t flashPinCfg,uint8_t restoreDefault, SPI_Flash_Cfg_Type * pFlashCfg))ROM_APITABLE[ROM_API_INDEX_SF_Cfg_Flash_Identify])
+
+#define RomDriver_Psram_Init        \
+        ((void (*)(SPI_Psram_Cfg_Type *psramCfg, SF_Ctrl_Cmds_Cfg *cmdsCfg, SF_Ctrl_Psram_Cfg *sfCtrlPsramCfg))ROM_APITABLE[ROM_API_INDEX_Psram_Init])
+#define RomDriver_Psram_ReadReg        \
+        ((void (*)(SPI_Psram_Cfg_Type *psramCfg, uint8_t *regValue))ROM_APITABLE[ROM_API_INDEX_Psram_ReadReg])
+#define RomDriver_Psram_WriteReg        \
+        ((void (*)(SPI_Psram_Cfg_Type *psramCfg, uint8_t *regValue))ROM_APITABLE[ROM_API_INDEX_Psram_WriteReg])
+#define RomDriver_Psram_SetDriveStrength        \
+        ((BL_Err_Type (*)(SPI_Psram_Cfg_Type *psramCfg))ROM_APITABLE[ROM_API_INDEX_Psram_SetDriveStrength])
+#define RomDriver_Psram_SetBurstWrap        \
+        ((BL_Err_Type (*)(SPI_Psram_Cfg_Type *psramCfg))ROM_APITABLE[ROM_API_INDEX_Psram_SetBurstWrap])
+#define RomDriver_Psram_ReadId        \
+        ((void (*)(SPI_Psram_Cfg_Type *psramCfg, uint8_t *data))ROM_APITABLE[ROM_API_INDEX_Psram_ReadId])
+#define RomDriver_Psram_EnterQuadMode        \
+        ((BL_Err_Type (*)(SPI_Psram_Cfg_Type *psramCfg))ROM_APITABLE[ROM_API_INDEX_Psram_EnterQuadMode])
+#define RomDriver_Psram_ExitQuadMode        \
+        ((BL_Err_Type (*)(SPI_Psram_Cfg_Type *psramCfg))ROM_APITABLE[ROM_API_INDEX_Psram_ExitQuadMode])
+#define RomDriver_Psram_ToggleBurstLength        \
+        ((BL_Err_Type (*)(SPI_Psram_Cfg_Type *psramCfg, PSRAM_Ctrl_Mode ctrlMode))ROM_APITABLE[ROM_API_INDEX_Psram_ToggleBurstLength])
+#define RomDriver_Psram_SoftwareReset        \
+        ((BL_Err_Type (*)(SPI_Psram_Cfg_Type *psramCfg, PSRAM_Ctrl_Mode ctrlMode))ROM_APITABLE[ROM_API_INDEX_Psram_SoftwareReset])
+#define RomDriver_Psram_Set_IDbus_Cfg        \
+        ((BL_Err_Type (*)(SPI_Psram_Cfg_Type *psramCfg, SF_Ctrl_IO_Type ioMode, uint32_t addr, uint32_t len))ROM_APITABLE[ROM_API_INDEX_Psram_Set_IDbus_Cfg])
+#define RomDriver_Psram_Cache_Write_Set        \
+        ((BL_Err_Type (*)(SPI_Psram_Cfg_Type *psramCfg, SF_Ctrl_IO_Type ioMode, BL_Fun_Type wtEn, BL_Fun_Type wbEn, BL_Fun_Type waEn))ROM_APITABLE[ROM_API_INDEX_Psram_Cache_Write_Set])
+#define RomDriver_Psram_Write        \
+        ((BL_Err_Type (*)(SPI_Psram_Cfg_Type *psramCfg, SF_Ctrl_IO_Type ioMode, uint32_t addr, uint8_t *data, uint32_t len))ROM_APITABLE[ROM_API_INDEX_Psram_Write])
+#define RomDriver_Psram_Read        \
+        ((BL_Err_Type (*)(SPI_Psram_Cfg_Type *psramCfg, SF_Ctrl_IO_Type ioMode, uint32_t addr, uint8_t *data, uint32_t len))ROM_APITABLE[ROM_API_INDEX_Psram_Read])
+/*@} end of group ROMDRIVER_Public_Types */
+
+/** @defgroup  ROMDRIVER_Public_Constants
+ *  @{
+ */
+
+/*@} end of group ROMDRIVER_Public_Constants */
+
+/** @defgroup  ROMDRIVER_Public_Macros
+ *  @{
+ */
+
+/*@} end of group ROMDRIVER_Public_Macros */
+
+/** @defgroup  ROMDRIVER_Public_Functions
+ *  @{
+ */
+
+/*@} end of group ROMDRIVER_Public_Functions */
+
+/*@} end of group ROMDRIVER */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_ROMDRIVER_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_sec_dbg.h b/drivers/bl702_driver/std_drv/inc/bl702_sec_dbg.h
new file mode 100644
index 00000000..05c35e36
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_sec_dbg.h
@@ -0,0 +1,82 @@
+/**
+  ******************************************************************************
+  * @file    bl702_sec_dbg.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_SEC_DBG_H__
+#define __BL702_SEC_DBG_H__
+
+#include "sec_dbg_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  SEC_DBG
+ *  @{
+ */
+
+/** @defgroup  SEC_DBG_Public_Types
+ *  @{
+ */
+
+/*@} end of group SEC_DBG_Public_Types */
+
+/** @defgroup  SEC_DBG_Public_Constants
+ *  @{
+ */
+
+/*@} end of group SEC_DBG_Public_Constants */
+
+/** @defgroup  SEC_DBG_Public_Macros
+ *  @{
+ */
+
+/*@} end of group SEC_DBG_Public_Macros */
+
+/** @defgroup  SEC_DBG_Public_Functions
+ *  @{
+ */
+void Sec_Dbg_Read_Chip_ID(uint8_t id[8]);
+void Sec_Dbg_Read_WiFi_MAC(uint8_t macAddr[6]);
+uint32_t Sec_Dbg_Read_Dbg_Mode(void);
+uint32_t Sec_Dbg_Read_Dbg_Enable(void);
+
+/*@} end of group SEC_DBG_Public_Functions */
+
+/*@} end of group SEC_DBG */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_SEC_DBG_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_sec_eng.h b/drivers/bl702_driver/std_drv/inc/bl702_sec_eng.h
new file mode 100644
index 00000000..c14fd9a0
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_sec_eng.h
@@ -0,0 +1,572 @@
+/**
+  ******************************************************************************
+  * @file    bl702_sec_eng.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_SEC_ENG_H__
+#define __BL702_SEC_ENG_H__
+
+#include "sec_eng_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  SEC_ENG
+ *  @{
+ */
+
+/** @defgroup  SEC_ENG_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief AES port type definition
+ */
+typedef enum {
+    SEC_ENG_AES_ID0,                         /*!< AES0 port define */
+}SEC_ENG_AES_ID_Type;
+
+/**
+ *  @brief SHA port type definition
+ */
+typedef enum {
+    SEC_ENG_SHA_ID0,                         /*!< SHA0 port define */
+}SEC_ENG_SHA_ID_Type;
+
+/**
+ *  @brief SHA type definition
+ */
+typedef enum {
+    SEC_ENG_SHA256,                          /*!< SHA type:SHA256 */
+    SEC_ENG_SHA224,                          /*!< SHA type:SHA224 */
+    SEC_ENG_SHA1,                            /*!< SHA type:SHA1 */
+    SEC_ENG_SHA1_RSVD,                       /*!< SHA type:SHA1 */
+}SEC_ENG_SHA_Type;
+
+/**
+ *  @brief AES type definition
+ */
+typedef enum {
+    SEC_ENG_AES_ECB,                         /*!< AES mode type:ECB */
+    SEC_ENG_AES_CTR,                         /*!< AES mode type:CTR */
+    SEC_ENG_AES_CBC,                         /*!< AES mode type:CBC */
+}SEC_ENG_AES_Type;
+
+/**
+ *  @brief AES KEY type definition
+ */
+typedef enum {
+    SEC_ENG_AES_KEY_128BITS,                 /*!< AES KEY type:128 bits */
+    SEC_ENG_AES_KEY_256BITS,                 /*!< AES KEY type:256 bits */
+    SEC_ENG_AES_KEY_192BITS,                 /*!< AES KEY type:192 bits */
+    SEC_ENG_AES_DOUBLE_KEY_128BITS,          /*!< AES double KEY type:128 bits */
+}SEC_ENG_AES_Key_Type;
+
+/**
+ *  @brief AES CTR mode counter type definition
+ */
+typedef enum {
+    SEC_ENG_AES_COUNTER_BYTE_4,              /*!< AES CTR mode counter type:4 bytes */
+    SEC_ENG_AES_COUNTER_BYTE_1,              /*!< AES CTR mode counter type:1 byte */
+    SEC_ENG_AES_COUNTER_BYTE_2,              /*!< AES CTR mode counter type:2 bytes */
+    SEC_ENG_AES_COUNTER_BYTE_3,              /*!< AES CTR mode counter type:3 bytes */
+}SEC_ENG_AES_Counter_Type;
+
+/**
+ *  @brief AES use new or old value type definition
+ */
+typedef enum {
+    SEC_ENG_AES_USE_NEW,                     /*!< Use new value */
+    SEC_ENG_AES_USE_OLD,                     /*!< Use old value same as last one */
+}SEC_ENG_AES_ValueUsed_Type;
+
+/**
+ *  @brief AES KEY source type definition
+ */
+typedef enum {
+    SEC_ENG_AES_KEY_SW,                      /*!< AES KEY from software */
+    SEC_ENG_AES_KEY_HW,                      /*!< AES KEY from hardware */
+}SEC_ENG_AES_Key_Src_Type;
+
+/**
+ *  @brief AES KEY source type definition
+ */
+typedef enum {
+    SEC_ENG_AES_ENCRYPTION,                  /*!< AES encryption */
+    SEC_ENG_AES_DECRYPTION,                  /*!< AES decryption */
+}SEC_ENG_AES_EnDec_Type;
+
+/**
+ *  @brief AES PKA register size type definition
+ */
+typedef enum {
+    SEC_ENG_PKA_REG_SIZE_8=1,               /*!< Register size is  8 Bytes */
+    SEC_ENG_PKA_REG_SIZE_16,                /*!< Register size is  16 Bytes */
+    SEC_ENG_PKA_REG_SIZE_32,                /*!< Register size is  32 Bytes */
+    SEC_ENG_PKA_REG_SIZE_64,                /*!< Register size is  64 Bytes */
+    SEC_ENG_PKA_REG_SIZE_96,                /*!< Register size is  96 Bytes */
+    SEC_ENG_PKA_REG_SIZE_128,               /*!< Register size is  128 Bytes */
+    SEC_ENG_PKA_REG_SIZE_192,               /*!< Register size is  192 Bytes */
+    SEC_ENG_PKA_REG_SIZE_256,               /*!< Register size is  256 Bytes */
+    SEC_ENG_PKA_REG_SIZE_384,               /*!< Register size is  384 Bytes */
+    SEC_ENG_PKA_REG_SIZE_512,               /*!< Register size is  512 Bytes */
+}SEC_ENG_PKA_REG_SIZE_Type;
+
+/**
+ *  @brief AES PKA register size type definition
+ */
+typedef enum {
+    SEC_ENG_PKA_OP_PPSEL,                   /*!< PKA operation type */
+    SEC_ENG_PKA_OP_MOD2N=0x11,              /*!< PKA operation type */
+    SEC_ENG_PKA_OP_LDIV2N=0x12,             /*!< PKA operation type */
+    SEC_ENG_PKA_OP_LMUL2N=0x13,             /*!< PKA operation type */
+    SEC_ENG_PKA_OP_LDIV=0x14,               /*!< PKA operation type */
+    SEC_ENG_PKA_OP_LSQR=0x15,               /*!< PKA operation type */
+    SEC_ENG_PKA_OP_LMUL=0x16,               /*!< PKA operation type */
+    SEC_ENG_PKA_OP_LSUB=0x17,               /*!< PKA operation type */
+    SEC_ENG_PKA_OP_LADD=0x18,               /*!< PKA operation type */
+    SEC_ENG_PKA_OP_LCMP=0x19,               /*!< PKA operation type */
+    SEC_ENG_PKA_OP_MDIV2=0x21,              /*!< PKA operation type */
+    SEC_ENG_PKA_OP_MINV=0x22,               /*!< PKA operation type */
+    SEC_ENG_PKA_OP_MEXP=0x23,               /*!< PKA operation type */
+    SEC_ENG_PKA_OP_MSQR=0x24,               /*!< PKA operation type */
+    SEC_ENG_PKA_OP_MMUL=0x25,               /*!< PKA operation type */
+    SEC_ENG_PKA_OP_MREM=0x26,               /*!< PKA operation type */
+    SEC_ENG_PKA_OP_MSUB=0x27,               /*!< PKA operation type */
+    SEC_ENG_PKA_OP_MADD=0x28,               /*!< PKA operation type */
+    SEC_ENG_PKA_OP_RESIZE =0x31,            /*!< PKA operation type */
+    SEC_ENG_PKA_OP_MOVDAT=0x32,             /*!< PKA operation type */
+    SEC_ENG_PKA_OP_NLIR=0x33,               /*!< PKA operation type */
+    SEC_ENG_PKA_OP_SLIR=0x34,               /*!< PKA operation type */
+    SEC_ENG_PKA_OP_CLIR=0x35,               /*!< PKA operation type */
+    SEC_ENG_PKA_OP_CFLIRI_BUFFER=0x36,      /*!< PKA operation type */
+    SEC_ENG_PKA_OP_CTLIRI_PLD=0x37,         /*!< PKA operation type */
+    SEC_ENG_PKA_OP_CFLIR_BUFFER=0x38,       /*!< PKA operation type */
+    SEC_ENG_PKA_OP_CTLIR_PLD=0x39,          /*!< PKA operation type */
+}SEC_ENG_PKA_OP_Type;
+
+/**
+ *  @brief Sec Eng Interrupt Type Def
+ */
+typedef enum {
+    SEC_ENG_INT_TRNG,                        /*!< Sec Eng Trng Interrupt Type */
+    SEC_ENG_INT_AES,                         /*!< Sec Eng Aes Interrupt Type */
+    SEC_ENG_INT_SHA,                         /*!< Sec Eng Sha Interrupt Type */
+    SEC_ENG_INT_PKA,                         /*!< Sec Eng Pka Interrupt Type */
+    SEC_ENG_INT_CDET,                        /*!< Sec Eng Cdet Interrupt Type */
+    SEC_ENG_INT_GMAC,                        /*!< Sec Eng Gmac Interrupt Type */
+    SEC_ENG_INT_ALL,                         /*!< Sec Eng All Interrupt Types */
+}SEC_ENG_INT_Type;
+
+/**
+ *  @brief SEC_ENG SHA context
+ */
+typedef struct {
+    uint32_t total[2];                       /*!< Number of bytes processed */
+    uint32_t  *shaBuf;                       /*!< Data not processed but in this temp buffer */
+    uint32_t  *shaPadding;                   /*!< Padding data */
+    uint8_t  shaFeed;                        /*!< Sha has feed data */
+}SEC_Eng_SHA256_Ctx;
+
+/**
+ *  @brief SEC_ENG SHA link mode context
+ */
+typedef struct {
+    uint32_t total[2];                       /*!< Number of bytes processed */
+    uint32_t  *shaBuf;                       /*!< Data not processed but in this temp buffer */
+    uint32_t  *shaPadding;                   /*!< Padding data */
+    uint32_t linkAddr;                       /*!< Link configure address */
+}SEC_Eng_SHA256_Link_Ctx;
+
+/**
+ *  @brief SEC_ENG AES context
+ */
+typedef struct {
+    uint8_t  aesFeed;                        /*!< AES has feed data */
+    SEC_ENG_AES_Type mode;                   /*!< AES mode */
+}SEC_Eng_AES_Ctx;
+
+/**
+ *  @brief SEC_ENG SHA link config structure type definition
+ */
+typedef struct {
+    uint32_t :2;                            /*!< [1:0]reserved */
+    uint32_t shaMode:3;                     /*!< [4:2]Sha-256/sha-224/sha-1/sha-1 */
+    uint32_t :1;                            /*!< [5]reserved */
+    uint32_t shaHashSel:1;                  /*!< [6]New hash or accumulate last hash */
+    uint32_t :2;                            /*!< [8:7]reserved */
+    uint32_t shaIntClr:1;                   /*!< [9]Clear interrupt */
+    uint32_t shaIntSet:1;                   /*!< [10]Set interrupt */
+    uint32_t :5;                            /*!< [15:11]reserved */
+    uint32_t shaMsgLen:16;                  /*!< [31:16]Number of 512-bit block */
+    uint32_t shaSrcAddr;                     /*!< Message source address */
+    uint32_t result[8];                      /*!< Result of SHA */
+}__attribute__ ((aligned(4)))SEC_Eng_SHA_Link_Config_Type;
+
+/**
+ *  @brief SEC_ENG AES link config structure type definition
+ */
+typedef struct {
+    uint32_t :3;                            /*!< [2:0]Reserved */
+    uint32_t aesMode:2;                     /*!< [4:3]128-bit/256-bit/192-bit/128-bit-double key mode select */
+    uint32_t aesDecEn:1;                    /*!< [5]Encode or decode */
+    uint32_t aesDecKeySel:1;                /*!< [6]Use new key or use same key as last one */
+    uint32_t aesHwKeyEn:1;                  /*!< [7]Enable or disable using hardware hey */
+    uint32_t :1;                            /*!< [8]Reserved */
+    uint32_t aesIntClr:1;                   /*!< [9]Clear interrupt */
+    uint32_t aesIntSet:1;                   /*!< [10]Set interrupt */
+    uint32_t :1;                            /*!< [11]Reserved */
+    uint32_t aesBlockMode:2;                /*!< [13:12]ECB/CTR/CBC mode select */
+    uint32_t aesIVSel:1;                    /*!< [14]Use new iv or use same iv as last one */
+    uint32_t :1;                            /*!< [15]Reserved */
+    uint32_t aesMsgLen:16;                  /*!< [31:16]Number of 128-bit block */
+    uint32_t aesSrcAddr;                     /*!< Message source address */
+    uint32_t aesDstAddr;                     /*!< Message destination address */
+    uint32_t aesIV0;                         /*!< Big endian initial vector(MSB) */
+    uint32_t aesIV1;                         /*!< Big endian initial vector */
+    uint32_t aesIV2;                         /*!< Big endian initial vector */
+    uint32_t aesIV3;                         /*!< Big endian initial vector(LSB)(CTR mode:counter initial value) */
+    uint32_t aesKey0;                        /*!< Big endian aes key(aes-128/256 key MSB) */
+    uint32_t aesKey1;                        /*!< Big endian aes key */
+    uint32_t aesKey2;                        /*!< Big endian aes key */
+    uint32_t aesKey3;                        /*!< Big endian aes key(aes-128 key LSB) */
+    uint32_t aesKey4;                        /*!< Big endian aes key */
+    uint32_t aesKey5;                        /*!< Big endian aes key */
+    uint32_t aesKey6;                        /*!< Big endian aes key */
+    uint32_t aesKey7;                        /*!< Big endian aes key(aes-256 key LSB) */
+}__attribute__ ((aligned(4)))SEC_Eng_AES_Link_Config_Type;
+
+/**
+ *  @brief SEC_ENG GMAC link config structure type definition
+ */
+typedef struct {
+    uint32_t :9;                            /*!< [8:0]reserved */
+    uint32_t gmacIntClr:1;                  /*!< [9]Clear interrupt */
+    uint32_t gmacIntSet:1;                  /*!< [10]Set interrupt */
+    uint32_t :5;                            /*!< [15:11]reserved */
+    uint32_t gmacMsgLen:16;                 /*!< [31:16]Number of 128-bit block */
+    uint32_t gmacSrcAddr;                    /*!< Message source address */
+    uint32_t gmacKey0;                       /*!< GMAC key */
+    uint32_t gmacKey1;                       /*!< GMAC key */
+    uint32_t gmacKey2;                       /*!< GMAC key */
+    uint32_t gmacKey3;                       /*!< GMAC key */
+    uint32_t result[4];                      /*!< Result of GMAC */
+    uint32_t dummy;                          /*!< Not use,trigger GMAC will clear this value */
+}__attribute__ ((aligned(4)))SEC_Eng_GMAC_Link_Config_Type;
+
+/**
+ *  @brief SEC_ENG PKA status type definition
+ */
+typedef struct {
+    uint16_t primeFail:1;                   /*!< [0]Prime fail */
+    uint16_t errUnknown:1;                  /*!< [1]Err unknown opc */
+    uint16_t errOverflow:1;                 /*!< [2]Err opq overflow */
+    uint16_t errSrc2:1;                     /*!< [3]Err invalid src2 */
+    uint16_t errSrc1:1;                     /*!< [4]Err invalid src1 */
+    uint16_t errSrc0:1;                     /*!< [5]Err invalid src0 */
+    uint16_t errDiv0:1;                     /*!< [6]Err div by 0 */
+    uint16_t errFull:1;                     /*!< [7]Err cam full */
+    uint16_t lastOpc:1;                     /*!< [8]Last opc */
+    uint16_t opqFull:1;                     /*!< [9]Opq full */
+    uint16_t cmdIndex:5;                    /*!< [14:10]Cmd err index */
+    uint16_t errCmd:1;                      /*!< [15]Err cmd */
+}SEC_Eng_PKA_Status_Type;
+
+/*@} end of group SEC_ENG_Public_Types */
+
+/** @defgroup  SEC_ENG_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  SEC_ENG_AES_ID_TYPE
+ *  @{
+ */
+#define IS_SEC_ENG_AES_ID_TYPE(type)                     (((type) == SEC_ENG_AES_ID0))
+
+/** @defgroup  SEC_ENG_SHA_ID_TYPE
+ *  @{
+ */
+#define IS_SEC_ENG_SHA_ID_TYPE(type)                     (((type) == SEC_ENG_SHA_ID0))
+
+/** @defgroup  SEC_ENG_SHA_TYPE
+ *  @{
+ */
+#define IS_SEC_ENG_SHA_TYPE(type)                        (((type) == SEC_ENG_SHA256) || \
+                                                          ((type) == SEC_ENG_SHA224) || \
+                                                          ((type) == SEC_ENG_SHA1) || \
+                                                          ((type) == SEC_ENG_SHA1_RSVD))
+
+/** @defgroup  SEC_ENG_AES_TYPE
+ *  @{
+ */
+#define IS_SEC_ENG_AES_TYPE(type)                        (((type) == SEC_ENG_AES_ECB) || \
+                                                          ((type) == SEC_ENG_AES_CTR) || \
+                                                          ((type) == SEC_ENG_AES_CBC))
+
+/** @defgroup  SEC_ENG_AES_KEY_TYPE
+ *  @{
+ */
+#define IS_SEC_ENG_AES_KEY_TYPE(type)                    (((type) == SEC_ENG_AES_KEY_128BITS) || \
+                                                          ((type) == SEC_ENG_AES_KEY_256BITS) || \
+                                                          ((type) == SEC_ENG_AES_KEY_192BITS) || \
+                                                          ((type) == SEC_ENG_AES_DOUBLE_KEY_128BITS))
+
+/** @defgroup  SEC_ENG_AES_COUNTER_TYPE
+ *  @{
+ */
+#define IS_SEC_ENG_AES_COUNTER_TYPE(type)                (((type) == SEC_ENG_AES_COUNTER_BYTE_4) || \
+                                                          ((type) == SEC_ENG_AES_COUNTER_BYTE_1) || \
+                                                          ((type) == SEC_ENG_AES_COUNTER_BYTE_2) || \
+                                                          ((type) == SEC_ENG_AES_COUNTER_BYTE_3))
+
+/** @defgroup  SEC_ENG_AES_VALUEUSED_TYPE
+ *  @{
+ */
+#define IS_SEC_ENG_AES_VALUEUSED_TYPE(type)              (((type) == SEC_ENG_AES_USE_NEW) || \
+                                                          ((type) == SEC_ENG_AES_USE_OLD))
+
+/** @defgroup  SEC_ENG_AES_KEY_SRC_TYPE
+ *  @{
+ */
+#define IS_SEC_ENG_AES_KEY_SRC_TYPE(type)                (((type) == SEC_ENG_AES_KEY_SW) || \
+                                                          ((type) == SEC_ENG_AES_KEY_HW))
+
+/** @defgroup  SEC_ENG_AES_ENDEC_TYPE
+ *  @{
+ */
+#define IS_SEC_ENG_AES_ENDEC_TYPE(type)                  (((type) == SEC_ENG_AES_ENCRYPTION) || \
+                                                          ((type) == SEC_ENG_AES_DECRYPTION))
+
+/** @defgroup  SEC_ENG_PKA_REG_SIZE_TYPE
+ *  @{
+ */
+#define IS_SEC_ENG_PKA_REG_SIZE_TYPE(type)               (((type) == SEC_ENG_PKA_REG_SIZE_8) || \
+                                                          ((type) == SEC_ENG_PKA_REG_SIZE_16) || \
+                                                          ((type) == SEC_ENG_PKA_REG_SIZE_32) || \
+                                                          ((type) == SEC_ENG_PKA_REG_SIZE_64) || \
+                                                          ((type) == SEC_ENG_PKA_REG_SIZE_96) || \
+                                                          ((type) == SEC_ENG_PKA_REG_SIZE_128) || \
+                                                          ((type) == SEC_ENG_PKA_REG_SIZE_192) || \
+                                                          ((type) == SEC_ENG_PKA_REG_SIZE_256) || \
+                                                          ((type) == SEC_ENG_PKA_REG_SIZE_384) || \
+                                                          ((type) == SEC_ENG_PKA_REG_SIZE_512))
+
+/** @defgroup  SEC_ENG_PKA_OP_TYPE
+ *  @{
+ */
+#define IS_SEC_ENG_PKA_OP_TYPE(type)                     (((type) == SEC_ENG_PKA_OP_PPSEL) || \
+                                                          ((type) == SEC_ENG_PKA_OP_MOD2N) || \
+                                                          ((type) == SEC_ENG_PKA_OP_LDIV2N) || \
+                                                          ((type) == SEC_ENG_PKA_OP_LMUL2N) || \
+                                                          ((type) == SEC_ENG_PKA_OP_LDIV) || \
+                                                          ((type) == SEC_ENG_PKA_OP_LSQR) || \
+                                                          ((type) == SEC_ENG_PKA_OP_LMUL) || \
+                                                          ((type) == SEC_ENG_PKA_OP_LSUB) || \
+                                                          ((type) == SEC_ENG_PKA_OP_LADD) || \
+                                                          ((type) == SEC_ENG_PKA_OP_LCMP) || \
+                                                          ((type) == SEC_ENG_PKA_OP_MDIV2) || \
+                                                          ((type) == SEC_ENG_PKA_OP_MINV) || \
+                                                          ((type) == SEC_ENG_PKA_OP_MEXP) || \
+                                                          ((type) == SEC_ENG_PKA_OP_MSQR) || \
+                                                          ((type) == SEC_ENG_PKA_OP_MMUL) || \
+                                                          ((type) == SEC_ENG_PKA_OP_MREM) || \
+                                                          ((type) == SEC_ENG_PKA_OP_MSUB) || \
+                                                          ((type) == SEC_ENG_PKA_OP_MADD) || \
+                                                          ((type) == SEC_ENG_PKA_OP_RESIZE ) || \
+                                                          ((type) == SEC_ENG_PKA_OP_MOVDAT) || \
+                                                          ((type) == SEC_ENG_PKA_OP_NLIR) || \
+                                                          ((type) == SEC_ENG_PKA_OP_SLIR) || \
+                                                          ((type) == SEC_ENG_PKA_OP_CLIR) || \
+                                                          ((type) == SEC_ENG_PKA_OP_CFLIRI_BUFFER) || \
+                                                          ((type) == SEC_ENG_PKA_OP_CTLIRI_PLD) || \
+                                                          ((type) == SEC_ENG_PKA_OP_CFLIR_BUFFER) || \
+                                                          ((type) == SEC_ENG_PKA_OP_CTLIR_PLD))
+
+/** @defgroup  SEC_ENG_INT_TYPE
+ *  @{
+ */
+#define IS_SEC_ENG_INT_TYPE(type)                        (((type) == SEC_ENG_INT_TRNG) || \
+                                                          ((type) == SEC_ENG_INT_AES) || \
+                                                          ((type) == SEC_ENG_INT_SHA) || \
+                                                          ((type) == SEC_ENG_INT_PKA) || \
+                                                          ((type) == SEC_ENG_INT_CDET) || \
+                                                          ((type) == SEC_ENG_INT_GMAC) || \
+                                                          ((type) == SEC_ENG_INT_ALL))
+
+/*@} end of group SEC_ENG_Public_Constants */
+
+/** @defgroup  SEC_ENG_Public_Macros
+ *  @{
+ */
+#define SEC_ENG_PKA_STATUS_LAST_OPC_OFFSET          24
+#define SEC_ENG_PKA_STATUS_LAST_OPC_MASK            0x01000000
+
+/*@} end of group SEC_ENG_Public_Macros */
+
+/** @defgroup  SEC_ENG_Public_Functions
+ *  @{
+ */
+#ifndef BFLB_USE_HAL_DRIVER
+void SEC_GMAC_IRQHandler(void);
+void SEC_CDET_IRQHandler(void);
+void SEC_TRNG_IRQHandler(void);
+void SEC_PKA_IRQHandler(void);
+void SEC_AES_IRQHandler(void);
+void SEC_SHA_IRQHandler(void);
+#endif
+void Sec_Eng_SHA256_Init(SEC_Eng_SHA256_Ctx *shaCtx,SEC_ENG_SHA_ID_Type shaNo,SEC_ENG_SHA_Type type,
+                                uint32_t shaTmpBuf[16],
+uint32_t padding[16]);
+void Sec_Eng_SHA_Start(SEC_ENG_SHA_ID_Type shaNo);
+BL_Err_Type Sec_Eng_SHA256_Update(SEC_Eng_SHA256_Ctx *shaCtx,SEC_ENG_SHA_ID_Type shaNo,const uint8_t *input,
+                                  uint32_t len);
+BL_Err_Type Sec_Eng_SHA256_Finish(SEC_Eng_SHA256_Ctx *shaCtx,SEC_ENG_SHA_ID_Type shaNo,uint8_t *hash);
+void Sec_Eng_SHA_Enable_Link(SEC_ENG_SHA_ID_Type shaNo);
+void Sec_Eng_SHA_Disable_Link(SEC_ENG_SHA_ID_Type shaNo);
+void Sec_Eng_SHA256_Link_Init(SEC_Eng_SHA256_Link_Ctx *shaCtx,SEC_ENG_SHA_ID_Type shaNo,uint32_t linkAddr,
+                              uint32_t shaTmpBuf[16],uint32_t padding[16]);
+BL_Err_Type Sec_Eng_SHA256_Link_Update(SEC_Eng_SHA256_Link_Ctx *shaCtx,SEC_ENG_SHA_ID_Type shaNo,
+                                       const uint8_t *input, uint32_t len);
+BL_Err_Type Sec_Eng_SHA256_Link_Finish(SEC_Eng_SHA256_Link_Ctx *shaCtx,SEC_ENG_SHA_ID_Type shaNo,
+                                       uint8_t *hash);
+BL_Err_Type Sec_Eng_AES_Init(SEC_Eng_AES_Ctx *aesCtx,SEC_ENG_AES_ID_Type aesNo,SEC_ENG_AES_Type aesType,
+                             SEC_ENG_AES_Key_Type keyType,SEC_ENG_AES_EnDec_Type enDecType);
+void Sec_Eng_AES_Enable_LE(SEC_ENG_AES_ID_Type aesNo);
+void Sec_Eng_AES_Enable_BE(SEC_ENG_AES_ID_Type aesNo);
+void Sec_Eng_AES_Enable_Link(SEC_ENG_AES_ID_Type aesNo);
+void Sec_Eng_AES_Disable_Link(SEC_ENG_AES_ID_Type aesNo);
+BL_Err_Type Sec_Eng_AES_Link_Work(SEC_ENG_AES_ID_Type aesNo,uint32_t linkAddr,const uint8_t *in,uint32_t len,
+                                  uint8_t *out);
+void Sec_Eng_AES_Set_Hw_Key_Src(SEC_ENG_AES_ID_Type aesNo,uint8_t src);
+void Sec_Eng_AES_Set_Key_IV(SEC_ENG_AES_ID_Type aesNo,SEC_ENG_AES_Key_Src_Type keySrc,const uint8_t *key,
+                            const uint8_t *iv);
+void Sec_Eng_AES_Set_Key_IV_BE(SEC_ENG_AES_ID_Type aesNo,SEC_ENG_AES_Key_Src_Type keySrc,const uint8_t *key,
+                               const uint8_t *iv);
+void Sec_Eng_AES_Set_Counter_Byte(SEC_ENG_AES_ID_Type aesNo,SEC_ENG_AES_Counter_Type counterType);
+BL_Err_Type Sec_Eng_AES_Crypt(SEC_Eng_AES_Ctx *aesCtx,SEC_ENG_AES_ID_Type aesNo,const uint8_t *in, uint32_t len,
+                              uint8_t *out);
+BL_Err_Type Sec_Eng_AES_Finish(SEC_ENG_AES_ID_Type aesNo);
+BL_Err_Type Sec_Eng_Trng_Enable(void);
+void Sec_Eng_Trng_Int_Enable(void);
+void Sec_Eng_Trng_Int_Disable(void);
+BL_Err_Type Sec_Eng_Trng_Read(uint8_t data[32]);
+void Sec_Eng_Trng_Int_Read_Trigger(void);
+void Sec_Eng_Trng_Int_Read(uint8_t data[32]);
+void Sec_Eng_Trng_Disable(void);
+void Sec_Eng_PKA_Reset(void);
+void Sec_Eng_PKA_BigEndian_Enable(void);
+void Sec_Eng_PKA_LittleEndian_Enable(void);
+void Sec_Eng_PKA_GetStatus(SEC_Eng_PKA_Status_Type *status);
+void Sec_Eng_PKA_Write_Data( SEC_ENG_PKA_REG_SIZE_Type regType,uint8_t regIndex,const uint32_t *data,uint16_t size,
+                            uint8_t lastOp);
+void Sec_Eng_PKA_Read_Data(SEC_ENG_PKA_REG_SIZE_Type regType, uint8_t regIdx, uint32_t *result, uint8_t retSize);
+void Sec_Eng_PKA_CREG(SEC_ENG_PKA_REG_SIZE_Type dRegType, uint8_t dRegIdx, uint8_t size,uint8_t lastOp);
+void Sec_Eng_PKA_Write_Immediate( SEC_ENG_PKA_REG_SIZE_Type regType,uint8_t regIndex,uint32_t data,uint8_t lastOp);
+void Sec_Eng_PKA_NREG(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,uint8_t lastOp);
+void Sec_Eng_PKA_Move_Data(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,uint8_t lastOp);
+void Sec_Eng_PKA_RESIZE(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,uint8_t lastOp);
+void Sec_Eng_PKA_MADD(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+uint8_t s1RegType,
+                      uint8_t s1RegIdx, uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp);
+void Sec_Eng_PKA_MSUB(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+uint8_t s1RegType,
+                      uint8_t s1RegIdx, uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp);
+void Sec_Eng_PKA_MREM(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+uint8_t s2RegType,
+                      uint8_t s2RegIdx,uint8_t lastOp);
+void Sec_Eng_PKA_MMUL(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+uint8_t s1RegType,
+                      uint8_t s1RegIdx, uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp);
+void Sec_Eng_PKA_MSQR(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+uint8_t s2RegType,
+                      uint8_t s2RegIdx,uint8_t lastOp);
+void Sec_Eng_PKA_MEXP(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+uint8_t s1RegType,
+                      uint8_t s1RegIdx, uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp);
+void Sec_Eng_PKA_MINV(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+uint8_t s2RegType,
+                      uint8_t s2RegIdx,uint8_t lastOp);
+void Sec_Eng_PKA_MINV(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+uint8_t s2RegType,
+                      uint8_t s2RegIdx,uint8_t lastOp);
+void Sec_Eng_PKA_LCMP(uint8_t *cout, uint8_t s0RegType, uint8_t s0RegIdx, uint8_t s1RegType, uint8_t s1RegIdx);
+void Sec_Eng_PKA_LADD(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+uint8_t s1RegType,
+                      uint8_t s1RegIdx,uint8_t lastOp);
+void Sec_Eng_PKA_LSUB(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+uint8_t s1RegType,
+                      uint8_t s1RegIdx,uint8_t lastOp);
+void Sec_Eng_PKA_LMUL(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+uint8_t s1RegType,
+                      uint8_t s1RegIdx,uint8_t lastOp);
+void Sec_Eng_PKA_LSQR(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,uint8_t lastOp);
+void Sec_Eng_PKA_LDIV(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+uint8_t s2RegType,
+                      uint8_t s2RegIdx,uint8_t lastOp);
+void Sec_Eng_PKA_LMUL2N(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+uint16_t bit_shift,
+                        uint8_t lastOp);
+void Sec_Eng_PKA_LDIV2N(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+uint16_t bit_shift,
+                        uint8_t lastOp);
+void Sec_Eng_PKA_LMOD2N(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+uint16_t bit_shift,
+                        uint8_t lastOp);
+void Sec_Eng_PKA_GF2Mont(uint8_t dRegType, uint8_t dRegIdx, uint8_t sRegType, uint8_t sRegIdx,uint32_t size,
+                         uint8_t tRegType, uint8_t tRegIdx,uint8_t pRegType, uint8_t pRegIdx);
+void Sec_Eng_PKA_Mont2GF(uint8_t dRegType, uint8_t dRegIdx, uint8_t aRegType, uint8_t aRegIdx, uint8_t invrRegType,
+                         uint8_t invrRegIdx,
+uint8_t tRegType, uint8_t tRegIdx,uint8_t pRegType, uint8_t pRegIdx);
+void Sec_Eng_GMAC_Enable_LE(void);
+void Sec_Eng_GMAC_Enable_BE(void);
+void Sec_Eng_GMAC_Enable_Link(void);
+void Sec_Eng_GMAC_Disable_Link(void);
+BL_Err_Type Sec_Eng_GMAC_Link_Work(uint32_t linkAddr,const uint8_t *in,uint32_t len,uint8_t *out);
+void SEC_Eng_IntMask(SEC_ENG_INT_Type intType, BL_Mask_Type intMask);
+void SEC_Eng_ClrIntStatus(SEC_ENG_INT_Type intType);
+void SEC_Eng_Int_Callback_Install(SEC_ENG_INT_Type intType,intCallback_Type* cbFun);
+BL_Sts_Type SEC_Eng_GetIntStatus(SEC_ENG_INT_Type intType);
+/*----------*/
+void SEC_Eng_Turn_On_Sec_Ring(void);
+void SEC_Eng_Turn_Off_Sec_Ring(void);
+/*----------*/;
+
+/*@} end of group SEC_ENG_Public_Functions */
+
+/*@} end of group SEC_ENG */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_SEC_ENG_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_sf_cfg.h b/drivers/bl702_driver/std_drv/inc/bl702_sf_cfg.h
new file mode 100644
index 00000000..673e0299
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_sf_cfg.h
@@ -0,0 +1,125 @@
+/**
+  ******************************************************************************
+  * @file    bl702_sf_cfg.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_SF_CFG_H__
+#define __BL702_SF_CFG_H__
+
+#include "string.h"
+#include "bl702_sflash.h"
+#include "bl702_sf_ctrl.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  SF_CFG
+ *  @{
+ */
+
+/** @defgroup  SF_CFG_Public_Types
+ *  @{
+ */
+
+/*@} end of group SF_CFG_Public_Types */
+
+/** @defgroup  SF_CFG_Public_Constants
+ *  @{
+ */
+
+/*@} end of group SF_CFG_Public_Constants */
+
+/** @defgroup  SF_CFG_Public_Macros
+ *  @{
+ */
+/* Flash option 0 */
+/* Flash CLK */
+#define BFLB_EXTFLASH_CLK0_GPIO                 GLB_GPIO_PIN_21
+/* FLASH CS */
+#define BFLB_EXTFLASH_CS0_GPIO                  GLB_GPIO_PIN_19
+/* FLASH DATA */
+#define BFLB_EXTFLASH_DATA00_GPIO               GLB_GPIO_PIN_17
+#define BFLB_EXTFLASH_DATA10_GPIO               GLB_GPIO_PIN_18
+#define BFLB_EXTFLASH_DATA20_GPIO               GLB_GPIO_PIN_22
+#define BFLB_EXTFLASH_DATA30_GPIO               GLB_GPIO_PIN_20
+/* Flash option 1 */
+/* Flash CLK */
+#define BFLB_EXTFLASH_CLK1_GPIO                 GLB_GPIO_PIN_27
+/* FLASH CS */
+#define BFLB_EXTFLASH_CS1_GPIO                  GLB_GPIO_PIN_25
+/* FLASH DATA */
+#define BFLB_EXTFLASH_DATA01_GPIO               GLB_GPIO_PIN_28
+#define BFLB_EXTFLASH_DATA11_GPIO               GLB_GPIO_PIN_24
+#define BFLB_EXTFLASH_DATA21_GPIO               GLB_GPIO_PIN_23
+#define BFLB_EXTFLASH_DATA31_GPIO               GLB_GPIO_PIN_26
+/* Flash option 2 */
+/* Flash CLK */
+#define BFLB_EXTFLASH_CLK2_GPIO                 GLB_GPIO_PIN_36
+/* FLASH CS */
+#define BFLB_EXTFLASH_CS2_GPIO                  GLB_GPIO_PIN_35
+/* FLASH DATA */
+#define BFLB_EXTFLASH_DATA02_GPIO               GLB_GPIO_PIN_32
+#define BFLB_EXTFLASH_DATA12_GPIO               GLB_GPIO_PIN_34
+#define BFLB_EXTFLASH_DATA22_GPIO               GLB_GPIO_PIN_33
+#define BFLB_EXTFLASH_DATA32_GPIO               GLB_GPIO_PIN_37
+#define BFLB_FLASH_CFG_SF2_EXT_23_28            0
+#define BFLB_FLASH_CFG_SF2_INT_512K             1
+#define BFLB_FLASH_CFG_SF2_INT_1M               2
+#define BFLB_FLASH_CFG_SF1_EXT_17_22            3
+#define BFLB_SF2_SWAP_NONE                      0
+#define BFLB_SF2_SWAP_CS_IO2                    1
+#define BFLB_SF2_SWAP_IO0_IO3                   2
+#define BFLB_SF2_SWAP_BOTH                      3
+#define BFLB_FLASH_ID_VALID_FLAG                0x80000000
+#define BFLB_FLASH_ID_VALID_MASK                0x7FFFFFFF
+
+/*@} end of group SF_CFG_Public_Macros */
+
+/** @defgroup  SF_CFG_Public_Functions
+ *  @{
+ */
+BL_Err_Type SF_Cfg_Get_Flash_Cfg_Need_Lock(uint32_t flashID,SPI_Flash_Cfg_Type * pFlashCfg);
+void SF_Cfg_Init_Flash_Gpio(uint8_t flashPinCfg,uint8_t restoreDefault);
+uint32_t SF_Cfg_Flash_Identify(uint8_t callFromFlash,uint32_t autoScan,uint32_t flashPinCfg,uint8_t restoreDefault,
+                               SPI_Flash_Cfg_Type * pFlashCfg);
+void SF_Cfg_Init_Ext_Flash_Gpio(uint8_t extFlashPin);
+void SF_Cfg_Deinit_Ext_Flash_Gpio(uint8_t extFlashPin);
+
+/*@} end of group SF_CFG_Public_Functions */
+
+/*@} end of group SF_CFG */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_SF_CFG_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_sf_cfg_ext.h b/drivers/bl702_driver/std_drv/inc/bl702_sf_cfg_ext.h
new file mode 100644
index 00000000..b8b5ecb1
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_sf_cfg_ext.h
@@ -0,0 +1,83 @@
+/**
+  ******************************************************************************
+  * @file    bl702_sf_cfg_ext.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_SF_CFG_EXT_H__
+#define __BL702_SF_CFG_EXT_H__
+
+#include "string.h"
+#include "bl702_sflash.h"
+#include "bl702_sf_ctrl.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  SF_CFG_EXT
+ *  @{
+ */
+
+/** @defgroup  SF_CFG_EXT_Public_Types
+ *  @{
+ */
+
+/*@} end of group SF_CFG_EXT_Public_Types */
+
+/** @defgroup  SF_CFG_EXT_Public_Constants
+ *  @{
+ */
+
+/*@} end of group SF_CFG_EXT_Public_Constants */
+
+/** @defgroup  SF_CFG_EXT_Public_Macros
+ *  @{
+ */
+
+/*@} end of group SF_CFG_EXT_Public_Macros */
+
+/** @defgroup  SF_CFG_EXT_Public_Functions
+ *  @{
+ */
+void SF_Cfg_Init_Internal_Flash_Gpio(void);
+BL_Err_Type SF_Cfg_Get_Flash_Cfg_Need_Lock_Ext(uint32_t flashID,SPI_Flash_Cfg_Type * pFlashCfg);
+uint32_t SF_Cfg_Flash_Identify_Ext(uint8_t callFromFlash,uint32_t autoScan,uint32_t flashPinCfg,
+                                   uint8_t restoreDefault,SPI_Flash_Cfg_Type * pFlashCfg);
+
+/*@} end of group SF_CFG_EXT_Public_Functions */
+
+/*@} end of group SF_CFG_EXT */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_SF_CFG_EXT_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_sf_ctrl.h b/drivers/bl702_driver/std_drv/inc/bl702_sf_ctrl.h
new file mode 100644
index 00000000..a76ded0f
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_sf_ctrl.h
@@ -0,0 +1,406 @@
+/**
+  ******************************************************************************
+  * @file    bl702_sf_ctrl.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_SF_CTRL_H__
+#define __BL702_SF_CTRL_H__
+
+#include "sf_ctrl_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  SF_CTRL
+ *  @{
+ */
+
+/** @defgroup  SF_CTRL_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief Serial flash pad select type definition
+ */
+typedef enum {
+    SF_CTRL_PAD_SEL_SF1,                    /*!< SF Ctrl pad select sf1, flash use GPIO 17-22, no psram */
+    SF_CTRL_PAD_SEL_SF2,                    /*!< SF Ctrl pad select sf2, flash use GPIO 23-28, no psram, embedded flash */
+    SF_CTRL_PAD_SEL_SF3,                    /*!< SF Ctrl pad select sf3, flash use GPIO 32-37, no psram */
+    SF_CTRL_PAD_SEL_DUAL_BANK_SF1_SF2,      /*!< SF Ctrl pad select sf1 and sf2, flash use GPIO 17-22, psram use GPIO 23-28 */
+    SF_CTRL_PAD_SEL_DUAL_BANK_SF2_SF3,      /*!< SF Ctrl pad select sf2 and sf3, flash use GPIO 23-28, psram use GPIO 32-37 */
+    SF_CTRL_PAD_SEL_DUAL_BANK_SF3_SF1,      /*!< SF Ctrl pad select sf3 and sf1, flash use GPIO 32-37, psram use GPIO 17-22 */
+    SF_CTRL_PAD_SEL_DUAL_CS_SF2,            /*!< SF Ctrl pad select sf2, flash/psram use GPIO 23-28, psram use GPIO 17 as CS2 */
+    SF_CTRL_PAD_SEL_DUAL_CS_SF3,            /*!< SF Ctrl pad select sf3, flash/psram use GPIO 32-37, psram use GPIO 23 as CS2 */
+}SF_Ctrl_Pad_Select;
+
+/**
+ *  @brief Serial flash system bus control type definition
+ */
+typedef enum {
+    SF_CTRL_SEL_FLASH,                      /*!< SF Ctrl system bus control flash */
+    SF_CTRL_SEL_PSRAM,                      /*!< SF Ctrl system bus control psram */
+}SF_Ctrl_Select;
+
+/**
+ *  @brief Serail flash controller wrap mode len type definition
+ */
+typedef enum {
+    SF_CTRL_WRAP_LEN_8,                     /*!< SF Ctrl wrap length: 8 */
+    SF_CTRL_WRAP_LEN_16,                    /*!< SF Ctrl wrap length: 16 */
+    SF_CTRL_WRAP_LEN_32,                    /*!< SF Ctrl wrap length: 32 */
+    SF_CTRL_WRAP_LEN_64,                    /*!< SF Ctrl wrap length: 64 */
+    SF_CTRL_WRAP_LEN_128,                   /*!< SF Ctrl wrap length: 128 */
+    SF_CTRL_WRAP_LEN_256,                   /*!< SF Ctrl wrap length: 256 */
+    SF_CTRL_WRAP_LEN_512,                   /*!< SF Ctrl wrap length: 512 */
+    SF_CTRL_WRAP_LEN_1024,                  /*!< SF Ctrl wrap length: 1024 */
+    SF_CTRL_WRAP_LEN_2048,                  /*!< SF Ctrl wrap length: 2048 */
+    SF_CTRL_WRAP_LEN_4096,                  /*!< SF Ctrl wrap length: 4096 */
+}SF_Ctrl_Wrap_Len_Type;
+
+/**
+ *  @brief Serial flash controller owner type definition
+ */
+typedef enum {
+    SF_CTRL_OWNER_SAHB,                     /*!< System AHB bus control serial flash controller */
+    SF_CTRL_OWNER_IAHB,                     /*!< I-Code AHB bus control serial flash controller */
+}SF_Ctrl_Owner_Type;
+
+/**
+ *  @brief Serial flash controller select clock type definition
+ */
+typedef enum {
+    SF_CTRL_SAHB_CLOCK,                     /*!< Serial flash controller select default sahb clock */
+    SF_CTRL_FLASH_CLOCK,                    /*!< Serial flash controller select flash clock */
+}SF_Ctrl_Sahb_Type;
+
+/**
+ *  @brief Serial flash controller owner type definition
+ */
+typedef enum {
+    HIGH_SPEED_MODE_CLOCK,                  /*!< Serial flash controller high speed mode clk_ahb>clk_sf */
+    REMOVE_CLOCK_CONSTRAIN,                 /*!< Serial flash controller remove clock constrain */
+}SF_Ctrl_Ahb2sif_Type;
+
+/**
+ *  @brief Read and write type definition
+ */
+typedef enum {
+    SF_CTRL_READ,                           /*!< Serail flash read command flag */
+    SF_CTRL_WRITE,                          /*!< Serail flash write command flag */
+}SF_Ctrl_RW_Type;
+
+/**
+ *  @brief Serail flash interface IO type definition
+ */
+typedef enum {
+    SF_CTRL_NIO_MODE,                       /*!< Normal IO mode define */
+    SF_CTRL_DO_MODE,                        /*!< Dual Output mode define */
+    SF_CTRL_QO_MODE,                        /*!< Quad Output mode define */
+    SF_CTRL_DIO_MODE,                       /*!< Dual IO mode define */
+    SF_CTRL_QIO_MODE,                       /*!< Quad IO mode define */
+}SF_Ctrl_IO_Type;
+
+/**
+ *  @brief Serail flash controller interface mode type definition
+ */
+typedef enum {
+    SF_CTRL_SPI_MODE,                       /*!< SPI mode define */
+    SF_CTRL_QPI_MODE,                       /*!< QPI mode define */
+}SF_Ctrl_Mode_Type;
+
+/**
+ *  @brief Serail flash controller command mode type definition
+ */
+typedef enum {
+    SF_CTRL_CMD_1_LINE,                     /*!< Command in one line mode */
+    SF_CTRL_CMD_4_LINES,                    /*!< Command in four lines mode */
+}SF_Ctrl_Cmd_Mode_Type;
+
+/**
+ *  @brief Serail flash controller address mode type definition
+ */
+typedef enum {
+    SF_CTRL_ADDR_1_LINE,                    /*!< Address in one line mode */
+    SF_CTRL_ADDR_2_LINES,                   /*!< Address in two lines mode */
+    SF_CTRL_ADDR_4_LINES,                   /*!< Address in four lines mode */
+}SF_Ctrl_Addr_Mode_Type;
+
+/**
+ *  @brief Serail flash controller dummy mode type definition
+ */
+typedef enum {
+    SF_CTRL_DUMMY_1_LINE,                   /*!< Dummy in one line mode */
+    SF_CTRL_DUMMY_2_LINES,                  /*!< Dummy in two lines mode */
+    SF_CTRL_DUMMY_4_LINES,                  /*!< Dummy in four lines mode */
+}SF_Ctrl_Dmy_Mode_Type;
+
+/**
+ *  @brief Serail flash controller data mode type definition
+ */
+typedef enum {
+    SF_CTRL_DATA_1_LINE,                    /*!< Data in one line mode */
+    SF_CTRL_DATA_2_LINES,                   /*!< Data in two lines mode */
+    SF_CTRL_DATA_4_LINES,                   /*!< Data in four lines mode */
+}SF_Ctrl_Data_Mode_Type;
+
+/**
+ *  @brief Serail flash controller AES type definition
+ */
+typedef enum {
+    SF_CTRL_AES_128BITS,                    /*!< Serail flash AES key 128 bits length */
+    SF_CTRL_AES_256BITS,                    /*!< Serail flash AES key 256 bits length */
+    SF_CTRL_AES_192BITS,                    /*!< Serail flash AES key 192 bits length */
+    SF_CTRL_AES_128BITS_DOUBLE_KEY,         /*!< Serail flash AES key 128 bits length double key */
+}SF_Ctrl_AES_Key_Type;
+
+/**
+ *  @brief Serail flash controller configuration structure type definition
+ */
+typedef struct {
+    SF_Ctrl_Owner_Type owner;               /*!< Sflash interface bus owner */
+    SF_Ctrl_Sahb_Type sahbClock;            /*!< Sflash clock sahb sram select */
+    SF_Ctrl_Ahb2sif_Type ahb2sifMode;       /*!< Sflash ahb2sif mode */
+    uint8_t  clkDelay;                      /*!< Clock count for read due to pad delay */
+    uint8_t  clkInvert;                     /*!< Clock invert */
+    uint8_t  rxClkInvert;                   /*!< RX clock invert */
+    uint8_t  doDelay;                       /*!< Data out delay */
+    uint8_t  diDelay;                       /*!< Data in delay */
+    uint8_t  oeDelay;                       /*!< Output enable delay */
+}SF_Ctrl_Cfg_Type;
+
+/**
+ *  @brief SF Ctrl psram controller configuration structure type definition
+ */
+typedef struct {
+    SF_Ctrl_Owner_Type owner;               /*!< Psram interface bus owner */
+    SF_Ctrl_Pad_Select padSel;              /*!< SF Ctrl pad select */
+    SF_Ctrl_Select bankSel;                 /*!< SF Ctrl bank select */
+    BL_Fun_Type psramRxClkInvertSrc;        /*!< Select psram rx clock invert source */
+    BL_Fun_Type psramRxClkInvertSel;        /*!< Select inveted psram rx clock */
+    BL_Fun_Type psramDelaySrc;              /*!< Select psram read delay source */
+    uint8_t psramClkDelay;                  /*!< Psram read delay cycle = n + 1 */
+}SF_Ctrl_Psram_Cfg;
+
+/**
+ *  @brief SF Ctrl cmds configuration structure type definition
+ */
+typedef struct {
+    BL_Fun_Type cmdsEn;                     /*!< SF Ctrl cmds enable */
+    BL_Fun_Type burstToggleEn;              /*!< SF Ctrl burst toggle mode enable */
+    BL_Fun_Type wrapModeEn;                 /*!< SF Ctrl wrap mode cmd enable */
+    SF_Ctrl_Wrap_Len_Type wrapLen;          /*!< SF Ctrl wrap length */
+}SF_Ctrl_Cmds_Cfg;
+
+/**
+ *  @brief Serail flash command configuration structure type definition
+ */
+typedef struct {
+    uint8_t  rwFlag;                        /*!< Read write flag */
+    SF_Ctrl_Cmd_Mode_Type  cmdMode;         /*!< Command mode */
+    SF_Ctrl_Addr_Mode_Type  addrMode;       /*!< Address mode */
+    uint8_t  addrSize;                      /*!< Address size */
+    uint8_t  dummyClks;                     /*!< Dummy clocks */
+    SF_Ctrl_Dmy_Mode_Type  dummyMode;       /*!< Dummy mode */
+    SF_Ctrl_Data_Mode_Type  dataMode;       /*!< Data mode */
+    uint8_t  rsv[1];                        /*!<  */
+    uint32_t nbData;                        /*!< Transfer number of bytes */
+    uint32_t cmdBuf[2];                     /*!< Command buffer */
+}SF_Ctrl_Cmd_Cfg_Type;
+
+/*@} end of group SF_CTRL_Public_Types */
+
+/** @defgroup  SF_CTRL_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  SF_CTRL_PAD_SELECT
+ *  @{
+ */
+#define IS_SF_CTRL_PAD_SELECT(type)                      (((type) == SF_CTRL_PAD_SEL_SF1) || \
+                                                          ((type) == SF_CTRL_PAD_SEL_SF2) || \
+                                                          ((type) == SF_CTRL_PAD_SEL_SF3) || \
+                                                          ((type) == SF_CTRL_PAD_SEL_DUAL_BANK_SF1_SF2) || \
+                                                          ((type) == SF_CTRL_PAD_SEL_DUAL_BANK_SF2_SF3) || \
+                                                          ((type) == SF_CTRL_PAD_SEL_DUAL_BANK_SF3_SF1) || \
+                                                          ((type) == SF_CTRL_PAD_SEL_DUAL_CS_SF2) || \
+                                                          ((type) == SF_CTRL_PAD_SEL_DUAL_CS_SF3))
+
+/** @defgroup  SF_CTRL_SELECT
+ *  @{
+ */
+#define IS_SF_CTRL_SELECT(type)                          (((type) == SF_CTRL_SEL_FLASH) || \
+                                                          ((type) == SF_CTRL_SEL_PSRAM))
+
+/** @defgroup  SF_CTRL_WRAP_LEN_TYPE
+ *  @{
+ */
+#define IS_SF_CTRL_WRAP_LEN_TYPE(type)                   (((type) == SF_CTRL_WRAP_LEN_8) || \
+                                                          ((type) == SF_CTRL_WRAP_LEN_16) || \
+                                                          ((type) == SF_CTRL_WRAP_LEN_32) || \
+                                                          ((type) == SF_CTRL_WRAP_LEN_64) || \
+                                                          ((type) == SF_CTRL_WRAP_LEN_128) || \
+                                                          ((type) == SF_CTRL_WRAP_LEN_256) || \
+                                                          ((type) == SF_CTRL_WRAP_LEN_512) || \
+                                                          ((type) == SF_CTRL_WRAP_LEN_1024) || \
+                                                          ((type) == SF_CTRL_WRAP_LEN_2048) || \
+                                                          ((type) == SF_CTRL_WRAP_LEN_4096))
+
+/** @defgroup  SF_CTRL_OWNER_TYPE
+ *  @{
+ */
+#define IS_SF_CTRL_OWNER_TYPE(type)                      (((type) == SF_CTRL_OWNER_SAHB) || \
+                                                          ((type) == SF_CTRL_OWNER_IAHB))
+
+/** @defgroup  SF_CTRL_SAHB_TYPE
+ *  @{
+ */
+#define IS_SF_CTRL_SAHB_TYPE(type)                       (((type) == SF_CTRL_SAHB_CLOCK) || \
+                                                          ((type) == SF_CTRL_FLASH_CLOCK))
+
+/** @defgroup  SF_CTRL_AHB2SIF_TYPE
+ *  @{
+ */
+#define IS_SF_CTRL_AHB2SIF_TYPE(type)                    (((type) == HIGH_SPEED_MODE_CLOCK) || \
+                                                          ((type) == REMOVE_CLOCK_CONSTRAIN))
+
+/** @defgroup  SF_CTRL_RW_TYPE
+ *  @{
+ */
+#define IS_SF_CTRL_RW_TYPE(type)                         (((type) == SF_CTRL_READ) || \
+                                                          ((type) == SF_CTRL_WRITE))
+
+/** @defgroup  SF_CTRL_IO_TYPE
+ *  @{
+ */
+#define IS_SF_CTRL_IO_TYPE(type)                         (((type) == SF_CTRL_NIO_MODE) || \
+                                                          ((type) == SF_CTRL_DO_MODE) || \
+                                                          ((type) == SF_CTRL_QO_MODE) || \
+                                                          ((type) == SF_CTRL_DIO_MODE) || \
+                                                          ((type) == SF_CTRL_QIO_MODE))
+
+/** @defgroup  SF_CTRL_MODE_TYPE
+ *  @{
+ */
+#define IS_SF_CTRL_MODE_TYPE(type)                       (((type) == SF_CTRL_SPI_MODE) || \
+                                                          ((type) == SF_CTRL_QPI_MODE))
+
+/** @defgroup  SF_CTRL_CMD_MODE_TYPE
+ *  @{
+ */
+#define IS_SF_CTRL_CMD_MODE_TYPE(type)                   (((type) == SF_CTRL_CMD_1_LINE) || \
+                                                          ((type) == SF_CTRL_CMD_4_LINES))
+
+/** @defgroup  SF_CTRL_ADDR_MODE_TYPE
+ *  @{
+ */
+#define IS_SF_CTRL_ADDR_MODE_TYPE(type)                  (((type) == SF_CTRL_ADDR_1_LINE) || \
+                                                          ((type) == SF_CTRL_ADDR_2_LINES) || \
+                                                          ((type) == SF_CTRL_ADDR_4_LINES))
+
+/** @defgroup  SF_CTRL_DMY_MODE_TYPE
+ *  @{
+ */
+#define IS_SF_CTRL_DMY_MODE_TYPE(type)                   (((type) == SF_CTRL_DUMMY_1_LINE) || \
+                                                          ((type) == SF_CTRL_DUMMY_2_LINES) || \
+                                                          ((type) == SF_CTRL_DUMMY_4_LINES))
+
+/** @defgroup  SF_CTRL_DATA_MODE_TYPE
+ *  @{
+ */
+#define IS_SF_CTRL_DATA_MODE_TYPE(type)                  (((type) == SF_CTRL_DATA_1_LINE) || \
+                                                          ((type) == SF_CTRL_DATA_2_LINES) || \
+                                                          ((type) == SF_CTRL_DATA_4_LINES))
+
+/** @defgroup  SF_CTRL_AES_KEY_TYPE
+ *  @{
+ */
+#define IS_SF_CTRL_AES_KEY_TYPE(type)                    (((type) == SF_CTRL_AES_128BITS) || \
+                                                          ((type) == SF_CTRL_AES_256BITS) || \
+                                                          ((type) == SF_CTRL_AES_192BITS) || \
+                                                          ((type) == SF_CTRL_AES_128BITS_DOUBLE_KEY))
+
+/*@} end of group SF_CTRL_Public_Constants */
+
+/** @defgroup  SF_CTRL_Public_Macros
+ *  @{
+ */
+#define SF_CTRL_NO_ADDRESS                       0xFFFFFFFF
+#define FLASH_CTRL_BUF_SIZE                      256
+
+/*@} end of group SF_CTRL_Public_Macros */
+
+/** @defgroup  SF_CTRL_Public_Functions
+ *  @{
+ */
+#ifndef BFLB_USE_HAL_DRIVER
+void SF_Ctrl_IRQHandler(void);
+#endif
+void SF_Ctrl_Enable(const SF_Ctrl_Cfg_Type *cfg);
+void SF_Ctrl_Psram_Init(SF_Ctrl_Psram_Cfg *psramCfg);
+uint8_t SF_Ctrl_Get_Clock_Delay(void);
+void SF_Ctrl_Set_Clock_Delay(uint8_t delay);
+void SF_Ctrl_Cmds_Set(SF_Ctrl_Cmds_Cfg *cmdsCfg);
+void SF_Ctrl_Select_Pad(SF_Ctrl_Pad_Select sel);
+void SF_Ctrl_Select_Bank(SF_Ctrl_Select sel);
+void SF_Ctrl_Set_Owner(SF_Ctrl_Owner_Type owner);
+void SF_Ctrl_Disable(void);
+void SF_Ctrl_AES_Enable_BE(void);
+void SF_Ctrl_AES_Enable_LE(void);
+void SF_Ctrl_AES_Set_Region(uint8_t region,uint8_t enable, uint8_t hwKey,uint32_t startAddr,
+uint32_t endAddr,
+                            uint8_t locked);
+void SF_Ctrl_AES_Set_Key(uint8_t region,uint8_t *key, SF_Ctrl_AES_Key_Type keyType);
+void SF_Ctrl_AES_Set_Key_BE(uint8_t region,uint8_t *key, SF_Ctrl_AES_Key_Type keyType);
+void SF_Ctrl_AES_Set_IV(uint8_t region,uint8_t *iv,uint32_t addrOffset);
+void SF_Ctrl_AES_Set_IV_BE(uint8_t region,uint8_t *iv,uint32_t addrOffset);
+void SF_Ctrl_AES_Enable(void);
+void SF_Ctrl_AES_Disable(void);
+uint8_t SF_Ctrl_Is_AES_Enable(void);
+void SF_Ctrl_Set_Flash_Image_Offset(uint32_t addrOffset);
+uint32_t SF_Ctrl_Get_Flash_Image_Offset(void);
+void SF_Ctrl_Select_Clock(SF_Ctrl_Sahb_Type sahbType);
+void SF_Ctrl_SendCmd(SF_Ctrl_Cmd_Cfg_Type *cfg);
+void SF_Ctrl_Flash_Read_Icache_Set(SF_Ctrl_Cmd_Cfg_Type *cfg,uint8_t cmdValid);
+void SF_Ctrl_Psram_Write_Icache_Set(SF_Ctrl_Cmd_Cfg_Type *cfg,uint8_t cmdValid);
+void SF_Ctrl_Psram_Read_Icache_Set(SF_Ctrl_Cmd_Cfg_Type *cfg,uint8_t cmdValid);
+BL_Sts_Type SF_Ctrl_GetBusyState(void);
+
+/*@} end of group SF_CTRL_Public_Functions */
+
+/*@} end of group SF_CTRL */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_SF_CTRL_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_sflash.h b/drivers/bl702_driver/std_drv/inc/bl702_sflash.h
new file mode 100644
index 00000000..4afe5556
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_sflash.h
@@ -0,0 +1,196 @@
+/**
+  ******************************************************************************
+  * @file    bl702_sflah.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_SFLAH_H__
+#define __BL702_SFLAH_H__
+
+#include "bl702_common.h"
+#include "bl702_sf_ctrl.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  SFLAH
+ *  @{
+ */
+
+/** @defgroup  SFLAH_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief Serial flash configuration structure type definition
+ */
+typedef struct {
+    uint8_t ioMode;                         /*!< Serail flash interface mode,bit0-3:IF mode,bit4:unwrap */
+    uint8_t cReadSupport;                   /*!< Support continuous read mode,bit0:continuous read mode support,bit1:read mode cfg */
+    uint8_t clkDelay;                       /*!< SPI clock delay,bit0-3:delay,bit4-6:pad delay */
+    uint8_t clkInvert;                      /*!< SPI clock phase invert,bit0:clck invert,bit1:rx invert,bit2-4:pad delay,bit5-7:pad delay */
+    uint8_t resetEnCmd;                     /*!< Flash enable reset command */
+    uint8_t resetCmd;                       /*!< Flash reset command */
+    uint8_t resetCreadCmd;                  /*!< Flash reset continuous read command */
+    uint8_t resetCreadCmdSize;              /*!< Flash reset continuous read command size */
+    uint8_t jedecIdCmd;                     /*!< JEDEC ID command */
+    uint8_t jedecIdCmdDmyClk;               /*!< JEDEC ID command dummy clock */
+    uint8_t qpiJedecIdCmd;                  /*!< QPI JEDEC ID comamnd */
+    uint8_t qpiJedecIdCmdDmyClk;            /*!< QPI JEDEC ID command dummy clock */
+    uint8_t sectorSize;                     /*!< *1024bytes */
+    uint8_t mid;                            /*!< Manufacturer ID */
+    uint16_t pageSize;                      /*!< Page size */
+    uint8_t chipEraseCmd;                   /*!< Chip erase cmd */
+    uint8_t sectorEraseCmd;                 /*!< Sector erase command */
+    uint8_t blk32EraseCmd;                  /*!< Block 32K erase command,some Micron not support */
+    uint8_t blk64EraseCmd;                  /*!< Block 64K erase command */
+    uint8_t writeEnableCmd;                 /*!< Need before every erase or program */
+    uint8_t pageProgramCmd;                 /*!< Page program cmd */
+    uint8_t qpageProgramCmd;                /*!< QIO page program cmd */
+    uint8_t qppAddrMode;                    /*!< QIO page program address mode */
+    uint8_t fastReadCmd;                    /*!< Fast read command */
+    uint8_t frDmyClk;                       /*!< Fast read command dummy clock */
+    uint8_t qpiFastReadCmd;                 /*!< QPI fast read command */
+    uint8_t qpiFrDmyClk;                    /*!< QPI fast read command dummy clock */
+    uint8_t fastReadDoCmd;                  /*!< Fast read dual output command */
+    uint8_t frDoDmyClk;                     /*!< Fast read dual output command dummy clock */
+    uint8_t fastReadDioCmd;                 /*!< Fast read dual io comamnd */
+    uint8_t frDioDmyClk;                    /*!< Fast read dual io command dummy clock */
+    uint8_t fastReadQoCmd;                  /*!< Fast read quad output comamnd */
+    uint8_t frQoDmyClk;                     /*!< Fast read quad output comamnd dummy clock */
+    uint8_t fastReadQioCmd;                 /*!< Fast read quad io comamnd */
+    uint8_t frQioDmyClk;                    /*!< Fast read quad io comamnd dummy clock */
+    uint8_t qpiFastReadQioCmd;              /*!< QPI fast read quad io comamnd */
+    uint8_t qpiFrQioDmyClk;                 /*!< QPI fast read QIO dummy clock */
+    uint8_t qpiPageProgramCmd;              /*!< QPI program command */
+    uint8_t writeVregEnableCmd;             /*!< Enable write reg */
+    uint8_t wrEnableIndex;                  /*!< Write enable register index */
+    uint8_t qeIndex;                        /*!< Quad mode enable register index */
+    uint8_t busyIndex;                      /*!< Busy status register index */
+    uint8_t wrEnableBit;                    /*!< Write enable bit pos */
+    uint8_t qeBit;                          /*!< Quad enable bit pos */
+    uint8_t busyBit;                        /*!< Busy status bit pos */
+    uint8_t wrEnableWriteRegLen;            /*!< Register length of write enable */
+    uint8_t wrEnableReadRegLen;             /*!< Register length of write enable status */
+    uint8_t qeWriteRegLen;                  /*!< Register length of contain quad enable */
+    uint8_t qeReadRegLen;                   /*!< Register length of contain quad enable status */
+    uint8_t releasePowerDown;               /*!< Release power down command */
+    uint8_t busyReadRegLen;                 /*!< Register length of contain busy status */
+    uint8_t readRegCmd[4];                  /*!< Read register command buffer */
+    uint8_t writeRegCmd[4];                 /*!< Write register command buffer */
+    uint8_t enterQpi;                       /*!< Enter qpi command */
+    uint8_t exitQpi;                        /*!< Exit qpi command */
+    uint8_t cReadMode;                      /*!< Config data for continuous read mode */
+    uint8_t cRExit;                         /*!< Config data for exit continuous read mode */
+    uint8_t burstWrapCmd;                   /*!< Enable burst wrap command */
+    uint8_t burstWrapCmdDmyClk;             /*!< Enable burst wrap command dummy clock */
+    uint8_t burstWrapDataMode;              /*!< Data and address mode for this command */
+    uint8_t burstWrapData;                  /*!< Data to enable burst wrap */
+    uint8_t deBurstWrapCmd;                 /*!< Disable burst wrap command */
+    uint8_t deBurstWrapCmdDmyClk;           /*!< Disable burst wrap command dummy clock */
+    uint8_t deBurstWrapDataMode;            /*!< Data and address mode for this command */
+    uint8_t deBurstWrapData;                /*!< Data to disable burst wrap */
+    uint16_t timeEsector;                   /*!< 4K erase time */
+    uint16_t timeE32k;                      /*!< 32K erase time */
+    uint16_t timeE64k;                      /*!< 64K erase time */
+    uint16_t timePagePgm;                   /*!< Page program time */
+    uint16_t timeCe;                        /*!< Chip erase time in ms */
+    uint8_t pdDelay;                        /*!< Release power down command delay time for wake up */
+    uint8_t qeData;                         /*!< QE set data */
+}__attribute__ ((packed)) SPI_Flash_Cfg_Type;
+
+/*@} end of group SFLAH_Public_Types */
+
+/** @defgroup  SFLAH_Public_Constants
+ *  @{
+ */
+
+/*@} end of group SFLAH_Public_Constants */
+
+/** @defgroup  SFLAH_Public_Macros
+ *  @{
+ */
+#define BFLB_SPIFLASH_BLK32K_SIZE       (32*1024)
+#define BFLB_SPIFLASH_BLK64K_SIZE       (64*1024)
+#define BFLB_SPIFLASH_CMD_INVALID       0xff
+
+/*@} end of group SFLAH_Public_Macros */
+
+/** @defgroup  SFLAH_Public_Functions
+ *  @{
+ */
+void SFlash_Init(const SF_Ctrl_Cfg_Type *sfCtrlCfg);
+BL_Err_Type SFlash_SetSPIMode(SF_Ctrl_Mode_Type mode);
+BL_Err_Type SFlash_Read_Reg(SPI_Flash_Cfg_Type *flashCfg,uint8_t regIndex,uint8_t *regValue,uint8_t regLen);
+BL_Err_Type SFlash_Write_Reg(SPI_Flash_Cfg_Type *flashCfg,uint8_t regIndex,uint8_t *regValue,uint8_t regLen);
+BL_Err_Type SFlash_Read_Reg_With_Cmd(SPI_Flash_Cfg_Type *flashCfg,uint8_t readRegCmd,uint8_t *regValue,
+                                     uint8_t regLen);
+BL_Err_Type SFlash_Write_Reg_With_Cmd(SPI_Flash_Cfg_Type *flashCfg,uint8_t writeRegCmd,uint8_t *regValue,
+                                      uint8_t regLen);
+BL_Sts_Type SFlash_Busy(SPI_Flash_Cfg_Type *flashCfg);
+BL_Err_Type SFlash_Write_Enable(SPI_Flash_Cfg_Type *flashCfg);
+BL_Err_Type SFlash_Qspi_Enable(SPI_Flash_Cfg_Type *flashCfg);
+void SFlash_Volatile_Reg_Write_Enable(SPI_Flash_Cfg_Type *flashCfg);
+BL_Err_Type SFlash_Chip_Erase(SPI_Flash_Cfg_Type *flashCfg);
+BL_Err_Type SFlash_Sector_Erase(SPI_Flash_Cfg_Type *flashCfg,uint32_t secNum);
+BL_Err_Type SFlash_Blk32_Erase(SPI_Flash_Cfg_Type *flashCfg,uint32_t blkNum);
+BL_Err_Type SFlash_Blk64_Erase(SPI_Flash_Cfg_Type *flashCfg,uint32_t blkNum);
+BL_Err_Type SFlash_Erase(SPI_Flash_Cfg_Type *flashCfg,uint32_t startaddr,uint32_t endaddr);
+BL_Err_Type SFlash_Program(SPI_Flash_Cfg_Type *flashCfg,SF_Ctrl_IO_Type ioMode,uint32_t addr,uint8_t *data, uint32_t len);
+void SFlash_GetUniqueId(uint8_t *data,uint8_t idLen);
+void SFlash_GetJedecId(SPI_Flash_Cfg_Type *flashCfg,uint8_t *data);
+void SFlash_GetDeviceId(uint8_t *data);
+void SFlash_Powerdown(void);
+void SFlash_Releae_Powerdown(SPI_Flash_Cfg_Type *flashCfg);
+BL_Err_Type SFlash_Restore_From_Powerdown(SPI_Flash_Cfg_Type *pFlashCfg,uint8_t flashContRead);
+void SFlash_SetBurstWrap(SPI_Flash_Cfg_Type *flashCfg);
+void SFlash_DisableBurstWrap(SPI_Flash_Cfg_Type *flashCfg);
+BL_Err_Type SFlash_Software_Reset(SPI_Flash_Cfg_Type *flashCfg);
+void SFlash_Reset_Continue_Read(SPI_Flash_Cfg_Type *flashCfg);
+BL_Err_Type SFlash_Set_IDbus_Cfg(SPI_Flash_Cfg_Type *flashCfg,SF_Ctrl_IO_Type ioMode,uint8_t contRead,uint32_t addr,
+                                 uint32_t len);
+BL_Err_Type SFlash_IDbus_Read_Enable(SPI_Flash_Cfg_Type *flashCfg,SF_Ctrl_IO_Type ioMode,uint8_t contRead);
+BL_Err_Type SFlash_Cache_Read_Enable(SPI_Flash_Cfg_Type *flashCfg,SF_Ctrl_IO_Type ioMode,uint8_t contRead,
+                                     uint8_t wayDisable);
+void SFlash_Cache_Read_Disable(void);
+BL_Err_Type SFlash_Restore_From_Powerdown(SPI_Flash_Cfg_Type *pFlashCfg,uint8_t flashContRead);
+BL_Err_Type SFlash_Read(SPI_Flash_Cfg_Type *flashCfg,SF_Ctrl_IO_Type ioMode,uint8_t contRead,uint32_t addr,uint8_t *data,
+                        uint32_t len);
+
+/*@} end of group SFLAH_Public_Functions */
+
+/*@} end of group SFLAH */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_SFLAH_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_sflash_ext.h b/drivers/bl702_driver/std_drv/inc/bl702_sflash_ext.h
new file mode 100644
index 00000000..5ebc59d9
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_sflash_ext.h
@@ -0,0 +1,82 @@
+/**
+  ******************************************************************************
+  * @file    bl702_sflah_ext.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_SFLAH_EXT_H__
+#define __BL702_SFLAH_EXT_H__
+
+#include "bl702_sflash.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  SFLAH_EXT
+ *  @{
+ */
+
+/** @defgroup  SFLAH_EXT_Public_Types
+ *  @{
+ */
+
+/*@} end of group SFLAH_EXT_Public_Types */
+
+/** @defgroup  SFLAH_EXT_Public_Constants
+ *  @{
+ */
+
+/*@} end of group SFLAH_EXT_Public_Constants */
+
+/** @defgroup  SFLAH_EXT_Public_Macros
+ *  @{
+ */
+
+/*@} end of group SFLAH_EXT_Public_Macros */
+
+/** @defgroup  SFLAH_EXT_Public_Functions
+ *  @{
+ */
+BL_Err_Type SFlash_Read_Reg_With_Cmd(SPI_Flash_Cfg_Type *flashCfg,uint8_t readRegCmd,uint8_t *regValue,
+                                     uint8_t regLen);
+BL_Err_Type SFlash_Write_Reg_With_Cmd(SPI_Flash_Cfg_Type *flashCfg,uint8_t writeRegCmd,uint8_t *regValue,
+                                      uint8_t regLen);
+
+/*@} end of group SFLAH_EXT_Public_Functions */
+
+/*@} end of group SFLAH_EXT */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_SFLAH_EXT_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_snflash.h b/drivers/bl702_driver/std_drv/inc/bl702_snflash.h
new file mode 100644
index 00000000..1976298b
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_snflash.h
@@ -0,0 +1,184 @@
+/**
+  ******************************************************************************
+  * @file    bl702_snflash.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef NANDFLASH_XT26G01A_H
+#define NANDFLASH_XT26G01A_H
+
+#include "bl702_aon.h"
+#include "bl702_common.h"
+#include "bl702_glb.h"
+#include "bl702_hbn.h"
+#include "bl702_spi.h"
+#include "bl702_gpio.h"
+
+#include "ffconf.h"
+#include "ff.h"
+#include "diskio.h"
+
+#define FLASH_WRITE_READ_SIZE					(2560)
+#define READ_PRINT_OPEN							(0)
+
+#define SPI_PIN_CLK                             GLB_GPIO_PIN_11
+#define SPI_PIN_MOSI                            GLB_GPIO_PIN_12
+#define SPI_PIN_MISO                            GLB_GPIO_PIN_21
+#define SPI_PIN_CS                              GLB_GPIO_PIN_10
+
+#define NANDFLASH_WRITE_ENABLE                  (0x06)
+#define NANDFLASH_WRITE_DISABLE                 (0x04)
+#define NANDFLASH_GET_FEATURES                  (0x0F)
+#define NANDFLASH_SET_FEATURES                  (0x1F)
+#define NANDFLASH_PAGE_READ_TO_CACHE            (0x13)
+#define NANDFLASH_READ_FROM_CACHE               (0x03)
+#define NANDFLASH_READ_ID                       (0x9F)
+#define NANDFLASH_PROGRAM_LOAD                  (0x02)
+#define NANDFLASH_PROGRAM_LOAD_RANDOM_DATA      (0x84)
+#define NANDFLASH_PROGRAM_EXECUTE               (0x10)
+#define NANDFLASH_BLOCK_ERASE                   (0xD8)
+#define NANDFLASH_RESET                         (0xFF)
+
+#define NANDFLASH_BLOCK_LOCK_ADDR               (0xA0)
+#define NANDFLASH_FEATURE_ADDR                  (0xB0)
+#define NANDFLASH_STATUS_ADDR                   (0xC0)
+#define NANDFLASH_DUMMY_BYTE                    (0x00)
+#define NANDFLASH_PAGE_SIZE                     (2048)
+#define NANDFLASH_PAGE_TOTAL_SIZE               (2048 + 64)
+#define NANDFLASH_BLOCK_SIZE                    (128 * 1024)
+#define NANDFLASH_PAGES_PER_BLOCK               (64)
+
+typedef struct {
+    SPI_ID_Type spiNo;
+    SPI_CFG_Type spiCfg;
+    SPI_ClockCfg_Type clockCfg;
+}NANDFLASH_CFG_Type;
+
+extern NANDFLASH_CFG_Type nfCfg;
+
+typedef struct {
+    uint8_t Reserved0       :  1;
+    uint8_t CMP             :  1;
+    uint8_t INV             :  1;
+    uint8_t BP0             :  1;
+    uint8_t BP1             :  1;
+    uint8_t BP2             :  1;
+    uint8_t Reserved6       :  1;
+    uint8_t BRWD            :  1;
+}NANDFLASH_BLOCK_LOCK_Type;
+
+typedef struct {
+    uint8_t QE              :  1;
+    uint8_t Reserved1       :  1;
+    uint8_t Reserved2       :  1;
+    uint8_t Reserved3       :  1;
+    uint8_t ECC_EN          :  1;
+    uint8_t Reserved5       :  1;
+    uint8_t OTP_EN          :  1;
+    uint8_t OTP_PRT         :  1;
+}NANDFLASH_FEATURE_Type;
+
+typedef struct {
+    uint8_t OIP             :  1;
+    uint8_t WEL             :  1;
+    uint8_t EFAIL_ECCS0     :  1;
+    uint8_t PFAIL_ECCS1     :  1;
+    uint8_t ECCS2           :  1;
+    uint8_t ECCS3           :  1;
+    uint8_t Reserved6       :  1;
+    uint8_t Reserved7       :  1;
+}NANDFLASH_STATUS_Type;
+
+
+typedef enum
+{
+  NO_BIT_ERROR                               = 0,
+  ONE_BIT_ERROR_DETECTED_AND_CORRECTED       = 1,
+  TWO_BIT_ERROR_DETECTED_AND_CORRECTED       = 2,
+  THREE_BIT_ERROR_DETECTED_AND_CORRECTED     = 3,
+  FOUR_BIT_ERROR_DETECTED_AND_CORRECTED      = 4,
+  FIVE_BIT_ERROR_DETECTED_AND_CORRECTED      = 5,
+  SIX_BIT_ERROR_DETECTED_AND_CORRECTED       = 6,
+  SEVEN_BIT_ERROR_DETECTED_AND_CORRECTED     = 7,
+  BIT_ERROR_DETECTED_AND_NOT_CORRECTED       = 8,
+  EIGHT_BIT_ERROR_DETECTED_AND_CORRECTED_MAX = 9
+}NANDFLASH_ECC_Type;
+
+void ATTR_TCM_SECTION Nandflash_Psram_Cfg(void);
+void Nandflash_Init(void);
+
+void Nandflash_Gpio_Init(GLB_GPIO_Type clk, GLB_GPIO_Type mosi, GLB_GPIO_Type miso);
+void Nandflash_CS_High(void);
+void Nandflash_CS_Low(void);
+void Nandflash_Clock_Init(uint8_t enable, uint8_t div);
+void Nandflash_SPI_Init(NANDFLASH_CFG_Type *pNandflashCfg);
+
+void Nandflash_WriteEnable(NANDFLASH_CFG_Type *pNandflashCfg);
+void Nandflash_WriteDisable(NANDFLASH_CFG_Type *pNandflashCfg);
+void Nandflash_Get_BlockLock(NANDFLASH_CFG_Type *pNandflashCfg, uint8_t *pBlockLock);
+void Nandflash_Set_BlockLock(NANDFLASH_CFG_Type *pNandflashCfg, uint8_t *pBlockLock);
+void Nandflash_Get_Feature(NANDFLASH_CFG_Type *pNandflashCfg, uint8_t *pFeature);
+void Nandflash_Set_Feature(NANDFLASH_CFG_Type *pNandflashCfg, uint8_t *pFeature);
+void Nandflash_Get_Status(NANDFLASH_CFG_Type *pNandflashCfg, uint8_t *pStatus);
+void Nandflash_Set_Status(NANDFLASH_CFG_Type *pNandflashCfg, uint8_t *pStatus);
+
+NANDFLASH_ECC_Type Nandflash_CheckBadBlock(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t blockNum, uint8_t *buff, uint32_t len);
+
+NANDFLASH_ECC_Type Nandflash_PagesRead(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t addr, uint8_t *buff, uint32_t len);
+NANDFLASH_ECC_Type Nandflash_PageRead(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t addr, uint8_t *buff, uint32_t len);
+NANDFLASH_ECC_Type Nandflash_PageReadToCache(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t addr);
+void Nandflash_ReadFromCache(NANDFLASH_CFG_Type *pNandflashCfg, uint16_t offset, uint8_t *buff, uint32_t len);
+
+void Nandflash_ReadID(NANDFLASH_CFG_Type *pNandflashCfg, uint8_t *pManufactureID, uint8_t *pDeviceID);
+void Nandflash_PagesProgram(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t addr, const uint8_t *buff, uint32_t len);
+void Nandflash_PageProgram(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t addr, const uint8_t *buff, uint32_t len);
+void Nandflash_ProgramLoad(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t pageOffset, const uint8_t *buff, uint32_t len);
+void Nandflash_ProgramExecute(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t addr);
+void Nandflash_InternalDataMove(NANDFLASH_CFG_Type *pNandflashCfg);
+void Nandflash_ProgramLoadRandomData(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t addr, uint8_t *buff, uint32_t len);
+void Nandflash_BlockErase(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t addr);
+void Nandflash_Reset(NANDFLASH_CFG_Type *pNandflashCfg);
+
+void Nandflash_WriteUnprotect(NANDFLASH_CFG_Type *pNandflashCfg);
+NANDFLASH_ECC_Type Nandflash_Check_ECC_Status(NANDFLASH_CFG_Type *pNandflashCfg);
+
+int Nandflash_Disk_Status(void);
+int Nandflash_Disk_Initialize(void);
+int Nandflash_Disk_Read(BYTE *buff, LBA_t sector, UINT count);
+int Nandflash_Disk_Write(const BYTE *buff, LBA_t sector, UINT count);
+int Nandflash_Disk_Ioctl(BYTE cmd, void *buff);
+DSTATUS Nandflash_Translate_Result_Code(int result);
+
+#endif
+
+
+
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_spi.h b/drivers/bl702_driver/std_drv/inc/bl702_spi.h
new file mode 100644
index 00000000..f06d1680
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_spi.h
@@ -0,0 +1,314 @@
+/**
+  ******************************************************************************
+  * @file    bl702_spi.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_SPI_H__
+#define __BL702_SPI_H__
+
+#include "spi_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  SPI
+ *  @{
+ */
+
+/** @defgroup  SPI_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief SPI No. type definition
+ */
+typedef enum {
+    SPI_ID_0,                                /*!< SPI0 port define */
+    SPI_ID_MAX,                              /*!< SPI MAX ID define */
+}SPI_ID_Type;
+
+/**
+ *  @brief SPI byte inverse type definition
+ */
+typedef enum {
+    SPI_BYTE_INVERSE_BYTE0_FIRST,            /*!< SPI byte 0 is sent out first */
+    SPI_BYTE_INVERSE_BYTE3_FIRST,            /*!< SPI byte 3 is sent out first */
+}SPI_BYTE_INVERSE_Type;
+
+/**
+ *  @brief SPI bit inverse type definition
+ */
+typedef enum {
+    SPI_BIT_INVERSE_MSB_FIRST,               /*!< SPI each byte is sent out MSB first */
+    SPI_BIT_INVERSE_LSB_FIRST,               /*!< SPI each byte is sent out LSB first */
+}SPI_BIT_INVERSE_Type;
+
+/**
+ *  @brief SPI clock phase inverse type definition
+ */
+typedef enum {
+    SPI_CLK_PHASE_INVERSE_0,                 /*!< SPI clock phase inverse 0 */
+    SPI_CLK_PHASE_INVERSE_1,                 /*!< SPI clock phase inverse 1 */
+}SPI_CLK_PHASE_INVERSE_Type;
+
+/**
+ *  @brief SPI clock polarity type definition
+ */
+typedef enum {
+    SPI_CLK_POLARITY_LOW,                    /*!< SPI clock output low at IDLE state */
+    SPI_CLK_POLARITY_HIGH,                   /*!< SPI clock output high at IDLE state */
+}SPI_CLK_POLARITY_Type;
+
+/**
+ *  @brief SPI frame size(also the valid width for each fifo entry) type definition
+ */
+typedef enum {
+    SPI_FRAME_SIZE_8,                        /*!< SPI frame size 8 bit */
+    SPI_FRAME_SIZE_16,                       /*!< SPI frame size 16 bit */
+    SPI_FRAME_SIZE_24,                       /*!< SPI frame size 24 bit */
+    SPI_FRAME_SIZE_32,                       /*!< SPI frame size 32 bit */
+}SPI_FrameSize_Type;
+
+/**
+ *  @brief SPI work mode select type definition
+ */
+typedef enum {
+    SPI_WORK_MODE_SLAVE,                     /*!< SPI work at slave mode */
+    SPI_WORK_MODE_MASTER,                    /*!< SPI work at master mode */
+}SPI_WORK_MODE_Type;
+
+/**
+ *  @brief SPI enable or disable timeout judgment definition
+ */
+typedef enum {
+    SPI_TIMEOUT_DISABLE,                     /*!< SPI disable timeout judgment */
+    SPI_TIMEOUT_ENABLE,                      /*!< SPI enable timeout judgment */
+}SPI_Timeout_Type;
+
+/**
+ *  @brief SPI fifo overflow/underflow flag type definition
+ */
+typedef enum {
+    SPI_FIFO_TX_OVERFLOW,                    /*!< SPI tx fifo overflow flag */
+    SPI_FIFO_TX_UNDERFLOW,                   /*!< SPI tx fifo underflow flag */
+    SPI_FIFO_RX_OVERFLOW,                    /*!< SPI rx fifo overflow flag */
+    SPI_FIFO_RX_UNDERFLOW,                   /*!< SPI rx fifo underflow flag */
+}SPI_FifoStatus_Type;
+
+/**
+ *  @brief SPI interrupt type definition
+ */
+typedef enum {
+    SPI_INT_END,                             /*!< SPI transfer end interrupt,shared by both master and slave mode */
+    SPI_INT_TX_FIFO_REQ,                     /*!< SPI tx fifo ready interrupt(tx fifo count > tx fifo threshold) */
+    SPI_INT_RX_FIFO_REQ,                     /*!< SPI rx fifo ready interrupt(rx fifo count > rx fifo threshold) */
+    SPI_INT_SLAVE_TIMEOUT,                   /*!< SPI slave mode transfer time-out interrupt,triggered when spi bus is idle for the given value */
+    SPI_INT_SLAVE_UNDERRUN,                  /*!< SPI slave mode tx underrun error interrupt,triggered when tx is not ready during transfer */
+    SPI_INT_FIFO_ERROR,                      /*!< SPI tx/rx fifo error interrupt(overflow/underflow) */
+    SPI_INT_ALL,                             /*!< All the interrupt */
+}SPI_INT_Type;
+
+/**
+ *  @brief SPI configuration type definition
+ */
+typedef struct {
+    BL_Fun_Type deglitchEnable;              /*!< Enable or disable de-glitch function */
+    BL_Fun_Type continuousEnable;            /*!< Enable or disable master continuous transfer mode,enable:SS will stay asserted if next data is valid */
+    SPI_BYTE_INVERSE_Type byteSequence;      /*!< The byte is sent first in SPI transfer */
+    SPI_BIT_INVERSE_Type bitSequence;        /*!< The bit is sent first in SPI transfer */
+    SPI_CLK_PHASE_INVERSE_Type clkPhaseInv;  /*!< Inverse SPI clock phase */
+    SPI_CLK_POLARITY_Type clkPolarity;       /*!< SPI clock plarity */
+    SPI_FrameSize_Type frameSize;            /*!< SPI frame size(also the valid width for each fifo entry) */
+}SPI_CFG_Type;
+
+/**
+ *  @brief SPI configuration type definition
+ */
+typedef struct {
+    uint8_t startLen;                        /*!< Length of start condition */
+    uint8_t stopLen;                         /*!< Length of stop condition */
+    uint8_t dataPhase0Len;                   /*!< Length of data phase 0,affecting clock */
+    uint8_t dataPhase1Len;                   /*!< Length of data phase 1,affecting clock */
+    uint8_t intervalLen;                     /*!< Length of interval between frame */
+}SPI_ClockCfg_Type;
+
+/**
+ *  @brief SPI DMA configuration type definition
+ */
+typedef struct {
+    uint8_t txFifoThreshold;                 /*!< SPI tx FIFO threshold */
+    uint8_t rxFifoThreshold;                 /*!< SPI rx FIFO threshold */
+    BL_Fun_Type txFifoDmaEnable;             /*!< Enable or disable tx dma req/ack interface */
+    BL_Fun_Type rxFifoDmaEnable;             /*!< Enable or disable rx dma req/ack interface */
+}SPI_FifoCfg_Type;
+
+/*@} end of group SPI_Public_Types */
+
+/** @defgroup  SPI_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  SPI_ID_TYPE
+ *  @{
+ */
+#define IS_SPI_ID_TYPE(type)                             (((type) == SPI_ID_0) || \
+                                                          ((type) == SPI_ID_MAX))
+
+/** @defgroup  SPI_BYTE_INVERSE_TYPE
+ *  @{
+ */
+#define IS_SPI_BYTE_INVERSE_TYPE(type)                   (((type) == SPI_BYTE_INVERSE_BYTE0_FIRST) || \
+                                                          ((type) == SPI_BYTE_INVERSE_BYTE3_FIRST))
+
+/** @defgroup  SPI_BIT_INVERSE_TYPE
+ *  @{
+ */
+#define IS_SPI_BIT_INVERSE_TYPE(type)                    (((type) == SPI_BIT_INVERSE_MSB_FIRST) || \
+                                                          ((type) == SPI_BIT_INVERSE_LSB_FIRST))
+
+/** @defgroup  SPI_CLK_PHASE_INVERSE_TYPE
+ *  @{
+ */
+#define IS_SPI_CLK_PHASE_INVERSE_TYPE(type)              (((type) == SPI_CLK_PHASE_INVERSE_0) || \
+                                                          ((type) == SPI_CLK_PHASE_INVERSE_1))
+
+/** @defgroup  SPI_CLK_POLARITY_TYPE
+ *  @{
+ */
+#define IS_SPI_CLK_POLARITY_TYPE(type)                   (((type) == SPI_CLK_POLARITY_LOW) || \
+                                                          ((type) == SPI_CLK_POLARITY_HIGH))
+
+/** @defgroup  SPI_FRAMESIZE_TYPE
+ *  @{
+ */
+#define IS_SPI_FRAMESIZE_TYPE(type)                      (((type) == SPI_FRAME_SIZE_8) || \
+                                                          ((type) == SPI_FRAME_SIZE_16) || \
+                                                          ((type) == SPI_FRAME_SIZE_24) || \
+                                                          ((type) == SPI_FRAME_SIZE_32))
+
+/** @defgroup  SPI_WORK_MODE_TYPE
+ *  @{
+ */
+#define IS_SPI_WORK_MODE_TYPE(type)                      (((type) == SPI_WORK_MODE_SLAVE) || \
+                                                          ((type) == SPI_WORK_MODE_MASTER))
+
+/** @defgroup  SPI_TIMEOUT_TYPE
+ *  @{
+ */
+#define IS_SPI_TIMEOUT_TYPE(type)                        (((type) == SPI_TIMEOUT_DISABLE) || \
+                                                          ((type) == SPI_TIMEOUT_ENABLE))
+
+/** @defgroup  SPI_FIFOSTATUS_TYPE
+ *  @{
+ */
+#define IS_SPI_FIFOSTATUS_TYPE(type)                     (((type) == SPI_FIFO_TX_OVERFLOW) || \
+                                                          ((type) == SPI_FIFO_TX_UNDERFLOW) || \
+                                                          ((type) == SPI_FIFO_RX_OVERFLOW) || \
+                                                          ((type) == SPI_FIFO_RX_UNDERFLOW))
+
+/** @defgroup  SPI_INT_TYPE
+ *  @{
+ */
+#define IS_SPI_INT_TYPE(type)                            (((type) == SPI_INT_END) || \
+                                                          ((type) == SPI_INT_TX_FIFO_REQ) || \
+                                                          ((type) == SPI_INT_RX_FIFO_REQ) || \
+                                                          ((type) == SPI_INT_SLAVE_TIMEOUT) || \
+                                                          ((type) == SPI_INT_SLAVE_UNDERRUN) || \
+                                                          ((type) == SPI_INT_FIFO_ERROR) || \
+                                                          ((type) == SPI_INT_ALL))
+
+/*@} end of group SPI_Public_Constants */
+
+/** @defgroup  SPI_Public_Macros
+ *  @{
+ */
+#define SPI_RX_FIFO_SIZE                                4
+#define SPI_TX_FIFO_SIZE                                4
+
+/*@} end of group SPI_Public_Macros */
+
+/** @defgroup  SPI_Public_Functions
+ *  @{
+ */
+#ifndef BFLB_USE_HAL_DRIVER
+void SPI_IRQHandler(void);
+#endif
+BL_Err_Type SPI_Init(SPI_ID_Type spiNo,SPI_CFG_Type *spiCfg);
+BL_Err_Type SPI_DeInit(SPI_ID_Type spiNo);
+BL_Err_Type SPI_SetClock(SPI_ID_Type spiNo,uint32_t clk);
+BL_Err_Type SPI_ClockConfig(SPI_ID_Type spiNo,SPI_ClockCfg_Type *clockCfg);
+BL_Err_Type SPI_FifoConfig(SPI_ID_Type spiNo,SPI_FifoCfg_Type *fifoCfg);
+BL_Err_Type SPI_Enable(SPI_ID_Type spiNo,SPI_WORK_MODE_Type modeType);
+BL_Err_Type SPI_Disable(SPI_ID_Type spiNo,SPI_WORK_MODE_Type modeType);
+BL_Err_Type SPI_SetTimeOutValue(SPI_ID_Type spiNo,uint16_t value);
+BL_Err_Type SPI_SetDeglitchCount(SPI_ID_Type spiNo,uint8_t cnt);
+BL_Err_Type SPI_RxIgnoreEnable(SPI_ID_Type spiNo,uint8_t startPoint,uint8_t stopPoint);
+BL_Err_Type SPI_RxIgnoreDisable(SPI_ID_Type spiNo);
+BL_Err_Type SPI_ClrTxFifo(SPI_ID_Type spiNo);
+BL_Err_Type SPI_ClrRxFifo(SPI_ID_Type spiNo);
+BL_Err_Type SPI_ClrIntStatus(SPI_ID_Type spiNo,SPI_INT_Type intType);
+BL_Err_Type SPI_IntMask(SPI_ID_Type spiNo,SPI_INT_Type intType,BL_Mask_Type intMask);
+BL_Err_Type SPI_Int_Callback_Install(SPI_ID_Type spiNo,SPI_INT_Type intType,intCallback_Type *cbFun);
+BL_Err_Type SPI_SendData(SPI_ID_Type spiNo,uint32_t data);
+BL_Err_Type SPI_Send_8bits(SPI_ID_Type spiNo,uint8_t *buff,uint32_t length,SPI_Timeout_Type timeoutType);
+BL_Err_Type SPI_Send_16bits(SPI_ID_Type spiNo,uint16_t *buff,uint32_t length,SPI_Timeout_Type timeoutType);
+BL_Err_Type SPI_Send_24bits(SPI_ID_Type spiNo,uint32_t *buff,uint32_t length,SPI_Timeout_Type timeoutType);
+BL_Err_Type SPI_Send_32bits(SPI_ID_Type spiNo,uint32_t *buff,uint32_t length,SPI_Timeout_Type timeoutType);
+BL_Err_Type SPI_Recv_8bits(SPI_ID_Type spiNo,uint8_t *buff,uint32_t length,SPI_Timeout_Type timeoutType);
+BL_Err_Type SPI_Recv_16bits(SPI_ID_Type spiNo,uint16_t *buff,uint32_t length,SPI_Timeout_Type timeoutType);
+BL_Err_Type SPI_Recv_24bits(SPI_ID_Type spiNo,uint32_t *buff,uint32_t length,SPI_Timeout_Type timeoutType);
+BL_Err_Type SPI_Recv_32bits(SPI_ID_Type spiNo,uint32_t *buff,uint32_t length,SPI_Timeout_Type timeoutType);
+BL_Err_Type SPI_SendRecv_8bits(SPI_ID_Type spiNo,uint8_t *sendBuff,uint8_t *recvBuff,uint32_t length,
+                               SPI_Timeout_Type timeoutType);
+BL_Err_Type SPI_SendRecv_16bits(SPI_ID_Type spiNo,uint16_t *sendBuff,uint16_t *recvBuff,uint32_t length,
+                                SPI_Timeout_Type timeoutType);
+BL_Err_Type SPI_SendRecv_24bits(SPI_ID_Type spiNo,uint32_t *sendBuff,uint32_t *recvBuff,uint32_t length,
+                                SPI_Timeout_Type timeoutType);
+BL_Err_Type SPI_SendRecv_32bits(SPI_ID_Type spiNo,uint32_t *sendBuff,uint32_t *recvBuff,uint32_t length,
+                                SPI_Timeout_Type timeoutType);
+uint32_t SPI_ReceiveData(SPI_ID_Type spiNo);
+uint8_t SPI_GetTxFifoCount(SPI_ID_Type spiNo);
+uint8_t SPI_GetRxFifoCount(SPI_ID_Type spiNo);
+BL_Sts_Type SPI_GetIntStatus(SPI_ID_Type spiNo,SPI_INT_Type intType);
+BL_Sts_Type SPI_GetFifoStatus(SPI_ID_Type spiNo,SPI_FifoStatus_Type fifoSts);
+BL_Sts_Type SPI_GetBusyStatus(SPI_ID_Type spiNo);
+
+/*@} end of group SPI_Public_Functions */
+
+/*@} end of group SPI */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_SPI_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_timer.h b/drivers/bl702_driver/std_drv/inc/bl702_timer.h
new file mode 100644
index 00000000..4bd0e9e1
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_timer.h
@@ -0,0 +1,243 @@
+/**
+  ******************************************************************************
+  * @file    bl702_timer.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_TIMER_H__
+#define __BL702_TIMER_H__
+
+#include "timer_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  TIMER
+ *  @{
+ */
+
+/** @defgroup  TIMER_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief TIMER channel type definition
+ */
+typedef enum {
+    TIMER_CH0,                               /*!< TIMER channel 0 port define */
+    TIMER_CH1,                               /*!< TIMER channel 1 port define */
+    TIMER_CH_MAX,                            /*!<  */
+}TIMER_Chan_Type;
+
+/**
+ *  @brief TIMER clock source type definition
+ */
+typedef enum {
+    TIMER_CLKSRC_FCLK,                       /*!< TIMER clock source :System CLK */
+    TIMER_CLKSRC_32K,                        /*!< TIMER clock source :32K CLK */
+    TIMER_CLKSRC_1K,                         /*!< TIMER clock source :1K CLK,Only for Timer not for Watchdog */
+    TIMER_CLKSRC_XTAL,                       /*!< TIMER clock source :XTAL CLK */
+}TIMER_ClkSrc_Type;
+
+/**
+ *  @brief TIMER match compare ID type definition
+ */
+typedef enum {
+    TIMER_COMP_ID_0,                         /*!< TIMER match compare ID 0 define */
+    TIMER_COMP_ID_1,                         /*!< TIMER match compare ID 1 define */
+    TIMER_COMP_ID_2,                         /*!< TIMER match compare ID 2 define */
+}TIMER_Comp_ID_Type;
+
+/**
+ *  @brief TIMER preload source type definition
+ */
+typedef enum {
+    TIMER_PRELOAD_TRIG_NONE,                 /*!< TIMER no preload source, just free run */
+    TIMER_PRELOAD_TRIG_COMP0,                /*!< TIMER count register preload triggered by comparator 0 */
+    TIMER_PRELOAD_TRIG_COMP1,                /*!< TIMER count register preload triggered by comparator 1 */
+    TIMER_PRELOAD_TRIG_COMP2,                /*!< TIMER count register preload triggered by comparator 2 */
+}TIMER_PreLoad_Trig_Type;
+
+/**
+ *  @brief TIMER count register run mode type definition
+ */
+typedef enum {
+    TIMER_COUNT_PRELOAD,                     /*!< TIMER count register preload from comparator register */
+    TIMER_COUNT_FREERUN,                     /*!< TIMER count register free run */
+}TIMER_CountMode_Type;
+
+/**
+ *  @brief TIMER interrupt type definition
+ */
+typedef enum {
+    TIMER_INT_COMP_0,                        /*!< Comparator 0 match cause interrupt */
+    TIMER_INT_COMP_1,                        /*!< Comparator 1 match cause interrupt */
+    TIMER_INT_COMP_2,                        /*!< Comparator 2 match cause interrupt */
+    TIMER_INT_ALL,                           /*!<  */
+}TIMER_INT_Type;
+
+/**
+ *  @brief Watchdog timer interrupt type definition
+ */
+typedef enum {
+    WDT_INT,                                 /*!< Comparator 0 match cause interrupt */
+    WDT_INT_ALL,                             /*!<  */
+}WDT_INT_Type;
+
+/**
+ *  @brief TIMER configuration structure type definition
+ */
+typedef struct {
+    TIMER_Chan_Type timerCh;                /*!< Timer channel */
+    TIMER_ClkSrc_Type clkSrc;               /*!< Timer clock source */
+    TIMER_PreLoad_Trig_Type  plTrigSrc;     /*!< Timer count register preload trigger source slelect */
+    TIMER_CountMode_Type countMode;         /*!< Timer count mode */
+    uint8_t clockDivision;                  /*!< Timer clock divison value */
+    uint32_t matchVal0;                     /*!< Timer match 0 value 0 */
+    uint32_t matchVal1;                     /*!< Timer match 1 value 0 */
+    uint32_t matchVal2;                     /*!< Timer match 2 value 0 */
+    uint32_t preLoadVal;                    /*!< Timer preload value */
+}TIMER_CFG_Type;
+
+/*@} end of group TIMER_Public_Types */
+
+/** @defgroup  TIMER_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  TIMER_CHAN_TYPE
+ *  @{
+ */
+#define IS_TIMER_CHAN_TYPE(type)                         (((type) == TIMER_CH0) || \
+                                                          ((type) == TIMER_CH1) || \
+                                                          ((type) == TIMER_CH_MAX))
+
+/** @defgroup  TIMER_CLKSRC_TYPE
+ *  @{
+ */
+#define IS_TIMER_CLKSRC_TYPE(type)                       (((type) == TIMER_CLKSRC_FCLK) || \
+                                                          ((type) == TIMER_CLKSRC_32K) || \
+                                                          ((type) == TIMER_CLKSRC_1K) || \
+                                                          ((type) == TIMER_CLKSRC_XTAL))
+
+/** @defgroup  TIMER_COMP_ID_TYPE
+ *  @{
+ */
+#define IS_TIMER_COMP_ID_TYPE(type)                      (((type) == TIMER_COMP_ID_0) || \
+                                                          ((type) == TIMER_COMP_ID_1) || \
+                                                          ((type) == TIMER_COMP_ID_2))
+
+/** @defgroup  TIMER_PRELOAD_TRIG_TYPE
+ *  @{
+ */
+#define IS_TIMER_PRELOAD_TRIG_TYPE(type)                 (((type) == TIMER_PRELOAD_TRIG_NONE) || \
+                                                          ((type) == TIMER_PRELOAD_TRIG_COMP0) || \
+                                                          ((type) == TIMER_PRELOAD_TRIG_COMP1) || \
+                                                          ((type) == TIMER_PRELOAD_TRIG_COMP2))
+
+/** @defgroup  TIMER_COUNTMODE_TYPE
+ *  @{
+ */
+#define IS_TIMER_COUNTMODE_TYPE(type)                    (((type) == TIMER_COUNT_PRELOAD) || \
+                                                          ((type) == TIMER_COUNT_FREERUN))
+
+/** @defgroup  TIMER_INT_TYPE
+ *  @{
+ */
+#define IS_TIMER_INT_TYPE(type)                          (((type) == TIMER_INT_COMP_0) || \
+                                                          ((type) == TIMER_INT_COMP_1) || \
+                                                          ((type) == TIMER_INT_COMP_2) || \
+                                                          ((type) == TIMER_INT_ALL))
+
+/** @defgroup  WDT_INT_TYPE
+ *  @{
+ */
+#define IS_WDT_INT_TYPE(type)                            (((type) == WDT_INT) || \
+                                                          ((type) == WDT_INT_ALL))
+
+/*@} end of group TIMER_Public_Constants */
+
+/** @defgroup  TIMER_Public_Macros
+ *  @{
+ */
+#define WDT_ENABLE_ACCESS()  {BL_WR_REG(TIMER_BASE,TIMER_WFAR,BL_SET_REG_BITS_VAL(BL_RD_REG(TIMER_BASE,TIMER_WFAR),TIMER_WFAR,0xBABA));\
+                              BL_WR_REG(TIMER_BASE,TIMER_WSAR,BL_SET_REG_BITS_VAL(BL_RD_REG(TIMER_BASE,TIMER_WSAR),TIMER_WSAR,0xEB10));}
+
+/*@} end of group TIMER_Public_Macros */
+
+/** @defgroup  TIMER_Public_Functions
+ *  @{
+ */
+
+/**
+ *  @brief UART Functions
+ */
+#ifndef BFLB_USE_HAL_DRIVER
+void TIMER_CH0_IRQHandler(void);
+void TIMER_CH1_IRQHandler(void);
+void TIMER_WDT_IRQHandler(void);
+#endif
+BL_Err_Type TIMER_Init(TIMER_CFG_Type* timerCfg);
+uint32_t TIMER_GetCompValue(TIMER_Chan_Type timerCh, TIMER_Comp_ID_Type cmpNo);
+void TIMER_SetCompValue(TIMER_Chan_Type timerCh, TIMER_Comp_ID_Type cmpNo, uint32_t val);
+uint32_t TIMER_GetCounterValue(TIMER_Chan_Type timerCh);
+BL_Sts_Type TIMER_GetMatchStatus(TIMER_Chan_Type timerCh, TIMER_Comp_ID_Type cmpNo);
+uint32_t TIMER_GetPreloadValue(TIMER_Chan_Type timerCh);
+void TIMER_SetPreloadValue(TIMER_Chan_Type timerCh,uint32_t val);
+void TIMER_SetPreloadSrc(TIMER_Chan_Type timerCh, TIMER_PreLoad_Trig_Type plSrc);
+void TIMER_SetCountMode(TIMER_Chan_Type timerCh, TIMER_CountMode_Type countMode);
+void TIMER_ClearIntStatus(TIMER_Chan_Type timerCh, TIMER_Comp_ID_Type cmpNo);
+void TIMER_Enable(TIMER_Chan_Type timerCh);
+void TIMER_Disable(TIMER_Chan_Type timerCh);
+void TIMER_IntMask(TIMER_Chan_Type timerCh,TIMER_INT_Type intType, BL_Mask_Type intMask);
+void WDT_Set_Clock(TIMER_ClkSrc_Type clkSrc,uint8_t div);
+uint16_t WDT_GetMatchValue(void);
+void WDT_SetCompValue(uint16_t val);
+uint16_t WDT_GetCounterValue(void);
+void WDT_ResetCounterValue(void);
+BL_Sts_Type WDT_GetResetStatus(void);
+void WDT_ClearResetStatus(void);
+void WDT_Enable(void);
+void WDT_Disable(void);
+void WDT_IntMask(WDT_INT_Type intType, BL_Mask_Type intMask);
+void Timer_Int_Callback_Install(TIMER_Chan_Type timerChan,TIMER_INT_Type intType,intCallback_Type* cbFun);
+void WDT_Int_Callback_Install(WDT_INT_Type wdtInt,intCallback_Type* cbFun);
+
+/*@} end of group TIMER_Public_Functions */
+
+/*@} end of group TIMER */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_TIMER_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_uart.h b/drivers/bl702_driver/std_drv/inc/bl702_uart.h
new file mode 100644
index 00000000..995ad360
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_uart.h
@@ -0,0 +1,322 @@
+/**
+  ******************************************************************************
+  * @file    bl702_uart.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_UART_H__
+#define __BL702_UART_H__
+
+#include "uart_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  UART
+ *  @{
+ */
+
+/** @defgroup  UART_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief UART port type definition
+ */
+typedef enum {
+    UART0_ID,                                /*!< UART0 port define */
+    UART1_ID,                                /*!< UART1 port define */
+    UART_ID_MAX,                             /*!< UART MAX ID define */
+}UART_ID_Type;
+
+/**
+ *  @brief UART direction type definition
+ */
+typedef enum {
+    UART_TX,                                 /*!< UART TX Direction */
+    UART_RX,                                 /*!< UART RX Direction */
+    UART_TXRX,                               /*!< UART TX and RX Direction */
+}UART_Direction_Type;
+
+/**
+ *  @brief UART parity type definition
+ */
+typedef enum {
+    UART_PARITY_NONE,                        /*!< UART parity none define */
+    UART_PARITY_ODD,                         /*!< UART parity odd define */
+    UART_PARITY_EVEN,                        /*!< UART parity even define */
+}UART_Parity_Type;
+
+/**
+ *  @brief UART data bits type definiton
+ */
+typedef enum {
+    UART_DATABITS_5,                         /*!< UART data bits length:5 bits */
+    UART_DATABITS_6,                         /*!< UART data bits length:6 bits */
+    UART_DATABITS_7,                         /*!< UART data bits length:7 bits */
+    UART_DATABITS_8,                         /*!< UART data bits length:8 bits */
+}UART_DataBits_Type;
+
+/**
+ *  @brief UART stop bits type definiton
+ */
+typedef enum {
+    UART_STOPBITS_1,                         /*!< UART data stop bits length:1 bits */
+    UART_STOPBITS_1_5,                       /*!< UART data stop bits length:1.5 bits */
+    UART_STOPBITS_2,                         /*!< UART data stop bits length:2 bits */
+}UART_StopBits_Type;
+
+/**
+ *  @brief UART each data byte is send out LSB-first or MSB-first type definiton
+ */
+typedef enum {
+    UART_LSB_FIRST,                          /*!< UART each byte is send out LSB-first */
+    UART_MSB_FIRST,                          /*!< UART each byte is send out MSB-first */
+}UART_ByteBitInverse_Type;
+
+/**
+ *  @brief UART auto baudrate detection using codeword 0x55 or start bit definiton
+ */
+typedef enum {
+    UART_AUTOBAUD_0X55,                      /*!< UART auto baudrate detection using codeword 0x55 */
+    UART_AUTOBAUD_STARTBIT,                  /*!< UART auto baudrate detection using start bit */
+}UART_AutoBaudDetection_Type;
+
+/**
+ *  @brief UART interrupt type definition
+ */
+typedef enum {
+    UART_INT_TX_END,                         /*!< UART tx transfer end interrupt */
+    UART_INT_RX_END,                         /*!< UART rx transfer end interrupt */
+    UART_INT_TX_FIFO_REQ,                    /*!< UART tx fifo interrupt when tx fifo count reaches,auto clear */
+    UART_INT_RX_FIFO_REQ,                    /*!< UART rx fifo interrupt when rx fifo count reaches,auto clear */
+    UART_INT_RTO,                            /*!< UART rx time-out interrupt */
+    UART_INT_PCE,                            /*!< UART rx parity check error interrupt */
+    UART_INT_TX_FER,                         /*!< UART tx fifo overflow/underflow error interrupt */
+    UART_INT_RX_FER,                         /*!< UART rx fifo overflow/underflow error interrupt */
+    UART_INT_LSE,                            /*!< UART rx lin mode sync field error interrupt */
+    UART_INT_ALL,                            /*!< All the interrupt */
+}UART_INT_Type;
+
+/**
+ *  @brief UART overflow or underflow type definition
+ */
+typedef enum {
+    UART_TX_OVERFLOW,                        /*!< UART tx fifo overflow */
+    UART_TX_UNDERFLOW,                       /*!< UART tx fifo underflow */
+    UART_RX_OVERFLOW,                        /*!< UART rx fifo overflow */
+    UART_RX_UNDERFLOW,                       /*!< UART rx fifo underflow */
+}UART_Overflow_Type;
+
+/**
+ *  @brief UART configuration structure type definition
+ */
+typedef struct {
+    uint32_t uartClk;                        /*!< Uart module clock */
+    uint32_t baudRate;                       /*!< Uart baudrate */
+    UART_DataBits_Type dataBits;             /*!< Uart frame length of data bit */
+    UART_StopBits_Type stopBits;             /*!< Uart frame length of stop bit */
+    UART_Parity_Type parity;                 /*!< Uart parity check type */
+    BL_Fun_Type ctsFlowControl;              /*!< Enable or disable tx CTS flow control */
+    BL_Fun_Type rxDeglitch;                  /*!< Enable or disable rx input de-glitch function */
+    BL_Fun_Type rtsSoftwareControl;          /*!< Enable or disable rx RTS output SW control mode */
+    BL_Fun_Type txSoftwareControl;           /*!< Enable or disable tx output SW control mode */
+    BL_Fun_Type txLinMode;                   /*!< Enable or disable tx LIN mode,LIN header will be sent before sending data */
+    BL_Fun_Type rxLinMode;                   /*!< Enable or disable rx LIN mode,LIN header will be required and checked before receiving data */
+    uint8_t txBreakBitCnt;                   /*!< Uart tx break bit count,additional 8 bit times will be added since LIN break field requires at 
+                                                 least 13 bit times */
+    UART_ByteBitInverse_Type byteBitInverse; /*!< Uart each data byte is send out LSB-first or MSB-first */
+}UART_CFG_Type;
+
+/**
+ *  @brief UART FIFO configuration structure type definition
+ */
+typedef struct {
+    uint8_t txFifoDmaThreshold;              /*!< TX FIFO threshold, dma tx request will not be asserted if tx fifo count is less than this value */
+    uint8_t rxFifoDmaThreshold;              /*!< RX FIFO threshold, dma rx request will not be asserted if rx fifo count is less than this value */
+    BL_Fun_Type txFifoDmaEnable;             /*!< Enable or disable tx dma req/ack interface */
+    BL_Fun_Type rxFifoDmaEnable;             /*!< Enable or disable rx dma req/ack interface */
+}UART_FifoCfg_Type;
+
+/**
+ *  @brief UART infrared configuration structure type definition
+ */
+typedef struct {
+    BL_Fun_Type txIrEnable;                  /*!< Enable or disable uart tx ir mode */
+    BL_Fun_Type rxIrEnable;                  /*!< Enable or disable uart rx ir mode */
+    BL_Fun_Type txIrInverse;                 /*!< Enable or disable inverse signal of uart tx output in ir mode */
+    BL_Fun_Type rxIrInverse;                 /*!< Enable or disable inverse signal of uart rx input in ir mode */
+    uint16_t txIrPulseStart;                 /*!< Set start position of uart tx ir pulse */
+    uint16_t txIrPulseStop;                  /*!< Set stop position of uart tx ir pulse */
+    uint16_t rxIrPulseStart;                 /*!< Set start position of uart rx pulse recovered from ir signal */
+}UART_IrCfg_Type;
+
+/*@} end of group UART_Public_Types */
+
+/** @defgroup  UART_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  UART_ID_TYPE
+ *  @{
+ */
+#define IS_UART_ID_TYPE(type)                            (((type) == UART0_ID) || \
+                                                          ((type) == UART1_ID) || \
+                                                          ((type) == UART_ID_MAX))
+
+/** @defgroup  UART_DIRECTION_TYPE
+ *  @{
+ */
+#define IS_UART_DIRECTION_TYPE(type)                     (((type) == UART_TX) || \
+                                                          ((type) == UART_RX) || \
+                                                          ((type) == UART_TXRX))
+
+/** @defgroup  UART_PARITY_TYPE
+ *  @{
+ */
+#define IS_UART_PARITY_TYPE(type)                        (((type) == UART_PARITY_NONE) || \
+                                                          ((type) == UART_PARITY_ODD) || \
+                                                          ((type) == UART_PARITY_EVEN))
+
+/** @defgroup  UART_DATABITS_TYPE
+ *  @{
+ */
+#define IS_UART_DATABITS_TYPE(type)                      (((type) == UART_DATABITS_5) || \
+                                                          ((type) == UART_DATABITS_6) || \
+                                                          ((type) == UART_DATABITS_7) || \
+                                                          ((type) == UART_DATABITS_8))
+
+/** @defgroup  UART_STOPBITS_TYPE
+ *  @{
+ */
+#define IS_UART_STOPBITS_TYPE(type)                      (((type) == UART_STOPBITS_1) || \
+                                                          ((type) == UART_STOPBITS_1_5) || \
+                                                          ((type) == UART_STOPBITS_2))
+
+/** @defgroup  UART_BYTEBITINVERSE_TYPE
+ *  @{
+ */
+#define IS_UART_BYTEBITINVERSE_TYPE(type)                (((type) == UART_LSB_FIRST) || \
+                                                          ((type) == UART_MSB_FIRST))
+
+/** @defgroup  UART_AUTOBAUDDETECTION_TYPE
+ *  @{
+ */
+#define IS_UART_AUTOBAUDDETECTION_TYPE(type)             (((type) == UART_AUTOBAUD_0X55) || \
+                                                          ((type) == UART_AUTOBAUD_STARTBIT))
+
+/** @defgroup  UART_INT_TYPE
+ *  @{
+ */
+#define IS_UART_INT_TYPE(type)                           (((type) == UART_INT_TX_END) || \
+                                                          ((type) == UART_INT_RX_END) || \
+                                                          ((type) == UART_INT_TX_FIFO_REQ) || \
+                                                          ((type) == UART_INT_RX_FIFO_REQ) || \
+                                                          ((type) == UART_INT_RTO) || \
+                                                          ((type) == UART_INT_PCE) || \
+                                                          ((type) == UART_INT_TX_FER) || \
+                                                          ((type) == UART_INT_RX_FER) || \
+                                                          ((type) == UART_INT_LSE) || \
+                                                          ((type) == UART_INT_ALL))
+
+/** @defgroup  UART_OVERFLOW_TYPE
+ *  @{
+ */
+#define IS_UART_OVERFLOW_TYPE(type)                      (((type) == UART_TX_OVERFLOW) || \
+                                                          ((type) == UART_TX_UNDERFLOW) || \
+                                                          ((type) == UART_RX_OVERFLOW) || \
+                                                          ((type) == UART_RX_UNDERFLOW))
+
+/*@} end of group UART_Public_Constants */
+
+/** @defgroup  UART_Public_Macros
+ *  @{
+ */
+#define UART_RX_FIFO_SIZE                                128
+#define UART_TX_FIFO_SIZE                                128
+#define UART_DEFAULT_RECV_TIMEOUT                        80
+
+/*@} end of group UART_Public_Macros */
+
+/** @defgroup  UART_Public_Functions
+ *  @{
+ */
+
+/**
+ *  @brief UART Functions
+ */
+#if (!defined BFLB_USE_HAL_DRIVER)||(defined BFLB_EFLASH_LOADER)
+void UART0_IRQHandler(void);
+void UART1_IRQHandler(void);
+#endif
+BL_Err_Type UART_Init(UART_ID_Type uartId,UART_CFG_Type* uartCfg);
+BL_Err_Type UART_DeInit(UART_ID_Type uartId);
+BL_Err_Type UART_FifoConfig(UART_ID_Type uartId,UART_FifoCfg_Type* fifoCfg);
+BL_Err_Type UART_IrConfig(UART_ID_Type uartId,UART_IrCfg_Type* irCfg);
+BL_Err_Type UART_Enable(UART_ID_Type uartId,UART_Direction_Type direct);
+BL_Err_Type UART_Disable(UART_ID_Type uartId,UART_Direction_Type direct);
+BL_Err_Type UART_SetTxDataLength(UART_ID_Type uartId,uint16_t length);
+BL_Err_Type UART_SetRxDataLength(UART_ID_Type uartId,uint16_t length);
+BL_Err_Type UART_SetRxTimeoutValue(UART_ID_Type uartId,uint8_t time);
+BL_Err_Type UART_SetDeglitchCount(UART_ID_Type uartId,uint8_t deglitchCnt);
+BL_Err_Type UART_SetBaudrate(UART_ID_Type uartId,UART_AutoBaudDetection_Type autoBaudDet);
+BL_Err_Type UART_SetRtsValue(UART_ID_Type uartId);
+BL_Err_Type UART_ClrRtsValue(UART_ID_Type uartId);
+BL_Err_Type UART_SetTxValue(UART_ID_Type uartId);
+BL_Err_Type UART_ClrTxValue(UART_ID_Type uartId);
+BL_Err_Type UART_TxFreeRun(UART_ID_Type uartId,BL_Fun_Type txFreeRun);
+BL_Err_Type UART_AutoBaudDetection(UART_ID_Type uartId,BL_Fun_Type autoBaud);
+BL_Err_Type UART_TxFifoClear(UART_ID_Type uartId);
+BL_Err_Type UART_RxFifoClear(UART_ID_Type uartId);
+BL_Err_Type UART_IntMask(UART_ID_Type uartId,UART_INT_Type intType,BL_Mask_Type intMask);
+BL_Err_Type UART_IntClear(UART_ID_Type uartId,UART_INT_Type intType);
+BL_Err_Type UART_Int_Callback_Install(UART_ID_Type uartId,UART_INT_Type intType,intCallback_Type* cbFun);
+BL_Err_Type UART_SendData(UART_ID_Type uartId,uint8_t* data,uint32_t len);
+BL_Err_Type UART_SendDataBlock(UART_ID_Type uartId,uint8_t* data,uint32_t len);
+uint32_t UART_ReceiveData(UART_ID_Type uartId,uint8_t* data,uint32_t maxLen);
+uint16_t UART_GetAutoBaudCount(UART_ID_Type uartId,UART_AutoBaudDetection_Type autoBaudDet);
+uint8_t UART_GetTxFifoCount(UART_ID_Type uartId);
+uint8_t UART_GetRxFifoCount(UART_ID_Type uartId);
+BL_Sts_Type UART_GetIntStatus(UART_ID_Type uartId,UART_INT_Type intType);
+BL_Sts_Type UART_GetTxBusBusyStatus(UART_ID_Type uartId);
+BL_Sts_Type UART_GetRxBusBusyStatus(UART_ID_Type uartId);
+BL_Sts_Type UART_GetOverflowStatus(UART_ID_Type uartId,UART_Overflow_Type overflow);
+
+/*@} end of group UART_Public_Functions */
+
+/*@} end of group UART */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_UART_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_usb.h b/drivers/bl702_driver/std_drv/inc/bl702_usb.h
new file mode 100644
index 00000000..255d596c
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_usb.h
@@ -0,0 +1,429 @@
+/**
+  ******************************************************************************
+  * @file    bl702_usb.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_USB_H__
+#define __BL702_USB_H__
+
+#include "usb_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  USB
+ *  @{
+ */
+
+/** @defgroup  USB_Public_Types
+ *  @{
+ */
+
+/**
+ *  @brief USB end point ID
+ */
+typedef enum {
+    EP_ID0=0,                               /*!< USB end point 0 */
+    EP_ID1,                                 /*!< USB end point 1 */
+    EP_ID2,                                 /*!< USB end point 2 */
+    EP_ID3,                                 /*!< USB end point 3 */
+    EP_ID4,                                 /*!< USB end point 4 */
+    EP_ID5,                                 /*!< USB end point 5 */
+    EP_ID6,                                 /*!< USB end point 6 */
+    EP_ID7,                                 /*!< USB end point 7 */
+}USB_EP_ID;
+
+/**
+ *  @brief USB end point type
+ */
+typedef enum {
+    EP_INT=0,                               /*!< interrupt transfer ep */
+    EP_ISO=2,                               /*!< isochronous transfer ep */
+    EP_BULK=4,                              /*!< bulk transfer ep */
+    EP_CTRL=5,                              /*!< control transfer ep */
+}EP_XFER_Type;
+
+/**
+ *  @brief USB end point transfer directions
+ */
+typedef enum {
+    EP_DISABLED=0,                          /*!< end point disabled */
+    EP_IN=1,                                /*!< IN end point,device to host */
+    EP_OUT=2,                               /*!< OUT end point ,host to device */
+}EP_XFER_DIR;
+
+
+typedef enum {
+    USB_INT_SOF=0,
+    USB_INT_RESET,
+    USB_INT_VBUS_TGL,
+    USB_INT_GET_DCT_CMD,
+    USB_INT_EP0_SETUP_CMD,
+    USB_INT_EP0_SETUP_DONE,
+    USB_INT_EP0_IN_CMD,
+    USB_INT_EP0_IN_DONE,
+    USB_INT_EP0_OUT_CMD,
+    USB_INT_EP0_OUT_DONE,
+    USB_INT_EP1_CMD,
+    USB_INT_EP1_DONE,
+    USB_INT_EP2_CMD,
+    USB_INT_EP2_DONE,
+    USB_INT_EP3_CMD,
+    USB_INT_EP3_DONE,
+    USB_INT_EP4_CMD,
+    USB_INT_EP4_DONE,
+    USB_INT_EP5_CMD,
+    USB_INT_EP5_DONE,
+    USB_INT_EP6_CMD,
+    USB_INT_EP6_DONE,
+    USB_INT_EP7_CMD,
+    USB_INT_EP7_DONE,
+    USB_INT_RESET_END=27,
+    USB_INT_LPM_WAKEUP=28,
+    USB_INT_LPM_PACKET=29,
+    USB_INT_LOST_SOF_3_TIMES=30,
+    USB_INT_ERROR=31,
+    USB_INT_ALL=32,                     /* special */
+}USB_INT_Type;
+
+
+typedef enum {
+    USB_FIFO_EMPTY=0,
+    USB_FIFO_FULL,
+}USB_FIFO_STATUS_Type;
+
+
+typedef enum {
+    USB_FIFO_ERROR_OVERFLOW=0,
+    USB_FIFO_ERROR_UNDERFLOW,
+}USB_FIFO_ERROR_FLAG_Type;
+
+
+typedef enum {
+    USB_EP_STATUS_ACK=0,
+    USB_EP_STATUS_NACK,
+    USB_EP_STATUS_STALL,
+    USB_EP_STATUS_NSTALL,
+}USB_EP_STATUS_Type;
+
+
+typedef enum {
+    USB_LPM_DEFAULT_RESP_ACK=0,
+    USB_LPM_DEFAULT_RESP_NACK,
+    USB_LPM_DEFAULT_RESP_STALL,
+    USB_LPM_DEFAULT_RESP_NYET,
+}USB_LPM_DEFAULT_RESP_Type;
+
+
+typedef enum {
+    USB_ERROR_UTMI_RX=0,
+    USB_ERROR_XFER_TO,
+    USB_ERROR_IVLD_EP,
+    USB_ERROR_PID_SEQ,
+    USB_ERROR_PID_CKS,
+    USB_ERROR_CRC5,
+    USB_ERROR_CRC16,
+}USB_ERROR_Type;
+
+
+
+/**
+ *  @brief USB configuration structure type definition
+ */
+typedef struct {
+    BL_Fun_Type EnumOutEn;                  /*!< EP0 IN direction enable or disable */
+    BL_Fun_Type EnumInEn;                   /*!< EP0 OUT direction enable or disable */
+    uint8_t EnumMaxPacketSize;              /*!< EP0 max packet size, only valid when SoftwareCtrl is set */
+    uint8_t DeviceAddress;                  /*!< Device(EP0) address, only valid when SoftwareCtrl is set */
+    BL_Fun_Type SoftwareCtrl;                 /*!< EP0 software control enable */
+    BL_Fun_Type RomBaseDescriptorUsed;      /*!< Enable signal of ROM-based descriptors (don't care if SoftwareCtrl is set) */
+}USB_Config_Type;
+
+/**
+ *  @brief end point configuration structure type definition
+ */
+typedef struct {
+    uint16_t EPMaxPacketSize;                /*!< Endpoint max packet size */
+    EP_XFER_DIR dir;                         /*!< Endpoint direction */
+    EP_XFER_Type type;                       /*!< Endpoint type */
+}EP_Config_Type;
+
+
+typedef struct {
+    uint32_t cr_ep_size                    :  9;
+    uint32_t cr_ep_dir                     :  2;
+    uint32_t cr_ep_type                    :  3;
+    uint32_t cr_ep_stall                   :  1;
+    uint32_t cr_ep_nack                    :  1;
+    uint32_t cr_ep_rdy                     :  1;
+    uint32_t reserved_17_31                : 15;
+}usb_reg_epx_config_t;
+
+typedef struct {
+    uint32_t ep_dma_tx_en                  :  1;
+    uint32_t ep_dma_rx_en                  :  1;
+    uint32_t ep_tx_fifo_clr                :  1;
+    uint32_t ep_rx_fifo_clr                :  1;
+    uint32_t ep_tx_fifo_overflow           :  1;
+    uint32_t ep_tx_fifo_underflow          :  1;
+    uint32_t ep_rx_fifo_overflow           :  1;
+    uint32_t ep_rx_fifo_underflow          :  1;
+    uint32_t reserved_8_31                 : 24;
+}usb_reg_epx_fifo_config_t;
+
+typedef struct {
+    uint32_t ep_tx_fifo_cnt                :  7;
+    uint32_t reserved_7_13                 :  7;
+    uint32_t ep_tx_fifo_empty              :  1;
+    uint32_t ep_tx_fifo_full               :  1;
+    uint32_t ep_rx_fifo_cnt                :  7;
+    uint32_t reserved_23_29                :  7;
+    uint32_t ep_rx_fifo_empty              :  1;
+    uint32_t ep_rx_fifo_full               :  1;
+}usb_reg_epx_fifo_status_t;
+
+typedef struct {
+    uint32_t fifo                          :  8;
+    uint32_t reserved_8_31                 : 24;
+}usb_reg_epx_fifo_t;
+
+
+/*@} end of group USB_Public_Types */
+
+/** @defgroup  USB_Public_Constants
+ *  @{
+ */
+
+/** @defgroup  USB_EP_ID
+ *  @{
+ */
+#define IS_USB_EP_ID(type)                               (((type) == EP_ID0) || \
+                                                          ((type) == EP_ID1) || \
+                                                          ((type) == EP_ID2) || \
+                                                          ((type) == EP_ID3) || \
+                                                          ((type) == EP_ID4) || \
+                                                          ((type) == EP_ID5) || \
+                                                          ((type) == EP_ID6) || \
+                                                          ((type) == EP_ID7))
+
+/** @defgroup  EP_XFER_TYPE
+ *  @{
+ */
+#define IS_EP_XFER_TYPE(type)                            (((type) == EP_INT) || \
+                                                          ((type) == EP_ISO) || \
+                                                          ((type) == EP_CTRL) || \
+                                                          ((type) == EP_BULK))
+
+/** @defgroup  EP_XFER_DIR
+ *  @{
+ */
+#define IS_EP_XFER_DIR(type)                             (((type) == EP_DISABLED) || \
+                                                          ((type) == EP_IN) || \
+                                                          ((type) == EP_OUT))
+
+/*@} end of group USB_Public_Constants */
+
+/** @defgroup  USB_Public_Macros
+ *  @{
+ */
+#define    USB_INT_TYPE_SOF                            0x00000001
+#define    USB_INT_TYPE_RESET                          0x00000002
+#define    USB_INT_TYPE_GET_DCT_CMD                    0x00000008
+#define    USB_INT_TYPE_EP0_SETUP_CMD                  0x00000010
+#define    USB_INT_TYPE_EP0_SETUP_DONE                 0x00000020
+#define    USB_INT_TYPE_EP0_IN_CMD                     0x00000040
+#define    USB_INT_TYPE_EP0_IN_DONE                    0x00000080
+#define    USB_INT_TYPE_EP0_OUT_CMD                    0x00000100
+#define    USB_INT_TYPE_EP0_OUT_DONE                   0x00000200
+#define    USB_INT_TYPE_EP1_CMD                        0x00000400
+#define    USB_INT_TYPE_EP1_DONE                       0x00000800
+#define    USB_INT_TYPE_EP2_CMD                        0x00001000
+#define    USB_INT_TYPE_EP2_DONE                       0x00002000
+#define    USB_INT_TYPE_EP3_CMD                        0x00004000
+#define    USB_INT_TYPE_EP3_DONE                       0x00008000
+#define    USB_INT_TYPE_EP4_CMD                        0x00010000
+#define    USB_INT_TYPE_EP4_DONE                       0x00020000
+#define    USB_INT_TYPE_EP5_CMD                        0x00040000
+#define    USB_INT_TYPE_EP5_DONE                       0x00080000
+#define    USB_INT_TYPE_EP6_CMD                        0x00100000
+#define    USB_INT_TYPE_EP6_DONE                       0x00200000
+#define    USB_INT_TYPE_EP7_CMD                        0x00400000
+#define    USB_INT_TYPE_EP7_DONE                       0x00800000
+#define    USB_INT_TYPE_RESET_END                      0x08000000
+#define    USB_INT_TYPE_LPM_WAKEUP                     0x10000000
+#define    USB_INT_TYPE_LPM_PACKET                     0x20000000
+#define    USB_INT_TYPE_LOST_SOF_3_TIMES               0x40000000
+#define    USB_INT_TYPE_ERROR                          0x80000000
+#define    USB_INT_TYPE_ALL                            (USB_INT_TYPE_SOF             | \
+                                                        USB_INT_TYPE_RESET           | \
+                                                        USB_INT_TYPE_GET_DCT_CMD     | \
+                                                        USB_INT_TYPE_EP0_SETUP_CMD   | \
+                                                        USB_INT_TYPE_EP0_SETUP_DONE  | \
+                                                        USB_INT_TYPE_EP0_IN_CMD      | \
+                                                        USB_INT_TYPE_EP0_IN_DONE     | \
+                                                        USB_INT_TYPE_EP0_OUT_CMD     | \
+                                                        USB_INT_TYPE_EP0_OUT_DONE    | \
+                                                        USB_INT_TYPE_EP1_CMD         | \
+                                                        USB_INT_TYPE_EP1_DONE        | \
+                                                        USB_INT_TYPE_EP2_CMD         | \
+                                                        USB_INT_TYPE_EP2_DONE        | \
+                                                        USB_INT_TYPE_EP3_CMD         | \
+                                                        USB_INT_TYPE_EP3_DONE        | \
+                                                        USB_INT_TYPE_EP4_CMD         | \
+                                                        USB_INT_TYPE_EP4_DONE        | \
+                                                        USB_INT_TYPE_EP5_CMD         | \
+                                                        USB_INT_TYPE_EP5_DONE        | \
+                                                        USB_INT_TYPE_EP6_CMD         | \
+                                                        USB_INT_TYPE_EP6_DONE        | \
+                                                        USB_INT_TYPE_EP7_CMD         | \
+                                                        USB_INT_TYPE_EP7_DONE        | \
+                                                        USB_INT_TYPE_RESET_END       | \
+                                                        USB_INT_TYPE_LPM_WAKEUP      | \
+                                                        USB_INT_TYPE_LPM_PACKET      | \
+                                                        USB_INT_TYPE_LOST_SOF_3_TIMES| \
+                                                        USB_INT_TYPE_ERROR )
+
+#define    USB_EP_TX_FIFO_EMPTY                        0x00004000
+#define    USB_EP_TX_FIFO_FULL                         0x00008000
+#define    USB_EP_RX_FIFO_EMPTY                        0x40000000
+#define    USB_EP_RX_FIFO_FULL                         0x80000000
+#define    USB_EP_FIFO_STATUS_MASK                     (USB_EP_TX_FIFO_EMPTY | \
+                                                        USB_EP_TX_FIFO_FULL  | \
+                                                        USB_EP_RX_FIFO_EMPTY | \
+                                                        USB_EP_RX_FIFO_FULL)
+#define    USB_EP_TX_FIFO_OVERFLOW                     0x00000010
+#define    USB_EP_TX_FIFO_UNDERFLOW                    0x00000020
+#define    USB_EP_RX_FIFO_OVERFLOW                     0x00000040
+#define    USB_EP_RX_FIFO_UNDERLOW                     0x00000080
+#define    USB_EP_FIFO_ERROR_MASK                      (USB_EP_TX_FIFO_OVERFLOW | \
+                                                        USB_EP_TX_FIFO_UNDERFLOW | \
+                                                        USB_EP_RX_FIFO_OVERFLOW | \
+                                                        USB_EP_RX_FIFO_UNDERLOW)
+
+#define EP_ID_MAX                                       8
+
+
+/*@} end of group USB_Public_Macros */
+
+/** @defgroup  USB_Public_Functions
+ *  @{
+ */
+
+/**
+ *  @brief USB Functions
+ */
+
+/*----------*/
+#ifndef BFLB_USE_HAL_DRIVER
+void USB_IRQHandler(void);
+#endif
+/*----------*/
+BL_Err_Type USB_Enable(void);
+BL_Err_Type USB_Disable(void);
+BL_Err_Type USB_Set_Config(BL_Fun_Type enable,USB_Config_Type * usbCfg);
+BL_Err_Type USB_Set_Device_Addr(uint8_t addr);
+uint8_t USB_Get_Device_Addr(void);
+/*----------*/
+BL_Err_Type USB_Set_EPx_Xfer_Size(USB_EP_ID epId,uint8_t size);
+BL_Err_Type USB_Set_EPx_IN_Busy(USB_EP_ID epId);
+BL_Err_Type USB_Set_EPx_IN_Stall(USB_EP_ID epId);
+BL_Err_Type USB_Set_EPx_OUT_Busy(USB_EP_ID epId);
+BL_Err_Type USB_Set_EPx_OUT_Stall(USB_EP_ID epId);
+BL_Err_Type USB_Set_EPx_Rdy(USB_EP_ID epId);
+BL_Sts_Type USB_Is_EPx_RDY_Free(USB_EP_ID epId);
+BL_Err_Type USB_Set_EPx_STALL(USB_EP_ID epId);
+BL_Err_Type USB_Clr_EPx_STALL(USB_EP_ID epId);
+BL_Err_Type USB_Set_EPx_Busy(USB_EP_ID epId);
+BL_Err_Type USB_Set_EPx_Status(USB_EP_ID epId,USB_EP_STATUS_Type sts);
+USB_EP_STATUS_Type USB_Get_EPx_Status(USB_EP_ID epId);
+/*----------*/
+BL_Err_Type USB_IntEn(USB_INT_Type intType,uint8_t enable);
+BL_Err_Type USB_IntMask(USB_INT_Type intType,BL_Mask_Type intMask);
+BL_Sts_Type USB_Get_IntStatus(USB_INT_Type intType);
+BL_Err_Type USB_Clr_IntStatus(USB_INT_Type intType);
+BL_Err_Type USB_Clr_EPx_IntStatus(USB_EP_ID epId);
+/*----------*/
+uint16_t USB_Get_Frame_Num(void);
+/*----------*/
+BL_Err_Type USB_Set_EPx_Config(USB_EP_ID epId,EP_Config_Type * epCfg);
+BL_Err_Type USB_Set_EPx_Type(USB_EP_ID epId,EP_XFER_Type type);
+EP_XFER_Type USB_Get_EPx_Type(USB_EP_ID epId);
+BL_Err_Type USB_Set_EPx_Dir(USB_EP_ID epId,EP_XFER_DIR dir);
+EP_XFER_DIR USB_Get_EPx_Dir(USB_EP_ID epId);
+BL_Err_Type USB_Set_EPx_Size(USB_EP_ID epId,uint32_t size);
+/*----------*/
+BL_Sts_Type USB_Get_EPx_TX_FIFO_Errors(USB_EP_ID epId,USB_FIFO_ERROR_FLAG_Type errFlag);
+BL_Sts_Type USB_Get_EPx_RX_FIFO_Errors(USB_EP_ID epId,USB_FIFO_ERROR_FLAG_Type errFlag);
+BL_Err_Type USB_Clr_EPx_TX_FIFO_Errors(USB_EP_ID epId);
+BL_Err_Type USB_Clr_EPx_RX_FIFO_Errors(USB_EP_ID epId);
+/*----------*/
+BL_Err_Type USB_EPx_Write_Data_To_FIFO(USB_EP_ID epId,uint8_t *pData,uint16_t len);
+BL_Err_Type USB_EPx_Read_Data_From_FIFO(USB_EP_ID epId,uint8_t *pBuff,uint16_t len);
+/*----------*/
+BL_Err_Type USB_Set_EPx_TX_DMA_Interface_Config(USB_EP_ID epId,BL_Fun_Type newState);
+BL_Err_Type USB_Set_EPx_RX_DMA_Interface_Config(USB_EP_ID epId,BL_Fun_Type newState);
+BL_Err_Type USB_EPx_Write_Data_To_FIFO_DMA(USB_EP_ID epId,uint8_t *pData,uint16_t len);
+BL_Err_Type USB_EPx_Read_Data_From_FIFO_DMA(USB_EP_ID epId,uint8_t *pBuff,uint16_t len);
+/*----------*/
+uint16_t USB_Get_EPx_TX_FIFO_CNT(USB_EP_ID epId);
+uint16_t USB_Get_EPx_RX_FIFO_CNT(USB_EP_ID epId);
+BL_Sts_Type USB_Get_EPx_TX_FIFO_Status(USB_EP_ID epId ,USB_FIFO_STATUS_Type sts);
+BL_Sts_Type USB_Get_EPx_RX_FIFO_Status(USB_EP_ID epId, USB_FIFO_STATUS_Type sts);
+/*----------*/
+BL_Err_Type USB_Set_Internal_PullUp_Config(BL_Fun_Type newState);
+/*----------*/
+BL_Sts_Type USB_Get_LPM_Status(void);
+uint16_t USB_Get_LPM_Packet_Attr(void);
+BL_Err_Type USB_Set_LPM_Default_Response(USB_LPM_DEFAULT_RESP_Type defaultResp);
+BL_Err_Type USB_LPM_Enable(void);
+BL_Err_Type USB_LPM_Disable(void);
+/*----------*/
+BL_Err_Type USB_Device_Output_K_State(uint16_t stateWidth);
+/*----------*/
+uint8_t USB_Get_Current_Packet_PID(void);
+uint8_t USB_Get_Current_Packet_EP(void);
+/*----------*/
+BL_Sts_Type USB_Get_Error_Status(USB_ERROR_Type err);
+BL_Err_Type USB_Clr_Error_Status(USB_ERROR_Type err);
+/*----------*/
+
+
+/*@} end of group USB_Public_Functions */
+
+/*@} end of group USB */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_USB_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_xip_sflash.h b/drivers/bl702_driver/std_drv/inc/bl702_xip_sflash.h
new file mode 100644
index 00000000..11e39669
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_xip_sflash.h
@@ -0,0 +1,99 @@
+/**
+  ******************************************************************************
+  * @file    bl702_xip_sflash.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_XIP_SFLASH_H__
+#define __BL702_XIP_SFLASH_H__
+
+#include "bl702_common.h"
+#include "bl702_sflash.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  XIP_SFLASH
+ *  @{
+ */
+
+/** @defgroup  XIP_SFLASH_Public_Types
+ *  @{
+ */
+
+/*@} end of group XIP_SFLASH_Public_Types */
+
+/** @defgroup  XIP_SFLASH_Public_Constants
+ *  @{
+ */
+
+/*@} end of group XIP_SFLASH_Public_Constants */
+
+/** @defgroup  XIP_SFLASH_Public_Macros
+ *  @{
+ */
+
+/*@} end of group XIP_SFLASH_Public_Macros */
+
+/** @defgroup  XIP_SFLASH_Public_Functions
+ *  @{
+ */
+void XIP_SFlash_Opt_Enter(void);
+void XIP_SFlash_Opt_Exit(void);
+BL_Err_Type XIP_SFlash_State_Save(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t *offset);
+BL_Err_Type XIP_SFlash_State_Restore(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint32_t offset);
+BL_Err_Type XIP_SFlash_Erase_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,
+                                       uint32_t startaddr,uint32_t endaddr);
+BL_Err_Type XIP_SFlash_Write_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint32_t addr,
+                                       uint8_t *data,uint32_t len);
+BL_Err_Type XIP_SFlash_Read_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint32_t addr,
+                                      uint8_t *data,uint32_t len);
+BL_Err_Type XIP_SFlash_GetJedecId_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,
+                                            uint8_t *data);
+BL_Err_Type XIP_SFlash_GetDeviceId_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,
+                                             uint8_t *data);
+BL_Err_Type XIP_SFlash_GetUniqueId_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,
+                                             uint8_t *data,uint8_t idLen);
+BL_Err_Type XIP_SFlash_Read_Via_Cache_Need_Lock(uint32_t addr,uint8_t *data,uint32_t len);
+int XIP_SFlash_Read_With_Lock(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint32_t addr,uint8_t *dst,int len);
+int XIP_SFlash_Write_With_Lock(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint32_t addr,uint8_t *src,
+                               int len);
+int XIP_SFlash_Erase_With_Lock(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint32_t addr,int len);
+
+/*@} end of group XIP_SFLASH_Public_Functions */
+
+/*@} end of group XIP_SFLASH */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_XIP_SFLASH_H__ */
diff --git a/drivers/bl702_driver/std_drv/inc/bl702_xip_sflash_ext.h b/drivers/bl702_driver/std_drv/inc/bl702_xip_sflash_ext.h
new file mode 100644
index 00000000..d884bd03
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/inc/bl702_xip_sflash_ext.h
@@ -0,0 +1,86 @@
+/**
+  ******************************************************************************
+  * @file    bl702_xip_sflash_ext.h
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver header file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#ifndef __BL702_XIP_SFLASH_EXT_H__
+#define __BL702_XIP_SFLASH_EXT_H__
+
+#include "bl702_common.h"
+#include "bl702_sflash.h"
+#include "bl702_xip_sflash.h"
+#include "bl702_sf_cfg.h"
+#include "bl702_sf_cfg_ext.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  XIP_SFLASH
+ *  @{
+ */
+
+/** @defgroup  XIP_SFLASH_EXT_Public_Types
+ *  @{
+ */
+
+/*@} end of group XIP_SFLASH_EXT_Public_Types */
+
+/** @defgroup  XIP_SFLASH_EXT_Public_Constants
+ *  @{
+ */
+
+/*@} end of group XIP_SFLASH_EXT_Public_Constants */
+
+/** @defgroup  XIP_SFLASH_EXT_Public_Macros
+ *  @{
+ */
+
+/*@} end of group XIP_SFLASH_EXT_Public_Macros */
+
+/** @defgroup  XIP_SFLASH_EXT_Public_Functions
+ *  @{
+ */
+
+BL_Err_Type XIP_SFlash_Init(SPI_Flash_Cfg_Type *pFlashCfg);
+int XIP_SFlash_Read(uint32_t addr, uint8_t *dst, int len);
+int XIP_SFlash_Write(uint32_t addr, uint8_t *src, int len);
+int XIP_SFlash_Erase(uint32_t addr, int len);
+
+/*@} end of group XIP_SFLASH_EXT_Public_Functions */
+
+/*@} end of group XIP_SFLASH */
+
+/*@} end of group BL702_Peripheral_Driver */
+
+#endif /* __BL702_XIP_SFLASH_EXT_H__ */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_acomp.c b/drivers/bl702_driver/std_drv/src/bl702_acomp.c
new file mode 100644
index 00000000..78c7c171
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_acomp.c
@@ -0,0 +1,201 @@
+/**
+  ******************************************************************************
+  * @file    bl702_acomp.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_acomp.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  ACOMP
+ *  @{
+ */
+
+/** @defgroup  ACOMP_Private_Macros
+ *  @{
+ */
+
+/*@} end of group ACOMP_Private_Macros */
+
+/** @defgroup  ACOMP_Private_Types
+ *  @{
+ */
+
+/*@} end of group ACOMP_Private_Types */
+
+/** @defgroup  ACOMP_Private_Variables
+ *  @{
+ */
+
+/*@} end of group ACOMP_Private_Variables */
+
+/** @defgroup  ACOMP_Global_Variables
+ *  @{
+ */
+
+/*@} end of group ACOMP_Global_Variables */
+
+/** @defgroup  ACOMP_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group ACOMP_Private_Fun_Declaration */
+
+/** @defgroup  ACOMP_Private_Functions
+ *  @{
+ */
+
+/*@} end of group ACOMP_Private_Functions */
+
+/** @defgroup  ACOMP_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Analog compare init
+ *
+ * @param  acompNo: Compare ID
+ * @param  cfg: Compare consideration pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void AON_ACOMP_Init(AON_ACOMP_ID_Type acompNo,AON_ACOMP_CFG_Type *cfg)
+{
+    uint32_t tmpVal = 0;
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_AON_ACOMP_ID_TYPE(acompNo));
+    
+    if(acompNo==AON_ACOMP0_ID){
+        /* Disable ACOMP first */
+        tmpVal=BL_RD_REG(AON_BASE,AON_ACOMP0_CTRL);
+        tmpVal=BL_CLR_REG_BIT(tmpVal,AON_ACOMP0_EN);
+        tmpVal=BL_WR_REG(AON_BASE,AON_ACOMP0_CTRL,tmpVal);
+        
+        /* Set ACOMP config */
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_ACOMP0_MUXEN,cfg->muxEn);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_ACOMP0_POS_SEL,cfg->posChanSel);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_ACOMP0_NEG_SEL,cfg->negChanSel);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_ACOMP0_LEVEL_SEL,cfg->levelFactor);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_ACOMP0_BIAS_PROG,cfg->biasProg);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_ACOMP0_HYST_SELP,cfg->hysteresisPosVolt);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_ACOMP0_HYST_SELN,cfg->hysteresisNegVolt);
+        
+        tmpVal=BL_WR_REG(AON_BASE,AON_ACOMP0_CTRL,tmpVal);
+    
+    }else{
+        /* Disable ACOMP first */
+        tmpVal=BL_RD_REG(AON_BASE,AON_ACOMP1_CTRL);
+        tmpVal=BL_CLR_REG_BIT(tmpVal,AON_ACOMP1_EN);
+        tmpVal=BL_WR_REG(AON_BASE,AON_ACOMP1_CTRL,tmpVal);
+        
+        /* Set ACOMP config */
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_ACOMP1_MUXEN,cfg->muxEn);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_ACOMP1_POS_SEL,cfg->posChanSel);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_ACOMP1_NEG_SEL,cfg->negChanSel);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_ACOMP1_LEVEL_SEL,cfg->levelFactor);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_ACOMP1_BIAS_PROG,cfg->biasProg);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_ACOMP1_HYST_SELP,cfg->hysteresisPosVolt);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_ACOMP1_HYST_SELN,cfg->hysteresisNegVolt);
+        
+        tmpVal=BL_WR_REG(AON_BASE,AON_ACOMP1_CTRL,tmpVal);
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Analog compare enable
+ *
+ * @param  acompNo: Compare ID
+ *
+ * @return None
+ *
+*******************************************************************************/
+void AON_ACOMP_Enable(AON_ACOMP_ID_Type acompNo)
+{
+    uint32_t tmpVal = 0;
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_AON_ACOMP_ID_TYPE(acompNo));
+    
+    if(acompNo==AON_ACOMP0_ID){
+        tmpVal=BL_RD_REG(AON_BASE,AON_ACOMP0_CTRL);
+        tmpVal=BL_SET_REG_BIT(tmpVal,AON_ACOMP0_EN);
+        tmpVal=BL_WR_REG(AON_BASE,AON_ACOMP0_CTRL,tmpVal);
+    }else{
+        tmpVal=BL_RD_REG(AON_BASE,AON_ACOMP1_CTRL);
+        tmpVal=BL_SET_REG_BIT(tmpVal,AON_ACOMP1_EN);
+        tmpVal=BL_WR_REG(AON_BASE,AON_ACOMP1_CTRL,tmpVal);
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Analog compare enable
+ *
+ * @param  acompNo: Compare ID
+ *
+ * @return SET or RESET
+ *
+*******************************************************************************/
+BL_Sts_Type AON_ACOMP_Get_Result(AON_ACOMP_ID_Type acompNo)
+{
+    uint32_t tmpVal = 0;
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_AON_ACOMP_ID_TYPE(acompNo));
+    
+    tmpVal=BL_RD_REG(AON_BASE,AON_ACOMP_CTRL);
+    /* Disable ACOMP first */
+    if(acompNo==AON_ACOMP0_ID){
+        if(BL_IS_REG_BIT_SET(tmpVal,AON_ACOMP0_OUT_RAW)){
+            return SET;
+        }else{
+            return RESET;
+        }
+    }else{
+        if(BL_IS_REG_BIT_SET(tmpVal,AON_ACOMP1_OUT_RAW)){
+            return SET;
+        }else{
+            return RESET;
+        }
+    }
+}
+
+/*@} end of group ACOMP_Public_Functions */
+
+/*@} end of group ACOMP */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_adc.c b/drivers/bl702_driver/std_drv/src/bl702_adc.c
new file mode 100644
index 00000000..5f673f9c
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_adc.c
@@ -0,0 +1,1400 @@
+/**
+  ******************************************************************************
+  * @file    bl702_adc.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_adc.h"
+#include "bl702_ef_ctrl.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  ADC
+ *  @{
+ */
+
+/** @defgroup  ADC_Private_Macros
+ *  @{
+ */
+#undef MSG
+#define MSG(...)
+#define AON_CLK_SET_DUMMY_WAIT          {__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();}
+#define ADC_RESTART_DUMMY_WAIT          BL702_Delay_US(100)
+
+/*@} end of group ADC_Private_Macros */
+
+/** @defgroup  ADC_Private_Types
+ *  @{
+ */
+
+/*@} end of group ADC_Private_Types */
+
+/** @defgroup  ADC_Private_Variables
+ *  @{
+ */
+static intCallback_Type * adcIntCbfArra[ADC_INT_ALL]={NULL};
+static ADC_Gain_Coeff_Type adcGainCoeffCal = {
+    .adcGainCoeffEnable = DISABLE,
+    .adcgainCoeffVal = 0,
+    .coe=1,
+};
+
+/*@} end of group ADC_Private_Variables */
+
+/** @defgroup  ADC_Global_Variables
+ *  @{
+ */
+
+/*@} end of group ADC_Global_Variables */
+
+/** @defgroup  ADC_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group ADC_Private_Fun_Declaration */
+
+/** @defgroup  ADC_Private_Functions
+ *  @{
+ */
+
+/*@} end of group ADC_Private_Functions */
+
+/** @defgroup  ADC_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Software reset the whole ADC
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ADC_Reset(void)
+{
+    uint32_t regCmd;
+    
+    /* reset ADC */
+    regCmd=BL_RD_REG(AON_BASE,AON_GPADC_REG_CMD);
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_CMD,BL_SET_REG_BIT(regCmd,AON_GPADC_SOFT_RST));
+    AON_CLK_SET_DUMMY_WAIT;
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_CMD,BL_CLR_REG_BIT(regCmd,AON_GPADC_SOFT_RST));
+}
+
+/****************************************************************************//**
+ * @brief  ADC glable enable
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ADC_Enable(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_CMD);
+    tmpVal=BL_SET_REG_BIT(tmpVal,AON_GPADC_GLOBAL_EN);
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_CMD,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  ADC glable disable
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ADC_Disable(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_CMD);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_GLOBAL_EN);
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_CMD,tmpVal);
+}
+
+
+/****************************************************************************//**
+ * @brief  ADC normal mode init
+ *
+ * @param  cfg: ADC normal mode configuration
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ADC_Init(ADC_CFG_Type* cfg)
+{
+    uint32_t regCfg1;
+    uint32_t regCfg2;
+    uint32_t regCalib;
+
+    CHECK_PARAM(IS_ADC_V18_SEL_TYPE(cfg->v18Sel));
+    CHECK_PARAM(IS_ADC_V11_SEL_TYPE(cfg->v11Sel));
+    CHECK_PARAM(IS_ADC_CLK_TYPE(cfg->clkDiv));
+    CHECK_PARAM(IS_ADC_PGA_GAIN_TYPE(cfg->gain1));
+    CHECK_PARAM(IS_ADC_PGA_GAIN_TYPE(cfg->gain2));
+    CHECK_PARAM(IS_ADC_CHOP_MOD_TYPE(cfg->chopMode));    
+    CHECK_PARAM(IS_ADC_BIAS_SEL_TYPE(cfg->biasSel));
+    CHECK_PARAM(IS_ADC_PGA_VCM_TYPE(cfg->vcm));
+    CHECK_PARAM(IS_ADC_VREF_TYPE(cfg->vref));
+    CHECK_PARAM(IS_ADC_SIG_INPUT_TYPE(cfg->inputMode));
+    CHECK_PARAM(IS_ADC_DATA_WIDTH_TYPE(cfg->resWidth));
+    
+    /* config 1 */
+    regCfg1=BL_RD_REG(AON_BASE,AON_GPADC_REG_CONFIG1);
+    regCfg1=BL_SET_REG_BITS_VAL(regCfg1,AON_GPADC_V18_SEL,cfg->v18Sel);
+    regCfg1=BL_SET_REG_BITS_VAL(regCfg1,AON_GPADC_V11_SEL,cfg->v11Sel);
+    regCfg1=BL_CLR_REG_BIT(regCfg1,AON_GPADC_DITHER_EN);
+    regCfg1=BL_CLR_REG_BIT(regCfg1,AON_GPADC_SCAN_EN);
+    regCfg1=BL_SET_REG_BITS_VAL(regCfg1,AON_GPADC_SCAN_LENGTH,0);
+    regCfg1=BL_SET_REG_BITS_VAL(regCfg1,AON_GPADC_CLK_DIV_RATIO,cfg->clkDiv);
+    regCfg1=BL_CLR_REG_BIT(regCfg1,AON_GPADC_CLK_ANA_INV);
+    regCfg1=BL_SET_REG_BITS_VAL(regCfg1,AON_GPADC_CAL_OS_EN,cfg->offsetCalibEn);
+    regCfg1=BL_SET_REG_BITS_VAL(regCfg1,AON_GPADC_RES_SEL,cfg->resWidth);
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_CONFIG1,regCfg1);
+    AON_CLK_SET_DUMMY_WAIT;
+    
+    /* config 2 */
+    regCfg2=BL_RD_REG(AON_BASE,AON_GPADC_REG_CONFIG2);
+    regCfg2=BL_SET_REG_BITS_VAL(regCfg2,AON_GPADC_DLY_SEL,0x02);
+    regCfg2=BL_SET_REG_BITS_VAL(regCfg2,AON_GPADC_PGA1_GAIN,cfg->gain1);
+    regCfg2=BL_SET_REG_BITS_VAL(regCfg2,AON_GPADC_PGA2_GAIN,cfg->gain2);
+    regCfg2=BL_SET_REG_BITS_VAL(regCfg2,AON_GPADC_BIAS_SEL,cfg->biasSel);
+    regCfg2=BL_SET_REG_BITS_VAL(regCfg2,AON_GPADC_CHOP_MODE,cfg->chopMode);
+    /* pga_vcmi_en is for mic */
+    regCfg2=BL_CLR_REG_BIT(regCfg2,AON_GPADC_PGA_VCMI_EN);
+    if((cfg->gain1!=ADC_PGA_GAIN_NONE)||(cfg->gain2!=ADC_PGA_GAIN_NONE)){
+        regCfg2=BL_SET_REG_BIT(regCfg2,AON_GPADC_PGA_EN);
+    }else{
+        regCfg2=BL_CLR_REG_BIT(regCfg2,AON_GPADC_PGA_EN);
+    }
+    /* pga_os_cal is for mic */
+    regCfg2=BL_SET_REG_BITS_VAL(regCfg2,AON_GPADC_PGA_OS_CAL,8);
+    regCfg2=BL_SET_REG_BITS_VAL(regCfg2,AON_GPADC_PGA_VCM,cfg->vcm);
+    regCfg2=BL_SET_REG_BITS_VAL(regCfg2,AON_GPADC_VREF_SEL,cfg->vref);
+    regCfg2=BL_SET_REG_BITS_VAL(regCfg2,AON_GPADC_DIFF_MODE,cfg->inputMode);
+
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_CONFIG2,regCfg2);
+    
+    /* calibration offset */
+    regCalib=BL_RD_REG(AON_BASE,AON_GPADC_REG_DEFINE);
+    regCalib=BL_SET_REG_BITS_VAL(regCalib,AON_GPADC_OS_CAL_DATA,cfg->offsetCalibVal);
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_DEFINE,regCalib);
+
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(GPADC_DMA_IRQn,GPADC_DMA_IRQHandler);
+#endif
+
+	ADC_Gain_Trim();
+}
+
+/****************************************************************************//**
+ * @brief  ADC normal mode channel config
+ *
+ * @param  posCh: ADC pos channel type
+ * @param  negCh: ADC neg channel type
+ * @param  contEn: ENABLE or DISABLE continuous mode
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ADC_Channel_Config(ADC_Chan_Type posCh,ADC_Chan_Type negCh,BL_Fun_Type contEn)
+{
+    uint32_t regCmd;
+    uint32_t regCfg1;
+    
+    CHECK_PARAM(IS_AON_ADC_CHAN_TYPE(posCh));
+    CHECK_PARAM(IS_AON_ADC_CHAN_TYPE(negCh));
+    
+    /* set channel */
+    regCmd=BL_RD_REG(AON_BASE,AON_GPADC_REG_CMD);
+    regCmd=BL_SET_REG_BITS_VAL(regCmd,AON_GPADC_POS_SEL,posCh);
+    regCmd=BL_SET_REG_BITS_VAL(regCmd,AON_GPADC_NEG_SEL,negCh);
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_CMD,regCmd);
+    
+    /* set continuous mode */
+    regCfg1=BL_RD_REG(AON_BASE,AON_GPADC_REG_CONFIG1);
+    regCfg1=BL_SET_REG_BITS_VAL(regCfg1,AON_GPADC_CONT_CONV_EN,contEn);
+    regCfg1=BL_CLR_REG_BIT(regCfg1,AON_GPADC_SCAN_EN);
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_CONFIG1,regCfg1);
+
+}
+
+/****************************************************************************//**
+ * @brief  ADC scan mode channel config
+ *
+ * @param  posChList[]: ADC pos channel list type
+ * @param  negChList[]: ADC neg channel list type
+ * @param  scanLength: ADC scan length
+ * @param  contEn: ENABLE or DISABLE continuous mode
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ADC_Scan_Channel_Config(ADC_Chan_Type posChList[],ADC_Chan_Type negChList[],uint8_t scanLength,BL_Fun_Type contEn)
+{
+    uint32_t tmpVal,i;
+    uint32_t dealLen;
+    
+    CHECK_PARAM((scanLength<13));
+    
+    /* Deal with the first 6 */
+    dealLen=6;
+    if(scanLengthdealLen){
+        tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_SCN_POS2);
+        for(i=0;ififoThreshold));
+
+    /*
+     *  DMA enable : ,When the fifo data is exceeded to fifoThreshold DMA request will occur
+     *  DMA disable : fifoThreshold determine how many data will raise FIFO ready interrupt
+     */
+    
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GPIP_GPADC_FIFO_THL,fifoCfg->fifoThreshold);
+    
+    /* Enable DMA */
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GPIP_GPADC_DMA_EN,fifoCfg->dmaEn);
+    
+    BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+
+    /* clear fifo by SET GPIP_GPADC_FIFO_CLR bit*/
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);
+    tmpVal=BL_SET_REG_BIT(tmpVal,GPIP_GPADC_FIFO_CLR);
+    BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+
+}
+
+/****************************************************************************//**
+ * @brief  ADC get DMA FIFO data count
+ *
+ * @param  None
+ *
+ * @return data count in FIFO
+ *
+*******************************************************************************/
+uint8_t ADC_Get_FIFO_Count(void)
+{
+    uint32_t tmpVal;
+     
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);
+    
+    return BL_GET_REG_BITS_VAL(tmpVal,GPIP_GPADC_FIFO_DATA_COUNT);
+}
+
+/****************************************************************************//**
+ * @brief  ADC get DMA FIFO full status
+ *
+ * @param  None
+ *
+ * @return SET or RESET
+ *
+*******************************************************************************/
+BL_Sts_Type ADC_FIFO_Is_Full(void)
+{
+    uint32_t tmpVal;
+     
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);
+    
+    if(BL_IS_REG_BIT_SET(tmpVal,GPIP_GPADC_FIFO_FULL)){
+        return SET;
+    }else{
+        return RESET;
+    }
+}
+
+/****************************************************************************//**
+ * @brief  ADC get DMA FIFO empty status
+ *
+ * @param  None
+ *
+ * @return SET or RESET
+ *
+*******************************************************************************/
+BL_Sts_Type ADC_FIFO_Is_Empty(void)
+{
+    uint32_t tmpVal;
+     
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);
+    
+    if(BL_IS_REG_BIT_SET(tmpVal,GPIP_GPADC_FIFO_NE)){
+        return RESET;
+    }else{
+        return SET;
+    }
+}
+
+
+
+
+/****************************************************************************//**
+ * @brief  ADC read DMA FIFO data
+ *
+ * @param  None
+ *
+ * @return ADC result if return 0 that means this is error data,user should ignore this data.
+ *
+*******************************************************************************/
+uint32_t ADC_Read_FIFO(void)
+{
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_DMA_RDATA);
+
+    return (tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  ADC parse result
+ *
+ * @param  orgVal: Original A to D value
+ * @param  len: Original AD vaule count
+ * @param  result: Final Result array pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ADC_Parse_Result(uint32_t *orgVal,uint32_t len,ADC_Result_Type *result)
+{
+    uint8_t neg=0;
+    uint32_t tmpVal1=0,tmpVal2=0;
+    ADC_Data_Width_Type dataType;
+    ADC_SIG_INPUT_Type sigType;
+    float ref=2.0;
+    uint32_t i=0;
+
+    float coe=1.0;
+
+    if(adcGainCoeffCal.adcGainCoeffEnable){
+        coe=adcGainCoeffCal.coe;
+    }
+
+    tmpVal1=BL_RD_REG(AON_BASE,AON_GPADC_REG_CONFIG1);
+    tmpVal2=BL_RD_REG(AON_BASE,AON_GPADC_REG_CONFIG2);
+    dataType=BL_GET_REG_BITS_VAL(tmpVal1,AON_GPADC_RES_SEL);
+    sigType=BL_GET_REG_BITS_VAL(tmpVal2,AON_GPADC_DIFF_MODE);
+
+    if(BL_GET_REG_BITS_VAL(tmpVal2,AON_GPADC_VREF_SEL)==ADC_VREF_3P3V){
+        ref=3.3;
+    }
+    if(sigType==ADC_INPUT_SINGLE_END){
+        for(i=0;i>21;
+            result[i].negChan=-1;
+            if(dataType==ADC_DATA_WIDTH_12){
+                result[i].value=(unsigned int)(((orgVal[i]&0xffff)>>4)/coe);
+                result[i].volt=result[i].value/4096.0*ref;
+            }else if(dataType==ADC_DATA_WIDTH_14_WITH_16_AVERAGE){
+                result[i].value=(unsigned int)(((orgVal[i]&0xffff)>>2)/coe);
+                result[i].volt=result[i].value/16384.0*ref;
+            }else if(dataType==ADC_DATA_WIDTH_16_WITH_64_AVERAGE||dataType==ADC_DATA_WIDTH_16_WITH_256_AVERAGE){
+                result[i].value=(unsigned int)((orgVal[i]&0xffff)/coe);
+                result[i].volt=result[i].value/65536.0*ref;
+            }
+        }
+    }else{
+        for(i=0;i>21;
+            result[i].negChan=(orgVal[i]>>16)&0x1F;
+
+            if(orgVal[i]&0x8000){
+                orgVal[i] = ~orgVal[i];
+                orgVal[i] += 1;
+                neg = 1;
+            }
+            if(dataType==ADC_DATA_WIDTH_12){
+                result[i].value=(unsigned int)(((orgVal[i]&0xffff)>>4)/coe);
+                result[i].volt=result[i].value/2048.0*ref;
+            }else if(dataType==ADC_DATA_WIDTH_14_WITH_16_AVERAGE){
+                result[i].value=(unsigned int)(((orgVal[i]&0xffff)>>2)/coe);
+                result[i].volt=result[i].value/8192.0*ref;
+            }else if(dataType==ADC_DATA_WIDTH_16_WITH_64_AVERAGE||dataType==ADC_DATA_WIDTH_16_WITH_256_AVERAGE){
+                result[i].value=(unsigned int)((orgVal[i]&0xffff)/coe);
+                result[i].volt=result[i].value/32768.0*ref;
+            }
+            if(neg){
+                result[i].volt = - result[i].volt;
+            }
+        }
+    }
+}
+
+/****************************************************************************//**
+ * @brief  ADC mask or unmask certain or all interrupt
+ *
+ * @param  intType: interrupt type
+ * @param  intMask: mask or unmask
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ADC_IntMask(ADC_INT_Type intType, BL_Mask_Type intMask)
+{
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_GPIP_ADC_INT_TYPE(intType));
+    CHECK_PARAM(IS_BL_MASK_TYPE(intMask));
+    
+    switch(intType)
+    {
+        case ADC_INT_POS_SATURATION:
+            tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_ISR);
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_POS_SATUR_MASK);
+            }else{
+                /* Disable this interrupt */
+                tmpVal=BL_SET_REG_BIT(tmpVal,AON_GPADC_POS_SATUR_MASK);
+            }
+            BL_WR_REG(AON_BASE,AON_GPADC_REG_ISR,tmpVal);
+            break;
+        case ADC_INT_NEG_SATURATION:
+            tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_ISR);
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_NEG_SATUR_MASK);
+            }else{
+                /* Disable this interrupt */
+                tmpVal=BL_SET_REG_BIT(tmpVal,AON_GPADC_NEG_SATUR_MASK);
+            }
+            BL_WR_REG(AON_BASE,AON_GPADC_REG_ISR,tmpVal);
+            break;
+        case ADC_INT_FIFO_UNDERRUN:
+            tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG); 
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_FIFO_UNDERRUN_MASK);
+            }else{
+                /* Disable this interrupt */
+                tmpVal=BL_SET_REG_BIT(tmpVal,GPIP_GPADC_FIFO_UNDERRUN_MASK);
+            }
+            BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+            break;
+        case ADC_INT_FIFO_OVERRUN:
+            tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG); 
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_FIFO_OVERRUN_MASK);
+            }else{
+                /* Disable this interrupt */
+                tmpVal=BL_SET_REG_BIT(tmpVal,GPIP_GPADC_FIFO_OVERRUN_MASK);
+            }
+            BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+            break;
+        case ADC_INT_ADC_READY:
+            tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG); 
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_RDY_MASK);
+            }else{
+                /* Disable this interrupt */
+                tmpVal=BL_SET_REG_BIT(tmpVal,GPIP_GPADC_RDY_MASK);
+            }
+            BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+            break;
+        case ADC_INT_FIFO_READY:
+            tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG); 
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_FIFO_RDY_MASK);
+            }else{
+                /* Disable this interrupt */
+                tmpVal=BL_SET_REG_BIT(tmpVal,GPIP_GPADC_FIFO_RDY_MASK);
+            }
+            BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+            break;
+
+        case ADC_INT_ALL:
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal=BL_RD_REG(GPIP_BASE,AON_GPADC_REG_ISR);
+                tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_POS_SATUR_MASK);
+                tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_NEG_SATUR_MASK);
+                BL_WR_REG(AON_BASE,AON_GPADC_REG_ISR,tmpVal);
+                
+                tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);   
+                tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_FIFO_UNDERRUN_MASK);
+                tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_FIFO_OVERRUN_MASK);
+                tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_RDY_MASK);
+                BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+            }else{
+                /* Disable this interrupt */
+                tmpVal=BL_RD_REG(GPIP_BASE,AON_GPADC_REG_ISR);
+                tmpVal=BL_SET_REG_BIT(tmpVal,AON_GPADC_POS_SATUR_MASK);
+                tmpVal=BL_SET_REG_BIT(tmpVal,AON_GPADC_NEG_SATUR_MASK);
+                BL_WR_REG(AON_BASE,AON_GPADC_REG_ISR,tmpVal);
+                
+                tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG); 
+                tmpVal=BL_SET_REG_BIT(tmpVal,GPIP_GPADC_FIFO_OVERRUN_MASK);
+                tmpVal=BL_SET_REG_BIT(tmpVal,GPIP_GPADC_FIFO_UNDERRUN_MASK);
+                tmpVal=BL_SET_REG_BIT(tmpVal,GPIP_GPADC_RDY_MASK);
+                BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+            }
+            break;
+        default:
+            break;
+    }
+}
+
+/****************************************************************************//**
+ * @brief  ADC clear certain or all interrupt
+ *
+ * @param  intType: interrupt type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ADC_IntClr(ADC_INT_Type intType)
+{
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_GPIP_ADC_INT_TYPE(intType));
+    
+    switch(intType)
+    {
+        case ADC_INT_POS_SATURATION:
+            tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_ISR);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_POS_SATUR_CLR);
+            BL_WR_REG(AON_BASE,AON_GPADC_REG_ISR,tmpVal);
+            
+            tmpVal=BL_SET_REG_BIT(tmpVal,AON_GPADC_POS_SATUR_CLR);
+            BL_WR_REG(AON_BASE,AON_GPADC_REG_ISR,tmpVal);
+
+            /*Manual reset*/
+            tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_ISR);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_POS_SATUR_CLR);
+            BL_WR_REG(AON_BASE,AON_GPADC_REG_ISR,tmpVal);
+
+            break;
+        case ADC_INT_NEG_SATURATION:
+            tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_ISR);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_NEG_SATUR_CLR);
+            BL_WR_REG(AON_BASE,AON_GPADC_REG_ISR,tmpVal);            
+            
+            tmpVal=BL_SET_REG_BIT(tmpVal,AON_GPADC_NEG_SATUR_CLR);
+            BL_WR_REG(AON_BASE,AON_GPADC_REG_ISR,tmpVal);
+
+            /*Manual reset*/
+            tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_ISR);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_NEG_SATUR_CLR);
+            BL_WR_REG(AON_BASE,AON_GPADC_REG_ISR,tmpVal);
+
+            break;            
+        case ADC_INT_FIFO_UNDERRUN:
+            tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_FIFO_UNDERRUN_CLR);
+            BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+            
+            tmpVal=BL_SET_REG_BIT(tmpVal,GPIP_GPADC_FIFO_UNDERRUN_CLR);
+            BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+
+            /*Manual reset*/
+            tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_FIFO_UNDERRUN_CLR);
+            BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+
+            break;
+        case ADC_INT_FIFO_OVERRUN:
+            tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_FIFO_OVERRUN_CLR);
+            BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+            
+            tmpVal=BL_SET_REG_BIT(tmpVal,GPIP_GPADC_FIFO_OVERRUN_CLR);            
+            BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+
+            /*Manual reset*/
+            tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_FIFO_OVERRUN_CLR);
+            BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+
+            break;
+        case ADC_INT_ADC_READY:
+            tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_RDY_CLR);
+            BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+            
+            tmpVal=BL_SET_REG_BIT(tmpVal,GPIP_GPADC_RDY_CLR);
+            BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+
+            /*Manual reset*/
+            tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_RDY_CLR);
+            BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+            
+            break;
+        case ADC_INT_FIFO_READY:
+            tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_FIFO_RDY);
+            BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+            
+            tmpVal=BL_SET_REG_BIT(tmpVal,GPIP_GPADC_FIFO_RDY);
+            BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+
+            /*Manual reset*/
+            tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_FIFO_RDY);
+            BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+
+
+            break;
+        case ADC_INT_ALL:
+            tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_ISR);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_POS_SATUR_CLR);            
+            tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_NEG_SATUR_CLR);
+            BL_WR_REG(AON_BASE,AON_GPADC_REG_ISR,tmpVal);          
+                        
+            tmpVal=BL_SET_REG_BIT(tmpVal,AON_GPADC_POS_SATUR_CLR);
+            tmpVal=BL_SET_REG_BIT(tmpVal,AON_GPADC_NEG_SATUR_CLR);
+            BL_WR_REG(AON_BASE,AON_GPADC_REG_ISR,tmpVal);
+            
+            /*Manual reset*/
+            tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_ISR);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_POS_SATUR_CLR);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_NEG_SATUR_CLR);
+            BL_WR_REG(AON_BASE,AON_GPADC_REG_ISR,tmpVal);
+
+
+            tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);            
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_FIFO_UNDERRUN_CLR);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_FIFO_OVERRUN_CLR);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_RDY_CLR);            
+            BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+            
+            tmpVal=BL_SET_REG_BIT(tmpVal,GPIP_GPADC_FIFO_UNDERRUN_CLR);
+            tmpVal=BL_SET_REG_BIT(tmpVal,GPIP_GPADC_FIFO_OVERRUN_CLR);
+            tmpVal=BL_SET_REG_BIT(tmpVal,GPIP_GPADC_RDY_CLR);
+            BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+
+            /*Manual reset*/
+            tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_FIFO_UNDERRUN_CLR);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_FIFO_OVERRUN_CLR);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPADC_RDY_CLR);
+            BL_WR_REG(GPIP_BASE,GPIP_GPADC_CONFIG,tmpVal);
+
+
+            break;
+        default:
+            break;
+    }
+}
+
+/****************************************************************************//**
+ * @brief  ADC get interrupt status
+ *
+ * @param  intType: interrupt type
+ *
+ * @return SET or RESET
+ *
+*******************************************************************************/
+BL_Sts_Type ADC_GetIntStatus(ADC_INT_Type intType)
+{
+    uint32_t tmpVal;
+    BL_Sts_Type bitStatus = RESET;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_GPIP_ADC_INT_TYPE(intType));
+    
+    switch(intType)
+    {
+        case ADC_INT_POS_SATURATION:
+            tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_ISR);
+            bitStatus = (BL_IS_REG_BIT_SET(tmpVal,AON_GPADC_POS_SATUR))?SET:RESET;
+            break;
+        case ADC_INT_NEG_SATURATION:
+            tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_ISR);
+            bitStatus = (BL_IS_REG_BIT_SET(tmpVal,AON_GPADC_NEG_SATUR))?SET:RESET;
+            break;
+        case ADC_INT_FIFO_UNDERRUN:
+            tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);
+            bitStatus = (BL_IS_REG_BIT_SET(tmpVal,GPIP_GPADC_FIFO_UNDERRUN)) ? SET : RESET;
+            break;
+        case ADC_INT_FIFO_OVERRUN:
+            tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);
+            bitStatus = (BL_IS_REG_BIT_SET(tmpVal,GPIP_GPADC_FIFO_OVERRUN)) ? SET : RESET;
+            break;
+        case ADC_INT_ADC_READY:
+            tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);
+            bitStatus = (BL_IS_REG_BIT_SET(tmpVal,GPIP_GPADC_RDY)) ? SET : RESET;
+            break;
+        case ADC_INT_FIFO_READY:
+            tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPADC_CONFIG);
+            bitStatus = (BL_IS_REG_BIT_SET(tmpVal,GPIP_GPADC_FIFO_RDY)) ? SET : RESET;
+            break;
+        case ADC_INT_ALL:
+            break;
+        default:
+            break;
+    }
+    
+    return bitStatus;
+}
+
+/****************************************************************************//**
+ * @brief  ADC install interrupt callback
+ *
+ * @param  intType: ADC interrupt type
+ * @param  cbFun: ADC interrupt callback
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ADC_Int_Callback_Install(ADC_INT_Type intType,intCallback_Type* cbFun)
+{
+    /* Check the parameters */
+    CHECK_PARAM(IS_GPIP_ADC_INT_TYPE(intType));
+    
+    adcIntCbfArra[intType] = cbFun;
+}
+
+/****************************************************************************//**
+ * @brief  ADC DMA interrupt handler
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void GPADC_DMA_IRQHandler(void)
+{
+    if( ADC_GetIntStatus(ADC_INT_POS_SATURATION)==SET ){
+        ADC_IntClr(ADC_INT_POS_SATURATION);
+        if(adcIntCbfArra[ADC_INT_POS_SATURATION] != NULL){
+            adcIntCbfArra[ADC_INT_POS_SATURATION]();
+        }
+    }
+    if( ADC_GetIntStatus(ADC_INT_NEG_SATURATION)==SET ){
+        ADC_IntClr(ADC_INT_NEG_SATURATION);
+        if(adcIntCbfArra[ADC_INT_NEG_SATURATION] != NULL){
+            adcIntCbfArra[ADC_INT_NEG_SATURATION]();
+        }
+    }
+    
+    if( ADC_GetIntStatus(ADC_INT_FIFO_UNDERRUN)==SET ){
+        ADC_IntClr(ADC_INT_FIFO_UNDERRUN);
+        if(adcIntCbfArra[ADC_INT_FIFO_UNDERRUN] != NULL){
+            adcIntCbfArra[ADC_INT_FIFO_UNDERRUN]();
+        }
+    }
+    
+    if( ADC_GetIntStatus(ADC_INT_FIFO_OVERRUN)==SET ){
+        ADC_IntClr(ADC_INT_FIFO_OVERRUN);
+        if(adcIntCbfArra[ADC_INT_FIFO_OVERRUN] != NULL){
+            adcIntCbfArra[ADC_INT_FIFO_OVERRUN]();
+        }
+    }
+    
+    if( ADC_GetIntStatus(ADC_INT_FIFO_READY)==SET ){
+        ADC_IntClr(ADC_INT_FIFO_READY);
+        if(adcIntCbfArra[ADC_INT_FIFO_READY] != NULL){
+            adcIntCbfArra[ADC_INT_FIFO_READY]();
+        }
+    }
+
+    if( ADC_GetIntStatus(ADC_INT_FIFO_READY)==SET ){
+        ADC_IntClr(ADC_INT_FIFO_READY);
+        if(adcIntCbfArra[ADC_INT_FIFO_READY] != NULL){
+            adcIntCbfArra[ADC_INT_FIFO_READY]();
+        }
+    }
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  ADC VBAT enable
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ADC_Vbat_Enable(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_CONFIG2);
+    tmpVal=BL_SET_REG_BIT(tmpVal,AON_GPADC_VBAT_EN);
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_CONFIG2,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  ADC VBAT disable
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ADC_Vbat_Disable(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_CONFIG2);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_VBAT_EN);
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_CONFIG2,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  ADC TSEN Config
+ *
+ * @param  tsenMod: None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ADC_Tsen_Init(ADC_TSEN_MOD_Type tsenMod)
+{
+    uint32_t tmpVal;
+    
+    CHECK_PARAM(IS_AON_ADC_TSEN_MOD_TYPE(type));
+
+    /* config gpadc_reg_cmd */
+    tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_CMD);
+    /* enable sensor dc test mux*/
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_SEN_TEST_EN);
+    /*selected sen output current channel*/
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_GPADC_SEN_SEL,0);
+    /* enable chip sensor*/
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_CHIP_SEN_PU);
+    /*dwa_en */
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_GPADC_DWA_EN,1);
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_CMD,tmpVal);
+
+    /* config 2 */
+    tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_CONFIG2);
+    /*tsvbe low=0*/
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_TSVBE_LOW);
+    /*dly_sel=2*/
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_GPADC_DLY_SEL,2);
+    /*test_sel=0*/
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_GPADC_TEST_SEL,0);
+    /*test_en=0*/
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_TEST_EN);
+    /*ts_en*/
+    tmpVal=BL_SET_REG_BIT(tmpVal,AON_GPADC_TS_EN);
+    /*select tsen ext or inner*/
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_GPADC_TSEXT_SEL,tsenMod);
+
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_GPADC_PGA_VCM,2);
+    /*pga vcmi enable*/
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_PGA_VCMI_EN);
+    /*0:512uS;1:16mS;2:32mS;3:64mS*/
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_GPADC_PGA_OS_CAL,0);
+
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_CONFIG2,tmpVal);
+    
+    /* config 3 */
+    tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_CONFIG1);
+    /* set gpadc_dither_en */
+    tmpVal = BL_SET_REG_BIT(tmpVal,AON_GPADC_DITHER_EN);
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_CONFIG1,tmpVal);
+
+    /* set 4000F90C[19](gpadc_mic2_diff) = 1 
+     * debug advise form Ran 
+     * 2020.08.26
+     */
+    tmpVal = BL_RD_REG(AON_BASE,AON_GPADC_REG_CMD);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,AON_GPADC_MIC2_DIFF,1);
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_CMD,tmpVal);  
+}
+
+/****************************************************************************//**
+ * @brief  TSEN_Get_V_Error
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+uint32_t TSEN_Get_V_Error(void)
+{
+    uint32_t v0 = 0, v1 = 0;
+    uint32_t v_error = 0;
+    uint32_t regVal = 0;
+    ADC_Result_Type result;
+    uint32_t tmpVal;
+    uint8_t gainCalEnabled=0;
+
+    /* clear fifo by SET GPIP_GPADC_FIFO_CLR bit*/
+    tmpVal = BL_RD_REG(GPIP_BASE, GPIP_GPADC_CONFIG);
+    tmpVal = BL_SET_REG_BIT(tmpVal, GPIP_GPADC_FIFO_CLR);
+    BL_WR_REG(GPIP_BASE, GPIP_GPADC_CONFIG, tmpVal);
+
+    ADC_SET_TSVBE_LOW();
+
+    ADC_Start();
+    while (ADC_Get_FIFO_Count() == 0)
+        ;
+    regVal = ADC_Read_FIFO();
+    gainCalEnabled=adcGainCoeffCal.adcGainCoeffEnable;
+    adcGainCoeffCal.adcGainCoeffEnable=0;
+    ADC_Parse_Result(®Val, 1, &result);
+    adcGainCoeffCal.adcGainCoeffEnable=gainCalEnabled;
+    v0 = result.value;
+
+    /* clear fifo by SET GPIP_GPADC_FIFO_CLR bit*/
+    tmpVal = BL_RD_REG(GPIP_BASE, GPIP_GPADC_CONFIG);
+    tmpVal = BL_SET_REG_BIT(tmpVal, GPIP_GPADC_FIFO_CLR);
+    BL_WR_REG(GPIP_BASE, GPIP_GPADC_CONFIG, tmpVal);
+
+
+    ADC_SET_TSVBE_HIGH();
+
+    ADC_Start();
+    while (ADC_Get_FIFO_Count() == 0)
+        ;
+    regVal = ADC_Read_FIFO();    
+    gainCalEnabled=adcGainCoeffCal.adcGainCoeffEnable;
+    adcGainCoeffCal.adcGainCoeffEnable=0;
+    ADC_Parse_Result(®Val, 1, &result);
+    adcGainCoeffCal.adcGainCoeffEnable=gainCalEnabled;
+    v1 = result.value;
+
+    v_error = v0 - v1;
+
+    return v_error;
+	
+	
+}
+
+/****************************************************************************//**
+ * @brief  Trim TSEN
+ *
+ * @param  tsen_offset: None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_CLOCK_SECTION ADC_Trim_TSEN(uint16_t * tsen_offset)
+{
+    uint8_t average_index = 0;
+    uint32_t v_error_sum=0;
+    uint32_t tmpVal=0;
+    float A1=0.0,A2=0.0,C=0.0,delta=0.0;
+    Efuse_TSEN_Refcode_Corner_Type trim;
+    
+    EF_Ctrl_Read_TSEN_Trim(&trim);
+    
+    if(trim.tsenRefcodeCornerEn){
+        if(trim.tsenRefcodeCornerParity==EF_Ctrl_Get_Trim_Parity(trim.tsenRefcodeCorner,12)){
+            
+            MSG("TSEN ATE Version = %d\r\n",trim.tsenRefcodeCornerVersion);
+
+            *tsen_offset = trim.tsenRefcodeCorner;
+
+            if(trim.tsenRefcodeCornerVersion == 0){
+                /* debug advise by ran
+                 * 2020.9.04 
+                 */
+ 
+                //set 4000F90C[19](gpadc_mic2_diff) = 0
+                tmpVal = BL_RD_REG(AON_BASE,AON_GPADC_REG_CMD);
+                tmpVal = BL_SET_REG_BITS_VAL(tmpVal,AON_GPADC_MIC2_DIFF,0);
+                BL_WR_REG(AON_BASE,AON_GPADC_REG_CMD,tmpVal);   
+
+                for(average_index=0;average_index<50;average_index++){
+                    v_error_sum += TSEN_Get_V_Error();
+                }
+
+                v_error_sum /= 50;
+
+                MSG("A1 = %d\r\n",v_error_sum);
+                A1 = v_error_sum;
+
+                v_error_sum = 0;
+
+                //set 4000F90C[19](gpadc_mic2_diff) = 1
+                tmpVal = BL_RD_REG(AON_BASE,AON_GPADC_REG_CMD);
+                tmpVal = BL_SET_REG_BITS_VAL(tmpVal,AON_GPADC_MIC2_DIFF,1);
+                BL_WR_REG(AON_BASE,AON_GPADC_REG_CMD,tmpVal);   
+
+                for(average_index=0;average_index<50;average_index++){
+                    v_error_sum += TSEN_Get_V_Error();
+                }
+
+                v_error_sum /= 50;                
+
+                MSG("A2 = %d\r\n",v_error_sum);
+                A2 = v_error_sum;
+
+                MSG("C = %d\r\n",*tsen_offset);
+                C = *tsen_offset;
+
+                delta = A2 - (7.753 / 5.62 * A1) + 2.133 / 5.62 * C + 72;
+
+                MSG("delta=A2-7.753/5.62*A1+2.133/5.62*C+72x; delta = %d\r\n",(uint16_t)delta);
+
+                *tsen_offset = delta + C;
+
+            }
+            return SUCCESS;
+        }
+    }
+    
+    return ERROR;
+	
+	
+}
+
+/****************************************************************************//**
+ * @brief  SET ADC TSEN TSVBE LOW/HIGH
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ADC_SET_TSVBE_LOW(void)
+{
+    uint32_t tmpVal;
+    tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_CONFIG2);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_TSVBE_LOW);
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_CONFIG2,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  SET ADC TSEN TSVBE LOW/HIGH
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ADC_SET_TSVBE_HIGH(void)
+{
+    uint32_t tmpVal;
+    tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_CONFIG2);
+    tmpVal=BL_SET_REG_BIT(tmpVal,AON_GPADC_TSVBE_LOW);
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_CONFIG2,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  SET ADC TSEN TSVBE LOW/HIGH
+ *
+ * @param  tsen_offset: tsen_offset form efuse trim data
+ *
+ * @return tempture
+ *
+*******************************************************************************/
+float TSEN_Get_Temp(uint32_t tsen_offset)
+{
+    uint32_t v0 = 0, v1 = 0;
+    float temp = 0;
+    uint32_t regVal = 0;
+    ADC_Result_Type result;
+    uint32_t tmpVal;
+    uint8_t gainCalEnabled=0;
+
+    /* clear fifo by SET GPIP_GPADC_FIFO_CLR bit*/
+    tmpVal = BL_RD_REG(GPIP_BASE, GPIP_GPADC_CONFIG);
+    tmpVal = BL_SET_REG_BIT(tmpVal, GPIP_GPADC_FIFO_CLR);
+    BL_WR_REG(GPIP_BASE, GPIP_GPADC_CONFIG, tmpVal);
+
+    ADC_SET_TSVBE_LOW();
+
+    ADC_Start();
+    while (ADC_Get_FIFO_Count() == 0)
+        ;
+    regVal = ADC_Read_FIFO();
+    
+    gainCalEnabled=adcGainCoeffCal.adcGainCoeffEnable;
+    adcGainCoeffCal.adcGainCoeffEnable=0;
+    ADC_Parse_Result(®Val, 1, &result);
+    adcGainCoeffCal.adcGainCoeffEnable=gainCalEnabled;
+    v0 = result.value;
+
+    /* clear fifo by SET GPIP_GPADC_FIFO_CLR bit*/
+    tmpVal = BL_RD_REG(GPIP_BASE, GPIP_GPADC_CONFIG);
+    tmpVal = BL_SET_REG_BIT(tmpVal, GPIP_GPADC_FIFO_CLR);
+    BL_WR_REG(GPIP_BASE, GPIP_GPADC_CONFIG, tmpVal);
+
+
+    ADC_SET_TSVBE_HIGH();
+
+    ADC_Start();
+    while (ADC_Get_FIFO_Count() == 0)
+        ;
+    regVal = ADC_Read_FIFO();
+    gainCalEnabled=adcGainCoeffCal.adcGainCoeffEnable;
+    adcGainCoeffCal.adcGainCoeffEnable=0;
+    ADC_Parse_Result(®Val, 1, &result);
+    adcGainCoeffCal.adcGainCoeffEnable=gainCalEnabled;
+    v1 = result.value;
+
+    if (v0 > v1)
+    {
+        temp = (((float)v0 - (float)v1) - (float)tsen_offset) / 7.753;
+    }
+    else
+    {
+        temp = (((float)v1 - (float)v0) - (float)tsen_offset) / 7.753;
+    }
+
+    return temp;
+}
+
+
+/****************************************************************************//**
+ * @brief  ADC MIC Config
+ *
+ * @param  adc_mic_config: adc_mic_config
+ *
+ * @return success or not
+ *
+*******************************************************************************/
+BL_Err_Type ADC_Mic_Init(ADC_MIC_Type * adc_mic_config)
+{
+    uint32_t tmpVal1=0,tmpVal2=0;
+
+    CHECK_PARAM(IS_ADC_MICBOOST_DB_Type(adc_mic_config->micboostDb));
+    CHECK_PARAM(IS_PGA2_GAIN_Type(adc_mic_config->micPga2Gain));
+    CHECK_PARAM(IS_ADC_MIC_MODE_Type(adc_mic_config->mic1Mode));
+    CHECK_PARAM(IS_ADC_MIC_MODE_Type(adc_mic_config->mic2Mode));
+    CHECK_PARAM(IS_BL_Fun_Type(adc_mic_config->dwaEn));
+    CHECK_PARAM(IS_BL_Fun_Type(adc_mic_config->micboostBypassEn));
+    CHECK_PARAM(IS_BL_Fun_Type(adc_mic_config->micPgaEn));
+    CHECK_PARAM(IS_BL_Fun_Type(adc_mic_config->micBiasEn));
+
+    tmpVal2 = BL_RD_REG(AON_BASE,AON_GPADC_REG_CONFIG2);
+
+    tmpVal1=BL_RD_REG(AON_BASE,AON_GPADC_REG_CMD);
+    tmpVal1=BL_SET_REG_BITS_VAL(tmpVal1,AON_GPADC_MICBOOST_32DB_EN,adc_mic_config->micboostDb);
+    tmpVal1=BL_SET_REG_BITS_VAL(tmpVal1,AON_GPADC_MIC_PGA2_GAIN,adc_mic_config->micPga2Gain);
+    tmpVal1=BL_SET_REG_BITS_VAL(tmpVal1,AON_GPADC_MIC1_DIFF,adc_mic_config->mic1Mode);
+    tmpVal1=BL_SET_REG_BITS_VAL(tmpVal1,AON_GPADC_MIC2_DIFF,adc_mic_config->mic2Mode);
+    tmpVal1=BL_SET_REG_BITS_VAL(tmpVal1,AON_GPADC_DWA_EN,adc_mic_config->dwaEn);
+    tmpVal1=BL_SET_REG_BITS_VAL(tmpVal1,AON_GPADC_BYP_MICBOOST,adc_mic_config->micboostBypassEn);
+
+    if(BL_IS_REG_BIT_SET(tmpVal2,AON_GPADC_PGA_EN) && adc_mic_config->micPgaEn == ENABLE){
+        /* 0x4000F914[13] and 0x4000F90c[15] Cannot be both Enable*/
+        return ERROR;
+    }else{
+        tmpVal1=BL_SET_REG_BITS_VAL(tmpVal1,AON_GPADC_MICPGA_EN,adc_mic_config->micPgaEn);
+    }
+
+    tmpVal1=BL_SET_REG_BITS_VAL(tmpVal1,AON_GPADC_MICBIAS_EN,adc_mic_config->micBiasEn);
+
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_CMD,tmpVal1);    
+
+    return SUCCESS;
+
+}
+
+
+/****************************************************************************//**
+ * @brief  ADC MIC bias control
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ADC_MIC_Bias_Enable(void)
+{
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_CMD);
+    tmpVal=BL_SET_REG_BIT(tmpVal,AON_GPADC_MICBIAS_EN);
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_CMD,tmpVal);
+}
+
+
+/****************************************************************************//**
+ * @brief  ADC MIC bias control
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ADC_MIC_Bias_Disable(void)
+{
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(AON_BASE,AON_GPADC_REG_CMD);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_GPADC_MICBIAS_EN);
+    BL_WR_REG(AON_BASE,AON_GPADC_REG_CMD,tmpVal);
+}
+
+
+/****************************************************************************//**
+ * @brief  Trim ADC Gain
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_CLOCK_SECTION ADC_Gain_Trim(void)
+{
+    Efuse_ADC_Gain_Coeff_Type trim;
+    uint32_t tmp;
+    
+    EF_Ctrl_Read_ADC_Gain_Trim(&trim);
+    
+    if(trim.adcGainCoeffEn){
+        if(trim.adcGainCoeffParity==EF_Ctrl_Get_Trim_Parity(trim.adcGainCoeff,12)){
+            adcGainCoeffCal.adcGainCoeffEnable = ENABLE;
+            adcGainCoeffCal.adcgainCoeffVal = trim.adcGainCoeff;
+            tmp=adcGainCoeffCal.adcgainCoeffVal;
+            if(tmp & 0x800){
+                tmp = ~ tmp;
+                tmp += 1;
+                tmp = tmp&0xfff;
+                //printf("val==%08x\r\n",(unsigned int)tmp);
+                adcGainCoeffCal.coe=(1.0+((float)tmp/2048.0));
+                //printf("coe==%0f\r\n",adcGainCoeffCal.coe);
+            }else{
+                adcGainCoeffCal.coe=(1.0-((float)tmp/2048.0));    
+                //printf("coe==%0f\r\n",adcGainCoeffCal.coe);     
+            }
+
+            return SUCCESS;
+        }
+    }
+    
+    return ERROR;
+}
+
+/*@} end of group ADC_Public_Functions */
+
+/*@} end of group ADC */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_aon.c b/drivers/bl702_driver/std_drv/src/bl702_aon.c
new file mode 100644
index 00000000..27eff95c
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_aon.c
@@ -0,0 +1,508 @@
+/**
+  ******************************************************************************
+  * @file    bl702_aon.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_aon.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  AON
+ *  @{
+ */
+
+/** @defgroup  AON_Private_Macros
+ *  @{
+ */
+#define AON_CLK_SET_DUMMY_WAIT          {__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();}
+
+/*@} end of group AON_Private_Macros */
+
+/** @defgroup  AON_Private_Types
+ *  @{
+ */
+
+/*@} end of group AON_Private_Types */
+
+/** @defgroup  AON_Private_Variables
+ *  @{
+ */
+
+/*@} end of group AON_Private_Variables */
+
+/** @defgroup  AON_Global_Variables
+ *  @{
+ */
+
+/*@} end of group AON_Global_Variables */
+
+/** @defgroup  AON_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group AON_Private_Fun_Declaration */
+
+/** @defgroup  AON_Private_Functions
+ *  @{
+ */
+
+/*@} end of group AON_Private_Functions */
+
+/** @defgroup  AON_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Power on MXX band gap
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_CLOCK_SECTION AON_Power_On_MBG(void)
+{
+    uint32_t tmpVal = 0;
+    
+    /* Power up RF for PLL to work */
+    tmpVal=BL_RD_REG(AON_BASE,AON_RF_TOP_AON);
+    tmpVal=BL_SET_REG_BIT(tmpVal,AON_PU_MBG_AON);
+    BL_WR_REG(AON_BASE,AON_RF_TOP_AON,tmpVal);
+    
+    BL702_Delay_US(55);
+    
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Power off MXX band gap
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_CLOCK_SECTION AON_Power_Off_MBG(void)
+{
+    uint32_t tmpVal = 0;
+
+    /* Power OFF */
+    tmpVal=BL_RD_REG(AON_BASE,AON_RF_TOP_AON);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_PU_MBG_AON);
+    BL_WR_REG(AON_BASE,AON_RF_TOP_AON,tmpVal);
+    
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Power on XTAL
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_CLOCK_SECTION AON_Power_On_XTAL(void)
+{
+    uint32_t tmpVal = 0;
+    uint32_t timeOut=0;
+
+    tmpVal=BL_RD_REG(AON_BASE,AON_RF_TOP_AON);
+    tmpVal=BL_SET_REG_BIT(tmpVal,AON_PU_XTAL_AON);
+    tmpVal=BL_SET_REG_BIT(tmpVal,AON_PU_XTAL_BUF_AON);
+    BL_WR_REG(AON_BASE,AON_RF_TOP_AON,tmpVal);
+
+    /* Polling for ready */
+    do{
+        BL702_Delay_US(10);
+        timeOut++;
+        tmpVal=BL_RD_REG(AON_BASE,AON_TSEN);
+    }while(!BL_IS_REG_BIT_SET(tmpVal,AON_XTAL_RDY)&&timeOut<120);
+
+    if(timeOut>=120){
+        return TIMEOUT;
+    }
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Set XTAL cap code
+ *
+ * @param  capIn: Cap code in
+ * @param  capOut: Cap code out
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_CLOCK_SECTION AON_Set_Xtal_CapCode(uint8_t capIn,uint8_t capOut)
+{
+    uint32_t tmpVal = 0;
+    
+    tmpVal=BL_RD_REG(AON_BASE,AON_XTAL_CFG);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_XTAL_CAPCODE_IN_AON,capIn);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_XTAL_CAPCODE_OUT_AON,capOut);
+    BL_WR_REG(AON_BASE,AON_XTAL_CFG,tmpVal);
+
+    BL702_Delay_US(100);
+    
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Get XTAL cap code
+ *
+ * @param  None
+ *
+ * @return Cap code
+ *
+*******************************************************************************/
+uint8_t ATTR_CLOCK_SECTION AON_Get_Xtal_CapCode(void)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal=BL_RD_REG(AON_BASE,AON_XTAL_CFG);
+
+    return BL_GET_REG_BITS_VAL(tmpVal,AON_XTAL_CAPCODE_IN_AON);
+}
+
+/****************************************************************************//**
+ * @brief  Power off XTAL
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_CLOCK_SECTION AON_Power_Off_XTAL(void)
+{
+    uint32_t tmpVal = 0;
+    
+    tmpVal=BL_RD_REG(AON_BASE,AON_RF_TOP_AON);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_PU_XTAL_AON);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_PU_XTAL_BUF_AON);
+    BL_WR_REG(AON_BASE,AON_RF_TOP_AON,tmpVal);
+    
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Power on bandgap system
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION AON_Power_On_BG(void)
+{
+    uint32_t tmpVal = 0;
+    
+    /* power up RF for PLL to work */
+    tmpVal=BL_RD_REG(AON_BASE,AON_BG_SYS_TOP);
+    tmpVal=BL_SET_REG_BIT(tmpVal,AON_PU_BG_SYS_AON);
+    BL_WR_REG(AON_BASE,AON_BG_SYS_TOP,tmpVal);
+    
+    BL702_Delay_US(55);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Power off bandgap system
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION AON_Power_Off_BG(void)
+{
+    uint32_t tmpVal = 0;
+    
+    /* power up RF for PLL to work */
+    tmpVal=BL_RD_REG(AON_BASE,AON_BG_SYS_TOP);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_PU_BG_SYS_AON);
+    BL_WR_REG(AON_BASE,AON_BG_SYS_TOP,tmpVal);
+    
+    BL702_Delay_US(55);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Power on LDO11
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION AON_Power_On_LDO11_SOC(void)
+{
+    uint32_t tmpVal = 0;
+    
+    tmpVal=BL_RD_REG(AON_BASE,AON_LDO11SOC_AND_DCTEST);
+    tmpVal=BL_SET_REG_BIT(tmpVal,AON_PU_LDO11SOC_AON);
+    BL_WR_REG(AON_BASE,AON_LDO11SOC_AND_DCTEST,tmpVal);
+    
+    BL702_Delay_US(55);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Power off LDO11
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION AON_Power_Off_LDO11_SOC(void)
+{
+    uint32_t tmpVal = 0;
+    
+    tmpVal=BL_RD_REG(AON_BASE,AON_LDO11SOC_AND_DCTEST);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_PU_LDO11SOC_AON);
+    BL_WR_REG(AON_BASE,AON_LDO11SOC_AND_DCTEST,tmpVal);
+    
+    BL702_Delay_US(55);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Power on LDO15_RF
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION AON_Power_On_LDO15_RF(void)
+{
+    uint32_t tmpVal = 0;
+    
+    /* ldo15rf power on */
+    tmpVal=BL_RD_REG(AON_BASE,AON_RF_TOP_AON);
+    tmpVal=BL_SET_REG_BIT(tmpVal,AON_PU_LDO15RF_AON);
+    BL_WR_REG(AON_BASE,AON_RF_TOP_AON,tmpVal);
+    
+    BL702_Delay_US(90);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Power off LDO15_RF
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION AON_Power_Off_LDO15_RF(void)
+{
+    uint32_t tmpVal = 0;
+    
+    /* ldo15rf power off */
+    tmpVal=BL_RD_REG(AON_BASE,AON_RF_TOP_AON);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_PU_LDO15RF_AON);
+    BL_WR_REG(AON_BASE,AON_RF_TOP_AON,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  power on source follow regular
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION AON_Power_On_SFReg(void)
+{
+    uint32_t tmpVal = 0;
+    
+    /* power on sfreg */
+    tmpVal=BL_RD_REG(AON_BASE,AON_RF_TOP_AON);
+    tmpVal=BL_SET_REG_BIT(tmpVal,AON_PU_SFREG_AON);
+    BL_WR_REG(AON_BASE,AON_RF_TOP_AON,tmpVal);
+    
+    BL702_Delay_US(10);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  power off source follow regular
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION AON_Power_Off_SFReg(void)
+{
+    uint32_t tmpVal = 0;
+    
+    /* power off sfreg */
+    tmpVal=BL_RD_REG(AON_BASE,AON_RF_TOP_AON);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_PU_SFREG_AON);
+    BL_WR_REG(AON_BASE,AON_RF_TOP_AON,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Power off the power can be shut down in PDS0
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION AON_LowPower_Enter_PDS0(void)
+{
+    uint32_t tmpVal = 0;
+
+    /* power off bz */
+    tmpVal=BL_RD_REG(AON_BASE,AON_MISC);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_SW_BZ_EN_AON);
+    BL_WR_REG(AON_BASE,AON_MISC,tmpVal);
+
+    tmpVal=BL_RD_REG(AON_BASE,AON_RF_TOP_AON);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_PU_SFREG_AON);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_PU_LDO15RF_AON);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,AON_PU_MBG_AON);
+    BL_WR_REG(AON_BASE,AON_RF_TOP_AON,tmpVal);
+
+    /* gating Clock, no more use */
+    //tmpVal=BL_RD_REG(GLB_BASE,GLB_CGEN_CFG0);
+    //tmpVal=tmpVal&(~(1<<6));
+    //tmpVal=tmpVal&(~(1<<7));
+    //BL_WR_REG(GLB_BASE,GLB_CGEN_CFG0,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Power on the power powered down in PDS0
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION AON_LowPower_Exit_PDS0(void)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal=BL_RD_REG(AON_BASE,AON_RF_TOP_AON);
+
+    tmpVal=BL_SET_REG_BIT(tmpVal,AON_PU_MBG_AON);
+    BL_WR_REG(AON_BASE,AON_RF_TOP_AON,tmpVal);
+
+    BL702_Delay_US(20);
+
+    tmpVal=BL_SET_REG_BIT(tmpVal,AON_PU_LDO15RF_AON);
+    BL_WR_REG(AON_BASE,AON_RF_TOP_AON,tmpVal);
+
+    BL702_Delay_US(60);
+
+    tmpVal=BL_SET_REG_BIT(tmpVal,AON_PU_SFREG_AON);
+    BL_WR_REG(AON_BASE,AON_RF_TOP_AON,tmpVal);
+
+    BL702_Delay_US(20);
+
+    /* power on bz */
+    tmpVal=BL_RD_REG(AON_BASE,AON_MISC);
+    tmpVal=BL_SET_REG_BIT(tmpVal,AON_SW_BZ_EN_AON);
+    BL_WR_REG(AON_BASE,AON_MISC,tmpVal);
+
+    /* ungating Clock, no more use */
+    //tmpVal=BL_RD_REG(GLB_BASE,GLB_CGEN_CFG0);
+    //tmpVal=tmpVal|((1<<6));
+    //tmpVal=tmpVal|((1<<7));
+    //BL_WR_REG(GLB_BASE,GLB_CGEN_CFG0,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Power on the power powered down in PDS0
+ *
+ * @param  delay: None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION AON_Set_LDO11_SOC_Sstart_Delay(uint8_t delay)
+{
+    uint32_t tmpVal = 0;
+    
+    CHECK_PARAM((delay<=0x3));
+    
+    /* config ldo11soc_sstart_delay_aon */
+    tmpVal=BL_RD_REG(AON_BASE,AON_LDO11SOC_AND_DCTEST);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_LDO11SOC_SSTART_DELAY_AON,delay);
+    BL_WR_REG(AON_BASE,AON_LDO11SOC_AND_DCTEST,tmpVal);
+
+    return SUCCESS;
+}
+
+/*@} end of group AON_Public_Functions */
+
+/*@} end of group AON */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_cam.c b/drivers/bl702_driver/std_drv/src/bl702_cam.c
new file mode 100644
index 00000000..6b8c5ba3
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_cam.c
@@ -0,0 +1,700 @@
+/**
+  ******************************************************************************
+  * @file    bl702_cam.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702.h"
+#include "bl702_cam.h"
+#include "bl702_glb.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  CAM
+ *  @{
+ */
+
+/** @defgroup  CAM_Private_Macros
+ *  @{
+ */
+
+/*@} end of group CAM_Private_Macros */
+
+/** @defgroup  CAM_Private_Types
+ *  @{
+ */
+
+/*@} end of group CAM_Private_Types */
+
+/** @defgroup  CAM_Private_Variables
+ *  @{
+ */
+static intCallback_Type * camIntCbfArra[CAM_INT_ALL] = {NULL};
+
+
+/*@} end of group CAM_Private_Variables */
+
+/** @defgroup  CAM_Global_Variables
+ *  @{
+ */
+
+/*@} end of group CAM_Global_Variables */
+
+/** @defgroup  CAM_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group CAM_Private_Fun_Declaration */
+
+/** @defgroup  CAM_Private_Functions
+ *  @{
+ */
+
+/*@} end of group CAM_Private_Functions */
+
+/** @defgroup  CAM_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Camera module init
+ *
+ * @param  cfg: Camera configuration structure pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void CAM_Init(CAM_CFG_Type *cfg)
+{
+    uint32_t tmpVal;
+    
+    CHECK_PARAM(IS_CAM_SW_MODE_TYPE(cfg->swMode));
+    CHECK_PARAM(IS_CAM_FRAME_MODE_TYPE(cfg->frameMode));
+    CHECK_PARAM(IS_CAM_YUV_MODE_TYPE(cfg->yuvMode));
+    CHECK_PARAM(IS_CAM_FRAME_ACTIVE_POL(cfg->framePol));
+    CHECK_PARAM(IS_CAM_LINE_ACTIVE_POL(cfg->linePol));
+    CHECK_PARAM(IS_CAM_BURST_TYPE(cfg->burstType));
+    CHECK_PARAM(IS_CAM_SENSOR_MODE_TYPE(cfg->camSensorMode));
+    
+    /* Disable clock gate */
+    GLB_AHB_Slave1_Clock_Gate(DISABLE,BL_AHB_SLAVE1_CAM);
+    
+    /* Set camera configuration */
+    tmpVal=BL_RD_REG(CAM_BASE,CAM_DVP2AXI_CONFIGUE);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,CAM_REG_DVP_ENABLE);
+    BL_WR_REG(CAM_BASE,CAM_DVP2AXI_CONFIGUE,tmpVal);
+    
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,CAM_REG_SW_MODE,cfg->swMode);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,CAM_REG_INTERLV_MODE,cfg->frameMode);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,CAM_REG_FRAM_VLD_POL,cfg->framePol);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,CAM_REG_LINE_VLD_POL,cfg->linePol);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,CAM_REG_HBURST,cfg->burstType);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,CAM_REG_DVP_MODE,cfg->camSensorMode);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,CAM_REG_DVP_WAIT_CYCLE,cfg->waitCount);
+    
+    switch(cfg->yuvMode)
+    {
+        case CAM_YUV422:
+            tmpVal=BL_CLR_REG_BIT(tmpVal,CAM_REG_DROP_EN);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,CAM_REG_SUBSAMPLE_EN);
+            break;
+        case CAM_YUV420_EVEN:
+            tmpVal=BL_CLR_REG_BIT(tmpVal,CAM_REG_DROP_EN);
+            tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_SUBSAMPLE_EN);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,CAM_REG_SUBSAMPLE_EVEN);
+            break;
+        case CAM_YUV420_ODD:
+            tmpVal=BL_CLR_REG_BIT(tmpVal,CAM_REG_DROP_EN);
+            tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_SUBSAMPLE_EN);
+            tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_SUBSAMPLE_EVEN);
+            break;
+        case CAM_YUV400_EVEN:
+            tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_DROP_EN);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,CAM_REG_DROP_EVEN);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,CAM_REG_SUBSAMPLE_EN);
+            break;
+        case CAM_YUV400_ODD:
+            tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_DROP_EN);
+            tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_DROP_EVEN);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,CAM_REG_SUBSAMPLE_EN);
+            break;
+        default:
+            break;
+    }
+    
+    BL_WR_REG(CAM_BASE,CAM_DVP2AXI_CONFIGUE,tmpVal);
+    
+    /* Set frame count to issue interrupt at sw mode */
+    tmpVal = BL_RD_REG(CAM_BASE,CAM_INT_CONTROL);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,CAM_REG_FRAME_CNT_TRGR_INT,cfg->swIntCnt);
+    BL_WR_REG(CAM_BASE,CAM_INT_CONTROL,tmpVal);
+    
+    /* Set camera memory start address, memory size and frame size in burst */
+    BL_WR_REG(CAM_BASE,CAM_DVP2AHB_ADDR_START_0,cfg->memStart0&0xFFFFFFF0);
+    if(cfg->burstType==CAM_BURST_TYPE_SINGLE){
+        BL_WR_REG(CAM_BASE,CAM_DVP2AHB_MEM_BCNT_0,cfg->memSize0/4);
+        BL_WR_REG(CAM_BASE,CAM_DVP2AHB_FRAME_BCNT_0,cfg->frameSize0/4);
+    }else if(cfg->burstType==CAM_BURST_TYPE_INCR4){
+        BL_WR_REG(CAM_BASE,CAM_DVP2AHB_MEM_BCNT_0,cfg->memSize0/16);
+        BL_WR_REG(CAM_BASE,CAM_DVP2AHB_FRAME_BCNT_0,cfg->frameSize0/16);
+    }else if(cfg->burstType==CAM_BURST_TYPE_INCR8){
+        BL_WR_REG(CAM_BASE,CAM_DVP2AHB_MEM_BCNT_0,cfg->memSize0/32);
+        BL_WR_REG(CAM_BASE,CAM_DVP2AHB_FRAME_BCNT_0,cfg->frameSize0/32);
+    }else if(cfg->burstType==CAM_BURST_TYPE_INCR16){
+        BL_WR_REG(CAM_BASE,CAM_DVP2AHB_MEM_BCNT_0,cfg->memSize0/64);
+        BL_WR_REG(CAM_BASE,CAM_DVP2AHB_FRAME_BCNT_0,cfg->frameSize0/64);
+    }
+    if(!cfg->frameMode){
+        BL_WR_REG(CAM_BASE,CAM_DVP2AHB_ADDR_START_1,cfg->memStart1&0xFFFFFFF0);
+        if(cfg->burstType==CAM_BURST_TYPE_SINGLE){
+            BL_WR_REG(CAM_BASE,CAM_DVP2AHB_MEM_BCNT_1,cfg->memSize1/4);
+            BL_WR_REG(CAM_BASE,CAM_DVP2AHB_FRAME_BCNT_1,cfg->frameSize1/4);
+        }else if(cfg->burstType==CAM_BURST_TYPE_INCR4){
+            BL_WR_REG(CAM_BASE,CAM_DVP2AHB_MEM_BCNT_1,cfg->memSize1/16);
+            BL_WR_REG(CAM_BASE,CAM_DVP2AHB_FRAME_BCNT_1,cfg->frameSize1/16);
+        }else if(cfg->burstType==CAM_BURST_TYPE_INCR8){
+            BL_WR_REG(CAM_BASE,CAM_DVP2AHB_MEM_BCNT_1,cfg->memSize1/32);
+            BL_WR_REG(CAM_BASE,CAM_DVP2AHB_FRAME_BCNT_1,cfg->frameSize1/32);
+        }else if(cfg->burstType==CAM_BURST_TYPE_INCR16){
+            BL_WR_REG(CAM_BASE,CAM_DVP2AHB_MEM_BCNT_1,cfg->memSize1/64);
+            BL_WR_REG(CAM_BASE,CAM_DVP2AHB_FRAME_BCNT_1,cfg->frameSize1/64);
+        }
+    }
+    
+    /* Clear interrupt */
+    BL_WR_REG(CAM_BASE,CAM_DVP_FRAME_FIFO_POP,0xFFFF0);
+
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(CAM_IRQn,CAM_IRQHandler);
+#endif
+}
+
+/****************************************************************************//**
+ * @brief  Deinit camera module
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void CAM_Deinit(void)
+{
+    //GLB_AHB_Slave1_Reset(BL_AHB_SLAVE1_CAM);
+}
+
+/****************************************************************************//**
+ * @brief  Enable camera module
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void CAM_Enable(void)
+{    
+    uint32_t tmpVal;
+    
+    /* Enable camera module */
+    tmpVal=BL_RD_REG(CAM_BASE,CAM_DVP2AXI_CONFIGUE);
+    tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_DVP_ENABLE);
+    BL_WR_REG(CAM_BASE,CAM_DVP2AXI_CONFIGUE,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Disable camera module
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void CAM_Disable(void)
+{    
+    uint32_t tmpVal;
+    
+    /* Disable camera module */
+    tmpVal=BL_RD_REG(CAM_BASE,CAM_DVP2AXI_CONFIGUE);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,CAM_REG_DVP_ENABLE);
+    BL_WR_REG(CAM_BASE,CAM_DVP2AXI_CONFIGUE,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Camera clock gate function
+ *
+ * @param  enable: Enable or disable
+ *
+ * @return None
+ *
+*******************************************************************************/
+void CAM_Clock_Gate(BL_Fun_Type enable)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(CAM_BASE,CAM_DVP2AXI_CONFIGUE);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,CAM_REG_DVP_PIX_CLK_CG,enable);
+    BL_WR_REG(CAM_BASE,CAM_DVP2AXI_CONFIGUE,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Camera hsync crop function
+ *
+ * @param  start: Valid hsync start count
+ * @param  end: Valid hsync end count
+ *
+ * @return None
+ *
+*******************************************************************************/
+void CAM_Hsync_Crop(uint16_t start,uint16_t end)
+{
+    BL_WR_REG(CAM_BASE,CAM_HSYNC_CONTROL,(start<<16)+end);
+}
+
+/****************************************************************************//**
+ * @brief  Camera vsync crop function
+ *
+ * @param  start: Valid vsync start count
+ * @param  end: Valid vsync end count
+ *
+ * @return None
+ *
+*******************************************************************************/
+void CAM_Vsync_Crop(uint16_t start,uint16_t end)
+{
+    BL_WR_REG(CAM_BASE,CAM_VSYNC_CONTROL,(start<<16)+end);
+}
+
+/****************************************************************************//**
+ * @brief  Camera set total valid pix count in a line function
+ *
+ * @param  count: Count value
+ *
+ * @return None
+ *
+*******************************************************************************/
+void CAM_Set_Hsync_Total_Count(uint16_t count)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(CAM_BASE,CAM_FRAME_SIZE_CONTROL);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,CAM_REG_TOTAL_HCNT,count);
+    BL_WR_REG(CAM_BASE,CAM_FRAME_SIZE_CONTROL,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Camera set total valid line count in a frame function
+ *
+ * @param  count: Count value
+ *
+ * @return None
+ *
+*******************************************************************************/
+void CAM_Set_Vsync_Total_Count(uint16_t count)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(CAM_BASE,CAM_FRAME_SIZE_CONTROL);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,CAM_REG_TOTAL_VCNT,count);
+    BL_WR_REG(CAM_BASE,CAM_FRAME_SIZE_CONTROL,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Get one camera frame in interleave mode
+ *
+ * @param  info: Interleave mode camera frame infomation pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void CAM_Interleave_Get_Frame_Info(CAM_Interleave_Frame_Info *info)
+{
+    uint32_t tmpVal;
+        
+    tmpVal=BL_RD_REG(CAM_BASE,CAM_DVP_STATUS_AND_ERROR);
+    
+    info->validFrames=BL_GET_REG_BITS_VAL(tmpVal,CAM_FRAME_VALID_CNT_0);
+    info->curFrameAddr=BL_RD_REG(CAM_BASE,CAM_FRAME_START_ADDR0_0);
+    info->curFrameBytes=BL_RD_REG(CAM_BASE,CAM_FRAME_BYTE_CNT0_0);
+    info->status=tmpVal;
+}
+
+/****************************************************************************//**
+ * @brief  Get one camera frame in planar mode
+ *
+ * @param  info: Planar mode camera frame infomation pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void CAM_Planar_Get_Frame_Info(CAM_Planar_Frame_Info *info)
+{
+    uint32_t tmpVal;
+        
+    tmpVal=BL_RD_REG(CAM_BASE,CAM_DVP_STATUS_AND_ERROR);
+    
+    info->validFrames0=BL_GET_REG_BITS_VAL(tmpVal,CAM_FRAME_VALID_CNT_0);
+    info->validFrames1=BL_GET_REG_BITS_VAL(tmpVal,CAM_FRAME_VALID_CNT_1);
+    info->curFrameAddr0=BL_RD_REG(CAM_BASE,CAM_FRAME_START_ADDR0_0);
+    info->curFrameAddr1=BL_RD_REG(CAM_BASE,CAM_FRAME_START_ADDR1_0);
+    info->curFrameBytes0=BL_RD_REG(CAM_BASE,CAM_FRAME_BYTE_CNT0_0);
+    info->curFrameBytes1=BL_RD_REG(CAM_BASE,CAM_FRAME_BYTE_CNT1_0);
+    info->status=tmpVal;
+}
+
+/****************************************************************************//**
+ * @brief  Get available count 0 of frames
+ *
+ * @param  None
+ *
+ * @return Frames count
+ *
+*******************************************************************************/
+uint8_t CAM_Get_Frame_Count_0(void)
+{
+    return BL_GET_REG_BITS_VAL(BL_RD_REG(CAM_BASE,CAM_DVP_STATUS_AND_ERROR),CAM_FRAME_VALID_CNT_0);
+}
+
+/****************************************************************************//**
+ * @brief  Get available count 1 of frames
+ *
+ * @param  None
+ *
+ * @return Frames count
+ *
+*******************************************************************************/
+uint8_t CAM_Get_Frame_Count_1(void)
+{
+    return BL_GET_REG_BITS_VAL(BL_RD_REG(CAM_BASE,CAM_DVP_STATUS_AND_ERROR),CAM_FRAME_VALID_CNT_1);
+}
+
+/****************************************************************************//**
+ * @brief  Pop one camera frame in interleave mode
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void CAM_Interleave_Pop_Frame(void)
+{
+    /* Pop one frame */
+    BL_WR_REG(CAM_BASE,CAM_DVP_FRAME_FIFO_POP,1);
+}
+
+/****************************************************************************//**
+ * @brief  Pop one camera frame in planar mode
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void CAM_Planar_Pop_Frame(void)
+{
+    /* Pop one frame */
+    BL_WR_REG(CAM_BASE,CAM_DVP_FRAME_FIFO_POP,3);
+}
+
+/****************************************************************************//**
+ * @brief  CAMERA Enable Disable Interrupt
+ *
+ * @param  intType: CAMERA Interrupt Type
+ * @param  intMask: Enable or Disable
+ *
+ * @return None
+ *
+*******************************************************************************/
+void CAM_IntMask(CAM_INT_Type intType, BL_Mask_Type intMask)
+{
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_CAM_INT_TYPE(intType));
+    CHECK_PARAM(IS_BL_MASK_TYPE(intMask));
+
+    tmpVal=BL_RD_REG(CAM_BASE,CAM_INT_CONTROL);
+    switch(intType)
+    {
+        case CAM_INT_NORMAL_0:
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_INT_NORMAL_0_EN);
+            }else{
+                /* Disable this interrupt */
+                tmpVal=BL_CLR_REG_BIT(tmpVal,CAM_REG_INT_NORMAL_0_EN);
+            }
+            break;
+
+        case CAM_INT_NORMAL_1:
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_INT_NORMAL_1_EN);
+            }else{
+                /* Disable this interrupt */
+                tmpVal=BL_CLR_REG_BIT(tmpVal,CAM_REG_INT_NORMAL_1_EN);
+            }
+            break;
+
+        case CAM_INT_MEMORY_OVERWRITE_0:
+        case CAM_INT_MEMORY_OVERWRITE_1:
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_INT_MEM_EN);
+            }else{
+                /* Disable this interrupt */
+                tmpVal=BL_CLR_REG_BIT(tmpVal,CAM_REG_INT_MEM_EN);
+            }
+            break;
+
+        case CAM_INT_FRAME_OVERWRITE_0:
+        case CAM_INT_FRAME_OVERWRITE_1:
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_INT_FRAME_EN);
+            }else{
+                /* Disable this interrupt */
+                tmpVal=BL_CLR_REG_BIT(tmpVal,CAM_REG_INT_FRAME_EN);
+            }
+            break;
+
+        case CAM_INT_FIFO_OVERWRITE_0:
+        case CAM_INT_FIFO_OVERWRITE_1:
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_INT_FIFO_EN);
+            }else{
+                /* Disable this interrupt */
+                tmpVal=BL_CLR_REG_BIT(tmpVal,CAM_REG_INT_FIFO_EN);
+            }
+            break;
+
+        case CAM_INT_VSYNC_CNT_ERROR:
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_INT_VCNT_EN);
+            }else{
+                /* Disable this interrupt */
+                tmpVal=BL_CLR_REG_BIT(tmpVal,CAM_REG_INT_VCNT_EN);
+            }
+            break;
+
+        case CAM_INT_HSYNC_CNT_ERROR:
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_INT_HCNT_EN);
+            }else{
+                /* Disable this interrupt */
+                tmpVal=BL_CLR_REG_BIT(tmpVal,CAM_REG_INT_HCNT_EN);
+            }
+            break;
+
+        case CAM_INT_ALL:
+            if(intMask == UNMASK){
+                /* Enable all interrupt */
+                tmpVal |= 0x7F;
+            }else{
+                /* Disable all interrupt */
+                tmpVal &= 0xFFFFFF80;
+            }
+            break;
+
+        default:
+            break;
+    }
+    BL_WR_REG(CAM_BASE,CAM_INT_CONTROL,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  CAMERA Interrupt Clear
+ *
+ * @param  intType: CAMERA Interrupt Type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void CAM_IntClr(CAM_INT_Type intType)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(CAM_BASE,CAM_DVP_FRAME_FIFO_POP);
+    
+    switch(intType)
+    {
+        case CAM_INT_NORMAL_0:
+            tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_INT_NORMAL_CLR_0);
+            break;
+        case CAM_INT_NORMAL_1:
+            tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_INT_NORMAL_CLR_1);
+            break;
+        case CAM_INT_MEMORY_OVERWRITE_0:
+            tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_INT_MEM_CLR_0);
+            break;
+        case CAM_INT_MEMORY_OVERWRITE_1:
+            tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_INT_MEM_CLR_1);
+            break;
+        case CAM_INT_FRAME_OVERWRITE_0:
+            tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_INT_FRAME_CLR_0);
+            break;
+        case CAM_INT_FRAME_OVERWRITE_1:
+            tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_INT_FRAME_CLR_1);
+            break;
+        case CAM_INT_FIFO_OVERWRITE_0:
+            tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_INT_FIFO_CLR_0);
+            break;
+        case CAM_INT_FIFO_OVERWRITE_1:
+            tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_INT_FIFO_CLR_1);
+            break;
+        case CAM_INT_VSYNC_CNT_ERROR:
+            tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_INT_VCNT_CLR_0);
+            break;
+        case CAM_INT_HSYNC_CNT_ERROR:
+            tmpVal=BL_SET_REG_BIT(tmpVal,CAM_REG_INT_HCNT_CLR_0);
+            break;
+        case CAM_INT_ALL:
+            tmpVal=0xFFFF0;
+        default:
+            break;
+    }
+    BL_WR_REG(CAM_BASE,CAM_DVP_FRAME_FIFO_POP,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Install camera interrupt callback function
+ *
+ * @param  intType: CAMERA interrupt type
+ * @param  cbFun: Pointer to interrupt callback function. The type should be void (*fn)(void)
+ *
+ * @return None
+ *
+*******************************************************************************/
+void CAM_Int_Callback_Install(CAM_INT_Type intType,intCallback_Type* cbFun)
+{
+    /* Check the parameters */
+    CHECK_PARAM(IS_CAM_INT_TYPE(intType));
+
+    camIntCbfArra[intType] = cbFun;
+}
+
+/****************************************************************************//**
+ * @brief  Camera interrupt handler
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void CAM_IRQHandler(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(CAM_BASE,CAM_DVP_STATUS_AND_ERROR);
+    if(BL_IS_REG_BIT_SET(tmpVal,CAM_STS_NORMAL_INT_0)){
+        CAM_IntClr(CAM_INT_NORMAL_0);
+        if(camIntCbfArra[CAM_INT_NORMAL_0] != NULL) {
+            /* call the callback function */
+            camIntCbfArra[CAM_INT_NORMAL_0]();
+        }
+    }
+    if(BL_IS_REG_BIT_SET(tmpVal,CAM_STS_NORMAL_INT_1)){
+        CAM_IntClr(CAM_INT_NORMAL_1);
+        if(camIntCbfArra[CAM_INT_NORMAL_1] != NULL) {
+            /* call the callback function */
+            camIntCbfArra[CAM_INT_NORMAL_1]();
+        }
+    }
+    if(BL_IS_REG_BIT_SET(tmpVal,CAM_STS_MEM_INT_0)){
+        CAM_IntClr(CAM_INT_MEMORY_OVERWRITE_0);
+        if(camIntCbfArra[CAM_INT_MEMORY_OVERWRITE_0] != NULL) {
+            /* call the callback function */
+            camIntCbfArra[CAM_INT_MEMORY_OVERWRITE_0]();
+        }
+    }
+    if(BL_IS_REG_BIT_SET(tmpVal,CAM_STS_MEM_INT_1)){
+        CAM_IntClr(CAM_INT_MEMORY_OVERWRITE_1);
+        if(camIntCbfArra[CAM_INT_MEMORY_OVERWRITE_1] != NULL) {
+            /* call the callback function */
+            camIntCbfArra[CAM_INT_MEMORY_OVERWRITE_1]();
+        }
+    }
+    if(BL_IS_REG_BIT_SET(tmpVal,CAM_STS_FRAME_INT_0)){
+        CAM_IntClr(CAM_INT_FRAME_OVERWRITE_0);
+        if(camIntCbfArra[CAM_INT_FRAME_OVERWRITE_0] != NULL) {
+            /* call the callback function */
+            camIntCbfArra[CAM_INT_FRAME_OVERWRITE_0]();
+        }
+    }
+    if(BL_IS_REG_BIT_SET(tmpVal,CAM_STS_FRAME_INT_1)){
+        CAM_IntClr(CAM_INT_FRAME_OVERWRITE_1);
+        if(camIntCbfArra[CAM_INT_FRAME_OVERWRITE_1] != NULL) {
+            /* call the callback function */
+            camIntCbfArra[CAM_INT_FRAME_OVERWRITE_1]();
+        }
+    }
+    if(BL_IS_REG_BIT_SET(tmpVal,CAM_STS_FIFO_INT_0)){
+        CAM_IntClr(CAM_INT_FIFO_OVERWRITE_0);
+        if(camIntCbfArra[CAM_INT_FIFO_OVERWRITE_0] != NULL) {
+            /* call the callback function */
+            camIntCbfArra[CAM_INT_FIFO_OVERWRITE_0]();
+        }
+    }
+    if(BL_IS_REG_BIT_SET(tmpVal,CAM_STS_FIFO_INT_1)){
+        CAM_IntClr(CAM_INT_FIFO_OVERWRITE_1);
+        if(camIntCbfArra[CAM_INT_FIFO_OVERWRITE_1] != NULL) {
+            /* call the callback function */
+            camIntCbfArra[CAM_INT_FIFO_OVERWRITE_1]();
+        }
+    }
+    if(BL_IS_REG_BIT_SET(tmpVal,CAM_STS_HCNT_INT)){
+        CAM_IntClr(CAM_INT_HSYNC_CNT_ERROR);
+        if(camIntCbfArra[CAM_INT_HSYNC_CNT_ERROR] != NULL) {
+            /* call the callback function */
+            camIntCbfArra[CAM_INT_HSYNC_CNT_ERROR]();
+        }
+    }
+    if(BL_IS_REG_BIT_SET(tmpVal,CAM_STS_VCNT_INT)){
+        CAM_IntClr(CAM_INT_VSYNC_CNT_ERROR);
+        if(camIntCbfArra[CAM_INT_VSYNC_CNT_ERROR] != NULL) {
+            /* call the callback function */
+            camIntCbfArra[CAM_INT_VSYNC_CNT_ERROR]();
+        }
+    }
+}
+#endif
+
+/*@} end of group CAM_Public_Functions */
+
+/*@} end of group CAM */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_clock.c b/drivers/bl702_driver/std_drv/src/bl702_clock.c
new file mode 100644
index 00000000..29f079a6
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_clock.c
@@ -0,0 +1,166 @@
+/**
+  ******************************************************************************
+  * @file    bl702_clock.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_clock.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  CLOCK
+ *  @{
+ */
+
+/** @defgroup  CLOCK_Private_Macros
+ *  @{
+ */
+
+/*@} end of group CLOCK_Private_Macros */
+
+/** @defgroup  CLOCK_Private_Types
+ *  @{
+ */
+
+/*@} end of group CLOCK_Private_Types */
+
+/** @defgroup  CLOCK_Private_Variables
+ *  @{
+ */
+static Clock_Cfg_Type clkCfg;
+
+/*@} end of group CLOCK_Private_Variables */
+
+/** @defgroup  CLOCK_Global_Variables
+ *  @{
+ */
+
+/*@} end of group CLOCK_Global_Variables */
+
+/** @defgroup  CLOCK_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group CLOCK_Private_Fun_Declaration */
+
+/** @defgroup  CLOCK_Private_Functions
+ *  @{
+ */
+
+/*@} end of group CLOCK_Private_Functions */
+
+/** @defgroup  CLOCK_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Set System Clock
+ *
+ * @param  type: System clock type
+ * @param  clock: System clock value
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Clock_System_Clock_Set(BL_System_Clock_Type type,uint32_t clock)
+{
+    if(type
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+#include "l1c_reg.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Periph_Driver
+ *  @{
+ */
+
+/** @defgroup DRIVER_COMMON DRIVER_COMMON
+ *  @brief Digger driver common functions
+ *  @{
+ */
+
+/** @defgroup DRIVER_Private_Type
+ *  @{
+ */
+
+
+/*@} end of group DRIVER_Private_Type*/
+
+/** @defgroup DRIVER_Private_Defines
+ *  @{
+ */
+
+/*@} end of group DRIVER_Private_Defines */
+
+/** @defgroup DRIVER_Private_Variables
+ *  @{
+ */
+pFunc __Interrupt_Handlers[IRQn_LAST]={0};
+
+/*@} end of group DRIVER_Private_Variables */
+
+/** @defgroup DRIVER_Global_Variables
+ *  @{
+ */
+
+/*@} end of group DRIVER_Global_Variables */
+
+/** @defgroup DRIVER_Private_FunctionDeclaration
+ *  @{
+ */
+
+/*@} end of group DRIVER_Private_FunctionDeclaration */
+
+/** @defgroup DRIVER_Private_Functions
+ *  @{
+ */
+
+/*@} end of group DRIVER_Private_Functions */
+
+/** @defgroup DRIVER_Public_Functions
+ *  @{
+ */
+
+void Trap_Handler(void){
+    unsigned long cause;
+    unsigned long epc;
+    unsigned long tval;
+    uint8_t isecall=0;
+
+    MSG("Trap_Handler\r\n");
+
+    cause = read_csr(mcause);
+    MSG("mcause=%08x\r\n",(uint32_t)cause);
+    epc=read_csr(mepc);
+    MSG("mepc:%08x\r\n",(uint32_t)epc);
+    tval=read_csr(mtval);
+    MSG("mtval:%08x\r\n",(uint32_t)tval);
+
+    cause=(cause&0x3ff);
+    switch(cause){
+        case 1:
+            MSG("Instruction access fault\r\n");
+            break;
+        case 2:
+            MSG("Illegal instruction\r\n");
+            break;
+        case 3:
+            MSG("Breakpoint\r\n");
+            break;
+        case 4:
+            MSG("Load address misaligned\r\n");
+            break;
+        case 5:
+            MSG("Load access fault\r\n");
+            break;
+        case 6:
+            MSG("Store/AMO address misaligned\r\n");
+            break;
+        case 7:
+            MSG("Store/AMO access fault\r\n");
+            break;
+        case 8:
+            MSG("Environment call from U-mode\r\n");
+            epc+=4;
+            write_csr(mepc,epc);
+            break;
+        case 11:
+            MSG("Environment call from M-mode\r\n");
+            epc+=4;
+            write_csr(mepc,epc);
+            isecall=1;
+            break;
+        default:
+            MSG("Cause num=%d\r\n",(uint32_t)cause);
+            epc+=4;
+            write_csr(mepc,epc);
+            break;
+    }
+
+    if(!isecall){
+        while(1);
+    }
+}
+
+void Interrupt_Handler_Register(IRQn_Type irq,pFunc interruptFun)
+{
+    if(irq=IRQ_NUM_BASE){
+                    MSG("Peripheral Interrupt num:%d \r\n",(unsigned int)num-IRQ_NUM_BASE);
+                }
+                while(1);
+            }
+        }else{
+            MSG("Unexpected interrupt num:%d\r\n",(unsigned int)num);
+        }
+    }
+}
+
+void FreeRTOS_Interrupt_Handler(void)
+{
+    Interrupt_Handler();
+}
+
+/****************************************************************************//**
+ * @brief      delay us 
+ *
+ * @param[in]  core:  systemcoreclock
+ *
+ * @param[in]  cnt:  delay cnt us
+ *
+ * @return none
+ *
+ *******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+#ifdef ARCH_ARM
+#ifndef __GNUC__
+__WEAK
+__ASM void ATTR_TCM_SECTION ASM_Delay_Us(uint32_t core,uint32_t cnt)
+{
+    lsrs r0,#0x10
+    muls r0,r1,r0
+    mov  r2,r0
+    lsrs r2,#0x04
+    lsrs r2,#0x03
+    cmp  r2,#0x01
+    beq  end
+    cmp  r2,#0x00
+    beq  end
+loop
+    mov  r0,r0
+    mov  r0,r0
+    mov  r0,r0
+    mov  r0,r0
+    mov  r0,r0
+    subs r2,r2,#0x01
+    cmp  r2,#0x00
+    bne  loop
+end
+    bx   lr
+}
+#else
+__WEAK
+void ATTR_TCM_SECTION ASM_Delay_Us(uint32_t core,uint32_t cnt)
+{
+    __asm__ __volatile__(
+        "lsr r0,#0x10\n\t"
+        "mul r0,r1,r0\n\t"
+        "mov r2,r0\n\t"
+        "lsr r2,#0x04\n\t"
+        "lsr r2,#0x03\n\t"
+        "cmp r2,#0x01\n\t"
+        "beq end\n\t"
+        "cmp r2,#0x00\n\t"
+        "beq end\n"
+        "loop :"
+        "mov r0,r0\n\t"
+        "mov r0,r0\n\t"
+        "mov r0,r0\n\t"
+        "mov r0,r0\n\t"
+        "mov r0,r0\n\t"
+        "sub r2,r2,#0x01\n\t"
+        "cmp r2,#0x00\n\t"
+        "bne loop\n"
+        "end :"
+        "mov r0,r0\n\t"
+    );
+}
+#endif
+#endif
+#ifdef ARCH_RISCV
+__WEAK
+void ATTR_TCM_SECTION ASM_Delay_Us(uint32_t core,uint32_t cnt)
+{
+    uint32_t codeAddress = 0;
+    uint32_t divVal = 40;
+    
+    codeAddress = (uint32_t)&ASM_Delay_Us;
+    
+    /* 1M=100K*10, so multiple is 10 */
+    /* loop function take 4 instructions, so instructionNum is 4 */
+    /* if codeAddress locate at IROM space and irom_2t_access is 1, then irom2TAccess=2, else irom2TAccess=1 */
+    /* divVal = multiple*instructionNum*irom2TAccess */
+    if(((codeAddress&(0xF<<24))>>24)==0x01){
+        /* IROM space */
+        if(BL_GET_REG_BITS_VAL(BL_RD_REG(L1C_BASE,L1C_CONFIG),L1C_IROM_2T_ACCESS)){
+            /* instruction 2T */
+            divVal = 80;
+        }
+    }
+    
+    __asm__ __volatile__(
+        ".align 4\n\t"
+        "lw       a4,%1\n\t"
+        "lui   a5,0x18\n\t"
+        "addi  a5,a5,1696\n\t"
+        "divu  a5,a4,a5\n\t"
+        "sw       a5,%1\n\t"
+        "lw       a4,%1\n\t"
+        "lw       a5,%0\n\t"
+        "mul   a5,a4,a5\n\t"
+        "sw       a5,%1\n\t"
+        "lw       a4,%1\n\t"
+        "lw       a5,%2\n\t"
+        "divu  a5,a4,a5\n\t"
+        "sw    a5,%1\n\t"
+        "lw    a5,%1\n\t"
+        "li    a4,0x1\n\t"
+        "beq   a5,zero,end\n\t"
+        "beq   a5,a4,end\n\t"
+        "nop\n\t"
+        "nop\n\t"
+        ".align 4\n\t"
+        "loop  :\n"
+        "addi  a4,a5,-1\n\t"
+        "mv    a5,a4\n\t"
+        "bnez  a5,loop\n\t"
+        "nop\n\t"
+        "end   :\n\t"
+        "nop\n"
+        :                                              /* output */
+        :"m"(cnt),"m"(core),"m"(divVal)                /* input */
+        :"t1","a4","a5"                                /* destruct description */
+    );
+}
+#endif
+#endif
+
+/****************************************************************************//**
+ * @brief      delay us 
+ *
+ * @param[in]  cnt:  delay cnt us
+ *
+ * @return none
+ *
+ *******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION BL702_Delay_US(uint32_t cnt)
+{
+    ASM_Delay_Us(SystemCoreClockGet(),cnt);
+}
+#endif
+/****************************************************************************//**
+ * @brief      delay ms 
+ *
+ * @param[in]  cnt:  delay cnt ms
+ *
+ * @return none
+ *
+ *******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION BL702_Delay_MS(uint32_t cnt)
+{
+    uint32_t i = 0;
+    uint32_t count = 0;
+    
+    if(cnt>=1024){
+        /* delay (n*1024) ms */
+        count = 1024;
+        for(i=0;i<(cnt/1024);i++){
+            BL702_Delay_US(1024*1000);
+        }
+    }
+    if(cnt&0x3FF){
+        /* delay (1-1023)ms */
+        count = cnt & 0x3FF;
+        BL702_Delay_US(count*1000);
+    }
+    //BL702_Delay_US(((cnt<<10)-(cnt<<4)-(cnt<<3)));
+}
+#endif
+/*
+char *_sbrk(int incr)
+{}
+*/
+/*@} end of group DRIVER_Public_Functions */
+
+/*@} end of group DRIVER_COMMON */
+
+/*@} end of group BL702_Periph_Driver */
+
+
diff --git a/drivers/bl702_driver/std_drv/src/bl702_dac.c b/drivers/bl702_driver/std_drv/src/bl702_dac.c
new file mode 100644
index 00000000..5d533173
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_dac.c
@@ -0,0 +1,504 @@
+/**
+  ******************************************************************************
+  * @file    bl702_dac.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_dac.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  DAC
+ *  @{
+ */
+
+/** @defgroup  DAC_Private_Macros
+ *  @{
+ */
+#define GPIP_CLK_SET_DUMMY_WAIT          {__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();}
+
+/*@} end of group DAC_Private_Macros */
+
+/** @defgroup  DAC_Private_Types
+ *  @{
+ */
+
+/*@} end of group DAC_Private_Types */
+
+/** @defgroup  DAC_Private_Variables
+ *  @{
+ */
+
+/*@} end of group DAC_Private_Variables */
+
+/** @defgroup  DAC_Global_Variables
+ *  @{
+ */
+
+/*@} end of group DAC_Global_Variables */
+
+/** @defgroup  DAC_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group DAC_Private_Fun_Declaration */
+
+/** @defgroup  DAC_Private_Functions
+ *  @{
+ */
+
+/*@} end of group DAC_Private_Functions */
+
+/** @defgroup  DAC_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  DAC initialization
+ *
+ * @param  cfg: DAC configuration pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void GLB_DAC_Init(GLB_DAC_Cfg_Type *cfg)
+{
+    uint32_t tmpVal;
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_GLB_DAC_REF_SEL_TYPE(cfg->refSel));
+    
+    /* Set DAC config */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_GPDAC_CTRL);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_GPDAC_REF_SEL,cfg->refSel);
+    if(ENABLE==cfg->resetChanA){
+        tmpVal=BL_CLR_REG_BIT(tmpVal,GLB_GPDACA_RSTN_ANA);        
+        tmpVal=BL_WR_REG(GLB_BASE,GLB_GPDAC_CTRL,tmpVal);
+        __NOP();
+        __NOP();
+        __NOP();
+        __NOP();
+    }
+    if(ENABLE==cfg->resetChanB){
+        tmpVal=BL_CLR_REG_BIT(tmpVal,GLB_GPDACB_RSTN_ANA);        
+        tmpVal=BL_WR_REG(GLB_BASE,GLB_GPDAC_CTRL,tmpVal);
+        __NOP();
+        __NOP();
+        __NOP();
+        __NOP();
+    }
+    
+    /* Clear reset */
+    tmpVal=BL_SET_REG_BIT(tmpVal,GLB_GPDACA_RSTN_ANA);
+    tmpVal=BL_SET_REG_BIT(tmpVal,GLB_GPDACB_RSTN_ANA);    
+    tmpVal=BL_WR_REG(GLB_BASE,GLB_GPDAC_CTRL,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  DAC channel A initialization
+ *
+ * @param  cfg: DAC channel configuration pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void GLB_DAC_Set_ChanA_Config(GLB_DAC_Chan_Cfg_Type *cfg)
+{
+    uint32_t tmpVal;
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_GLB_DAC_CHAN_TYPE(cfg->outMux));
+    
+    /* Set channel A config */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_GPDAC_ACTRL);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_GPDAC_A_OUTMUX,cfg->outMux);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_GPDAC_IOA_EN,cfg->outputEn);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_GPDAC_A_EN,cfg->chanEn);
+    
+    tmpVal=BL_WR_REG(GLB_BASE,GLB_GPDAC_ACTRL,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  DAC channel B initialization
+ *
+ * @param  cfg: DAC channel configuration pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void GLB_DAC_Set_ChanB_Config(GLB_DAC_Chan_Cfg_Type *cfg)
+{
+    uint32_t tmpVal;
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_GLB_DAC_CHAN_TYPE(cfg->outMux));
+    
+    /* Set channel A config */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_GPDAC_BCTRL);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_GPDAC_B_OUTMUX,cfg->outMux);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_GPDAC_IOB_EN,cfg->outputEn);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_GPDAC_B_EN,cfg->chanEn);
+    
+    tmpVal=BL_WR_REG(GLB_BASE,GLB_GPDAC_BCTRL,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Select DAC channel B source
+ *
+ * @param  src: DAC channel B source selection type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void GPIP_Set_DAC_ChanB_SRC_SEL(GPIP_DAC_ChanB_SRC_Type src)
+{
+    uint32_t tmpVal;
+    
+    CHECK_PARAM(IS_GPIP_DAC_CHANB_SRC_TYPE(src));
+    
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPDAC_CONFIG);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GPIP_GPDAC_CH_B_SEL,src);
+    BL_WR_REG(GPIP_BASE,GPIP_GPDAC_CONFIG,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Select DAC channel A source
+ *
+ * @param  src: DAC channel A source selection type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void GPIP_Set_DAC_ChanA_SRC_SEL(GPIP_DAC_ChanA_SRC_Type src)
+{
+    uint32_t tmpVal;
+    
+    CHECK_PARAM(IS_GPIP_DAC_CHANA_SRC_TYPE(src));
+    
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPDAC_CONFIG);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GPIP_GPDAC_CH_A_SEL,src);
+    BL_WR_REG(GPIP_BASE,GPIP_GPDAC_CONFIG,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Enable DAC channel B
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void GPIP_DAC_ChanB_Enable(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPDAC_CONFIG);
+    tmpVal=BL_SET_REG_BIT(tmpVal,GPIP_GPDAC_EN2);
+    BL_WR_REG(GPIP_BASE,GPIP_GPDAC_CONFIG,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Disable DAC channel B
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void GPIP_DAC_ChanB_Disable(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPDAC_CONFIG);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPDAC_EN2);
+    BL_WR_REG(GPIP_BASE,GPIP_GPDAC_CONFIG,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Enable DAC channel A
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void GPIP_DAC_ChanA_Enable(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPDAC_CONFIG);
+    tmpVal=BL_SET_REG_BIT(tmpVal,GPIP_GPDAC_EN);
+    BL_WR_REG(GPIP_BASE,GPIP_GPDAC_CONFIG,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Disable DAC channel A
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void GPIP_DAC_ChanA_Disable(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPDAC_CONFIG);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPDAC_EN);
+    BL_WR_REG(GPIP_BASE,GPIP_GPDAC_CONFIG,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Select DAC DMA TX format
+ *
+ * @param  fmt: DAC DMA TX format selection type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void GPIP_Set_DAC_DMA_TX_FORMAT_SEL(GPIP_DAC_DMA_TX_FORMAT_Type fmt)
+{
+    uint32_t tmpVal;
+    
+    CHECK_PARAM(IS_GPIP_DAC_DMA_TX_FORMAT_TYPE(fmt));
+    
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPDAC_DMA_CONFIG);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GPIP_GPDAC_DMA_FORMAT,fmt);
+    BL_WR_REG(GPIP_BASE,GPIP_GPDAC_DMA_CONFIG,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Enable DAC DMA TX
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void GPIP_Set_DAC_DMA_TX_Enable(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPDAC_DMA_CONFIG);
+    tmpVal=BL_SET_REG_BIT(tmpVal,GPIP_GPDAC_DMA_TX_EN);
+    BL_WR_REG(GPIP_BASE,GPIP_GPDAC_DMA_CONFIG,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Disable DAC DMA TX
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void GPIP_Set_DAC_DMA_TX_Disable(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPDAC_DMA_CONFIG);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,GPIP_GPDAC_DMA_TX_EN);
+    BL_WR_REG(GPIP_BASE,GPIP_GPDAC_DMA_CONFIG,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Disable DAC DMA TX
+ *
+ * @param  data: The data to be send
+ *
+ * @return None
+ *
+*******************************************************************************/
+void GPIP_DAC_DMA_WriteData(uint32_t data)
+{
+    BL_WR_REG(GPIP_BASE,GPIP_GPDAC_DMA_WDATA,data);
+}
+
+/****************************************************************************//**
+ * @brief  AON and GPIP DAC config
+ *
+ * @param  cfg: AON and GPIP DAC configuration
+ *
+ * @return config success or not
+ *
+*******************************************************************************/
+BL_Err_Type GLB_GPIP_DAC_Init(GLB_GPIP_DAC_Cfg_Type* cfg)
+{
+    uint32_t tmpVal;
+    
+    CHECK_PARAM(IS_GLB_DAC_REF_SEL_TYPE(cfg->refSel));
+    CHECK_PARAM(IS_GPIP_DAC_MOD_TYPE(cfg->div));
+    CHECK_PARAM(IS_GPIP_DAC_DMA_TX_FORMAT_TYPE(cfg->dmaFmt));
+    
+    /* AON Set DAC config */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_GPDAC_CTRL);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_GPDAC_REF_SEL,cfg->refSel);
+    if(ENABLE==cfg->resetChanA){
+        tmpVal=BL_CLR_REG_BIT(tmpVal,GLB_GPDACA_RSTN_ANA);        
+        tmpVal=BL_WR_REG(GLB_BASE,GLB_GPDAC_CTRL,tmpVal);
+        __NOP();
+        __NOP();
+        __NOP();
+        __NOP();
+    }
+    if(ENABLE==cfg->resetChanB){
+        tmpVal=BL_CLR_REG_BIT(tmpVal,GLB_GPDACB_RSTN_ANA);        
+        tmpVal=BL_WR_REG(GLB_BASE,GLB_GPDAC_CTRL,tmpVal);
+        __NOP();
+        __NOP();
+        __NOP();
+        __NOP();
+    }
+    
+    /* AON Clear reset */
+    tmpVal=BL_SET_REG_BIT(tmpVal,GLB_GPDACA_RSTN_ANA);
+    tmpVal=BL_SET_REG_BIT(tmpVal,GLB_GPDACB_RSTN_ANA);    
+    tmpVal=BL_WR_REG(GLB_BASE,GLB_GPDAC_CTRL,tmpVal);
+
+    /* GPIP Set DAC config */
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPDAC_CONFIG);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GPIP_GPDAC_MODE,cfg->div);
+    BL_WR_REG(GPIP_BASE,GPIP_GPDAC_CONFIG,tmpVal);
+    
+    /* GPIP Set DMA config */
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPDAC_DMA_CONFIG);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GPIP_GPDAC_DMA_TX_EN,cfg->dmaEn);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GPIP_GPDAC_DMA_FORMAT,cfg->dmaFmt);
+    BL_WR_REG(GPIP_BASE,GPIP_GPDAC_DMA_CONFIG,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  AON and GPIP DAC channel A config
+ *
+ * @param  cfg: AON and GPIP DAC channel A configuration
+ *
+ * @return None
+ *
+*******************************************************************************/
+void GLB_GPIP_DAC_Set_ChanA_Config(GLB_GPIP_DAC_ChanA_Cfg_Type *cfg)
+{
+    uint32_t tmpVal;
+    
+    CHECK_PARAM(IS_GPIP_DAC_CHANA_SRC_TYPE(cfg->src));
+    
+    /* GPIP select source */
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPDAC_CONFIG);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GPIP_GPDAC_CH_A_SEL,cfg->src);
+    BL_WR_REG(GPIP_BASE,GPIP_GPDAC_CONFIG,tmpVal);
+    
+    /* GPIP enable or disable channel */
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPDAC_CONFIG);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GPIP_GPDAC_EN,cfg->chanEn);
+    BL_WR_REG(GPIP_BASE,GPIP_GPDAC_CONFIG,tmpVal);
+    
+    /* AON enable or disable channel */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_GPDAC_ACTRL);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_GPDAC_IOA_EN,cfg->outputEn);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_GPDAC_A_EN,cfg->chanCovtEn);
+    tmpVal=BL_WR_REG(GLB_BASE,GLB_GPDAC_ACTRL,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  AON and GPIP DAC channel B config
+ *
+ * @param  cfg: AON and GPIP DAC channel B configuration
+ *
+ * @return None
+ *
+*******************************************************************************/
+void GLB_GPIP_DAC_Set_ChanB_Config(GLB_GPIP_DAC_ChanB_Cfg_Type *cfg)
+{
+    uint32_t tmpVal;
+    
+    CHECK_PARAM(IS_GPIP_DAC_CHANB_SRC_TYPE(cfg->src));
+    
+    /* GPIP select source */
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPDAC_CONFIG);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GPIP_GPDAC_CH_B_SEL,cfg->src);
+    BL_WR_REG(GPIP_BASE,GPIP_GPDAC_CONFIG,tmpVal);
+    
+    /* GPIP enable or disable channel */
+    tmpVal=BL_RD_REG(GPIP_BASE,GPIP_GPDAC_CONFIG);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GPIP_GPDAC_EN2,cfg->chanEn);
+    BL_WR_REG(GPIP_BASE,GPIP_GPDAC_CONFIG,tmpVal);
+    
+    /* AON enable or disable channel */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_GPDAC_BCTRL);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_GPDAC_IOB_EN,cfg->outputEn);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_GPDAC_B_EN,cfg->chanCovtEn);
+    tmpVal=BL_WR_REG(GLB_BASE,GLB_GPDAC_BCTRL,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  DAC channel A set value
+ *
+ * @param  val: DAC value
+ *
+ * @return None
+ *
+*******************************************************************************/
+void GLB_DAC_Set_ChanA_Value(uint16_t val)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_GPDAC_DATA);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_GPDAC_A_DATA,val);    
+    tmpVal=BL_WR_REG(GLB_BASE,GLB_GPDAC_DATA,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  DAC channel B set value
+ *
+ * @param  val: DAC value
+ *
+ * @return None
+ *
+*******************************************************************************/
+void GLB_DAC_Set_ChanB_Value(uint16_t val)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_GPDAC_DATA);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_GPDAC_B_DATA,val);
+    tmpVal=BL_WR_REG(GLB_BASE,GLB_GPDAC_DATA,tmpVal);
+}
+
+/*@} end of group DAC_Public_Functions */
+
+/*@} end of group DAC */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_dma.c b/drivers/bl702_driver/std_drv/src/bl702_dma.c
new file mode 100644
index 00000000..6d697ccd
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_dma.c
@@ -0,0 +1,749 @@
+/**
+  ******************************************************************************
+  * @file    bl702_dma.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702.h"
+#include "bl702_dma.h"
+#include "string.h"
+#include "bl702_glb.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  DMA
+ *  @{
+ */
+
+/** @defgroup  DMA_Private_Macros
+ *  @{
+ */
+#define DMA_CHANNEL_OFFSET              0x100
+#define DMA_Get_Channel(ch)             (DMA_BASE+DMA_CHANNEL_OFFSET+(ch)*0x100)
+static intCallback_Type * dmaIntCbfArra[DMA_CH_MAX][DMA_INT_ALL]= {
+{NULL, NULL},
+{NULL, NULL},
+{NULL, NULL},
+{NULL, NULL}
+};
+static DMA_LLI_Ctrl_Type PingPongListArra[DMA_CH_MAX][2];
+
+/*@} end of group DMA_Private_Macros */
+
+/** @defgroup  DMA_Private_Types
+ *  @{
+ */
+
+/*@} end of group DMA_Private_Types */
+
+/** @defgroup  DMA_Private_Variables
+ *  @{
+ */
+
+/*@} end of group DMA_Private_Variables */
+
+/** @defgroup  DMA_Global_Variables
+ *  @{
+ */
+
+/*@} end of group DMA_Global_Variables */
+
+/** @defgroup  DMA_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group DMA_Private_Fun_Declaration */
+
+/** @defgroup  DMA_Private_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  DMA interrupt handler
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void DMA_ALL_IRQHandler(void)
+{
+    uint32_t tmpVal;
+    uint32_t intClr;
+    uint8_t ch;
+    /* Get DMA register */
+    uint32_t DMAChs = DMA_BASE;
+
+    for(ch=0;chch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_DMA_CHAN_TYPE(chCfg->ch));
+    CHECK_PARAM(IS_DMA_TRANS_WIDTH_TYPE(chCfg->srcTransfWidth));
+    CHECK_PARAM(IS_DMA_TRANS_WIDTH_TYPE(chCfg->dstTransfWidth));
+    CHECK_PARAM(IS_DMA_BURST_SIZE_TYPE(chCfg->srcBurstSzie));
+    CHECK_PARAM(IS_DMA_BURST_SIZE_TYPE(chCfg->dstBurstSzie));
+    CHECK_PARAM(IS_DMA_TRANS_DIR_TYPE(chCfg->dir));
+    CHECK_PARAM(IS_DMA_PERIPH_REQ_TYPE(chCfg->dstPeriph));
+    CHECK_PARAM(IS_DMA_PERIPH_REQ_TYPE(chCfg->srcPeriph));
+
+    /* Disable clock gate */
+    GLB_AHB_Slave1_Clock_Gate(DISABLE,BL_AHB_SLAVE1_DMA);
+
+    /* Config channel config */
+    BL_WR_REG(DMAChs, DMA_SRCADDR, chCfg->srcDmaAddr);
+    BL_WR_REG(DMAChs, DMA_DSTADDR, chCfg->destDmaAddr);
+
+    tmpVal = BL_RD_REG(DMAChs, DMA_CONTROL);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_TRANSFERSIZE, chCfg->transfLength);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_SWIDTH, chCfg->srcTransfWidth);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_DWIDTH, chCfg->dstTransfWidth);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_SBSIZE, chCfg->srcBurstSzie);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_DBSIZE, chCfg->dstBurstSzie);
+
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_DST_ADD_MODE, chCfg->dstAddMode);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_DST_MIN_MODE, chCfg->dstMinMode);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_FIX_CNT, chCfg->fixCnt);
+
+    /* FIXME: how to deal with SLargerD */
+    tmpVal = BL_CLR_REG_BIT(tmpVal, DMA_SLARGERD);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_SI, chCfg->srcAddrInc);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_DI, chCfg->destAddrInc);
+    BL_WR_REG(DMAChs, DMA_CONTROL, tmpVal);
+
+    tmpVal = BL_RD_REG(DMAChs, DMA_CONFIG);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_FLOWCNTRL, chCfg->dir);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_DSTPERIPHERAL, chCfg->dstPeriph);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_SRCPERIPHERAL, chCfg->srcPeriph);
+    BL_WR_REG(DMAChs, DMA_CONFIG, tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  DMA channel update source memory address and len
+ *
+ * @param  ch: DMA channel
+ * @param  memAddr: source memoty address
+ * @param  len: source memory data length
+ *
+ * @return None
+ *
+*******************************************************************************/
+void DMA_Channel_Update_SrcMemcfg(uint8_t ch, uint32_t memAddr, uint32_t len)
+{
+    uint32_t tmpVal;
+    /* Get channel register */
+    uint32_t DMAChs = DMA_Get_Channel(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_DMA_CHAN_TYPE(ch));
+
+    /* config channel config*/
+    BL_WR_REG(DMAChs, DMA_SRCADDR, memAddr);
+    tmpVal = BL_RD_REG(DMAChs, DMA_CONTROL);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_TRANSFERSIZE, len);
+    BL_WR_REG(DMAChs, DMA_CONTROL, tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  DMA channel update destination memory address and len
+ *
+ * @param  ch: DMA channel
+ * @param  memAddr: destination memoty address
+ * @param  len: destination memory data length
+ *
+ * @return None
+ *
+*******************************************************************************/
+void DMA_Channel_Update_DstMemcfg(uint8_t ch, uint32_t memAddr, uint32_t len)
+{
+    uint32_t tmpVal;
+    /* Get channel register */
+    uint32_t DMAChs = DMA_Get_Channel(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_DMA_CHAN_TYPE(ch));
+
+    /* config channel config*/
+    BL_WR_REG(DMAChs, DMA_DSTADDR, memAddr);
+    tmpVal = BL_RD_REG(DMAChs, DMA_CONTROL);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_TRANSFERSIZE, len);
+    BL_WR_REG(DMAChs, DMA_CONTROL, tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Get DMA channel tranfersize
+ *
+ * @param  ch: DMA channel
+ *
+ * @return tranfersize size
+ *
+*******************************************************************************/
+uint32_t DMA_Channel_TranferSize(uint8_t ch)
+{
+    /* Get channel register */
+    uint32_t DMAChs = DMA_Get_Channel(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_DMA_CHAN_TYPE(ch));
+
+    return BL_GET_REG_BITS_VAL(BL_RD_REG(DMAChs, DMA_CONTROL), DMA_TRANSFERSIZE);
+}
+
+/****************************************************************************//**
+ * @brief  Get DMA channel busy status
+ *
+ * @param  ch: DMA channel
+ *
+ * @return SET or RESET
+ *
+*******************************************************************************/
+BL_Sts_Type DMA_Channel_Is_Busy(uint8_t ch)
+{
+    /* Get channel register */
+    uint32_t DMAChs = DMA_Get_Channel(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_DMA_CHAN_TYPE(ch));
+
+    return BL_IS_REG_BIT_SET(BL_RD_REG(DMAChs, DMA_CONFIG), DMA_E) == 1 ? SET:RESET;
+}
+
+/****************************************************************************//**
+ * @brief  DMA enable
+ *
+ * @param  ch: DMA channel number
+ *
+ * @return None
+ *
+*******************************************************************************/
+void DMA_Channel_Enable(uint8_t ch)
+{
+    uint32_t tmpVal;
+    /* Get channel register */
+    uint32_t DMAChs = DMA_Get_Channel(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_DMA_CHAN_TYPE(ch));
+
+    tmpVal = BL_RD_REG(DMAChs, DMA_CONFIG);
+    tmpVal = BL_SET_REG_BIT(tmpVal, DMA_E);
+    BL_WR_REG(DMAChs, DMA_CONFIG, tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  DMA disable
+ *
+ * @param  ch: DMA channel number
+ *
+ * @return None
+ *
+*******************************************************************************/
+void DMA_Channel_Disable(uint8_t ch)
+{
+    uint32_t tmpVal;
+    /* Get channel register */
+    uint32_t DMAChs = DMA_Get_Channel(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_DMA_CHAN_TYPE(ch));
+
+    tmpVal = BL_RD_REG(DMAChs, DMA_CONFIG);
+    tmpVal = BL_CLR_REG_BIT(tmpVal, DMA_E);
+    BL_WR_REG(DMAChs, DMA_CONFIG, tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  DMA init LLI transfer
+ *
+ * @param  ch: DMA channel number
+ * @param  lliCfg: LLI configuration
+ *
+ * @return None
+ *
+*******************************************************************************/
+void DMA_LLI_Init(uint8_t ch,DMA_LLI_Cfg_Type *lliCfg)
+{
+    uint32_t tmpVal;
+    /* Get channel register */
+    uint32_t DMAChs = DMA_Get_Channel(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_DMA_CHAN_TYPE(ch));
+    CHECK_PARAM(IS_DMA_TRANS_DIR_TYPE(lliCfg->dir));
+    CHECK_PARAM(IS_DMA_PERIPH_REQ_TYPE(lliCfg->dstPeriph));
+    CHECK_PARAM(IS_DMA_PERIPH_REQ_TYPE(lliCfg->srcPeriph));
+
+    /* Disable clock gate */
+    GLB_AHB_Slave1_Clock_Gate(DISABLE,BL_AHB_SLAVE1_DMA);
+
+    tmpVal = BL_RD_REG(DMAChs, DMA_CONFIG);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_FLOWCNTRL, lliCfg->dir);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_DSTPERIPHERAL, lliCfg->dstPeriph);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, DMA_SRCPERIPHERAL, lliCfg->srcPeriph);
+    BL_WR_REG(DMAChs, DMA_CONFIG, tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  DMA channel update LLI
+ *
+ * @param  ch: DMA channel number
+ * @param  LLI: LLI addr
+ *
+ * @return None
+ *
+*******************************************************************************/
+void DMA_LLI_Update(uint8_t ch, uint32_t LLI)
+{
+    /* Get channel register */
+    uint32_t DMAChs = DMA_Get_Channel(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_DMA_CHAN_TYPE(ch));
+
+    /* Config channel config */
+    //BL_WR_REG(DMAChs, DMA_LLI, LLI);
+    BL702_MemCpy4((uint32_t*)DMAChs,(uint32_t*)LLI,4);
+}
+
+/****************************************************************************//**
+ * @brief  DMA LLI PingPong Structure Start
+ *
+ * @param  dmaPpStruct: dma pp struct pointer
+ * @param  Ping_Transfer_len: ping len
+ * @param  Pong_Transfer_len: pong len
+ *
+ * @return Succrss or not
+ *
+*******************************************************************************/
+BL_Err_Type DMA_LLI_PpStruct_Set_Transfer_Len(DMA_LLI_PP_Struct *dmaPpStruct,uint16_t Ping_Transfer_len,uint16_t Pong_Transfer_len){
+    struct DMA_Control_Reg dmaCtrlRegVal_temp;
+
+    if(Ping_Transfer_len > 4096 || Pong_Transfer_len >4096){
+        return ERROR;
+    }
+
+    dmaCtrlRegVal_temp = PingPongListArra[dmaPpStruct->dmaChan][PING_INDEX].dmaCtrl ;
+    dmaCtrlRegVal_temp.TransferSize = Ping_Transfer_len;
+    PingPongListArra[dmaPpStruct->dmaChan][PING_INDEX].dmaCtrl = dmaCtrlRegVal_temp;
+
+    dmaCtrlRegVal_temp = PingPongListArra[dmaPpStruct->dmaChan][PONG_INDEX].dmaCtrl ;
+    dmaCtrlRegVal_temp.TransferSize = Pong_Transfer_len;
+    PingPongListArra[dmaPpStruct->dmaChan][PONG_INDEX].dmaCtrl = dmaCtrlRegVal_temp;
+
+    DMA_LLI_Init(dmaPpStruct->dmaChan, dmaPpStruct->DMA_LLI_Cfg);
+    DMA_LLI_Update(dmaPpStruct->dmaChan, (uint32_t)&PingPongListArra[dmaPpStruct->dmaChan][PING_INDEX]);
+
+    return SUCCESS;
+
+}
+
+/****************************************************************************//**
+ * @brief  DMA LLI Start New Transmit for Ping-Pong Buf
+ *
+ * @param  dmaPpBuf: DMA LLI Ping-Pong Buf
+ *
+ * @return None
+ *
+*******************************************************************************/
+void DMA_LLI_PpBuf_Start_New_Transmit(DMA_LLI_PP_Buf *dmaPpBuf)
+{
+    NVIC_DisableIRQ(DMA_ALL_IRQn);
+    if(dmaPpBuf->lliListHeader[dmaPpBuf->idleIndex] != NULL){
+        DMA_LLI_Update(dmaPpBuf->dmaChan, (uint32_t)dmaPpBuf->lliListHeader[dmaPpBuf->idleIndex]);
+        DMA_Channel_Enable(dmaPpBuf->dmaChan);
+        dmaPpBuf->idleIndex = (dmaPpBuf->idleIndex==0)?1:0;
+    }
+    NVIC_EnableIRQ(DMA_ALL_IRQn);
+}
+
+/****************************************************************************//**
+ * @brief  DMA LLI Remove Completed Ping-Pong Buf List
+ *
+ * @param  dmaPpBuf: DMA LLI Ping-Pong Buf
+ *
+ * @return Next Ping-Pong Buf List Header
+ *
+*******************************************************************************/
+DMA_LLI_Ctrl_Type * DMA_LLI_PpBuf_Remove_Completed_List(DMA_LLI_PP_Buf *dmaPpBuf)
+{
+    NVIC_DisableIRQ(DMA_ALL_IRQn);
+
+    dmaPpBuf->lliListHeader[!dmaPpBuf->idleIndex] = NULL;
+    NVIC_EnableIRQ(DMA_ALL_IRQn);
+    return dmaPpBuf->lliListHeader[!dmaPpBuf->idleIndex];
+}
+
+/****************************************************************************//**
+ * @brief  DMA LLI Append Buf to List
+ *
+ * @param  dmaPpBuf: DMA LLI Ping-Pong Buf
+ * @param  dmaLliList: New LLI Buf to Append
+ *
+ * @return None
+ *
+*******************************************************************************/
+void DMA_LLI_PpBuf_Append(DMA_LLI_PP_Buf *dmaPpBuf, DMA_LLI_Ctrl_Type *dmaLliList)
+{
+    DMA_LLI_Ctrl_Type *pLliList = NULL;
+    NVIC_DisableIRQ(DMA_ALL_IRQn);
+
+    pLliList = dmaPpBuf->lliListHeader[dmaPpBuf->idleIndex];
+    if(pLliList == NULL){
+        dmaLliList->nextLLI = 0;
+        dmaLliList->dmaCtrl.I = 1;
+        dmaPpBuf->lliListHeader[dmaPpBuf->idleIndex] = dmaLliList;
+    }else{
+        /*Append to last */
+        while(pLliList->nextLLI != 0){
+            pLliList = (DMA_LLI_Ctrl_Type*)pLliList->nextLLI;
+        }
+        pLliList->nextLLI = (uint32_t)dmaLliList;
+        pLliList->dmaCtrl.I = 0;
+        dmaLliList->nextLLI = 0;
+        dmaLliList->dmaCtrl.I = 1;
+    }
+
+    if(DMA_Channel_Is_Busy(dmaPpBuf->dmaChan) == RESET){
+        /* DMA stopped: maybe stop just a few minutes ago(not enter INT due to NVIC_DisableIRQ)
+           or has already stopped before this function is called */
+        if(dmaPpBuf->lliListHeader[!dmaPpBuf->idleIndex] == NULL){
+            /* DMA has already stopped before this function is called */
+            DMA_LLI_PpBuf_Start_New_Transmit(dmaPpBuf);
+        }
+    }
+    NVIC_EnableIRQ(DMA_ALL_IRQn);
+}
+
+/****************************************************************************//**
+ * @brief  DMA LLi Destroy Ping-Pong Buf
+ *
+ * @param  dmaPpBuf: DMA LLI Ping-Pong Buf
+ *
+ * @return None
+ *
+*******************************************************************************/
+void DMA_LLI_PpBuf_Destroy(DMA_LLI_PP_Buf *dmaPpBuf)
+{
+    /* DMA LLI Disable */
+    DMA_Channel_Disable(dmaPpBuf->dmaChan);
+    if(dmaPpBuf->lliListHeader[0] != NULL && dmaPpBuf->onTransCompleted != NULL){
+        dmaPpBuf->onTransCompleted(dmaPpBuf->lliListHeader[0]);
+    }
+    dmaPpBuf->lliListHeader[0] = NULL;
+    if(dmaPpBuf->lliListHeader[1] != NULL && dmaPpBuf->onTransCompleted != NULL){
+        dmaPpBuf->onTransCompleted(dmaPpBuf->lliListHeader[1]);
+    }
+    dmaPpBuf->lliListHeader[1] = NULL;
+    dmaPpBuf->idleIndex = 0;
+}
+
+/****************************************************************************//**
+ * @brief  Mask/Unmask the DMA interrupt
+ *
+ * @param  ch: DMA channel number
+ * @param  intType: Specifies the interrupt type
+ * @param  intMask: Enable/Disable Specified interrupt type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void DMA_IntMask(uint8_t ch,DMA_INT_Type intType, BL_Mask_Type intMask)
+{
+    uint32_t tmpVal;
+    /* Get channel register */
+    uint32_t DMAChs = DMA_Get_Channel(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_DMA_CHAN_TYPE(ch));
+    CHECK_PARAM(IS_DMA_INT_TYPE(intType));
+
+    switch(intType)
+    {
+        case DMA_INT_TCOMPLETED:
+            if(intMask == UNMASK)
+            {
+                /* UNMASK(Enable) this interrupt */
+                tmpVal = BL_CLR_REG_BIT(BL_RD_REG(DMAChs, DMA_CONFIG), DMA_ITC);
+                BL_WR_REG(DMAChs, DMA_CONFIG, tmpVal);
+                tmpVal = BL_SET_REG_BIT(BL_RD_REG(DMAChs, DMA_CONTROL), DMA_I);
+                BL_WR_REG(DMAChs, DMA_CONTROL, tmpVal);
+            }
+            else
+            {
+                /* MASK(Disable) this interrupt */
+                tmpVal = BL_SET_REG_BIT(BL_RD_REG(DMAChs, DMA_CONFIG), DMA_ITC);
+                BL_WR_REG(DMAChs, DMA_CONFIG, tmpVal);
+                tmpVal = BL_CLR_REG_BIT(BL_RD_REG(DMAChs, DMA_CONTROL), DMA_I);
+                BL_WR_REG(DMAChs, DMA_CONTROL, tmpVal);
+            }
+            break;
+        case DMA_INT_ERR:
+            if(intMask == UNMASK)
+            {
+                /* UNMASK(Enable) this interrupt */
+                tmpVal = BL_CLR_REG_BIT(BL_RD_REG(DMAChs, DMA_CONFIG), DMA_IE);
+                BL_WR_REG(DMAChs, DMA_CONFIG, tmpVal);
+            }
+            else
+            {
+                /* MASK(Disable) this interrupt */
+                tmpVal = BL_SET_REG_BIT(BL_RD_REG(DMAChs, DMA_CONFIG), DMA_IE);
+                BL_WR_REG(DMAChs, DMA_CONFIG, tmpVal);
+            }
+            break;
+        case DMA_INT_ALL:
+            if(intMask == UNMASK)
+            {
+                /* UNMASK(Enable) this interrupt */
+                tmpVal = BL_RD_REG(DMAChs, DMA_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, DMA_ITC);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, DMA_IE);
+                BL_WR_REG(DMAChs, DMA_CONFIG, tmpVal);
+                tmpVal = BL_RD_REG(DMAChs, DMA_CONTROL);
+                tmpVal = BL_SET_REG_BIT(tmpVal, DMA_I);
+                BL_WR_REG(DMAChs, DMA_CONTROL, tmpVal);
+            }
+            else
+            {
+                /* MASK(Disable) this interrupt */
+                tmpVal = BL_RD_REG(DMAChs, DMA_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal, DMA_ITC);
+                tmpVal = BL_SET_REG_BIT(tmpVal, DMA_IE);
+                BL_WR_REG(DMAChs, DMA_CONFIG, tmpVal);
+                tmpVal = BL_RD_REG(DMAChs, DMA_CONTROL);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, DMA_I);
+                BL_WR_REG(DMAChs, DMA_CONTROL, tmpVal);
+            }
+            break;
+
+        default:
+            break;
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Install DMA interrupt callback function
+ *
+ * @param  dmaChan: DMA Channel type
+ * @param  intType: DMA interrupt type
+ * @param  cbFun: Pointer to interrupt callback function. The type should be void (*fn)(void)
+ *
+ * @return None
+ *
+*******************************************************************************/
+void DMA_Int_Callback_Install(DMA_Chan_Type dmaChan,DMA_INT_Type intType,intCallback_Type* cbFun)
+{
+    /* Check the parameters */
+    CHECK_PARAM(IS_DMA_CHAN_TYPE(dmaChan));
+    CHECK_PARAM(IS_DMA_INT_TYPE(intType));
+
+    dmaIntCbfArra[dmaChan][intType] = cbFun;
+}
+
+
+
+/****************************************************************************//**
+ * @brief  DMA LLI PingPong Structure Initial
+ *
+ * @param  dmaPpStruct: DMA LLI PingPong Config Parameter
+ *
+ * @return start success or not
+ *
+*******************************************************************************/
+BL_Err_Type DMA_LLI_PpStruct_Init(DMA_LLI_PP_Struct *dmaPpStruct)
+{
+    //setup lliList
+    dmaPpStruct->dmaCtrlRegVal.I=1;
+    dmaPpStruct->trans_index = 0;
+
+    if(dmaPpStruct->DMA_LLI_Cfg->dir == DMA_TRNS_M2P){
+        PingPongListArra[dmaPpStruct->dmaChan][PING_INDEX].srcDmaAddr = dmaPpStruct->chache_buf_addr[0];
+        PingPongListArra[dmaPpStruct->dmaChan][PING_INDEX].destDmaAddr= dmaPpStruct->operatePeriphAddr;
+
+        PingPongListArra[dmaPpStruct->dmaChan][PONG_INDEX].srcDmaAddr = dmaPpStruct->chache_buf_addr[1];
+        PingPongListArra[dmaPpStruct->dmaChan][PONG_INDEX].destDmaAddr= dmaPpStruct->operatePeriphAddr;
+    }
+    else if(dmaPpStruct->DMA_LLI_Cfg->dir == DMA_TRNS_P2M){
+        PingPongListArra[dmaPpStruct->dmaChan][PING_INDEX].srcDmaAddr = dmaPpStruct->operatePeriphAddr;
+        PingPongListArra[dmaPpStruct->dmaChan][PING_INDEX].destDmaAddr= dmaPpStruct->chache_buf_addr[0];
+
+        PingPongListArra[dmaPpStruct->dmaChan][PONG_INDEX].srcDmaAddr = dmaPpStruct->operatePeriphAddr;
+        PingPongListArra[dmaPpStruct->dmaChan][PONG_INDEX].destDmaAddr = dmaPpStruct->chache_buf_addr[1];
+    }else{
+        return ERROR;
+        /*V1.0 version DMA LLI Ping-Pong structure not support P2P & M2M MODE*/
+    }
+
+    PingPongListArra[dmaPpStruct->dmaChan][PING_INDEX].nextLLI = (uint32_t)&PingPongListArra[dmaPpStruct->dmaChan][PONG_INDEX];
+    PingPongListArra[dmaPpStruct->dmaChan][PING_INDEX].dmaCtrl = dmaPpStruct->dmaCtrlRegVal;
+
+    PingPongListArra[dmaPpStruct->dmaChan][PONG_INDEX].nextLLI = (uint32_t)&PingPongListArra[dmaPpStruct->dmaChan][PING_INDEX];
+    PingPongListArra[dmaPpStruct->dmaChan][PONG_INDEX].dmaCtrl = dmaPpStruct->dmaCtrlRegVal;
+
+    DMA_LLI_Init(dmaPpStruct->dmaChan, dmaPpStruct->DMA_LLI_Cfg);
+
+    DMA_LLI_Update(dmaPpStruct->dmaChan, (uint32_t)&PingPongListArra[dmaPpStruct->dmaChan][PING_INDEX]);
+
+    return SUCCESS;
+}
+
+
+/****************************************************************************//**
+ * @brief  DMA LLI PingPong Structure Start
+ *
+ * @param  dmaPpStruct: None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void DMA_LLI_PpStruct_Start(DMA_LLI_PP_Struct *dmaPpStruct){
+    DMA_Channel_Enable(dmaPpStruct->dmaChan);
+}
+
+
+/****************************************************************************//**
+ * @brief  DMA LLI PingPong Structure Stop
+ *
+ * @param  dmaPpStruct: None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void DMA_LLI_PpStruct_Stop(DMA_LLI_PP_Struct *dmaPpStruct){
+    DMA_Channel_Disable(dmaPpStruct->dmaChan);
+}
+
+
+
+/*@} end of group DMA_Public_Functions */
+
+/*@} end of group DMA */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_ef_ctrl.c b/drivers/bl702_driver/std_drv/src/bl702_ef_ctrl.c
new file mode 100644
index 00000000..ae3c754e
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_ef_ctrl.c
@@ -0,0 +1,1694 @@
+/**
+  ******************************************************************************
+  * @file    bl702_sec_ef_ctrl.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "string.h"
+#include "bl702_ef_ctrl.h"
+#include "ef_data_0_reg.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  SEC_EF_CTRL
+ *  @{
+ */
+
+/** @defgroup  SEC_EF_CTRL_Private_Macros
+ *  @{
+ */
+#define EF_CTRL_EFUSE_CYCLE_PROTECT         (0xbf<<24)
+#define EF_CTRL_EFUSE_CTRL_PROTECT          (0xbf<<8)
+#define EF_CTRL_DFT_TIMEOUT_VAL             (160*1000)
+#ifndef BOOTROM
+#define EF_CTRL_LOAD_BEFORE_READ_R0         EF_Ctrl_Load_Efuse_R0()
+#else
+#define EF_CTRL_LOAD_BEFORE_READ_R0
+#endif
+#define EF_CTRL_DATA0_CLEAR                 EF_Ctrl_Clear(0,EF_CTRL_EFUSE_R0_SIZE/4)
+
+/*@} end of group SEC_EF_CTRL_Private_Macros */
+
+/** @defgroup  SEC_EF_CTRL_Private_Types
+ *  @{
+ */
+
+/*@} end of group SEC_EF_CTRL_Private_Types */
+
+/** @defgroup  SEC_EF_CTRL_Private_Variables
+ *  @{
+ */
+
+/*@} end of group SEC_EF_CTRL_Private_Variables */
+
+/** @defgroup  SEC_EF_CTRL_Global_Variables
+ *  @{
+ */
+
+/*@} end of group SEC_EF_CTRL_Global_Variables */
+
+/** @defgroup  SEC_EF_CTRL_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group SEC_EF_CTRL_Private_Fun_Declaration */
+
+/** @defgroup  SEC_EF_CTRL_Private_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Switch efuse region 0 control to AHB clock
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+/* static */ void ATTR_TCM_SECTION EF_Ctrl_Sw_AHB_Clk_0(void)
+{
+    uint32_t tmpVal;
+    uint32_t timeout=EF_CTRL_DFT_TIMEOUT_VAL;
+
+    while(EF_Ctrl_Busy()==SET){
+        timeout--;
+        if(timeout==0){
+            break;
+        }
+    }
+
+    tmpVal=(EF_CTRL_EFUSE_CTRL_PROTECT)| \
+             (EF_CTRL_OP_MODE_AUTO<ef_dbg_mode);
+	tmpVal= BL_SET_REG_BITS_VAL(tmpVal,EF_DATA_0_EF_DBG_JTAG_0_DIS,cfg->ef_dbg_jtag_0_dis);
+	tmpVal= BL_SET_REG_BITS_VAL(tmpVal,EF_DATA_0_EF_SBOOT_EN,cfg->ef_sboot_en);
+	BL_WR_REG(EF_DATA_BASE,EF_DATA_0_EF_CFG_0,tmpVal);
+
+    if(program){
+        EF_Ctrl_Program_Efuse_0();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Efuse read security configuration
+ *
+ * @param  cfg: security configuration pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void EF_Ctrl_Read_Secure_Cfg(EF_Ctrl_Sec_Param_Type *cfg)
+{
+    uint32_t tmpVal;
+
+    /* Trigger read data from efuse */
+    EF_CTRL_LOAD_BEFORE_READ_R0;
+
+    tmpVal=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_CFG_0);
+
+    cfg->ef_dbg_mode =(EF_Ctrl_Dbg_Mode_Type)BL_GET_REG_BITS_VAL(tmpVal,EF_DATA_0_EF_DBG_MODE);
+    cfg->ef_dbg_jtag_0_dis=BL_GET_REG_BITS_VAL(tmpVal,EF_DATA_0_EF_DBG_JTAG_0_DIS);
+    cfg->ef_sboot_en =BL_GET_REG_BITS_VAL(tmpVal,EF_DATA_0_EF_SBOOT_EN);
+}
+
+/****************************************************************************//**
+ * @brief  Efuse write security boot configuration
+ *
+ * @param  sign[1]: Sign configuration pointer
+ * @param  aes[1]: AES configuration pointer
+ * @param  program: program to efuse entity or not
+ *
+ * @return None
+ *
+*******************************************************************************/
+void EF_Ctrl_Write_Secure_Boot(EF_Ctrl_Sign_Type sign[1], EF_Ctrl_SF_AES_Type aes[1],uint8_t program)
+{
+    uint32_t tmpVal;
+
+    /* Switch to AHB clock */
+    EF_Ctrl_Sw_AHB_Clk_0();
+
+    tmpVal=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_CFG_0);
+
+    tmpVal= BL_SET_REG_BITS_VAL(tmpVal,EF_DATA_0_EF_SBOOT_SIGN_MODE,sign[0]);
+
+    if(aes[0]!=EF_CTRL_SF_AES_NONE){
+        tmpVal= BL_SET_REG_BITS_VAL(tmpVal,EF_DATA_0_EF_SF_AES_MODE,aes[0]);
+        tmpVal= BL_SET_REG_BITS_VAL(tmpVal,EF_DATA_0_EF_CPU0_ENC_EN,1);
+    }
+
+    BL_WR_REG(EF_DATA_BASE,EF_DATA_0_EF_CFG_0,tmpVal);
+
+    if( program){
+        EF_Ctrl_Program_Efuse_0();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Efuse write security boot configuration
+ *
+ * @param  sign[1]: Sign configuration pointer
+ * @param  aes[1]: AES configuration pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void EF_Ctrl_Read_Secure_Boot(EF_Ctrl_Sign_Type sign[1], EF_Ctrl_SF_AES_Type aes[1])
+{
+    uint32_t tmpVal;
+    uint32_t tmpVal2;
+
+    /* Trigger read data from efuse */
+    EF_CTRL_LOAD_BEFORE_READ_R0;
+
+    tmpVal=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_CFG_0);
+
+    tmpVal2=BL_GET_REG_BITS_VAL(tmpVal,EF_DATA_0_EF_SBOOT_SIGN_MODE);
+    sign[0]=(EF_Ctrl_Sign_Type)(tmpVal2&0x01);
+
+    tmpVal2=BL_GET_REG_BITS_VAL(tmpVal,EF_DATA_0_EF_CPU0_ENC_EN);
+    if(tmpVal2){
+        aes[0]=(EF_Ctrl_SF_AES_Type)BL_GET_REG_BITS_VAL(tmpVal,EF_DATA_0_EF_SF_AES_MODE);
+    }else{
+        aes[0]=EF_CTRL_SF_AES_NONE;
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Analog Trim parity calculate
+ *
+ * @param  val: Value of efuse trim data
+ * @param  len: Length of bit to calculate
+ *
+ * @return Parity bit value
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+uint8_t ATTR_CLOCK_SECTION EF_Ctrl_Get_Trim_Parity(uint32_t val,uint8_t len)
+{
+    uint8_t cnt=0;
+    uint8_t i=0;
+
+    for(i=0;itrimRc32mCodeFrExt=(tmpVal>>10)&0xff;
+    trim->trimRc32mCodeFrExtParity=(tmpVal>>18)&0x01;
+    trim->trimRc32mExtCodeEn=(tmpVal>>19)&0x01;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Efuse read RC32K trim
+ *
+ * @param  trim: Trim data pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_CLOCK_SECTION EF_Ctrl_Read_RC32K_Trim( Efuse_Ana_RC32K_Trim_Type *trim)
+{
+    uint32_t tmpVal=0;
+    /* Switch to AHB clock */
+    EF_Ctrl_Sw_AHB_Clk_0();
+
+    EF_CTRL_LOAD_BEFORE_READ_R0;
+
+    tmpVal=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_ANA_TRIM_0);
+    trim->trimRc32kCodeFrExt=(tmpVal>>20)&0x3ff;
+    trim->trimRc32kCodeFrExtParity=(tmpVal>>30)&0x01;
+    trim->trimRc32kExtCodeEn=(tmpVal>>31)&0x01;
+}
+#endif
+
+
+/****************************************************************************//**
+ * @brief  Efuse read TSEN trim
+ *
+ * @param  trim: Trim data pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ATTR_CLOCK_SECTION EF_Ctrl_Read_TSEN_Trim( Efuse_TSEN_Refcode_Corner_Type *trim)
+{
+    uint32_t tmpVal=0;
+    /* Switch to AHB clock */
+    EF_Ctrl_Sw_AHB_Clk_0();
+
+    EF_CTRL_LOAD_BEFORE_READ_R0;
+
+    tmpVal=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_5_W3);
+    trim->tsenRefcodeCornerEn=tmpVal&0x01;
+
+    tmpVal=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_LOCK);
+    trim->tsenRefcodeCorner=tmpVal&0xfff;  
+    trim->tsenRefcodeCornerParity=(tmpVal >> 12)&0x01;     
+
+    tmpVal=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_5_W1);  
+    trim->tsenRefcodeCornerVersion=(tmpVal >> 30)&0x01;
+}
+
+
+/****************************************************************************//**
+ * @brief  Efuse read ADC Gain trim
+ *
+ * @param  trim: Trim data pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ATTR_CLOCK_SECTION EF_Ctrl_Read_ADC_Gain_Trim( Efuse_ADC_Gain_Coeff_Type *trim)
+{
+    uint32_t tmpVal=0;
+    /* Switch to AHB clock */
+    EF_Ctrl_Sw_AHB_Clk_0();
+
+    EF_CTRL_LOAD_BEFORE_READ_R0;
+
+    tmpVal=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_5_W3);
+    trim -> adcGainCoeff = (tmpVal >> 1) & 0xfff;
+    trim -> adcGainCoeffParity = (tmpVal >> 13) & 0x01;
+    trim -> adcGainCoeffEn = (tmpVal >> 14) & 0x01;    
+}
+
+
+/****************************************************************************//**
+ * @brief  Efuse write software usage
+ *
+ * @param  index: index of software usage
+ * @param  usage: usage value
+ * @param  program: program to efuse entity or not
+ *
+ * @return None
+ *
+*******************************************************************************/
+void EF_Ctrl_Write_Sw_Usage(uint32_t index, uint32_t usage,uint8_t program)
+{
+    /* switch to AHB clock */
+    EF_Ctrl_Sw_AHB_Clk_0();
+
+    if(index==0){
+        BL_WR_REG(EF_DATA_BASE,EF_DATA_0_EF_SW_USAGE_0,usage);
+    }
+
+    if(program){
+        EF_Ctrl_Program_Efuse_0();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Efuse read software usage
+ *
+ * @param  index: index of software usage
+ * @param  usage: usage value
+ *
+ * @return None
+ *
+*******************************************************************************/
+void EF_Ctrl_Read_Sw_Usage( uint32_t index, uint32_t *usage)
+{
+    /* Switch to AHB clock */
+    EF_Ctrl_Sw_AHB_Clk_0();
+
+    EF_CTRL_LOAD_BEFORE_READ_R0;
+
+    if(index==0){
+        *usage=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_SW_USAGE_0);
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Efuse read software usage
+ *
+ * @param  index: index of software usage
+ * @param  program: usage value
+ *
+ * @return None
+ *
+*******************************************************************************/
+void EF_Ctrl_Writelock_Sw_Usage(uint32_t index, uint8_t program)
+{
+    uint32_t tmpVal;
+
+    /* Switch to AHB clock */
+    EF_Ctrl_Sw_AHB_Clk_0();
+
+    tmpVal=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_LOCK);
+
+    if(index==0){
+        tmpVal= BL_SET_REG_BIT(tmpVal,EF_DATA_0_WR_LOCK_SW_USAGE_0);
+    }
+    BL_WR_REG(EF_DATA_BASE,EF_DATA_0_LOCK,tmpVal);
+
+    if(program){
+        EF_Ctrl_Program_Efuse_0();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Efuse write MAC address
+ *
+ * @param  mac[6]: MAC address buffer
+ * @param  program: program to efuse entity or not
+ *
+ * @return None
+ *
+*******************************************************************************/
+void EF_Ctrl_Write_MAC_Address(uint8_t mac[6],uint8_t program)
+{
+    uint8_t *maclow=(uint8_t *)mac;
+    uint8_t *machigh=(uint8_t *)(mac+4);
+    uint32_t tmpVal;
+
+    /* Switch to AHB clock */
+    EF_Ctrl_Sw_AHB_Clk_0();
+
+    /* The low 32 bits */
+    BL_WR_REG(EF_DATA_BASE,EF_DATA_0_EF_WIFI_MAC_LOW,BL_RDWD_FRM_BYTEP(maclow));
+    /* The high 16 bits */
+    tmpVal=machigh[0]+(machigh[1]<<8);
+    BL_WR_REG(EF_DATA_BASE,EF_DATA_0_EF_WIFI_MAC_HIGH,tmpVal);
+
+    if( program){
+        EF_Ctrl_Program_Efuse_0();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Efuse Ctrl get zero bit count
+ *
+ * @param  val: Value to count
+ *
+ * @return Zero bit count
+ *
+*******************************************************************************/
+static uint32_t EF_Ctrl_Get_Byte_Zero_Cnt(uint8_t val)
+{
+    uint32_t cnt=0;
+    uint32_t i=0;
+    for(i=0;i<8;i++){
+        if((val&(1<>8)&0xff;
+    machigh[2]=(tmpVal>>16)&0xff;
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Efuse lock writing for MAC address
+ *
+ * @param  program: program to efuse entity or not
+ *
+ * @return None
+ *
+*******************************************************************************/
+void EF_Ctrl_Writelock_MAC_Address(uint8_t program)
+{
+    uint32_t tmpVal;
+
+    /* Switch to AHB clock */
+    EF_Ctrl_Sw_AHB_Clk_0();
+
+    tmpVal=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_LOCK);
+    tmpVal= BL_SET_REG_BIT(tmpVal,EF_DATA_0_WR_LOCK_WIFI_MAC);
+    BL_WR_REG(EF_DATA_BASE,EF_DATA_0_LOCK,tmpVal);
+
+    if( program){
+        EF_Ctrl_Program_Efuse_0();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Whether a value bits is all zero
+ *
+ * @param  val: value to check
+ * @param  start: start bit
+ * @param  len: total length of bits to check
+ *
+ * @return 1 for all bits zero 0 for others
+ *
+*******************************************************************************/
+uint8_t EF_Ctrl_Is_All_Bits_Zero(uint32_t val,uint8_t start,uint8_t len)
+{
+    uint32_t mask=0;
+
+    val=(val>>start);
+    if(len>=32){
+        mask=0xffffffff;
+    }else{
+        mask=(1<=3){
+        return ERROR;
+    }
+
+    /* Change to local order */
+    for(i=0;i<3;i++){
+        tmpVal=mac[i];
+        mac[i]=mac[5-i];
+        mac[5-i]=tmpVal;
+    }
+    if(slot==2){
+        /* Switch to AHB clock */
+        EF_Ctrl_Sw_AHB_Clk_0();
+    }else{
+        /* Switch to AHB clock */
+        EF_Ctrl_Sw_AHB_Clk_0();
+    }
+
+    /* The low 32 bits */
+    if(slot==0){
+        BL_WR_REG(EF_DATA_BASE,EF_DATA_0_EF_WIFI_MAC_LOW,BL_RDWD_FRM_BYTEP(maclow));
+    }else if(slot==1){
+        BL_WR_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_5_W0,BL_RDWD_FRM_BYTEP(maclow));
+    }else if(slot==2){
+        BL_WR_REG(EF_DATA_BASE,EF_DATA_0_EF_DBG_PWD_LOW,BL_RDWD_FRM_BYTEP(maclow));
+    }
+    /* The high 16 bits */
+    tmpVal=machigh[0]+(machigh[1]<<8);
+    cnt=0;
+    for(i=0;i<6;i++){
+        cnt+=EF_Ctrl_Get_Byte_Zero_Cnt(mac[i]);
+    }
+    tmpVal|=((cnt&0x3f)<<16);
+
+    if(slot==0){
+        BL_WR_REG(EF_DATA_BASE,EF_DATA_0_EF_WIFI_MAC_HIGH,tmpVal);
+    }else if(slot==1){
+        BL_WR_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_5_W1,tmpVal);
+    }else if(slot==2){
+        BL_WR_REG(EF_DATA_BASE,EF_DATA_0_EF_DBG_PWD_HIGH,tmpVal);
+    }
+
+    if( program){
+        if(slot==2){
+            EF_Ctrl_Program_Efuse_0();
+        }else{
+            EF_Ctrl_Program_Efuse_0();
+        }
+    }
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Efuse read optional MAC address
+ *
+ * @param  slot: MAC address slot
+ * @param  mac[6]: MAC address buffer
+ * @param  reload: Whether reload
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EF_Ctrl_Read_MAC_Address_Opt(uint8_t slot,uint8_t mac[6],uint8_t reload)
+{
+    uint8_t *maclow=(uint8_t *)mac;
+    uint8_t *machigh=(uint8_t *)(mac+4);
+    uint32_t tmpVal=0;
+    uint32_t i=0;
+    uint32_t cnt=0;
+
+    if(slot>=3){
+        return ERROR;
+    }
+
+    /* Trigger read data from efuse */
+    if(reload){
+        if(slot==2){
+            EF_CTRL_LOAD_BEFORE_READ_R0;
+        }else{
+            EF_CTRL_LOAD_BEFORE_READ_R0;
+        }
+    }
+
+    if(slot==0){
+        tmpVal=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_WIFI_MAC_LOW);
+    }else if(slot==1){
+        tmpVal=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_5_W0);
+    }else if(slot==2){
+        tmpVal=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_DBG_PWD_LOW);
+    }
+    BL_WRWD_TO_BYTEP(maclow,tmpVal);
+
+    if(slot==0){
+        tmpVal=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_WIFI_MAC_HIGH);
+    }else if(slot==1){
+        tmpVal=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_5_W1);
+    }else if(slot==2){
+        tmpVal=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_DBG_PWD_HIGH);
+    }
+    machigh[0]=tmpVal&0xff;
+    machigh[1]=(tmpVal>>8)&0xff;
+
+    /* Check parity */
+    for(i=0;i<6;i++){
+        cnt+=EF_Ctrl_Get_Byte_Zero_Cnt(mac[i]);
+    }
+    if((cnt&0x3f)==((tmpVal>>16)&0x3f)){
+        /* Change to network order */
+        for(i=0;i<3;i++){
+            tmpVal=mac[i];
+            mac[i]=mac[5-i];
+            mac[5-i]=tmpVal;
+        }
+        return SUCCESS;
+    }else{
+        return ERROR;
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Efuse read chip ID
+ *
+ * @param  chipID[8]: Chip ID buffer
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EF_Ctrl_Read_Chip_ID(uint8_t chipID[8])
+{
+    return EF_Ctrl_Read_MAC_Address(chipID);
+}
+
+/****************************************************************************//**
+ * @brief  Efuse get chip PID&&VID
+ *
+ * @param  pid[1]: Chip PID
+ * @param  vid[1]: Chip VID
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EF_Ctrl_Get_Chip_PIDVID(uint16_t pid[1],uint16_t vid[1])
+{
+    uint32_t tmpVal;
+    
+    /* Trigger read data from efuse */
+    EF_CTRL_LOAD_BEFORE_READ_R0;
+    
+    tmpVal = BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_4_W3);
+    pid[0] = (uint16_t)(tmpVal&0xFFFF);
+    vid[0] = (uint16_t)(tmpVal>>16);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Efuse get customer PID&&VID
+ *
+ * @param  pid[1]: Customer PID
+ * @param  vid[1]: Customer VID
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EF_Ctrl_Get_Customer_PIDVID(uint16_t pid[1],uint16_t vid[1])
+{
+    uint32_t tmpVal;
+    
+    /* Trigger read data from efuse */
+    EF_CTRL_LOAD_BEFORE_READ_R0;
+    
+    tmpVal = BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_4_W2);
+    pid[0] = (uint16_t)(tmpVal&0xFFFF);
+    vid[0] = (uint16_t)(tmpVal>>16);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Efuse read device info
+ *
+ * @param  deviceInfo: Device info pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void EF_Ctrl_Read_Device_Info(Efuse_Device_Info_Type *deviceInfo)
+{
+    uint32_t tmpVal;
+    uint32_t *p=(uint32_t *)deviceInfo;
+
+    /* Trigger read data from efuse */
+    EF_CTRL_LOAD_BEFORE_READ_R0;
+
+    tmpVal=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_5_W2);
+    *p=tmpVal;
+}
+
+/****************************************************************************//**
+ * @brief  Whether Capcode is empty
+ *
+ * @param  reload: Whether reload
+ *
+ * @return 0 for all slots full,1 for others
+ *
+*******************************************************************************/
+uint8_t  EF_Ctrl_Is_CapCode_Empty(uint8_t reload)
+{
+    uint32_t tmp=0xffffffff;
+
+    /* Switch to AHB clock */
+    EF_Ctrl_Sw_AHB_Clk_0();
+
+    if(reload){
+        EF_CTRL_LOAD_BEFORE_READ_R0;
+    }
+
+    tmp=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_ANA_TRIM_0);
+    return(EF_Ctrl_Is_All_Bits_Zero(tmp,2,8));
+}
+
+/****************************************************************************//**
+ * @brief  Efuse write Cap code
+ *
+ * @param  code: Cap code value
+ * @param  program: Whether program
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EF_Ctrl_Write_CapCode_Opt(uint8_t code,uint8_t program)
+{
+    uint32_t tmp;
+    uint8_t trim;
+
+    /* Switch to AHB clock */
+    EF_Ctrl_Sw_AHB_Clk_0();
+    EF_CTRL_LOAD_BEFORE_READ_R0;
+
+    tmp=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_ANA_TRIM_0);
+
+    trim=code;
+    trim|=((EF_Ctrl_Get_Trim_Parity(code,6))<<6);
+    trim|=(1<<7);
+
+    BL_WR_REG(EF_DATA_BASE,EF_DATA_0_EF_ANA_TRIM_0,tmp|(trim<<2));
+
+    if(program){
+        EF_Ctrl_Program_Efuse_0();
+    }
+    while(SET==EF_Ctrl_Busy());
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Efuse read Cap code
+ *
+ * @param  code: Cap code pointer
+ * @param  reload: Whether reload
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EF_Ctrl_Read_CapCode_Opt(uint8_t *code,uint8_t reload)
+{
+    uint32_t tmp;
+    Efuse_Capcode_Info_Type *trim=(Efuse_Capcode_Info_Type *)&tmp;
+
+    /* Switch to AHB clock */
+    EF_Ctrl_Sw_AHB_Clk_0();
+
+    if(reload){
+        EF_CTRL_LOAD_BEFORE_READ_R0;
+    }
+
+    tmp=(BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_ANA_TRIM_0))>>2;
+
+    if(trim->en){
+        if(trim->parity==EF_Ctrl_Get_Trim_Parity(trim->capCode,6)){
+            *code=trim->capCode;
+            return SUCCESS;
+        }
+    }
+    return ERROR;
+}
+
+/****************************************************************************//**
+ * @brief  Whether power offset slot is empty
+ *
+ * @param  slot: Power offset code slot
+ * @param  reload: Whether reload
+ *
+ * @return 0 for all slots full,1 for others
+ *
+*******************************************************************************/
+uint8_t  EF_Ctrl_Is_PowerOffset_Slot_Empty(uint8_t slot,uint8_t reload)
+{
+    uint32_t tmp1=0xffffffff;
+    uint32_t part1Empty=0,part2Empty=0;
+
+    /* Switch to AHB clock */
+    EF_Ctrl_Sw_AHB_Clk_0();
+
+    if(reload){
+        EF_CTRL_LOAD_BEFORE_READ_R0;
+    }
+
+    if(slot==0){
+        tmp1=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_5_W3);
+        part1Empty=(EF_Ctrl_Is_All_Bits_Zero(tmp1,15,17));
+        part2Empty=1;
+    }else if(slot==1){
+        tmp1=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_4_W1);
+        part1Empty=(EF_Ctrl_Is_All_Bits_Zero(tmp1,0,16));
+
+        tmp1=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_ANA_TRIM_0);
+        part2Empty=(EF_Ctrl_Is_All_Bits_Zero(tmp1,0,1));
+    }else if(slot==2){
+        tmp1=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_4_W1);
+        part1Empty=(EF_Ctrl_Is_All_Bits_Zero(tmp1,16,16));
+
+        tmp1=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_ANA_TRIM_0);
+        part2Empty=(EF_Ctrl_Is_All_Bits_Zero(tmp1,1,1));
+    }
+
+    return (part1Empty&&part2Empty);
+}
+
+/****************************************************************************//**
+ * @brief  Efuse write power offset
+ *
+ * @param  slot: Power offset slot
+ * @param  pwrOffset[3]: Power offset value array
+ * @param  program: Whether program
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EF_Ctrl_Write_PowerOffset_Opt(uint8_t slot,int8_t pwrOffset[3],uint8_t program)
+{
+    uint64_t tmp=0;
+    uint32_t k=0;
+    uint64_t Value=0;
+    uint8_t parity;
+
+    if(slot>=3){
+        return ERROR;
+    }
+
+    for(k=0;k<3;k++){
+        /* Use 5 bits as signed value */
+        if(pwrOffset[k]>15){
+            pwrOffset[k]=15;
+        }
+        if(pwrOffset[k]<-16){
+            pwrOffset[k]=-16;
+        }
+        tmp=((uint64_t)((pwrOffset[k])&0x1f))<<(k*5);
+        Value+=tmp;
+    }
+    parity=EF_Ctrl_Get_Trim_Parity(Value,15);
+
+    if(slot==0){
+        tmp=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_5_W3);
+        tmp|=(Value<<16);
+        tmp|=(1<<15);
+        tmp|=(uint32_t)(parity<<31);
+        BL_WR_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_5_W3,tmp);
+    }else if(slot==1){
+        tmp=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_4_W1);
+        tmp|=(Value<<0);
+        tmp|=(uint32_t)(parity<<15);
+        BL_WR_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_4_W1,tmp);
+
+        tmp=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_ANA_TRIM_0);
+        tmp|=(1<<0);
+        BL_WR_REG(EF_DATA_BASE,EF_DATA_0_EF_ANA_TRIM_0,tmp);
+    }else if(slot==2){
+        tmp=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_4_W1);
+        tmp|=(Value<<16);
+        tmp|=(uint32_t)(parity<<31);
+        BL_WR_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_4_W1,tmp);
+
+        tmp=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_ANA_TRIM_0);
+        tmp|=(1<<1);
+        BL_WR_REG(EF_DATA_BASE,EF_DATA_0_EF_ANA_TRIM_0,tmp);
+    }
+
+    if(program){
+        EF_Ctrl_Program_Efuse_0();
+    }
+
+    while(SET==EF_Ctrl_Busy());
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Efuse read poweroffset value
+ *
+ * @param  slot: Power offset slot
+ * @param  pwrOffset[3]: Power offset array
+ * @param  reload: Whether reload
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EF_Ctrl_Read_PowerOffset_Opt(uint8_t slot,int8_t pwrOffset[3],uint8_t reload)
+{
+    uint64_t pwrOffsetValue=0;
+
+    uint32_t tmp = 0,k;
+    uint8_t en=0,parity=0;
+
+    /* Switch to AHB clock */
+    EF_Ctrl_Sw_AHB_Clk_0();
+
+    if(reload){
+        EF_CTRL_LOAD_BEFORE_READ_R0;
+    }
+
+    if(slot==0){
+        tmp=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_5_W3);
+        en=(tmp>>15)&0x01;
+        pwrOffsetValue=(tmp>>16)&0x7fff;
+        parity=(tmp>>31)&0x01;
+    }else if(slot==1){
+        tmp=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_4_W1);
+        pwrOffsetValue=(tmp>>0)&0x7fff;
+        parity=(tmp>>15)&0x01;
+
+        tmp=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_ANA_TRIM_0);
+        en=(tmp>>0)&0x01;
+    }else if(slot==2){
+        tmp=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_KEY_SLOT_4_W1);
+        pwrOffsetValue=(tmp>>16)&0x7fff;
+        parity=(tmp>>31)&0x01;
+
+        tmp=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_EF_ANA_TRIM_0);
+        en=(tmp>>1)&0x01;
+    }
+
+    if(en){
+        if(parity==EF_Ctrl_Get_Trim_Parity(pwrOffsetValue,15)){
+            for(k=0;k<3;k++){
+                tmp=(pwrOffsetValue>>(k*5))&0x1f;
+                if(tmp>=16){
+                    pwrOffset[k]=tmp-32;
+                }else{
+                    pwrOffset[k]=tmp;
+                }
+            }
+            return SUCCESS;
+        }
+    }
+    return ERROR;
+}
+
+/****************************************************************************//**
+ * @brief  Efuse write AES key
+ *
+ * @param  index: index of key slot
+ * @param  keyData: key data buffer
+ * @param  len: key data length in words
+ * @param  program: program to efuse entity or not
+ *
+ * @return None
+ *
+*******************************************************************************/
+void EF_Ctrl_Write_AES_Key(uint8_t index,uint32_t *keyData,uint32_t len,uint8_t program)
+{
+    uint32_t *pAESKeyStart0=(uint32_t *)(EF_DATA_BASE+0x1C);
+
+    if(index>5){
+        return;
+    }
+    /* Switch to AHB clock */
+    EF_Ctrl_Sw_AHB_Clk_0();
+
+    /* Every key is 4 words len*/
+    BL702_MemCpy4(pAESKeyStart0+index*4,keyData,len);
+
+    if( program){
+        EF_Ctrl_Program_Efuse_0();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Efuse read AES key from specified region and index
+ *
+ * @param  index: index of key slot
+ * @param  keyData: key data buffer
+ * @param  len: key data length in words
+ *
+ * @return None
+ *
+*******************************************************************************/
+void EF_Ctrl_Read_AES_Key(uint8_t index,uint32_t *keyData,uint32_t len)
+{
+    uint32_t *pAESKeyStart0=(uint32_t *)(EF_DATA_BASE+0x1C);
+
+    if(index>5){
+        return;
+    }
+    /* Trigger read data from efuse*/
+    EF_CTRL_LOAD_BEFORE_READ_R0;
+
+    /* Every key is 4 words len*/
+    BL702_MemCpy4(keyData,pAESKeyStart0+index*4,len);
+}
+
+/****************************************************************************//**
+ * @brief  Efuse lock writing for aes key
+ *
+ * @param  index: index of key slot
+ * @param  program: program to efuse entity or not
+ *
+ * @return None
+ *
+*******************************************************************************/
+void EF_Ctrl_Writelock_AES_Key(uint8_t index,uint8_t program)
+{
+    uint32_t tmpVal;
+
+    if(index>5){
+        return;
+    }
+    /* Switch to AHB clock */
+    EF_Ctrl_Sw_AHB_Clk_0();
+
+    tmpVal=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_LOCK);
+    if(index<=3){
+        tmpVal|=(1<<(index+19));
+    }else{
+        tmpVal|=(1<<(index+19));
+        tmpVal|=(1<<(index-4+13));
+    }
+    BL_WR_REG(EF_DATA_BASE,EF_DATA_0_LOCK,tmpVal);
+
+    if( program){
+        EF_Ctrl_Program_Efuse_0();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Efuse lock reading for aes key
+ *
+ * @param  index: index of key slot
+ * @param  program: program to efuse entity or not
+ *
+ * @return None
+ *
+*******************************************************************************/
+void EF_Ctrl_Readlock_AES_Key(uint8_t index,uint8_t program)
+{
+    uint32_t tmpVal;
+
+    if(index>5){
+        return;
+    }
+    /* Switch to AHB clock */
+    EF_Ctrl_Sw_AHB_Clk_0();
+
+    tmpVal=BL_RD_REG(EF_DATA_BASE,EF_DATA_0_LOCK);
+    tmpVal|=(1<<(index+26));
+    BL_WR_REG(EF_DATA_BASE,EF_DATA_0_LOCK,tmpVal);
+
+    if( program){
+        EF_Ctrl_Program_Efuse_0();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Program data to efuse region 0
+ *
+ * @param  index: index of efuse in word
+ * @param  data: data buffer
+ * @param  len: data length
+ *
+ * @return None
+ *
+*******************************************************************************/
+void EF_Ctrl_Program_Direct_R0(uint32_t index, uint32_t *data, uint32_t len)
+{
+    uint32_t *pEfuseStart0=(uint32_t *)(EF_DATA_BASE+0x00);
+
+    /* Switch to AHB clock */
+    EF_Ctrl_Sw_AHB_Clk_0();
+
+    /* Add delay for CLK to be stable */
+    BL702_Delay_US(4);
+
+    BL702_MemCpy4(pEfuseStart0+index,data,len);
+
+    EF_Ctrl_Program_Efuse_0();
+}
+
+/****************************************************************************//**
+ * @brief  Read data from efuse region 0
+ *
+ * @param  index: index of efuse in word
+ * @param  data: data buffer
+ * @param  len: data length
+ *
+ * @return None
+ *
+*******************************************************************************/
+void EF_Ctrl_Read_Direct_R0(uint32_t index, uint32_t *data, uint32_t len)
+{
+    uint32_t *pEfuseStart0=(uint32_t *)(EF_DATA_BASE+0x00);
+
+    EF_CTRL_LOAD_BEFORE_READ_R0;
+
+    BL702_MemCpy4(data,pEfuseStart0+index,len);
+}
+
+/****************************************************************************//**
+ * @brief  Clear efuse data register
+ *
+ * @param  index: index of efuse in word
+ * @param  len: data length
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION EF_Ctrl_Clear(uint32_t index, uint32_t len)
+{
+    uint32_t *pEfuseStart0=(uint32_t *)(EF_DATA_BASE+0x00);
+    uint32_t i=0;
+
+    /* Switch to AHB clock */
+    EF_Ctrl_Sw_AHB_Clk_0();
+
+    /* Clear data */
+    for(i=0;i
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702.h"
+#include "bl702_emac.h"
+#include "bl702_glb.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  EMAC
+ *  @{
+ */
+
+/** @defgroup  EMAC_Private_Macros
+ *  @{
+ */
+#define PHY_MAX_RETRY      (0x3F0)
+
+/*@} end of group EMAC_Private_Macros */
+
+/** @defgroup  EMAC_Private_Types
+ *  @{
+ */
+
+/*@} end of group EMAC_Private_Types */
+
+/** @defgroup  EMAC_Private_Variables
+ *  @{
+ */
+static intCallback_Type * emacIntCbfArra[EMAC_INT_CNT]={NULL};
+
+/*@} end of group EMAC_Private_Variables */
+
+/** @defgroup  EMAC_Global_Variables
+ *  @{
+ */
+
+/*@} end of group EMAC_Global_Variables */
+
+/** @defgroup  EMAC_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group EMAC_Private_Fun_Declaration */
+
+/** @defgroup  EMAC_Private_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Set MAC Address
+ *
+ * @param  macAddr[6]: MAC address buffer array
+ *
+ * @return None
+ *
+*******************************************************************************/
+static void EMAC_SetMACAddres(uint8_t macAddr[6])
+{
+    BL_WR_REG(EMAC_BASE, EMAC_MAC_ADDR1,(macAddr[0]<<8)|macAddr[1]);
+    BL_WR_REG(EMAC_BASE, EMAC_MAC_ADDR0,(macAddr[2]<<24)|(macAddr[3]<<16)|(macAddr[4]<<8)|(macAddr[5]<<0));
+}
+
+/****************************************************************************//**
+ * @brief  Read PHY register
+ *
+ * @param  phyReg: PHY register
+ * @param  regValue: PHY register value pointer
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EMAC_Phy_Read(uint16_t phyReg, uint16_t *regValue)
+{
+    uint32_t tmpVal;
+    
+    /* Set Register Address */
+    tmpVal=BL_RD_REG(EMAC_BASE, EMAC_MIIADDRESS);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,EMAC_RGAD,phyReg);
+    BL_WR_REG(EMAC_BASE, EMAC_MIIADDRESS,tmpVal);
+    
+    /* Trigger read */
+    tmpVal=BL_RD_REG(EMAC_BASE, EMAC_MIICOMMAND);    
+    tmpVal = BL_SET_REG_BIT(tmpVal,EMAC_RSTAT);
+    BL_WR_REG(EMAC_BASE, EMAC_MIICOMMAND,tmpVal);
+    
+    BL_DRV_DUMMY;
+    
+    do{
+        tmpVal=BL_RD_REG(EMAC_BASE, EMAC_MIISTATUS);
+        BL702_Delay_US(16);
+    }while(BL_IS_REG_BIT_SET(tmpVal, EMAC_MIIM_BUSY));
+        
+    
+    *regValue=BL_RD_REG(EMAC_BASE, EMAC_MIIRX_DATA);
+   
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Write PHY register
+ *
+ * @param  phyReg: PHY register
+ * @param  regValue: PHY register value
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EMAC_Phy_Write(uint16_t phyReg, uint16_t regValue)
+{
+    uint32_t tmpVal;
+    
+    /* Set Register Address */
+    tmpVal=BL_RD_REG(EMAC_BASE, EMAC_MIIADDRESS);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,EMAC_RGAD,phyReg);
+    BL_WR_REG(EMAC_BASE, EMAC_MIIADDRESS,tmpVal);
+    
+    /* Set Write data */
+    BL_WR_REG(EMAC_BASE, EMAC_MIITX_DATA,regValue);
+    
+    /* Trigger write */
+    tmpVal=BL_RD_REG(EMAC_BASE, EMAC_MIICOMMAND);    
+    tmpVal = BL_SET_REG_BIT(tmpVal,EMAC_WCTRLDATA);
+    BL_WR_REG(EMAC_BASE, EMAC_MIICOMMAND,tmpVal);
+    
+    BL_DRV_DUMMY;
+    
+    do{
+        tmpVal=BL_RD_REG(EMAC_BASE, EMAC_MIISTATUS); 
+    }while(BL_IS_REG_BIT_SET(tmpVal, EMAC_MIIM_BUSY));
+        
+    
+    return SUCCESS;
+}
+
+BL_Err_Type EMAC_Phy_Reset(void)
+{
+    int timeout = 65536UL * 32;
+    uint16_t regval = PHY_RESET;
+
+    if(EMAC_Phy_Write(PHY_BCR, PHY_RESET) != SUCCESS){
+        return ERROR;
+    }
+
+    for (; timeout; timeout --) {
+        if (SUCCESS != EMAC_Phy_Read(PHY_BCR, ®val)) {
+            return ERROR;
+        }
+        if (!(regval & PHY_RESET)) {
+            return SUCCESS;
+        }
+    }
+
+    return TIMEOUT;
+}
+
+BL_Err_Type EMAC_Phy_AutoNegotiate(ETHPHY_CFG_Type *cfg)
+{
+    uint16_t regval = 0;
+    uint16_t advertise = 0;
+    uint16_t lpa = 0;
+    uint32_t timeout = PHY_MAX_RETRY;
+
+    if (SUCCESS != EMAC_Phy_Read(PHY_PHYID1, ®val)) {
+        return ERROR;
+    }
+
+    if (SUCCESS != EMAC_Phy_Read(PHY_PHYID2, ®val)) {
+        return ERROR;
+    }
+
+    if (SUCCESS != EMAC_Phy_Read(PHY_BCR, ®val)) {
+        return ERROR;
+    }
+
+    regval &= ~PHY_AUTONEGOTIATION;
+    regval &= ~(PHY_LOOPBACK | PHY_POWERDOWN);
+    regval |= PHY_ISOLATE;
+    if(EMAC_Phy_Write(PHY_BCR, regval) != SUCCESS){
+        return ERROR;
+    }
+
+    /* set advertisement mode */
+    advertise = PHY_ADVERTISE_100BASETXFULL | PHY_ADVERTISE_100BASETXHALF |
+             PHY_ADVERTISE_10BASETXFULL | PHY_ADVERTISE_10BASETXHALF |
+             PHY_ADVERTISE_8023;
+    if(EMAC_Phy_Write(PHY_ADVERTISE, advertise) != SUCCESS){
+        return ERROR;
+    }
+
+    BL702_Delay_MS(16);
+    if (SUCCESS != EMAC_Phy_Read(PHY_BCR, ®val)) {
+        return ERROR;
+    }
+
+    BL702_Delay_MS(16);
+    regval |= (PHY_FULLDUPLEX_100M | PHY_AUTONEGOTIATION);
+    if(EMAC_Phy_Write(PHY_BCR, regval) != SUCCESS){
+        return ERROR;
+    }
+
+    BL702_Delay_MS(16);
+    regval |= PHY_RESTART_AUTONEGOTIATION;
+    regval &= ~PHY_ISOLATE;
+    if(EMAC_Phy_Write(PHY_BCR, regval) != SUCCESS){
+        return ERROR;
+    }
+
+    BL702_Delay_MS(2000);
+    while(1) {
+        if (SUCCESS != EMAC_Phy_Read(PHY_BSR, ®val)) {
+            return ERROR;
+        }
+
+        if (regval & PHY_AUTONEGO_COMPLETE) {
+            /* complete */
+            break;
+        }
+
+        if (!(--timeout)) {
+            return TIMEOUT;
+        }
+    }
+
+    BL702_Delay_MS(5000);
+    if (SUCCESS != EMAC_Phy_Read(PHY_LPA, &lpa)) {
+        return ERROR;
+    }
+
+    if (((advertise & lpa) & PHY_ADVERTISE_100BASETXFULL) != 0)
+    {
+        /* 100BaseTX and Full Duplex */
+        cfg->duplex = EMAC_MODE_FULLDUPLEX;
+        cfg->speed = EMAC_SPEED_100M;
+    }
+    else if (((advertise & lpa) & PHY_ADVERTISE_10BASETXFULL) != 0)
+    {
+        /* 10BaseT and Full Duplex */
+        cfg->duplex = EMAC_MODE_FULLDUPLEX;
+        cfg->speed = EMAC_SPEED_10M;
+    }
+    else if (((advertise & lpa) & PHY_ADVERTISE_100BASETXHALF) != 0)
+    {
+        /* 100BaseTX and half Duplex */
+        cfg->duplex = EMAC_MODE_HALFDUPLEX;
+        cfg->speed = EMAC_SPEED_100M;
+    }
+    else if (((advertise & lpa) & PHY_ADVERTISE_10BASETXHALF) != 0)
+    {
+        /* 10BaseT and half Duplex */
+        cfg->duplex = EMAC_MODE_HALFDUPLEX;
+        cfg->speed = EMAC_SPEED_10M;
+    }
+
+    return SUCCESS;
+}
+
+BL_Err_Type EMAC_Phy_Linkup(ETHPHY_CFG_Type *cfg)
+{
+    uint16_t phy_bsr = 0;
+    uint16_t phy_sr = 0;
+
+    BL702_Delay_MS(16);
+    if (SUCCESS != EMAC_Phy_Read(PHY_BSR, &phy_bsr)) {
+        return ERROR;
+    }
+
+    BL702_Delay_MS(16);
+    if (!(PHY_LINKED_STATUS & phy_bsr)) {
+        return ERROR;
+    }
+
+    BL702_Delay_MS(16);
+    if (SUCCESS != EMAC_Phy_Read(PHY_SR, &phy_sr)) {
+        return ERROR;
+    }
+
+    if ((phy_bsr & PHY_BSR_100BASETXFULL) && PHY_SR_SPEED_MODE_COMPARE(phy_sr, PHY_SR_SPEED_100BASETXFULL)) {
+        /* 100BaseTX and Full Duplex */
+        cfg->duplex = EMAC_MODE_FULLDUPLEX;
+        cfg->speed = EMAC_SPEED_100M;
+    } else if ((phy_bsr & PHY_BSR_10BASETXFULL) && PHY_SR_SPEED_MODE_COMPARE(phy_sr, PHY_SR_SPEED_10BASETXFULL)) {
+        /* 10BaseT and Full Duplex */
+        cfg->duplex = EMAC_MODE_FULLDUPLEX;
+        cfg->speed = EMAC_SPEED_10M;
+    } else if ((phy_bsr & PHY_BSR_100BASETXHALF) && PHY_SR_SPEED_MODE_COMPARE(phy_sr, PHY_SR_SPEED_100BASETXHALF)) {
+        /* 100BaseTX and half Duplex */
+        cfg->duplex = EMAC_MODE_HALFDUPLEX;
+        cfg->speed = EMAC_SPEED_100M;
+    } else if ((phy_bsr & PHY_BSR_10BASETXHALF) && PHY_SR_SPEED_MODE_COMPARE(phy_sr, PHY_SR_SPEED_10BASETXHALF)) {
+        /* 10BaseT and half Duplex */
+        cfg->duplex = EMAC_MODE_HALFDUPLEX;
+        cfg->speed = EMAC_SPEED_10M;
+    } else {
+        /* 10BaseT and half Duplex */
+        cfg->duplex = -1;
+        cfg->speed = -1;
+        return ERROR;
+    }
+
+#if 0
+    if (SUCCESS != EMAC_Phy_Read(PHY_BCR, &phy_bsr)) {
+        return ERROR;
+    }
+
+    /* enter test mode: near-end loopback */
+    BL702_Delay_MS(16);
+    phy_bsr |= PHY_LOOPBACK;
+    if(EMAC_Phy_Write(PHY_BCR, phy_bsr) != SUCCESS){
+        return ERROR;
+    }
+
+    if (SUCCESS != EMAC_Phy_Read(PHY_BCR, &phy_bsr)) {
+        return ERROR;
+    }
+#endif
+
+#if 0
+    if (SUCCESS != EMAC_Phy_Read(17, &phy_bsr)) {
+        return ERROR;
+    }
+
+    /* enter test mode: far loopback */
+    BL702_Delay_MS(16);
+    phy_bsr |= (1 << 9); /* mode control/status register, FARLOOPBACK bit */
+    if(EMAC_Phy_Write(17, phy_bsr) != SUCCESS){
+        return ERROR;
+    }
+#endif
+
+    return SUCCESS;
+}
+
+/*@} end of group EMAC_Private_Functions */
+
+/** @defgroup  EMAC_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Initialize EMAC module
+ *
+ * @param  cfg: EMAC configuration pointer
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EMAC_Init(EMAC_CFG_Type *cfg)
+{
+    uint32_t tmpVal;
+    
+    /* Disable clock gate */
+    GLB_AHB_Slave1_Clock_Gate(DISABLE,BL_AHB_SLAVE1_EMAC);
+    
+    /* Set MAC config */
+    tmpVal=BL_RD_REG(EMAC_BASE, EMAC_MODE);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,EMAC_RMII_EN,1);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,EMAC_RECSMALL,cfg->recvSmallFrame);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,EMAC_PAD,cfg->padEnable);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,EMAC_HUGEN,cfg->recvHugeFrame);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,EMAC_CRCEN,cfg->crcEnable);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,EMAC_NOPRE,cfg->noPreamble);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,EMAC_BRO,cfg->recvBroadCast);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,EMAC_PRO,ENABLE);
+    //tmpVal |= (1 << 7); /* local loopback in emac */
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,EMAC_IFG,cfg->interFrameGapCheck);
+    BL_WR_REG(EMAC_BASE, EMAC_MODE,tmpVal);
+    
+    /* Set inter frame gap value */
+    BL_WR_REG(EMAC_BASE, EMAC_IPGT,cfg->interFrameGapValue);
+    
+    /* Set MII interface */
+    tmpVal=BL_RD_REG(EMAC_BASE, EMAC_MIIMODE);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,EMAC_MIINOPRE,cfg->miiNoPreamble);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,EMAC_CLKDIV,cfg->miiClkDiv);
+    BL_WR_REG(EMAC_BASE, EMAC_MIIMODE,tmpVal);
+    
+    /* Set collision */
+    tmpVal=BL_RD_REG(EMAC_BASE, EMAC_COLLCONFIG);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,EMAC_MAXRET,cfg->maxTxRetry);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,EMAC_COLLVALID,cfg->collisionValid);
+    BL_WR_REG(EMAC_BASE, EMAC_COLLCONFIG,tmpVal);
+    
+    /* Set frame length */
+    tmpVal=BL_RD_REG(EMAC_BASE, EMAC_PACKETLEN);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,EMAC_MINFL,cfg->minFrameLen);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,EMAC_MAXFL,cfg->maxFrameLen);
+    BL_WR_REG(EMAC_BASE, EMAC_PACKETLEN,tmpVal);
+    
+    EMAC_SetMACAddres(cfg->macAddr);
+
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(EMAC_IRQn,EMAC_IRQHandler);
+#endif
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Initialize EMAC PHY module
+ *
+ * @param  cfg: EMAC PHY configuration pointer
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EMAC_PhyInit(ETHPHY_CFG_Type *cfg)
+{
+    uint32_t tmpVal;
+    uint16_t phyReg;
+    
+    /* Set Phy Address */
+    tmpVal=BL_RD_REG(EMAC_BASE, EMAC_MIIADDRESS);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,EMAC_FIAD,cfg->phyAddress);
+    BL_WR_REG(EMAC_BASE, EMAC_MIIADDRESS,tmpVal);
+
+    if (SUCCESS != EMAC_Phy_Reset()) {
+        return ERROR;
+    }
+
+    if(cfg->autoNegotiation){
+/*
+        uint32_t cnt=0;
+        do{
+            if(EMAC_Phy_Read(PHY_BSR, &phyReg) != SUCCESS){
+                return ERROR;
+            }
+            cnt++;
+            if(cnt>PHY_LINK_TO){
+                return ERROR;
+            }
+        }while((phyReg & PHY_LINKED_STATUS) != PHY_LINKED_STATUS);
+*/
+        if(SUCCESS!=EMAC_Phy_AutoNegotiate(cfg)){
+            return ERROR;
+        }
+    }else{
+        if(EMAC_Phy_Read(PHY_BCR, &phyReg) != SUCCESS){
+            return ERROR;
+        }
+        phyReg&=(~PHY_FULLDUPLEX_100M);
+        if(cfg->speed == EMAC_SPEED_10M){
+            if(cfg->duplex==EMAC_MODE_FULLDUPLEX){
+                phyReg|=PHY_FULLDUPLEX_10M;
+            }else{
+                phyReg|=PHY_HALFDUPLEX_10M;
+            }
+        }else{
+            if(cfg->duplex==EMAC_MODE_FULLDUPLEX){
+                phyReg|=PHY_FULLDUPLEX_100M;
+            }else{
+                phyReg|=PHY_HALFDUPLEX_100M;
+            }
+        }
+        if((EMAC_Phy_Write(PHY_BCR, phyReg)) != SUCCESS){
+            return ERROR;
+        }
+    }
+    
+    /* Set MAC duplex config */
+    tmpVal=BL_RD_REG(EMAC_BASE, EMAC_MODE);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,EMAC_FULLD,cfg->duplex);
+    BL_WR_REG(EMAC_BASE, EMAC_MODE,tmpVal);
+
+    EMAC_Phy_Linkup(cfg);
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  DeInitialize EMAC module
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EMAC_DeInit(void)
+{
+    EMAC_Disable();
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Initialize EMAC TX RX MDA buffer
+ *
+ * @param  handle: EMAC handle pointer
+ * @param  txBuff: TX buffer
+ * @param  txBuffCount: TX buffer count
+ * @param  rxBuff: RX buffer
+ * @param  rxBuffCount: RX buffer count
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EMAC_DMADescListInit(EMAC_Handle_Type *handle,uint8_t *txBuff, uint32_t txBuffCount,uint8_t *rxBuff, uint32_t rxBuffCount)
+{
+    uint32_t i = 0;
+
+    /* Set the Ethernet handler env */
+    handle->bd = (EMAC_BD_Desc_Type *)(EMAC_BASE+EMAC_DMA_DESC_OFFSET);
+    handle->txIndexEMAC = 0;
+    handle->txIndexCPU  = 0;
+    handle->txBuffLimit = txBuffCount - 1;
+    /* The receive descriptors' address starts right after the last transmit BD. */
+    handle->rxIndexEMAC = txBuffCount;
+    handle->rxIndexCPU  = txBuffCount;
+    handle->rxBuffLimit = txBuffCount + rxBuffCount - 1;
+
+    /* Fill each DMARxDesc descriptor with the right values */
+    for(i=0; i < txBuffCount; i++){
+        /* Get the pointer on the ith member of the Tx Desc list */
+        handle->bd[i].Buffer= (NULL == txBuff) ? 0 : (uint32_t)(txBuff+(ETH_MAX_PACKET_SIZE*i));
+        handle->bd[i].C_S_L = 0;
+    }
+    /* For the last TX DMA Descriptor, it should be wrap back */
+    handle->bd[handle->txBuffLimit].C_S_L |= EMAC_BD_FIELD_MSK(TX_WR);
+
+    for(i = txBuffCount; i < (txBuffCount + rxBuffCount); i++){
+        /* Get the pointer on the ith member of the Rx Desc list */
+        handle->bd[i].Buffer= ( NULL == rxBuff) ? 0 : (uint32_t)(rxBuff+(ETH_MAX_PACKET_SIZE*(i-txBuffCount)));
+        handle->bd[i].C_S_L = (ETH_MAX_PACKET_SIZE << 16) |
+                               EMAC_BD_FIELD_MSK(RX_IRQ) |
+                               EMAC_BD_FIELD_MSK(RX_E);
+    }
+    /* For the last RX DMA Descriptor, it should be wrap back */
+    handle->bd[handle->rxBuffLimit].C_S_L |= EMAC_BD_FIELD_MSK(RX_WR);
+    
+    /* For the TX DMA Descriptor, it will wrap to 0 according to EMAC_TX_BD_NUM*/
+    BL_WR_REG(EMAC_BASE, EMAC_TX_BD_NUM,txBuffCount);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Get TX MDA buffer descripter for data to send
+ *
+ * @param  handle: EMAC handle pointer
+ * @param  txDMADesc: TX DMA descriptor pointer
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EMAC_DMATxDescGet(EMAC_Handle_Type *handle,EMAC_BD_Desc_Type **txDMADesc)
+{
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Start TX
+ *
+ * @param  handle: EMAC handle pointer
+ * @param  txDMADesc: TX DMA descriptor pointer
+ * @param  len: len
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EMAC_StartTx(EMAC_Handle_Type *handle,EMAC_BD_Desc_Type *txDMADesc, uint32_t len)
+{
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Enable EMAC module
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EMAC_Enable(void)
+{
+    uint32_t tmpVal;
+    
+    /* Enable EMAC */
+    tmpVal=BL_RD_REG(EMAC_BASE, EMAC_MODE);
+    tmpVal=BL_SET_REG_BIT(tmpVal,EMAC_TXEN);
+    tmpVal=BL_SET_REG_BIT(tmpVal,EMAC_RXEN);
+    BL_WR_REG(EMAC_BASE, EMAC_MODE,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  EMAC_Enable_TX
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EMAC_Enable_TX(void)
+{
+    uint32_t tmpVal;
+
+    /* Enable EMAC */
+    tmpVal=BL_RD_REG(EMAC_BASE, EMAC_MODE);
+    tmpVal=BL_SET_REG_BIT(tmpVal,EMAC_TXEN);
+    BL_WR_REG(EMAC_BASE, EMAC_MODE,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  EMAC_Disable_TX
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EMAC_Disable_TX(void)
+{
+    uint32_t tmpVal;
+
+    /* Enable EMAC */
+    tmpVal=BL_RD_REG(EMAC_BASE, EMAC_MODE);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,EMAC_TXEN);
+    BL_WR_REG(EMAC_BASE, EMAC_MODE,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Disable EMAC module
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EMAC_Disable(void)
+{
+    uint32_t tmpVal;
+    
+    /* Enable EMAC */
+    tmpVal=BL_RD_REG(EMAC_BASE, EMAC_MODE);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,EMAC_TXEN);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,EMAC_RXEN);
+    BL_WR_REG(EMAC_BASE, EMAC_MODE,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  EMAC mask or unmask certain or all interrupt
+ *
+ * @param  intType: EMAC interrupt type
+ * @param  intMask: EMAC interrupt mask value( MASK:disbale interrupt,UNMASK:enable interrupt )
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EMAC_IntMask(EMAC_INT_Type intType,BL_Mask_Type intMask)
+{
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_BL_MASK_TYPE(intMask));
+
+    tmpVal = BL_RD_REG(EMAC_BASE,EMAC_INT_MASK);
+
+    /* Mask or unmask certain or all interrupt */    
+    if(MASK == intMask){
+        tmpVal |= intType;
+    }else{
+        tmpVal &= (~intType);
+    }
+    
+    /* Write back */
+    BL_WR_REG(EMAC_BASE,EMAC_INT_MASK,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Get EMAC interrupt status
+ *
+ * @param  intType: EMAC interrupt type
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Sts_Type EMAC_GetIntStatus(EMAC_INT_Type intType)
+{
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_EMAC_INT_TYPE(intType));
+    
+    tmpVal = BL_RD_REG(EMAC_BASE,EMAC_INT_SOURCE);
+    
+    return (tmpVal & intType) ? SET : RESET;
+    
+}
+
+/****************************************************************************//**
+ * @brief  Clear EMAC interrupt
+ *
+ * @param  intType: EMAC interrupt type
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EMAC_ClrIntStatus(EMAC_INT_Type intType)
+{
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_EMAC_INT_TYPE(intType));
+
+    tmpVal = BL_RD_REG(EMAC_BASE,EMAC_INT_SOURCE);
+
+    BL_WR_REG(EMAC_BASE,EMAC_INT_SOURCE,tmpVal | intType);
+
+    return SUCCESS;
+}
+
+
+/****************************************************************************//**
+ * @brief  EMAC_Int_Callback_Install
+ *
+ * @param  intIdx: EMAC_INT_Index
+ * @param  cbFun: call back
+ *
+ * @return None
+ *
+*******************************************************************************/
+BL_Err_Type EMAC_Int_Callback_Install(EMAC_INT_Index intIdx, intCallback_Type* cbFun)
+{
+    /* Check the parameters */
+
+    emacIntCbfArra[intIdx] = cbFun;
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  EMAC_IRQHandler
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void EMAC_IRQHandler(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal = BL_RD_REG(EMAC_BASE,EMAC_INT_MASK);
+    
+    if (SET == EMAC_GetIntStatus(EMAC_INT_TX_DONE) && !BL_IS_REG_BIT_SET(tmpVal,EMAC_TXB_M)) {
+        EMAC_ClrIntStatus(EMAC_INT_TX_DONE);
+        if(emacIntCbfArra[EMAC_INT_TX_DONE_IDX]){
+            emacIntCbfArra[EMAC_INT_TX_DONE_IDX]();
+        }
+    }
+
+    if (SET == EMAC_GetIntStatus(EMAC_INT_TX_ERROR) && !BL_IS_REG_BIT_SET(tmpVal,EMAC_TXE_M)) {
+        EMAC_ClrIntStatus(EMAC_INT_TX_ERROR);
+        if(emacIntCbfArra[EMAC_INT_TX_ERROR_IDX]){
+            emacIntCbfArra[EMAC_INT_TX_ERROR_IDX]();
+        }
+    }
+
+    if (SET == EMAC_GetIntStatus(EMAC_INT_RX_DONE) && !BL_IS_REG_BIT_SET(tmpVal,EMAC_RXB_M)) {
+        EMAC_ClrIntStatus(EMAC_INT_RX_DONE);
+        if(emacIntCbfArra[EMAC_INT_RX_DONE_IDX]){
+            emacIntCbfArra[EMAC_INT_RX_DONE_IDX]();
+        }
+    }
+
+    if (SET == EMAC_GetIntStatus(EMAC_INT_RX_ERROR) && !BL_IS_REG_BIT_SET(tmpVal,EMAC_RXE_M)) {
+        EMAC_ClrIntStatus(EMAC_INT_RX_ERROR);
+        if(emacIntCbfArra[EMAC_INT_RX_ERROR_IDX]){
+            emacIntCbfArra[EMAC_INT_RX_ERROR_IDX]();
+        }
+    }
+
+    if (SET == EMAC_GetIntStatus(EMAC_INT_RX_BUSY) && !BL_IS_REG_BIT_SET(tmpVal,EMAC_BUSY_M)) {
+        EMAC_ClrIntStatus(EMAC_INT_RX_BUSY);
+        if(emacIntCbfArra[EMAC_INT_RX_BUSY_IDX]){
+            emacIntCbfArra[EMAC_INT_RX_BUSY_IDX]();
+        }
+    }
+
+    if (SET == EMAC_GetIntStatus(EMAC_INT_TX_CTRL) && !BL_IS_REG_BIT_SET(tmpVal,EMAC_TXC_M)) {
+        EMAC_ClrIntStatus(EMAC_INT_TX_CTRL);
+        if(emacIntCbfArra[EMAC_INT_TX_CTRL_IDX]){
+            emacIntCbfArra[EMAC_INT_TX_CTRL_IDX]();
+        }
+    }
+
+    if (SET == EMAC_GetIntStatus(EMAC_INT_RX_CTRL) && !BL_IS_REG_BIT_SET(tmpVal,EMAC_RXC_M)) {
+        EMAC_ClrIntStatus(EMAC_INT_RX_CTRL);
+        if(emacIntCbfArra[EMAC_INT_RX_CTRL_IDX]){
+            emacIntCbfArra[EMAC_INT_RX_CTRL_IDX]();
+        }
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Request to pause TX
+ *
+ * @param  timeCount: Pause time count
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EMAC_TxPauseReq(uint16_t timeCount)
+{    
+    BL_WR_REG(EMAC_BASE,EMAC_TXCTRL,(1<<16)|timeCount);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Set hash value
+ *
+ * @param  hash0: Hash value one
+ * @param  hash1: Hash value two
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type EMAC_SetHash(uint32_t hash0,uint32_t hash1)
+{    
+    BL_WR_REG(EMAC_BASE,EMAC_HASH0_ADDR,hash0);
+    
+    BL_WR_REG(EMAC_BASE,EMAC_HASH1_ADDR,hash1);
+    
+    return SUCCESS;
+}
+
+
+/*@} end of group EMAC_Public_Functions */
+
+/*@} end of group EMAC */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_glb.c b/drivers/bl702_driver/std_drv/src/bl702_glb.c
new file mode 100644
index 00000000..f9e87a61
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_glb.c
@@ -0,0 +1,3470 @@
+/**
+  ******************************************************************************
+  * @file    bl702_glb.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_glb.h"
+#include "bl702_hbn.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  GLB
+ *  @{
+ */
+
+/** @defgroup  GLB_Private_Macros
+ *  @{
+ */
+#define GLB_CLK_SET_DUMMY_WAIT          {__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();}
+#define GLB_GPIO_Get_Reg(pin)           (glb_gpio_reg_t*)(GLB_BASE+GLB_GPIO_OFFSET+(pin/2)*4)
+#define GLB_GPIO_INT0_NUM               (32)
+#define GLB_REG_BCLK_DIS_TRUE           (*(volatile uint32_t *)(0x40000FFC)=(0x00000001))
+#define GLB_REG_BCLK_DIS_FALSE          (*(volatile uint32_t *)(0x40000FFC)=(0x00000000))
+#define GLB_GPIO_INT0_CLEAR_TIMEOUT     (32)
+
+/*@} end of group GLB_Private_Macros */
+
+/** @defgroup  GLB_Private_Types
+ *  @{
+ */
+
+/*@} end of group GLB_Private_Types */
+
+/** @defgroup  GLB_Private_Variables
+ *  @{
+ */
+static intCallback_Type * glbBmxErrIntCbfArra[BMX_ERR_INT_ALL]={NULL};
+static intCallback_Type * glbBmxToIntCbfArra[BMX_TO_INT_ALL]={NULL};
+static intCallback_Type * glbGpioInt0CbfArra[GLB_GPIO_INT0_NUM]  = {NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,
+                                                                    NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,
+                                                                    NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,
+                                                                    NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL};
+static intCallback_Type * glbGpioInt0CbfArra2[GLB_GPIO_INT0_NUM] = {NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,
+                                                                    NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,
+                                                                    NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,
+                                                                    NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL};
+
+
+/*@} end of group GLB_Private_Variables */
+
+/** @defgroup  GLB_Global_Variables
+ *  @{
+ */
+
+/*@} end of group GLB_Global_Variables */
+
+/** @defgroup  GLB_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group GLB_Private_Fun_Declaration */
+
+/** @defgroup  GLB_Private_Functions
+ *  @{
+ */
+
+/*@} end of group GLB_Private_Functions */
+
+/** @defgroup  GLB_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  get root clock selection
+ *
+ * @param  None
+ *
+ * @return root clock selection
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+GLB_ROOT_CLK_Type ATTR_CLOCK_SECTION GLB_Get_Root_CLK_Sel(void)
+{
+    uint32_t tmpVal = 0;
+    
+    tmpVal = BL_RD_REG(GLB_BASE,GLB_CLK_CFG0);
+    
+    switch(BL_GET_REG_BITS_VAL(tmpVal,GLB_HBN_ROOT_CLK_SEL)){
+        case 0:
+            return GLB_ROOT_CLK_RC32M;
+        case 1:
+            return GLB_ROOT_CLK_XTAL;
+        case 2:
+        case 3:
+            return GLB_ROOT_CLK_DLL;
+        default :
+            return GLB_ROOT_CLK_RC32M;
+    }
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Set System clock divider
+ *
+ * @param  hclkDiv: HCLK divider
+ * @param  bclkDiv: BCLK divider
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_CLOCK_SECTION GLB_Set_System_CLK_Div(uint8_t hclkDiv,uint8_t bclkDiv)
+{
+    /***********************************************************************************/
+    /*                                 NOTE                                            */
+    /* "GLB_REG_BCLK_DIS_TRUE + GLB_REG_BCLK_DIS_FALSE" will stop bclk a little while. */
+    /* OCRAM use bclk as source clock. Pay attention to risks when using this API.     */
+    /***********************************************************************************/
+    uint32_t tmpVal;
+    
+    /* recommend: fclk<=160MHz, bclk<=80MHz */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_CLK_CFG0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_REG_HCLK_DIV,hclkDiv);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_REG_BCLK_DIV,bclkDiv);
+    BL_WR_REG(GLB_BASE,GLB_CLK_CFG0,tmpVal);
+    GLB_REG_BCLK_DIS_TRUE;
+    GLB_REG_BCLK_DIS_FALSE;
+    SystemCoreClockSet(SystemCoreClockGet()/((uint16_t)hclkDiv+1));
+    GLB_CLK_SET_DUMMY_WAIT;
+    
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_CLK_CFG0);
+    tmpVal=BL_SET_REG_BIT(tmpVal,GLB_REG_HCLK_EN);
+    tmpVal=BL_SET_REG_BIT(tmpVal,GLB_REG_BCLK_EN);
+    BL_WR_REG(GLB_BASE,GLB_CLK_CFG0,tmpVal);
+    GLB_CLK_SET_DUMMY_WAIT;
+    
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Get Bus clock divider
+ *
+ * @param  None
+ *
+ * @return Clock Divider
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+uint8_t ATTR_CLOCK_SECTION GLB_Get_BCLK_Div(void)
+{
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_CLK_CFG0);
+
+    return BL_GET_REG_BITS_VAL(tmpVal,GLB_REG_BCLK_DIV);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Get CPU clock divider
+ *
+ * @param  None
+ *
+ * @return Clock Divider
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+uint8_t ATTR_CLOCK_SECTION GLB_Get_HCLK_Div(void)
+{
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_CLK_CFG0);
+
+    return BL_GET_REG_BITS_VAL(tmpVal,GLB_REG_HCLK_DIV);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  update SystemCoreClock value
+ *
+ * @param  xtalType: XTAL frequency type
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_CLOCK_SECTION Update_SystemCoreClockWith_XTAL(GLB_DLL_XTAL_Type xtalType)
+{
+    CHECK_PARAM(IS_GLB_DLL_XTAL_TYPE(xtalType));
+    
+    switch(xtalType){
+        case GLB_DLL_XTAL_NONE:
+            break;
+        case GLB_DLL_XTAL_32M:
+            SystemCoreClockSet(32000000);
+            break;
+        case GLB_DLL_XTAL_RC32M:
+            SystemCoreClockSet(32000000);
+            break;
+        default :
+            break;
+    }
+    
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Set System clock
+ *
+ * @param  xtalType: XTAL frequency type
+ * @param  clkFreq: clock frequency selection
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_CLOCK_SECTION GLB_Set_System_CLK(GLB_DLL_XTAL_Type xtalType,GLB_SYS_CLK_Type clkFreq)
+{
+    uint32_t tmpVal;
+    
+    CHECK_PARAM(IS_GLB_DLL_XTAL_TYPE(xtalType));
+    CHECK_PARAM(IS_GLB_SYS_CLK_TYPE(clkFreq));
+    
+    /* reg_bclk_en = reg_hclk_en = reg_fclk_en = 1, cannot be zero */
+    tmpVal = BL_RD_REG(GLB_BASE,GLB_CLK_CFG0);
+    tmpVal = BL_SET_REG_BIT(tmpVal,GLB_REG_BCLK_EN);
+    tmpVal = BL_SET_REG_BIT(tmpVal,GLB_REG_HCLK_EN);
+    tmpVal = BL_SET_REG_BIT(tmpVal,GLB_REG_FCLK_EN);
+    BL_WR_REG(GLB_BASE,GLB_CLK_CFG0,tmpVal);
+    
+    /* Before config XTAL and DLL ,make sure root clk is from RC32M */
+    HBN_Set_ROOT_CLK_Sel(HBN_ROOT_CLK_RC32M);
+    GLB_Set_System_CLK_Div(0,0);
+    SystemCoreClockSet(32*1000*1000);
+    
+    if(xtalType==GLB_DLL_XTAL_NONE){
+        if(clkFreq==GLB_SYS_CLK_RC32M){
+            return SUCCESS;
+        }else{
+            return ERROR;
+        }
+    }
+    
+    if(xtalType!=GLB_DLL_XTAL_RC32M){
+        /* power on xtal first */
+        AON_Power_On_XTAL();
+    }
+    
+    /* Bl702 make PLL Setting out of RF, so following setting can be removed*/
+    //AON_Power_On_MBG();
+    //AON_Power_On_LDO15_RF();
+    
+    /* always power up PLL and enable all PLL clock output */
+    //PDS_Power_On_PLL((PDS_PLL_XTAL_Type)xtalType);
+    //BL702_Delay_US(55);
+    //PDS_Enable_PLL_All_Clks();
+    
+    /* always power up DLL and enable all DLL clock output */
+    GLB_Power_Off_DLL();
+    GLB_Power_On_DLL(xtalType);
+    GLB_Enable_DLL_All_Clks();
+    
+    /* reg_pll_en = 1, cannot be zero */
+    tmpVal = BL_RD_REG(GLB_BASE,GLB_CLK_CFG0);
+    tmpVal = BL_SET_REG_BIT(tmpVal,GLB_REG_PLL_EN);
+    BL_WR_REG(GLB_BASE,GLB_CLK_CFG0,tmpVal);
+    
+    /* select pll output clock before select root clock */
+    if(clkFreq>=GLB_SYS_CLK_DLL57P6M){
+        tmpVal = BL_RD_REG(GLB_BASE,GLB_CLK_CFG0);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal,GLB_REG_PLL_SEL,clkFreq-GLB_SYS_CLK_DLL57P6M);
+        BL_WR_REG(GLB_BASE,GLB_CLK_CFG0,tmpVal);
+    }
+    /* select root clock */
+    switch(clkFreq){
+        case GLB_SYS_CLK_RC32M:
+            break;
+        case GLB_SYS_CLK_XTAL:
+            HBN_Set_ROOT_CLK_Sel(HBN_ROOT_CLK_XTAL);
+            Update_SystemCoreClockWith_XTAL(xtalType);
+            break;
+        case GLB_SYS_CLK_DLL57P6M:
+            HBN_Set_ROOT_CLK_Sel(HBN_ROOT_CLK_DLL);
+            SystemCoreClockSet(57*6000*1000);
+            break;
+        case GLB_SYS_CLK_DLL96M:
+            L1C_IROM_2T_Access_Set(ENABLE);
+            GLB_Set_System_CLK_Div(0,1);
+            HBN_Set_ROOT_CLK_Sel(HBN_ROOT_CLK_DLL);
+            SystemCoreClockSet(96*1000*1000);
+            break;
+        case GLB_SYS_CLK_DLL144M:
+            L1C_IROM_2T_Access_Set(ENABLE);
+            GLB_Set_System_CLK_Div(0,1);
+            HBN_Set_ROOT_CLK_Sel(HBN_ROOT_CLK_DLL);
+            SystemCoreClockSet(144*1000*1000);
+            break;
+        default :
+            break;
+    }
+    
+    GLB_CLK_SET_DUMMY_WAIT;
+    
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  This is demo for user that use RC32M as default bootup clock instead of DLL,when APP is
+ *         started, this function can be called to set DLL to 160M
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_CLOCK_SECTION System_Core_Clock_Update_From_RC32M(void)
+{
+    SF_Ctrl_Cfg_Type sfCtrlCfg={
+        .owner=SF_CTRL_OWNER_IAHB,
+        .clkDelay=1,
+        .clkInvert=1,
+        .rxClkInvert=1,
+        .doDelay=0,
+        .diDelay=0,
+        .oeDelay=0,
+    };
+    /* Use RC32M as DLL ref source to set up DLL to 144M */
+    GLB_Set_System_CLK(GLB_DLL_XTAL_RC32M,GLB_SYS_CLK_DLL144M);
+    /* Flash controller also need changes since system (bus) clock changed */
+    SF_Ctrl_Enable(&sfCtrlCfg);
+    __NOP();
+    __NOP();
+    __NOP();
+    __NOP();
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  set CAM clock
+ *
+ * @param  enable: Enable or disable CAM clock
+ * @param  clkSel: CAM clock type
+ * @param  div: clock divider
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_Set_CAM_CLK(uint8_t enable,GLB_CAM_CLK_Type clkSel,uint8_t div)
+{
+    uint32_t tmpVal = 0;
+
+    CHECK_PARAM(IS_GLB_CAM_CLK_TYPE(clkSel));
+
+    tmpVal = BL_RD_REG(GLB_BASE,GLB_CLK_CFG1);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,GLB_REG_CAM_REF_CLK_SRC_SEL,clkSel);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,GLB_REG_CAM_REF_CLK_DIV,div);
+    BL_WR_REG(GLB_BASE,GLB_CLK_CFG1,tmpVal);
+
+    tmpVal = BL_RD_REG(GLB_BASE,GLB_CLK_CFG1);
+    if(enable){
+        tmpVal = BL_SET_REG_BIT(tmpVal,GLB_REG_CAM_REF_CLK_EN);
+    }else{
+        tmpVal = BL_CLR_REG_BIT(tmpVal,GLB_REG_CAM_REF_CLK_EN);
+    }
+    BL_WR_REG(GLB_BASE,GLB_CLK_CFG1,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  set mac154 and zigbee clock
+ *
+ * @param  enable: Enable or disable mac154 and zigbee clock
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_Set_MAC154_ZIGBEE_CLK(uint8_t enable)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal = BL_RD_REG(GLB_BASE,GLB_CLK_CFG1);
+    if(enable){
+        tmpVal = BL_SET_REG_BIT(tmpVal,GLB_M154_ZBEN);
+    }else{
+        tmpVal = BL_CLR_REG_BIT(tmpVal,GLB_M154_ZBEN);
+    }
+    BL_WR_REG(GLB_BASE,GLB_CLK_CFG1,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  set BLE clock
+ *
+ * @param  enable: Enable or disable BLE clock
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_Set_BLE_CLK(uint8_t enable)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal = BL_RD_REG(GLB_BASE,GLB_CLK_CFG1);
+    if(enable){
+        tmpVal = BL_SET_REG_BIT(tmpVal,GLB_BLE_EN);
+    }else{
+        tmpVal = BL_CLR_REG_BIT(tmpVal,GLB_BLE_EN);
+    }
+    BL_WR_REG(GLB_BASE,GLB_CLK_CFG1,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  set I2S clock
+ *
+ * @param  enable: Enable or disable I2S clock
+ * @param  outRef: I2S output ref clock type
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_Set_I2S_CLK(uint8_t enable,GLB_I2S_OUT_REF_CLK_Type outRef)
+{
+    uint32_t tmpVal = 0;
+
+    CHECK_PARAM(IS_GLB_I2S_OUT_REF_CLK_TYPE(outRef));
+
+    tmpVal = BL_RD_REG(GLB_BASE,GLB_CLK_CFG1);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,GLB_REG_I2S_0_REF_CLK_OE,outRef);
+    BL_WR_REG(GLB_BASE,GLB_CLK_CFG1,tmpVal);
+
+    tmpVal = BL_RD_REG(GLB_BASE,GLB_CLK_CFG1);
+    if(enable){
+        tmpVal = BL_SET_REG_BIT(tmpVal,GLB_REG_I2S0_CLK_EN);
+    }else{
+        tmpVal = BL_CLR_REG_BIT(tmpVal,GLB_REG_I2S0_CLK_EN);
+    }
+    BL_WR_REG(GLB_BASE,GLB_CLK_CFG1,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  set USB clock
+ *
+ * @param  enable: Enable or disable USB clock
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_Set_USB_CLK(uint8_t enable)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal = BL_RD_REG(GLB_BASE,GLB_CLK_CFG1);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_48M_DIV_EN,1);
+    BL_WR_REG(GLB_BASE,GLB_CLK_CFG1,tmpVal);
+
+    tmpVal = BL_RD_REG(GLB_BASE,GLB_CLK_CFG1);
+    if(enable){
+        tmpVal = BL_SET_REG_BIT(tmpVal,GLB_USB_CLK_EN);
+    }else{
+        tmpVal = BL_CLR_REG_BIT(tmpVal,GLB_USB_CLK_EN);
+    }
+    BL_WR_REG(GLB_BASE,GLB_CLK_CFG1,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  set QDEC clock
+ *
+ * @param  clkSel: QDEC clock type
+ * @param  div: clock divider
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_Set_QDEC_CLK(GLB_QDEC_CLK_Type clkSel,uint8_t div)
+{
+    uint32_t tmpVal = 0;
+
+    CHECK_PARAM(IS_GLB_QDEC_CLK_TYPE(clkSel));
+
+    tmpVal = BL_RD_REG(GLB_BASE,GLB_CLK_CFG1);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,GLB_QDEC_CLK_SEL,clkSel);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,GLB_QDEC_CLK_DIV,div);
+    BL_WR_REG(GLB_BASE,GLB_CLK_CFG1,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  set DMA clock
+ *
+ * @param  enable: Enable or disable DMA clock
+ * @param  clk: DMA ID type
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_Set_DMA_CLK(uint8_t enable,GLB_DMA_CLK_ID_Type clk)
+{
+    uint32_t tmpVal;
+    uint32_t tmpVal2;
+
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_CLK_CFG2);
+    tmpVal2=BL_GET_REG_BITS_VAL(tmpVal,GLB_DMA_CLK_EN);
+    if(enable){
+        tmpVal2 |=(1< gate QDEC0 + QDEC1 +QDEC2 + I2S */
+    /* gate I2S  <=> gate I2S + QDEC2                */
+    
+    uint32_t tmpVal = 0;
+    
+    if((BL_AHB_SLAVE1_GLB==slave1)||(BL_AHB_SLAVE1_TZ2==slave1)|| \
+       (BL_AHB_SLAVE1_CCI==slave1)||(BL_AHB_SLAVE1_L1C==slave1)|| \
+       (BL_AHB_SLAVE1_PDS_HBN_AON_HBNRAM==slave1)){
+       /* not support */
+       return ERROR;
+    }
+    
+    /* gate QDEC and I2S */
+    if(BL_AHB_SLAVE1_QDEC==slave1){
+        tmpVal=BL_RD_REG(GLB_BASE,GLB_CGEN_CFG1);
+        if(enable){
+            /* clear bit means clock gate */
+            tmpVal &=(~(1<<0x18));
+            tmpVal &=(~(1<<0x19));
+            tmpVal &=(~(1<<0x1A));
+        }else{
+            /* set bit means clock pass */
+            tmpVal |=(1<<0x18);
+            tmpVal |=(1<<0x19);
+            tmpVal |=(1<<0x1A);
+        }
+        BL_WR_REG(GLB_BASE,GLB_CGEN_CFG1,tmpVal);
+       return SUCCESS;
+    }
+    
+    /* gate KYS */
+    if(BL_AHB_SLAVE1_KYS==slave1){
+        tmpVal=BL_RD_REG(GLB_BASE,GLB_CGEN_CFG1);
+        if(enable){
+            /* clear bit means clock gate */
+            tmpVal &=(~(1<<0x1B));
+        }else{
+            /* set bit means clock pass */
+            tmpVal |=(1<<0x1B);
+        }
+        BL_WR_REG(GLB_BASE,GLB_CGEN_CFG1,tmpVal);
+       return SUCCESS;
+    }
+    
+    /* gate I2S and QDEC2 */
+    if(BL_AHB_SLAVE1_I2S==slave1){
+        tmpVal=BL_RD_REG(GLB_BASE,GLB_CGEN_CFG1);
+        if(enable){
+            /* clear bit means clock gate */
+            tmpVal &=(~(1<<0x1A));
+        }else{
+            /* set bit means clock pass */
+            tmpVal |=(1<<0x1A);
+        }
+        BL_WR_REG(GLB_BASE,GLB_CGEN_CFG1,tmpVal);
+       return SUCCESS;
+    }
+    
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_CGEN_CFG1);
+    if(enable){
+        /* clear bit means clock gate */
+        tmpVal &=(~(1<timeoutEn)<=0xF);
+
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_BMX_CFG1);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_BMX_TIMEOUT_EN,BmxCfg->timeoutEn);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_BMX_ERR_EN,BmxCfg->errEn);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_BMX_ARB_MODE,BmxCfg->arbMod);
+    BL_WR_REG(GLB_BASE,GLB_BMX_CFG1,tmpVal);
+
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(BMX_ERR_IRQn,BMX_ERR_IRQHandler);
+    Interrupt_Handler_Register(BMX_TO_IRQn,BMX_TO_IRQHandler);
+#endif
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  BMX address monitor enable
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_BMX_Addr_Monitor_Enable(void)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_BMX_CFG2);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,GLB_BMX_ERR_ADDR_DIS);
+    BL_WR_REG(GLB_BASE,GLB_BMX_CFG2,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  BMX address monitor disable
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_BMX_Addr_Monitor_Disable(void)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_BMX_CFG2);
+    tmpVal=BL_SET_REG_BIT(tmpVal,GLB_BMX_ERR_ADDR_DIS);
+    BL_WR_REG(GLB_BASE,GLB_BMX_CFG2,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  BMX bus error response enable
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_BMX_BusErrResponse_Enable(void)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_BMX_CFG1);
+    tmpVal=BL_SET_REG_BIT(tmpVal,GLB_BMX_ERR_EN);
+    BL_WR_REG(GLB_BASE,GLB_BMX_CFG1,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  BMX bus error response disable
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_BMX_BusErrResponse_Disable(void)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_BMX_CFG1);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,GLB_BMX_ERR_EN);
+    BL_WR_REG(GLB_BASE,GLB_BMX_CFG1,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Get BMX error status
+ *
+ * @param  errType: BMX error status type
+ *
+ * @return SET or RESET
+ *
+*******************************************************************************/
+BL_Sts_Type GLB_BMX_Get_Status(BMX_BUS_ERR_Type errType)
+{
+    uint32_t tmpVal = 0;
+
+    CHECK_PARAM(IS_BMX_BUS_ERR_TYPE(errType));
+
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_BMX_CFG2);
+    if(errType==BMX_BUS_ERR_TRUSTZONE_DECODE){
+        return BL_GET_REG_BITS_VAL(tmpVal,GLB_BMX_ERR_TZ)?SET:RESET;
+    }else{
+        return BL_GET_REG_BITS_VAL(tmpVal,GLB_BMX_ERR_DEC)?SET:RESET;
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Get BMX error address
+ *
+ * @param  None
+ *
+ * @return NP BMX error address
+ *
+*******************************************************************************/
+uint32_t GLB_BMX_Get_Err_Addr(void)
+{
+    return BL_RD_REG(GLB_BASE,GLB_BMX_ERR_ADDR);
+}
+
+/****************************************************************************//**
+ * @brief  BMX error interrupt callback install
+ *
+ * @param  intType: BMX error interrupt type
+ * @param  cbFun: callback
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type BMX_ERR_INT_Callback_Install(BMX_ERR_INT_Type intType,intCallback_Type* cbFun)
+{
+    CHECK_PARAM(IS_BMX_ERR_INT_TYPE(intType));
+
+    glbBmxErrIntCbfArra[intType] = cbFun;
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  BMX ERR interrupt IRQ handler
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void BMX_ERR_IRQHandler(void)
+{
+    BMX_ERR_INT_Type intType;
+
+    for(intType=BMX_ERR_INT_ERR;intTypedll.BF.ppu_dll = 0;   */
+    /* GLB->dll.BF.pu_dll = 0;    */
+    /* GLB->dll.BF.dll_reset = 1; */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_DLL);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_PPU_DLL,0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_PU_DLL,0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_RESET,1);
+    BL_WR_REG(GLB_BASE,GLB_DLL,tmpVal);
+    
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  power on DLL
+ *
+ * @param  xtalType: DLL xtal type
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_CLOCK_SECTION GLB_Power_On_DLL(GLB_DLL_XTAL_Type xtalType)
+{
+    uint32_t tmpVal=0;
+    
+    CHECK_PARAM(IS_GLB_DLL_XTAL_TYPE(xtalType));
+    
+    /* GLB->dll.BF.dll_refclk_sel = XXX; */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_DLL);
+    switch(xtalType){
+        case GLB_DLL_XTAL_NONE:
+            return ERROR;
+        case GLB_DLL_XTAL_32M:
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_REFCLK_SEL,0);
+            break;
+        case GLB_DLL_XTAL_RC32M:
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_REFCLK_SEL,1);
+            break;
+        default :
+            break;
+    }
+    BL_WR_REG(GLB_BASE,GLB_DLL,tmpVal);
+    
+    /* GLB->dll.BF.dll_prechg_sel = 1;   */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_DLL);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_PRECHG_SEL,1);
+    BL_WR_REG(GLB_BASE,GLB_DLL,tmpVal);
+    
+    /* GLB->dll.BF.ppu_dll = 1;   */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_DLL);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_PPU_DLL,1);
+    BL_WR_REG(GLB_BASE,GLB_DLL,tmpVal);
+    
+    BL702_Delay_US(2);
+    
+    /* GLB->dll.BF.pu_dll = 1; */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_DLL);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_PU_DLL,1);
+    BL_WR_REG(GLB_BASE,GLB_DLL,tmpVal);
+    
+    BL702_Delay_US(2);
+    
+    /* GLB->dll.BF.dll_reset = 0; */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_DLL);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_RESET,0);
+    BL_WR_REG(GLB_BASE,GLB_DLL,tmpVal);
+    
+    /* delay for settling */
+    BL702_Delay_US(5);
+    
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  enable all DLL output clock
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_CLOCK_SECTION GLB_Enable_DLL_All_Clks(void)
+{
+    uint32_t tmpVal=0;
+    
+    /* GLB->dll.WORD = GLB->dll.WORD | 0x000000f8; include 288m and mmdiv */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_DLL);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_57P6M_EN,1);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_96M_EN,1);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_144M_EN,1);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_288M_EN,1);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_MMDIV_EN,1);
+    BL_WR_REG(GLB_BASE,GLB_DLL,tmpVal);
+    
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  enable one of DLL output clock
+ *
+ * @param  dllClk: None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_CLOCK_SECTION GLB_Enable_DLL_Clk(GLB_DLL_CLK_Type dllClk)
+{
+    uint32_t tmpVal=0;
+    
+    CHECK_PARAM(IS_GLB_DLL_CLK_TYPE(dllClk));
+    
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_DLL);
+    switch(dllClk){
+        case GLB_DLL_CLK_57P6M:
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_57P6M_EN,1);
+            break;
+        case GLB_DLL_CLK_96M:
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_96M_EN,1);
+            break;
+        case GLB_DLL_CLK_144M:
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_144M_EN,1);
+            break;
+        case GLB_DLL_CLK_288M:
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_288M_EN,1);
+            break;
+        case GLB_DLL_CLK_MMDIV:
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_MMDIV_EN,1);
+            break;
+        default :
+            break;
+    }
+    BL_WR_REG(GLB_BASE,GLB_DLL,tmpVal);
+    
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  disable all DLL output clock
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_CLOCK_SECTION GLB_Disable_DLL_All_Clks(void)
+{
+    uint32_t tmpVal=0;
+    
+    /* GLB->dll.WORD = GLB->dll.WORD & ~0x000000f8; */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_DLL);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_57P6M_EN,0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_96M_EN,0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_144M_EN,0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_288M_EN,0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_MMDIV_EN,0);
+    BL_WR_REG(GLB_BASE,GLB_DLL,tmpVal);
+    
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  disable one of DLL output clock
+ *
+ * @param  dllClk: None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_CLOCK_SECTION GLB_Disable_DLL_Clk(GLB_DLL_CLK_Type dllClk)
+{
+    uint32_t tmpVal=0;
+    
+    CHECK_PARAM(IS_GLB_DLL_CLK_TYPE(dllClk));
+    
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_DLL);
+    switch(dllClk){
+        case GLB_DLL_CLK_57P6M:
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_57P6M_EN,0);
+            break;
+        case GLB_DLL_CLK_96M:
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_96M_EN,0);
+            break;
+        case GLB_DLL_CLK_144M:
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_144M_EN,0);
+            break;
+        case GLB_DLL_CLK_288M:
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_288M_EN,0);
+            break;
+        case GLB_DLL_CLK_MMDIV:
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_DLL_CLK_MMDIV_EN,0);
+            break;
+        default :
+            break;
+    }
+    BL_WR_REG(GLB_BASE,GLB_DLL,tmpVal);
+    
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Select ir rx gpio (gpio17~gpio31)
+ *
+ * @param  gpio: IR gpio selected
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_IR_RX_GPIO_Sel(GLB_GPIO_Type gpio)
+{
+    uint32_t tmpVal=0;
+
+    /* Select gpio between gpio17 and gpio31 */
+    if(gpio>16 && gpio<32){
+        tmpVal=BL_RD_REG(GLB_BASE,GLB_LED_DRIVER);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_IR_RX_GPIO_SEL,gpio-16);
+        BL_WR_REG(GLB_BASE,GLB_LED_DRIVER,tmpVal);
+    }
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Enable ir led driver
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_IR_LED_Driver_Enable(void)
+{
+    uint32_t tmpVal=0;
+
+    /* Enable led driver */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_LED_DRIVER);
+    tmpVal=BL_SET_REG_BIT(tmpVal,GLB_PU_LEDDRV);
+    BL_WR_REG(GLB_BASE,GLB_LED_DRIVER,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Disable ir led driver
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_IR_LED_Driver_Disable(void)
+{
+    uint32_t tmpVal=0;
+
+    /* Disable led driver */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_LED_DRIVER);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,GLB_PU_LEDDRV);
+    BL_WR_REG(GLB_BASE,GLB_LED_DRIVER,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Enable ir led driver gpio output(gpio 22 or 23)
+ *
+ * @param  gpio: IR gpio selected
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_IR_LED_Driver_Output_Enable(GLB_GPIO_Type gpio)
+{
+    uint32_t tmpVal=0;
+
+    if(gpio == GLB_GPIO_PIN_22){
+        tmpVal=BL_RD_REG(GLB_BASE,GLB_LED_DRIVER);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_LEDDRV_OUT_EN,BL_GET_REG_BITS_VAL(tmpVal,GLB_LEDDRV_OUT_EN)|1);
+        BL_WR_REG(GLB_BASE,GLB_LED_DRIVER,tmpVal);
+    }else if(gpio == GLB_GPIO_PIN_23){
+        tmpVal=BL_RD_REG(GLB_BASE,GLB_LED_DRIVER);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_LEDDRV_OUT_EN,BL_GET_REG_BITS_VAL(tmpVal,GLB_LEDDRV_OUT_EN)|2);
+        BL_WR_REG(GLB_BASE,GLB_LED_DRIVER,tmpVal);
+    }
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Disable ir led driver gpio output(gpio 22 or 23)
+ *
+ * @param  gpio: IR gpio selected
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_IR_LED_Driver_Output_Disable(GLB_GPIO_Type gpio)
+{
+    uint32_t tmpVal=0;
+
+    if(gpio == GLB_GPIO_PIN_22){
+        tmpVal=BL_RD_REG(GLB_BASE,GLB_LED_DRIVER);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_LEDDRV_OUT_EN,BL_GET_REG_BITS_VAL(tmpVal,GLB_LEDDRV_OUT_EN)&~1);
+        BL_WR_REG(GLB_BASE,GLB_LED_DRIVER,tmpVal);
+    }else if(gpio == GLB_GPIO_PIN_23){
+        tmpVal=BL_RD_REG(GLB_BASE,GLB_LED_DRIVER);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_LEDDRV_OUT_EN,BL_GET_REG_BITS_VAL(tmpVal,GLB_LEDDRV_OUT_EN)&~2);
+        BL_WR_REG(GLB_BASE,GLB_LED_DRIVER,tmpVal);
+    }
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Set ir led driver ibias
+ *
+ * @param  ibias: Ibias value,0x0:0mA~0xf:120mA,8mA/step
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_IR_LED_Driver_Ibias(uint8_t ibias)
+{
+    uint32_t tmpVal=0;
+
+    /* Set driver ibias */
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_LED_DRIVER);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_LEDDRV_IBIAS,ibias&0xF);
+    BL_WR_REG(GLB_BASE,GLB_LED_DRIVER,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  GPIO initialization
+ *
+ * @param  cfg: GPIO configuration
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION GLB_GPIO_Init(GLB_GPIO_Cfg_Type *cfg)
+{
+    uint8_t gpioPin=cfg->gpioPin;
+    uint32_t *pOut;
+    uint32_t pos;
+    uint32_t tmpOut;
+    uint32_t tmpVal;
+    uint32_t aonPadIeSmt;
+    
+    /* drive strength(drive) = 0  <=>  8.0mA  @ 3.3V */
+    /* drive strength(drive) = 1  <=>  9.6mA  @ 3.3V */
+    /* drive strength(drive) = 2  <=>  11.2mA @ 3.3V */
+    /* drive strength(drive) = 3  <=>  12.8mA @ 3.3V */
+    
+    pOut=(uint32_t *)(GLB_BASE+GLB_GPIO_OUTPUT_EN_OFFSET+((gpioPin>>5)<<2));
+    pos=gpioPin%32;
+    tmpOut=*pOut;
+    
+    /* Disable output anyway*/
+    tmpOut &= (~(1<gpioMode!=GPIO_MODE_ANALOG){
+            /* not analog mode */
+            
+            /* Set input or output */
+            if(cfg->gpioMode==GPIO_MODE_OUTPUT){
+                tmpVal=BL_CLR_REG_BIT(tmpVal,GLB_REG_GPIO_0_IE);
+                tmpOut |= (1<pullType==GPIO_PULL_UP){
+                tmpVal=BL_SET_REG_BIT(tmpVal,GLB_REG_GPIO_0_PU);
+            }else if(cfg->pullType==GPIO_PULL_DOWN){
+                tmpVal=BL_SET_REG_BIT(tmpVal,GLB_REG_GPIO_0_PD);
+            }
+        }else{
+            /* analog mode */
+            
+            /* clear ie && oe */
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GLB_REG_GPIO_0_IE);
+            tmpOut &= ~(1<drive);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_REG_GPIO_0_SMT,cfg->smtCtrl);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_REG_GPIO_0_FUNC_SEL,cfg->gpioFun);
+    }else{
+        if(cfg->gpioMode!=GPIO_MODE_ANALOG){
+            /* not analog mode */
+            
+            /* Set input or output */
+            if(cfg->gpioMode==GPIO_MODE_OUTPUT) {
+                tmpVal=BL_CLR_REG_BIT(tmpVal,GLB_REG_GPIO_1_IE);
+                tmpOut |= (1<pullType==GPIO_PULL_UP){
+                tmpVal=BL_SET_REG_BIT(tmpVal,GLB_REG_GPIO_1_PU);
+            }else if(cfg->pullType==GPIO_PULL_DOWN){
+                tmpVal=BL_SET_REG_BIT(tmpVal,GLB_REG_GPIO_1_PD);
+            }
+        }else{
+            /* analog mode */
+            
+            /* clear ie && oe */
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GLB_REG_GPIO_1_IE);
+            tmpOut &= ~(1<drive);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_REG_GPIO_1_SMT,cfg->smtCtrl);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_REG_GPIO_1_FUNC_SEL,cfg->gpioFun);
+    }
+    BL_WR_WORD(GLB_BASE+GLB_GPIO_OFFSET+gpioPin/2*4,tmpVal);
+    
+    *pOut=tmpOut;
+    
+    /* always on pads IE control (in HBN) */
+    if(gpioPin>=9&&gpioPin<=13){
+        tmpVal=BL_RD_REG(HBN_BASE,HBN_IRQ_MODE);
+        aonPadIeSmt=BL_GET_REG_BITS_VAL(tmpVal,HBN_REG_AON_PAD_IE_SMT);
+        
+        if(cfg->gpioMode!=GPIO_MODE_ANALOG){
+            /* not analog mode */
+            
+            if(cfg->gpioMode==GPIO_MODE_OUTPUT){
+                aonPadIeSmt&=~(1<<(gpioPin-9));
+            }else{
+                aonPadIeSmt|=(1<<(gpioPin-9));
+            }
+        }else{
+            /* analog mode */
+            
+            /* clear aon pad ie */
+            aonPadIeSmt&=~(1<<(gpioPin-9));
+        }
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_REG_AON_PAD_IE_SMT,aonPadIeSmt);
+        BL_WR_REG(HBN_BASE,HBN_IRQ_MODE,tmpVal);
+    }
+    
+    if(gpioPin>=32&&gpioPin<=37){
+        if(BL_RD_REG(GLB_BASE,GLB_GPIO_USE_PSRAM__IO)&(1<<(gpioPin-32))){
+            gpioPin-=9;
+            
+            tmpVal=BL_RD_WORD(GLB_BASE+GLB_GPIO_OFFSET+gpioPin/2*4);
+            if(gpioPin%2==0){
+                tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_REG_GPIO_0_FUNC_SEL,cfg->gpioFun);
+            }else{
+                tmpVal=BL_SET_REG_BITS_VAL(tmpVal,GLB_REG_GPIO_1_FUNC_SEL,cfg->gpioFun);
+            }
+            BL_WR_WORD(GLB_BASE+GLB_GPIO_OFFSET+gpioPin/2*4,tmpVal);
+            
+            /* GPIO32-GPIO37 use GPIO23-GPIO28 pinmux&&outputEn */
+            pOut=(uint32_t *)(GLB_BASE+GLB_GPIO_OUTPUT_EN_OFFSET+((gpioPin>>5)<<2));
+            pos=gpioPin%32;
+            tmpOut=*pOut;
+            /* Disable output anyway*/
+            tmpOut &= (~(1<gpioMode!=GPIO_MODE_ANALOG){
+                /* not analog mode */
+                
+                if(cfg->gpioMode==GPIO_MODE_OUTPUT){
+                    tmpOut |= (1<>1)<<2;
+    tmpVal=*(uint32_t *)(GLB_BASE+GLB_GPIO_OFFSET+pinOffset);
+    if(gpioPin%2==0){
+        /* [0] is ie */
+        tmpVal=BL_SET_REG_BIT(tmpVal,GLB_REG_GPIO_0_IE);
+    }else{
+        /* [16] is ie */
+        tmpVal=BL_SET_REG_BIT(tmpVal,GLB_REG_GPIO_1_IE);
+    }
+    *(uint32_t *)(GLB_BASE+GLB_GPIO_OFFSET+pinOffset)=tmpVal;
+    
+    /* always on pads IE control (in HBN) */
+    if(gpioPin>=9&&gpioPin<=13){
+        tmpVal=BL_RD_REG(HBN_BASE,HBN_IRQ_MODE);
+        aonPadIeSmt=BL_GET_REG_BITS_VAL(tmpVal,HBN_REG_AON_PAD_IE_SMT);
+        aonPadIeSmt|=(1<<(gpioPin-9));
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_REG_AON_PAD_IE_SMT,aonPadIeSmt);
+        BL_WR_REG(HBN_BASE,HBN_IRQ_MODE,tmpVal);
+    }
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  GPIO set input function disable
+ *
+ * @param  gpioPin: GPIO pin
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION GLB_GPIO_INPUT_Disable(GLB_GPIO_Type gpioPin)
+{
+    uint32_t tmpVal;
+    uint32_t pinOffset;
+    uint32_t aonPadIeSmt;
+    
+    pinOffset=(gpioPin>>1)<<2;
+    tmpVal=*(uint32_t *)(GLB_BASE+GLB_GPIO_OFFSET+pinOffset);
+    if(gpioPin%2==0){
+        /* [0] is ie */
+        tmpVal=BL_CLR_REG_BIT(tmpVal,GLB_REG_GPIO_0_IE);
+    }else{
+        /* [16] is ie */
+        tmpVal=BL_CLR_REG_BIT(tmpVal,GLB_REG_GPIO_1_IE);
+    }
+    *(uint32_t *)(GLB_BASE+GLB_GPIO_OFFSET+pinOffset)=tmpVal;
+    
+    /* always on pads IE control (in HBN) */
+    if(gpioPin>=9&&gpioPin<=13){
+        tmpVal=BL_RD_REG(HBN_BASE,HBN_IRQ_MODE);
+        aonPadIeSmt=BL_GET_REG_BITS_VAL(tmpVal,HBN_REG_AON_PAD_IE_SMT);
+        aonPadIeSmt&=~(1<<(gpioPin-9));
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_REG_AON_PAD_IE_SMT,aonPadIeSmt);
+        BL_WR_REG(HBN_BASE,HBN_IRQ_MODE,tmpVal);
+    }
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  GPIO set output function enable
+ *
+ * @param  gpioPin: GPIO pin
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION GLB_GPIO_OUTPUT_Enable(GLB_GPIO_Type gpioPin)
+{
+    uint32_t tmpVal;
+
+    /* GPIO32-GPIO37 use GPIO23-GPIO28 pinmux&&outputEn */
+    if(gpioPin>=32&&gpioPin<=37){
+        if(BL_RD_REG(GLB_BASE,GLB_GPIO_USE_PSRAM__IO)&(1<<(gpioPin-32))){
+            gpioPin-=9;
+        }
+    }
+
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_GPIO_CFGCTL34);
+    tmpVal=tmpVal|(1<=32&&gpioPin<=37){
+        if(BL_RD_REG(GLB_BASE,GLB_GPIO_USE_PSRAM__IO)&(1<<(gpioPin-32))){
+            gpioPin-=9;
+        }
+    }
+
+    tmpVal=BL_RD_REG(GLB_BASE,GLB_GPIO_CFGCTL34);
+    tmpVal=tmpVal&~(1<>5)<<2));
+    pos=gpioPin%32;
+    tmpOut=*pOut;
+
+    /* Disable output anyway*/
+    tmpOut &= (~(1<=9&&gpioPin<=13){
+        tmpVal=BL_RD_REG(HBN_BASE,HBN_IRQ_MODE);
+        aonPadIeSmt=BL_GET_REG_BITS_VAL(tmpVal,HBN_REG_AON_PAD_IE_SMT);
+        aonPadIeSmt&=~(1<<(gpioPin-9));
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_REG_AON_PAD_IE_SMT,aonPadIeSmt);
+        BL_WR_REG(HBN_BASE,HBN_IRQ_MODE,tmpVal);
+    }
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Get GPIO function
+ *
+ * @param  gpioPin: GPIO type
+ *
+ * @return GPIO function
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+uint8_t ATTR_TCM_SECTION GLB_GPIO_Get_Fun(GLB_GPIO_Type gpioPin)
+{
+    if(gpioPin>=32&&gpioPin<=37){
+        if(BL_RD_REG(GLB_BASE,GLB_GPIO_USE_PSRAM__IO)&(1<<(gpioPin-32))){
+            gpioPin-=9;
+        }
+    }
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_WORD(GLB_BASE+GLB_GPIO_OFFSET+gpioPin/2*4);
+
+    if(gpioPin%2==0){
+        return BL_GET_REG_BITS_VAL(tmpVal,GLB_REG_GPIO_0_FUNC_SEL);
+    }else{
+        return BL_GET_REG_BITS_VAL(tmpVal,GLB_REG_GPIO_1_FUNC_SEL);
+    }
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Write GPIO
+ *
+ * @param  gpioPin: GPIO type
+ * @param  val: GPIO value
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_GPIO_Write(GLB_GPIO_Type gpioPin,uint32_t val)
+{
+    if(gpioPin>=32&&gpioPin<=37){
+        if(BL_RD_REG(GLB_BASE,GLB_GPIO_USE_PSRAM__IO)&(1<<(gpioPin-32))){
+            gpioPin-=9;
+        }
+    }
+    uint32_t *pOut=(uint32_t *)(GLB_BASE+GLB_GPIO_OUTPUT_OFFSET+((gpioPin>>5)<<2));
+    uint32_t pos=gpioPin%32;
+    uint32_t tmpOut;
+
+    tmpOut=*pOut;
+    if(val>0){
+        tmpOut |= (1<=32&&gpioPin<=37){
+        if(BL_RD_REG(GLB_BASE,GLB_GPIO_USE_PSRAM__IO)&(1<<(gpioPin-32))){
+            gpioPin-=9;
+        }
+    }
+    uint32_t *p=(uint32_t *)(GLB_BASE+GLB_GPIO_INPUT_OFFSET+((gpioPin>>5)<<2));
+    uint32_t pos=gpioPin%32;
+
+    if((*p)&(1<>(bitVal*3);
+        return (tmpVal>>2)?GLB_GPIO_INT_CONTROL_ASYNC:GLB_GPIO_INT_CONTROL_SYNC;
+    }else if((gpioPin>GLB_GPIO_PIN_9)&&(gpioPin>(bitVal*3);
+        return (tmpVal>>2)?GLB_GPIO_INT_CONTROL_ASYNC:GLB_GPIO_INT_CONTROL_SYNC;
+    }else if((gpioPin>GLB_GPIO_PIN_19)&&(gpioPin>(bitVal*3);
+        return (tmpVal>>2)?GLB_GPIO_INT_CONTROL_ASYNC:GLB_GPIO_INT_CONTROL_SYNC;
+    }else{
+        /* GPIO30 ~ GPIO31, GPIO32 ~ GPIO37 not recommend */
+        bitVal=gpioPin-30;
+        tmpVal=BL_RD_REG(GLB_BASE,GLB_GPIO_INT_MODE_SET4);
+        tmpVal=(tmpVal&(0x7<<(bitVal*3)))>>(bitVal*3);
+        return (tmpVal>>2)?GLB_GPIO_INT_CONTROL_ASYNC:GLB_GPIO_INT_CONTROL_SYNC;
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Set GLB GPIO interrupt mask 2
+ *
+ * @param  gpioPin: GPIO type
+ * @param  intMask: GPIO interrupt MASK or UNMASK
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_GPIO_Int2Mask(GLB_GPIO_Type gpioPin,BL_Mask_Type intMask)
+{
+    uint32_t tmpVal;
+
+    if(gpioPin<32){
+        /* GPIO0 ~ GPIO31 */
+        tmpVal = BL_RD_REG(GLB_BASE,GLB_GPIO_INT2_MASK1);
+        if(intMask==MASK){
+            tmpVal = tmpVal|(1<>(bitVal*3);
+        return (tmpVal>>2)?GLB_GPIO_INT_CONTROL_ASYNC:GLB_GPIO_INT_CONTROL_SYNC;
+    }else if((gpioPin>GLB_GPIO_PIN_9)&&(gpioPin>(bitVal*3);
+        return (tmpVal>>2)?GLB_GPIO_INT_CONTROL_ASYNC:GLB_GPIO_INT_CONTROL_SYNC;
+    }else if((gpioPin>GLB_GPIO_PIN_19)&&(gpioPin>(bitVal*3);
+        return (tmpVal>>2)?GLB_GPIO_INT_CONTROL_ASYNC:GLB_GPIO_INT_CONTROL_SYNC;
+    }else{
+        /* GPIO30 ~ GPIO31, GPIO32 ~ GPIO37 not recommend */
+        bitVal=gpioPin-30;
+        tmpVal=BL_RD_REG(GLB_BASE,GLB_GPIO_INT2_MODE_SET4);
+        tmpVal=(tmpVal&(0x7<<(bitVal*3)))>>(bitVal*3);
+        return (tmpVal>>2)?GLB_GPIO_INT_CONTROL_ASYNC:GLB_GPIO_INT_CONTROL_SYNC;
+    }
+}
+
+/****************************************************************************//**
+ * @brief  GPIO INT0 IRQHandler install
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_GPIO_INT0_IRQHandler_Install(void)
+{
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(GPIO_INT0_IRQn,GPIO_INT0_IRQHandler);
+#endif
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  GPIO interrupt IRQ handler callback install
+ *
+ * @param  gpioPin: GPIO pin type
+ * @param  cbFun: callback function
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_GPIO_INT0_Callback_Install(GLB_GPIO_Type gpioPin,intCallback_Type* cbFun)
+{
+    if(gpioPin<32){
+        glbGpioInt0CbfArra[gpioPin] = cbFun;
+    }
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  GPIO interrupt IRQ handler callback install2
+ *
+ * @param  gpioPin: GPIO pin type
+ * @param  cbFun: callback function
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type GLB_GPIO_INT0_Callback_Install2(GLB_GPIO_Type gpioPin,intCallback_Type* cbFun)
+{
+    if(gpioPin<32){
+        glbGpioInt0CbfArra2[gpioPin] = cbFun;
+    }
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  GPIO interrupt IRQ handler
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void GPIO_INT0_IRQHandler(void)
+{
+    GLB_GPIO_Type gpioPin;
+    uint32_t timeOut=0;
+    
+    for(gpioPin=GLB_GPIO_PIN_0;gpioPin<=GLB_GPIO_PIN_31;gpioPin++){
+        if(SET==GLB_Get_GPIO_IntStatus(gpioPin)){
+            GLB_GPIO_IntClear(gpioPin,SET);
+            
+            /* timeout check */
+            timeOut=GLB_GPIO_INT0_CLEAR_TIMEOUT;
+            do{
+                timeOut--;
+            }while((SET==GLB_Get_GPIO_IntStatus(gpioPin))&&timeOut);
+            if(!timeOut){
+                MSG("WARNING: Clear GPIO interrupt status fail.\r\n");
+            }
+            
+            /* if timeOut==0, GPIO interrupt status not cleared */
+            GLB_GPIO_IntClear(gpioPin,RESET);
+            
+            if(glbGpioInt0CbfArra[gpioPin] != NULL) {
+                /* Call the callback function */
+                glbGpioInt0CbfArra[gpioPin]();
+            }
+        }
+        if(SET==GLB_Get_GPIO_Int2Status(gpioPin)){
+            GLB_GPIO_Int2Clear(gpioPin,SET);
+            
+            /* timeout check */
+            timeOut=GLB_GPIO_INT0_CLEAR_TIMEOUT;
+            do{
+                timeOut--;
+            }while((SET==GLB_Get_GPIO_Int2Status(gpioPin))&&timeOut);
+            if(!timeOut){
+                MSG("WARNING: Clear GPIO interrupt status fail.\r\n");
+            }
+            
+            /* if timeOut==0, GPIO interrupt status not cleared */
+            GLB_GPIO_Int2Clear(gpioPin,RESET);
+            
+            if(glbGpioInt0CbfArra2[gpioPin] != NULL) {
+                /* Call the callback function */
+                glbGpioInt0CbfArra2[gpioPin]();
+            }
+        }
+    }
+}
+#endif
+
+/*@} end of group GLB_Public_Functions */
+
+/*@} end of group GLB */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_hbn.c b/drivers/bl702_driver/std_drv/src/bl702_hbn.c
new file mode 100644
index 00000000..da3b9c17
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_hbn.c
@@ -0,0 +1,1962 @@
+/**
+  ******************************************************************************
+  * @file    bl702_hbn.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_hbn.h"
+#include "bl702_glb.h"
+#include "bl702_xip_sflash.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  HBN
+ *  @{
+ */
+
+/** @defgroup  HBN_Private_Macros
+ *  @{
+ */
+#define HBN_CLK_SET_DUMMY_WAIT          {__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();__NOP();}
+
+/*@} end of group HBN_Private_Macros */
+
+/** @defgroup  HBN_Private_Types
+ *  @{
+ */
+
+/*@} end of group HBN_Private_Types */
+
+/** @defgroup  HBN_Private_Variables
+ *  @{
+ */
+static intCallback_Type * hbnInt0CbfArra[HBN_OUT0_MAX]={NULL,NULL,NULL,NULL,NULL,NULL};
+static intCallback_Type * hbnInt1CbfArra[HBN_OUT1_MAX]={NULL,NULL,NULL,NULL};
+
+
+/*@} end of group HBN_Private_Variables */
+
+/** @defgroup  HBN_Global_Variables
+ *  @{
+ */
+
+/*@} end of group HBN_Global_Variables */
+
+/** @defgroup  HBN_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group HBN_Private_Fun_Declaration */
+
+/** @defgroup  HBN_Private_Functions
+ *  @{
+ */
+
+/*@} end of group HBN_Private_Functions */
+
+/** @defgroup  HBN_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Enter HBN
+ *
+ * @param  cfg: HBN APP Config
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ATTR_TCM_SECTION HBN_Mode_Enter(HBN_APP_CFG_Type *cfg)
+{
+    uint32_t valLow=0,valHigh=0;
+    uint64_t val;
+    uint32_t tmpVal=0,tmpVal2=0;
+    
+    /* work clock select */
+    if(cfg->useXtal32k){
+        HBN_32K_Sel(HBN_32K_XTAL);
+    }else{
+        HBN_32K_Sel(HBN_32K_RC);
+        HBN_Power_Off_Xtal_32K();
+    }
+    
+    /* turn off RC32K during HBN */
+    if((cfg->hbnLevel)>=HBN_LEVEL_2){
+        HBN_Power_Off_RC32K();
+    }else{
+        HBN_Power_On_RC32K();
+    }
+    
+    /* clear aon pad interrupt before config them */
+    HBN_Clear_IRQ(HBN_INT_GPIO9);
+    HBN_Clear_IRQ(HBN_INT_GPIO10);
+    HBN_Clear_IRQ(HBN_INT_GPIO11);
+    HBN_Clear_IRQ(HBN_INT_GPIO12);
+    HBN_Clear_IRQ(HBN_INT_GPIO13);
+    
+    /* always disable HBN pin pull up/down to reduce PDS/HBN current, 0x4000F014[16]=0 */
+    HBN_Hw_Pu_Pd_Cfg(DISABLE);
+    
+    HBN_Pin_WakeUp_Mask(~(cfg->gpioWakeupSrc));
+    if(cfg->gpioWakeupSrc!=0){
+        HBN_Aon_Pad_IeSmt_Cfg(cfg->gpioWakeupSrc);
+        HBN_GPIO_INT_Enable(cfg->gpioTrigType);
+    }else{
+        HBN_Aon_Pad_IeSmt_Cfg(0);
+    }
+    
+    /* always disable and mask aon_pad_GPIO9, mask/unmask and ie_enable/ie_disable */
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_IRQ_MODE);
+    tmpVal2=BL_GET_REG_BITS_VAL(tmpVal,HBN_PIN_WAKEUP_MASK);
+    tmpVal2|=(1<<0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_PIN_WAKEUP_MASK,tmpVal2);
+    tmpVal2=BL_GET_REG_BITS_VAL(tmpVal,HBN_REG_AON_PAD_IE_SMT);
+    tmpVal2&=~(1<<0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_REG_AON_PAD_IE_SMT,tmpVal2);
+    BL_WR_REG(HBN_BASE,HBN_IRQ_MODE,tmpVal);
+    
+    /* HBN RTC config and enable */
+    if(cfg->sleepTime!=0){
+        HBN_Clear_RTC_Counter();
+        HBN_Get_RTC_Timer_Val(&valLow,&valHigh);
+        val=valLow+((uint64_t)valHigh<<32);
+        val+=cfg->sleepTime;
+        HBN_Set_RTC_Timer(HBN_RTC_INT_DELAY_0T,val&0xffffffff,val>>32,HBN_RTC_COMP_BIT0_39);
+        HBN_Enable_RTC_Counter();
+    }
+
+    HBN_Power_Down_Flash(cfg->flashCfg);
+    
+    switch(cfg->flashPinCfg){
+        case 0:
+            HBN_Set_Pad_23_28_Pullup();
+            break;
+        case 1:
+            /* need do nothing */
+            break;
+        case 2:
+            /* need do nothing */
+            break;
+        case 3:
+            /* can do nothing */
+            break;
+        default :
+            break;
+    }
+    
+    GLB_Set_System_CLK(GLB_DLL_XTAL_NONE,GLB_SYS_CLK_RC32M);
+    
+    /* power off xtal */
+    AON_Power_Off_XTAL();
+    
+    HBN_Enable_Ext(cfg->gpioWakeupSrc,cfg->ldoLevel,cfg->hbnLevel);
+}
+
+/****************************************************************************//**
+ * @brief  power down and switch clock
+ *
+ * @param  flashCfg: None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ATTR_TCM_SECTION HBN_Power_Down_Flash(SPI_Flash_Cfg_Type *flashCfg)
+{
+    SPI_Flash_Cfg_Type bhFlashCfg;
+
+    if(flashCfg==NULL){
+        /* fix this some time */
+        /* SFlash_Cache_Flush(); */
+        XIP_SFlash_Read_Via_Cache_Need_Lock(BL702_FLASH_XIP_BASE+8+4,(uint8_t *)(&bhFlashCfg),sizeof(SPI_Flash_Cfg_Type));
+        /* fix this some time */
+        /* SFlash_Cache_Flush(); */
+
+        SF_Ctrl_Set_Owner(SF_CTRL_OWNER_SAHB);
+        SFlash_Reset_Continue_Read(&bhFlashCfg);
+    }else{
+        SF_Ctrl_Set_Owner(SF_CTRL_OWNER_SAHB);
+        SFlash_Reset_Continue_Read(flashCfg);
+    }
+
+    SFlash_Powerdown();
+}
+
+/****************************************************************************//**
+ * @brief  Enable HBN mode
+ *
+ * @param  aGPIOIeCfg: AON GPIO IE config,Bit0->GPIO18. Bit(s) of Wakeup GPIO(s) must not be set to
+ *                     0(s),say when use GPIO7 as wake up pin,aGPIOIeCfg should be 0x01.
+ * @param  ldoLevel: LDO volatge level
+ * @param  hbnLevel: HBN work level
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ATTR_TCM_SECTION HBN_Enable_Ext(uint8_t aGPIOIeCfg,HBN_LDO_LEVEL_Type ldoLevel,HBN_LEVEL_Type hbnLevel)
+{
+    uint32_t tmpVal;
+    
+    CHECK_PARAM(IS_HBN_LDO_LEVEL_TYPE(ldoLevel));
+    CHECK_PARAM(IS_HBN_LEVEL_TYPE(hbnLevel));
+    
+    /* Setting from guide */
+    /* RAM Retion, no longer use */
+    /* BL_WR_REG(HBN_BASE,HBN_SRAM,0x24); */
+    
+    /* AON GPIO IE */
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_IRQ_MODE);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_REG_AON_PAD_IE_SMT,aGPIOIeCfg);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_REG_EN_HW_PU_PD);    
+    BL_WR_REG(HBN_BASE,HBN_IRQ_MODE,tmpVal);
+    
+    /* HBN mode LDO level */
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_CTL);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_LDO11_AON_VOUT_SEL,ldoLevel);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_LDO11_RT_VOUT_SEL,ldoLevel);
+    BL_WR_REG(HBN_BASE,HBN_CTL,tmpVal);
+    
+    /* Select RC32M */
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_GLB);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_ROOT_CLK_SEL,0);
+    BL_WR_REG(HBN_BASE,HBN_GLB,tmpVal);
+    __NOP();__NOP();__NOP();__NOP();
+    
+    /* Set HBN flag */
+    BL_WR_REG(HBN_BASE,HBN_RSV0,HBN_STATUS_ENTER_FLAG);
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_CTL);
+    /* Set HBN level, (HBN_PWRDN_HBN_RAM not use) */
+    switch(hbnLevel){
+        case HBN_LEVEL_0:
+            tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_PWRDN_HBN_CORE);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_PWRDN_HBN_RTC);
+            break;
+        
+        case HBN_LEVEL_1:
+            tmpVal=BL_SET_REG_BIT(tmpVal,HBN_PWRDN_HBN_CORE);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_PWRDN_HBN_RTC);
+            break;
+            
+        case HBN_LEVEL_2:
+            tmpVal=BL_SET_REG_BIT(tmpVal,HBN_PWRDN_HBN_CORE);
+            tmpVal=BL_SET_REG_BIT(tmpVal,HBN_PWRDN_HBN_RTC);
+            break;
+            
+        case HBN_LEVEL_3:
+            tmpVal=BL_SET_REG_BIT(tmpVal,HBN_PWRDN_HBN_CORE);
+            tmpVal=BL_SET_REG_BIT(tmpVal,HBN_PWRDN_HBN_RTC);
+            break;
+            
+        default :
+            break;
+    }
+    /* Set power on option:0 for por reset twice for robust 1 for reset only once*/
+    tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_PWR_ON_OPTION);
+    BL_WR_REG(HBN_BASE,HBN_CTL,tmpVal);
+    
+    /* Enable HBN mode */
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_CTL);
+    tmpVal=BL_SET_REG_BIT(tmpVal,HBN_MODE);
+    BL_WR_REG(HBN_BASE,HBN_CTL,tmpVal);
+    
+    while(1){
+        BL702_Delay_MS(1000);
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Reset HBN mode
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION HBN_Reset(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_CTL);
+    /* Reset HBN mode */
+    tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_SW_RST);
+    BL_WR_REG(HBN_BASE,HBN_CTL,tmpVal);
+    
+    tmpVal=BL_SET_REG_BIT(tmpVal,HBN_SW_RST);
+    BL_WR_REG(HBN_BASE,HBN_CTL,tmpVal);
+    
+    tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_SW_RST);
+    BL_WR_REG(HBN_BASE,HBN_CTL,tmpVal);
+    
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  reset HBN by software
+ *
+ * @param  npXtalType: NP clock type
+ * @param  bclkDiv: NP clock div
+ * @param  apXtalType: AP clock type
+ * @param  fclkDiv: AP clock div
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_App_Reset(uint8_t npXtalType,uint8_t bclkDiv,uint8_t apXtalType,uint8_t fclkDiv)
+{
+    uint32_t tmp[12];
+    
+    tmp[0]=BL_RD_REG(HBN_BASE,HBN_CTL);
+    tmp[1]=BL_RD_REG(HBN_BASE,HBN_TIME_L);
+    tmp[2]=BL_RD_REG(HBN_BASE,HBN_TIME_H);
+    tmp[3]=BL_RD_REG(HBN_BASE,HBN_IRQ_MODE);
+    tmp[4]=BL_RD_REG(HBN_BASE,HBN_IRQ_CLR);
+    tmp[5]=BL_RD_REG(HBN_BASE,HBN_PIR_CFG);
+    tmp[6]=BL_RD_REG(HBN_BASE,HBN_PIR_VTH);
+    tmp[7]=BL_RD_REG(HBN_BASE,HBN_PIR_INTERVAL);    
+    tmp[8]=BL_RD_REG(HBN_BASE,HBN_SRAM);
+    tmp[9]=BL_RD_REG(HBN_BASE,HBN_RSV0);
+    tmp[10]=BL_RD_REG(HBN_BASE,HBN_RSV1);
+    tmp[11]=BL_RD_REG(HBN_BASE,HBN_RSV2);
+    /* DO HBN reset */
+    HBN_Reset();
+    /* HBN need 3 32k cyclce to recovery */
+    BL702_Delay_US(100);
+    /* Recover HBN value */
+    BL_WR_REG(HBN_BASE,HBN_TIME_L,tmp[1]);
+    BL_WR_REG(HBN_BASE,HBN_TIME_H,tmp[2]);
+    BL_WR_REG(HBN_BASE,HBN_CTL,tmp[0]);
+    
+    BL_WR_REG(HBN_BASE,HBN_IRQ_MODE,tmp[3]);
+    BL_WR_REG(HBN_BASE,HBN_IRQ_CLR,tmp[4]);
+    BL_WR_REG(HBN_BASE,HBN_PIR_CFG,tmp[5]);
+    BL_WR_REG(HBN_BASE,HBN_PIR_VTH,tmp[6]);
+    BL_WR_REG(HBN_BASE,HBN_PIR_INTERVAL,tmp[7]); 
+    BL_WR_REG(HBN_BASE,HBN_SRAM,tmp[8]);
+    BL_WR_REG(HBN_BASE,HBN_RSV0,tmp[9]);
+    BL_WR_REG(HBN_BASE,HBN_RSV1,tmp[10]);
+    BL_WR_REG(HBN_BASE,HBN_RSV2,tmp[11]);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Disable HBN mode
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_Disable(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_CTL);
+    /* Disable HBN mode */
+    tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_MODE);
+    BL_WR_REG(HBN_BASE,HBN_CTL,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Enable HBN PIR
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_PIR_Enable(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_PIR_CFG);
+    tmpVal=BL_SET_REG_BIT(tmpVal,HBN_PIR_EN);
+    BL_WR_REG(HBN_BASE,HBN_PIR_CFG,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Disable HBN PIR
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_PIR_Disable(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_PIR_CFG);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_PIR_EN);
+    BL_WR_REG(HBN_BASE,HBN_PIR_CFG,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Config HBN PIR interrupt
+ *
+ * @param  pirIntCfg: HBN PIR interrupt configuration
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_PIR_INT_Config(HBN_PIR_INT_CFG_Type* pirIntCfg)
+{
+    uint32_t tmpVal;
+    uint32_t bit4 = 0;
+    uint32_t bit5 = 0;
+    uint32_t bitVal = 0;
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_PIR_CFG);
+    
+    /* low trigger interrupt */
+    if(pirIntCfg->lowIntEn==ENABLE){
+        bit5 = 0;
+    }else{
+        bit5 = 1;
+    }
+    
+    /* high trigger interrupt */
+    if(pirIntCfg->highIntEn==ENABLE){
+        bit4 = 0;
+    }else{
+        bit4 = 1;
+    }
+    
+    bitVal = bit4|(bit5<<1);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_PIR_DIS,bitVal);
+    BL_WR_REG(HBN_BASE,HBN_PIR_CFG,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Select HBN PIR low pass filter
+ *
+ * @param  lpf: HBN PIR low pass filter selection
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_PIR_LPF_Sel(HBN_PIR_LPF_Type lpf)
+{
+    uint32_t tmpVal;
+    
+    CHECK_PARAM(IS_HBN_PIR_LPF_TYPE(lpf));
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_PIR_CFG);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_PIR_LPF_SEL,lpf);
+    BL_WR_REG(HBN_BASE,HBN_PIR_CFG,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Select HBN PIR high pass filter
+ *
+ * @param  hpf: HBN PIR high pass filter selection
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_PIR_HPF_Sel(HBN_PIR_HPF_Type hpf)
+{
+    uint32_t tmpVal;
+    
+    CHECK_PARAM(IS_HBN_PIR_HPF_TYPE(hpf));
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_PIR_CFG);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_PIR_HPF_SEL,hpf);
+    BL_WR_REG(HBN_BASE,HBN_PIR_CFG,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Set HBN PIR threshold value
+ *
+ * @param  threshold: HBN PIR threshold value
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_Set_PIR_Threshold(uint16_t threshold)
+{
+    uint32_t tmpVal;
+    
+    CHECK_PARAM((threshold<=0x3FFF));
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_PIR_VTH);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_PIR_VTH,threshold);
+    BL_WR_REG(HBN_BASE,HBN_PIR_VTH,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Get HBN PIR threshold value
+ *
+ * @param  None
+ *
+ * @return HBN PIR threshold value
+ *
+*******************************************************************************/
+uint16_t HBN_Get_PIR_Threshold(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_PIR_VTH);
+    
+    return BL_GET_REG_BITS_VAL(tmpVal,HBN_PIR_VTH);
+}
+
+/****************************************************************************//**
+ * @brief  Set HBN PIR interval value
+ *
+ * @param  interval: HBN PIR interval value
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_Set_PIR_Interval(uint16_t interval)
+{
+    uint32_t tmpVal;
+    
+    CHECK_PARAM((interval<=0xFFF));
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_PIR_INTERVAL);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_PIR_INTERVAL,interval);
+    BL_WR_REG(HBN_BASE,HBN_PIR_INTERVAL,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Get HBN PIR interval value
+ *
+ * @param  None
+ *
+ * @return HBN PIR interval value
+ *
+*******************************************************************************/
+uint16_t HBN_Get_PIR_Interval(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_PIR_INTERVAL);
+    
+    return BL_GET_REG_BITS_VAL(tmpVal,HBN_PIR_INTERVAL);
+}
+
+/****************************************************************************//**
+ * @brief  get HBN bor out state
+ *
+ * @param  None
+ *
+ * @return SET or RESET
+ *
+*******************************************************************************/
+BL_Sts_Type HBN_Get_BOR_OUT_State(void)
+{
+    return BL_GET_REG_BITS_VAL(BL_RD_REG(HBN_BASE,HBN_MISC),HBN_R_BOR_OUT)?SET:RESET;
+}
+
+/****************************************************************************//**
+ * @brief  set HBN bor config
+ *
+ * @param  enable: ENABLE or DISABLE, if enable, Power up Brown Out Reset
+ * @param  threshold: bor threshold
+ * @param  mode: bor work mode with por
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_Set_BOR_Config(uint8_t enable,HBN_BOR_THRES_Type threshold,HBN_BOR_MODE_Type mode)
+{
+    uint32_t tmpVal;
+    
+    CHECK_PARAM(IS_HBN_BOR_THRES_TYPE(threshold));
+    CHECK_PARAM(IS_HBN_BOR_MODE_TYPE(mode));
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_MISC);
+    if(enable){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_PU_BOR,1);
+    }else{
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_PU_BOR,0);
+    }
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_BOR_VTH,threshold);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_BOR_SEL,mode);
+    BL_WR_REG(HBN_BASE,HBN_MISC,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  HBN set ldo11aon voltage out
+ *
+ * @param  ldoLevel: LDO volatge level
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION HBN_Set_Ldo11_Aon_Vout(HBN_LDO_LEVEL_Type ldoLevel)
+{
+    uint32_t tmpVal;
+
+    CHECK_PARAM(IS_HBN_LDO_LEVEL_TYPE(ldoLevel));
+
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_GLB);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_SW_LDO11_AON_VOUT_SEL,ldoLevel);
+    BL_WR_REG(HBN_BASE,HBN_GLB,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  HBN set ldo11rt voltage out
+ *
+ * @param  ldoLevel: LDO volatge level
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION HBN_Set_Ldo11_Rt_Vout(HBN_LDO_LEVEL_Type ldoLevel)
+{
+    uint32_t tmpVal;
+
+    CHECK_PARAM(IS_HBN_LDO_LEVEL_TYPE(ldoLevel));
+
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_GLB);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_SW_LDO11_RT_VOUT_SEL,ldoLevel);
+    BL_WR_REG(HBN_BASE,HBN_GLB,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  HBN set ldo11soc voltage out
+ *
+ * @param  ldoLevel: LDO volatge level
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION HBN_Set_Ldo11_Soc_Vout(HBN_LDO_LEVEL_Type ldoLevel)
+{
+    uint32_t tmpVal;
+
+    CHECK_PARAM(IS_HBN_LDO_LEVEL_TYPE(ldoLevel));
+
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_GLB);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_SW_LDO11SOC_VOUT_SEL_AON,ldoLevel);
+    BL_WR_REG(HBN_BASE,HBN_GLB,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  HBN set ldo11 all voltage out
+ *
+ * @param  ldoLevel: LDO volatge level
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION HBN_Set_Ldo11_All_Vout(HBN_LDO_LEVEL_Type ldoLevel)
+{
+    uint32_t tmpVal;
+
+    CHECK_PARAM(IS_HBN_LDO_LEVEL_TYPE(ldoLevel));
+
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_GLB);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_SW_LDO11_AON_VOUT_SEL,ldoLevel);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_SW_LDO11_RT_VOUT_SEL,ldoLevel);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_SW_LDO11SOC_VOUT_SEL_AON,ldoLevel);
+    BL_WR_REG(HBN_BASE,HBN_GLB,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  HBN set ldo11rt drive strength
+ *
+ * @param  strength: ldo11rt drive strength
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION HBN_Set_Ldo11rt_Drive_Strength(HBN_LDO11RT_DRIVE_STRENGTH_Type strength)
+{
+    uint32_t tmpVal;
+
+    CHECK_PARAM(IS_HBN_LDO11RT_DRIVE_STRENGTH_TYPE(strength));
+
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_GLB);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_LDO11_RT_ILOAD_SEL,strength);
+    BL_WR_REG(HBN_BASE,HBN_GLB,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  HBN select 32K
+ *
+ * @param  clkType: HBN 32k clock type
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_CLOCK_SECTION HBN_32K_Sel(HBN_32K_CLK_Type clkType)
+{
+    uint32_t tmpVal;
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_HBN_32K_CLK_TYPE(clkType));
+    
+    HBN_Trim_RC32K();
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_GLB);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_F32K_SEL,clkType);
+    BL_WR_REG(HBN_BASE,HBN_GLB,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Select uart clock source
+ *
+ * @param  clkSel: uart clock type selection
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_Set_UART_CLK_Sel(HBN_UART_CLK_Type clkSel)
+{
+    uint32_t tmpVal;
+    
+    CHECK_PARAM(IS_HBN_UART_CLK_TYPE(clkSel));
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_GLB);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_UART_CLK_SEL,clkSel);
+    BL_WR_REG(HBN_BASE,HBN_GLB,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Select xclk clock source
+ *
+ * @param  xClk: xclk clock type selection
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_Set_XCLK_CLK_Sel(HBN_XCLK_CLK_Type xClk)
+{
+    uint32_t tmpVal;
+    uint32_t tmpVal2;
+    
+    CHECK_PARAM(IS_HBN_XCLK_CLK_TYPE(xClk));
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_GLB);
+    tmpVal2=BL_GET_REG_BITS_VAL(tmpVal,HBN_ROOT_CLK_SEL);
+    switch(xClk){
+        case HBN_XCLK_CLK_RC32M:
+            tmpVal2&=(~(1<<0));
+            break;
+        case HBN_XCLK_CLK_XTAL:
+            tmpVal2|=(1<<0);
+            break;
+        default :
+            break;
+    }
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_ROOT_CLK_SEL,tmpVal2);
+    BL_WR_REG(HBN_BASE,HBN_GLB,tmpVal);
+    HBN_CLK_SET_DUMMY_WAIT;
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Select root clk source
+ *
+ * @param  rootClk: root clock type selection
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_CLOCK_SECTION HBN_Set_ROOT_CLK_Sel(HBN_ROOT_CLK_Type rootClk)
+{
+    uint32_t tmpVal;
+    uint32_t tmpVal2;
+    
+    CHECK_PARAM(IS_HBN_ROOT_CLK_TYPE(rootClk));
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_GLB);
+    tmpVal2=BL_GET_REG_BITS_VAL(tmpVal,HBN_ROOT_CLK_SEL);
+    switch(rootClk){
+        case HBN_ROOT_CLK_RC32M:
+            tmpVal2=0x0;
+            break;
+        case HBN_ROOT_CLK_XTAL:
+            tmpVal2=0x1;
+            break;
+        case HBN_ROOT_CLK_DLL:
+            tmpVal2|=(1<<1);
+            break;
+        default :
+            break;
+    }
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_ROOT_CLK_SEL,tmpVal2);
+    BL_WR_REG(HBN_BASE,HBN_GLB,tmpVal);
+    HBN_CLK_SET_DUMMY_WAIT;
+    
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  set HBN_RAM sleep mode
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_Set_HRAM_slp(void)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_SRAM);
+    tmpVal=BL_SET_REG_BIT(tmpVal,HBN_RETRAM_SLP);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_RETRAM_RET);
+    BL_WR_REG(HBN_BASE,HBN_SRAM,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  set HBN_RAM retension mode
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_Set_HRAM_Ret(void)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_SRAM);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_RETRAM_SLP);
+    tmpVal=BL_SET_REG_BIT(tmpVal,HBN_RETRAM_RET);
+    BL_WR_REG(HBN_BASE,HBN_SRAM,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Power on XTAL 32K
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_CLOCK_SECTION HBN_Power_On_Xtal_32K(void)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_XTAL32K);
+    tmpVal=BL_SET_REG_BIT(tmpVal,HBN_PU_XTAL32K);
+    tmpVal=BL_SET_REG_BIT(tmpVal,HBN_PU_XTAL32K_BUF);
+    BL_WR_REG(HBN_BASE,HBN_XTAL32K,tmpVal);
+
+    /* Delay >1s */
+    BL702_Delay_US(1100);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Power off XTAL 32K
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_CLOCK_SECTION HBN_Power_Off_Xtal_32K(void)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_XTAL32K);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_PU_XTAL32K);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_PU_XTAL32K_BUF);
+    BL_WR_REG(HBN_BASE,HBN_XTAL32K,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Power on RC32K
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_CLOCK_SECTION HBN_Power_On_RC32K(void)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_GLB);
+    tmpVal=BL_SET_REG_BIT(tmpVal,HBN_PU_RC32K);
+    BL_WR_REG(HBN_BASE,HBN_GLB,tmpVal);
+
+    /* Delay >800us */
+    BL702_Delay_US(880);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Power off RC3K
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_CLOCK_SECTION HBN_Power_Off_RC32K(void)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_GLB);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_PU_RC32K);
+    BL_WR_REG(HBN_BASE,HBN_GLB,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Trim RC32K
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_CLOCK_SECTION HBN_Trim_RC32K(void)
+{
+    Efuse_Ana_RC32K_Trim_Type trim;
+    int32_t tmpVal = 0;
+
+    EF_Ctrl_Read_RC32K_Trim(&trim);
+    if(trim.trimRc32kExtCodeEn){
+        if(trim.trimRc32kCodeFrExtParity==EF_Ctrl_Get_Trim_Parity(trim.trimRc32kCodeFrExt,10)){
+            tmpVal=BL_RD_REG(HBN_BASE,HBN_RC32K_CTRL0);
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_RC32K_CODE_FR_EXT,trim.trimRc32kCodeFrExt);
+            tmpVal=BL_SET_REG_BIT(tmpVal,HBN_RC32K_EXT_CODE_EN);
+            BL_WR_REG(HBN_BASE,HBN_RC32K_CTRL0,tmpVal);
+            BL702_Delay_US(2);
+            return SUCCESS;
+        }
+    }
+
+    return ERROR;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Get HBN status flag
+ *
+ * @param  None
+ *
+ * @return HBN status flag value
+ *
+*******************************************************************************/
+uint32_t HBN_Get_Status_Flag(void)
+{    
+    return BL_RD_REG(HBN_BASE,HBN_RSV0);
+}
+
+/****************************************************************************//**
+ * @brief  Set HBN status flag
+ *
+ * @param  flag: Status Flag
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_Set_Status_Flag(uint32_t flag)
+{    
+    BL_WR_REG(HBN_BASE,HBN_RSV0,flag);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Get HBN wakeup address
+ *
+ * @param  None
+ *
+ * @return HBN wakeup address
+ *
+*******************************************************************************/
+uint32_t HBN_Get_Wakeup_Addr(void)
+{
+    return BL_RD_REG(HBN_BASE,HBN_RSV1);
+}
+
+/****************************************************************************//**
+ * @brief  Set HBN wakeup address
+ *
+ * @param  addr: HBN wakeup address
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_Set_Wakeup_Addr(uint32_t addr)
+{
+    BL_WR_REG(HBN_BASE,HBN_RSV1,addr);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  HBN clear RTC timer counter
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_Clear_RTC_Counter(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_CTL);
+    /* Clear RTC control bit0 */
+    BL_WR_REG(HBN_BASE,HBN_CTL,tmpVal&0xfffffffe);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  HBN clear RTC timer counter
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_Enable_RTC_Counter(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_CTL);
+    /* Set RTC control bit0 */
+    BL_WR_REG(HBN_BASE,HBN_CTL,tmpVal|0x01);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  HBN set RTC timer configuration
+ *
+ * @param  delay: RTC interrupt delay 32 clocks
+ * @param  compValLow: RTC interrupt commpare value low 32 bits
+ * @param  compValHigh: RTC interrupt commpare value high 32 bits
+ * @param  compMode: RTC interrupt commpare
+ *                   mode:HBN_RTC_COMP_BIT0_39,HBN_RTC_COMP_BIT0_23,HBN_RTC_COMP_BIT13_39
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_Set_RTC_Timer(HBN_RTC_INT_Delay_Type delay,uint32_t compValLow,uint32_t compValHigh,uint8_t compMode)
+{
+    uint32_t tmpVal;
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_HBN_RTC_INT_DELAY_TYPE(delay));
+    
+    BL_WR_REG(HBN_BASE,HBN_TIME_L,compValLow);
+    BL_WR_REG(HBN_BASE,HBN_TIME_H,compValHigh&0xff);
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_CTL);
+    /* Set interrupt delay option */
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_RTC_DLY_OPTION,delay);
+    /* Set RTC compare mode */
+    tmpVal |= (compMode<<1);
+    BL_WR_REG(HBN_BASE,HBN_CTL,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  HBN get RTC timer count value
+ *
+ * @param  valLow: RTC count value pointer for low 32 bits
+ * @param  valHigh: RTC count value pointer for high 8 bits
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_Get_RTC_Timer_Val(uint32_t *valLow,uint32_t *valHigh)
+{
+    uint32_t tmpVal;
+    
+    /* Tigger RTC val read */
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_RTC_TIME_H);
+    tmpVal=BL_SET_REG_BIT(tmpVal,HBN_RTC_TIME_LATCH);
+    BL_WR_REG(HBN_BASE,HBN_RTC_TIME_H,tmpVal);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_RTC_TIME_LATCH);
+    BL_WR_REG(HBN_BASE,HBN_RTC_TIME_H,tmpVal);
+    
+    /* Read RTC val */
+    *valLow=BL_RD_REG(HBN_BASE,HBN_RTC_TIME_L);
+    *valHigh=(BL_RD_REG(HBN_BASE,HBN_RTC_TIME_H)&0xff);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  HBN clear RTC timer interrupt,this function must be called to clear delayed rtc IRQ
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_Clear_RTC_INT(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_CTL);
+    /* Clear RTC commpare:bit1-3 for clearing Delayed RTC IRQ */
+    BL_WR_REG(HBN_BASE,HBN_CTL,tmpVal&0xfffffff1);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  HBN enable GPIO interrupt
+ *
+ * @param  gpioIntTrigType: HBN GPIO interrupt trigger type
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_GPIO_INT_Enable(HBN_GPIO_INT_Trigger_Type gpioIntTrigType)
+{
+    uint32_t tmpVal;
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_HBN_GPIO_INT_TRIGGER_TYPE(gpioIntTrigType));
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_IRQ_MODE);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_PIN_WAKEUP_MODE,gpioIntTrigType);
+    BL_WR_REG(HBN_BASE,HBN_IRQ_MODE,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  HBN disable GPIO interrupt
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_GPIO_INT_Disable(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_IRQ_MODE);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_PIN_WAKEUP_MASK,0);
+    BL_WR_REG(HBN_BASE,HBN_IRQ_MODE,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  HBN get interrupt status
+ *
+ * @param  irqType: HBN interrupt type
+ *
+ * @return SET or RESET
+ *
+*******************************************************************************/
+BL_Sts_Type HBN_Get_INT_State(HBN_INT_Type irqType)
+{
+    uint32_t tmpVal;
+    
+    /* Check the parameters */
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_IRQ_STAT);
+    
+    if(tmpVal&(1<=1)&&(dlySec<=7)));
+    CHECK_PARAM((gpioIrq>=HBN_INT_GPIO9)&&(gpioIrq<=HBN_INT_GPIO13));
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_IRQ_MODE);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_PIN_WAKEUP_EN,dlyEn);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_PIN_WAKEUP_SEL,dlySec);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_REG_EN_HW_PU_PD,pupdEn);
+    if(gpioMask!=UNMASK){
+        tmpVal=tmpVal|(1<<(gpioIrq+8));
+    }else{
+        tmpVal=tmpVal&~(1<<(gpioIrq+8));
+    }
+    BL_WR_REG(HBN_BASE,HBN_IRQ_MODE,tmpVal);
+    
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Set pad 23-28 pull none
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION HBN_Set_Pad_23_28_Pullnone(void)
+{
+    uint32_t tmpVal = 0;
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_MISC);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_FLASH_PULLDOWN_AON,0x00);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_FLASH_PULLUP_AON,0x00);
+    BL_WR_REG(HBN_BASE,HBN_MISC,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Set pad 23-28 pull up
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION HBN_Set_Pad_23_28_Pullup(void)
+{
+    uint32_t tmpVal = 0;
+    
+    /********************************************/
+    /* GPIO28 is bootpin, so leave it pull none */
+    /********************************************/
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_MISC);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_FLASH_PULLDOWN_AON,0x00);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_FLASH_PULLUP_AON,0x1F);
+    BL_WR_REG(HBN_BASE,HBN_MISC,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Set pad 23-28 pull down
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION HBN_Set_Pad_23_28_Pulldown(void)
+{
+    uint32_t tmpVal = 0;
+    
+    /********************************************/
+    /* GPIO28 is bootpin, so leave it pull none */
+    /********************************************/
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_MISC);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_FLASH_PULLDOWN_AON,0x1F);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_FLASH_PULLUP_AON,0x00);
+    BL_WR_REG(HBN_BASE,HBN_MISC,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Set pad 23-28 active ie
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION HBN_Set_Pad_23_28_ActiveIE(void)
+{
+    uint32_t tmpVal = 0;
+    
+    /********************************************/
+    /* GPIO28 is bootpin, so leave it pull none */
+    /********************************************/
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_MISC);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_FLASH_PULLDOWN_AON,0x1F);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_FLASH_PULLUP_AON,0x1F);
+    BL_WR_REG(HBN_BASE,HBN_MISC,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Set BOR config
+ *
+ * @param  cfg: Enable or disable
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type HBN_Set_BOR_Cfg(HBN_BOR_CFG_Type *cfg)
+{
+    uint32_t tmpVal = 0;
+
+    if(cfg->enableBorInt){
+        HBN_Enable_BOR_IRQ();
+    }else{
+        HBN_Disable_BOR_IRQ();
+    }
+
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_MISC);
+
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_BOR_VTH,cfg->borThreshold);
+    if(cfg->enablePorInBor){
+        tmpVal=BL_SET_REG_BIT(tmpVal,HBN_BOR_SEL);
+    }else{
+        tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_BOR_SEL);
+    }
+
+    if(cfg->enableBor){
+        tmpVal=BL_SET_REG_BIT(tmpVal,HBN_PU_BOR);
+    }else{
+        tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_PU_BOR);
+    }
+
+    BL_WR_REG(HBN_BASE,HBN_MISC,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  HBN OUT0 interrupt handler
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void HBN_OUT0_IRQHandler(void)
+{
+    if(SET==HBN_Get_INT_State(HBN_INT_GPIO9)){
+        HBN_Clear_IRQ(HBN_INT_GPIO9);
+        if(hbnInt0CbfArra[HBN_OUT0_INT_GPIO9] != NULL) {
+            hbnInt0CbfArra[HBN_OUT0_INT_GPIO9]();
+        }
+    }
+    if(SET==HBN_Get_INT_State(HBN_INT_GPIO10)){
+        HBN_Clear_IRQ(HBN_INT_GPIO10);
+        if(hbnInt0CbfArra[HBN_OUT0_INT_GPIO10] != NULL) {
+            hbnInt0CbfArra[HBN_OUT0_INT_GPIO10]();
+        }
+    }
+    if(SET==HBN_Get_INT_State(HBN_INT_GPIO11)){
+        HBN_Clear_IRQ(HBN_INT_GPIO11);
+        if(hbnInt0CbfArra[HBN_OUT0_INT_GPIO11] != NULL) {
+            hbnInt0CbfArra[HBN_OUT0_INT_GPIO11]();
+        }
+    }
+    if(SET==HBN_Get_INT_State(HBN_INT_GPIO12)){
+        HBN_Clear_IRQ(HBN_INT_GPIO12);
+        if(hbnInt0CbfArra[HBN_OUT0_INT_GPIO12] != NULL) {
+            hbnInt0CbfArra[HBN_OUT0_INT_GPIO12]();
+        }
+    }
+    if(SET==HBN_Get_INT_State(HBN_INT_GPIO13)){
+        HBN_Clear_IRQ(HBN_INT_GPIO13);
+        if(hbnInt0CbfArra[HBN_OUT0_INT_GPIO13] != NULL) {
+            hbnInt0CbfArra[HBN_OUT0_INT_GPIO13]();
+        }
+    }
+    if(SET==HBN_Get_INT_State(HBN_INT_RTC)){
+        HBN_Clear_IRQ(HBN_INT_RTC);
+        HBN_Clear_RTC_INT();
+        if(hbnInt0CbfArra[HBN_OUT0_INT_RTC] != NULL) {
+            hbnInt0CbfArra[HBN_OUT0_INT_RTC]();
+        }
+    }
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  HBN OUT1 interrupt handler
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void HBN_OUT1_IRQHandler(void)
+{
+    /* PIR */
+    if(SET==HBN_Get_INT_State(HBN_INT_PIR)){
+        HBN_Clear_IRQ(HBN_INT_PIR);
+        if(hbnInt1CbfArra[HBN_OUT1_INT_PIR] != NULL) {
+            hbnInt1CbfArra[HBN_OUT1_INT_PIR]();
+        }
+    }
+    /* BOR */
+    if(SET==HBN_Get_INT_State(HBN_INT_BOR)){
+        HBN_Clear_IRQ(HBN_INT_BOR);
+        if(hbnInt1CbfArra[HBN_OUT1_INT_BOR] != NULL) {
+            hbnInt1CbfArra[HBN_OUT1_INT_BOR]();
+        }
+    }
+    /* ACOMP0 */
+    if(SET==HBN_Get_INT_State(HBN_INT_ACOMP0)){
+        HBN_Clear_IRQ(HBN_INT_ACOMP0);
+        if(hbnInt1CbfArra[HBN_OUT1_INT_ACOMP0] != NULL) {
+            hbnInt1CbfArra[HBN_OUT1_INT_ACOMP0]();
+        }
+    }
+    /* ACOMP1 */
+    if(SET==HBN_Get_INT_State(HBN_INT_ACOMP1)){
+        HBN_Clear_IRQ(HBN_INT_ACOMP1);
+        if(hbnInt1CbfArra[HBN_OUT1_INT_ACOMP1] != NULL) {
+            hbnInt1CbfArra[HBN_OUT1_INT_ACOMP1]();
+        }
+    }
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Enable HBN mode
+ *
+ * @param  aGPIOIeCfg: AON GPIO IE config,Bit0->GPIO18. Bit(s) of Wakeup GPIO(s) must not be set to
+ *                     0(s),say when use GPIO7 as wake up pin,aGPIOIeCfg should be 0x01.
+ * @param  ldoLevel: LDO volatge level
+ * @param  hbnLevel: HBN work level
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ATTR_TCM_SECTION HBN_Enable(uint8_t aGPIOIeCfg,HBN_LDO_LEVEL_Type ldoLevel,HBN_LEVEL_Type hbnLevel)
+{
+    uint32_t tmpVal;
+    
+    CHECK_PARAM(IS_HBN_LDO_LEVEL_TYPE(ldoLevel));
+    CHECK_PARAM(IS_HBN_LEVEL_TYPE(hbnLevel));
+    
+    /* Setting from guide */
+    /* RAM Retion */
+    BL_WR_REG(HBN_BASE,HBN_SRAM,0x24);
+    /* AON GPIO IE */
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_IRQ_MODE);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_REG_AON_PAD_IE_SMT,aGPIOIeCfg);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_REG_EN_HW_PU_PD);    
+    BL_WR_REG(HBN_BASE,HBN_IRQ_MODE,tmpVal);
+    ///* Power off 1.8V */
+    //tmpVal=BL_RD_REG(AON_BASE,AON_PMIP);
+    //tmpVal=BL_CLR_REG_BIT(tmpVal,AON_PU_TOPLDO11_SOC);
+    //tmpVal=BL_CLR_REG_BIT(tmpVal,AON_PU_TOPLDO18_RF);
+    //tmpVal=BL_CLR_REG_BIT(tmpVal,AON_PU_TOPLDO18_IO);   
+    ///* SOC11 enum is not the same as VDD11*/
+    //tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_TOPLDO11_SOC_VOUT_SEL,ldoLevel-1);
+    //BL_WR_REG(AON_BASE,AON_PMIP,tmpVal);
+    //
+    ///* Set RT voltage */
+    //tmpVal=BL_RD_REG(AON_BASE,AON);
+    //tmpVal=BL_CLR_REG_BIT(tmpVal,AON_TOPLDO18_IO_SW3);
+    //tmpVal=BL_CLR_REG_BIT(tmpVal,AON_TOPLDO18_IO_SW2);
+    //tmpVal=BL_CLR_REG_BIT(tmpVal,AON_TOPLDO18_IO_SW1);
+    //tmpVal=BL_CLR_REG_BIT(tmpVal,AON_TOPLDO18_IO_BYPASS);    
+    //tmpVal=BL_CLR_REG_BIT(tmpVal,AON_PU_LDO18_AON);    
+    ///* RT11 enum is not the same as VDD11*/
+    //tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_TOPLDO11_RT_VOUT_SEL,ldoLevel-1);
+    //tmpVal=BL_SET_REG_BITS_VAL(tmpVal,AON_VDD11_SEL,ldoLevel);
+    //BL_WR_REG(AON_BASE,AON,tmpVal);
+    
+    /* Select RC32M */
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_GLB);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,HBN_ROOT_CLK_SEL,0);
+    BL_WR_REG(HBN_BASE,HBN_GLB,tmpVal);
+    __NOP();__NOP();__NOP();__NOP();
+    
+    /* Set HBN flag */
+    BL_WR_REG(HBN_BASE,HBN_RSV0,HBN_STATUS_ENTER_FLAG);
+    
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_CTL);
+    /* Set HBN level, (HBN_PWRDN_HBN_RAM not use) */
+    switch(hbnLevel){
+        case HBN_LEVEL_0:
+            tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_PWRDN_HBN_CORE);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_PWRDN_HBN_RTC);
+            break;
+        
+        case HBN_LEVEL_1:
+            tmpVal=BL_SET_REG_BIT(tmpVal,HBN_PWRDN_HBN_CORE);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_PWRDN_HBN_RTC);
+            break;
+            
+        case HBN_LEVEL_2:
+            tmpVal=BL_SET_REG_BIT(tmpVal,HBN_PWRDN_HBN_CORE);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_PWRDN_HBN_RTC);
+            break;
+            
+        case HBN_LEVEL_3:
+            tmpVal=BL_SET_REG_BIT(tmpVal,HBN_PWRDN_HBN_CORE);
+            tmpVal=BL_SET_REG_BIT(tmpVal,HBN_PWRDN_HBN_RTC);
+            break;
+            
+        default :
+            break;
+    }
+    /* Set power on option:0 for por reset twice for robust 1 for reset only once*/
+    tmpVal=BL_CLR_REG_BIT(tmpVal,HBN_PWR_ON_OPTION);
+    BL_WR_REG(HBN_BASE,HBN_CTL,tmpVal);
+    
+    /* Enable HBN mode */
+    tmpVal=BL_RD_REG(HBN_BASE,HBN_CTL);
+    tmpVal=BL_SET_REG_BIT(tmpVal,HBN_MODE);
+    BL_WR_REG(HBN_BASE,HBN_CTL,tmpVal);
+    
+    while(1){
+        BL702_Delay_MS(1000);
+    }
+}
+
+/*@} end of group HBN_Public_Functions */
+
+/*@} end of group HBN */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_i2c.c b/drivers/bl702_driver/std_drv/src/bl702_i2c.c
new file mode 100644
index 00000000..19ecac25
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_i2c.c
@@ -0,0 +1,768 @@
+/**
+  ******************************************************************************
+  * @file    bl702_i2c.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_i2c.h"
+#include "bl702_glb.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  I2C
+ *  @{
+ */
+
+/** @defgroup  I2C_Private_Macros
+ *  @{
+ */
+#define I2C_FIFO_STATUS_TIMEOUT                   (160*1000*2)
+#define PUT_UINT32_LE(n,b,i)                      \
+{                                                 \
+    (b)[(i)    ] = (uint8_t) ( (n)       );       \
+    (b)[(i) + 1] = (uint8_t) ( (n) >>  8 );       \
+    (b)[(i) + 2] = (uint8_t) ( (n) >> 16 );       \
+    (b)[(i) + 3] = (uint8_t) ( (n) >> 24 );       \
+}
+
+/*@} end of group I2C_Private_Macros */
+
+/** @defgroup  I2C_Private_Types
+ *  @{
+ */
+
+/*@} end of group I2C_Private_Types */
+
+/** @defgroup  I2C_Private_Variables
+ *  @{
+ */
+intCallback_Type * i2cIntCbfArra[I2C_ID_MAX][I2C_INT_ALL]= {{NULL}};
+
+/*@} end of group I2C_Private_Variables */
+
+/** @defgroup  I2C_Global_Variables
+ *  @{
+ */
+
+/*@} end of group I2C_Global_Variables */
+
+/** @defgroup  I2C_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group I2C_Private_Fun_Declaration */
+
+/** @defgroup  I2C_Private_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  I2C interrupt handler
+ *
+ * @param  i2cNo: I2C ID type
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+static void I2C_IntHandler(I2C_ID_Type i2cNo)
+{
+    uint32_t tmpVal;
+    uint32_t I2Cx = I2C_BASE;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
+
+    tmpVal = BL_RD_REG(I2Cx, I2C_INT_STS);
+    if(BL_IS_REG_BIT_SET(tmpVal,I2C_END_INT)){
+        if(i2cIntCbfArra[i2cNo][I2C_TRANS_END_INT] != NULL){
+            /* Call the callback function */
+            i2cIntCbfArra[i2cNo][I2C_TRANS_END_INT]();
+        }
+    }
+    if(BL_IS_REG_BIT_SET(tmpVal,I2C_TXF_INT)){
+        if(i2cIntCbfArra[i2cNo][I2C_TX_FIFO_READY_INT] != NULL){
+            /* Call the callback function */
+            i2cIntCbfArra[i2cNo][I2C_TX_FIFO_READY_INT]();
+        }
+    }
+    if(BL_IS_REG_BIT_SET(tmpVal,I2C_RXF_INT)){
+        if(i2cIntCbfArra[i2cNo][I2C_RX_FIFO_READY_INT] != NULL){
+            /* Call the callback function */
+            i2cIntCbfArra[i2cNo][I2C_RX_FIFO_READY_INT]();
+        }
+    }
+    if(BL_IS_REG_BIT_SET(tmpVal,I2C_NAK_INT)){
+        if(i2cIntCbfArra[i2cNo][I2C_NACK_RECV_INT] != NULL){
+            /* Call the callback function */
+            i2cIntCbfArra[i2cNo][I2C_NACK_RECV_INT]();
+        }
+    }
+    if(BL_IS_REG_BIT_SET(tmpVal,I2C_ARB_INT)){
+        if(i2cIntCbfArra[i2cNo][I2C_ARB_LOST_INT] != NULL){
+            /* Call the callback function */
+            i2cIntCbfArra[i2cNo][I2C_ARB_LOST_INT]();
+        }
+    }
+    if(BL_IS_REG_BIT_SET(tmpVal,I2C_FER_INT)){
+        if(i2cIntCbfArra[i2cNo][I2C_FIFO_ERR_INT] != NULL){
+            /* Call the callback function */
+            i2cIntCbfArra[i2cNo][I2C_FIFO_ERR_INT]();
+        }
+    }
+}
+#endif
+
+/*@} end of group I2C_Private_Functions */
+
+/** @defgroup  I2C_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  I2C write word data
+ *
+ * @param  i2cNo: I2C ID type
+ * @param  data: Data word
+ *
+ * @return None
+ *
+*******************************************************************************/
+void I2C_SendWord(I2C_ID_Type i2cNo, uint32_t data)
+{
+    uint32_t I2Cx = I2C_BASE;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
+    BL_WR_REG(I2Cx, I2C_FIFO_WDATA, data);
+}
+
+/****************************************************************************//**
+ * @brief  I2C read word data
+ *
+ * @param  i2cNo: I2C ID type
+ *
+ * @return word data
+ *
+*******************************************************************************/
+uint32_t I2C_RecieveWord(I2C_ID_Type i2cNo)
+{
+    uint32_t I2Cx = I2C_BASE;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
+    return BL_RD_REG(I2Cx, I2C_FIFO_RDATA);
+}
+
+/****************************************************************************//**
+ * @brief  I2C enable
+ *
+ * @param  i2cNo: I2C ID type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void I2C_Enable(I2C_ID_Type i2cNo)
+{
+    uint32_t tmpVal;
+    uint32_t I2Cx = I2C_BASE;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
+
+    tmpVal = BL_RD_REG(I2Cx, I2C_FIFO_CONFIG_0);
+    tmpVal = BL_SET_REG_BIT(tmpVal, I2C_TX_FIFO_CLR);
+    tmpVal = BL_SET_REG_BIT(tmpVal, I2C_RX_FIFO_CLR);
+    BL_WR_REG(I2Cx, I2C_FIFO_CONFIG_0, tmpVal);
+
+    tmpVal = BL_RD_REG(I2Cx, I2C_CONFIG);
+    tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_M_EN);
+    BL_WR_REG(I2Cx, I2C_CONFIG, tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  I2C disable
+ *
+ * @param  i2cNo: I2C ID type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void I2C_Disable(I2C_ID_Type i2cNo)
+{
+    uint32_t tmpVal;
+    uint32_t I2Cx = I2C_BASE;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
+
+    tmpVal = BL_RD_REG(I2Cx, I2C_CONFIG);
+    tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_M_EN);
+    BL_WR_REG(I2Cx, I2C_CONFIG, tmpVal);
+
+    /* Clear I2C fifo */
+    tmpVal = BL_RD_REG(I2Cx, I2C_FIFO_CONFIG_0);
+    tmpVal = BL_SET_REG_BIT(tmpVal, I2C_TX_FIFO_CLR);
+    tmpVal = BL_SET_REG_BIT(tmpVal, I2C_RX_FIFO_CLR);
+    BL_WR_REG(I2Cx, I2C_FIFO_CONFIG_0, tmpVal);
+
+    /* Clear I2C interrupt status */
+    tmpVal = BL_RD_REG(I2Cx, I2C_INT_STS);
+    tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_END_CLR);
+    tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_NAK_CLR);
+    tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_ARB_CLR);
+    BL_WR_REG(I2Cx, I2C_INT_STS, tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  I2C set global reset function
+ *
+ * @param  i2cNo: I2C ID type
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type I2C_Reset(I2C_ID_Type i2cNo)
+{
+    /* Check the parameters */
+    CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
+
+    GLB_AHB_Slave1_Reset(BL_AHB_SLAVE1_I2C);
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  I2C init function
+ *
+ * @param  i2cNo: I2C ID type
+ * @param  direct: I2C read or write direct
+ * @param  cfg: I2C transfer config struct
+ *
+ * @return None
+ *
+*******************************************************************************/
+void I2C_Init(I2C_ID_Type i2cNo, I2C_Direction_Type direct, I2C_Transfer_Cfg *cfg)
+{
+    uint32_t tmpVal;
+    uint32_t I2Cx = I2C_BASE;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
+
+    /* Disable clock gate */
+    GLB_AHB_Slave1_Clock_Gate(DISABLE,BL_AHB_SLAVE1_I2C);
+
+    /* I2C write config */
+    tmpVal = BL_RD_REG(I2Cx, I2C_CONFIG);
+    if(direct == I2C_WRITE){
+        tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_PKT_DIR);
+    }else{
+        tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_PKT_DIR);
+    }
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_SLV_ADDR, cfg->slaveAddr);
+    if(cfg->subAddrSize > 0){
+        tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_SUB_ADDR_EN);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_SUB_ADDR_BC, cfg->subAddrSize-1);
+    }else{
+        tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_SUB_ADDR_EN);
+    }
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PKT_LEN, cfg->dataSize-1);
+    BL_WR_REG(I2Cx, I2C_CONFIG, tmpVal);
+
+    /* Set sub address */
+    BL_WR_REG(I2Cx, I2C_SUB_ADDR, cfg->subAddr);
+
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(I2C_IRQn,I2C_IRQHandler);
+#endif
+}
+
+/****************************************************************************//**
+ * @brief  Set i2c prd
+ *
+ * @param  i2cNo: I2C ID type
+ * @param  phase: I2C phase value
+ *
+ * @return None
+ *
+*******************************************************************************/
+void I2C_SetPrd(I2C_ID_Type i2cNo, uint8_t phase)
+{
+    uint32_t tmpVal;
+    uint32_t I2Cx = I2C_BASE;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
+
+    //phase_cycles = (32000000 / phase / 4) - 1;
+    tmpVal = BL_RD_REG(I2Cx, I2C_PRD_START);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_S_PH_0, phase);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_S_PH_1, phase);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_S_PH_2, phase);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_S_PH_3, phase);
+    BL_WR_REG(I2Cx, I2C_PRD_START, tmpVal);
+    tmpVal = BL_RD_REG(I2Cx, I2C_PRD_STOP);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_P_PH_0, phase);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_P_PH_1, phase);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_P_PH_2, phase);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_P_PH_3, phase);
+    BL_WR_REG(I2Cx, I2C_PRD_STOP, tmpVal);
+    tmpVal = BL_RD_REG(I2Cx, I2C_PRD_DATA);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_D_PH_0, phase);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_D_PH_1, phase);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_D_PH_2, phase);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2C_CR_I2C_PRD_D_PH_3, phase);
+    BL_WR_REG(I2Cx, I2C_PRD_DATA, tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  I2C set scl output clock
+ *
+ * @param  i2cNo: I2C ID type
+ * @param  clk: Clock set
+ *
+ * @return None
+ *
+*******************************************************************************/
+void I2C_ClockSet(I2C_ID_Type i2cNo, uint32_t clk)
+{
+    uint8_t bclkDiv = 0;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
+
+    bclkDiv = GLB_Get_BCLK_Div();
+    if(clk >= 100000){
+        GLB_Set_I2C_CLK(1, 0);
+        I2C_SetPrd(i2cNo, (SystemCoreClockGet()/(bclkDiv+1)) / (clk*4)-1);
+    }else if(clk >= 8000){
+        GLB_Set_I2C_CLK(1, 9);
+        I2C_SetPrd(i2cNo, ((SystemCoreClockGet()/(bclkDiv+1))/10) / (clk*4)-1);
+    }else if(clk >= 800){
+        GLB_Set_I2C_CLK(1, 99);
+        I2C_SetPrd(i2cNo, ((SystemCoreClockGet()/(bclkDiv+1))/100) / (clk*4)-1);
+    }else{
+        GLB_Set_I2C_CLK(1, 255);
+        I2C_SetPrd(i2cNo, ((SystemCoreClockGet()/(bclkDiv+1))/256) / (clk*4)-1);
+    }
+}
+
+/****************************************************************************//**
+ * @brief  I2C set scl sync
+ *
+ * @param  i2cNo: I2C ID type
+ * @param  enable: Enable or disable I2C scl sync
+ *
+ * @return None
+ *
+*******************************************************************************/
+void I2C_SetSclSync(I2C_ID_Type i2cNo, uint8_t enable)
+{
+    uint32_t tmpVal;
+    uint32_t I2Cx = I2C_BASE;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
+
+    tmpVal = BL_RD_REG(I2Cx, I2C_CONFIG);
+    if(enable){
+        tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_SCL_SYNC_EN);
+    }else{
+        tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_SCL_SYNC_EN);
+    }
+    BL_WR_REG(I2Cx, I2C_CONFIG, tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Get i2c busy state
+ *
+ * @param  i2cNo: I2C ID type
+ *
+ * @return RESET or SET
+ *
+*******************************************************************************/
+BL_Sts_Type I2C_IsBusy(I2C_ID_Type i2cNo)
+{
+    uint32_t tmpVal;
+    uint32_t I2Cx = I2C_BASE;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
+
+    tmpVal = BL_RD_REG(I2Cx, I2C_BUS_BUSY);
+    return ((BL_IS_REG_BIT_SET(tmpVal, I2C_STS_I2C_BUS_BUSY)) ? SET: RESET);
+}
+
+/****************************************************************************//**
+ * @brief  Get i2c transfer end state
+ *
+ * @param  i2cNo: I2C ID type
+ *
+ * @return RESET or SET
+ *
+*******************************************************************************/
+BL_Sts_Type I2C_TransferEndStatus(I2C_ID_Type i2cNo)
+{
+    uint32_t tmpVal;
+    uint32_t I2Cx = I2C_BASE;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
+
+    tmpVal = BL_RD_REG(I2Cx, I2C_INT_STS);
+    return ((BL_IS_REG_BIT_SET(tmpVal, I2C_END_INT)) ? SET: RESET);
+}
+
+/****************************************************************************//**
+ * @brief  I2C master write block data
+ *
+ * @param  i2cNo: I2C ID type
+ * @param  cfg: I2C transfer config struct
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type I2C_MasterSendBlocking(I2C_ID_Type i2cNo, I2C_Transfer_Cfg *cfg)
+{
+    uint8_t i;
+    uint32_t timeOut = 0;
+    uint32_t temp = 0;
+    uint32_t I2Cx = I2C_BASE;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
+
+    I2C_Disable(i2cNo);
+    I2C_Init(i2cNo, I2C_WRITE, cfg);
+    I2C_Enable(i2cNo);
+
+    /* Set I2C write data */
+    for(i=0; idataSize; i++){
+        temp += (cfg->data[i] << ((i % 4) * 8));
+        if((i + 1) % 4 == 0){
+            timeOut = I2C_FIFO_STATUS_TIMEOUT;
+            while(BL_GET_REG_BITS_VAL(BL_RD_REG(I2Cx, I2C_FIFO_CONFIG_1), I2C_TX_FIFO_CNT) == 0){
+                timeOut--;
+                if(timeOut == 0){
+                    I2C_Disable(i2cNo);
+                    return TIMEOUT;
+                }
+            }
+            BL_WR_REG(I2Cx, I2C_FIFO_WDATA, temp);
+            temp = 0;
+        }
+    }
+    if((cfg->dataSize%4) != 0){
+        timeOut = I2C_FIFO_STATUS_TIMEOUT;
+        while(BL_GET_REG_BITS_VAL(BL_RD_REG(I2Cx, I2C_FIFO_CONFIG_1), I2C_TX_FIFO_CNT) == 0){
+            timeOut--;
+            if(timeOut == 0){
+                I2C_Disable(i2cNo);
+                return TIMEOUT;
+            }
+        }
+        BL_WR_REG(I2Cx, I2C_FIFO_WDATA, temp);
+    }
+
+    timeOut = I2C_FIFO_STATUS_TIMEOUT;
+    while(I2C_IsBusy(i2cNo) || !I2C_TransferEndStatus(i2cNo)){
+        timeOut--;
+        if(timeOut == 0){
+            I2C_Disable(i2cNo);
+            return TIMEOUT;
+        }
+    }
+
+    I2C_Disable(i2cNo);
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  I2C master read block data
+ *
+ * @param  i2cNo: I2C ID type
+ * @param  cfg: I2C transfer config struct
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type I2C_MasterReceiveBlocking(I2C_ID_Type i2cNo, I2C_Transfer_Cfg *cfg)
+{
+    uint8_t i = 0;
+    uint32_t timeOut = 0;
+    uint32_t temp = 0;
+    uint32_t I2Cx = I2C_BASE;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
+
+    I2C_Disable(i2cNo);
+    I2C_Init(i2cNo, I2C_READ, cfg);
+    I2C_Enable(i2cNo);
+
+    /* Read I2C data */
+    while(cfg->dataSize - i >= 4){
+        timeOut = I2C_FIFO_STATUS_TIMEOUT;
+        while(BL_GET_REG_BITS_VAL(BL_RD_REG(I2Cx, I2C_FIFO_CONFIG_1), I2C_RX_FIFO_CNT) == 0){
+            timeOut--;
+            if(timeOut == 0){
+                I2C_Disable(i2cNo);
+                return TIMEOUT;
+            }
+        }
+        temp = BL_RD_REG(I2Cx, I2C_FIFO_RDATA);
+        PUT_UINT32_LE(temp, cfg->data, i);
+        i += 4;
+    }
+    if(i < cfg->dataSize){
+        timeOut = I2C_FIFO_STATUS_TIMEOUT;
+        while(BL_GET_REG_BITS_VAL(BL_RD_REG(I2Cx, I2C_FIFO_CONFIG_1), I2C_RX_FIFO_CNT) == 0){
+            timeOut--;
+            if(timeOut == 0){
+                I2C_Disable(i2cNo);
+                return TIMEOUT;
+            }
+        }
+        temp = BL_RD_REG(I2Cx, I2C_FIFO_RDATA);
+        while(i < cfg->dataSize){
+            cfg->data[i] = (temp & 0xff);
+            temp = (temp >> 8);
+            i ++;
+        }
+    }
+
+    timeOut = I2C_FIFO_STATUS_TIMEOUT;
+    while(I2C_IsBusy(i2cNo) || !I2C_TransferEndStatus(i2cNo)){
+        timeOut--;
+        if(timeOut == 0){
+            I2C_Disable(i2cNo);
+            return TIMEOUT;
+        }
+    }
+
+    I2C_Disable(i2cNo);
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Mask/Unmask the I2C interrupt
+ *
+ * @param  i2cNo: I2C ID type
+ * @param  intType: Specifies the interrupt type
+ * @param  intMask: Enable/Disable Specified interrupt type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void I2C_IntMask(I2C_ID_Type i2cNo, I2C_INT_Type intType, BL_Mask_Type intMask)
+{
+    uint32_t tmpVal;
+    uint32_t I2Cx = I2C_BASE;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
+    CHECK_PARAM(IS_I2C_INT_TYPE(intType));
+    CHECK_PARAM(IS_BL_MASK_TYPE(intMask));
+
+    tmpVal = BL_RD_REG(I2Cx, I2C_INT_STS);
+    switch(intType)
+    {
+        case I2C_TRANS_END_INT:
+            if(intMask == UNMASK)
+            {
+                /* UNMASK(Enable) this interrupt */
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_END_EN);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_END_MASK);
+            }
+            else
+            {
+                /* MASK(Disable) this interrupt */
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_END_EN);
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_END_MASK);
+            }
+            break;
+        case I2C_TX_FIFO_READY_INT:
+            if(intMask == UNMASK)
+            {
+                /* UNMASK(Enable) this interrupt */
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_TXF_EN);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_TXF_MASK);
+            }
+            else
+            {
+                /* MASK(Disable) this interrupt */
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_TXF_EN);
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_TXF_MASK);
+            }
+            break;
+        case I2C_RX_FIFO_READY_INT:
+            if(intMask == UNMASK)
+            {
+                /* UNMASK(Enable) this interrupt */
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_RXF_EN);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_RXF_MASK);
+            }
+            else
+            {
+                /* MASK(Disable) this interrupt */
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_RXF_EN);
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_RXF_MASK);
+            }
+            break;
+        case I2C_NACK_RECV_INT:
+            if(intMask == UNMASK)
+            {
+                /* UNMASK(Enable) this interrupt */
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_NAK_EN);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_NAK_MASK);
+            }
+            else
+            {
+                /* MASK(Disable) this interrupt */
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_NAK_EN);
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_NAK_MASK);
+            }
+            break;
+        case I2C_ARB_LOST_INT:
+            if(intMask == UNMASK)
+            {
+                /* UNMASK(Enable) this interrupt */
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_ARB_EN);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_ARB_MASK);
+            }
+            else
+            {
+                /* MASK(Disable) this interrupt */
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_ARB_EN);
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_ARB_MASK);
+            }
+            break;
+        case I2C_FIFO_ERR_INT:
+            if(intMask == UNMASK)
+            {
+                /* UNMASK(Enable) this interrupt */
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_FER_EN);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_FER_MASK);
+            }
+            else
+            {
+                /* MASK(Disable) this interrupt */
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_FER_EN);
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_FER_MASK);
+            }
+            break;
+        case I2C_INT_ALL:
+            if(intMask == UNMASK)
+            {
+                /* UNMASK(Enable) this interrupt */
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_END_EN);
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_TXF_EN);
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_RXF_EN);
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_NAK_EN);
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_ARB_EN);
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_FER_EN);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_END_MASK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_TXF_MASK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_RXF_MASK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_NAK_MASK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_ARB_MASK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_FER_MASK);
+            }
+            else
+            {
+                /* MASK(Disable) this interrupt */
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_END_EN);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_TXF_EN);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_RXF_EN);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_NAK_EN);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_ARB_EN);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, I2C_CR_I2C_FER_EN);
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_END_MASK);
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_TXF_MASK);
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_RXF_MASK);
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_NAK_MASK);
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_ARB_MASK);
+                tmpVal = BL_SET_REG_BIT(tmpVal, I2C_CR_I2C_FER_MASK);
+            }
+            break;
+
+        default:
+            break;
+    }
+    BL_WR_REG(I2Cx, I2C_INT_STS, tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Install I2C interrupt callback function
+ *
+ * @param  i2cNo: I2C ID type
+ * @param  intType: Specifies the interrupt type
+ * @param  cbFun: Pointer to interrupt callback function. The type should be void (*fn)(void)
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void I2C_Int_Callback_Install(I2C_ID_Type i2cNo, I2C_INT_Type intType, intCallback_Type* cbFun)
+{
+    /* Check the parameters */
+    CHECK_PARAM(IS_I2C_ID_TYPE(i2cNo));
+    CHECK_PARAM(IS_I2C_INT_TYPE(intType));
+
+    i2cIntCbfArra[i2cNo][intType] = cbFun;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  I2C IRQ handler
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void I2C_IRQHandler(void)
+{
+    I2C_IntHandler(I2C0_ID);
+}
+#endif
+
+
+/*@} end of group I2C_Public_Functions */
+
+/*@} end of group I2C */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_i2c_gpio_sim.c b/drivers/bl702_driver/std_drv/src/bl702_i2c_gpio_sim.c
new file mode 100644
index 00000000..bffce800
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_i2c_gpio_sim.c
@@ -0,0 +1,456 @@
+/**
+  ******************************************************************************
+  * @file    bl702_i2c_gpio_sim.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_glb.h"
+#include "bl702_gpio.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  I2C_GPIO_SIM
+ *  @{
+ */
+
+/** @defgroup  I2C_GPIO_SIM_Private_Macros
+ *  @{
+ */
+#define SCL_H                   GLB_GPIO_Write(sclPin,1)
+#define SCL_L                   GLB_GPIO_Write(sclPin,0)
+#define SDA_H                   GLB_GPIO_Write(sdaPin,1)
+#define SDA_L                   GLB_GPIO_Write(sdaPin,0)
+#define SDA_read                GLB_GPIO_Read(sdaPin)
+#define I2C_Delay_US(a)         BL702_Delay_US(a)
+#define I2C_Delay_Const         I2C_Delay_US(2)
+
+/*@} end of group I2C_GPIO_SIM_Private_Macros */
+
+/** @defgroup  I2C_GPIO_SIM_Private_Types
+ *  @{
+ */
+
+/*@} end of group I2C_GPIO_SIM_Private_Types */
+
+/** @defgroup  I2C_GPIO_SIM_Private_Variables
+ *  @{
+ */
+static GLB_GPIO_Type  sclPin;
+static GLB_GPIO_Type  sdaPin;
+static uint8_t sda_out=0;
+
+/*@} end of group I2C_GPIO_SIM_Private_Variables */
+
+/** @defgroup  I2C_GPIO_SIM_Global_Variables
+ *  @{
+ */
+
+/*@} end of group I2C_GPIO_SIM_Global_Variables */
+
+/** @defgroup  I2C_GPIO_SIM_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group I2C_GPIO_SIM_Private_Fun_Declaration */
+
+/** @defgroup  I2C_GPIO_SIM_Private_Functions
+ *  @{
+ */
+
+/*@} end of group I2C_GPIO_SIM_Private_Functions */
+
+/** @defgroup  I2C_GPIO_SIM_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  I2C GPIO init function
+ *
+ * @param  sclGPIOPin: I2C SCL GPIO pin
+ * @param  sdaGPIOPin: I2C SDA GPIO pin
+ *
+ * @return None
+ *
+*******************************************************************************/
+void I2C_GPIO_Sim_Init(GLB_GPIO_Type sclGPIOPin,GLB_GPIO_Type  sdaGPIOPin)
+{
+    GLB_GPIO_Cfg_Type cfg;
+    uint8_t gpiopins[2];
+    uint8_t gpiofuns[2];
+    int i;
+    
+    sclPin=sclGPIOPin;
+    sdaPin=sdaGPIOPin;
+
+    cfg.pullType=GPIO_PULL_UP;
+    cfg.drive=1;
+    cfg.smtCtrl=1;
+    cfg.gpioMode=GPIO_MODE_OUTPUT;
+
+    gpiopins[0]=sclPin;
+    gpiopins[1]=sdaPin;
+    gpiofuns[0]=11;
+    gpiofuns[1]=11;
+
+    for(i=0;i 25){
+            SCL_L;
+            return 0;
+        }
+    }
+    SCL_L;
+
+    return 1;
+}
+
+/****************************************************************************//**
+ * @brief  I2C send byte function
+ *
+ * @param  Data: send data
+ *
+ * @return None
+ *
+*******************************************************************************/
+void I2C_SendByte(uint8_t Data)
+{
+    uint8_t cnt;
+
+    I2C_SDA_OUT();
+
+    for(cnt=0; cnt<8; cnt++){
+        SCL_L;
+        I2C_Delay_Const;
+        if(Data & 0x80){
+            SDA_H;
+        }
+        else{
+            SDA_L;
+        }
+        Data <<= 1;
+        I2C_Delay_Const;
+        SCL_H;
+        I2C_Delay_Const;
+    }
+    SCL_L;
+
+    I2C_Delay_Const;
+}
+
+/****************************************************************************//**
+ * @brief  I2C read byte function
+ *
+ * @param  ack: i2c ack byte
+ *
+ * @return None
+ *
+*******************************************************************************/
+uint8_t I2C_ReadByte(uint8_t ack)
+{
+    uint8_t cnt;
+    uint8_t data=0;
+
+    I2C_SDA_IN();
+
+    for(cnt=0; cnt<8; cnt++){
+        SCL_L;
+        I2C_Delay_Const;
+
+        SCL_H;
+        I2C_Delay_Const;
+        data <<= 1;
+        if(SDA_read){
+            data |= 0x01;
+        }
+    }
+    if(ack == 1){
+        I2C_Ack();
+    }
+    else{
+        I2C_NoAck();
+    }
+
+    return data;
+}
+
+/****************************************************************************//**
+ * @brief  SCCB init function
+ *
+ * @param  sclGPIOPin: I2C SCL GPIO pin
+ * @param  sdaGPIOPin: I2C SDA GPIO pin
+ *
+ * @return None
+ *
+*******************************************************************************/
+int SCCB_Init(GLB_GPIO_Type sclGPIOPin,GLB_GPIO_Type  sdaGPIOPin)
+{
+    I2C_GPIO_Sim_Init(sclGPIOPin,sdaGPIOPin);
+    return 0;
+}
+
+/****************************************************************************//**
+ * @brief  SCCB write function
+ *
+ * @param  slave_addr: salve addr
+ * @param  data: write data
+ * @param  wrsize: write data len
+ *
+ * @return None
+ *
+*******************************************************************************/
+int SCCB_Write(uint8_t slave_addr, uint8_t* data,uint32_t wrsize)
+{
+    uint32_t i=0;
+
+    I2C_Start();
+
+    I2C_SendByte((slave_addr<<1)|0);
+    if(!I2C_GetAck()){
+        I2C_Stop();
+        return -1;
+    }
+    for(i=0;i
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_i2s.h"
+#include "bl702_glb.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  I2S
+ *  @{
+ */
+
+/** @defgroup  I2S_Private_Macros
+ *  @{
+ */
+
+/*@} end of group I2S_Private_Macros */
+
+/** @defgroup  I2S_Private_Types
+ *  @{
+ */
+
+/*@} end of group I2S_Private_Types */
+
+/** @defgroup  I2S_Private_Variables
+ *  @{
+ */
+
+/*@} end of group I2S_Private_Variables */
+
+/** @defgroup  I2S_Global_Variables
+ *  @{
+ */
+
+/*@} end of group I2S_Global_Variables */
+
+/** @defgroup  I2S_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group I2S_Private_Fun_Declaration */
+
+/** @defgroup  I2S_Private_Functions
+ *  @{
+ */
+
+/*@} end of group I2S_Private_Functions */
+
+/** @defgroup  I2S_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  I2S BCLK config
+ *
+ * @param  i2sCfg: I2S configuration pointer
+ *
+ * @return NONE
+ *
+*******************************************************************************/
+void I2S_SetBclkPeriod(I2S_CFG_Type *i2sCfg)
+{
+    uint32_t overSampleRate;
+    uint32_t bclkDivCnt;
+    uint32_t tmpVal;
+
+    CHECK_PARAM(IS_I2S_FRAME_SIZE_TYPE(i2sCfg->frameSize));
+
+    overSampleRate = i2sCfg->audioFreqHz/i2sCfg->sampleFreqHz;
+    switch(i2sCfg->frameSize)
+    {
+        case I2S_SIZE_FRAME_8:
+            bclkDivCnt = overSampleRate/16;
+            break;
+        case I2S_SIZE_FRAME_16:
+            bclkDivCnt = overSampleRate/32;
+            break;
+        case I2S_SIZE_FRAME_24:
+            bclkDivCnt = overSampleRate/48;
+            break;
+        case I2S_SIZE_FRAME_32:
+            bclkDivCnt = overSampleRate/64;
+            break;
+        default:
+            bclkDivCnt = overSampleRate/16;
+            break;
+    }
+    bclkDivCnt = (bclkDivCnt/2)-1;
+
+    tmpVal = (bclkDivCnt << 16) | bclkDivCnt;
+    BL_WR_REG(I2S_BASE,I2S_BCLK_CONFIG,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  I2S configuration
+ *
+ * @param  i2sCfg: I2S configuration pointer
+ *
+ * @return NONE
+ *
+*******************************************************************************/
+void I2S_Init(I2S_CFG_Type *i2sCfg)
+{
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_I2S_ENDIAN_TYPE(i2sCfg->endianType));
+    CHECK_PARAM(IS_I2S_MODE_TYPE(i2sCfg->modeType));
+    CHECK_PARAM(IS_I2S_FRAME_SIZE_TYPE(i2sCfg->frameSize));
+    CHECK_PARAM(IS_I2S_FS_MODE_TYPE(i2sCfg->fsMode));
+    CHECK_PARAM(IS_I2S_FS_CHANNEL_TYPE(i2sCfg->fsChannel));
+    CHECK_PARAM(IS_I2S_DATA_SIZE_TYPE(i2sCfg->dataSize));
+    CHECK_PARAM(IS_I2S_MONO_MODE_CHANNEL(i2sCfg->monoModeChannel));
+
+    /* Disable clock gate */
+    GLB_AHB_Slave1_Clock_Gate(DISABLE,BL_AHB_SLAVE1_I2S);
+
+    tmpVal=BL_RD_REG(I2S_BASE, I2S_CONFIG);
+
+    /* Set data endian*/
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2S_CR_ENDIAN,i2sCfg->endianType);
+
+    /* Set I2S mode */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2S_CR_I2S_MODE,i2sCfg->modeType);
+
+    /* Set BCLK invert */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2S_CR_I2S_BCLK_INV,i2sCfg->bclkInvert);
+
+    /* Set FS size */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2S_CR_FRAME_SIZE,i2sCfg->frameSize);
+
+    /* Set FS invert */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2S_CR_I2S_FS_INV,i2sCfg->fsInvert);
+
+    /* Set FS mode */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2S_CR_FS_1T_MODE,i2sCfg->fsMode);
+
+    /* Set FS channel mode */
+    
+    switch(i2sCfg->fsChannel){
+        case I2S_FS_CHANNELS_2:
+            tmpVal = BL_CLR_REG_BIT(tmpVal, I2S_CR_FS_3CH_MODE);
+            tmpVal = BL_CLR_REG_BIT(tmpVal, I2S_CR_FS_4CH_MODE);
+            break;
+        case I2S_FS_CHANNELS_3:
+            tmpVal = BL_SET_REG_BIT(tmpVal, I2S_CR_FS_3CH_MODE);
+            tmpVal = BL_CLR_REG_BIT(tmpVal, I2S_CR_FS_4CH_MODE);
+            break;
+        case I2S_FS_CHANNELS_4:
+            tmpVal = BL_CLR_REG_BIT(tmpVal, I2S_CR_FS_3CH_MODE);
+            tmpVal = BL_SET_REG_BIT(tmpVal, I2S_CR_FS_4CH_MODE);
+            break;
+        default:
+            break;
+    }
+
+    /* Set Data size */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2S_CR_DATA_SIZE,i2sCfg->dataSize);
+
+    /* Set Data offset */
+    if(i2sCfg->dataOffset!=0){
+        tmpVal = BL_SET_REG_BIT(tmpVal, I2S_CR_OFS_EN);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2S_CR_OFS_CNT,i2sCfg->dataOffset-1);
+    }else{
+        tmpVal = BL_CLR_REG_BIT(tmpVal, I2S_CR_OFS_EN);
+    }
+
+    /* Set mono mode */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2S_CR_MONO_MODE,i2sCfg->monoMode);
+
+    /* Set rx mono mode channel left or right */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2S_CR_MONO_RX_CH,i2sCfg->monoModeChannel);
+
+    /* Clear mute mode */
+    tmpVal = BL_CLR_REG_BIT(tmpVal, I2S_CR_MUTE_MODE);
+
+    BL_WR_REG(I2S_BASE, I2S_CONFIG, tmpVal);
+
+    I2S_SetBclkPeriod(i2sCfg);
+}
+
+/****************************************************************************//**
+ * @brief  I2S configure FIFO function
+ *
+ * @param  fifoCfg: FIFO configuration structure pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void I2S_FifoConfig(I2S_FifoCfg_Type *fifoCfg)
+{
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(I2S_BASE, I2S_FIFO_CONFIG_0);
+    /* Set packed mode */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2S_CR_FIFO_LR_MERGE,fifoCfg->lRMerge);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2S_CR_FIFO_LR_EXCHG,fifoCfg->frameDataExchange);
+    /* Clear tx and rx FIFO signal */
+    tmpVal = BL_SET_REG_BIT(tmpVal, I2S_TX_FIFO_CLR);
+    tmpVal = BL_SET_REG_BIT(tmpVal, I2S_RX_FIFO_CLR);
+    
+    /* Set DMA config */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2S_DMA_TX_EN,fifoCfg->txfifoDmaEnable);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2S_DMA_RX_EN,fifoCfg->rxfifoDmaEnable);
+    
+    BL_WR_REG(I2S_BASE, I2S_FIFO_CONFIG_0,tmpVal);
+    
+    /* Set CLR signal to 0*/
+    tmpVal = BL_CLR_REG_BIT(tmpVal, I2S_TX_FIFO_CLR);
+    tmpVal = BL_CLR_REG_BIT(tmpVal, I2S_RX_FIFO_CLR);
+    BL_WR_REG(I2S_BASE, I2S_FIFO_CONFIG_0,tmpVal);
+    
+    tmpVal=BL_RD_REG(I2S_BASE, I2S_FIFO_CONFIG_1);
+    /* Set TX and RX FIFO threshold */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2S_TX_FIFO_TH,fifoCfg->txFifoLevel);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, I2S_RX_FIFO_TH,fifoCfg->rxFifoLevel);
+    
+    BL_WR_REG(I2S_BASE, I2S_FIFO_CONFIG_1,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  I2S configure IO function
+ *
+ * @param  ioCfg: IO configuration structure pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void I2S_IOConfig(I2S_IOCfg_Type *ioCfg)
+{
+    uint32_t tmpVal;
+    
+    tmpVal = BL_RD_REG(I2S_BASE,I2S_IO_CONFIG);
+    /* Enable or disable deglitch */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,I2S_CR_DEG_EN,ioCfg->deglitchEn);
+    
+    /* Set deglitch cycle count */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,I2S_CR_DEG_CNT,ioCfg->deglitchCnt);
+    
+    /* Enable or disable inverse BCLK signal */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,I2S_CR_I2S_BCLK_INV,ioCfg->inverseBCLK);
+    
+    /* Enable or disable inverse FS signal */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,I2S_CR_I2S_FS_INV,ioCfg->inverseFS);
+    
+    /* Enable or disable inverse RX signal */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,I2S_CR_I2S_RXD_INV,ioCfg->inverseRX);
+    
+    /* Enable or disable inverse TX signal */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,I2S_CR_I2S_TXD_INV,ioCfg->inverseTX);
+    
+    BL_WR_REG(I2S_BASE,I2S_IO_CONFIG,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Enable I2S
+ *
+ * @param  roleType: I2S master or slave
+ *
+ * @return None
+ *
+*******************************************************************************/
+void I2S_Enable(I2S_Role_Type roleType)
+{
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_I2S_ROLE_TYPE(roleType));
+
+    tmpVal = BL_RD_REG(I2S_BASE, I2S_CONFIG);
+    tmpVal = BL_SET_REG_BIT(tmpVal, I2S_CR_I2S_TXD_EN);
+    tmpVal = BL_SET_REG_BIT(tmpVal, I2S_CR_I2S_RXD_EN);
+        
+    /* Set role type */
+    if (I2S_ROLE_MASTER == roleType) {
+        tmpVal = BL_SET_REG_BIT(tmpVal, I2S_CR_I2S_M_EN);
+        tmpVal = BL_CLR_REG_BIT(tmpVal, I2S_CR_I2S_S_EN);
+    } else if (I2S_ROLE_SLAVE == roleType) {
+        tmpVal = BL_CLR_REG_BIT(tmpVal, I2S_CR_I2S_M_EN);
+        tmpVal = BL_SET_REG_BIT(tmpVal, I2S_CR_I2S_S_EN);
+    }
+    
+    BL_WR_REG(I2S_BASE, I2S_CONFIG, tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Disable I2S
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void I2S_Disable(void)
+{
+    uint32_t tmpVal;
+
+    tmpVal = BL_RD_REG(I2S_BASE, I2S_CONFIG);
+    tmpVal = BL_CLR_REG_BIT(tmpVal, I2S_CR_I2S_TXD_EN);
+    tmpVal = BL_CLR_REG_BIT(tmpVal, I2S_CR_I2S_RXD_EN);
+    
+    tmpVal = BL_CLR_REG_BIT(tmpVal, I2S_CR_I2S_M_EN);
+    tmpVal = BL_CLR_REG_BIT(tmpVal, I2S_CR_I2S_S_EN);
+    BL_WR_REG(I2S_BASE, I2S_CONFIG, tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  I2S read data
+ *
+ * @param  None
+ *
+ * @return Data read
+ *
+*******************************************************************************/
+uint32_t I2S_Read(void)
+{
+    while (0 == BL_GET_REG_BITS_VAL(BL_RD_REG(I2S_BASE, I2S_FIFO_CONFIG_1), I2S_RX_FIFO_CNT)){};
+    return BL_RD_REG(I2S_BASE, I2S_FIFO_RDATA);
+}
+
+/****************************************************************************//**
+ * @brief  I2S write data
+ *
+ * @param  data: write data
+ *
+ * @return None
+ *
+*******************************************************************************/
+void I2S_Write(uint32_t data)
+{
+    while (0 == BL_GET_REG_BITS_VAL(BL_RD_REG(I2S_BASE, I2S_FIFO_CONFIG_1), I2S_TX_FIFO_CNT)){};
+    BL_WR_REG(I2S_BASE, I2S_FIFO_WDATA, data);
+}
+
+/****************************************************************************//**
+ * @brief  I2S set mute
+ *
+ * @param  enabled: mute enabled or not
+ *
+ * @return None
+ *
+*******************************************************************************/
+void I2S_Mute(BL_Fun_Type enabled)
+{
+    uint32_t tmpVal;
+
+    tmpVal = BL_RD_REG(I2S_BASE, I2S_CONFIG);
+    if(enabled ? 1 : 0) {
+        tmpVal = BL_SET_REG_BIT(tmpVal, I2S_CR_MUTE_MODE);
+    }
+    else {
+        tmpVal = BL_CLR_REG_BIT(tmpVal, I2S_CR_MUTE_MODE);
+    }
+    BL_WR_REG(I2S_BASE, I2S_CONFIG, tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  I2S set 24-bit data align mode in fifo
+ *
+ * @param  justType: Align mode
+ *
+ * @return None
+ *
+*******************************************************************************/
+void I2S_SetFifoJustified(I2S_FIFO_24_Justified_Type justType)
+{
+    uint32_t tmpVal;
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_I2S_FIFO_24_JUSTIFIED_TYPE(justType));
+    
+    tmpVal = BL_RD_REG(I2S_BASE,I2S_FIFO_CONFIG_0);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,I2S_CR_FIFO_24B_LJ,justType);
+    BL_WR_REG(I2S_BASE,I2S_FIFO_CONFIG_0,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  I2S flush
+ *
+ * @param  None
+ *
+ * @return data count in TX FIFO
+ *
+*******************************************************************************/
+uint32_t I2S_GetTxFIFO_AvlCnt(void)
+{
+    return BL_GET_REG_BITS_VAL(BL_RD_REG(I2S_BASE, I2S_FIFO_CONFIG_1), I2S_TX_FIFO_CNT);
+}
+
+/****************************************************************************//**
+ * @brief  I2S flush
+ *
+ * @param  None
+ *
+ * @return data count in RX FIFO
+ *
+*******************************************************************************/
+uint32_t I2S_GetRxFIFO_AvlCnt(void)
+{
+    return BL_GET_REG_BITS_VAL(BL_RD_REG(I2S_BASE, I2S_FIFO_CONFIG_1), I2S_RX_FIFO_CNT);
+}
+
+/****************************************************************************//**
+ * @brief  I2S flush
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void I2S_Flush(void)
+{
+    while (I2S_TX_FIFO_SIZE != I2S_GetTxFIFO_AvlCnt());
+}
+
+
+/*@} end of group I2S_Public_Functions */
+
+/*@} end of group I2S */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_ir.c b/drivers/bl702_driver/std_drv/src/bl702_ir.c
new file mode 100644
index 00000000..cded373b
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_ir.c
@@ -0,0 +1,1146 @@
+/**
+  ******************************************************************************
+  * @file    bl702_ir.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_ir.h"
+#include "bl702_glb.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  IR
+ *  @{
+ */
+
+/** @defgroup  IR_Private_Macros
+ *  @{
+ */
+#define NEC_HEAD_H_MIN          17000
+#define NEC_HEAD_H_MAX          19000
+#define NEC_HEAD_L_MIN           8400
+#define NEC_HEAD_L_MAX           9600
+#define NEC_BIT0_H_MIN            525
+#define NEC_BIT0_H_MAX           1725
+#define RC5_ONE_PLUSE_MIN        1175
+#define RC5_ONE_PLUSE_MAX        2375
+#define RC5_TWO_PLUSE_MIN        2955
+#define RC5_TWO_PLUSE_MAX        4155
+#define IR_TX_INT_TIMEOUT_COUNT          (100*160*1000)
+#define IR_RX_INT_TIMEOUT_COUNT          (100*160*1000)
+
+/*@} end of group IR_Private_Macros */
+
+/** @defgroup  IR_Private_Types
+ *  @{
+ */
+
+/*@} end of group IR_Private_Types */
+
+/** @defgroup  IR_Private_Variables
+ *  @{
+ */
+static intCallback_Type * irIntCbfArra[IR_INT_ALL]= {NULL,NULL};
+
+
+/*@} end of group IR_Private_Variables */
+
+/** @defgroup  IR_Global_Variables
+ *  @{
+ */
+
+/*@} end of group IR_Global_Variables */
+
+/** @defgroup  IR_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group IR_Private_Fun_Declaration */
+
+/** @defgroup  IR_Private_Functions
+ *  @{
+ */
+
+/*@} end of group IR_Private_Functions */
+
+/** @defgroup  IR_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  IR RX IRQ handler function
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void IRRX_IRQHandler(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal = BL_RD_REG(IR_BASE,IRRX_INT_STS);
+    if(BL_IS_REG_BIT_SET(tmpVal,IRRX_END_INT) && !BL_IS_REG_BIT_SET(tmpVal,IR_CR_IRRX_END_MASK)){
+        BL_WR_REG(IR_BASE,IRRX_INT_STS,BL_SET_REG_BIT(tmpVal,IR_CR_IRRX_END_CLR));
+        if(irIntCbfArra[IR_INT_RX] != NULL){
+            irIntCbfArra[IR_INT_RX]();
+        }
+    }
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  IR TX IRQ handler function
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void IRTX_IRQHandler(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal = BL_RD_REG(IR_BASE,IRTX_INT_STS);
+    if(BL_IS_REG_BIT_SET(tmpVal,IRTX_END_INT) && !BL_IS_REG_BIT_SET(tmpVal,IR_CR_IRTX_END_MASK)){
+        BL_WR_REG(IR_BASE,IRTX_INT_STS,BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_END_CLR));
+        if(irIntCbfArra[IR_INT_TX] != NULL){
+            irIntCbfArra[IR_INT_TX]();
+        }
+    }
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  IR tx initialization function
+ *
+ * @param  irTxCfg: IR tx configuration structure pointer
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type IR_TxInit(IR_TxCfg_Type *irTxCfg)
+{
+    uint32_t tmpVal;
+    
+    /* Disable clock gate */
+    GLB_AHB_Slave1_Clock_Gate(DISABLE,BL_AHB_SLAVE1_IRR);
+    
+    tmpVal = BL_RD_REG(IR_BASE,IRTX_CONFIG);
+    /* Set data bit */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_DATA_NUM,irTxCfg->dataBits-1);
+    /* Set tail pulse */
+    ENABLE == irTxCfg->tailPulseInverse ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_TAIL_HL_INV)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_TAIL_HL_INV));
+    ENABLE == irTxCfg->tailPulse ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_TAIL_EN)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_TAIL_EN));
+    /* Set head pulse */
+    ENABLE == irTxCfg->headPulseInverse ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_HEAD_HL_INV)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_HEAD_HL_INV));
+    ENABLE == irTxCfg->headPulse ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_HEAD_EN)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_HEAD_EN));
+    /* Enable or disable logic 1 and 0 pulse inverse */
+    ENABLE == irTxCfg->logic1PulseInverse ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_LOGIC1_HL_INV)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_LOGIC1_HL_INV));
+    ENABLE == irTxCfg->logic0PulseInverse ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_LOGIC0_HL_INV)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_LOGIC0_HL_INV));
+    /* Enable or disable data pulse */
+    ENABLE == irTxCfg->dataPulse ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_DATA_EN)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_DATA_EN));
+    /* Enable or disable output modulation */
+    ENABLE == irTxCfg->outputModulation ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_MOD_EN)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_MOD_EN));
+    /* Enable or disable output inverse */
+    ENABLE == irTxCfg->outputInverse ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_OUT_INV)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_OUT_INV));
+    
+    /* Write back */
+    BL_WR_REG(IR_BASE,IRTX_CONFIG,tmpVal);
+
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(IRTX_IRQn,IRTX_IRQHandler);
+#endif
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  IR tx pulse width configure function
+ *
+ * @param  irTxPulseWidthCfg: IR tx pulse width configuration structure pointer
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type IR_TxPulseWidthConfig(IR_TxPulseWidthCfg_Type *irTxPulseWidthCfg)
+{
+    uint32_t tmpVal;
+    
+    tmpVal = BL_RD_REG(IR_BASE,IRTX_PW);
+    /* Set logic 0 pulse phase 0 width */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_LOGIC0_PH0_W,irTxPulseWidthCfg->logic0PulseWidth_0-1);
+    /* Set logic 0 pulse phase 1 width */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_LOGIC0_PH1_W,irTxPulseWidthCfg->logic0PulseWidth_1-1);
+    /* Set logic 1 pulse phase 0 width */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_LOGIC1_PH0_W,irTxPulseWidthCfg->logic1PulseWidth_0-1);
+    /* Set logic 1 pulse phase 1 width */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_LOGIC1_PH1_W,irTxPulseWidthCfg->logic1PulseWidth_1-1);
+    /* Set head pulse phase 0 width */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_HEAD_PH0_W,irTxPulseWidthCfg->headPulseWidth_0-1);
+    /* Set head pulse phase 1 width */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_HEAD_PH1_W,irTxPulseWidthCfg->headPulseWidth_1-1);
+    /* Set tail pulse phase 0 width */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_TAIL_PH0_W,irTxPulseWidthCfg->tailPulseWidth_0-1);
+    /* Set tail pulse phase 1 width */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_TAIL_PH1_W,irTxPulseWidthCfg->tailPulseWidth_1-1);
+    BL_WR_REG(IR_BASE,IRTX_PW,tmpVal);
+    
+    tmpVal = BL_RD_REG(IR_BASE,IRTX_PULSE_WIDTH);
+    /* Set modulation phase 0 width */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_MOD_PH0_W,irTxPulseWidthCfg->moduWidth_0-1);
+    /* Set modulation phase 1 width */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_MOD_PH1_W,irTxPulseWidthCfg->moduWidth_1-1);
+    /* Set pulse width unit */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_PW_UNIT,irTxPulseWidthCfg->pulseWidthUnit-1);
+    BL_WR_REG(IR_BASE,IRTX_PULSE_WIDTH,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  IR tx software mode pulse width(multiples of pulse width unit) configure function
+ *
+ * @param  irTxSWMPulseWidthCfg: IR tx software mode pulse width configuration structure pointer
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type IR_TxSWMPulseWidthConfig(IR_TxSWMPulseWidthCfg_Type *irTxSWMPulseWidthCfg)
+{
+    /* Set swm pulse width,multiples of pulse width unit */
+    BL_WR_REG(IR_BASE,IRTX_SWM_PW_0,irTxSWMPulseWidthCfg->swmData0);
+    BL_WR_REG(IR_BASE,IRTX_SWM_PW_1,irTxSWMPulseWidthCfg->swmData1);
+    BL_WR_REG(IR_BASE,IRTX_SWM_PW_2,irTxSWMPulseWidthCfg->swmData2);
+    BL_WR_REG(IR_BASE,IRTX_SWM_PW_3,irTxSWMPulseWidthCfg->swmData3);
+    BL_WR_REG(IR_BASE,IRTX_SWM_PW_4,irTxSWMPulseWidthCfg->swmData4);
+    BL_WR_REG(IR_BASE,IRTX_SWM_PW_5,irTxSWMPulseWidthCfg->swmData5);
+    BL_WR_REG(IR_BASE,IRTX_SWM_PW_6,irTxSWMPulseWidthCfg->swmData6);
+    BL_WR_REG(IR_BASE,IRTX_SWM_PW_7,irTxSWMPulseWidthCfg->swmData7);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  IR rx initialization function
+ *
+ * @param  irRxCfg: IR rx configuration structure pointer
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type IR_RxInit(IR_RxCfg_Type *irRxCfg)
+{
+    uint32_t tmpVal;
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_IR_RXMODE_TYPE(irRxCfg->rxMode));
+    
+    /* Disable clock gate */
+    GLB_AHB_Slave1_Clock_Gate(DISABLE,BL_AHB_SLAVE1_IRR);
+    
+    tmpVal = BL_RD_REG(IR_BASE,IRRX_CONFIG);
+    /* Set rx mode */
+    switch(irRxCfg->rxMode)
+    {
+        case IR_RX_NEC:
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_MODE,0x0);
+            break;
+        case IR_RX_RC5:
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_MODE,0x1);
+            break;
+        case IR_RX_SWM:
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_MODE,0x2);
+            break;
+        default:
+            break;
+    }
+    /* Enable or disable input inverse */
+    ENABLE == irRxCfg->inputInverse ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRRX_IN_INV)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRRX_IN_INV));
+    /* Enable or disable rx input de-glitch function */
+    ENABLE == irRxCfg->rxDeglitch ? (tmpVal=BL_SET_REG_BIT(tmpVal,IR_CR_IRRX_DEG_EN)):(tmpVal=BL_CLR_REG_BIT(tmpVal,IR_CR_IRRX_DEG_EN));
+    /* Set de-glitch function cycle count */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_DEG_CNT,irRxCfg->DeglitchCnt);
+    /* Write back */
+    BL_WR_REG(IR_BASE,IRRX_CONFIG,tmpVal);
+    
+    tmpVal = BL_RD_REG(IR_BASE,IRRX_PW_CONFIG);
+    /* Set pulse width threshold to trigger end condition */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_END_TH,irRxCfg->endThreshold-1);
+    /* Set pulse width threshold for logic0/1 detection */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_DATA_TH,irRxCfg->dataThreshold-1);
+    /* Write back */
+    BL_WR_REG(IR_BASE,IRRX_PW_CONFIG,tmpVal);
+
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(IRRX_IRQn,IRRX_IRQHandler);
+#endif
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  IR set default value of all registers function
+ *
+ * @param  None
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type IR_DeInit(void)
+{
+    GLB_AHB_Slave1_Reset(BL_AHB_SLAVE1_IRR);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  IR enable function
+ *
+ * @param  direct: IR direction type
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type IR_Enable(IR_Direction_Type direct)
+{
+    uint32_t tmpVal;
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_IR_DIRECTION_TYPE(direct));
+    
+    if(direct == IR_TX || direct == IR_TXRX){
+        /* Enable ir tx unit */
+        tmpVal = BL_RD_REG(IR_BASE,IRTX_CONFIG);
+        BL_WR_REG(IR_BASE,IRTX_CONFIG,BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_EN));
+    }
+
+    if(direct == IR_RX || direct == IR_TXRX){
+        /* Enable ir rx unit */
+        tmpVal = BL_RD_REG(IR_BASE,IRRX_CONFIG);
+        BL_WR_REG(IR_BASE,IRRX_CONFIG,BL_SET_REG_BIT(tmpVal,IR_CR_IRRX_EN));
+    }
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  IR disable function
+ *
+ * @param  direct: IR direction type
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type IR_Disable(IR_Direction_Type direct)
+{
+    uint32_t tmpVal;
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_IR_DIRECTION_TYPE(direct));
+    
+    if(direct == IR_TX || direct == IR_TXRX){
+        /* Disable ir tx unit */
+        tmpVal = BL_RD_REG(IR_BASE,IRTX_CONFIG);
+        BL_WR_REG(IR_BASE,IRTX_CONFIG,BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_EN));
+    }
+
+    if(direct == IR_RX || direct == IR_TXRX){
+        /* Disable ir rx unit */
+        tmpVal = BL_RD_REG(IR_BASE,IRRX_CONFIG);
+        BL_WR_REG(IR_BASE,IRRX_CONFIG,BL_CLR_REG_BIT(tmpVal,IR_CR_IRRX_EN));
+    }
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  IR tx software mode enable or disable function
+ *
+ * @param  txSWM: Enable or disable
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type IR_TxSWM(BL_Fun_Type txSWM)
+{
+    uint32_t tmpVal;
+    
+    /* Enable or disable tx swm */
+    tmpVal = BL_RD_REG(IR_BASE,IRTX_CONFIG);
+    if(ENABLE == txSWM){
+        BL_WR_REG(IR_BASE,IRTX_CONFIG,BL_SET_REG_BIT(tmpVal,IR_CR_IRTX_SWM_EN));
+    }else{
+        BL_WR_REG(IR_BASE,IRTX_CONFIG,BL_CLR_REG_BIT(tmpVal,IR_CR_IRTX_SWM_EN));
+    }
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  IR clear rx fifo function
+ *
+ * @param  None
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type IR_RxFIFOClear(void)
+{
+    uint32_t tmpVal;
+    
+    /* Clear rx fifo */
+    tmpVal = BL_RD_REG(IR_BASE,IRRX_SWM_FIFO_CONFIG_0);
+    BL_WR_REG(IR_BASE,IRRX_SWM_FIFO_CONFIG_0,BL_SET_REG_BIT(tmpVal,IR_RX_FIFO_CLR));
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  IR send data function
+ *
+ * @param  irWord: IR tx data word 0 or 1
+ * @param  data: data to send
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type IR_SendData(IR_Word_Type irWord,uint32_t data)
+{
+    /* Check the parameters */
+    CHECK_PARAM(IS_IR_WORD_TYPE(irWord));
+    
+    /* Write word 0 or word 1 */
+    if(IR_WORD_0 == irWord){
+        BL_WR_REG(IR_BASE,IRTX_DATA_WORD0,data);
+    }
+    else{
+        BL_WR_REG(IR_BASE,IRTX_DATA_WORD1,data);
+    }
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  IR software mode send pulse width data function
+ *
+ * @param  data: data to send
+ * @param  length: Length of send buffer
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type IR_SWMSendData(uint16_t *data,uint8_t length)
+{
+    uint8_t i = 0,j = 0;
+    uint16_t minData = data[0];
+    uint32_t tmpVal;
+    uint32_t pwVal = 0;
+    uint32_t count = (length+7)/8;
+    
+    /* Search for min value */
+    for(i=1;idata[i] && data[i]!=0){
+            minData = data[i];
+        }
+    }
+    
+    /* Set pulse width unit */
+    tmpVal = BL_RD_REG(IR_BASE,IRTX_PULSE_WIDTH);
+    BL_WR_REG(IR_BASE,IRTX_PULSE_WIDTH,BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_PW_UNIT,minData));
+    
+    /* Set tx SWM pulse width data as multiples of pulse width unit */
+    for(i=0;i0){
+        /* Read data */
+        data[rxLen++] = BL_RD_REG(IR_BASE,IRRX_SWM_FIFO_RDATA)&0xffff;
+    }
+    return rxLen;
+}
+
+/****************************************************************************//**
+ * @brief  IR receive in NEC protocol
+ *
+ * @param  address: Address
+ * @param  command: Command
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type IR_ReceiveNEC(uint8_t* address,uint8_t* command)
+{
+    uint32_t tmpVal = IR_ReceiveData(IR_WORD_0);
+    
+    *address = tmpVal&0xff;
+    *command = (tmpVal>>16)&0xff;
+    
+    if((~(*address)&0xff) != ((tmpVal>>8)&0xff) || (~(*command)&0xff) != ((tmpVal>>24)&0xff)){
+        return ERROR;
+    }
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  IR get rx data bit count function
+ *
+ * @param  None
+ *
+ * @return IR rx data bit count
+ *
+*******************************************************************************/
+uint8_t IR_GetRxDataBitCount(void)
+{
+    uint32_t tmpVal;
+    
+    /* Read rx data bit count */
+    tmpVal = BL_RD_REG(IR_BASE,IRRX_DATA_COUNT);
+    tmpVal = BL_GET_REG_BITS_VAL(tmpVal,IR_STS_IRRX_DATA_CNT);
+    
+    return tmpVal;
+}
+
+/****************************************************************************//**
+ * @brief  IR get rx fifo count function
+ *
+ * @param  None
+ *
+ * @return IR rx fifo available count
+ *
+*******************************************************************************/
+uint8_t IR_GetRxFIFOCount(void)
+{
+    uint32_t tmpVal;
+    
+    /* Read rx fifo count */
+    tmpVal = BL_RD_REG(IR_BASE,IRRX_SWM_FIFO_CONFIG_0);
+    tmpVal = BL_GET_REG_BITS_VAL(tmpVal,IR_RX_FIFO_CNT);
+    
+    return tmpVal;
+}
+
+/****************************************************************************//**
+ * @brief  IR learning to set rx and tx mode function
+ *
+ * @param  data: Buffer to save data
+ * @param  length: Length of data
+ *
+ * @return Protocol type
+ *
+*******************************************************************************/
+IR_RxMode_Type IR_LearnToInit(uint32_t* data,uint8_t* length)
+{
+    uint32_t tmpVal;
+    uint32_t timeoutCnt = IR_RX_INT_TIMEOUT_COUNT;
+    
+    /* Disable clock gate */
+    GLB_AHB_Slave1_Clock_Gate(DISABLE,BL_AHB_SLAVE1_IRR);
+    
+    /* Disable rx,set rx in software mode and enable rx input inverse */
+    tmpVal = BL_RD_REG(IR_BASE,IRRX_CONFIG);
+    tmpVal = BL_CLR_REG_BIT(tmpVal,IR_CR_IRRX_EN);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_MODE,0x2);
+    tmpVal = BL_SET_REG_BIT(tmpVal,IR_CR_IRRX_IN_INV);
+    BL_WR_REG(IR_BASE,IRRX_CONFIG,tmpVal);
+    /* Set pulse width threshold to trigger end condition */
+    tmpVal = BL_RD_REG(IR_BASE,IRRX_PW_CONFIG);
+    BL_WR_REG(IR_BASE,IRRX_PW_CONFIG,BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_END_TH,19999));
+    
+    /* Clear and mask rx interrupt */
+    tmpVal = BL_RD_REG(IR_BASE,IRRX_INT_STS);
+    tmpVal = BL_SET_REG_BIT(tmpVal,IR_CR_IRRX_END_MASK);
+    BL_WR_REG(IR_BASE,IRRX_INT_STS,BL_SET_REG_BIT(tmpVal,IR_CR_IRRX_END_CLR));
+    
+    /* Enable rx */
+    tmpVal = BL_RD_REG(IR_BASE,IRRX_CONFIG);
+    BL_WR_REG(IR_BASE,IRRX_CONFIG,BL_SET_REG_BIT(tmpVal,IR_CR_IRRX_EN));
+    
+    /* Wait for rx interrupt */
+    while(SET != IR_GetIntStatus(IR_INT_RX)){
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            IR_Disable(IR_RX);
+            
+            return TIMEOUT;
+        }
+    }
+    
+    /* Disable rx */
+    tmpVal = BL_RD_REG(IR_BASE,IRRX_CONFIG);
+    BL_WR_REG(IR_BASE,IRRX_CONFIG,BL_CLR_REG_BIT(tmpVal,IR_CR_IRRX_EN));
+    
+    /* Clear rx interrupt */
+    tmpVal = BL_RD_REG(IR_BASE,IRRX_INT_STS);
+    BL_WR_REG(IR_BASE,IRRX_INT_STS,BL_SET_REG_BIT(tmpVal,IR_CR_IRRX_END_CLR));
+    
+    /*Receive data */
+    *length = IR_GetRxFIFOCount();
+    *length = IR_SWMReceiveData((uint16_t*)data,*length);
+    
+    /* Judge protocol type */
+    if(NEC_HEAD_H_MIN<(data[0]&0xffff)&&(data[0]&0xffff)>16)&&(data[0]>>16)>16)&&(data[0]>>16)>16)&&(data[0]>>16)>16) != 0){
+        /* Set tx in software mode */
+        /* Tx configure */
+        BL_WR_REG(IR_BASE,IRTX_CONFIG,*length<<12 | 0xc);
+        /* Set modulation phase width */
+        BL_WR_REG(IR_BASE,IRTX_PULSE_WIDTH,0x22110000);
+        
+        return IR_RX_SWM;
+    }else{
+        tmpVal = BL_RD_REG(IR_BASE,IRRX_CONFIG);
+        tmpVal = BL_GET_REG_BITS_VAL(tmpVal,IR_CR_IRRX_MODE);
+        if(tmpVal == 0){
+            return IR_RX_NEC;
+        }else if(tmpVal == 1){
+            return IR_RX_RC5;
+        }else{
+            return IR_RX_SWM;
+        }
+    }
+}
+
+/****************************************************************************//**
+ * @brief  IR receive data according to mode which is learned function
+ *
+ * @param  mode: Protocol type
+ * @param  data: Buffer to save data
+ *
+ * @return Length of data
+ *
+*******************************************************************************/
+uint8_t IR_LearnToReceive(IR_RxMode_Type mode,uint32_t* data)
+{
+    uint8_t length = 0;
+    uint32_t timeoutCnt = IR_RX_INT_TIMEOUT_COUNT;
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_IR_RXMODE_TYPE(mode));
+    
+    /* Disable ir rx */
+    IR_Disable(IR_RX);
+    
+    /* Clear and mask rx interrupt */
+    IR_ClrIntStatus(IR_INT_RX);
+    IR_IntMask(IR_INT_RX,MASK);
+    
+    /* Enable ir rx */
+    IR_Enable(IR_RX);
+    
+    /* Wait for rx interrupt */
+    while(SET != IR_GetIntStatus(IR_INT_RX)){
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            IR_Disable(IR_RX);
+            
+            return TIMEOUT;
+        }
+    }
+    
+    /* Disable ir rx */
+    IR_Disable(IR_RX);
+    
+    /* Clear rx interrupt */
+    IR_ClrIntStatus(IR_INT_RX);
+    
+    /* Receive data according to mode */
+    if(mode == IR_RX_NEC || mode == IR_RX_RC5){
+        /* Get data bit count */
+        length = IR_GetRxDataBitCount();
+        data[0] = IR_ReceiveData(IR_WORD_0);
+    }else{
+        /* Get fifo count */
+        length = IR_GetRxFIFOCount();
+        length = IR_SWMReceiveData((uint16_t*)data,length);
+    }
+    
+    return length;
+}
+
+
+/****************************************************************************//**
+ * @brief  IR send data according to mode which is learned function
+ *
+ * @param  mode: Protocol type
+ * @param  data: Buffer of data to send
+ * @param  length: Length of data
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type IR_LearnToSend(IR_RxMode_Type mode,uint32_t* data,uint8_t length)
+{
+    uint32_t tmpVal;
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_IR_RXMODE_TYPE(mode));
+    
+    /* Set send length */
+    tmpVal = BL_RD_REG(IR_BASE,IRTX_CONFIG);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,IR_CR_IRTX_DATA_NUM,length-1);
+    BL_WR_REG(IR_BASE,IRTX_CONFIG,tmpVal);
+    
+    if(mode == IR_RX_NEC || mode == IR_RX_RC5){
+        IR_SendCommand(0,data[0]);
+    }else{
+        IR_SWMSendCommand((uint16_t*)data,length);
+    }
+    
+    return SUCCESS;
+}
+
+
+/****************************************************************************//**
+ * @brief  IR init to control led function
+ *
+ * @param  clk: Clock source
+ * @param  div: Clock division(1~64)
+ * @param  unit: Pulse width unit(multiples of clock pulse width, 1~4096)
+ * @param  code0H: code 0 high level time(multiples of pulse width unit, 1~16)
+ * @param  code0L: code 0 low level time(multiples of pulse width unit, 1~16)
+ * @param  code1H: code 1 high level time(multiples of pulse width unit, 1~16)
+ * @param  code1L: code 1 low level time(multiples of pulse width unit, 1~16)
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Sts_Type IR_LEDInit(HBN_XCLK_CLK_Type clk,uint8_t div,uint8_t unit,uint8_t code0H,uint8_t code0L,uint8_t code1H,uint8_t code1L)
+{
+    IR_TxCfg_Type txCfg = {
+        24,                                                  /* 24-bit data */
+        DISABLE,                                             /* Disable signal of tail pulse inverse */
+        DISABLE,                                             /* Disable signal of tail pulse */
+        DISABLE,                                             /* Disable signal of head pulse inverse */
+        DISABLE,                                             /* Disable signal of head pulse */
+        DISABLE,                                             /* Disable signal of logic 1 pulse inverse */
+        DISABLE,                                             /* Disable signal of logic 0 pulse inverse */
+        ENABLE,                                              /* Enable signal of data pulse */
+        DISABLE,                                             /* Disable signal of output modulation */
+        ENABLE                                               /* Enable signal of output inverse */
+    };
+    
+    IR_TxPulseWidthCfg_Type txPWCfg = {
+        code0L,                                              /* Pulse width of logic 0 pulse phase 1 */
+        code0H,                                              /* Pulse width of logic 0 pulse phase 0 */
+        code1L,                                              /* Pulse width of logic 1 pulse phase 1 */
+        code1H,                                              /* Pulse width of logic 1 pulse phase 0 */
+        1,                                                   /* Pulse width of head pulse phase 1 */
+        1,                                                   /* Pulse width of head pulse phase 0 */
+        1,                                                   /* Pulse width of tail pulse phase 1 */
+        1,                                                   /* Pulse width of tail pulse phase 0 */
+        1,                                                   /* Modulation phase 1 width */
+        1,                                                   /* Modulation phase 0 width */
+        unit                                                 /* Pulse width unit */
+    };
+    
+    HBN_Set_XCLK_CLK_Sel(clk);
+    GLB_Set_IR_CLK(ENABLE,GLB_IR_CLK_SRC_XCLK,div-1);
+    
+    /* Disable ir before config */
+    IR_Disable(IR_TXRX);
+
+    /* IR tx init */
+    IR_TxInit(&txCfg);
+    IR_TxPulseWidthConfig(&txPWCfg);
+    
+    return SUCCESS;
+}
+
+
+/****************************************************************************//**
+ * @brief  IR send 24-bit data to control led function
+ *
+ * @param  data: Data to send(24-bit)
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Sts_Type IR_LEDSend(uint32_t data)
+{
+    /* Change MSB_first to LSB_first */
+    data = ((data>>1)&0x55555555)|((data<<1)&0xaaaaaaaa);
+    data = ((data>>2)&0x33333333)|((data<<2)&0xcccccccc);
+    data = ((data>>4)&0x0f0f0f0f)|((data<<4)&0xf0f0f0f0);
+    data = ((data>>16)&0xff)|(data&0xff00)|((data<<16)&0xff0000);
+    IR_SendCommand(0,data);
+    
+    return SUCCESS;
+}
+
+
+/*@} end of group IR_Public_Functions */
+
+/*@} end of group IR */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_kys.c b/drivers/bl702_driver/std_drv/src/bl702_kys.c
new file mode 100644
index 00000000..28c9e9b8
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_kys.c
@@ -0,0 +1,276 @@
+/**
+  ******************************************************************************
+  * @file    bl702_kys.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_kys.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  KYS
+ *  @{
+ */
+
+/** @defgroup  KYS_Private_Macros
+ *  @{
+ */
+
+/*@} end of group KYS_Private_Macros */
+
+/** @defgroup  KYS_Private_Types
+ *  @{
+ */
+
+/*@} end of group KYS_Private_Types */
+
+/** @defgroup  KYS_Private_Variables
+ *  @{
+ */
+static intCallback_Type * KYSIntCbfArra[1]= {NULL};
+
+
+/*@} end of group KYS_Private_Variables */
+
+/** @defgroup  KYS_Global_Variables
+ *  @{
+ */
+
+/*@} end of group KYS_Global_Variables */
+
+/** @defgroup  KYS_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group KYS_Private_Fun_Declaration */
+
+/** @defgroup  KYS_Private_Functions
+ *  @{
+ */
+
+/*@} end of group KYS_Private_Functions */
+
+/** @defgroup  KYS_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  KYS interrupt handler
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void KYS_IRQHandler(void)
+{
+    if(KYSIntCbfArra[0] != NULL){
+        KYSIntCbfArra[0]();
+    }
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  KYS initialization function
+ *
+ * @param  kysCfg: KYS configuration structure pointer
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type KYS_Init(KYS_CFG_Type *kysCfg)
+{
+    uint32_t tmpVal;
+    
+    tmpVal = BL_RD_REG(KYS_BASE,KYS_KS_CTRL);
+    /* Set col and row */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,KYS_COL_NUM,kysCfg->col-1);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,KYS_ROW_NUM,kysCfg->row-1);
+    
+    /* Set idle duration between column scans */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,KYS_RC_EXT,kysCfg->idleDuration);
+    
+    /* Enable or disable ghost key event detection */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,KYS_GHOST_EN,kysCfg->ghostEn);
+    
+    /* Enable or disable deglitch function */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,KYS_DEG_EN,kysCfg->deglitchEn);
+    
+    /* Set deglitch count */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,KYS_DEG_CNT,kysCfg->deglitchCnt);
+    
+    /* Write back */
+    BL_WR_REG(KYS_BASE,KYS_KS_CTRL,tmpVal);
+
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(KYS_IRQn,KYS_IRQHandler);
+#endif
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Enable KYS
+ *
+ * @param  None
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type KYS_Enable(void)
+{
+    uint32_t tmpVal;
+
+    tmpVal = BL_RD_REG(KYS_BASE,KYS_KS_CTRL);
+    BL_WR_REG(KYS_BASE,KYS_KS_CTRL,BL_SET_REG_BIT(tmpVal,KYS_KS_EN));
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Disable KYS
+ *
+ * @param  None
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type KYS_Disable(void)
+{
+    uint32_t tmpVal;
+
+    tmpVal = BL_RD_REG(KYS_BASE,KYS_KS_CTRL);
+    BL_WR_REG(KYS_BASE,KYS_KS_CTRL,BL_CLR_REG_BIT(tmpVal,KYS_KS_EN));
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  KYS mask or unmask interrupt
+ *
+ * @param  intMask: KYS interrupt mask value( MASK:disbale interrupt,UNMASK:enable interrupt )
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type KYS_IntMask(BL_Mask_Type intMask)
+{
+    if(MASK == intMask){
+        BL_WR_REG(KYS_BASE,KYS_KS_INT_EN,0);
+    }else{
+        BL_WR_REG(KYS_BASE,KYS_KS_INT_EN,1);
+    }
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  KYS clear interrupt
+ *
+ * @param  None
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type KYS_IntClear(void)
+{
+    BL_WR_REG(KYS_BASE,KYS_KEYCODE_CLR,0xf);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Install KYS interrupt callback function
+ *
+ * @param  cbFun: Pointer to interrupt callback function. The type should be void (*fn)(void)
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type KYS_Int_Callback_Install(intCallback_Type *cbFun)
+{
+    KYSIntCbfArra[0] = cbFun;
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  KYS get interrupt status
+ *
+ * @param  None
+ *
+ * @return Status of interrupt
+ *
+*******************************************************************************/
+uint8_t KYS_GetIntStatus(void)
+{
+    return BL_RD_REG(KYS_BASE,KYS_KS_INT_STS)&0xf;
+}
+
+/****************************************************************************//**
+ * @brief  KYS get keycode value
+ *
+ * @param  keycode: KYS keycode type
+ * @param  col: Col of key
+ * @param  row: Row of key
+ *
+ * @return Keycode value
+ *
+*******************************************************************************/
+uint8_t KYS_GetKeycode(KYS_Keycode_Type keycode,uint8_t *col,uint8_t *row)
+{
+    uint32_t tmpVal;
+    uint8_t keyValue;
+    
+    /* Get keycode value */
+    keyValue = BL_RD_REG(KYS_BASE,KYS_KEYCODE_VALUE)>>(8*keycode)&0xff;
+    
+    /* Get total row number of keyboard */
+    tmpVal = BL_RD_REG(KYS_BASE,KYS_KS_CTRL);
+    tmpVal = BL_GET_REG_BITS_VAL(tmpVal,KYS_ROW_NUM);
+    
+    /* Calculate col and row of the key */
+    *col = keyValue/(tmpVal+1);
+    *row = keyValue%(tmpVal+1);
+    
+    return keyValue;
+}
+
+
+/*@} end of group KYS_Public_Functions */
+
+/*@} end of group KYS */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_l1c.c b/drivers/bl702_driver/std_drv/src/bl702_l1c.c
new file mode 100644
index 00000000..65aea97f
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_l1c.c
@@ -0,0 +1,627 @@
+/**
+  ******************************************************************************
+  * @file    bl702_l1c.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_l1c.h"
+#include "bl702_common.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  L1C
+ *  @{
+ */
+
+/** @defgroup  L1C_Private_Macros
+ *  @{
+ */
+
+/*@} end of group L1C_Private_Macros */
+
+/** @defgroup  L1C_Private_Types
+ *  @{
+ */
+
+/*@} end of group L1C_Private_Types */
+
+/** @defgroup  L1C_Private_Variables
+ *  @{
+ */
+static intCallback_Type * l1cBmxErrIntCbfArra[L1C_BMX_ERR_INT_ALL]={NULL};
+static intCallback_Type * l1cBmxToIntCbfArra[L1C_BMX_TO_INT_ALL]={NULL};
+
+
+/*@} end of group L1C_Private_Variables */
+
+/** @defgroup  L1C_Global_Variables
+ *  @{
+ */
+
+/*@} end of group L1C_Global_Variables */
+
+/** @defgroup  L1C_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group L1C_Private_Fun_Declaration */
+
+/** @defgroup  L1C_Private_Functions
+ *  @{
+ */
+
+/*@} end of group L1C_Private_Functions */
+
+/** @defgroup  L1C_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Enable cache
+ *
+ * @param  wayDisable: cache way disable config
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION L1C_Cache_Enable_Set(uint8_t wayDisable)
+{
+    L1C_Cache_Flush(wayDisable);
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  L1C cache write set
+ *
+ * @param  wtEn: L1C write through enable
+ * @param  wbEn: L1C write back enable
+ * @param  waEn: L1C write allocate enable
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION L1C_Cache_Write_Set(BL_Fun_Type wtEn, BL_Fun_Type wbEn, BL_Fun_Type waEn)
+{
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(L1C_BASE,L1C_CONFIG);
+    if(wtEn){
+        tmpVal=BL_SET_REG_BIT(tmpVal,L1C_WT_EN);
+    }else{
+        tmpVal=BL_CLR_REG_BIT(tmpVal,L1C_WT_EN);
+    }
+    if(wbEn){
+        tmpVal=BL_SET_REG_BIT(tmpVal,L1C_WB_EN);
+    }else{
+        tmpVal=BL_CLR_REG_BIT(tmpVal,L1C_WB_EN);
+    }
+    if(waEn){
+        tmpVal=BL_SET_REG_BIT(tmpVal,L1C_WA_EN);
+    }else{
+        tmpVal=BL_CLR_REG_BIT(tmpVal,L1C_WA_EN);
+    }
+    BL_WR_REG(L1C_BASE,L1C_CONFIG,tmpVal);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Flush cache
+ *
+ * @param  wayDisable: cache way disable config
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION L1C_Cache_Flush(uint8_t wayDisable)
+{
+    uint32_t tmpVal;
+    uint32_t cnt=0;
+    uint8_t finWayDisable=0;
+
+
+    tmpVal=BL_RD_REG(L1C_BASE,L1C_CONFIG);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,L1C_CACHEABLE);
+    tmpVal=BL_SET_REG_BIT(tmpVal,L1C_BYPASS);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,L1C_WAY_DIS);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,L1C_CNT_EN);
+    finWayDisable=BL_GET_REG_BITS_VAL(tmpVal,L1C_WAY_DIS);
+    BL_WR_REG(L1C_BASE,L1C_CONFIG,tmpVal);
+
+    /*Set Tag RAM to zero */
+    tmpVal=BL_CLR_REG_BIT(tmpVal,L1C_INVALID_EN);
+    BL_WR_REG(L1C_BASE,L1C_CONFIG,tmpVal);
+    /* Left space for hardware change status*/
+    __NOP();
+    __NOP();
+    __NOP();
+    __NOP();
+    tmpVal=BL_SET_REG_BIT(tmpVal,L1C_INVALID_EN);
+    BL_WR_REG(L1C_BASE,L1C_CONFIG,tmpVal);
+    /* Left space for hardware change status*/
+    __NOP();
+    __NOP();
+    __NOP();
+    __NOP();
+    /* Polling for invalid done */
+    do{
+        BL702_Delay_US(1);
+        cnt++;
+        tmpVal=BL_RD_REG(L1C_BASE,L1C_CONFIG);
+    }while(!BL_IS_REG_BIT_SET(tmpVal,L1C_INVALID_DONE)&&cnt<100);
+
+    /* data flush */
+    tmpVal=BL_CLR_REG_BIT(tmpVal,L1C_FLUSH_EN);
+    BL_WR_REG(L1C_BASE,L1C_CONFIG,tmpVal);
+    /* Left space for hardware change status*/
+    __NOP();
+    __NOP();
+    __NOP();
+    __NOP();
+    tmpVal=BL_SET_REG_BIT(tmpVal,L1C_FLUSH_EN);
+    BL_WR_REG(L1C_BASE,L1C_CONFIG,tmpVal);
+    /* Left space for hardware change status*/
+    __NOP();
+    __NOP();
+    __NOP();
+    __NOP();
+    /* Polling for flush done */
+    do{
+        BL702_Delay_US(1);
+        cnt++;
+        tmpVal=BL_RD_REG(L1C_BASE,L1C_CONFIG);
+    }while(!BL_IS_REG_BIT_SET(tmpVal,L1C_FLUSH_DONE)&&cnt<100);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,L1C_FLUSH_EN);
+    BL_WR_REG(L1C_BASE,L1C_CONFIG,tmpVal);
+
+    tmpVal=BL_SET_REG_BIT(tmpVal,L1C_BYPASS);
+    BL_WR_REG(L1C_BASE,L1C_CONFIG,tmpVal);
+
+    tmpVal=BL_CLR_REG_BIT(tmpVal,L1C_BYPASS);
+    tmpVal=BL_SET_REG_BIT(tmpVal,L1C_CNT_EN);
+    BL_WR_REG(L1C_BASE,L1C_CONFIG,tmpVal);
+
+    if(wayDisable!=0xff){
+        finWayDisable=wayDisable;
+    }
+
+    tmpVal=BL_RD_REG(L1C_BASE,L1C_CONFIG);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,L1C_WAY_DIS);
+    BL_WR_REG(L1C_BASE,L1C_CONFIG,tmpVal);
+
+    tmpVal|=(finWayDisable<120MHz
+ *
+ * @param  enable: ENABLE or DISABLE
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION L1C_IROM_2T_Access_Set(uint8_t enable)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal=BL_RD_REG(L1C_BASE,L1C_CONFIG);
+    if(enable){
+        tmpVal=BL_SET_REG_BIT(tmpVal,L1C_IROM_2T_ACCESS);
+    }else{
+        tmpVal=BL_CLR_REG_BIT(tmpVal,L1C_IROM_2T_ACCESS);
+    }
+    BL_WR_REG(L1C_BASE,L1C_CONFIG,tmpVal);
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  L1C BMX init
+ *
+ * @param  l1cBmxCfg: L1C BMX config
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type L1C_BMX_Init(L1C_BMX_Cfg_Type *l1cBmxCfg)
+{
+    uint32_t tmpVal = 0;
+
+    CHECK_PARAM((l1cBmxCfg->timeoutEn)<=0xF);
+
+    tmpVal=BL_RD_REG(L1C_BASE,L1C_CONFIG);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,L1C_BMX_TIMEOUT_EN,l1cBmxCfg->timeoutEn);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,L1C_BMX_ERR_EN,l1cBmxCfg->errEn);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,L1C_BMX_ARB_MODE,l1cBmxCfg->arbMod);
+    BL_WR_REG(L1C_BASE,L1C_CONFIG,tmpVal);
+    
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(L1C_BMX_ERR_IRQn,L1C_BMX_ERR_IRQHandler);
+    Interrupt_Handler_Register(L1C_BMX_TO_IRQn,L1C_BMX_TO_IRQHandler);
+#endif
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  L1C BMX address monitor enable
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type L1C_BMX_Addr_Monitor_Enable(void)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal=BL_RD_REG(L1C_BASE,L1C_BMX_ERR_ADDR_EN);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,L1C_BMX_ERR_ADDR_DIS);
+    BL_WR_REG(L1C_BASE,L1C_BMX_ERR_ADDR_EN,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  L1C BMX address monitor disable
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type L1C_BMX_Addr_Monitor_Disable(void)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal=BL_RD_REG(L1C_BASE,L1C_BMX_ERR_ADDR_EN);
+    tmpVal=BL_SET_REG_BIT(tmpVal,L1C_BMX_ERR_ADDR_DIS);
+    BL_WR_REG(L1C_BASE,L1C_BMX_ERR_ADDR_EN,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  L1C BMX bus error response enable
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type L1C_BMX_BusErrResponse_Enable(void)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal=BL_RD_REG(L1C_BASE,L1C_CONFIG);
+    tmpVal=BL_SET_REG_BIT(tmpVal,L1C_BMX_ERR_EN);
+    BL_WR_REG(L1C_BASE,L1C_CONFIG,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  L1C BMX bus error response disable
+ *
+ * @param  None
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type L1C_BMX_BusErrResponse_Disable(void)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal=BL_RD_REG(L1C_BASE,L1C_CONFIG);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,L1C_BMX_ERR_EN);
+    BL_WR_REG(L1C_BASE,L1C_CONFIG,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Get L1C BMX error status
+ *
+ * @param  errType: L1C BMX error status type
+ *
+ * @return SET or RESET
+ *
+*******************************************************************************/
+BL_Sts_Type L1C_BMX_Get_Status(L1C_BMX_BUS_ERR_Type errType)
+{
+    uint32_t tmpVal = 0;
+
+    CHECK_PARAM(IS_L1C_BMX_BUS_ERR_TYPE(errType));
+
+    tmpVal=BL_RD_REG(L1C_BASE,L1C_BMX_ERR_ADDR_EN);
+    if(errType==L1C_BMX_BUS_ERR_TRUSTZONE_DECODE){
+        return BL_GET_REG_BITS_VAL(tmpVal,L1C_BMX_ERR_TZ)?SET:RESET;
+    }else{
+        return BL_GET_REG_BITS_VAL(tmpVal,L1C_BMX_ERR_DEC)?SET:RESET;
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Get L1C BMX error address
+ *
+ * @param  None
+ *
+ * @return NP L1C BMX error address
+ *
+*******************************************************************************/
+uint32_t L1C_BMX_Get_Err_Addr(void)
+{
+    return BL_RD_REG(L1C_BASE,L1C_BMX_ERR_ADDR);
+}
+
+/****************************************************************************//**
+ * @brief  L1C BMX error interrupt callback install
+ *
+ * @param  intType: L1C BMX error interrupt type
+ * @param  cbFun: callback
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type L1C_BMX_ERR_INT_Callback_Install(L1C_BMX_ERR_INT_Type intType,intCallback_Type* cbFun)
+{
+    CHECK_PARAM(IS_L1C_BMX_ERR_INT_TYPE(intType));
+
+    l1cBmxErrIntCbfArra[intType] = cbFun;
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  L1C BMX ERR interrupt IRQ handler
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void L1C_BMX_ERR_IRQHandler(void)
+{
+    L1C_BMX_ERR_INT_Type intType;
+
+    for(intType=L1C_BMX_ERR_INT_ERR;intType
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702.h"
+#include "bl702_mjpeg.h"
+#include "bl702_glb.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  MJPEG
+ *  @{
+ */
+
+/** @defgroup  MJPEG_Private_Macros
+ *  @{
+ */
+
+/*@} end of group MJPEG_Private_Macros */
+
+/** @defgroup  MJPEG_Private_Types
+ *  @{
+ */
+
+/*@} end of group MJPEG_Private_Types */
+
+/** @defgroup  MJPEG_Private_Variables
+ *  @{
+ */
+static intCallback_Type * mjpegIntCbfArra[MJPEG_INT_ALL] = {NULL};
+
+
+/*@} end of group MJPEG_Private_Variables */
+
+/** @defgroup  MJPEG_Global_Variables
+ *  @{
+ */
+
+/*@} end of group MJPEG_Global_Variables */
+
+/** @defgroup  MJPEG_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group MJPEG_Private_Fun_Declaration */
+
+/** @defgroup  MJPEG_Private_Functions
+ *  @{
+ */
+
+/*@} end of group MJPEG_Private_Functions */
+
+/** @defgroup  MJPEG_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Mjpeg module init
+ *
+ * @param  cfg: Mjpeg configuration structure pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void MJPEG_Init(MJPEG_CFG_Type *cfg)
+{
+    uint32_t tmpVal;
+
+    /* Disable clock gate */
+    GLB_AHB_Slave1_Clock_Gate(DISABLE,BL_AHB_SLAVE1_MJPEG);
+
+    /* disable mjpeg */
+    tmpVal = BL_RD_REG(MJPEG_BASE, MJPEG_CONTROL_1);
+    tmpVal = BL_CLR_REG_BIT(tmpVal, MJPEG_REG_MJPEG_ENABLE);
+    BL_WR_REG(MJPEG_BASE, MJPEG_CONTROL_1, tmpVal);
+
+    /* basic stuff */
+    tmpVal = BL_RD_REG(MJPEG_BASE, MJPEG_CONTROL_1);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, MJPEG_REG_YUV_MODE, cfg->yuv);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, MJPEG_REG_Q_MODE, cfg->quality);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, MJPEG_REG_H_BUST, cfg->burst);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, MJPEG_REG_MJPEG_BIT_ORDER, cfg->bitOrderEnable);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, MJPEG_REG_ORDER_U_EVEN, cfg->evenOrderEnable);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, MJPEG_REG_WR_OVER_STOP, cfg->overStopEnable);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, MJPEG_REG_REFLECT_DMY, cfg->reflectDmy);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, MJPEG_REG_LAST_HF_HBLK_DMY, cfg->verticalDmy);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, MJPEG_REG_LAST_HF_WBLK_DMY, cfg->horizationalDmy);
+    BL_WR_REG(MJPEG_BASE, MJPEG_CONTROL_1, tmpVal);
+
+    tmpVal = BL_RD_REG(MJPEG_BASE, MJPEG_CONTROL_2);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,MJPEG_REG_MJPEG_WAIT_CYCLE,cfg->waitCount);
+    BL_WR_REG(MJPEG_BASE, MJPEG_CONTROL_2,tmpVal);
+    
+    tmpVal = BL_RD_REG(MJPEG_BASE,MJPEG_FRAME_SIZE);
+    switch(cfg->yuv)
+    {
+        case MJPEG_YUV422_INTERLEAVE:
+        case MJPEG_YUV422_PLANAR:
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal, MJPEG_REG_FRAME_WBLK, (cfg->resolutionX+15)>>4);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal, MJPEG_REG_FRAME_HBLK, (cfg->resolutionY+7)>>3);
+            break;
+        case MJPEG_YUV420:
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal, MJPEG_REG_FRAME_WBLK, (cfg->resolutionX+15)>>4);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal, MJPEG_REG_FRAME_HBLK, (cfg->resolutionY+15)>>4);
+            break;
+        case MJPEG_YUV400:
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal, MJPEG_REG_FRAME_WBLK, (cfg->resolutionX+7)>>3);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal, MJPEG_REG_FRAME_HBLK, (cfg->resolutionY+7)>>3);
+            break;
+        default:
+            break;
+    }
+    BL_WR_REG(MJPEG_BASE,MJPEG_FRAME_SIZE,tmpVal);
+    
+    tmpVal = BL_RD_REG(MJPEG_BASE, MJPEG_SWAP_MODE);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,MJPEG_REG_W_SWAP_MODE,cfg->swapModeEnable);
+    BL_WR_REG(MJPEG_BASE, MJPEG_SWAP_MODE,tmpVal);
+
+    /*align buffer to 16 bytes boundary, should be kept the same as CAM module*/
+    BL_WR_REG(MJPEG_BASE, MJPEG_YY_FRAME_ADDR, (cfg->bufferCamYY & 0xFFFFFFF0));
+    BL_WR_REG(MJPEG_BASE, MJPEG_UV_FRAME_ADDR, (cfg->bufferCamUV & 0xFFFFFFF0));
+    BL_WR_REG(MJPEG_BASE, MJPEG_YUV_MEM, (cfg->sizeCamUV<<16)+cfg->sizeCamYY);
+
+    /*align buffer to 16 bytes boundary*/
+    BL_WR_REG(MJPEG_BASE, MJPEG_JPEG_FRAME_ADDR, (cfg->bufferMjpeg & 0xFFFFFFF0));
+    /*align buffer size in unit of 64 bytes */
+    BL_WR_REG(MJPEG_BASE, MJPEG_JPEG_STORE_MEMORY, cfg->sizeMjpeg >> 6);
+
+    /* Clear interrupt */
+    BL_WR_REG(MJPEG_BASE, MJPEG_FRAME_FIFO_POP,0x3F00);
+
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(MJPEG_IRQn,MJPEG_IRQHandler);
+#endif
+}
+
+/****************************************************************************//**
+ * @brief  Mjpeg packet mode configure
+ *
+ * @param  cfg: Packet configuration
+ *
+ * @return None
+ *
+*******************************************************************************/
+void MJPEG_Packet_Config(MJPEG_Packet_Type *cfg)
+{
+    uint32_t tmpVal;
+    
+    tmpVal = BL_RD_REG(MJPEG_BASE,MJPEG_PAKET_CTRL);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,MJPEG_REG_PKET_EN,cfg->packetEnable);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,MJPEG_REG_JEND_TO_PEND,cfg->endToTail);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,MJPEG_REG_PKET_BODY_BYTE,cfg->packetBody);
+    BL_WR_REG(MJPEG_BASE,MJPEG_PAKET_CTRL,tmpVal);
+    
+    tmpVal = BL_RD_REG(MJPEG_BASE,MJPEG_HEADER_BYTE);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,MJPEG_REG_HEAD_BYTE,cfg->frameHead);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,MJPEG_REG_TAIL_EXP,cfg->frameTail);
+    BL_WR_REG(MJPEG_BASE,MJPEG_HEADER_BYTE,tmpVal);
+    
+    BL_WR_REG(MJPEG_BASE,MJPEG_PAKET_HEAD_TAIL,(cfg->packetTail<<16)+cfg->packetHead);
+}
+
+/****************************************************************************//**
+ * @brief  Mjpeg set YUYV order, only work in interleave mode
+ *
+ * @param  y0: Y0 order
+ * @param  u0: U0 order
+ * @param  y1: Y1 order
+ * @param  v0: V0 order
+ *
+ * @return None
+ *
+*******************************************************************************/
+void MJPEG_Set_YUYV_Order_Interleave(uint8_t y0,uint8_t u0,uint8_t y1,uint8_t v0)
+{
+    uint32_t tmpVal;
+    
+    tmpVal = BL_RD_REG(MJPEG_BASE, MJPEG_CONTROL_1);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, MJPEG_REG_Y0_ORDER, y0);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, MJPEG_REG_U0_ORDER, u0);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, MJPEG_REG_Y1_ORDER, y1);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, MJPEG_REG_V0_ORDER, v0);
+    BL_WR_REG(MJPEG_BASE, MJPEG_CONTROL_1, tmpVal);
+    
+    MJPEG_Set_YUYV_Order_Planar(0,1);
+}
+
+/****************************************************************************//**
+ * @brief  Mjpeg set YY/UV order, only work in planar mode
+ *
+ * @param  yy: YY order
+ * @param  uv: UV order
+ *
+ * @return None
+ *
+*******************************************************************************/
+void MJPEG_Set_YUYV_Order_Planar(uint8_t yy,uint8_t uv)
+{
+    uint32_t tmpVal;
+    
+    tmpVal = BL_RD_REG(MJPEG_BASE,MJPEG_CONTROL_2);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,MJPEG_REG_YY_DVP2AHB_LSEL,yy);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,MJPEG_REG_YY_DVP2AHB_FSEL,yy);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,MJPEG_REG_UV_DVP2AHB_LSEL,uv);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,MJPEG_REG_UV_DVP2AHB_FSEL,uv);
+    BL_WR_REG(MJPEG_BASE,MJPEG_CONTROL_2,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Deinit mjpeg module
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void MJPEG_Deinit(void)
+{
+    //GLB_AHB_Slave2_Reset(BL_AHB_SLAVE2_MJPEG);
+}
+
+/****************************************************************************//**
+ * @brief  Enable mjpeg module
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void MJPEG_Enable(void)
+{
+    uint32_t tmpVal;
+
+    /* Enable mjpeg module */
+    tmpVal = BL_RD_REG(MJPEG_BASE, MJPEG_CONTROL_1);
+    tmpVal = BL_SET_REG_BIT(tmpVal, MJPEG_REG_MJPEG_ENABLE);
+    BL_WR_REG(MJPEG_BASE, MJPEG_CONTROL_1, tmpVal);   
+}
+
+/****************************************************************************//**
+ * @brief  Disable mjpeg module
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void MJPEG_Disable(void)
+{
+    uint32_t tmpVal;
+
+    /* Disable mjpeg module */
+    tmpVal = BL_RD_REG(MJPEG_BASE, MJPEG_CONTROL_1);
+    tmpVal = BL_CLR_REG_BIT(tmpVal, MJPEG_REG_MJPEG_ENABLE);
+    BL_WR_REG(MJPEG_BASE, MJPEG_CONTROL_1, tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Enable&disable mjpeg software mode and set frame count
+ *
+ * @param  count: Frame count
+ *
+ * @return None
+ *
+*******************************************************************************/
+void MJPEG_SW_Enable(uint8_t count)
+{
+    uint32_t tmpVal;
+    
+    tmpVal = BL_RD_REG(MJPEG_BASE,MJPEG_CONTROL_2);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,MJPEG_REG_SW_FRAME,count);
+    tmpVal = BL_SET_REG_BIT(tmpVal,MJPEG_REG_MJPEG_SW_MODE);
+    BL_WR_REG(MJPEG_BASE,MJPEG_CONTROL_2,tmpVal);
+    tmpVal = BL_CLR_REG_BIT(tmpVal,MJPEG_REG_MJPEG_SW_MODE);
+    BL_WR_REG(MJPEG_BASE,MJPEG_CONTROL_2,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  MJPEG software mode run, software mode enable first
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void MJPEG_SW_Run(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal = BL_RD_REG(MJPEG_BASE,MJPEG_CONTROL_2);
+    tmpVal = BL_SET_REG_BIT(tmpVal,MJPEG_REG_MJPEG_SW_RUN);
+    BL_WR_REG(MJPEG_BASE,MJPEG_CONTROL_2,tmpVal);
+    tmpVal = BL_CLR_REG_BIT(tmpVal,MJPEG_REG_MJPEG_SW_RUN);
+    BL_WR_REG(MJPEG_BASE,MJPEG_CONTROL_2,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Get one mjpeg frame
+ *
+ * @param  info: Mjpeg frame infomation pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void MJPEG_Get_Frame_Info(MJPEG_Frame_Info *info)
+{
+    uint32_t tmpVal;
+
+    tmpVal = BL_RD_REG(MJPEG_BASE, MJPEG_CONTROL_3);
+
+    info->validFrames = BL_GET_REG_BITS_VAL(tmpVal, MJPEG_FRAME_VALID_CNT);
+    info->curFrameAddr = BL_RD_REG(MJPEG_BASE, MJPEG_START_ADDR0);
+    info->curFrameBytes = (BL_RD_REG(MJPEG_BASE, MJPEG_BIT_CNT0)+7)>>3;
+    info->curFrameQ = BL_RD_REG(MJPEG_BASE, MJPEG_Q_MODE0)&0x3f;
+    info->status = tmpVal;
+}
+
+/****************************************************************************//**
+ * @brief  Get available count of frames
+ *
+ * @param  None
+ *
+ * @return Frames count
+ *
+*******************************************************************************/
+uint8_t MJPEG_Get_Frame_Count(void)
+{
+    return BL_GET_REG_BITS_VAL(BL_RD_REG(MJPEG_BASE, MJPEG_CONTROL_3), MJPEG_FRAME_VALID_CNT);
+}
+
+/****************************************************************************//**
+ * @brief  Pop one mjpeg frame
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void MJPEG_Pop_Frame(void)
+{
+    BL_WR_REG(MJPEG_BASE, MJPEG_FRAME_FIFO_POP,1);
+}
+
+/****************************************************************************//**
+ * @brief  Free current read memory block
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void MJPEG_Current_Block_Clear(void)
+{
+    BL_WR_REG(MJPEG_BASE, MJPEG_FRAME_FIFO_POP,0x2);
+}
+
+/****************************************************************************//**
+ * @brief  Current read memory block index
+ *
+ * @param  None
+ *
+ * @return Block number
+ *
+*******************************************************************************/
+MJPEG_Swap_Block_Type MJPEG_Get_Current_Block(void)
+{
+    return BL_GET_REG_BITS_VAL(BL_RD_REG(MJPEG_BASE,MJPEG_SWAP_MODE),MJPEG_STS_READ_SWAP_IDX);
+}
+
+/****************************************************************************//**
+ * @brief  Get block status, full or not full
+ *
+ * @param  block: Block number
+ *
+ * @return Block status
+ *
+*******************************************************************************/
+BL_Sts_Type MJPEG_Block_Is_Full(MJPEG_Swap_Block_Type block)
+{
+    CHECK_PARAM(IS_MJPEG_SWAP_BLOCK_TYPE(block));
+    
+    if(MJPEG_BLOCK_0 == block){
+        return BL_GET_REG_BITS_VAL(BL_RD_REG(MJPEG_BASE,MJPEG_SWAP_MODE),MJPEG_STS_SWAP0_FULL);
+    }else{
+        return BL_GET_REG_BITS_VAL(BL_RD_REG(MJPEG_BASE,MJPEG_SWAP_MODE),MJPEG_STS_SWAP1_FULL);
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Current read memory block is frame start
+ *
+ * @param  None
+ *
+ * @return Set or reset
+ *
+*******************************************************************************/
+BL_Sts_Type MJPEG_Current_Block_Is_Start(void)
+{
+    return BL_GET_REG_BITS_VAL(BL_RD_REG(MJPEG_BASE,MJPEG_SWAP_MODE),MJPEG_STS_SWAP_FSTART);
+}
+
+/****************************************************************************//**
+ * @brief  Current read memory block is frame end
+ *
+ * @param  None
+ *
+ * @return Set or reset
+ *
+*******************************************************************************/
+BL_Sts_Type MJPEG_Current_Block_Is_End(void)
+{
+    return BL_GET_REG_BITS_VAL(BL_RD_REG(MJPEG_BASE,MJPEG_SWAP_MODE),MJPEG_STS_SWAP_FEND);
+}
+
+/****************************************************************************//**
+ * @brief  Get frame remain bit count in last block, only valid when current read memory block is
+ *         frame end
+ *
+ * @param  None
+ *
+ * @return Bit count
+ *
+*******************************************************************************/
+uint32_t MJPEG_Get_Remain_Bit(void)
+{
+    return BL_RD_REG(MJPEG_BASE,MJPEG_SWAP_BIT_CNT);
+}
+
+/****************************************************************************//**
+ * @brief  Set frame threshold to issue normal interrupt
+ *
+ * @param  count: Frame threshold
+ *
+ * @return None
+ *
+*******************************************************************************/
+void MJPEG_Set_Frame_Threshold(uint8_t count)
+{
+    uint32_t tmpVal;
+    
+    tmpVal = BL_RD_REG(MJPEG_BASE,MJPEG_CONTROL_3);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,MJPEG_REG_FRAME_CNT_TRGR_INT,count);
+    BL_WR_REG(MJPEG_BASE,MJPEG_CONTROL_3,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  MJPEG Enable Disable Interrupt
+ *
+ * @param  intType: MJPEG Interrupt Type
+ * @param  intMask: Enable or Disable
+ *
+ * @return None
+ *
+*******************************************************************************/
+void MJPEG_IntMask(MJPEG_INT_Type intType, BL_Mask_Type intMask)
+{
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_MJPEG_INT_TYPE(intType));
+    CHECK_PARAM(IS_BL_MASK_TYPE(intMask));
+
+    tmpVal = BL_RD_REG(MJPEG_BASE,MJPEG_CONTROL_3);
+    switch(intType)
+    {
+        case MJPEG_INT_NORMAL:
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal = BL_SET_REG_BIT(tmpVal,MJPEG_REG_INT_NORMAL_EN);
+            }else{
+                /* Disable this interrupt */
+                tmpVal = BL_CLR_REG_BIT(tmpVal,MJPEG_REG_INT_NORMAL_EN);
+            }
+            break;
+
+        case MJPEG_INT_CAM_OVERWRITE:
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal = BL_SET_REG_BIT(tmpVal,MJPEG_REG_INT_CAM_EN);
+            }else{
+                /* Disable this interrupt */
+                tmpVal = BL_CLR_REG_BIT(tmpVal,MJPEG_REG_INT_CAM_EN);
+            }
+            break;
+
+        case MJPEG_INT_MEM_OVERWRITE:
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal = BL_SET_REG_BIT(tmpVal,MJPEG_REG_INT_MEM_EN);
+            }else{
+                /* Disable this interrupt */
+                tmpVal = BL_CLR_REG_BIT(tmpVal,MJPEG_REG_INT_MEM_EN);
+            }
+            break;
+
+        case MJPEG_INT_FRAME_OVERWRITE:
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal = BL_SET_REG_BIT(tmpVal,MJPEG_REG_INT_FRAME_EN);
+            }else{
+                /* Disable this interrupt */
+                tmpVal = BL_CLR_REG_BIT(tmpVal,MJPEG_REG_INT_FRAME_EN);
+            }
+            break;
+
+        case MJPEG_INT_BACK_IDLE:
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal = BL_SET_REG_BIT(tmpVal,MJPEG_REG_INT_IDLE_EN);
+            }else{
+                /* Disable this interrupt */
+                tmpVal = BL_CLR_REG_BIT(tmpVal,MJPEG_REG_INT_IDLE_EN);
+            }
+            break;
+
+        case MJPEG_INT_SWAP:
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                tmpVal = BL_SET_REG_BIT(tmpVal,MJPEG_REG_INT_SWAP_EN);
+            }else{
+                /* Disable this interrupt */
+                tmpVal = BL_CLR_REG_BIT(tmpVal,MJPEG_REG_INT_SWAP_EN);
+            }
+            break;
+
+        case MJPEG_INT_ALL:
+            if(intMask == UNMASK){
+                /* Enable all interrupt */
+                tmpVal = BL_SET_REG_BIT(tmpVal, MJPEG_REG_INT_NORMAL_EN);
+                tmpVal = BL_SET_REG_BIT(tmpVal, MJPEG_REG_INT_CAM_EN);
+                tmpVal = BL_SET_REG_BIT(tmpVal, MJPEG_REG_INT_MEM_EN);
+                tmpVal = BL_SET_REG_BIT(tmpVal, MJPEG_REG_INT_FRAME_EN);
+                tmpVal = BL_SET_REG_BIT(tmpVal,MJPEG_REG_INT_IDLE_EN);
+                tmpVal = BL_SET_REG_BIT(tmpVal,MJPEG_REG_INT_SWAP_EN);
+            }else{
+                /* Disable all interrupt */
+                tmpVal = BL_CLR_REG_BIT(tmpVal, MJPEG_REG_INT_NORMAL_EN);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, MJPEG_REG_INT_CAM_EN);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, MJPEG_REG_INT_MEM_EN);
+                tmpVal = BL_CLR_REG_BIT(tmpVal, MJPEG_REG_INT_FRAME_EN);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,MJPEG_REG_INT_IDLE_EN);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,MJPEG_REG_INT_SWAP_EN);
+            }
+            break;
+
+        default:
+            break;
+    }
+    BL_WR_REG(MJPEG_BASE,MJPEG_CONTROL_3,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  MJPEG Interrupt Clear
+ *
+ * @param  intType: MJPEG Interrupt Type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void MJPEG_IntClr(MJPEG_INT_Type intType)
+{
+    uint32_t tmpVal;
+    
+    CHECK_PARAM(IS_MJPEG_INT_TYPE(intType));
+    
+    tmpVal = BL_RD_REG(MJPEG_BASE,MJPEG_FRAME_FIFO_POP);
+    switch(intType)
+    {
+        case MJPEG_INT_NORMAL:
+            tmpVal = BL_SET_REG_BIT(tmpVal,MJPEG_REG_INT_NORMAL_CLR);
+            break;
+        case MJPEG_INT_CAM_OVERWRITE:
+            tmpVal = BL_SET_REG_BIT(tmpVal,MJPEG_REG_INT_CAM_CLR);
+            break;
+        case MJPEG_INT_MEM_OVERWRITE:
+            tmpVal = BL_SET_REG_BIT(tmpVal,MJPEG_REG_INT_MEM_CLR);
+            break;
+        case MJPEG_INT_FRAME_OVERWRITE:
+            tmpVal = BL_SET_REG_BIT(tmpVal,MJPEG_REG_INT_FRAME_CLR);
+            break;
+        case MJPEG_INT_BACK_IDLE:
+            tmpVal = BL_SET_REG_BIT(tmpVal,MJPEG_REG_INT_IDLE_CLR);
+            break;
+        case MJPEG_INT_SWAP:
+            tmpVal = BL_SET_REG_BIT(tmpVal,MJPEG_REG_INT_SWAP_CLR);
+            break;
+        case MJPEG_INT_ALL:
+            tmpVal = 0x3F00;
+        default:
+            break;
+    }
+    BL_WR_REG(MJPEG_BASE,MJPEG_FRAME_FIFO_POP,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Install mjpeg interrupt callback function
+ *
+ * @param  intType: MJPEG interrupt type
+ * @param  cbFun: Pointer to interrupt callback function. The type should be void (*fn)(void)
+ *
+ * @return None
+ *
+*******************************************************************************/
+void MJPEG_Int_Callback_Install(MJPEG_INT_Type intType,intCallback_Type* cbFun)
+{
+    /* Check the parameters */
+    CHECK_PARAM(IS_MJPEG_INT_TYPE(intType));
+
+    mjpegIntCbfArra[intType] = cbFun;
+}
+
+/****************************************************************************//**
+ * @brief  Mjpeg interrupt handler
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void MJPEG_IRQHandler(void)
+{
+    uint32_t tmpVal;
+    
+    tmpVal = BL_RD_REG(MJPEG_BASE,MJPEG_CONTROL_3);
+    if( BL_IS_REG_BIT_SET(tmpVal, MJPEG_STS_NORMAL_INT) ){
+        BL_WR_REG(MJPEG_BASE,MJPEG_FRAME_FIFO_POP,0x100);
+        if(mjpegIntCbfArra[MJPEG_INT_NORMAL] != NULL) {
+            /* call the callback function */
+            mjpegIntCbfArra[MJPEG_INT_NORMAL]();
+        }
+    }
+    
+    if( BL_IS_REG_BIT_SET(tmpVal, MJPEG_STS_CAM_INT) ){
+        BL_WR_REG(MJPEG_BASE,MJPEG_FRAME_FIFO_POP,0x200);
+        if(mjpegIntCbfArra[MJPEG_INT_CAM_OVERWRITE] != NULL) {
+            /* call the callback function */
+            mjpegIntCbfArra[MJPEG_INT_CAM_OVERWRITE]();
+        }
+    }
+    
+    if( BL_IS_REG_BIT_SET(tmpVal, MJPEG_STS_MEM_INT) ){
+        BL_WR_REG(MJPEG_BASE,MJPEG_FRAME_FIFO_POP,0x400);
+        if(mjpegIntCbfArra[MJPEG_INT_MEM_OVERWRITE] != NULL) {
+            /* call the callback function */
+            mjpegIntCbfArra[MJPEG_INT_MEM_OVERWRITE]();
+        }
+    }
+    
+    if( BL_IS_REG_BIT_SET(tmpVal, MJPEG_STS_FRAME_INT) ){
+        BL_WR_REG(MJPEG_BASE,MJPEG_FRAME_FIFO_POP,0x800);
+        if(mjpegIntCbfArra[MJPEG_INT_FRAME_OVERWRITE] != NULL) {
+            /* call the callback function */
+            mjpegIntCbfArra[MJPEG_INT_FRAME_OVERWRITE]();
+        }
+    }
+    
+    if( BL_IS_REG_BIT_SET(tmpVal, MJPEG_STS_IDLE_INT) ){
+        BL_WR_REG(MJPEG_BASE,MJPEG_FRAME_FIFO_POP,0x1000);
+        if(mjpegIntCbfArra[MJPEG_INT_BACK_IDLE] != NULL) {
+            /* call the callback function */
+            mjpegIntCbfArra[MJPEG_INT_BACK_IDLE]();
+        }
+    }
+    
+    if( BL_IS_REG_BIT_SET(tmpVal, MJPEG_STS_SWAP_INT) ){
+        BL_WR_REG(MJPEG_BASE,MJPEG_FRAME_FIFO_POP,0x2000);
+        if(mjpegIntCbfArra[MJPEG_INT_SWAP] != NULL) {
+            /* call the callback function */
+            mjpegIntCbfArra[MJPEG_INT_SWAP]();
+        }
+    }
+}
+#endif
+
+/*@} end of group MJPEG_Public_Functions */
+
+/*@} end of group MJPEG */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_pds.c b/drivers/bl702_driver/std_drv/src/bl702_pds.c
new file mode 100644
index 00000000..d90f2413
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_pds.c
@@ -0,0 +1,1303 @@
+/**
+  ******************************************************************************
+  * @file    bl702_pds.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702.h"
+#include "bl702_pds.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  PDS
+ *  @{
+ */
+
+/** @defgroup  PDS_Private_Macros
+ *  @{
+ */
+
+/*@} end of group PDS_Private_Macros */
+
+/** @defgroup  PDS_Private_Types
+ *  @{
+ */
+
+/*@} end of group PDS_Private_Types */
+
+/** @defgroup  PDS_Private_Variables
+ *  @{
+ */
+static intCallback_Type * pdsIntCbfArra[PDS_INT_MAX][1]={{NULL},{NULL},{NULL},{NULL},   \
+                                                         {NULL},{NULL},{NULL},{NULL},   \
+                                                         {NULL},{NULL},{NULL}           };
+
+
+/*@} end of group PDS_Private_Variables */
+
+/** @defgroup  PDS_Global_Variables
+ *  @{
+ */
+
+/*@} end of group PDS_Global_Variables */
+
+/** @defgroup  PDS_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group PDS_Private_Fun_Declaration */
+
+/** @defgroup  PDS_Private_Functions
+ *  @{
+ */
+
+/*@} end of group PDS_Private_Functions */
+
+/** @defgroup  PDS_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  power down sleep ram configure
+ *
+ * @param  ramCfg: power down sleep force ram configuration
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION PDS_RAM_Config(PDS_RAM_CFG_Type *ramCfg)
+{
+    if(NULL==ramCfg){
+        return ERROR;
+    }
+    
+    /* PDS_RAM1 config */
+    BL_WR_REG(PDS_BASE,PDS_RAM1,*(uint32_t *)ramCfg);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  power down sleep set pad configure
+ *
+ * @param  pin: power down sleep pad num
+ * @param  cfg: power down sleep pad type
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION PDS_Set_Pad_Config(PDS_PAD_PIN_Type pin,PDS_PAD_CFG_Type cfg)
+{
+    uint32_t tmpVal = 0;
+    uint32_t tmpPu = 0;
+    uint32_t tmpPd = 0;
+    
+    if(pin sleep forever */
+    /* PDS sleep time 1~PDS_WARMUP_LATENCY_CNT <=> error */
+    /* PDS sleep time >PDS_WARMUP_LATENCY_CNT <=> correct */
+    if(!pdsSleepCnt){
+        cfg->sleepForever = 1;
+    }else if((pdsSleepCnt)&&(pdsSleepCnt<=PDS_WARMUP_LATENCY_CNT)){
+        return ERROR;
+    }else{
+        BL_WR_REG(PDS_BASE,PDS_TIME1,pdsSleepCnt-PDS_WARMUP_LATENCY_CNT);
+    }
+    
+    /* PDS_CTL4 config */
+    BL_WR_REG(PDS_BASE,PDS_CTL4,*(uint32_t *)cfg4);
+    
+    /* PDS_CTL config */
+    if(cfg->pdsStart){
+        BL_WR_REG(PDS_BASE,PDS_CTL,(*(uint32_t *)cfg&~(1<<0)));
+        BL_WR_REG(PDS_BASE,PDS_CTL,(*(uint32_t *)cfg|(1<<0)));
+    }else{
+        BL_WR_REG(PDS_BASE,PDS_CTL,*(uint32_t *)cfg);
+    }
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  power down sleep force configure
+ *
+ * @param  cfg2: power down sleep force configuration 1
+ * @param  cfg3: power down sleep force configuration 2
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION PDS_Force_Config(PDS_CTL2_Type *cfg2,PDS_CTL3_Type *cfg3)
+{
+    /* PDS_CTL2 config */
+    BL_WR_REG(PDS_BASE,PDS_CTL2,*(uint32_t *)cfg2);
+    
+    /* PDS_CTL3 config */
+    BL_WR_REG(PDS_BASE,PDS_CTL3,*(uint32_t *)cfg3);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  power down sleep force configure
+ *
+ * @param  defaultLvCfg: power down sleep default level configuration
+ * @param  pdsSleepCnt: power down sleep time count
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION PDS_Default_Level_Config(PDS_DEFAULT_LV_CFG_Type *defaultLvCfg,uint32_t pdsSleepCnt)
+{
+    PDS_Force_Config((PDS_CTL2_Type *)&(defaultLvCfg->pdsCtl2),(PDS_CTL3_Type *)&(defaultLvCfg->pdsCtl3));
+    PDS_App_Enable((PDS_CTL_Type *)&(defaultLvCfg->pdsCtl),(PDS_CTL4_Type *)&(defaultLvCfg->pdsCtl4),pdsSleepCnt);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  power down sleep int enable
+ *
+ * @param  intType: PDS int type
+ * @param  enable: ENABLE or DISABLE
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type PDS_IntEn(PDS_INT_Type intType,BL_Fun_Type enable)
+{
+    uint32_t offset = 0;
+    uint32_t tmpVal = 0;
+    
+    if((intTypePDS_INT_KYS_QDEC)){
+        return ERROR;
+    }
+    
+    switch(intType){
+        case PDS_INT_WAKEUP:
+        case PDS_INT_RF_DONE:
+        case PDS_INT_PLL_DONE:
+            break;
+        case PDS_INT_PDS_SLEEP_CNT:
+            offset = 16;
+            break;
+        case PDS_INT_HBN_IRQ_OUT0:
+            offset = 17;
+            break;
+        case PDS_INT_HBN_IRQ_OUT1:
+            offset = 18;
+            break;
+        case PDS_INT_GPIO_IRQ:
+            offset = 19;
+            break;
+        case PDS_INT_IRRX:
+            offset = 20;
+            break;
+        case PDS_INT_BLE_SLP_IRQ:
+            offset = 21;
+            break;
+        case PDS_INT_USB_WKUP:
+            offset = 22;
+            break;
+        case PDS_INT_KYS_QDEC:
+            offset = 23;
+            break;
+        case PDS_INT_MAX:
+            break;
+        default :
+            break;
+    }
+    
+    tmpVal = BL_RD_REG(PDS_BASE,PDS_INT);
+    if(enable){
+        tmpVal = tmpVal|(1<PDS_INT_PLL_DONE){
+        return ERROR;
+    }
+    
+    switch(intType){
+        case PDS_INT_WAKEUP:
+            offset = 8;
+            break;
+        case PDS_INT_RF_DONE:
+            offset = 10;
+            break;
+        case PDS_INT_PLL_DONE:
+            offset = 11;
+            break;
+        case PDS_INT_PDS_SLEEP_CNT:
+        case PDS_INT_HBN_IRQ_OUT0:
+        case PDS_INT_HBN_IRQ_OUT1:
+        case PDS_INT_GPIO_IRQ:
+        case PDS_INT_IRRX:
+        case PDS_INT_BLE_SLP_IRQ:
+        case PDS_INT_USB_WKUP:
+        case PDS_INT_KYS_QDEC:
+        case PDS_INT_MAX:
+        default :
+            break;
+    }
+    
+    tmpVal = BL_RD_REG(PDS_BASE,PDS_INT);
+    if(intMask!=UNMASK){
+        tmpVal = tmpVal|(1<vddcoreVol));
+    
+    /* power config */
+    pdsCtl |= (powerCfg->mbgPower      << 31)|
+              (powerCfg->ldo18rfPower  << 30)|
+              (powerCfg->sfregPower    << 29)|
+              (powerCfg->pllPower      << 28)|
+              (powerCfg->cpu0Power     << 19)|
+              (powerCfg->rc32mPower    << 17)|
+              (powerCfg->xtalPower     << 14)|
+              (powerCfg->allPower      << 13)|
+              (powerCfg->isoPower      << 11)|
+              (powerCfg->bzPower       << 10)|
+              (powerCfg->sramDisStanby << 9 )|
+              (powerCfg->cgPower       << 8 )|
+              (powerCfg->cpu1Power     << 7 )|
+              (powerCfg->usbPower      << 3 );
+    pdsCtl = BL_SET_REG_BITS_VAL(pdsCtl,PDS_CR_PDS_LDO_VOL,normalCfg->vddcoreVol);
+    pdsCtl |= (normalCfg->vddcoreVolEn        << 18)|
+              (normalCfg->cpu0NotNeedWFI      << 21)|
+              (normalCfg->cpu1NotNeedWFI      << 20)|
+              (normalCfg->busReset            << 16)|
+              (normalCfg->disIrqWakeUp        << 15)|
+              (normalCfg->powerOffXtalForever << 2 )|
+              (normalCfg->sleepForever        << 1 );
+    BL_WR_REG(PDS_BASE,PDS_CTL,pdsCtl);
+    
+    
+    pdsCtl = BL_RD_REG(PDS_BASE, PDS_CTL);
+    if(enable){
+        pdsCtl |= (1<<0);
+    }else{
+        pdsCtl &= ~(1<<0);
+    }
+    BL_WR_REG(PDS_BASE,PDS_CTL,pdsCtl);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  PDS force turn off XXX domain
+ *
+ * @param  domain: PDS domain
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION PDS_Manual_Force_Turn_Off(PDS_FORCE_Type domain)
+{
+    uint32_t tmpVal = 0;
+    
+    /* memory sleep */
+    tmpVal = BL_RD_REG(PDS_BASE, PDS_CTL2);
+    tmpVal |= 1<<(domain + PDS_FORCE_MEM_STBY_OFFSET);
+    BL_WR_REG(PDS_BASE, PDS_CTL2, tmpVal);
+    
+    /* gate clock */
+    tmpVal = BL_RD_REG(PDS_BASE, PDS_CTL2);
+    tmpVal |= 1<<(domain + PDS_FORCE_GATE_CLK_OFFSET);
+    BL_WR_REG(PDS_BASE, PDS_CTL2, tmpVal);
+    
+    /* pds reset */
+    tmpVal = BL_RD_REG(PDS_BASE, PDS_CTL2);
+    tmpVal |= 1<<(domain + PDS_FORCE_PDS_RST_OFFSET);
+    BL_WR_REG(PDS_BASE, PDS_CTL2, tmpVal);
+    
+    /* isolation on */
+    tmpVal = BL_RD_REG(PDS_BASE, PDS_CTL2);
+    tmpVal |= 1<<(domain + PDS_FORCE_ISO_EN_OFFSET);
+    BL_WR_REG(PDS_BASE, PDS_CTL2, tmpVal);
+    
+    /* power off */
+    tmpVal = BL_RD_REG(PDS_BASE, PDS_CTL2);
+    tmpVal |= 1<<(domain + PDS_FORCE_PWR_OFF_OFFSET);
+    BL_WR_REG(PDS_BASE, PDS_CTL2, tmpVal);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  PDS force turn on XXX domain
+ *
+ * @param  domain: PDS domain
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION PDS_Manual_Force_Turn_On(PDS_FORCE_Type domain)
+{
+    uint32_t tmpVal = 0;
+    
+    /* power on */
+    tmpVal = BL_RD_REG(PDS_BASE, PDS_CTL2);
+    tmpVal &= ~(1<<(domain + PDS_FORCE_PWR_OFF_OFFSET));
+    BL_WR_REG(PDS_BASE, PDS_CTL2, tmpVal);
+    
+    /* isolation off */
+    tmpVal = BL_RD_REG(PDS_BASE, PDS_CTL2);
+    tmpVal &= ~(1<<(domain + PDS_FORCE_ISO_EN_OFFSET));
+    BL_WR_REG(PDS_BASE, PDS_CTL2, tmpVal);
+    
+    /* pds de_reset */
+    tmpVal = BL_RD_REG(PDS_BASE, PDS_CTL2);
+    tmpVal &= ~(1<<(domain + PDS_FORCE_PDS_RST_OFFSET));
+    BL_WR_REG(PDS_BASE, PDS_CTL2, tmpVal);
+    
+    /* memory active */
+    tmpVal = BL_RD_REG(PDS_BASE, PDS_CTL2);
+    tmpVal &= ~(1<<(domain + PDS_FORCE_MEM_STBY_OFFSET));
+    BL_WR_REG(PDS_BASE, PDS_CTL2, tmpVal);
+    
+    /* clock on */
+    tmpVal = BL_RD_REG(PDS_BASE, PDS_CTL2);
+    tmpVal &= ~(1<<(domain + PDS_FORCE_GATE_CLK_OFFSET));
+    BL_WR_REG(PDS_BASE, PDS_CTL2, tmpVal);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Power down sleep wake up interrupt handler
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void PDS_WAKEUP_IRQHandler(void)
+{
+    for(PDS_INT_Type intType=PDS_INT_WAKEUP;intType
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_psram.h"
+#include "bl702_l1c.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  PSRAM
+ *  @{
+ */
+
+/** @defgroup  PSRAM_Private_Macros
+ *  @{
+ */
+
+/*@} end of group PSRAM_Private_Macros */
+
+/** @defgroup  PSRAM_Private_Types
+ *  @{
+ */
+
+/*@} end of group PSRAM_Private_Types */
+
+/** @defgroup  PSRAM_Private_Variables
+ *  @{
+ */
+
+/*@} end of group PSRAM_Private_Variables */
+
+/** @defgroup  PSRAM_Global_Variables
+ *  @{
+ */
+
+/*@} end of group PSRAM_Global_Variables */
+
+/** @defgroup  PSRAM_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group PSRAM_Private_Fun_Declaration */
+
+/** @defgroup  PSRAM_Private_Functions
+ *  @{
+ */
+
+/*@} end of group PSRAM_Private_Functions */
+
+/** @defgroup  PSRAM_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Init serial psram control interface
+ *
+ * @param  psramCfg: Serial psram parameter configuration pointer
+ * @param  cmdsCfg: Serial Serial Flash controller configuration pointer
+ * @param  sfCtrlPsramCfg: Serial psram controller configuration pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+//#ifndef BFLB_USE_ROM_DRIVER
+//__WEAK
+void ATTR_TCM_SECTION Psram_Init(SPI_Psram_Cfg_Type *psramCfg, SF_Ctrl_Cmds_Cfg *cmdsCfg, SF_Ctrl_Psram_Cfg *sfCtrlPsramCfg)
+{
+    SF_Ctrl_Psram_Init(sfCtrlPsramCfg);
+    SF_Ctrl_Cmds_Set(cmdsCfg);
+
+    Psram_SetDriveStrength(psramCfg);
+    Psram_SetBurstWrap(psramCfg);
+}
+//#endif
+
+/****************************************************************************//**
+ * @brief  Read psram register
+ *
+ * @param  psramCfg: Serial psram parameter configuration pointer
+ * @param  regValue: Register value pointer to store data
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION Psram_ReadReg(SPI_Psram_Cfg_Type *psramCfg, uint8_t *regValue)
+{
+    /* Check the parameters */
+    CHECK_PARAM(IS_PSRAM_CTRL_MODE(psramCfg->ctrlMode));
+
+    uint8_t * const psramCtrlBuf=(uint8_t *)SF_CTRL_BUF_BASE;
+    SF_Ctrl_Cmd_Cfg_Type psramCmd;
+    if(((uint32_t)&psramCmd)%4 == 0){
+        BL702_MemSet4((uint32_t *)&psramCmd, 0, sizeof(psramCmd)/4);
+    }else{
+        BL702_MemSet(&psramCmd, 0, sizeof(psramCmd));
+    }
+
+    if(psramCfg->ctrlMode == PSRAM_QPI_CTRL_MODE){
+        psramCmd.cmdMode = SF_CTRL_CMD_4_LINES;
+        psramCmd.addrMode = SF_CTRL_ADDR_4_LINES;
+        psramCmd.dataMode = SF_CTRL_DATA_4_LINES;
+    }
+    psramCmd.cmdBuf[0] = (psramCfg->readRegCmd)<<24;
+    psramCmd.rwFlag = SF_CTRL_READ;
+    psramCmd.addrSize = 3;
+    psramCmd.dummyClks = psramCfg->readRegDmyClk;
+    psramCmd.nbData = 1;
+
+    SF_Ctrl_SendCmd(&psramCmd);
+
+    while(SET==SF_Ctrl_GetBusyState()){
+    }
+
+    BL702_MemCpy(regValue, psramCtrlBuf, 1);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Write psram register
+ *
+ * @param  psramCfg: Serial psram parameter configuration pointer
+ * @param  regValue: Register value pointer storing data
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION Psram_WriteReg(SPI_Psram_Cfg_Type *psramCfg, uint8_t *regValue)
+{
+    /* Check the parameters */
+    CHECK_PARAM(IS_PSRAM_CTRL_MODE(psramCfg->ctrlMode));
+
+    uint8_t * const psramCtrlBuf=(uint8_t *)SF_CTRL_BUF_BASE;
+    SF_Ctrl_Cmd_Cfg_Type psramCmd;
+    if(((uint32_t)&psramCmd)%4 == 0){
+        BL702_MemSet4((uint32_t *)&psramCmd, 0, sizeof(psramCmd)/4);
+    }else{
+        BL702_MemSet(&psramCmd, 0, sizeof(psramCmd));
+    }
+    BL702_MemCpy(psramCtrlBuf, regValue, 1);
+
+    if(psramCfg->ctrlMode == PSRAM_QPI_CTRL_MODE){
+        psramCmd.cmdMode = SF_CTRL_CMD_4_LINES;
+        psramCmd.addrMode = SF_CTRL_ADDR_4_LINES;
+        psramCmd.dataMode = SF_CTRL_DATA_4_LINES;
+    }
+    psramCmd.cmdBuf[0] = (psramCfg->writeRegCmd)<<24;
+    psramCmd.rwFlag = SF_CTRL_WRITE;
+    psramCmd.addrSize = 3;
+    psramCmd.nbData = 1;
+
+    SF_Ctrl_SendCmd(&psramCmd);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Set psram driver strength
+ *
+ * @param  psramCfg: Serial psram parameter configuration pointer
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION Psram_SetDriveStrength(SPI_Psram_Cfg_Type *psramCfg)
+{
+    uint32_t stat=0;
+    /* Check the parameters */
+    CHECK_PARAM(IS_PSRAM_DRIVE_STRENGTH(psramCfg->driveStrength));
+
+    Psram_ReadReg(psramCfg, (uint8_t *)&stat);
+    if((stat & 0x3) == psramCfg->driveStrength){
+        return SUCCESS;
+    }
+
+    stat &= (~0x3);
+    stat |= psramCfg->driveStrength;
+
+    Psram_WriteReg(psramCfg, (uint8_t *)&stat);
+    /* Wait for write done */
+
+    Psram_ReadReg(psramCfg, (uint8_t *)&stat);
+
+    if((stat & 0x3) == psramCfg->driveStrength){
+        return SUCCESS;
+    }
+
+    return ERROR;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Set psram burst wrap size
+ *
+ * @param  psramCfg: Serial psram parameter configuration pointer
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION Psram_SetBurstWrap(SPI_Psram_Cfg_Type *psramCfg)
+{
+    uint32_t stat=0;
+    /* Check the parameters */
+    CHECK_PARAM(IS_PSRAM_BURST_LENGTH(psramCfg->burstLength));
+
+    Psram_ReadReg(psramCfg, (uint8_t *)&stat);
+    if(((stat>>5) & 0x3) == psramCfg->burstLength){
+        return SUCCESS;
+    }
+
+    stat &= (~(0x3<<5));
+    stat |= (psramCfg->burstLength<<5);
+
+    Psram_WriteReg(psramCfg, (uint8_t *)&stat);
+    /* Wait for write done */
+
+    Psram_ReadReg(psramCfg, (uint8_t *)&stat);
+
+    if(((stat>>5) & 0x3) == psramCfg->burstLength){
+        return SUCCESS;
+    }
+
+    return ERROR;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Get psram ID
+ *
+ * @param  psramCfg: Serial psram parameter configuration pointer
+ * @param  data: Data pointer to store read data
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION Psram_ReadId(SPI_Psram_Cfg_Type *psramCfg, uint8_t *data)
+{
+    uint8_t * const psramCtrlBuf=(uint8_t *)SF_CTRL_BUF_BASE;
+    SF_Ctrl_Cmd_Cfg_Type psramCmd;
+
+    if(((uint32_t)&psramCmd)%4 == 0){
+        BL702_MemSet4((uint32_t *)&psramCmd, 0, sizeof(psramCmd)/4);
+    }else{
+        BL702_MemSet(&psramCmd, 0, sizeof(psramCmd));
+    }
+
+    psramCmd.cmdBuf[0] = (psramCfg->readIdCmd)<<24;
+    psramCmd.rwFlag = SF_CTRL_READ;
+    psramCmd.addrSize = 3;
+    psramCmd.dummyClks = psramCfg->readIdDmyClk;
+    psramCmd.nbData = 8;
+
+    SF_Ctrl_SendCmd(&psramCmd);
+
+    while(SET==SF_Ctrl_GetBusyState()){
+    }
+
+    BL702_MemCpy(data, psramCtrlBuf, 8);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Psram enter quad mode
+ *
+ * @param  psramCfg: Serial psram parameter configuration pointer
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION Psram_EnterQuadMode(SPI_Psram_Cfg_Type *psramCfg)
+{
+    SF_Ctrl_Cmd_Cfg_Type psramCmd;
+
+    if(((uint32_t)&psramCmd)%4 == 0){
+        BL702_MemSet4((uint32_t *)&psramCmd, 0, sizeof(psramCmd)/4);
+    }else{
+        BL702_MemSet(&psramCmd, 0, sizeof(psramCmd));
+    }
+
+    psramCmd.cmdBuf[0] = (psramCfg->enterQuadModeCmd)<<24;
+    psramCmd.rwFlag = SF_CTRL_READ;
+
+    SF_Ctrl_SendCmd(&psramCmd);
+
+    while(SET==SF_Ctrl_GetBusyState()){
+    }
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Psram exit quad mode
+ *
+ * @param  psramCfg: Serial psram parameter configuration pointer
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION Psram_ExitQuadMode(SPI_Psram_Cfg_Type *psramCfg)
+{
+    SF_Ctrl_Cmd_Cfg_Type psramCmd;
+
+    if(((uint32_t)&psramCmd)%4 == 0){
+        BL702_MemSet4((uint32_t *)&psramCmd, 0, sizeof(psramCmd)/4);
+    }else{
+        BL702_MemSet(&psramCmd, 0, sizeof(psramCmd));
+    }
+
+    psramCmd.cmdMode = SF_CTRL_CMD_4_LINES;
+    psramCmd.addrMode = SF_CTRL_ADDR_4_LINES;
+    psramCmd.dataMode = SF_CTRL_DATA_4_LINES;
+
+    psramCmd.cmdBuf[0] = (psramCfg->exitQuadModeCmd)<<24;
+    psramCmd.rwFlag = SF_CTRL_READ;
+
+    SF_Ctrl_SendCmd(&psramCmd);
+
+    while(SET==SF_Ctrl_GetBusyState()){
+    }
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Psram toggle burst length
+ *
+ * @param  psramCfg: Serial psram parameter configuration pointer
+ * @param  ctrlMode: Psram ctrl mode type
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION Psram_ToggleBurstLength(SPI_Psram_Cfg_Type *psramCfg, PSRAM_Ctrl_Mode ctrlMode)
+{
+    SF_Ctrl_Cmd_Cfg_Type psramCmd;
+    /* Check the parameters */
+    CHECK_PARAM(IS_PSRAM_CTRL_MODE(ctrlMode));
+
+    if(((uint32_t)&psramCmd)%4 == 0){
+        BL702_MemSet4((uint32_t *)&psramCmd, 0, sizeof(psramCmd)/4);
+    }else{
+        BL702_MemSet(&psramCmd, 0, sizeof(psramCmd));
+    }
+
+    if(ctrlMode == PSRAM_QPI_CTRL_MODE){
+        psramCmd.cmdMode = SF_CTRL_CMD_4_LINES;
+        psramCmd.addrMode = SF_CTRL_ADDR_4_LINES;
+        psramCmd.dataMode = SF_CTRL_DATA_4_LINES;
+    }
+
+    psramCmd.cmdBuf[0] = (psramCfg->burstToggleCmd)<<24;
+    psramCmd.rwFlag = SF_CTRL_READ;
+
+    SF_Ctrl_SendCmd(&psramCmd);
+
+    while(SET==SF_Ctrl_GetBusyState()){
+    }
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Psram software reset
+ *
+ * @param  psramCfg: Serial psram parameter configuration pointer
+ * @param  ctrlMode: Psram ctrl mode type
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION Psram_SoftwareReset(SPI_Psram_Cfg_Type *psramCfg, PSRAM_Ctrl_Mode ctrlMode)
+{
+    SF_Ctrl_Cmd_Cfg_Type psramCmd;
+    /* Check the parameters */
+    CHECK_PARAM(IS_PSRAM_CTRL_MODE(ctrlMode));
+
+    if(((uint32_t)&psramCmd)%4 == 0){
+        BL702_MemSet4((uint32_t *)&psramCmd, 0, sizeof(psramCmd)/4);
+    }else{
+        BL702_MemSet(&psramCmd, 0, sizeof(psramCmd));
+    }
+
+    if(ctrlMode == PSRAM_QPI_CTRL_MODE){
+        psramCmd.cmdMode = SF_CTRL_CMD_4_LINES;
+        psramCmd.addrMode = SF_CTRL_ADDR_4_LINES;
+        psramCmd.dataMode = SF_CTRL_DATA_4_LINES;
+    }
+
+    /* Reset enable */
+    psramCmd.cmdBuf[0] = (psramCfg->resetEnableCmd)<<24;
+    /* rwFlag don't care */
+    psramCmd.rwFlag = SF_CTRL_READ;
+    /* Wait for write done */
+
+    SF_Ctrl_SendCmd(&psramCmd);
+    while(SET==SF_Ctrl_GetBusyState()){
+    }
+
+    /* Reset */
+    psramCmd.cmdBuf[0] = (psramCfg->resetCmd)<<24;
+    /* rwFlag don't care */
+    psramCmd.rwFlag = SF_CTRL_READ;
+    SF_Ctrl_SendCmd(&psramCmd);
+    while(SET==SF_Ctrl_GetBusyState()){
+    }
+
+    BL702_Delay_US(50);
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Psram set IDbus config
+ *
+ * @param  psramCfg: Serial psram parameter configuration pointer
+ * @param  ioMode: Psram ctrl mode type
+ * @param  addr: Address to read/write
+ * @param  len: Data length to read/write
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION Psram_Set_IDbus_Cfg(SPI_Psram_Cfg_Type *psramCfg,
+    SF_Ctrl_IO_Type ioMode, uint32_t addr, uint32_t len)
+{
+    uint8_t cmd,dummyClks;
+    SF_Ctrl_Cmd_Cfg_Type psramCmd;
+    uint8_t cmdValid = 1;
+    /* Check the parameters */
+    CHECK_PARAM(IS_SF_CTRL_IO_TYPE(ioMode));
+
+    SF_Ctrl_Set_Owner(SF_CTRL_OWNER_IAHB);
+
+    /* read mode cache set */
+    if(((uint32_t)&psramCmd)%4 == 0){
+        BL702_MemSet4((uint32_t *)&psramCmd, 0, sizeof(psramCmd)/4);
+    }else{
+        BL702_MemSet(&psramCmd, 0, sizeof(psramCmd));
+    }
+
+    if(SF_CTRL_NIO_MODE == ioMode){
+        cmd = psramCfg->fReadCmd;
+        dummyClks = psramCfg->fReadDmyClk;
+    }else if(SF_CTRL_QIO_MODE == ioMode){
+        psramCmd.addrMode = SF_CTRL_ADDR_4_LINES;
+        psramCmd.dataMode = SF_CTRL_DATA_4_LINES;
+        cmd = psramCfg->fReadQuadCmd;
+        dummyClks = psramCfg->fReadQuadDmyClk;
+    }else{
+        return ERROR;
+    }
+
+    /* prepare command */
+    psramCmd.rwFlag = SF_CTRL_READ;
+    psramCmd.addrSize = 3;
+    psramCmd.cmdBuf[0] = (cmd<<24)|addr;
+    psramCmd.dummyClks = dummyClks;
+    psramCmd.nbData = len;
+    SF_Ctrl_Psram_Read_Icache_Set(&psramCmd, cmdValid);
+
+    /* write mode cache set */
+    if(((uint32_t)&psramCmd)%4 == 0){
+        BL702_MemSet4((uint32_t *)&psramCmd, 0, sizeof(psramCmd)/4);
+    }else{
+        BL702_MemSet(&psramCmd, 0, sizeof(psramCmd));
+    }
+
+    if(SF_CTRL_NIO_MODE == ioMode)
+    {
+        cmd = psramCfg->writeCmd;
+    }else if(SF_CTRL_QIO_MODE==ioMode){
+        psramCmd.addrMode = SF_CTRL_ADDR_4_LINES;
+        psramCmd.dataMode = SF_CTRL_DATA_4_LINES;
+        cmd = psramCfg->quadWriteCmd;
+    }else{
+        return ERROR;
+    }
+    dummyClks = 0;
+
+    /* prepare command */
+    psramCmd.rwFlag = SF_CTRL_WRITE;
+    psramCmd.addrSize = 3;
+    psramCmd.cmdBuf[0] = (cmd<<24)|addr;
+    psramCmd.dummyClks = dummyClks;
+    psramCmd.nbData = len;
+    SF_Ctrl_Psram_Write_Icache_Set(&psramCmd, cmdValid);
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Set cache write to psram with cache
+ *
+ * @param  psramCfg: Serial psram parameter configuration pointer
+ * @param  ioMode: Psram controller interface mode
+ * @param  wtEn: Psram cache write through enable
+ * @param  wbEn: Psram cache write back enable
+ * @param  waEn: Psram cache write allocate enable
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION Psram_Cache_Write_Set(SPI_Psram_Cfg_Type *psramCfg, SF_Ctrl_IO_Type ioMode,
+    BL_Fun_Type wtEn, BL_Fun_Type wbEn, BL_Fun_Type waEn)
+{
+    BL_Err_Type stat;
+
+    /* Cache now only support 32 bytes read */
+    stat = Psram_Set_IDbus_Cfg(psramCfg, ioMode, 0, 32);
+    if(SUCCESS != stat){
+        return stat;
+    }
+
+    L1C_Cache_Write_Set(wtEn, wbEn, waEn);
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Write psram one region
+ *
+ * @param  psramCfg: Serial psram parameter configuration pointer
+ * @param  ioMode: Write mode: SPI mode or QPI mode
+ * @param  addr: Start address to be write
+ * @param  data: Data pointer to be write
+ * @param  len: Data length to be write
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION Psram_Write(SPI_Psram_Cfg_Type *psramCfg,
+    SF_Ctrl_IO_Type ioMode, uint32_t addr, uint8_t *data, uint32_t len)
+{
+    uint8_t * const psramCtrlBuf=(uint8_t *)SF_CTRL_BUF_BASE;
+    uint32_t i = 0,curLen = 0;
+    uint32_t burstLen = 512;
+    uint8_t cmd;
+    SF_Ctrl_Cmd_Cfg_Type psramCmd;
+    /* Check the parameters */
+    CHECK_PARAM(IS_SF_CTRL_IO_TYPE(ioMode));
+
+    if(((uint32_t)&psramCmd)%4 == 0){
+        BL702_MemSet4((uint32_t *)&psramCmd, 0, sizeof(psramCmd)/4);
+    }else{
+        BL702_MemSet(&psramCmd, 0, sizeof(psramCmd));
+    }
+
+    if(SF_CTRL_NIO_MODE == ioMode)
+    {
+        cmd = psramCfg->writeCmd;
+    }else if(SF_CTRL_QIO_MODE==ioMode){
+        psramCmd.addrMode = SF_CTRL_ADDR_4_LINES;
+        psramCmd.dataMode = SF_CTRL_DATA_4_LINES;
+        cmd = psramCfg->quadWriteCmd;
+    }else{
+        return ERROR;
+    }
+
+    /* Prepare command */
+    psramCmd.rwFlag = SF_CTRL_WRITE;
+    psramCmd.addrSize = 3;
+
+    if(psramCfg->burstLength == PSRAM_BURST_LENGTH_16_BYTES){
+        burstLen = 16;
+    }else if(psramCfg->burstLength == PSRAM_BURST_LENGTH_32_BYTES){
+        burstLen = 32;
+    }else if(psramCfg->burstLength == PSRAM_BURST_LENGTH_64_BYTES){
+        burstLen = 64;
+    }else if(psramCfg->burstLength == PSRAM_BURST_LENGTH_512_BYTES){
+        burstLen = 512;
+    }
+
+    for(i = 0;i < len;){
+        /* Get current programmed length within page size */
+        curLen = burstLen - addr % burstLen;
+        if(curLen > len - i){
+            curLen = len - i;
+        }
+
+        /* Prepare command */
+        BL702_MemCpy_Fast(psramCtrlBuf, data, curLen);
+        psramCmd.cmdBuf[0] = (cmd<<24)|(addr);
+        psramCmd.nbData = curLen;
+
+        SF_Ctrl_SendCmd(&psramCmd);
+
+        /* Adjust address and programmed length */
+        addr += curLen;
+        i += curLen;
+        data += curLen;
+
+        /* Wait for write done */
+    }
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Read data from psram
+ *
+ * @param  psramCfg: Serial psram parameter configuration pointer
+ * @param  ioMode: IoMode: psram controller interface mode
+ * @param  addr: Psram read start address
+ * @param  data: Data pointer to store data read from psram
+ * @param  len: Data length to read
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION Psram_Read(SPI_Psram_Cfg_Type *psramCfg,
+    SF_Ctrl_IO_Type ioMode, uint32_t addr, uint8_t *data, uint32_t len)
+{
+    uint8_t * const psramCtrlBuf=(uint8_t *)SF_CTRL_BUF_BASE;
+    uint32_t curLen,i;
+    uint32_t burstLen = 512;
+    uint8_t cmd,dummyClks;
+    SF_Ctrl_Cmd_Cfg_Type psramCmd;
+    /* Check the parameters */
+    CHECK_PARAM(IS_SF_CTRL_IO_TYPE(ioMode));
+
+    if(((uint32_t)&psramCmd)%4 == 0){
+        BL702_MemSet4((uint32_t *)&psramCmd, 0, sizeof(psramCmd)/4);
+    }else{
+        BL702_MemSet(&psramCmd,0, sizeof(psramCmd));
+    }
+
+    if(SF_CTRL_NIO_MODE == ioMode){
+        cmd = psramCfg->fReadCmd;
+        dummyClks = psramCfg->fReadDmyClk;
+    }else if(SF_CTRL_QIO_MODE == ioMode){
+        psramCmd.addrMode = SF_CTRL_ADDR_4_LINES;
+        psramCmd.dataMode = SF_CTRL_DATA_4_LINES;
+        cmd = psramCfg->fReadQuadCmd;
+        dummyClks = psramCfg->fReadQuadDmyClk;
+    }else{
+        return ERROR;
+    }
+
+    /* Prepare command */
+    psramCmd.rwFlag = SF_CTRL_READ;
+    psramCmd.addrSize = 3;
+    psramCmd.dummyClks = dummyClks;
+
+    if(psramCfg->burstLength == PSRAM_BURST_LENGTH_16_BYTES){
+        burstLen = 16;
+    }else if(psramCfg->burstLength == PSRAM_BURST_LENGTH_32_BYTES){
+        burstLen = 32;
+    }else if(psramCfg->burstLength == PSRAM_BURST_LENGTH_64_BYTES){
+        burstLen = 64;
+    }else if(psramCfg->burstLength == PSRAM_BURST_LENGTH_512_BYTES){
+        burstLen = 512;
+    }
+
+    /* Read data */
+    for(i=0;i len - i){
+            curLen = len - i;
+        }
+        if(curLen >= FLASH_CTRL_BUF_SIZE){
+            curLen = FLASH_CTRL_BUF_SIZE;
+            psramCmd.nbData = curLen;
+        }else{
+            /* Make sf_ctrl word read */
+            psramCmd.nbData = ((curLen+3)>>2)<<2;
+        }
+
+        SF_Ctrl_SendCmd(&psramCmd);
+
+        while(SET == SF_Ctrl_GetBusyState()){
+        }
+        BL702_MemCpy_Fast(data, psramCtrlBuf, curLen);
+
+        addr += curLen;
+        i += curLen;
+        data += curLen;
+    }
+
+    return SUCCESS;
+}
+#endif
+
+/*@} end of group PSRAM_Public_Functions */
+
+/*@} end of group PSRAM */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_pwm.c b/drivers/bl702_driver/std_drv/src/bl702_pwm.c
new file mode 100644
index 00000000..e6d58e47
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_pwm.c
@@ -0,0 +1,537 @@
+/**
+  ******************************************************************************
+  * @file    bl702_pwm.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_pwm.h"
+#include "bl702_glb.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  PWM
+ *  @{
+ */
+
+/** @defgroup  PWM_Private_Macros
+ *  @{
+ */
+#define PWM_Get_Channel_Reg(ch)  (PWM_BASE+PWM_CHANNEL_OFFSET+(ch)*0x20)
+#define PWM_INT_TIMEOUT_COUNT           (160*1000)
+#define PWM_STOP_TIMEOUT_COUNT          (160*1000)
+
+/*@} end of group PWM_Private_Macros */
+
+/** @defgroup  PWM_Private_Types
+ *  @{
+ */
+
+/*@} end of group PWM_Private_Types */
+
+/** @defgroup  PWM_Private_Variables
+ *  @{
+ */
+
+/**
+ *  @brief PWM interrupt callback function address array
+ */
+static intCallback_Type * PWMIntCbfArra[PWM_CH_MAX][PWM_INT_ALL]= {
+    {NULL}
+};
+
+
+/*@} end of group PWM_Private_Variables */
+
+/** @defgroup  PWM_Global_Variables
+ *  @{
+ */
+
+/*@} end of group PWM_Global_Variables */
+
+/** @defgroup  PWM_Private_Fun_Declaration
+ *  @{
+ */
+#ifndef BFLB_USE_HAL_DRIVER
+static BL_Err_Type PWM_IntHandler(IRQn_Type intPeriph);
+#endif
+
+/*@} end of group PWM_Private_Fun_Declaration */
+
+/** @defgroup  PWM_Private_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  PWM interrupt handle
+ *
+ * @param  intPeriph: Select the peripheral, such as PWM0_IRQn
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+static BL_Err_Type PWM_IntHandler(IRQn_Type intPeriph)
+{
+    uint32_t i;
+    uint32_t tmpVal;
+    uint32_t timeoutCnt = PWM_INT_TIMEOUT_COUNT;
+    /* Get channel register */
+    uint32_t PWMx = PWM_BASE;
+    
+    for (i = 0; i < PWM_CH_MAX; i++) {
+        tmpVal = BL_RD_REG(PWMx, PWM_INT_CONFIG);
+        if ((BL_GET_REG_BITS_VAL(tmpVal, PWM_INTERRUPT_STS) & (1 << i)) != 0) {
+            /* Clear interrupt */
+            tmpVal |= (1 << (i + PWM_INT_CLEAR_POS));
+            BL_WR_REG(PWMx, PWM_INT_CONFIG, tmpVal);
+            /* FIXME: we need set pwm_int_clear to 0 by software and 
+               before this,we must make sure pwm_interrupt_sts is 0*/
+            do{
+                tmpVal = BL_RD_REG(PWMx, PWM_INT_CONFIG);
+                timeoutCnt--;
+                if(timeoutCnt == 0){
+                    break;
+                }
+            }while(BL_GET_REG_BITS_VAL(tmpVal,PWM_INTERRUPT_STS)&(1 << i));
+            
+            tmpVal &= (~(1 << (i + PWM_INT_CLEAR_POS)));
+            BL_WR_REG(PWMx, PWM_INT_CONFIG, tmpVal);
+            if (PWMIntCbfArra[i][PWM_INT_PULSE_CNT] != NULL) {
+                /* Call the callback function */
+                PWMIntCbfArra[i][PWM_INT_PULSE_CNT]();
+            }
+        }
+    }
+    return SUCCESS;
+}
+#endif
+
+/*@} end of group PWM_Private_Functions */
+
+/** @defgroup  PWM_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  PWM channel init
+ *
+ * @param  chCfg: PWM configuration
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type PWM_Channel_Init(PWM_CH_CFG_Type *chCfg)
+{
+    uint32_t tmpVal;
+    uint32_t timeoutCnt = PWM_STOP_TIMEOUT_COUNT;
+    /* Get channel register */
+    uint32_t PWMx = PWM_Get_Channel_Reg(chCfg->ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_PWM_CH_ID_TYPE(chCfg->ch));
+    CHECK_PARAM(IS_PWM_CLK_TYPE(chCfg->clk));
+    CHECK_PARAM(IS_PWM_POLARITY_TYPE(chCfg->pol));
+    CHECK_PARAM(IS_PWM_STOP_MODE_TYPE(chCfg->stopMode));
+
+    /* Disable clock gate */
+    GLB_AHB_Slave1_Clock_Gate(DISABLE,BL_AHB_SLAVE1_PWM);
+
+    /* Config pwm clock and polarity */
+    tmpVal = BL_RD_REG(PWMx, PWM_CONFIG);
+    BL_WR_REG(PWMx, PWM_CONFIG, BL_SET_REG_BIT(tmpVal, PWM_STOP_EN));
+    while(!BL_IS_REG_BIT_SET(BL_RD_REG(PWMx, PWM_CONFIG), PWM_STS_TOP)){
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }
+    tmpVal = BL_RD_REG(PWMx, PWM_CONFIG);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, PWM_REG_CLK_SEL, chCfg->clk);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, PWM_OUT_INV, chCfg->pol);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal, PWM_STOP_MODE, chCfg->stopMode);
+    BL_WR_REG(PWMx, PWM_CONFIG, tmpVal);
+
+    /* Config pwm division */
+    BL_WR_REG(PWMx, PWM_CLKDIV, chCfg->clkDiv);
+
+    /* Config pwm period and duty */
+    BL_WR_REG(PWMx, PWM_THRE1, chCfg->threshold1);
+    BL_WR_REG(PWMx, PWM_THRE2, chCfg->threshold2);
+    BL_WR_REG(PWMx, PWM_PERIOD, chCfg->period);
+
+    /* Config interrupt pulse count */
+    tmpVal = BL_RD_REG(PWMx, PWM_INTERRUPT);
+    BL_WR_REG(PWMx, PWM_INTERRUPT, BL_SET_REG_BITS_VAL(tmpVal, PWM_INT_PERIOD_CNT, chCfg->intPulseCnt));
+    PWM_IntMask(chCfg->ch,PWM_INT_PULSE_CNT,chCfg->intPulseCnt!=0?UNMASK:MASK);
+
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(PWM_IRQn,PWM_IRQHandler);
+#endif
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  PWM channel update source memory address and len
+ *
+ * @param  ch: PWM channel
+ * @param  period: period
+ * @param  threshold1: threshold1
+ * @param  threshold2: threshold2
+ *
+ * @return None
+ *
+*******************************************************************************/
+void PWM_Channel_Update(PWM_CH_ID_Type ch,uint16_t period,uint16_t threshold1,uint16_t threshold2)
+{
+    /* Get channel register */
+    uint32_t PWMx = PWM_Get_Channel_Reg(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_PWM_CH_ID_TYPE(ch));
+
+    /* Config pwm period and duty */
+    BL_WR_REG(PWMx, PWM_THRE1, threshold1);
+    BL_WR_REG(PWMx, PWM_THRE2, threshold2);
+    BL_WR_REG(PWMx, PWM_PERIOD, period);
+}
+
+/****************************************************************************//**
+ * @brief  PWM channel update clock divider
+ *
+ * @param  ch: PWM channel
+ * @param  div: Clock divider
+ *
+ * @return None
+ *
+*******************************************************************************/
+void PWM_Channel_Set_Div(PWM_CH_ID_Type ch,uint16_t div)
+{
+    /* Get channel register */
+    uint32_t PWMx = PWM_Get_Channel_Reg(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_PWM_CH_ID_TYPE(ch));
+    
+    BL_WR_REG(PWMx, PWM_CLKDIV, div);
+}
+
+/****************************************************************************//**
+ * @brief  PWM channel update threshold1
+ *
+ * @param  ch: PWM channel
+ * @param  threshold1: threshold1
+ *
+ * @return None
+ *
+*******************************************************************************/
+void PWM_Channel_Set_Threshold1(PWM_CH_ID_Type ch,uint16_t threshold1)
+{
+    /* Get channel register */
+    uint32_t PWMx = PWM_Get_Channel_Reg(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_PWM_CH_ID_TYPE(ch));
+
+    /* Config pwm period and duty */
+    BL_WR_REG(PWMx, PWM_THRE1, threshold1);
+}
+
+/****************************************************************************//**
+ * @brief  PWM channel update threshold2
+ *
+ * @param  ch: PWM channel
+ * @param  threshold2: threshold2
+ *
+ * @return None
+ *
+*******************************************************************************/
+void PWM_Channel_Set_Threshold2(PWM_CH_ID_Type ch,uint16_t threshold2)
+{
+    /* Get channel register */
+    uint32_t PWMx = PWM_Get_Channel_Reg(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_PWM_CH_ID_TYPE(ch));
+
+    /* Config pwm period and duty */
+    BL_WR_REG(PWMx, PWM_THRE2, threshold2);
+}
+
+/****************************************************************************//**
+ * @brief  PWM channel update period
+ *
+ * @param  ch: PWM channel
+ * @param  period: period
+ *
+ * @return None
+ *
+*******************************************************************************/
+void PWM_Channel_Set_Period(PWM_CH_ID_Type ch,uint16_t period)
+{
+    /* Get channel register */
+    uint32_t PWMx = PWM_Get_Channel_Reg(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_PWM_CH_ID_TYPE(ch));
+
+    /* Config pwm period and duty */
+    BL_WR_REG(PWMx, PWM_PERIOD, period);
+}
+
+/****************************************************************************//**
+ * @brief  PWM get configuration
+ *
+ * @param  ch: PWM channel
+ * @param  period: period pointer
+ * @param  threshold1: threshold1 pointer
+ * @param  threshold2: threshold2 pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void PWM_Channel_Get(PWM_CH_ID_Type ch,uint16_t *period,uint16_t *threshold1,uint16_t *threshold2)
+{
+    uint32_t tmpVal;
+    /* Get channel register */
+    uint32_t PWMx = PWM_Get_Channel_Reg(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_PWM_CH_ID_TYPE(ch));
+
+    /* get pwm period and duty */
+    tmpVal = BL_RD_REG(PWMx, PWM_THRE1);
+    *threshold1 = BL_GET_REG_BITS_VAL(tmpVal, PWM_THRE1);
+    tmpVal = BL_RD_REG(PWMx, PWM_THRE2);
+    *threshold2 = BL_GET_REG_BITS_VAL(tmpVal, PWM_THRE2);
+    tmpVal = BL_RD_REG(PWMx, PWM_PERIOD);
+    *period = BL_GET_REG_BITS_VAL(tmpVal, PWM_PERIOD);
+}
+
+/****************************************************************************//**
+ * @brief  PWM enable
+ *
+ * @param  ch: PWM channel number
+ *
+ * @return None
+ *
+*******************************************************************************/
+void PWM_Channel_Enable(PWM_CH_ID_Type ch)
+{
+    uint32_t tmpVal;
+    /* Get channel register */
+    uint32_t PWMx = PWM_Get_Channel_Reg(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_PWM_CH_ID_TYPE(ch));
+
+    /* Config pwm clock to enable pwm */
+    tmpVal = BL_RD_REG(PWMx, PWM_CONFIG);
+    BL_WR_REG(PWMx, PWM_CONFIG, BL_CLR_REG_BIT(tmpVal, PWM_STOP_EN));
+}
+
+/****************************************************************************//**
+ * @brief  PWM disable
+ *
+ * @param  ch: PWM channel number
+ *
+ * @return None
+ *
+*******************************************************************************/
+void PWM_Channel_Disable(PWM_CH_ID_Type ch)
+{
+    uint32_t tmpVal;
+    /* Get channel register */
+    uint32_t PWMx = PWM_Get_Channel_Reg(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_PWM_CH_ID_TYPE(ch));
+
+    /* Config pwm clock to disable pwm */
+    tmpVal = BL_RD_REG(PWMx, PWM_CONFIG);
+    BL_WR_REG(PWMx, PWM_CONFIG, BL_SET_REG_BIT(tmpVal, PWM_STOP_EN));
+    PWM_IntMask(ch,PWM_INT_PULSE_CNT,MASK);  
+}
+
+/****************************************************************************//**
+ * @brief  PWM channel software mode enable or disable
+ *
+ * @param  ch: PWM channel number
+ * @param  enable: Enable or disable
+ *
+ * @return None
+ *
+*******************************************************************************/
+void PWM_SW_Mode(PWM_CH_ID_Type ch,BL_Fun_Type enable)
+{
+    uint32_t tmpVal;
+    /* Get channel register */
+    uint32_t PWMx = PWM_Get_Channel_Reg(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_PWM_CH_ID_TYPE(ch));
+    
+    tmpVal = BL_RD_REG(PWMx,PWM_CONFIG);
+    BL_WR_REG(PWMx,PWM_CONFIG,BL_SET_REG_BITS_VAL(tmpVal,PWM_SW_MODE,enable));
+}
+
+/****************************************************************************//**
+ * @brief  PWM channel force output high or low
+ *
+ * @param  ch: PWM channel number
+ * @param  value: Output value
+ *
+ * @return None
+ *
+*******************************************************************************/
+void PWM_SW_Force_Value(PWM_CH_ID_Type ch,uint8_t value)
+{
+    uint32_t tmpVal;
+    /* Get channel register */
+    uint32_t PWMx = PWM_Get_Channel_Reg(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_PWM_CH_ID_TYPE(ch));
+    
+    tmpVal = BL_RD_REG(PWMx,PWM_CONFIG);
+    BL_WR_REG(PWMx,PWM_CONFIG,BL_SET_REG_BITS_VAL(tmpVal,PWM_SW_FORCE_VAL,value));
+}
+
+
+/****************************************************************************//**
+ * @brief  PWM channel force output high
+ *
+ * @param  ch: PWM channel number
+ *
+ * @return None
+ *
+*******************************************************************************/
+void PWM_Channel_Fource_Output(PWM_CH_ID_Type ch)
+{
+    uint32_t tmpVal;
+    /* Get channel register */
+    uint32_t PWMx = PWM_Get_Channel_Reg(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_PWM_CH_ID_TYPE(ch));
+
+    tmpVal = BL_RD_REG(PWMx, PWM_CONFIG);
+    BL_WR_REG(PWMx, PWM_CONFIG, BL_SET_REG_BIT(tmpVal, PWM_SW_MODE));
+}
+
+/****************************************************************************//**
+ * @brief  Mask/Unmask the PWM interrupt
+ *
+ * @param  ch: PWM channel number
+ * @param  intType: Specifies the interrupt type
+ * @param  intMask: Enable/Disable Specified interrupt type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void PWM_IntMask(PWM_CH_ID_Type ch,PWM_INT_Type intType,BL_Mask_Type intMask)
+{
+    uint32_t tmpVal;
+    /* Get channel register */
+    uint32_t PWMx = PWM_Get_Channel_Reg(ch);
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_PWM_CH_ID_TYPE(ch));
+    CHECK_PARAM(IS_PWM_INT_TYPE(intType));
+
+    tmpVal = BL_RD_REG(PWMx, PWM_INTERRUPT);
+
+    switch(intType) {
+        case PWM_INT_PULSE_CNT:
+            if(intMask == UNMASK) {
+                /* UNMASK(Enable) this interrupt */
+                BL_WR_REG(PWMx, PWM_INTERRUPT, BL_SET_REG_BIT(tmpVal, PWM_INT_ENABLE));
+            }
+            else {
+                /* MASK(Disable) this interrupt */
+                BL_WR_REG(PWMx, PWM_INTERRUPT, BL_CLR_REG_BIT(tmpVal, PWM_INT_ENABLE));
+            }
+            break;
+        case PWM_INT_ALL:
+            if(intMask == UNMASK) {
+                /* UNMASK(Enable) this interrupt */
+                BL_WR_REG(PWMx, PWM_INTERRUPT, BL_SET_REG_BIT(tmpVal, PWM_INT_ENABLE));
+            }
+            else {
+                /* MASK(Disable) this interrupt */
+                BL_WR_REG(PWMx, PWM_INTERRUPT, BL_CLR_REG_BIT(tmpVal, PWM_INT_ENABLE));
+            }
+            break;
+
+        default:
+            break;
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Install PWM interrupt callback function
+ *
+ * @param  ch: PWM channel number
+ * @param  intType: PWM interrupt type
+ * @param  cbFun: Pointer to interrupt callback function. The type should be void (*fn)(void)
+ *
+ * @return None
+ *
+*******************************************************************************/
+void PWM_Int_Callback_Install(PWM_CH_ID_Type ch,uint32_t intType,intCallback_Type* cbFun)
+{
+    PWMIntCbfArra[ch][intType] = cbFun;
+}
+
+/****************************************************************************//**
+ * @brief  PWM interrupt function
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void PWM_IRQHandler(void)
+{
+   PWM_IntHandler(PWM_IRQn);
+}
+#endif
+
+/*@} end of group PWM_Public_Functions */
+
+/*@} end of group PWM */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_qdec.c b/drivers/bl702_driver/std_drv/src/bl702_qdec.c
new file mode 100644
index 00000000..4bade555
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_qdec.c
@@ -0,0 +1,542 @@
+/**
+  ******************************************************************************
+  * @file    bl702_qdec.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_qdec.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  QDEC
+ *  @{
+ */
+
+/** @defgroup  QDEC_Private_Macros
+ *  @{
+ */
+
+/*@} end of group QDEC_Private_Macros */
+
+/** @defgroup  QDEC_Private_Types
+ *  @{
+ */
+
+/*@} end of group QDEC_Private_Types */
+
+/** @defgroup  QDEC_Private_Variables
+ *  @{
+ */
+static const uint32_t qdecAddr[QDEC_ID_MAX] = {QDEC0_BASE,QDEC1_BASE,QDEC2_BASE};
+static intCallback_Type * qdecIntCbfArra[QDEC_ID_MAX][QDEC_INT_ALL]= {{NULL,NULL,NULL,NULL},
+                                                                      {NULL,NULL,NULL,NULL},
+                                                                      {NULL,NULL,NULL,NULL}};
+
+
+/*@} end of group QDEC_Private_Variables */
+
+/** @defgroup  QDEC_Global_Variables
+ *  @{
+ */
+
+/*@} end of group QDEC_Global_Variables */
+
+/** @defgroup  QDEC_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group QDEC_Private_Fun_Declaration */
+
+/** @defgroup  QDEC_Private_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  QDEC init
+ *
+ * @param  qdecId: QDEC ID
+ * @param  qdecCfg: QDEC config
+ *
+ * @return None
+ *
+*******************************************************************************/
+void QDEC_Init(QDEC_ID_Type qdecId,QDEC_CFG_Type *qdecCfg)
+{
+    uint32_t tmpVal=0;
+    uint32_t QDECx = qdecAddr[qdecId];
+    
+    CHECK_PARAM(IS_QDEC_SAMPLE_MODE_TYPE(qdecCfg->sampleCfg.sampleMod));
+    CHECK_PARAM(IS_QDEC_SAMPLE_PERIOD_TYPE(qdecCfg->sampleCfg.samplePeriod));
+    CHECK_PARAM(IS_QDEC_REPORT_MODE_TYPE(qdecCfg->reportCfg.reportMod));
+    CHECK_PARAM((qdecCfg->ledCfg.ledPeriod)<=0x1FF);
+    CHECK_PARAM((qdecCfg->deglitchCfg.deglitchStrength)<=0xF);
+    
+    /* qdec_ctrl */
+    tmpVal=BL_RD_REG(QDECx,QDEC0_CTRL0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_SPL_PERIOD,qdecCfg->sampleCfg.samplePeriod);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_RPT_PERIOD,qdecCfg->reportCfg.reportPeriod);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_LED_EN,qdecCfg->ledCfg.ledEn);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_LED_POL,qdecCfg->ledCfg.ledSwap);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_DEG_EN,qdecCfg->deglitchCfg.deglitchEn);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_DEG_CNT,qdecCfg->deglitchCfg.deglitchStrength);
+    BL_WR_REG(QDECx,QDEC0_CTRL0,tmpVal);
+    
+    /* qdec_ctrl1 */
+    tmpVal=BL_RD_REG(QDECx,QDEC0_CTRL1);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_SPL_MODE,qdecCfg->sampleCfg.sampleMod);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_RPT_MODE,qdecCfg->reportCfg.reportMod);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_LED_PERIOD,qdecCfg->ledCfg.ledPeriod);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_ACC_MODE,qdecCfg->accMod);
+    BL_WR_REG(QDECx,QDEC0_CTRL1,tmpVal);
+
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(QDEC0_IRQn,QDEC0_IRQHandler);
+    Interrupt_Handler_Register(QDEC1_IRQn,QDEC1_IRQHandler);
+    Interrupt_Handler_Register(QDEC2_IRQn,QDEC2_IRQHandler);
+#endif
+}
+
+/****************************************************************************//**
+ * @brief  QDEC deinit
+ *
+ * @param  qdecId: QDEC ID
+ *
+ * @return None
+ *
+*******************************************************************************/
+void QDEC_DeInit(QDEC_ID_Type qdecId)
+{
+    uint32_t tmpVal=0;
+    uint32_t QDECx = qdecAddr[qdecId];
+    
+    /* deconfig qdec */
+    tmpVal=BL_RD_REG(QDECx,QDEC0_CTRL0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_RPT_PERIOD,10);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_SPL_PERIOD,2);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_DEG_CNT,0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_DEG_EN,0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_LED_POL,1);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_LED_EN,0);
+    BL_WR_REG(QDECx,QDEC0_CTRL0,tmpVal);
+    tmpVal=BL_RD_REG(QDECx,QDEC0_CTRL1);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_LED_PERIOD,0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_INPUT_SWAP,0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_RPT_MODE,0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_SPL_MODE,0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_ACC_MODE,1);
+    BL_WR_REG(QDECx,QDEC0_CTRL1,tmpVal);
+    
+    /* enable qdec */
+    tmpVal=BL_RD_REG(QDECx,QDEC0_CTRL0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_EN,1);
+    BL_WR_REG(QDECx,QDEC0_CTRL0,tmpVal);
+    
+    /* deconfig interrupt */
+    tmpVal=BL_RD_REG(QDECx,QDEC0_INT_EN);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_OVERFLOW_EN,0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_DBL_RDY_EN,0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_SPL_RDY_EN,0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_RPT_RDY_EN,1);
+    BL_WR_REG(QDECx,QDEC0_INT_EN,tmpVal);
+    
+    /* clear status */
+    tmpVal=BL_RD_REG(QDECx,QDEC0_INT_CLR);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_OVERFLOW_CLR,1);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_DBL_RDY_CLR,1);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_SPL_RDY_CLR,1);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_RPT_RDY_CLR,1);
+    BL_WR_REG(QDECx,QDEC0_INT_STS,tmpVal);
+    
+    /* clear value */
+    tmpVal=BL_RD_REG(QDECx,QDEC0_VALUE);
+    
+    /* disable qdec */
+    tmpVal=BL_RD_REG(QDECx,QDEC0_CTRL0);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_EN,0);
+    BL_WR_REG(QDECx,QDEC0_CTRL0,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  QDEC enable
+ *
+ * @param  qdecId: QDEC ID
+ *
+ * @return None
+ *
+*******************************************************************************/
+void QDEC_Enable(QDEC_ID_Type qdecId)
+{
+    uint32_t tmpVal=0;
+    uint32_t QDECx = qdecAddr[qdecId];
+    
+    /* qdec_ctrl */
+    tmpVal=BL_RD_REG(QDECx,QDEC0_CTRL0);
+    tmpVal=BL_SET_REG_BIT(tmpVal,QDEC_EN);
+    BL_WR_REG(QDECx,QDEC0_CTRL0,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  QDEC disable
+ *
+ * @param  qdecId: QDEC ID
+ *
+ * @return None
+ *
+*******************************************************************************/
+void QDEC_Disable(QDEC_ID_Type qdecId)
+{
+    uint32_t tmpVal=0;
+    uint32_t QDECx = qdecAddr[qdecId];
+    
+    /* qdec_ctrl */
+    tmpVal=BL_RD_REG(QDECx,QDEC0_CTRL0);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,QDEC_EN);
+    BL_WR_REG(QDECx,QDEC0_CTRL0,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  set QDEC interrupt mask
+ *
+ * @param  qdecId: QDEC ID
+ * @param  intType: QDEC interrupt type
+ * @param  intMask: MASK or UNMASK
+ *
+ * @return None
+ *
+*******************************************************************************/
+void QDEC_SetIntMask(QDEC_ID_Type qdecId,QDEC_INT_Type intType,BL_Mask_Type intMask)
+{
+    uint32_t tmpVal=0;
+    uint32_t QDECx = qdecAddr[qdecId];
+    
+    CHECK_PARAM(IS_QDEC_INT_TYPE(intType));
+    
+    /* qdec_int_en */
+    tmpVal=BL_RD_REG(QDECx,QDEC0_INT_EN);
+    switch(intType){
+        case QDEC_INT_REPORT:
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_RPT_RDY_EN,(intMask?0:1));
+            break;
+        
+        case QDEC_INT_SAMPLE:
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_SPL_RDY_EN,(intMask?0:1));
+            break;
+        
+        case QDEC_INT_ERROR:
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_DBL_RDY_EN,(intMask?0:1));
+            break;
+        
+        case QDEC_INT_OVERFLOW:
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,QDEC_OVERFLOW_EN,(intMask?0:1));
+            break;
+        
+        default :
+            break;
+    }
+    BL_WR_REG(QDECx,QDEC0_INT_EN,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  get QDEC interrupt mask
+ *
+ * @param  qdecId: QDEC ID
+ * @param  intType: QDEC interrupt type
+ *
+ * @return MASK or UNMASK
+ *
+*******************************************************************************/
+BL_Mask_Type QDEC_GetIntMask(QDEC_ID_Type qdecId,QDEC_INT_Type intType)
+{
+    uint32_t tmpVal=0;
+    uint32_t QDECx = qdecAddr[qdecId];
+    
+    CHECK_PARAM(IS_QDEC_INT_TYPE(intType));
+    
+    /* qdec_int_en */
+    tmpVal=BL_RD_REG(QDECx,QDEC0_INT_EN);
+    switch(intType){
+        case QDEC_INT_REPORT:
+            return BL_GET_REG_BITS_VAL(tmpVal,QDEC_RPT_RDY_EN)?UNMASK:MASK;
+        
+        case QDEC_INT_SAMPLE:
+            return BL_GET_REG_BITS_VAL(tmpVal,QDEC_SPL_RDY_EN)?UNMASK:MASK;
+        
+        case QDEC_INT_ERROR:
+            return BL_GET_REG_BITS_VAL(tmpVal,QDEC_DBL_RDY_EN)?UNMASK:MASK;
+        
+        case QDEC_INT_OVERFLOW:
+            return BL_GET_REG_BITS_VAL(tmpVal,QDEC_OVERFLOW_EN)?UNMASK:MASK;
+        
+        default :
+            return UNMASK;
+    }
+}
+
+/****************************************************************************//**
+ * @brief  QDEC interrupt callback install
+ *
+ * @param  qdecId: QDEC ID
+ * @param  intType: QDEC interrupt type
+ * @param  cbFun: interrupt callback
+ *
+ * @return None
+ *
+*******************************************************************************/
+void QDEC_Int_Callback_Install(QDEC_ID_Type qdecId,QDEC_INT_Type intType,intCallback_Type* cbFun)
+{
+    qdecIntCbfArra[qdecId][intType]= cbFun;
+}
+
+/****************************************************************************//**
+ * @brief  QDEC get interrupt status
+ *
+ * @param  qdecId: QDEC ID
+ * @param  intType: QDEC interrupt type
+ *
+ * @return SET or RESET
+ *
+*******************************************************************************/
+BL_Sts_Type QDEC_Get_Int_Status(QDEC_ID_Type qdecId,QDEC_INT_Type intType)
+{
+    uint32_t tmpVal=0;
+    uint32_t QDECx = qdecAddr[qdecId];
+    
+    CHECK_PARAM(IS_QDEC_INT_TYPE(intType));
+    
+    /* qdec_int_sts */
+    tmpVal=BL_RD_REG(QDECx,QDEC0_INT_STS);
+    switch(intType){
+        case QDEC_INT_REPORT:
+            return BL_GET_REG_BITS_VAL(tmpVal,QDEC_RPT_RDY_STS)?SET:RESET;
+        
+        case QDEC_INT_SAMPLE:
+            return BL_GET_REG_BITS_VAL(tmpVal,QDEC_SPL_RDY_STS)?SET:RESET;
+        
+        case QDEC_INT_ERROR:
+            return BL_GET_REG_BITS_VAL(tmpVal,QDEC_DBL_RDY_STS)?SET:RESET;
+        
+        case QDEC_INT_OVERFLOW:
+            return BL_GET_REG_BITS_VAL(tmpVal,QDEC_OVERFLOW_STS)?SET:RESET;
+        
+        default :
+            return RESET;
+    }
+}
+
+/****************************************************************************//**
+ * @brief  QDEC clear interrupt status
+ *
+ * @param  qdecId: QDEC ID
+ * @param  intType: QDEC interrupt type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void QDEC_Clr_Int_Status(QDEC_ID_Type qdecId,QDEC_INT_Type intType)
+{
+    uint32_t tmpVal=0;
+    uint32_t QDECx = qdecAddr[qdecId];
+    
+    CHECK_PARAM(IS_QDEC_INT_TYPE(intType));
+    
+    /* qdec_int_clr */
+    tmpVal=BL_RD_REG(QDECx,QDEC0_INT_CLR);
+    switch(intType){
+        case QDEC_INT_REPORT:
+            tmpVal=BL_SET_REG_BIT(tmpVal,QDEC_RPT_RDY_CLR);
+            break;
+        
+        case QDEC_INT_SAMPLE:
+            tmpVal=BL_SET_REG_BIT(tmpVal,QDEC_SPL_RDY_CLR);
+            break;
+        
+        case QDEC_INT_ERROR:
+            tmpVal=BL_SET_REG_BIT(tmpVal,QDEC_DBL_RDY_CLR);
+            break;
+        
+        case QDEC_INT_OVERFLOW:
+            tmpVal=BL_SET_REG_BIT(tmpVal,QDEC_OVERFLOW_CLR);
+            break;
+        
+        default :
+            break;
+    }
+    BL_WR_REG(QDECx,QDEC0_INT_CLR,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  QDEC get sample direction
+ *
+ * @param  qdecId: QDEC ID
+ *
+ * @return None
+ *
+*******************************************************************************/
+QDEC_DIRECTION_Type QDEC_Get_Sample_Direction(QDEC_ID_Type qdecId)
+{
+    uint32_t tmpVal=0;
+    uint32_t QDECx = qdecAddr[qdecId];
+    
+    /* qdec_value */
+    tmpVal=BL_RD_REG(QDECx,QDEC0_VALUE);
+    
+    return (QDEC_DIRECTION_Type)BL_GET_REG_BITS_VAL(tmpVal,QDEC_SPL_VAL);
+}
+
+/****************************************************************************//**
+ * @brief  QDEC get error count
+ *
+ * @param  qdecId: QDEC ID
+ *
+ * @return None
+ *
+*******************************************************************************/
+uint8_t QDEC_Get_Err_Cnt(QDEC_ID_Type qdecId)
+{
+    uint32_t tmpVal=0;
+    uint32_t QDECx = qdecAddr[qdecId];
+    
+    /* qdec_value */
+    tmpVal=BL_RD_REG(QDECx,QDEC0_VALUE);
+    
+    return BL_GET_REG_BITS_VAL(tmpVal,QDEC_ACC2_VAL);
+}
+
+/****************************************************************************//**
+ * @brief  QDEC get sample value
+ *
+ * @param  qdecId: QDEC ID
+ *
+ * @return None
+ *
+*******************************************************************************/
+uint16_t QDEC_Get_Sample_Val(QDEC_ID_Type qdecId)
+{
+    uint32_t tmpVal=0;
+    uint32_t QDECx = qdecAddr[qdecId];
+    
+    /* qdec_value */
+    tmpVal=BL_RD_REG(QDECx,QDEC0_VALUE);
+    
+    return BL_GET_REG_BITS_VAL(tmpVal,QDEC_ACC1_VAL);
+}
+
+/****************************************************************************//**
+ * @brief  QDEC interrupt handler
+ *
+ * @param  qdecId: QDEC ID
+ * @param  intType: QDEC interrupt type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void QDEC_IntHandler(QDEC_ID_Type qdecId,QDEC_INT_Type intType)
+{
+    if(SET==QDEC_Get_Int_Status(qdecId,intType)){
+        QDEC_Clr_Int_Status(qdecId,intType);
+        if(qdecIntCbfArra[qdecId][intType]!=NULL){
+            qdecIntCbfArra[qdecId][intType]();
+        }
+    }
+}
+
+/****************************************************************************//**
+ * @brief  QDEC0 interrupt handler
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void QDEC0_IRQHandler(void)
+{
+    QDEC_INT_Type intType;
+    
+    for(intType=QDEC_INT_REPORT;intType
+
+/** @addtogroup  BL702_Periph_Driver
+ *  @{
+ */
+
+/** @defgroup ROMDRIVER
+ *  @brief ROMDRIVER common functions
+ *  @{
+ */
+
+/** @defgroup ROMDRIVER_Private_Type
+ *  @{
+ */
+uint32_t const romDriverTable[]={
+    0x07020001,
+    0x00000000,
+    0x00000000,
+    0x00000000,
+    
+    [ROM_API_INDEX_AON_Power_On_MBG]     = (uint32_t)AON_Power_On_MBG,
+    [ROM_API_INDEX_AON_Power_Off_MBG]    = (uint32_t)AON_Power_Off_MBG,
+    [ROM_API_INDEX_AON_Power_On_XTAL]    = (uint32_t)AON_Power_On_XTAL,
+    [ROM_API_INDEX_AON_Set_Xtal_CapCode] = (uint32_t)AON_Set_Xtal_CapCode,
+    [ROM_API_INDEX_AON_Power_Off_XTAL]   = (uint32_t)AON_Power_Off_XTAL,
+    
+    [ROM_API_INDEX_ASM_Delay_Us]                        = (uint32_t)ASM_Delay_Us,
+    [ROM_API_INDEX_BL702_Delay_US]                      = (uint32_t)BL702_Delay_US,
+    [ROM_API_INDEX_BL702_Delay_MS]                      = (uint32_t)BL702_Delay_MS,
+    [ROM_API_INDEX_BL702_MemCpy]                        = (uint32_t)BL702_MemCpy,
+    [ROM_API_INDEX_BL702_MemCpy4]                       = (uint32_t)BL702_MemCpy4,
+    [ROM_API_INDEX_BL702_MemCpy_Fast]                   = (uint32_t)BL702_MemCpy_Fast,
+    [ROM_API_INDEX_ARCH_MemCpy_Fast]                    = (uint32_t)ARCH_MemCpy_Fast,
+    [ROM_API_INDEX_BL702_MemSet]                        = (uint32_t)BL702_MemSet,
+    [ROM_API_INDEX_BL702_MemSet4]                       = (uint32_t)BL702_MemSet4,
+    [ROM_API_INDEX_BL702_MemCmp]                        = (uint32_t)BL702_MemCmp,
+    [ROM_API_INDEX_BFLB_Soft_CRC32]                     = (uint32_t)BFLB_Soft_CRC32,
+    
+    [ROM_API_INDEX_GLB_Get_Root_CLK_Sel]                = (uint32_t)GLB_Get_Root_CLK_Sel,
+    [ROM_API_INDEX_GLB_Set_System_CLK_Div]              = (uint32_t)GLB_Set_System_CLK_Div,
+    [ROM_API_INDEX_GLB_Get_BCLK_Div]                    = (uint32_t)GLB_Get_BCLK_Div,
+    [ROM_API_INDEX_GLB_Get_HCLK_Div]                    = (uint32_t)GLB_Get_HCLK_Div,
+    [ROM_API_INDEX_Update_SystemCoreClockWith_XTAL]     = (uint32_t)Update_SystemCoreClockWith_XTAL,
+    [ROM_API_INDEX_GLB_Set_System_CLK]                  = (uint32_t)GLB_Set_System_CLK,
+    [ROM_API_INDEX_System_Core_Clock_Update_From_RC32M] = (uint32_t)System_Core_Clock_Update_From_RC32M,
+    [ROM_API_INDEX_GLB_Set_SF_CLK]                      = (uint32_t)GLB_Set_SF_CLK,
+    [ROM_API_INDEX_GLB_Power_Off_DLL]                   = (uint32_t)GLB_Power_Off_DLL,
+    [ROM_API_INDEX_GLB_Power_On_DLL]                    = (uint32_t)GLB_Power_On_DLL,
+    [ROM_API_INDEX_GLB_Enable_DLL_All_Clks]             = (uint32_t)GLB_Enable_DLL_All_Clks,
+    [ROM_API_INDEX_GLB_Enable_DLL_Clk]                  = (uint32_t)GLB_Enable_DLL_Clk,
+    [ROM_API_INDEX_GLB_Disable_DLL_All_Clks]            = (uint32_t)GLB_Disable_DLL_All_Clks,
+    [ROM_API_INDEX_GLB_Disable_DLL_Clk]                 = (uint32_t)GLB_Disable_DLL_Clk,
+    [ROM_API_INDEX_GLB_SW_System_Reset]                 = (uint32_t)GLB_SW_System_Reset,
+    [ROM_API_INDEX_GLB_SW_CPU_Reset]                    = (uint32_t)GLB_SW_CPU_Reset,
+    [ROM_API_INDEX_GLB_SW_POR_Reset]                    = (uint32_t)GLB_SW_POR_Reset,
+    [ROM_API_INDEX_GLB_Select_Internal_Flash]           = (uint32_t)GLB_Select_Internal_Flash,
+    [ROM_API_INDEX_GLB_Swap_Flash_Pin]                  = (uint32_t)GLB_Swap_Flash_Pin,
+    [ROM_API_INDEX_GLB_Swap_Flash_CS_IO2_Pin]           = (uint32_t)GLB_Swap_Flash_CS_IO2_Pin,
+    [ROM_API_INDEX_GLB_Swap_Flash_IO0_IO3_Pin]          = (uint32_t)GLB_Swap_Flash_IO0_IO3_Pin,
+    [ROM_API_INDEX_GLB_Select_Internal_PSram]           = (uint32_t)GLB_Select_Internal_PSram,
+    [ROM_API_INDEX_GLB_GPIO_Init]                       = (uint32_t)GLB_GPIO_Init,
+    [ROM_API_INDEX_GLB_GPIO_OUTPUT_Enable]              = (uint32_t)GLB_GPIO_OUTPUT_Enable,
+    [ROM_API_INDEX_GLB_GPIO_OUTPUT_Disable]             = (uint32_t)GLB_GPIO_OUTPUT_Disable,
+    [ROM_API_INDEX_GLB_GPIO_Set_HZ]                     = (uint32_t)GLB_GPIO_Set_HZ,
+    [ROM_API_INDEX_GLB_Deswap_Flash_Pin]                = (uint32_t)GLB_Deswap_Flash_Pin,
+    [ROM_API_INDEX_GLB_Select_External_Flash]           = (uint32_t)GLB_Select_External_Flash,
+    [ROM_API_INDEX_GLB_GPIO_Get_Fun]                    = (uint32_t)GLB_GPIO_Get_Fun,
+    
+    [ROM_API_INDEX_EF_Ctrl_Busy]                        = (uint32_t)EF_Ctrl_Busy,
+    [ROM_API_INDEX_EF_Ctrl_Sw_AHB_Clk_0]                = (uint32_t)EF_Ctrl_Sw_AHB_Clk_0,
+    [ROM_API_INDEX_EF_Ctrl_Load_Efuse_R0]               = (uint32_t)EF_Ctrl_Load_Efuse_R0,
+    [ROM_API_INDEX_EF_Ctrl_Clear]                       = (uint32_t)EF_Ctrl_Clear,
+    [ROM_API_INDEX_EF_Ctrl_Get_Trim_Parity]             = (uint32_t)EF_Ctrl_Get_Trim_Parity,
+    [ROM_API_INDEX_EF_Ctrl_Read_RC32K_Trim]             = (uint32_t)EF_Ctrl_Read_RC32K_Trim,
+    [ROM_API_INDEX_EF_Ctrl_Read_RC32M_Trim]             = (uint32_t)EF_Ctrl_Read_RC32M_Trim,
+    
+    [ROM_API_INDEX_PDS_Trim_RC32M]                      = (uint32_t)PDS_Trim_RC32M,
+    [ROM_API_INDEX_PDS_Select_RC32M_As_PLL_Ref]         = (uint32_t)PDS_Select_RC32M_As_PLL_Ref,
+    [ROM_API_INDEX_PDS_Select_XTAL_As_PLL_Ref]          = (uint32_t)PDS_Select_XTAL_As_PLL_Ref,
+    [ROM_API_INDEX_PDS_Power_On_PLL]                    = (uint32_t)PDS_Power_On_PLL,
+    [ROM_API_INDEX_PDS_Enable_PLL_All_Clks]             = (uint32_t)PDS_Enable_PLL_All_Clks,
+    [ROM_API_INDEX_PDS_Disable_PLL_All_Clks]            = (uint32_t)PDS_Disable_PLL_All_Clks,
+    [ROM_API_INDEX_PDS_Enable_PLL_Clk]                  = (uint32_t)PDS_Enable_PLL_Clk,
+    [ROM_API_INDEX_PDS_Disable_PLL_Clk]                 = (uint32_t)PDS_Disable_PLL_Clk,
+    [ROM_API_INDEX_PDS_Power_Off_PLL]                   = (uint32_t)PDS_Power_Off_PLL,
+    [ROM_API_INDEX_PDS_Reset]                           = (uint32_t)PDS_Reset,
+    [ROM_API_INDEX_PDS_Enable]                          = (uint32_t)PDS_Enable,
+    [ROM_API_INDEX_PDS_Auto_Time_Config]                = (uint32_t)PDS_Auto_Time_Config,
+    [ROM_API_INDEX_PDS_Auto_Enable]                     = (uint32_t)PDS_Auto_Enable,
+    [ROM_API_INDEX_PDS_Manual_Force_Turn_Off]           = (uint32_t)PDS_Manual_Force_Turn_Off,
+    [ROM_API_INDEX_PDS_Manual_Force_Turn_On]            = (uint32_t)PDS_Manual_Force_Turn_On,
+    
+    [ROM_API_INDEX_HBN_Enable]                          = (uint32_t)HBN_Enable,
+    [ROM_API_INDEX_HBN_Reset]                           = (uint32_t)HBN_Reset,
+    [ROM_API_INDEX_HBN_GPIO_Dbg_Pull_Cfg]               = (uint32_t)HBN_GPIO_Dbg_Pull_Cfg,
+    [ROM_API_INDEX_HBN_Trim_RC32K]                      = (uint32_t)HBN_Trim_RC32K,
+    [ROM_API_INDEX_HBN_Set_ROOT_CLK_Sel]                = (uint32_t)HBN_Set_ROOT_CLK_Sel,
+    
+    [ROM_API_INDEX_XIP_SFlash_State_Save]               = (uint32_t)XIP_SFlash_State_Save,
+    [ROM_API_INDEX_XIP_SFlash_State_Restore]            = (uint32_t)XIP_SFlash_State_Restore,
+    [ROM_API_INDEX_XIP_SFlash_Erase_Need_Lock]          = (uint32_t)XIP_SFlash_Erase_Need_Lock,
+    [ROM_API_INDEX_XIP_SFlash_Write_Need_Lock]          = (uint32_t)XIP_SFlash_Write_Need_Lock,
+    [ROM_API_INDEX_XIP_SFlash_Read_Need_Lock]           = (uint32_t)XIP_SFlash_Read_Need_Lock,
+    [ROM_API_INDEX_XIP_SFlash_GetJedecId_Need_Lock]     = (uint32_t)XIP_SFlash_GetJedecId_Need_Lock,
+    [ROM_API_INDEX_XIP_SFlash_GetDeviceId_Need_Lock]    = (uint32_t)XIP_SFlash_GetDeviceId_Need_Lock,
+    [ROM_API_INDEX_XIP_SFlash_GetUniqueId_Need_Lock]    = (uint32_t)XIP_SFlash_GetUniqueId_Need_Lock,
+    [ROM_API_INDEX_XIP_SFlash_Read_Via_Cache_Need_Lock] = (uint32_t)XIP_SFlash_Read_Via_Cache_Need_Lock,
+    [ROM_API_INDEX_XIP_SFlash_Read_With_Lock]           = (uint32_t)XIP_SFlash_Read_With_Lock,
+    [ROM_API_INDEX_XIP_SFlash_Write_With_Lock]          = (uint32_t)XIP_SFlash_Write_With_Lock,
+    [ROM_API_INDEX_XIP_SFlash_Erase_With_Lock]          = (uint32_t)XIP_SFlash_Erase_With_Lock,
+    
+    [ROM_API_INDEX_SFlash_Init]                      = (uint32_t)SFlash_Init,
+    [ROM_API_INDEX_SFlash_SetSPIMode]                = (uint32_t)SFlash_SetSPIMode,
+    [ROM_API_INDEX_SFlash_Read_Reg]                  = (uint32_t)SFlash_Read_Reg,
+    [ROM_API_INDEX_SFlash_Write_Reg]                 = (uint32_t)SFlash_Write_Reg,
+    [ROM_API_INDEX_SFlash_Read_Reg_With_Cmd]         = (uint32_t)SFlash_Read_Reg_With_Cmd,
+    [ROM_API_INDEX_SFlash_Write_Reg_With_Cmd]        = (uint32_t)SFlash_Write_Reg_With_Cmd,
+    [ROM_API_INDEX_SFlash_Busy]                      = (uint32_t)SFlash_Busy,
+    [ROM_API_INDEX_SFlash_Write_Enable]              = (uint32_t)SFlash_Write_Enable,
+    [ROM_API_INDEX_SFlash_Qspi_Enable]               = (uint32_t)SFlash_Qspi_Enable,
+    [ROM_API_INDEX_SFlash_Volatile_Reg_Write_Enable] = (uint32_t)SFlash_Volatile_Reg_Write_Enable,
+    [ROM_API_INDEX_SFlash_Chip_Erase]                = (uint32_t)SFlash_Chip_Erase,
+    [ROM_API_INDEX_SFlash_Sector_Erase]              = (uint32_t)SFlash_Sector_Erase,
+    [ROM_API_INDEX_SFlash_Blk32_Erase]               = (uint32_t)SFlash_Blk32_Erase,
+    [ROM_API_INDEX_SFlash_Blk64_Erase]               = (uint32_t)SFlash_Blk64_Erase,
+    [ROM_API_INDEX_SFlash_Erase]                     = (uint32_t)SFlash_Erase,
+    [ROM_API_INDEX_SFlash_Program]                   = (uint32_t)SFlash_Program,
+    [ROM_API_INDEX_SFlash_GetUniqueId]               = (uint32_t)SFlash_GetUniqueId,
+    [ROM_API_INDEX_SFlash_GetJedecId]                = (uint32_t)SFlash_GetJedecId,
+    [ROM_API_INDEX_SFlash_GetDeviceId]               = (uint32_t)SFlash_GetDeviceId,
+    [ROM_API_INDEX_SFlash_Powerdown]                 = (uint32_t)SFlash_Powerdown,
+    [ROM_API_INDEX_SFlash_Releae_Powerdown]          = (uint32_t)SFlash_Releae_Powerdown,
+    [ROM_API_INDEX_SFlash_Restore_From_Powerdown]    = (uint32_t)SFlash_Restore_From_Powerdown,
+    [ROM_API_INDEX_SFlash_SetBurstWrap]              = (uint32_t)SFlash_SetBurstWrap,
+    [ROM_API_INDEX_SFlash_DisableBurstWrap]          = (uint32_t)SFlash_DisableBurstWrap,
+    [ROM_API_INDEX_SFlash_Software_Reset]            = (uint32_t)SFlash_Software_Reset,
+    [ROM_API_INDEX_SFlash_Reset_Continue_Read]       = (uint32_t)SFlash_Reset_Continue_Read,
+    [ROM_API_INDEX_SFlash_Set_IDbus_Cfg]             = (uint32_t)SFlash_Set_IDbus_Cfg,
+    [ROM_API_INDEX_SFlash_IDbus_Read_Enable]         = (uint32_t)SFlash_IDbus_Read_Enable,
+    [ROM_API_INDEX_SFlash_Cache_Read_Enable]         = (uint32_t)SFlash_Cache_Read_Enable,
+    [ROM_API_INDEX_SFlash_Cache_Read_Disable]        = (uint32_t)SFlash_Cache_Read_Disable,
+    [ROM_API_INDEX_SFlash_Read]                      = (uint32_t)SFlash_Read,
+    
+    [ROM_API_INDEX_L1C_Cache_Enable_Set]             = (uint32_t)L1C_Cache_Enable_Set,
+    [ROM_API_INDEX_L1C_Cache_Write_Set]              = (uint32_t)L1C_Cache_Write_Set,
+    [ROM_API_INDEX_L1C_Cache_Flush]                  = (uint32_t)L1C_Cache_Flush,
+    [ROM_API_INDEX_L1C_Cache_Hit_Count_Get]          = (uint32_t)L1C_Cache_Hit_Count_Get,
+    [ROM_API_INDEX_L1C_Cache_Miss_Count_Get]         = (uint32_t)L1C_Cache_Miss_Count_Get,
+    [ROM_API_INDEX_L1C_Cache_Read_Disable]           = (uint32_t)L1C_Cache_Read_Disable,
+    [ROM_API_INDEX_L1C_Set_Wrap]                     = (uint32_t)L1C_Set_Wrap,
+    [ROM_API_INDEX_L1C_Set_Way_Disable]              = (uint32_t)L1C_Set_Way_Disable,
+    [ROM_API_INDEX_L1C_IROM_2T_Access_Set]           = (uint32_t)L1C_IROM_2T_Access_Set,
+    
+    [ROM_API_INDEX_SF_Ctrl_Enable]                 = (uint32_t)SF_Ctrl_Enable,
+    [ROM_API_INDEX_SF_Ctrl_Psram_Init]             = (uint32_t)SF_Ctrl_Psram_Init,
+    [ROM_API_INDEX_SF_Ctrl_Get_Clock_Delay]        = (uint32_t)SF_Ctrl_Get_Clock_Delay,
+    [ROM_API_INDEX_SF_Ctrl_Set_Clock_Delay]        = (uint32_t)SF_Ctrl_Set_Clock_Delay,
+    [ROM_API_INDEX_SF_Ctrl_Cmds_Set]               = (uint32_t)SF_Ctrl_Cmds_Set,
+    [ROM_API_INDEX_SF_Ctrl_Set_Owner]              = (uint32_t)SF_Ctrl_Set_Owner,
+    [ROM_API_INDEX_SF_Ctrl_Disable]                = (uint32_t)SF_Ctrl_Disable,
+    [ROM_API_INDEX_SF_Ctrl_Select_Pad]             = (uint32_t)SF_Ctrl_Select_Pad,
+    [ROM_API_INDEX_SF_Ctrl_Select_Bank]            = (uint32_t)SF_Ctrl_Select_Bank,
+    [ROM_API_INDEX_SF_Ctrl_AES_Enable_BE]          = (uint32_t)SF_Ctrl_AES_Enable_BE,
+    [ROM_API_INDEX_SF_Ctrl_AES_Enable_LE]          = (uint32_t)SF_Ctrl_AES_Enable_LE,
+    [ROM_API_INDEX_SF_Ctrl_AES_Set_Region]         = (uint32_t)SF_Ctrl_AES_Set_Region,
+    [ROM_API_INDEX_SF_Ctrl_AES_Set_Key]            = (uint32_t)SF_Ctrl_AES_Set_Key,
+    [ROM_API_INDEX_SF_Ctrl_AES_Set_Key_BE]         = (uint32_t)SF_Ctrl_AES_Set_Key_BE,
+    [ROM_API_INDEX_SF_Ctrl_AES_Set_IV]             = (uint32_t)SF_Ctrl_AES_Set_IV,
+    [ROM_API_INDEX_SF_Ctrl_AES_Set_IV_BE]          = (uint32_t)SF_Ctrl_AES_Set_IV_BE,
+    [ROM_API_INDEX_SF_Ctrl_AES_Enable]             = (uint32_t)SF_Ctrl_AES_Enable,
+    [ROM_API_INDEX_SF_Ctrl_AES_Disable]            = (uint32_t)SF_Ctrl_AES_Disable,
+    [ROM_API_INDEX_SF_Ctrl_Is_AES_Enable]          = (uint32_t)SF_Ctrl_Is_AES_Enable,
+    [ROM_API_INDEX_SF_Ctrl_Set_Flash_Image_Offset] = (uint32_t)SF_Ctrl_Set_Flash_Image_Offset,
+    [ROM_API_INDEX_SF_Ctrl_Get_Flash_Image_Offset] = (uint32_t)SF_Ctrl_Get_Flash_Image_Offset,
+    [ROM_API_INDEX_SF_Ctrl_Select_Clock]           = (uint32_t)SF_Ctrl_Select_Clock,
+    [ROM_API_INDEX_SF_Ctrl_SendCmd]                = (uint32_t)SF_Ctrl_SendCmd,
+    [ROM_API_INDEX_SF_Ctrl_Flash_Read_Icache_Set]  = (uint32_t)SF_Ctrl_Flash_Read_Icache_Set,
+    [ROM_API_INDEX_SF_Ctrl_Psram_Write_Icache_Set] = (uint32_t)SF_Ctrl_Psram_Write_Icache_Set,
+    [ROM_API_INDEX_SF_Ctrl_Psram_Read_Icache_Set]  = (uint32_t)SF_Ctrl_Psram_Read_Icache_Set,
+    [ROM_API_INDEX_SF_Ctrl_GetBusyState]           = (uint32_t)SF_Ctrl_GetBusyState,
+    [ROM_API_INDEX_SF_Cfg_Deinit_Ext_Flash_Gpio]   = (uint32_t)SF_Cfg_Deinit_Ext_Flash_Gpio,
+    [ROM_API_INDEX_SF_Cfg_Init_Ext_Flash_Gpio]     = (uint32_t)SF_Cfg_Init_Ext_Flash_Gpio,
+    [ROM_API_INDEX_SF_Cfg_Get_Flash_Cfg_Need_Lock] = (uint32_t)SF_Cfg_Get_Flash_Cfg_Need_Lock,
+    [ROM_API_INDEX_SF_Cfg_Init_Flash_Gpio]         = (uint32_t)SF_Cfg_Init_Flash_Gpio,
+    [ROM_API_INDEX_SF_Cfg_Flash_Identify]          = (uint32_t)SF_Cfg_Flash_Identify,
+    
+    [ROM_API_INDEX_Psram_Init]                     = (uint32_t)Psram_Init,
+    [ROM_API_INDEX_Psram_ReadReg]                  = (uint32_t)Psram_ReadReg,
+    [ROM_API_INDEX_Psram_WriteReg]                 = (uint32_t)Psram_WriteReg,
+    [ROM_API_INDEX_Psram_SetDriveStrength]         = (uint32_t)Psram_SetDriveStrength,
+    [ROM_API_INDEX_Psram_SetBurstWrap]             = (uint32_t)Psram_SetBurstWrap,
+    [ROM_API_INDEX_Psram_ReadId]                   = (uint32_t)Psram_ReadId,
+    [ROM_API_INDEX_Psram_EnterQuadMode]            = (uint32_t)Psram_EnterQuadMode,
+    [ROM_API_INDEX_Psram_ExitQuadMode]             = (uint32_t)Psram_ExitQuadMode,
+    [ROM_API_INDEX_Psram_ToggleBurstLength]        = (uint32_t)Psram_ToggleBurstLength,
+    [ROM_API_INDEX_Psram_SoftwareReset]            = (uint32_t)Psram_SoftwareReset,
+    [ROM_API_INDEX_Psram_Set_IDbus_Cfg]            = (uint32_t)Psram_Set_IDbus_Cfg,
+    [ROM_API_INDEX_Psram_Cache_Write_Set]          = (uint32_t)Psram_Cache_Write_Set,
+    [ROM_API_INDEX_Psram_Write]                    = (uint32_t)Psram_Write,
+    [ROM_API_INDEX_Psram_Read]                     = (uint32_t)Psram_Read,
+    
+    [ROM_API_INDEX_FUNC_INVALID_START ... ROM_API_INDEX_FUNC_LAST_ENTRY] = 0xdeedbeef,
+};
+
+/*@} end of group ROMDRIVER_Private_Type*/
+
+/** @defgroup ROMDRIVER_Private_Defines
+ *  @{
+ */
+
+/*@} end of group ROMDRIVER_Private_Defines */
+
+/** @defgroup ROMDRIVER_Private_Variables
+ *  @{
+ */
+
+/*@} end of group ROMDRIVER_Private_Variables */
+
+/** @defgroup ROMDRIVER_Global_Variables
+ *  @{
+ */
+
+/*@} end of group ROMDRIVER_Global_Variables */
+
+/** @defgroup ROMDRIVER_Private_FunctionDeclaration
+ *  @{
+ */
+
+/*@} end of group ROMDRIVER_Private_FunctionDeclaration */
+
+/** @defgroup ROMDRIVER_Private_Functions
+ *  @{
+ */
+
+/*@} end of group ROMDRIVER_Private_Functions */
+
+/** @defgroup ROMDRIVER_Public_Functions
+ *  @{
+ */
+
+/*@} end of group ROMDRIVER_Public_Functions */
+
+/*@} end of group ROMDRIVER_COMMON */
+
+/*@} end of group BL702_Periph_Driver */
+
+
diff --git a/drivers/bl702_driver/std_drv/src/bl702_sec_dbg.c b/drivers/bl702_driver/std_drv/src/bl702_sec_dbg.c
new file mode 100644
index 00000000..15db9fd6
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_sec_dbg.c
@@ -0,0 +1,151 @@
+/**
+  ******************************************************************************
+  * @file    bl702_sec_dbg.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "string.h"
+#include "bl702_sec_dbg.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  SEC_DBG
+ *  @{
+ */
+
+/** @defgroup  SEC_DBG_Private_Macros
+ *  @{
+ */
+
+/*@} end of group SEC_DBG_Private_Macros */
+
+/** @defgroup  SEC_DBG_Private_Types
+ *  @{
+ */
+
+/*@} end of group SEC_DBG_Private_Types */
+
+/** @defgroup  SEC_DBG_Private_Variables
+ *  @{
+ */
+
+/*@} end of group SEC_DBG_Private_Variables */
+
+/** @defgroup  SEC_DBG_Global_Variables
+ *  @{
+ */
+
+/*@} end of group SEC_DBG_Global_Variables */
+
+/** @defgroup  SEC_DBG_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group SEC_DBG_Private_Fun_Declaration */
+
+/** @defgroup  SEC_DBG_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Sec Dbg read chip ID
+ *
+ * @param  id[8]: chip ID buffer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Dbg_Read_Chip_ID(uint8_t id[8])
+{
+    uint32_t idLow,idHigh;
+    
+    idLow=BL_RD_REG(SEC_DBG_BASE,SEC_DBG_SD_CHIP_ID_LOW);
+    BL_WRWD_TO_BYTEP(id,idLow);
+    
+    idHigh=BL_RD_REG(SEC_DBG_BASE,SEC_DBG_SD_CHIP_ID_HIGH);
+    BL_WRWD_TO_BYTEP((id+4),idHigh);
+}
+
+/****************************************************************************//**
+ * @brief  Sec Dbg read MAC address
+ *
+ * @param  macAddr[6]: MAC address buffer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Dbg_Read_WiFi_MAC(uint8_t macAddr[6])
+{
+    uint32_t macLow,macHigh;
+    
+    macLow=BL_RD_REG(SEC_DBG_BASE,SEC_DBG_SD_WIFI_MAC_LOW);
+    BL_WRWD_TO_BYTEP(macAddr,macLow);
+    
+    macHigh=BL_RD_REG(SEC_DBG_BASE,SEC_DBG_SD_WIFI_MAC_HIGH);
+    macAddr[4]=(macHigh>>0)&0xff;
+    macAddr[5]=(macHigh>>8)&0xff;
+}
+
+/****************************************************************************//**
+ * @brief  Sec Dbg read debug mode
+ *
+ * @param  None
+ *
+ * @return debug mode status
+ *
+*******************************************************************************/
+uint32_t Sec_Dbg_Read_Dbg_Mode(void)
+{
+    return BL_GET_REG_BITS_VAL(BL_RD_REG(SEC_DBG_BASE,SEC_DBG_SD_STATUS),SEC_DBG_SD_DBG_MODE);
+}
+
+/****************************************************************************//**
+ * @brief  Sec Dbg read debug enable status
+ *
+ * @param  None
+ *
+ * @return enable status
+ *
+*******************************************************************************/
+uint32_t Sec_Dbg_Read_Dbg_Enable(void)
+{
+    return BL_GET_REG_BITS_VAL(BL_RD_REG(SEC_DBG_BASE,SEC_DBG_SD_STATUS),SEC_DBG_SD_DBG_ENA);
+}
+
+/*@} end of group SEC_DBG_Public_Functions */
+
+/*@} end of group SEC_DBG */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_sec_eng.c b/drivers/bl702_driver/std_drv/src/bl702_sec_eng.c
new file mode 100644
index 00000000..6c1bc926
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_sec_eng.c
@@ -0,0 +1,3210 @@
+/**
+  ******************************************************************************
+  * @file    bl702_sec_eng.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "string.h"
+#include "bl702_sec_eng.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  SEC_ENG
+ *  @{
+ */
+
+/** @defgroup  SEC_ENG_Private_Macros
+ *  @{
+ */
+#define PUT_UINT32_BE(n,b,i)                      \
+{                                                 \
+    (b)[(i)    ] = (uint8_t) ( (n) >> 24 );       \
+    (b)[(i) + 1] = (uint8_t) ( (n) >> 16 );       \
+    (b)[(i) + 2] = (uint8_t) ( (n) >>  8 );       \
+    (b)[(i) + 3] = (uint8_t) ( (n)       );       \
+}
+#define PUT_UINT64_BE(n,b,i)                      \
+{                                                 \
+    (b)[(i)    ] = (uint8_t) ( (n) >> 56 );       \
+    (b)[(i) + 1] = (uint8_t) ( (n) >> 48 );       \
+    (b)[(i) + 2] = (uint8_t) ( (n) >> 40 );       \
+    (b)[(i) + 3] = (uint8_t) ( (n) >> 32 );       \
+    (b)[(i) + 4] = (uint8_t) ( (n) >> 24 );       \
+    (b)[(i) + 5] = (uint8_t) ( (n) >> 16 );       \
+    (b)[(i) + 6] = (uint8_t) ( (n) >>  8 );       \
+    (b)[(i) + 7] = (uint8_t) ( (n)       );       \
+}
+#define SEC_ENG_SHA_BUSY_TIMEOUT_COUNT          (100*160*1000)
+#define SEC_ENG_AES_BUSY_TIMEOUT_COUNT          (100*160*1000)
+#define SEC_ENG_TRNG_BUSY_TIMEOUT_COUNT         (100*160*1000)
+#define SEC_ENG_PKA_INT_TIMEOUT_COUNT           (100*160*1000)
+#define SEC_ENG_GMAC_BUSY_TIMEOUT_COUNT         (100*160*1000)
+
+/*@} end of group SEC_ENG_Private_Macros */
+
+/** @defgroup  SEC_ENG_Private_Types
+ *  @{
+ */
+struct  pka0_pld_cfg {
+    union {
+        struct {
+            uint32_t size                           :  12; /*[11: 0],       r/w,        0x0 */
+            uint32_t d_reg_index                    :  8;  /*[19:12],        r/w,        0x0 */
+            uint32_t d_reg_type                     :  4;  /*[23:20],        r/w,        0x0 */
+            uint32_t op                             :  7;  /*[30:24],        r/w,        0x0 */
+            uint32_t last_op                        :  1;  /*[31:31],        r/w,        0x0 */
+        }BF;
+        uint32_t WORD;
+    } value;
+};
+
+struct  pka0_pldi_cfg {
+    union {
+        struct {
+            uint32_t rsvd                           :  12; /*[11: 0],       r/w,        0x0 */
+            uint32_t d_reg_index                    :  8;  /*[19:12],        r/w,        0x0 */
+            uint32_t d_reg_type                     :  4;  /*[23:20],        r/w,        0x0 */
+            uint32_t op                             :  7;  /*[30:24],        r/w,        0x0 */
+            uint32_t last_op                        :  1;  /*[31:31],        r/w,        0x0 */
+        }BF;
+        uint32_t WORD;
+    } value;
+};
+
+struct pka0_common_op_first_cfg{
+    union {
+        struct {
+            uint32_t s0_reg_idx                     :  8;  /*[7: 0],       r/w,        0x0 */
+            uint32_t s0_reg_type                    :  4;  /*[11:8],       r/w,        0x0 */
+            uint32_t d_reg_idx                      :  8;  /*[19:12],      r/w,        0x0 */
+            uint32_t d_reg_type                     :  4;  /*[23:20],      r/w,        0x0 */
+            uint32_t op                             :  7;  /*[30:24],      r/w,        0x0 */
+            uint32_t last_op                        :  1;  /*[31:31],      r/w,        0x0 */
+        }BF;
+        uint32_t WORD;
+    } value;
+};
+
+struct pka0_common_op_snd_cfg_S1_only{
+    union {
+        struct {
+            uint32_t reserved_0_11                  :  12; /*[11: 0],       rsvd,       0x0 */
+            uint32_t s1_reg_idx                     :  8;  /*[19:12],       r/w,        0x0 */
+            uint32_t s1_reg_type                    :  4;  /*[23:20],       r/w,        0x0 */
+            uint32_t reserved_24_31                  :  8; /*[31:24],       rsvd,       0x0 */
+        }BF;
+        uint32_t WORD;
+    } value;
+};
+
+struct pka0_common_op_snd_cfg_S2_only{
+    union {
+        struct {
+            uint32_t s2_reg_idx                     :  8;  /*[7 : 0],       r/w,        0x0 */
+            uint32_t s2_reg_type                    :  4;  /*[11: 8],       r/w,        0x0 */
+            uint32_t reserved_12_31                  : 20; /*[31:12],       rsvd,       0x0 */
+        }BF;
+        uint32_t WORD;
+    } value;
+};
+
+struct pka0_common_op_snd_cfg_S1_S2{
+    union {
+        struct {
+            uint32_t s2_reg_idx                     :  8;  /*[7 : 0],       r/w,        0x0 */
+            uint32_t s2_reg_type                    :  4;  /*[11: 8],       r/w,        0x0 */
+            uint32_t s1_reg_idx                     :  8;  /*[19:12],       r/w,        0x0 */
+            uint32_t s1_reg_type                    :  4;  /*[23:20],       r/w,        0x0 */
+            uint32_t reserved_24_31                 :  8;  /*[31:24],       rsvd,       0x0 */
+        }BF;
+        uint32_t WORD;
+    } value;
+};
+
+struct pka0_bit_shift_op_cfg{
+     union {
+        struct {
+            uint32_t bit_shift                      :  15;  /*[14: 0],       r/w,        0x0 */
+            uint32_t reserved_24_31                 :  17;  /*[31:15],       rsvd,        0x0 */
+        }BF;
+        uint32_t WORD;
+    } value;
+};
+
+/*@} end of group SEC_ENG_Private_Types */
+
+/** @defgroup  SEC_ENG_Private_Variables
+ *  @{
+ */
+static intCallback_Type* secEngIntCbfArra[SEC_ENG_INT_ALL]= {NULL};
+
+
+/*@} end of group SEC_ENG_Private_Variables */
+
+/** @defgroup  SEC_ENG_Global_Variables
+ *  @{
+ */
+
+/*@} end of group SEC_ENG_Global_Variables */
+
+/** @defgroup  SEC_ENG_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group SEC_ENG_Private_Fun_Declaration */
+
+/** @defgroup  SEC_ENG_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  SHA256 initialization function
+ *
+ * @param  shaCtx: SHA256 context pointer
+ * @param  shaNo: SHA ID type
+ * @param  shaType: SHA type
+ * @param  shaTmpBuf[16]: SHA temp buffer for store data that is less than 64 bytes
+ * @param  padding[16]: SHA padding buffer for store padding data
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_SHA256_Init(SEC_Eng_SHA256_Ctx *shaCtx,SEC_ENG_SHA_ID_Type shaNo,SEC_ENG_SHA_Type shaType,uint32_t shaTmpBuf[16],uint32_t padding[16])
+{
+    uint32_t SHAx = SEC_ENG_BASE+SEC_ENG_SHA_OFFSET;
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SEC_ENG_SHA_ID_TYPE(shaNo));
+    CHECK_PARAM(IS_SEC_ENG_SHA_TYPE(shaType));
+
+    /* Deal SHA control register to set SHA mode */
+    tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_SHA_MODE,shaType);
+    BL_WR_REG(SHAx,SEC_ENG_SE_SHA_CTRL,tmpVal);
+
+    /* Clear context */
+    memset(shaCtx,0,sizeof(SEC_Eng_SHA256_Ctx));
+
+    /* Init temp buffer and padding buffer */
+    shaCtx->shaBuf=shaTmpBuf;
+    shaCtx->shaPadding=padding;
+    BL702_MemSet(shaCtx->shaPadding,0,64);
+    BL702_MemSet(shaCtx->shaPadding,0x80,1);
+    
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(SEC_SHA_IRQn,SEC_SHA_IRQHandler);
+#endif
+}
+
+/****************************************************************************//**
+ * @brief  SHA start function
+ *
+ * @param  shaNo: SHA ID type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_SHA_Start(SEC_ENG_SHA_ID_Type shaNo)
+{  
+    uint32_t SHAx = SEC_ENG_BASE+SEC_ENG_SHA_OFFSET;
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SEC_ENG_SHA_ID_TYPE(shaNo));
+
+    /* Set SHA enable */
+    tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
+
+    tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_SHA_EN);
+    /* Hash sel 0 for new start */
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_SHA_HASH_SEL);
+
+    BL_WR_REG(SHAx,SEC_ENG_SE_SHA_CTRL,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  SHA256 update input data function
+ *
+ * @param  shaCtx: SHA256 context pointer
+ * @param  shaNo: SHA ID type
+ * @param  input: SHA input data pointer, and the address should be word align
+ * @param  len: SHA input data length
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type Sec_Eng_SHA256_Update(SEC_Eng_SHA256_Ctx *shaCtx,SEC_ENG_SHA_ID_Type shaNo,const uint8_t *input, uint32_t len)
+{
+    uint32_t SHAx = SEC_ENG_BASE+SEC_ENG_SHA_OFFSET;
+    uint32_t tmpVal;
+    uint32_t fill;
+    uint32_t left;
+    uint32_t timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
+
+    if( len == 0 ){
+        return SUCCESS;
+    }
+
+    do {
+        tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_BUSY));
+
+    /* SHA need set se_sha_sel to 1 to keep the last SHA state */
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_SHA_HASH_SEL,shaCtx->shaFeed);
+
+    left = shaCtx->total[0] & 0x3F;
+    fill = 64 - left;
+
+    shaCtx->total[0] += (uint32_t) len;
+    shaCtx->total[0] &= 0xFFFFFFFF;
+
+    if( shaCtx->total[0] < (uint32_t) len ){
+        shaCtx->total[1]++;
+    }
+
+    if( left && len >= fill ){
+        BL702_MemCpy_Fast( (void *) ((uint8_t *)shaCtx->shaBuf + left), input, fill );
+        /* Set data source address */
+        BL_WR_REG(SHAx,SEC_ENG_SE_SHA_MSA,(uint32_t )shaCtx->shaBuf);
+        
+        /* Set data length */
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_SHA_MSG_LEN,1);
+        BL_WR_REG(SHAx,SEC_ENG_SE_SHA_CTRL,tmpVal);
+        /* Trigger */
+        tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_SHA_TRIG_1T);
+        BL_WR_REG(SHAx,SEC_ENG_SE_SHA_CTRL,tmpVal);
+
+        shaCtx->shaFeed=1;
+        input += fill;
+        len  -= fill;
+        left = 0;
+    }
+
+    fill=len/64;
+    len=len%64;
+    if( fill>0 ){
+        /* Wait finished */
+        timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
+        do {
+            tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
+            timeoutCnt--;
+            if(timeoutCnt == 0){
+                return TIMEOUT;
+            }
+        }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_BUSY));
+
+        /* SHA need set se_sha_sel to 1 to keep the last sha state */
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_SHA_HASH_SEL,shaCtx->shaFeed);
+
+        /* Fill data */
+        BL_WR_REG(SHAx,SEC_ENG_SE_SHA_MSA,(uint32_t)input);
+
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_SHA_MSG_LEN,fill);
+        BL_WR_REG(SHAx,SEC_ENG_SE_SHA_CTRL,tmpVal);
+
+        tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_SHA_TRIG_1T);
+        BL_WR_REG(SHAx,SEC_ENG_SE_SHA_CTRL,tmpVal);
+        
+        input+=(fill*64);
+        shaCtx->shaFeed=1;
+    }
+
+    if( len > 0 ){
+        /* Wait finished */
+        timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
+        do {
+            tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
+            timeoutCnt--;
+            if(timeoutCnt == 0){
+                return TIMEOUT;
+            }
+        }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_BUSY));
+
+        /* Copy left data into temp buffer */
+        BL702_MemCpy_Fast( (void *) ((uint8_t *)shaCtx->shaBuf + left), input, len );
+    }
+
+    /* Wait finished */
+    timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
+    do {
+        tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_BUSY));
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  SHA256 finish to get output function
+ *
+ * @param  shaCtx: SHA256 context pointer
+ * @param  shaNo: SHA ID type
+ * @param  hash: SHA output data of SHA result
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type Sec_Eng_SHA256_Finish(SEC_Eng_SHA256_Ctx *shaCtx,SEC_ENG_SHA_ID_Type shaNo,uint8_t *hash)
+{  
+    uint32_t last, padn;
+    uint32_t high, low;
+    uint8_t shaMode;
+    uint8_t msgLen[8];
+    uint8_t *p=(uint8_t *)hash;
+    uint32_t SHAx = SEC_ENG_BASE+SEC_ENG_SHA_OFFSET;
+    uint32_t tmpVal;
+    uint32_t timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SEC_ENG_SHA_ID_TYPE(shaNo));
+
+    /* Wait finished */
+    do {
+        tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_BUSY));
+
+    high = ( shaCtx->total[0] >> 29 )
+         | ( shaCtx->total[1] <<  3 );
+    low  = ( shaCtx->total[0] <<  3 );
+
+    PUT_UINT32_BE( high, msgLen, 0 );
+    PUT_UINT32_BE( low,  msgLen, 4 );
+
+    last = shaCtx->total[0] & 0x3F;
+    padn = ( last < 56 ) ? ( 56 - last ) : ( 120 - last );
+
+    Sec_Eng_SHA256_Update(shaCtx,shaNo, (uint8_t *)shaCtx->shaPadding, padn );
+
+    /* Wait for  shaPadding idle */
+    timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
+    do {
+        tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_BUSY));
+
+    BL702_MemCpy_Fast(shaCtx->shaPadding,msgLen,8);
+    Sec_Eng_SHA256_Update(shaCtx,shaNo, (uint8_t *)shaCtx->shaPadding, 8 );
+
+    /* Wait finished */
+    timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
+    do {
+        tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_BUSY));
+
+    tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
+    shaMode=(SEC_ENG_SHA_Type)BL_GET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_SHA_MODE);
+    /* Copy SHA value */
+    tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_HASH_L_0);
+    *p++=(tmpVal&0xff);*p++=((tmpVal>>8)&0xff);*p++=((tmpVal>>16)&0xff);*p++=((tmpVal>>24)&0xff);
+    tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_HASH_L_1);
+    *p++=(tmpVal&0xff);*p++=((tmpVal>>8)&0xff);*p++=((tmpVal>>16)&0xff);*p++=((tmpVal>>24)&0xff);
+    tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_HASH_L_2);
+    *p++=(tmpVal&0xff);*p++=((tmpVal>>8)&0xff);*p++=((tmpVal>>16)&0xff);*p++=((tmpVal>>24)&0xff);
+    tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_HASH_L_3);
+    *p++=(tmpVal&0xff);*p++=((tmpVal>>8)&0xff);*p++=((tmpVal>>16)&0xff);*p++=((tmpVal>>24)&0xff);
+    tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_HASH_L_4);
+    *p++=(tmpVal&0xff);*p++=((tmpVal>>8)&0xff);*p++=((tmpVal>>16)&0xff);*p++=((tmpVal>>24)&0xff);
+    if (shaMode==SEC_ENG_SHA224 || shaMode==SEC_ENG_SHA256){
+        tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_HASH_L_5);
+        *p++=(tmpVal&0xff);*p++=((tmpVal>>8)&0xff);*p++=((tmpVal>>16)&0xff);*p++=((tmpVal>>24)&0xff);
+        tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_HASH_L_6);
+        *p++=(tmpVal&0xff);*p++=((tmpVal>>8)&0xff);*p++=((tmpVal>>16)&0xff);*p++=((tmpVal>>24)&0xff);
+        if (shaMode==SEC_ENG_SHA256){
+            tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_HASH_L_7);
+            *p++=(tmpVal&0xff);*p++=((tmpVal>>8)&0xff);*p++=((tmpVal>>16)&0xff);*p++=((tmpVal>>24)&0xff);
+        }
+    }
+
+    /* Disable SHA engine*/
+    tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_CTRL);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_SHA_HASH_SEL);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_SHA_EN);
+    BL_WR_REG(SHAx,SEC_ENG_SE_SHA_CTRL,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  SHA enable link mode and set link config address
+ *
+ * @param  shaNo: SHA ID type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_SHA_Enable_Link(SEC_ENG_SHA_ID_Type shaNo)
+{
+    uint32_t SHAx = SEC_ENG_BASE;
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SEC_ENG_SHA_ID_TYPE(shaNo));
+    
+    /* Enable sha and enable link mode */
+    tmpVal = BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
+    tmpVal = BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_SHA_0_EN);
+    tmpVal = BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_SHA_0_LINK_MODE);
+    BL_WR_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  SHA disable link mode
+ *
+ * @param  shaNo: SHA ID type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_SHA_Disable_Link(SEC_ENG_SHA_ID_Type shaNo)
+{
+    uint32_t SHAx = SEC_ENG_BASE;
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SEC_ENG_SHA_ID_TYPE(shaNo));
+    
+    /* Disable sha and disable link mode */
+    tmpVal = BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
+    tmpVal = BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_SHA_0_LINK_MODE);
+    tmpVal = BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_SHA_0_EN);
+    BL_WR_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  SHA256 link mode initialization function
+ *
+ * @param  shaCtx: SHA256 link mode context pointer
+ * @param  shaNo: SHA ID type
+ * @param  linkAddr: SHA link configure address
+ * @param  shaTmpBuf[16]: SHA temp buffer for store data that is less than 64 bytes
+ * @param  padding[16]: SHA padding buffer for store padding data
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_SHA256_Link_Init(SEC_Eng_SHA256_Link_Ctx *shaCtx,SEC_ENG_SHA_ID_Type shaNo,uint32_t linkAddr,uint32_t shaTmpBuf[16],uint32_t padding[16])
+{
+    /* Check the parameters */
+    CHECK_PARAM(IS_SEC_ENG_SHA_ID_TYPE(shaNo));
+
+    /* Clear context */
+    memset(shaCtx,0,sizeof(SEC_Eng_SHA256_Link_Ctx));
+
+    /* Init temp buffer,padding buffer and link address */
+    shaCtx->shaBuf=shaTmpBuf;
+    shaCtx->shaPadding=padding;
+    BL702_MemSet(shaCtx->shaPadding,0,64);
+    BL702_MemSet(shaCtx->shaPadding,0x80,1);
+    shaCtx->linkAddr=linkAddr;
+    
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(SEC_SHA_IRQn,SEC_SHA_IRQHandler);
+#endif
+}
+
+/****************************************************************************//**
+ * @brief  SHA256 link mode update input data function
+ *
+ * @param  shaCtx: SHA256 link mode context pointer
+ * @param  shaNo: SHA ID type
+ * @param  input: SHA input data pointer, and the address should be word align
+ * @param  len: SHA input data length
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type Sec_Eng_SHA256_Link_Update(SEC_Eng_SHA256_Link_Ctx *shaCtx,SEC_ENG_SHA_ID_Type shaNo,const uint8_t *input, uint32_t len)
+{
+    uint32_t SHAx = SEC_ENG_BASE;
+    uint32_t tmpVal;
+    uint32_t fill;
+    uint32_t left;
+    uint32_t timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
+
+    if( len == 0 ){
+        return SUCCESS;
+    }
+
+    do {
+        tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_0_BUSY));
+
+    /* Set link address */
+    BL_WR_REG(SHAx,SEC_ENG_SE_SHA_0_LINK,shaCtx->linkAddr);
+
+    left = shaCtx->total[0] & 0x3F;
+    fill = 64 - left;
+
+    shaCtx->total[0] += (uint32_t) len;
+    shaCtx->total[0] &= 0xFFFFFFFF;
+
+    if( shaCtx->total[0] < (uint32_t) len ){
+        shaCtx->total[1]++;
+    }
+
+    if( left && len >= fill ){
+        BL702_MemCpy_Fast( (void *) ((uint8_t *)shaCtx->shaBuf + left), input, fill );
+        /* Set data source address */
+        *(uint32_t *)(shaCtx->linkAddr+4) = (uint32_t)shaCtx->shaBuf;
+        
+        /* Set data length */
+        *((uint16_t *)shaCtx->linkAddr+1) = 1;
+        /* Trigger */
+        tmpVal = BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
+        BL_WR_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_SHA_0_TRIG_1T));
+
+        /* Choose accumulating last hash in the next time */
+        *((uint32_t *)shaCtx->linkAddr) |= 0x40;
+        input += fill;
+        len  -= fill;
+        left = 0;
+    }
+
+    fill=len/64;
+    len=len%64;
+    if( fill>0 ){
+        /* Wait finished */
+        timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
+        do {
+            tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
+            timeoutCnt--;
+            if(timeoutCnt == 0){
+                return TIMEOUT;
+            }
+        }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_0_BUSY));
+
+        /* Fill data */
+        *(uint32_t *)(shaCtx->linkAddr+4) = (uint32_t)input;
+        *((uint16_t *)shaCtx->linkAddr+1) = fill;
+
+        /* Trigger */
+        tmpVal = BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
+        BL_WR_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_SHA_0_TRIG_1T));
+        
+        input+=(fill*64);
+        /* Choose accumulating last hash in the next time */
+        *((uint32_t *)shaCtx->linkAddr) |= 0x40;
+    }
+
+    if( len > 0 ){
+        /* Wait finished */
+        timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
+        do {
+            tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
+            timeoutCnt--;
+            if(timeoutCnt == 0){
+                return TIMEOUT;
+            }
+        }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_0_BUSY));
+
+        /* Copy left data into temp buffer */
+        BL702_MemCpy_Fast( (void *) ((uint8_t *)shaCtx->shaBuf + left), input, len );
+    }
+
+    /* Wait finished */
+    timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
+    do {
+        tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_0_BUSY));
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  SHA256 link mode finish to get output function
+ *
+ * @param  shaCtx: SHA256 link mode context pointer
+ * @param  shaNo: SHA ID type
+ * @param  hash: SHA output data of SHA result
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type Sec_Eng_SHA256_Link_Finish(SEC_Eng_SHA256_Link_Ctx *shaCtx,SEC_ENG_SHA_ID_Type shaNo,uint8_t *hash)
+{
+    uint32_t last, padn;
+    uint32_t high, low;
+    uint8_t msgLen[8];
+    uint32_t SHAx = SEC_ENG_BASE;
+    uint32_t tmpVal;
+    uint32_t shaMode = (*(uint32_t *)shaCtx->linkAddr)>>2&0x7;
+    uint32_t timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SEC_ENG_SHA_ID_TYPE(shaNo));
+
+    /* Wait finished */
+    do {
+        tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_0_BUSY));
+
+    /* Set link address */
+    BL_WR_REG(SHAx,SEC_ENG_SE_SHA_0_LINK,shaCtx->linkAddr);
+
+    high = ( shaCtx->total[0] >> 29 )
+         | ( shaCtx->total[1] <<  3 );
+    low  = ( shaCtx->total[0] <<  3 );
+
+    PUT_UINT32_BE( high, msgLen, 0 );
+    PUT_UINT32_BE( low,  msgLen, 4 );
+
+    last = shaCtx->total[0] & 0x3F;
+    padn = ( last < 56 ) ? ( 56 - last ) : ( 120 - last );
+
+    Sec_Eng_SHA256_Link_Update(shaCtx,shaNo, (uint8_t *)shaCtx->shaPadding, padn );
+
+    /* Wait for shaPadding idle */
+    timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
+    do {
+        tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_0_BUSY));
+
+    Sec_Eng_SHA256_Link_Update(shaCtx,shaNo, msgLen, 8 );
+
+    /* Wait finished */
+    timeoutCnt = SEC_ENG_SHA_BUSY_TIMEOUT_COUNT;
+    do {
+        tmpVal=BL_RD_REG(SHAx,SEC_ENG_SE_SHA_0_CTRL);
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_SHA_0_BUSY));
+
+    /* Get result according to SHA mode,result is placed in (link address + offset:8) */
+    switch(shaMode){
+        case 0:
+            BL702_MemCpy_Fast(hash,(uint8_t *)(shaCtx->linkAddr+8),32);
+            break;
+        case 1:
+            BL702_MemCpy_Fast(hash,(uint8_t *)(shaCtx->linkAddr+8),28);
+            break;
+        case 2:
+            BL702_MemCpy_Fast(hash,(uint8_t *)(shaCtx->linkAddr+8),20);
+            break;
+        case 3:
+            BL702_MemCpy_Fast(hash,(uint8_t *)(shaCtx->linkAddr+8),20);
+            break;
+        default:
+            break;
+    }
+    
+    /* Choose new hash in the next time */
+    *((uint32_t *)shaCtx->linkAddr) &= ~0x40;
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  AES initialization function
+ *
+ * @param  aesCtx: AES context pointer
+ * @param  aesNo: AES ID type
+ * @param  aesType: AES type:ECB,CTR,CBC
+ * @param  keyType: AES key type:128,256,192
+ * @param  enDecType: AES encryption or decryption
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type Sec_Eng_AES_Init(SEC_Eng_AES_Ctx *aesCtx,SEC_ENG_AES_ID_Type aesNo,SEC_ENG_AES_Type aesType,SEC_ENG_AES_Key_Type keyType,SEC_ENG_AES_EnDec_Type enDecType)
+{
+    uint32_t AESx = SEC_ENG_BASE+SEC_ENG_AES_OFFSET;
+    uint32_t tmpVal;
+    uint32_t timeoutCnt = SEC_ENG_AES_BUSY_TIMEOUT_COUNT;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
+    CHECK_PARAM(IS_SEC_ENG_AES_TYPE(aesType));
+    CHECK_PARAM(IS_SEC_ENG_AES_KEY_TYPE(keyType));
+    CHECK_PARAM(IS_SEC_ENG_AES_ENDEC_TYPE(enDecType));
+
+    /* Wait finished */
+    do {
+        tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_CTRL);
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_AES_BUSY));
+
+    /* Set AES mode type*/
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_BLOCK_MODE,aesType);
+    
+    /* Set AES key type */
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_MODE,keyType);
+
+    /* Set AES encryption or decryption */
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_DEC_EN,enDecType);
+
+    /* Clear dec_key_sel to select new key */
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_AES_DEC_KEY_SEL);
+
+    /* Clear aes iv sel to select new iv */
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_AES_IV_SEL);
+
+    /* Clear AES interrupt */
+    tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_AES_INT_CLR_1T);
+
+    /* Enable AES */
+    tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_AES_EN);
+
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_CTRL,tmpVal);
+
+    /* Clear AES context */
+    memset(aesCtx,0,sizeof(SEC_Eng_AES_Ctx));
+
+    /* Enable ID0 Access for HW Key */
+    BL_WR_REG(SEC_ENG_BASE,SEC_ENG_SE_AES_0_CTRL_PROT,0x03);
+    
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(SEC_AES_IRQn,SEC_AES_IRQHandler);
+#endif
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  AES enable function,set AES bigendian
+ *
+ * @param  aesNo: AES ID type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_AES_Enable_BE(SEC_ENG_AES_ID_Type aesNo)
+{
+    uint32_t AESx = SEC_ENG_BASE+SEC_ENG_AES_OFFSET;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
+
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_ENDIAN,0x0f);
+    
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(SEC_AES_IRQn,SEC_AES_IRQHandler);
+#endif
+}
+
+/****************************************************************************//**
+ * @brief  AES enable function,set AES littleendian
+ *
+ * @param  aesNo: AES ID type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_AES_Enable_LE(SEC_ENG_AES_ID_Type aesNo)
+{
+    uint32_t AESx = SEC_ENG_BASE+SEC_ENG_AES_OFFSET;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
+
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_ENDIAN,0x00);
+    
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(SEC_AES_IRQn,SEC_AES_IRQHandler);
+#endif
+}
+
+/****************************************************************************//**
+ * @brief  AES enable link mode
+ *
+ * @param  aesNo: AES ID type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_AES_Enable_Link(SEC_ENG_AES_ID_Type aesNo)
+{
+    uint32_t AESx = SEC_ENG_BASE;
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
+    
+    /* Enable aes link mode */
+    tmpVal = BL_RD_REG(AESx,SEC_ENG_SE_AES_0_CTRL);
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_0_CTRL,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_AES_0_LINK_MODE));
+    
+    /* Enable ID0 Access for HW Key */
+    BL_WR_REG(SEC_ENG_BASE,SEC_ENG_SE_AES_0_CTRL_PROT,0x03);
+}
+
+/****************************************************************************//**
+ * @brief  AES disable link mode
+ *
+ * @param  aesNo: AES ID type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_AES_Disable_Link(SEC_ENG_AES_ID_Type aesNo)
+{
+    uint32_t AESx = SEC_ENG_BASE;
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
+    
+    /* Disable aes link mode */
+    tmpVal = BL_RD_REG(AESx,SEC_ENG_SE_AES_0_CTRL);
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_0_CTRL,BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_AES_0_LINK_MODE));
+}
+
+/****************************************************************************//**
+ * @brief  AES work in link mode
+ *
+ * @param  aesNo: AES ID type
+ * @param  linkAddr: Address of config structure in link mode
+ * @param  in: AES input data buffer to deal with
+ * @param  len: AES input data length
+ * @param  out: AES output data buffer
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type Sec_Eng_AES_Link_Work(SEC_ENG_AES_ID_Type aesNo,uint32_t linkAddr,const uint8_t *in,uint32_t len,uint8_t *out)
+{
+    uint32_t AESx = SEC_ENG_BASE;
+    uint32_t tmpVal;
+    uint32_t timeoutCnt = SEC_ENG_AES_BUSY_TIMEOUT_COUNT;
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
+    
+    /* Link address should word align */
+    if((linkAddr&0x03) != 0 || len%16 != 0){
+        return ERROR;
+    }
+    
+    /* Wait finished */
+    do {
+        tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_0_CTRL);
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_AES_0_BUSY));
+    
+    /* Set link address */
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_0_LINK,linkAddr);
+    
+    /* Change source buffer address and destination buffer address */
+    *(uint32_t *)(linkAddr+4) = (uint32_t)in;
+    *(uint32_t *)(linkAddr+8) = (uint32_t)out;
+    
+    /* Set data length */
+    *((uint16_t *)linkAddr+1) = len/16;
+    
+    /* Enable aes */
+    tmpVal = BL_RD_REG(AESx,SEC_ENG_SE_AES_0_CTRL);
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_0_CTRL,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_AES_0_EN));
+    
+    /* Start aes engine and wait finishing */
+    tmpVal = BL_RD_REG(AESx,SEC_ENG_SE_AES_0_CTRL);
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_0_CTRL,BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_AES_0_TRIG_1T));
+    __NOP();
+    __NOP();
+    timeoutCnt = SEC_ENG_AES_BUSY_TIMEOUT_COUNT;
+    do {
+        tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_0_CTRL);
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_AES_0_BUSY));
+
+    /* Disable aes */
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_0_CTRL,BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_AES_0_EN));
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  AES set hardware key source:efuse region for CPU0  or region efuse for CPU1
+ *
+ * @param  aesNo: AES ID type
+ * @param  src: AES key source type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_AES_Set_Hw_Key_Src(SEC_ENG_AES_ID_Type aesNo,uint8_t src)
+{
+    uint32_t AESx = SEC_ENG_BASE+SEC_ENG_AES_OFFSET;
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
+
+    tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_SBOOT);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_SBOOT_KEY_SEL,src);
+
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_SBOOT,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  AES set KEY and IV
+ *
+ * @param  aesNo: AES ID type
+ * @param  keySrc: AES KEY type:SEC_ENG_AES_KEY_HW or SEC_ENG_AES_KEY_SW
+ * @param  key: AES KEY pointer
+ * @param  iv: AES IV pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_AES_Set_Key_IV(SEC_ENG_AES_ID_Type aesNo,SEC_ENG_AES_Key_Src_Type keySrc,const uint8_t *key,const uint8_t *iv)
+{
+    uint32_t AESx = SEC_ENG_BASE+SEC_ENG_AES_OFFSET;
+    uint32_t tmpVal;
+    uint32_t keyType;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
+    CHECK_PARAM(IS_SEC_ENG_AES_KEY_SRC_TYPE(keySrc));
+
+    /* Set IV */
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_IV_3,__REV(BL_RDWD_FRM_BYTEP(iv)));
+    iv+=4;
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_IV_2,__REV(BL_RDWD_FRM_BYTEP(iv)));
+    iv+=4;
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_IV_1,__REV(BL_RDWD_FRM_BYTEP(iv)));
+    iv+=4;
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_IV_0,__REV(BL_RDWD_FRM_BYTEP(iv)));
+    iv+=4;
+
+    /* Select hardware key */
+    if(keySrc==SEC_ENG_AES_KEY_HW){
+        tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_CTRL);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_HW_KEY_EN,SEC_ENG_AES_KEY_HW);
+        BL_WR_REG(AESx,SEC_ENG_SE_AES_CTRL,tmpVal);
+
+        tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_KEY_SEL_0);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_KEY_SEL_0,*key);
+        BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_SEL_0,tmpVal);
+
+        tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_KEY_SEL_1);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_KEY_SEL_1,*key);
+        BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_SEL_1,tmpVal);
+
+        return;
+    }
+
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_7,__REV(BL_RDWD_FRM_BYTEP(key)));
+    key+=4;
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_6,__REV(BL_RDWD_FRM_BYTEP(key)));
+    key+=4;
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_5,__REV(BL_RDWD_FRM_BYTEP(key)));
+    key+=4;
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_4,__REV(BL_RDWD_FRM_BYTEP(key)));
+    key+=4;
+
+    tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_CTRL);
+    keyType=BL_GET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_MODE);
+    if(keyType==(uint32_t)SEC_ENG_AES_KEY_192BITS){
+        BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_3,__REV(BL_RDWD_FRM_BYTEP(key)));
+        key+=4;
+        BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_2,__REV(BL_RDWD_FRM_BYTEP(key)));
+        key+=4;
+    }else if(keyType==(uint32_t)SEC_ENG_AES_KEY_256BITS || keyType==(uint32_t)SEC_ENG_AES_DOUBLE_KEY_128BITS){
+        BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_3,__REV(BL_RDWD_FRM_BYTEP(key)));
+        key+=4;
+        BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_2,__REV(BL_RDWD_FRM_BYTEP(key)));
+        key+=4;
+        BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_1,__REV(BL_RDWD_FRM_BYTEP(key)));
+        key+=4;
+        BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_0,__REV(BL_RDWD_FRM_BYTEP(key)));
+        key+=4;
+    }
+
+    /* Select software key */
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_HW_KEY_EN,SEC_ENG_AES_KEY_SW);
+
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_CTRL,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  AES set KEY and IV with bigendian
+ *
+ * @param  aesNo: AES ID type
+ * @param  keySrc: AES KEY type:SEC_ENG_AES_KEY_HW or SEC_ENG_AES_KEY_SW
+ * @param  key: AES KEY pointer
+ * @param  iv: AES IV pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_AES_Set_Key_IV_BE(SEC_ENG_AES_ID_Type aesNo,SEC_ENG_AES_Key_Src_Type keySrc,const uint8_t *key,const uint8_t *iv)
+{
+    uint32_t AESx = SEC_ENG_BASE+SEC_ENG_AES_OFFSET;
+    uint32_t tmpVal;
+    uint32_t keyType;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
+    CHECK_PARAM(IS_SEC_ENG_AES_KEY_SRC_TYPE(keySrc));
+
+    /* Set IV */
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_IV_0,BL_RDWD_FRM_BYTEP(iv));
+    iv+=4;
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_IV_1,BL_RDWD_FRM_BYTEP(iv));
+    iv+=4;
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_IV_2,BL_RDWD_FRM_BYTEP(iv));
+    iv+=4;
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_IV_3,BL_RDWD_FRM_BYTEP(iv));
+    iv+=4;
+
+    /* Select hardware key */
+    if(keySrc==SEC_ENG_AES_KEY_HW){
+        tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_CTRL);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_HW_KEY_EN,SEC_ENG_AES_KEY_HW);
+        BL_WR_REG(AESx,SEC_ENG_SE_AES_CTRL,tmpVal);
+        
+        tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_KEY_SEL_0);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_KEY_SEL_0,*key);
+        BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_SEL_0,tmpVal);
+
+        tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_KEY_SEL_1);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_KEY_SEL_1,*key);
+        BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_SEL_1,tmpVal);
+        
+        return ;
+    }
+
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_0,BL_RDWD_FRM_BYTEP(key));
+    key+=4;
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_1,BL_RDWD_FRM_BYTEP(key));
+    key+=4;
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_2,BL_RDWD_FRM_BYTEP(key));
+    key+=4;
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_3,BL_RDWD_FRM_BYTEP(key));
+    key+=4;
+
+    tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_CTRL);
+    keyType=BL_GET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_MODE);
+    if(keyType==(uint32_t)SEC_ENG_AES_KEY_192BITS){
+        BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_4,BL_RDWD_FRM_BYTEP(key));
+        key+=4;
+        BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_5,BL_RDWD_FRM_BYTEP(key));
+        key+=4;
+    }else if(keyType==(uint32_t)SEC_ENG_AES_KEY_256BITS || keyType==(uint32_t)SEC_ENG_AES_DOUBLE_KEY_128BITS){
+        BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_4,BL_RDWD_FRM_BYTEP(key));
+        key+=4;
+        BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_5,BL_RDWD_FRM_BYTEP(key));
+        key+=4;
+        BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_6,BL_RDWD_FRM_BYTEP(key));
+        key+=4;
+        BL_WR_REG(AESx,SEC_ENG_SE_AES_KEY_7,BL_RDWD_FRM_BYTEP(key));
+        key+=4;
+    }
+
+    /* Select software key */
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_HW_KEY_EN,SEC_ENG_AES_KEY_SW);
+
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_CTRL,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  AES set counter byte type in CTR mode
+ *
+ * @param  aesNo: AES ID type
+ * @param  counterType: AES counter type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_AES_Set_Counter_Byte(SEC_ENG_AES_ID_Type aesNo,SEC_ENG_AES_Counter_Type counterType)
+{
+    uint32_t AESx = SEC_ENG_BASE;
+    uint32_t tmpVal;
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_SEC_ENG_AES_ID_TYPE(aesNo));
+    CHECK_PARAM(IS_SEC_ENG_AES_COUNTER_TYPE(counterType));
+    
+    /* Set counter type */
+    tmpVal = BL_RD_REG(AESx,SEC_ENG_SE_AES_0_ENDIAN);
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_0_ENDIAN,BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_0_CTR_LEN,counterType));
+}
+
+/****************************************************************************//**
+ * @brief  AES encrypt or decrypt input data
+ *
+ * @param  aesCtx: AES context pointer
+ * @param  aesNo: AES ID type
+ * @param  in: AES input data buffer to deal with
+ * @param  len: AES input data length
+ * @param  out: AES output data buffer
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type Sec_Eng_AES_Crypt(SEC_Eng_AES_Ctx *aesCtx,SEC_ENG_AES_ID_Type aesNo,const uint8_t *in, uint32_t len,uint8_t *out)
+{
+    uint32_t AESx = SEC_ENG_BASE+SEC_ENG_AES_OFFSET;
+    uint32_t tmpVal;
+    uint32_t timeoutCnt = SEC_ENG_AES_BUSY_TIMEOUT_COUNT;
+
+    if( len %16 !=0){
+        return ERROR;
+    }
+
+    /* Wait finished */
+    do {
+        tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_CTRL);
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_AES_BUSY));
+
+    /* Clear trigger */
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_AES_TRIG_1T);
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_CTRL,tmpVal);
+
+    /* Set input and output address */
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_MSA,(uint32_t)in);
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_MDA,(uint32_t)out);
+
+    /* Set message length */
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_MSG_LEN,len/16);
+
+    if(aesCtx->mode==SEC_ENG_AES_CTR){
+        tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_AES_DEC_KEY_SEL);
+    }else{
+        tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_AES_DEC_KEY_SEL);
+    }
+
+    /* Set IV sel:0 for new, 1 for last */
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_AES_IV_SEL,aesCtx->aesFeed);
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_CTRL,tmpVal);
+
+    /* Trigger AES Engine */
+    tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_AES_TRIG_1T);
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_CTRL,tmpVal);
+
+    /* Wait finished */
+    timeoutCnt = SEC_ENG_AES_BUSY_TIMEOUT_COUNT;
+    do {
+        tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_CTRL);
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_AES_BUSY));
+
+    aesCtx->aesFeed=1;
+
+    return SUCCESS;  
+}
+
+/****************************************************************************//**
+ * @brief  AES finish function, clean register
+ *
+ * @param  aesNo: AES ID type
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type Sec_Eng_AES_Finish(SEC_ENG_AES_ID_Type aesNo)
+{
+    uint32_t AESx = SEC_ENG_BASE+SEC_ENG_AES_OFFSET;
+    uint32_t tmpVal;
+    uint32_t timeoutCnt = SEC_ENG_AES_BUSY_TIMEOUT_COUNT;
+
+    /* Wait finished */
+    do {
+        tmpVal=BL_RD_REG(AESx,SEC_ENG_SE_AES_CTRL);
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_AES_BUSY));
+
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_AES_EN);
+
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_AES_DEC_KEY_SEL);
+    
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_AES_IV_SEL);
+
+    BL_WR_REG(AESx,SEC_ENG_SE_AES_CTRL,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  TRNG enable TRNG interrupt
+ *
+ * @param  None
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type Sec_Eng_Trng_Enable(void)
+{
+    uint32_t TRNGx = SEC_ENG_BASE+SEC_ENG_TRNG_OFFSET;
+    uint32_t tmpVal;
+    uint32_t timeoutCnt = SEC_ENG_TRNG_BUSY_TIMEOUT_COUNT;
+
+    tmpVal=BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0);
+
+    /* FIXME:default reseed number is 0x1ff, to verify, use 0xa to speed up */
+    //tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_TRNG_RESEED_N,0x1ff);
+
+    /* No interrupt as default */
+    tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_EN);
+    BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
+    tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_INT_CLR_1T);
+    BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
+    /* busy will be set to 1 after trigger, the gap is 1T */
+    __NOP();
+    __NOP();
+    __NOP();
+    __NOP();
+    do {
+        tmpVal=BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0);
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_TRNG_BUSY));
+    /* Clear trng interrupt */
+    tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_INT_CLR_1T);
+    BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
+    
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(SEC_TRNG_IRQn,SEC_TRNG_IRQHandler);
+#endif
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  TRNG enable TRNG interrupt
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_Trng_Int_Enable(void)
+{
+    uint32_t TRNGx = SEC_ENG_BASE+SEC_ENG_TRNG_OFFSET;
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0);
+
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_INT_MASK);
+
+    BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  TRNG disable TRNG interrupt
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_Trng_Int_Disable(void)
+{
+    uint32_t TRNGx = SEC_ENG_BASE+SEC_ENG_TRNG_OFFSET;
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0);
+
+    tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_INT_MASK);
+
+    BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  TRNG get random data out
+ *
+ * @param  data[32]: TRNG output data
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type Sec_Eng_Trng_Read(uint8_t data[32])
+{
+    uint8_t *p=(uint8_t *)data;
+    uint32_t TRNGx = SEC_ENG_BASE+SEC_ENG_TRNG_OFFSET;
+    uint32_t tmpVal;
+    uint32_t timeoutCnt = SEC_ENG_TRNG_BUSY_TIMEOUT_COUNT;
+
+    tmpVal=BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0);
+
+    /* Trigger */
+    tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_TRIG_1T);
+    BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
+
+    /* busy will be set to 1 after trigger, the gap is 1T */
+    __NOP();
+    __NOP();
+    __NOP();
+    __NOP();
+    do {
+        tmpVal=BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0);
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }while(BL_IS_REG_BIT_SET(tmpVal,SEC_ENG_SE_TRNG_BUSY));
+
+    /* copy trng value */
+    BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_0));
+    p+=4;
+    BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_1));
+    p+=4;
+    BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_2));
+    p+=4;
+    BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_3));
+    p+=4;
+    BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_4));
+    p+=4;
+    BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_5));
+    p+=4;
+    BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_6));
+    p+=4;
+    BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_7));
+    p+=4;
+
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_TRIG_1T);
+    BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
+
+    /* Clear data */
+    tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_DOUT_CLR_1T);
+    BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
+
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_DOUT_CLR_1T);
+    BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  TRNG Interrupt Read Trigger
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_Trng_Int_Read_Trigger(void)
+{
+    uint32_t TRNGx = SEC_ENG_BASE+SEC_ENG_TRNG_OFFSET;
+    uint32_t tmpVal;
+
+    Sec_Eng_Trng_Int_Enable();
+
+    tmpVal=BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0);
+    /* Trigger */
+    tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_TRIG_1T);
+    BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  TRNG get random data out with Interrupt
+ *
+ * @param  data[32]: TRNG output data
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_Trng_Int_Read(uint8_t data[32])
+{
+    uint8_t *p=(uint8_t *)data;
+    uint32_t TRNGx = SEC_ENG_BASE+SEC_ENG_TRNG_OFFSET;
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0);
+
+    /* copy trng value */
+    BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_0));
+    p+=4;
+    BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_1));
+    p+=4;
+    BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_2));
+    p+=4;
+    BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_3));
+    p+=4;
+    BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_4));
+    p+=4;
+    BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_5));
+    p+=4;
+    BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_6));
+    p+=4;
+    BL_WRWD_TO_BYTEP(p,BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_DOUT_7));
+    p+=4;
+
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_TRIG_1T);
+    BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
+
+    /* Clear data */
+    tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_DOUT_CLR_1T);
+    BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
+
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_DOUT_CLR_1T);
+    BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  Disable TRNG
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_Trng_Disable(void)
+{
+    uint32_t TRNGx = SEC_ENG_BASE+SEC_ENG_TRNG_OFFSET;
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0);
+
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_EN);
+    //tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_RESEED_N);
+    tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_TRNG_INT_CLR_1T);
+
+    BL_WR_REG(TRNGx,SEC_ENG_SE_TRNG_CTRL_0,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  PKA Reset
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_Reset(void)
+{
+    uint8_t val;
+
+    //Disable sec engine
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0, 0);
+
+    //Enable sec engine
+    val = 1<<3;
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0, val);
+}
+
+/****************************************************************************//**
+ * @brief  PKA Enable big endian
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_BigEndian_Enable(void)
+{
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0);
+    tmpVal=BL_SET_REG_BIT(tmpVal,SEC_ENG_SE_PKA_0_ENDIAN);
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0, tmpVal);
+    
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(SEC_PKA_IRQn,SEC_PKA_IRQHandler);
+#endif
+}
+
+/****************************************************************************//**
+ * @brief  PKA Enable little endian
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_LittleEndian_Enable(void)
+{
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SEC_ENG_SE_PKA_0_ENDIAN);
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0, tmpVal);
+    
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(SEC_PKA_IRQn,SEC_PKA_IRQHandler);
+#endif
+}
+
+/****************************************************************************//**
+ * @brief  PKA get status function
+ *
+ * @param  status: Structure pointer of PKA status type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_GetStatus(SEC_Eng_PKA_Status_Type *status)
+{
+    uint32_t tmpVal;
+    
+    tmpVal = BL_RD_REG(SEC_ENG_BASE,SEC_ENG_SE_PKA_0_CTRL_0);
+    *(uint16_t*)status = (uint16_t)BL_GET_REG_BITS_VAL(tmpVal,SEC_ENG_SE_PKA_0_STATUS);
+}
+
+/****************************************************************************//**
+ * @brief  PKA clear interrupt
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_Clear_Int(void)
+{
+    uint32_t ctrl;
+
+    ctrl = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0);
+    ctrl = BL_SET_REG_BIT(ctrl, SEC_ENG_SE_PKA_0_INT_CLR_1T);
+
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0, ctrl);
+
+    ctrl = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0);
+    ctrl = BL_CLR_REG_BIT(ctrl, SEC_ENG_SE_PKA_0_INT_CLR_1T);
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0, ctrl);
+}
+
+/****************************************************************************//**
+ * @brief  PKA get Register size according to Register type
+ *
+ * @param  reg_type: PKA Register type
+ *
+ * @return Register size
+ *
+*******************************************************************************/
+static uint16_t Sec_Eng_PKA_Get_Reg_Size(SEC_ENG_PKA_REG_SIZE_Type reg_type)
+{
+    switch(reg_type)
+    {
+        case SEC_ENG_PKA_REG_SIZE_8:
+            return 8;
+        case SEC_ENG_PKA_REG_SIZE_16:
+            return 16;
+        case SEC_ENG_PKA_REG_SIZE_32:
+            return 32;
+        case SEC_ENG_PKA_REG_SIZE_64:
+            return 64;
+        case SEC_ENG_PKA_REG_SIZE_96:
+            return 96;
+        case SEC_ENG_PKA_REG_SIZE_128:
+            return 128;
+        case SEC_ENG_PKA_REG_SIZE_192:
+            return 192;
+        case SEC_ENG_PKA_REG_SIZE_256:
+            return 256;
+        case SEC_ENG_PKA_REG_SIZE_384:
+            return 384;
+        case SEC_ENG_PKA_REG_SIZE_512:
+            return 512;
+        default:
+            return 0;
+    }
+}
+
+/****************************************************************************//**
+ * @brief  PKA set pre-load register configuration
+ *
+ * @param  size: Data size in word to write
+ * @param  regIndex: Register index
+ * @param  regType: Register type
+ * @param  op: PKA operation
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+static void Sec_Eng_PKA_Write_Pld_Cfg(uint16_t size, uint8_t regIndex, SEC_ENG_PKA_REG_SIZE_Type regType, SEC_ENG_PKA_OP_Type op, uint8_t lastOp)
+{
+    struct pka0_pld_cfg cfg;
+
+    cfg.value.BF.size = size;
+    cfg.value.BF.d_reg_index = regIndex;
+    cfg.value.BF.d_reg_type = regType;
+    cfg.value.BF.op = op;
+    cfg.value.BF.last_op = lastOp;
+    
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, cfg.value.WORD);
+}
+
+/****************************************************************************//**
+ * @brief  PKA write common operation first configuration
+ *
+ * @param  s0RegIndex: Register index
+ * @param  s0RegType: Register type
+ * @param  dRegIndex: Result Register index
+ * @param  dRegType: Result Register type
+ * @param  op: PKA operation
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+static void Sec_Eng_PKA_Write_Common_OP_First_Cfg(uint8_t s0RegIndex, uint8_t s0RegType, uint8_t dRegIndex, uint8_t dRegType,
+                                    uint8_t op, uint8_t lastOp)
+{
+    struct pka0_common_op_first_cfg cfg;
+
+    cfg.value.BF.s0_reg_idx = s0RegIndex;
+    cfg.value.BF.s0_reg_type = s0RegType;
+    if(op != SEC_ENG_PKA_OP_LCMP)
+    {
+        cfg.value.BF.d_reg_idx = dRegIndex;
+        cfg.value.BF.d_reg_type = dRegType;
+    }
+    cfg.value.BF.op = op;
+    cfg.value.BF.last_op = lastOp;
+
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, cfg.value.WORD);
+}
+
+/****************************************************************************//**
+ * @brief  PKA write common operation second configuration1
+ *
+ * @param  s1RegIndex: Register index
+ * @param  s1RegType: Register type
+ *
+ * @return None
+ *
+*******************************************************************************/
+static void Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1(uint8_t s1RegIndex, uint8_t s1RegType)
+{
+    struct pka0_common_op_snd_cfg_S1_only cfg;
+
+    cfg.value.BF.s1_reg_idx = s1RegIndex;
+    cfg.value.BF.s1_reg_type = s1RegType;
+
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, cfg.value.WORD);
+}
+
+/****************************************************************************//**
+ * @brief  PKA write common operation second configuration2
+ *
+ * @param  s2RegIndex: Register index
+ * @param  s2RegType: Register type
+ *
+ * @return None
+ *
+*******************************************************************************/
+static void Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S2(uint8_t s2RegIndex, uint8_t s2RegType)
+{
+    struct pka0_common_op_snd_cfg_S2_only cfg;
+
+    cfg.value.BF.s2_reg_idx = s2RegIndex;
+    cfg.value.BF.s2_reg_type = s2RegType;
+
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, cfg.value.WORD);
+}
+
+/****************************************************************************//**
+ * @brief  PKA write common operation second configuration1 and configuration 2
+ *
+ * @param  s1RegIndex: Configuration 1 Register index
+ * @param  s1RegType: Configuration 1 Register type
+ * @param  s2RegIndex: Configuration 2 Register index
+ * @param  s2RegType: Configuration 3 Register type
+ *
+ * @return None
+ *
+*******************************************************************************/
+static void Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1_S2(uint8_t s1RegIndex, uint8_t s1RegType, uint8_t s2RegIndex, uint8_t s2RegType)
+{
+    struct pka0_common_op_snd_cfg_S1_S2 cfg;
+
+    cfg.value.BF.s1_reg_idx = s1RegIndex;
+    cfg.value.BF.s1_reg_type = s1RegType;
+    cfg.value.BF.s2_reg_idx = s2RegIndex;
+    cfg.value.BF.s2_reg_type = s2RegType;
+
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, cfg.value.WORD);
+}
+
+/****************************************************************************//**
+ * @brief  PKA wait for complete interrupt
+ *
+ * @param  None
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+static BL_Err_Type Sec_Eng_PKA_Wait_ISR(void)
+{
+    uint32_t pka0_ctrl;
+    uint32_t timeoutCnt = SEC_ENG_PKA_INT_TIMEOUT_COUNT;
+    
+    do{
+        pka0_ctrl = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0);
+        timeoutCnt--;
+        if(timeoutCnt == 0){
+            return TIMEOUT;
+        }
+    }while(!BL_GET_REG_BITS_VAL(pka0_ctrl, SEC_ENG_SE_PKA_0_INT));
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  PKA read block data from register
+ *
+ * @param  dest: Pointer to buffer address
+ * @param  src: Pointer to register address
+ * @param  len: Data len in word
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifdef ARCH_ARM
+#ifndef __GNUC__
+__ASM void Sec_Eng_PKA_Read_Block(uint32_t *dest,const uint32_t *src,uint32_t len)
+{
+    PUSH  {R3-R6,LR}
+Start0
+    CMP  R2,#4
+    BLT  Finish0
+    LDR  R3,[R1]
+    LDR  R4,[R1]
+    LDR  R5,[R1]
+    LDR  R6,[R1]
+    STMIA  R0!,{R3-R6}
+    SUBS R2,R2,#4
+    B  Start0
+Finish0
+    POP  {R3-R6,PC}
+}
+#else
+void Sec_Eng_PKA_Read_Block(uint32_t *dest,const uint32_t *src,uint32_t len)
+{
+__asm__ __volatile__("push {r3-r6,lr}\n\t"
+"Start0 :"
+"cmp   r2,#4\n\t"
+"blt   Finish0\n\t"
+"ldr   r3,[r1]\n\t"
+"ldr   r4,[r1]\n\t"
+"ldr   r5,[r1]\n\t"
+"ldr   r6,[r1]\n\t"
+"stmia r0!,{r3-r6}\n\t"
+"sub   r2,r2,#4\n\t"
+"b     Start0\n\t"
+"Finish0 :"
+"pop   {r3-r6,pc}\n\t"
+);
+}
+#endif
+#endif
+#ifdef ARCH_RISCV
+void Sec_Eng_PKA_Read_Block(uint32_t *dest,const uint32_t *src,uint32_t len)
+{
+    uint32_t wrLen=len-len%4;
+    uint32_t i;
+
+    for(i=0;iregLen/4){
+        size=regLen/4;
+    }
+    Sec_Eng_PKA_Write_Block((uint32_t*)(SEC_ENG_BASE+SEC_ENG_SE_PKA_0_RW_OFFSET),data,size);
+    index=size-(size%4);
+    while(index < size)
+    {
+        BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, data[index]);
+        index++;
+    }
+}
+
+/****************************************************************************//**
+ * @brief  PKA read data from register
+ *
+ * @param  regType: Register type
+ * @param  regIdx: Register index
+ * @param  result: Data buffer
+ * @param  retSize: Data length in word
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_Read_Data(SEC_ENG_PKA_REG_SIZE_Type regType, uint8_t regIdx, uint32_t *result, uint8_t retSize)
+{
+    uint16_t regSize;
+    uint32_t dummyData = 0;
+    
+    regSize = Sec_Eng_PKA_Get_Reg_Size(regType);
+    if(retSize > regSize/4){
+        result = NULL;
+        return;
+    }
+    
+    Sec_Eng_PKA_Write_Pld_Cfg(retSize, regIdx, regType, SEC_ENG_PKA_OP_CFLIR_BUFFER,1);
+    
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, dummyData);
+
+    Sec_Eng_PKA_Get_Result(result, retSize,regSize);
+}
+
+/****************************************************************************//**
+ * @brief  PKA clear register
+ *
+ * @param  dRegType: Register type
+ * @param  dRegIdx: Register index
+ * @param  size: Data length in word
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_CREG(SEC_ENG_PKA_REG_SIZE_Type dRegType, uint8_t dRegIdx, uint8_t size,uint8_t lastOp)
+{
+    uint32_t dummyData = 0;
+
+    Sec_Eng_PKA_Write_Pld_Cfg(size, dRegIdx, dRegType, SEC_ENG_PKA_OP_CLIR, lastOp);
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, dummyData);
+
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  PKA load data to register
+ *
+ * @param  regType: regType: Register type
+ * @param  regIndex: regIndex: Register index
+ * @param  data: data: Data buffer
+ * @param  lastOp: size: Data length in word
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_Write_Immediate( SEC_ENG_PKA_REG_SIZE_Type regType,uint8_t regIndex,uint32_t data,uint8_t lastOp)
+{
+    struct pka0_pldi_cfg cfg;
+
+    cfg.value.BF.rsvd=0;
+    cfg.value.BF.d_reg_index = regIndex;
+    cfg.value.BF.d_reg_type = regType;
+    cfg.value.BF.op = SEC_ENG_PKA_OP_SLIR;
+    cfg.value.BF.last_op = lastOp;
+
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, cfg.value.WORD);
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, data);
+
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  PKA negative source data:D = (1 << SIZE{S0})-S0
+ *
+ * @param  dRegType: Destination Register type
+ * @param  dRegIdx: Destination Register index
+ * @param  s0RegType: Source Register type
+ * @param  s0RegIdx: Source Register index
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_NREG(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,uint8_t lastOp)
+{
+    uint32_t dummyData = 0;
+    
+    Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_NLIR, lastOp);
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, dummyData);
+    
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  PKA move data:D = S0
+ *
+ * @param  dRegType: Destination Register type
+ * @param  dRegIdx: Destination Register index
+ * @param  s0RegType: Source Register type
+ * @param  s0RegIdx: Source Register index
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_Move_Data(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,uint8_t lastOp)
+{
+    uint32_t dummyData = 0;
+    
+    Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_MOVDAT, lastOp);
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, dummyData);
+    
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  PKA resize data:D = S0, D.Size = S0.Size
+ *
+ * @param  dRegType: Destination Register type
+ * @param  dRegIdx: Destination Register index
+ * @param  s0RegType: Source Register type
+ * @param  s0RegIdx: Source Register index
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_RESIZE(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,uint8_t lastOp)
+{
+    uint32_t dummyData = 0;
+    
+    Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_RESIZE, lastOp);
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, dummyData);
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  PKA mod add:D = (S0 + S1) mod S2
+ *
+ * @param  dRegType: Destination Register type
+ * @param  dRegIdx: Destination Register index
+ * @param  s0RegType: Source 0 Register type
+ * @param  s0RegIdx: Source 0 Register index
+ * @param  s1RegType: Source 1 Register type
+ * @param  s1RegIdx: Source 1 Register index
+ * @param  s2RegType: Source 2 Register type
+ * @param  s2RegIdx: Source 2 Register index
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_MADD(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+                       uint8_t s1RegType, uint8_t s1RegIdx, uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp)
+{    
+    Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_MADD, lastOp);
+    Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1_S2(s1RegIdx, s1RegType, s2RegIdx, s2RegType);
+    
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  PKA mod sub:D = (S0 - S1) mod S2
+ *
+ * @param  dRegType: Destination Register type
+ * @param  dRegIdx: Destination Register index
+ * @param  s0RegType: Source 0 Register type
+ * @param  s0RegIdx: Source 0 Register index
+ * @param  s1RegType: Source 1 Register type
+ * @param  s1RegIdx: Source 1 Register index
+ * @param  s2RegType: Source 2 Register type
+ * @param  s2RegIdx: Source 2 Register index
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_MSUB(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+                       uint8_t s1RegType, uint8_t s1RegIdx, uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp)
+{    
+    Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_MSUB, lastOp);
+    Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1_S2(s1RegIdx, s1RegType, s2RegIdx, s2RegType);
+    
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  PKA mod :D = S0 mod S2
+ *
+ * @param  dRegType: Destination Register type
+ * @param  dRegIdx: Destination Register index
+ * @param  s0RegType: Source 0 Register type
+ * @param  s0RegIdx: Source 0 Register index
+ * @param  s2RegType: Source 2 Register type
+ * @param  s2RegIdx: Source 2 Register index
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_MREM(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+                       uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp)
+{    
+    Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_MREM, lastOp);
+    Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S2(s2RegIdx, s2RegType);
+    
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }    
+}
+
+/****************************************************************************//**
+ * @brief  PKA mod mul:D = (S0 * S1) mod S2
+ *
+ * @param  dRegType: Destination Register type
+ * @param  dRegIdx: Destination Register index
+ * @param  s0RegType: Source 0 Register type
+ * @param  s0RegIdx: Source 0 Register index
+ * @param  s1RegType: Source 1 Register type
+ * @param  s1RegIdx: Source 1 Register index
+ * @param  s2RegType: Source 2 Register type
+ * @param  s2RegIdx: Source 2 Register index
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_MMUL(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+                       uint8_t s1RegType, uint8_t s1RegIdx, uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp)
+{    
+    Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_MMUL, lastOp);
+    Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1_S2(s1RegIdx, s1RegType, s2RegIdx, s2RegType);
+    
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  PKA mod sqr:D = (S0 ^ 2) mod S2
+ *
+ * @param  dRegType: Destination Register type
+ * @param  dRegIdx: Destination Register index
+ * @param  s0RegType: Source 0 Register type
+ * @param  s0RegIdx: Source 0 Register index
+ * @param  s2RegType: Source 2 Register type
+ * @param  s2RegIdx: Source 2 Register index
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_MSQR(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+                       uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp)
+{    
+    Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_MSQR, lastOp);
+    Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S2(s2RegIdx, s2RegType);
+    
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }    
+}
+
+/****************************************************************************//**
+ * @brief  PKA mod exp:D = (S0 ^ S1) mod S2
+ *
+ * @param  dRegType: Destination Register type
+ * @param  dRegIdx: Destination Register index
+ * @param  s0RegType: Source 0 Register type
+ * @param  s0RegIdx: Source 0 Register index
+ * @param  s1RegType: Source 1 Register type
+ * @param  s1RegIdx: Source 1 Register index
+ * @param  s2RegType: Source 2 Register type
+ * @param  s2RegIdx: Source 2 Register index
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_MEXP(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+                       uint8_t s1RegType, uint8_t s1RegIdx, uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp)
+{    
+    Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_MEXP, lastOp);
+    Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1_S2(s1RegIdx, s1RegType, s2RegIdx, s2RegType);
+    
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  PKA mod exp:D = (S0 ^ (S2-2) ) mod S2
+ *
+ * @param  dRegType: Destination Register type
+ * @param  dRegIdx: Destination Register index
+ * @param  s0RegType: Source 0 Register type
+ * @param  s0RegIdx: Source 0 Register index
+ * @param  s2RegType: Source 2 Register type
+ * @param  s2RegIdx: Source 2 Register index
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_MINV(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+                       uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp)
+{
+    Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_MINV, lastOp);
+    Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S2(s2RegIdx, s2RegType);
+    
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  PKA Report COUT to 1 when S0 < S1
+ *
+ * @param  cout: Compare result
+ * @param  s0RegType: Source 0 Register type
+ * @param  s0RegIdx: Source 0 Register index
+ * @param  s1RegType: Source 1 Register type
+ * @param  s1RegIdx: Source 1 Register index
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_LCMP(uint8_t *cout, uint8_t s0RegType, uint8_t s0RegIdx, uint8_t s1RegType, uint8_t s1RegIdx)
+{
+    uint32_t pka0_ctrl = 0x00;
+    
+    Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, 0, 0, SEC_ENG_PKA_OP_LCMP, 1);
+    Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1(s1RegIdx, s1RegType);
+
+    Sec_Eng_PKA_Wait_ISR();
+    Sec_Eng_PKA_Clear_Int();
+    pka0_ctrl = BL_RD_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_CTRL_0);
+    
+    *cout = (pka0_ctrl&SEC_ENG_PKA_STATUS_LAST_OPC_MASK)>>SEC_ENG_PKA_STATUS_LAST_OPC_OFFSET;
+}
+
+/****************************************************************************//**
+ * @brief  PKA add:D = S0 + S1
+ *
+ * @param  dRegType: Destination Register type
+ * @param  dRegIdx: Destination Register index
+ * @param  s0RegType: Source 0 Register type
+ * @param  s0RegIdx: Source 0 Register index
+ * @param  s1RegType: Source 1 Register type
+ * @param  s1RegIdx: Source 1 Register index
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_LADD(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+                       uint8_t s1RegType, uint8_t s1RegIdx,uint8_t lastOp)
+{    
+    Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_LADD, lastOp);
+    Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1(s1RegIdx, s1RegType);
+    
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  PKA sub:D = S0 - S1
+ *
+ * @param  dRegType: Destination Register type
+ * @param  dRegIdx: Destination Register index
+ * @param  s0RegType: Source 0 Register type
+ * @param  s0RegIdx: Source 0 Register index
+ * @param  s1RegType: Source 1 Register type
+ * @param  s1RegIdx: Source 1 Register index
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_LSUB(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+                       uint8_t s1RegType, uint8_t s1RegIdx,uint8_t lastOp)
+{    
+    Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_LSUB, lastOp);
+    Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1(s1RegIdx, s1RegType);
+    
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  PKA mul:D = S0 * S1
+ *
+ * @param  dRegType: Destination Register type
+ * @param  dRegIdx: Destination Register index
+ * @param  s0RegType: Source 0 Register type
+ * @param  s0RegIdx: Source 0 Register index
+ * @param  s1RegType: Source 1 Register type
+ * @param  s1RegIdx: Source 1 Register index
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_LMUL(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+                       uint8_t s1RegType, uint8_t s1RegIdx,uint8_t lastOp)
+{
+    
+    Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_LMUL, lastOp);
+    Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S1(s1RegIdx, s1RegType);
+    
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  PKA sqr:D = S0^2
+ *
+ * @param  dRegType: Destination Register type
+ * @param  dRegIdx: Destination Register index
+ * @param  s0RegType: Source 0 Register type
+ * @param  s0RegIdx: Source 0 Register index
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_LSQR(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,uint8_t lastOp)
+{
+    uint32_t dummyData = 0;
+    
+    Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_LSQR, lastOp);
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, dummyData);
+    
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  PKA div:D = S0 / S2
+ *
+ * @param  dRegType: Destination Register type
+ * @param  dRegIdx: Destination Register index
+ * @param  s0RegType: Source 0 Register type
+ * @param  s0RegIdx: Source 0 Register index
+ * @param  s2RegType: Source 2 Register type
+ * @param  s2RegIdx: Source 2 Register index
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_LDIV(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+                       uint8_t s2RegType, uint8_t s2RegIdx,uint8_t lastOp)
+{    
+    Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_LDIV, lastOp);
+    Sec_Eng_PKA_Write_Common_OP_Snd_Cfg_S2(s2RegIdx, s2RegType);
+    
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  PKA shift:D = S0 << BIT SHIFT
+ *
+ * @param  dRegType: Destination Register type
+ * @param  dRegIdx: Destination Register index
+ * @param  s0RegType: Source 0 Register type
+ * @param  s0RegIdx: Source 0 Register index
+ * @param  bit_shift: Bits to shift
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_LMUL2N(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+                    uint16_t bit_shift,uint8_t lastOp)
+{
+    struct pka0_bit_shift_op_cfg cfg;
+    
+    Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_LMUL2N, 0);
+
+    cfg.value.BF.bit_shift = bit_shift;
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, cfg.value.WORD);
+    
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  PKA shift:D = S0 >> BIT SHIFT
+ *
+ * @param  dRegType: Destination Register type
+ * @param  dRegIdx: Destination Register index
+ * @param  s0RegType: Source 0 Register type
+ * @param  s0RegIdx: Source 0 Register index
+ * @param  bit_shift: Bits to shift
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_LDIV2N(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+                        uint16_t bit_shift,uint8_t lastOp)
+{
+    struct pka0_bit_shift_op_cfg cfg;
+    
+    Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_LDIV2N, 0);
+
+    cfg.value.BF.bit_shift = bit_shift;
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, cfg.value.WORD);
+    
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  PKA mod 2N:D = S0 % ((1 << BIT SHIFT)-1)
+ *
+ * @param  dRegType: Destination Register type
+ * @param  dRegIdx: Destination Register index
+ * @param  s0RegType: Source 0 Register type
+ * @param  s0RegIdx: Source 0 Register index
+ * @param  bit_shift: Bits to shift
+ * @param  lastOp: Last operation
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Sec_Eng_PKA_LMOD2N(uint8_t dRegType, uint8_t dRegIdx, uint8_t s0RegType, uint8_t s0RegIdx,
+                        uint16_t bit_shift,uint8_t lastOp)
+{
+    struct pka0_bit_shift_op_cfg cfg;
+    
+    Sec_Eng_PKA_Write_Common_OP_First_Cfg(s0RegIdx, s0RegType, dRegIdx, dRegType, SEC_ENG_PKA_OP_MOD2N, lastOp);
+
+    cfg.value.BF.bit_shift = bit_shift;
+    BL_WR_REG(SEC_ENG_BASE, SEC_ENG_SE_PKA_0_RW, cfg.value.WORD);
+    
+    if(lastOp){
+        Sec_Eng_PKA_Wait_ISR();
+        Sec_Eng_PKA_Clear_Int();
+    }
+}
+
+
+/****************************************************************************//**
+ * @brief  PKA GF to Mont  filed 2N:d = (a<
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_glb.h"
+#include "bl702_sf_cfg.h"
+#include "softcrc.h"
+#include "bl702_xip_sflash.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  SF_CFG
+ *  @{
+ */
+
+/** @defgroup  SF_CFG_Private_Macros
+ *  @{
+ */
+#define BFLB_FLASH_CFG_MAGIC                    "FCFG"
+
+/*@} end of group SF_CFG_Private_Macros */
+
+/** @defgroup  SF_CFG_Private_Types
+ *  @{
+ */
+#ifndef BFLB_USE_ROM_DRIVER
+typedef struct {
+    uint32_t jedecID;
+    char *name;
+    const SPI_Flash_Cfg_Type *cfg;
+}Flash_Info_t;
+#endif
+
+
+/*@} end of group SF_CFG_Private_Types */
+
+/** @defgroup  SF_CFG_Private_Variables
+ *  @{
+ */
+#ifndef BFLB_USE_ROM_DRIVER
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Winb_80DV={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0xef,
+
+        .deBurstWrapCmd=0x77,
+        .deBurstWrapCmdDmyClk=0x3,
+        .deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .deBurstWrapData=0xF0,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=1,
+        .qeBit=0x01,
+        .qeWriteRegLen=0x02,
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x35,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x01,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=16/8,
+        .cReadSupport=0,
+        .cReadMode=0xFF,
+
+        .burstWrapCmd=0x77,
+        .burstWrapCmdDmyClk=0x3,
+        .burstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .burstWrapData=0x40,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x32,
+        .qppAddrMode=SF_CTRL_ADDR_1_LINE,
+
+        .ioMode=SF_CTRL_QIO_MODE,
+        .clkDelay=1,
+        .clkInvert=0x3d,
+
+        .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=0,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=300,
+        .timeE32k=1200,
+        .timeE64k=1200,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=3,
+        .qeData=0,
+};
+
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Winb_16DV={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0xef,
+
+        .deBurstWrapCmd=0x77,
+        .deBurstWrapCmdDmyClk=0x3,
+        .deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .deBurstWrapData=0xF0,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=1,
+        .qeBit=0x01,
+        .qeWriteRegLen=0x02,                        /*Q08BV,Q16DV: 0x02.Q32FW,Q32FV: 0x01 */
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x35,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x01,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=16/8,
+        .cReadSupport=1,
+        .cReadMode=0x20,
+
+        .burstWrapCmd=0x77,
+        .burstWrapCmdDmyClk=0x3,
+        .burstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .burstWrapData=0x40,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x32,
+        .qppAddrMode=SF_CTRL_ADDR_1_LINE,
+
+        .ioMode=SF_CTRL_QIO_MODE,
+        .clkDelay=1,
+        .clkInvert=0x3d,
+
+        .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=0,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=300,
+        .timeE32k=1200,
+        .timeE64k=1200,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=3,
+        .qeData=0,
+};
+
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Winb_80EW_16FW_32JW_32FW_32FV={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0xef,
+
+        .deBurstWrapCmd=0x77,
+        .deBurstWrapCmdDmyClk=0x3,
+        .deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .deBurstWrapData=0xF0,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=1,
+        .qeBit=0x01,
+        .qeWriteRegLen=0x01,
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x35,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x31,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=16/8,
+        .cReadSupport=1,
+        .cReadMode=0x20,
+
+        .burstWrapCmd=0x77,
+        .burstWrapCmdDmyClk=0x3,
+        .burstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .burstWrapData=0x40,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x32,
+        .qppAddrMode=SF_CTRL_ADDR_1_LINE,
+
+        .ioMode=SF_CTRL_QIO_MODE,
+        .clkDelay=1,
+        .clkInvert=0x3f,
+
+        .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=0,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=400,
+        .timeE32k=1600,
+        .timeE64k=2000,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=3,
+        .qeData=0,
+};
+
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Issi={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0x9d,
+
+        .deBurstWrapCmd=0xC0,
+        .deBurstWrapCmdDmyClk=0x00,
+        .deBurstWrapDataMode=SF_CTRL_DATA_1_LINE,
+        .deBurstWrapData=0x00,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=0,
+        .qeBit=0x06,
+        .qeWriteRegLen=0x01,
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x35,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x31,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=16/8,
+        .cReadSupport=1,
+        .cReadMode=0xA0,
+
+        .burstWrapCmd=0xC0,
+        .burstWrapCmdDmyClk=0x00,
+        .burstWrapDataMode=SF_CTRL_DATA_1_LINE,
+        .burstWrapData=0x06,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x32,
+        .qppAddrMode=SF_CTRL_ADDR_1_LINE,
+
+        .ioMode=SF_CTRL_QIO_MODE,
+        .clkDelay=1,
+        .clkInvert=0x3f,
+
+         .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=0,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=300,
+        .timeE32k=1200,
+        .timeE64k=1200,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=5,
+        .qeData=0,
+};
+
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Gd_Md_40D={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0x51,
+
+        .deBurstWrapCmd=0x77,
+        .deBurstWrapCmdDmyClk=0x3,
+        .deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .deBurstWrapData=0xF0,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=1,
+        .qeBit=0x01,
+        .qeWriteRegLen=0x02,
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x35,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x01,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=16/8,
+        .cReadSupport=0,
+        .cReadMode=0xA0,
+
+        .burstWrapCmd=0x77,
+        .burstWrapCmdDmyClk=0x3,
+        .burstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .burstWrapData=0x40,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x32,
+        .qppAddrMode=SF_CTRL_ADDR_1_LINE,
+
+        .ioMode=SF_CTRL_DO_MODE,
+        .clkDelay=1,
+        .clkInvert=0x3f,
+
+        .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=0,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=300,
+        .timeE32k=1200,
+        .timeE64k=1200,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=20,
+        .qeData=0,
+};
+
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Gd_LQ08C_LE16C_LQ32D_WQ32E={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0xc8,
+
+        .deBurstWrapCmd=0x77,
+        .deBurstWrapCmdDmyClk=0x3,
+        .deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .deBurstWrapData=0xF0,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=1,
+        .qeBit=0x01,
+        .qeWriteRegLen=0x02,
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x35,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x01,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=16/8,
+        .cReadSupport=1,
+        .cReadMode=0x20,
+
+        .burstWrapCmd=0x77,
+        .burstWrapCmdDmyClk=0x3,
+        .burstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .burstWrapData=0x40,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x32,
+        .qppAddrMode=SF_CTRL_ADDR_1_LINE,
+
+        .ioMode=SF_CTRL_QIO_MODE,
+        .clkDelay=1,
+        .clkInvert=0x3f,
+
+        .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=0,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=300,
+        .timeE32k=1200,
+        .timeE64k=1200,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=20,
+        .qeData=0,
+};
+
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Gd_Q80E_Q16E={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0xc8,
+
+        .deBurstWrapCmd=0x77,
+        .deBurstWrapCmdDmyClk=0x3,
+        .deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .deBurstWrapData=0xF0,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=1,
+        .qeBit=0x01,
+        .qeWriteRegLen=0x02,
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x35,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x01,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=16/8,
+        .cReadSupport=1,
+        .cReadMode=0xA0,
+
+        .burstWrapCmd=0x77,
+        .burstWrapCmdDmyClk=0x3,
+        .burstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .burstWrapData=0x40,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x32,
+        .qppAddrMode=SF_CTRL_ADDR_1_LINE,
+
+        .ioMode=SF_CTRL_QIO_MODE,
+        .clkDelay=1,
+        .clkInvert=0x3f,
+
+        .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=0,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=300,
+        .timeE32k=1200,
+        .timeE64k=1200,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=20,
+        .qeData=0,
+};
+
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Gd_WQ80E_WQ16E={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0xc8,
+
+        .deBurstWrapCmd=0x77,
+        .deBurstWrapCmdDmyClk=0x3,
+        .deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .deBurstWrapData=0xF0,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=1,
+        .qeBit=0x01,
+        .qeWriteRegLen=0x02,
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x35,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x01,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=32/8,
+        .cReadSupport=1,
+        .cReadMode=0xA0,
+
+        .burstWrapCmd=0x77,
+        .burstWrapCmdDmyClk=0x3,
+        .burstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .burstWrapData=0x40,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x32,
+        .qppAddrMode=SF_CTRL_ADDR_1_LINE,
+
+        .ioMode=SF_CTRL_QIO_MODE,
+        .clkDelay=1,
+        .clkInvert=0x3f,
+
+        .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=8/8,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=300,
+        .timeE32k=1200,
+        .timeE64k=1200,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=20,
+        .qeData=0x12,
+};
+
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Gd_Q32C={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0xc8,
+
+        .deBurstWrapCmd=0x77,
+        .deBurstWrapCmdDmyClk=0x3,
+        .deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .deBurstWrapData=0xF0,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=1,
+        .qeBit=0x01,
+        .qeWriteRegLen=0x01,
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x35,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x31,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=16/8,
+        .cReadSupport=1,
+        .cReadMode=0x20,
+
+        .burstWrapCmd=0x77,
+        .burstWrapCmdDmyClk=0x3,
+        .burstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .burstWrapData=0x40,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x32,
+        .qppAddrMode=SF_CTRL_ADDR_1_LINE,
+
+        .ioMode=SF_CTRL_QIO_MODE,
+        .clkDelay=1,
+        .clkInvert=0x3f,
+
+        .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=0,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=300,
+        .timeE32k=1200,
+        .timeE64k=1200,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=20,
+        .qeData=0,
+};
+
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Mxic={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0xC2,
+
+        .deBurstWrapCmd=0xC0,
+        .deBurstWrapCmdDmyClk=0x00,
+        .deBurstWrapDataMode=SF_CTRL_DATA_1_LINE,
+        .deBurstWrapData=0x10,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=0,
+        .qeBit=0x06,
+        .qeWriteRegLen=0x02,
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x35,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x01,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=16/8,
+        .cReadSupport=1,
+        .cReadMode=0xA5,
+
+        .burstWrapCmd=0xC0,
+        .burstWrapCmdDmyClk=0x00,
+        .burstWrapDataMode=SF_CTRL_DATA_1_LINE,
+        .burstWrapData=0x02,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x38,
+        .qppAddrMode=SF_CTRL_ADDR_4_LINES,
+
+        .ioMode=SF_CTRL_QIO_MODE,
+        .clkDelay=1,
+        .clkInvert=0x3f,
+
+        .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=0,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=300,
+        .timeE32k=1200,
+        .timeE64k=1200,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=45,
+        .qeData=0,
+};
+
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Mxic_1635F={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0xC2,
+
+        .deBurstWrapCmd=0xC0,
+        .deBurstWrapCmdDmyClk=0x00,
+        .deBurstWrapDataMode=SF_CTRL_DATA_1_LINE,
+        .deBurstWrapData=0x10,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=0,
+        .qeBit=0x06,
+        .qeWriteRegLen=0x01,
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x35,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x01,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=16/8,
+        .cReadSupport=1,
+        .cReadMode=0xA5,
+
+        .burstWrapCmd=0xC0,
+        .burstWrapCmdDmyClk=0x00,
+        .burstWrapDataMode=SF_CTRL_DATA_1_LINE,
+        .burstWrapData=0x02,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x38,
+        .qppAddrMode=SF_CTRL_ADDR_4_LINES,
+
+        .ioMode=SF_CTRL_QIO_MODE,
+        .clkDelay=1,
+        .clkInvert=0x3f,
+
+        .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=0,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=300,
+        .timeE32k=1200,
+        .timeE64k=1200,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=45,
+        .qeData=0,
+};
+
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Xtx40={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0x0B,
+
+        .deBurstWrapCmd=0x77,
+        .deBurstWrapCmdDmyClk=0x3,
+        .deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .deBurstWrapData=0xF0,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=0x01,
+        .qeBit=0x01,
+        .qeWriteRegLen=0x02,
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x35,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x01,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=16/8,
+        .cReadSupport=1,
+        .cReadMode=0x20,
+
+        .burstWrapCmd=0x77,
+        .burstWrapCmdDmyClk=0x3,
+        .burstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .burstWrapData=0x40,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x32,
+        .qppAddrMode=SF_CTRL_ADDR_1_LINE,
+
+        .ioMode=SF_CTRL_DIO_MODE,
+        .clkDelay=1,
+        .clkInvert=0x3f,
+
+        .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=0,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=6000,
+        .timeE32k=1200,
+        .timeE64k=1200,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=20,
+        .qeData=0,
+};
+
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Xtx={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0x0B,
+
+        .deBurstWrapCmd=0x77,
+        .deBurstWrapCmdDmyClk=0x3,
+        .deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .deBurstWrapData=0xF0,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=0x01,
+        .qeBit=0x01,
+        .qeWriteRegLen=0x02,
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x35,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x01,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=16/8,
+        .cReadSupport=1,
+        .cReadMode=0x20,
+
+        .burstWrapCmd=0x77,
+        .burstWrapCmdDmyClk=0x3,
+        .burstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .burstWrapData=0x40,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x32,
+        .qppAddrMode=SF_CTRL_ADDR_1_LINE,
+
+        .ioMode=SF_CTRL_QIO_MODE,
+        .clkDelay=1,
+        .clkInvert=0x3f,
+
+        .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=0,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=6000,
+        .timeE32k=1200,
+        .timeE64k=1200,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=20,
+        .qeData=0,
+};
+
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Puya_Q80L_Q80H_Q16H={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0x85,
+
+        .deBurstWrapCmd=0x77,
+        .deBurstWrapCmdDmyClk=0x3,
+        .deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .deBurstWrapData=0xF0,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=0x01,
+        .qeBit=0x01,
+        .qeWriteRegLen=0x02,
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x35,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x01,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=16/8,
+        .cReadSupport=1,
+        .cReadMode=0x20,
+
+        .burstWrapCmd=0x77,
+        .burstWrapCmdDmyClk=0x3,
+        .burstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .burstWrapData=0x40,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x32,
+        .qppAddrMode=SF_CTRL_ADDR_1_LINE,
+
+        .ioMode=SF_CTRL_QIO_MODE,
+        .clkDelay=1,
+        .clkInvert=0x3d,
+
+        .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=0,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=300,
+        .timeE32k=1200,
+        .timeE64k=1200,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=8,
+        .qeData=0,
+};
+
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Puya_Q32H={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0x85,
+
+        .deBurstWrapCmd=0x77,
+        .deBurstWrapCmdDmyClk=0x3,
+        .deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .deBurstWrapData=0xF0,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=0x01,
+        .qeBit=0x01,
+        .qeWriteRegLen=0x01,
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x35,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x31,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=16/8,
+        .cReadSupport=1,
+        .cReadMode=0x20,
+
+        .burstWrapCmd=0x77,
+        .burstWrapCmdDmyClk=0x3,
+        .burstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .burstWrapData=0x40,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x32,
+        .qppAddrMode=SF_CTRL_ADDR_1_LINE,
+
+        .ioMode=SF_CTRL_QIO_MODE,
+        .clkDelay=1,
+        .clkInvert=0x3f,
+
+        .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=0,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=300,
+        .timeE32k=1200,
+        .timeE64k=1200,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=8,
+        .qeData=0,
+};
+
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Boya40={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0x68,
+
+        .deBurstWrapCmd=0x77,
+        .deBurstWrapCmdDmyClk=0x3,
+        .deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .deBurstWrapData=0xF0,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=1,
+        .qeBit=0x01,
+        .qeWriteRegLen=0x02,
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x35,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x01,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=16/8,
+        .cReadSupport=0,
+        .cReadMode=0xA0,
+
+        .burstWrapCmd=0x77,
+        .burstWrapCmdDmyClk=0x3,
+        .burstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .burstWrapData=0x40,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x32,
+        .qppAddrMode=SF_CTRL_ADDR_1_LINE,
+
+        .ioMode=SF_CTRL_DO_MODE,
+        .clkDelay=1,
+        .clkInvert=0x3f,
+
+        .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=0,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=300,
+        .timeE32k=1200,
+        .timeE64k=1200,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=20,
+        .qeData=0,
+};
+
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Boya={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0x68,
+
+        .deBurstWrapCmd=0x77,
+        .deBurstWrapCmdDmyClk=0x3,
+        .deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .deBurstWrapData=0xF0,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=0x01,
+        .qeBit=0x01,
+        .qeWriteRegLen=0x01,
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x35,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x31,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=16/8,
+        .cReadSupport=1,
+        .cReadMode=0x20,
+
+        .burstWrapCmd=0x77,
+        .burstWrapCmdDmyClk=0x3,
+        .burstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .burstWrapData=0x40,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x32,
+        .qppAddrMode=SF_CTRL_ADDR_1_LINE,
+
+        .ioMode=SF_CTRL_QIO_MODE,
+        .clkDelay=1,
+        .clkInvert=0x3f,
+
+        .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=0,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=300,
+        .timeE32k=1200,
+        .timeE64k=1200,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=20,
+        .qeData=0,
+};
+
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_FT_VQ80={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0xef,
+
+        .deBurstWrapCmd=0x77,
+        .deBurstWrapCmdDmyClk=0x3,
+        .deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .deBurstWrapData=0xF0,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=1,
+        .qeBit=0x01,
+        .qeWriteRegLen=0x01,
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x35,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x31,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=16/8,
+        .cReadSupport=1,
+        .cReadMode=0x20,
+
+        .burstWrapCmd=0x77,
+        .burstWrapCmdDmyClk=0x3,
+        .burstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .burstWrapData=0x40,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x32,
+        .qppAddrMode=SF_CTRL_ADDR_1_LINE,
+
+        .ioMode=SF_CTRL_QIO_MODE,
+        .clkDelay=1,
+        .clkInvert=0x3f,
+
+        .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=0,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=300,
+        .timeE32k=1200,
+        .timeE64k=1200,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=8,
+        .qeData=0,
+};
+
+static const ATTR_TCM_CONST_SECTION Flash_Info_t flashInfos[]={
+    {
+        .jedecID=0x1440ef,
+        .name="Winb_80DV_08_33",
+        .cfg=&flashCfg_Winb_80DV,
+    },
+    {
+        .jedecID=0x1540ef,
+        .name="Winb_16DV_16_33",
+        .cfg=&flashCfg_Winb_16DV,
+    },
+    {
+        .jedecID=0x1640ef,
+        .name="Winb_32FV_32_33",
+        .cfg=&flashCfg_Winb_80EW_16FW_32JW_32FW_32FV,
+    },
+    {
+        .jedecID=0x1460ef,
+        .name="Winb_80EW_08_18",
+        .cfg=&flashCfg_Winb_80EW_16FW_32JW_32FW_32FV,
+    },
+    {
+        .jedecID=0x1560ef,
+        .name="Winb_16FW_16_18",
+        .cfg=&flashCfg_Winb_80EW_16FW_32JW_32FW_32FV,
+    },
+    {
+        .jedecID=0x1660ef,
+        .name="Winb_32FW_32_18",
+        .cfg=&flashCfg_Winb_80EW_16FW_32JW_32FW_32FV,
+    },
+    {
+        .jedecID=0x1860ef,
+        .name="Winb_128FW_128_18",
+        .cfg=&flashCfg_Winb_80EW_16FW_32JW_32FW_32FV,
+    },
+    {
+        .jedecID=0x1680ef,
+        .name="Winb_32JW_32_18",
+        .cfg=&flashCfg_Winb_80EW_16FW_32JW_32FW_32FV,
+    },
+    {
+        .jedecID=0x13605e,
+        .name="Zbit_04_33",
+        .cfg=&flashCfg_Winb_80EW_16FW_32JW_32FW_32FV,
+    },
+    {
+        .jedecID=0x14605e,
+        .name="Zbit_08_33",
+        .cfg=&flashCfg_Winb_80EW_16FW_32JW_32FW_32FV,
+    },
+    {
+        .jedecID=0x14609d,
+        .name="ISSI_08_33",
+        .cfg=&flashCfg_Issi,
+    },
+    {
+        .jedecID=0x15609d,
+        .name="ISSI_16_33",
+        .cfg=&flashCfg_Issi,
+    },
+    {
+        .jedecID=0x16609d,
+        .name="ISSI_32_33",
+        .cfg=&flashCfg_Issi,
+    },
+    {
+        .jedecID=0x14709d,
+        .name="ISSI_08_18",
+        .cfg=&flashCfg_Issi,
+    },
+    {
+        .jedecID=0x15709d,
+        .name="ISSI_16_18",
+        .cfg=&flashCfg_Issi,
+    },
+    {
+        .jedecID=0x16709d,
+        .name="ISSI_32_18",
+        .cfg=&flashCfg_Issi,
+    },
+    {
+        .jedecID=0x134051,
+        .name="GD_MD04D_04_33",
+        .cfg=&flashCfg_Gd_Md_40D,
+    },
+    {
+        .jedecID=0x1440C8,
+        .name="GD_Q08E_08_33",
+        .cfg=&flashCfg_Gd_Q80E_Q16E,
+    },
+    {
+        .jedecID=0x1540C8,
+        .name="GD_Q16E_16_33",
+        .cfg=&flashCfg_Gd_Q80E_Q16E,
+    },
+    {
+        .jedecID=0x1640C8,
+        .name="GD_Q32C_32_33",
+        .cfg=&flashCfg_Gd_Q32C,
+    },
+    {
+        .jedecID=0x1460C8,
+        .name="GD_LQ08C_08_18",
+        .cfg=&flashCfg_Gd_LQ08C_LE16C_LQ32D_WQ32E,
+    },
+    {
+        .jedecID=0x1560C8,
+        .name="GD_LE16C_16_18",
+        .cfg=&flashCfg_Gd_LQ08C_LE16C_LQ32D_WQ32E,
+    },
+    {
+        .jedecID=0x1660C8,
+        .name="GD_LQ32D_32_18",
+        .cfg=&flashCfg_Gd_LQ08C_LE16C_LQ32D_WQ32E,
+    },
+    {
+        .jedecID=0x1465C8,
+        .name="GD_WQ80E_80_33",
+        .cfg=&flashCfg_Gd_WQ80E_WQ16E,
+    },
+    {
+        .jedecID=0x1565C8,
+        .name="GD_WQ16E_16_33",
+        .cfg=&flashCfg_Gd_WQ80E_WQ16E,
+    },
+    {
+        .jedecID=0x1665C8,
+        .name="GD_WQ32E_32_33",
+        .cfg=&flashCfg_Gd_LQ08C_LE16C_LQ32D_WQ32E,
+    },
+    {
+        .jedecID=0x3425C2,
+        .name="MX_25V80_08_18",
+        .cfg=&flashCfg_Mxic,
+    },
+    {
+        .jedecID=0x3525C2,
+        .name="MX_25U16_35_18",
+        .cfg=&flashCfg_Mxic_1635F,
+    },
+    {
+        .jedecID=0x3625C2,
+        .name="MX_25V32_32_18",
+        .cfg=&flashCfg_Mxic,
+    },
+    {
+        .jedecID=0x13400B,
+        .name="XT_25F04D_04_33",
+        .cfg=&flashCfg_Xtx40,
+    },
+    {
+        .jedecID=0x15400B,
+        .name="XT_25F16B_16_33",
+        .cfg=&flashCfg_Xtx,
+    },
+    {
+        .jedecID=0x16400B,
+        .name="XT_25F32B_32_33",
+        .cfg=&flashCfg_Xtx,
+    },
+    {
+        .jedecID=0x14600B,
+        .name="XT_25Q80B_08_18",
+        .cfg=&flashCfg_Xtx,
+    },
+    {
+        .jedecID=0x16600B,
+        .name="XT_25Q32B_32_18",
+        .cfg=&flashCfg_Xtx,
+    },
+    {
+        .jedecID=0x146085,
+        .name="Puya_Q80L/H_08_18/33",
+        .cfg=&flashCfg_Puya_Q80L_Q80H_Q16H,
+    },
+    {
+        .jedecID=0x156085,
+        .name="Puya_Q16H_16_33",
+        .cfg=&flashCfg_Puya_Q80L_Q80H_Q16H,
+    },
+    {
+        .jedecID=0x166085,
+        .name="Puya_Q32H_32_33",
+        .cfg=&flashCfg_Puya_Q32H,
+    },
+    {
+        .jedecID=0x134068,
+        .name="Boya_Q04B_04_33",
+        .cfg=&flashCfg_Boya40,
+    },
+    {
+        .jedecID=0x144068,
+        .name="Boya_Q08B_08_33",
+        .cfg=&flashCfg_Boya,
+    },
+    {
+        .jedecID=0x154068,
+        .name="Boya_Q16B_16_33",
+        .cfg=&flashCfg_Boya,
+    },
+    {
+        .jedecID=0x164068,
+        .name="Boya_Q32B_32_33",
+        .cfg=&flashCfg_Boya,
+    },
+    {
+        .jedecID=0x174068,
+        .name="Boya_Q64A_64_33",
+        .cfg=&flashCfg_Boya,
+    },
+    {
+        .jedecID=0x184068,
+        .name="Boya_Q128A_128_33",
+        .cfg=&flashCfg_Boya,
+    },
+    {
+        .jedecID=0x14605E,
+        .name="FT_VQ80",
+        .cfg=&flashCfg_FT_VQ80,
+    }
+};
+#endif
+
+/*@} end of group SF_CFG_Private_Variables */
+
+/** @defgroup  SF_CFG_Global_Variables
+ *  @{
+ */
+
+/*@} end of group SF_CFG_Global_Variables */
+
+/** @defgroup  SF_CFG_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group SF_CFG_Private_Fun_Declaration */
+
+/** @defgroup  SF_CFG_Private_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Init external flash GPIO according to flash GPIO config
+ *
+ * @param  extFlashPin: Flash GPIO config
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+/* static */ void ATTR_TCM_SECTION SF_Cfg_Init_Ext_Flash_Gpio(uint8_t extFlashPin)
+{
+    GLB_GPIO_Cfg_Type cfg;
+    uint8_t gpiopins[6];
+    uint8_t i=0;
+
+    cfg.gpioMode=GPIO_MODE_AF;
+    cfg.pullType=GPIO_PULL_UP;
+    cfg.drive=1;
+    cfg.smtCtrl=1;
+    cfg.gpioFun=GPIO_FUN_FLASH_PSRAM;
+
+    if(extFlashPin==0){
+        gpiopins[0]=BFLB_EXTFLASH_CLK0_GPIO;
+        gpiopins[1]=BFLB_EXTFLASH_CS0_GPIO;
+        gpiopins[2]=BFLB_EXTFLASH_DATA00_GPIO;
+        gpiopins[3]=BFLB_EXTFLASH_DATA10_GPIO;
+        gpiopins[4]=BFLB_EXTFLASH_DATA20_GPIO;
+        gpiopins[5]=BFLB_EXTFLASH_DATA30_GPIO;
+    }else if(extFlashPin==1){
+        gpiopins[0]=BFLB_EXTFLASH_CLK1_GPIO;
+        gpiopins[1]=BFLB_EXTFLASH_CS1_GPIO;
+        gpiopins[2]=BFLB_EXTFLASH_DATA01_GPIO;
+        gpiopins[3]=BFLB_EXTFLASH_DATA11_GPIO;
+        gpiopins[4]=BFLB_EXTFLASH_DATA21_GPIO;
+        gpiopins[5]=BFLB_EXTFLASH_DATA31_GPIO;
+    }else{
+        gpiopins[0]=BFLB_EXTFLASH_CLK2_GPIO;
+        gpiopins[1]=BFLB_EXTFLASH_CS2_GPIO;
+        gpiopins[2]=BFLB_EXTFLASH_DATA02_GPIO;
+        gpiopins[3]=BFLB_EXTFLASH_DATA12_GPIO;
+        gpiopins[4]=BFLB_EXTFLASH_DATA22_GPIO;
+        gpiopins[5]=BFLB_EXTFLASH_DATA32_GPIO;
+    }
+
+    for(i=0;i>2)&0x03;
+    swapCfg=flashPinCfg&0x03;
+
+    if(restoreDefault){
+        /* Set Default first */
+        tmpVal=BL_RD_REG(GLB_BASE,GLB_GPIO_USE_PSRAM__IO);
+        if(BL_GET_REG_BITS_VAL(tmpVal,GLB_CFG_GPIO_USE_PSRAM_IO)==0x00){
+            SF_Cfg_Init_Ext_Flash_Gpio(1);
+        }
+
+        tmpVal=BL_RD_REG(GLB_BASE,GLB_PARM);
+        tmpVal=BL_CLR_REG_BIT(tmpVal,GLB_CFG_SFLASH2_SWAP_CS_IO2);
+        tmpVal=BL_CLR_REG_BIT(tmpVal,GLB_CFG_SFLASH2_SWAP_IO0_IO3);
+        BL_WR_REG(GLB_BASE,GLB_PARM,tmpVal);
+
+        SF_Ctrl_Select_Pad(SF_CTRL_PAD_SEL_SF2);
+
+        /* Default is set, so return */
+        if(flashCfg==BFLB_FLASH_CFG_SF2_EXT_23_28&&swapCfg==BFLB_SF2_SWAP_NONE){
+            return;
+        }
+    }
+
+    if(flashCfg==BFLB_FLASH_CFG_SF1_EXT_17_22){
+        SF_Cfg_Init_Ext_Flash_Gpio(0);
+        SF_Ctrl_Select_Pad(SF_CTRL_PAD_SEL_SF1);
+    }else{
+        tmpVal=BL_RD_REG(GLB_BASE,GLB_GPIO_USE_PSRAM__IO);
+        if(BL_GET_REG_BITS_VAL(tmpVal,GLB_CFG_GPIO_USE_PSRAM_IO)==0x00){
+            SF_Cfg_Init_Ext_Flash_Gpio(1);
+        }
+
+        tmpVal=BL_RD_REG(GLB_BASE,GLB_PARM);
+        if(swapCfg==BFLB_SF2_SWAP_NONE){
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GLB_CFG_SFLASH2_SWAP_CS_IO2);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GLB_CFG_SFLASH2_SWAP_IO0_IO3);
+        }else if(swapCfg==BFLB_SF2_SWAP_CS_IO2){
+            tmpVal=BL_SET_REG_BIT(tmpVal,GLB_CFG_SFLASH2_SWAP_CS_IO2);
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GLB_CFG_SFLASH2_SWAP_IO0_IO3);
+        }else if(swapCfg==BFLB_SF2_SWAP_IO0_IO3){
+            tmpVal=BL_CLR_REG_BIT(tmpVal,GLB_CFG_SFLASH2_SWAP_CS_IO2);
+            tmpVal=BL_SET_REG_BIT(tmpVal,GLB_CFG_SFLASH2_SWAP_IO0_IO3);
+        }else{
+            tmpVal=BL_SET_REG_BIT(tmpVal,GLB_CFG_SFLASH2_SWAP_CS_IO2);
+            tmpVal=BL_SET_REG_BIT(tmpVal,GLB_CFG_SFLASH2_SWAP_IO0_IO3);
+        }
+        BL_WR_REG(GLB_BASE,GLB_PARM,tmpVal);
+
+        SF_Ctrl_Select_Pad(SF_CTRL_PAD_SEL_SF2);
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Identify one flash
+ *
+ * @param  callFromFlash: code run at flash or ram
+ * @param  autoScan: Auto scan all GPIO pin
+ * @param  flashPinCfg: Specify flash GPIO config, not auto scan
+ * @param  restoreDefault: Wether restore default flash GPIO config
+ * @param  pFlashCfg: Flash config pointer
+ *
+ * @return Flash ID
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+uint32_t ATTR_TCM_SECTION SF_Cfg_Flash_Identify(uint8_t callFromFlash,
+    uint32_t autoScan,uint32_t flashPinCfg,uint8_t restoreDefault,SPI_Flash_Cfg_Type * pFlashCfg)
+{
+    uint32_t jdecId=0;
+    uint32_t i=0;
+    uint32_t offset;
+    BL_Err_Type stat;
+
+    BL702_MemCpy_Fast(pFlashCfg,&flashCfg_Gd_Q80E_Q16E,sizeof(SPI_Flash_Cfg_Type));
+    if(callFromFlash == 1){
+        stat=XIP_SFlash_State_Save(pFlashCfg,&offset);
+        if(stat!=SUCCESS){
+            SF_Ctrl_Set_Owner(SF_CTRL_OWNER_IAHB);
+            return 0;
+        }
+    }
+
+    if(autoScan){
+        flashPinCfg=0;
+        do{
+            if(flashPinCfg>0x0f){
+                jdecId=0;
+                break;
+            }
+            SF_Cfg_Init_Flash_Gpio(flashPinCfg,restoreDefault);
+            SFlash_Releae_Powerdown(pFlashCfg);
+            SFlash_Reset_Continue_Read(pFlashCfg);
+            SFlash_DisableBurstWrap(pFlashCfg);
+            jdecId=0;
+            SFlash_GetJedecId(pFlashCfg,(uint8_t *)&jdecId);
+            SFlash_DisableBurstWrap(pFlashCfg);
+            jdecId=jdecId&0xffffff;
+            flashPinCfg++;
+        }while((jdecId&0x00ffff)==0||(jdecId&0xffff00)==0||(jdecId&0x00ffff)==0xffff||(jdecId&0xffff00)==0xffff00);
+    }else{
+        /* select media gpio */
+        SF_Cfg_Init_Flash_Gpio(flashPinCfg,restoreDefault);
+        SFlash_Releae_Powerdown(pFlashCfg);
+        SFlash_Reset_Continue_Read(pFlashCfg);
+        SFlash_DisableBurstWrap(pFlashCfg);
+        SFlash_GetJedecId(pFlashCfg,(uint8_t *)&jdecId);
+        SFlash_DisableBurstWrap(pFlashCfg);
+        jdecId=jdecId&0xffffff;
+    }
+
+    for(i=0;iioMode,offset);
+        }
+        return jdecId;
+    }else{
+        if(callFromFlash == 1){
+            XIP_SFlash_State_Restore(pFlashCfg,pFlashCfg->ioMode,offset);
+        }
+        return (jdecId|BFLB_FLASH_ID_VALID_FLAG);
+    }
+}
+#endif
+
+/*@} end of group SF_CFG_Public_Functions */
+
+/*@} end of group SF_CFG */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_sf_cfg_ext.c b/drivers/bl702_driver/std_drv/src/bl702_sf_cfg_ext.c
new file mode 100644
index 00000000..91e686dd
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_sf_cfg_ext.c
@@ -0,0 +1,423 @@
+/**
+  ******************************************************************************
+  * @file    bl702_sf_cfg_ext.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_glb.h"
+#include "bl702_sf_cfg.h"
+#include "bl702_sf_cfg_ext.h"
+#include "bl702_xip_sflash.h"
+#include "bl702_romdriver.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  SF_CFG_EXT
+ *  @{
+ */
+
+/** @defgroup  SF_CFG_EXT_Private_Macros
+ *  @{
+ */
+#define BFLB_FLASH_CFG_MAGIC                    "FCFG"
+
+/*@} end of group SF_CFG_EXT_Private_Macros */
+
+/** @defgroup  SF_CFG_EXT_Private_Types
+ *  @{
+ */
+typedef struct {
+    uint32_t jedecID;
+    char *name;
+    const SPI_Flash_Cfg_Type *cfg;
+}Flash_Info_t;
+
+/*@} end of group SF_CFG_EXT_Private_Types */
+
+/** @defgroup  SF_CFG_EXT_Private_Variables
+ *  @{
+ */
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_Gd_Md_40D={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0x51,
+
+        .deBurstWrapCmd=0x77,
+        .deBurstWrapCmdDmyClk=0x3,
+        .deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .deBurstWrapData=0xF0,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=1,
+        .qeBit=0x01,
+        .qeWriteRegLen=0x02,
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x35,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x01,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=16/8,
+        .cReadSupport=0,
+        .cReadMode=0xA0,
+
+        .burstWrapCmd=0x77,
+        .burstWrapCmdDmyClk=0x3,
+        .burstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .burstWrapData=0x40,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x32,
+        .qppAddrMode=SF_CTRL_ADDR_1_LINE,
+
+        .ioMode=SF_CTRL_DO_MODE,
+        .clkDelay=1,
+        .clkInvert=0x3f,
+
+        .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=0,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=300,
+        .timeE32k=1200,
+        .timeE64k=1200,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=20,
+        .qeData=0,
+};
+
+static const ATTR_TCM_CONST_SECTION SPI_Flash_Cfg_Type flashCfg_MX_KH25={
+        .resetCreadCmd=0xff,
+        .resetCreadCmdSize=3,
+        .mid=0xc2,
+
+        .deBurstWrapCmd=0x77,
+        .deBurstWrapCmdDmyClk=0x3,
+        .deBurstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .deBurstWrapData=0xF0,
+
+        /*reg*/
+        .writeEnableCmd=0x06,
+        .wrEnableIndex=0x00,
+        .wrEnableBit=0x01,
+        .wrEnableReadRegLen=0x01,
+
+        .qeIndex=1,
+        .qeBit=0x01,
+        .qeWriteRegLen=0x01,
+        .qeReadRegLen=0x1,
+
+        .busyIndex=0,
+        .busyBit=0x00,
+        .busyReadRegLen=0x1,
+        .releasePowerDown=0xab,
+
+        .readRegCmd[0]=0x05,
+        .readRegCmd[1]=0x00,
+        .writeRegCmd[0]=0x01,
+        .writeRegCmd[1]=0x00,
+
+        .fastReadQioCmd=0xeb,
+        .frQioDmyClk=16/8,
+        .cReadSupport=0,
+        .cReadMode=0x20,
+
+        .burstWrapCmd=0x77,
+        .burstWrapCmdDmyClk=0x3,
+        .burstWrapDataMode=SF_CTRL_DATA_4_LINES,
+        .burstWrapData=0x40,
+         /*erase*/
+        .chipEraseCmd=0xc7,
+        .sectorEraseCmd=0x20,
+        .blk32EraseCmd=0x52,
+        .blk64EraseCmd=0xd8,
+        /*write*/
+        .pageProgramCmd=0x02,
+        .qpageProgramCmd=0x32,
+        .qppAddrMode=SF_CTRL_ADDR_1_LINE,
+
+        .ioMode=0x11,
+        .clkDelay=1,
+        .clkInvert=0x3f,
+
+        .resetEnCmd=0x66,
+        .resetCmd=0x99,
+        .cRExit=0xff,
+        .wrEnableWriteRegLen=0x00,
+
+        /*id*/
+        .jedecIdCmd=0x9f,
+        .jedecIdCmdDmyClk=0,
+        .qpiJedecIdCmd=0x9f,
+        .qpiJedecIdCmdDmyClk=0x00,
+        .sectorSize=4,
+        .pageSize=256,
+
+        /*read*/
+        .fastReadCmd=0x0b,
+        .frDmyClk=8/8,
+        .qpiFastReadCmd =0x0b,
+        .qpiFrDmyClk=8/8,
+        .fastReadDoCmd=0x3b,
+        .frDoDmyClk=8/8,
+        .fastReadDioCmd=0xbb,
+        .frDioDmyClk=0,
+        .fastReadQoCmd=0x6b,
+        .frQoDmyClk=8/8,
+
+        .qpiFastReadQioCmd=0xeb,
+        .qpiFrQioDmyClk=16/8,
+        .qpiPageProgramCmd=0x02,
+        .writeVregEnableCmd=0x50,
+
+        /* qpi mode */
+        .enterQpi=0x38,
+        .exitQpi=0xff,
+
+         /*AC*/
+        .timeEsector=300,
+        .timeE32k=1200,
+        .timeE64k=1200,
+        .timePagePgm=5,
+        .timeCe=20*1000,
+        .pdDelay=20,
+        .qeData=0,
+};
+
+
+static const ATTR_TCM_CONST_SECTION Flash_Info_t flashInfos[]={
+    {
+        .jedecID=0x134051,
+        .name="GD_MD04D_04_33",
+        .cfg=&flashCfg_Gd_Md_40D,
+    },
+    {
+        .jedecID=0x1320c2,
+        .name="MX_KH40_04_33",
+        .cfg=&flashCfg_MX_KH25,
+    },
+    {
+        .jedecID=0x1420c2,
+        .name="MX_KH80_08_33",
+        .cfg=&flashCfg_MX_KH25,
+    },
+    {
+        .jedecID=0x1520c2,
+        .name="MX_KH16_16_33",
+        .cfg=&flashCfg_MX_KH25,
+    },
+};
+
+/*@} end of group SF_CFG_EXT_Private_Variables */
+
+/** @defgroup  SF_CFG_EXT_Global_Variables
+ *  @{
+ */
+
+/*@} end of group SF_CFG_EXT_Global_Variables */
+
+/** @defgroup  SF_CFG_EXT_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group SF_CFG_EXT_Private_Fun_Declaration */
+
+/** @defgroup  SF_CFG_EXT_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Init internal flash GPIO
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void ATTR_TCM_SECTION SF_Cfg_Init_Internal_Flash_Gpio(void)
+{
+    GLB_GPIO_Cfg_Type gpioCfg = {
+        .gpioPin = GLB_GPIO_PIN_0,
+        .gpioFun = GPIO_FUN_GPIO,
+        .gpioMode = GPIO_MODE_INPUT,
+        .pullType = GPIO_PULL_NONE,
+        .drive = 0,
+        .smtCtrl = 1,
+    };
+
+    /* Turn on Flash pad, GPIO23 - GPIO28 */
+    for(uint32_t pin=23;pin<29;pin++){
+        gpioCfg.gpioPin = pin;
+        if(pin==25){
+            gpioCfg.pullType = GPIO_PULL_DOWN;
+        }else{
+            gpioCfg.pullType = GPIO_PULL_NONE;
+        }
+        GLB_GPIO_Init(&gpioCfg);
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Get flash config according to flash ID
+ *
+ * @param  flashID: Flash ID
+ * @param  pFlashCfg: Flash config pointer
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+BL_Err_Type ATTR_TCM_SECTION SF_Cfg_Get_Flash_Cfg_Need_Lock_Ext(uint32_t flashID,SPI_Flash_Cfg_Type * pFlashCfg)
+{
+    uint32_t i;
+    uint8_t buf[sizeof(SPI_Flash_Cfg_Type)+8];
+    uint32_t crc,*pCrc;
+
+    if(flashID==0){
+        XIP_SFlash_Read_Via_Cache_Need_Lock(8+BL702_FLASH_XIP_BASE,buf,sizeof(SPI_Flash_Cfg_Type)+8);
+        if(BL702_MemCmp(buf,BFLB_FLASH_CFG_MAGIC,4)==0){
+            crc=BFLB_Soft_CRC32((uint8_t *)buf+4,sizeof(SPI_Flash_Cfg_Type));
+            pCrc=(uint32_t *)(buf+4+sizeof(SPI_Flash_Cfg_Type));
+            if(*pCrc==crc){
+                BL702_MemCpy_Fast(pFlashCfg,(uint8_t *)buf+4,sizeof(SPI_Flash_Cfg_Type));
+                return SUCCESS ;
+            }
+        }
+    }else{
+        if(SF_Cfg_Get_Flash_Cfg_Need_Lock(flashID, pFlashCfg)){
+            return SUCCESS;
+        }
+        for(i=0;i
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_sf_ctrl.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  SF_CTRL
+ *  @{
+ */
+
+/** @defgroup  SF_CTRL_Private_Macros
+ *  @{
+ */
+
+/*@} end of group SF_CTRL_Private_Macros */
+
+/** @defgroup  SF_CTRL_Private_Types
+ *  @{
+ */
+
+/*@} end of group SF_CTRL_Private_Types */
+
+/** @defgroup  SF_CTRL_Private_Variables
+ *  @{
+ */
+#define SF_CTRL_BUSY_STATE_TIMEOUT               (5*160*1000)
+#define SF_Ctrl_Get_AES_Region(addr,r)           (addr+SF_CTRL_AES_REGION_OFFSET+(r)*0x100)
+
+/*@} end of group SF_CTRL_Private_Variables */
+
+/** @defgroup  SF_CTRL_Global_Variables
+ *  @{
+ */
+
+/*@} end of group SF_CTRL_Global_Variables */
+
+/** @defgroup  SF_CTRL_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group SF_CTRL_Private_Fun_Declaration */
+
+/** @defgroup  SF_CTRL_Private_Functions
+ *  @{
+ */
+
+/*@} end of group SF_CTRL_Private_Functions */
+
+/** @defgroup  SF_CTRL_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Enable serail flash controller
+ *
+ * @param  cfg: serial flash controller config
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_Enable(const SF_Ctrl_Cfg_Type *cfg)
+{
+    uint32_t tmpVal = 0;
+    uint32_t timeOut = 0;
+
+    if(cfg==NULL){
+        return;
+    }
+    /* Check the parameters */
+    CHECK_PARAM(IS_SF_CTRL_OWNER_TYPE(cfg->owner));
+
+    timeOut = SF_CTRL_BUSY_STATE_TIMEOUT;
+    while(SET==SF_Ctrl_GetBusyState()){
+        timeOut--;
+        if(timeOut == 0){
+            return;
+        }
+    }
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_0);
+
+    if(cfg->clkDelay>0){
+        tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_IF_READ_DLY_EN);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_READ_DLY_N,cfg->clkDelay-1);
+    }else{
+        tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_IF_READ_DLY_EN);
+    }
+
+    /* Serail out inverted, so sf ctrl send on negative edge */
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_CLK_OUT_INV_SEL,cfg->clkInvert);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_CLK_SF_RX_INV_SEL,cfg->rxClkInvert);
+
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_0,tmpVal);
+
+    /* Set do di and oe delay */
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IO_DLY_1);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IO_0_DO_DLY_SEL,cfg->doDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IO_0_DI_DLY_SEL,cfg->diDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IO_0_OE_DLY_SEL,cfg->oeDelay);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IO_DLY_1,tmpVal);
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IO_DLY_2);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IO_1_DO_DLY_SEL,cfg->doDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IO_1_DI_DLY_SEL,cfg->diDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IO_1_OE_DLY_SEL,cfg->oeDelay);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IO_DLY_2,tmpVal);
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IO_DLY_3);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IO_2_DO_DLY_SEL,cfg->doDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IO_2_DI_DLY_SEL,cfg->diDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IO_2_OE_DLY_SEL,cfg->oeDelay);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IO_DLY_3,tmpVal);
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IO_DLY_4);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IO_3_DO_DLY_SEL,cfg->doDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IO_3_DI_DLY_SEL,cfg->diDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IO_3_OE_DLY_SEL,cfg->oeDelay);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IO_DLY_4,tmpVal);
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF2_IF_IO_DLY_1);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF2_IO_0_DO_DLY_SEL,cfg->doDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF2_IO_0_DI_DLY_SEL,cfg->diDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF2_IO_0_OE_DLY_SEL,cfg->oeDelay);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF2_IF_IO_DLY_1,tmpVal);
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF2_IF_IO_DLY_2);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF2_IO_1_DO_DLY_SEL,cfg->doDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF2_IO_1_DI_DLY_SEL,cfg->diDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF2_IO_1_OE_DLY_SEL,cfg->oeDelay);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF2_IF_IO_DLY_2,tmpVal);
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF2_IF_IO_DLY_3);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF2_IO_2_DO_DLY_SEL,cfg->doDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF2_IO_2_DI_DLY_SEL,cfg->diDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF2_IO_2_OE_DLY_SEL,cfg->oeDelay);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF2_IF_IO_DLY_3,tmpVal);
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF2_IF_IO_DLY_4);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF2_IO_3_DO_DLY_SEL,cfg->doDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF2_IO_3_DI_DLY_SEL,cfg->diDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF2_IO_3_OE_DLY_SEL,cfg->oeDelay);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF2_IF_IO_DLY_4,tmpVal);
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF3_IF_IO_DLY_1);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF3_IO_0_DO_DLY_SEL,cfg->doDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF3_IO_0_DI_DLY_SEL,cfg->diDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF3_IO_0_OE_DLY_SEL,cfg->oeDelay);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF3_IF_IO_DLY_1,tmpVal);
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF3_IF_IO_DLY_2);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF3_IO_1_DO_DLY_SEL,cfg->doDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF3_IO_1_DI_DLY_SEL,cfg->diDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF3_IO_1_OE_DLY_SEL,cfg->oeDelay);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF3_IF_IO_DLY_2,tmpVal);
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF3_IF_IO_DLY_3);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF3_IO_2_DO_DLY_SEL,cfg->doDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF3_IO_2_DI_DLY_SEL,cfg->diDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF3_IO_2_OE_DLY_SEL,cfg->oeDelay);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF3_IF_IO_DLY_3,tmpVal);
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF3_IF_IO_DLY_4);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF3_IO_3_DO_DLY_SEL,cfg->doDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF3_IO_3_DI_DLY_SEL,cfg->diDelay);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF3_IO_3_OE_DLY_SEL,cfg->oeDelay);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF3_IF_IO_DLY_4,tmpVal);
+
+    /* Enable AHB access sram buffer and enable sf interface */
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_1);
+    tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_AHB2SRAM_EN);
+    tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_IF_EN);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_1,tmpVal);
+
+    SF_Ctrl_Set_Owner(cfg->owner);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Enable serail psram controller
+ *
+ * @param  sfCtrlPsramCfg: serial psram controller config
+ *
+ * @return None
+ *
+*******************************************************************************/
+//#ifndef BFLB_USE_ROM_DRIVER
+//__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_Psram_Init(SF_Ctrl_Psram_Cfg *sfCtrlPsramCfg)
+{
+    uint32_t tmpVal = 0;
+
+    SF_Ctrl_Select_Pad(sfCtrlPsramCfg->padSel);
+    SF_Ctrl_Select_Bank(sfCtrlPsramCfg->bankSel);
+
+    /* Select psram clock delay */
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IAHB_12);
+    if(sfCtrlPsramCfg->psramRxClkInvertSrc){
+        tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF2_CLK_SF_RX_INV_SRC);
+        if(sfCtrlPsramCfg->psramRxClkInvertSel){
+            tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF2_CLK_SF_RX_INV_SEL);
+        }else{
+            tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF2_CLK_SF_RX_INV_SEL);
+        }
+    }else{
+        tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF2_CLK_SF_RX_INV_SRC);
+    }
+    if(sfCtrlPsramCfg->psramDelaySrc){
+        tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF2_IF_READ_DLY_SRC);
+        if(sfCtrlPsramCfg->psramClkDelay>0){
+            tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF2_IF_READ_DLY_EN);
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF2_IF_READ_DLY_N,sfCtrlPsramCfg->psramClkDelay-1);
+        }else{
+            tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF2_IF_READ_DLY_EN);
+        }
+    }else{
+        tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF2_IF_READ_DLY_SRC);
+    }
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IAHB_12,tmpVal);
+
+    /* Enable AHB access sram buffer and enable sf interface */
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_1);
+    tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_AHB2SRAM_EN);
+    tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_IF_EN);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_1,tmpVal);
+
+    SF_Ctrl_Set_Owner(sfCtrlPsramCfg->owner);
+}
+//#endif
+
+/****************************************************************************//**
+ * @brief  Get flash controller clock delay value
+ *
+ * @param  None
+ *
+ * @return Clock delay value
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+uint8_t ATTR_TCM_SECTION SF_Ctrl_Get_Clock_Delay(void)
+{
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_0);
+
+    if(BL_GET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_READ_DLY_EN)==0){
+        return 0;
+    }else{
+        return BL_GET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_READ_DLY_N) +1;
+    }
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Set flash controller clock delay value
+ *
+ * @param  delay: Clock delay value
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_Set_Clock_Delay(uint8_t delay)
+{
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_0);
+
+    if(delay>0){
+        tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_IF_READ_DLY_EN);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_READ_DLY_N,delay-1);
+    }else{
+        tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_IF_READ_DLY_EN);
+    }
+
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_0,tmpVal);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  SF Ctrl set cmds config
+ *
+ * @param  cmdsCfg: SF Ctrl cmds config
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_Cmds_Set(SF_Ctrl_Cmds_Cfg *cmdsCfg)
+{
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SF_CTRL_WRAP_LEN_TYPE(cmdsCfg->wrapLen));
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_3);
+    if(cmdsCfg->cmdsEn){
+        tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_CMDS_EN);
+    }else{
+        tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_CMDS_EN);
+    }
+    if(cmdsCfg->burstToggleEn){
+        tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_CMDS_BT_EN);
+    }else{
+        tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_CMDS_BT_EN);
+    }
+    if(cmdsCfg->wrapModeEn){
+        tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_CMDS_WRAP_MODE);
+    }else{
+        tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_CMDS_WRAP_MODE);
+    }
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_CMDS_WRAP_LEN,cmdsCfg->wrapLen);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_3,tmpVal);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  SF Ctrl pad select
+ *
+ * @param  sel: pad select type
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_Select_Pad(SF_Ctrl_Pad_Select sel)
+{
+    /* TODO: sf_if_bk_swap */
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SF_CTRL_PAD_SELECT(sel));
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_2);
+    if(sel <= SF_CTRL_PAD_SEL_SF3){
+        tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_IF_BK2_EN);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_PAD_SEL,sel);
+    }else if(sel >= SF_CTRL_PAD_SEL_DUAL_BANK_SF1_SF2 && sel <= SF_CTRL_PAD_SEL_DUAL_BANK_SF3_SF1){
+        tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_IF_BK2_EN);
+        tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_IF_BK2_MODE);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_PAD_SEL,sel-SF_CTRL_PAD_SEL_DUAL_BANK_SF1_SF2);
+    }else if(sel == SF_CTRL_PAD_SEL_DUAL_CS_SF2){
+        tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_IF_BK2_EN);
+        tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_IF_BK2_MODE);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_PAD_SEL,1);
+    }else if(sel == SF_CTRL_PAD_SEL_DUAL_CS_SF3){
+        tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_IF_BK2_EN);
+        tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_IF_BK2_MODE);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_PAD_SEL,2);
+    }
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_2,tmpVal);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  SF Ctrl bank select
+ *
+ * @param  sel: bank select type
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_Select_Bank(SF_Ctrl_Select sel)
+{
+    /* TODO: sf_if_bk_swap */
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SF_CTRL_SELECT(sel));
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_2);
+    if(sel == SF_CTRL_SEL_FLASH){
+        tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_IF_0_BK_SEL);
+    }else{
+        tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_IF_0_BK_SEL);
+    }
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_2,tmpVal);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Set flash controller owner:I/D AHB or system AHB
+ *
+ * @param  owner: owner type
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_Set_Owner(SF_Ctrl_Owner_Type owner)
+{
+    uint32_t tmpVal = 0;
+    uint32_t timeOut = 0;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SF_CTRL_OWNER_TYPE(owner));
+
+    timeOut = SF_CTRL_BUSY_STATE_TIMEOUT;
+    while(SET==SF_Ctrl_GetBusyState()){
+        timeOut--;
+        if(timeOut == 0){
+            return;
+        }
+    }
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_1);
+
+    /* Set owner */
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_FN_SEL,owner);
+
+    /* Set iahb to flash interface */
+    if(owner==SF_CTRL_OWNER_IAHB){
+        tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_AHB2SIF_EN);
+    }else{
+        tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_AHB2SIF_EN);
+    }
+
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_1,tmpVal);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Disable flash controller
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_Disable(void)
+{
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_1);
+
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_IF_EN);
+
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_1,tmpVal);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Enable flash controller AES with big indian
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_AES_Enable_BE(void)
+{
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_0);
+
+    tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_AES_KEY_ENDIAN);
+    tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_AES_IV_ENDIAN);
+    tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_AES_DOUT_ENDIAN);
+
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_0,tmpVal);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Enable flash controller AES with little indian
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_AES_Enable_LE(void)
+{
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_0);
+
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_AES_KEY_ENDIAN);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_AES_IV_ENDIAN);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_AES_DOUT_ENDIAN);
+
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_0,tmpVal);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Serial flash controller set AES region
+ *
+ * @param  region: region number
+ * @param  enable: enable or not
+ * @param  hwKey: hardware key or software key
+ * @param  startAddr: region start address
+ * @param  endAddr: region end address
+ * @param  locked: lock this region or not
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_AES_Set_Region(uint8_t region,uint8_t enable,
+    uint8_t hwKey,uint32_t startAddr,uint32_t endAddr,uint8_t locked)
+{
+    /* Do flash key eco*/
+    uint32_t regionRegBase=SF_Ctrl_Get_AES_Region(SF_CTRL_BASE,region);
+    uint32_t tmpVal;
+
+    if(!hwKey){
+        regionRegBase=SF_Ctrl_Get_AES_Region(SF_CTRL_BASE,region);
+    }
+    tmpVal=BL_RD_REG(regionRegBase,SF_CTRL_SF_AES_CFG);
+
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_AES_REGION_HW_KEY_EN,hwKey);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_AES_REGION_START,startAddr/1024);
+    /* sf_aes_end =1 means 1,11,1111,1111 */
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_AES_REGION_END,endAddr/1024);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_AES_REGION_EN,enable);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_AES_REGION_LOCK,locked);
+
+    BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_CFG,tmpVal);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Serial flash controller set AES key
+ *
+ * @param  region: region number
+ * @param  key: key data pointer
+ * @param  keyType: flash controller AES key type:128 bits,192 bits or 256 bits
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_AES_Set_Key(uint8_t region,uint8_t *key, SF_Ctrl_AES_Key_Type keyType)
+{
+    /* Do flash key eco*/
+    uint32_t regionRegBase=SF_Ctrl_Get_AES_Region(SF_CTRL_BASE,region);
+    uint32_t tmpVal,i=0;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SF_CTRL_AES_KEY_TYPE(keyType));
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF_AES);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_AES_MODE,keyType);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_AES,tmpVal);
+
+    if(NULL!=key){
+        if(keyType==SF_CTRL_AES_128BITS){
+            i=4;
+            /*
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_7,__REV(BL_RDWD_FRM_BYTEP(key)));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_6,__REV(BL_RDWD_FRM_BYTEP(key)));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_5,__REV(BL_RDWD_FRM_BYTEP(key)));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_4,__REV(BL_RDWD_FRM_BYTEP(key)));
+            key+=4;
+            */
+        }else if(keyType==SF_CTRL_AES_256BITS){
+            i=8;
+            /*
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_7,__REV(BL_RDWD_FRM_BYTEP(key)));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_6,__REV(BL_RDWD_FRM_BYTEP(key)));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_5,__REV(BL_RDWD_FRM_BYTEP(key)));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_4,__REV(BL_RDWD_FRM_BYTEP(key)));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_3,__REV(BL_RDWD_FRM_BYTEP(key)));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_2,__REV(BL_RDWD_FRM_BYTEP(key)));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_1,__REV(BL_RDWD_FRM_BYTEP(key)));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_0,__REV(BL_RDWD_FRM_BYTEP(key)));
+            key+=4;
+            */
+        }else if(keyType==SF_CTRL_AES_192BITS){
+            i=6;
+            /*
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_7,__REV(BL_RDWD_FRM_BYTEP(key)));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_6,__REV(BL_RDWD_FRM_BYTEP(key)));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_5,__REV(BL_RDWD_FRM_BYTEP(key)));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_4,__REV(BL_RDWD_FRM_BYTEP(key)));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_3,__REV(BL_RDWD_FRM_BYTEP(key)));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_2,__REV(BL_RDWD_FRM_BYTEP(key)));
+            key+=4;
+            */
+        }
+        tmpVal=SF_CTRL_SF_AES_KEY_7_OFFSET;
+        while(i--){
+            BL_WR_WORD(regionRegBase+tmpVal,__REV(BL_RDWD_FRM_BYTEP(key)));
+            key+=4;
+            tmpVal-=4;
+        }
+    }
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Serial flash controller set AES key with big endian
+ *
+ * @param  region: region number
+ * @param  key: key data pointer
+ * @param  keyType: flash controller AES key type:128 bits,192 bits or 256 bits
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_AES_Set_Key_BE(uint8_t region,uint8_t *key, SF_Ctrl_AES_Key_Type keyType)
+{
+    /* Do flash key eco*/
+    uint32_t regionRegBase=SF_Ctrl_Get_AES_Region(SF_CTRL_BASE,region);
+    uint32_t tmpVal,i=0;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SF_CTRL_AES_KEY_TYPE(keyType));
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF_AES);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_AES_MODE,keyType);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_AES,tmpVal);
+
+    if(NULL!=key){
+        if(keyType==SF_CTRL_AES_128BITS){
+            i=4;
+            /*
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_0,BL_RDWD_FRM_BYTEP(key));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_1,BL_RDWD_FRM_BYTEP(key));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_2,BL_RDWD_FRM_BYTEP(key));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_3,BL_RDWD_FRM_BYTEP(key));
+            key+=4;
+            */
+        } else if(keyType==SF_CTRL_AES_256BITS){
+            i=8;
+            /*
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_0,BL_RDWD_FRM_BYTEP(key));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_1,BL_RDWD_FRM_BYTEP(key));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_2,BL_RDWD_FRM_BYTEP(key));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_3,BL_RDWD_FRM_BYTEP(key));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_4,BL_RDWD_FRM_BYTEP(key));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_5,BL_RDWD_FRM_BYTEP(key));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_6,BL_RDWD_FRM_BYTEP(key));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_7,BL_RDWD_FRM_BYTEP(key));
+            key+=4;
+            */
+        }else if(keyType==SF_CTRL_AES_192BITS){
+            i=6;
+            /*
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_0,BL_RDWD_FRM_BYTEP(key));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_1,BL_RDWD_FRM_BYTEP(key));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_2,BL_RDWD_FRM_BYTEP(key));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_3,BL_RDWD_FRM_BYTEP(key));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_4,BL_RDWD_FRM_BYTEP(key));
+            key+=4;
+            BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_KEY_5,BL_RDWD_FRM_BYTEP(key));
+            */
+        }
+        tmpVal=SF_CTRL_SF_AES_KEY_0_OFFSET;
+        while(i--){
+            BL_WR_WORD(regionRegBase+tmpVal,BL_RDWD_FRM_BYTEP(key));
+            key+=4;
+            tmpVal+=4;
+        }
+    }
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Serial flash controller set AES iv
+ *
+ * @param  region: region number
+ * @param  iv: iv data pointer
+ * @param  addrOffset: flash address offset
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_AES_Set_IV(uint8_t region,uint8_t *iv,uint32_t addrOffset)
+{
+    /* Do flash key eco*/
+    uint32_t regionRegBase=SF_Ctrl_Get_AES_Region(SF_CTRL_BASE,region);
+    uint32_t tmpVal,i=3;
+
+    if(iv!=NULL){
+        tmpVal=SF_CTRL_SF_AES_IV_W3_OFFSET;
+        while(i--){
+            BL_WR_WORD(regionRegBase+tmpVal,__REV(BL_RDWD_FRM_BYTEP(iv)));
+            iv+=4;
+            tmpVal-=4;
+        }
+        /*
+        BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_IV_W3,__REV(BL_RDWD_FRM_BYTEP(iv)));
+        iv+=4;
+        BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_IV_W2,__REV(BL_RDWD_FRM_BYTEP(iv)));
+        iv+=4;
+        BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_IV_W1,__REV(BL_RDWD_FRM_BYTEP(iv)));
+        iv+=4;
+        */
+        BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_IV_W0,addrOffset);
+        iv+=4;
+    }
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Serial flash controller set AES iv with big endian
+ *
+ * @param  region: region number
+ * @param  iv: iv data pointer
+ * @param  addrOffset: flash address offset
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_AES_Set_IV_BE(uint8_t region,uint8_t *iv,uint32_t addrOffset)
+{
+    /* Do flash key eco*/
+    uint32_t regionRegBase=SF_Ctrl_Get_AES_Region(SF_CTRL_BASE,region);
+    uint32_t tmpVal,i=3;
+
+    if(iv!=NULL){
+        tmpVal=SF_CTRL_SF_AES_IV_W0_OFFSET;
+        while(i--){
+            BL_WR_WORD(regionRegBase+tmpVal,BL_RDWD_FRM_BYTEP(iv));
+            iv+=4;
+            tmpVal+=4;
+        }
+        /*
+        BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_IV_W0,BL_RDWD_FRM_BYTEP(iv));
+        iv+=4;
+        BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_IV_W1,BL_RDWD_FRM_BYTEP(iv));
+        iv+=4;
+        BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_IV_W2,BL_RDWD_FRM_BYTEP(iv));
+        iv+=4;
+        */
+        BL_WR_REG(regionRegBase,SF_CTRL_SF_AES_IV_W3,__REV(addrOffset));
+        iv+=4;
+    }
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Enable serial flash controller AES
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_AES_Enable(void)
+{
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF_AES);
+    tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_AES_EN);
+
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_AES,tmpVal);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Disable serial flash controller AES
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_AES_Disable(void)
+{
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF_AES);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_AES_EN);
+
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_AES,tmpVal);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Check is serial flash controller AES enable
+ *
+ * @param  None
+ *
+ * @return Wether AES is enable
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+uint8_t ATTR_TCM_SECTION SF_Ctrl_Is_AES_Enable(void)
+{
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF_AES);
+    return BL_IS_REG_BIT_SET(tmpVal,SF_CTRL_SF_AES_EN);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Set flash image offset
+ *
+ * @param  addrOffset: Address offset value
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_Set_Flash_Image_Offset(uint32_t addrOffset)
+{
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_ID0_OFFSET,addrOffset);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Get flash image offset
+ *
+ * @param  None
+ *
+ * @return :Address offset value
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+uint32_t ATTR_TCM_SECTION SF_Ctrl_Get_Flash_Image_Offset(void)
+{
+    return BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF_ID0_OFFSET);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  SF controller send one command
+ *
+ * @param  sahbType: Serial flash controller clock sahb sram select
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_Select_Clock(SF_Ctrl_Sahb_Type sahbType)
+{
+    uint32_t tmpVal = 0;
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_0);
+    if(sahbType==SF_CTRL_SAHB_CLOCK){
+        tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_CLK_SAHB_SRAM_SEL);
+    }else if(sahbType==SF_CTRL_FLASH_CLOCK){
+        tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_CLK_SAHB_SRAM_SEL);
+    }
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_0,tmpVal);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  SF controller send one command
+ *
+ * @param  cfg: Serial flash controller command configuration pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_SendCmd(SF_Ctrl_Cmd_Cfg_Type *cfg)
+{
+    uint32_t tmpVal = 0;
+    uint32_t timeOut = 0;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SF_CTRL_CMD_MODE_TYPE(cfg->cmdMode));
+    CHECK_PARAM(IS_SF_CTRL_ADDR_MODE_TYPE(cfg->addrMode));
+    CHECK_PARAM(IS_SF_CTRL_DMY_MODE_TYPE(cfg->dummyMode));
+    CHECK_PARAM(IS_SF_CTRL_DATA_MODE_TYPE(cfg->dataMode));
+
+    timeOut = SF_CTRL_BUSY_STATE_TIMEOUT;
+    while(SET==SF_Ctrl_GetBusyState()){
+        timeOut--;
+        if(timeOut == 0){
+            return;
+        }
+    }
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_1);
+
+    if(BL_GET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_FN_SEL)!=SF_CTRL_OWNER_SAHB){
+        return;
+    }
+
+    /* Clear trigger */
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_SAHB_0);
+    tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_IF_0_TRIG);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_SAHB_0,tmpVal);
+
+    /* Copy command buffer */
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_SAHB_1,cfg->cmdBuf[0]);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_SAHB_2,cfg->cmdBuf[1]);
+
+    /* Configure SPI and IO mode*/
+    if(SF_CTRL_CMD_1_LINE==cfg->cmdMode){
+          tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_0_QPI_MODE_EN,SF_CTRL_SPI_MODE);
+    }else{
+          tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_0_QPI_MODE_EN,SF_CTRL_QPI_MODE);
+    }
+
+    if(SF_CTRL_ADDR_1_LINE==cfg->addrMode){
+        if(SF_CTRL_DATA_1_LINE==cfg->dataMode){
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_0_SPI_MODE,SF_CTRL_NIO_MODE);
+        }else if(SF_CTRL_DATA_2_LINES==cfg->dataMode){
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_0_SPI_MODE,SF_CTRL_DO_MODE);
+        }else if(SF_CTRL_DATA_4_LINES==cfg->dataMode){
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_0_SPI_MODE,SF_CTRL_QO_MODE);
+        }
+    }else if(SF_CTRL_ADDR_2_LINES==cfg->addrMode){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_0_SPI_MODE,SF_CTRL_DIO_MODE);
+    }else if(SF_CTRL_ADDR_4_LINES==cfg->addrMode){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_0_SPI_MODE,SF_CTRL_QIO_MODE);
+    }
+
+    /* Configure cmd */
+    tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_IF_0_CMD_EN);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_0_CMD_BYTE,0);
+
+    /* Configure address */
+    if(cfg->addrSize != 0){
+        tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_IF_0_ADR_EN);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_0_ADR_BYTE,cfg->addrSize-1);
+    }else{
+        tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_IF_0_ADR_EN);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_0_ADR_BYTE,0);
+    }
+
+    /* Configure dummy */
+    if(cfg->dummyClks !=0){
+        tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_IF_0_DMY_EN);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_0_DMY_BYTE,cfg->dummyClks-1);
+    }else{
+        tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_IF_0_DMY_EN);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_0_DMY_BYTE,0);
+    }
+
+    /* Configure data */
+    if(cfg->nbData !=0){
+        tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_IF_0_DAT_EN);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_0_DAT_BYTE,cfg->nbData-1);
+    }else{
+        tmpVal=BL_CLR_REG_BIT(tmpVal,SF_CTRL_SF_IF_0_DAT_EN);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_0_DAT_BYTE,0);
+    }
+
+    /* Set read write flag */
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_0_DAT_RW,cfg->rwFlag);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_SAHB_0,tmpVal);
+
+    //switch sf_clk_sahb_sram_sel = 1
+    SF_Ctrl_Select_Clock(SF_CTRL_FLASH_CLOCK);
+    /* Trigger */
+    tmpVal=BL_SET_REG_BIT(tmpVal,SF_CTRL_SF_IF_0_TRIG);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_SAHB_0,tmpVal);
+
+    timeOut = SF_CTRL_BUSY_STATE_TIMEOUT;
+    while(SET==SF_Ctrl_GetBusyState()){
+        timeOut--;
+        if(timeOut == 0){
+            SF_Ctrl_Select_Clock(SF_CTRL_SAHB_CLOCK);
+            return;
+        }
+    }
+    //switch sf_clk_sahb_sram_sel = 0
+    SF_Ctrl_Select_Clock(SF_CTRL_SAHB_CLOCK);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Config SF controller for flash I/D cache read
+ *
+ * @param  cfg: Serial flash controller command configuration pointer
+ * @param  cmdValid: command valid or not, for continous read, cache may need no command
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_Flash_Read_Icache_Set(SF_Ctrl_Cmd_Cfg_Type *cfg,uint8_t cmdValid)
+{
+    uint32_t tmpVal = 0;
+    uint32_t timeOut = 0;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SF_CTRL_CMD_MODE_TYPE(cfg->cmdMode));
+    CHECK_PARAM(IS_SF_CTRL_ADDR_MODE_TYPE(cfg->addrMode));
+    CHECK_PARAM(IS_SF_CTRL_DMY_MODE_TYPE(cfg->dummyMode));
+    CHECK_PARAM(IS_SF_CTRL_DATA_MODE_TYPE(cfg->dataMode));
+
+    timeOut = SF_CTRL_BUSY_STATE_TIMEOUT;
+    while(SET==SF_Ctrl_GetBusyState()){
+        timeOut--;
+        if(timeOut == 0){
+            return;
+        }
+    }
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_1);
+    if(BL_GET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_FN_SEL)!=SF_CTRL_OWNER_IAHB){
+        return;
+    }
+
+    /* Copy command buffer */
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IAHB_1,cfg->cmdBuf[0]);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IAHB_2,cfg->cmdBuf[1]);
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IAHB_0);
+
+    /* Configure SPI and IO mode*/
+    if(SF_CTRL_CMD_1_LINE==cfg->cmdMode){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_QPI_MODE_EN,SF_CTRL_SPI_MODE);
+    }else{
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_QPI_MODE_EN,SF_CTRL_QPI_MODE);
+    }
+
+    if(SF_CTRL_ADDR_1_LINE==cfg->addrMode){
+        if(SF_CTRL_DATA_1_LINE==cfg->dataMode){
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_SPI_MODE,SF_CTRL_NIO_MODE);
+        }else if(SF_CTRL_DATA_2_LINES==cfg->dataMode){
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_SPI_MODE,SF_CTRL_DO_MODE);
+        }else if(SF_CTRL_DATA_4_LINES==cfg->dataMode){
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_SPI_MODE,SF_CTRL_QO_MODE);
+        }
+    }else if(SF_CTRL_ADDR_2_LINES==cfg->addrMode){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_SPI_MODE,SF_CTRL_DIO_MODE);
+    }else if(SF_CTRL_ADDR_4_LINES==cfg->addrMode){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_SPI_MODE,SF_CTRL_QIO_MODE);
+    }
+
+    if(cmdValid){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_CMD_EN,1);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_CMD_BYTE,0);
+    }else{
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_CMD_EN,0);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_CMD_BYTE,0);
+    }
+
+    /* Configure address */
+    if(cfg->addrSize != 0){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_ADR_EN,1);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_ADR_BYTE,cfg->addrSize-1);
+    }else{
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_ADR_EN,0);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_ADR_BYTE,0);
+    }
+
+    /* configure dummy */
+    if(cfg->dummyClks !=0){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_DMY_EN,1);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_DMY_BYTE,cfg->dummyClks-1);
+    }else{
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_DMY_EN,0);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_DMY_BYTE,0);
+    }
+
+    /* Configure data */
+    if(cfg->nbData !=0){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_DAT_EN,1);
+    } else {
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_DAT_EN,0);
+    }
+
+    /* Set read write flag */
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_DAT_RW,cfg->rwFlag);
+
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IAHB_0,tmpVal);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Config psram controller for psram I/D cache write
+ *
+ * @param  cfg: Serial flash controller command configuration pointer
+ * @param  cmdValid: command valid or not, cache may need no command
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_Psram_Write_Icache_Set(SF_Ctrl_Cmd_Cfg_Type *cfg,uint8_t cmdValid)
+{
+    uint32_t tmpVal = 0;
+    uint32_t timeOut = 0;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SF_CTRL_CMD_MODE_TYPE(cfg->cmdMode));
+    CHECK_PARAM(IS_SF_CTRL_ADDR_MODE_TYPE(cfg->addrMode));
+    CHECK_PARAM(IS_SF_CTRL_DMY_MODE_TYPE(cfg->dummyMode));
+    CHECK_PARAM(IS_SF_CTRL_DATA_MODE_TYPE(cfg->dataMode));
+
+    timeOut = SF_CTRL_BUSY_STATE_TIMEOUT;
+    while(SET==SF_Ctrl_GetBusyState()){
+        timeOut--;
+        if(timeOut == 0){
+            return;
+        }
+    }
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_1);
+
+    if(BL_GET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_FN_SEL)!=SF_CTRL_OWNER_IAHB){
+        return;
+    }
+
+    /* Copy command buffer */
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IAHB_4,cfg->cmdBuf[0]);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IAHB_5,cfg->cmdBuf[1]);
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IAHB_3);
+
+    /* Configure SPI and IO mode*/
+    if(SF_CTRL_CMD_1_LINE==cfg->cmdMode){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_QPI_MODE_EN,SF_CTRL_SPI_MODE);
+    }else{
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_QPI_MODE_EN,SF_CTRL_QPI_MODE);
+    }
+
+    if(SF_CTRL_ADDR_1_LINE==cfg->addrMode){
+        if(SF_CTRL_DATA_1_LINE==cfg->dataMode){
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_SPI_MODE,SF_CTRL_NIO_MODE);
+        }else if(SF_CTRL_DATA_2_LINES==cfg->dataMode){
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_SPI_MODE,SF_CTRL_DO_MODE);
+        }else if(SF_CTRL_DATA_4_LINES==cfg->dataMode){
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_SPI_MODE,SF_CTRL_QO_MODE);
+        }
+    }else if(SF_CTRL_ADDR_2_LINES==cfg->addrMode){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_SPI_MODE,SF_CTRL_DIO_MODE);
+    }else if(SF_CTRL_ADDR_4_LINES==cfg->addrMode){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_SPI_MODE,SF_CTRL_QIO_MODE);
+    }
+
+    if(cmdValid){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_CMD_EN,1);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_CMD_BYTE,0);
+    }else{
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_CMD_EN,0);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_CMD_BYTE,0);
+    }
+
+    /* Configure address */
+    if(cfg->addrSize != 0){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_ADR_EN,1);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_ADR_BYTE,cfg->addrSize-1);
+    }else{
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_ADR_EN,0);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_ADR_BYTE,0);
+    }
+
+    /* configure dummy */
+    if(cfg->dummyClks !=0){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_DMY_EN,1);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_DMY_BYTE,cfg->dummyClks-1);
+    }else{
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_DMY_EN,0);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_DMY_BYTE,0);
+    }
+
+    /* Configure data */
+    if(cfg->nbData !=0){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_DAT_EN,1);
+    } else {
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_DAT_EN,0);
+    }
+
+    /* Set read write flag */
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_2_DAT_RW,cfg->rwFlag);
+
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IAHB_3,tmpVal);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Config psram controller for psram I/D cache read
+ *
+ * @param  cfg: Serial flash controller command configuration pointer
+ * @param  cmdValid: command valid or not, for continous read, cache may need no command
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SF_Ctrl_Psram_Read_Icache_Set(SF_Ctrl_Cmd_Cfg_Type *cfg,uint8_t cmdValid)
+{
+    uint32_t tmpVal = 0;
+    uint32_t timeOut = 0;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SF_CTRL_CMD_MODE_TYPE(cfg->cmdMode));
+    CHECK_PARAM(IS_SF_CTRL_ADDR_MODE_TYPE(cfg->addrMode));
+    CHECK_PARAM(IS_SF_CTRL_DMY_MODE_TYPE(cfg->dummyMode));
+    CHECK_PARAM(IS_SF_CTRL_DATA_MODE_TYPE(cfg->dataMode));
+
+    timeOut = SF_CTRL_BUSY_STATE_TIMEOUT;
+    while(SET==SF_Ctrl_GetBusyState()){
+        timeOut--;
+        if(timeOut == 0){
+            return;
+        }
+    }
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_1);
+
+    if(BL_GET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_FN_SEL)!=SF_CTRL_OWNER_IAHB){
+        return;
+    }
+
+    /* Copy command buffer */
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IAHB_10,cfg->cmdBuf[0]);
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IAHB_11,cfg->cmdBuf[1]);
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IAHB_9);
+
+    /* Configure SPI and IO mode*/
+    if(SF_CTRL_CMD_1_LINE==cfg->cmdMode){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_QPI_MODE_EN,SF_CTRL_SPI_MODE);
+    }else{
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_QPI_MODE_EN,SF_CTRL_QPI_MODE);
+    }
+
+    if(SF_CTRL_ADDR_1_LINE==cfg->addrMode){
+        if(SF_CTRL_DATA_1_LINE==cfg->dataMode){
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_SPI_MODE,SF_CTRL_NIO_MODE);
+        }else if(SF_CTRL_DATA_2_LINES==cfg->dataMode){
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_SPI_MODE,SF_CTRL_DO_MODE);
+        }else if(SF_CTRL_DATA_4_LINES==cfg->dataMode){
+            tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_SPI_MODE,SF_CTRL_QO_MODE);
+        }
+    }else if(SF_CTRL_ADDR_2_LINES==cfg->addrMode){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_SPI_MODE,SF_CTRL_DIO_MODE);
+    }else if(SF_CTRL_ADDR_4_LINES==cfg->addrMode){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_SPI_MODE,SF_CTRL_QIO_MODE);
+    }
+
+    if(cmdValid){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_CMD_EN,1);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_CMD_BYTE,0);
+    }else{
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_CMD_EN,0);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_CMD_BYTE,0);
+    }
+
+    /* Configure address */
+    if(cfg->addrSize != 0){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_ADR_EN,1);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_ADR_BYTE,cfg->addrSize-1);
+    }else{
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_ADR_EN,0);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_ADR_BYTE,0);
+    }
+
+    /* configure dummy */
+    if(cfg->dummyClks !=0){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_DMY_EN,1);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_DMY_BYTE,cfg->dummyClks-1);
+    }else{
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_DMY_EN,0);
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_DMY_BYTE,0);
+    }
+
+    /* Configure data */
+    if(cfg->nbData !=0){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_DAT_EN,1);
+    } else {
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_DAT_EN,0);
+    }
+
+    /* Set read write flag */
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,SF_CTRL_SF_IF_1_DAT_RW,cfg->rwFlag);
+
+    BL_WR_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_IAHB_9,tmpVal);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Get SF Ctrl busy state
+ *
+ * @param  None
+ *
+ * @return SET  for SF ctrl busy or RESET for SF ctrl not busy
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Sts_Type ATTR_TCM_SECTION SF_Ctrl_GetBusyState(void)
+{
+    uint32_t tmpVal;
+
+    tmpVal=BL_RD_REG(SF_CTRL_BASE,SF_CTRL_SF_IF_SAHB_0);
+
+    if( BL_IS_REG_BIT_SET(tmpVal,SF_CTRL_SF_IF_BUSY)){
+        return SET;
+    }else{
+        return RESET;
+    }
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  SF Controller interrupt handler
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void SF_Ctrl_IRQHandler(void)
+{
+    /* TODO: Not implemented */
+}
+#endif
+
+/*@} end of group SF_CTRL_Public_Functions */
+
+/*@} end of group SF_CTRL */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_sflash.c b/drivers/bl702_driver/std_drv/src/bl702_sflash.c
new file mode 100644
index 00000000..5a29fb1a
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_sflash.c
@@ -0,0 +1,1470 @@
+/**
+  ******************************************************************************
+  * @file    bl702_sflash.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "string.h"
+#include "bl702_sflash.h"
+#include "bl702_sf_ctrl.h"
+#include "bl702_l1c.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  SFLASH
+ *  @{
+ */
+
+/** @defgroup  SFLASH_Private_Macros
+ *  @{
+ */
+
+/*@} end of group SFLASH_Private_Macros */
+
+/** @defgroup  SFLASH_Private_Types
+ *  @{
+ */
+
+/*@} end of group SFLASH_Private_Types */
+
+/** @defgroup  SFLASH_Private_Variables
+ *  @{
+ */
+#define SFCTRL_BUSY_STATE_TIMEOUT               (5*160*1000)
+
+/*@} end of group SFLASH_Private_Variables */
+
+/** @defgroup  SFLASH_Global_Variables
+ *  @{
+ */
+
+/*@} end of group SFLASH_Global_Variables */
+
+/** @defgroup  SFLASH_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group SFLASH_Private_Fun_Declaration */
+
+/** @defgroup  SFLASH_Private_Functions
+ *  @{
+ */
+
+/*@} end of group SFLASH_Private_Functions */
+
+/** @defgroup  SFLASH_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Init serial flash control interface
+ *
+ * @param  pSfCtrlCfg: Serial flash controller configuration pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SFlash_Init(const SF_Ctrl_Cfg_Type *pSfCtrlCfg)
+{
+    SF_Ctrl_Enable(pSfCtrlCfg);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Set serial flash control interface SPI or QPI mode
+ *
+ * @param  mode: Serial flash interface mode
+ *
+ * @return BFLB_RET:SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_SetSPIMode(SF_Ctrl_Mode_Type mode)
+{
+    BL_Err_Type stat=SUCCESS;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SF_CTRL_MODE_TYPE(mode));
+
+    return stat;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Read flash register
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ * @param  regIndex: register index
+ * @param  regValue: register value pointer to store data
+ * @param  regLen: register value length
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_Read_Reg(SPI_Flash_Cfg_Type *flashCfg,uint8_t regIndex,uint8_t *regValue,uint8_t regLen)
+{
+    uint8_t * const flashCtrlBuf=(uint8_t *)SF_CTRL_BUF_BASE;
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+    uint32_t cnt=0;
+
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+
+    flashCmd.cmdBuf[0]=(flashCfg->readRegCmd[regIndex])<<24;
+    flashCmd.rwFlag=SF_CTRL_READ;
+    flashCmd.nbData=regLen;
+
+    SF_Ctrl_SendCmd(&flashCmd);
+
+    while(SET==SF_Ctrl_GetBusyState()){
+        BL702_Delay_US(1);
+        cnt++;
+        if(cnt>1000){
+            return ERROR;
+        }
+    }
+
+    BL702_MemCpy(regValue,flashCtrlBuf,regLen);
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Write flash register
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ * @param  regIndex: register index
+ * @param  regValue: register value pointer storing data
+ * @param  regLen: register value length
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_Write_Reg(SPI_Flash_Cfg_Type *flashCfg,uint8_t regIndex,uint8_t *regValue,uint8_t regLen)
+{
+    uint8_t * const flashCtrlBuf=(uint8_t *)SF_CTRL_BUF_BASE;
+    uint32_t cnt=0;
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+    BL702_MemCpy(flashCtrlBuf,regValue,regLen);
+
+    flashCmd.cmdBuf[0]=(flashCfg->writeRegCmd[regIndex])<<24;
+    flashCmd.rwFlag=SF_CTRL_WRITE;
+    flashCmd.nbData=regLen;
+
+    SF_Ctrl_SendCmd(&flashCmd);
+
+    /* take 40ms for tw(write status register) as default */
+    while(SET==SFlash_Busy(flashCfg)){
+        BL702_Delay_US(100);
+        cnt++;
+        if(cnt>400){
+            return ERROR;
+        }
+    }
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Read flash register with read command
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ * @param  readRegCmd: read command
+ * @param  regValue: register value pointer to store data
+ * @param  regLen: register value length
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_Read_Reg_With_Cmd(SPI_Flash_Cfg_Type *flashCfg,uint8_t readRegCmd,uint8_t *regValue,uint8_t regLen)
+{
+    uint8_t * const flashCtrlBuf=(uint8_t *)SF_CTRL_BUF_BASE;
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+    uint32_t cnt=0;
+
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+
+    flashCmd.cmdBuf[0]=readRegCmd<<24;
+    flashCmd.rwFlag=SF_CTRL_READ;
+    flashCmd.nbData=regLen;
+
+    SF_Ctrl_SendCmd(&flashCmd);
+
+    while(SET==SF_Ctrl_GetBusyState()){
+        BL702_Delay_US(1);
+        cnt++;
+        if(cnt>1000){
+            return ERROR;
+        }
+    }
+
+    BL702_MemCpy(regValue,flashCtrlBuf,regLen);
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Write flash register with write command
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ * @param  writeRegCmd: write command
+ * @param  regValue: register value pointer storing data
+ * @param  regLen: register value length
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_Write_Reg_With_Cmd(SPI_Flash_Cfg_Type *flashCfg,uint8_t writeRegCmd,uint8_t *regValue,uint8_t regLen)
+{
+    uint8_t * const flashCtrlBuf=(uint8_t *)SF_CTRL_BUF_BASE;
+    uint32_t cnt=0;
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+    BL702_MemCpy(flashCtrlBuf,regValue,regLen);
+
+    flashCmd.cmdBuf[0]=writeRegCmd<<24;
+    flashCmd.rwFlag=SF_CTRL_WRITE;
+    flashCmd.nbData=regLen;
+
+    SF_Ctrl_SendCmd(&flashCmd);
+
+    /* take 40ms for tw(write status register) as default */
+    while(SET==SFlash_Busy(flashCfg)){
+        BL702_Delay_US(100);
+        cnt++;
+        if(cnt>400){
+            return ERROR;
+        }
+    }
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Check flash busy status
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ *
+ * @return SET for busy or RESET for not busy
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Sts_Type ATTR_TCM_SECTION SFlash_Busy(SPI_Flash_Cfg_Type *flashCfg)
+{
+    uint32_t stat=0;
+    SFlash_Read_Reg(flashCfg,flashCfg->busyIndex,(uint8_t *)&stat,flashCfg->busyReadRegLen);
+    if((stat&(1<busyBit))==0){
+        return RESET;
+    }
+
+    return SET;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Enable flash write function
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_Write_Enable(SPI_Flash_Cfg_Type *flashCfg)
+{
+    uint32_t stat=0;
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+
+    /* Write enable*/
+    flashCmd.cmdBuf[0]=(flashCfg->writeEnableCmd)<<24;
+    /* rwFlag don't care */
+    flashCmd.rwFlag=SF_CTRL_READ;
+    SF_Ctrl_SendCmd(&flashCmd);
+
+    SFlash_Read_Reg(flashCfg,flashCfg->wrEnableIndex,(uint8_t *)&stat,flashCfg->wrEnableReadRegLen);
+
+    if((stat&(1<wrEnableBit))!=0){
+        return SUCCESS;
+    }
+
+    return ERROR;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Enable flash flash controller QSPI interface
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_Qspi_Enable(SPI_Flash_Cfg_Type *flashCfg)
+{
+    uint32_t stat=0,ret;
+
+    if(flashCfg->qeReadRegLen==0){
+        ret=SFlash_Write_Enable(flashCfg);
+        if(SUCCESS!=ret){
+            return ERROR;
+        }
+        SFlash_Write_Reg(flashCfg,flashCfg->qeIndex,(uint8_t *)&stat,flashCfg->qeWriteRegLen);
+        return SUCCESS;
+    }
+
+    SFlash_Read_Reg(flashCfg,flashCfg->qeIndex,(uint8_t *)&stat,flashCfg->qeReadRegLen);
+
+    if(flashCfg->qeData==0){
+        if((stat&(1<qeBit))!=0){
+            return SUCCESS;
+        }
+    }else{
+        if(((stat>>(flashCfg->qeBit&0x08))&0xff)==flashCfg->qeData){
+            return SUCCESS;
+        }
+    }
+
+    if(flashCfg->qeWriteRegLen!=1){
+        /* This is  read r0,read r1 write r0,r1 case*/
+        SFlash_Read_Reg(flashCfg,0,(uint8_t *)&stat,1);
+        SFlash_Read_Reg(flashCfg,1,((uint8_t *)&stat)+1,1);
+        if(flashCfg->qeData==0){
+            stat|=(1<<(flashCfg->qeBit+8*flashCfg->qeIndex));
+        }else{
+            stat=stat&(~(0xff<<(8*flashCfg->qeIndex)));
+            stat|=(flashCfg->qeData<<(8*flashCfg->qeIndex));
+        }
+    }else{
+        if(flashCfg->qeData==0){
+            stat|=(1<<(flashCfg->qeBit%8));
+        }else{
+            stat=flashCfg->qeData;
+        }
+    }
+
+    ret=SFlash_Write_Enable(flashCfg);
+    if(SUCCESS!=ret){
+        return ERROR;
+    }
+    SFlash_Write_Reg(flashCfg,flashCfg->qeIndex,(uint8_t *)&stat,flashCfg->qeWriteRegLen);
+    SFlash_Read_Reg(flashCfg,flashCfg->qeIndex,(uint8_t *)&stat,flashCfg->qeReadRegLen);
+
+    if(flashCfg->qeData==0){
+        if((stat&(1<qeBit))!=0){
+            return SUCCESS;
+        }
+    }else{
+        if(((stat>>(flashCfg->qeBit&0x08))&0xff)==flashCfg->qeData){
+            return SUCCESS;
+        }
+    }
+
+    return ERROR;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Enable flash volatile register write enable
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SFlash_Volatile_Reg_Write_Enable(SPI_Flash_Cfg_Type *flashCfg)
+{
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+
+    flashCmd.cmdBuf[0]=(flashCfg->writeVregEnableCmd)<<24;
+    flashCmd.rwFlag=SF_CTRL_WRITE;
+
+    SF_Ctrl_SendCmd(&flashCmd);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Erase flash whole chip
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_Chip_Erase(SPI_Flash_Cfg_Type *flashCfg)
+{
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+    uint32_t cnt=0;
+    BL_Err_Type stat=SFlash_Write_Enable(flashCfg);
+
+
+    if(stat!=SUCCESS){
+        return stat;
+    }
+
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+
+
+    flashCmd.cmdBuf[0]=(flashCfg->chipEraseCmd)<<24;
+    /* rwFlag don't care */
+    flashCmd.rwFlag=SF_CTRL_READ;
+
+    SF_Ctrl_SendCmd(&flashCmd);
+
+    while(SET==SFlash_Busy(flashCfg)){
+        BL702_Delay_US(500);
+        cnt++;
+        if(cnt>flashCfg->timeCe*3){
+            return ERROR;
+        }
+    }
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Erase flash one sector
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ * @param  secNum: flash sector number
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_Sector_Erase(SPI_Flash_Cfg_Type *flashCfg,uint32_t secNum)
+{
+    uint32_t cnt=0;
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+
+    BL_Err_Type stat=SFlash_Write_Enable(flashCfg);
+    if(stat!=SUCCESS){
+        return stat;
+    }
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+
+    flashCmd.cmdBuf[0]=(flashCfg->sectorEraseCmd<<24)|(flashCfg->sectorSize*1024*secNum);
+    /* rwFlag don't care */
+    flashCmd.rwFlag=SF_CTRL_READ;
+    flashCmd.addrSize=3;
+
+    SF_Ctrl_SendCmd(&flashCmd);
+
+    while(SET==SFlash_Busy(flashCfg)){
+        BL702_Delay_US(500);
+        cnt++;
+        if(cnt>flashCfg->timeEsector*3){
+            return ERROR;
+        }
+    }
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Erase flash one 32K block
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ * @param  blkNum: flash 32K block number
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_Blk32_Erase(SPI_Flash_Cfg_Type *flashCfg,uint32_t blkNum)
+{
+    uint32_t cnt=0;
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+    BL_Err_Type stat=SFlash_Write_Enable(flashCfg);
+    if(stat!=SUCCESS){
+        return stat;
+    }
+
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+
+    flashCmd.cmdBuf[0]=(flashCfg->blk32EraseCmd<<24)|(BFLB_SPIFLASH_BLK32K_SIZE*blkNum);
+    /* rwFlag don't care */
+    flashCmd.rwFlag=SF_CTRL_READ;
+    flashCmd.addrSize=3;
+
+    SF_Ctrl_SendCmd(&flashCmd);
+
+    while(SET==SFlash_Busy(flashCfg)){
+        BL702_Delay_US(500);
+        cnt++;
+        if(cnt>flashCfg->timeE32k*3){
+            return ERROR;
+        }
+    }
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Erase flash one 64K block
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ * @param  blkNum: flash 64K block number
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_Blk64_Erase(SPI_Flash_Cfg_Type *flashCfg,uint32_t blkNum)
+{
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+    uint32_t cnt=0;
+    BL_Err_Type stat=SFlash_Write_Enable(flashCfg);
+
+    if(stat!=SUCCESS){
+        return stat;
+    }
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+
+    flashCmd.cmdBuf[0]=(flashCfg->blk64EraseCmd<<24)|(BFLB_SPIFLASH_BLK64K_SIZE*blkNum);
+    /* rwFlag don't care */
+    flashCmd.rwFlag=SF_CTRL_READ;
+    flashCmd.addrSize=3;
+
+    SF_Ctrl_SendCmd(&flashCmd);
+
+    while(SET==SFlash_Busy(flashCfg)){
+        BL702_Delay_US(500);
+        cnt++;
+        if(cnt>flashCfg->timeE64k*3){
+            return ERROR;
+        }
+    }
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Erase flash one region
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ * @param  startaddr: start address to erase
+ * @param  endaddr: end address(include this address) to erase
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_Erase(SPI_Flash_Cfg_Type *flashCfg,uint32_t startaddr,uint32_t endaddr)
+{
+    uint32_t len=0;
+    uint32_t eraseLen=0;
+    BL_Err_Type ret=SUCCESS;
+
+    while(startaddr<=endaddr){
+        len=endaddr-startaddr+1;
+        if(flashCfg->blk64EraseCmd!=BFLB_SPIFLASH_CMD_INVALID &&
+            (startaddr&(BFLB_SPIFLASH_BLK64K_SIZE-1))==0 &&
+            len>(BFLB_SPIFLASH_BLK64K_SIZE-flashCfg->sectorSize*1024)){
+            /* 64K margin address,and length > 64K-sector size, erase one first */
+            ret=SFlash_Blk64_Erase(flashCfg,startaddr/BFLB_SPIFLASH_BLK64K_SIZE);
+            eraseLen=BFLB_SPIFLASH_BLK64K_SIZE;
+        }else if( flashCfg->blk32EraseCmd!=BFLB_SPIFLASH_CMD_INVALID &&
+                  (startaddr&(BFLB_SPIFLASH_BLK32K_SIZE-1))==0 &&
+            len>(BFLB_SPIFLASH_BLK32K_SIZE-flashCfg->sectorSize*1024)){
+            /* 32K margin address,and length > 32K-sector size, erase one first */
+            ret=SFlash_Blk32_Erase(flashCfg,startaddr/BFLB_SPIFLASH_BLK32K_SIZE);
+            eraseLen=BFLB_SPIFLASH_BLK32K_SIZE;
+        }else{
+            /* Sector erase */
+            startaddr=((startaddr) & (~(flashCfg->sectorSize*1024 - 1)));
+            ret=SFlash_Sector_Erase(flashCfg,startaddr/flashCfg->sectorSize/1024);
+            eraseLen=flashCfg->sectorSize*1024;
+        }
+
+        startaddr+=eraseLen;
+        if(ret!=SUCCESS){
+            return ERROR;
+        }
+    }
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Program flash one region
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ * @param  ioMode: progran mode:SPI mode or QPI mode
+ * @param  addr: start address to be programed
+ * @param  data: data pointer to be programed
+ * @param  len: data length to be programed
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_Program(SPI_Flash_Cfg_Type *flashCfg,
+    SF_Ctrl_IO_Type ioMode,uint32_t addr,uint8_t *data, uint32_t len)
+{
+    uint8_t * const flashCtrlBuf=(uint8_t *)SF_CTRL_BUF_BASE;
+    uint32_t i=0,curLen=0;
+    uint32_t cnt=0;
+    BL_Err_Type stat;
+    uint8_t cmd;
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+
+    if(SF_CTRL_NIO_MODE==ioMode||SF_CTRL_DO_MODE==ioMode||SF_CTRL_DIO_MODE==ioMode)
+    {
+        cmd=flashCfg->pageProgramCmd;
+    }else if(SF_CTRL_QIO_MODE==ioMode||SF_CTRL_QO_MODE==ioMode){
+        flashCmd.addrMode=(SF_Ctrl_Addr_Mode_Type)flashCfg->qppAddrMode;
+        flashCmd.dataMode=SF_CTRL_DATA_4_LINES;
+        cmd=flashCfg->qpageProgramCmd;
+    }else{
+        return ERROR;
+    }
+
+    /* Prepare command */
+    flashCmd.rwFlag=SF_CTRL_WRITE;
+    flashCmd.addrSize=3;
+
+    for(i=0;ipageSize-addr%flashCfg->pageSize;
+        if(curLen>len-i){
+            curLen=len-i;
+        }
+
+        /* Prepare command */
+        BL702_MemCpy_Fast(flashCtrlBuf,data,curLen);
+        flashCmd.cmdBuf[0]=(cmd<<24)|(addr);
+        flashCmd.nbData=curLen;
+
+        SF_Ctrl_SendCmd(&flashCmd);
+
+        /* Adjust address and programmed length */
+        addr+=curLen;
+        i+=curLen;
+        data+=curLen;
+
+        /* Wait for write done */
+        cnt=0;
+        while(SET==SFlash_Busy(flashCfg)){
+            BL702_Delay_US(100);
+            cnt++;
+            if(cnt>flashCfg->timePagePgm*20){
+                return ERROR;
+            }
+        }
+    }
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Get flash unique ID
+ *
+ * @param  data: data pointer to store read data
+ * @param  idLen: unique ID len
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SFlash_GetUniqueId(uint8_t *data,uint8_t idLen)
+{
+    uint8_t * const flashCtrlBuf=(uint8_t *)SF_CTRL_BUF_BASE;
+    uint8_t cmd,dummyClks;
+    uint32_t timeOut=0;
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+
+    dummyClks=4;
+    cmd=0x4B;
+    flashCmd.cmdBuf[0]=(cmd<<24);
+    flashCmd.rwFlag=SF_CTRL_READ;
+    flashCmd.dummyClks=dummyClks;
+    flashCmd.nbData=idLen;
+
+    SF_Ctrl_SendCmd(&flashCmd);
+
+    timeOut=SFCTRL_BUSY_STATE_TIMEOUT;
+    while(SET==SF_Ctrl_GetBusyState()){
+        timeOut--;
+        if(timeOut==0){
+            return;
+        }
+    }
+
+    BL702_MemCpy(data,flashCtrlBuf,idLen);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Get flash jedec ID
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ * @param  data: data pointer to store read data
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SFlash_GetJedecId(SPI_Flash_Cfg_Type *flashCfg,uint8_t *data)
+{
+    uint8_t * const flashCtrlBuf=(uint8_t *)SF_CTRL_BUF_BASE;
+    uint8_t cmd,dummyClks;
+    uint32_t timeOut=0;
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+
+    dummyClks=flashCfg->jedecIdCmdDmyClk;
+    cmd=flashCfg->jedecIdCmd;
+    flashCmd.cmdBuf[0]=(cmd<<24);
+    flashCmd.rwFlag=SF_CTRL_READ;
+    flashCmd.dummyClks=dummyClks;
+    flashCmd.nbData=3;
+
+    SF_Ctrl_SendCmd(&flashCmd);
+
+    timeOut=SFCTRL_BUSY_STATE_TIMEOUT;
+    while(SET==SF_Ctrl_GetBusyState()){
+        timeOut--;
+        if(timeOut==0){
+            return;
+        }
+    }
+
+    BL702_MemCpy(data,flashCtrlBuf,3);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Get flash device ID
+ *
+ * @param  data: data pointer to store read data
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SFlash_GetDeviceId(uint8_t *data)
+{
+    uint8_t * const flashCtrlBuf=(uint8_t *)SF_CTRL_BUF_BASE;
+    uint8_t cmd,dummyClks;
+    uint32_t timeOut=0;
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+    uint32_t addr = 0x00000001;
+    uint8_t readMode = 0xFF;
+
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+
+    flashCmd.addrMode=SF_CTRL_ADDR_4_LINES;
+    flashCmd.dataMode=SF_CTRL_DATA_4_LINES;
+    dummyClks=2;
+    cmd=0x94;
+    flashCmd.cmdBuf[0]=(cmd<<24)|(addr);
+    flashCmd.cmdBuf[1]=(readMode<<24);
+    flashCmd.rwFlag=SF_CTRL_READ;
+    flashCmd.addrSize=4;
+    flashCmd.dummyClks=dummyClks;
+    flashCmd.nbData=2;
+
+    SF_Ctrl_SendCmd(&flashCmd);
+
+    timeOut=SFCTRL_BUSY_STATE_TIMEOUT;
+    while(SET==SF_Ctrl_GetBusyState()){
+        timeOut--;
+        if(timeOut==0){
+            return;
+        }
+    }
+
+    BL702_MemCpy(data,flashCtrlBuf,2);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Set flash power down
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SFlash_Powerdown(void)
+{
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+    uint8_t cmd=0;
+    uint32_t timeOut=0;
+
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+
+    cmd=0xB9;
+    flashCmd.cmdBuf[0]=(cmd<<24);
+    flashCmd.rwFlag=SF_CTRL_WRITE;
+
+    SF_Ctrl_SendCmd(&flashCmd);
+
+    timeOut=SFCTRL_BUSY_STATE_TIMEOUT;
+    while(SET==SF_Ctrl_GetBusyState()){
+        timeOut--;
+        if(timeOut==0)
+            return;
+    }
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Release flash power down for wake up
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SFlash_Releae_Powerdown(SPI_Flash_Cfg_Type *flashCfg)
+{
+    uint8_t cmd;
+    uint32_t timeOut=0;
+
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+    cmd=flashCfg->releasePowerDown;
+    flashCmd.cmdBuf[0]=(cmd<<24);
+    flashCmd.rwFlag=SF_CTRL_WRITE;
+
+    SF_Ctrl_SendCmd(&flashCmd);
+
+    timeOut=SFCTRL_BUSY_STATE_TIMEOUT;
+    while(SET==SF_Ctrl_GetBusyState()){
+        timeOut--;
+        if(timeOut==0)
+            return;
+    }
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Sflash restore from power down
+ *
+ * @param  pFlashCfg: Flash configuration pointer
+ * @param  flashContRead: Whether enable continuous read
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_Restore_From_Powerdown(SPI_Flash_Cfg_Type *pFlashCfg,uint8_t flashContRead)
+{
+    BL_Err_Type stat=SUCCESS;
+    uint32_t jdecId=0;
+    uint8_t tmp[8];
+    uint8_t ioMode=pFlashCfg->ioMode&0xf;
+
+    /* Wake flash up from power down */
+    SFlash_Releae_Powerdown(pFlashCfg);
+    BL702_Delay_US(120);
+
+    SFlash_GetJedecId(pFlashCfg,(uint8_t *)&jdecId);
+
+    if(SF_CTRL_QO_MODE==ioMode||SF_CTRL_QIO_MODE==ioMode){
+        SFlash_Qspi_Enable(pFlashCfg);
+    }
+
+    if(((pFlashCfg->ioMode>>4)&0x01)==1){
+        /* unwrap */
+        L1C_Set_Wrap(DISABLE);
+    }else{
+        /* burst wrap */
+        L1C_Set_Wrap(ENABLE);
+        /* For command that is setting register instead of send command, we need write enable */
+        SFlash_Write_Enable(pFlashCfg);
+        SFlash_SetBurstWrap(pFlashCfg);
+    }
+
+    if(flashContRead){
+        stat=SFlash_Read(pFlashCfg,ioMode,1,0x00000000,(uint8_t *)tmp, sizeof(tmp));
+        SF_Ctrl_Set_Owner(SF_CTRL_OWNER_IAHB);
+    }else{
+        stat=SFlash_Set_IDbus_Cfg(pFlashCfg,ioMode,0,0,32);
+    }
+    return stat;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Set flash burst wrap config
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SFlash_SetBurstWrap(SPI_Flash_Cfg_Type *flashCfg)
+{
+    uint8_t * const flashCtrlBuf=(uint8_t *)SF_CTRL_BUF_BASE;
+    uint8_t cmd,dummyClks;
+    uint32_t wrapData;
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+
+    if(((flashCfg->ioMode>>4)&0x01)==1){
+        /* Disable burst wrap ,just return */
+        return;
+    }
+
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+
+    flashCmd.addrMode=(SF_Ctrl_Addr_Mode_Type)flashCfg->burstWrapDataMode;
+    flashCmd.dataMode=(SF_Ctrl_Data_Mode_Type)flashCfg->burstWrapDataMode;
+    dummyClks=flashCfg->burstWrapCmdDmyClk;
+    cmd=flashCfg->burstWrapCmd;
+    wrapData=flashCfg->burstWrapData;
+    BL702_MemCpy4((uint32_t *)flashCtrlBuf,&wrapData,4);
+    flashCmd.cmdBuf[0]=(cmd<<24);
+    flashCmd.rwFlag=SF_CTRL_WRITE;
+    flashCmd.dummyClks=dummyClks;
+    flashCmd.nbData=1;
+
+    SF_Ctrl_SendCmd(&flashCmd);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Disable flash burst wrap config
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SFlash_DisableBurstWrap(SPI_Flash_Cfg_Type *flashCfg)
+{
+    uint8_t * const flashCtrlBuf=(uint8_t *)SF_CTRL_BUF_BASE;
+    uint8_t cmd,dummyClks;
+    uint32_t wrapData;
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+
+    flashCmd.addrMode=(SF_Ctrl_Addr_Mode_Type)flashCfg->deBurstWrapDataMode;
+    flashCmd.dataMode=(SF_Ctrl_Data_Mode_Type)flashCfg->deBurstWrapDataMode;
+    dummyClks=flashCfg->deBurstWrapCmdDmyClk;
+    cmd=flashCfg->deBurstWrapCmd;
+    wrapData=flashCfg->deBurstWrapData;
+    BL702_MemCpy4((uint32_t *)flashCtrlBuf,&wrapData,4);
+    flashCmd.cmdBuf[0]=(cmd<<24);
+    flashCmd.rwFlag=SF_CTRL_WRITE;
+    flashCmd.dummyClks=dummyClks;
+    flashCmd.nbData=1;
+
+    SF_Ctrl_SendCmd(&flashCmd);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Software reset flash
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_Software_Reset(SPI_Flash_Cfg_Type *flashCfg)
+{
+    uint16_t cnt=0;
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+
+    /* Reset enable */
+    flashCmd.cmdBuf[0]=(flashCfg->resetEnCmd)<<24;
+    /* rwFlag don't care */
+    flashCmd.rwFlag=SF_CTRL_READ;
+    /* Wait for write done */
+    while(SET==SFlash_Busy(flashCfg)){
+        BL702_Delay_US(100);
+        cnt++;
+        if(cnt>20){
+            return ERROR;
+        }
+    }
+    SF_Ctrl_SendCmd(&flashCmd);
+
+    /* Reset */
+    flashCmd.cmdBuf[0]=(flashCfg->resetCmd)<<24;
+    /* rwFlag don't care */
+    flashCmd.rwFlag=SF_CTRL_READ;
+    SF_Ctrl_SendCmd(&flashCmd);
+
+    BL702_Delay_US(50);
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Reset flash continous read mode
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SFlash_Reset_Continue_Read(SPI_Flash_Cfg_Type *flashCfg)
+{
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+
+    /* Reset continous read */
+    BL702_MemSet(&flashCmd.cmdBuf[0],flashCfg->resetCreadCmd,4);
+    /* rwFlag don't care */
+    flashCmd.rwFlag=SF_CTRL_READ;
+    flashCmd.addrSize=flashCfg->resetCreadCmdSize;
+    SF_Ctrl_SendCmd(&flashCmd);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Set I/D bus read flash configuration in flash controller
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ * @param  ioMode: flash controller interface mode
+ * @param  contRead: Wether enable cont read mode
+ * @param  addr: address to read/write
+ * @param  len: data length to read/write
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_Set_IDbus_Cfg(SPI_Flash_Cfg_Type *flashCfg,
+    SF_Ctrl_IO_Type ioMode,uint8_t contRead,uint32_t addr,uint32_t len)
+{
+    uint8_t cmd,dummyClks;
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+    uint8_t cmdValid=1;
+    uint8_t noReadModeCfg=0;
+    uint8_t cReadSupport=0;
+
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+    SF_Ctrl_Set_Owner(SF_CTRL_OWNER_IAHB);
+
+    if(SF_CTRL_NIO_MODE==ioMode){
+        cmd=flashCfg->fastReadCmd;
+        dummyClks=flashCfg->frDmyClk;
+    }else if(SF_CTRL_DO_MODE==ioMode){
+        flashCmd.dataMode=SF_CTRL_DATA_2_LINES;
+        cmd=flashCfg->fastReadDoCmd;
+        dummyClks=flashCfg->frDoDmyClk;
+    }else if(SF_CTRL_DIO_MODE==ioMode){
+        flashCmd.addrMode=SF_CTRL_ADDR_2_LINES;
+        flashCmd.dataMode=SF_CTRL_DATA_2_LINES;
+        cmd=flashCfg->fastReadDioCmd;
+        dummyClks=flashCfg->frDioDmyClk;
+    }else if(SF_CTRL_QO_MODE==ioMode){
+        flashCmd.dataMode=SF_CTRL_DATA_4_LINES;
+        cmd=flashCfg->fastReadQoCmd;
+        dummyClks=flashCfg->frQoDmyClk;
+    }else if(SF_CTRL_QIO_MODE==ioMode){
+        flashCmd.addrMode=SF_CTRL_ADDR_4_LINES;
+        flashCmd.dataMode=SF_CTRL_DATA_4_LINES;
+        cmd=flashCfg->fastReadQioCmd;
+        dummyClks=flashCfg->frQioDmyClk;
+    }else{
+        return ERROR;
+    }
+
+    /*prepare command**/
+    flashCmd.rwFlag=SF_CTRL_READ;
+    flashCmd.addrSize=3;
+    flashCmd.cmdBuf[0]=(cmd<<24)|addr;
+    if(SF_CTRL_QIO_MODE==ioMode||SF_CTRL_DIO_MODE==ioMode){
+        noReadModeCfg=flashCfg->cReadSupport&0x02;
+        cReadSupport=flashCfg->cReadSupport&0x01;
+        if(noReadModeCfg==0){
+            /* Read mode must be set*/
+            if(cReadSupport==0){
+                /* Not support cont read,but we still need set read mode(winbond 80dv)*/
+                flashCmd.cmdBuf[1]=(flashCfg->cReadMode<<24);
+            }else{
+                /* Flash support cont read, setting depend on user parameter */
+                if(contRead){
+                    flashCmd.cmdBuf[0]=(addr<<8)|flashCfg->cReadMode;
+                    cmdValid=0;
+                }else{
+                    flashCmd.cmdBuf[1]=((!flashCfg->cReadMode)<<24);
+                }
+            }
+            flashCmd.addrSize++;
+        }
+    }
+    flashCmd.dummyClks=dummyClks;
+    flashCmd.nbData=len;
+    SF_Ctrl_Flash_Read_Icache_Set(&flashCmd,cmdValid);
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Enable I/D bus read from flash
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ * @param  ioMode: flash controller interface mode
+ * @param  contRead: Wether enable cont read mode
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_IDbus_Read_Enable(SPI_Flash_Cfg_Type *flashCfg,SF_Ctrl_IO_Type ioMode,uint8_t contRead)
+{
+    BL_Err_Type stat;
+
+    stat=SFlash_Set_IDbus_Cfg(flashCfg,ioMode,contRead,0,4);
+    if(SUCCESS!=stat){
+        return stat;
+    }
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Enable cache read from flash with cache
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ * @param  ioMode: flash controller interface mode
+ * @param  contRead: Wether enable cont read mode
+ * @param  wayDisable: cache way disable config
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_Cache_Read_Enable(SPI_Flash_Cfg_Type *flashCfg,
+    SF_Ctrl_IO_Type ioMode,uint8_t contRead,uint8_t wayDisable)
+{
+    BL_Err_Type stat;
+
+    /* Cache now only support 32 bytes read */
+    stat=SFlash_Set_IDbus_Cfg(flashCfg,ioMode,contRead,0,32);
+    if(SUCCESS!=stat){
+        return stat;
+    }
+
+    return L1C_Cache_Enable_Set(wayDisable);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Disable read from flash with cache
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+void ATTR_TCM_SECTION SFlash_Cache_Read_Disable(void)
+{
+    L1C_Cache_Read_Disable();
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Read data from flash
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ * @param  ioMode: flash controller interface mode
+ * @param  contRead: Wether enable cont read mode
+ * @param  addr: flash read start address
+ * @param  data: data pointer to store data read from flash
+ * @param  len: data length to read
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_Read(SPI_Flash_Cfg_Type *flashCfg,
+    SF_Ctrl_IO_Type ioMode,uint8_t contRead,uint32_t addr,uint8_t *data, uint32_t len)
+{
+    uint8_t * const flashCtrlBuf=(uint8_t *)SF_CTRL_BUF_BASE;
+    uint32_t curLen,i;
+    uint8_t cmd,dummyClks;
+    uint32_t timeOut=0;
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+    uint8_t noReadModeCfg=0;
+    uint8_t cReadSupport=0;
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+
+    if(SF_CTRL_NIO_MODE==ioMode){
+        cmd=flashCfg->fastReadCmd;
+        dummyClks=flashCfg->frDmyClk;
+    }else if(SF_CTRL_DO_MODE==ioMode){
+        flashCmd.dataMode=SF_CTRL_DATA_2_LINES;
+        cmd=flashCfg->fastReadDoCmd;
+        dummyClks=flashCfg->frDoDmyClk;
+    }else if(SF_CTRL_DIO_MODE==ioMode){
+        flashCmd.addrMode=SF_CTRL_ADDR_2_LINES;
+        flashCmd.dataMode=SF_CTRL_DATA_2_LINES;
+        cmd=flashCfg->fastReadDioCmd;
+        dummyClks=flashCfg->frDioDmyClk;
+    }else if(SF_CTRL_QO_MODE==ioMode){
+        flashCmd.dataMode=SF_CTRL_DATA_4_LINES;
+        cmd=flashCfg->fastReadQoCmd;
+        dummyClks=flashCfg->frQoDmyClk;
+    }else if(SF_CTRL_QIO_MODE==ioMode){
+        flashCmd.addrMode=SF_CTRL_ADDR_4_LINES;
+        flashCmd.dataMode=SF_CTRL_DATA_4_LINES;
+        cmd=flashCfg->fastReadQioCmd;
+        dummyClks=flashCfg->frQioDmyClk;
+    }else{
+        return ERROR;
+    }
+
+    /* Prepare command */
+    flashCmd.rwFlag=SF_CTRL_READ;
+    flashCmd.addrSize=3;
+    if(SF_CTRL_QIO_MODE==ioMode||SF_CTRL_DIO_MODE==ioMode){
+        noReadModeCfg=flashCfg->cReadSupport&0x02;
+        cReadSupport=flashCfg->cReadSupport&0x01;
+        if(noReadModeCfg==0){
+            /* Read mode must be set*/
+            if(cReadSupport==0){
+                /* Not support cont read,but we still need set read mode(winbond 80dv)*/
+                flashCmd.cmdBuf[1]=(flashCfg->cReadMode<<24);
+            }else{
+                /* Flash support cont read, setting depend on user parameter */
+                if(contRead){
+                    flashCmd.cmdBuf[1]=(flashCfg->cReadMode<<24);
+                }else{
+                    flashCmd.cmdBuf[1]=((!flashCfg->cReadMode)<<24);
+                }
+            }
+            flashCmd.addrSize++;
+        }
+    }
+    flashCmd.dummyClks=dummyClks;
+
+    /* Read data */
+    for(i=0;i=FLASH_CTRL_BUF_SIZE){
+            curLen=FLASH_CTRL_BUF_SIZE;
+            flashCmd.nbData=curLen;
+        }else{
+            /* Make sf_ctrl word read */
+            flashCmd.nbData=((curLen+3)>>2)<<2;
+        }
+
+        SF_Ctrl_SendCmd(&flashCmd);
+
+        timeOut=SFCTRL_BUSY_STATE_TIMEOUT;
+        while(SET==SF_Ctrl_GetBusyState()){
+            timeOut--;
+            if(timeOut==0){
+                return TIMEOUT;
+            }
+        }
+        BL702_MemCpy_Fast(data,flashCtrlBuf,curLen);
+
+        addr+=curLen;
+        i+=curLen;
+        data+=curLen;
+    }
+
+    return SUCCESS;
+}
+#endif
+
+/*@} end of group SFLASH_Public_Functions */
+
+/*@} end of group SFLASH */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_sflash_ext.c b/drivers/bl702_driver/std_drv/src/bl702_sflash_ext.c
new file mode 100644
index 00000000..c875560d
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_sflash_ext.c
@@ -0,0 +1,178 @@
+/**
+  ******************************************************************************
+  * @file    bl702_sflash_ext.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_sflash_ext.h"
+#include "bl702_sf_ctrl.h"
+#include "l1c_reg.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  SFLASH_EXT
+ *  @{
+ */
+
+/** @defgroup  SFLASH_EXT_Private_Macros
+ *  @{
+ */
+
+/*@} end of group SFLASH_EXT_Private_Macros */
+
+/** @defgroup  SFLASH_EXT_Private_Types
+ *  @{
+ */
+
+/*@} end of group SFLASH_EXT_Private_Types */
+
+/** @defgroup  SFLASH_EXT_Private_Variables
+ *  @{
+ */
+
+/*@} end of group SFLASH_EXT_Private_Variables */
+
+/** @defgroup  SFLASH_EXT_Global_Variables
+ *  @{
+ */
+
+/*@} end of group SFLASH_EXT_Global_Variables */
+
+/** @defgroup  SFLASH_EXT_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group SFLASH_EXT_Private_Fun_Declaration */
+
+/** @defgroup  SFLASH_EXT_Private_Functions
+ *  @{
+ */
+
+/*@} end of group SFLASH_EXT_Private_Functions */
+
+/** @defgroup  SFLASH_EXT_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Read flash register with read command
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ * @param  readRegCmd: read command
+ * @param  regValue: register value pointer to store data
+ * @param  regLen: register value length
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_Read_Reg_With_Cmd(SPI_Flash_Cfg_Type *flashCfg,uint8_t readRegCmd,uint8_t *regValue,uint8_t regLen)
+{
+    uint8_t * const flashCtrlBuf=(uint8_t *)SF_CTRL_BUF_BASE;
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+    uint32_t cnt=0;
+
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+
+    flashCmd.cmdBuf[0]=readRegCmd<<24;
+    flashCmd.rwFlag=SF_CTRL_READ;
+    flashCmd.nbData=regLen;
+
+    SF_Ctrl_SendCmd(&flashCmd);
+
+    while(SET==SF_Ctrl_GetBusyState()){
+        BL702_Delay_US(1);
+        cnt++;
+        if(cnt>1000){
+            return ERROR;
+        }
+    }
+
+    BL702_MemCpy(regValue,flashCtrlBuf,regLen);
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Write flash register with write command
+ *
+ * @param  flashCfg: Serial flash parameter configuration pointer
+ * @param  writeRegCmd: write command
+ * @param  regValue: register value pointer storing data
+ * @param  regLen: register value length
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION SFlash_Write_Reg_With_Cmd(SPI_Flash_Cfg_Type *flashCfg,uint8_t writeRegCmd,uint8_t *regValue,uint8_t regLen)
+{
+    uint8_t * const flashCtrlBuf=(uint8_t *)SF_CTRL_BUF_BASE;
+    uint32_t cnt=0;
+    SF_Ctrl_Cmd_Cfg_Type flashCmd;
+
+    if(((uint32_t)&flashCmd)%4==0){
+        BL702_MemSet4((uint32_t *)&flashCmd,0,sizeof(flashCmd)/4);
+    }else{
+        BL702_MemSet(&flashCmd,0,sizeof(flashCmd));
+    }
+    BL702_MemCpy(flashCtrlBuf,regValue,regLen);
+
+    flashCmd.cmdBuf[0]=writeRegCmd<<24;
+    flashCmd.rwFlag=SF_CTRL_WRITE;
+    flashCmd.nbData=regLen;
+
+    SF_Ctrl_SendCmd(&flashCmd);
+
+    /* take 40ms for tw(write status register) as default */
+    while(SET==SFlash_Busy(flashCfg)){
+        BL702_Delay_US(100);
+        cnt++;
+        if(cnt>400){
+            return ERROR;
+        }
+    }
+
+    return SUCCESS;
+}
+
+/*@} end of group SFLASH_EXT_Public_Functions */
+
+/*@} end of group SFLASH_EXT */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_snflash.c b/drivers/bl702_driver/std_drv/src/bl702_snflash.c
new file mode 100644
index 00000000..2de3d4bc
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_snflash.c
@@ -0,0 +1,901 @@
+/**
+  ******************************************************************************
+  * @file    bl702_snflash.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_snflash.h"
+#include "bl702_psram.h"
+
+#define PSRAM_ADDR               (0x24000000)
+#define DISK_SECTOR_SIZE         (512)
+#define PSRAM_READ_ERITE_SIZE	 (256)
+
+static void Nandflash_Erase(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t blockNum);
+static void Nandflash_PageReadToPsram(uint32_t addr, uint32_t len);
+static void ATTR_TCM_SECTION Nandflash_Psram_Write(uint8_t *buff, uint32_t len, uint32_t psramWriteOffsite);
+static void ATTR_TCM_SECTION Nandflash_Psram_Read(uint8_t *buff, uint32_t readLen, uint32_t psramReadOffsite);
+static void Nandflash_PageWriteToPsram(const uint8_t *buff, uint32_t addr, uint32_t len);
+static void Nandflash_PageProgramFromPsram(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t blockNum);
+
+NANDFLASH_CFG_Type nfCfg = {
+	.spiNo = SPI_ID_0,
+	.spiCfg = {
+		DISABLE,                                                 /* Disable de-glitch function */
+		DISABLE,                                                 /* Disable master continuous transfer mode */
+		SPI_BYTE_INVERSE_BYTE0_FIRST,                            /* The byte 0 is sent first in SPI transfer */
+		SPI_BIT_INVERSE_MSB_FIRST,                               /* MSB is sent first in SPI transfer */
+		SPI_CLK_PHASE_INVERSE_0,                                 /* SPI clock phase */
+		SPI_CLK_POLARITY_LOW,                                    /* SPI clock plarity */
+		SPI_FRAME_SIZE_8                                         /* SPI frame size 8-bit(also the valid width for each fifo entry) */
+	},
+	.clockCfg = {
+		1,                                                        /* Length of start condition */
+		1,                                                        /* Length of stop condition */
+		1,                                                        /* Length of data phase 0,affecting clock */
+		1,                                                        /* Length of data phase 1,affecting clock */
+		1                                                         /* Length of interval between frame */
+	}
+};
+
+static void ATTR_TCM_SECTION Nandflash_Psram_Write(uint8_t *buff, uint32_t len, uint32_t psramWriteOffsite)
+{
+	uint32_t i = 0;
+	uint32_t psramStartAddr = PSRAM_ADDR + psramWriteOffsite;
+
+	for(i = 0; i < len / PSRAM_READ_ERITE_SIZE; i ++){
+		BL702_MemCpy_Fast((void *)(psramStartAddr + i * PSRAM_READ_ERITE_SIZE), buff, PSRAM_READ_ERITE_SIZE);
+		buff += PSRAM_READ_ERITE_SIZE;
+	}
+
+	/*if len is not an integral multiple of PSRAM_READ_ERITE_SIZE need memcpy once again*/
+	if (len % PSRAM_READ_ERITE_SIZE != 0){
+		BL702_MemCpy_Fast((void *)(psramStartAddr + i * PSRAM_READ_ERITE_SIZE), buff, len % PSRAM_READ_ERITE_SIZE);
+		buff += (len % PSRAM_READ_ERITE_SIZE);
+	}
+}
+
+static void ATTR_TCM_SECTION Nandflash_Psram_Read(uint8_t *buff, uint32_t readLen, uint32_t psramReadOffsite)
+{
+	uint32_t i = 0;
+	uint32_t psramStartAddr = PSRAM_ADDR + psramReadOffsite;
+	for(i = 0; i < readLen / PSRAM_READ_ERITE_SIZE; i ++){
+		BL702_MemCpy_Fast(buff, (void *)(psramStartAddr + i * PSRAM_READ_ERITE_SIZE), PSRAM_READ_ERITE_SIZE);
+		buff += PSRAM_READ_ERITE_SIZE;
+	}
+
+	/*if len is not an integral multiple of PSRAM_READ_ERITE_SIZE need memcpy once again*/
+	if (readLen % PSRAM_READ_ERITE_SIZE != 0){
+		BL702_MemCpy_Fast(buff, (void *)(psramStartAddr + i * PSRAM_READ_ERITE_SIZE), readLen % PSRAM_READ_ERITE_SIZE);
+	}
+
+}
+
+void ATTR_TCM_SECTION Nandflash_Psram_Cfg()
+{
+    GLB_GPIO_Cfg_Type gpioCfg = {
+        .gpioPin = GLB_GPIO_PIN_17,
+        .gpioFun = GPIO17_FUN_SF_IO_0_SF2_CS2,
+        .gpioMode = GPIO_MODE_OUTPUT,
+        .pullType = GPIO_PULL_UP,
+        .drive = 3,
+        .smtCtrl = 1,
+    };
+
+    SPI_Psram_Cfg_Type apMemory1604 = {
+        .readIdCmd = 0x9F,
+        .readIdDmyClk = 0,
+        .burstToggleCmd = 0xC0,
+        .resetEnableCmd = 0x66,
+        .resetCmd = 0x99,
+        .enterQuadModeCmd = 0x35,
+        .exitQuadModeCmd = 0xF5,
+        .readRegCmd = 0xB5,
+        .readRegDmyClk = 1,
+        .writeRegCmd = 0xB1,
+        .readCmd = 0x03,
+        .readDmyClk = 0,
+        .fReadCmd = 0x0B,
+        .fReadDmyClk = 1,
+        .fReadQuadCmd = 0xEB,
+        .fReadQuadDmyClk = 3,
+        .writeCmd = 0x02,
+        .quadWriteCmd = 0x38,
+        .pageSize = 512,
+        .ctrlMode = PSRAM_SPI_CTRL_MODE,
+        .driveStrength = PSRAM_DRIVE_STRENGTH_50_OHMS,
+        .burstLength = PSRAM_BURST_LENGTH_512_BYTES,
+    };
+
+    SF_Ctrl_Cmds_Cfg cmdsCfg = {
+        .cmdsEn = ENABLE,
+        .burstToggleEn = ENABLE,
+        .wrapModeEn = DISABLE,
+        .wrapLen = SF_CTRL_WRAP_LEN_512,
+    };
+
+    SF_Ctrl_Psram_Cfg sfCtrlPsramCfg = {
+        .owner = SF_CTRL_OWNER_SAHB,
+        .padSel = SF_CTRL_PAD_SEL_DUAL_CS_SF2,
+        .bankSel = SF_CTRL_SEL_PSRAM,
+        .psramRxClkInvertSrc = ENABLE,
+        .psramRxClkInvertSel = ENABLE,
+        .psramDelaySrc = ENABLE,
+        .psramClkDelay = 0,
+    };
+    uint8_t psramId[8] = {0};
+    uint32_t wt_en = 1;
+    uint32_t wb_en = 0;
+    uint32_t wa_en = 0;
+    uint32_t i = 0;
+
+    GLB_GPIO_Init(&gpioCfg);
+
+    Psram_Init(&apMemory1604, &cmdsCfg, &sfCtrlPsramCfg);
+    Psram_SoftwareReset(&apMemory1604, apMemory1604.ctrlMode);
+    Psram_ReadId(&apMemory1604, psramId);
+
+    Psram_Cache_Write_Set(&apMemory1604, SF_CTRL_QIO_MODE, wt_en, wb_en, wa_en);
+    L1C_Cache_Enable_Set(0x0f);
+
+}
+
+void Nandflash_Gpio_Init(GLB_GPIO_Type clk, GLB_GPIO_Type mosi, GLB_GPIO_Type miso)
+{
+	GLB_GPIO_Cfg_Type gpioCfg={
+		.gpioPin=GLB_GPIO_PIN_0,
+		.gpioFun=GPIO_FUN_SPI0,
+		.gpioMode=GPIO_MODE_OUTPUT,
+		.pullType=GPIO_PULL_NONE,
+		.drive=0,
+		.smtCtrl=1
+	};
+
+	/* cs */
+	gpioCfg.gpioPin = SPI_PIN_CS;
+	gpioCfg.gpioFun = 11;
+	GLB_GPIO_Init(&gpioCfg);
+	GLB_GPIO_INPUT_Disable(gpioCfg.gpioPin);
+	GLB_GPIO_OUTPUT_Enable(gpioCfg.gpioPin);
+	Nandflash_CS_High();
+
+	/* clk */
+	gpioCfg.gpioPin = clk;
+	gpioCfg.gpioFun = GPIO_FUN_SPI0;
+	GLB_GPIO_Init(&gpioCfg);
+	GLB_GPIO_INPUT_Disable(gpioCfg.gpioPin);
+	GLB_GPIO_OUTPUT_Enable(gpioCfg.gpioPin);
+
+	/* mosi */
+	gpioCfg.gpioPin = mosi;
+	gpioCfg.gpioFun = GPIO_FUN_SPI0;
+	GLB_GPIO_Init(&gpioCfg);
+	GLB_GPIO_INPUT_Enable(gpioCfg.gpioPin);
+	GLB_GPIO_OUTPUT_Enable(gpioCfg.gpioPin);
+
+	/* miso */
+	gpioCfg.gpioPin = miso;
+	gpioCfg.gpioFun = GPIO_FUN_SPI0;
+	GLB_GPIO_Init(&gpioCfg);
+	GLB_GPIO_INPUT_Enable(gpioCfg.gpioPin);
+	GLB_GPIO_OUTPUT_Enable(gpioCfg.gpioPin);
+
+	GLB_Set_SPI_0_ACT_MOD_Sel(GLB_SPI_PAD_ACT_AS_MASTER);
+}
+
+void Nandflash_CS_High(void)
+{
+	GLB_GPIO_Write(SPI_PIN_CS,1);
+}
+
+void Nandflash_CS_Low(void)
+{
+	GLB_GPIO_Write(SPI_PIN_CS,0);
+}
+
+void Nandflash_Clock_Init(uint8_t enable, uint8_t div)
+{
+	GLB_Set_SPI_CLK(enable,div);
+	GLB_AHB_Slave1_Clock_Gate(DISABLE,BL_AHB_SLAVE1_SPI);
+}
+
+void Nandflash_SPI_Init(NANDFLASH_CFG_Type *pNandflashCfg)
+{
+	SPI_Disable(SPI_ID_0,SPI_WORK_MODE_MASTER);
+	SPI_IntMask(SPI_ID_0,SPI_INT_ALL,MASK);
+	SPI_Init(pNandflashCfg->spiNo,&(pNandflashCfg->spiCfg));
+	SPI_ClockConfig(pNandflashCfg->spiNo,&(pNandflashCfg->clockCfg));
+	SPI_Enable(SPI_ID_0,SPI_WORK_MODE_MASTER);
+}
+
+void Nandflash_SendRecv(NANDFLASH_CFG_Type *pNandflashCfg, uint8_t *sendBuff, uint8_t *recvBuff, uint32_t len)
+{
+	SPI_SendRecv_8bits(pNandflashCfg->spiNo, sendBuff, recvBuff, len, SPI_TIMEOUT_DISABLE);
+}
+
+void Nandflash_WriteEnable(NANDFLASH_CFG_Type *pNandflashCfg)
+{
+	uint8_t cmd[1] = {0};
+	uint8_t pBlockLock = 0xff;
+
+	cmd[0] = NANDFLASH_WRITE_ENABLE;
+	Nandflash_CS_High();
+	Nandflash_CS_Low();
+	SPI_Send_8bits(pNandflashCfg->spiNo, cmd, 1, SPI_TIMEOUT_DISABLE);
+	Nandflash_CS_High();
+
+	/*check block lock status*/
+	Nandflash_Get_BlockLock(pNandflashCfg, &pBlockLock);
+	if (pBlockLock != 0){
+		// MSG_ERR("Get BlockLock in Nandflash Write Enable and return %0x\r\n", pBlockLock);
+	}
+}
+
+void Nandflash_WriteDisable(NANDFLASH_CFG_Type *pNandflashCfg)
+{
+	uint8_t cmd[1] = {0};
+
+	cmd[0] = NANDFLASH_WRITE_DISABLE;
+	Nandflash_CS_High();
+	Nandflash_CS_Low();
+	SPI_Send_8bits(pNandflashCfg->spiNo, cmd, 1, SPI_TIMEOUT_DISABLE);
+	Nandflash_CS_High();
+}
+
+void Nandflash_Get_BlockLock(NANDFLASH_CFG_Type *pNandflashCfg, uint8_t *pBlockLock)
+{
+	uint8_t cmd[2] = {0};
+	uint8_t ack[1] = {0};
+
+	cmd[0] = NANDFLASH_GET_FEATURES;
+	cmd[1] = NANDFLASH_BLOCK_LOCK_ADDR;
+
+	Nandflash_CS_High();
+	Nandflash_CS_Low();
+	SPI_Send_8bits(pNandflashCfg->spiNo, cmd, 2, SPI_TIMEOUT_DISABLE);
+	SPI_Recv_8bits(pNandflashCfg->spiNo, ack, 1, SPI_TIMEOUT_DISABLE);
+	Nandflash_CS_High();
+
+	*pBlockLock = ack[0];
+}
+
+void Nandflash_Set_BlockLock(NANDFLASH_CFG_Type *pNandflashCfg, uint8_t *pBlockLock)
+{
+	uint8_t cmd[3] = {0};
+
+	cmd[0] = NANDFLASH_SET_FEATURES;
+	cmd[1] = NANDFLASH_BLOCK_LOCK_ADDR;
+	cmd[2] = *pBlockLock;
+
+	Nandflash_CS_High();
+	Nandflash_CS_Low();
+	SPI_Send_8bits(pNandflashCfg->spiNo, cmd, 3, SPI_TIMEOUT_DISABLE);
+	Nandflash_CS_High();
+}
+
+void Nandflash_Get_Feature(NANDFLASH_CFG_Type *pNandflashCfg, uint8_t *pFeature)
+{
+	uint8_t cmd[2] = {0};
+	uint8_t ack[1] = {0};
+
+	cmd[0] = NANDFLASH_GET_FEATURES;
+	cmd[1] = NANDFLASH_FEATURE_ADDR;
+
+	Nandflash_CS_High();
+	Nandflash_CS_Low();
+	SPI_Send_8bits(pNandflashCfg->spiNo, cmd, 2, SPI_TIMEOUT_DISABLE);
+	SPI_Recv_8bits(pNandflashCfg->spiNo, ack, 1, SPI_TIMEOUT_DISABLE);
+	Nandflash_CS_High();
+
+	*pFeature = ack[0];
+}
+
+void Nandflash_Set_Feature(NANDFLASH_CFG_Type *pNandflashCfg, uint8_t *pFeature)
+{
+	uint8_t cmd[3] = {0};
+
+	cmd[0] = NANDFLASH_GET_FEATURES;
+	cmd[1] = NANDFLASH_FEATURE_ADDR;
+	cmd[2] = *pFeature;
+
+	Nandflash_CS_High();
+	Nandflash_CS_Low();
+	SPI_Send_8bits(pNandflashCfg->spiNo, cmd, 3, SPI_TIMEOUT_DISABLE);
+	Nandflash_CS_High();
+}
+
+void Nandflash_Get_Status(NANDFLASH_CFG_Type *pNandflashCfg, uint8_t *pStatus)
+{
+	uint8_t cmd[2] = {0};
+	uint8_t ack[1] = {0};
+
+	cmd[0] = NANDFLASH_GET_FEATURES;
+	cmd[1] = NANDFLASH_STATUS_ADDR;
+
+	Nandflash_CS_High();
+	Nandflash_CS_Low();
+	SPI_Send_8bits(pNandflashCfg->spiNo, cmd, 2, SPI_TIMEOUT_DISABLE);
+	SPI_Recv_8bits(pNandflashCfg->spiNo, ack, 1, SPI_TIMEOUT_DISABLE);
+	Nandflash_CS_High();
+
+	*pStatus = ack[0];
+}
+
+void Nandflash_Set_Status(NANDFLASH_CFG_Type *pNandflashCfg, uint8_t *pStatus)
+{
+	uint8_t cmd[3] = {0};
+
+	cmd[0] = NANDFLASH_GET_FEATURES;
+	cmd[1] = NANDFLASH_STATUS_ADDR;
+	cmd[2] = *pStatus;
+
+	Nandflash_CS_High();
+	Nandflash_CS_Low();
+	SPI_Send_8bits(pNandflashCfg->spiNo, cmd, 3, SPI_TIMEOUT_DISABLE);
+	Nandflash_CS_High();
+}
+
+NANDFLASH_ECC_Type Nandflash_CheckBadBlock(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t blockNum, uint8_t *buff, uint32_t len)
+{
+	uint32_t pageNum = 0, pageAddr = 0;
+	NANDFLASH_ECC_Type ecc = 0;
+
+	pageNum = blockNum * NANDFLASH_PAGES_PER_BLOCK;
+
+	pageAddr = pageNum * NANDFLASH_PAGE_SIZE;
+
+	if (len){
+		//read to cache
+		ecc = Nandflash_PageReadToCache(pNandflashCfg, pageAddr);
+
+		/* read from cache */
+		Nandflash_ReadFromCache(pNandflashCfg, NANDFLASH_PAGE_SIZE, buff, len);
+	}
+
+	return ecc;
+}
+
+NANDFLASH_ECC_Type Nandflash_PageRead(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t addr, uint8_t *buff, uint32_t len)
+{
+	NANDFLASH_ECC_Type ecc = 0;
+	uint32_t pageAddr = addr & 0xFFFFF800;
+	uint32_t readLen = 0;
+	uint32_t pageOffset = addr - pageAddr;
+
+	if((pageOffset + len) <= NANDFLASH_PAGE_SIZE){
+		readLen = len;
+	}else{
+		readLen = NANDFLASH_PAGE_SIZE - pageOffset;
+	}
+
+	memset(buff, 0 ,len);
+
+	if(readLen){
+		/* read to cache */
+		ecc = Nandflash_PageReadToCache(pNandflashCfg, pageAddr);
+
+		/* read from cache */
+		Nandflash_ReadFromCache(pNandflashCfg, pageOffset, buff, readLen);
+	}
+
+	return ecc;
+}
+
+
+NANDFLASH_ECC_Type Nandflash_PagesRead(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t addr, uint8_t *buff, uint32_t len)
+{
+	NANDFLASH_ECC_Type ecc = 0;
+	uint32_t startPageNum = 0, endPageNum = 0, absolutePageNum = 0;
+	uint32_t readLen = 0,  pageOffset = 0, beginAddr = addr;
+
+	startPageNum = addr / NANDFLASH_PAGE_SIZE;
+	endPageNum = (addr + len - 1) / NANDFLASH_PAGE_SIZE;
+
+	memset(buff, 0 ,len);
+
+	if (len > 0){
+		for (absolutePageNum = startPageNum; absolutePageNum <= endPageNum; absolutePageNum ++){
+			pageOffset = addr % NANDFLASH_PAGE_SIZE;
+
+			if (absolutePageNum == startPageNum){
+				if (beginAddr + len >= NANDFLASH_PAGE_SIZE){
+					readLen = (startPageNum + 1) * NANDFLASH_PAGE_SIZE - beginAddr;
+				}else{
+					readLen = len;
+				}
+			}else if ((startPageNum < absolutePageNum) && (absolutePageNum < endPageNum)){
+				readLen = NANDFLASH_PAGE_SIZE;
+			}else if (absolutePageNum == endPageNum){
+				readLen = (beginAddr + len) - (endPageNum * NANDFLASH_PAGE_SIZE);
+			}
+
+			/* read to cache */
+			ecc = Nandflash_PageReadToCache(pNandflashCfg, absolutePageNum * NANDFLASH_PAGE_SIZE);
+			/* read from cache */
+			Nandflash_ReadFromCache(pNandflashCfg, pageOffset, buff, readLen);
+
+			addr = (absolutePageNum + 1) * NANDFLASH_PAGE_SIZE;
+			buff += readLen;
+		}
+	}
+
+	return ecc;
+}
+NANDFLASH_ECC_Type Nandflash_PageReadToCache(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t addr)
+{
+	uint8_t feature = 0;
+	uint8_t cmd[4] = {0};
+	uint8_t status = 0xff;
+	uint8_t pBlockLock = 0xff;
+	NANDFLASH_ECC_Type ecc = 0;
+	uint32_t blockNum = 0;
+	uint32_t pageNum = 0;
+	uint32_t absolutePageNum = 0;
+	uint16_t cmds = 0;
+	/* enable ECC */
+	Nandflash_Get_Feature(pNandflashCfg, &feature);
+	((NANDFLASH_FEATURE_Type *)(&feature))->ECC_EN = 1;
+	Nandflash_Set_Feature(pNandflashCfg, &feature);
+
+	absolutePageNum = addr / NANDFLASH_PAGE_SIZE;
+	blockNum = absolutePageNum / NANDFLASH_PAGES_PER_BLOCK;
+    pageNum = absolutePageNum % NANDFLASH_PAGES_PER_BLOCK;
+	/* page read to cache */
+	cmd[0] = NANDFLASH_PAGE_READ_TO_CACHE;
+	cmd[1] = NANDFLASH_DUMMY_BYTE;
+	cmds = (uint16_t)(blockNum << 6) | (uint16_t)pageNum;
+	cmd[2] = (uint8_t)(cmds >> 8);
+	cmd[3] = (uint8_t)(cmds >> 0);
+	Nandflash_CS_High();
+	Nandflash_CS_Low();
+	SPI_Send_8bits(pNandflashCfg->spiNo, cmd, 4, SPI_TIMEOUT_DISABLE);
+	Nandflash_CS_High();
+
+	/*check block lock status*/
+	Nandflash_Get_BlockLock(pNandflashCfg, &pBlockLock);
+	if (pBlockLock != 0){
+		// MSG_ERR("Get BlockLock in Nandflash PageRead To Cache and return %0x\r\n", pBlockLock);
+	}
+
+	BL702_Delay_MS(20);
+	/* Operation In Progress */
+	do{
+		Nandflash_Get_Status(pNandflashCfg, &status);
+	}while((((NANDFLASH_STATUS_Type *)(&status))->OIP));
+
+	/* get ecc */
+	Nandflash_Get_Status(pNandflashCfg, &status);
+	ecc = status;
+
+	return ecc;
+}
+
+void Nandflash_ReadFromCache(NANDFLASH_CFG_Type *pNandflashCfg, uint16_t offset, uint8_t *buff, uint32_t len)
+{
+	uint32_t readLen = len;
+	uint8_t cmd[4] = {0};
+	uint8_t pBlockLock = 0xff;
+
+	if(!buff){
+		return ;
+	}
+
+	if(readLen>NANDFLASH_PAGE_SIZE){
+		readLen = NANDFLASH_PAGE_SIZE;
+	}
+
+	/* read from cache */
+	cmd[0] = NANDFLASH_READ_FROM_CACHE;
+	cmd[1] = (uint8_t)((offset >> 8) & 0x0F);
+	cmd[2] = (uint8_t)((offset >> 0) & 0xFF);
+	cmd[3] = NANDFLASH_DUMMY_BYTE;
+
+	Nandflash_CS_High();
+	Nandflash_CS_Low();
+	SPI_Send_8bits(pNandflashCfg->spiNo, cmd, 4, SPI_TIMEOUT_DISABLE);
+	SPI_Recv_8bits(pNandflashCfg->spiNo, buff, readLen, SPI_TIMEOUT_DISABLE);
+	Nandflash_CS_High();
+
+	/*check block lock status*/
+	Nandflash_Get_BlockLock(pNandflashCfg, &pBlockLock);
+	if (pBlockLock != 0){
+		// MSG_ERR("Get BlockLock in Nandflash Read From Cache Erase and return %0x\r\n", pBlockLock);
+	}
+}
+
+void Nandflash_ReadID(NANDFLASH_CFG_Type *pNandflashCfg, uint8_t *pManufactureID, uint8_t *pDeviceID)
+{
+	uint8_t cmd[2] = {0};
+	uint8_t ack[2] = {0};
+
+	cmd[0] = NANDFLASH_READ_ID;
+	cmd[1] = NANDFLASH_DUMMY_BYTE;
+
+	Nandflash_CS_High();
+	Nandflash_CS_Low();
+	SPI_Send_8bits(pNandflashCfg->spiNo, cmd, 2, SPI_TIMEOUT_DISABLE);
+	SPI_Recv_8bits(pNandflashCfg->spiNo, ack, 2, SPI_TIMEOUT_DISABLE);
+	Nandflash_CS_High();
+
+	*pManufactureID = ack[0];
+	*pDeviceID = ack[1];
+}
+
+void Nandflash_PageProgram(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t addr, const uint8_t *buff, uint32_t len)
+{
+	uint32_t pageAddr = addr & 0xFFFFF800;
+	uint32_t writeLen = 0;
+	uint32_t pageOffset = addr - pageAddr;
+
+	if((pageOffset + len) <= NANDFLASH_PAGE_SIZE){
+		writeLen = len;
+	}else{
+		writeLen = NANDFLASH_PAGE_SIZE - pageOffset;
+	}
+
+
+	if(writeLen){
+		/* program load */
+		Nandflash_ProgramLoad(pNandflashCfg, pageOffset, buff, writeLen);
+
+		/* write enable */
+		Nandflash_WriteEnable(pNandflashCfg);
+
+		/* program execute */
+		Nandflash_ProgramExecute(pNandflashCfg, pageAddr);
+	}
+
+	return ;
+}
+
+
+void Nandflash_PagesProgram(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t addr, const uint8_t *buff, uint32_t len)
+{
+	int32_t startPageNum = 0, endPageNum = 0, absolutePageNum = 0;
+	uint32_t writeLen = 0, pageAddr = 0;
+	uint32_t pageOffset = 0, begin_addr =  addr;
+
+	startPageNum = addr / NANDFLASH_PAGE_SIZE;
+	endPageNum = (addr + len - 1) / NANDFLASH_PAGE_SIZE;
+
+	if (len > 0){
+		for (absolutePageNum = startPageNum; absolutePageNum <= endPageNum; absolutePageNum++){
+
+			pageOffset = 0;
+			pageAddr = absolutePageNum * NANDFLASH_PAGE_SIZE;
+
+			if (absolutePageNum == startPageNum){
+				if (begin_addr + len >= NANDFLASH_PAGE_SIZE){
+					writeLen = (startPageNum + 1) * NANDFLASH_PAGE_SIZE - begin_addr;
+				}else{
+					writeLen = len;
+				}
+				pageOffset = begin_addr % NANDFLASH_PAGE_SIZE;
+			}else if ((startPageNum < absolutePageNum) && (absolutePageNum < endPageNum)){
+				writeLen = NANDFLASH_PAGE_SIZE;
+				pageOffset = 0;
+			}else if (absolutePageNum == endPageNum){
+				writeLen = (begin_addr + len) - (endPageNum * NANDFLASH_PAGE_SIZE);
+				pageOffset = 0;
+			}
+
+			if(writeLen){
+				/* program load */
+				Nandflash_ProgramLoad(pNandflashCfg, pageOffset, buff, writeLen);
+
+				/* write enable */
+				Nandflash_WriteEnable(pNandflashCfg);
+
+				/* program execute */
+				Nandflash_ProgramExecute(pNandflashCfg, pageAddr);
+			}
+			buff += writeLen;
+		}
+	}
+}
+
+void Nandflash_ProgramLoad(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t pageOffset, const uint8_t *buff, uint32_t len)
+{
+	uint8_t cmd[3] = {0};
+	uint32_t writeLen = len;
+	uint8_t pBlockLock = 0xff;
+
+	if(!buff){
+		return ;
+	}
+
+	if(len > NANDFLASH_PAGE_SIZE){
+		writeLen = NANDFLASH_PAGE_SIZE;
+	}else{
+
+	}
+
+	cmd[0] = NANDFLASH_PROGRAM_LOAD;
+	cmd[1] = (uint8_t)((pageOffset >> 8) & 0x0F);
+	cmd[2] = (uint8_t)((pageOffset >> 0) & 0xFF);
+
+	Nandflash_CS_High();
+	Nandflash_CS_Low();
+	SPI_Send_8bits(pNandflashCfg->spiNo, cmd, 3, SPI_TIMEOUT_DISABLE);
+	SPI_Send_8bits(pNandflashCfg->spiNo, (uint8_t *)buff, writeLen, SPI_TIMEOUT_DISABLE);
+	Nandflash_CS_High();
+
+	/*check block lock status*/
+	Nandflash_Get_BlockLock(pNandflashCfg, &pBlockLock);
+	if (pBlockLock != 0){
+		// MSG_ERR("Get BlockLock in Nandflash Program Load and return %0x\r\n", pBlockLock);
+	}
+}
+
+void Nandflash_ProgramExecute(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t addr)
+{
+	uint8_t feature = 0;
+	uint8_t cmd[4] = {0};
+	uint8_t status = 0xff;
+	uint8_t pBlockLock = 0xff;
+	uint32_t absolutePageNum = 0;
+	uint16_t cmds = 0;
+	uint32_t blockNum = 0;
+	uint32_t pageNum = 0;
+	absolutePageNum = addr / NANDFLASH_PAGE_SIZE;
+	blockNum = absolutePageNum / NANDFLASH_PAGES_PER_BLOCK;
+    pageNum = absolutePageNum % NANDFLASH_PAGES_PER_BLOCK;
+
+	/* enable ECC */
+	Nandflash_Get_Feature(pNandflashCfg, &feature);
+	((NANDFLASH_FEATURE_Type *)(&feature))->ECC_EN = 1;
+	Nandflash_Set_Feature(pNandflashCfg, &feature);
+
+	/* program execute */
+	cmd[0] = NANDFLASH_PROGRAM_EXECUTE;
+	cmd[1] = NANDFLASH_DUMMY_BYTE;
+	cmds = (uint16_t)(blockNum << 6) | (uint16_t)pageNum;
+	cmd[2] = (uint8_t)(cmds >> 8);
+	cmd[3] = (uint8_t)(cmds >> 0);
+
+	Nandflash_CS_High();
+	Nandflash_CS_Low();
+	SPI_Send_8bits(pNandflashCfg->spiNo, cmd, 4, SPI_TIMEOUT_DISABLE);
+	Nandflash_CS_High();
+
+	/*check block lock status*/
+	Nandflash_Get_BlockLock(pNandflashCfg, &pBlockLock);
+	if (pBlockLock != 0){
+		// MSG_ERR("Get BlockLock in Nandflash Program Execute and return %0x\r\n", pBlockLock);
+	}
+
+	/* Operation In Progress */
+	do{
+		Nandflash_Get_Status(pNandflashCfg, &status);
+	}while((((NANDFLASH_STATUS_Type *)(&status))->OIP));
+}
+
+void Nandflash_InternalDataMove(NANDFLASH_CFG_Type *pNandflashCfg)
+{
+
+}
+
+void Nandflash_ProgramLoadRandomData(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t addr, uint8_t *buff, uint32_t len)
+{
+
+}
+
+static void Nandflash_Erase(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t blockNum)
+{
+	uint8_t cmd[4] = {0};
+	uint16_t cmds = 0;
+	uint8_t pBlockLock = 0xff;
+
+	/* block erase */
+	cmd[0] = NANDFLASH_BLOCK_ERASE;
+	cmd[1] = NANDFLASH_DUMMY_BYTE;
+	cmds = (uint16_t)(blockNum << 6);
+	cmd[2] = (uint8_t)(cmds >> 8);
+	cmd[3] = (uint8_t)(cmds >> 0);
+
+	Nandflash_CS_High();
+	Nandflash_CS_Low();
+	SPI_Send_8bits(pNandflashCfg->spiNo, cmd, 4, SPI_TIMEOUT_DISABLE);
+	Nandflash_CS_High();
+
+	/*check block lock status*/
+	Nandflash_Get_BlockLock(pNandflashCfg, &pBlockLock);
+	if (pBlockLock != 0){
+		// MSG_ERR("Get BlockLock in Nandflash Erase and return %0x\r\n", pBlockLock);
+	}
+}
+
+void Nandflash_BlockErase(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t addr)
+{
+	uint8_t status = 0xff;
+	uint32_t blockNum = 0;
+	blockNum = addr / NANDFLASH_BLOCK_SIZE;
+
+	Nandflash_WriteEnable(pNandflashCfg);
+	Nandflash_Erase(pNandflashCfg, blockNum);
+
+	/* Operation In Progress */
+	do{
+		Nandflash_Get_Status(pNandflashCfg, &status);
+	}while((((NANDFLASH_STATUS_Type *)(&status))->OIP));
+}
+
+void Nandflash_Reset(NANDFLASH_CFG_Type *pNandflashCfg)
+{
+
+}
+
+
+void Nandflash_WriteUnprotect(NANDFLASH_CFG_Type *pNandflashCfg)
+{
+
+}
+
+NANDFLASH_ECC_Type Nandflash_Check_ECC_Status(NANDFLASH_CFG_Type *pNandflashCfg)
+{
+	return NO_BIT_ERROR;
+}
+
+
+
+int Nandflash_Disk_Status(void)
+{
+	return 0;
+}
+
+int Nandflash_Disk_Initialize(void)
+{
+	return 0;
+}
+
+int Nandflash_Disk_Read(BYTE *buff, LBA_t sector, UINT count)
+{
+	//512 bytes in a sector
+	uint32_t startAddr = sector * DISK_SECTOR_SIZE;
+	uint32_t len = count * DISK_SECTOR_SIZE;
+	NANDFLASH_ECC_Type ecc = 0;
+
+	if (len > 0){
+		ecc = Nandflash_PagesRead(&nfCfg, startAddr, buff, len);
+	}
+	return 0;
+}
+
+void Nandflash_PageReadToPsram(uint32_t addr, uint32_t len)
+{
+	uint32_t startPageNum = 0, endPageNum = 0, absolutePageNum = 0;
+	uint32_t beginAddr = addr, psramWriteOffsite = 0;
+	uint8_t readBuff[NANDFLASH_PAGE_SIZE];
+
+	startPageNum = addr / NANDFLASH_PAGE_SIZE;
+	endPageNum = (addr + len - 1) / NANDFLASH_PAGE_SIZE;
+
+	if (len > 0){
+		for (absolutePageNum = startPageNum; absolutePageNum <= endPageNum; absolutePageNum ++){
+			memset(readBuff, 0 ,sizeof(readBuff));
+
+			Nandflash_PageRead(&nfCfg, beginAddr, readBuff, NANDFLASH_PAGE_SIZE);
+			Nandflash_Psram_Write(readBuff, NANDFLASH_PAGE_SIZE, psramWriteOffsite);
+
+			beginAddr = (absolutePageNum + 1) * NANDFLASH_PAGE_SIZE;
+			psramWriteOffsite += NANDFLASH_PAGE_SIZE;
+		}
+	}
+}
+
+static void Nandflash_PageWriteToPsram(const uint8_t *buff, uint32_t psramWriteOffsite, uint32_t len)
+{
+	if (len > 0){
+		return Nandflash_Psram_Write((uint8_t *)buff, len, psramWriteOffsite);
+	}
+}
+
+static void Nandflash_PageProgramFromPsram(NANDFLASH_CFG_Type *pNandflashCfg, uint32_t blockNum)
+{
+	uint8_t psramReadBuf[NANDFLASH_PAGE_SIZE];
+	uint32_t startPageNum = 0, endPageNum = 0, absolutePageNum = 0;
+	uint32_t psramReadOffsite = 0;
+
+	startPageNum = blockNum * NANDFLASH_PAGES_PER_BLOCK;
+	endPageNum = (blockNum + 1) * NANDFLASH_PAGES_PER_BLOCK - 1;
+
+	for (absolutePageNum = startPageNum; absolutePageNum <= endPageNum; absolutePageNum++){
+		memset(psramReadBuf, 0, NANDFLASH_PAGE_SIZE);
+		Nandflash_Psram_Read(psramReadBuf, NANDFLASH_PAGE_SIZE, psramReadOffsite);
+		Nandflash_PageProgram(pNandflashCfg, absolutePageNum * NANDFLASH_PAGE_SIZE, psramReadBuf, NANDFLASH_PAGE_SIZE);
+		psramReadOffsite += NANDFLASH_PAGE_SIZE;
+	}
+}
+
+int Nandflash_Disk_Write(const BYTE *buff, LBA_t sector, UINT count)
+{
+	uint32_t addr = sector * DISK_SECTOR_SIZE;
+	uint32_t len = count * DISK_SECTOR_SIZE;
+	uint32_t startBlockNum = 0, endBlockNum = 0, absoluteBlockNum = 0;
+	uint32_t writeLen = 0, beginAddr = addr;
+
+	startBlockNum = addr / NANDFLASH_BLOCK_SIZE;
+	endBlockNum = (addr + len - 1) / NANDFLASH_BLOCK_SIZE;
+
+	if (len > 0){
+		Nandflash_Psram_Cfg();
+		for (absoluteBlockNum = startBlockNum; absoluteBlockNum <= endBlockNum; absoluteBlockNum ++){
+			if (absoluteBlockNum == startBlockNum){
+				if (addr + len >= NANDFLASH_BLOCK_SIZE){
+					writeLen = (absoluteBlockNum + 1) * NANDFLASH_BLOCK_SIZE - addr;
+				}else{
+					writeLen = len;
+				}
+			}else if ((startBlockNum < absoluteBlockNum) && (absoluteBlockNum < endBlockNum)){
+				writeLen = NANDFLASH_BLOCK_SIZE;
+			}else if (absoluteBlockNum == endBlockNum){
+				writeLen = (addr + len) - (endBlockNum * NANDFLASH_BLOCK_SIZE);
+			}
+
+			/*read data from block to psram*/
+			Nandflash_PageReadToPsram(absoluteBlockNum * NANDFLASH_BLOCK_SIZE, NANDFLASH_BLOCK_SIZE);
+			/*update program data to psram*/
+			Nandflash_PageWriteToPsram(buff, beginAddr % NANDFLASH_BLOCK_SIZE, writeLen);
+			/*erase block*/
+			Nandflash_BlockErase(&nfCfg, absoluteBlockNum * NANDFLASH_BLOCK_SIZE);
+			/*program data from psram to block*/
+			Nandflash_PageProgramFromPsram(&nfCfg, absoluteBlockNum);
+
+			buff += writeLen;
+			beginAddr = (absoluteBlockNum + 1) * NANDFLASH_BLOCK_SIZE;
+		}
+	}
+
+	return 0;
+}
+
+int Nandflash_Disk_Ioctl(BYTE cmd, void *buff)
+{
+	return 0;
+}
+
+void Nandflash_Init()
+{
+	Nandflash_Gpio_Init(SPI_PIN_CLK, SPI_PIN_MISO, SPI_PIN_MOSI);
+	Nandflash_Clock_Init(ENABLE, 0x1F);
+	Nandflash_SPI_Init(&nfCfg);
+}
+
+
+
+
+
+
+
+
+
diff --git a/drivers/bl702_driver/std_drv/src/bl702_spi.c b/drivers/bl702_driver/std_drv/src/bl702_spi.c
new file mode 100644
index 00000000..a3e5b27b
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_spi.c
@@ -0,0 +1,1713 @@
+/**
+  ******************************************************************************
+  * @file    bl702_spi.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_spi.h"
+#include "bl702_glb.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  SPI
+ *  @{
+ */
+
+/** @defgroup  SPI_Private_Macros
+ *  @{
+ */
+#define SPI_TX_TIMEOUT_COUNT          (160*1000)
+#define SPI_RX_TIMEOUT_COUNT          (160*1000)
+
+/*@} end of group SPI_Private_Macros */
+
+/** @defgroup  SPI_Private_Types
+ *  @{
+ */
+
+/*@} end of group SPI_Private_Types */
+
+/** @defgroup  SPI_Private_Variables
+ *  @{
+ */
+static const uint32_t spiAddr[SPI_ID_MAX] = {SPI_BASE};
+static intCallback_Type * spiIntCbfArra[SPI_ID_MAX][SPI_INT_ALL]= {
+    {NULL}
+};
+
+
+/*@} end of group SPI_Private_Variables */
+
+/** @defgroup  SPI_Global_Variables
+ *  @{
+ */
+
+/*@} end of group SPI_Global_Variables */
+
+/** @defgroup  SPI_Private_Fun_Declaration
+ *  @{
+ */
+#ifndef BFLB_USE_HAL_DRIVER
+static void SPI_IntHandler(SPI_ID_Type spiNo);
+#endif
+
+/*@} end of group SPI_Private_Fun_Declaration */
+
+/** @defgroup  SPI_Private_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  SPI interrupt common handler function
+ *
+ * @param  spiNo: SPI ID type
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+static void SPI_IntHandler(SPI_ID_Type spiNo)
+{
+    uint32_t tmpVal;
+    uint32_t SPIx = spiAddr[spiNo];
+    
+    CHECK_PARAM(IS_SPI_ID_TYPE(spiNo));
+    
+    tmpVal = BL_RD_REG(SPIx,SPI_INT_STS);
+    
+    /* Transfer end interrupt,shared by both master and slave mode */
+    if(BL_IS_REG_BIT_SET(tmpVal,SPI_END_INT) && !BL_IS_REG_BIT_SET(tmpVal,SPI_CR_SPI_END_MASK)){
+        BL_WR_REG(SPIx,SPI_INT_STS,BL_SET_REG_BIT(tmpVal,SPI_CR_SPI_END_CLR));
+        if(spiIntCbfArra[spiNo][SPI_INT_END] != NULL){
+            spiIntCbfArra[spiNo][SPI_INT_END]();
+        }
+    }
+    /* TX fifo ready interrupt(fifo count > fifo threshold) */
+    if(BL_IS_REG_BIT_SET(tmpVal,SPI_TXF_INT) && !BL_IS_REG_BIT_SET(tmpVal,SPI_CR_SPI_TXF_MASK)){
+        if(spiIntCbfArra[spiNo][SPI_INT_TX_FIFO_REQ] != NULL){
+            spiIntCbfArra[spiNo][SPI_INT_TX_FIFO_REQ]();
+        }
+    }
+    /*  RX fifo ready interrupt(fifo count > fifo threshold) */
+    if(BL_IS_REG_BIT_SET(tmpVal,SPI_RXF_INT) && !BL_IS_REG_BIT_SET(tmpVal,SPI_CR_SPI_RXF_MASK)){
+        if(spiIntCbfArra[spiNo][SPI_INT_RX_FIFO_REQ] != NULL){
+            spiIntCbfArra[spiNo][SPI_INT_RX_FIFO_REQ]();
+        }
+    }
+    /* Slave mode transfer time-out interrupt,triggered when bus is idle for the given value */
+    if(BL_IS_REG_BIT_SET(tmpVal,SPI_STO_INT) && !BL_IS_REG_BIT_SET(tmpVal,SPI_CR_SPI_STO_MASK)){
+        BL_WR_REG(SPIx,SPI_INT_STS,BL_SET_REG_BIT(tmpVal,SPI_CR_SPI_STO_CLR));
+        if(spiIntCbfArra[spiNo][SPI_INT_SLAVE_TIMEOUT] != NULL){
+            spiIntCbfArra[spiNo][SPI_INT_SLAVE_TIMEOUT]();
+        }
+    }
+    /* Slave mode tx underrun error interrupt,trigged when tx is not ready during transfer */
+    if(BL_IS_REG_BIT_SET(tmpVal,SPI_TXU_INT) && !BL_IS_REG_BIT_SET(tmpVal,SPI_CR_SPI_TXU_MASK)){
+        BL_WR_REG(SPIx,SPI_INT_STS,BL_SET_REG_BIT(tmpVal,SPI_CR_SPI_TXU_CLR));
+        if(spiIntCbfArra[spiNo][SPI_INT_SLAVE_UNDERRUN] != NULL){
+            spiIntCbfArra[spiNo][SPI_INT_SLAVE_UNDERRUN]();
+        }
+    }
+    /* TX/RX fifo overflow/underflow interrupt */
+    if(BL_IS_REG_BIT_SET(tmpVal,SPI_FER_INT) && !BL_IS_REG_BIT_SET(tmpVal,SPI_CR_SPI_FER_MASK)){
+        if(spiIntCbfArra[spiNo][SPI_INT_FIFO_ERROR] != NULL){
+            spiIntCbfArra[spiNo][SPI_INT_FIFO_ERROR]();
+        }
+    }
+}
+#endif
+
+
+/*@} end of group SPI_Private_Functions */
+
+/** @defgroup  SPI_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  SPI initialization function
+ *
+ * @param  spiNo: SPI ID type
+ * @param  spiCfg: SPI configuration structure pointer
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type SPI_Init(SPI_ID_Type spiNo,SPI_CFG_Type* spiCfg)
+{
+    uint32_t tmpVal;
+    uint32_t SPIx = spiAddr[spiNo];
+    
+    CHECK_PARAM(IS_SPI_ID_TYPE(spiNo));
+    CHECK_PARAM(IS_SPI_WORK_MODE_TYPE(spiCfg->mod));
+    CHECK_PARAM(IS_SPI_BYTE_INVERSE_TYPE(spiCfg->byteSequence));
+    CHECK_PARAM(IS_SPI_BIT_INVERSE_TYPE(spiCfg->bitSequence));
+    CHECK_PARAM(IS_SPI_CLK_PHASE_INVERSE_TYPE(spiCfg->clkPhaseInv));
+    CHECK_PARAM(IS_SPI_CLK_POLARITY_TYPE(spiCfg->clkPolarity));
+    
+    /* Disable clock gate */
+    GLB_AHB_Slave1_Clock_Gate(DISABLE,BL_AHB_SLAVE1_SPI);
+    
+    /* spi config */
+    tmpVal = BL_RD_REG(SPIx,SPI_CONFIG);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_CR_SPI_DEG_EN,spiCfg->deglitchEnable);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_CR_SPI_M_CONT_EN,spiCfg->continuousEnable);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_CR_SPI_BYTE_INV,spiCfg->byteSequence);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_CR_SPI_BIT_INV,spiCfg->bitSequence);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_CR_SPI_SCLK_PH,(spiCfg->clkPhaseInv+1)&1);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_CR_SPI_SCLK_POL,spiCfg->clkPolarity);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_CR_SPI_FRAME_SIZE,spiCfg->frameSize);
+    BL_WR_REG(SPIx,SPI_CONFIG,tmpVal);
+
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(SPI_IRQn,SPI_IRQHandler);
+#endif
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  SPI set default value of all registers function
+ *
+ * @param  spiNo: SPI ID type
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type SPI_DeInit(SPI_ID_Type spiNo)
+{
+    /* Check the parameters */
+    CHECK_PARAM(IS_SPI_ID_TYPE(spiNo));
+    
+    if(SPI_ID_0 == spiNo){
+        GLB_AHB_Slave1_Reset(BL_AHB_SLAVE1_SPI);
+    }
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Length of data phase1/0,start/stop condition and interval between frame initialization
+ *         function
+ *
+ * @param  spiNo: SPI ID type
+ * @param  clockCfg: Clock configuration structure pointer
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type SPI_ClockConfig(SPI_ID_Type spiNo,SPI_ClockCfg_Type *clockCfg)
+{
+    uint32_t tmpVal;
+    uint32_t SPIx = spiAddr[spiNo];
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_SPI_ID_TYPE(spiNo));
+    
+    /* Configure length of data phase1/0 and start/stop condition */
+    tmpVal = BL_RD_REG(SPIx,SPI_PRD_0);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_CR_SPI_PRD_S,clockCfg->startLen-1);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_CR_SPI_PRD_P,clockCfg->stopLen-1);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_CR_SPI_PRD_D_PH_0,clockCfg->dataPhase0Len-1);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_CR_SPI_PRD_D_PH_1,clockCfg->dataPhase1Len-1);
+    BL_WR_REG(SPIx,SPI_PRD_0,tmpVal);
+    
+    /* Configure length of interval between frame */
+    tmpVal = BL_RD_REG(SPIx,SPI_PRD_1);
+    BL_WR_REG(SPIx,SPI_PRD_1,BL_SET_REG_BITS_VAL(tmpVal,SPI_CR_SPI_PRD_I,clockCfg->intervalLen-1));
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  SPI configure fifo function
+ *
+ * @param  spiNo: SPI ID type
+ * @param  fifoCfg: FIFO configuration structure pointer
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type SPI_FifoConfig(SPI_ID_Type spiNo,SPI_FifoCfg_Type *fifoCfg)
+{
+    uint32_t tmpVal;
+    uint32_t SPIx = spiAddr[spiNo];
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_SPI_ID_TYPE(spiNo));
+    
+    /* Set fifo threshold value */
+    tmpVal = BL_RD_REG(SPIx,SPI_FIFO_CONFIG_1);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_TX_FIFO_TH,fifoCfg->txFifoThreshold-1);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_RX_FIFO_TH,fifoCfg->rxFifoThreshold-1);
+    BL_WR_REG(SPIx,SPI_FIFO_CONFIG_1,tmpVal);
+    
+    /* Enable or disable dma function */
+    tmpVal = BL_RD_REG(SPIx,SPI_FIFO_CONFIG_0);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_DMA_TX_EN,fifoCfg->txFifoDmaEnable);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_DMA_RX_EN,fifoCfg->rxFifoDmaEnable);
+    BL_WR_REG(SPIx,SPI_FIFO_CONFIG_0,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Set SPI SCK Clcok
+ *
+ * @param  spiNo: SPI ID type
+ * @param  clk: Clk
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type SPI_SetClock(SPI_ID_Type spiNo,uint32_t clk)
+{
+    uint32_t glb_div = 1,spi_div = 1;
+    uint32_t tmpVal;
+    uint32_t SPIx = spiAddr[spiNo];
+
+    if(clk < 4395){
+        clk = 4395;
+    }
+
+    if(clk > 36000000){
+        clk = 36000000;        
+    }
+
+    if(clk>140625){
+        glb_div = 1;
+        spi_div = 36000000 / clk;
+    }else{
+        spi_div = 256;
+        glb_div = clk >>8;
+    }
+
+    /* Configure length of data phase1/0 and start/stop condition */
+    tmpVal = BL_RD_REG(SPIx,SPI_PRD_0);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_CR_SPI_PRD_S,spi_div-1);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_CR_SPI_PRD_P,spi_div-1);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_CR_SPI_PRD_D_PH_0,spi_div-1);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_CR_SPI_PRD_D_PH_1,spi_div-1);
+    BL_WR_REG(SPIx,SPI_PRD_0,tmpVal);
+    
+    tmpVal = BL_RD_REG(SPIx,SPI_PRD_1);
+    BL_WR_REG(SPIx,SPI_PRD_1,BL_SET_REG_BITS_VAL(tmpVal,SPI_CR_SPI_PRD_I,spi_div-1));
+
+    GLB_Set_SPI_CLK(ENABLE,glb_div-1);
+
+    return SUCCESS;
+}
+
+
+/****************************************************************************//**
+ * @brief  Enable spi transfer
+ *
+ * @param  spiNo: SPI ID type
+ * @param  modeType: Master or slave mode select
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type SPI_Enable(SPI_ID_Type spiNo,SPI_WORK_MODE_Type modeType)
+{
+    uint32_t tmpVal;
+    uint32_t SPIx = spiAddr[spiNo];
+    
+    CHECK_PARAM(IS_SPI_ID_TYPE(spiNo));
+    CHECK_PARAM(IS_SPI_WORK_MODE_TYPE(modeType));
+    
+    tmpVal = BL_RD_REG(SPIx,SPI_CONFIG);
+    if(modeType != SPI_WORK_MODE_SLAVE){
+        /* master mode */
+        tmpVal = BL_CLR_REG_BIT(tmpVal,SPI_CR_SPI_S_EN);
+        tmpVal = BL_SET_REG_BIT(tmpVal,SPI_CR_SPI_M_EN);
+    }else{
+        /* slave mode */
+        tmpVal = BL_CLR_REG_BIT(tmpVal,SPI_CR_SPI_M_EN);
+        tmpVal = BL_SET_REG_BIT(tmpVal,SPI_CR_SPI_S_EN);
+    }
+    BL_WR_REG(SPIx,SPI_CONFIG,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Disable spi transfer
+ *
+ * @param  spiNo: SPI ID type
+ * @param  modeType: Master or slave mode select
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type SPI_Disable(SPI_ID_Type spiNo,SPI_WORK_MODE_Type modeType)
+{
+    uint32_t tmpVal;
+    uint32_t SPIx = spiAddr[spiNo];
+    
+    CHECK_PARAM(IS_SPI_ID_TYPE(spiNo));
+    CHECK_PARAM(IS_SPI_WORK_MODE_TYPE(modeType));
+    
+    /* close master and slave */
+    tmpVal = BL_RD_REG(SPIx,SPI_CONFIG);
+    tmpVal = BL_CLR_REG_BIT(tmpVal,SPI_CR_SPI_M_EN);
+    tmpVal = BL_CLR_REG_BIT(tmpVal,SPI_CR_SPI_S_EN);
+    BL_WR_REG(SPIx,SPI_CONFIG,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Set time-out value to trigger interrupt when spi bus is idle for the given value
+ *
+ * @param  spiNo: SPI ID type
+ * @param  value: Time value
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type SPI_SetTimeOutValue(SPI_ID_Type spiNo,uint16_t value)
+{
+    uint32_t tmpVal;
+    uint32_t SPIx = spiAddr[spiNo];
+    
+    CHECK_PARAM(IS_SPI_ID_TYPE(spiNo));
+    
+    /* Set time-out value */
+    tmpVal = BL_RD_REG(SPIx,SPI_STO_VALUE);
+    BL_WR_REG(SPIx,SPI_STO_VALUE,BL_SET_REG_BITS_VAL(tmpVal,SPI_CR_SPI_STO_VALUE,value-1));
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Set de-glitch function cycle count value
+ *
+ * @param  spiNo: SPI ID type
+ * @param  cnt: De-glitch function cycle count
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type SPI_SetDeglitchCount(SPI_ID_Type spiNo,uint8_t cnt)
+{
+    uint32_t tmpVal;
+    uint32_t SPIx = spiAddr[spiNo];
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_SPI_ID_TYPE(spiNo));
+    
+    /* Set count value */
+    tmpVal = BL_RD_REG(SPIx,SPI_CONFIG);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,SPI_CR_SPI_DEG_CNT,cnt-1);
+    BL_WR_REG(SPIx,SPI_CONFIG,tmpVal);
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Enable rx data ignore function and set start/stop point
+ *
+ * @param  spiNo: SPI ID type
+ * @param  startPoint: Start point
+ * @param  stopPoint: Stop point
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type SPI_RxIgnoreEnable(SPI_ID_Type spiNo,uint8_t startPoint,uint8_t stopPoint)
+{
+    uint32_t tmpVal;
+    uint32_t SPIx = spiAddr[spiNo];
+    
+    /* Check the parameters */
+    CHECK_PARAM(IS_SPI_ID_TYPE(spiNo));
+    
+    /* Enable rx ignore function */
+    tmpVal = BL_RD_REG(SPIx,SPI_CONFIG);
+    BL_WR_REG(SPIx,SPI_CONFIG,BL_SET_REG_BIT(tmpVal,SPI_CR_SPI_RXD_IGNR_EN));
+    
+    /* Set start and stop point */
+    tmpVal = startPoint<
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_timer.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  TIMER
+ *  @{
+ */
+
+/** @defgroup  TIMER_Private_Macros
+ *  @{
+ */
+#define TIMER_MAX_MATCH      3
+
+/*@} end of group TIMER_Private_Macros */
+
+/** @defgroup  TIMER_Private_Types
+ *  @{
+ */
+
+/*@} end of group TIMER_Private_Types */
+
+/** @defgroup  TIMER_Private_Variables
+ *  @{
+ */
+intCallback_Type * timerIntCbfArra[3][TIMER_INT_ALL]= {
+{NULL, NULL, NULL},
+{NULL, NULL, NULL},
+{NULL, NULL, NULL}
+};
+
+/*@} end of group TIMER_Private_Variables */
+
+/** @defgroup  TIMER_Global_Variables
+ *  @{
+ */
+
+/*@} end of group TIMER_Global_Variables */
+
+/** @defgroup  TIMER_Private_Fun_Declaration
+ *  @{
+ */
+#ifndef BFLB_USE_HAL_DRIVER
+static void TIMER_IntHandler(IRQn_Type irqNo, TIMER_Chan_Type timerCh);
+#endif
+
+/*@} end of group TIMER_Private_Fun_Declaration */
+
+/** @defgroup  TIMER_Private_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  TIMER interrupt common handler function
+ *
+ * @param  irqNo: Interrupt ID type
+ * @param  timerCh: TIMER channel type
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void TIMER_IntHandler(IRQn_Type irqNo, TIMER_Chan_Type timerCh)
+{
+    uint32_t intId;
+    uint32_t tmpVal;
+    uint32_t tmpAddr;
+
+    intId=BL_RD_WORD(TIMER_BASE+TIMER_TMSR2_OFFSET+4*timerCh);
+    tmpAddr=TIMER_BASE+TIMER_TICR2_OFFSET+4*timerCh;
+    tmpVal=BL_RD_WORD(tmpAddr);
+
+    /* Comparator 0 match interrupt */
+    if( BL_IS_REG_BIT_SET(intId,TIMER_TMSR_0) ){
+        BL_WR_WORD(tmpAddr,BL_SET_REG_BIT(tmpVal,TIMER_TCLR_0));
+        if(timerIntCbfArra[irqNo-TIMER_CH0_IRQn][TIMER_INT_COMP_0] != NULL){
+            /* Call the callback function */
+            timerIntCbfArra[irqNo-TIMER_CH0_IRQn][TIMER_INT_COMP_0]();
+        }
+    }
+
+    /* Comparator 1 match interrupt */
+    if( BL_IS_REG_BIT_SET(intId,TIMER_TMSR_1) ){
+        BL_WR_WORD(tmpAddr,BL_SET_REG_BIT(tmpVal,TIMER_TCLR_1));
+        if(timerIntCbfArra[irqNo-TIMER_CH0_IRQn][TIMER_INT_COMP_1] != NULL){
+            /* Call the callback function */
+            timerIntCbfArra[irqNo-TIMER_CH0_IRQn][TIMER_INT_COMP_1]();
+        }
+    }
+
+    /* Comparator 2 match interrupt */
+    if( BL_IS_REG_BIT_SET(intId,TIMER_TMSR_2) ){
+        BL_WR_WORD(tmpAddr,BL_SET_REG_BIT(tmpVal,TIMER_TCLR_2));
+        if(timerIntCbfArra[irqNo-TIMER_CH0_IRQn][TIMER_INT_COMP_2] != NULL){
+            /* Call the callback function */
+            timerIntCbfArra[irqNo-TIMER_CH0_IRQn][TIMER_INT_COMP_2]();
+        }
+    }
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Get the specified channel and match comparator value
+ *
+ * @param  timerCh: TIMER channel type
+ * @param  cmpNo: TIMER comparator ID type
+ *
+ * @return Match comapre register value
+ *
+*******************************************************************************/
+uint32_t TIMER_GetCompValue(TIMER_Chan_Type timerCh, TIMER_Comp_ID_Type cmpNo)
+{
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_TIMER_CHAN_TYPE(timerCh));
+    CHECK_PARAM(IS_TIMER_COMP_ID_TYPE(cmpNo));
+
+    tmpVal=BL_RD_WORD(TIMER_BASE+TIMER_TMR2_0_OFFSET+4*(TIMER_MAX_MATCH*timerCh+cmpNo));
+    return tmpVal;
+}
+
+/****************************************************************************//**
+ * @brief  TIMER set specified channel and comparator compare value
+ *
+ * @param  timerCh: TIMER channel type
+ * @param  cmpNo: TIMER comparator ID type
+ * @param  val: TIMER match comapre register value
+ *
+ * @return None
+ *
+*******************************************************************************/
+void TIMER_SetCompValue(TIMER_Chan_Type timerCh, TIMER_Comp_ID_Type cmpNo, uint32_t val)
+{
+    /* Check the parameters */
+    CHECK_PARAM(IS_TIMER_CHAN_TYPE(timerCh));
+    CHECK_PARAM(IS_TIMER_COMP_ID_TYPE(cmpNo));
+
+    BL_WR_WORD(TIMER_BASE+TIMER_TMR2_0_OFFSET+4*(TIMER_MAX_MATCH*timerCh+cmpNo),val);
+}
+
+/****************************************************************************//**
+ * @brief  TIMER get the specified channel count value
+ *
+ * @param  timerCh: TIMER channel type
+ *
+ * @return TIMER count register value
+ *
+*******************************************************************************/
+uint32_t TIMER_GetCounterValue(TIMER_Chan_Type timerCh)
+{
+    uint32_t tmpVal;
+    uint32_t tmpAddr;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_TIMER_CHAN_TYPE(timerCh));
+
+    /* TO avoid risk of reading, don't read TCVWR directly*/
+    /* request for read*/
+    tmpAddr=TIMER_BASE+TIMER_TCVWR2_OFFSET+4*timerCh;
+    BL_WR_WORD(tmpAddr,1);
+
+    /* Need wait */
+    tmpVal=BL_RD_WORD(tmpAddr);
+    tmpVal=BL_RD_WORD(tmpAddr);
+    tmpVal=BL_RD_WORD(tmpAddr);
+
+    return tmpVal;
+}
+
+/****************************************************************************//**
+ * @brief  TIMER get specified channel and comparator match status
+ *
+ * @param  timerCh: TIMER channel type
+ * @param  cmpNo: TIMER comparator ID type
+ *
+ * @return SET or RESET
+ *
+*******************************************************************************/
+BL_Sts_Type TIMER_GetMatchStatus(TIMER_Chan_Type timerCh, TIMER_Comp_ID_Type cmpNo)
+{
+    uint32_t tmpVal;
+    BL_Sts_Type bitStatus=RESET;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_TIMER_CHAN_TYPE(timerCh));
+    CHECK_PARAM(IS_TIMER_COMP_ID_TYPE(cmpNo));
+
+    tmpVal=BL_RD_WORD(TIMER_BASE+TIMER_TMSR2_OFFSET+4*timerCh);
+    switch(cmpNo)
+    {
+        case TIMER_COMP_ID_0:
+            bitStatus = BL_IS_REG_BIT_SET(tmpVal,TIMER_TMSR_0) ? SET : RESET;
+            break;
+        case TIMER_COMP_ID_1:
+            bitStatus = BL_IS_REG_BIT_SET(tmpVal,TIMER_TMSR_1) ? SET : RESET;
+            break;
+        case TIMER_COMP_ID_2:
+            bitStatus = BL_IS_REG_BIT_SET(tmpVal,TIMER_TMSR_2) ? SET : RESET;
+            break;
+        default:
+            break;
+    }
+    return bitStatus;
+}
+
+/****************************************************************************//**
+ * @brief  TIMER get specified channel preload value
+ *
+ * @param  timerCh: TIMER channel type
+ *
+ * @return Preload register value
+ *
+*******************************************************************************/
+uint32_t TIMER_GetPreloadValue(TIMER_Chan_Type timerCh)
+{
+    /* Check the parameters */
+    CHECK_PARAM(IS_TIMER_CHAN_TYPE(timerCh));
+
+    return BL_RD_WORD(TIMER_BASE+TIMER_TPLVR2_OFFSET+4*timerCh);
+}
+
+/****************************************************************************//**
+ * @brief  TIMER set preload register low 32bits value
+ *
+ * @param  timerCh: TIMER channel type
+ * @param  val: Preload register low 32bits value
+ *
+ * @return None
+ *
+*******************************************************************************/
+void TIMER_SetPreloadValue(TIMER_Chan_Type timerCh, uint32_t val)
+{
+    /* Check the parameters */
+    CHECK_PARAM(IS_TIMER_CHAN_TYPE(timerCh));
+
+    BL_WR_WORD(TIMER_BASE+TIMER_TPLVR2_OFFSET+4*timerCh,val);
+}
+
+/****************************************************************************//**
+ * @brief  TIMER set preload trigger source,COMP0,COMP1,COMP2 or None
+ *
+ * @param  timerCh: TIMER channel type
+ * @param  plSrc: TIMER preload source type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void TIMER_SetPreloadTrigSrc(TIMER_Chan_Type timerCh, TIMER_PreLoad_Trig_Type plSrc)
+{
+    /* Check the parameters */
+    CHECK_PARAM(IS_TIMER_CHAN_TYPE(timerCh));
+    CHECK_PARAM(IS_TIMER_PRELOAD_TRIG_TYPE(plSrc));
+
+    BL_WR_WORD(TIMER_BASE+TIMER_TPLCR2_OFFSET+4*timerCh,plSrc);
+}
+
+/****************************************************************************//**
+ * @brief  TIMER set count mode:preload or free run
+ *
+ * @param  timerCh: TIMER channel type
+ * @param  countMode: TIMER count mode: TIMER_COUNT_PRELOAD or TIMER_COUNT_FREERUN
+ *
+ * @return None
+ *
+*******************************************************************************/
+void TIMER_SetCountMode(TIMER_Chan_Type timerCh, TIMER_CountMode_Type countMode)
+{  
+    uint32_t tmpval;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_TIMER_CHAN_TYPE(timerCh));
+    CHECK_PARAM(IS_TIMER_COUNTMODE_TYPE(countMode));
+
+    tmpval=BL_RD_WORD(TIMER_BASE+TIMER_TCMR_OFFSET);
+    tmpval &= (~(1<<(timerCh+1)));
+    tmpval |= (countMode<<(timerCh+1));
+
+    BL_WR_WORD(TIMER_BASE+TIMER_TCMR_OFFSET,tmpval);
+}
+
+/****************************************************************************//**
+ * @brief  TIMER clear interrupt status
+ *
+ * @param  timerCh: TIMER channel type
+ * @param  cmpNo: TIMER macth comparator ID type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void TIMER_ClearIntStatus(TIMER_Chan_Type timerCh, TIMER_Comp_ID_Type cmpNo)
+{
+    uint32_t tmpAddr;
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_TIMER_CHAN_TYPE(timerCh));
+    CHECK_PARAM(IS_TIMER_COMP_ID_TYPE(cmpNo));
+
+    tmpAddr=TIMER_BASE+TIMER_TICR2_OFFSET+4*timerCh;
+
+    tmpVal=BL_RD_WORD(tmpAddr);
+    tmpVal |=(1<timerCh;
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_TIMER_CLKSRC_TYPE(timerCfg->clkSrc));
+    CHECK_PARAM(IS_TIMER_CHAN_TYPE(timerCfg->timerCh));
+    CHECK_PARAM(IS_TIMER_PRELOAD_TRIG_TYPE(timerCfg->plTrigSrc));
+    CHECK_PARAM(IS_TIMER_COUNTMODE_TYPE(timerCfg->countMode));
+
+    /* Configure timer clock source */
+    tmpVal=BL_RD_REG(TIMER_BASE,TIMER_TCCR);
+    if(timerCh == TIMER_CH0){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,TIMER_CS_1,timerCfg->clkSrc);
+    }else{
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,TIMER_CS_2,timerCfg->clkSrc);
+    }
+    BL_WR_REG(TIMER_BASE,TIMER_TCCR,tmpVal);
+
+    /* Configure timer clock division */
+    tmpVal=BL_RD_REG(TIMER_BASE,TIMER_TCDR);
+    if(timerCh == TIMER_CH0){
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,TIMER_TCDR2,timerCfg->clockDivision);
+    }else{
+        tmpVal=BL_SET_REG_BITS_VAL(tmpVal,TIMER_TCDR3,timerCfg->clockDivision);
+    }
+    BL_WR_REG(TIMER_BASE,TIMER_TCDR,tmpVal);
+
+    /* Configure timer count mode: preload or free run */
+    TIMER_SetCountMode(timerCh,timerCfg->countMode);
+
+    /* Configure timer preload trigger src */
+    TIMER_SetPreloadTrigSrc(timerCh,timerCfg->plTrigSrc);
+
+    if(timerCfg->countMode == TIMER_COUNT_PRELOAD){
+        /* Configure timer preload value */
+        TIMER_SetPreloadValue(timerCh, timerCfg->preLoadVal);
+    }
+
+    /* Configure match compare values */
+    TIMER_SetCompValue(timerCh,TIMER_COMP_ID_0,timerCfg->matchVal0);
+    TIMER_SetCompValue(timerCh,TIMER_COMP_ID_1,timerCfg->matchVal1);
+    TIMER_SetCompValue(timerCh,TIMER_COMP_ID_2,timerCfg->matchVal2);
+
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(TIMER_CH0_IRQn,TIMER_CH0_IRQHandler);
+    Interrupt_Handler_Register(TIMER_CH1_IRQn,TIMER_CH1_IRQHandler);
+#endif
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  TIMER enable one channel function
+ *
+ * @param  timerCh: TIMER channel type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void TIMER_Enable(TIMER_Chan_Type timerCh)
+{
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_TIMER_CHAN_TYPE(timerCh));
+
+    tmpVal=BL_RD_REG(TIMER_BASE,TIMER_TCER);
+    tmpVal |=(1<<(timerCh+1));
+
+    BL_WR_REG(TIMER_BASE,TIMER_TCER,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  TIMER disable one channel function
+ *
+ * @param  timerCh: TIMER channel type
+ *
+ * @return None
+ *
+*******************************************************************************/
+void TIMER_Disable(TIMER_Chan_Type timerCh)
+{
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_TIMER_CHAN_TYPE(timerCh));
+
+    tmpVal=BL_RD_REG(TIMER_BASE,TIMER_TCER);
+    tmpVal &= (~(1<<(timerCh+1)));
+
+    BL_WR_REG(TIMER_BASE,TIMER_TCER,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  TIMER mask or unmask certain or all interrupt
+ *
+ * @param  timerCh: TIMER channel type
+ * @param  intType: TIMER interrupt type
+ * @param  intMask: TIMER interrupt mask value:MASK:disbale interrupt.UNMASK:enable interrupt
+ *
+ * @return None
+ *
+*******************************************************************************/
+void TIMER_IntMask(TIMER_Chan_Type timerCh,TIMER_INT_Type intType, BL_Mask_Type intMask)
+{
+    uint32_t tmpAddr;
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_TIMER_CHAN_TYPE(timerCh));
+    CHECK_PARAM(IS_TIMER_INT_TYPE(intType));
+    CHECK_PARAM(IS_BL_MASK_TYPE(intMask));
+
+    tmpAddr=TIMER_BASE+TIMER_TIER2_OFFSET+4*timerCh;
+    tmpVal=BL_RD_WORD(tmpAddr);
+
+    switch(intType)
+    {
+        case TIMER_INT_COMP_0:
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                BL_WR_WORD(tmpAddr,BL_SET_REG_BIT(tmpVal,TIMER_TIER_0));
+            }else{
+                /* Disable this interrupt */
+                BL_WR_WORD(tmpAddr,BL_CLR_REG_BIT(tmpVal,TIMER_TIER_0));
+            }
+            break;
+
+        case TIMER_INT_COMP_1:
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                BL_WR_WORD(tmpAddr,BL_SET_REG_BIT(tmpVal,TIMER_TIER_1));
+            }else{
+                /* Disable this interrupt */
+                BL_WR_WORD(tmpAddr,BL_CLR_REG_BIT(tmpVal,TIMER_TIER_1));
+            }
+            break;
+
+        case TIMER_INT_COMP_2:
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                BL_WR_WORD(tmpAddr,BL_SET_REG_BIT(tmpVal,TIMER_TIER_2));
+            }else{
+                /* Disable this interrupt */
+                BL_WR_WORD(tmpAddr,BL_CLR_REG_BIT(tmpVal,TIMER_TIER_2));
+            }
+            break;
+
+        case TIMER_INT_ALL:
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                BL_WR_WORD(tmpAddr,BL_SET_REG_BIT(tmpVal,TIMER_TIER_0));
+                BL_WR_WORD(tmpAddr,BL_SET_REG_BIT(tmpVal,TIMER_TIER_1));
+                BL_WR_WORD(tmpAddr,BL_SET_REG_BIT(tmpVal,TIMER_TIER_2));
+            }else{
+                /* Disable this interrupt */
+                BL_WR_WORD(tmpAddr,BL_CLR_REG_BIT(tmpVal,TIMER_TIER_0));
+                BL_WR_WORD(tmpAddr,BL_CLR_REG_BIT(tmpVal,TIMER_TIER_1));
+                BL_WR_WORD(tmpAddr,BL_CLR_REG_BIT(tmpVal,TIMER_TIER_2));
+            }
+            break;
+
+        default:
+            break;
+    }
+}
+
+/****************************************************************************//**
+ * @brief  TIMER set watchdog clock source and clock division
+ *
+ * @param  clkSrc: Watchdog timer clock source type
+ * @param  div: Watchdog timer clock division value
+ *
+ * @return None
+ *
+*******************************************************************************/
+void WDT_Set_Clock(TIMER_ClkSrc_Type clkSrc,uint8_t div)
+{
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_TIMER_CLKSRC_TYPE(clkSrc));
+
+    /* Configure watchdog timer clock source */
+    tmpVal=BL_RD_REG(TIMER_BASE,TIMER_TCCR);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,TIMER_CS_WDT,clkSrc);
+    BL_WR_REG(TIMER_BASE,TIMER_TCCR,tmpVal);
+
+    /* Configure watchdog timer clock divison */
+    tmpVal=BL_RD_REG(TIMER_BASE,TIMER_TCDR);
+    tmpVal=BL_SET_REG_BITS_VAL(tmpVal,TIMER_WCDR,div);
+    BL_WR_REG(TIMER_BASE,TIMER_TCDR,tmpVal);
+}
+
+/****************************************************************************//**
+ * @brief  TIMER get watchdog match compare value
+ *
+ * @param  None
+ *
+ * @return Watchdog match comapre register value
+ *
+*******************************************************************************/
+uint16_t WDT_GetMatchValue(void)
+{
+    uint32_t tmpVal;
+
+    WDT_ENABLE_ACCESS();
+
+    /* Get watchdog timer match register value */
+    tmpVal=BL_RD_REG(TIMER_BASE,TIMER_WMR);
+
+    return tmpVal;
+}
+
+/****************************************************************************//**
+ * @brief  TIMER set watchdog match compare value
+ *
+ * @param  val: Watchdog match compare value
+ *
+ * @return None
+ *
+*******************************************************************************/
+void WDT_SetCompValue(uint16_t val)
+{
+    WDT_ENABLE_ACCESS();
+
+    /* Set watchdog timer match register value */
+    BL_WR_REG(TIMER_BASE,TIMER_WMR,val);
+}
+
+/****************************************************************************//**
+ * @brief  TIMER get watchdog count register value
+ *
+ * @param  None
+ *
+ * @return Watchdog count register value
+ *
+*******************************************************************************/
+uint16_t WDT_GetCounterValue(void)
+{
+    uint32_t tmpVal;
+
+    WDT_ENABLE_ACCESS();
+
+    /* Get watchdog timer count register value */
+    tmpVal=BL_RD_REG(TIMER_BASE,TIMER_WVR);
+
+    return tmpVal;
+}
+
+/****************************************************************************//**
+ * @brief  TIMER reset watchdog count register value
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void WDT_ResetCounterValue(void)
+{
+    uint32_t tmpVal;
+
+    /* Reset watchdog timer count register value */
+    WDT_ENABLE_ACCESS();
+
+    tmpVal=BL_RD_REG(TIMER_BASE,TIMER_WCR);
+
+    /* Set watchdog counter reset register bit0 to 1 */
+    BL_WR_REG(TIMER_BASE,TIMER_WCR,BL_SET_REG_BIT(tmpVal,TIMER_WCR));
+}
+
+/****************************************************************************//**
+ * @brief  TIMER get watchdog reset status
+ *
+ * @param  None
+ *
+ * @return SET or RESET
+ *
+*******************************************************************************/
+BL_Sts_Type WDT_GetResetStatus(void)
+{
+    uint32_t tmpVal;
+
+    WDT_ENABLE_ACCESS();
+
+    /* Get watchdog status register */
+    tmpVal=BL_RD_REG(TIMER_BASE,TIMER_WSR);
+
+    return (BL_IS_REG_BIT_SET(tmpVal,TIMER_WTS)) ? SET : RESET;
+}
+
+/****************************************************************************//**
+ * @brief  TIMER clear watchdog reset status
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void WDT_ClearResetStatus(void)
+{
+    uint32_t tmpVal;
+
+    WDT_ENABLE_ACCESS();
+
+    tmpVal=BL_RD_REG(TIMER_BASE,TIMER_WSR);
+
+    /* Set watchdog status register */
+    BL_WR_REG(TIMER_BASE,TIMER_WSR,BL_CLR_REG_BIT(tmpVal,TIMER_WTS));
+}
+
+/****************************************************************************//**
+ * @brief  TIMER enable watchdog function
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void WDT_Enable(void)
+{
+    uint32_t tmpVal;
+
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(TIMER_WDT_IRQn,TIMER_WDT_IRQHandler);
+#endif
+
+    WDT_ENABLE_ACCESS();
+
+    tmpVal=BL_RD_REG(TIMER_BASE,TIMER_WMER);
+
+    BL_WR_REG(TIMER_BASE,TIMER_WMER,BL_SET_REG_BIT(tmpVal,TIMER_WE));
+}
+
+/****************************************************************************//**
+ * @brief  Watchdog timer disable function
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void WDT_Disable(void)
+{
+    uint32_t tmpVal;
+
+    WDT_ENABLE_ACCESS();
+
+    tmpVal=BL_RD_REG(TIMER_BASE,TIMER_WMER);
+
+    BL_WR_REG(TIMER_BASE,TIMER_WMER,BL_CLR_REG_BIT(tmpVal,TIMER_WE));
+}
+
+/****************************************************************************//**
+ * @brief  Watchdog timer mask or unmask certain or all interrupt
+ *
+ * @param  intType: Watchdog interrupt type
+ * @param  intMask: Watchdog interrupt mask value:MASK:disbale interrupt.UNMASK:enable interrupt
+ *
+ * @return None
+ *
+*******************************************************************************/
+void WDT_IntMask(WDT_INT_Type intType, BL_Mask_Type intMask)
+{
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_WDT_INT_TYPE(intType));
+    CHECK_PARAM(IS_BL_MASK_TYPE(intMask));
+
+    WDT_ENABLE_ACCESS();
+
+    /* Deal with watchdog match/interrupt enable register,
+      WRIE:watchdog reset/interrupt enable */
+    tmpVal=BL_RD_REG(TIMER_BASE,TIMER_WMER);
+
+    switch(intType)
+    {
+        case WDT_INT:
+            if(intMask == UNMASK){
+                /* Enable this interrupt */
+                /* 0 means generates a watchdog interrupt,
+                   a watchdog timer reset is not generated*/
+                BL_WR_REG(TIMER_BASE,TIMER_WMER,BL_CLR_REG_BIT(tmpVal,TIMER_WRIE));
+            }else {
+                /* Disable this interrupt */
+                /* 1 means generates a watchdog timer reset,
+                   a watchdog  interrupt is not generated*/
+                BL_WR_REG(TIMER_BASE,TIMER_WMER,BL_SET_REG_BIT(tmpVal,TIMER_WRIE));
+            }
+            break;
+        default:
+            break;
+    }
+}
+
+/****************************************************************************//**
+ * @brief  TIMER channel 0 interrupt handler
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void TIMER_CH0_IRQHandler(void)
+{
+   TIMER_IntHandler(TIMER_CH0_IRQn,TIMER_CH0);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  TIMER channel 1 interrupt handler
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void TIMER_CH1_IRQHandler(void)
+{
+   TIMER_IntHandler(TIMER_CH1_IRQn,TIMER_CH1);
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  TIMER watchdog interrupt handler
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+void TIMER_WDT_IRQHandler(void)
+{
+    uint32_t tmpVal;
+
+    WDT_ENABLE_ACCESS();
+
+    tmpVal=BL_RD_REG(TIMER_BASE,TIMER_WICR);
+    BL_WR_REG(TIMER_BASE,TIMER_WICR,BL_SET_REG_BIT(tmpVal,TIMER_WICLR));
+
+    if(timerIntCbfArra[TIMER_WDT_IRQn-TIMER_CH0_IRQn][WDT_INT] != NULL){
+        /* Call the callback function */
+        timerIntCbfArra[TIMER_WDT_IRQn-TIMER_CH0_IRQn][WDT_INT]();
+    }
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  TIMER install interrupt callback
+ *
+ * @param  timerChan: TIMER channel type
+ * @param  intType: TIMER interrupt type
+ * @param  cbFun: Pointer to interrupt callback function. The type should be void (*fn)(void)
+ *
+ * @return None
+ *
+*******************************************************************************/
+void Timer_Int_Callback_Install(TIMER_Chan_Type timerChan,TIMER_INT_Type intType,intCallback_Type* cbFun)
+{
+    /* Check the parameters */
+    CHECK_PARAM(IS_TIMER_CHAN_TYPE(timerChan));
+    CHECK_PARAM(IS_TIMER_INT_TYPE(intType));
+
+    timerIntCbfArra[timerChan][intType] = cbFun;
+}
+
+/****************************************************************************//**
+ * @brief  Watchdog install interrupt callback
+ *
+ * @param  wdtInt: Watchdog interrupt type
+ * @param  cbFun: Pointer to interrupt callback function. The type should be void (*fn)(void)
+ *
+ * @return None
+ *
+*******************************************************************************/
+void WDT_Int_Callback_Install(WDT_INT_Type wdtInt,intCallback_Type* cbFun)
+{
+    /* Check the parameters */
+    CHECK_PARAM(IS_WDT_INT_TYPE(wdtInt));
+
+    timerIntCbfArra[2][wdtInt] = cbFun;
+}
+
+/*@} end of group TIMER_Private_Functions */
+
+/*@} end of group TIMER */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/drivers/bl702_driver/std_drv/src/bl702_uart.c b/drivers/bl702_driver/std_drv/src/bl702_uart.c
new file mode 100644
index 00000000..0d7e4dd3
--- /dev/null
+++ b/drivers/bl702_driver/std_drv/src/bl702_uart.c
@@ -0,0 +1,1204 @@
+/**
+  ******************************************************************************
+  * @file    bl702_uart.c
+  * @version V1.0
+  * @date
+  * @brief   This file is the standard driver c file
+  ******************************************************************************
+  * @attention
+  *
+  * 
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_uart.h"
+#include "bl702_glb.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  UART
+ *  @{
+ */
+
+/** @defgroup  UART_Private_Macros
+ *  @{
+ */
+#define UART_TX_TIMEOUT_COUNT          (160*1000)
+
+/*@} end of group UART_Private_Macros */
+
+/** @defgroup  UART_Private_Types
+ *  @{
+ */
+
+/*@} end of group UART_Private_Types */
+
+/** @defgroup  UART_Private_Variables
+ *  @{
+ */
+static const uint32_t uartAddr[2] = {UART0_BASE,UART1_BASE};
+static intCallback_Type * uartIntCbfArra[2][UART_INT_ALL]= {
+    {NULL},{NULL}
+};
+
+
+/*@} end of group UART_Private_Variables */
+
+/** @defgroup  UART_Global_Variables
+ *  @{
+ */
+
+/*@} end of group UART_Global_Variables */
+
+/** @defgroup  UART_Private_Fun_Declaration
+ *  @{
+ */
+#ifndef BFLB_USE_HAL_DRIVER
+static void UART_IntHandler(UART_ID_Type uartId);
+#endif
+
+/*@} end of group UART_Private_Fun_Declaration */
+
+/** @defgroup  UART_Private_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  UART interrupt common handler function
+ *
+ * @param  uartId: UART ID type
+ *
+ * @return None
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_HAL_DRIVER
+static void UART_IntHandler(UART_ID_Type uartId)
+{
+    uint32_t tmpVal = 0;
+    uint32_t maskVal = 0;
+    uint32_t UARTx = uartAddr[uartId];
+
+    tmpVal = BL_RD_REG(UARTx,UART_INT_STS);
+    maskVal = BL_RD_REG(UARTx,UART_INT_MASK);
+
+    /* Length of uart tx data transfer arrived interrupt */
+    if(BL_IS_REG_BIT_SET(tmpVal,UART_UTX_END_INT) && !BL_IS_REG_BIT_SET(maskVal,UART_CR_UTX_END_MASK)){
+        BL_WR_REG(UARTx,UART_INT_CLEAR,0x1);
+        if(uartIntCbfArra[uartId][UART_INT_TX_END] != NULL){
+            uartIntCbfArra[uartId][UART_INT_TX_END]();
+        }
+    }
+
+    /* Length of uart rx data transfer arrived interrupt */
+    if(BL_IS_REG_BIT_SET(tmpVal,UART_URX_END_INT) && !BL_IS_REG_BIT_SET(maskVal,UART_CR_URX_END_MASK)){
+        BL_WR_REG(UARTx,UART_INT_CLEAR,0x2);
+        if(uartIntCbfArra[uartId][UART_INT_RX_END] != NULL){
+            uartIntCbfArra[uartId][UART_INT_RX_END]();
+        }
+    }
+
+    /* Tx fifo ready interrupt,auto-cleared when data is pushed */
+    if(BL_IS_REG_BIT_SET(tmpVal,UART_UTX_FIFO_INT) && !BL_IS_REG_BIT_SET(maskVal,UART_CR_UTX_FIFO_MASK)){
+        if(uartIntCbfArra[uartId][UART_INT_TX_FIFO_REQ] != NULL){
+            uartIntCbfArra[uartId][UART_INT_TX_FIFO_REQ]();
+        }
+    }
+
+    /* Rx fifo ready interrupt,auto-cleared when data is popped */
+    if(BL_IS_REG_BIT_SET(tmpVal,UART_URX_FIFO_INT) && !BL_IS_REG_BIT_SET(maskVal,UART_CR_URX_FIFO_MASK)){
+        if(uartIntCbfArra[uartId][UART_INT_RX_FIFO_REQ] != NULL){
+            uartIntCbfArra[uartId][UART_INT_RX_FIFO_REQ]();
+        }
+    }
+
+    /* Rx time-out interrupt */
+    if(BL_IS_REG_BIT_SET(tmpVal,UART_URX_RTO_INT) && !BL_IS_REG_BIT_SET(maskVal,UART_CR_URX_RTO_MASK)){
+        BL_WR_REG(UARTx,UART_INT_CLEAR,0x10);
+        if(uartIntCbfArra[uartId][UART_INT_RTO] != NULL){
+            uartIntCbfArra[uartId][UART_INT_RTO]();
+        }
+    }
+
+    /* Rx parity check error interrupt */
+    if(BL_IS_REG_BIT_SET(tmpVal,UART_URX_PCE_INT) && !BL_IS_REG_BIT_SET(maskVal,UART_CR_URX_PCE_MASK)){
+        BL_WR_REG(UARTx,UART_INT_CLEAR,0x20);
+        if(uartIntCbfArra[uartId][UART_INT_PCE] != NULL){
+            uartIntCbfArra[uartId][UART_INT_PCE]();
+        }
+    }
+
+    /* Tx fifo overflow/underflow error interrupt */
+    if(BL_IS_REG_BIT_SET(tmpVal,UART_UTX_FER_INT) && !BL_IS_REG_BIT_SET(maskVal,UART_CR_UTX_FER_MASK)){
+        if(uartIntCbfArra[uartId][UART_INT_TX_FER] != NULL){
+            uartIntCbfArra[uartId][UART_INT_TX_FER]();
+        }
+    }
+
+    /* Rx fifo overflow/underflow error interrupt */
+    if(BL_IS_REG_BIT_SET(tmpVal,UART_URX_FER_INT) && !BL_IS_REG_BIT_SET(maskVal,UART_CR_URX_FER_MASK)){
+        if(uartIntCbfArra[uartId][UART_INT_RX_FER] != NULL){
+            uartIntCbfArra[uartId][UART_INT_RX_FER]();
+        }
+    }
+
+    /* Rx lin mode sync field error interrupt */
+    if(BL_IS_REG_BIT_SET(tmpVal,UART_URX_LSE_INT) && !BL_IS_REG_BIT_SET(maskVal,UART_CR_URX_LSE_MASK)){
+        BL_WR_REG(UARTx,UART_INT_CLEAR,0x100);
+        if(uartIntCbfArra[uartId][UART_INT_LSE] != NULL){
+            uartIntCbfArra[uartId][UART_INT_LSE]();
+        }
+    }
+}
+#endif
+
+
+/*@} end of group UART_Private_Functions */
+
+/** @defgroup  UART_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  UART initialization function
+ *
+ * @param  uartId: UART ID type
+ * @param  uartCfg: UART configuration structure pointer
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_Init(UART_ID_Type uartId,UART_CFG_Type* uartCfg)
+{
+    uint32_t tmpValTxCfg = 0;
+    uint32_t tmpValRxCfg = 0;
+    uint32_t fraction = 0;
+    uint32_t baudRateDivisor = 0;
+    uint32_t UARTx = uartAddr[uartId];
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+    CHECK_PARAM(IS_UART_PARITY_TYPE(uartCfg->parity));
+    CHECK_PARAM(IS_UART_DATABITS_TYPE(uartCfg->dataBits));
+    CHECK_PARAM(IS_UART_STOPBITS_TYPE(uartCfg->stopBits));
+    CHECK_PARAM(IS_UART_BYTEBITINVERSE_TYPE(uartCfg->byteBitInverse));
+
+    /* Cal the baud rate divisor */
+    fraction = uartCfg->uartClk * 10 / uartCfg->baudRate % 10;
+    baudRateDivisor = uartCfg->uartClk / uartCfg->baudRate;
+    if(fraction >= 5){
+        ++baudRateDivisor;
+    }
+
+    /* Set the baud rate register value */
+    BL_WR_REG(UARTx,UART_BIT_PRD,((baudRateDivisor-1)<<0x10)|((baudRateDivisor-1)&0xFFFF));
+
+    /* Configure parity type */
+    tmpValTxCfg = BL_RD_REG(UARTx,UART_UTX_CONFIG);
+    tmpValRxCfg = BL_RD_REG(UARTx,UART_URX_CONFIG);
+    switch(uartCfg->parity)
+    {
+        case UART_PARITY_NONE:
+            tmpValTxCfg = BL_CLR_REG_BIT(tmpValTxCfg,UART_CR_UTX_PRT_EN);
+            tmpValRxCfg = BL_CLR_REG_BIT(tmpValRxCfg,UART_CR_URX_PRT_EN);
+            break;
+        case UART_PARITY_ODD:
+            tmpValTxCfg = BL_SET_REG_BIT(tmpValTxCfg,UART_CR_UTX_PRT_EN);
+            tmpValTxCfg = BL_SET_REG_BIT(tmpValTxCfg,UART_CR_UTX_PRT_SEL);
+            tmpValRxCfg = BL_SET_REG_BIT(tmpValRxCfg,UART_CR_URX_PRT_EN);
+            tmpValRxCfg = BL_SET_REG_BIT(tmpValRxCfg,UART_CR_URX_PRT_SEL);
+            break;
+        case UART_PARITY_EVEN:
+            tmpValTxCfg = BL_SET_REG_BIT(tmpValTxCfg,UART_CR_UTX_PRT_EN);
+            tmpValTxCfg = BL_CLR_REG_BIT(tmpValTxCfg,UART_CR_UTX_PRT_SEL);
+            tmpValRxCfg = BL_SET_REG_BIT(tmpValRxCfg,UART_CR_URX_PRT_EN);
+            tmpValRxCfg = BL_CLR_REG_BIT(tmpValRxCfg,UART_CR_URX_PRT_SEL);
+            break;
+        default:
+            break;
+    }
+
+    /* Configure data bits */
+    tmpValTxCfg = BL_SET_REG_BITS_VAL(tmpValTxCfg,UART_CR_UTX_BIT_CNT_D,(uartCfg->dataBits+4));
+    tmpValRxCfg = BL_SET_REG_BITS_VAL(tmpValRxCfg,UART_CR_URX_BIT_CNT_D,(uartCfg->dataBits+4));
+
+    /* Configure tx stop bits */
+    tmpValTxCfg = BL_SET_REG_BITS_VAL(tmpValTxCfg,UART_CR_UTX_BIT_CNT_P,(uartCfg->stopBits+1));
+
+    /* Configure tx cts flow control function */
+    tmpValTxCfg = BL_SET_REG_BITS_VAL(tmpValTxCfg,UART_CR_UTX_CTS_EN,uartCfg->ctsFlowControl);
+
+    /* Configure rx input de-glitch function */
+    tmpValRxCfg = BL_SET_REG_BITS_VAL(tmpValRxCfg,UART_CR_URX_DEG_EN,uartCfg->rxDeglitch);
+
+    /* Configure tx lin mode function */
+    tmpValTxCfg = BL_SET_REG_BITS_VAL(tmpValTxCfg,UART_CR_UTX_LIN_EN,uartCfg->txLinMode);
+
+    /* Configure rx lin mode function */
+    tmpValRxCfg = BL_SET_REG_BITS_VAL(tmpValRxCfg,UART_CR_URX_LIN_EN,uartCfg->rxLinMode);
+
+    /* Set tx break bit count for lin protocol */
+    tmpValTxCfg = BL_SET_REG_BITS_VAL(tmpValTxCfg,UART_CR_UTX_BIT_CNT_B,uartCfg->txBreakBitCnt);
+
+    /* Write back */
+    BL_WR_REG(UARTx,UART_UTX_CONFIG,tmpValTxCfg);
+    BL_WR_REG(UARTx,UART_URX_CONFIG,tmpValRxCfg);
+
+    /* Configure LSB-first or MSB-first */
+    tmpValTxCfg = BL_RD_REG(UARTx,UART_DATA_CONFIG);
+    if(UART_MSB_FIRST == uartCfg->byteBitInverse){
+        tmpValTxCfg = BL_SET_REG_BIT(tmpValTxCfg,UART_CR_UART_BIT_INV);
+    }else{
+        tmpValTxCfg = BL_CLR_REG_BIT(tmpValTxCfg,UART_CR_UART_BIT_INV);
+    }
+    BL_WR_REG(UARTx,UART_DATA_CONFIG,tmpValTxCfg);
+
+    tmpValTxCfg = BL_RD_REG(UARTx,UART_SW_MODE);
+    /* Configure rx rts output SW control mode */
+    tmpValTxCfg = BL_SET_REG_BITS_VAL(tmpValTxCfg,UART_CR_URX_RTS_SW_MODE,uartCfg->rtsSoftwareControl);
+    /* Configure tx output SW control mode */
+    tmpValTxCfg = BL_SET_REG_BITS_VAL(tmpValTxCfg,UART_CR_UTX_TXD_SW_MODE,uartCfg->txSoftwareControl);
+    BL_WR_REG(UARTx,UART_SW_MODE,tmpValTxCfg);
+
+#ifndef BFLB_USE_HAL_DRIVER
+    Interrupt_Handler_Register(UART0_IRQn,UART0_IRQHandler);
+    Interrupt_Handler_Register(UART1_IRQn,UART1_IRQHandler);
+#endif
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  UART set default value of all registers function
+ *
+ * @param  uartId: UART ID type
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_DeInit(UART_ID_Type uartId)
+{
+    if(UART0_ID==uartId){
+        GLB_AHB_Slave1_Reset(BL_AHB_SLAVE1_UART0);
+    }else if(UART1_ID==uartId){
+        GLB_AHB_Slave1_Reset(BL_AHB_SLAVE1_UART1);
+    }
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  UART configure fifo function
+ *
+ * @param  uartId: UART ID type
+ * @param  fifoCfg: FIFO configuration structure pointer
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_FifoConfig(UART_ID_Type uartId,UART_FifoCfg_Type* fifoCfg)
+{
+    uint32_t tmpVal = 0;
+    uint32_t UARTx = uartAddr[uartId];
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+
+    /* Deal with uart fifo configure register */
+    tmpVal = BL_RD_REG(UARTx,UART_FIFO_CONFIG_1);
+    /* Configure dma tx fifo threshold */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,UART_TX_FIFO_TH,fifoCfg->txFifoDmaThreshold-1);
+    /* Configure dma rx fifo threshold */
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,UART_RX_FIFO_TH,fifoCfg->rxFifoDmaThreshold-1);
+    /* Write back */
+    BL_WR_REG(UARTx,UART_FIFO_CONFIG_1,tmpVal);
+
+    /* Enable or disable uart fifo dma function */
+    tmpVal = BL_RD_REG(UARTx,UART_FIFO_CONFIG_0);
+    if(ENABLE == fifoCfg->txFifoDmaEnable){
+        tmpVal = BL_SET_REG_BIT(tmpVal,UART_DMA_TX_EN);
+    }else{
+        tmpVal = BL_CLR_REG_BIT(tmpVal,UART_DMA_TX_EN);
+    }
+    if(ENABLE == fifoCfg->rxFifoDmaEnable){
+        tmpVal = BL_SET_REG_BIT(tmpVal,UART_DMA_RX_EN);
+    }else{
+        tmpVal = BL_CLR_REG_BIT(tmpVal,UART_DMA_RX_EN);
+    }
+    BL_WR_REG(UARTx,UART_FIFO_CONFIG_0,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  UART configure infra function
+ *
+ * @param  uartId: UART ID type
+ * @param  irCfg: IR configuration structure pointer
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_IrConfig(UART_ID_Type uartId, UART_IrCfg_Type* irCfg)
+{
+    uint32_t tmpVal = 0;
+    uint32_t UARTx = uartAddr[uartId];
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+
+    /* Configure tx ir mode */
+    tmpVal = BL_RD_REG(UARTx,UART_UTX_CONFIG);
+    if(ENABLE == irCfg->txIrEnable){
+        tmpVal = BL_SET_REG_BIT(tmpVal,UART_CR_UTX_IR_EN);
+    }else{
+        tmpVal = BL_CLR_REG_BIT(tmpVal,UART_CR_UTX_IR_EN);
+    }
+    if(ENABLE == irCfg->txIrInverse){
+        tmpVal = BL_SET_REG_BIT(tmpVal,UART_CR_UTX_IR_INV);
+    }else{
+        tmpVal = BL_CLR_REG_BIT(tmpVal,UART_CR_UTX_IR_INV);
+    }
+    BL_WR_REG(UARTx,UART_UTX_CONFIG,tmpVal);
+
+    /* Configure rx ir mode */
+    tmpVal = BL_RD_REG(UARTx,UART_URX_CONFIG);
+    if(ENABLE == irCfg->rxIrEnable){
+        tmpVal = BL_SET_REG_BIT(tmpVal,UART_CR_URX_IR_EN);
+    }else{
+        tmpVal = BL_CLR_REG_BIT(tmpVal,UART_CR_URX_IR_EN);
+    }
+    if(ENABLE == irCfg->rxIrInverse){
+        tmpVal = BL_SET_REG_BIT(tmpVal,UART_CR_URX_IR_INV);
+    }else{
+        tmpVal = BL_CLR_REG_BIT(tmpVal,UART_CR_URX_IR_INV);
+    }
+    BL_WR_REG(UARTx,UART_URX_CONFIG,tmpVal);
+
+    /* Configure tx ir pulse start and stop position */
+    BL_WR_REG(UARTx,UART_UTX_IR_POSITION,irCfg->txIrPulseStop<<0x10|irCfg->txIrPulseStart);
+
+    /* Configure rx ir pulse start position */
+    BL_WR_REG(UARTx,UART_URX_IR_POSITION,irCfg->rxIrPulseStart);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Enable UART
+ *
+ * @param  uartId: UART ID type
+ * @param  direct: UART direction type
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_Enable(UART_ID_Type uartId,UART_Direction_Type direct)
+{
+    uint32_t tmpVal = 0;
+    uint32_t UARTx = uartAddr[uartId];
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+    CHECK_PARAM(IS_UART_DIRECTION_TYPE(direct));
+
+    if(direct == UART_TX || direct == UART_TXRX){
+        /* Enable UART tx unit */
+        tmpVal = BL_RD_REG(UARTx,UART_UTX_CONFIG);
+        BL_WR_REG(UARTx,UART_UTX_CONFIG,BL_SET_REG_BIT(tmpVal,UART_CR_UTX_EN));
+    }
+
+    if(direct == UART_RX || direct == UART_TXRX){
+        /* Enable UART rx unit */
+        tmpVal = BL_RD_REG(UARTx,UART_URX_CONFIG);
+        BL_WR_REG(UARTx,UART_URX_CONFIG,BL_SET_REG_BIT(tmpVal,UART_CR_URX_EN));
+    }
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Disable UART
+ *
+ * @param  uartId: UART ID type
+ * @param  direct: UART direction type
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_Disable(UART_ID_Type uartId,UART_Direction_Type direct)
+{
+    uint32_t tmpVal = 0;
+    uint32_t UARTx = uartAddr[uartId];
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+    CHECK_PARAM(IS_UART_DIRECTION_TYPE(direct));
+
+    if(direct == UART_TX || direct == UART_TXRX){
+        /* Disable UART tx unit */
+        tmpVal = BL_RD_REG(UARTx,UART_UTX_CONFIG);
+        BL_WR_REG(UARTx,UART_UTX_CONFIG,BL_CLR_REG_BIT(tmpVal,UART_CR_UTX_EN));
+    }
+
+    if(direct == UART_RX || direct == UART_TXRX){
+        /* Disable UART rx unit */
+        tmpVal = BL_RD_REG(UARTx,UART_URX_CONFIG);
+        BL_WR_REG(UARTx,UART_URX_CONFIG,BL_CLR_REG_BIT(tmpVal,UART_CR_URX_EN));
+    }
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  UART set length of tx data transfer,tx end interrupt will assert when this length is
+ *         reached
+ *
+ * @param  uartId: UART ID type
+ * @param  length: Length of data (unit:character/byte)
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_SetTxDataLength(UART_ID_Type uartId,uint16_t length)
+{
+    uint32_t tmpVal = 0;
+    uint32_t UARTx = uartAddr[uartId];
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+
+    /* Set length */
+    tmpVal = BL_RD_REG(UARTx,UART_UTX_CONFIG);
+    BL_WR_REG(UARTx,UART_UTX_CONFIG,BL_SET_REG_BITS_VAL(tmpVal,UART_CR_UTX_LEN,length-1));
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  UART set length of rx data transfer,rx end interrupt will assert when this length is
+ *         reached
+ *
+ * @param  uartId: UART ID type
+ * @param  length: Length of data (unit:character/byte)
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_SetRxDataLength(UART_ID_Type uartId,uint16_t length)
+{
+    uint32_t tmpVal = 0;
+    uint32_t UARTx = uartAddr[uartId];
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+
+    /* Set length */
+    tmpVal = BL_RD_REG(UARTx,UART_URX_CONFIG);
+    BL_WR_REG(UARTx,UART_URX_CONFIG,BL_SET_REG_BITS_VAL(tmpVal,UART_CR_URX_LEN,length-1));
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  UART set rx time-out value for triggering RTO interrupt
+ *
+ * @param  uartId: UART ID type
+ * @param  time: Time-out value (unit:bit time)
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_SetRxTimeoutValue(UART_ID_Type uartId,uint8_t time)
+{
+    uint32_t UARTx = uartAddr[uartId];
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+
+    /* Set time-out value */
+    tmpVal = BL_RD_REG(UARTx,UART_URX_RTO_TIMER);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,UART_CR_URX_RTO_VALUE,time-1);
+    BL_WR_REG(UARTx,UART_URX_RTO_TIMER,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  UART set de-glitch function cycle count value
+ *
+ * @param  uartId: UART ID type
+ * @param  deglitchCnt: De-glitch function cycle count
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_SetDeglitchCount(UART_ID_Type uartId,uint8_t deglitchCnt)
+{
+    uint32_t UARTx = uartAddr[uartId];
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+
+    /* Set count value */
+    tmpVal = BL_RD_REG(UARTx,UART_URX_CONFIG);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,UART_CR_URX_DEG_CNT,deglitchCnt-1);
+    BL_WR_REG(UARTx,UART_URX_CONFIG,tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  UART set tx and rx baudrate according to auto baudrate detection value
+ *
+ * @param  uartId: UART ID type
+ * @param  autoBaudDet: Choose detection value using codeword 0x55 or start bit
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_SetBaudrate(UART_ID_Type uartId,UART_AutoBaudDetection_Type autoBaudDet)
+{
+    uint32_t UARTx = uartAddr[uartId];
+    uint16_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+
+    /* Get detection value */
+    tmpVal = UART_GetAutoBaudCount(uartId,autoBaudDet);
+
+    /* Set tx baudrate */
+    BL_WR_REG(UARTx,UART_BIT_PRD,tmpVal<<0x10 | tmpVal);
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  UART set rx rts output software control value
+ *
+ * @param  uartId: UART ID type
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_SetRtsValue(UART_ID_Type uartId)
+{
+    uint32_t UARTx = uartAddr[uartId];
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+
+    /* Rts set 1*/
+    tmpVal = BL_RD_REG(UARTx,UART_SW_MODE);
+    BL_WR_REG(UARTx,UART_SW_MODE,BL_SET_REG_BIT(tmpVal,UART_CR_URX_RTS_SW_VAL));
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  UART clear rx rts output software control value
+ *
+ * @param  uartId: UART ID type
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_ClrRtsValue(UART_ID_Type uartId)
+{
+    uint32_t UARTx = uartAddr[uartId];
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+
+    /* Rts clear 0 */
+    tmpVal = BL_RD_REG(UARTx,UART_SW_MODE);
+    BL_WR_REG(UARTx,UART_SW_MODE,BL_CLR_REG_BIT(tmpVal,UART_CR_URX_RTS_SW_VAL));
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  UART set tx output software control value
+ *
+ * @param  uartId: UART ID type
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_SetTxValue(UART_ID_Type uartId)
+{
+    uint32_t UARTx = uartAddr[uartId];
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+
+    /* Tx set 1*/
+    tmpVal = BL_RD_REG(UARTx,UART_SW_MODE);
+    BL_WR_REG(UARTx,UART_SW_MODE,BL_SET_REG_BIT(tmpVal,UART_CR_UTX_TXD_SW_VAL));
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  UART clear tx output software control value
+ *
+ * @param  uartId: UART ID type
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_ClrTxValue(UART_ID_Type uartId)
+{
+    uint32_t UARTx = uartAddr[uartId];
+    uint32_t tmpVal;
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+
+    /* Rts clear 0 */
+    tmpVal = BL_RD_REG(UARTx,UART_SW_MODE);
+    BL_WR_REG(UARTx,UART_SW_MODE,BL_CLR_REG_BIT(tmpVal,UART_CR_UTX_TXD_SW_VAL));
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  UART configure tx free run mode function
+ *
+ * @param  uartId: UART ID type
+ * @param  txFreeRun: Enable or disable tx free run mode
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_TxFreeRun(UART_ID_Type uartId,BL_Fun_Type txFreeRun)
+{
+    uint32_t tmpVal = 0;
+    uint32_t UARTx = uartAddr[uartId];
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+
+    /* Enable or disable tx free run mode */
+    tmpVal = BL_RD_REG(UARTx,UART_UTX_CONFIG);
+    if(ENABLE == txFreeRun){
+        BL_WR_REG(UARTx,UART_UTX_CONFIG,BL_SET_REG_BIT(tmpVal,UART_CR_UTX_FRM_EN));
+    }else{
+        BL_WR_REG(UARTx,UART_UTX_CONFIG,BL_CLR_REG_BIT(tmpVal,UART_CR_UTX_FRM_EN));
+    }
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  UART configure auto baud rate detection function
+ *
+ * @param  uartId: UART ID type
+ * @param  autoBaud: Enable or disable auto function
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_AutoBaudDetection(UART_ID_Type uartId,BL_Fun_Type autoBaud)
+{
+    uint32_t tmpVal = 0;
+    uint32_t UARTx = uartAddr[uartId];
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+
+    /* Enable or disable auto baud rate detection function */
+    tmpVal = BL_RD_REG(UARTx,UART_URX_CONFIG);
+    if(ENABLE == autoBaud){
+        BL_WR_REG(UARTx,UART_URX_CONFIG,BL_SET_REG_BIT(tmpVal,UART_CR_URX_ABR_EN));
+    }else{
+        BL_WR_REG(UARTx,UART_URX_CONFIG,BL_CLR_REG_BIT(tmpVal,UART_CR_URX_ABR_EN));
+    }
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  UART tx fifo clear
+ *
+ * @param  uartId: UART ID type
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_TxFifoClear(UART_ID_Type uartId)
+{
+    uint32_t tmpVal = 0;
+    uint32_t UARTx = uartAddr[uartId];
+
+    /* Check the parameter */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+
+    /* Clear tx fifo */
+    tmpVal = BL_RD_REG(UARTx,UART_FIFO_CONFIG_0);
+    BL_WR_REG(UARTx,UART_FIFO_CONFIG_0,BL_SET_REG_BIT(tmpVal,UART_TX_FIFO_CLR));
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  UART rx fifo clear
+ *
+ * @param  uartId: UART ID type
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_RxFifoClear(UART_ID_Type uartId)
+{
+    uint32_t tmpVal = 0;
+    uint32_t UARTx = uartAddr[uartId];
+
+    /* Check the parameter */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+
+    /* Clear rx fifo */
+    tmpVal = BL_RD_REG(UARTx,UART_FIFO_CONFIG_0);
+    BL_WR_REG(UARTx,UART_FIFO_CONFIG_0,BL_SET_REG_BIT(tmpVal,UART_RX_FIFO_CLR));
+
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  UART mask or unmask certain or all interrupt
+ *
+ * @param  uartId: UART ID type
+ * @param  intType: UART interrupt type
+ * @param  intMask: UART interrupt mask value( MASK:disbale interrupt,UNMASK:enable interrupt )
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_IntMask(UART_ID_Type uartId,UART_INT_Type intType,BL_Mask_Type intMask)
+{
+    uint32_t tmpVal;
+    uint32_t UARTx = uartAddr[uartId];
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+    CHECK_PARAM(IS_UART_INT_TYPE(intType));
+    CHECK_PARAM(IS_BL_MASK_TYPE(intMask));
+
+    tmpVal = BL_RD_REG(UARTx,UART_INT_MASK);
+
+    /* Mask or unmask certain or all interrupt */
+    if(UART_INT_ALL == intType){
+        if(MASK == intMask){
+            tmpVal |= 0x1ff;
+        }else{
+            tmpVal &= 0;
+        }
+    }else{
+        if(MASK == intMask){
+            tmpVal |= 1<0){
+            BL_WR_BYTE(UARTx+UART_FIFO_WDATA_OFFSET,data[txLen++]);
+            timeoutCnt = UART_TX_TIMEOUT_COUNT;
+        }else{
+            timeoutCnt--;
+            if(timeoutCnt == 0){
+                return TIMEOUT;
+            }
+        }
+    }
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  UART send data to tx fifo in block mode
+ *
+ * @param  uartId: UART ID type
+ * @param  data: The data to be send
+ * @param  len: The length of the send buffer
+ *
+ * @return SUCCESS
+ *
+*******************************************************************************/
+BL_Err_Type UART_SendDataBlock(UART_ID_Type uartId, uint8_t* data,uint32_t len)
+{
+    uint32_t txLen = 0;
+    uint32_t UARTx = uartAddr[uartId];
+    uint32_t timeoutCnt = UART_TX_TIMEOUT_COUNT;
+
+    /* Check the parameter */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+
+    /* Send data */
+    while(txLen0){
+            BL_WR_BYTE(UARTx+UART_FIFO_WDATA_OFFSET,data[txLen++]);
+            timeoutCnt = UART_TX_TIMEOUT_COUNT;
+        }else{
+            timeoutCnt--;
+            if(timeoutCnt == 0){
+                return TIMEOUT;
+            }
+        }
+    }
+    
+    while(UART_GetTxBusBusyStatus(uartId) == SET){}
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  UART receive data from rx fifo
+ *
+ * @param  uartId: UART ID type
+ * @param  data: The receive data buffer
+ * @param  maxLen: The max length of the buffer
+ *
+ * @return The length of the received buffer
+ *
+*******************************************************************************/
+uint32_t UART_ReceiveData(UART_ID_Type uartId,uint8_t* data,uint32_t maxLen)
+{
+    uint32_t rxLen = 0;
+    uint32_t UARTx = uartAddr[uartId];
+
+    /* Check the parameter */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+
+    /* Receive data */
+    while(rxLen0){
+        data[rxLen++] = BL_RD_BYTE(UARTx+UART_FIFO_RDATA_OFFSET);
+    }
+
+    return rxLen;
+}
+
+/****************************************************************************//**
+ * @brief  UART get auto baud count value
+ *
+ * @param  uartId: UART ID type
+ * @param  autoBaudDet: Detection using codeword 0x55 or start bit
+ *
+ * @return Bit period of auto baudrate detection
+ *
+*******************************************************************************/
+uint16_t UART_GetAutoBaudCount(UART_ID_Type uartId,UART_AutoBaudDetection_Type autoBaudDet)
+{
+    uint32_t UARTx = uartAddr[uartId];
+
+    /* Check the parameter */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+    CHECK_PARAM(IS_UART_AUTOBAUDDETECTION_TYPE(autoBaudDet));
+
+    /* Select 0x55 or start bit detection value */
+    if(UART_AUTOBAUD_0X55 == autoBaudDet){
+        return BL_RD_REG(UARTx,UART_STS_URX_ABR_PRD)>>0x10&0xffff;
+    }else{
+        return BL_RD_REG(UARTx,UART_STS_URX_ABR_PRD)&0xffff;
+    }
+}
+
+/****************************************************************************//**
+ * @brief  UART get tx fifo unoccupied count value
+ *
+ * @param  uartId: UART ID type
+ *
+ * @return Tx fifo unoccupied count value
+ *
+*******************************************************************************/
+uint8_t UART_GetTxFifoCount(UART_ID_Type uartId)
+{
+    uint32_t UARTx = uartAddr[uartId];
+
+    /* Check the parameter */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+
+    return BL_GET_REG_BITS_VAL(BL_RD_REG(UARTx,UART_FIFO_CONFIG_1),UART_TX_FIFO_CNT);
+}
+
+/****************************************************************************//**
+ * @brief  UART get rx fifo occupied count value
+ *
+ * @param  uartId: UART ID type
+ *
+ * @return Rx fifo occupied count value
+ *
+*******************************************************************************/
+uint8_t UART_GetRxFifoCount(UART_ID_Type uartId)
+{
+    uint32_t UARTx = uartAddr[uartId];
+
+    /* Check the parameter */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+
+    return BL_GET_REG_BITS_VAL(BL_RD_REG(UARTx,UART_FIFO_CONFIG_1),UART_RX_FIFO_CNT);
+}
+
+/****************************************************************************//**
+ * @brief  Get uart interrupt status
+ *
+ * @param  uartId: UART ID type
+ * @param  intType: UART interrupt type
+ *
+ * @return Status of interrupt
+ *
+*******************************************************************************/
+BL_Sts_Type UART_GetIntStatus(UART_ID_Type uartId,UART_INT_Type intType)
+{
+    uint32_t tmpVal;
+    uint32_t UARTx = uartAddr[uartId];
+
+    /* Check the parameters */
+    CHECK_PARAM(IS_UART_ID_TYPE(uartId));
+    CHECK_PARAM(IS_UART_INT_TYPE(intType));
+
+    /* Get certain or all interrupt status */
+    tmpVal = BL_RD_REG(UARTx,UART_INT_STS);
+    if(UART_INT_ALL == intType){
+        if((tmpVal&0x1ff) != 0)
+        {
+            return SET;
+        }else{
+            return RESET;
+        }
+    }else{
+        if((tmpVal&(1U<
© COPYRIGHT(c) 2019 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "bl702_usb.h"
+#include "bl702_glb.h"
+#include "bl702_common.h"
+
+
+/** @addtogroup  BL70X_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  USB
+ *  @{
+ */
+
+/** @defgroup  USB_Private_Macros
+ *  @{
+ */
+
+/*@} end of group USB_Private_Macros */
+
+/** @defgroup  USB_Private_Types
+ *  @{
+ */
+
+/*@} end of group USB_Private_Types */
+
+/** @defgroup  USB_Private_Variables
+ *  @{
+ */
+
+/*@} end of group USB_Private_Variables */
+
+/** @defgroup  USB_Global_Variables
+ *  @{
+ */
+
+/*@} end of group USB_Global_Variables */
+
+/** @defgroup  USB_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group USB_Private_Fun_Declaration */
+
+/** @defgroup  USB_Private_Functions
+ *  @{
+ */
+
+/*@} end of group USB_Private_Functions */
+
+/** @defgroup  USB_Public_Functions
+ *  @{
+ */
+
+BL_Err_Type USB_Enable(void)
+{
+    uint32_t tmpVal = 0;
+    
+    tmpVal = BL_RD_REG(USB_BASE,USB_CONFIG);
+    tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_USB_EN);
+    BL_WR_REG(USB_BASE,USB_CONFIG,tmpVal);
+    
+    return SUCCESS;
+}
+
+BL_Err_Type USB_Disable(void)
+{
+    uint32_t tmpVal = 0;
+    
+    tmpVal = BL_RD_REG(USB_BASE,USB_CONFIG);
+    tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_USB_EN);
+    BL_WR_REG(USB_BASE,USB_CONFIG,tmpVal);
+    
+    return SUCCESS;
+}
+
+BL_Err_Type USB_Set_Config(BL_Fun_Type enable,USB_Config_Type * usbCfg)
+{
+    uint32_t tmpVal=0;
+    
+    /* disable USB first */
+    tmpVal = BL_RD_REG(USB_BASE,USB_CONFIG);
+    tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_USB_EN);
+    BL_WR_REG(USB_BASE,USB_CONFIG,tmpVal);
+    
+    /* USB config */
+    tmpVal = BL_RD_REG(USB_BASE,USB_CONFIG);
+    if(usbCfg->SoftwareCtrl==ENABLE){
+        tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_USB_EP0_SW_CTRL);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_USB_EP0_SW_ADDR,usbCfg->DeviceAddress);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_USB_EP0_SW_SIZE,usbCfg->EnumMaxPacketSize);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_USB_EP0_SW_NACK_IN,usbCfg->EnumInEn);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_USB_EP0_SW_NACK_OUT,usbCfg->EnumOutEn);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_USB_ROM_DCT_EN,usbCfg->RomBaseDescriptorUsed);
+    }else{
+        tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_USB_EP0_SW_CTRL);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_USB_ROM_DCT_EN,usbCfg->RomBaseDescriptorUsed);
+    }
+    BL_WR_REG(USB_BASE,USB_CONFIG,tmpVal);
+    
+    /* enable/disable USB */
+    tmpVal = BL_RD_REG(USB_BASE,USB_CONFIG);
+    if(enable){
+        tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_USB_EN);
+    }
+    BL_WR_REG(USB_BASE,USB_CONFIG,tmpVal);
+    
+    return SUCCESS;
+}
+
+BL_Err_Type USB_Set_Device_Addr(uint8_t addr)
+{
+    uint32_t tmpVal = 0;
+    
+    tmpVal = BL_RD_REG(USB_BASE,USB_CONFIG);
+    tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_USB_EP0_SW_ADDR,addr);
+    BL_WR_REG(USB_BASE,USB_CONFIG,tmpVal);
+    
+    return SUCCESS;
+}
+
+uint8_t USB_Get_Device_Addr(void)
+{
+    uint32_t tmpVal = 0;
+    
+    tmpVal = BL_RD_REG(USB_BASE,USB_CONFIG);
+    
+    return BL_GET_REG_BITS_VAL(tmpVal,USB_CR_USB_EP0_SW_ADDR);
+}
+
+BL_Err_Type USB_Set_EPx_Xfer_Size(USB_EP_ID epId,uint8_t size)
+{
+    uint32_t tmpVal = 0;
+    
+    if(epId == EP_ID0){
+        tmpVal = BL_RD_REG(USB_BASE,USB_CONFIG);
+        tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_USB_EP0_SW_SIZE,size);
+        BL_WR_REG(USB_BASE,USB_CONFIG,tmpVal);
+    }else{
+        switch(epId){
+            case EP_ID1:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP1_CONFIG);
+                tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP1_SIZE,size);
+                BL_WR_REG(USB_BASE,USB_EP1_CONFIG,tmpVal);
+                break;
+
+            case EP_ID2:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP2_CONFIG);
+                tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP2_SIZE,size);
+                BL_WR_REG(USB_BASE,USB_EP2_CONFIG,tmpVal);
+                break;
+
+            case EP_ID3:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP3_CONFIG);
+                tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP3_SIZE,size);
+                BL_WR_REG(USB_BASE,USB_EP3_CONFIG,tmpVal);
+                break;
+
+            case EP_ID4:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP4_CONFIG);
+                tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP4_SIZE,size);
+                BL_WR_REG(USB_BASE,USB_EP4_CONFIG,tmpVal);
+                break;
+
+            case EP_ID5:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP5_CONFIG);
+                tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP5_SIZE,size);
+                BL_WR_REG(USB_BASE,USB_EP5_CONFIG,tmpVal);
+                break;
+
+            case EP_ID6:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP6_CONFIG);
+                tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP6_SIZE,size);
+                BL_WR_REG(USB_BASE,USB_EP6_CONFIG,tmpVal);
+                break;
+
+            case EP_ID7:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP7_CONFIG);
+                tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP7_SIZE,size);
+                BL_WR_REG(USB_BASE,USB_EP7_CONFIG,tmpVal);
+                break;
+
+            default :
+                break;
+        }
+    }
+    
+    return SUCCESS;
+}
+
+BL_Err_Type USB_Set_EPx_IN_Busy(USB_EP_ID epId)
+{
+    uint32_t tmpVal = 0;
+    
+    if(epId == EP_ID0){
+        tmpVal = BL_RD_REG(USB_BASE,USB_CONFIG);
+        tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_USB_EP0_SW_NACK_IN);
+        tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_USB_EP0_SW_STALL);
+        BL_WR_REG(USB_BASE,USB_CONFIG,tmpVal);
+    }else{
+        switch(epId){
+            case EP_ID1:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP1_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP1_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP1_STALL);
+                BL_WR_REG(USB_BASE,USB_EP1_CONFIG,tmpVal);
+                break;
+
+            case EP_ID2:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP2_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP2_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP2_STALL);
+                BL_WR_REG(USB_BASE,USB_EP2_CONFIG,tmpVal);
+                break;
+
+            case EP_ID3:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP3_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP3_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP3_STALL);
+                BL_WR_REG(USB_BASE,USB_EP3_CONFIG,tmpVal);
+                break;
+
+            case EP_ID4:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP4_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP4_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP4_STALL);
+                BL_WR_REG(USB_BASE,USB_EP4_CONFIG,tmpVal);
+                break;
+
+            case EP_ID5:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP5_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP5_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP5_STALL);
+                BL_WR_REG(USB_BASE,USB_EP5_CONFIG,tmpVal);
+                break;
+
+            case EP_ID6:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP6_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP6_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP6_STALL);
+                BL_WR_REG(USB_BASE,USB_EP6_CONFIG,tmpVal);
+                break;
+
+            case EP_ID7:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP7_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP7_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP7_STALL);
+                BL_WR_REG(USB_BASE,USB_EP7_CONFIG,tmpVal);
+                break;
+
+            default :
+                break;
+        }
+    }
+    
+    return SUCCESS;
+}
+
+BL_Err_Type USB_Set_EPx_IN_Stall(USB_EP_ID epId)
+{
+    uint32_t tmpVal = 0;
+    
+    if(epId == EP_ID0){
+        tmpVal = BL_RD_REG(USB_BASE,USB_CONFIG);
+        tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_USB_EP0_SW_NACK_OUT);
+        tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_USB_EP0_SW_NACK_IN);
+        tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_USB_EP0_SW_STALL);
+        BL_WR_REG(USB_BASE,USB_CONFIG,tmpVal);
+    }else{
+        switch(epId){
+            case EP_ID1:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP1_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP1_NACK);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP1_STALL);
+                BL_WR_REG(USB_BASE,USB_EP1_CONFIG,tmpVal);
+                break;
+
+            case EP_ID2:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP2_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP2_NACK);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP2_STALL);
+                BL_WR_REG(USB_BASE,USB_EP2_CONFIG,tmpVal);
+                break;
+
+            case EP_ID3:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP3_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP3_NACK);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP3_STALL);
+                BL_WR_REG(USB_BASE,USB_EP3_CONFIG,tmpVal);
+                break;
+
+            case EP_ID4:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP4_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP4_NACK);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP4_STALL);
+                BL_WR_REG(USB_BASE,USB_EP4_CONFIG,tmpVal);
+                break;
+
+            case EP_ID5:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP5_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP5_NACK);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP5_STALL);
+                BL_WR_REG(USB_BASE,USB_EP5_CONFIG,tmpVal);
+                break;
+
+            case EP_ID6:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP6_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP6_NACK);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP6_STALL);
+                BL_WR_REG(USB_BASE,USB_EP6_CONFIG,tmpVal);
+                break;
+
+            case EP_ID7:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP7_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP7_NACK);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP7_STALL);
+                BL_WR_REG(USB_BASE,USB_EP7_CONFIG,tmpVal);
+                break;
+
+            default :
+                break;
+        }
+    }
+    
+    return SUCCESS;
+}
+
+BL_Err_Type USB_Set_EPx_OUT_Busy(USB_EP_ID epId)
+{
+    uint32_t tmpVal = 0;
+    
+    if(epId == EP_ID0){
+        tmpVal = BL_RD_REG(USB_BASE,USB_CONFIG);
+        tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_USB_EP0_SW_NACK_OUT);
+        tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_USB_EP0_SW_STALL);
+        BL_WR_REG(USB_BASE,USB_CONFIG,tmpVal);
+    }else{
+        switch(epId){
+            case EP_ID1:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP1_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP1_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP1_STALL);
+                BL_WR_REG(USB_BASE,USB_EP1_CONFIG,tmpVal);
+                break;
+
+            case EP_ID2:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP2_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP2_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP2_STALL);
+                BL_WR_REG(USB_BASE,USB_EP2_CONFIG,tmpVal);
+                break;
+
+            case EP_ID3:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP3_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP3_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP3_STALL);
+                BL_WR_REG(USB_BASE,USB_EP3_CONFIG,tmpVal);
+                break;
+
+            case EP_ID4:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP4_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP4_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP4_STALL);
+                BL_WR_REG(USB_BASE,USB_EP4_CONFIG,tmpVal);
+                break;
+
+            case EP_ID5:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP5_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP5_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP5_STALL);
+                BL_WR_REG(USB_BASE,USB_EP5_CONFIG,tmpVal);
+                break;
+
+            case EP_ID6:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP6_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP6_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP6_STALL);
+                BL_WR_REG(USB_BASE,USB_EP6_CONFIG,tmpVal);
+                break;
+
+            case EP_ID7:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP7_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP7_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP7_STALL);
+                BL_WR_REG(USB_BASE,USB_EP7_CONFIG,tmpVal);
+                break;
+
+            default :
+                break;
+        }
+    }
+    
+    return SUCCESS;
+}
+
+BL_Err_Type USB_Set_EPx_OUT_Stall(USB_EP_ID epId)
+{
+    uint32_t tmpVal = 0;
+    
+    if(epId == EP_ID0){
+        tmpVal = BL_RD_REG(USB_BASE,USB_CONFIG);
+        tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_USB_EP0_SW_NACK_OUT);
+        tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_USB_EP0_SW_NACK_IN);
+        tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_USB_EP0_SW_STALL);
+        BL_WR_REG(USB_BASE,USB_CONFIG,tmpVal);
+    }else{
+        switch(epId){
+            case EP_ID1:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP1_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP1_NACK);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP1_STALL);
+                BL_WR_REG(USB_BASE,USB_EP1_CONFIG,tmpVal);
+                break;
+
+            case EP_ID2:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP2_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP2_NACK);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP2_STALL);
+                BL_WR_REG(USB_BASE,USB_EP2_CONFIG,tmpVal);
+                break;
+
+            case EP_ID3:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP3_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP3_NACK);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP3_STALL);
+                BL_WR_REG(USB_BASE,USB_EP3_CONFIG,tmpVal);
+                break;
+
+            case EP_ID4:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP4_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP4_NACK);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP4_STALL);
+                BL_WR_REG(USB_BASE,USB_EP4_CONFIG,tmpVal);
+                break;
+
+            case EP_ID5:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP5_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP5_NACK);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP5_STALL);
+                BL_WR_REG(USB_BASE,USB_EP5_CONFIG,tmpVal);
+                break;
+
+            case EP_ID6:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP6_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP6_NACK);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP6_STALL);
+                BL_WR_REG(USB_BASE,USB_EP6_CONFIG,tmpVal);
+                break;
+
+            case EP_ID7:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP7_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP7_NACK);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP7_STALL);
+                BL_WR_REG(USB_BASE,USB_EP7_CONFIG,tmpVal);
+                break;
+
+            default :
+                break;
+        }
+    }
+    
+    return SUCCESS;
+}
+
+BL_Err_Type USB_Set_EPx_Rdy(USB_EP_ID epId)
+{
+    uint32_t tmpVal = 0;
+    
+    if(epId == EP_ID0){
+        tmpVal = BL_RD_REG(USB_BASE,USB_CONFIG);
+        tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_USB_EP0_SW_RDY);
+        tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_USB_EP0_SW_NACK_OUT);
+        tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_USB_EP0_SW_NACK_IN);
+        tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_USB_EP0_SW_STALL);
+        BL_WR_REG(USB_BASE,USB_CONFIG,tmpVal);
+    }else{
+        switch(epId){
+            case EP_ID1:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP1_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP1_RDY);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP1_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP1_STALL);
+                BL_WR_REG(USB_BASE,USB_EP1_CONFIG,tmpVal);
+                break;
+
+            case EP_ID2:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP2_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP2_RDY);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP2_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP2_STALL);
+                BL_WR_REG(USB_BASE,USB_EP2_CONFIG,tmpVal);
+                break;
+
+            case EP_ID3:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP3_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP3_RDY);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP3_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP3_STALL);
+                BL_WR_REG(USB_BASE,USB_EP3_CONFIG,tmpVal);
+                break;
+
+            case EP_ID4:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP4_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP4_RDY);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP4_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP4_STALL);
+                BL_WR_REG(USB_BASE,USB_EP4_CONFIG,tmpVal);
+                break;
+
+            case EP_ID5:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP5_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP5_RDY);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP5_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP5_STALL);
+                BL_WR_REG(USB_BASE,USB_EP5_CONFIG,tmpVal);
+                break;
+
+            case EP_ID6:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP6_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP6_RDY);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP6_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP6_STALL);
+                BL_WR_REG(USB_BASE,USB_EP6_CONFIG,tmpVal);
+                break;
+
+            case EP_ID7:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP7_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP7_RDY);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP7_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP7_STALL);
+                BL_WR_REG(USB_BASE,USB_EP7_CONFIG,tmpVal);
+                break;
+
+            default :
+                break;
+        }
+    }
+    
+    return SUCCESS;
+}
+
+BL_Sts_Type USB_Is_EPx_RDY_Free(USB_EP_ID epId)
+{
+    uint32_t tmpVal = 0;
+
+    if(epId == EP_ID0){
+        tmpVal = BL_RD_REG(USB_BASE,USB_CONFIG);
+        tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_STS_USB_EP0_SW_RDY);
+    }else{
+        switch(epId){
+            case EP_ID1:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP1_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_STS_EP1_RDY);
+                break;
+
+            case EP_ID2:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP2_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_STS_EP2_RDY);
+                break;
+
+            case EP_ID3:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP3_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_STS_EP3_RDY);
+                break;
+
+            case EP_ID4:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP4_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_STS_EP4_RDY);
+                break;
+
+            case EP_ID5:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP5_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_STS_EP5_RDY);
+                break;
+
+            case EP_ID6:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP6_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_STS_EP6_RDY);
+                break;
+
+            case EP_ID7:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP7_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_STS_EP7_RDY);
+                break;
+
+            default :
+                break;
+        }
+    }
+
+    return tmpVal?RESET:SET;
+}
+
+BL_Err_Type USB_Set_EPx_STALL(USB_EP_ID epId)
+{
+    uint32_t tmpVal = 0;
+    
+    if(epId == EP_ID0){
+        tmpVal = BL_RD_REG(USB_BASE,USB_CONFIG);
+        tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_USB_EP0_SW_STALL);
+        BL_WR_REG(USB_BASE,USB_CONFIG,tmpVal);
+    }else{
+        switch(epId){
+            case EP_ID1:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP1_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP1_STALL);
+                BL_WR_REG(USB_BASE,USB_EP1_CONFIG,tmpVal);
+                break;
+
+            case EP_ID2:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP2_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP2_STALL);
+                BL_WR_REG(USB_BASE,USB_EP2_CONFIG,tmpVal);
+                break;
+
+            case EP_ID3:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP3_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP3_STALL);
+                BL_WR_REG(USB_BASE,USB_EP3_CONFIG,tmpVal);
+                break;
+
+            case EP_ID4:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP4_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP4_STALL);
+                BL_WR_REG(USB_BASE,USB_EP4_CONFIG,tmpVal);
+                break;
+
+            case EP_ID5:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP5_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP5_STALL);
+                BL_WR_REG(USB_BASE,USB_EP5_CONFIG,tmpVal);
+                break;
+
+            case EP_ID6:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP6_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP6_STALL);
+                BL_WR_REG(USB_BASE,USB_EP6_CONFIG,tmpVal);
+                break;
+
+            case EP_ID7:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP7_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP7_STALL);
+                BL_WR_REG(USB_BASE,USB_EP7_CONFIG,tmpVal);
+                break;
+
+            default :
+                break;
+        }
+    }
+    
+    return SUCCESS;
+}
+
+BL_Err_Type USB_Clr_EPx_STALL(USB_EP_ID epId)
+{
+    uint32_t tmpVal = 0;
+    
+    if(epId == EP_ID0){
+        return SUCCESS;
+    }else{
+        switch(epId){
+            case EP_ID1:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP1_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP1_STALL);
+                BL_WR_REG(USB_BASE,USB_EP1_CONFIG,tmpVal);
+                break;
+
+            case EP_ID2:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP2_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP2_STALL);
+                BL_WR_REG(USB_BASE,USB_EP2_CONFIG,tmpVal);
+                break;
+
+            case EP_ID3:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP3_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP3_STALL);
+                BL_WR_REG(USB_BASE,USB_EP3_CONFIG,tmpVal);
+                break;
+
+            case EP_ID4:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP4_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP4_STALL);
+                BL_WR_REG(USB_BASE,USB_EP4_CONFIG,tmpVal);
+                break;
+
+            case EP_ID5:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP5_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP5_STALL);
+                BL_WR_REG(USB_BASE,USB_EP5_CONFIG,tmpVal);
+                break;
+
+            case EP_ID6:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP6_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP6_STALL);
+                BL_WR_REG(USB_BASE,USB_EP6_CONFIG,tmpVal);
+                break;
+
+            case EP_ID7:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP7_CONFIG);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP7_STALL);
+                BL_WR_REG(USB_BASE,USB_EP7_CONFIG,tmpVal);
+                break;
+
+            default :
+                break;
+        }
+    }
+    
+    return SUCCESS;
+}
+
+BL_Err_Type USB_Set_EPx_Busy(USB_EP_ID epId)
+{
+    uint32_t tmpVal = 0;
+    
+    if(epId == EP_ID0){
+        tmpVal = BL_RD_REG(USB_BASE,USB_CONFIG);
+        tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_USB_EP0_SW_NACK_IN);
+        tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_USB_EP0_SW_NACK_OUT);
+        BL_WR_REG(USB_BASE,USB_CONFIG,tmpVal);
+    }else{
+        switch(epId){
+            case EP_ID1:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP1_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP1_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP1_STALL);
+                BL_WR_REG(USB_BASE,USB_EP1_CONFIG,tmpVal);
+                break;
+
+            case EP_ID2:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP2_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP2_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP2_STALL);
+                BL_WR_REG(USB_BASE,USB_EP2_CONFIG,tmpVal);
+                break;
+
+            case EP_ID3:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP3_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP3_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP3_STALL);
+                BL_WR_REG(USB_BASE,USB_EP3_CONFIG,tmpVal);
+                break;
+
+            case EP_ID4:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP4_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP4_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP4_STALL);
+                BL_WR_REG(USB_BASE,USB_EP4_CONFIG,tmpVal);
+                break;
+
+            case EP_ID5:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP5_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP5_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP5_STALL);
+                BL_WR_REG(USB_BASE,USB_EP5_CONFIG,tmpVal);
+                break;
+
+            case EP_ID6:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP6_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP6_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP6_STALL);
+                BL_WR_REG(USB_BASE,USB_EP6_CONFIG,tmpVal);
+                break;
+
+            case EP_ID7:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP7_CONFIG);
+                tmpVal = BL_SET_REG_BIT(tmpVal,USB_CR_EP7_NACK);
+                tmpVal = BL_CLR_REG_BIT(tmpVal,USB_CR_EP7_STALL);
+                BL_WR_REG(USB_BASE,USB_EP7_CONFIG,tmpVal);
+                break;
+
+            default :
+                break;
+        }
+    }
+    
+    return SUCCESS;
+}
+
+BL_Err_Type USB_Set_EPx_Status(USB_EP_ID epId,USB_EP_STATUS_Type sts)
+{
+    switch(sts){
+        case USB_EP_STATUS_ACK:
+            USB_Set_EPx_Rdy(epId);
+            break;
+        case USB_EP_STATUS_NACK:
+            USB_Set_EPx_Busy(epId);
+            break;
+        case USB_EP_STATUS_STALL:
+            USB_Set_EPx_STALL(epId);
+            break;
+        case USB_EP_STATUS_NSTALL:
+            USB_Clr_EPx_STALL(epId);
+            break;
+        default :
+            break;
+    }
+    
+    return SUCCESS;
+}
+
+USB_EP_STATUS_Type USB_Get_EPx_Status(USB_EP_ID epId)
+{
+    uint32_t tmpVal = 0;
+    
+    if(epId == EP_ID0){
+        tmpVal = BL_RD_REG(USB_BASE,USB_CONFIG);
+        switch((tmpVal>>24)&0x7){
+            case 0:
+                return USB_EP_STATUS_ACK;
+            case 1:
+                return USB_EP_STATUS_STALL;
+            case 2:
+            case 4:
+            case 6:
+                return USB_EP_STATUS_NACK;
+            default :
+                break;
+        }
+    }else{
+        switch(epId){
+            case EP_ID1:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP1_CONFIG);
+                break;
+
+            case EP_ID2:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP2_CONFIG);
+                break;
+
+            case EP_ID3:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP3_CONFIG);
+                break;
+
+            case EP_ID4:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP4_CONFIG);
+                break;
+
+            case EP_ID5:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP5_CONFIG);
+                break;
+
+            case EP_ID6:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP6_CONFIG);
+                break;
+
+            case EP_ID7:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP7_CONFIG);
+                break;
+
+            default :
+                tmpVal = 0;
+                break;
+        }
+        switch((tmpVal>>14)&0x3){
+            case 0:
+                return USB_EP_STATUS_ACK;
+            case 1:
+                return USB_EP_STATUS_STALL;
+            case 2:
+                return USB_EP_STATUS_NACK;
+            case 3:
+            default :
+                break;
+        }
+    }
+    
+    return USB_EP_STATUS_NSTALL;
+}
+
+BL_Err_Type USB_IntEn(USB_INT_Type intType,uint8_t enable)
+{
+    uint32_t tmpVal = 0;
+    
+    if(USB_INT_ALL==intType){
+        if(enable){
+            BL_WR_REG(USB_BASE,USB_INT_EN,USB_INT_TYPE_ALL);
+        }else{
+            BL_WR_REG(USB_BASE,USB_INT_EN,~USB_INT_TYPE_ALL);
+        }
+        
+        return SUCCESS;
+    }
+    
+    tmpVal = BL_RD_REG(USB_BASE,USB_INT_EN);
+    if(enable){
+        tmpVal |= (1<type);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP1_DIR,epCfg->dir);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP1_SIZE,epCfg->EPMaxPacketSize);
+            BL_WR_REG(USB_BASE,USB_EP1_CONFIG,tmpVal);
+            break;
+
+        case EP_ID2:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP2_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP2_TYPE,epCfg->type);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP2_DIR,epCfg->dir);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP2_SIZE,epCfg->EPMaxPacketSize);
+            BL_WR_REG(USB_BASE,USB_EP2_CONFIG,tmpVal);
+            break;
+
+        case EP_ID3:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP3_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP3_TYPE,epCfg->type);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP3_DIR,epCfg->dir);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP3_SIZE,epCfg->EPMaxPacketSize);
+            BL_WR_REG(USB_BASE,USB_EP3_CONFIG,tmpVal);
+            break;
+
+        case EP_ID4:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP4_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP4_TYPE,epCfg->type);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP4_DIR,epCfg->dir);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP4_SIZE,epCfg->EPMaxPacketSize);
+            BL_WR_REG(USB_BASE,USB_EP4_CONFIG,tmpVal);
+            break;
+
+        case EP_ID5:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP5_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP5_TYPE,epCfg->type);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP5_DIR,epCfg->dir);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP5_SIZE,epCfg->EPMaxPacketSize);
+            BL_WR_REG(USB_BASE,USB_EP5_CONFIG,tmpVal);
+            break;
+
+        case EP_ID6:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP6_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP6_TYPE,epCfg->type);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP6_DIR,epCfg->dir);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP6_SIZE,epCfg->EPMaxPacketSize);
+            BL_WR_REG(USB_BASE,USB_EP6_CONFIG,tmpVal);
+            break;
+
+        case EP_ID7:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP7_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP7_TYPE,epCfg->type);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP7_DIR,epCfg->dir);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP7_SIZE,epCfg->EPMaxPacketSize);
+            BL_WR_REG(USB_BASE,USB_EP7_CONFIG,tmpVal);
+            break;
+
+        default :
+            break;
+    }
+
+    return SUCCESS;
+}
+
+BL_Err_Type USB_Set_EPx_Type(USB_EP_ID epId,EP_XFER_Type type)
+{
+    uint32_t tmpVal = 0;
+
+    if(epId == EP_ID0){
+        return ERROR;
+    }
+    switch(epId){
+        case EP_ID1:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP1_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP1_TYPE,type);
+            BL_WR_REG(USB_BASE,USB_EP1_CONFIG,tmpVal);
+            break;
+
+        case EP_ID2:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP2_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP2_TYPE,type);
+            BL_WR_REG(USB_BASE,USB_EP2_CONFIG,tmpVal);
+            break;
+
+        case EP_ID3:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP3_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP3_TYPE,type);
+            BL_WR_REG(USB_BASE,USB_EP3_CONFIG,tmpVal);
+            break;
+
+        case EP_ID4:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP4_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP4_TYPE,type);
+            BL_WR_REG(USB_BASE,USB_EP4_CONFIG,tmpVal);
+            break;
+
+        case EP_ID5:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP5_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP5_TYPE,type);
+            BL_WR_REG(USB_BASE,USB_EP5_CONFIG,tmpVal);
+            break;
+
+        case EP_ID6:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP6_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP6_TYPE,type);
+            BL_WR_REG(USB_BASE,USB_EP6_CONFIG,tmpVal);
+            break;
+
+        case EP_ID7:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP7_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP7_TYPE,type);
+            BL_WR_REG(USB_BASE,USB_EP7_CONFIG,tmpVal);
+            break;
+
+        default :
+            break;
+    }
+
+    return SUCCESS;
+}
+
+EP_XFER_Type USB_Get_EPx_Type(USB_EP_ID epId)
+{
+    uint32_t tmpVal = 0;
+
+    if(epId == EP_ID0){
+        return EP_CTRL;
+    }
+    switch(epId){
+        case EP_ID1:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP1_CONFIG);
+            tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_CR_EP1_TYPE);
+            break;
+
+        case EP_ID2:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP2_CONFIG);
+            tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_CR_EP2_TYPE);
+            break;
+
+        case EP_ID3:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP3_CONFIG);
+            tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_CR_EP3_TYPE);
+            break;
+
+        case EP_ID4:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP4_CONFIG);
+            tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_CR_EP4_TYPE);
+            break;
+
+        case EP_ID5:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP5_CONFIG);
+            tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_CR_EP5_TYPE);
+            break;
+
+        case EP_ID6:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP6_CONFIG);
+            tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_CR_EP6_TYPE);
+            break;
+
+        case EP_ID7:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP7_CONFIG);
+            tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_CR_EP7_TYPE);
+            break;
+
+        default :
+            break;
+    }
+
+    return (EP_XFER_Type)tmpVal;
+}
+
+BL_Err_Type USB_Set_EPx_Dir(USB_EP_ID epId,EP_XFER_DIR dir)
+{
+    uint32_t tmpVal = 0;
+
+    if(epId == EP_ID0){
+        return ERROR;
+    }
+    switch(epId){
+        case EP_ID1:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP1_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP1_DIR,dir);
+            BL_WR_REG(USB_BASE,USB_EP1_CONFIG,tmpVal);
+            break;
+
+        case EP_ID2:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP2_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP2_DIR,dir);
+            BL_WR_REG(USB_BASE,USB_EP2_CONFIG,tmpVal);
+            break;
+
+        case EP_ID3:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP3_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP3_DIR,dir);
+            BL_WR_REG(USB_BASE,USB_EP3_CONFIG,tmpVal);
+            break;
+
+        case EP_ID4:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP4_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP4_DIR,dir);
+            BL_WR_REG(USB_BASE,USB_EP4_CONFIG,tmpVal);
+            break;
+
+        case EP_ID5:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP5_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP5_DIR,dir);
+            BL_WR_REG(USB_BASE,USB_EP5_CONFIG,tmpVal);
+            break;
+
+        case EP_ID6:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP6_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP6_DIR,dir);
+            BL_WR_REG(USB_BASE,USB_EP6_CONFIG,tmpVal);
+            break;
+
+        case EP_ID7:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP7_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP7_DIR,dir);
+            BL_WR_REG(USB_BASE,USB_EP7_CONFIG,tmpVal);
+            break;
+
+        default :
+            break;
+    }
+
+    return SUCCESS;
+}
+
+EP_XFER_DIR USB_Get_EPx_Dir(USB_EP_ID epId)
+{
+    uint32_t tmpVal = 0;
+
+    if(epId == EP_ID0){
+        return EP_DISABLED;
+    }
+    switch(epId){
+        case EP_ID1:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP1_CONFIG);
+            tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_CR_EP1_DIR);
+            break;
+
+        case EP_ID2:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP2_CONFIG);
+            tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_CR_EP2_DIR);
+            break;
+
+        case EP_ID3:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP3_CONFIG);
+            tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_CR_EP3_DIR);
+            break;
+
+        case EP_ID4:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP4_CONFIG);
+            tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_CR_EP4_DIR);
+            break;
+
+        case EP_ID5:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP5_CONFIG);
+            tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_CR_EP5_DIR);
+            break;
+
+        case EP_ID6:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP6_CONFIG);
+            tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_CR_EP6_DIR);
+            break;
+
+        case EP_ID7:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP7_CONFIG);
+            tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_CR_EP7_DIR);
+            break;
+
+        default :
+            break;
+    }
+
+    return (EP_XFER_DIR)tmpVal;
+}
+
+BL_Err_Type USB_Set_EPx_Size(USB_EP_ID epId,uint32_t size)
+{
+    uint32_t tmpVal = 0;
+
+    switch(epId){
+        case EP_ID0:
+            tmpVal = BL_RD_REG(USB_BASE,USB_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_USB_EP0_SW_SIZE,size);
+            BL_WR_REG(USB_BASE,USB_CONFIG,tmpVal);
+            break;
+
+        case EP_ID1:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP1_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP1_SIZE,size);
+            BL_WR_REG(USB_BASE,USB_EP1_CONFIG,tmpVal);
+            break;
+
+        case EP_ID2:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP2_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP2_SIZE,size);
+            BL_WR_REG(USB_BASE,USB_EP2_CONFIG,tmpVal);
+            break;
+
+        case EP_ID3:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP3_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP3_SIZE,size);
+            BL_WR_REG(USB_BASE,USB_EP3_CONFIG,tmpVal);
+            break;
+
+        case EP_ID4:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP4_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP4_SIZE,size);
+            BL_WR_REG(USB_BASE,USB_EP4_CONFIG,tmpVal);
+            break;
+
+        case EP_ID5:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP5_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP5_SIZE,size);
+            BL_WR_REG(USB_BASE,USB_EP5_CONFIG,tmpVal);
+            break;
+
+        case EP_ID6:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP6_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP6_SIZE,size);
+            BL_WR_REG(USB_BASE,USB_EP6_CONFIG,tmpVal);
+            break;
+
+        case EP_ID7:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP7_CONFIG);
+            tmpVal = BL_SET_REG_BITS_VAL(tmpVal,USB_CR_EP7_SIZE,size);
+            BL_WR_REG(USB_BASE,USB_EP7_CONFIG,tmpVal);
+            break;
+
+        default :
+            break;
+    }
+
+    return SUCCESS;
+}
+
+BL_Sts_Type USB_Get_EPx_TX_FIFO_Errors(USB_EP_ID epId,USB_FIFO_ERROR_FLAG_Type errFlag)
+{
+    uint32_t tmpVal = 0;
+
+    if(errFlag == USB_FIFO_ERROR_OVERFLOW){
+        switch(epId){
+            case EP_ID0:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP0_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP0_TX_FIFO_OVERFLOW);
+                break;
+
+            case EP_ID1:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP1_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP1_TX_FIFO_OVERFLOW);
+                break;
+
+            case EP_ID2:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP2_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP2_TX_FIFO_OVERFLOW);
+                break;
+
+            case EP_ID3:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP3_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP3_TX_FIFO_OVERFLOW);
+                break;
+
+            case EP_ID4:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP4_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP4_TX_FIFO_OVERFLOW);
+                break;
+
+            case EP_ID5:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP5_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP5_TX_FIFO_OVERFLOW);
+                break;
+
+            case EP_ID6:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP6_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP6_TX_FIFO_OVERFLOW);
+                break;
+
+            case EP_ID7:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP7_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP7_TX_FIFO_OVERFLOW);
+                break;
+
+            default :
+                tmpVal = 0;
+                break;
+        }
+    }else{
+        switch(epId){
+            case EP_ID0:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP0_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP0_TX_FIFO_UNDERFLOW);
+                break;
+
+            case EP_ID1:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP1_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP1_TX_FIFO_UNDERFLOW);
+                break;
+
+            case EP_ID2:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP2_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP2_TX_FIFO_UNDERFLOW);
+                break;
+
+            case EP_ID3:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP3_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP3_TX_FIFO_UNDERFLOW);
+                break;
+
+            case EP_ID4:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP4_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP4_TX_FIFO_UNDERFLOW);
+                break;
+
+            case EP_ID5:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP5_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP5_TX_FIFO_UNDERFLOW);
+                break;
+
+            case EP_ID6:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP6_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP6_TX_FIFO_UNDERFLOW);
+                break;
+
+            case EP_ID7:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP7_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP7_TX_FIFO_UNDERFLOW);
+                break;
+
+            default :
+                tmpVal = 0;
+                break;
+        }
+    }
+    return tmpVal?SET:RESET;
+}
+
+BL_Sts_Type USB_Get_EPx_RX_FIFO_Errors(USB_EP_ID epId,USB_FIFO_ERROR_FLAG_Type errFlag)
+{
+    uint32_t tmpVal = 0;
+
+    if(errFlag == USB_FIFO_ERROR_OVERFLOW){
+        switch(epId){
+            case EP_ID0:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP0_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP0_RX_FIFO_OVERFLOW);
+                break;
+
+            case EP_ID1:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP1_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP1_RX_FIFO_OVERFLOW);
+                break;
+
+            case EP_ID2:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP2_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP2_RX_FIFO_OVERFLOW);
+                break;
+
+            case EP_ID3:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP3_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP3_RX_FIFO_OVERFLOW);
+                break;
+
+            case EP_ID4:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP4_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP4_RX_FIFO_OVERFLOW);
+                break;
+
+            case EP_ID5:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP5_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP5_RX_FIFO_OVERFLOW);
+                break;
+
+            case EP_ID6:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP6_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP6_RX_FIFO_OVERFLOW);
+                break;
+
+            case EP_ID7:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP7_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP7_RX_FIFO_OVERFLOW);
+                break;
+
+            default :
+                tmpVal = 0;
+                break;
+        }
+    }else{
+        switch(epId){
+            case EP_ID0:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP0_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP0_RX_FIFO_UNDERFLOW);
+                break;
+
+            case EP_ID1:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP1_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP1_RX_FIFO_UNDERFLOW);
+                break;
+
+            case EP_ID2:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP2_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP2_RX_FIFO_UNDERFLOW);
+                break;
+
+            case EP_ID3:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP3_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP3_RX_FIFO_UNDERFLOW);
+                break;
+
+            case EP_ID4:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP4_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP4_RX_FIFO_UNDERFLOW);
+                break;
+
+            case EP_ID5:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP5_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP5_RX_FIFO_UNDERFLOW);
+                break;
+
+            case EP_ID6:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP6_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP6_RX_FIFO_UNDERFLOW);
+                break;
+
+            case EP_ID7:
+                tmpVal = BL_RD_REG(USB_BASE,USB_EP7_FIFO_CONFIG);
+                tmpVal = BL_GET_REG_BITS_VAL(tmpVal,USB_EP7_RX_FIFO_UNDERFLOW);
+                break;
+
+            default :
+                tmpVal = 0;
+                break;
+        }
+    }
+    return tmpVal?SET:RESET;
+}
+
+BL_Err_Type USB_Clr_EPx_TX_FIFO_Errors(USB_EP_ID epId)
+{
+    uint32_t tmpVal = 0;
+
+    switch(epId){
+        case EP_ID0:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP0_FIFO_CONFIG);
+            tmpVal = BL_SET_REG_BIT(tmpVal,USB_EP0_TX_FIFO_CLR);
+            BL_WR_REG(USB_BASE,USB_EP0_FIFO_CONFIG,tmpVal);
+            break;
+
+        case EP_ID1:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP1_FIFO_CONFIG);
+            tmpVal = BL_SET_REG_BIT(tmpVal,USB_EP1_TX_FIFO_CLR);
+            BL_WR_REG(USB_BASE,USB_EP1_FIFO_CONFIG,tmpVal);
+            break;
+
+        case EP_ID2:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP2_FIFO_CONFIG);
+            tmpVal = BL_SET_REG_BIT(tmpVal,USB_EP2_TX_FIFO_CLR);
+            BL_WR_REG(USB_BASE,USB_EP2_FIFO_CONFIG,tmpVal);
+            break;
+
+        case EP_ID3:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP3_FIFO_CONFIG);
+            tmpVal = BL_SET_REG_BIT(tmpVal,USB_EP3_TX_FIFO_CLR);
+            BL_WR_REG(USB_BASE,USB_EP3_FIFO_CONFIG,tmpVal);
+            break;
+
+        case EP_ID4:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP4_FIFO_CONFIG);
+            tmpVal = BL_SET_REG_BIT(tmpVal,USB_EP4_TX_FIFO_CLR);
+            BL_WR_REG(USB_BASE,USB_EP4_FIFO_CONFIG,tmpVal);
+            break;
+
+        case EP_ID5:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP5_FIFO_CONFIG);
+            tmpVal = BL_SET_REG_BIT(tmpVal,USB_EP5_TX_FIFO_CLR);
+            BL_WR_REG(USB_BASE,USB_EP5_FIFO_CONFIG,tmpVal);
+            break;
+
+        case EP_ID6:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP6_FIFO_CONFIG);
+            tmpVal = BL_SET_REG_BIT(tmpVal,USB_EP6_TX_FIFO_CLR);
+            BL_WR_REG(USB_BASE,USB_EP6_FIFO_CONFIG,tmpVal);
+            break;
+
+        case EP_ID7:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP7_FIFO_CONFIG);
+            tmpVal = BL_SET_REG_BIT(tmpVal,USB_EP7_TX_FIFO_CLR);
+            BL_WR_REG(USB_BASE,USB_EP7_FIFO_CONFIG,tmpVal);
+            break;
+
+        default :
+            break;
+    }
+    
+    return SUCCESS;
+}
+
+BL_Err_Type USB_Clr_EPx_RX_FIFO_Errors(USB_EP_ID epId)
+{
+    uint32_t tmpVal = 0;
+
+    switch(epId){
+        case EP_ID0:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP0_FIFO_CONFIG);
+            tmpVal = BL_SET_REG_BIT(tmpVal,USB_EP0_RX_FIFO_CLR);
+            BL_WR_REG(USB_BASE,USB_EP0_FIFO_CONFIG,tmpVal);
+            break;
+
+        case EP_ID1:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP1_FIFO_CONFIG);
+            tmpVal = BL_SET_REG_BIT(tmpVal,USB_EP1_RX_FIFO_CLR);
+            BL_WR_REG(USB_BASE,USB_EP1_FIFO_CONFIG,tmpVal);
+            break;
+
+        case EP_ID2:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP2_FIFO_CONFIG);
+            tmpVal = BL_SET_REG_BIT(tmpVal,USB_EP2_RX_FIFO_CLR);
+            BL_WR_REG(USB_BASE,USB_EP2_FIFO_CONFIG,tmpVal);
+            break;
+
+        case EP_ID3:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP3_FIFO_CONFIG);
+            tmpVal = BL_SET_REG_BIT(tmpVal,USB_EP3_RX_FIFO_CLR);
+            BL_WR_REG(USB_BASE,USB_EP3_FIFO_CONFIG,tmpVal);
+            break;
+
+        case EP_ID4:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP4_FIFO_CONFIG);
+            tmpVal = BL_SET_REG_BIT(tmpVal,USB_EP4_RX_FIFO_CLR);
+            BL_WR_REG(USB_BASE,USB_EP4_FIFO_CONFIG,tmpVal);
+            break;
+
+        case EP_ID5:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP5_FIFO_CONFIG);
+            tmpVal = BL_SET_REG_BIT(tmpVal,USB_EP5_RX_FIFO_CLR);
+            BL_WR_REG(USB_BASE,USB_EP5_FIFO_CONFIG,tmpVal);
+            break;
+
+        case EP_ID6:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP6_FIFO_CONFIG);
+            tmpVal = BL_SET_REG_BIT(tmpVal,USB_EP6_RX_FIFO_CLR);
+            BL_WR_REG(USB_BASE,USB_EP6_FIFO_CONFIG,tmpVal);
+            break;
+
+        case EP_ID7:
+            tmpVal = BL_RD_REG(USB_BASE,USB_EP7_FIFO_CONFIG);
+            tmpVal = BL_SET_REG_BIT(tmpVal,USB_EP7_RX_FIFO_CLR);
+            BL_WR_REG(USB_BASE,USB_EP7_FIFO_CONFIG,tmpVal);
+            break;
+
+        default :
+            break;
+    }
+    
+    return SUCCESS;
+}
+
+
+
+
+
+BL_Err_Type USB_EPx_Write_Data_To_FIFO(USB_EP_ID epId,uint8_t *pData,uint16_t len)
+{
+    uint32_t timeout = 0x00FFFFFF;
+
+    while((!USB_Is_EPx_RDY_Free(epId))&&timeout){
+        timeout--;
+    }
+    if(!timeout){
+        return ERROR;
+    }
+    if(len==1){
+        USB_Set_EPx_Xfer_Size(EP_ID0,1);
+    }else{
+        USB_Set_EPx_Xfer_Size(EP_ID0,64);
+    }
+    for(uint16_t i=0;i
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "string.h"
+#include "bl702_xip_sflash.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  XIP_SFLASH
+ *  @{
+ */
+
+/** @defgroup  XIP_SFLASH_Private_Macros
+ *  @{
+ */
+
+/*@} end of group XIP_SFLASH_Private_Macros */
+
+/** @defgroup  XIP_SFLASH_Private_Types
+ *  @{
+ */
+
+/*@} end of group XIP_SFLASH_Private_Types */
+
+/** @defgroup  XIP_SFLASH_Private_Variables
+ *  @{
+ */
+static uint8_t aesEnable;
+
+/*@} end of group XIP_SFLASH_Private_Variables */
+
+/** @defgroup  XIP_SFLASH_Global_Variables
+ *  @{
+ */
+
+/*@} end of group XIP_SFLASH_Global_Variables */
+
+/** @defgroup  XIP_SFLASH_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group XIP_SFLASH_Private_Fun_Declaration */
+
+/** @defgroup  XIP_SFLASH_Private_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  XIP SFlash option save
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void XIP_SFlash_Opt_Enter(void)
+{
+    aesEnable=SF_Ctrl_Is_AES_Enable();
+    if(aesEnable){
+        SF_Ctrl_AES_Disable();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  XIP SFlash option restore
+ *
+ * @param  None
+ *
+ * @return None
+ *
+*******************************************************************************/
+void XIP_SFlash_Opt_Exit(void)
+{
+    if(aesEnable){
+        SF_Ctrl_AES_Enable();
+    }
+}
+
+/****************************************************************************//**
+ * @brief  Save flash controller state
+ *
+ * @param  pFlashCfg: Flash config pointer
+ * @param  offset: CPU XIP flash offset pointer
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_State_Save(SPI_Flash_Cfg_Type *pFlashCfg,uint32_t *offset)
+{
+    /* XIP_SFlash_Delay */
+    volatile uint32_t i=32*2;
+    while(i--);
+
+    SF_Ctrl_Set_Owner(SF_CTRL_OWNER_SAHB);
+    /* Exit form continous read for accepting command */
+    SFlash_Reset_Continue_Read(pFlashCfg);
+    /* Send software reset command(80bv has no this command)to deburst wrap for ISSI like */
+    SFlash_Software_Reset(pFlashCfg);
+    /* For disable command that is setting register instaed of send command, we need write enable */
+    SFlash_DisableBurstWrap(pFlashCfg);
+    /* Enable QE again in case reset command make it reset */
+    SFlash_Qspi_Enable(pFlashCfg);
+    /* Deburst again to make sure */
+    SFlash_DisableBurstWrap(pFlashCfg);
+
+    /* Clear offset setting*/
+    *offset=SF_Ctrl_Get_Flash_Image_Offset();
+    SF_Ctrl_Set_Flash_Image_Offset(0);
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Restore flash controller state
+ *
+ * @param  pFlashCfg: Flash config pointer
+ * @param  ioMode: flash controller interface mode
+ * @param  offset: CPU XIP flash offset
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_State_Restore(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint32_t offset)
+{
+    uint32_t tmp[1];
+
+    SF_Ctrl_Set_Flash_Image_Offset(offset);
+
+    SFlash_SetBurstWrap(pFlashCfg);
+    SFlash_Read(pFlashCfg,ioMode,1,0x0,(uint8_t *)tmp, sizeof(tmp));
+    SFlash_Set_IDbus_Cfg(pFlashCfg,ioMode,1,0,32);
+
+    return SUCCESS;
+}
+#endif
+
+/*@} end of group XIP_SFLASH_Private_Functions */
+
+/** @defgroup  XIP_SFLASH_Public_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Erase flash one region
+ *
+ * @param  pFlashCfg: Flash config pointer
+ * @param  ioMode: flash controller interface mode
+ * @param  startaddr: start address to erase
+ * @param  endaddr: end address(include this address) to erase
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_Erase_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint32_t startaddr,uint32_t endaddr)
+{
+    BL_Err_Type stat;
+    uint32_t offset;
+
+    stat=XIP_SFlash_State_Save(pFlashCfg,&offset);
+    if(stat!=SUCCESS){
+        SFlash_Set_IDbus_Cfg(pFlashCfg,ioMode,1,0,32);
+    }else{
+        stat=SFlash_Erase(pFlashCfg,startaddr,endaddr);
+        XIP_SFlash_State_Restore(pFlashCfg,ioMode,offset);
+    }
+
+    return stat;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Program flash one region
+ *
+ * @param  pFlashCfg: Flash config pointer
+ * @param  ioMode: flash controller interface mode
+ * @param  addr: start address to be programed
+ * @param  data: data pointer to be programed
+ * @param  len: data length to be programed
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_Write_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint32_t addr,uint8_t *data, uint32_t len)
+{
+    BL_Err_Type stat;
+    uint32_t offset;
+
+    stat=XIP_SFlash_State_Save(pFlashCfg,&offset);
+    if(stat!=SUCCESS){
+        SFlash_Set_IDbus_Cfg(pFlashCfg,ioMode,1,0,32);
+    }else{
+        stat= SFlash_Program(pFlashCfg,ioMode,addr,data,len);
+        XIP_SFlash_State_Restore(pFlashCfg,ioMode,offset);
+    }
+
+    return stat;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Read data from flash
+ *
+ * @param  pFlashCfg: Flash config pointer
+ * @param  ioMode: flash controller interface mode
+ * @param  addr: flash read start address
+ * @param  data: data pointer to store data read from flash
+ * @param  len: data length to read
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_Read_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint32_t addr,uint8_t *data, uint32_t len)
+{
+    BL_Err_Type stat;
+    uint32_t offset;
+
+    stat=XIP_SFlash_State_Save(pFlashCfg,&offset);
+    if(stat!=SUCCESS){
+        SFlash_Set_IDbus_Cfg(pFlashCfg,ioMode,1,0,32);
+    }else{
+        stat=SFlash_Read(pFlashCfg,ioMode,0,addr, data,len);
+        XIP_SFlash_State_Restore(pFlashCfg,ioMode,offset);
+    }
+
+    return stat;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Get Flash Jedec ID
+ *
+ * @param  pFlashCfg: Flash config pointer
+ * @param  ioMode: flash controller interface mode
+ * @param  data: data pointer to store Jedec ID Read from flash
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_GetJedecId_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint8_t *data)
+{
+    BL_Err_Type stat;
+    uint32_t offset;
+
+    stat=XIP_SFlash_State_Save(pFlashCfg,&offset);
+    if(stat!=SUCCESS){
+        SFlash_Set_IDbus_Cfg(pFlashCfg,ioMode,1,0,32);
+    }else{
+        SFlash_GetJedecId(pFlashCfg,data);
+        XIP_SFlash_State_Restore(pFlashCfg,ioMode,offset);
+    }
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Get Flash Device ID
+ *
+ * @param  pFlashCfg: Flash config pointer
+ * @param  ioMode: flash controller interface mode
+ * @param  data: data pointer to store Device ID Read from flash
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_GetDeviceId_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint8_t *data)
+{
+    BL_Err_Type stat;
+    uint32_t offset;
+
+    stat=XIP_SFlash_State_Save(pFlashCfg,&offset);
+    if(stat!=SUCCESS){
+        SFlash_Set_IDbus_Cfg(pFlashCfg,ioMode,1,0,32);
+    }else{
+        SFlash_GetDeviceId(data);
+        XIP_SFlash_State_Restore(pFlashCfg,ioMode,offset);
+    }
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Get Flash Unique ID
+ *
+ * @param  pFlashCfg: Flash config pointer
+ * @param  ioMode: flash controller interface mode
+ * @param  data: data pointer to store Device ID Read from flash
+ * @param  idLen: Unique id len
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_GetUniqueId_Need_Lock(SPI_Flash_Cfg_Type *pFlashCfg,SF_Ctrl_IO_Type ioMode,uint8_t *data,uint8_t idLen)
+{
+    BL_Err_Type stat;
+    uint32_t offset;
+
+    stat=XIP_SFlash_State_Save(pFlashCfg,&offset);
+    if(stat!=SUCCESS){
+        SFlash_Set_IDbus_Cfg(pFlashCfg,ioMode,1,0,32);
+    }else{
+        SFlash_GetUniqueId(data,idLen);
+        XIP_SFlash_State_Restore(pFlashCfg,ioMode,offset);
+    }
+
+    return SUCCESS;
+}
+#endif
+
+/****************************************************************************//**
+ * @brief  Read data from flash via XIP
+ *
+ * @param  addr: flash read start address
+ * @param  data: data pointer to store data read from flash
+ * @param  len: data length to read
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+#ifndef BFLB_USE_ROM_DRIVER
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_Read_Via_Cache_Need_Lock(uint32_t addr,uint8_t *data, uint32_t len)
+{
+    uint32_t offset;
+
+    if(addr>=BL702_FLASH_XIP_BASE && addr
© COPYRIGHT(c) 2020 Bouffalo Lab

+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of Bouffalo Lab nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
+
+#include "string.h"
+#include "bl702_xip_sflash_ext.h"
+
+/** @addtogroup  BL702_Peripheral_Driver
+ *  @{
+ */
+
+/** @addtogroup  XIP_SFLASH
+ *  @{
+ */
+
+/** @defgroup  XIP_SFLASH_EXT_Private_Macros
+ *  @{
+ */
+
+/*@} end of group XIP_SFLASH_EXT_Private_Macros */
+
+/** @defgroup  XIP_SFLASH_EXT_Private_Types
+ *  @{
+ */
+
+/*@} end of group XIP_SFLASH_EXT_Private_Types */
+
+/** @defgroup  XIP_SFLASH_EXT_Private_Variables
+ *  @{
+ */
+
+static SPI_Flash_Cfg_Type flashCfg;
+
+/*@} end of group XIP_SFLASH_EXT_Private_Variables */
+
+/** @defgroup  XIP_SFLASH_EXT_Global_Variables
+ *  @{
+ */
+
+/*@} end of group XIP_SFLASH_EXT_Global_Variables */
+
+/** @defgroup  XIP_SFLASH_EXT_Private_Fun_Declaration
+ *  @{
+ */
+
+/*@} end of group XIP_SFLASH_EXT_Private_Fun_Declaration */
+
+/** @defgroup  XIP_SFLASH_EXT_Private_Functions
+ *  @{
+ */
+
+/****************************************************************************//**
+ * @brief  Read data from flash with lock
+ *
+ * @param  pFlashCfg:Flash config pointer
+ *
+ * @return SUCCESS or ERROR
+ *
+*******************************************************************************/
+__WEAK
+BL_Err_Type ATTR_TCM_SECTION XIP_SFlash_Init(SPI_Flash_Cfg_Type *pFlashCfg)
+{
+    uint32_t ret;
+
+    if(pFlashCfg==NULL){
+        /* Get flash config identify */
+        XIP_SFlash_Opt_Enter();
+        ret=SF_Cfg_Flash_Identify_Ext(1,1,0,0,&flashCfg);
+        XIP_SFlash_Opt_Exit();
+        if((ret&BFLB_FLASH_ID_VALID_FLAG)==0){
+            return ERROR;
+        }
+    }else{
+        memcpy(&flashCfg,pFlashCfg,sizeof(flashCfg));
+    }
+    
+    return SUCCESS;
+}
+
+/****************************************************************************//**
+ * @brief  Read data from flash with lock
+ *
+ * @param  addr: flash read start address
+ * @param  dst: data pointer to store data read from flash
+ * @param  len: data length to read
+ *
+ * @return 0
+ *
+*******************************************************************************/
+__WEAK
+int ATTR_TCM_SECTION XIP_SFlash_Read(uint32_t addr, uint8_t *dst, int len)
+{
+    __disable_irq();
+    XIP_SFlash_Opt_Enter();
+    XIP_SFlash_Read_Need_Lock(&flashCfg, flashCfg.ioMode&0x0f, addr, dst, len);
+    XIP_SFlash_Opt_Exit();
+    __enable_irq();
+    return 0;
+}
+
+/****************************************************************************//**
+ * @brief  Program flash one region with lock
+ *
+ * @param  addr: Start address to be programed
+ * @param  src: Data pointer to be programed
+ * @param  len: Data length to be programed
+ *
+ * @return 0
+ *
+*******************************************************************************/
+__WEAK
+int ATTR_TCM_SECTION XIP_SFlash_Write(uint32_t addr, uint8_t *src, int len)
+{
+    __disable_irq();
+    XIP_SFlash_Opt_Enter();
+    XIP_SFlash_Write_Need_Lock(&flashCfg,flashCfg.ioMode&0x0f, addr, src, len);
+    XIP_SFlash_Opt_Exit();
+    __enable_irq();
+    return 0;
+}
+
+/****************************************************************************//**
+ * @brief  Erase flash one region with lock
+ *
+ * @param  addr: Start address to be erased
+ * @param  len: Data length to be erased
+ *
+ * @return 0
+ *
+*******************************************************************************/
+__WEAK
+int ATTR_TCM_SECTION XIP_SFlash_Erase(uint32_t addr, int len)
+{
+    __disable_irq();
+    XIP_SFlash_Opt_Enter();
+    XIP_SFlash_Erase_Need_Lock(&flashCfg,flashCfg.ioMode&0x0f, addr, addr + len - 1);
+    XIP_SFlash_Opt_Exit();
+    __enable_irq();
+    return 0;
+}
+
+/*@} end of group XIP_SFLASH_EXT_Public_Functions */
+
+/*@} end of group XIP_SFLASH_EXT */
+
+/*@} end of group BL702_Peripheral_Driver */
diff --git a/examples/adc/adc_continuous_differential/CMakeLists.txt b/examples/adc/adc_continuous_differential/CMakeLists.txt
new file mode 100644
index 00000000..bfd0e557
--- /dev/null
+++ b/examples/adc/adc_continuous_differential/CMakeLists.txt
@@ -0,0 +1,5 @@
+set(mains main.c)
+generate_bin()
+
+
+
diff --git a/examples/adc/adc_continuous_differential/cdk/adc_continuous_differential.cdkproj b/examples/adc/adc_continuous_differential/cdk/adc_continuous_differential.cdkproj
new file mode 100644
index 00000000..007dc93b
--- /dev/null
+++ b/examples/adc/adc_continuous_differential/cdk/adc_continuous_differential.cdkproj
@@ -0,0 +1,726 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/adc/adc_continuous_differential/main.c b/examples/adc/adc_continuous_differential/main.c
new file mode 100644
index 00000000..d4bbd8c2
--- /dev/null
+++ b/examples/adc/adc_continuous_differential/main.c
@@ -0,0 +1,77 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_adc.h"
+#include "hal_gpio.h"
+
+#define ADC_SCAN_NUM (50)
+
+uint8_t PinList[] = {GPIO_PIN_11, GPIO_PIN_12};
+adc_channel_t posChList[] = {ADC_CHANNEL3};
+adc_channel_t negChList[] = {ADC_CHANNEL4};
+
+adc_res_val_t result_val;
+
+struct device* adc_test;
+
+int main(void)
+{
+    bflb_platform_init(0);
+
+    adc_user_cfg_t adc_user_cfg;
+
+    adc_user_cfg.dma_en = DISABLE;              // disable dma
+    adc_user_cfg.conv_mode = ADC_CON_CONV;      // continuous conversion
+    adc_user_cfg.in_mode = ADC_DIFFERENTIAL_IN; // differential input mode
+    
+    adc_user_cfg.pinList = PinList;
+    adc_user_cfg.posChList = posChList;
+    adc_user_cfg.negChList = negChList;
+    adc_user_cfg.num = sizeof(posChList)/sizeof(adc_channel_t);
+
+    MSG("adc one-shot differential test case \r\n");
+    adc_register(ADC0_INDEX, "adc_one_diff", DEVICE_OFLAG_STREAM_RX, &adc_user_cfg);
+
+    adc_test = device_find("adc_one_diff");
+    if(adc_test)
+    {
+        device_open(adc_test, DEVICE_OFLAG_STREAM_RX);
+        MSG("adc device find success\r\n");
+    }
+
+    device_control(adc_test,DEVICE_CTRL_RESUME,0);
+    while (1)
+    {
+        device_read(adc_test, 0, (void *)&result_val,sizeof(result_val)/sizeof(adc_res_val_t));
+        if(result_val.volt <= 0)
+        {
+            result_val.volt = -result_val.volt;
+            MSG("PosId = %d NegId = %d V= -%d mV \r\n",result_val.posChan,result_val.negChan,(uint32_t)(result_val.volt * 1000));
+        }
+        else
+        {
+            MSG("PosId = %d NegId = %d V= %d mV \r\n",result_val.posChan,result_val.negChan,(uint32_t)(result_val.volt * 1000));
+        }
+        // bflb_platform_delay_ms(500);
+    }
+    
+}
\ No newline at end of file
diff --git a/examples/adc/adc_continuous_single_ended/CMakeLists.txt b/examples/adc/adc_continuous_single_ended/CMakeLists.txt
new file mode 100644
index 00000000..bfd0e557
--- /dev/null
+++ b/examples/adc/adc_continuous_single_ended/CMakeLists.txt
@@ -0,0 +1,5 @@
+set(mains main.c)
+generate_bin()
+
+
+
diff --git a/examples/adc/adc_continuous_single_ended/cdk/adc_continuous_single_ended.cdkproj b/examples/adc/adc_continuous_single_ended/cdk/adc_continuous_single_ended.cdkproj
new file mode 100644
index 00000000..991732af
--- /dev/null
+++ b/examples/adc/adc_continuous_single_ended/cdk/adc_continuous_single_ended.cdkproj
@@ -0,0 +1,726 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
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+    
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+        
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+        
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+        
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+      
+        
+      
+      
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+        
+      
+      
+        
+      
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+        
+      
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+        
+      
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+        
+      
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+        
+      
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+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
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+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/adc/adc_continuous_single_ended/main.c b/examples/adc/adc_continuous_single_ended/main.c
new file mode 100644
index 00000000..32eda428
--- /dev/null
+++ b/examples/adc/adc_continuous_single_ended/main.c
@@ -0,0 +1,68 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_adc.h"
+#include "hal_gpio.h"
+
+uint8_t PinList[] = {GPIO_PIN_12};
+adc_channel_t posChList[] = {ADC_CHANNEL4};
+adc_channel_t negChList[] = {ADC_CHANNEL_GND};
+
+adc_res_val_t result_val;
+
+struct device* adc_test;
+
+int main(void)
+{
+    bflb_platform_init(0);
+
+    adc_user_cfg_t adc_user_cfg;
+
+    adc_user_cfg.dma_en = DISABLE;              // disable dma
+    adc_user_cfg.conv_mode = ADC_CON_CONV;      // continuous conversion
+    adc_user_cfg.in_mode = ADC_SINGLE_ENDED_IN; // single-ended input mode
+    
+    adc_user_cfg.pinList = PinList;
+    adc_user_cfg.posChList = posChList;
+    adc_user_cfg.negChList = negChList;
+    adc_user_cfg.num = sizeof(posChList)/sizeof(adc_channel_t);
+
+    MSG("adc continue single ended test case \r\n");
+    adc_register(ADC0_INDEX, "adc_continue_single", DEVICE_OFLAG_STREAM_RX, &adc_user_cfg);
+
+    adc_test = device_find("adc_continue_single");
+    if(adc_test)
+    {
+        device_open(adc_test, DEVICE_OFLAG_STREAM_RX);
+        MSG("adc device find success\r\n");
+    }
+    
+    device_control(adc_test,DEVICE_CTRL_RESUME,0);
+
+    while (1)
+    {
+        device_read(adc_test, 0, (void *)&result_val,sizeof(result_val)/sizeof(adc_res_val_t));
+        MSG("PosId = %d NegId = %d V= %d mV \r\n",result_val.posChan,result_val.negChan,(uint32_t)(result_val.volt * 1000));
+        // bflb_platform_delay_ms(500);
+    }
+    
+}
\ No newline at end of file
diff --git a/examples/adc/adc_key/cdk/adc_key.cdkproj b/examples/adc/adc_key/cdk/adc_key.cdkproj
new file mode 100644
index 00000000..b9fc2cc9
--- /dev/null
+++ b/examples/adc/adc_key/cdk/adc_key.cdkproj
@@ -0,0 +1,724 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        BL702;BL702_EVB;ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+
diff --git a/examples/adc/adc_key/main.c b/examples/adc/adc_key/main.c
new file mode 100644
index 00000000..6d61973d
--- /dev/null
+++ b/examples/adc/adc_key/main.c
@@ -0,0 +1,169 @@
+/**
+ * @file adc_key.c
+ * @author Boufflao Lab MCU Team (jychen@bouffalolab.com)
+ * @brief 
+ * @version 0.1
+ * @date 2021-03-23
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+
+#include "hal_adc.h"
+#include "hal_gpio.h"
+
+
+#define KEY0_ADC_VALUE  0
+#define KEY1_ADC_VALUE  100
+#define KEY2_ADC_VALUE  200
+#define KEY3_ADC_VALUE  300
+#define KEY4_ADC_VALUE  430
+#define KEY_NO_VALUE    3000
+#define KEY_MEASURE_OFFSET    30
+
+#define KEY_FILTER_NUM  200
+typedef struct {
+    uint32_t vaildKeyNum;
+    uint16_t keyValue[KEY_FILTER_NUM];
+}adc_keys_status;
+
+uint8_t PinList[] = {GPIO_PIN_18};
+adc_channel_t posChList[] = {ADC_CHANNEL8};
+adc_channel_t negChList[] = {ADC_CHANNEL_GND};
+adc_res_val_t result_val;
+
+adc_keys_status key_machine;
+
+/**
+ * @brief init adc key machine
+ * 
+ */
+static void key_machine_init(void){
+    key_machine.vaildKeyNum = 0;
+    memset(key_machine.keyValue,0xff,KEY_FILTER_NUM);
+}
+
+/**
+ * @brief Get the adc value range object
+ * 
+ * @param Vmv input adc value ,unit is mV
+ * @return uint16_t 
+ */
+static uint16_t get_adc_value_range(uint32_t Vmv){
+    
+    if(Vmv > KEY4_ADC_VALUE - KEY_MEASURE_OFFSET && Vmv < KEY4_ADC_VALUE + KEY_MEASURE_OFFSET){
+        return KEY4_ADC_VALUE;
+    }else if(Vmv > KEY3_ADC_VALUE - KEY_MEASURE_OFFSET && Vmv < KEY3_ADC_VALUE + KEY_MEASURE_OFFSET){
+        return KEY3_ADC_VALUE;
+    }else if(Vmv > KEY2_ADC_VALUE - KEY_MEASURE_OFFSET && Vmv < KEY2_ADC_VALUE + KEY_MEASURE_OFFSET){
+        return KEY2_ADC_VALUE;
+    }else if(Vmv > KEY1_ADC_VALUE - KEY_MEASURE_OFFSET && Vmv < KEY1_ADC_VALUE + KEY_MEASURE_OFFSET){
+        return KEY1_ADC_VALUE;
+    }else if(Vmv < KEY_MEASURE_OFFSET){
+        return KEY0_ADC_VALUE;
+    }else{
+    	return KEY_NO_VALUE;
+    }
+}
+
+/**
+ * @brief Get the adc key value object
+ * 
+ * @param Vmv input adc value ,unit is mV
+ * @return int 
+ */
+static int get_adc_key_value(uint32_t Vmv){
+	volatile uint16_t key_num[5]={0};
+    uint8_t bigger=0,i=0,j=0;
+
+    if(Vmv>KEY0_ADC_VALUE && Vmv KEY_FILTER_NUM){
+            for(i=0;i=key_num[j]){
+            			bigger = 1;
+            		}else{
+            			bigger = 0;
+            			break;
+            		}
+            	}
+                if(bigger){
+                	key_machine_init();
+                	return i;
+                }
+            }
+
+        }
+    }
+    return KEY_NO_VALUE;
+
+}
+
+int main(void)
+{
+    bflb_platform_init(0);
+    uint16_t keyValue=0;
+
+    adc_user_cfg_t adc_user_cfg;
+
+    adc_user_cfg.dma_en = DISABLE;              
+    adc_user_cfg.conv_mode = ADC_CON_CONV;      
+    adc_user_cfg.in_mode = ADC_SINGLE_ENDED_IN;
+    
+    adc_user_cfg.pinList = PinList;
+    adc_user_cfg.posChList = posChList;
+    adc_user_cfg.negChList = negChList;
+    adc_user_cfg.num = sizeof(posChList)/sizeof(adc_channel_t);
+
+    adc_register(ADC0_INDEX, "adc_key", DEVICE_OFLAG_STREAM_RX, &adc_user_cfg);
+
+    struct device* adc_test = device_find("adc_key");
+
+    if(adc_test)
+    {
+        device_open(adc_test, DEVICE_OFLAG_STREAM_RX);
+    }else{
+        MSG("device open failed\r\n");
+    }
+    
+    device_control(adc_test,DEVICE_CTRL_RESUME,0);
+
+    key_machine_init();
+
+    while (1)
+    {
+        device_read(adc_test,0,(void *)&result_val,1);
+        keyValue = get_adc_key_value(result_val.volt * 1000);
+        if( keyValue!=KEY_NO_VALUE){
+            MSG("key %d pressed\r\n",keyValue);
+        }     
+    }
+    
+}
\ No newline at end of file
diff --git a/examples/adc/adc_one_shot_differential/CMakeLists.txt b/examples/adc/adc_one_shot_differential/CMakeLists.txt
new file mode 100644
index 00000000..bfd0e557
--- /dev/null
+++ b/examples/adc/adc_one_shot_differential/CMakeLists.txt
@@ -0,0 +1,5 @@
+set(mains main.c)
+generate_bin()
+
+
+
diff --git a/examples/adc/adc_one_shot_differential/cdk/adc_one_shot_differential.cdkproj b/examples/adc/adc_one_shot_differential/cdk/adc_one_shot_differential.cdkproj
new file mode 100644
index 00000000..75bcbb06
--- /dev/null
+++ b/examples/adc/adc_one_shot_differential/cdk/adc_one_shot_differential.cdkproj
@@ -0,0 +1,726 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/adc/adc_one_shot_differential/main.c b/examples/adc/adc_one_shot_differential/main.c
new file mode 100644
index 00000000..131c7151
--- /dev/null
+++ b/examples/adc/adc_one_shot_differential/main.c
@@ -0,0 +1,82 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_adc.h"
+#include "hal_gpio.h"
+
+#define ADC_SCAN_NUM (50)
+
+uint8_t PinList[] = {GPIO_PIN_11, GPIO_PIN_12};
+adc_channel_t posChList[] = {ADC_CHANNEL3};
+adc_channel_t negChList[] = {ADC_CHANNEL4};
+
+adc_res_val_t result_val;
+
+struct device* adc_test;
+
+int main(void)
+{
+    bflb_platform_init(0);
+
+    adc_user_cfg_t adc_user_cfg;
+
+    adc_user_cfg.dma_en = DISABLE;              // disable dma
+    adc_user_cfg.conv_mode = ADC_ONE_CONV;      // single conversion
+    adc_user_cfg.in_mode = ADC_DIFFERENTIAL_IN; // differential input mode
+    
+    adc_user_cfg.pinList = PinList;
+    adc_user_cfg.posChList = posChList;
+    adc_user_cfg.negChList = negChList;
+    adc_user_cfg.num = sizeof(posChList)/sizeof(adc_channel_t);
+
+    MSG("adc one-shot differential test case \r\n");
+    adc_register(ADC0_INDEX, "adc_one_diff", DEVICE_OFLAG_STREAM_RX, &adc_user_cfg);
+
+    adc_test = device_find("adc_one_diff");
+    if(adc_test)
+    {
+        device_open(adc_test, DEVICE_OFLAG_STREAM_RX);
+        MSG("adc device find success\r\n");
+    }
+
+    for(uint32_t i = 0; i < ADC_SCAN_NUM; i++ )
+    {
+        device_control(adc_test,DEVICE_CTRL_RESUME,0);
+        device_read(adc_test, 0, (void *)&result_val,sizeof(result_val)/sizeof(adc_res_val_t));
+        if(result_val.volt <= 0)
+        {
+            result_val.volt = -result_val.volt;
+            MSG("PosId = %d NegId = %d V= -%d mV \r\n",result_val.posChan,result_val.negChan,(uint32_t)(result_val.volt * 1000));
+        }
+        else
+        {
+            MSG("PosId = %d NegId = %d V= %d mV \r\n",result_val.posChan,result_val.negChan,(uint32_t)(result_val.volt * 1000));
+        }
+        bflb_platform_delay_ms(500);
+    }
+
+    while (1)
+    {
+        
+    }
+    
+}
\ No newline at end of file
diff --git a/examples/adc/adc_one_shot_single_ended/CMakeLists.txt b/examples/adc/adc_one_shot_single_ended/CMakeLists.txt
new file mode 100644
index 00000000..bfd0e557
--- /dev/null
+++ b/examples/adc/adc_one_shot_single_ended/CMakeLists.txt
@@ -0,0 +1,5 @@
+set(mains main.c)
+generate_bin()
+
+
+
diff --git a/examples/adc/adc_one_shot_single_ended/cdk/adc_one_shot_single_ended.cdkproj b/examples/adc/adc_one_shot_single_ended/cdk/adc_one_shot_single_ended.cdkproj
new file mode 100644
index 00000000..eb9b51f1
--- /dev/null
+++ b/examples/adc/adc_one_shot_single_ended/cdk/adc_one_shot_single_ended.cdkproj
@@ -0,0 +1,726 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/adc/adc_one_shot_single_ended/main.c b/examples/adc/adc_one_shot_single_ended/main.c
new file mode 100644
index 00000000..55000933
--- /dev/null
+++ b/examples/adc/adc_one_shot_single_ended/main.c
@@ -0,0 +1,74 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_adc.h"
+#include "hal_gpio.h"
+
+#define ADC_SCAN_NUM (100)
+
+uint8_t PinList[] = {GPIO_PIN_11};
+adc_channel_t posChList[] = {ADC_CHANNEL3};
+adc_channel_t negChList[] = {ADC_CHANNEL_GND};
+
+adc_res_val_t result_val;
+
+struct device* adc_test;
+
+int main(void)
+{
+    bflb_platform_init(0);
+
+    adc_user_cfg_t adc_user_cfg;
+
+    adc_user_cfg.dma_en = DISABLE;              // disable dma
+    adc_user_cfg.conv_mode = ADC_ONE_CONV;      // single conversion
+    adc_user_cfg.in_mode = ADC_SINGLE_ENDED_IN; // single-ended input mode
+    
+    adc_user_cfg.pinList = PinList;
+    adc_user_cfg.posChList = posChList;
+    adc_user_cfg.negChList = negChList;
+    adc_user_cfg.num = sizeof(posChList)/sizeof(adc_channel_t);
+
+    MSG("adc one-shot single ended test case \r\n");
+    adc_register(ADC0_INDEX, "adc_one_single", DEVICE_OFLAG_STREAM_RX, &adc_user_cfg);
+
+    adc_test = device_find("adc_one_single");
+    if(adc_test)
+    {
+        device_open(adc_test, DEVICE_OFLAG_STREAM_RX);
+        MSG("adc device find success\r\n");
+    }
+
+    for(uint32_t i = 0; i < ADC_SCAN_NUM; i++ )
+    {
+        device_control(adc_test,DEVICE_CTRL_RESUME,0);
+        device_read(adc_test, 0, (void *)&result_val,sizeof(result_val)/sizeof(adc_res_val_t));
+        MSG("PosId = %d NegId = %d V= %d mV \r\n",result_val.posChan,result_val.negChan,(uint32_t)(result_val.volt * 1000));
+        bflb_platform_delay_ms(500);
+    }
+
+    while (1)
+    {
+        
+    }
+    
+}
\ No newline at end of file
diff --git a/examples/adc/adc_scan_single_ended/CMakeLists.txt b/examples/adc/adc_scan_single_ended/CMakeLists.txt
new file mode 100644
index 00000000..bfd0e557
--- /dev/null
+++ b/examples/adc/adc_scan_single_ended/CMakeLists.txt
@@ -0,0 +1,5 @@
+set(mains main.c)
+generate_bin()
+
+
+
diff --git a/examples/adc/adc_scan_single_ended/cdk/adc_scan_single_ended.cdkproj b/examples/adc/adc_scan_single_ended/cdk/adc_scan_single_ended.cdkproj
new file mode 100644
index 00000000..f4f05b49
--- /dev/null
+++ b/examples/adc/adc_scan_single_ended/cdk/adc_scan_single_ended.cdkproj
@@ -0,0 +1,726 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
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+    
+    
+      
+    
+  
+  
+    
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+    
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+        
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+        
+      
+      
+        
+      
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+        
+      
+      
+        
+      
+      
+        
+      
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+        
+      
+      
+        
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+        
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+        
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+        
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+      
+        
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+        
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+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/adc/adc_scan_single_ended/main.c b/examples/adc/adc_scan_single_ended/main.c
new file mode 100644
index 00000000..ed90b6e4
--- /dev/null
+++ b/examples/adc/adc_scan_single_ended/main.c
@@ -0,0 +1,74 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_adc.h"
+#include "hal_gpio.h"
+
+#define ADC_SCAN_NUM (50)
+
+uint8_t PinList[] = {GPIO_PIN_11,GPIO_PIN_12};
+adc_channel_t posChList[] = {ADC_CHANNEL3,ADC_CHANNEL4};
+adc_channel_t negChList[] = {ADC_CHANNEL_GND,ADC_CHANNEL_GND};
+
+adc_res_val_t result_val;
+
+struct device* adc_test;
+
+int main(void)
+{
+    bflb_platform_init(0);
+
+    adc_user_cfg_t adc_user_cfg;
+
+    adc_user_cfg.dma_en = DISABLE;              // disable dma
+    adc_user_cfg.conv_mode = ADC_CON_CONV;      // single conversion
+    adc_user_cfg.in_mode = ADC_SINGLE_ENDED_IN; // single-ended input mode
+    
+    adc_user_cfg.pinList = PinList;
+    adc_user_cfg.posChList = posChList;
+    adc_user_cfg.negChList = negChList;
+    adc_user_cfg.num = sizeof(posChList)/sizeof(adc_channel_t);
+
+    MSG("adc one-shot single ended test case \r\n");
+    adc_register(ADC0_INDEX, "adc_one_single", DEVICE_OFLAG_STREAM_RX, &adc_user_cfg);
+
+    adc_test = device_find("adc_one_single");
+    if(adc_test)
+    {
+        device_open(adc_test, DEVICE_OFLAG_STREAM_RX);
+        MSG("adc device find success\r\n");
+    }
+
+    for(uint32_t i = 0; i < ADC_SCAN_NUM; i++ )
+    {
+        device_control(adc_test,DEVICE_CTRL_RESUME,0);
+        device_read(adc_test, 0, (void *)&result_val,sizeof(result_val)/sizeof(adc_res_val_t));
+        MSG("PosId = %d NegId = %d V= %d mV \r\n",result_val.posChan,result_val.negChan,(uint32_t)(result_val.volt * 1000));
+        // bflb_platform_delay_ms(10);
+    }
+
+    while (1)
+    {
+        return SUCCESS;
+    }
+    
+}
\ No newline at end of file
diff --git a/examples/adc/adc_vbat_poll/CMakeLists.txt b/examples/adc/adc_vbat_poll/CMakeLists.txt
new file mode 100644
index 00000000..bfd0e557
--- /dev/null
+++ b/examples/adc/adc_vbat_poll/CMakeLists.txt
@@ -0,0 +1,5 @@
+set(mains main.c)
+generate_bin()
+
+
+
diff --git a/examples/adc/adc_vbat_poll/cdk/adc_vbat_poll.cdkproj b/examples/adc/adc_vbat_poll/cdk/adc_vbat_poll.cdkproj
new file mode 100644
index 00000000..984597b1
--- /dev/null
+++ b/examples/adc/adc_vbat_poll/cdk/adc_vbat_poll.cdkproj
@@ -0,0 +1,726 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/adc/adc_vbat_poll/main.c b/examples/adc/adc_vbat_poll/main.c
new file mode 100644
index 00000000..aded3cef
--- /dev/null
+++ b/examples/adc/adc_vbat_poll/main.c
@@ -0,0 +1,70 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_adc.h"
+#include "hal_gpio.h"
+
+uint8_t PinList[] = {GPIO_PIN_18};                      // ADC Pin list setting
+adc_channel_t posChList[] = {ADC_CHANNEL_VABT_HALF};    // ADC Positive channel list setting
+adc_channel_t negChList[] = {ADC_CHANNEL_GND};          // ADC Negative channel list setting
+
+struct device* vbat_test;
+
+adc_res_val_t result;
+
+int main(void)
+{
+    bflb_platform_init(0);
+
+    adc_user_cfg_t adc_user_cfg;
+
+    adc_user_cfg.dma_en = DISABLE;              // disable dma
+    adc_user_cfg.conv_mode = ADC_ONE_CONV;      // single conversion
+    adc_user_cfg.in_mode = ADC_SINGLE_ENDED_IN; // single-ended input mode
+    
+    adc_user_cfg.pinList = PinList;
+    adc_user_cfg.posChList = posChList;
+    adc_user_cfg.negChList = negChList;
+    adc_user_cfg.num = sizeof(posChList)/sizeof(adc_channel_t);
+
+    adc_register(ADC0_INDEX, "adc_vbat_test", DEVICE_OFLAG_STREAM_RX, &adc_user_cfg);
+
+    vbat_test = device_find("adc_vbat_test");
+    if(vbat_test)
+    {
+        MSG("adc vbat test device find success\r\n");
+        device_open(vbat_test,DEVICE_OFLAG_STREAM_RX);
+    }
+
+    while(1){
+        bflb_platform_delay_ms(1000);
+        MSG("adc vbat test case\r\n");
+        for(uint8_t i=0;i<10;i++)
+        {
+            device_control(vbat_test,DEVICE_CTRL_RESUME,NULL);
+            device_read(vbat_test,0,&result,1);
+            MSG("vBat = %d mV\n",(uint32_t)(result.volt * 2000));
+
+            bflb_platform_delay_ms(500);
+        }
+    }
+}
\ No newline at end of file
diff --git a/examples/bl_mcu_sdk.cdkws b/examples/bl_mcu_sdk.cdkws
new file mode 100644
index 00000000..2fcbe894
--- /dev/null
+++ b/examples/bl_mcu_sdk.cdkws
@@ -0,0 +1,55 @@
+
+
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+  
+    
+      
+      
+      
+      
+      
+      
+      
+      
+      
+      
+      
+      
+      
+      
+      
+      
+      
+      
+      
+      
+      
+      
+      
+      
+      
+    
+  
+
diff --git a/examples/dac/dac_dma/CMakeLists.txt b/examples/dac/dac_dma/CMakeLists.txt
new file mode 100644
index 00000000..bfd0e557
--- /dev/null
+++ b/examples/dac/dac_dma/CMakeLists.txt
@@ -0,0 +1,5 @@
+set(mains main.c)
+generate_bin()
+
+
+
diff --git a/examples/dac/dac_dma/cdk/dac_dma.cdkproj b/examples/dac/dac_dma/cdk/dac_dma.cdkproj
new file mode 100644
index 00000000..7cc5dc8d
--- /dev/null
+++ b/examples/dac/dac_dma/cdk/dac_dma.cdkproj
@@ -0,0 +1,726 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/dac/dac_dma/main.c b/examples/dac/dac_dma/main.c
new file mode 100644
index 00000000..c54540c7
--- /dev/null
+++ b/examples/dac/dac_dma/main.c
@@ -0,0 +1,103 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_dac.h"
+#include "hal_dma.h"
+
+const uint16_t sinList[]={
+500 ,506 ,513 ,519 ,525 ,531 ,538 ,544 ,550 ,556 ,
+563 ,569 ,575 ,581 ,587 ,594 ,600 ,606 ,612 ,618 ,
+624 ,630 ,636 ,642 ,648 ,654 ,660 ,666 ,672 ,678 ,
+684 ,690 ,696 ,701 ,707 ,713 ,718 ,724 ,730 ,735 ,
+741 ,746 ,752 ,757 ,762 ,768 ,773 ,778 ,784 ,789 ,
+794 ,799 ,804 ,809 ,814 ,819 ,823 ,828 ,833 ,838 ,
+842 ,847 ,851 ,856 ,860 ,864 ,869 ,873 ,877 ,881 ,
+885 ,889 ,893 ,897 ,901 ,904 ,908 ,912 ,915 ,919 ,
+922 ,925 ,929 ,932 ,935 ,938 ,941 ,944 ,947 ,950 ,
+952 ,955 ,958 ,960 ,962 ,965 ,967 ,969 ,971 ,973 ,
+975 ,977 ,979 ,981 ,983 ,984 ,986 ,987 ,989 ,990 ,
+991 ,992 ,993 ,994 ,995 ,996 ,997 ,997 ,998 ,999 ,
+999 ,999 ,1000 ,1000 ,1000 ,1000 ,1000 ,1000 ,1000 ,
+999 ,999 ,999 ,998 ,998 ,997 ,996 ,995 ,994 ,993 ,
+992 ,991 ,990 ,989 ,987 ,986 ,984 ,983 ,981 ,979 ,
+978 ,976 ,974 ,972 ,970 ,967 ,965 ,963 ,960 ,958 ,955 ,953 ,950 ,947 ,944 ,941 ,938 ,935 ,
+932 ,929 ,926 ,922 ,919 ,916 ,912 ,908 ,905 ,901 ,897 ,893 ,890 ,886 ,882 ,878 ,873 ,869 ,
+865 ,861 ,856 ,852 ,847 ,843 ,838 ,833 ,829 ,824 ,819 ,814 ,809 ,804 ,799 ,794 ,789 ,784 ,
+779 ,774 ,768 ,763 ,758 ,752 ,747 ,741 ,736 ,730 ,725 ,719 ,714 ,708 ,702 ,696 ,691 ,685 ,679 ,
+673 ,667 ,661 ,655 ,649 ,643 ,637 ,631 ,625 ,619 ,613 ,607 ,601 ,594 ,588 ,582 ,576 ,570 ,563 ,
+557 ,551 ,545 ,538 ,532 ,526 ,520 ,513 ,507 ,501 ,495 ,488 ,482 ,476 ,469 ,463 ,457 ,451 ,444 ,
+438 ,432 ,426 ,420 ,413 ,407 ,401 ,395 ,389 ,383 ,376 ,370 ,364 ,358 ,352 ,346 ,340 ,334 ,329 ,
+323 ,317 ,311 ,305 ,299 ,294 ,288 ,282 ,277 ,271 ,265 ,260 ,254 ,249 ,244 ,238 ,233 ,228 ,222 ,
+217 ,212 ,207 ,202 ,197 ,192 ,187 ,182 ,177 ,172 ,168 ,163 ,158 ,154 ,149 ,145 ,141 ,136 ,132 ,128 ,124 ,
+119 ,115 ,111 ,107 ,104 ,100 ,96 ,92 ,89 ,85 ,82 ,78 ,75 ,72 ,69 ,65 ,62 ,59 ,56 ,54 ,51 ,48 ,45 ,43 ,40 ,38 ,
+36 ,33 ,31 ,29 ,27 ,25 ,23 ,21 ,19 ,18 ,16 ,14 ,13 ,12 ,10 ,9 ,8 ,7 ,6 ,5 ,4 ,3 ,3 ,2 ,2 ,1 ,1 ,0 ,0 ,0 ,0 ,0 ,0 ,0 ,1 ,1 ,1 ,2 ,2 ,3 ,4 ,5 ,5 ,6 ,8 ,9 ,10 ,11 ,
+12 ,14 ,15 ,17 ,19 ,20 ,22 ,24 ,26 ,28 ,30 ,32 ,35 ,37 ,39 ,42 ,44 ,47 ,50 ,52 ,55 ,58 ,61 ,64 ,67 ,71 ,74 ,77 ,81 ,84 ,87 ,91 ,95 ,98 ,102 ,106 ,110 ,114 ,118 ,122 ,
+126 ,130 ,135 ,139 ,143 ,148 ,152 ,157 ,161 ,166 ,171 ,175 ,180 ,185 ,190 ,195 ,200 ,205 ,210 ,215 ,220 ,226 ,231 ,236 ,242 ,247 ,252 ,258 ,263 ,269 ,274 ,280 ,286 ,
+291 ,297 ,303 ,309 ,315 ,320 ,326 ,332 ,338 ,344 ,350 ,356 ,362 ,368 ,374 ,380 ,386 ,392 ,399 ,405 ,411 ,417 ,423 ,430 ,436 ,442 ,448 ,455 ,461 ,467 ,473 ,480 ,486 ,492
+};
+
+
+int main(void)
+{
+    bflb_platform_init(0);
+    
+    /* register & open dac device */
+    dac_register(DAC0_INDEX, "dac", DEVICE_OFLAG_RDWR);
+    struct device *dac = device_find("dac");
+
+    if (dac)
+    {
+        device_open(dac, DEVICE_OFLAG_DMA_TX);
+        MSG("device open success\r\n");
+    }
+
+    /* register & open dma device */
+    if(dma_allocate_register("dac_dma",DEVICE_OFLAG_RDWR) == SUCCESS){
+        MSG("dma allocate success\r\n");
+    }
+
+    struct device *dac_dma = device_find("dac_dma");
+
+    if(dac_dma){
+
+        ((dma_device_t *) dac_dma)->direction = DMA_MEMORY_TO_PERIPH;
+        ((dma_device_t *) dac_dma)->transfer_mode = DMA_LLI_ONCE_MODE;
+        ((dma_device_t *) dac_dma)->src_req = DMA_REQUEST_NONE;
+        ((dma_device_t *) dac_dma)->dst_req = DMA_REQUEST_DAC0;
+        ((dma_device_t *) dac_dma)->src_width = DMA_TRANSFER_WIDTH_16BIT;
+        ((dma_device_t *) dac_dma)->dst_width = DMA_TRANSFER_WIDTH_16BIT;
+
+        device_open(dac_dma,0);
+    }
+
+    /* connect dac device and dma device */
+    device_control(dac,DEVICE_CTRL_DAC_ATTACH_TX_DMA,dac_dma);
+
+
+    while(1)
+    {
+        device_write(dac,DAC_CHANNEL_0,sinList,sizeof(sinList)/sizeof(uint8_t));
+        while(dma_channel_check_busy(dac_dma) == SET){}
+    }
+
+    BL_CASE_SUCCESS;
+}
diff --git a/examples/dac/dac_poll/CMakeLists.txt b/examples/dac/dac_poll/CMakeLists.txt
new file mode 100644
index 00000000..bfd0e557
--- /dev/null
+++ b/examples/dac/dac_poll/CMakeLists.txt
@@ -0,0 +1,5 @@
+set(mains main.c)
+generate_bin()
+
+
+
diff --git a/examples/dac/dac_poll/cdk/dac_poll.cdkproj b/examples/dac/dac_poll/cdk/dac_poll.cdkproj
new file mode 100644
index 00000000..cc1ed3cd
--- /dev/null
+++ b/examples/dac/dac_poll/cdk/dac_poll.cdkproj
@@ -0,0 +1,724 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
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+    
+    
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+    
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+    
+    
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+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
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+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
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+    
+    
+      
+    
+    
+      
+        
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+        
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+        
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+        
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+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        BL702;BL702_EVB;ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+
diff --git a/examples/dac/dac_poll/main.c b/examples/dac/dac_poll/main.c
new file mode 100644
index 00000000..1e94c31c
--- /dev/null
+++ b/examples/dac/dac_poll/main.c
@@ -0,0 +1,74 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_dac.h"
+
+uint16_t sinList[]={
+500 ,506 ,513 ,519 ,525 ,531 ,538 ,544 ,550 ,556 ,
+563 ,569 ,575 ,581 ,587 ,594 ,600 ,606 ,612 ,618 ,
+624 ,630 ,636 ,642 ,648 ,654 ,660 ,666 ,672 ,678 ,
+684 ,690 ,696 ,701 ,707 ,713 ,718 ,724 ,730 ,735 ,
+741 ,746 ,752 ,757 ,762 ,768 ,773 ,778 ,784 ,789 ,
+794 ,799 ,804 ,809 ,814 ,819 ,823 ,828 ,833 ,838 ,
+842 ,847 ,851 ,856 ,860 ,864 ,869 ,873 ,877 ,881 ,
+885 ,889 ,893 ,897 ,901 ,904 ,908 ,912 ,915 ,919 ,
+922 ,925 ,929 ,932 ,935 ,938 ,941 ,944 ,947 ,950 ,
+952 ,955 ,958 ,960 ,962 ,965 ,967 ,969 ,971 ,973 ,
+975 ,977 ,979 ,981 ,983 ,984 ,986 ,987 ,989 ,990 ,
+991 ,992 ,993 ,994 ,995 ,996 ,997 ,997 ,998 ,999 ,
+999 ,999 ,1000 ,1000 ,1000 ,1000 ,1000 ,1000 ,1000 ,
+999 ,999 ,999 ,998 ,998 ,997 ,996 ,995 ,994 ,993 ,
+992 ,991 ,990 ,989 ,987 ,986 ,984 ,983 ,981 ,979 ,
+978 ,976 ,974 ,972 ,970 ,967 ,965 ,963 ,960 ,958 ,955 ,953 ,950 ,947 ,944 ,941 ,938 ,935 ,
+932 ,929 ,926 ,922 ,919 ,916 ,912 ,908 ,905 ,901 ,897 ,893 ,890 ,886 ,882 ,878 ,873 ,869 ,
+865 ,861 ,856 ,852 ,847 ,843 ,838 ,833 ,829 ,824 ,819 ,814 ,809 ,804 ,799 ,794 ,789 ,784 ,
+779 ,774 ,768 ,763 ,758 ,752 ,747 ,741 ,736 ,730 ,725 ,719 ,714 ,708 ,702 ,696 ,691 ,685 ,679 ,
+673 ,667 ,661 ,655 ,649 ,643 ,637 ,631 ,625 ,619 ,613 ,607 ,601 ,594 ,588 ,582 ,576 ,570 ,563 ,
+557 ,551 ,545 ,538 ,532 ,526 ,520 ,513 ,507 ,501 ,495 ,488 ,482 ,476 ,469 ,463 ,457 ,451 ,444 ,
+438 ,432 ,426 ,420 ,413 ,407 ,401 ,395 ,389 ,383 ,376 ,370 ,364 ,358 ,352 ,346 ,340 ,334 ,329 ,
+323 ,317 ,311 ,305 ,299 ,294 ,288 ,282 ,277 ,271 ,265 ,260 ,254 ,249 ,244 ,238 ,233 ,228 ,222 ,
+217 ,212 ,207 ,202 ,197 ,192 ,187 ,182 ,177 ,172 ,168 ,163 ,158 ,154 ,149 ,145 ,141 ,136 ,132 ,128 ,124 ,
+119 ,115 ,111 ,107 ,104 ,100 ,96 ,92 ,89 ,85 ,82 ,78 ,75 ,72 ,69 ,65 ,62 ,59 ,56 ,54 ,51 ,48 ,45 ,43 ,40 ,38 ,
+36 ,33 ,31 ,29 ,27 ,25 ,23 ,21 ,19 ,18 ,16 ,14 ,13 ,12 ,10 ,9 ,8 ,7 ,6 ,5 ,4 ,3 ,3 ,2 ,2 ,1 ,1 ,0 ,0 ,0 ,0 ,0 ,0 ,0 ,1 ,1 ,1 ,2 ,2 ,3 ,4 ,5 ,5 ,6 ,8 ,9 ,10 ,11 ,
+12 ,14 ,15 ,17 ,19 ,20 ,22 ,24 ,26 ,28 ,30 ,32 ,35 ,37 ,39 ,42 ,44 ,47 ,50 ,52 ,55 ,58 ,61 ,64 ,67 ,71 ,74 ,77 ,81 ,84 ,87 ,91 ,95 ,98 ,102 ,106 ,110 ,114 ,118 ,122 ,
+126 ,130 ,135 ,139 ,143 ,148 ,152 ,157 ,161 ,166 ,171 ,175 ,180 ,185 ,190 ,195 ,200 ,205 ,210 ,215 ,220 ,226 ,231 ,236 ,242 ,247 ,252 ,258 ,263 ,269 ,274 ,280 ,286 ,
+291 ,297 ,303 ,309 ,315 ,320 ,326 ,332 ,338 ,344 ,350 ,356 ,362 ,368 ,374 ,380 ,386 ,392 ,399 ,405 ,411 ,417 ,423 ,430 ,436 ,442 ,448 ,455 ,461 ,467 ,473 ,480 ,486 ,492
+};
+
+
+int main(void)
+{
+    bflb_platform_init(0);
+    dac_register(DAC0_INDEX, "dac", DEVICE_OFLAG_RDWR);
+    struct device *dac = device_find("dac");
+
+    if (dac)
+    {
+        device_open(dac, DEVICE_OFLAG_STREAM_TX);
+        MSG("device find success\r\n");
+    }
+
+    while(1)
+    {
+        device_write(dac,DAC_CHANNEL_0,sinList,sizeof(sinList)/sizeof(uint16_t));
+    }
+}
diff --git a/examples/dma/dma_m2m/CMakeLists.txt b/examples/dma/dma_m2m/CMakeLists.txt
new file mode 100644
index 00000000..bfd0e557
--- /dev/null
+++ b/examples/dma/dma_m2m/CMakeLists.txt
@@ -0,0 +1,5 @@
+set(mains main.c)
+generate_bin()
+
+
+
diff --git a/examples/dma/dma_m2m/cdk/dma_m2m.cdkproj b/examples/dma/dma_m2m/cdk/dma_m2m.cdkproj
new file mode 100644
index 00000000..b708de39
--- /dev/null
+++ b/examples/dma/dma_m2m/cdk/dma_m2m.cdkproj
@@ -0,0 +1,726 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/dma/dma_m2m/main.c b/examples/dma/dma_m2m/main.c
new file mode 100644
index 00000000..f85d22c5
--- /dev/null
+++ b/examples/dma/dma_m2m/main.c
@@ -0,0 +1,77 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_dma.h"
+
+
+uint8_t dma_src_buffer[8000] __attribute__((section(".system_ram")));
+uint8_t dma_dst_buffer[8000] __attribute__((section(".system_ram")));
+
+
+void dma_transfer_done(struct device *dev, void *args, uint32_t size, uint32_t state)
+{
+	uint32_t index=0;
+
+    if(!state)
+    {
+        MSG("dma transfer task done\r\n");
+
+        for(index=0;index<8000;index++){
+        	if(dma_dst_buffer[index]!=0xff){
+        		MSG("dma transfer error\r\n");
+        	}
+        }
+
+		MSG("dma transfer success\r\n");
+    }
+
+}
+
+int main(void)
+{
+    bflb_platform_init(0);
+
+    dma_register(DMA0_CH0_INDEX, "DMA", DEVICE_OFLAG_RDWR);
+
+    struct device *dma = device_find("DMA");
+
+
+    if (dma)
+    {
+        device_open(dma, 0);
+        device_set_callback(dma, dma_transfer_done);
+        device_control(dma, DEVICE_CTRL_SET_INT, NULL);
+    }
+
+    /* prepare test memory src as 0xff but dest as 0x0 */
+
+    memset(dma_src_buffer,0xff,8000);
+    memset(dma_dst_buffer,0,8000);
+
+    dma_reload(dma,(uint32_t)dma_src_buffer,(uint32_t)dma_dst_buffer,8000); 
+
+    dma_channel_start(dma);
+
+    /*wait callback to check memory transfering is success*/
+    while(1);
+
+}
diff --git a/examples/gpio/gpio_blink/CMakeLists.txt b/examples/gpio/gpio_blink/CMakeLists.txt
new file mode 100644
index 00000000..bfd0e557
--- /dev/null
+++ b/examples/gpio/gpio_blink/CMakeLists.txt
@@ -0,0 +1,5 @@
+set(mains main.c)
+generate_bin()
+
+
+
diff --git a/examples/gpio/gpio_blink/cdk/gpio_blink.cdkproj b/examples/gpio/gpio_blink/cdk/gpio_blink.cdkproj
new file mode 100644
index 00000000..2d183c79
--- /dev/null
+++ b/examples/gpio/gpio_blink/cdk/gpio_blink.cdkproj
@@ -0,0 +1,726 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/gpio/gpio_blink/main.c b/examples/gpio/gpio_blink/main.c
new file mode 100644
index 00000000..b387d686
--- /dev/null
+++ b/examples/gpio/gpio_blink/main.c
@@ -0,0 +1,89 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_gpio.h"
+
+uint32_t count = 0;
+
+void gpio_blink_init(void)
+{
+    gpio_set_mode(GPIO_PIN_22, GPIO_OUTPUT_PP_MODE);
+    gpio_set_mode(GPIO_PIN_29, GPIO_OUTPUT_PP_MODE);
+    gpio_set_mode(GPIO_PIN_30, GPIO_OUTPUT_PP_MODE);
+    gpio_set_mode(GPIO_PIN_31, GPIO_OUTPUT_PP_MODE);
+
+    gpio_write(GPIO_PIN_22, 0);
+    gpio_write(GPIO_PIN_29, 0);
+    gpio_write(GPIO_PIN_30, 0);
+    gpio_write(GPIO_PIN_31, 0);    
+}
+
+void led_blink_all(void)
+{
+	gpio_write(GPIO_PIN_22, 0);
+	gpio_write(GPIO_PIN_29, 0);
+	gpio_write(GPIO_PIN_30, 0);
+	gpio_write(GPIO_PIN_31, 0);
+
+	bflb_platform_delay_ms(100);
+
+	gpio_write(GPIO_PIN_22, 1);
+	gpio_write(GPIO_PIN_29, 1);
+	gpio_write(GPIO_PIN_30, 1);
+	gpio_write(GPIO_PIN_31, 1);
+
+	bflb_platform_delay_ms(100);
+}
+
+void led_running(void)
+{
+		gpio_write(GPIO_PIN_22, 1);
+		bflb_platform_delay_ms(200);
+		gpio_write(GPIO_PIN_22, 0);
+		
+        gpio_write(GPIO_PIN_29, 1);
+        bflb_platform_delay_ms(200);
+        gpio_write(GPIO_PIN_29, 0);
+		
+        gpio_write(GPIO_PIN_30, 1);
+        bflb_platform_delay_ms(200);
+        gpio_write(GPIO_PIN_30, 0);
+		
+        gpio_write(GPIO_PIN_31, 1);
+        bflb_platform_delay_ms(200);
+        gpio_write(GPIO_PIN_31, 0);
+
+        count++;
+}
+
+int main(void)
+{
+    bflb_platform_init(0);
+
+    gpio_blink_init();
+
+    MSG("gpio test !\r\n");
+    while (1)
+    {        
+		led_running();
+    }
+}
diff --git a/examples/hellowd/helloworld/CMakeLists.txt b/examples/hellowd/helloworld/CMakeLists.txt
new file mode 100644
index 00000000..bb7ef18d
--- /dev/null
+++ b/examples/hellowd/helloworld/CMakeLists.txt
@@ -0,0 +1,6 @@
+set(mains main.c)
+#set(TARGET_REQUIRED_SRCS apple.c)
+generate_bin()
+
+
+
diff --git a/examples/hellowd/helloworld/bl702_flash2.ld b/examples/hellowd/helloworld/bl702_flash2.ld
new file mode 100644
index 00000000..14ced469
--- /dev/null
+++ b/examples/hellowd/helloworld/bl702_flash2.ld
@@ -0,0 +1,227 @@
+/****************************************************************************************
+* @file map.txt
+*
+* @brief This file is the map file (gnuarm or armgcc).
+*
+* Copyright (C) BouffaloLab 2018
+*
+****************************************************************************************
+*/
+
+/* configure the CPU type */
+OUTPUT_ARCH( "riscv" )
+/* link with the standard c library */
+INPUT(-lc)
+/* link with the standard GCC library */
+INPUT(-lgcc)
+/* configure the entry point */
+ENTRY(_enter)
+
+StackSize = 0x1000; /*  4KB */
+HeapSize  = 0x1000; /*  4KB */
+
+MEMORY
+{
+    xip_memory  (rx)  : ORIGIN = 0x23000000, LENGTH = 4096K
+    itcm_memory (rx)  : ORIGIN = 0x22014000, LENGTH = 16K
+    dtcm_memory (rx)  : ORIGIN = 0x42018000, LENGTH = 32K
+    ram_memory  (!rx) : ORIGIN = 0x42020000, LENGTH = 48K
+}
+
+SECTIONS
+{
+    PROVIDE(__metal_chicken_bit = 0);
+
+    .text :
+    {
+        . = ALIGN(4);
+        __text_code_start__ = .;
+        
+        KEEP (*(.text.metal.init.enter))
+        KEEP (*(SORT_NONE(.init)))
+        /* section information for finsh shell */
+        . = ALIGN(4);
+        _shell_command_start = .;
+        KEEP(*(shellCommand))
+        _shell_command_end = .;
+
+        /* section information for usb desc */
+        . = ALIGN(4);
+        _usb_desc_start = .;
+        KEEP(*(usb_desc))
+        . = ALIGN(4);
+        _usb_desc_end = .;       
+                                  
+        *(.text)
+        *(.text.*)
+        
+        /*put .rodata**/
+        *(EXCLUDE_FILE( *bl602_glb.o \
+                        *bl602_pds.o \
+                        *bl602_common.o \
+                        *bl602_sf_cfg.o \
+                        *bl602_sf_ctrl.o \
+                        *bl602_sflash.o \
+                        *bl602_xip_sflash.o \
+                        *bl602_ef_ctrl.o) .rodata*)
+        *(.rodata)
+        *(.rodata.*)
+        
+        *(.srodata)
+        *(.srodata.*)
+        
+        . = ALIGN(4);
+        __text_code_end__ = .;
+    } > xip_memory
+    
+    . = ALIGN(4);
+    __itcm_load_addr = .;
+    
+    .itcm_region : AT (__itcm_load_addr)
+    {
+        . = ALIGN(4);
+        __tcm_code_start__ = .;
+        
+        *(.tcm_code)
+        *(.tcm_const)
+        *(.sclock_rlt_code)
+        *(.sclock_rlt_const)
+        
+        *bl602_glb.o*(.rodata*)
+        *bl602_pds.o*(.rodata*)
+        *bl602_common.o*(.rodata*)
+        *bl602_sf_cfg.o*(.rodata*)
+        *bl602_sf_ctrl.o*(.rodata*)
+        *bl602_sflash.o*(.rodata*)
+        *bl602_xip_sflash.o*(.rodata*)
+        *bl602_ef_ctrl.o*(.rodata*)
+        
+        . = ALIGN(4);
+        __tcm_code_end__ = .;
+    } > itcm_memory
+    
+    __dtcm_load_addr = __itcm_load_addr + SIZEOF(.itcm_region);
+    
+    .dtcm_region : AT (__dtcm_load_addr)
+    {
+        . = ALIGN(4);
+        __tcm_data_start__ = .;
+        
+        *(.tcm_data)
+        /* *finger_print.o(.data*) */
+        
+        . = ALIGN(4);
+        __tcm_data_end__ = .;
+    } > dtcm_memory
+
+    /* .heap_dummy section doesn't contains any symbols. It is only
+     * used for linker to calculate size of heap sections, and assign
+     * values to heap symbols later */
+    .heap_dummy (NOLOAD):
+    {
+        . = ALIGN(0x4);
+        . = . + HeapSize;
+        . = ALIGN(0x4);
+    } > dtcm_memory
+
+    _HeapBase = ORIGIN(dtcm_memory) + LENGTH(dtcm_memory) - StackSize - HeapSize;  
+    _HeapSize = HeapSize;
+    
+    /* Check if data + heap + stack exceeds RAM limit */
+    ASSERT(_HeapBase >= __tcm_data_end__, "region RAM overflowed with stack")
+    
+    /*************************************************************************/
+    /* .stack_dummy section doesn't contains any symbols. It is only
+     * used for linker to calculate size of stack sections, and assign
+     * values to stack symbols later */
+    .stack_dummy (NOLOAD):
+    {
+        . = ALIGN(0x4);
+        . = . + StackSize;
+        . = ALIGN(0x4);
+    } > dtcm_memory
+    
+    /* Set stack top to end of RAM, and stack limit move down by
+     * size of stack_dummy section */
+    __StackTop = ORIGIN(dtcm_memory) + LENGTH(dtcm_memory);
+    PROVIDE( __freertos_irq_stack_top = __StackTop);
+    __StackLimit = __StackTop - SIZEOF(.stack_dummy);
+    
+    /* Check if data + heap + stack exceeds RAM limit */
+    ASSERT(__StackLimit >= __tcm_data_end__, "region RAM overflowed with stack")
+    /*************************************************************************/
+    
+    __system_ram_load_addr = __dtcm_load_addr + SIZEOF(.dtcm_region);
+    
+    .system_ram_data_region : AT (__system_ram_load_addr)
+    {
+        . = ALIGN(4);
+        __system_ram_data_start__ = .;
+        
+        *(.system_ram)
+        
+        . = ALIGN(4);
+        __system_ram_data_end__ = .;
+    } > ram_memory
+    
+    __ram_load_addr = __system_ram_load_addr + SIZEOF(.system_ram_data_region);
+    
+    /* Data section */
+    RAM_DATA : AT (__ram_load_addr)
+    {
+        . = ALIGN(4);
+        __ram_data_start__ = .;
+        
+        PROVIDE( __global_pointer$ = . + 0x800 );
+        
+        *(.data)
+        *(.data.*)
+        *(.sdata)
+        *(.sdata.*)
+        *(.sdata2)
+        *(.sdata2.*)
+        
+        . = ALIGN(4);
+        __ram_data_end__ = .;
+    } > ram_memory
+    
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        __bss_start__ = .;
+        
+        *(.bss*)
+        *(.sbss*)
+        *(COMMON)
+        
+        . = ALIGN(4);
+        __bss_end__ = .;
+    } > ram_memory
+
+    .noinit_data (NOLOAD) :
+    {
+        . = ALIGN(4);
+        __noinit_data_start__ = .;
+        
+        *(.noinit_data*)
+        
+        . = ALIGN(4);
+        __noinit_data_end__ = .;
+    } > ram_memory
+    
+    .heap (NOLOAD):
+    {
+        . = ALIGN(4);
+        __HeapBase = .;
+        
+        /*__end__ = .;*/
+        /*end = __end__;*/
+        KEEP(*(.heap*))
+        
+        . = ALIGN(4);
+        __HeapLimit = .;
+    } > ram_memory
+    __HeapLimit = ORIGIN(ram_memory) + LENGTH(ram_memory);
+    
+}
+
diff --git a/examples/hellowd/helloworld/cdk/helloworld.cdkproj b/examples/hellowd/helloworld/cdk/helloworld.cdkproj
new file mode 100644
index 00000000..2b004572
--- /dev/null
+++ b/examples/hellowd/helloworld/cdk/helloworld.cdkproj
@@ -0,0 +1,726 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
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+      
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+        
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+    
+    
+      
+    
+  
+  
+    
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+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+
diff --git a/examples/hellowd/helloworld/main.c b/examples/hellowd/helloworld/main.c
new file mode 100644
index 00000000..68c550a9
--- /dev/null
+++ b/examples/hellowd/helloworld/main.c
@@ -0,0 +1,57 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_uart.h"
+int main(void)
+{
+    bflb_platform_init(0);
+    MSG("hello world!\r\n");
+    while(1)
+    {
+
+    } 
+}
+
+#ifdef SHELL_SUPPORT
+#include "drv_shell.h"
+void hellowd()
+{
+    MSG("hello World\r\n");
+}
+
+int func(int argc, char *argv[])
+{
+    MSG("%dparameter(s)\r\n", argc);
+    for (uint8_t i = 1; i < argc; i++)
+    {
+        MSG("%s\r\n", argv[i]);
+    }
+    return 0;
+}
+
+SHELL_EXPORT_CMD(
+SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_FUNC)|SHELL_CMD_DISABLE_RETURN,
+hwd, hellowd, responds helloworld);
+SHELL_EXPORT_CMD(
+SHELL_CMD_PERMISSION(0)|SHELL_CMD_TYPE(SHELL_TYPE_CMD_MAIN)|SHELL_CMD_DISABLE_RETURN,
+echo, func, print a char using parameter case);
+#endif
diff --git a/examples/i2c/i2c_at24cxx/CMakeLists.txt b/examples/i2c/i2c_at24cxx/CMakeLists.txt
new file mode 100644
index 00000000..bfd0e557
--- /dev/null
+++ b/examples/i2c/i2c_at24cxx/CMakeLists.txt
@@ -0,0 +1,5 @@
+set(mains main.c)
+generate_bin()
+
+
+
diff --git a/examples/i2c/i2c_at24cxx/cdk/i2c_at24cxx.cdkproj b/examples/i2c/i2c_at24cxx/cdk/i2c_at24cxx.cdkproj
new file mode 100644
index 00000000..3080e914
--- /dev/null
+++ b/examples/i2c/i2c_at24cxx/cdk/i2c_at24cxx.cdkproj
@@ -0,0 +1,726 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/i2c/i2c_at24cxx/main.c b/examples/i2c/i2c_at24cxx/main.c
new file mode 100644
index 00000000..25544f2f
--- /dev/null
+++ b/examples/i2c/i2c_at24cxx/main.c
@@ -0,0 +1,61 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_i2c.h"
+#include "hal_uart.h"
+
+int main(void)
+{
+    i2c_msg_t msg[2];
+    uint8_t buf[8] = {0};
+
+    bflb_platform_init(0);
+
+    i2c_register(I2C0_INDEX, "i2c", DEVICE_OFLAG_RDWR);
+    struct device *i2c0 = device_find("i2c");
+
+    if (i2c0)
+    {
+        MSG("device find success\r\n");
+        device_open(i2c0, 0);
+    }
+    msg[0].buf = buf;
+    msg[0].flags = SUB_ADDR_1BYTE | I2C_WR;
+    msg[0].len = 8;
+    msg[0].slaveaddr = 0x50;
+    msg[0].subaddr = 0x00;
+
+    msg[1].buf = buf;
+    msg[1].flags = SUB_ADDR_1BYTE | I2C_RD;
+    msg[1].len = 8;
+    msg[1].slaveaddr = 0x50;
+    msg[1].subaddr = 0x00;
+    if (i2c_transfer(i2c0, &msg[0], 2) == 0)
+        MSG("\r\n read:%0x\r\n", msg[1].buf[0] << 8 | msg[1].buf[1]);
+
+    while (1)
+    {
+        MSG("\r\n i2c case\r\n");
+        bflb_platform_delay_ms(1000);
+        //   DEBUG("GPIO_PIN_RESET\r\n");
+    }
+}
\ No newline at end of file
diff --git a/examples/i2c/i2c_bmp180/CMakeLists.txt b/examples/i2c/i2c_bmp180/CMakeLists.txt
new file mode 100644
index 00000000..bfd0e557
--- /dev/null
+++ b/examples/i2c/i2c_bmp180/CMakeLists.txt
@@ -0,0 +1,5 @@
+set(mains main.c)
+generate_bin()
+
+
+
diff --git a/examples/i2c/i2c_bmp180/cdk/i2c_bmp180.cdkproj b/examples/i2c/i2c_bmp180/cdk/i2c_bmp180.cdkproj
new file mode 100644
index 00000000..af4f47f4
--- /dev/null
+++ b/examples/i2c/i2c_bmp180/cdk/i2c_bmp180.cdkproj
@@ -0,0 +1,726 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/i2c/i2c_bmp180/main.c b/examples/i2c/i2c_bmp180/main.c
new file mode 100644
index 00000000..98ed6571
--- /dev/null
+++ b/examples/i2c/i2c_bmp180/main.c
@@ -0,0 +1,54 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_i2c.h"
+#include "hal_uart.h"
+
+int main(void)
+{
+    i2c_msg_t msg1;
+    uint8_t buf[2] = {0};
+
+    bflb_platform_init(0);
+
+    i2c_register(I2C0_INDEX, "i2c", DEVICE_OFLAG_RDWR);
+    struct device *i2c0 = device_find("i2c");
+
+    if (i2c0)
+    {
+        MSG("device find success\r\n");
+        device_open(i2c0, 0);
+    }
+    msg1.buf = buf;
+    msg1.flags = SUB_ADDR_1BYTE | I2C_RD;
+    msg1.len = 2;
+    msg1.slaveaddr = 0xEE >> 1;
+    msg1.subaddr = 0xaa;
+    if (i2c_transfer(i2c0, &msg1, 1) == 0)
+        MSG("\r\n read:%0x\r\n", msg1.buf[0] << 8 | msg1.buf[1]);
+    while (1)
+    {
+        MSG("\r\n i2c case\r\n");
+        bflb_platform_delay_ms(1000);
+        //   DEBUG("GPIO_PIN_RESET\r\n");
+    }
+}
\ No newline at end of file
diff --git a/examples/i2s/i2s_play_form_flash/CMakeLists.txt b/examples/i2s/i2s_play_form_flash/CMakeLists.txt
new file mode 100644
index 00000000..240ea3d5
--- /dev/null
+++ b/examples/i2s/i2s_play_form_flash/CMakeLists.txt
@@ -0,0 +1,9 @@
+set(BSP_COMMON_DIR ${CMAKE_SOURCE_DIR}/bsp/bsp_common)
+set(TARGET_REQUIRED_LIBS fatfs)
+set(TARGET_REQUIRED_PRIVATE_INCLUDE ${BSP_COMMON_DIR}/es8388 ${BSP_COMMON_DIR}/spi_sd)
+set(TARGET_REQUIRED_SRCS ${BSP_COMMON_DIR}/es8388/bsp_es8388.c ${BSP_COMMON_DIR}/fatfs/fatfs_spi_sd.c ${BSP_COMMON_DIR}/spi_sd/bsp_spi_sd.c)
+set(mains main.c)
+generate_bin()
+
+
+
diff --git a/examples/i2s/i2s_play_form_flash/cdk/i2s_play_form_flash.cdkproj b/examples/i2s/i2s_play_form_flash/cdk/i2s_play_form_flash.cdkproj
new file mode 100644
index 00000000..ede0f239
--- /dev/null
+++ b/examples/i2s/i2s_play_form_flash/cdk/i2s_play_form_flash.cdkproj
@@ -0,0 +1,724 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        BL702;BL702_EVB;ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+
diff --git a/examples/i2s/i2s_play_form_flash/fhm_onechannel_16k_20.h b/examples/i2s/i2s_play_form_flash/fhm_onechannel_16k_20.h
new file mode 100644
index 00000000..5af4ff17
--- /dev/null
+++ b/examples/i2s/i2s_play_form_flash/fhm_onechannel_16k_20.h
@@ -0,0 +1,40010 @@
+
+
+//total len:640044 bytes
+const unsigned char fhm_onechannel_16k_20[]={
+	0x52, 0x49, 0x46, 0x46, 0x24, 0xc4, 0x09, 0x00, 0x57, 0x41, 0x56, 0x45, 0x66, 0x6d, 0x74, 0x20, 
+	0x10, 0x00, 0x00, 0x00, 0x01, 0x00, 0x01, 0x00, 0x80, 0x3e, 0x00, 0x00, 0x00, 0x7d, 0x00, 0x00, 
+	0x02, 0x00, 0x10, 0x00, 0x64, 0x61, 0x74, 0x61, 0x00, 0xc4, 0x09, 0x00, 0x24, 0x00, 0x1a, 0x00, 
+	0x1e, 0x00, 0x1c, 0x00, 0x22, 0x00, 0x23, 0x00, 0x1e, 0x00, 0x27, 0x00, 0x20, 0x00, 0x1e, 0x00, 
+	0x25, 0x00, 0x25, 0x00, 0x25, 0x00, 0x23, 0x00, 0x28, 0x00, 0x2e, 0x00, 0x2f, 0x00, 0x30, 0x00, 
+	0x3a, 0x00, 0x37, 0x00, 0x38, 0x00, 0x39, 0x00, 0x35, 0x00, 0x31, 0x00, 0x31, 0x00, 0x28, 0x00, 
+	0x29, 0x00, 0x21, 0x00, 0x27, 0x00, 0x1c, 0x00, 0x20, 0x00, 0x1d, 0x00, 0x1b, 0x00, 0x1b, 0x00, 
+	0x1a, 0x00, 0x11, 0x00, 0x0e, 0x00, 0x0f, 0x00, 0x13, 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x05, 0x00, 
+	0x07, 0x00, 0x03, 0x00, 0xff, 0xff, 0xfe, 0xff, 0x02, 0x00, 0x02, 0x00, 0xfc, 0xff, 0xfd, 0xff, 
+	0xff, 0xff, 0x06, 0x00, 0xff, 0xff, 0x03, 0x00, 0x02, 0x00, 0x09, 0x00, 0x0c, 0x00, 0x05, 0x00, 
+	0x02, 0x00, 0xfe, 0xff, 0x05, 0x00, 0x06, 0x00, 0x01, 0x00, 0x04, 0x00, 0x00, 0x00, 0x04, 0x00, 
+	0x03, 0x00, 0xfb, 0xff, 0xf7, 0xff, 0xf5, 0xff, 0xf2, 0xff, 0xed, 0xff, 0xf3, 0xff, 0xef, 0xff, 
+	0xee, 0xff, 0xee, 0xff, 0xf0, 0xff, 0xee, 0xff, 0xed, 0xff, 0xef, 0xff, 0xee, 0xff, 0xee, 0xff, 
+	0xee, 0xff, 0xf3, 0xff, 0xef, 0xff, 0xf5, 0xff, 0xf1, 0xff, 0xeb, 0xff, 0xf5, 0xff, 0x00, 0x00, 
+	0xf9, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfb, 0xff, 0x07, 0x00, 0x0a, 0x00, 0x05, 0x00, 0x0a, 0x00, 
+	0x0a, 0x00, 0x08, 0x00, 0x0a, 0x00, 0x05, 0x00, 0x08, 0x00, 0xfc, 0xff, 0xf9, 0xff, 0xfb, 0xff, 
+	0xfb, 0xff, 0xfd, 0xff, 0xf7, 0xff, 0xfa, 0xff, 0xf8, 0xff, 0xf9, 0xff, 0xfa, 0xff, 0xfc, 0xff, 
+	0xff, 0xff, 0xf8, 0xff, 0xf6, 0xff, 0xfe, 0xff, 0xff, 0xff, 0xf7, 0xff, 0x04, 0x00, 0xfd, 0xff, 
+	0x03, 0x00, 0xfe, 0xff, 0xff, 0xff, 0x06, 0x00, 0x02, 0x00, 0x0a, 0x00, 0xfd, 0xff, 0xfe, 0xff, 
+	0x02, 0x00, 0xfe, 0xff, 0x03, 0x00, 0x0d, 0x00, 0x01, 0x00, 0xff, 0xff, 0xfb, 0xff, 0xfe, 0xff, 
+	0xfe, 0xff, 0xf2, 0xff, 0xfa, 0xff, 0xf7, 0xff, 0xfa, 0xff, 0xf4, 0xff, 0x00, 0x00, 0xfb, 0xff, 
+	0xf0, 0xff, 0xfb, 0xff, 0xf3, 0xff, 0xed, 0xff, 0xeb, 0xff, 0xe3, 0xff, 0xe7, 0xff, 0xec, 0xff, 
+	0xe9, 0xff, 0xe6, 0xff, 0xe8, 0xff, 0xee, 0xff, 0xe7, 0xff, 0xea, 0xff, 0xe7, 0xff, 0xea, 0xff, 
+	0xe8, 0xff, 0xea, 0xff, 0xe7, 0xff, 0xe7, 0xff, 0xeb, 0xff, 0xe6, 0xff, 0xe9, 0xff, 0xe4, 0xff, 
+	0xf1, 0xff, 0xe6, 0xff, 0xe6, 0xff, 0xeb, 0xff, 0xe3, 0xff, 0xed, 0xff, 0xee, 0xff, 0xe7, 0xff, 
+	0xe4, 0xff, 0xe7, 0xff, 0xe5, 0xff, 0xd8, 0xff, 0xde, 0xff, 0xdf, 0xff, 0xdc, 0xff, 0xd7, 0xff, 
+	0xe1, 0xff, 0xd7, 0xff, 0xce, 0xff, 0xde, 0xff, 0xdd, 0xff, 0xdd, 0xff, 0xd9, 0xff, 0xd4, 0xff, 
+	0xdf, 0xff, 0xdc, 0xff, 0xe4, 0xff, 0xed, 0xff, 0xe4, 0xff, 0xed, 0xff, 0xe9, 0xff, 0xe4, 0xff, 
+	0xee, 0xff, 0xeb, 0xff, 0xec, 0xff, 0xf3, 0xff, 0xf3, 0xff, 0xfa, 0xff, 0xfe, 0xff, 0xf8, 0xff, 
+	0xf6, 0xff, 0x00, 0x00, 0xfe, 0xff, 0xf6, 0xff, 0xf6, 0xff, 0xff, 0xff, 0x00, 0x00, 0xfc, 0xff, 
+	0x00, 0x00, 0xf8, 0xff, 0xf8, 0xff, 0xf3, 0xff, 0xf2, 0xff, 0xf7, 0xff, 0xf6, 0xff, 0xf1, 0xff, 
+	0xf8, 0xff, 0xf4, 0xff, 0x01, 0x00, 0x04, 0x00, 0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 0x07, 0x00, 
+	0x06, 0x00, 0x06, 0x00, 0x05, 0x00, 0x08, 0x00, 0x04, 0x00, 0x0a, 0x00, 0x0f, 0x00, 0x0f, 0x00, 
+	0x0b, 0x00, 0x0b, 0x00, 0x17, 0x00, 0x1a, 0x00, 0x16, 0x00, 0x1b, 0x00, 0x20, 0x00, 0x24, 0x00, 
+	0x20, 0x00, 0x17, 0x00, 0x1d, 0x00, 0x25, 0x00, 0x1a, 0x00, 0x1b, 0x00, 0x1a, 0x00, 0x18, 0x00, 
+	0x19, 0x00, 0x20, 0x00, 0x19, 0x00, 0x12, 0x00, 0x12, 0x00, 0x1a, 0x00, 0x1c, 0x00, 0x24, 0x00, 
+	0x14, 0x00, 0x19, 0x00, 0x17, 0x00, 0x15, 0x00, 0x17, 0x00, 0x13, 0x00, 0x11, 0x00, 0x15, 0x00, 
+	0x17, 0x00, 0x12, 0x00, 0x14, 0x00, 0x17, 0x00, 0x1d, 0x00, 0x1a, 0x00, 0x19, 0x00, 0x18, 0x00, 
+	0x21, 0x00, 0x21, 0x00, 0x22, 0x00, 0x22, 0x00, 0x21, 0x00, 0x24, 0x00, 0x2e, 0x00, 0x26, 0x00, 
+	0x19, 0x00, 0x19, 0x00, 0x1a, 0x00, 0x12, 0x00, 0x17, 0x00, 0x10, 0x00, 0x0f, 0x00, 0x10, 0x00, 
+	0x0c, 0x00, 0x0a, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xfa, 0xff, 0xfb, 0xff, 0xf5, 0xff, 0xec, 0xff, 
+	0xef, 0xff, 0xf0, 0xff, 0xef, 0xff, 0xe5, 0xff, 0xec, 0xff, 0xe5, 0xff, 0xed, 0xff, 0xeb, 0xff, 
+	0xef, 0xff, 0xf6, 0xff, 0xf4, 0xff, 0xf9, 0xff, 0xf5, 0xff, 0xf2, 0xff, 0xf7, 0xff, 0xfc, 0xff, 
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+	0xc7, 0xfd, 0xae, 0xf8, 0x83, 0xf6, 0xc8, 0xf6, 0xc5, 0xf8, 0x0d, 0xfb, 0x9e, 0xfe, 0xdd, 0x02, 
+	0x4b, 0x05, 0x9c, 0x04, 0xb6, 0x01, 0xae, 0xfe, 0xba, 0xfb, 0x02, 0xf6, 0xcd, 0xee, 0xaf, 0xe9, 
+	0xf6, 0xe5, 0x52, 0xe4, 0xcb, 0xe3, 0x3d, 0xe4, 0x02, 0xe7, 0x71, 0xeb, 0x7d, 0xf0, 0xf1, 0xf5, 
+	0x31, 0xfa, 0x6d, 0xfc, 0x19, 0xfd, 0xd2, 0xfb, 0xfc, 0xf9, 0x05, 0xf8, 0x13, 0xf6, 0xe1, 0xf4, 
+	0x32, 0xf6, 0x59, 0xf9, 0x2e, 0xff, 0xc0, 0x0b, 0xc2, 0x14, 0xc7, 0x1d, 0x92, 0x24, 0xd2, 0x24, 
+	0x73, 0x23, 0xa5, 0x1c, 0x19, 0x12, 0x1c, 0x05, 0x50, 0xfc, 0xa1, 0xf4, 0x4c, 0xee, 0x44, 0xeb, 
+	0x20, 0xeb, 0x06, 0xf0, 0x98, 0xf8, 0x13, 0x01, 0x5d, 0x08, 0x89, 0x0f, 0xdf, 0x11, 0xc1, 0x10, 
+	0xf1, 0x0e, 0x2e, 0x0a, 0x5f, 0x04, 0x73, 0xfe, 0x91, 0xf9, 0xdb, 0xf7, 0x8d, 0xf8, 0x91, 0xf9, 
+	0x43, 0xfa, 0x56, 0xfe, 0x76, 0x04, 0xfd, 0x08, 0xc8, 0x0b, 0x3a, 0x0b, 0x2b, 0x08, 0xd1, 0x05, 
+	0x4d, 0x00, 0xbb, 0xf9, 0xd2, 0xf4, 0xe5, 0xf1, 0xb7, 0xf1, 0xe1, 0xf2, 0x70, 0xf5, 0xbb, 0xf9, 
+	0x3e, 0xff, 0x51, 0x05, 0x71, 0x09, 0x48, 0x0c, 0x8c, 0x0d, 0x78, 0x0d, 0x8e, 0x0c, 0x32, 0x09, 
+	0x40, 0x05, 0x87, 0x02, 0xb5, 0x00, 0xd1, 0x01, 0xed, 0x02, 0x2a, 0x08, 0xf6, 0x10, 0xcf, 0x17, 
+	0xea, 0x1e, 0x60, 0x20, 0x2c, 0x20, 0x90, 0x1d, 0x46, 0x14, 0xb1, 0x07, 0xa1, 0xfb, 0xe4, 0xf2, 
+	0xfc, 0xea, 0xf5, 0xe3, 0xd4, 0xdf, 0xdf, 0xe1, 0x84, 0xe8, 0xa8, 0xf0, 0xdb, 0xf7, 0xc2, 0xff, 
+	0x42, 0x07, 0x0e, 0x0a, 0xb3, 0x09, 0x5b, 0x06, 0x2c, 0x01, 0x6b, 0xfb, 0x0d, 0xf4, 0x00, 0xee, 
+	0x74, 0xea, 0x04, 0xea, 0x4d, 0xea, 0x85, 0xec, 0xfe, 0xf3, 0xce, 0xfb, 0x72, 0x01, 0xa5, 0x03, 
+	0xda, 0x03, 0x63, 0x04, 0x44, 0x03, 0x5f, 0xfd, 0x0e, 0xf6, 0x7a, 0xef, 0x87, 0xea, 0x49, 0xe8, 
+	0x71, 0xe7, 0xb4, 0xe8, 0x89, 0xed, 0x1e, 0xf4, 0x61, 0xfa, 0x56, 0xfe, 0xd0, 0x00, 0x9a, 0x01, 
+	0x8a, 0x00, 0x16, 0xff, 0x1e, 0xfd, 0x0b, 0xfb, 0x0b, 0xf9, 0x5f, 0xf9, 0x5f, 0xfb, 0x05, 0x00, 
+	0xe0, 0x0a, 0xf7, 0x13, 0x95, 0x1b, 0x51, 0x21, 0x2f, 0x22, 0x19, 0x22, 0xf6, 0x1e, 0x9f, 0x15, 
+	0x21, 0x0b, 0xdb, 0x02, 0xec, 0xfb, 0x35, 0xf6, 0xb0, 0xf1, 0xac, 0xef, 0x59, 0xf3, 0xb2, 0xfb, 
+	0x0a, 0x04, 0x19, 0x0b, 0xe1, 0x11, 0x16, 0x16, 0x3b, 0x17, 0xff, 0x15, 0x33, 0x12, 0x2e, 0x0d, 
+	0x99, 0x07, 0x4b, 0x01, 0xce, 0xfb, 0x6b, 0xf7, 0x6f, 0xf4, 0x90, 0xf2, 0x29, 0xf5, 0x62, 0xfb, 
+	0xd2, 0xff, 0x66, 0x02, 0x57, 0x02, 0x91, 0x00, 0x37, 0x00, 0xee, 0xfd, 0xa6, 0xf7, 0x1e, 0xf1, 
+	0x60, 0xec, 0x54, 0xea, 0x50, 0xea, 0xf3, 0xea, 0x5c, 0xed, 0xd2, 0xf2, 0xc7, 0xf9, 0xa8, 0xff, 
+	0xa9, 0x03, 0xb4, 0x05, 0x04, 0x05, 0xfc, 0x04, 0xdf, 0x03, 0xf6, 0x01, 0xf5, 0x00, 0x27, 0xff, 
+	0x28, 0x00, 0xb0, 0x02, 0xb8, 0x08, 0xaf, 0x12, 0x3f, 0x19, 0x7f, 0x20, 0xb1, 0x23, 0x34, 0x24, 
+	0x5b, 0x22, 0x56, 0x1a, 0x19, 0x0f, 0x4f, 0x04, 0xf8, 0xfb, 0xa1, 0xf4, 0x80, 0xee, 0x35, 0xeb, 
+	0x07, 0xee, 0x5d, 0xf5, 0xd4, 0xfd, 0xfb, 0x04, 0xa9, 0x0b, 0x1d, 0x12, 0x15, 0x14, 0x1c, 0x14, 
+	0xe3, 0x10, 0x10, 0x0b, 0xe8, 0x04, 0x4e, 0xfd, 0x02, 0xf7, 0x4f, 0xf2, 0x15, 0xef, 0xba, 0xed, 
+	0x92, 0xee, 0x9d, 0xf3, 0x20, 0xfa, 0xb4, 0xfe, 0xbf, 0x00, 0xf8, 0x00, 0x06, 0x00, 0x05, 0xfe, 
+	0x6a, 0xf7, 0xde, 0xee, 0xac, 0xe8, 0x98, 0xe4, 0xd6, 0xe2, 0x77, 0xe3, 0xc6, 0xe5, 0x10, 0xeb, 
+	0x30, 0xf3, 0x71, 0xfb, 0x3c, 0x02, 0xdd, 0x05, 0x58, 0x07, 0xb8, 0x06, 0xbb, 0x05, 0xdc, 0x03, 
+	0x26, 0x00, 0x58, 0xfd, 0xd6, 0xfb, 0x88, 0xfc, 0x0a, 0xfe, 0xfc, 0x06, 0x1d, 0x0e, 0x16, 0x15, 
+	0x45, 0x1b, 0xdd, 0x1b, 0xd5, 0x1b, 0xe4, 0x15, 0xb7, 0x0a, 0x51, 0xfd, 0x2a, 0xf4, 0xca, 0xeb, 
+	0x2c, 0xe3, 0xe8, 0xdd, 0xea, 0xdc, 0xfc, 0xe1, 0xaf, 0xea, 0x85, 0xf2, 0x88, 0xf9, 0x1d, 0x02, 
+	0x26, 0x07, 0x60, 0x09, 0xbc, 0x0a, 0xcf, 0x08, 0xc6, 0x04, 0x2c, 0xff, 0x65, 0xf9, 0xed, 0xf5, 
+	0x23, 0xf5, 0xf8, 0xf4, 0xce, 0xf4, 0x1e, 0xf9, 0x1c, 0x00, 0x55, 0x05, 0xa2, 0x08, 0x1b, 0x0b, 
+	0x80, 0x0b, 0xc0, 0x0b, 0x76, 0x08, 0xf0, 0x00, 0x48, 0xfa, 0xa3, 0xf5, 0x11, 0xf3, 0x73, 0xf2, 
+	0xec, 0xf2, 0x0c, 0xf5, 0x9f, 0xf9, 0x0e, 0xff, 0x25, 0x04, 0x5f, 0x08, 0x4f, 0x0a, 0xc4, 0x0a, 
+	0xed, 0x09, 0xdb, 0x08, 0x4b, 0x08, 0x57, 0x07, 0xbb, 0x06, 0x7a, 0x09, 0xa8, 0x0b, 0xe0, 0x13, 
+	0x37, 0x1e, 0xac, 0x26, 0x13, 0x30, 0xd6, 0x32, 0x06, 0x34, 0x85, 0x30, 0x38, 0x27, 0x18, 0x19, 
+	0x3a, 0x0c, 0xdc, 0x01, 0x0e, 0xf8, 0xda, 0xef, 0x7e, 0xeb, 0x13, 0xee, 0x5c, 0xf5, 0x48, 0xfe, 
+	0x94, 0x05, 0x27, 0x0c, 0xcf, 0x10, 0x5e, 0x11, 0x05, 0x10, 0xf4, 0x0b, 0x9b, 0x06, 0xc2, 0xff, 
+	0xa7, 0xf7, 0xc8, 0xf0, 0x85, 0xeb, 0x34, 0xe9, 0x73, 0xe8, 0x91, 0xe9, 0x95, 0xee, 0x61, 0xf3, 
+	0x7a, 0xf5, 0xc1, 0xf4, 0x79, 0xf1, 0xe8, 0xee, 0x70, 0xeb, 0x9f, 0xe5, 0x03, 0xdf, 0x56, 0xd9, 
+	0x99, 0xd6, 0xee, 0xd6, 0x26, 0xd9, 0x7f, 0xdc, 0x88, 0xe1, 0x2f, 0xe7, 0x84, 0xec, 0x79, 0xf0, 
+	0xdc, 0xf2, 0x46, 0xf4, 0x02, 0xf4, 0x81, 0xf3, 0x22, 0xf3, 0xce, 0xf3, 0x93, 0xf4, 0x10, 0xf7, 
+	0xda, 0xfa, 0x16, 0x01, 0xec, 0x0d, 0x3f, 0x18, 0x2d, 0x22, 0x99, 0x28, 0x6e, 0x2b, 0x89, 0x2c, 
+	0xf1, 0x25, 0x99, 0x1a, 0xdd, 0x0e, 0x50, 0x06, 0xa2, 0xfe, 0x91, 0xf7, 0xc4, 0xf2, 0x60, 0xf2, 
+	0x83, 0xf7, 0x31, 0xfe, 0x91, 0x04, 0xe5, 0x0b, 0xca, 0x12, 0x9f, 0x15, 0x20, 0x16, 0x85, 0x14, 
+	0x5b, 0x10, 0xb4, 0x0a, 0x1c, 0x03, 0x71, 0xfc, 0x64, 0xf9, 0x28, 0xf9, 0xde, 0xf9, 0x1e, 0xfc, 
+	0x1c, 0x03, 0x62, 0x0b, 0x8e, 0x11, 0x87, 0x14, 0xa1, 0x14, 0x22, 0x13, 0x94, 0x10, 0x70, 0x0a, 
+	0x2b, 0x03, 0xc3, 0xfc, 0x08, 0xf7, 0xe8, 0xf3, 0xac, 0xf2, 0x4b, 0xf3, 0x30, 0xf6, 0x9b, 0xf9, 
+	0xdf, 0xfc, 0xda, 0x00, 0x8c, 0x03, 0xed, 0x03, 0x0d, 0x03, 0x37, 0x01, 0xd6, 0xfe, 0x95, 0xfc, 
+	0x42, 0xf9, 0xfc, 0xf7, 0x6d, 0xf8, 0x17, 0xfb, 0x4d, 0x05, 0xff, 0x0c, 0x16, 0x15, 0xed, 0x19, 
+	0x53, 0x1b, 0xce, 0x1c, 0xe4, 0x17, 0x5f, 0x0d, 0xf9, 0x00, 0xa7, 0xf7, 0x79, 0xf0, 0xda, 0xe8, 
+	0x60, 0xe3, 0x69, 0xe3, 0x8b, 0xe7, 0x49, 0xee, 0x1e, 0xf4, 0xa2, 0xf9, 0xf0, 0xff, 0x4f, 0x03, 
+	0x44, 0x04, 0xbd, 0x02, 0x8b, 0xff, 0x6d, 0xfa, 0x8c, 0xf3, 0x80, 0xed, 0x87, 0xea, 0xed, 0xea, 
+	0x67, 0xec, 0x16, 0xee, 0xd2, 0xf2, 0xd1, 0xfa, 0x81, 0x01, 0xc4, 0x05, 0xf0, 0x06, 0xb5, 0x06, 
+	0x26, 0x06, 0x2d, 0x01, 0x8e, 0xfa, 0x71, 0xf4, 0x88, 0xf0, 0x26, 0xef, 0x41, 0xef, 0x21, 0xf1, 
+	0x28, 0xf4, 0x4b, 0xf8, 0xd1, 0xfc, 0xc5, 0x00, 0xcd, 0x03, 0xd9, 0x04, 
+};
+
+
diff --git a/examples/i2s/i2s_play_form_flash/main.c b/examples/i2s/i2s_play_form_flash/main.c
new file mode 100644
index 00000000..16005b17
--- /dev/null
+++ b/examples/i2s/i2s_play_form_flash/main.c
@@ -0,0 +1,100 @@
+
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+
+#include "hal_i2s.h"
+#include "hal_gpio.h"
+#include "hal_dma.h"
+#include "fhm_onechannel_16k_20.h"
+#include "bsp_es8388.h"
+
+
+static ES8388_Cfg_Type ES8388Cfg = {
+    .work_mode      = ES8388_CODEC_MDOE,        /*!< ES8388 work mode */
+    .role           = ES8388_SLAVE,             /*!< ES8388 role */
+    .mic_input_mode = ES8388_DIFF_ENDED_MIC,    /*!< ES8388 mic input mode */
+    .mic_pga        = ES8388_MIC_PGA_3DB,      /*!< ES8388 mic PGA */
+    .i2s_frame      = ES8388_LEFT_JUSTIFY_FRAME,     /*!< ES8388 I2S frame */
+    .data_width     = ES8388_DATA_LEN_16,       /*!< ES8388 I2S dataWitdh */
+};
+
+int main(void)
+{
+
+    bflb_platform_init(0);
+
+    /* init ES8388 Codec */
+    ES8388_Init(&ES8388Cfg);
+    ES8388_Set_Voice_Volume(60);
+    
+    MSG("Play Music Form flash\r\n");
+
+    /* register & open i2s device */
+    i2s_register(I2S0_INDEX,"I2S",DEVICE_OFLAG_RDWR);
+    struct device* i2s  = device_find("I2S");
+
+    ((i2s_device_t*)i2s)->iis_mode = I2S_MODE_MASTER;
+    ((i2s_device_t*)i2s)->interface_mode = I2S_MODE_LEFT;
+    ((i2s_device_t*)i2s)->sampl_freq_hz = 16*1000;
+    ((i2s_device_t*)i2s)->channel_num = I2S_FS_CHANNELS_NUM_MONO;
+    ((i2s_device_t*)i2s)->frame_size = I2S_FRAME_LEN_16;
+    ((i2s_device_t*)i2s)->data_size = I2S_DATA_LEN_16;
+    ((i2s_device_t*)i2s)->fifo_threshold = 8;
+
+    if(i2s)
+    {
+        device_open(i2s,DEVICE_OFLAG_DMA_TX|DEVICE_OFLAG_DMA_RX);
+        MSG("device open success\r\n");
+    }
+
+
+    /* register & open dma device */
+    if(dma_allocate_register("i2s_dma",DEVICE_OFLAG_RDWR) == SUCCESS){
+        MSG("dma allocate success\r\n");
+    }
+
+    struct device *i2s_dma = device_find("i2s_dma");
+
+    if(i2s_dma)
+    {
+        ((dma_device_t*)i2s_dma)->direction = DMA_MEMORY_TO_PERIPH;
+        ((dma_device_t*)i2s_dma)->transfer_mode = DMA_LLI_ONCE_MODE;
+        ((dma_device_t*)i2s_dma)->src_req = DMA_REQUEST_NONE;
+        ((dma_device_t*)i2s_dma)->dst_req = DMA_REQUEST_I2S_TX;
+        ((dma_device_t*)i2s_dma)->src_width = DMA_TRANSFER_WIDTH_16BIT;
+        ((dma_device_t*)i2s_dma)->dst_width = DMA_TRANSFER_WIDTH_16BIT;
+
+        device_open(i2s_dma, 0);
+
+        /* connect i2s device and dma device */
+        device_control(i2s,DEVICE_CTRL_I2S_ATTACH_TX_DMA,(void*)i2s_dma);
+
+        /* start play source*/
+        device_write(i2s,0,fhm_onechannel_16k_20,sizeof(fhm_onechannel_16k_20));
+    }
+
+    MSG("Play Music start \r\n");
+
+    BL_CASE_SUCCESS;
+}
+
diff --git a/examples/i2s/i2s_play_form_sd/CMakeLists.txt b/examples/i2s/i2s_play_form_sd/CMakeLists.txt
new file mode 100644
index 00000000..16ba5333
--- /dev/null
+++ b/examples/i2s/i2s_play_form_sd/CMakeLists.txt
@@ -0,0 +1,9 @@
+set(BSP_COMMON_DIR ${CMAKE_SOURCE_DIR}/bsp/bsp_common)
+set(TARGET_REQUIRED_LIBS fatfs)
+set(TARGET_REQUIRED_PRIVATE_INCLUDE ${BSP_COMMON_DIR}/es8388 ${BSP_COMMON_DIR}/spi_sd ${BSP_COMMON_DIR}/audio )
+set(TARGET_REQUIRED_SRCS ${BSP_COMMON_DIR}/es8388/bsp_es8388.c ${BSP_COMMON_DIR}/fatfs/fatfs_spi_sd.c ${BSP_COMMON_DIR}/spi_sd/bsp_spi_sd.c ./wav_play_form_sd_card.c)
+set(mains main.c)
+generate_bin()
+
+
+
diff --git a/examples/i2s/i2s_play_form_sd/main.c b/examples/i2s/i2s_play_form_sd/main.c
new file mode 100644
index 00000000..c62fdfae
--- /dev/null
+++ b/examples/i2s/i2s_play_form_sd/main.c
@@ -0,0 +1,84 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+
+#include "ff.h"
+#include "wav_play_form_sd_card.h"
+
+FATFS Fs_1; 
+audio_dev_t   Audio_Dev;
+
+void fatfs_sd_driver_register(void);
+
+int main(void)
+{
+    FRESULT res;
+
+    bflb_platform_init(0);
+
+    fatfs_sd_driver_register();
+    sd_wav_play_register(&Audio_Dev);
+
+    res = f_mount(&Fs_1,"1:",1);
+    if(res==FR_OK)
+    {
+        if(Audio_Dev.audio_init(&Audio_Dev,"1:wav_test/test9_44100_stereo_s32(24bit).wav") == 0)
+        {
+            MSG("Audio Init success\r\n");
+        }else{
+            MSG("Audio Init error\r\n");
+        }
+    }
+    else
+    {
+        MSG("fatfs open ERROR\r\n");
+    }
+
+    /* start/stop test */
+    Audio_Dev.audio_control(&Audio_Dev,AUDIO_CMD_START,NULL);
+    bflb_platform_delay_ms(10000);
+    Audio_Dev.audio_control(&Audio_Dev,AUDIO_CMD_STOP,NULL);
+    bflb_platform_delay_ms(5000);
+    Audio_Dev.audio_control(&Audio_Dev,AUDIO_CMD_START,NULL);
+    bflb_platform_delay_ms(5000);
+    
+    /* volume test */
+    for(uint32_t vol=0; vol<80; vol++)
+    {
+        Audio_Dev.audio_control(&Audio_Dev,AUDIO_CMD_VOLUME,(void *)vol);
+        bflb_platform_delay_ms(100);
+    }
+    for(uint32_t vol=80; vol>0; vol--)
+    {
+        Audio_Dev.audio_control(&Audio_Dev,AUDIO_CMD_VOLUME,(void *)vol);
+        bflb_platform_delay_ms(100);
+    }
+
+    Audio_Dev.audio_control(&Audio_Dev,AUDIO_CMD_VOLUME,(void *)30);
+
+    BL_CASE_SUCCESS;
+
+}
+
+
+
+
diff --git a/examples/i2s/i2s_play_form_sd/wav_play_form_sd_card.c b/examples/i2s/i2s_play_form_sd/wav_play_form_sd_card.c
new file mode 100644
index 00000000..a1df5f62
--- /dev/null
+++ b/examples/i2s/i2s_play_form_sd/wav_play_form_sd_card.c
@@ -0,0 +1,300 @@
+#include "bsp_es8388.h"
+#include "hal_i2s.h"
+#include "hal_dma.h"
+#include "ff.h"
+#include "wav_play_form_sd_card.h"
+
+static int wav_data_parser(uint8_t buff[1024], wav_information_t *wav_information);
+static uint32_t pcm_24bit_to_32bit(uint8_t *buff, uint32_t data_size);
+static int sd_wav_play_init(audio_dev_t *audio_dev,const TCHAR* path);
+static int sd_wav_play_control(struct audio_dev *audio_dev, AUDIO_CMD_t cmd, void *args);
+static int sd_wav_play_callback(audio_dev_t *audio_dev);
+
+static FIL Wav_Fp;
+
+static uint8_t Data_Buff0[4*1024]  __attribute__((section(".system_ram"),aligned(4)));
+static uint8_t Data_Buff1[4*1024]  __attribute__((section(".system_ram"),aligned(4)));
+
+static ES8388_Cfg_Type ES8388Cfg = {
+    .work_mode      = ES8388_CODEC_MDOE,        /*!< ES8388 work mode */
+    .role           = ES8388_SLAVE,             /*!< ES8388 role */
+    .mic_input_mode = ES8388_DIFF_ENDED_MIC,    /*!< ES8388 mic input mode */
+    .mic_pga        = ES8388_MIC_PGA_3DB,       /*!< ES8388 mic PGA */
+    .i2s_frame      = ES8388_LEFT_JUSTIFY_FRAME,/*!< ES8388 I2S frame */
+    .data_width     = ES8388_DATA_LEN_16,       /*!< ES8388 I2S dataWitdh */
+};
+
+static wav_information_t  Wav_Information;
+static audio_dev_t   *p_Audio_Dev = NULL;
+
+static void dma_ch2_irq_callback(struct device *dev, void *args, uint32_t size ,uint32_t state)
+{
+    if(p_Audio_Dev && p_Audio_Dev->audio_callback)
+    {
+        p_Audio_Dev->audio_callback(p_Audio_Dev);
+    }
+}
+
+/* get File pointer from top of file*/
+static int wav_data_parser(uint8_t buff[1024], wav_information_t *wav_information)
+{
+    uint32_t offset=0;
+    uint32_t chunk_id;
+
+    /* RIFF WAVE Chunk */
+    chunk_id = ((chunk_riff_t *)&buff[offset])->chunk_id;
+    if(chunk_id == 0x46464952)
+    {
+        wav_information->chunk_riff_offset = offset;
+        wav_information->chunk_riff = *((chunk_riff_t *)&buff[offset]);
+        offset += sizeof(chunk_riff_t);
+    }else{
+        wav_information->chunk_riff_offset = -1;
+        return 1;
+    }
+    /* Format Chunk */
+    chunk_id = ((chunk_format_t *)&buff[offset])->chunk_id;
+    if(chunk_id == 0x20746D66 && offset<1000) /* fmt */
+    {
+        wav_information->chunk_format_offset = offset;
+        wav_information->chunk_format = *((chunk_format_t *)&buff[offset]);
+        offset += ((chunk_format_t*)&buff[offset])->chunk_size + 8;
+    }else
+    {
+        wav_information->chunk_format_offset = -1;
+        return 1;
+    }
+    /* Fact/list Chunk */
+    chunk_id = ((chunk_fact_t *)&buff[offset])->chunk_id;
+    if((chunk_id == 0X74636166 || chunk_id == 0X5453494C) && offset<1000) /*fact or list*/
+    {
+        wav_information->chunk_fact_offset = offset;
+        wav_information->chunk_fact = *((chunk_fact_t *)&buff[offset]);
+        offset += ((chunk_fact_t*)&buff[offset])->chunk_size + 8;
+    }else{
+        wav_information->chunk_fact_offset = -1;
+    }
+    /* Data Chunk */
+    chunk_id = ((chunk_data_t *)&buff[offset])->chunk_id;
+    if(chunk_id == 0X61746164 && offset<1000 )
+    {
+        wav_information->chunk_data_offset = offset;
+        wav_information->chunk_data = *((chunk_data_t *)&buff[offset]);
+    }else{
+        wav_information->chunk_data_offset = -1;
+        return 1;
+    }
+    return 0;
+}
+
+static uint32_t pcm_24bit_to_32bit(uint8_t *buff, uint32_t data_size)
+{
+    /* buff大小应该在data_size的三分之四倍以上 */
+    for (uint16_t i = data_size / 3; i > 0; i--)
+    {
+        buff[i * 4 - 1] = buff[i * 3 - 1];
+        buff[i * 4 - 2] = buff[i * 3 - 2];
+        buff[i * 4 - 3] = buff[i * 3 - 3];
+        buff[i * 4 - 4] = 0;
+    }
+    return data_size/3*4;
+}
+
+static int sd_wav_play_init(audio_dev_t *audio_dev, const TCHAR* path)
+{
+    UINT num;
+    int res;
+    uint8_t buff[1024];
+
+    audio_dev->buff_using = 1;
+    audio_dev->device = (struct device*)NULL;
+
+    f_close(&Wav_Fp);
+    res = f_open(&Wav_Fp, path, FA_READ);
+
+    res |= f_lseek(&Wav_Fp, 0);
+    res |= f_read(&Wav_Fp, buff, sizeof(buff), &num);
+    if(res != FR_OK)
+    {
+        MSG("wav file open error\r\n");
+        return 1;
+    }
+    res = wav_data_parser(buff, &Wav_Information);
+    if (res == 0)
+    {
+        audio_dev->wav_information = &Wav_Information;
+        /*
+        MSG("RIFF_offset:  %d\r\n", Wav_Information.chunk_riff_offset);
+        MSG("format_offset:%d\r\n", Wav_Information.chunk_format_offset);
+        MSG("fact_offset:  %d\r\n", Wav_Information.chunk_fact_offset);
+        MSG("data_offset:  %d\r\n", Wav_Information.chunk_data_offset);
+        */
+    }
+    else
+    {
+        MSG("wav file parse error\r\n");
+        return 1;
+    }
+    
+    i2s_register(I2S0_INDEX,"I2S",DEVICE_OFLAG_RDWR);
+    audio_dev->device = device_find("I2S");
+
+    dma_register(DMA0_CH2_INDEX, "i2s_ch2", DEVICE_OFLAG_RDWR);
+    struct device *dma_ch2 = device_find("i2s_ch2");
+
+    if((audio_dev->device) && dma_ch2)
+    {
+        /* I2S Config */
+        ((i2s_device_t*)(audio_dev->device))->interface_mode = I2S_MODE_LEFT;
+        ((i2s_device_t*)(audio_dev->device))->sampl_freq_hz = audio_dev->wav_information->chunk_format.sample_rate ;
+        ((i2s_device_t*)(audio_dev->device))->channel_num = audio_dev->wav_information->chunk_format.num_of_channels;
+        uint8_t pcm_w = audio_dev->wav_information->chunk_format.bits_per_sample/8;
+        if(pcm_w <= 2)
+            ((i2s_device_t*)(audio_dev->device))->frame_size = I2S_FRAME_LEN_16;
+        else
+            ((i2s_device_t*)(audio_dev->device))->frame_size = I2S_FRAME_LEN_32;
+        ((i2s_device_t*)(audio_dev->device))->data_size = ((i2s_device_t*)(audio_dev->device))->frame_size;
+        ((i2s_device_t*)(audio_dev->device))->fifo_threshold = 8;
+        res = device_open((audio_dev->device),DEVICE_OFLAG_DMA_TX);
+
+        /* ES8388 Config */
+        switch (((i2s_device_t*)(audio_dev->device))->data_size)
+        {
+        case I2S_FRAME_LEN_16:
+            ES8388Cfg.data_width = ES8388_DATA_LEN_16;
+            break;
+        case I2S_FRAME_LEN_24:
+            ES8388Cfg.data_width = ES8388_DATA_LEN_24;
+            break;
+        case I2S_FRAME_LEN_32:
+            ES8388Cfg.data_width = ES8388_DATA_LEN_32;
+            break;
+        default:
+            return 1;
+            break;
+        }
+        
+        ES8388_Init(&ES8388Cfg);
+        ES8388_Set_Voice_Volume(20);  
+
+        MSG("sampl_freq_hz : %d\r\n",((i2s_device_t*)(audio_dev->device))->sampl_freq_hz);
+        MSG("channel_num   : %d\r\n",((i2s_device_t*)(audio_dev->device))->channel_num);
+        MSG("data_size     : %d\r\n",((i2s_device_t*)(audio_dev->device))->data_size);
+
+        /* DMA Config */
+        ((dma_device_t*)dma_ch2)->direction = DMA_MEMORY_TO_PERIPH;
+        ((dma_device_t*)dma_ch2)->transfer_mode = DMA_LLI_ONCE_MODE;
+        ((dma_device_t*)dma_ch2)->src_req = (uint32_t)NULL;
+        ((dma_device_t*)dma_ch2)->dst_req = DMA_REQUEST_I2S_TX;
+        switch (((i2s_device_t*)(audio_dev->device))->data_size * ((i2s_device_t*)(audio_dev->device))->channel_num)
+        {
+        case I2S_DATA_LEN_8:
+            ((dma_device_t*)dma_ch2)->src_width = DMA_TRANSFER_WIDTH_8BIT;
+            ((dma_device_t*)dma_ch2)->dst_width = DMA_TRANSFER_WIDTH_8BIT;
+            break;
+        case I2S_DATA_LEN_16:
+            ((dma_device_t*)dma_ch2)->src_width = DMA_TRANSFER_WIDTH_16BIT;
+            ((dma_device_t*)dma_ch2)->dst_width = DMA_TRANSFER_WIDTH_16BIT;
+            break;
+        default:
+            ((dma_device_t*)dma_ch2)->src_width = DMA_TRANSFER_WIDTH_32BIT;
+            ((dma_device_t*)dma_ch2)->dst_width = DMA_TRANSFER_WIDTH_32BIT;
+            break;
+        }
+
+        device_open(dma_ch2, 0);
+        device_set_callback(dma_ch2, dma_ch2_irq_callback);
+        device_control(dma_ch2, DEVICE_CTRL_SET_INT, NULL);
+        device_control((audio_dev->device),DEVICE_CTRL_I2S_ATTACH_TX_DMA,(void*)dma_ch2);
+
+        /* Fill data frist*/
+        f_lseek(&Wav_Fp, audio_dev->wav_information->chunk_data_offset+sizeof(chunk_data_t));
+        if(audio_dev->wav_information->chunk_format.bits_per_sample/8 == 3)
+        {
+            f_read(&Wav_Fp,audio_dev->buff[0], audio_dev->buff_size_max/4*3, &num);
+            audio_dev->buff_data_size[0] = pcm_24bit_to_32bit(audio_dev->buff[0],num);
+            f_read(&Wav_Fp,audio_dev->buff[1], audio_dev->buff_size_max/4*3, &num);
+            audio_dev->buff_data_size[1] = pcm_24bit_to_32bit(audio_dev->buff[1],num);
+        }
+        else
+        {
+            f_read(&Wav_Fp,audio_dev->buff[0], audio_dev->buff_size_max, &num);
+            audio_dev->buff_data_size[0] = num;
+            f_read(&Wav_Fp,audio_dev->buff[1], audio_dev->buff_size_max, &num);
+            audio_dev->buff_data_size[1] = num;
+        }
+    }
+    else{
+        return 1;
+    }
+    return 0;
+}
+
+static int sd_wav_play_control(struct audio_dev *audio_dev, AUDIO_CMD_t cmd, void *args)
+{
+    int res = -1;
+    switch (cmd)
+    {
+    case AUDIO_CMD_START:
+        res = device_write(audio_dev->device,0,audio_dev->buff[!audio_dev->buff_using],audio_dev->buff_data_size[!audio_dev->buff_using]);
+        audio_dev->audio_state = 1;
+        break;
+    case AUDIO_CMD_STOP:
+        audio_dev->audio_state = 0;
+        res=0;
+        break;
+    case AUDIO_CMD_VOLUME:   
+        res = ES8388_Set_Voice_Volume((uint32_t)args);
+        break;
+    default:
+        break;
+    }
+    return res;
+}
+
+static int sd_wav_play_callback(audio_dev_t *audio_dev)
+{
+    uint32_t num=0;
+    uint8_t buff_using = audio_dev->buff_using;
+    if(audio_dev->buff_data_size[!buff_using] )
+    {
+        if(audio_dev->audio_state)
+        {
+            device_write(audio_dev->device, 0, audio_dev->buff[!buff_using], audio_dev->buff_data_size[!buff_using]);
+            audio_dev->buff_using = !buff_using;
+        }
+
+        if (audio_dev->wav_information->chunk_format.bits_per_sample / 8 == 3)
+        {
+            f_read(&Wav_Fp, audio_dev->buff[buff_using], audio_dev->buff_size_max / 4 * 3, &num);
+            num = pcm_24bit_to_32bit(audio_dev->buff[buff_using], num);
+        }
+        else
+        {
+            f_read(&Wav_Fp, audio_dev->buff[buff_using], audio_dev->buff_size_max, &num);
+        }
+        audio_dev->buff_data_size[buff_using] = num;
+    }
+
+    if(num==0 && audio_dev->buff_data_size[0]==0 && audio_dev->buff_data_size[1]==0)
+    {
+        MSG("End of the play\r\n");
+    }
+    return 0;
+}
+
+int sd_wav_play_register(audio_dev_t *audio_dev)
+{
+    p_Audio_Dev = audio_dev;
+    audio_dev->audio_init = sd_wav_play_init,
+    audio_dev->audio_control = sd_wav_play_control,
+    audio_dev->audio_callback = sd_wav_play_callback,
+
+    audio_dev->buff[0] = Data_Buff0;
+    audio_dev->buff[1] = Data_Buff1;
+    audio_dev->buff_data_size[0] = 0;
+    audio_dev->buff_data_size[1] = 0;
+    audio_dev->buff_size_max = sizeof(Data_Buff1);
+    return 0;
+}
+
diff --git a/examples/i2s/i2s_play_form_sd/wav_play_form_sd_card.h b/examples/i2s/i2s_play_form_sd/wav_play_form_sd_card.h
new file mode 100644
index 00000000..4ab7841c
--- /dev/null
+++ b/examples/i2s/i2s_play_form_sd/wav_play_form_sd_card.h
@@ -0,0 +1,95 @@
+#ifndef __MAV_PLAY_H__ 
+#define __MAV_PLAY_H__ 
+
+#include "hal_i2s.h"
+
+//WAV文件块定义
+
+/* RIFF (RIFF WAVE Chunk) */
+typedef  struct __attribute__((packed))
+{
+    uint32_t  chunk_id;      /*chunk id:"RIFF",(0X46464952) */
+    uint32_t chunk_size;     /*file size -8 */
+    uint32_t format;         /* "WAVE" (0X45564157) */
+}chunk_riff_t ;
+
+/* fmt (Format Chunk)*/
+typedef struct __attribute__((packed))
+{
+    uint32_t chunk_id;        /* chunk id:"fmt",(0X20746D66) */
+    uint32_t chunk_size ;     /* fmt size -8  = 20*/
+    uint16_t audio_format;    /* 音频格式;0X10,表示线性 PCM; 0X11 表示 IMA ADPCM */
+    uint16_t num_of_channels;  /* 通道数量;1,表示单声道;2,表示双声道*/
+    uint32_t sample_rate;     /* 采样率;0X1F40,表示 8Khz */
+    uint32_t byte_rate;       /* 字节速率 */
+    uint16_t block_align;     /*块对齐(字节)*/
+    uint16_t bits_per_sample;  /*单个采样数据大小;4 位 ADPCM,设置为 4*/ 
+}chunk_format_t;
+
+//fact (Fact Chunk)
+typedef struct  __attribute__((packed))
+{
+    uint32_t chunk_id;        //chunk id;这里固定为"fact",即 0X74636166;
+    uint32_t chunk_size ;     //子集合大小(不包括 ID 和 Size);这里为:4.
+    uint32_t data_fact_size;   //数据转换为 PCM 格式后的大小
+}chunk_fact_t;
+
+//data (Data Chunk)
+typedef struct __attribute__((packed))
+{
+    uint32_t chunk_id;        //chunk id;这里固定为"data",即 0X61746164
+    uint32_t chunk_size ;     //子集合大小(不包括 ID 和 Size);文件大小-60.
+}chunk_data_t;
+
+//
+typedef enum
+{
+    CHUNK_RIFF,
+    CHUNK_FORMAT,
+    CHUNK_FACT,
+    CHUNK_DATA,
+}mav_chunk_t;
+
+//.wav information
+typedef struct 
+{
+    int            chunk_riff_offset;  //在数据里的位置偏移，-1表示没有此块
+    chunk_riff_t   chunk_riff;
+    int            chunk_format_offset;
+    chunk_format_t chunk_format;
+    int            chunk_fact_offset;
+    chunk_fact_t   chunk_fact;
+    int            chunk_data_offset;
+    chunk_data_t   chunk_data;
+}wav_information_t;
+
+
+typedef enum{
+    AUDIO_CMD_START,
+    AUDIO_CMD_STOP,
+    AUDIO_CMD_VOLUME,
+}AUDIO_CMD_t;
+
+
+//播放控制块
+typedef struct audio_dev{
+    uint8_t *buff[2];
+    uint32_t buff_data_size[2];    //buff内数据长度
+    uint32_t buff_size_max;      //buff的大小
+    uint8_t  buff_using;         //正在使用的buff
+
+    uint8_t audio_state;        //状态
+    uint8_t audio_type;         //类型
+
+    int (*audio_init)(struct audio_dev *audio_dev, const TCHAR* path);     
+    int (*audio_control)(struct audio_dev *audio_dev, AUDIO_CMD_t cmd, void *args);  
+
+    int (*audio_callback)(struct audio_dev *audio_dev); //中断回调函数，用来重新装载buff，
+
+    struct device* device;              //i2s的device，可以考虑换成指向其他外设
+    wav_information_t *wav_information; //wav信息结构体，可以考虑换成一个共用体指向其他音乐格式数据
+}audio_dev_t;
+
+int sd_wav_play_register(audio_dev_t *audio_dev);
+
+#endif
\ No newline at end of file
diff --git a/examples/i2s/script/read_and_write_wav.py b/examples/i2s/script/read_and_write_wav.py
new file mode 100644
index 00000000..cc086c76
--- /dev/null
+++ b/examples/i2s/script/read_and_write_wav.py
@@ -0,0 +1,192 @@
+# -*- coding: utf-8 -*-
+"""
+Spyder Editor
+
+This is a temporary script file.
+"""
+from __future__ import print_function
+from builtins import range
+import os
+import wave
+import struct
+import time
+import re 
+import subprocess
+import binascii
+
+# bh6bao 2021.03.05
+
+from pydub import AudioSegment
+filePath = './'
+ 
+# 操作函数
+def get_wav_make(dataDir):
+    sound= AudioSegment.from_wav(dataDir)
+    duration = sound.duration_seconds * 1000  # 音频时长（ms）
+    begin = 0
+    end = 10000
+    cut_wav = sound[begin:end]   #以毫秒为单位截取[begin, end]区间的音频
+    cut_wav.export(filePath+ 'fhm_onechannel_8k_10.wav', format='wav')   #存储新的wav文件
+
+# wav文件转PCM数组
+def get_wave_array_str(filename, target_bits):
+    wave_read = wave.open(filename, "r")
+    array_str = "// start\n\t"
+    nchannels, sampwidth, framerate, nframes, comptype, compname = wave_read.getparams()
+    sampwidth *= 8
+    for i in range(wave_read.getnframes()):
+        val, = struct.unpack("', file=audio_table)
+        print("// time:{}".format(time.strftime('%Y-%m-%d %H:%M:%S',time.localtime(time.time()))), file=audio_table)
+        print('const unsigned char audio_table[] = {', file=audio_table)
+        for wav in wav_file_list:
+            print("processing: {}".format(wav))
+            print('//name:{}\n'.format(wav), file=audio_table)
+            print(get_wave_array_str(filename=wav, target_bits=scale_bits), file=audio_table)
+        print('};\n', file=audio_table)
+    print("Done...")
+
+
+# 获取wav文件信息
+def get_wave_info(filename):
+    wave_read = wave.open(filename, "r")
+    nchannels, sampwidth, framerate, nframes, comptype, compname = wave_read.getparams()
+    
+    print('nchannels:{}'.format(nchannels))
+    print('sampwidth:{}'.format(sampwidth))
+    print('framerate:{}Hz'.format(framerate))
+    print('nframes:{}'.format(nframes))
+    print('comptype:{}'.format(comptype))
+    print('compname:{}'.format(compname))
+    return framerate
+
+
+# 二进制文件转数组
+def file2array(filename,h_filename=None):
+    path, name = os.path.split(filename)
+    if h_filename is None:
+        h_filename = os.path.join(path, name.split('.')[0] +'.h')
+
+    array_str = '\n//total len:{} bytes\n'.format(os.path.getsize(filename))
+    array_str += 'const unsigned char '+name.split('.')[0]+'[]={\n\t'
+    # print(array_str)
+
+    h_file = open(h_filename, "w")
+    file = open(filename, 'rb')
+    try:
+        while True:
+            chunk = file.read(16*32)
+            if not chunk:
+                break
+
+            for i in range(len(chunk)):
+                array_str += "0x%02x, " % (chunk[i])
+                if (i + 1) % 16 == 0:
+                    array_str += "\n\t"
+            # print('get:{}'.format(binascii.b2a_hex(chunk)))
+    except:
+        print('read ERR')
+    finally:
+        print('read file done!')
+        array_str += '\n};\r\n'
+        # print('array='+array_str)
+        print(array_str, file=h_file)
+
+    h_file.close()
+    file.close()
+    return 0
+
+
+
+# ffmpeg路径
+ffpeg_path = 'D:/BouffaloLabWS/script_py/ffmpeg_4.3.2_full_build/bin'
+
+# amr文件转MP3
+def amr2mp3(amr_path,mp3_path=None):
+    path, name = os.path.split(amr_path)
+    if name.split('.')[-1]!='amr':
+        print('not a amr file')
+        return 0
+    if mp3_path is None or mp3_path.split('.')[-1]!='mp3':
+        mp3_path = os.path.join(path, name.split('.')[0] +'.mp3')
+    error = subprocess.run(['./ffmpeg.exe','-i',amr_path,mp3_path])
+    print('ERR:'+error)
+    if error:
+        return 0
+    print ('success')
+    return mp3_path
+
+# wav文件转amr,wav必须为8000Hz
+def wave2amr(wave_path,amr_path=None):
+    path, name = os.path.split(wave_path)
+    if name.split('.')[-1]!='wav':
+        print ('not a wave file')
+        return 0
+    if amr_path is None or amr_path.split('.')[-1]!='amr':
+        amr_path = os.path.join(path, name.split('.')[0] +'.amr')
+    error = subprocess.run(['ffmpeg','-i',wave_path,'-y',amr_path])
+    print('ERR:{}'.format(error))
+    if error:
+        return 0
+    print ('amr success')
+    return amr_path
+
+# wav 格式化为8000Hz
+def wave2Hz8000(wave_path,out_path=None):
+    path, name = os.path.split(wave_path)
+    if name.split('.')[-1]!='wav':
+        print ('not a wave file')
+        return 0
+    if out_path is None or wave_path.split('.')[-1]!='wav':
+        out_path = os.path.join(path, name.split('.')[0] +'_8k.wav')
+    error = subprocess.run(['ffmpeg.exe','-i',wave_path,'-ar','8000','-y',out_path])
+    #error = subprocess.run(ffpeg_path+'ffmpeg.exe'+' -i '+wave_path+' -ar 8000 -y '+out_path)
+    print('ERR:{}'.format(error))
+    if error:
+        return 0
+    print ('wav success')
+    print (out_path)
+    return out_path
+
+# 将目录下所有wav文件转为amr，并转为对应的数组文件
+if __name__ == '__main__':
+    print("Generating audio array...")
+    # wav_list = []
+    # for filename in os.listdir("./"):
+    #     # print(os.getcwd())
+    #     if filename.endswith(".wav"):
+    #         print('src_name:',filename)
+    #         framerate = get_wave_info(filename)
+    #         if framerate != 8000:
+    #             print('to 8000Hz')
+    #             filename = wave2Hz8000(filename)
+    #             print(filename)
+
+    #         amr_file = wave2amr('fhm_onechannel_8k.wav')
+    #         if amr_file!=0:
+    
+    get_wav_make('fhm_onechannel_8k.wav')
+    wave2amr('fhm_onechannel_8k_10.wav')
+    file2array('fhm_onechannel_8k_10.wav')
+
+            # dst_name = "0_"+filename
+            # print('dst_name:',filename)
+            # os.rename(filename, dst_name)
+            # wav_list.append(filename)
+    # gen_wave_table(wav_file_list=wav_list, target_file_name="audio_example_file.h")
+
+
diff --git a/examples/memheap/CMakeLists.txt b/examples/memheap/CMakeLists.txt
new file mode 100644
index 00000000..551acd5a
--- /dev/null
+++ b/examples/memheap/CMakeLists.txt
@@ -0,0 +1,4 @@
+set(TARGET_REQUIRED_LIBS common)
+set(mains main.c)
+generate_bin()
+
diff --git a/examples/memheap/cdk/memheap.cdkproj b/examples/memheap/cdk/memheap.cdkproj
new file mode 100644
index 00000000..36ed8bac
--- /dev/null
+++ b/examples/memheap/cdk/memheap.cdkproj
@@ -0,0 +1,707 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
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+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
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+    
+      
+    
+    
+      
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+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
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+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
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+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    76
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imac
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../components/fatfs;$(ProjectPath)../../../components/freertos/Source/include;$(ProjectPath)../../../components/shell;$(ProjectPath)../../../components/usb_stack/class/audio;$(ProjectPath)../../../components/usb_stack/class/cdc;$(ProjectPath)../../../components/usb_stack/class/hid;$(ProjectPath)../../../components/usb_stack/class/msc;$(ProjectPath)../../../components/usb_stack/class/video;$(ProjectPath)../../../components/usb_stack/class/webusb;$(ProjectPath)../../../components/usb_stack/class/winusb;$(ProjectPath)../../../components/usb_stack/common;$(ProjectPath)../../../components/usb_stack/core;$(ProjectPath)../../../bsp/board/bl706_iot;$(ProjectPath)../../../bsp/bsp_common/platform;$(ProjectPath)../../../common/libc/inc;$(ProjectPath)../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../common/libc/inc/bits;$(ProjectPath)../../../common/libc/inc/sys;$(ProjectPath)../../../common/libc/src;$(ProjectPath)../../../common/device;$(ProjectPath)../../../common/list;$(ProjectPath)../../../common/memheap;$(ProjectPath)../../../common/misc;$(ProjectPath)../../../common/ring_buffer;$(ProjectPath)../../../common/soft_crc;$(ProjectPath)../../../components/shell;$(ProjectPath)../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../drivers/bl702_driver/regs;$(ProjectPath)../../../drivers/bl702_driver/startup;$(ProjectPath)../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../drivers/bl602_driver/startup;$(ProjectPath)../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../drivers/bl602_driver/regs;$(ProjectPath)../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../components/fatfs;$(ProjectPath)../../../components/freertos/Source/include;$(ProjectPath)../../../components/shell;$(ProjectPath)../../../components/usb_stack/class/audio;$(ProjectPath)../../../components/usb_stack/class/cdc;$(ProjectPath)../../../components/usb_stack/class/hid;$(ProjectPath)../../../components/usb_stack/class/msc;$(ProjectPath)../../../components/usb_stack/class/video;$(ProjectPath)../../../components/usb_stack/class/webusb;$(ProjectPath)../../../components/usb_stack/class/winusb;$(ProjectPath)../../../components/usb_stack/common;$(ProjectPath)../../../components/usb_stack/core;$(ProjectPath)../../../bsp/board/bl706_iot;$(ProjectPath)../../../bsp/bsp_common/platform;$(ProjectPath)../../../common/device;$(ProjectPath)../../../common/list;$(ProjectPath)../../../common/memheap;$(ProjectPath)../../../common/misc;$(ProjectPath)../../../common/ring_buffer;$(ProjectPath)../../../common/soft_crc;$(ProjectPath)../../../components/shell;$(ProjectPath)../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../drivers/bl702_driver/regs;$(ProjectPath)../../../drivers/bl702_driver/startup;$(ProjectPath)../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../drivers/bl602_driver/startup;$(ProjectPath)../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../drivers/bl602_driver/regs;$(ProjectPath)../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        no
+        ICE
+        yes
+        main
+        $(ProjectPath)/../../../tools/openocd/bl70x_gdb.init
+        
+        yes
+        Hard Reset
+        21000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          yes
+          no
+          with Pre-reset
+          Hard Reset
+          21000000
+          Bare Metal
+          no
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        $(ProjectPath)/flash.init
+        Erase Sectors
+        
+        no
+        no
+        no
+        Soft Reset
+        
+        yes
+        
+        
+      
+    
+  
+
diff --git a/examples/memheap/main.c b/examples/memheap/main.c
new file mode 100644
index 00000000..55a5c2ab
--- /dev/null
+++ b/examples/memheap/main.c
@@ -0,0 +1,69 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_uart.h"
+#include "drv_mmheap.h"
+
+uint8_t mmheap_default_pool[4096] __attribute__((section(".system_ram")));
+
+void memheap_test(void)
+{
+	char *ptr = NULL; 	/* 内存块的指针 */
+
+	for(int i=1;;i++)
+	{
+		ptr = mmheap_alloc(i*128);      
+				/* 如果分配成功 */        
+		if (ptr != NULL)        
+		{ 
+			memcpy(ptr,"hello123456789123456789123456789",32);
+			MSG("ptr :%s\n", ptr);
+			MSG("get memory :%d byte\n", i*128);				
+					/* 释放内存块 */            
+			mmheap_free(ptr);           
+			MSG("free memory :%d byte\n", i*128);           
+			ptr = NULL;
+		    bflb_platform_delay_ms(100); 					
+		}
+		else       
+		{          
+			MSG("try to get %d byte memory failed!\n", i*128); 
+				
+		    return;        
+		} 		
+	}	
+
+}
+
+int main(void)
+{
+
+    bflb_platform_init(0);
+
+    MSG("\r\n memheap test start\r\n");
+    memheap_test();
+    MSG("\r\n memheap test end\r\n");
+    while(1)
+    {
+
+    }
+}
\ No newline at end of file
diff --git a/examples/pwm/pwm_breath_led/CMakeLists.txt b/examples/pwm/pwm_breath_led/CMakeLists.txt
new file mode 100644
index 00000000..bfd0e557
--- /dev/null
+++ b/examples/pwm/pwm_breath_led/CMakeLists.txt
@@ -0,0 +1,5 @@
+set(mains main.c)
+generate_bin()
+
+
+
diff --git a/examples/pwm/pwm_breath_led/cdk/pwm_breath_led.cdkproj b/examples/pwm/pwm_breath_led/cdk/pwm_breath_led.cdkproj
new file mode 100644
index 00000000..36c67ba5
--- /dev/null
+++ b/examples/pwm/pwm_breath_led/cdk/pwm_breath_led.cdkproj
@@ -0,0 +1,724 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        BL702;BL702_EVB;ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+
diff --git a/examples/pwm/pwm_breath_led/main.c b/examples/pwm/pwm_breath_led/main.c
new file mode 100644
index 00000000..35014f39
--- /dev/null
+++ b/examples/pwm/pwm_breath_led/main.c
@@ -0,0 +1,67 @@
+/**
+ * @file pwm_breath_led.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_pwm.h"
+#include "hal_gpio.h"
+
+int main(void)
+{
+    pwm_config_t pwm_cfg = {
+        1000000,
+        0,
+    };
+
+    bflb_platform_init(0);
+
+    gpio_set_mode(GPIO_PIN_29, GPIO_OUTPUT_PP_MODE);
+    gpio_set_mode(GPIO_PIN_30, GPIO_OUTPUT_PP_MODE);
+    gpio_set_mode(GPIO_PIN_31, GPIO_OUTPUT_PP_MODE);
+
+    gpio_write(GPIO_PIN_29, 0);
+    gpio_write(GPIO_PIN_30, 0);
+    gpio_write(GPIO_PIN_31, 0);  
+
+    pwm_register(PWM0_INDEX, "led_breath", DEVICE_OFLAG_RDWR); 
+
+    struct device *led_breath = device_find("led_breath");
+
+    if (led_breath)
+    {
+        device_open(led_breath, 0);
+    }
+
+    while (1)
+    {
+        for (pwm_cfg.dutyCycle = 0; pwm_cfg.dutyCycle < 100; pwm_cfg.dutyCycle++)
+        {
+            device_control(led_breath, DEVICE_CTRL_CONFIG, &pwm_cfg);
+            bflb_platform_delay_ms(10);
+        }
+        for (pwm_cfg.dutyCycle = 100; pwm_cfg.dutyCycle > 0; pwm_cfg.dutyCycle--)
+        {
+            device_control(led_breath, DEVICE_CTRL_CONFIG, &pwm_cfg);
+            bflb_platform_delay_ms(10);
+        }
+    }
+
+    BL_CASE_SUCCESS;
+}
diff --git a/examples/spi/spi_dma_sd/CMakeLists.txt b/examples/spi/spi_dma_sd/CMakeLists.txt
new file mode 100644
index 00000000..01698ee4
--- /dev/null
+++ b/examples/spi/spi_dma_sd/CMakeLists.txt
@@ -0,0 +1,9 @@
+set(BSP_COMMON_DIR ${CMAKE_SOURCE_DIR}/bsp/bsp_common)
+set(TARGET_REQUIRED_LIBS fatfs)
+set(TARGET_REQUIRED_PRIVATE_INCLUDE ${BSP_COMMON_DIR}/spi_sd)
+set(TARGET_REQUIRED_SRCS ${BSP_COMMON_DIR}/fatfs/fatfs_spi_sd.c ${BSP_COMMON_DIR}/spi_sd/bsp_spi_sd.c)
+set(mains main.c)
+generate_bin()
+
+
+
diff --git a/examples/spi/spi_dma_sd/cdk/spi_dma_sd.cdkproj b/examples/spi/spi_dma_sd/cdk/spi_dma_sd.cdkproj
new file mode 100644
index 00000000..1d155cdf
--- /dev/null
+++ b/examples/spi/spi_dma_sd/cdk/spi_dma_sd.cdkproj
@@ -0,0 +1,732 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../bsp/bsp_common/spi_sd;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../bsp/bsp_common/spi_sd;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/spi/spi_dma_sd/main.c b/examples/spi/spi_dma_sd/main.c
new file mode 100644
index 00000000..ed9e0f47
--- /dev/null
+++ b/examples/spi/spi_dma_sd/main.c
@@ -0,0 +1,344 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_spi.h"
+#include "hal_gpio.h"
+#include "hal_dma.h"
+#include "hal_mtimer.h"
+#include "ff.h"
+
+uint32_t barebones_clock(){
+    return (mtimer_get_time_ms());
+}
+
+#define GETMYTIME(_t) (*_t=barebones_clock())
+#define MYTIMEDIFF(fin,ini) ((fin)-(ini))
+
+static uint32_t start_time_val, stop_time_val,read_start_time_val,read_stop_time_val;
+uint32_t total_time;
+void start_time(void) {
+	GETMYTIME(&start_time_val );
+}
+
+void stop_time(void) {
+	GETMYTIME(&stop_time_val );   
+}
+
+void read_start_time(void) {
+	GETMYTIME(&read_start_time_val );
+}
+
+void read_stop_time(void) {
+	GETMYTIME(&read_stop_time_val );   
+}
+
+uint32_t get_time(void) {
+	uint32_t runTimer=(uint32_t)(MYTIMEDIFF(stop_time_val, start_time_val));
+	return runTimer;
+}
+
+uint32_t get_read_time(void) {
+	uint32_t runTimer=(uint32_t)(MYTIMEDIFF(read_stop_time_val, read_start_time_val));
+	return runTimer;
+}
+
+
+// static FRESULT miscellaneous(void);
+// static FRESULT file_check(char* path);
+// static FRESULT scan_files (char* path);
+extern void fatfs_sd_driver_register(void);
+MKFS_PARM fs_para={
+    .fmt=FM_FAT32,			/* Format option (FM_FAT, FM_FAT32, FM_EXFAT and FM_SFD) */
+	.n_fat=1,			    /* Number of FATs */
+	.align=0,			    /* Data area alignment (sector) */
+	.n_root=1,		        /* Number of root directory entries */
+	.au_size=512,		    /* Cluster size (byte) */
+};
+ATTR_DTCM_SECTION char WriteBuffer[] ="The path of the righteous man is beset on all sides by the inequities of the tyranny of evil man.\
+Blessed is he who, in the name of charity and good will, shepherds the weak through the valley of darkness, \
+for he is truly his brother's keeper and the finder of lost children. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And you will know my name is the lord when i lay my vengeance upon thee. And This test data is Over! 2048 2048 2048 2048.\
+The path of the righteous man is beset on all sides by the inequities of the tyranny of evil man.\
+Blessed is he who, in the name of charity and good will, shepherds the weak through the valley of darkness, \
+for he is truly his brother's keeper and the finder of lost children. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And i will strike down upon thee with great vengeance and furious anger those who attempt to poison and destroy my brothers\r\n. \
+And you will know my name is the lord when i lay my vengeance upon thee. And This test data is Over! 2048 2048 2048 2048.." ;
+
+FATFS fs ;   
+FIL fnew ;                                                         
+FRESULT res_sd;               
+UINT fnum;                           
+uint8_t ReadBuffer[4096] = {0} ;
+FILINFO fno;
+char fpath[100];   
+
+uint32_t workbuf[4096];
+
+int main(void)
+{
+    bflb_platform_init(0);
+    fatfs_sd_driver_register();
+    MSG("FATFS case");
+    //mount file system
+    res_sd = f_mount(&fs,"1:",1);
+    MSG("f_mount:%d\r\n",res_sd);
+    /*----------------------- format test ---------------------------*/
+    /*if no file system,then format and create file system*/
+    if(res_sd == FR_NO_FILESYSTEM)
+    {
+        MSG("No filesystem yet, to be formatted...\r\n");
+        /*format*/
+        res_sd=f_mkfs("1:",&fs_para,workbuf,512*2);
+
+        if(res_sd == FR_OK)
+        {
+            MSG("done with formatting.\r\n");
+            /*after format, unmount first*/
+            MSG("first start to unmount.\r\n");
+            res_sd = f_mount(NULL,"1:",1);
+            /*then mount again*/
+            MSG("then start to remount.\r\n");
+            res_sd = f_mount(&fs,"1:",1);
+        }
+        else
+        {
+            MSG("fail to format.\r\n");
+            while(1);
+        }
+    }
+    else if(res_sd!=FR_OK)
+    {
+        MSG("fail to mount filesystem,error= %d\r\n",res_sd);
+        MSG("SD card might fail to initialise.\r\n");
+        while(1);
+    }
+    else
+    {
+        MSG("Succeed to mount filesystem. Go on to read write test.\r\n");
+    }
+#if 1
+    /*-----------------------file system write test-----------------------------*/
+    /* open file, create one if not exist*/
+    MSG("\r\n*****be about to write test...******\r\n");
+    res_sd = f_open(&fnew, "1:ftest.txt",FA_CREATE_ALWAYS | FA_WRITE );
+    if ( res_sd == FR_OK )
+    {
+        MSG("open or create ftest.txt, and write to it.\r\n");
+        start_time();
+        /*write into file*/
+        for(uint16_t i=0;i<512;i++)
+            res_sd=f_write(&fnew,WriteBuffer,sizeof(WriteBuffer),&fnum);
+        /*close file*/
+        f_close(&fnew);
+        stop_time();
+        if(res_sd==FR_OK)
+        {
+            MSG("Done with writing, write %d bytes. \r\n",fnum);
+            MSG("Write contents: \r\n%s\r\n",WriteBuffer);
+        }
+        else
+        {
+            MSG("Fail to write files(%d)\n",res_sd);
+        }
+    }
+    else
+    {
+        MSG("Fail to open or create files.\r\n");
+    }
+    total_time = get_time();
+    MSG("write %d Byte * %d time: %d \n",sizeof(WriteBuffer),512,total_time);
+#endif
+
+    /*------------------- file system read test------------------------------------*/
+    MSG("******be about to read test...******\r\n");
+    res_sd = f_open(&fnew, "1:ftest.txt", FA_OPEN_EXISTING | FA_READ);
+    if(res_sd == FR_OK)
+    {
+        MSG("Done with open file.\r\n");
+        read_start_time();
+        for(uint16_t i=0;i<512;i++)
+            res_sd = f_read(&fnew, ReadBuffer, sizeof(ReadBuffer), &fnum);
+        read_stop_time();
+        if(res_sd==FR_OK)
+        {
+            MSG("Done with reading file, read %d bytes.\r\n",fnum);
+            MSG("Read contents: \r\n%s \r\n", ReadBuffer);
+        }
+        else
+        {
+            MSG("Fail to read file: (%d)\n",res_sd);
+        }
+        total_time = get_read_time();
+        MSG("\n write %d Byte * %d time: %d \n",sizeof(ReadBuffer),512,total_time);
+    }
+    else
+    {
+        MSG("Fail to open files.\r\n");
+    }
+    /*close file*/
+    f_close(&fnew);
+    /*unmount*/
+    f_mount(NULL,"1:",1);
+
+    while(1)
+    {
+
+    } 
+}
+
+// static FRESULT miscellaneous(void)
+// {
+//     DIR dir;
+//     FATFS* pfs;
+//     DWORD fre_clust, fre_sect, tot_sect;
+
+//     MSG("\n*************** get device info***************\r\n");
+//     res_sd = f_getfree("1:", &fre_clust, &pfs);
+
+//     /* toal sector number and free sector number*/
+//     tot_sect = (pfs->n_fatent - 2) * pfs->csize;
+//     fre_sect = fre_clust * pfs->csize;
+
+//     MSG("total capacity%10lu KB\n available capacity: %10lu KB\n", tot_sect >>1, fre_sect >>1);
+
+//     MSG("\n**********create directory and **********\r\n");
+
+//     res_sd=f_opendir(&dir,"1:TestDir");
+//     if(res_sd!=FR_OK)
+//     {
+//         /*new dir if fail to open*/
+//         MSG("\nf_mkdir\r\n");
+//         res_sd=f_mkdir("1:TestDir");
+//     }
+//     else
+//     {
+//         /*close dir if exist*/
+//         res_sd=f_closedir(&dir);
+//         /*delete file*/
+//         f_unlink("1:TestDir/ftest.txt");
+//     }
+//     if(res_sd==FR_OK)
+//     {
+//         /*move and rename file*/
+//         res_sd=f_rename("1:ftest.txt","1:TestDir/ftest.txt");
+//         if(res_sd==FR_OK){
+//             MSG("\nf_rename success\r\n");
+//         }else{
+//             MSG("\nf_rename fail\r\n");
+//         }
+//     }
+
+//     return res_sd;
+// }
+// static FRESULT file_check(char* path)
+// {
+
+
+//     /*get file info*/
+//     res_sd=f_stat(path,&fno);
+//     if(res_sd==FR_OK)
+//     {
+//         MSG("%s file infomation:\r\n",path);
+//         MSG("\tFile size: %ld(byte)\n", fno.fsize);
+//         MSG("\ttimestap:  %u/%02u/%02u, %02u:%02u\n",
+//                              (fno.fdate >> 9) + 1980, fno.fdate >> 5 & 15, fno.fdate & 31,fno.ftime >> 11, fno.ftime >> 5 & 63);
+//         MSG("\tttribute: %c%c%c%c%c\n\n",
+//                              (fno.fattrib & AM_DIR) ? 'D' : '-',      /* Directory */
+//                              (fno.fattrib & AM_RDO) ? 'R' : '-',      /* Read only */
+//                              (fno.fattrib & AM_HID) ? 'H' : '-',      /* Hidden */
+//                              (fno.fattrib & AM_SYS) ? 'S' : '-',      /* System */
+//                              (fno.fattrib & AM_ARC) ? 'A' : '-');     /* Archive */
+//     }else{
+//         MSG("file_check fail:\r\n",path);
+//     }
+//     return res_sd;
+// }
+
+// static FRESULT scan_files (char* path)
+// {
+//     FRESULT res;      
+//     FILINFO fno;
+//     DIR dir;
+//     int i;
+//     char* fn;        
+
+//     res = f_opendir(&dir, path);
+//     if (res == FR_OK)
+//     {
+//         i = strlen(path);
+//         for (;;)
+//         {
+//             //read contents under dir, next read will get next content
+//             res = f_readdir(&dir, &fno);
+//             //last name is blank, jump
+//             if (res != FR_OK || fno.fname[0] == 0) break;
+//             fn = fno.fname;
+//             //jump current dir
+//             if (*fn == '.') continue;
+//             //recursive dir
+//             if (fno.fattrib & AM_DIR)
+//             {
+//                 //get full dir name
+//                 sprintf(&path[i], "/%s", fn);
+//                 //recursive 
+//                 res = scan_files(path);
+//                 path[i] = 0;
+//                 if (res != FR_OK)
+//                     break;
+//             }
+//             else
+//             {
+//                 MSG("\t %s/%s\r\n", path, fn);                          
+            
+//             }
+//         } 
+//     }else{
+//         MSG("f_opendir fail\r\n");
+//     }
+//     return res;
+// }
+
diff --git a/examples/spi/spi_lcd/CMakeLists.txt b/examples/spi/spi_lcd/CMakeLists.txt
new file mode 100644
index 00000000..e7d458d4
--- /dev/null
+++ b/examples/spi/spi_lcd/CMakeLists.txt
@@ -0,0 +1,8 @@
+set(BSP_COMMON_DIR ${CMAKE_SOURCE_DIR}/bsp/bsp_common)
+set(TARGET_REQUIRED_LIBS fatfs)
+set(TARGET_REQUIRED_PRIVATE_INCLUDE ${BSP_COMMON_DIR}/il9431)
+set(TARGET_REQUIRED_SRCS ${BSP_COMMON_DIR}/il9431/bsp_il9431.c)
+set(mains main.c)
+generate_bin()
+
+
diff --git a/examples/spi/spi_lcd/cdk/spi_lcd.cdkproj b/examples/spi/spi_lcd/cdk/spi_lcd.cdkproj
new file mode 100644
index 00000000..2aa7cad3
--- /dev/null
+++ b/examples/spi/spi_lcd/cdk/spi_lcd.cdkproj
@@ -0,0 +1,729 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../bsp/bsp_common/il9431;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../bsp/bsp_common/il9431;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/spi/spi_lcd/main.c b/examples/spi/spi_lcd/main.c
new file mode 100644
index 00000000..ff0bbc1b
--- /dev/null
+++ b/examples/spi/spi_lcd/main.c
@@ -0,0 +1,116 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "drv_shell.h"
+#include "hal_spi.h"
+#include "hal_gpio.h"
+#include "hal_dma.h"
+#include "bsp_il9431.h"
+
+
+uint8_t bo[] = {
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x00,0x00,0x00,0x06,0x00,
+0x00,0x00,0x06,0x00,0x00,0x00,0x04,0x00,0x30,0x00,0x04,0x0C,0xFC,0xFF,0xFF,0x0F,
+0x80,0xFF,0xFF,0x07,0x00,0x00,0x08,0x00,0x00,0x08,0x08,0x00,0x00,0x08,0x08,0x00,
+0x00,0x08,0x00,0x00,0x00,0x08,0x30,0x00,0x00,0xC8,0x3F,0x00,0x00,0x08,0x20,0x00,
+0x00,0x0B,0x29,0x01,0x80,0x1B,0x29,0x03,0x80,0x39,0xFF,0x3F,0x00,0xD0,0xFF,0x3F,
+0x08,0x10,0x5A,0x06,0x0C,0x10,0x52,0x06,0x3E,0xF0,0x92,0x04,0xFC,0x7F,0x80,0x04,
+0x00,0xB0,0x8F,0x10,0x00,0x30,0xFF,0x18,0x00,0x30,0x60,0x0C,0x00,0x20,0x00,0x0C,
+0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00};
+
+uint8_t liu[] = {
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x40,0x00,0x0C,0x00,
+0xE0,0x00,0x06,0x00,0xF0,0x03,0x07,0x00,0x80,0x0F,0x00,0x03,0x00,0x38,0x80,0x03,
+0x08,0x40,0x80,0x01,0x08,0x00,0x80,0x00,0x10,0x00,0x00,0x00,0x70,0x00,0x00,0x00,
+0xC0,0xDF,0x20,0x00,0x00,0xCF,0x21,0x00,0x00,0x88,0x63,0x00,0x00,0x80,0x67,0x00,
+0x20,0x98,0x7D,0x00,0xF0,0x1F,0x79,0x18,0x00,0x00,0x51,0x0C,0x00,0x00,0xC1,0x0E,
+0x00,0x40,0xCA,0x00,0xE0,0x3F,0xCE,0x00,0x70,0x30,0x8E,0x00,0x30,0x00,0x87,0x01,
+0x18,0x00,0x83,0x00,0x18,0x00,0x80,0x00,0x18,0x00,0x00,0x00,0x18,0x00,0x00,0x00,
+0x30,0x00,0x00,0x00,0xF0,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
+
+uint8_t zhi[] = {
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,
+0x00,0x00,0x06,0x00,0x00,0x08,0x06,0x00,0x00,0x08,0x04,0x00,0x00,0x10,0x64,0x00,
+0x00,0x20,0xC4,0x00,0x00,0xC0,0x88,0x03,0x00,0x80,0x8B,0x3E,0x00,0x30,0xFF,0x1C,
+0xFC,0x1F,0xF8,0x11,0x10,0x11,0x12,0x01,0x10,0x11,0x13,0x01,0x10,0xA2,0x13,0x03,
+0x10,0xA2,0x11,0x02,0x10,0x22,0x00,0x00,0x30,0x22,0x80,0x00,0x10,0x60,0xFC,0x00,
+0x1E,0x70,0x4E,0x00,0xFE,0x7F,0x82,0x00,0xF0,0x3F,0x84,0x00,0x00,0x10,0x84,0x00,
+0x00,0x00,0x84,0x00,0x00,0x00,0x8C,0x01,0x00,0x00,0xFC,0x01,0x00,0x00,0xE0,0x00,
+0x00,0x00,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
+
+uint8_t neng[] = {
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+0x38,0x00,0x0C,0x00,0xF0,0x01,0x1C,0x00,0x80,0xFF,0x6D,0x00,0x00,0x12,0xC9,0x00,
+0x00,0x12,0x89,0x07,0x20,0x32,0x09,0x1E,0x30,0x10,0x11,0x0C,0xFC,0xFF,0x93,0x00,
+0xF8,0xFF,0xF1,0x00,0x00,0x00,0x78,0x00,0x00,0x00,0x38,0x00,0x00,0x00,0x00,0x00,
+0x00,0x80,0x00,0x18,0xE0,0xFF,0xFC,0x1F,0x30,0x44,0x46,0x08,0x18,0x0C,0xC6,0x00,
+0x18,0x08,0x82,0x00,0x18,0x18,0x82,0x01,0x18,0x70,0x02,0x03,0x18,0x70,0x06,0x03,
+0x18,0x00,0x06,0x00,0x18,0x00,0x3E,0x00,0x38,0x00,0x00,0x00,0xF0,0x01,0x00,0x00,
+0x30,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
+
+uint8_t ke[] = {
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x02,0x00,0x00,0x02,0x03,0x00,
+0x00,0x04,0x03,0x00,0x00,0x08,0x02,0x00,0x00,0x10,0x46,0x00,0x00,0x60,0x46,0x00,
+0x00,0xC0,0x84,0x00,0x60,0x80,0x87,0x01,0xF8,0xFF,0xFF,0x03,0x00,0x80,0x68,0x02,
+0x00,0xC0,0x08,0x0E,0x00,0x40,0x18,0x0C,0x00,0x20,0x18,0x04,0x00,0x20,0x00,0x00,
+0x00,0x20,0x00,0x00,0x00,0x20,0x04,0x00,0x00,0x20,0xC6,0x00,0x00,0x60,0xC6,0x00,
+0x00,0x40,0x60,0x00,0x00,0x40,0x00,0x10,0xE0,0xFF,0xFF,0x1F,0xFC,0xFF,0xFF,0x1F,
+0x00,0xC0,0x00,0x08,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x80,0x00,0x00,
+0x00,0x80,0x01,0x00,0x00,0x80,0x01,0x00,0x00,0x80,0x00,0x00,0x00,0x00,0x00,0x00};
+
+uint8_t ji[] = {
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x0E,0x00,0x00,
+0x00,0x0E,0x08,0x00,0x00,0x0C,0x08,0x00,0x00,0x18,0x08,0x00,0x20,0x30,0x08,0x00,
+0x30,0x20,0x18,0x00,0xF8,0xFF,0xFF,0x1F,0xF0,0xFF,0xFF,0x1F,0x00,0x80,0x10,0x08,
+0x00,0x00,0x11,0x00,0x10,0x00,0x00,0x00,0x20,0x40,0x00,0x00,0x20,0x50,0x10,0x00,
+0x60,0x50,0x10,0x00,0x60,0xC8,0x30,0x00,0xC0,0x8C,0x30,0x00,0x80,0x87,0x3F,0x1C,
+0x80,0x83,0xFF,0x1F,0x80,0x8F,0x61,0x0E,0xC0,0xFC,0x61,0x00,0xE0,0xE0,0x61,0x00,
+0x70,0x80,0x40,0x00,0x30,0x00,0x40,0x00,0x30,0x00,0x00,0x00,0x30,0x00,0x00,0x00,
+0x10,0x00,0x00,0x00,0x10,0x00,0x00,0x00,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
+void LCD_Display_Test(void)
+{
+    LCD_Clear(RGB(0,0,0));
+    LCD_DrawLine(200,200,50,50,RGB(255,0,255));
+    LCD_DrawRectangle(40,70,150,300,RGB(0,255,0));
+    LCD_DrawCircle(100,100,60,RGB(0,0,255));
+    LCD_Clear(RGB(0,0,0));
+//    LCD_DrawPicture(130,110,185,209,image);
+    LCD_DrawChinese(60,20,bo,RGB(0,0,0),RGB(0,255,0));
+    LCD_DrawChinese(60,70,liu,RGB(0,0,0),RGB(0,255,0));
+    LCD_DrawChinese(60,120,zhi,RGB(0,0,0),RGB(0,255,0));
+    LCD_DrawChinese(60,170,neng,RGB(0,0,0),RGB(0,255,0));
+    LCD_DrawChinese(60,220,ke,RGB(0,0,0),RGB(0,255,0));
+    LCD_DrawChinese(60,270,ji,RGB(0,0,0),RGB(0,255,0));
+}
+
+int main(void)
+{
+    bflb_platform_init(0);
+
+    LCD_Init();
+
+    LCD_Display_Test();
+    while(1)
+    {
+
+    } 
+}
diff --git a/examples/spi/spi_loopback/CMakeLists.txt b/examples/spi/spi_loopback/CMakeLists.txt
new file mode 100644
index 00000000..bfd0e557
--- /dev/null
+++ b/examples/spi/spi_loopback/CMakeLists.txt
@@ -0,0 +1,5 @@
+set(mains main.c)
+generate_bin()
+
+
+
diff --git a/examples/spi/spi_loopback/cdk/spi_loopback.cdkproj b/examples/spi/spi_loopback/cdk/spi_loopback.cdkproj
new file mode 100644
index 00000000..690a2ea7
--- /dev/null
+++ b/examples/spi/spi_loopback/cdk/spi_loopback.cdkproj
@@ -0,0 +1,726 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/spi/spi_loopback/main.c b/examples/spi/spi_loopback/main.c
new file mode 100644
index 00000000..55ed9c7e
--- /dev/null
+++ b/examples/spi/spi_loopback/main.c
@@ -0,0 +1,115 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_spi.h"
+#include "hal_gpio.h"
+#include "hal_dma.h"
+#define TRANSFER_LEN                             256
+static uint32_t txBuff[TRANSFER_LEN] = {0};
+static uint32_t rxBuff[TRANSFER_LEN] = {0};
+
+
+struct device *spi;
+uint32_t i;
+int main(void)
+{
+    bflb_platform_init(0);
+    spi_register(SPI0_INDEX, "spi", DEVICE_OFLAG_RDWR);
+    spi = device_find("spi");
+    if (spi)
+    {
+        device_open(spi, DEVICE_OFLAG_STREAM_TX | DEVICE_OFLAG_STREAM_RX);
+
+    }
+    /* TX buffer init */
+    for (i = 0; i < TRANSFER_LEN; i++)
+    {
+        txBuff[i] = i * 0x1010101;
+    }
+
+    MSG("SPI send and receive data by 32-bit frame size\r\n");
+    spi_transmit_receive(spi, txBuff, rxBuff, TRANSFER_LEN, 3);
+    /* Check result */
+    for (i = 0; i < TRANSFER_LEN; i++)
+    {
+        if (rxBuff[i] != txBuff[i])
+        {
+            MSG("Received %08x expect %08x\n", rxBuff[i], txBuff[i]);
+            return ERROR;
+        }
+    }
+    BL702_MemSet4(rxBuff, 0, TRANSFER_LEN);
+
+    /* Wait for slave done */
+    bflb_platform_delay_ms(100);
+
+    MSG("SPI send and receive data by 24-bit frame size\r\n");
+    spi_transmit_receive(spi, txBuff, rxBuff, TRANSFER_LEN, 2);
+    /* Check result */
+    for (i = 0; i < TRANSFER_LEN; i++)
+    {
+        if (rxBuff[i] != (txBuff[i] & 0xffffff))
+        {
+            MSG("Received %08x expect %08x\n", rxBuff[i], txBuff[i] & 0xffffff);
+            return ERROR;
+        }
+    }
+    BL702_MemSet4(rxBuff, 0, TRANSFER_LEN);
+
+    /* Wait for slave done */
+    bflb_platform_delay_ms(100);
+
+    MSG("SPI send and receive data by 16-bit frame size\r\n");
+    spi_transmit_receive(spi, (uint16_t *)txBuff, (uint16_t *)rxBuff, 2 * TRANSFER_LEN, 1);
+    /* Check result */
+    for (i = 0; i < TRANSFER_LEN; i++)
+    {
+        if (rxBuff[i] != txBuff[i])
+        {
+            MSG("Received %08x expect %08x\r\n", rxBuff[i], txBuff[i]);
+            return ERROR;
+        }
+    }
+    BL702_MemSet4(rxBuff, 0, TRANSFER_LEN);
+
+    /* Wait for slave done */
+    bflb_platform_delay_ms(100);
+
+    MSG("SPI send and receive data by 8-bit frame size\r\n");
+    spi_transmit_receive(spi, (uint8_t *)txBuff, (uint8_t *)rxBuff, 4 * TRANSFER_LEN, 0);
+    /* Check result */
+    for (i = 0; i < TRANSFER_LEN; i++)
+    {
+        if (rxBuff[i] != txBuff[i])
+        {
+            MSG("Received %08x expect %08x\r\n", rxBuff[i], txBuff[i]);
+            return ERROR;
+        }
+    }
+
+    /* Disable spi master mode */
+    device_close(spi);
+    while (1)
+    {
+
+    }
+}
\ No newline at end of file
diff --git a/examples/uart/uart_dma/CMakeLists.txt b/examples/uart/uart_dma/CMakeLists.txt
new file mode 100644
index 00000000..6979db2c
--- /dev/null
+++ b/examples/uart/uart_dma/CMakeLists.txt
@@ -0,0 +1,2 @@
+set(mains main.c)
+generate_bin()
\ No newline at end of file
diff --git a/examples/uart/uart_dma/cdk/uart_dma.cdkproj b/examples/uart/uart_dma/cdk/uart_dma.cdkproj
new file mode 100644
index 00000000..8ed5ba02
--- /dev/null
+++ b/examples/uart/uart_dma/cdk/uart_dma.cdkproj
@@ -0,0 +1,726 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/uart/uart_dma/main.c b/examples/uart/uart_dma/main.c
new file mode 100644
index 00000000..0823d3d8
--- /dev/null
+++ b/examples/uart/uart_dma/main.c
@@ -0,0 +1,85 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "drv_mmheap.h"
+#include "hal_uart.h"
+#include "hal_dma.h"
+
+struct device *dma_ch2;
+
+uint8_t src_buffer[4100] __attribute__((section(".system_ram")));
+uint8_t mmheap_default_pool[2048] __attribute__((section(".system_ram")));
+
+uint8_t dma_tc_flag0 = 0;
+uint8_t dma_tc_flag1 = 0;
+
+void dma_ch2_irq_callback(struct device *dev, void *args, uint32_t size, uint32_t state)
+{
+    if (!state)
+    {
+        dma_tc_flag0 = 1;
+    }
+}
+
+void sram_init()
+{
+    memset(src_buffer, 'a', 4100);
+    src_buffer[3999] = 'B';
+    src_buffer[4095] = 'A';
+    src_buffer[4096] = 'B';
+    src_buffer[4097] = 'C';
+    src_buffer[4098] = 'D';
+    src_buffer[4099] = 'E';
+}
+int main(void)
+{
+    bflb_platform_init(0);
+    sram_init();
+
+    uart_register(UART1_INDEX, "uart1", DEVICE_OFLAG_RDWR);
+    struct device *uart = device_find("uart1");
+
+    if (uart)
+    {
+        device_open(uart, DEVICE_OFLAG_DMA_TX); 
+    }
+
+    dma_register(DMA0_CH2_INDEX, "ch2", DEVICE_OFLAG_RDWR);
+    dma_ch2 = device_find("ch2");
+    if (dma_ch2)
+    {
+        device_open(dma_ch2, 0);
+        device_set_callback(dma_ch2, dma_ch2_irq_callback);
+        device_control(dma_ch2, DEVICE_CTRL_SET_INT, NULL);
+    }
+
+    device_control(uart,DEVICE_CTRL_UART_ATTACH_TX_DMA,dma_ch2);
+    while (1)
+    {
+        device_write(uart,0,src_buffer,4100);
+        while (dma_tc_flag0 == 0)
+        {
+            bflb_platform_delay_ms(1);
+        }
+        bflb_platform_delay_ms(1000);
+    }
+}
diff --git a/examples/uart/uart_echo/CMakeLists.txt b/examples/uart/uart_echo/CMakeLists.txt
new file mode 100644
index 00000000..6979db2c
--- /dev/null
+++ b/examples/uart/uart_echo/CMakeLists.txt
@@ -0,0 +1,2 @@
+set(mains main.c)
+generate_bin()
\ No newline at end of file
diff --git a/examples/uart/uart_echo/cdk/uart_echo.cdkproj b/examples/uart/uart_echo/cdk/uart_echo.cdkproj
new file mode 100644
index 00000000..d9333204
--- /dev/null
+++ b/examples/uart/uart_echo/cdk/uart_echo.cdkproj
@@ -0,0 +1,724 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
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+    
+    
+      
+    
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+    
+    
+      
+    
+    
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+    
+    
+      
+    
+    
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+    
+    
+      
+    
+    
+      
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+    
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+    
+    
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+    
+    
+      
+    
+    
+      
+    
+    
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+    
+    
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+    
+    
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+    
+    
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+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
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+    
+    
+      
+        
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+        
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+        
+      
+      
+        
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+        
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+        
+      
+      
+        
+      
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+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
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+        
+      
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+      
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+        
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+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        BL702;BL702_EVB;ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+
diff --git a/examples/uart/uart_echo/main.c b/examples/uart/uart_echo/main.c
new file mode 100644
index 00000000..f364b01c
--- /dev/null
+++ b/examples/uart/uart_echo/main.c
@@ -0,0 +1,50 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_uart.h"
+
+void uart_irq_callback(struct device *dev, void *args, uint32_t size, uint32_t state)
+{
+    if (state == UART_EVENT_RX_FIFO)
+    {
+        device_write(dev,0,(uint8_t *)args,size);
+    }
+    else if (state == UART_EVENT_RTO)
+    {
+        device_write(dev,0,(uint8_t *)args,size);
+    }
+}
+
+int main(void)
+{
+    bflb_platform_init(0);
+
+    struct device *uart = device_find("debug_log");
+
+    if (uart)
+    {
+        device_set_callback(uart, uart_irq_callback);
+        device_control(uart, DEVICE_CTRL_SET_INT, (void *)(UART_RX_FIFO_IT|UART_RTO_IT));
+    }
+
+    BL_CASE_SUCCESS;
+}
diff --git a/examples/uart/uart_poll/CMakeLists.txt b/examples/uart/uart_poll/CMakeLists.txt
new file mode 100644
index 00000000..6979db2c
--- /dev/null
+++ b/examples/uart/uart_poll/CMakeLists.txt
@@ -0,0 +1,2 @@
+set(mains main.c)
+generate_bin()
\ No newline at end of file
diff --git a/examples/uart/uart_poll/cdk/uart_poll.cdkproj b/examples/uart/uart_poll/cdk/uart_poll.cdkproj
new file mode 100644
index 00000000..d7cc5a35
--- /dev/null
+++ b/examples/uart/uart_poll/cdk/uart_poll.cdkproj
@@ -0,0 +1,726 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
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+      
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+      
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+      
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+        
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+        
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+        
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+        
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+        
+      
+      
+        
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+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/uart/uart_poll/main.c b/examples/uart/uart_poll/main.c
new file mode 100644
index 00000000..e5fbdbc8
--- /dev/null
+++ b/examples/uart/uart_poll/main.c
@@ -0,0 +1,42 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_uart.h"
+const uint8_t buffer[10]="12345678\r\n";
+int main(void)
+{
+    bflb_platform_init(0);
+    uart_register(UART1_INDEX, "uart1", DEVICE_OFLAG_RDWR);
+    struct device *uart1 = device_find("uart1");
+
+    if (uart1)
+    {
+        device_open(uart1, DEVICE_OFLAG_STREAM_TX); //uart0 tx dma mode
+        MSG("device find success\r\n");
+    }
+    device_write(uart1,0,buffer,10);
+    while(1)
+    {
+        MSG("\r\n uart0 and uart1 poll tx case\r\n");
+        bflb_platform_delay_ms(1000);        
+    }
+}
\ No newline at end of file
diff --git a/examples/uart/uart_rx_it/CMakeLists.txt b/examples/uart/uart_rx_it/CMakeLists.txt
new file mode 100644
index 00000000..6979db2c
--- /dev/null
+++ b/examples/uart/uart_rx_it/CMakeLists.txt
@@ -0,0 +1,2 @@
+set(mains main.c)
+generate_bin()
\ No newline at end of file
diff --git a/examples/uart/uart_rx_it/cdk/uart_rx_it.cdkproj b/examples/uart/uart_rx_it/cdk/uart_rx_it.cdkproj
new file mode 100644
index 00000000..522df99c
--- /dev/null
+++ b/examples/uart/uart_rx_it/cdk/uart_rx_it.cdkproj
@@ -0,0 +1,726 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/uart/uart_rx_it/main.c b/examples/uart/uart_rx_it/main.c
new file mode 100644
index 00000000..2c503f3d
--- /dev/null
+++ b/examples/uart/uart_rx_it/main.c
@@ -0,0 +1,72 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_mtimer.h"
+#include "hal_uart.h"
+
+void uart_irq_callback(struct device *dev, void *args, uint32_t size, uint32_t state)
+{
+    uint8_t i = 0;
+
+    if (state == UART_EVENT_RX_FIFO)
+    {
+        MSG("rf\r\n");
+        for (i = 0; i < size; i++)
+        {
+            MSG("0x%x ", (*(uint8_t *)(args+i)));
+        }
+        MSG("\r\n");
+    }
+    else if (state == UART_EVENT_RTO)
+    {
+        MSG("rto\r\n");
+        for (i = 0; i < size; i++)
+        {
+            MSG("0x%x ", (*(uint8_t *)(args+i)));
+        }
+        MSG("\r\n");
+    }
+}
+
+const char* string = "uart1 poll tx and rx irq test\r\n";
+
+int main(void)
+{
+
+    bflb_platform_init(0);
+    uart_register(UART1_INDEX, "uart1", DEVICE_OFLAG_RDWR);
+    struct device *uart = device_find("uart1");
+
+    if (uart)
+    {
+
+        device_open(uart, DEVICE_OFLAG_STREAM_TX | DEVICE_OFLAG_INT_RX); //uart0 tx dma mode
+        device_set_callback(uart, uart_irq_callback);
+        device_control(uart, DEVICE_CTRL_SET_INT, (void *)(UART_RX_FIFO_IT|UART_RTO_IT));
+    }
+
+    while (1)
+    {
+        device_write(uart,0,string,strlen(string));
+        bflb_platform_delay_ms(1000);
+    }
+}
\ No newline at end of file
diff --git a/examples/usb/script/cdc_in_loopback.py b/examples/usb/script/cdc_in_loopback.py
new file mode 100644
index 00000000..b42e2647
--- /dev/null
+++ b/examples/usb/script/cdc_in_loopback.py
@@ -0,0 +1,149 @@
+# -*- coding:utf-8 -*-
+import serial
+import serial.tools.list_ports
+import struct
+import time
+import sys
+import random
+import threading
+import datetime
+
+
+###############################################################################
+#文件设置
+###############################################################################
+writesize = 50*1024
+# readsize = 0*1024
+filesize = 1024*1024
+###############################################################################
+#COM设置
+###############################################################################
+loopbackcom = "COM20"
+baudrate = 2000000
+###############################################################################
+#单串口回环任务
+###############################################################################
+def loopback_tx_thread(func):
+    print("loopback thread start")
+    txalllen = 0
+    txdatalen = 0
+    txflag = 0
+    txendtime = datetime.datetime.now()
+    rxalllen = 0
+    rxdatalen = 0
+    rxflag = 0
+    rxendtime = datetime.datetime.now()
+    begin = datetime.datetime.now()
+    while True:
+        if txflag == 0:
+            if txalllen < filesize:
+                loopback_send_data = loopback_send_obj.read(writesize)
+                txdatalen = loopback_serial.write(loopback_send_data)
+                txalllen += txdatalen
+            else:
+                txflag = 1
+                print("loopback send end")
+                break
+    end = datetime.datetime.now()
+    k = end - begin
+    print("loopback tx time cost:", k)
+    time.sleep(0.2)
+    print("loopback tx thread end")
+
+###############################################################################
+#单串口回环任务
+###############################################################################
+def loopback_rx_thread(func):
+    print("loopback thread start")
+    txalllen = 0
+    txdatalen = 0
+    txflag = 0
+    txendtime = datetime.datetime.now()
+    rxalllen = 0
+    rxdatalen = 0
+    rxflag = 0
+    rxendtime = datetime.datetime.now()
+    begin = datetime.datetime.now()
+    while True:
+        if rxalllen < filesize:
+            loopback_recv_data = loopback_serial.read(writesize)
+            rxdatalen = loopback_recv_obj.write(loopback_recv_data)
+            rxalllen += rxdatalen
+        else:
+            rxflag = 1
+            print("loopback recv end")
+            break
+    end = datetime.datetime.now()
+    k = end - begin
+    print("loopback rx time cost:", k)
+    time.sleep(0.2)
+    print("loopback rx thread end")
+
+###############################################################################
+#创建原始文件
+###############################################################################
+#create usb send file
+begin = datetime.datetime.now()
+loopback_send_obj = open("loopback_send_file.txt", "w+")
+for i in range(filesize):
+    loopback_send_obj.write(str(random.randint(0, 9)))
+loopback_send_obj.close()
+end = datetime.datetime.now()
+k = end - begin
+print("file time cost:", k)
+
+#create uart receive file
+loopback_recv_obj = open("loopback_recv_file.txt", "w+")
+loopback_recv_obj.close()
+
+print("files created")
+
+###############################################################################
+#打开原始文件
+###############################################################################
+#open source file for read
+loopback_send_obj = open("loopback_send_file.txt", "rb+")
+
+#open target file for write
+loopback_recv_obj = open("loopback_recv_file.txt", "wb+")
+
+print("files opened")
+
+###############################################################################
+#打开USB和UART串口
+#PC端serial的波特率不准确，比606稍快，在发送内容较短时可通过减小PC端波特率解决
+#uart_serial = serial.Serial("COM15", 2500000 - 20000, timeout = 2)
+#uart_serial = serial.Serial("COM15", 5000000 - 100000, timeout = 2)
+###############################################################################
+#open usb serial for read & write
+loopback_serial = serial.Serial(loopbackcom, baudrate, timeout = 0)
+loopback_serial.set_buffer_size(rx_size = 1024 * 1024, tx_size = 1024 * 1024)
+
+print("serial opened")
+
+###############################################################################
+#将各任务加入线程列表
+###############################################################################
+#threads list
+threads = []
+loopback_tx_th = threading.Thread(target=loopback_tx_thread, args=("1",))
+loopback_rx_th = threading.Thread(target=loopback_rx_thread, args=("2",))
+threads.append(loopback_tx_th)
+threads.append(loopback_rx_th)
+###############################################################################
+#####################################MAIN######################################
+###############################################################################
+if __name__ == '__main__':
+    time.sleep(1)
+    # loopback_tx_th.setDaemon(True)
+    loopback_rx_th.setDaemon(True)
+    loopback_rx_th.start()
+    # loopback_tx_th.start()
+    loopback_rx_th.join()
+    # loopback_tx_th.join()
+    # loopback_send_obj.close()
+    loopback_recv_obj.close()
+    loopback_serial.close()
+    print("all end")
+    print("")
+###############################################################################
diff --git a/examples/usb/script/cdc_out_loopback.py b/examples/usb/script/cdc_out_loopback.py
new file mode 100644
index 00000000..0b068283
--- /dev/null
+++ b/examples/usb/script/cdc_out_loopback.py
@@ -0,0 +1,149 @@
+# -*- coding:utf-8 -*-
+import serial
+import serial.tools.list_ports
+import struct
+import time
+import sys
+import random
+import threading
+import datetime
+
+
+###############################################################################
+#文件设置
+###############################################################################
+writesize = 50*1024
+# readsize = 0*1024
+filesize = 1024*1024
+###############################################################################
+#COM设置
+###############################################################################
+loopbackcom = "COM20"
+baudrate = 2000000
+###############################################################################
+#单串口回环任务
+###############################################################################
+def loopback_tx_thread(func):
+    print("loopback thread start")
+    txalllen = 0
+    txdatalen = 0
+    txflag = 0
+    txendtime = datetime.datetime.now()
+    rxalllen = 0
+    rxdatalen = 0
+    rxflag = 0
+    rxendtime = datetime.datetime.now()
+    begin = datetime.datetime.now()
+    while True:
+        if txflag == 0:
+            if txalllen < filesize:
+                loopback_send_data = loopback_send_obj.read(writesize)
+                txdatalen = loopback_serial.write(loopback_send_data)
+                txalllen += txdatalen
+            else:
+                txflag = 1
+                print("loopback send end")
+                break
+    end = datetime.datetime.now()
+    k = end - begin
+    print("loopback tx time cost:", k)
+    time.sleep(0.2)
+    print("loopback tx thread end")
+
+###############################################################################
+#单串口回环任务
+###############################################################################
+def loopback_rx_thread(func):
+    print("loopback thread start")
+    txalllen = 0
+    txdatalen = 0
+    txflag = 0
+    txendtime = datetime.datetime.now()
+    rxalllen = 0
+    rxdatalen = 0
+    rxflag = 0
+    rxendtime = datetime.datetime.now()
+    begin = datetime.datetime.now()
+    while True:
+        if rxalllen < filesize:
+            loopback_recv_data = loopback_serial.read(writesize)
+            rxdatalen = loopback_recv_obj.write(loopback_recv_data)
+            rxalllen += rxdatalen
+        else:
+            rxflag = 1
+            print("loopback recv end")
+            break
+    end = datetime.datetime.now()
+    k = end - begin
+    print("loopback rx time cost:", k)
+    time.sleep(0.2)
+    print("loopback rx thread end")
+
+###############################################################################
+#创建原始文件
+###############################################################################
+#create usb send file
+begin = datetime.datetime.now()
+loopback_send_obj = open("loopback_send_file.txt", "w+")
+for i in range(filesize):
+    loopback_send_obj.write(str(random.randint(0, 9)))
+loopback_send_obj.close()
+end = datetime.datetime.now()
+k = end - begin
+print("file time cost:", k)
+
+#create uart receive file
+loopback_recv_obj = open("loopback_recv_file.txt", "w+")
+loopback_recv_obj.close()
+
+print("files created")
+
+###############################################################################
+#打开原始文件
+###############################################################################
+#open source file for read
+loopback_send_obj = open("loopback_send_file.txt", "rb+")
+
+#open target file for write
+loopback_recv_obj = open("loopback_recv_file.txt", "wb+")
+
+print("files opened")
+
+###############################################################################
+#打开USB和UART串口
+#PC端serial的波特率不准确，比606稍快，在发送内容较短时可通过减小PC端波特率解决
+#uart_serial = serial.Serial("COM15", 2500000 - 20000, timeout = 2)
+#uart_serial = serial.Serial("COM15", 5000000 - 100000, timeout = 2)
+###############################################################################
+#open usb serial for read & write
+loopback_serial = serial.Serial(loopbackcom, baudrate, timeout = 0)
+loopback_serial.set_buffer_size(rx_size = 1024 * 1024, tx_size = 1024 * 1024)
+
+print("serial opened")
+
+###############################################################################
+#将各任务加入线程列表
+###############################################################################
+#threads list
+threads = []
+loopback_tx_th = threading.Thread(target=loopback_tx_thread, args=("1",))
+loopback_rx_th = threading.Thread(target=loopback_rx_thread, args=("2",))
+threads.append(loopback_tx_th)
+threads.append(loopback_rx_th)
+###############################################################################
+#####################################MAIN######################################
+###############################################################################
+if __name__ == '__main__':
+    time.sleep(1)
+    loopback_tx_th.setDaemon(True)
+    # loopback_rx_th.setDaemon(True)
+    # loopback_rx_th.start()
+    loopback_tx_th.start()
+    # loopback_rx_th.join()
+    loopback_tx_th.join()
+    loopback_send_obj.close()
+    # loopback_recv_obj.close()
+    loopback_serial.close()
+    print("all end")
+    print("")
+###############################################################################
diff --git a/examples/usb/script/uart2usb_loopback.py b/examples/usb/script/uart2usb_loopback.py
new file mode 100644
index 00000000..c787d988
--- /dev/null
+++ b/examples/usb/script/uart2usb_loopback.py
@@ -0,0 +1,149 @@
+# -*- coding:utf-8 -*-
+import serial
+import serial.tools.list_ports
+import struct
+import time
+import sys
+import random
+import threading
+import datetime
+
+
+###############################################################################
+#文件设置
+###############################################################################
+writesize = 50*1024
+# readsize = 0*1024
+filesize = 5*1024*1024
+###############################################################################
+#COM设置
+###############################################################################
+loopbackcom = "COM21"
+baudrate = 2000000
+###############################################################################
+#单串口回环任务
+###############################################################################
+def loopback_tx_thread(func):
+    print("loopback thread start")
+    txalllen = 0
+    txdatalen = 0
+    txflag = 0
+    txendtime = datetime.datetime.now()
+    rxalllen = 0
+    rxdatalen = 0
+    rxflag = 0
+    rxendtime = datetime.datetime.now()
+    begin = datetime.datetime.now()
+    while True:
+        if txflag == 0:
+            if txalllen < filesize:
+                loopback_send_data = loopback_send_obj.read(writesize)
+                txdatalen = loopback_serial.write(loopback_send_data)
+                txalllen += txdatalen
+            else:
+                txflag = 1
+                print("loopback send end")
+                break
+    end = datetime.datetime.now()
+    k = end - begin
+    print("loopback tx time cost:", k)
+    time.sleep(0.2)
+    print("loopback tx thread end")
+
+###############################################################################
+#单串口回环任务
+###############################################################################
+def loopback_rx_thread(func):
+    print("loopback thread start")
+    txalllen = 0
+    txdatalen = 0
+    txflag = 0
+    txendtime = datetime.datetime.now()
+    rxalllen = 0
+    rxdatalen = 0
+    rxflag = 0
+    rxendtime = datetime.datetime.now()
+    begin = datetime.datetime.now()
+    while True:
+        if rxalllen < filesize:
+            loopback_recv_data = loopback_serial.read(writesize)
+            rxdatalen = loopback_recv_obj.write(loopback_recv_data)
+            rxalllen += rxdatalen
+        else:
+            rxflag = 1
+            print("loopback recv end")
+            break
+    end = datetime.datetime.now()
+    k = end - begin
+    print("loopback rx time cost:", k)
+    time.sleep(0.2)
+    print("loopback rx thread end")
+
+###############################################################################
+#创建原始文件
+###############################################################################
+#create usb send file
+begin = datetime.datetime.now()
+loopback_send_obj = open("loopback_send_file.txt", "w+")
+for i in range(filesize):
+    loopback_send_obj.write(str(random.randint(0, 9)))
+loopback_send_obj.close()
+end = datetime.datetime.now()
+k = end - begin
+print("file time cost:", k)
+
+#create uart receive file
+loopback_recv_obj = open("loopback_recv_file.txt", "w+")
+loopback_recv_obj.close()
+
+print("files created")
+
+###############################################################################
+#打开原始文件
+###############################################################################
+#open source file for read
+loopback_send_obj = open("loopback_send_file.txt", "rb+")
+
+#open target file for write
+loopback_recv_obj = open("loopback_recv_file.txt", "wb+")
+
+print("files opened")
+
+###############################################################################
+#打开USB和UART串口
+#PC端serial的波特率不准确，比606稍快，在发送内容较短时可通过减小PC端波特率解决
+#uart_serial = serial.Serial("COM15", 2500000 - 20000, timeout = 2)
+#uart_serial = serial.Serial("COM15", 5000000 - 100000, timeout = 2)
+###############################################################################
+#open usb serial for read & write
+loopback_serial = serial.Serial(loopbackcom, baudrate, timeout = 0)
+loopback_serial.set_buffer_size(rx_size = 1024 * 1024, tx_size = 1024 * 1024)
+
+print("serial opened")
+
+###############################################################################
+#将各任务加入线程列表
+###############################################################################
+#threads list
+threads = []
+loopback_tx_th = threading.Thread(target=loopback_tx_thread, args=("1",))
+loopback_rx_th = threading.Thread(target=loopback_rx_thread, args=("2",))
+threads.append(loopback_tx_th)
+threads.append(loopback_rx_th)
+###############################################################################
+#####################################MAIN######################################
+###############################################################################
+if __name__ == '__main__':
+    time.sleep(1)
+    loopback_tx_th.setDaemon(True)
+    loopback_rx_th.setDaemon(True)
+    loopback_rx_th.start()
+    loopback_tx_th.start()
+    loopback_rx_th.join()
+    loopback_tx_th.join()
+    loopback_send_obj.close()
+    loopback_recv_obj.close()
+    loopback_serial.close()
+    print("all end")
+    print("")
+###############################################################################
diff --git a/examples/usb/usb_cdc_loopback/CMakeLists.txt b/examples/usb/usb_cdc_loopback/CMakeLists.txt
new file mode 100644
index 00000000..06c9f000
--- /dev/null
+++ b/examples/usb/usb_cdc_loopback/CMakeLists.txt
@@ -0,0 +1,8 @@
+set(BSP_COMMON_DIR ${CMAKE_SOURCE_DIR}/bsp/bsp_common)
+set(TARGET_REQUIRED_LIBS usb_stack)
+set(TARGET_REQUIRED_PRIVATE_INCLUDE ${BSP_COMMON_DIR}/usb)
+set(TARGET_REQUIRED_SRCS ${BSP_COMMON_DIR}/usb/usb_dc.c ${BSP_COMMON_DIR}/usb/uart_interface.c)
+set(mains main.c)
+generate_bin()
+
+
diff --git a/examples/usb/usb_cdc_loopback/cdk/usb_cdc_loopback.cdkproj b/examples/usb/usb_cdc_loopback/cdk/usb_cdc_loopback.cdkproj
new file mode 100644
index 00000000..e83cdec5
--- /dev/null
+++ b/examples/usb/usb_cdc_loopback/cdk/usb_cdc_loopback.cdkproj
@@ -0,0 +1,729 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../bsp/bsp_common/usb;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../bsp/bsp_common/usb;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/usb/usb_cdc_loopback/main.c b/examples/usb/usb_cdc_loopback/main.c
new file mode 100644
index 00000000..5515bf7d
--- /dev/null
+++ b/examples/usb/usb_cdc_loopback/main.c
@@ -0,0 +1,210 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_usb.h"
+#include "usbd_core.h"
+#include "usbd_cdc.h"
+
+#define CDC_IN_EP 0x82
+#define CDC_OUT_EP 0x01
+#define CDC_INT_EP 0x83
+
+#define USBD_VID     0xFFFF
+#define USBD_PID     0xFFFF
+#define USBD_MAX_POWER 100
+#define USBD_LANGID_STRING     1033
+
+#define USB_CONFIG_SIZE (9 + CDC_ACM_DESCRIPTOR_LEN)
+
+USB_DESC_SECTION const uint8_t cdc_descriptor[] =
+{
+    USB_DEVICE_DESCRIPTOR_INIT(USB_2_0,USBD_VID,USBD_PID,0x0100,0x01),
+    USB_CONFIG_DESCRIPTOR_INIT(USB_CONFIG_SIZE,0x02,0x01,USB_CONFIG_BUS_POWERED,USBD_MAX_POWER),
+    CDC_ACM_DESCRIPTOR_INIT(0x00,CDC_INT_EP,CDC_OUT_EP,CDC_IN_EP,0x02), 
+    ///////////////////////////////////////
+    /// string0 descriptor
+    ///////////////////////////////////////
+    USB_LANGID_INIT(USBD_LANGID_STRING),
+    ///////////////////////////////////////
+    /// string1 descriptor
+    ///////////////////////////////////////
+    0x12,                       /* bLength */
+    USB_DESCRIPTOR_TYPE_STRING, /* bDescriptorType */
+    'B', 0x00,                  /* wcChar0 */
+    'o', 0x00,                  /* wcChar1 */
+    'u', 0x00,                  /* wcChar2 */
+    'f', 0x00,                  /* wcChar3 */
+    'f', 0x00,                  /* wcChar4 */
+    'a', 0x00,                  /* wcChar5 */
+    'l', 0x00,                  /* wcChar6 */
+    'o', 0x00,                  /* wcChar7 */
+    ///////////////////////////////////////
+    /// string2 descriptor
+    ///////////////////////////////////////
+    0x24,                       /* bLength */
+    USB_DESCRIPTOR_TYPE_STRING, /* bDescriptorType */
+    'B', 0x00,                  /* wcChar0 */
+    'o', 0x00,                  /* wcChar1 */
+    'u', 0x00,                  /* wcChar2 */
+    'f', 0x00,                  /* wcChar3 */
+    'f', 0x00,                  /* wcChar4 */
+    'a', 0x00,                  /* wcChar5 */
+    'l', 0x00,                  /* wcChar6 */
+    'o', 0x00,                  /* wcChar7 */
+    ' ', 0x00,                  /* wcChar8 */
+    'C', 0x00,                  /* wcChar9 */
+    'D', 0x00,                  /* wcChar10 */
+    'C', 0x00,                  /* wcChar11 */
+    ' ', 0x00,                  /* wcChar13 */
+    'D', 0x00,                  /* wcChar14 */
+    'E', 0x00,                  /* wcChar15 */
+    'M', 0x00,                  /* wcChar16 */
+    'O', 0x00,                  /* wcChar17 */
+    ///////////////////////////////////////
+    /// string3 descriptor
+    ///////////////////////////////////////
+    0x16,                       /* bLength */
+    USB_DESCRIPTOR_TYPE_STRING, /* bDescriptorType */
+    '2', 0x00,                  /* wcChar0 */
+    '0', 0x00,                  /* wcChar1 */
+    '2', 0x00,                  /* wcChar2 */
+    '1', 0x00,                  /* wcChar3 */
+    '0', 0x00,                  /* wcChar4 */
+    '3', 0x00,                  /* wcChar5 */
+    '1', 0x00,                  /* wcChar6 */
+    '0', 0x00,                  /* wcChar7 */
+    '0', 0x00,                  /* wcChar8 */
+    '0', 0x00,                  /* wcChar9 */
+    ///////////////////////////////////////
+    /// device qualifier descriptor
+    ///////////////////////////////////////
+    0x0a,
+    USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER,
+    0x00,
+    0x02,
+    0x02,
+    0x02,
+    0x01,
+    0x40,
+    0x01,
+    0x00,
+
+    0x00
+};
+
+bool zlp_flag = false;
+
+uint32_t actual_write_length = 0;
+uint32_t total_recv_length = 0;
+uint32_t rx_pos = 0;
+uint8_t tx_pos = 0;
+uint8_t out_buffer[4096];
+
+void usbd_cdc_acm_bulk_out(uint8_t ep)
+{
+    uint32_t actual_read_length = 0;    
+
+    if (usbd_ep_read(ep, &out_buffer[rx_pos], 64, &actual_read_length) < 0)
+    {
+        USBD_LOG_DBG("Read DATA Packet failed\r\n");
+        usbd_ep_set_stall(ep);
+        return;
+    }
+	usbd_ep_read(ep,NULL,0,NULL);
+    rx_pos += actual_read_length;
+    total_recv_length += actual_read_length;
+    actual_write_length = total_recv_length;
+
+    if(rx_pos > 4096)
+        rx_pos = 0;
+}
+
+void usbd_cdc_acm_bulk_in(uint8_t ep)
+{
+    if ((zlp_flag == false) && actual_write_length)
+    {
+        if(actual_write_length > 64)
+        {
+            usbd_ep_write(ep, (uint8_t*)&out_buffer[tx_pos], 64, NULL);
+            actual_write_length -= 64;
+            tx_pos+=64;
+        }
+        else
+        {
+            usbd_ep_write(ep, (uint8_t*)&out_buffer[tx_pos], actual_write_length, NULL);
+            actual_write_length = 0;
+            tx_pos = 0;
+            total_recv_length = 0;
+        }
+        if (!actual_write_length && !(total_recv_length % 64))
+        {
+            MSG("zlp\r\n");
+            zlp_flag = true;
+        }
+    }
+    else if (zlp_flag)
+    {
+        usbd_ep_write(ep, NULL, 0, NULL);
+        zlp_flag = false;
+    }
+}
+
+usbd_class_t cdc_class;
+usbd_interface_t cdc_cmd_intf;
+usbd_interface_t cdc_data_intf;
+
+usbd_endpoint_t cdc_out_ep = 
+{
+    .ep_addr = CDC_OUT_EP,
+    .ep_cb = usbd_cdc_acm_bulk_out
+};
+
+usbd_endpoint_t cdc_in_ep = 
+{
+    .ep_addr = CDC_IN_EP,
+    .ep_cb = usbd_cdc_acm_bulk_in
+};
+
+struct device *usb_fs;
+
+extern struct device* usb_dc_init(void);
+int main(void)
+{
+    bflb_platform_init(0);
+
+    usbd_desc_register(cdc_descriptor);
+
+    usbd_cdc_add_acm_interface(&cdc_class,&cdc_cmd_intf);
+    usbd_cdc_add_acm_interface(&cdc_class,&cdc_data_intf);
+    usbd_cdc_add_endpoint(&cdc_data_intf,&cdc_out_ep);
+    usbd_cdc_add_endpoint(&cdc_data_intf,&cdc_in_ep);
+
+    usb_fs = usb_dc_init();
+    if (usb_fs)
+    {
+        device_control(usb_fs, DEVICE_CTRL_SET_INT, (void *)(USB_EP1_DATA_OUT_IT|USB_EP2_DATA_IN_IT));
+    }
+
+    while (1)
+    {
+    }
+}
diff --git a/examples/usb/usb_cdc_msc/CMakeLists.txt b/examples/usb/usb_cdc_msc/CMakeLists.txt
new file mode 100644
index 00000000..2c7cc5fd
--- /dev/null
+++ b/examples/usb/usb_cdc_msc/CMakeLists.txt
@@ -0,0 +1,8 @@
+set(BSP_COMMON_DIR ${CMAKE_SOURCE_DIR}/bsp/bsp_common)
+set(TARGET_REQUIRED_LIBS usb_stack)
+set(TARGET_REQUIRED_PRIVATE_INCLUDE ${BSP_COMMON_DIR}/usb ${BSP_COMMON_DIR}/spi_sd)
+set(TARGET_REQUIRED_SRCS ${BSP_COMMON_DIR}/usb/usb_dc.c ${BSP_COMMON_DIR}/usb/uart_interface.c ${BSP_COMMON_DIR}/spi_sd/bsp_spi_sd.c)
+set(mains main.c)
+generate_bin()
+
+
diff --git a/examples/usb/usb_cdc_msc/cdk/usb_cdc_msc.cdkproj b/examples/usb/usb_cdc_msc/cdk/usb_cdc_msc.cdkproj
new file mode 100644
index 00000000..284ad284
--- /dev/null
+++ b/examples/usb/usb_cdc_msc/cdk/usb_cdc_msc.cdkproj
@@ -0,0 +1,730 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
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+    
+      
+    
+    
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+    
+    
+      
+    
+    
+      
+    
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+    
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+    
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+    
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+  
+  
+    
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+    
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+    
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+  
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+      
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+      
+    
+    
+      
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+    
+      
+        
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+      
+        
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+        
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+        
+      
+      
+        
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+        
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+      
+        
+      
+      
+        
+      
+      
+        
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+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../bsp/bsp_common/usb;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../bsp/bsp_common/usb;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/usb/usb_cdc_msc/main.c b/examples/usb/usb_cdc_msc/main.c
new file mode 100644
index 00000000..bcef66d3
--- /dev/null
+++ b/examples/usb/usb_cdc_msc/main.c
@@ -0,0 +1,236 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_usb.h"
+#include "usbd_core.h"
+#include "usbd_cdc.h"
+#include "usbd_msc.h"
+#include "uart_interface.h"
+
+#define CDC_IN_EP 0x82
+#define CDC_OUT_EP 0x01
+#define CDC_INT_EP 0x83
+#define MSC_IN_EP 0x85
+#define MSC_OUT_EP 0x04
+
+#define USBD_VID     0xFFFF
+#define USBD_PID     0xFFFF
+#define USBD_MAX_POWER 100
+#define USBD_LANGID_STRING     1033
+
+#define USB_CONFIG_SIZE (9 + CDC_ACM_DESCRIPTOR_LEN + 8 + MSC_DESCRIPTOR_LEN)
+
+USB_DESC_SECTION const uint8_t cdc_msc_descriptor[] =
+{
+    USB_DEVICE_DESCRIPTOR_INIT(USB_2_0,USBD_VID,USBD_PID,0x0100,0x01),
+    USB_CONFIG_DESCRIPTOR_INIT(USB_CONFIG_SIZE,0x03,0x01,USB_CONFIG_BUS_POWERED,USBD_MAX_POWER),
+    CDC_ACM_DESCRIPTOR_INIT(0x00,CDC_INT_EP,CDC_OUT_EP,CDC_IN_EP,0x02),
+    ///////////////////////////////////////
+    /// interface association descriptor
+    ///////////////////////////////////////
+    0x08,                                             /* bLength */
+    USB_DESCRIPTOR_TYPE_INTERFACE_ASSOCIATION,        /* bDescriptorType */
+    0x02,                                             /* bFirstInterface */
+    0x01,                                             /* bInterfaceCount */
+    0x08,                                             /* bFunctionClass */
+    0x06,                                             /* bFunctionSubClass */
+    0x50,                                             /* bFunctionProtocol */
+    0x00,                                             /* iFunction */ 
+       
+    MSC_DESCRIPTOR_INIT(0x02,MSC_OUT_EP,MSC_IN_EP,0x02),
+    ///////////////////////////////////////
+    /// string0 descriptor
+    ///////////////////////////////////////
+    USB_LANGID_INIT(USBD_LANGID_STRING),
+    ///////////////////////////////////////
+    /// string1 descriptor
+    ///////////////////////////////////////
+    0x12,                       /* bLength */
+    USB_DESCRIPTOR_TYPE_STRING, /* bDescriptorType */
+    'B', 0x00,                  /* wcChar0 */
+    'o', 0x00,                  /* wcChar1 */
+    'u', 0x00,                  /* wcChar2 */
+    'f', 0x00,                  /* wcChar3 */
+    'f', 0x00,                  /* wcChar4 */
+    'a', 0x00,                  /* wcChar5 */
+    'l', 0x00,                  /* wcChar6 */
+    'o', 0x00,                  /* wcChar7 */
+    ///////////////////////////////////////
+    /// string2 descriptor
+    ///////////////////////////////////////
+    0x22,                       /* bLength */
+    USB_DESCRIPTOR_TYPE_STRING, /* bDescriptorType */
+    'B', 0x00,                  /* wcChar0 */
+    'o', 0x00,                  /* wcChar1 */
+    'u', 0x00,                  /* wcChar2 */
+    'f', 0x00,                  /* wcChar3 */
+    'f', 0x00,                  /* wcChar4 */
+    'a', 0x00,                  /* wcChar5 */
+    'l', 0x00,                  /* wcChar6 */
+    'o', 0x00,                  /* wcChar7 */
+    ' ', 0x00,                  /* wcChar8 */
+    'C', 0x00,                  /* wcChar9 */
+    'D', 0x00,                  /* wcChar10 */
+    'C', 0x00,                  /* wcChar11 */
+    '_', 0x00,                  /* wcChar12 */
+    'M', 0x00,                  /* wcChar14 */
+    'S', 0x00,                  /* wcChar15 */
+    'C', 0x00,                  /* wcChar16 */
+    ///////////////////////////////////////
+    /// string3 descriptor
+    ///////////////////////////////////////
+    0x16,                       /* bLength */
+    USB_DESCRIPTOR_TYPE_STRING, /* bDescriptorType */
+    'b', 0x00,                  /* wcChar0 */
+    'l', 0x00,                  /* wcChar1 */
+    '7', 0x00,                  /* wcChar2 */
+    '0', 0x00,                  /* wcChar3 */
+    '2', 0x00,                  /* wcChar4 */
+    '1', 0x00,                  /* wcChar5 */
+    '2', 0x00,                  /* wcChar6 */
+    '3', 0x00,                  /* wcChar7 */
+    '4', 0x00,                  /* wcChar8 */
+    '5', 0x00,                  /* wcChar9 */
+    ///////////////////////////////////////
+    /// device qualifier descriptor
+    ///////////////////////////////////////
+    0x0a,
+    USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER,
+    0x00,
+    0x02,
+    0x02,
+    0x02,
+    0x01,
+    0x40,
+    0x01,
+    0x00,
+
+    0x00
+};
+
+#define BLOCK_SIZE  512
+#define BLOCK_COUNT 48
+
+typedef struct
+{
+  uint8_t BlockSpace[BLOCK_SIZE];
+} BLOCK_TYPE;
+
+// The CDC recv buffer size should equal to the out endpoint size
+// or we will need a timeout to flush the recv buffer
+BLOCK_TYPE mass_block[BLOCK_COUNT] __attribute__((section(".system_ram")));
+
+extern struct usbd_interface_cfg usb_msc;
+
+void usbd_msc_get_cap(uint8_t lun, uint32_t *block_num, uint16_t *block_size)
+{
+  *block_num = BLOCK_COUNT;
+  *block_size = BLOCK_SIZE;
+}
+int usbd_msc_sector_read(uint32_t sector,uint8_t* buffer,uint32_t length)
+{
+  memcpy(buffer, mass_block[sector].BlockSpace, length);
+  return 0;
+}
+
+int usbd_msc_sector_write(uint32_t sector,uint8_t* buffer,uint32_t length)
+{
+  memcpy(mass_block[sector].BlockSpace, buffer, length);
+  return 0;
+}
+
+
+struct device *usb_fs;
+
+extern struct usbd_interface_cfg usb_cdc;
+
+void usbd_cdc_acm_bulk_out(uint8_t ep)
+{
+    usb_dc_receive_to_ringbuffer(usb_fs, &usb_rx_rb, ep);
+}
+
+void usbd_cdc_acm_bulk_in(uint8_t ep)
+{
+    usb_dc_send_from_ringbuffer(usb_fs, &uart1_rx_rb, ep);
+}
+void usbd_cdc_acm_set_line_coding(uint32_t baudrate, uint8_t databits, uint8_t parity, uint8_t stopbits)
+{
+    uart1_config(baudrate, databits, parity, stopbits);
+}
+
+void usbd_cdc_acm_set_dtr(bool dtr)
+{
+    dtr_pin_set(dtr);
+}
+
+void usbd_cdc_acm_set_rts(bool rts)
+{
+    rts_pin_set(rts);
+}
+
+usbd_class_t cdc_class;
+
+usbd_interface_t cdc_cmd_intf;
+usbd_interface_t cdc_data_intf;
+
+usbd_endpoint_t cdc_out_ep = 
+{
+    .ep_addr = CDC_OUT_EP,
+    .ep_cb = usbd_cdc_acm_bulk_out
+};
+
+usbd_endpoint_t cdc_in_ep = 
+{
+    .ep_addr = CDC_IN_EP,
+    .ep_cb = usbd_cdc_acm_bulk_in
+};
+
+extern struct device* usb_dc_init(void);
+
+int main(void)
+{
+    bflb_platform_init(0);
+    uart_ringbuffer_init();
+    uart1_init();
+    uart1_dtr_init();
+    uart1_rts_init();
+
+    usbd_desc_register(cdc_msc_descriptor);
+
+    usbd_cdc_add_acm_interface(&cdc_class,&cdc_cmd_intf);
+    usbd_cdc_add_acm_interface(&cdc_class,&cdc_data_intf);
+    usbd_cdc_add_endpoint(&cdc_data_intf,&cdc_out_ep);
+    usbd_cdc_add_endpoint(&cdc_data_intf,&cdc_in_ep);
+
+    usbd_msc_class_init(MSC_OUT_EP,MSC_IN_EP);
+    
+    usb_fs = usb_dc_init();
+    if (usb_fs)
+    {
+        device_control(usb_fs, DEVICE_CTRL_SET_INT, (void *)(USB_EP1_DATA_OUT_IT | USB_EP2_DATA_IN_IT|USB_EP4_DATA_OUT_IT|USB_EP5_DATA_IN_IT));
+    }
+
+    while (1)
+    {
+        uart_send_from_ringbuffer();
+    }
+}
diff --git a/examples/usb/usb_msc_ram/CMakeLists.txt b/examples/usb/usb_msc_ram/CMakeLists.txt
new file mode 100644
index 00000000..2c7cc5fd
--- /dev/null
+++ b/examples/usb/usb_msc_ram/CMakeLists.txt
@@ -0,0 +1,8 @@
+set(BSP_COMMON_DIR ${CMAKE_SOURCE_DIR}/bsp/bsp_common)
+set(TARGET_REQUIRED_LIBS usb_stack)
+set(TARGET_REQUIRED_PRIVATE_INCLUDE ${BSP_COMMON_DIR}/usb ${BSP_COMMON_DIR}/spi_sd)
+set(TARGET_REQUIRED_SRCS ${BSP_COMMON_DIR}/usb/usb_dc.c ${BSP_COMMON_DIR}/usb/uart_interface.c ${BSP_COMMON_DIR}/spi_sd/bsp_spi_sd.c)
+set(mains main.c)
+generate_bin()
+
+
diff --git a/examples/usb/usb_msc_ram/cdk/usb_msc_ram.cdkproj b/examples/usb/usb_msc_ram/cdk/usb_msc_ram.cdkproj
new file mode 100644
index 00000000..31e7204a
--- /dev/null
+++ b/examples/usb/usb_msc_ram/cdk/usb_msc_ram.cdkproj
@@ -0,0 +1,729 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
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+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
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+    
+    
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+    
+    
+      
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+    
+    
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+    
+    
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+    
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+    
+    
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+    
+    
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+    
+    
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+    
+    
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+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
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+    
+    
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+    
+    
+      
+    
+    
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+    
+    
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+    
+    
+      
+    
+    
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+    
+    
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+    
+    
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+    
+    
+      
+    
+    
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+    
+    
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+    
+    
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+    
+    
+      
+    
+  
+  
+    
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+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../bsp/bsp_common/usb;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../bsp/bsp_common/usb;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/usb/usb_msc_ram/main.c b/examples/usb/usb_msc_ram/main.c
new file mode 100644
index 00000000..80eabf64
--- /dev/null
+++ b/examples/usb/usb_msc_ram/main.c
@@ -0,0 +1,161 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_usb.h"
+#include "usbd_core.h"
+#include "usbd_msc.h"
+
+#define MSC_IN_EP 0x85
+#define MSC_OUT_EP 0x04
+
+#define USBD_VID     0xFFFF
+#define USBD_PID     0xFFFF
+#define USBD_MAX_POWER 100
+#define USBD_LANGID_STRING     1033
+
+#define USB_CONFIG_SIZE (9 + MSC_DESCRIPTOR_LEN)
+
+USB_DESC_SECTION const uint8_t msc_ram_descriptor[] = {
+  USB_DEVICE_DESCRIPTOR_INIT(USB_2_0,USBD_VID,USBD_PID,0x0200,0x01),
+  USB_CONFIG_DESCRIPTOR_INIT(USB_CONFIG_SIZE,0x01,0x01,USB_CONFIG_BUS_POWERED,USBD_MAX_POWER),
+  MSC_DESCRIPTOR_INIT(0x00,MSC_OUT_EP,MSC_IN_EP,0x02),
+  ///////////////////////////////////////
+  /// string0 descriptor
+  ///////////////////////////////////////
+  USB_LANGID_INIT(USBD_LANGID_STRING),
+  ///////////////////////////////////////
+  /// string1 descriptor
+  ///////////////////////////////////////
+  0x12,                                             /* bLength */
+  USB_DESCRIPTOR_TYPE_STRING,                       /* bDescriptorType */
+  'B', 0x00,                                        /* wcChar0 */
+  'o', 0x00,                                        /* wcChar1 */
+  'u', 0x00,                                        /* wcChar2 */
+  'f', 0x00,                                        /* wcChar3 */
+  'f', 0x00,                                        /* wcChar4 */
+  'a', 0x00,                                        /* wcChar5 */
+  'l', 0x00,                                        /* wcChar6 */
+  'o', 0x00,                                        /* wcChar7 */
+  ///////////////////////////////////////
+  /// string2 descriptor
+  ///////////////////////////////////////
+  0x24,                                             /* bLength */
+  USB_DESCRIPTOR_TYPE_STRING,                       /* bDescriptorType */
+  'B', 0x00,                                        /* wcChar0 */
+  'o', 0x00,                                        /* wcChar1 */
+  'u', 0x00,                                        /* wcChar2 */
+  'f', 0x00,                                        /* wcChar3 */
+  'f', 0x00,                                        /* wcChar4 */
+  'a', 0x00,                                        /* wcChar5 */
+  'l', 0x00,                                        /* wcChar6 */
+  'o', 0x00,                                        /* wcChar7 */
+  ' ', 0x00,                                        /* wcChar8 */
+  'M', 0x00,                                        /* wcChar9 */
+  'S', 0x00,                                        /* wcChar10 */
+  'C', 0x00,                                        /* wcChar11 */
+  ' ', 0x00,                                        /* wcChar12 */
+  'D', 0x00,                                        /* wcChar13 */
+  'E', 0x00,                                        /* wcChar14 */
+  'M', 0x00,                                        /* wcChar15 */
+  'O', 0x00,                                        /* wcChar16 */
+  ///////////////////////////////////////
+  /// string3 descriptor
+  ///////////////////////////////////////
+  0x16,                                             /* bLength */
+  USB_DESCRIPTOR_TYPE_STRING,                       /* bDescriptorType */
+  '2', 0x00,                  /* wcChar0 */
+  '0', 0x00,                  /* wcChar1 */
+  '2', 0x00,                  /* wcChar2 */
+  '1', 0x00,                  /* wcChar3 */
+  '0', 0x00,                  /* wcChar4 */
+  '3', 0x00,                  /* wcChar5 */
+  '1', 0x00,                  /* wcChar6 */
+  '0', 0x00,                  /* wcChar7 */
+  '0', 0x00,                  /* wcChar8 */
+  '0', 0x00,                  /* wcChar9 */
+  ///////////////////////////////////////
+  /// device qualifier descriptor
+  ///////////////////////////////////////
+  0x0a, 
+  USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER, 
+  0x00, 
+  0x02, 
+  0x00, 
+  0x00, 
+  0x00, 
+  0x40, 
+  0x01, 
+  0x00,
+  
+  0x00
+};
+
+#define BLOCK_SIZE  512
+#define BLOCK_COUNT 64
+
+typedef struct
+{
+  uint8_t BlockSpace[BLOCK_SIZE];
+} BLOCK_TYPE;
+
+// The CDC recv buffer size should equal to the out endpoint size
+// or we will need a timeout to flush the recv buffer
+BLOCK_TYPE mass_block[BLOCK_COUNT] __attribute__((section(".system_ram")));
+
+
+void usbd_msc_get_cap(uint8_t lun, uint32_t *block_num, uint16_t *block_size)
+{
+  *block_num = BLOCK_COUNT;
+  *block_size = BLOCK_SIZE;
+}
+int usbd_msc_sector_read(uint32_t sector,uint8_t* buffer,uint32_t length)
+{
+  memcpy(buffer, mass_block[sector].BlockSpace, length);
+  return 0;
+}
+
+int usbd_msc_sector_write(uint32_t sector,uint8_t* buffer,uint32_t length)
+{
+  memcpy(mass_block[sector].BlockSpace, buffer, length);
+  return 0;
+}
+
+struct device *usb_fs;
+
+extern struct device* usb_dc_init(void);
+int main(void)
+{
+  bflb_platform_init(0);
+
+  usbd_desc_register(msc_ram_descriptor);
+  usbd_msc_class_init(MSC_OUT_EP,MSC_IN_EP);
+
+  usb_fs = usb_dc_init();
+  if (usb_fs)
+  {
+      device_control(usb_fs, DEVICE_CTRL_SET_INT, (void *)(USB_EP4_DATA_OUT_IT|USB_EP5_DATA_IN_IT));
+  }
+
+  while (1)
+  {
+  }
+}
diff --git a/examples/usb/usb_msc_sd/CMakeLists.txt b/examples/usb/usb_msc_sd/CMakeLists.txt
new file mode 100644
index 00000000..2c7cc5fd
--- /dev/null
+++ b/examples/usb/usb_msc_sd/CMakeLists.txt
@@ -0,0 +1,8 @@
+set(BSP_COMMON_DIR ${CMAKE_SOURCE_DIR}/bsp/bsp_common)
+set(TARGET_REQUIRED_LIBS usb_stack)
+set(TARGET_REQUIRED_PRIVATE_INCLUDE ${BSP_COMMON_DIR}/usb ${BSP_COMMON_DIR}/spi_sd)
+set(TARGET_REQUIRED_SRCS ${BSP_COMMON_DIR}/usb/usb_dc.c ${BSP_COMMON_DIR}/usb/uart_interface.c ${BSP_COMMON_DIR}/spi_sd/bsp_spi_sd.c)
+set(mains main.c)
+generate_bin()
+
+
diff --git a/examples/usb/usb_msc_sd/cdk/usb_msc_sd.cdkproj b/examples/usb/usb_msc_sd/cdk/usb_msc_sd.cdkproj
new file mode 100644
index 00000000..169dd96d
--- /dev/null
+++ b/examples/usb/usb_msc_sd/cdk/usb_msc_sd.cdkproj
@@ -0,0 +1,730 @@
+
+
+  CPU: RV32IMAFC
+Chip: bl70x
+Board: bl70x_iot
+  
+  
+  
+    
+      
+    
+  
+  
+    
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+      
+        
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+  
+  
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+    
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+    
+  
+  
+    
+      
+    
+    
+      
+    
+  
+  
+    154
+    104
+  
+  
+    
+      
+        
+      
+      
+        
+      
+      
+        
+      
+      
+        
+      
+    
+    
+      
+        
+      
+    
+    
+      
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+        
+          
+            
+          
+        
+      
+      
+        
+          
+        
+      
+    
+  
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+    ;;;
+    ;;MHZ;
+    
+      glb
+      uart
+    
+    1
+    1
+    
+    100:8;100:8;100:8;100:8;
+  
+  
+    
+      
+        
+          
+            no
+            0x23000000
+            0x100000
+          
+          
+            no
+            0x22014000
+            0x4000
+          
+          
+            no
+            0x42018000
+            0x8000
+          
+          
+            no
+            
+            
+          
+          
+            no
+            
+            
+          
+        
+        
+          
+            yes
+            0x42020000
+            0xc000
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+          
+            no
+            
+            
+            yes
+          
+        
+        rv32imafc
+        no
+        little
+        no
+        no
+        no
+        no
+      
+      
+        $(ProjectName)
+        Executable
+        no
+        yes
+        no
+        yes
+        no
+        yes
+      
+      
+        
+          no
+          
+        
+        
+          no
+          
+        
+        
+          no
+          $(ProjectPath)../../../../tools/bflb_flash_tool/bflb_mcu_tool.exe  --chipname=bl702 --firmware="D:/BouffaloLabWS/cdk_ws/bl_mcu_sdk/examples/hellowd/Obj/helloworld.bin" 
+        
+      
+      
+        ARCH_RISCV;
+        
+        Optimize more (-O2)
+        Default (-g)
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../bsp/bsp_common/spi_sd;$(ProjectPath)../../../../bsp/bsp_common/usb;$(ProjectPath)../../../../common/libc/inc;$(ProjectPath)../../../../common/libc/inc/arm_gcc;$(ProjectPath)../../../../common/libc/inc/bits;$(ProjectPath)../../../../common/libc/inc/sys;$(ProjectPath)../../../../common/libc/src;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        -fshort-enums -fno-common -fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields -Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4
+        no
+        no
+        no
+        no
+        no
+        no
+        yes
+        no
+        yes
+        no
+      
+      
+        
+        
+        $(ProjectPath);$(ProjectPath)../;$(ProjectPath)../../../../components/fatfs;$(ProjectPath)../../../../components/freertos/Source/include;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../components/usb_stack/class/audio;$(ProjectPath)../../../../components/usb_stack/class/cdc;$(ProjectPath)../../../../components/usb_stack/class/hid;$(ProjectPath)../../../../components/usb_stack/class/msc;$(ProjectPath)../../../../components/usb_stack/class/video;$(ProjectPath)../../../../components/usb_stack/class/webusb;$(ProjectPath)../../../../components/usb_stack/class/winusb;$(ProjectPath)../../../../components/usb_stack/common;$(ProjectPath)../../../../components/usb_stack/core;$(ProjectPath)../../../../bsp/board/bl706_iot;$(ProjectPath)../../../../bsp/bsp_common/platform;$(ProjectPath)../../../../bsp/bsp_common/spi_sd;$(ProjectPath)../../../../bsp/bsp_common/usb;$(ProjectPath)../../../../common/device;$(ProjectPath)../../../../common/list;$(ProjectPath)../../../../common/memheap;$(ProjectPath)../../../../common/misc;$(ProjectPath)../../../../common/ring_buffer;$(ProjectPath)../../../../common/soft_crc;$(ProjectPath)../../../../components/shell;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl702_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl702_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl702_driver/regs;$(ProjectPath)../../../../drivers/bl702_driver/startup;$(ProjectPath)../../../../drivers/bl702_driver/std_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/risc-v/Core/Include;$(ProjectPath)../../../../drivers/bl602_driver/startup;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/inc;$(ProjectPath)../../../../drivers/bl602_driver/hal_drv/default_config;$(ProjectPath)../../../../drivers/bl602_driver/regs;$(ProjectPath)../../../../drivers/bl602_driver/std_drv/inc
+        
+        gdwarf2
+      
+      
+        yes
+        yes
+        $(ProjectPath)../../../../drivers/bl702_driver/bl702_flash.ld
+        c;gcc
+        
+        
+        no
+        
+      
+      
+        yes
+        ICE
+        yes
+        main
+        
+        $(ProjectPath)/../../../../tools/openocd/bl70x_gdb.init
+        yes
+        Hard Reset
+        23000000
+        no
+        no
+        $(ProjectPath)/$(ProjectName).cdkcore
+        
+          localhost
+          1025
+          0
+          2000
+          10
+          50
+          yes
+          no
+          no
+          Normal
+          Hard Reset
+          21000000
+          Bare Metal
+          yes
+          yes
+          
+          Local
+          -arch riscv
+        
+        
+          
+          
+          yes
+          no
+          no
+        
+        
+          openocd-bl702
+          no
+          4444
+          no
+          6666
+          -f openocd_bl702_evb.cfg
+        
+      
+      
+        
+        Erase Sectors
+        bl702_flasher.elf
+        yes
+        yes
+        no
+        Hard Reset
+        
+        no
+        
+        
+      
+    
+  
+
diff --git a/examples/usb/usb_msc_sd/main.c b/examples/usb/usb_msc_sd/main.c
new file mode 100644
index 00000000..070d8b6a
--- /dev/null
+++ b/examples/usb/usb_msc_sd/main.c
@@ -0,0 +1,165 @@
+/**
+ * @file main.c
+ * @brief 
+ * 
+ * Copyright (c) 2021 Bouffalolab team
+ * 
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ * 
+ */
+#include "hal_usb.h"
+#include "usbd_core.h"
+#include "usbd_msc.h"
+#include "bsp_spi_sd.h"
+
+#define MSC_IN_EP 0x85
+#define MSC_OUT_EP 0x04
+
+#define USBD_VID     0xFFFF
+#define USBD_PID     0xFFFF
+#define USBD_MAX_POWER 100
+#define USBD_LANGID_STRING     1033
+
+#define USB_CONFIG_SIZE (9 + MSC_DESCRIPTOR_LEN)
+
+USB_DESC_SECTION const uint8_t msc_ram_descriptor[] = {
+  USB_DEVICE_DESCRIPTOR_INIT(USB_2_0,USBD_VID,USBD_PID,0x0200,0x01),
+  USB_CONFIG_DESCRIPTOR_INIT(USB_CONFIG_SIZE,0x01,0x01,USB_CONFIG_BUS_POWERED,USBD_MAX_POWER),
+  MSC_DESCRIPTOR_INIT(0x02,MSC_OUT_EP,MSC_IN_EP,0x02),
+  ///////////////////////////////////////
+  /// string0 descriptor
+  ///////////////////////////////////////
+  0x04,                                         /* bLength */
+  USB_DESCRIPTOR_TYPE_STRING,                   /* bDescriptorType */
+  0x09, 0x04,                                   /* wLangID0 */
+  ///////////////////////////////////////
+  /// string1 descriptor
+  ///////////////////////////////////////
+  0x12,                                             /* bLength */
+  USB_DESCRIPTOR_TYPE_STRING,                       /* bDescriptorType */
+  'B', 0x00,                                        /* wcChar0 */
+  'o', 0x00,                                        /* wcChar1 */
+  'u', 0x00,                                        /* wcChar2 */
+  'f', 0x00,                                        /* wcChar3 */
+  'f', 0x00,                                        /* wcChar4 */
+  'a', 0x00,                                        /* wcChar5 */
+  'l', 0x00,                                        /* wcChar6 */
+  'o', 0x00,                                        /* wcChar7 */
+  ///////////////////////////////////////
+  /// string2 descriptor
+  ///////////////////////////////////////
+  0x24,                                             /* bLength */
+  USB_DESCRIPTOR_TYPE_STRING,                       /* bDescriptorType */
+  'B', 0x00,                                        /* wcChar0 */
+  'o', 0x00,                                        /* wcChar1 */
+  'u', 0x00,                                        /* wcChar2 */
+  'f', 0x00,                                        /* wcChar3 */
+  'f', 0x00,                                        /* wcChar4 */
+  'a', 0x00,                                        /* wcChar5 */
+  'l', 0x00,                                        /* wcChar6 */
+  'o', 0x00,                                        /* wcChar7 */
+  ' ', 0x00,                                        /* wcChar8 */
+  'M', 0x00,                                        /* wcChar9 */
+  'S', 0x00,                                        /* wcChar10 */
+  'C', 0x00,                                        /* wcChar11 */
+  ' ', 0x00,                                        /* wcChar12 */
+  'D', 0x00,                                        /* wcChar13 */
+  'E', 0x00,                                        /* wcChar14 */
+  'M', 0x00,                                        /* wcChar15 */
+  'O', 0x00,                                        /* wcChar16 */
+  ///////////////////////////////////////
+  /// string3 descriptor
+  ///////////////////////////////////////
+  0x16,                                             /* bLength */
+  USB_DESCRIPTOR_TYPE_STRING,                       /* bDescriptorType */
+  '2', 0x00,                  /* wcChar0 */
+  '0', 0x00,                  /* wcChar1 */
+  '2', 0x00,                  /* wcChar2 */
+  '1', 0x00,                  /* wcChar3 */
+  '0', 0x00,                  /* wcChar4 */
+  '3', 0x00,                  /* wcChar5 */
+  '1', 0x00,                  /* wcChar6 */
+  '0', 0x00,                  /* wcChar7 */
+  '0', 0x00,                  /* wcChar8 */
+  '0', 0x00,                  /* wcChar9 */
+  ///////////////////////////////////////
+  /// device qualifier descriptor
+  ///////////////////////////////////////
+  0x0a, 
+  USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER, 
+  0x00, 
+  0x02, 
+  0x00, 
+  0x00, 
+  0x00, 
+  0x40, 
+  0x01, 
+  0x00,
+
+  0x00
+};
+
+void usbd_msc_get_cap(uint8_t lun, uint32_t *block_num, uint16_t *block_size)
+{
+  *block_num = SD_CardInfo.CardCapacity / SD_CardInfo.CardBlockSize;
+  *block_size = SD_CardInfo.CardBlockSize;
+  MSG("nbr:%ld,size:%d\r\n",*block_num,*block_size);
+}
+int usbd_msc_sector_read(uint32_t sector,uint8_t* buffer,uint32_t length)
+{
+  SD_ReadBlock(sector,buffer,1);
+  return 0;
+}
+
+int usbd_msc_sector_write(uint32_t sector,uint8_t* buffer,uint32_t length)
+{
+  SD_WriteBlock(sector,buffer,1);
+  return 0;
+}
+
+struct device *usb_fs;
+
+extern struct device* usb_dc_init(void);
+ATTR_DTCM_SECTION uint8_t t_buf[512] = {0};
+
+void tx_buf_init(void)
+{
+    for(int i = 0; i < 512; i ++)
+    {
+        t_buf[i] = 0xFF;
+    }
+}
+
+
+int main(void)
+{
+  bflb_platform_init(0);
+  tx_buf_init();
+  SD_Init(&SD_CardInfo);
+
+  usbd_desc_register(msc_ram_descriptor);
+  usbd_msc_class_init(MSC_OUT_EP,MSC_IN_EP);
+
+  usb_fs = usb_dc_init();
+  if (usb_fs)
+  {
+      device_control(usb_fs, DEVICE_CTRL_SET_INT, (void *)(USB_EP4_DATA_OUT_IT|USB_EP5_DATA_IN_IT));
+  }
+
+  while (1)
+  {
+  }
+}
diff --git a/project.build b/project.build
new file mode 100644
index 00000000..7c6878c7
--- /dev/null
+++ b/project.build
@@ -0,0 +1,4 @@
+PHONY := __build
+__build:
+	cmake -DBOARD=$(BOARD) -DSUPPORT_SHELL=DISABLE -DAPP=$(APP) .. 
+	make -j
diff --git a/tools/bflb_flash_tool/bflb_iot_tool b/tools/bflb_flash_tool/bflb_iot_tool
new file mode 100644
index 00000000..237d1bc1
Binary files /dev/null and b/tools/bflb_flash_tool/bflb_iot_tool differ
diff --git a/tools/bflb_flash_tool/bflb_iot_tool.exe b/tools/bflb_flash_tool/bflb_iot_tool.exe
new file mode 100644
index 00000000..1096a21b
Binary files /dev/null and b/tools/bflb_flash_tool/bflb_iot_tool.exe differ
diff --git a/tools/bflb_flash_tool/bflb_mcu_tool b/tools/bflb_flash_tool/bflb_mcu_tool
new file mode 100644
index 00000000..e7d06004
Binary files /dev/null and b/tools/bflb_flash_tool/bflb_mcu_tool differ
diff --git a/tools/bflb_flash_tool/bflb_mcu_tool.exe b/tools/bflb_flash_tool/bflb_mcu_tool.exe
new file mode 100644
index 00000000..141e87f4
Binary files /dev/null and b/tools/bflb_flash_tool/bflb_mcu_tool.exe differ
diff --git a/tools/bflb_flash_tool/chips/bl602/builtin_imgs/blsp_boot2.bin b/tools/bflb_flash_tool/chips/bl602/builtin_imgs/blsp_boot2.bin
new file mode 100644
index 00000000..ee20787b
Binary files /dev/null and b/tools/bflb_flash_tool/chips/bl602/builtin_imgs/blsp_boot2.bin differ
diff --git a/tools/bflb_flash_tool/chips/bl602/builtin_imgs/blsp_boot2.elf b/tools/bflb_flash_tool/chips/bl602/builtin_imgs/blsp_boot2.elf
new file mode 100644
index 00000000..1a233f1b
Binary files /dev/null and b/tools/bflb_flash_tool/chips/bl602/builtin_imgs/blsp_boot2.elf differ
diff --git a/tools/bflb_flash_tool/chips/bl602/builtin_imgs/blsp_boot2.map b/tools/bflb_flash_tool/chips/bl602/builtin_imgs/blsp_boot2.map
new file mode 100644
index 00000000..15dc62be
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/builtin_imgs/blsp_boot2.map
@@ -0,0 +1,11014 @@
+Archive member included to satisfy reference by file (symbol)
+
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libc.a(lib_a-memmove-stub.o)
+                              out/BSP_Common/xz/xz_dec_lzma2.o (memmove)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clzsi2.o)
+                              out/3rdParty/FreeRTOS/Source/tasks.o (__clzsi2)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_udivdi3.o)
+                              out/BSP_Common/libc/vsnprintf.o (__udivdi3)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_umoddi3.o)
+                              out/BSP_Common/libc/vsnprintf.o (__umoddi3)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(adddf3.o)
+                              out/BSP_Common/libc/atof.o (__adddf3)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(divdf3.o)
+                              out/BSP_Common/libc/atof.o (__divdf3)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(muldf3.o)
+                              out/BSP_Common/libc/atof.o (__muldf3)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(fixdfsi.o)
+                              out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o (__fixdfsi)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(fixunsdfsi.o)
+                              out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o (__fixunsdfsi)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatsidf.o)
+                              out/BSP_Common/libc/atof.o (__floatsidf)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+                              out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o (__floatunsidf)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clz.o)
+                              /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clzsi2.o) (__clz_tab)
+
+Discarded input sections
+
+ .group         0x0000000000000000        0xc out/3rdParty/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc out/3rdParty/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc out/3rdParty/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc out/3rdParty/FreeRTOS/Source/croutine.o
+ .group         0x0000000000000000        0xc out/3rdParty/FreeRTOS/Source/croutine.o
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+ .debug_macro   0x0000000000000000       0x4c out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .text          0x0000000000000000        0x0 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .data          0x0000000000000000        0x0 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .bss           0x0000000000000000        0x0 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .text.bflb_eflash_loader_deinit_ext_flash_gpio
+                0x0000000000000000       0xce out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .text.bootrom_read_boot_mode
+                0x0000000000000000       0x54 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .text.bflb_eflash_loader_deinit_uart_gpio_do
+                0x0000000000000000       0x50 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .text.bflb_eflash_loader_deinit_uart_gpio
+                0x0000000000000000        0x8 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .text.bflb_eflash_loader_init_flash_gpio
+                0x0000000000000000       0xfe out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000      0x79c out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000       0x16 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000       0x58 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000       0x34 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000      0x1f6 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000       0x1c out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000       0x40 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000      0x20a out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000       0x88 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000       0x52 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000     0x163c out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000      0xa68 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000       0x22 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000       0x58 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000     0x47b7 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000     0x11f8 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000      0x7c0 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
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+ .debug_macro   0x0000000000000000       0x4f out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000      0xaec out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000     0x1a74 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000      0xd67 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000       0x3c out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000     0x2071 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000       0x66 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000       0x19 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000       0xba out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000       0x70 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000       0x96 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000      0x100 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000     0x2c9b out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000       0x66 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000       0x40 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_macro   0x0000000000000000       0x64 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
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+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
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+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
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+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
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+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+ .group         0x0000000000000000        0xc out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
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+ .data          0x0000000000000000        0x0 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+ .bss           0x0000000000000000        0x0 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+ .text.bflb_eflash_loader_usart_if_send
+                0x0000000000000000        0xe out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+ .text.bflb_eflash_loader_uart_recv
+                0x0000000000000000        0xe out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+ .text.bflb_eflash_loader_usart_wait_tx_idle
+                0x0000000000000000       0x14 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+ .text.bflb_eflash_loader_uart_change_rate
+                0x0000000000000000       0x7e out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+ .text.bflb_eflash_loader_uart_deinit
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+                0x0000000000000000        0x1 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
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+ .debug_line    0x0000000000000000      0x28b /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatsidf.o)
+ .debug_str     0x0000000000000000      0x310 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatsidf.o)
+ .comment       0x0000000000000000       0x33 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatsidf.o)
+ .debug_frame   0x0000000000000000       0x38 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatsidf.o)
+ .riscv.attributes
+                0x0000000000000000       0x2e /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatsidf.o)
+ .text          0x0000000000000000       0x56 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+ .data          0x0000000000000000        0x0 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+ .bss           0x0000000000000000        0x0 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+ .debug_info    0x0000000000000000      0x2af /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+ .debug_abbrev  0x0000000000000000      0x178 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+ .debug_loc     0x0000000000000000      0x15c /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+ .debug_aranges
+                0x0000000000000000       0x20 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+ .debug_ranges  0x0000000000000000       0x68 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+ .debug_line    0x0000000000000000      0x2ad /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+ .debug_str     0x0000000000000000      0x30d /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+ .comment       0x0000000000000000       0x33 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+ .debug_frame   0x0000000000000000       0x34 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+ .riscv.attributes
+                0x0000000000000000       0x2e /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+ .text          0x0000000000000000        0x0 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clz.o)
+ .data          0x0000000000000000        0x0 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clz.o)
+ .bss           0x0000000000000000        0x0 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clz.o)
+
+Memory Configuration
+
+Name             Origin             Length             Attributes
+xip_memory       0x0000000023000000 0x000000000000c000 xr
+itcm_memory      0x000000002201c000 0x0000000000004000 xr
+dtcm_memory      0x0000000042020000 0x000000000000c000 xr
+ram_memory       0x000000004202c000 0x000000000001c000 !xr
+*default*        0x0000000000000000 0xffffffffffffffff
+
+Linker script and memory map
+
+LOAD out/3rdParty/FreeRTOS/Source/croutine.o
+LOAD out/3rdParty/FreeRTOS/Source/list.o
+LOAD out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+LOAD out/3rdParty/FreeRTOS/Source/queue.o
+LOAD out/3rdParty/FreeRTOS/Source/stream_buffer.o
+LOAD out/3rdParty/FreeRTOS/Source/tasks.o
+LOAD out/3rdParty/FreeRTOS/Source/timers.o
+LOAD out/BSP_Common/FreeRTOS/port.o
+LOAD out/BSP_Common/FreeRTOS/portASM.o
+LOAD out/BSP_Common/cipher_suite/bflb_crypt.o
+LOAD out/BSP_Common/cipher_suite/bflb_dsa.o
+LOAD out/BSP_Common/cipher_suite/bflb_ecdsa.o
+LOAD out/BSP_Common/cipher_suite/bflb_hash.o
+LOAD out/BSP_Common/libc/atof.o
+LOAD out/BSP_Common/libc/atoi.o
+LOAD out/BSP_Common/libc/atol.o
+LOAD out/BSP_Common/libc/atoll.o
+LOAD out/BSP_Common/libc/bsearch.o
+LOAD out/BSP_Common/libc/common.o
+LOAD out/BSP_Common/libc/ctype_isalnum.o
+LOAD out/BSP_Common/libc/ctype_isalpha.o
+LOAD out/BSP_Common/libc/ctype_isascii.o
+LOAD out/BSP_Common/libc/ctype_isblank.o
+LOAD out/BSP_Common/libc/ctype_iscntrl.o
+LOAD out/BSP_Common/libc/ctype_isdigit.o
+LOAD out/BSP_Common/libc/ctype_isgraph.o
+LOAD out/BSP_Common/libc/ctype_islower.o
+LOAD out/BSP_Common/libc/ctype_isprint.o
+LOAD out/BSP_Common/libc/ctype_ispunct.o
+LOAD out/BSP_Common/libc/ctype_isspace.o
+LOAD out/BSP_Common/libc/ctype_isupper.o
+LOAD out/BSP_Common/libc/ctype_isxdigit.o
+LOAD out/BSP_Common/libc/ctype_tolower.o
+LOAD out/BSP_Common/libc/ctype_toupper.o
+LOAD out/BSP_Common/libc/ctypes.o
+LOAD out/BSP_Common/libc/fnmatch.o
+LOAD out/BSP_Common/libc/jrand48.o
+LOAD out/BSP_Common/libc/lrand48.o
+LOAD out/BSP_Common/libc/memccpy.o
+LOAD out/BSP_Common/libc/memchr.o
+LOAD out/BSP_Common/libc/memcmp.o
+LOAD out/BSP_Common/libc/memcpy.o
+LOAD out/BSP_Common/libc/memmem.o
+LOAD out/BSP_Common/libc/memrchr.o
+LOAD out/BSP_Common/libc/memset.o
+LOAD out/BSP_Common/libc/memswap.o
+LOAD out/BSP_Common/libc/mrand48.o
+LOAD out/BSP_Common/libc/nrand48.o
+LOAD out/BSP_Common/libc/qsort.o
+LOAD out/BSP_Common/libc/seed48.o
+LOAD out/BSP_Common/libc/snprintf.o
+LOAD out/BSP_Common/libc/sprintf.o
+LOAD out/BSP_Common/libc/srand48.o
+LOAD out/BSP_Common/libc/sscanf.o
+LOAD out/BSP_Common/libc/stdlib.o
+LOAD out/BSP_Common/libc/strcasecmp.o
+LOAD out/BSP_Common/libc/strcat.o
+LOAD out/BSP_Common/libc/strchr.o
+LOAD out/BSP_Common/libc/strcmp.o
+LOAD out/BSP_Common/libc/strcpy.o
+LOAD out/BSP_Common/libc/strcspn.o
+LOAD out/BSP_Common/libc/strlcat.o
+LOAD out/BSP_Common/libc/strlcpy.o
+LOAD out/BSP_Common/libc/strlen.o
+LOAD out/BSP_Common/libc/strncasecmp.o
+LOAD out/BSP_Common/libc/strncat.o
+LOAD out/BSP_Common/libc/strncmp.o
+LOAD out/BSP_Common/libc/strncpy.o
+LOAD out/BSP_Common/libc/strnlen.o
+LOAD out/BSP_Common/libc/strntoimax.o
+LOAD out/BSP_Common/libc/strntoumax.o
+LOAD out/BSP_Common/libc/strpbrk.o
+LOAD out/BSP_Common/libc/strrchr.o
+LOAD out/BSP_Common/libc/strsep.o
+LOAD out/BSP_Common/libc/strspn.o
+LOAD out/BSP_Common/libc/strstr.o
+LOAD out/BSP_Common/libc/strtoimax.o
+LOAD out/BSP_Common/libc/strtok.o
+LOAD out/BSP_Common/libc/strtok_r.o
+LOAD out/BSP_Common/libc/strtol.o
+LOAD out/BSP_Common/libc/strtoll.o
+LOAD out/BSP_Common/libc/strtoul.o
+LOAD out/BSP_Common/libc/strtoull.o
+LOAD out/BSP_Common/libc/strtoumax.o
+LOAD out/BSP_Common/libc/strxspn.o
+LOAD out/BSP_Common/libc/vsnprintf.o
+LOAD out/BSP_Common/libc/vsprintf.o
+LOAD out/BSP_Common/libc/vsscanf.o
+LOAD out/BSP_Common/partition/partition.o
+LOAD out/BSP_Common/ring_buffer/ring_buffer.o
+LOAD out/BSP_Common/soft_crc/softcrc.o
+LOAD out/BSP_Common/xz/xz_crc32.o
+LOAD out/BSP_Common/xz/xz_dec_lzma2.o
+LOAD out/BSP_Common/xz/xz_dec_stream.o
+LOAD out/BSP_Common/xz/xz_decompress.o
+LOAD out/BSP_Common/xz/xz_port.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_calib_data.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_acomp.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_aon.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pds.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sdu.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_dbg.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_tzc_sec.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_gpio.o
+LOAD out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+LOAD out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+LOAD out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+LOAD out/Examples/BLSP_Boot2/blsp_boot2.o
+LOAD out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+LOAD out/Examples/BLSP_Boot2/blsp_boot_parser.o
+LOAD out/Examples/BLSP_Boot2/blsp_common.o
+LOAD out/Examples/BLSP_Boot2/blsp_media_boot.o
+LOAD out/Examples/BLSP_Boot2/blsp_port.o
+LOAD out/startup/GCC/entry.o
+LOAD out/startup/GCC/start_load.o
+LOAD out/startup/interrupt.o
+LOAD out/startup/system_bl602.o
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libc.a
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libm.a
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a
+START GROUP
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libc.a
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libgloss.a
+END GROUP
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libc.a
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a
+                0x0000000000000400                StackSize = 0x400
+                0x0000000000000000                PROVIDE (__metal_chicken_bit = 0x0)
+
+.text           0x0000000023000000     0x8e98
+                0x0000000023000000                . = ALIGN (0x4)
+                0x0000000023000000                __text_code_start__ = .
+ *(.text.metal.init.enter)
+ .text.metal.init.enter
+                0x0000000023000000       0x86 out/startup/GCC/entry.o
+                0x0000000023000000                _enter
+ *(SORT_NONE(.init))
+ *fill*         0x0000000023000086       0x3a 
+ .init          0x00000000230000c0      0x142 out/startup/interrupt.o
+                0x00000000230000c0                __Vectors
+ *(.text)
+ .text          0x0000000023000202       0xd0 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libc.a(lib_a-memmove-stub.o)
+                0x0000000023000202                memmove
+ .text          0x00000000230002d2      0x35e /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_udivdi3.o)
+                0x00000000230002d2                __udivdi3
+ .text          0x0000000023000630      0x352 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_umoddi3.o)
+                0x0000000023000630                __umoddi3
+ *(.text.*)
+ .text.bflb_ecc_basic_parameter_init.isra.0
+                0x0000000023000982       0x48 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .text.bflb_ecc_point_mul_init.isra.1
+                0x00000000230009ca       0xc0 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .text.bflb_ecdsa_point_add.isra.4
+                0x0000000023000a8a      0x1f0 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .text.bflb_ecdsa_verify_point_mul.isra.5
+                0x0000000023000c7a      0x362 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .text.bflb_ecdsa_init
+                0x0000000023000fdc       0x28 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x0000000023000fdc                bflb_ecdsa_init
+ .text.bflb_ecdsa_verify
+                0x0000000023001004      0x4ca out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x0000000023001004                bflb_ecdsa_verify
+ .text.memcmp   0x00000000230014ce       0x1e out/BSP_Common/libc/memcmp.o
+                0x00000000230014ce                memcmp
+ .text.memcpy   0x00000000230014ec       0x18 out/BSP_Common/libc/memcpy.o
+                0x00000000230014ec                memcpy
+ .text.memset   0x0000000023001504       0x18 out/BSP_Common/libc/memset.o
+                0x0000000023001504                memset
+ .text.strlen   0x000000002300151c       0x1a out/BSP_Common/libc/strlen.o
+                0x000000002300151c                strlen
+ .text.vsnprintf
+                0x0000000023001536      0xae4 out/BSP_Common/libc/vsnprintf.o
+                0x0000000023001536                vsnprintf
+ .text.pPtTable_Flash_Read_Fast
+                0x000000002300201a       0x5a out/BSP_Common/partition/partition.o
+ .text.PtTable_Valid
+                0x0000000023002074       0x6c out/BSP_Common/partition/partition.o
+ .text.PtTable_Set_Flash_Operation
+                0x00000000230020e0       0x2e out/BSP_Common/partition/partition.o
+                0x00000000230020e0                PtTable_Set_Flash_Operation
+ .text.PtTable_Get_Active_Partition_Need_Lock
+                0x000000002300210e       0x84 out/BSP_Common/partition/partition.o
+                0x000000002300210e                PtTable_Get_Active_Partition_Need_Lock
+ .text.PtTable_Get_Active_Entries_By_ID
+                0x0000000023002192       0x64 out/BSP_Common/partition/partition.o
+                0x0000000023002192                PtTable_Get_Active_Entries_By_ID
+ .text.PtTable_Get_Active_Entries_By_Name
+                0x00000000230021f6       0x94 out/BSP_Common/partition/partition.o
+                0x00000000230021f6                PtTable_Get_Active_Entries_By_Name
+ .text.PtTable_Update_Entry
+                0x000000002300228a      0x128 out/BSP_Common/partition/partition.o
+                0x000000002300228a                PtTable_Update_Entry
+ .text.Ring_Buffer_Init
+                0x00000000230023b2       0x1c out/BSP_Common/ring_buffer/ring_buffer.o
+                0x00000000230023b2                Ring_Buffer_Init
+ .text.Ring_Buffer_Get_Length
+                0x00000000230023ce       0x4a out/BSP_Common/ring_buffer/ring_buffer.o
+                0x00000000230023ce                Ring_Buffer_Get_Length
+ .text.Ring_Buffer_Write_Callback
+                0x0000000023002418       0xac out/BSP_Common/ring_buffer/ring_buffer.o
+                0x0000000023002418                Ring_Buffer_Write_Callback
+ .text.Ring_Buffer_Get_Empty_Length
+                0x00000000230024c4       0x16 out/BSP_Common/ring_buffer/ring_buffer.o
+                0x00000000230024c4                Ring_Buffer_Get_Empty_Length
+ .text.xz_crc32_init
+                0x00000000230024da        0x2 out/BSP_Common/xz/xz_crc32.o
+                0x00000000230024da                xz_crc32_init
+ .text.xz_crc32
+                0x00000000230024dc       0x34 out/BSP_Common/xz/xz_crc32.o
+                0x00000000230024dc                xz_crc32
+ .text.lzma_len
+                0x0000000023002510      0x17c out/BSP_Common/xz/xz_dec_lzma2.o
+ .text.dict_repeat.part.1
+                0x000000002300268c       0x64 out/BSP_Common/xz/xz_dec_lzma2.o
+ .text.lzma_main
+                0x00000000230026f0      0x74a out/BSP_Common/xz/xz_dec_lzma2.o
+ .text.xz_dec_lzma2_run
+                0x0000000023002e3a      0x612 out/BSP_Common/xz/xz_dec_lzma2.o
+                0x0000000023002e3a                xz_dec_lzma2_run
+ .text.xz_dec_lzma2_create
+                0x000000002300344c       0x68 out/BSP_Common/xz/xz_dec_lzma2.o
+                0x000000002300344c                xz_dec_lzma2_create
+ .text.xz_dec_lzma2_reset
+                0x00000000230034b4       0x78 out/BSP_Common/xz/xz_dec_lzma2.o
+                0x00000000230034b4                xz_dec_lzma2_reset
+ .text.xz_dec_lzma2_end
+                0x000000002300352c       0x2c out/BSP_Common/xz/xz_dec_lzma2.o
+                0x000000002300352c                xz_dec_lzma2_end
+ .text.fill_temp
+                0x0000000023003558       0x72 out/BSP_Common/xz/xz_dec_stream.o
+ .text.dec_vli.isra.0
+                0x00000000230035ca       0x9a out/BSP_Common/xz/xz_dec_stream.o
+ .text.index_update.isra.2
+                0x0000000023003664       0x36 out/BSP_Common/xz/xz_dec_stream.o
+ .text.xz_dec_reset
+                0x000000002300369a       0x46 out/BSP_Common/xz/xz_dec_stream.o
+                0x000000002300369a                xz_dec_reset
+ .text.xz_dec_run
+                0x00000000230036e0      0x78e out/BSP_Common/xz/xz_dec_stream.o
+                0x00000000230036e0                xz_dec_run
+ .text.xz_dec_init
+                0x0000000023003e6e       0x46 out/BSP_Common/xz/xz_dec_stream.o
+                0x0000000023003e6e                xz_dec_init
+ .text.xz_dec_end
+                0x0000000023003eb4       0x1e out/BSP_Common/xz/xz_dec_stream.o
+                0x0000000023003eb4                xz_dec_end
+ .text.simple_malloc_init
+                0x0000000023003ed2       0x1a out/BSP_Common/xz/xz_port.o
+                0x0000000023003ed2                simple_malloc_init
+ .text.simple_malloc
+                0x0000000023003eec       0x44 out/BSP_Common/xz/xz_port.o
+                0x0000000023003eec                simple_malloc
+ .text.simple_free
+                0x0000000023003f30        0xe out/BSP_Common/xz/xz_port.o
+                0x0000000023003f30                simple_free
+ .text.Trap_Handler
+                0x0000000023003f3e      0x126 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+                0x0000000023003f3e                Trap_Handler
+ .text.Interrupt_Handler_Register
+                0x0000000023004064       0x18 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+                0x0000000023004064                Interrupt_Handler_Register
+ .text.Interrupt_Handler
+                0x000000002300407c       0x9e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+                0x000000002300407c                Interrupt_Handler
+ .text.EF_Ctrl_Read_Secure_Boot
+                0x000000002300411a       0x40 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                0x000000002300411a                EF_Ctrl_Read_Secure_Boot
+ .text.EF_Ctrl_Read_Sw_Usage
+                0x000000002300415a       0x30 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                0x000000002300415a                EF_Ctrl_Read_Sw_Usage
+ .text.EF_Ctrl_Read_MAC_Address
+                0x000000002300418a       0xba out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                0x000000002300418a                EF_Ctrl_Read_MAC_Address
+ .text.EF_Ctrl_Read_Chip_ID
+                0x0000000023004244        0xa out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                0x0000000023004244                EF_Ctrl_Read_Chip_ID
+ .text.EF_Ctrl_Read_AES_Key
+                0x000000002300424e       0x40 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                0x000000002300424e                EF_Ctrl_Read_AES_Key
+ .text.GLB_Set_UART_CLK
+                0x000000002300428e       0x3e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                0x000000002300428e                GLB_Set_UART_CLK
+ .text.GLB_AHB_Slave1_Reset
+                0x00000000230042cc       0x34 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                0x00000000230042cc                GLB_AHB_Slave1_Reset
+ .text.GLB_Set_EM_Sel
+                0x0000000023004300       0x10 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                0x0000000023004300                GLB_Set_EM_Sel
+ .text.GLB_Set_MTimer_CLK
+                0x0000000023004310       0x4a out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                0x0000000023004310                GLB_Set_MTimer_CLK
+ .text.GLB_UART_Fun_Sel
+                0x000000002300435a       0x24 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                0x000000002300435a                GLB_UART_Fun_Sel
+ .text.GLB_GPIO_Write
+                0x000000002300437e       0x2e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                0x000000002300437e                GLB_GPIO_Write
+ .text.HBN_Set_UART_CLK_Sel
+                0x00000000230043ac       0x14 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+                0x00000000230043ac                HBN_Set_UART_CLK_Sel
+ .text.HBN_Get_Status_Flag
+                0x00000000230043c0        0xa out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+                0x00000000230043c0                HBN_Get_Status_Flag
+ .text.HBN_Set_BOR_Cfg
+                0x00000000230043ca       0x5c out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+                0x00000000230043ca                HBN_Set_BOR_Cfg
+ .text.Sec_Eng_SHA256_Update.part.0
+                0x0000000023004426      0x184 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+ .text.Sec_Eng_PKA_MREM.part.3
+                0x00000000230045aa       0x1e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+ .text.Sec_Eng_SHA256_Init
+                0x00000000230045c8       0x5a out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x00000000230045c8                Sec_Eng_SHA256_Init
+ .text.Sec_Eng_SHA_Start
+                0x0000000023004622       0x12 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x0000000023004622                Sec_Eng_SHA_Start
+ .text.Sec_Eng_SHA256_Update
+                0x0000000023004634        0xc out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x0000000023004634                Sec_Eng_SHA256_Update
+ .text.Sec_Eng_SHA256_Finish
+                0x0000000023004640      0x22a out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x0000000023004640                Sec_Eng_SHA256_Finish
+ .text.Sec_Eng_Trng_Enable
+                0x000000002300486a       0x54 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x000000002300486a                Sec_Eng_Trng_Enable
+ .text.Sec_Eng_Trng_Disable
+                0x00000000230048be       0x14 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x00000000230048be                Sec_Eng_Trng_Disable
+ .text.Sec_Eng_PKA_Reset
+                0x00000000230048d2       0x10 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x00000000230048d2                Sec_Eng_PKA_Reset
+ .text.Sec_Eng_PKA_BigEndian_Enable
+                0x00000000230048e2       0x12 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x00000000230048e2                Sec_Eng_PKA_BigEndian_Enable
+ .text.Sec_Eng_PKA_Write_Data
+                0x00000000230048f4       0xc2 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x00000000230048f4                Sec_Eng_PKA_Write_Data
+ .text.Sec_Eng_PKA_Read_Data
+                0x00000000230049b6       0xc2 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x00000000230049b6                Sec_Eng_PKA_Read_Data
+ .text.Sec_Eng_PKA_CREG
+                0x0000000023004a78       0x64 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x0000000023004a78                Sec_Eng_PKA_CREG
+ .text.Sec_Eng_PKA_Move_Data
+                0x0000000023004adc       0x6a out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x0000000023004adc                Sec_Eng_PKA_Move_Data
+ .text.Sec_Eng_PKA_MSUB
+                0x0000000023004b46       0x9e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x0000000023004b46                Sec_Eng_PKA_MSUB
+ .text.Sec_Eng_PKA_MREM
+                0x0000000023004be4       0x66 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x0000000023004be4                Sec_Eng_PKA_MREM
+ .text.Sec_Eng_PKA_MMUL
+                0x0000000023004c4a       0x9e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x0000000023004c4a                Sec_Eng_PKA_MMUL
+ .text.Sec_Eng_PKA_MINV
+                0x0000000023004ce8       0x80 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x0000000023004ce8                Sec_Eng_PKA_MINV
+ .text.Sec_Eng_PKA_LCMP
+                0x0000000023004d68       0x6a out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x0000000023004d68                Sec_Eng_PKA_LCMP
+ .text.Sec_Eng_PKA_LMUL
+                0x0000000023004dd2       0x64 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x0000000023004dd2                Sec_Eng_PKA_LMUL
+ .text.Sec_Eng_PKA_GF2Mont
+                0x0000000023004e36       0x42 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x0000000023004e36                Sec_Eng_PKA_GF2Mont
+ .text.Sec_Eng_PKA_Mont2GF
+                0x0000000023004e78       0x5a out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x0000000023004e78                Sec_Eng_PKA_Mont2GF
+ .text.UART_IntHandler
+                0x0000000023004ed2      0x152 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+ .text.UART0_IRQHandler
+                0x0000000023005024        0x4 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x0000000023005024                UART0_IRQHandler
+ .text.UART1_IRQHandler
+                0x0000000023005028        0x4 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x0000000023005028                UART1_IRQHandler
+ .text.UART_Init
+                0x000000002300502c      0x11e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x000000002300502c                UART_Init
+ .text.UART_FifoConfig
+                0x000000002300514a       0x6a out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x000000002300514a                UART_FifoConfig
+ .text.UART_Enable
+                0x00000000230051b4       0x34 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x00000000230051b4                UART_Enable
+ .text.UART_Disable
+                0x00000000230051e8       0x30 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x00000000230051e8                UART_Disable
+ .text.UART_SetRxTimeoutValue
+                0x0000000023005218       0x1e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x0000000023005218                UART_SetRxTimeoutValue
+ .text.UART_TxFreeRun
+                0x0000000023005236       0x28 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x0000000023005236                UART_TxFreeRun
+ .text.UART_AutoBaudDetection
+                0x000000002300525e       0x28 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x000000002300525e                UART_AutoBaudDetection
+ .text.UART_IntMask
+                0x0000000023005286       0x48 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x0000000023005286                UART_IntMask
+ .text.UART_Int_Callback_Install
+                0x00000000230052ce       0x12 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x00000000230052ce                UART_Int_Callback_Install
+ .text.UART_SendData
+                0x00000000230052e0       0x50 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x00000000230052e0                UART_SendData
+ .text.UART_ReceiveData
+                0x0000000023005330       0x4e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x0000000023005330                UART_ReceiveData
+ .text.UART_GetRxFifoCount
+                0x000000002300537e       0x1a out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x000000002300537e                UART_GetRxFifoCount
+ .text.UART_GetTxBusBusyStatus
+                0x0000000023005398       0x14 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x0000000023005398                UART_GetTxBusBusyStatus
+ .text.bflb_platform_uart_dbg_init
+                0x00000000230053ac      0x104 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x00000000230053ac                bflb_platform_uart_dbg_init
+ .text.bflb_platform_uart_dbg_deinit
+                0x00000000230054b0       0x4c out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x00000000230054b0                bflb_platform_uart_dbg_deinit
+ .text.bflb_platform_printf
+                0x00000000230054fc       0x5c out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x00000000230054fc                bflb_platform_printf
+ .text.UART_RTO_Cbf.part.0
+                0x0000000023005558       0x32 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+ .text.UART_RFR_Cbf
+                0x000000002300558a       0x52 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+ .text.UART_RTO_Cbf
+                0x00000000230055dc       0x52 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+ .text.bflb_platform_clear_time
+                0x000000002300562e       0x12 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x000000002300562e                bflb_platform_clear_time
+ .text.bflb_platform_get_time_ms
+                0x0000000023005640       0x8c out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x0000000023005640                bflb_platform_get_time_ms
+ .text.bflb_platform_init_time
+                0x00000000230056cc       0x2a out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x00000000230056cc                bflb_platform_init_time
+ .text.bflb_platform_deinit_time
+                0x00000000230056f6        0x6 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x00000000230056f6                bflb_platform_deinit_time
+ .text.bflb_platform_delay_ms
+                0x00000000230056fc       0x64 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x00000000230056fc                bflb_platform_delay_ms
+ .text.bflb_platform_init
+                0x0000000023005760       0x5c out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x0000000023005760                bflb_platform_init
+ .text.bflb_platform_deinit
+                0x00000000230057bc       0x42 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x00000000230057bc                bflb_platform_deinit
+ .text.bflb_platform_print_set
+                0x00000000230057fe        0xa out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x00000000230057fe                bflb_platform_print_set
+ .text.bflb_plat_uart_debug_port_set
+                0x0000000023005808       0x2e out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x0000000023005808                bflb_plat_uart_debug_port_set
+ .text.bflb_bootrom_cmd_get_bootinfo
+                0x0000000023005836       0x3c out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+ .text.bflb_bootrom_cmd_ack.part.1
+                0x0000000023005872       0x14 out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+ .text.bflb_bootrom_cmd_ack
+                0x0000000023005886       0x1c out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+ .text.bflb_bootrom_cmd_load_segdata
+                0x00000000230058a2       0xe4 out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+ .text.bflb_bootrom_cmd_check_img
+                0x0000000023005986       0x42 out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+ .text.bflb_bootrom_cmd_run
+                0x00000000230059c8       0x9c out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+ .text.bflb_bootrom_parse_bootheader
+                0x0000000023005a64      0x1a4 out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+                0x0000000023005a64                bflb_bootrom_parse_bootheader
+ .text.bflb_bootrom_cmd_load_bootheader
+                0x0000000023005c08       0x5a out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+ .text.bflb_bootrom_parse_seg_header
+                0x0000000023005c62       0x5a out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+                0x0000000023005c62                bflb_bootrom_parse_seg_header
+ .text.bflb_bootrom_cmd_load_segheader
+                0x0000000023005cbc       0xa0 out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_init
+                0x0000000023005d5c        0x2 out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+                0x0000000023005d5c                bflb_eflash_loader_cmd_init
+ .text.bflb_eflash_loader_cmd_process
+                0x0000000023005d5e       0x72 out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+                0x0000000023005d5e                bflb_eflash_loader_cmd_process
+ .text.bflb_eflash_loader_init_uart_gpio
+                0x0000000023005dd0       0x44 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+                0x0000000023005dd0                bflb_eflash_loader_init_uart_gpio
+ .text.bflb_eflash_loader_usart_if_init
+                0x0000000023005e14       0xb2 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+ .text.uart_if_rto_cbf
+                0x0000000023005ec6       0x4a out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+ .text.uart_if_rda_cbf
+                0x0000000023005f10        0x2 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+ .text.bflb_eflash_loader_usart_if_receive.isra.0
+                0x0000000023005f12       0xa2 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+ .text.bflb_eflash_loader_usart_if_wait_tx_idle
+                0x0000000023005fb4       0x10 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                0x0000000023005fb4                bflb_eflash_loader_usart_if_wait_tx_idle
+ .text.bflb_eflash_loader_uart_init
+                0x0000000023005fc4       0x36 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                0x0000000023005fc4                bflb_eflash_loader_uart_init
+ .text.bflb_eflash_loader_uart_handshake_poll
+                0x0000000023005ffa       0xd4 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                0x0000000023005ffa                bflb_eflash_loader_uart_handshake_poll
+ .text.bflb_eflash_loader_uart_send
+                0x00000000230060ce       0x16 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                0x00000000230060ce                bflb_eflash_loader_uart_send
+ .text.bflb_eflash_loader_main
+                0x00000000230060e4       0xf8 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                0x00000000230060e4                bflb_eflash_loader_main
+ .text.PtTable_Flash_Read
+                0x00000000230061dc       0x22 out/Examples/BLSP_Boot2/blsp_boot2.o
+ .text.PtTable_Flash_Write
+                0x00000000230061fe       0x22 out/Examples/BLSP_Boot2/blsp_boot2.o
+ .text.PtTable_Flash_Erase
+                0x0000000023006220       0x20 out/Examples/BLSP_Boot2/blsp_boot2.o
+ .text.BLSP_Boot2_Deal_One_FW
+                0x0000000023006240      0x20a out/Examples/BLSP_Boot2/blsp_boot2.o
+ .text.startup.main
+                0x000000002300644a      0x552 out/Examples/BLSP_Boot2/blsp_boot2.o
+                0x000000002300644a                main
+ .text.BLSP_Boot2_Fw_Decompress
+                0x000000002300699c      0x204 out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+ .text.BLSP_Boot2_Update_Fw
+                0x0000000023006ba0       0xce out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+                0x0000000023006ba0                BLSP_Boot2_Update_Fw
+ .text.BLSP_Boot2_Verify_XZ_Header
+                0x0000000023006c6e       0x34 out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+                0x0000000023006c6e                BLSP_Boot2_Verify_XZ_Header
+ .text.BLSP_Boot_Parse_BootHeader
+                0x0000000023006ca2      0x24a out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                0x0000000023006ca2                BLSP_Boot_Parse_BootHeader
+ .text.BLSP_Boot_Parse_PKey
+                0x0000000023006eec      0x118 out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                0x0000000023006eec                BLSP_Boot_Parse_PKey
+ .text.BLSP_Boot_Parse_Signature
+                0x0000000023007004       0xd4 out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                0x0000000023007004                BLSP_Boot_Parse_Signature
+ .text.BLSP_Boot_Parse_AesIv
+                0x00000000230070d8       0x82 out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                0x00000000230070d8                BLSP_Boot_Parse_AesIv
+ .text.BLSP_Boot_Parser_Check_Signature
+                0x000000002300715a       0xb2 out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                0x000000002300715a                BLSP_Boot_Parser_Check_Signature
+ .text.BLSP_Boot_Parser_Check_Hash
+                0x000000002300720c       0x7c out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                0x000000002300720c                BLSP_Boot_Parser_Check_Hash
+ .text.BLSP_Dump_Data
+                0x0000000023007288       0x60 out/Examples/BLSP_Boot2/blsp_common.o
+                0x0000000023007288                BLSP_Dump_Data
+ .text.BLSP_MediaBoot_Pre_Jump
+                0x00000000230072e8       0x1a out/Examples/BLSP_Boot2/blsp_common.o
+                0x00000000230072e8                BLSP_MediaBoot_Pre_Jump
+ .text.BLSP_MediaBoot_Main
+                0x0000000023007302      0x464 out/Examples/BLSP_Boot2/blsp_media_boot.o
+                0x0000000023007302                BLSP_MediaBoot_Main
+ .text.BLSP_Boot2_Disable_Other_Cache
+                0x0000000023007766        0x2 out/Examples/BLSP_Boot2/blsp_port.o
+                0x0000000023007766                BLSP_Boot2_Disable_Other_Cache
+ .text.BLSP_Boot2_Flush_XIP_Cache
+                0x0000000023007768        0x8 out/Examples/BLSP_Boot2/blsp_port.o
+                0x0000000023007768                BLSP_Boot2_Flush_XIP_Cache
+ .text.BLSP_Boot2_Show_Timer
+                0x0000000023007770       0x1a out/Examples/BLSP_Boot2/blsp_port.o
+                0x0000000023007770                BLSP_Boot2_Show_Timer
+ .text.BLSP_Boot2_Reset_Sec_Eng
+                0x000000002300778a        0x6 out/Examples/BLSP_Boot2/blsp_port.o
+                0x000000002300778a                BLSP_Boot2_Reset_Sec_Eng
+ .text.BLSP_Boot2_Get_CPU_Count
+                0x0000000023007790        0x4 out/Examples/BLSP_Boot2/blsp_port.o
+                0x0000000023007790                BLSP_Boot2_Get_CPU_Count
+ .text.BLSP_Read_Power_Save_Mode
+                0x0000000023007794       0x1c out/Examples/BLSP_Boot2/blsp_port.o
+                0x0000000023007794                BLSP_Read_Power_Save_Mode
+ .text.BLSP_Boot2_Pass_Parameter
+                0x00000000230077b0       0x52 out/Examples/BLSP_Boot2/blsp_port.o
+                0x00000000230077b0                BLSP_Boot2_Pass_Parameter
+ .text.BLSP_Get_User_Specified_Fw
+                0x0000000023007802        0xa out/Examples/BLSP_Boot2/blsp_port.o
+                0x0000000023007802                BLSP_Get_User_Specified_Fw
+ .text.BLSP_Clr_User_Specified_Fw
+                0x000000002300780c        0xa out/Examples/BLSP_Boot2/blsp_port.o
+                0x000000002300780c                BLSP_Clr_User_Specified_Fw
+ .text.BLSP_Is_MSP_Valid
+                0x0000000023007816       0x2a out/Examples/BLSP_Boot2/blsp_port.o
+                0x0000000023007816                BLSP_Is_MSP_Valid
+ .text.BLSP_Is_PC_Valid
+                0x0000000023007840       0x3c out/Examples/BLSP_Boot2/blsp_port.o
+                0x0000000023007840                BLSP_Is_PC_Valid
+ .text.BLSP_Fix_Invalid_MSP_PC
+                0x000000002300787c       0x4a out/Examples/BLSP_Boot2/blsp_port.o
+                0x000000002300787c                BLSP_Fix_Invalid_MSP_PC
+ .text.bflb_platform_init_uart_debug_gpio
+                0x00000000230078c6       0x42 out/Examples/BLSP_Boot2/blsp_port.o
+                0x00000000230078c6                bflb_platform_init_uart_debug_gpio
+ .text.bflb_platform_deinit_uart_debug_gpio
+                0x0000000023007908       0x48 out/Examples/BLSP_Boot2/blsp_port.o
+                0x0000000023007908                bflb_platform_deinit_uart_debug_gpio
+ .text.BLSP_Boot2_init_gpio_for_bootrom
+                0x0000000023007950       0x48 out/Examples/BLSP_Boot2/blsp_port.o
+                0x0000000023007950                BLSP_Boot2_init_gpio_for_bootrom
+ .text.start_load
+                0x0000000023007998      0x12a out/startup/GCC/start_load.o
+                0x0000000023007998                start_load
+ .text.Interrupt_Handler_Stub
+                0x0000000023007ac2       0x9c out/startup/interrupt.o
+                0x0000000023007ac2                SDIO_IRQHandler_Wrapper
+                0x0000000023007ac2                TIMER_WDT_IRQHandler_Wrapper
+                0x0000000023007ac2                GPIO_INT0_IRQHandler_Wrapper
+                0x0000000023007ac2                SEC_PKA_IRQHandler_Wrapper
+                0x0000000023007ac2                SEC_TRNG_IRQHandler_Wrapper
+                0x0000000023007ac2                MAC_GEN_IRQHandler_Wrapper
+                0x0000000023007ac2                DMA_BMX_ERR_IRQHandler_Wrapper
+                0x0000000023007ac2                EFUSE_IRQHandler_Wrapper
+                0x0000000023007ac2                WIFI_IRQHandler_Wrapper
+                0x0000000023007ac2                SEC_CDET_IRQHandler_Wrapper
+                0x0000000023007ac2                SEC_AES_IRQHandler_Wrapper
+                0x0000000023007ac2                PWM_IRQHandler_Wrapper
+                0x0000000023007ac2                RF_TOP_INT1_IRQHandler_Wrapper
+                0x0000000023007ac2                HBN_OUT0_IRQHandler_Wrapper
+                0x0000000023007ac2                SF_CTRL_IRQHandler_Wrapper
+                0x0000000023007ac2                TIMER_CH0_IRQHandler_Wrapper
+                0x0000000023007ac2                clic_mext_handler_Wrapper
+                0x0000000023007ac2                MAC_TXRX_TIMER_IRQHandler_Wrapper
+                0x0000000023007ac2                Interrupt_Handler_Stub
+                0x0000000023007ac2                clic_csoft_handler_Wrapper
+                0x0000000023007ac2                I2C_IRQHandler_Wrapper
+                0x0000000023007ac2                SPI_IRQHandler_Wrapper
+                0x0000000023007ac2                MAC_PORT_TRG_IRQHandler_Wrapper
+                0x0000000023007ac2                PDS_WAKEUP_IRQHandler_Wrapper
+                0x0000000023007ac2                clic_mtimer_handler_Wrapper
+                0x0000000023007ac2                L1C_BMX_ERR_IRQHandler_Wrapper
+                0x0000000023007ac2                SEC_BMX_ERR_IRQHandler_Wrapper
+                0x0000000023007ac2                MAC_RX_TRG_IRQHandler_Wrapper
+                0x0000000023007ac2                MAC_TX_TRG_IRQHandler_Wrapper
+                0x0000000023007ac2                HBN_OUT1_IRQHandler_Wrapper
+                0x0000000023007ac2                SEC_GMAC_IRQHandler_Wrapper
+                0x0000000023007ac2                clic_msip_handler_Wrapper
+                0x0000000023007ac2                UART1_IRQHandler_Wrapper
+                0x0000000023007ac2                GPADC_DMA_IRQHandler_Wrapper
+                0x0000000023007ac2                MAC_TXRX_MISC_IRQHandler_Wrapper
+                0x0000000023007ac2                DMA_ALL_IRQHandler_Wrapper
+                0x0000000023007ac2                BLE_IRQHandler_Wrapper
+                0x0000000023007ac2                SEC_SHA_IRQHandler_Wrapper
+                0x0000000023007ac2                IRRX_IRQHandler_Wrapper
+                0x0000000023007ac2                BMX_TO_IRQHandler_Wrapper
+                0x0000000023007ac2                TIMER_CH1_IRQHandler_Wrapper
+                0x0000000023007ac2                UART0_IRQHandler_Wrapper
+                0x0000000023007ac2                BMX_ERR_IRQHandler_Wrapper
+                0x0000000023007ac2                WIFI_IPC_PUBLIC_IRQHandler_Wrapper
+                0x0000000023007ac2                L1C_BMX_TO_IRQHandler_Wrapper
+                0x0000000023007ac2                BZ_PHY_IRQHandler_Wrapper
+                0x0000000023007ac2                RF_TOP_INT0_IRQHandler_Wrapper
+                0x0000000023007ac2                IRTX_IRQHandler_Wrapper
+                0x0000000023007ac2                BOR_IRQHandler_Wrapper
+ *fill*         0x0000000023007b5e       0x22 
+ .text.Trap_Handler_Stub
+                0x0000000023007b80       0xbe out/startup/interrupt.o
+                0x0000000023007b80                Trap_Handler_Stub
+ .text.clic_enable_interrupt
+                0x0000000023007c3e       0x12 out/startup/interrupt.o
+                0x0000000023007c3e                clic_enable_interrupt
+ .text.clic_disable_interrupt
+                0x0000000023007c50       0x10 out/startup/interrupt.o
+                0x0000000023007c50                clic_disable_interrupt
+ .text.SystemInit
+                0x0000000023007c60       0xac out/startup/system_bl602.o
+                0x0000000023007c60                SystemInit
+ *(.rodata)
+ *fill*         0x0000000023007d0c        0x0 
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+                0x0000000023007d24                __clz_tab
+ *(.rodata.*)
+ .rodata.bflb_ecdsa_verify_point_mul.isra.5.str1.4
+                0x0000000023007e24       0x35 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ *fill*         0x0000000023007e59        0x3 
+ .rodata.secp256r1InvR_N
+                0x0000000023007e5c       0x20 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x0000000023007e5c                secp256r1InvR_N
+ .rodata.secp256r1InvR_P
+                0x0000000023007e7c       0x20 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x0000000023007e7c                secp256r1InvR_P
+ .rodata.secp256r1N
+                0x0000000023007e9c       0x20 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x0000000023007e9c                secp256r1N
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+                0x0000000023007ebc       0x20 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x0000000023007ebc                secp256r1P
+ .rodata.secp256r1PrimeN_N
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+                0x0000000023007edc                secp256r1PrimeN_N
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+                0x0000000023007efc       0x20 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x0000000023007efc                secp256r1PrimeN_P
+ .rodata.secp256r1_1
+                0x0000000023007f1c       0x20 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x0000000023007f1c                secp256r1_1
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+                0x0000000023007f3c                secp256r1_1M1
+ .rodata.secp256r1_1P1
+                0x0000000023007f5c       0x20 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x0000000023007f5c                secp256r1_1P1
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+                0x0000000023007f7c       0x20 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x0000000023007f7c                secp256r1_BAR2
+ .rodata.secp256r1_BAR3
+                0x0000000023007f9c       0x20 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x0000000023007f9c                secp256r1_BAR3
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+                0x0000000023007fbc       0x20 out/BSP_Common/cipher_suite/bflb_ecdsa.o
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+                0x0000000023007fdc       0x20 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x0000000023007fdc                secp256r1_BAR8
+ .rodata.secp256r1_Gx
+                0x0000000023007ffc       0x20 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x0000000023007ffc                secp256r1_Gx
+ .rodata.secp256r1_Gy
+                0x000000002300801c       0x20 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x000000002300801c                secp256r1_Gy
+ .rodata.secp256r1_Zerox
+                0x000000002300803c       0x20 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x000000002300803c                secp256r1_Zerox
+ .rodata.secp256r1_Zeroy
+                0x000000002300805c       0x20 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x000000002300805c                secp256r1_Zeroy
+ .rodata.lcdigits.1541
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+ .rodata.ucdigits.1542
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+ *fill*         0x00000000230080a1        0x3 
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+                0x00000000230080a4        0x7 out/BSP_Common/libc/vsnprintf.o
+ *fill*         0x00000000230080ab        0x1 
+ .rodata.crc32Tab
+                0x00000000230080ac      0x400 out/BSP_Common/soft_crc/softcrc.o
+                0x00000000230080ac                crc32Tab
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+ *fill*         0x00000000230084b7        0x1 
+ .rodata.simple_free.str1.4
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+ *fill*         0x00000000230084cb        0x1 
+ .rodata.simple_malloc.str1.4
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+                0x00000000230084e0       0x8a out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+ *fill*         0x000000002300856a        0x2 
+ .rodata.Trap_Handler.str1.4
+                0x000000002300856c      0x13b out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+ *fill*         0x00000000230086a7        0x1 
+ .rodata.CSWTCH.116
+                0x00000000230086a8       0x14 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+ .rodata.str1.4
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+ *fill*         0x00000000230086c1        0x3 
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+                0x00000000230086c4        0x8 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+ .rodata.UART_RTO_Cbf.part.0.str1.4
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+                0x0000000023008734       0x4a out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
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+ .rodata.eflash_loader_cmds
+                0x0000000023008780       0x30 out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
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+                0x00000000230087fc       0x49 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
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+                                        0x20a (size before relaxing)
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+                                         0x12 (size before relaxing)
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+ .srodata       0x0000000023008e94        0x4 out/startup/system_bl602.o
+ *(.srodata.*)
+                0x0000000023008e98                . = ALIGN (0x4)
+                0x0000000023008e98                __text_code_end__ = .
+                0x0000000023008e98                . = ALIGN (0x4)
+                0x0000000023008e98                __itcm_load_addr = .
+
+.itcm_region    0x000000002201c000     0x1880 load address 0x0000000023008e98
+                0x000000002201c000                . = ALIGN (0x4)
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+ *(.tcm_code)
+ .tcm_code      0x000000002201c000      0x1f2 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                0x000000002201c000                GLB_GPIO_Init
+                0x000000002201c130                GLB_GPIO_INPUT_Enable
+                0x000000002201c15a                GLB_GPIO_INPUT_Disable
+                0x000000002201c184                GLB_GPIO_Set_PullUp
+                0x000000002201c1bc                GLB_GPIO_Set_PullDown
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+                0x000000002201c1f2                AON_Power_On_BG
+                0x000000002201c1fc                AON_Power_Off_BG
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+                0x000000002201c210                AON_Power_Off_LDO11_SOC
+                0x000000002201c21a                AON_Power_On_LDO15_RF
+                0x000000002201c224                AON_Power_Off_LDO15_RF
+                0x000000002201c22e                AON_Power_On_SFReg
+                0x000000002201c238                AON_Power_Off_SFReg
+                0x000000002201c242                AON_LowPower_Enter_PDS0
+                0x000000002201c24c                AON_LowPower_Exit_PDS0
+                0x000000002201c256                ASM_Delay_Us
+                0x000000002201c260                BL602_Delay_US
+                0x000000002201c26a                BL602_Delay_MS
+                0x000000002201c274                BL602_MemCpy
+                0x000000002201c27e                BL602_MemCpy4
+                0x000000002201c288                BL602_MemCpy_Fast
+                0x000000002201c292                BL602_MemSet
+                0x000000002201c29c                BL602_MemSet4
+                0x000000002201c2a6                BL602_MemCmp
+                0x000000002201c2b0                EF_Ctrl_Sw_AHB_Clk_0
+                0x000000002201c2ba                EF_Ctrl_Program_Efuse_0
+                0x000000002201c2c4                EF_Ctrl_Load_Efuse_R0
+                0x000000002201c2ce                EF_Ctrl_Busy
+                0x000000002201c2d8                EF_Ctrl_AutoLoad_Done
+                0x000000002201c2e2                EF_Ctrl_Clear
+                0x000000002201c2ec                GLB_SW_System_Reset
+                0x000000002201c2f6                GLB_SW_CPU_Reset
+                0x000000002201c300                GLB_SW_POR_Reset
+                0x000000002201c30a                GLB_Select_Internal_Flash
+                0x000000002201c314                GLB_Select_External_Flash
+                0x000000002201c31e                GLB_Deswap_Flash_Pin
+                0x000000002201c328                GLB_Swap_Flash_Pin
+                0x000000002201c332                GLB_GPIO_OUTPUT_Enable
+                0x000000002201c33c                GLB_GPIO_OUTPUT_Disable
+                0x000000002201c346                GLB_GPIO_Set_HZ
+                0x000000002201c350                GLB_GPIO_Get_Fun
+                0x000000002201c35a                HBN_Power_Down_Flash
+                0x000000002201c364                HBN_Enable
+                0x000000002201c36e                HBN_Reset
+                0x000000002201c378                HBN_Set_Ldo11_Aon_Vout
+                0x000000002201c382                HBN_Set_Ldo11_Rt_Vout
+                0x000000002201c38c                HBN_Set_Ldo11_Soc_Vout
+                0x000000002201c396                HBN_Hw_Pu_Pd_Cfg
+                0x000000002201c3a0                HBN_Pin_WakeUp_Mask
+                0x000000002201c3aa                HBN_GPIO7_Dbg_Pull_Cfg
+                0x000000002201c3b4                HBN_Set_Embedded_Flash_Pullup
+                0x000000002201c3be                L1C_Set_Wrap
+                0x000000002201c3c8                L1C_Set_Way_Disable
+                0x000000002201c3d2                L1C_IROM_2T_Access_Set
+                0x000000002201c3dc                PDS_Reset
+                0x000000002201c3e6                PDS_Enable
+                0x000000002201c3f0                PDS_Force_Config
+                0x000000002201c3fa                PDS_RAM_Config
+                0x000000002201c404                PDS_Default_Level_Config
+                0x000000002201c40e                SEC_Eng_Turn_On_Sec_Ring
+                0x000000002201c418                SEC_Eng_Turn_Off_Sec_Ring
+                0x000000002201c422                SFlash_Init
+                0x000000002201c42c                SFlash_SetSPIMode
+                0x000000002201c436                SFlash_Read_Reg
+                0x000000002201c440                SFlash_Write_Reg
+                0x000000002201c44a                SFlash_Busy
+                0x000000002201c454                SFlash_Write_Enable
+                0x000000002201c45e                SFlash_Qspi_Enable
+                0x000000002201c468                SFlash_Volatile_Reg_Write_Enable
+                0x000000002201c472                SFlash_Chip_Erase
+                0x000000002201c47c                SFlash_Sector_Erase
+                0x000000002201c486                SFlash_Blk32_Erase
+                0x000000002201c490                SFlash_Blk64_Erase
+                0x000000002201c49a                SFlash_Erase
+                0x000000002201c4a4                SFlash_Program
+                0x000000002201c4ae                SFlash_GetUniqueId
+                0x000000002201c4b8                SFlash_GetJedecId
+                0x000000002201c4c2                SFlash_GetDeviceId
+                0x000000002201c4cc                SFlash_Powerdown
+                0x000000002201c4d6                SFlash_Releae_Powerdown
+                0x000000002201c4e0                SFlash_SetBurstWrap
+                0x000000002201c4ea                SFlash_DisableBurstWrap
+                0x000000002201c4f4                SFlash_Software_Reset
+                0x000000002201c4fe                SFlash_Reset_Continue_Read
+                0x000000002201c508                SFlash_Set_IDbus_Cfg
+                0x000000002201c512                SFlash_IDbus_Read_Enable
+                0x000000002201c51c                SFlash_Cache_Enable_Set
+                0x000000002201c526                SFlash_Cache_Flush
+                0x000000002201c530                SFlash_Cache_Read_Enable
+                0x000000002201c53a                SFlash_Cache_Hit_Count_Get
+                0x000000002201c544                SFlash_Cache_Miss_Count_Get
+                0x000000002201c54e                SFlash_Cache_Read_Disable
+                0x000000002201c558                SFlash_Read
+                0x000000002201c562                SFlash_Read_Reg_With_Cmd
+                0x000000002201c56c                SFlash_Write_Reg_With_Cmd
+                0x000000002201c576                SF_Cfg_Init_Ext_Flash_Gpio
+                0x000000002201c580                SF_Cfg_Init_Internal_Flash_Gpio
+                0x000000002201c58a                SF_Cfg_Deinit_Ext_Flash_Gpio
+                0x000000002201c594                SF_Cfg_Restore_GPIO17_Fun
+                0x000000002201c59e                SF_Cfg_Get_Flash_Cfg_Need_Lock
+                0x000000002201c5a8                SF_Cfg_Init_Flash_Gpio
+                0x000000002201c5b2                SF_Cfg_Flash_Identify
+                0x000000002201c5bc                SF_Ctrl_Enable
+                0x000000002201c5c6                SF_Ctrl_Select_Pad
+                0x000000002201c5d0                SF_Ctrl_Set_Owner
+                0x000000002201c5da                SF_Ctrl_Disable
+                0x000000002201c5e4                SF_Ctrl_AES_Enable_BE
+                0x000000002201c5ee                SF_Ctrl_AES_Enable_LE
+                0x000000002201c5f8                SF_Ctrl_AES_Set_Region
+                0x000000002201c602                SF_Ctrl_AES_Set_Key
+                0x000000002201c60c                SF_Ctrl_AES_Set_Key_BE
+                0x000000002201c616                SF_Ctrl_AES_Set_IV
+                0x000000002201c620                SF_Ctrl_AES_Set_IV_BE
+                0x000000002201c62a                SF_Ctrl_AES_Enable
+                0x000000002201c634                SF_Ctrl_AES_Disable
+                0x000000002201c63e                SF_Ctrl_Set_Flash_Image_Offset
+                0x000000002201c648                SF_Ctrl_Get_Flash_Image_Offset
+                0x000000002201c652                SF_Ctrl_Select_Clock
+                0x000000002201c65c                SF_Ctrl_SendCmd
+                0x000000002201c666                SF_Ctrl_Icache_Set
+                0x000000002201c670                SF_Ctrl_Icache2_Set
+                0x000000002201c67a                SF_Ctrl_GetBusyState
+                0x000000002201c684                SF_Ctrl_Is_AES_Enable
+                0x000000002201c68e                SF_Ctrl_Get_Clock_Delay
+                0x000000002201c698                SF_Ctrl_Set_Clock_Delay
+                0x000000002201c6a2                XIP_SFlash_State_Save
+                0x000000002201c6ac                XIP_SFlash_State_Restore
+                0x000000002201c6b6                XIP_SFlash_Erase_Need_Lock
+                0x000000002201c6c0                XIP_SFlash_Write_Need_Lock
+                0x000000002201c6ca                XIP_SFlash_Read_Need_Lock
+                0x000000002201c6d4                XIP_SFlash_GetJedecId_Need_Lock
+                0x000000002201c6de                XIP_SFlash_GetDeviceId_Need_Lock
+                0x000000002201c6e8                XIP_SFlash_GetUniqueId_Need_Lock
+                0x000000002201c6f2                XIP_SFlash_Read_Via_Cache_Need_Lock
+                0x000000002201c6fc                XIP_SFlash_Read_With_Lock
+                0x000000002201c706                XIP_SFlash_Write_With_Lock
+                0x000000002201c710                XIP_SFlash_Erase_With_Lock
+                0x000000002201c71a                XIP_SFlash_Opt_Enter
+                0x000000002201c724                XIP_SFlash_Opt_Exit
+                0x000000002201c72e                BFLB_Soft_CRC32
+ .tcm_code      0x000000002201c738      0x134 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+                0x000000002201c738                SF_Cfg_Get_Flash_Cfg_Need_Lock_Ext
+                0x000000002201c7f4                SF_Cfg_Flash_Identify_Ext
+ .tcm_code      0x000000002201c86c      0x558 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+                0x000000002201c86c                SFlash_Restore_From_Powerdown
+                0x000000002201c902                SFlash_RCV_Enable
+                0x000000002201c9bc                SFlash_Erase_Security_Register
+                0x000000002201cab8                SFlash_Program_Security_Register
+                0x000000002201cc46                SFlash_Read_Security_Register
+ .tcm_code      0x000000002201cdc4      0x47c out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                0x000000002201cdc4                XIP_SFlash_State_Restore_Ext
+                0x000000002201ce0c                XIP_SFlash_Erase_Need_Lock_Ext
+                0x000000002201ce66                XIP_SFlash_Write_Need_Lock_Ext
+                0x000000002201ceca                XIP_SFlash_Read_Need_Lock_Ext
+                0x000000002201cf30                XIP_SFlash_GetJedecId_Need_Lock_Ext
+                0x000000002201cf86                XIP_SFlash_GetDeviceId_Need_Lock_Ext
+                0x000000002201cfda                XIP_SFlash_GetUniqueId_Need_Lock_Ext
+                0x000000002201d038                XIP_SFlash_RCV_Enable_Need_Lock
+                0x000000002201d09a                XIP_SFlash_Read_With_Lock_Ext
+                0x000000002201d0b0                XIP_SFlash_Write_With_Lock_Ext
+                0x000000002201d0c6                XIP_SFlash_Erase_With_Lock_Ext
+                0x000000002201d0e2                XIP_SFlash_RCV_Enable_With_Lock
+                0x000000002201d0f8                XIP_SFlash_Init
+                0x000000002201d15a                XIP_SFlash_Read
+                0x000000002201d1a8                XIP_SFlash_Write
+                0x000000002201d1f6                XIP_SFlash_Erase
+ .tcm_code      0x000000002201d240      0x136 out/Examples/BLSP_Boot2/blsp_common.o
+                0x000000002201d240                BLSP_Boot2_Jump_Entry
+ .tcm_code      0x000000002201d376       0x16 out/Examples/BLSP_Boot2/blsp_media_boot.o
+                0x000000002201d376                BLSP_MediaBoot_Read
+ .tcm_code      0x000000002201d38c      0x1f8 out/Examples/BLSP_Boot2/blsp_port.o
+                0x000000002201d38c                BLSP_Sboot_Finish
+                0x000000002201d39c                BLSP_Boot2_Get_Clk_Cfg
+                0x000000002201d3b8                BLSP_Boot2_Get_Efuse_Cfg
+                0x000000002201d416                BLSP_Boot2_Releae_Other_CPU
+                0x000000002201d418                BLSP_Boot2_Update_System_Flash_Clk
+                0x000000002201d41a                BLSP_Boot2_Set_Encrypt
+                0x000000002201d48c                BLSP_Boot2_Set_Cache
+                0x000000002201d528                BLSP_Boot2_Get_TX_GPIO
+                0x000000002201d532                BLSP_Boot2_Get_UART_Port
+                0x000000002201d53c                BLSP_Boot2_Get_Feature_Flag
+                0x000000002201d55c                BLSP_Boot2_Get_Log_Disable_Flag
+                0x000000002201d566                BLSP_Boot2_8M_Support_Flag
+                0x000000002201d570                BLSP_Boot2_Dump_Critical_Flag
+                0x000000002201d57a                BLSP_Boot2_Get_Baudrate
+ *(.tcm_const)
+ .tcm_const     0x000000002201d584      0x1bc out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+ *(.sclock_rlt_code)
+ .sclock_rlt_code
+                0x000000002201d740      0x140 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                0x000000002201d740                AON_Power_On_MBG
+                0x000000002201d74a                AON_Power_Off_MBG
+                0x000000002201d754                AON_Power_On_XTAL
+                0x000000002201d75e                AON_Set_Xtal_CapCode
+                0x000000002201d768                AON_Get_Xtal_CapCode
+                0x000000002201d772                AON_Power_Off_XTAL
+                0x000000002201d77c                EF_Ctrl_Get_Trim_Parity
+                0x000000002201d786                EF_Ctrl_Read_RC32M_Trim
+                0x000000002201d790                EF_Ctrl_Read_RC32K_Trim
+                0x000000002201d79a                GLB_Get_Root_CLK_Sel
+                0x000000002201d7a4                GLB_Set_System_CLK_Div
+                0x000000002201d7ae                GLB_Get_BCLK_Div
+                0x000000002201d7b8                GLB_Get_HCLK_Div
+                0x000000002201d7c2                Update_SystemCoreClockWith_XTAL
+                0x000000002201d7cc                GLB_Set_System_CLK
+                0x000000002201d7d6                System_Core_Clock_Update_From_RC32M
+                0x000000002201d7e0                GLB_Set_SF_CLK
+                0x000000002201d7ea                GLB_Set_PKA_CLK_Sel
+                0x000000002201d7f4                HBN_32K_Sel
+                0x000000002201d7fe                HBN_Set_ROOT_CLK_Sel
+                0x000000002201d808                HBN_Power_On_Xtal_32K
+                0x000000002201d812                HBN_Power_Off_Xtal_32K
+                0x000000002201d81c                HBN_Trim_RC32K
+                0x000000002201d826                PDS_Trim_RC32M
+                0x000000002201d830                PDS_Select_RC32M_As_PLL_Ref
+                0x000000002201d83a                PDS_Select_XTAL_As_PLL_Ref
+                0x000000002201d844                PDS_Power_On_PLL
+                0x000000002201d84e                PDS_Enable_PLL_All_Clks
+                0x000000002201d858                PDS_Disable_PLL_All_Clks
+                0x000000002201d862                PDS_Enable_PLL_Clk
+                0x000000002201d86c                PDS_Disable_PLL_Clk
+                0x000000002201d876                PDS_Power_Off_PLL
+ *(.sclock_rlt_const)
+ *bl602_romapi.o(.text)
+ *bl602_romapi.o(.text.*)
+ *bl602_romapi.o(.rodata)
+ *bl602_romapi.o(.rodata.*)
+ *bl602_romapi.o(.srodata)
+ *bl602_romapi.o(.srodata.*)
+                0x000000002201d880                . = ALIGN (0x4)
+                0x000000002201d880                __tcm_code_end__ = .
+                0x000000002300a718                __dtcm_load_addr = (__itcm_load_addr + SIZEOF (.itcm_region))
+
+.rela.dyn       0x000000002201d880        0x0 load address 0x000000002300a718
+ .rela.tcm_code
+                0x000000002201d880        0x0 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .rela.text.PtTable_Flash_Read
+                0x000000002201d880        0x0 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .rela.text.PtTable_Flash_Write
+                0x000000002201d880        0x0 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .rela.text.PtTable_Flash_Erase
+                0x000000002201d880        0x0 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .rela.text.BLSP_Boot2_Deal_One_FW
+                0x000000002201d880        0x0 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .rela.text.startup.main
+                0x000000002201d880        0x0 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .rela.text.BLSP_Boot2_Fw_Decompress
+                0x000000002201d880        0x0 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .rela.text.metal.init.enter
+                0x000000002201d880        0x0 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .rela.text.start_load
+                0x000000002201d880        0x0 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .rela.init     0x000000002201d880        0x0 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+
+.dtcm_region    0x0000000042020000        0x0 load address 0x000000002300a718
+                0x0000000042020000                . = ALIGN (0x4)
+                0x0000000042020000                __tcm_data_start__ = .
+ *(.tcm_data)
+                0x0000000042020000                . = ALIGN (0x4)
+                0x0000000042020000                __tcm_data_end__ = .
+
+.stack_dummy    0x0000000042020000      0x400
+                0x0000000042020000                . = ALIGN (0x4)
+                0x0000000042020400                . = (. + StackSize)
+ *fill*         0x0000000042020000      0x400 
+                0x0000000042020400                . = ALIGN (0x4)
+                0x000000004202c000                __StackTop = (ORIGIN (dtcm_memory) + LENGTH (dtcm_memory))
+                0x000000004202bc00                __StackLimit = (__StackTop - SIZEOF (.stack_dummy))
+                0x0000000000000001                ASSERT ((__StackLimit >= __tcm_data_end__), region RAM overflowed with stack)
+                0x000000002300a718                __system_ram_load_addr = (__dtcm_load_addr + SIZEOF (.dtcm_region))
+
+.system_ram_data_region
+                0x000000004202c000     0x1080 load address 0x000000002300a718
+                0x000000004202c000                . = ALIGN (0x4)
+                0x000000004202c000                __system_ram_data_start__ = .
+ *(.system_ram)
+ .system_ram    0x000000004202c000     0x1000 out/Examples/BLSP_Boot2/blsp_boot2.o
+                0x000000004202c000                boot2ReadBuf
+ .system_ram    0x000000004202d000       0x80 out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                0x000000004202d080                . = ALIGN (0x4)
+                0x000000004202d080                __system_ram_data_end__ = .
+                0x000000002300b798                __ram_load_addr = (__system_ram_load_addr + SIZEOF (.system_ram_data_region))
+
+RAM_DATA        0x000000004202d080       0x34 load address 0x000000002300b798
+                0x000000004202d080                . = ALIGN (0x4)
+                0x000000004202d080                __ram_data_start__ = .
+                0x000000004202d880                PROVIDE (__global_pointer$ = (. + 0x800))
+ *(.data)
+ *(.data.*)
+ .data.uart_if_cfg
+                0x000000004202d080       0x10 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+ .data.bootCpuCfg
+                0x000000004202d090       0x18 out/Examples/BLSP_Boot2/blsp_boot2.o
+                0x000000004202d090                bootCpuCfg
+ *(.sdata)
+ *(.sdata.*)
+ .sdata.index.8437
+                0x000000004202d0a8        0x1 out/BSP_Common/partition/partition.o
+ .sdata.debug_uart_irq
+                0x000000004202d0a9        0x1 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+ *fill*         0x000000004202d0aa        0x2 
+ .sdata.uart_if_fifocfg
+                0x000000004202d0ac        0x4 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+ .sdata.boot2Flag.9408
+                0x000000004202d0b0        0x1 out/Examples/BLSP_Boot2/blsp_port.o
+ *(.sdata2)
+ *(.sdata2.*)
+                0x000000004202d0b4                . = ALIGN (0x4)
+ *fill*         0x000000004202d0b1        0x3 
+                0x000000004202d0b4                __ram_data_end__ = .
+
+.bss            0x000000004202d0b4     0x89f8 load address 0x000000002300b7cc
+                0x000000004202d0b4                . = ALIGN (0x4)
+                0x000000004202d0b4                __bss_start__ = .
+ *(.bss*)
+ .bss.__Interrupt_Handlers
+                0x000000004202d0b4      0x140 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+                0x000000004202d0b4                __Interrupt_Handlers
+ .bss.uartIntCbfArra
+                0x000000004202d1f4       0x40 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+ .bss.flashCfg  0x000000004202d234       0x54 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+ .bss.print_buf.8828
+                0x000000004202d288       0x80 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+ .bss.uartBuf   0x000000004202d308       0x40 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+ .bss.uartRB    0x000000004202d348       0x20 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+ .bss.image_cfg
+                0x000000004202d368       0x2c out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+ .bss.img_ctrl  0x000000004202d394        0x8 out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+ .bss.segment_hdr
+                0x000000004202d39c       0x10 out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+ .bss.eflash_loader_cmd_ack_buf
+                0x000000004202d3ac       0x40 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                0x000000004202d3ac                eflash_loader_cmd_ack_buf
+ .bss.eflash_loader_readbuf
+                0x000000004202d3ec     0x8010 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                0x000000004202d3ec                eflash_loader_readbuf
+ .bss.bootImgCfg
+                0x00000000420353fc      0x5c0 out/Examples/BLSP_Boot2/blsp_boot2.o
+                0x00000000420353fc                bootImgCfg
+ .bss.efuseCfg  0x00000000420359bc       0x50 out/Examples/BLSP_Boot2/blsp_boot2.o
+                0x00000000420359bc                efuseCfg
+ .bss.flashCfg  0x0000000042035a0c       0x54 out/Examples/BLSP_Boot2/blsp_boot2.o
+                0x0000000042035a0c                flashCfg
+ .bss.shaCtx    0x0000000042035a60       0x14 out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                0x0000000042035a60                shaCtx
+ *(.sbss*)
+ .sbss.PtTable_Flash_Erase
+                0x0000000042035a74        0x4 out/BSP_Common/partition/partition.o
+                0x0000000042035a74                PtTable_Flash_Erase
+ .sbss.PtTable_Flash_Read
+                0x0000000042035a78        0x4 out/BSP_Common/partition/partition.o
+                0x0000000042035a78                PtTable_Flash_Read
+ .sbss.PtTable_Flash_Write
+                0x0000000042035a7c        0x4 out/BSP_Common/partition/partition.o
+                0x0000000042035a7c                PtTable_Flash_Write
+ .sbss.bufsize  0x0000000042035a80        0x4 out/BSP_Common/xz/xz_port.o
+ .sbss.mallocBuf
+                0x0000000042035a84        0x4 out/BSP_Common/xz/xz_port.o
+ .sbss.malloced
+                0x0000000042035a88        0x4 out/BSP_Common/xz/xz_port.o
+ .sbss.aesEnable
+                0x0000000042035a8c        0x1 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+ .sbss.debug_uartId
+                0x0000000042035a8d        0x1 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+ *fill*         0x0000000042035a8e        0x2 
+ .sbss.init_flag
+                0x0000000042035a90        0x4 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+ .sbss.uart_dbg_disable
+                0x0000000042035a94        0x1 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+ *fill*         0x0000000042035a95        0x3 
+ .sbss.rx_buf_index
+                0x0000000042035a98        0x4 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                0x0000000042035a98                rx_buf_index
+ .sbss.rx_buf_len
+                0x0000000042035a9c        0x4 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                0x0000000042035a9c                rx_buf_len
+ .sbss.cpuCount
+                0x0000000042035aa0        0x1 out/Examples/BLSP_Boot2/blsp_boot2.o
+                0x0000000042035aa0                cpuCount
+ .sbss.psMode   0x0000000042035aa1        0x1 out/Examples/BLSP_Boot2/blsp_boot2.o
+                0x0000000042035aa1                psMode
+ *fill*         0x0000000042035aa2        0x2 
+ .sbss.userHashIgnored
+                0x0000000042035aa4        0x4 out/Examples/BLSP_Boot2/blsp_boot2.o
+                0x0000000042035aa4                userHashIgnored
+ .sbss.pParameter.9346
+                0x0000000042035aa8        0x4 out/Examples/BLSP_Boot2/blsp_port.o
+ *(COMMON)
+                0x0000000042035aac                . = ALIGN (0x4)
+                0x0000000042035aac                __bss_end__ = .
+
+.noinit_data    0x0000000042035aac    0x11000 load address 0x00000000230141c4
+                0x0000000042035aac                . = ALIGN (0x4)
+                0x0000000042035aac                __noinit_data_start__ = .
+ *(.noinit_data*)
+ .noinit_data   0x0000000042035aac    0x11000 out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+                0x0000000042046aac                . = ALIGN (0x4)
+                0x0000000042046aac                __noinit_data_end__ = .
+
+.heap           0x0000000042046aac        0x0
+                0x0000000042046aac                . = ALIGN (0x4)
+                0x0000000042046aac                __HeapBase = .
+ *(.heap*)
+                0x0000000042046aac                . = ALIGN (0x4)
+                0x0000000042046aac                __HeapLimit = .
+OUTPUT(out/Examples/BLSP_Boot2/blsp_boot2.elf elf32-littleriscv)
+
+.debug_info     0x0000000000000000    0x287e1
+ .debug_info    0x0000000000000000     0x32e1 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .debug_info    0x00000000000032e1       0xf8 out/BSP_Common/libc/memcmp.o
+ .debug_info    0x00000000000033d9       0xf7 out/BSP_Common/libc/memcpy.o
+ .debug_info    0x00000000000034d0       0xd7 out/BSP_Common/libc/memset.o
+ .debug_info    0x00000000000035a7       0xbf out/BSP_Common/libc/strlen.o
+ .debug_info    0x0000000000003666      0x525 out/BSP_Common/libc/vsnprintf.o
+ .debug_info    0x0000000000003b8b      0x8f9 out/BSP_Common/partition/partition.o
+ .debug_info    0x0000000000004484      0xa04 out/BSP_Common/ring_buffer/ring_buffer.o
+ .debug_info    0x0000000000004e88      0x1dd out/BSP_Common/soft_crc/softcrc.o
+ .debug_info    0x0000000000005065      0x11b out/BSP_Common/xz/xz_crc32.o
+ .debug_info    0x0000000000005180     0x1b15 out/BSP_Common/xz/xz_dec_lzma2.o
+ .debug_info    0x0000000000006c95      0xce6 out/BSP_Common/xz/xz_dec_stream.o
+ .debug_info    0x000000000000797b      0x18b out/BSP_Common/xz/xz_port.o
+ .debug_info    0x0000000000007b06      0x577 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+ .debug_info    0x000000000000807d     0x1a16 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+ .debug_info    0x0000000000009a93     0x179b out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+ .debug_info    0x000000000000b22e     0x1a5a out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+ .debug_info    0x000000000000cc88     0x3b0d out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+ .debug_info    0x0000000000010795     0x4566 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
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+                0x000000000000008a       0x2e out/BSP_Common/libc/memset.o
+ .riscv.attributes
+                0x00000000000000b8       0x2e out/BSP_Common/libc/strlen.o
+ .riscv.attributes
+                0x00000000000000e6       0x2e out/BSP_Common/libc/vsnprintf.o
+ .riscv.attributes
+                0x0000000000000114       0x2e out/BSP_Common/partition/partition.o
+ .riscv.attributes
+                0x0000000000000142       0x2e out/BSP_Common/ring_buffer/ring_buffer.o
+ .riscv.attributes
+                0x0000000000000170       0x2e out/BSP_Common/soft_crc/softcrc.o
+ .riscv.attributes
+                0x000000000000019e       0x2e out/BSP_Common/xz/xz_crc32.o
+ .riscv.attributes
+                0x00000000000001cc       0x2e out/BSP_Common/xz/xz_dec_lzma2.o
+ .riscv.attributes
+                0x00000000000001fa       0x2e out/BSP_Common/xz/xz_dec_stream.o
+ .riscv.attributes
+                0x0000000000000228       0x2e out/BSP_Common/xz/xz_port.o
+ .riscv.attributes
+                0x0000000000000256       0x2e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+ .riscv.attributes
+                0x0000000000000284       0x2e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+ .riscv.attributes
+                0x00000000000002b2       0x2e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+ .riscv.attributes
+                0x00000000000002e0       0x2e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+ .riscv.attributes
+                0x000000000000030e       0x2e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+ .riscv.attributes
+                0x000000000000033c       0x2e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+ .riscv.attributes
+                0x000000000000036a       0x2e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+ .riscv.attributes
+                0x0000000000000398       0x2e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+ .riscv.attributes
+                0x00000000000003c6       0x2e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+ .riscv.attributes
+                0x00000000000003f4       0x2e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+ .riscv.attributes
+                0x0000000000000422       0x2e out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+ .riscv.attributes
+                0x0000000000000450       0x2e out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+ .riscv.attributes
+                0x000000000000047e       0x2e out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .riscv.attributes
+                0x00000000000004ac       0x2e out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+ .riscv.attributes
+                0x00000000000004da       0x2e out/Examples/BLSP_Boot2/blsp_boot2.o
+ .riscv.attributes
+                0x0000000000000508       0x2e out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+ .riscv.attributes
+                0x0000000000000536       0x2e out/Examples/BLSP_Boot2/blsp_boot_parser.o
+ .riscv.attributes
+                0x0000000000000564       0x2e out/Examples/BLSP_Boot2/blsp_common.o
+ .riscv.attributes
+                0x0000000000000592       0x2e out/Examples/BLSP_Boot2/blsp_media_boot.o
+ .riscv.attributes
+                0x00000000000005c0       0x2e out/Examples/BLSP_Boot2/blsp_port.o
+ .riscv.attributes
+                0x00000000000005ee       0x2e out/startup/GCC/entry.o
+ .riscv.attributes
+                0x000000000000061c       0x2e out/startup/GCC/start_load.o
+ .riscv.attributes
+                0x000000000000064a       0x2e out/startup/interrupt.o
+ .riscv.attributes
+                0x0000000000000678       0x2e out/startup/system_bl602.o
+ .riscv.attributes
+                0x00000000000006a6       0x2e /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libc.a(lib_a-memmove-stub.o)
+ .riscv.attributes
+                0x00000000000006d4       0x2e /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_udivdi3.o)
+ .riscv.attributes
+                0x0000000000000702       0x2e /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_umoddi3.o)
+ .riscv.attributes
+                0x0000000000000730       0x2e /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clz.o)
+
+.debug_frame    0x0000000000000000     0x4378
+ .debug_frame   0x0000000000000000      0x278 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .debug_frame   0x0000000000000278       0x20 out/BSP_Common/libc/memcmp.o
+ .debug_frame   0x0000000000000298       0x20 out/BSP_Common/libc/memcpy.o
+ .debug_frame   0x00000000000002b8       0x20 out/BSP_Common/libc/memset.o
+ .debug_frame   0x00000000000002d8       0x20 out/BSP_Common/libc/strlen.o
+ .debug_frame   0x00000000000002f8       0x60 out/BSP_Common/libc/vsnprintf.o
+ .debug_frame   0x0000000000000358      0x1bc out/BSP_Common/partition/partition.o
+ .debug_frame   0x0000000000000514      0x2cc out/BSP_Common/ring_buffer/ring_buffer.o
+ .debug_frame   0x00000000000007e0       0x30 out/BSP_Common/soft_crc/softcrc.o
+ .debug_frame   0x0000000000000810       0x30 out/BSP_Common/xz/xz_crc32.o
+ .debug_frame   0x0000000000000840      0x144 out/BSP_Common/xz/xz_dec_lzma2.o
+ .debug_frame   0x0000000000000984      0x134 out/BSP_Common/xz/xz_dec_stream.o
+ .debug_frame   0x0000000000000ab8       0x50 out/BSP_Common/xz/xz_port.o
+ .debug_frame   0x0000000000000b08       0x8c out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+ .debug_frame   0x0000000000000b94      0x6dc out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+ .debug_frame   0x0000000000001270      0x40c out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+ .debug_frame   0x000000000000167c      0x390 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+ .debug_frame   0x0000000000001a0c      0xa80 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+ .debug_frame   0x000000000000248c      0x574 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+ .debug_frame   0x0000000000002a00       0x7c out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+ .debug_frame   0x0000000000002a7c      0x15c out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+ .debug_frame   0x0000000000002bd8      0x290 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+ .debug_frame   0x0000000000002e68      0x2dc out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+ .debug_frame   0x0000000000003144      0x3e4 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+ .debug_frame   0x0000000000003528      0x1ac out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+ .debug_frame   0x00000000000036d4       0xf0 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+ .debug_frame   0x00000000000037c4      0x1d4 out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+ .debug_frame   0x0000000000003998       0xec out/Examples/BLSP_Boot2/blsp_boot2.o
+ .debug_frame   0x0000000000003a84       0xb8 out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+ .debug_frame   0x0000000000003b3c      0x1b0 out/Examples/BLSP_Boot2/blsp_boot_parser.o
+ .debug_frame   0x0000000000003cec       0xa0 out/Examples/BLSP_Boot2/blsp_common.o
+ .debug_frame   0x0000000000003d8c       0x80 out/Examples/BLSP_Boot2/blsp_media_boot.o
+ .debug_frame   0x0000000000003e0c      0x30c out/Examples/BLSP_Boot2/blsp_port.o
+ .debug_frame   0x0000000000004118       0x20 out/startup/GCC/start_load.o
+ .debug_frame   0x0000000000004138      0x1e8 out/startup/interrupt.o
+ .debug_frame   0x0000000000004320       0x58 out/startup/system_bl602.o
+
+Cross Reference Table
+
+Symbol                                            File
+ADC_Channel_Config                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Disable                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Enable                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_FIFO_Cfg                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_FIFO_Is_Empty                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_FIFO_Is_Full                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Gain_Trim                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_GetIntStatus                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Get_FIFO_Count                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Init                                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_IntClr                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_IntMask                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Int_Callback_Install                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_MIC_Bias_Disable                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_MIC_Bias_Enable                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Mic_Init                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Parse_Result                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Read_FIFO                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Reset                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_SET_TSVBE_HIGH                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_SET_TSVBE_LOW                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Scan_Channel_Config                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Start                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Stop                                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Trim_TSEN                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Tsen_Init                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Vbat_Disable                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Vbat_Enable                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+AON_ACOMP_Enable                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_acomp.o
+AON_ACOMP_Get_Result                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_acomp.o
+AON_ACOMP_Init                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_acomp.o
+AON_Get_Xtal_CapCode                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_LowPower_Enter_PDS0                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_LowPower_Exit_PDS0                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_Off_BG                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_Off_LDO11_SOC                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_Off_LDO15_RF                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_Off_MBG                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_Off_SFReg                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_Off_XTAL                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_On_BG                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_On_LDO11_SOC                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_On_LDO15_RF                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_On_MBG                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_On_SFReg                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_On_XTAL                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Set_LDO11_SOC_Sstart_Delay                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_aon.o
+AON_Set_Xtal_CapCode                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+ASM_Delay_Us                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+BFLB_Soft_CRC16                                   out/BSP_Common/soft_crc/softcrc.o
+BFLB_Soft_CRC32                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+                                                  out/BSP_Common/partition/partition.o
+BFLB_Soft_CRC32_Table                             out/BSP_Common/soft_crc/softcrc.o
+BL602_Delay_MS                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_common.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+BL602_Delay_US                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+BL602_MemCmp                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+BL602_MemCpy                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+BL602_MemCpy4                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+BL602_MemCpy_Fast                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/ring_buffer/ring_buffer.o
+                                                  out/BSP_Common/partition/partition.o
+BL602_MemSet                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+BL602_MemSet4                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+BLE_IRQHandler_Wrapper                            out/startup/interrupt.o
+BLSP_Boot2_8M_Support_Flag                        out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Boot2_Disable_Other_Cache                    out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Boot2_Dump_Critical_Flag                     out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Boot2_Exit                                   out/Examples/BLSP_Boot2/blsp_common.o
+BLSP_Boot2_Flush_XIP_Cache                        out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Boot2_Get_Baudrate                           out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Boot2_Get_CPU_Count                          out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Boot2_Get_Clk_Cfg                            out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Boot2_Get_Efuse_Cfg                          out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Boot2_Get_Feature_Flag                       out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+                                                  out/Examples/BLSP_Boot2/blsp_common.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Boot2_Get_Log_Disable_Flag                   out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Boot2_Get_TX_GPIO                            out/Examples/BLSP_Boot2/blsp_port.o
+BLSP_Boot2_Get_UART_Port                          out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Boot2_Get_XIP_Offset                         out/Examples/BLSP_Boot2/blsp_port.o
+BLSP_Boot2_Init_Sec_Eng_PKA                       out/Examples/BLSP_Boot2/blsp_port.o
+BLSP_Boot2_Init_Timer                             out/Examples/BLSP_Boot2/blsp_port.o
+BLSP_Boot2_Jump_Entry                             out/Examples/BLSP_Boot2/blsp_common.o
+BLSP_Boot2_Pass_Parameter                         out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Boot2_Releae_Other_CPU                       out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_common.o
+BLSP_Boot2_Reset_Sec_Eng                          out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_common.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Boot2_Set_Cache                              out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_common.o
+BLSP_Boot2_Set_Encrypt                            out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_common.o
+BLSP_Boot2_Show_Timer                             out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+BLSP_Boot2_Update_Fw                              out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Boot2_Update_System_Flash_Clk                out/Examples/BLSP_Boot2/blsp_port.o
+BLSP_Boot2_Verify_XZ_Header                       out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Boot2_init_gpio_for_bootrom                  out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Boot_Parse_AesIv                             out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+BLSP_Boot_Parse_BootHeader                        out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+BLSP_Boot_Parse_PKey                              out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+BLSP_Boot_Parse_Signature                         out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+BLSP_Boot_Parser_Check_Hash                       out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+BLSP_Boot_Parser_Check_Signature                  out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+BLSP_Clr_User_Specified_Fw                        out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Dump_Data                                    out/Examples/BLSP_Boot2/blsp_common.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Fix_Invalid_MSP_PC                           out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+BLSP_Get_User_Specified_Fw                        out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Is_MSP_Valid                                 out/Examples/BLSP_Boot2/blsp_port.o
+BLSP_Is_PC_Valid                                  out/Examples/BLSP_Boot2/blsp_port.o
+BLSP_MediaBoot_Main                               out/Examples/BLSP_Boot2/blsp_media_boot.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_MediaBoot_Pre_Jump                           out/Examples/BLSP_Boot2/blsp_common.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+BLSP_MediaBoot_Read                               out/Examples/BLSP_Boot2/blsp_media_boot.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Read_Power_Save_Mode                         out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+BLSP_Sboot_Finish                                 out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_common.o
+BMX_ERR_INT_Callback_Install                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+BMX_ERR_IRQHandler_Wrapper                        out/startup/interrupt.o
+BMX_TIMEOUT_INT_Callback_Install                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+BMX_TO_IRQHandler_Wrapper                         out/startup/interrupt.o
+BOR_IRQHandler_Wrapper                            out/startup/interrupt.o
+BZ_PHY_IRQHandler_Wrapper                         out/startup/interrupt.o
+DMA_ALL_IRQHandler_Wrapper                        out/startup/interrupt.o
+DMA_BMX_ERR_IRQHandler_Wrapper                    out/startup/interrupt.o
+DMA_Channel_Disable                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_Channel_Enable                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_Channel_Init                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_Channel_Is_Busy                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_Channel_TranferSize                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_Channel_Update_DstMemcfg                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_Channel_Update_SrcMemcfg                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_Disable                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_Enable                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_IntMask                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_Int_Callback_Install                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_Init                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_PpBuf_Append                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_PpBuf_Destroy                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_PpBuf_Remove_Completed_List               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_PpBuf_Start_New_Transmit                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_PpStruct_Init                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_PpStruct_Set_Transfer_Len                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_PpStruct_Start                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_PpStruct_Stop                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_Update                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+EFUSE_IRQHandler_Wrapper                          out/startup/interrupt.o
+EF_Ctrl_AutoLoad_Done                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+EF_Ctrl_Busy                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Clear                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+EF_Ctrl_Crc_Enable                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Crc_Is_Busy                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Crc_Result                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Crc_Set_Golden                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Get_Trim_Enable                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Get_Trim_Parity                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+EF_Ctrl_Is_All_Bits_Zero                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Is_CapCode_Slot_Empty                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Is_MAC_Address_Slot_Empty                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Is_PowerOffset_Slot_Empty                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Load_Efuse_R0                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Program_Direct_R0                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Program_Efuse_0                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Read_ADC_Gain_Trim                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+EF_Ctrl_Read_AES_Key                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+EF_Ctrl_Read_Ana_Trim                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Read_CapCode_Opt                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Read_Chip_ID                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+EF_Ctrl_Read_Dbg_Pwd                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Read_Device_Info                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Read_Direct_R0                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Read_MAC_Address                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Read_MAC_Address_Opt                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Read_MAC_Address_Raw                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Read_PowerOffset_Opt                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Read_R0                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Read_RC32K_Trim                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+EF_Ctrl_Read_RC32M_Trim                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+EF_Ctrl_Read_Secure_Boot                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+EF_Ctrl_Read_Secure_Cfg                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Read_Sw_Usage                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+EF_Ctrl_Read_TSEN_Trim                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+EF_Ctrl_Readlock_AES_Key                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Readlock_Dbg_Pwd                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Sw_AHB_Clk_0                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Write_AES_Key                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Write_Ana_Trim                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Write_CapCode_Opt                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Write_Dbg_Pwd                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Write_MAC_Address                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Write_MAC_Address_Opt                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Write_PowerOffset_Opt                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Write_R0                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Write_Secure_Boot                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Write_Secure_Cfg                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Write_Sw_Usage                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Writelock_AES_Key                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Writelock_Dbg_Pwd                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Writelock_MAC_Address                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Writelock_Sw_Usage                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+FreeRTOS_Interrupt_Handler                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+GLB_AHB_Slave1_Clock_Gate                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_AHB_Slave1_Reset                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+GLB_BMX_Addr_Monitor_Disable                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_BMX_Addr_Monitor_Enable                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_BMX_BusErrResponse_Disable                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_BMX_BusErrResponse_Enable                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_BMX_Get_Err_Addr                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_BMX_Get_Status                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_BMX_Init                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Clr_GPIO_IntStatus                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_DAC_Init                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GLB_DAC_Set_ChanA_Config                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GLB_DAC_Set_ChanA_Value                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GLB_DAC_Set_ChanB_Config                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GLB_DAC_Set_ChanB_Value                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GLB_Deswap_Flash_Pin                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+GLB_GPIO_Func_Init                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_Get_Fun                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+GLB_GPIO_Get_Real_Fun                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_INPUT_Disable                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_INPUT_Enable                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_INT0_Callback_Install                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_INT0_IRQHandler_Install                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_Init                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_gpio.o
+GLB_GPIO_IntClear                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_IntMask                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_OUTPUT_Disable                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+GLB_GPIO_OUTPUT_Enable                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+GLB_GPIO_Read                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+GLB_GPIO_Set_HZ                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+GLB_GPIO_Set_PullDown                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_Set_PullUp                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_Write                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+GLB_GPIP_DAC_Init                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GLB_GPIP_DAC_Set_ChanA_Config                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GLB_GPIP_DAC_Set_ChanB_Config                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GLB_Get_BCLK_Div                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+GLB_Get_GPIO_IntCtlMod                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Get_GPIO_IntStatus                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Get_HCLK_Div                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+GLB_Get_Root_CLK_Sel                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+GLB_Get_SRAM_PARM                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Get_SRAM_RET                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Get_SRAM_SLP                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_IR_LED_Driver_Disable                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_IR_LED_Driver_Enable                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_IR_LED_Driver_Ibias                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_IR_RX_GPIO_Sel                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_JTAG_Sig_Swap_Set                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Platform_Wakeup_Disable                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Platform_Wakeup_Enable                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_SW_CPU_Reset                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+GLB_SW_POR_Reset                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+GLB_SW_System_Reset                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+GLB_Select_External_Flash                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+GLB_Select_Internal_Flash                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+GLB_Set_ADC_CLK                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_BLE_CLK                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_BT_Coex_Signal                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_DAC_CLK                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_DIG_32K_CLK                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_DIG_512K_CLK                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_DIG_CLK_Sel                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_DMA_CLK                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_EM_Sel                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+GLB_Set_GPIO_IntMod                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_I2C_CLK                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+GLB_Set_IR_CLK                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+GLB_Set_MTimer_CLK                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+GLB_Set_PKA_CLK_Sel                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+GLB_Set_SF_CLK                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+GLB_Set_SPI_0_ACT_MOD_Sel                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_SPI_CLK                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+GLB_Set_SRAM_PARM                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_SRAM_RET                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_SRAM_SLP                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_System_CLK                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+GLB_Set_System_CLK_Div                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+GLB_Set_UART_CLK                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+GLB_Set_WiFi_Core_CLK                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_WiFi_Encrypt_CLK                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Swap_Flash_Pin                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+GLB_Swap_SPI_0_MOSI_With_MISO                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_UART_Fun_Sel                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_gpio.o
+GLB_UART_Sig_Swap_Set                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_gpio.o
+GPADC_DMA_IRQHandler_Wrapper                      out/startup/interrupt.o
+GPIO_INT0_IRQHandler_Wrapper                      out/startup/interrupt.o
+GPIP_DAC_ChanA_Disable                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_DAC_ChanA_Enable                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_DAC_ChanB_Disable                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_DAC_ChanB_Enable                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_DAC_DMA_WriteData                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_Set_DAC_ChanA_SRC_SEL                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_Set_DAC_ChanB_SRC_SEL                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_Set_DAC_DMA_TX_Disable                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_Set_DAC_DMA_TX_Enable                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_Set_DAC_DMA_TX_FORMAT_SEL                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_Set_DAC_Mod_SEL                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+HBN_32K_Sel                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Aon_Pad_IeSmt_Cfg                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_App_Reset                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Clear_IRQ                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Clear_RTC_Counter                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Clear_RTC_INT                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Disable                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Disable_AComp0_IRQ                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Disable_AComp1_IRQ                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Disable_BOR_IRQ                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Enable                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Enable_AComp0_IRQ                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Enable_AComp1_IRQ                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Enable_BOR_IRQ                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Enable_Ext                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Enable_RTC_Counter                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_GPIO7_Dbg_Pull_Cfg                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+HBN_GPIO_INT_Disable                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_GPIO_INT_Enable                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Get_BOR_OUT_State                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Get_INT_State                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Get_PIR_Interval                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Get_PIR_Threshold                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Get_Pin_Wakeup_Mode                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Get_RTC_Timer_Val                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Get_Status_Flag                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+HBN_Get_Wakeup_Addr                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Hw_Pu_Pd_Cfg                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Mode_Enter                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Mode_Enter_Ext                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_OUT0_IRQHandler_Wrapper                       out/startup/interrupt.o
+HBN_OUT1_IRQHandler_Wrapper                       out/startup/interrupt.o
+HBN_Out0_Callback_Install                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Out0_IRQHandler_Install                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Out1_Callback_Install                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Out1_IRQHandler_Install                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_PIR_Disable                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_PIR_Enable                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_PIR_HPF_Sel                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_PIR_INT_Config                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_PIR_LPF_Sel                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Pin_WakeUp_Mask                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Power_Down_Flash                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Power_Off_RC32K                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Power_Off_Xtal_32K                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Power_On_RC32K                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Power_On_Xtal_32K                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+HBN_Reset                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_BOR_Cfg                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+                                                  out/startup/system_bl602.o
+HBN_Set_BOR_Config                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_Embedded_Flash_Pullup                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_HRAM_Ret                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_HRAM_slp                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_Ldo11_All_Vout                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_Ldo11_Aon_Vout                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+HBN_Set_Ldo11_Rt_Vout                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+HBN_Set_Ldo11_Soc_Vout                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+HBN_Set_PIR_Interval                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_PIR_Threshold                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_ROOT_CLK_Sel                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+HBN_Set_RTC_Timer                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_Status_Flag                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_UART_CLK_Sel                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+HBN_Set_Wakeup_Addr                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_XCLK_CLK_Sel                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+HBN_Trim_RC32K                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+I2C_ClockSet                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_Disable                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_Enable                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_IRQHandler_Wrapper                            out/startup/interrupt.o
+I2C_Init                                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_IntMask                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_IsBusy                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_MasterReceiveBlocking                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_MasterSendBlocking                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_RecieveWord                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_Reset                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_SendWord                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_SetPrd                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_SetSclSync                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+IRRX_IRQHandler_Wrapper                           out/startup/interrupt.o
+IRTX_IRQHandler_Wrapper                           out/startup/interrupt.o
+IR_ClrIntStatus                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_DeInit                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_Disable                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_Enable                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_GetIntStatus                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_GetRxDataBitCount                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_GetRxFIFOCount                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_GetRxFIFOStatus                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_IntMask                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_Int_Callback_Install                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_LEDInit                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_LEDSend                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_LearnToInit                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_LearnToReceive                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_LearnToSend                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_ReceiveData                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_ReceiveNEC                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_RxFIFOClear                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_RxInit                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_SWMReceiveData                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_SWMSendCommand                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_SWMSendData                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_SendCommand                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_SendData                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_SendNEC                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_TxInit                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_TxPulseWidthConfig                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_TxSWM                                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_TxSWMPulseWidthConfig                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+Interrupt_Handler                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+                                                  out/startup/interrupt.o
+Interrupt_Handler_Register                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+Interrupt_Handler_Stub                            out/startup/interrupt.o
+L1C_BMX_Addr_Monitor_Disable                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_Addr_Monitor_Enable                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_BusErrResponse_Disable                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_BusErrResponse_Enable                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_ERR_INT_Callback_Install                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_ERR_IRQHandler_Wrapper                    out/startup/interrupt.o
+L1C_BMX_Get_Err_Addr                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_Get_Status                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_Init                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_TIMEOUT_INT_Callback_Install              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_TO_IRQHandler_Wrapper                     out/startup/interrupt.o
+L1C_IROM_2T_Access_Set                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+L1C_Set_Way_Disable                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+L1C_Set_Wrap                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+MAC_GEN_IRQHandler_Wrapper                        out/startup/interrupt.o
+MAC_PORT_TRG_IRQHandler_Wrapper                   out/startup/interrupt.o
+MAC_RX_TRG_IRQHandler_Wrapper                     out/startup/interrupt.o
+MAC_TXRX_MISC_IRQHandler_Wrapper                  out/startup/interrupt.o
+MAC_TXRX_TIMER_IRQHandler_Wrapper                 out/startup/interrupt.o
+MAC_TX_TRG_IRQHandler_Wrapper                     out/startup/interrupt.o
+PDS_Default_Level_Config                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Disable_PLL_All_Clks                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Disable_PLL_Clk                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Enable                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Enable_PLL_All_Clks                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Enable_PLL_Clk                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Force_Config                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Get_IntStatus                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pds.o
+PDS_Get_PdsPllStstus                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pds.o
+PDS_Get_PdsRfStstus                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pds.o
+PDS_Get_PdsStstus                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pds.o
+PDS_IntClear                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pds.o
+PDS_IntMask                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pds.o
+PDS_Int_Callback_Install                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pds.o
+PDS_Power_Off_PLL                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Power_On_PLL                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_RAM_Config                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Reset                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Select_RC32M_As_PLL_Ref                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Select_XTAL_As_PLL_Ref                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Trim_RC32M                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_WAKEUP_IRQHandler_Install                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pds.o
+PDS_WAKEUP_IRQHandler_Wrapper                     out/startup/interrupt.o
+PWM_Channel_Disable                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Channel_Enable                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Channel_Fource_Output                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Channel_Get                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Channel_Init                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Channel_Set_Div                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Channel_Set_Period                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Channel_Set_Threshold1                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Channel_Set_Threshold2                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Channel_Update                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_IRQHandler_Wrapper                            out/startup/interrupt.o
+PWM_IntMask                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Int_Callback_Install                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_SW_Force_Value                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_SW_Mode                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Smart_Configure                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PtTable_Create                                    out/BSP_Common/partition/partition.o
+PtTable_Flash_Erase                               out/BSP_Common/partition/partition.o
+PtTable_Flash_Read                                out/BSP_Common/partition/partition.o
+PtTable_Flash_Write                               out/BSP_Common/partition/partition.o
+PtTable_Get_Active_Entries_By_ID                  out/BSP_Common/partition/partition.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+PtTable_Get_Active_Entries_By_Name                out/BSP_Common/partition/partition.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+PtTable_Get_Active_Partition_Need_Lock            out/BSP_Common/partition/partition.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+PtTable_Set_Flash_Operation                       out/BSP_Common/partition/partition.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+PtTable_Update_Entry                              out/BSP_Common/partition/partition.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+RF_TOP_INT0_IRQHandler_Wrapper                    out/startup/interrupt.o
+RF_TOP_INT1_IRQHandler_Wrapper                    out/startup/interrupt.o
+Ring_Buffer_Get_Empty_Length                      out/BSP_Common/ring_buffer/ring_buffer.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+Ring_Buffer_Get_Length                            out/BSP_Common/ring_buffer/ring_buffer.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+Ring_Buffer_Get_Status                            out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Init                                  out/BSP_Common/ring_buffer/ring_buffer.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+Ring_Buffer_Peek                                  out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Peek_Byte                             out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Read                                  out/BSP_Common/ring_buffer/ring_buffer.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+Ring_Buffer_Read_Byte                             out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Read_Callback                         out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Reset                                 out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Write                                 out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Write_Byte                            out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Write_Byte_Force                      out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Write_Callback                        out/BSP_Common/ring_buffer/ring_buffer.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+Ring_Buffer_Write_Force                           out/BSP_Common/ring_buffer/ring_buffer.o
+SDIO_IRQHandler_Wrapper                           out/startup/interrupt.o
+SEC_AES_IRQHandler_Wrapper                        out/startup/interrupt.o
+SEC_BMX_ERR_IRQHandler_Wrapper                    out/startup/interrupt.o
+SEC_CDET_IRQHandler_Wrapper                       out/startup/interrupt.o
+SEC_Eng_ClrIntStatus                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+SEC_Eng_GetIntStatus                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+SEC_Eng_IntMask                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+SEC_Eng_Int_Callback_Install                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+SEC_Eng_Turn_Off_Sec_Ring                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SEC_Eng_Turn_On_Sec_Ring                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SEC_GMAC_IRQHandler_Wrapper                       out/startup/interrupt.o
+SEC_PKA_IRQHandler_Wrapper                        out/startup/interrupt.o
+SEC_SHA_IRQHandler_Wrapper                        out/startup/interrupt.o
+SEC_TRNG_IRQHandler_Wrapper                       out/startup/interrupt.o
+SF_CTRL_IRQHandler_Wrapper                        out/startup/interrupt.o
+SF_Cfg_Deinit_Ext_Flash_Gpio                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Cfg_Flash_Identify                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+SF_Cfg_Flash_Identify_Ext                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+SF_Cfg_Get_Flash_Cfg_Need_Lock                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+SF_Cfg_Get_Flash_Cfg_Need_Lock_Ext                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+SF_Cfg_Init_Ext_Flash_Gpio                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Cfg_Init_Flash_Gpio                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Cfg_Init_Internal_Flash_Gpio                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Cfg_Restore_GPIO17_Fun                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_AES_Disable                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_AES_Enable                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+SF_Ctrl_AES_Enable_BE                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+SF_Ctrl_AES_Enable_LE                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_AES_Set_IV                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_AES_Set_IV_BE                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+SF_Ctrl_AES_Set_Key                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_AES_Set_Key_BE                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+SF_Ctrl_AES_Set_Region                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+SF_Ctrl_Disable                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_Enable                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_GetBusyState                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SF_Ctrl_Get_Clock_Delay                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_Get_Flash_Image_Offset                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+SF_Ctrl_Icache2_Set                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_Icache_Set                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_Is_AES_Enable                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_Select_Clock                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_Select_Pad                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_SendCmd                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SF_Ctrl_Set_Clock_Delay                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_Set_Flash_Image_Offset                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+SF_Ctrl_Set_Owner                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+SFlash_Blk32_Erase                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Blk64_Erase                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Busy                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SFlash_Cache_Enable_Set                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+SFlash_Cache_Flush                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+SFlash_Cache_Hit_Count_Get                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Cache_Miss_Count_Get                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Cache_Read_Disable                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Cache_Read_Enable                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+SFlash_Chip_Erase                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_DisableBurstWrap                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Erase                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+SFlash_Erase_Security_Register                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SFlash_GetDeviceId                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+SFlash_GetJedecId                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SFlash_GetUniqueId                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+SFlash_IDbus_Read_Enable                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Init                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Powerdown                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Program                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+SFlash_Program_Security_Register                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SFlash_Qspi_Enable                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SFlash_RCV_Enable                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+SFlash_Read                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SFlash_Read_Reg                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Read_Reg_With_Cmd                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SFlash_Read_Security_Register                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SFlash_Releae_Powerdown                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SFlash_Reset_Continue_Read                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+SFlash_Restore_From_Powerdown                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SFlash_Sector_Erase                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_SetBurstWrap                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SFlash_SetSPIMode                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Set_IDbus_Cfg                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+SFlash_Software_Reset                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Volatile_Reg_Write_Enable                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Write_Enable                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SFlash_Write_Reg                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Write_Reg_With_Cmd                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SPI_ClockConfig                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_ClrIntStatus                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_ClrRxFifo                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_ClrTxFifo                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_DeInit                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Disable                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Enable                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_FifoConfig                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_GetBusyStatus                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_GetFifoStatus                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_GetIntStatus                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_GetRxFifoCount                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_GetTxFifoCount                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_IRQHandler_Wrapper                            out/startup/interrupt.o
+SPI_Init                                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_IntMask                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Int_Callback_Install                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_ReceiveData                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Recv_16bits                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Recv_24bits                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Recv_32bits                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Recv_8bits                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_RxIgnoreDisable                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_RxIgnoreEnable                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_SendData                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_SendRecv_16bits                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_SendRecv_24bits                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_SendRecv_32bits                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_SendRecv_8bits                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Send_16bits                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Send_24bits                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Send_32bits                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Send_8bits                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_SetClock                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_SetDeglitchCount                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_SetTimeOutValue                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SdioFuncReg                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sdu.o
+Sec_Dbg_Read_Chip_ID                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_dbg.o
+Sec_Dbg_Read_Dbg_Enable                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_dbg.o
+Sec_Dbg_Read_Dbg_Mode                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_dbg.o
+Sec_Dbg_Read_WiFi_MAC                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_dbg.o
+Sec_Eng_AES_Crypt                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_crypt.o
+Sec_Eng_AES_Disable_Link                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_AES_Enable_BE                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_crypt.o
+Sec_Eng_AES_Enable_LE                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_AES_Enable_Link                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_AES_Finish                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_crypt.o
+Sec_Eng_AES_Init                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_crypt.o
+Sec_Eng_AES_Link_Work                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_AES_Set_Counter_Byte                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_AES_Set_Hw_Key_Src                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_AES_Set_Key_IV                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_AES_Set_Key_IV_BE                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_crypt.o
+Sec_Eng_GMAC_Disable_Link                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_GMAC_Enable_BE                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_GMAC_Enable_LE                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_GMAC_Enable_Link                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_GMAC_Link_Work                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_BigEndian_Enable                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+Sec_Eng_PKA_CREG                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+Sec_Eng_PKA_Clear_Int                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_GF2Mont                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+Sec_Eng_PKA_LADD                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+Sec_Eng_PKA_LCMP                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_LDIV                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_LDIV2N                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_LMOD2N                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_LMUL                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+Sec_Eng_PKA_LMUL2N                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_LSQR                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+Sec_Eng_PKA_LSUB                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_LittleEndian_Enable                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_MADD                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_MEXP                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+Sec_Eng_PKA_MINV                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_MMUL                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_MREM                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+Sec_Eng_PKA_MSQR                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_MSUB                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+Sec_Eng_PKA_Mont2GF                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+Sec_Eng_PKA_Move_Data                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_NREG                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_RESIZE                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_Read_Block                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_Read_Data                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+Sec_Eng_PKA_Reset                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+Sec_Eng_PKA_Write_Block                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_Write_Data                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+Sec_Eng_PKA_Write_Immediate                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_SHA256_Finish                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                                                  out/BSP_Common/cipher_suite/bflb_hash.o
+Sec_Eng_SHA256_Init                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                                                  out/BSP_Common/cipher_suite/bflb_hash.o
+Sec_Eng_SHA256_Link_Finish                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_SHA256_Link_Init                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_SHA256_Link_Update                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_SHA256_Update                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                                                  out/BSP_Common/cipher_suite/bflb_hash.o
+Sec_Eng_SHA_Disable_Link                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_SHA_Enable_Link                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_SHA_Start                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                                                  out/BSP_Common/cipher_suite/bflb_hash.o
+Sec_Eng_Trng_Disable                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+Sec_Eng_Trng_Enable                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_Trng_Int_Disable                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_Trng_Int_Enable                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_Trng_Int_Read                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_Trng_Int_Read_Trigger                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_Trng_Read                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+SystemInit                                        out/startup/system_bl602.o
+                                                  out/startup/GCC/entry.o
+System_Core_Clock_Update_From_RC32M               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+System_NVIC_SetPriority                           out/startup/system_bl602.o
+TIMER_CH0_IRQHandler_Wrapper                      out/startup/interrupt.o
+TIMER_CH1_IRQHandler_Wrapper                      out/startup/interrupt.o
+TIMER_ClearIntStatus                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_Disable                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+TIMER_Enable                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+TIMER_GetCompValue                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_GetCounterValue                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_GetMatchStatus                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_GetPreloadValue                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_Init                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+TIMER_IntMask                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+TIMER_SetCompValue                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_SetCountMode                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_SetPreloadTrigSrc                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_SetPreloadValue                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_WDT_IRQHandler_Wrapper                      out/startup/interrupt.o
+TSEN_Get_Temp                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+TSEN_Get_V_Error                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+TZC_Sboot_Set                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_tzc_sec.o
+TZC_Set_Rom0_R0_Protect                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_tzc_sec.o
+TZC_Set_Rom0_R1_Protect                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_tzc_sec.o
+TZC_Set_Rom1_R0_Protect                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_tzc_sec.o
+TZC_Set_Rom1_R1_Protect                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_tzc_sec.o
+Timer_Int_Callback_Install                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+Trap_Handler                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+                                                  out/startup/interrupt.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+Trap_Handler_Stub                                 out/startup/interrupt.o
+                                                  out/startup/GCC/entry.o
+UART0_IRQHandler                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART0_IRQHandler_Wrapper                          out/startup/interrupt.o
+UART1_IRQHandler                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART1_IRQHandler_Wrapper                          out/startup/interrupt.o
+UART_AutoBaudDetection                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+UART_ClrRtsValue                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_DeInit                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_Disable                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+UART_Enable                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+UART_FifoConfig                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+UART_GetAutoBaudCount                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_GetBaudrate                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_GetIntStatus                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_GetOverflowStatus                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_GetRxBusBusyStatus                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_GetRxFifoCount                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+UART_GetTxBusBusyStatus                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+UART_GetTxFifoCount                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_Init                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+UART_IntClear                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_IntMask                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+UART_Int_Callback_Install                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+UART_IrConfig                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_ReceiveData                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+UART_RxFifoClear                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_SendData                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+UART_SendDataBlock                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_SetBaudrate                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_SetDeglitchCount                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_SetRtsValue                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_SetRxDataLength                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_SetRxTimeoutValue                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+UART_SetTxDataLength                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_TxFifoClear                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_TxFreeRun                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+Update_SystemCoreClockWith_XTAL                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+WDT_ClearResetStatus                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_Disable                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_Enable                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_GetCounterValue                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_GetMatchValue                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_GetResetStatus                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_IntMask                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_Int_Callback_Install                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_ResetCounterValue                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_SetCompValue                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_Set_Clock                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WIFI_IPC_PUBLIC_IRQHandler_Wrapper                out/startup/interrupt.o
+WIFI_IRQHandler_Wrapper                           out/startup/interrupt.o
+XIP_SFlash_Erase                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_Erase_Need_Lock                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_Erase_Need_Lock_Ext                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+XIP_SFlash_Erase_With_Lock                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_Erase_With_Lock_Ext                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_GetDeviceId_Need_Lock                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_GetDeviceId_Need_Lock_Ext              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_GetJedecId_Need_Lock                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_GetJedecId_Need_Lock_Ext               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_GetUniqueId_Need_Lock                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_GetUniqueId_Need_Lock_Ext              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_Init                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_Opt_Enter                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_Opt_Exit                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_RCV_Enable_Need_Lock                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_RCV_Enable_With_Lock                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_Read                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_Read_Need_Lock                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_Read_Need_Lock_Ext                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+XIP_SFlash_Read_Via_Cache_Need_Lock               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+                                                  out/BSP_Common/partition/partition.o
+XIP_SFlash_Read_With_Lock                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_Read_With_Lock_Ext                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_State_Restore                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_State_Restore_Ext                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_State_Save                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_Write                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_Write_Need_Lock                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_Write_Need_Lock_Ext                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+XIP_SFlash_Write_With_Lock                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_Write_With_Lock_Ext                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+__Interrupt_Handlers                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+__StackTop                                        out/startup/GCC/entry.o
+__Vectors                                         out/startup/interrupt.o
+                                                  out/startup/GCC/entry.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+__adddf3                                          /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(adddf3.o)
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+                                                  out/BSP_Common/libc/atof.o
+__assert_func                                     out/BSP_Common/libc/common.o
+__bss_end__                                       out/startup/GCC/start_load.o
+__bss_start__                                     out/startup/GCC/start_load.o
+__clz_tab                                         /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clz.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_umoddi3.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_udivdi3.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clzsi2.o)
+__clzsi2                                          /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clzsi2.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatsidf.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(muldf3.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(divdf3.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(adddf3.o)
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+__ctypes                                          out/BSP_Common/libc/ctypes.o
+                                                  out/BSP_Common/libc/ctype_toupper.o
+                                                  out/BSP_Common/libc/ctype_tolower.o
+                                                  out/BSP_Common/libc/ctype_isxdigit.o
+                                                  out/BSP_Common/libc/ctype_isupper.o
+                                                  out/BSP_Common/libc/ctype_isspace.o
+                                                  out/BSP_Common/libc/ctype_ispunct.o
+                                                  out/BSP_Common/libc/ctype_isprint.o
+                                                  out/BSP_Common/libc/ctype_islower.o
+                                                  out/BSP_Common/libc/ctype_isgraph.o
+                                                  out/BSP_Common/libc/ctype_iscntrl.o
+                                                  out/BSP_Common/libc/ctype_isalpha.o
+                                                  out/BSP_Common/libc/ctype_isalnum.o
+__divdf3                                          /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(divdf3.o)
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/BSP_Common/libc/atof.o
+__dtcm_load_addr                                  out/startup/GCC/start_load.o
+__fixdfsi                                         /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(fixdfsi.o)
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+__fixunsdfsi                                      /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(fixunsdfsi.o)
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+__floatsidf                                       /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatsidf.o)
+                                                  out/BSP_Common/libc/atof.o
+__floatunsidf                                     /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+__freertos_irq_stack_top                          out/BSP_Common/FreeRTOS/port.o
+__global_pointer$                                 out/startup/GCC/entry.o
+__itcm_load_addr                                  out/startup/GCC/start_load.o
+__metal_after_main                                out/startup/GCC/entry.o
+__metal_chicken_bit                               out/startup/GCC/entry.o
+__muldf3                                          /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(muldf3.o)
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+                                                  out/BSP_Common/libc/atof.o
+__ram_data_end__                                  out/startup/GCC/start_load.o
+__ram_data_start__                                out/startup/GCC/start_load.o
+__ram_load_addr                                   out/startup/GCC/start_load.o
+__rand48_seed                                     out/BSP_Common/libc/lrand48.o
+                                                  out/BSP_Common/libc/srand48.o
+                                                  out/BSP_Common/libc/seed48.o
+                                                  out/BSP_Common/libc/mrand48.o
+__register_frame_info                             out/startup/GCC/entry.o
+__strxspn                                         out/BSP_Common/libc/strxspn.o
+                                                  out/BSP_Common/libc/strspn.o
+                                                  out/BSP_Common/libc/strpbrk.o
+                                                  out/BSP_Common/libc/strcspn.o
+__system_ram_data_end__                           out/startup/GCC/start_load.o
+__system_ram_data_start__                         out/startup/GCC/start_load.o
+__system_ram_load_addr                            out/startup/GCC/start_load.o
+__tcm_code_end__                                  out/startup/GCC/start_load.o
+__tcm_code_start__                                out/startup/GCC/start_load.o
+__tcm_data_end__                                  out/startup/GCC/start_load.o
+__tcm_data_start__                                out/startup/GCC/start_load.o
+__udivdi3                                         /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_udivdi3.o)
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Common/libc/vsnprintf.o
+__umoddi3                                         /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_umoddi3.o)
+                                                  out/BSP_Common/libc/vsnprintf.o
+_enter                                            out/startup/GCC/entry.o
+atof                                              out/BSP_Common/libc/atof.o
+atoi                                              out/BSP_Common/libc/atoi.o
+atol                                              out/BSP_Common/libc/atol.o
+atoll                                             out/BSP_Common/libc/atoll.o
+bfl_main                                          out/Examples/BLSP_Boot2/blsp_boot2.o
+bflb_bootrom_parse_bootheader                     out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+bflb_bootrom_parse_seg_header                     out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+bflb_crypt_auth_decrypt                           out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_auth_decrypt_do                        out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_decrypt                                out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_decrypt_do                             out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_deinit                                 out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_deinit_do                              out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_encrypt                                out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_encrypt_do                             out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_encrypt_tag                            out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_encrypt_tag_do                         out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_finish                                 out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_finish_do                              out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_init                                   out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_init_do                                out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_setadd                                 out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_setadd_do                              out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_setkey                                 out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_setkey_do                              out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_update                                 out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_update_do                              out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_dsa_decrypt_crt                              out/BSP_Common/cipher_suite/bflb_dsa.o
+bflb_dsa_init                                     out/BSP_Common/cipher_suite/bflb_dsa.o
+bflb_dsa_mexp_binary                              out/BSP_Common/cipher_suite/bflb_dsa.o
+bflb_dsa_mexp_mont                                out/BSP_Common/cipher_suite/bflb_dsa.o
+bflb_dsa_sign                                     out/BSP_Common/cipher_suite/bflb_dsa.o
+bflb_dsa_verify                                   out/BSP_Common/cipher_suite/bflb_dsa.o
+bflb_ecc_get_random_value                         out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdh_deinit                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdh_get_encrypt_key                         out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdh_get_public_key                          out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdh_init                                    out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdsa_deinit                                 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdsa_get_private_key                        out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdsa_get_public_key                         out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdsa_init                                   out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_parser.o
+bflb_ecdsa_sign                                   out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdsa_verify                                 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_parser.o
+bflb_eflash_loader_cmd_init                       out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+bflb_eflash_loader_cmd_process                    out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+bflb_eflash_loader_deinit_uart_gpio               out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+bflb_eflash_loader_deinit_uart_gpio_do            out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+bflb_eflash_loader_init_flash_gpio                out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+bflb_eflash_loader_init_uart_gpio                 out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+bflb_eflash_loader_main                           out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+bflb_eflash_loader_uart_change_rate               out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+bflb_eflash_loader_uart_deinit                    out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+bflb_eflash_loader_uart_handshake_poll            out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+bflb_eflash_loader_uart_init                      out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+bflb_eflash_loader_uart_recv                      out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+bflb_eflash_loader_uart_send                      out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+bflb_eflash_loader_usart_if_send                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+bflb_eflash_loader_usart_if_wait_tx_idle          out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+bflb_eflash_loader_usart_wait_tx_idle             out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+bflb_hash_deinit                                  out/BSP_Common/cipher_suite/bflb_hash.o
+bflb_hash_finish                                  out/BSP_Common/cipher_suite/bflb_hash.o
+bflb_hash_init                                    out/BSP_Common/cipher_suite/bflb_hash.o
+bflb_hash_start                                   out/BSP_Common/cipher_suite/bflb_hash.o
+bflb_hash_update                                  out/BSP_Common/cipher_suite/bflb_hash.o
+bflb_plat_uart_debug_port_set                     out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+bflb_platform_clear_time                          out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+bflb_platform_deinit                              out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/Examples/BLSP_Boot2/blsp_common.o
+bflb_platform_deinit_time                         out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+bflb_platform_deinit_uart_debug_gpio              out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_gpio.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_delay_ms                            out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+bflb_platform_dump                                out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_get_input                           out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_get_length                          out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_get_random                          out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_platform_get_time_ms                         out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+bflb_platform_get_time_us                         out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_init                                out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+bflb_platform_init_time                           out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_init_uart_debug_gpio                out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_gpio.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_print_set                           out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+bflb_platform_printc                              out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_printf                              out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+                                                  out/Examples/BLSP_Boot2/blsp_common.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+                                                  out/BSP_Common/xz/xz_port.o
+                                                  out/BSP_Common/cipher_suite/bflb_hash.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_platform_prints                              out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_printx                              out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_set_alarm_time                      out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_set_alarm_time_callback             out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_start_time                          out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_stop_time                           out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_uart_dbg_deinit                     out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_uart_dbg_init                       out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_usart_dbg_send                      out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+boot2ReadBuf                                      out/Examples/BLSP_Boot2/blsp_boot2.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+bootCpuCfg                                        out/Examples/BLSP_Boot2/blsp_boot2.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+                                                  out/Examples/BLSP_Boot2/blsp_common.o
+bootImgCfg                                        out/Examples/BLSP_Boot2/blsp_boot2.o
+                                                  out/Examples/BLSP_Boot2/blsp_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+                                                  out/Examples/BLSP_Boot2/blsp_common.o
+bootrom_read_boot_mode                            out/Examples/BLSP_Boot2/bflb_eflash_loader_gpio.o
+bsearch                                           out/BSP_Common/libc/bsearch.o
+calloc                                            out/BSP_Common/libc/stdlib.o
+chCRCHTalbe                                       out/BSP_Common/soft_crc/softcrc.o
+chCRCLTalbe                                       out/BSP_Common/soft_crc/softcrc.o
+clic_clear_pending                                out/startup/interrupt.o
+clic_csoft_handler_Wrapper                        out/startup/interrupt.o
+clic_disable_interrupt                            out/startup/interrupt.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+clic_enable_interrupt                             out/startup/interrupt.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+clic_get_cliccfg                                  out/startup/interrupt.o
+clic_get_intcfg                                   out/startup/interrupt.o
+clic_mext_handler_Wrapper                         out/startup/interrupt.o
+clic_msip_handler_Wrapper                         out/startup/interrupt.o
+clic_mtimer_handler_Wrapper                       out/startup/interrupt.o
+clic_set_cliccfg                                  out/startup/interrupt.o
+clic_set_intcfg                                   out/startup/interrupt.o
+clic_set_pending                                  out/startup/interrupt.o
+cpuCount                                          out/Examples/BLSP_Boot2/blsp_boot2.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+                                                  out/Examples/BLSP_Boot2/blsp_common.o
+crc32Tab                                          out/BSP_Common/soft_crc/softcrc.o
+                                                  out/BSP_Common/xz/xz_crc32.o
+eTaskGetState                                     out/3rdParty/FreeRTOS/Source/tasks.o
+eflash_loader_cmd_ack_buf                         out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+eflash_loader_readbuf                             out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+efuseCfg                                          out/Examples/BLSP_Boot2/blsp_boot2.o
+                                                  out/Examples/BLSP_Boot2/blsp_common.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_parser.o
+flag_mport                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sdu.o
+flashCfg                                          out/Examples/BLSP_Boot2/blsp_boot2.o
+                                                  out/Examples/BLSP_Boot2/blsp_common.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+fnmatch                                           out/BSP_Common/libc/fnmatch.o
+free                                              out/BSP_Common/libc/stdlib.o
+freertos_risc_v_trap_handler                      out/BSP_Common/FreeRTOS/portASM.o
+i2cIntCbfArra                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+isalnum                                           out/BSP_Common/libc/ctype_isalnum.o
+isalpha                                           out/BSP_Common/libc/ctype_isalpha.o
+isascii                                           out/BSP_Common/libc/ctype_isascii.o
+isblank                                           out/BSP_Common/libc/ctype_isblank.o
+iscntrl                                           out/BSP_Common/libc/ctype_iscntrl.o
+isdigit                                           out/BSP_Common/libc/ctype_isdigit.o
+isgraph                                           out/BSP_Common/libc/ctype_isgraph.o
+islower                                           out/BSP_Common/libc/ctype_islower.o
+isprint                                           out/BSP_Common/libc/ctype_isprint.o
+ispunct                                           out/BSP_Common/libc/ctype_ispunct.o
+isspace                                           out/BSP_Common/libc/ctype_isspace.o
+                                                  out/BSP_Common/libc/vsscanf.o
+                                                  out/BSP_Common/libc/strntoumax.o
+                                                  out/BSP_Common/libc/atof.o
+isupper                                           out/BSP_Common/libc/ctype_isupper.o
+isxdigit                                          out/BSP_Common/libc/ctype_isxdigit.o
+jrand48                                           out/BSP_Common/libc/jrand48.o
+                                                  out/BSP_Common/libc/nrand48.o
+                                                  out/BSP_Common/libc/mrand48.o
+                                                  out/BSP_Common/libc/lrand48.o
+lrand48                                           out/BSP_Common/libc/lrand48.o
+main                                              out/Examples/BLSP_Boot2/blsp_boot2.o
+                                                  out/startup/GCC/entry.o
+                                                  out/BSP_Common/partition/partition.o
+malloc                                            out/BSP_Common/libc/stdlib.o
+memccpy                                           out/BSP_Common/libc/memccpy.o
+memchr                                            out/BSP_Common/libc/memchr.o
+memcmp                                            out/BSP_Common/libc/memcmp.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+                                                  out/BSP_Common/partition/partition.o
+                                                  out/BSP_Common/libc/memmem.o
+memcpy                                            out/BSP_Common/libc/memcpy.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                                                  out/Examples/BLSP_Boot2/bflb_eflash_loader_cmds.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+                                                  out/BSP_Common/xz/xz_dec_lzma2.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+memmem                                            out/BSP_Common/libc/memmem.o
+                                                  out/BSP_Common/libc/strstr.o
+memmove                                           /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libc.a(lib_a-memmove-stub.o)
+                                                  out/BSP_Common/xz/xz_dec_lzma2.o
+memrchr                                           out/BSP_Common/libc/memrchr.o
+memset                                            out/BSP_Common/libc/memset.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_calib_data.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+                                                  out/BSP_Common/xz/xz_dec_lzma2.o
+                                                  out/BSP_Common/libc/strxspn.o
+                                                  out/BSP_Common/libc/strncpy.o
+                                                  out/BSP_Common/cipher_suite/bflb_hash.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+memswap                                           out/BSP_Common/libc/memswap.o
+                                                  out/BSP_Common/libc/qsort.o
+mfg_efuse_get_rf_cal_slots                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_is_macaddr_slot_empty                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_is_poweroffset_slot_empty               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_is_xtal_capcode_slot_empty              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_program                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_read                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_read_macaddr                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_read_poweroffset                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_read_xtal_capcode                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_set_rf_cal_slots                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_write_macaddr                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_write_macaddr_pre                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_write_poweroffset                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_write_poweroffset_pre                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_write_pre                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_write_xtal_capcode                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_write_xtal_capcode_pre                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mrand48                                           out/BSP_Common/libc/mrand48.o
+notch_p                                           out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+nrand48                                           out/BSP_Common/libc/nrand48.o
+pcQueueGetName                                    out/3rdParty/FreeRTOS/Source/queue.o
+pcTaskGetName                                     out/3rdParty/FreeRTOS/Source/tasks.o
+pcTimerGetName                                    out/3rdParty/FreeRTOS/Source/timers.o
+psMode                                            out/Examples/BLSP_Boot2/blsp_boot2.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_parser.o
+pullMachineTimerCompareRegister                   out/BSP_Common/FreeRTOS/port.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+pullMachineTimerCompareRegisterBase               out/BSP_Common/FreeRTOS/port.o
+pullNextTime                                      out/BSP_Common/FreeRTOS/port.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+pvPortMalloc                                      out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+pvTaskIncrementMutexHeldCount                     out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+pvTimerGetTimerID                                 out/3rdParty/FreeRTOS/Source/timers.o
+pxCurrentTCB                                      out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+pxPortInitialiseStack                             out/BSP_Common/FreeRTOS/portASM.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+qsort                                             out/BSP_Common/libc/qsort.o
+rand                                              out/BSP_Common/libc/lrand48.o
+random                                            out/BSP_Common/libc/lrand48.o
+realloc                                           out/BSP_Common/libc/stdlib.o
+rf_calib_data                                     out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_calib_data.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_config_bandwidth                           out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_fcal                                       out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_full_cal                                   out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_get_txgain_index                           out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_get_txgain_max                             out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_get_txgain_min                             out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_get_vco_freq_cw                            out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_get_vco_idac_cw                            out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_init                                       out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_init_calib_mem                             out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_calib_data.o
+rf_pri_init_fast                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_lo_acal                                    out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_notch_param                                out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_query_txgain_table                         out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_rccal                                      out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_restore_cal_reg                            out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_roscal                                     out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_tcal_glb                                   out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_tx_gain_comp                               out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_txcal                                      out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_update_dvga_os                             out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_update_param                               out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_update_power_offset                        out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_update_tcal_param                          out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_update_tx_power_offset                     out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_update_tx_power_offset_res                 out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_update_txgain_tempos                       out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_xtalfreq                                   out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rfc_apply_tx_dvga                                 out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rx_buf_index                                      out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+rx_buf_len                                        out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+sdio_GEN_CARD2HOST_INT                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sdu.o
+sdio_ioctl                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sdu.o
+secp256r1B                                        out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1Gx                                       out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1Gy                                       out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1InvR_N                                   out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1InvR_P                                   out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1N                                        out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1P                                        out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1PrimeN_N                                 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1PrimeN_P                                 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_1                                       out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_1M1                                     out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_1P1                                     out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_BAR2                                    out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_BAR3                                    out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_BAR4                                    out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_BAR8                                    out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_Gx                                      out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_Gy                                      out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_Zerox                                   out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_Zeroy                                   out/BSP_Common/cipher_suite/bflb_ecdsa.o
+seed48                                            out/BSP_Common/libc/seed48.o
+shaCtx                                            out/Examples/BLSP_Boot2/blsp_boot_parser.o
+                                                  out/Examples/BLSP_Boot2/blsp_media_boot.o
+simple_free                                       out/BSP_Common/xz/xz_port.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+                                                  out/BSP_Common/xz/xz_dec_lzma2.o
+simple_malloc                                     out/BSP_Common/xz/xz_port.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+                                                  out/BSP_Common/xz/xz_dec_lzma2.o
+simple_malloc_init                                out/BSP_Common/xz/xz_port.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+snprintf                                          out/BSP_Common/libc/snprintf.o
+sprintf                                           out/BSP_Common/libc/sprintf.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+srand                                             out/BSP_Common/libc/srand48.o
+srand48                                           out/BSP_Common/libc/srand48.o
+srandom                                           out/BSP_Common/libc/srand48.o
+sscanf                                            out/BSP_Common/libc/sscanf.o
+start_load                                        out/startup/GCC/start_load.o
+                                                  out/startup/GCC/entry.o
+strcasecmp                                        out/BSP_Common/libc/strcasecmp.o
+strcat                                            out/BSP_Common/libc/strcat.o
+strchr                                            out/BSP_Common/libc/strchr.o
+strcmp                                            out/BSP_Common/libc/strcmp.o
+strcpy                                            out/BSP_Common/libc/strcpy.o
+                                                  out/BSP_Common/libc/strcat.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+strcspn                                           out/BSP_Common/libc/strcspn.o
+strlcat                                           out/BSP_Common/libc/strlcat.o
+strlcpy                                           out/BSP_Common/libc/strlcpy.o
+strlen                                            out/BSP_Common/libc/strlen.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot2.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Common/partition/partition.o
+                                                  out/BSP_Common/libc/vsnprintf.o
+                                                  out/BSP_Common/libc/strstr.o
+                                                  out/BSP_Common/libc/strncat.o
+                                                  out/BSP_Common/libc/strlcat.o
+                                                  out/BSP_Common/libc/strcat.o
+                                                  out/BSP_Common/libc/atof.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+strncasecmp                                       out/BSP_Common/libc/strncasecmp.o
+strncat                                           out/BSP_Common/libc/strncat.o
+strncmp                                           out/BSP_Common/libc/strncmp.o
+strncpy                                           out/BSP_Common/libc/strncpy.o
+strnlen                                           out/BSP_Common/libc/strnlen.o
+strntof                                           out/BSP_Common/libc/atof.o
+strntoimax                                        out/BSP_Common/libc/strntoimax.o
+strntoumax                                        out/BSP_Common/libc/strntoumax.o
+                                                  out/BSP_Common/libc/vsscanf.o
+                                                  out/BSP_Common/libc/strtoumax.o
+                                                  out/BSP_Common/libc/strtoull.o
+                                                  out/BSP_Common/libc/strtoul.o
+                                                  out/BSP_Common/libc/strtoll.o
+                                                  out/BSP_Common/libc/strtol.o
+                                                  out/BSP_Common/libc/strtoimax.o
+                                                  out/BSP_Common/libc/strntoimax.o
+                                                  out/BSP_Common/libc/atoll.o
+                                                  out/BSP_Common/libc/atol.o
+                                                  out/BSP_Common/libc/atoi.o
+strpbrk                                           out/BSP_Common/libc/strpbrk.o
+                                                  out/BSP_Common/libc/strsep.o
+strrchr                                           out/BSP_Common/libc/strrchr.o
+strsep                                            out/BSP_Common/libc/strsep.o
+                                                  out/BSP_Common/libc/strtok_r.o
+strspn                                            out/BSP_Common/libc/strspn.o
+strstr                                            out/BSP_Common/libc/strstr.o
+strtof                                            out/BSP_Common/libc/common.o
+strtoimax                                         out/BSP_Common/libc/strtoimax.o
+strtok                                            out/BSP_Common/libc/strtok.o
+strtok_r                                          out/BSP_Common/libc/strtok_r.o
+                                                  out/BSP_Common/libc/strtok.o
+strtol                                            out/BSP_Common/libc/strtol.o
+strtoll                                           out/BSP_Common/libc/strtoll.o
+strtoul                                           out/BSP_Common/libc/strtoul.o
+strtoull                                          out/BSP_Common/libc/strtoull.o
+strtoumax                                         out/BSP_Common/libc/strtoumax.o
+system_bor_init                                   out/startup/system_bl602.o
+tcal_param                                        out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+timerIntCbfArra                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+tolower                                           out/BSP_Common/libc/ctype_tolower.o
+toupper                                           out/BSP_Common/libc/ctype_toupper.o
+                                                  out/BSP_Common/libc/strncasecmp.o
+                                                  out/BSP_Common/libc/strcasecmp.o
+tp_index                                          out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+ucQueueGetQueueType                               out/3rdParty/FreeRTOS/Source/queue.o
+ucStreamBufferGetStreamBufferType                 out/3rdParty/FreeRTOS/Source/stream_buffer.o
+ulTaskNotifyTake                                  out/3rdParty/FreeRTOS/Source/tasks.o
+ullNextTime                                       out/BSP_Common/FreeRTOS/port.o
+userHashIgnored                                   out/Examples/BLSP_Boot2/blsp_boot2.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_parser.o
+uxListRemove                                      out/3rdParty/FreeRTOS/Source/list.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+uxQueueGetQueueNumber                             out/3rdParty/FreeRTOS/Source/queue.o
+uxQueueMessagesWaiting                            out/3rdParty/FreeRTOS/Source/queue.o
+uxQueueMessagesWaitingFromISR                     out/3rdParty/FreeRTOS/Source/queue.o
+uxQueueSpacesAvailable                            out/3rdParty/FreeRTOS/Source/queue.o
+uxStreamBufferGetStreamBufferNumber               out/3rdParty/FreeRTOS/Source/stream_buffer.o
+uxTaskGetNumberOfTasks                            out/3rdParty/FreeRTOS/Source/tasks.o
+uxTaskGetSystemState                              out/3rdParty/FreeRTOS/Source/tasks.o
+uxTaskGetTaskNumber                               out/3rdParty/FreeRTOS/Source/tasks.o
+uxTaskPriorityGet                                 out/3rdParty/FreeRTOS/Source/tasks.o
+uxTaskPriorityGetFromISR                          out/3rdParty/FreeRTOS/Source/tasks.o
+uxTaskResetEventItemValue                         out/3rdParty/FreeRTOS/Source/tasks.o
+uxTimerGetTimerNumber                             out/3rdParty/FreeRTOS/Source/timers.o
+uxTimerIncrementsForOneTick                       out/BSP_Common/FreeRTOS/port.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+vApplicationGetIdleTaskMemory                     out/3rdParty/FreeRTOS/Source/tasks.o
+vApplicationGetTimerTaskMemory                    out/3rdParty/FreeRTOS/Source/timers.o
+vApplicationMallocFailedHook                      out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+vApplicationStackOverflowHook                     out/3rdParty/FreeRTOS/Source/tasks.o
+vApplicationTickHook                              out/3rdParty/FreeRTOS/Source/tasks.o
+vAssertCalled                                     out/BSP_Common/FreeRTOS/port.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+vListInitialise                                   out/3rdParty/FreeRTOS/Source/list.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+vListInitialiseItem                               out/3rdParty/FreeRTOS/Source/list.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+vListInsert                                       out/3rdParty/FreeRTOS/Source/list.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+vListInsertEnd                                    out/3rdParty/FreeRTOS/Source/list.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+vPortDefineHeapRegions                            out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+vPortEndScheduler                                 out/BSP_Common/FreeRTOS/port.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+vPortFree                                         out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+vPortGetHeapStats                                 out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+vPortSetupTimerInterrupt                          out/BSP_Common/FreeRTOS/port.o
+vQueueAddToRegistry                               out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+vQueueDelete                                      out/3rdParty/FreeRTOS/Source/queue.o
+vQueueSetQueueNumber                              out/3rdParty/FreeRTOS/Source/queue.o
+vQueueUnregisterQueue                             out/3rdParty/FreeRTOS/Source/queue.o
+vQueueWaitForMessageRestricted                    out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+vStreamBufferDelete                               out/3rdParty/FreeRTOS/Source/stream_buffer.o
+vStreamBufferSetStreamBufferNumber                out/3rdParty/FreeRTOS/Source/stream_buffer.o
+vTaskDelay                                        out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskDelayUntil                                   out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskDelete                                       out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskEndScheduler                                 out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskEnterCritical                                out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+vTaskExitCritical                                 out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+vTaskGetInfo                                      out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskInternalSetTimeOutState                      out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+vTaskList                                         out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskMissedYield                                  out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+vTaskNotifyGiveFromISR                            out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskPlaceOnEventList                             out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+vTaskPlaceOnEventListRestricted                   out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+vTaskPlaceOnUnorderedEventList                    out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskPriorityDisinheritAfterTimeout               out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+vTaskPrioritySet                                  out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskRemoveFromUnorderedEventList                 out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskResume                                       out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskSetTaskNumber                                out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskSetTimeOutState                              out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+vTaskStartScheduler                               out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskSuspend                                      out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskSuspendAll                                   out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+vTaskSwitchContext                                out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+vTimerSetReloadMode                               out/3rdParty/FreeRTOS/Source/timers.o
+vTimerSetTimerID                                  out/3rdParty/FreeRTOS/Source/timers.o
+vTimerSetTimerNumber                              out/3rdParty/FreeRTOS/Source/timers.o
+vsnprintf                                         out/BSP_Common/libc/vsnprintf.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Common/libc/vsprintf.o
+                                                  out/BSP_Common/libc/sprintf.o
+                                                  out/BSP_Common/libc/snprintf.o
+vsprintf                                          out/BSP_Common/libc/vsprintf.o
+vsscanf                                           out/BSP_Common/libc/vsscanf.o
+                                                  out/BSP_Common/libc/sscanf.o
+xISRStackTop                                      out/BSP_Common/FreeRTOS/port.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+xPortGetFreeHeapSize                              out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+xPortGetMinimumEverFreeHeapSize                   out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+xPortStartFirstTask                               out/BSP_Common/FreeRTOS/portASM.o
+                                                  out/BSP_Common/FreeRTOS/port.o
+xPortStartScheduler                               out/BSP_Common/FreeRTOS/port.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+xQueueCreateCountingSemaphore                     out/3rdParty/FreeRTOS/Source/queue.o
+xQueueCreateCountingSemaphoreStatic               out/3rdParty/FreeRTOS/Source/queue.o
+xQueueCreateMutex                                 out/3rdParty/FreeRTOS/Source/queue.o
+xQueueCreateMutexStatic                           out/3rdParty/FreeRTOS/Source/queue.o
+xQueueGenericCreate                               out/3rdParty/FreeRTOS/Source/queue.o
+xQueueGenericCreateStatic                         out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+xQueueGenericReset                                out/3rdParty/FreeRTOS/Source/queue.o
+xQueueGenericSend                                 out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+xQueueGenericSendFromISR                          out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+xQueueGetMutexHolder                              out/3rdParty/FreeRTOS/Source/queue.o
+xQueueGetMutexHolderFromISR                       out/3rdParty/FreeRTOS/Source/queue.o
+xQueueGiveFromISR                                 out/3rdParty/FreeRTOS/Source/queue.o
+xQueueGiveMutexRecursive                          out/3rdParty/FreeRTOS/Source/queue.o
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+xQueueIsQueueFullFromISR                          out/3rdParty/FreeRTOS/Source/queue.o
+xQueuePeek                                        out/3rdParty/FreeRTOS/Source/queue.o
+xQueuePeekFromISR                                 out/3rdParty/FreeRTOS/Source/queue.o
+xQueueReceive                                     out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+xQueueReceiveFromISR                              out/3rdParty/FreeRTOS/Source/queue.o
+xQueueRegistry                                    out/3rdParty/FreeRTOS/Source/queue.o
+xQueueSemaphoreTake                               out/3rdParty/FreeRTOS/Source/queue.o
+xQueueTakeMutexRecursive                          out/3rdParty/FreeRTOS/Source/queue.o
+xStreamBufferBytesAvailable                       out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferGenericCreate                        out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferGenericCreateStatic                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferIsEmpty                              out/3rdParty/FreeRTOS/Source/stream_buffer.o
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+xStreamBufferNextMessageLengthBytes               out/3rdParty/FreeRTOS/Source/stream_buffer.o
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+xStreamBufferReceiveFromISR                       out/3rdParty/FreeRTOS/Source/stream_buffer.o
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+xStreamBufferSendFromISR                          out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferSetTriggerLevel                      out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferSpacesAvailable                      out/3rdParty/FreeRTOS/Source/stream_buffer.o
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+xTaskCatchUpTicks                                 out/3rdParty/FreeRTOS/Source/tasks.o
+xTaskCheckForTimeOut                              out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+xTaskCreate                                       out/3rdParty/FreeRTOS/Source/tasks.o
+xTaskCreateStatic                                 out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+xTaskGenericNotify                                out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xTaskGenericNotifyFromISR                         out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xTaskGetCurrentTaskHandle                         out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
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+xTaskGetSchedulerState                            out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+xTaskGetTickCount                                 out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+xTaskGetTickCountFromISR                          out/3rdParty/FreeRTOS/Source/tasks.o
+xTaskIncrementTick                                out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+xTaskNotifyStateClear                             out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xTaskNotifyWait                                   out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xTaskPriorityDisinherit                           out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+xTaskPriorityInherit                              out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+xTaskRemoveFromEventList                          out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+xTaskResumeAll                                    out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+xTaskResumeFromISR                                out/3rdParty/FreeRTOS/Source/tasks.o
+xTimerCreate                                      out/3rdParty/FreeRTOS/Source/timers.o
+xTimerCreateStatic                                out/3rdParty/FreeRTOS/Source/timers.o
+xTimerCreateTimerTask                             out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+xTimerGenericCommand                              out/3rdParty/FreeRTOS/Source/timers.o
+xTimerGetExpiryTime                               out/3rdParty/FreeRTOS/Source/timers.o
+xTimerGetPeriod                                   out/3rdParty/FreeRTOS/Source/timers.o
+xTimerGetTimerDaemonTaskHandle                    out/3rdParty/FreeRTOS/Source/timers.o
+xTimerIsTimerActive                               out/3rdParty/FreeRTOS/Source/timers.o
+xTimerPendFunctionCall                            out/3rdParty/FreeRTOS/Source/timers.o
+xTimerPendFunctionCallFromISR                     out/3rdParty/FreeRTOS/Source/timers.o
+xtalType                                          out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+xtal_clk                                          out/Examples/BLSP_Boot2/bflb_eflash_loader_uart.o
+xz_crc32                                          out/BSP_Common/xz/xz_crc32.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+xz_crc32_init                                     out/BSP_Common/xz/xz_crc32.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+                                                  out/BSP_Common/xz/xz_decompress.o
+xz_dec_end                                        out/BSP_Common/xz/xz_dec_stream.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+                                                  out/BSP_Common/xz/xz_decompress.o
+xz_dec_init                                       out/BSP_Common/xz/xz_dec_stream.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+                                                  out/BSP_Common/xz/xz_decompress.o
+xz_dec_lzma2_create                               out/BSP_Common/xz/xz_dec_lzma2.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+xz_dec_lzma2_end                                  out/BSP_Common/xz/xz_dec_lzma2.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+xz_dec_lzma2_reset                                out/BSP_Common/xz/xz_dec_lzma2.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+xz_dec_lzma2_run                                  out/BSP_Common/xz/xz_dec_lzma2.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+xz_dec_reset                                      out/BSP_Common/xz/xz_dec_stream.o
+xz_dec_run                                        out/BSP_Common/xz/xz_dec_stream.o
+                                                  out/Examples/BLSP_Boot2/blsp_boot_decompress.o
+                                                  out/BSP_Common/xz/xz_decompress.o
+xz_uncompress_end                                 out/BSP_Common/xz/xz_decompress.o
+xz_uncompress_init                                out/BSP_Common/xz/xz_decompress.o
+xz_uncompress_stream                              out/BSP_Common/xz/xz_decompress.o
diff --git a/tools/bflb_flash_tool/chips/bl602/builtin_imgs/blsp_boot2_debug.bin b/tools/bflb_flash_tool/chips/bl602/builtin_imgs/blsp_boot2_debug.bin
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diff --git a/tools/bflb_flash_tool/chips/bl602/builtin_imgs/mfg/bl602_bl604_mfg_gu_932b317e_26m.bin b/tools/bflb_flash_tool/chips/bl602/builtin_imgs/mfg/bl602_bl604_mfg_gu_932b317e_26m.bin
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diff --git a/tools/bflb_flash_tool/chips/bl602/builtin_imgs/mfg/bl602_bl604_mfg_gu_932b317e_26m_autoboot.bin b/tools/bflb_flash_tool/chips/bl602/builtin_imgs/mfg/bl602_bl604_mfg_gu_932b317e_26m_autoboot.bin
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diff --git a/tools/bflb_flash_tool/chips/bl602/builtin_imgs/mfg/bl602_bl604_mfg_gu_932b317e_32m.bin b/tools/bflb_flash_tool/chips/bl602/builtin_imgs/mfg/bl602_bl604_mfg_gu_932b317e_32m.bin
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diff --git a/tools/bflb_flash_tool/chips/bl602/builtin_imgs/mfg/bl602_bl604_mfg_gu_932b317e_38p4m.bin b/tools/bflb_flash_tool/chips/bl602/builtin_imgs/mfg/bl602_bl604_mfg_gu_932b317e_38p4m.bin
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diff --git a/tools/bflb_flash_tool/chips/bl602/builtin_imgs/mfg/bl602_bl604_mfg_gu_932b317e_40m.bin b/tools/bflb_flash_tool/chips/bl602/builtin_imgs/mfg/bl602_bl604_mfg_gu_932b317e_40m.bin
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index 00000000..93bf8805
Binary files /dev/null and b/tools/bflb_flash_tool/chips/bl602/builtin_imgs/mfg/bl602_bl604_mfg_ram_932b317e_40m.bin differ
diff --git a/tools/bflb_flash_tool/chips/bl602/conf/ota.toml b/tools/bflb_flash_tool/chips/bl602/conf/ota.toml
new file mode 100644
index 00000000..a714ddf3
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/conf/ota.toml
@@ -0,0 +1,5 @@
+[ota]
+#max length of version_hardware is 15 bytes
+version_hardware = "BFL_Module_v1.1"
+#max length of version_software is 15 bytes
+version_software = "EVENT_V1.1.1"
diff --git a/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_24M.dts b/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_24M.dts
new file mode 100644
index 00000000..ee95aea9
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_24M.dts
@@ -0,0 +1,348 @@
+/dts-v1/;
+/include/ "bl602_base.dtsi";
+// version: 17
+// last_comp_version: 16
+// boot_cpuid_phys: 0x0
+
+/ {
+    model = "bl bl602 IOT board";
+    compatible = "bl,bl602-sample", "bl,bl602-common";
+    #address-cells = <0x1>;
+    #size-cells = <0x1>;
+    gpio {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        max_num = <40>;
+        gpio0 {                                  
+            status = "okay";                     
+            pin  = <5>;                          
+            feature = "led";                     
+            active = "Hi"; //Hi or Lo
+            mode = "blink"; //blink or hearbeat
+            time = <100>; //duration for this mode
+        };
+        gpio1 {                                  
+            status = "disable";                     
+            pin  = <6>;                          
+            feature = "led";                     
+            active = "Hi"; //Hi or Lo
+            mode = "blink"; //blink or hearbeat
+            time = <100>; //duration for this mode
+        };
+        gpio2 {
+            status = "okay";
+            pin = <2>;
+            feature = "button";
+            active = "Hi";
+            mode = "multipress";
+            button {
+                debounce = <10>;
+                short_press_ms {
+                    start = <100>;
+                    end = <3000>;
+                    kevent = <2>;
+                };
+                long_press_ms {
+                    start = <6000>;
+                    end = <10000>;
+                    kevent = <3>;
+                };
+                longlong_press_ms {
+                    start = <15000>;
+                    kevent = <4>;
+                };
+                trig_level = "Hi";
+            };
+            hbn_use = "disable";
+        };
+    };
+    i2s {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        i2s@40017000 {
+            status = "okay";
+            compatible = "bl602_i2s";
+            reg = <0x40017000 0x100>;
+            mclk_only = "okay";
+            pin {
+                mclk = <11>;
+            };
+        };
+        i2s@40017100 {
+            status = "okay";
+            compatible = "bl602_i2s";
+            reg = <0x40017100 0x100>;
+            mclk_only = "disable";
+            pin {
+                bclk = <12>;
+                fs = <29>;
+                do = <30>;
+                di = <31>;
+            };
+        };
+    };
+    i2c {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        i2c@40011000 {
+            status = "okay";
+            compatible = "bl602_i2c";
+            reg = <0x40011000 0x100>;
+            pin {
+                scl = <32>;
+                sda = <13>;
+            };
+            devices {
+                list_addr = <0x18 0x21>;
+                list_driver = "i2c_es8311", "i2c_gc0308>";
+            };
+        };
+        i2c@40011100 {
+            status = "disable";
+            compatible = "bl602_i2c";
+            reg = <0x40011100 0x100>;
+            pin {
+                /*empty here*/
+            };
+        };
+    };
+    timer {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        timer@40014000 {
+            status = "disable";
+            compatible = "bl602_timer";
+            reg = <0x40014000 0x100>;
+        };
+        timer@40014100 {
+            status = "disable";
+            compatible = "bl602_timer";
+            reg = <0x40014100 0x100>;
+        };
+    };
+    pwm {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        pwm@4000A420 {
+            status = "okay";
+            compatible = "bl602_pwm";
+            reg = <0x4000A420 0x20>;
+            path = "/dev/pwm0";
+            id = <0>;
+            pin = <0>;
+            freq = <800000>;
+            duty = <50>;
+        };
+        pwm@4000A440 {
+            status = "disable";
+            reg = <0x4000A440 0x20>;
+            path = "/dev/pwm1";
+            id = <1>;
+            pin = <1>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A460 {
+            status = "disable";
+            reg = <0x4000A460 0x20>;
+            path = "/dev/pwm2";
+            id = <2>;
+            pin = <2>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A480 {
+            status = "disable";
+            reg = <0x4000A480 0x20>;
+            path = "/dev/pwm3";
+            id = <3>;
+            pin = <3>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A4A0 {
+            status = "disable";
+            reg = <0x4000A4A0 0x20>;
+            path = "/dev/pwm4";
+            id = <4>;
+            pin = <4>;
+            freq = <5000>;
+            duty = <50>;
+        };
+    };
+    ir {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ctrltype = <0>;
+        tx {
+            status = "disable";
+            pin = <11>;         // only support 11
+            mode = "NEC";       // NEC,ExtenedNEC,RC5,SWM
+            interval = <100>;   // ms
+            active_mode = "Hi"; //Hi,Lo
+        };
+        rx {
+            status = "okay";
+            pin = <12>;         // only support 12 13
+            mode = "NEC";       // NEC,ExtenedNEC,RC5,SWM
+            active_mode = "Hi"; //Hi,Lo
+            data_check = <2>;   //bit 0:check cmd, bit 1:check addr
+        };
+    };
+    uart {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        uart@4000A000 {
+            status = "okay";
+            id = <0>;
+            compatible = "bl602_uart";
+            path = "/dev/ttyS0";
+            baudrate = <2000000>;
+            pin {
+                rx = <7>;
+                tx = <16>;
+            };
+            buf_size {
+                rx_size = <512>;
+                tx_size = <512>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+        uart@4000A100 {
+            status = "okay";
+            id = <1>;
+            compatible = "bl602_uart";
+            path = "/dev/ttyS1";
+            baudrate = <115200>;
+            pin {
+                rx = <3>;
+                tx = <4>;
+            };
+            buf_size {
+                rx_size = <512>;
+                tx_size = <512>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+    };
+    spi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        spi@4000F000 {
+            status = "okay";         /* okay disable */
+            mode = "master";
+            reg = <0x4000F000 0x100>;   /* 4KB */
+            path = "/dev/spi0";
+            port = <0>;
+            polar_phase = <1>;                 /* 0,1,2,3 */
+            freq = <6000000>;
+            pin {
+                clk = <3>;
+                cs = <2>;
+                mosi = <1>;
+                miso = <0>;
+            };
+            dma_cfg {
+                tx_dma_ch = <2>;
+                rx_dma_ch = <3>;
+            };
+        };
+    };
+    gpip {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        adc_key {
+            status = "disable";
+            pin = <9>;
+            interrupt  = <3>;
+            key_vol = <0 100 400 300 500>;
+            key_pcb = "SW1", "SW2", "SW3", "SW4","SW5";
+            key_event = "Usr1", "Usr2", "Start", "Up", "Down";
+            key_raw = <1 2 3 4 5>;
+        };
+    };
+    qspi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        qspi@4000A000 {
+            status = "disable";
+            reg = <0x4000A000 0x1000>;/* 4KB */
+        };
+    };
+    wifi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        region {
+            country_code = <86>;
+        };
+        mac {
+            mode = "MBF";
+            sta_mac_addr = [C8 43 57 82 73 40];
+            ap_mac_addr = [C8 43 57 82 73 02];
+        };
+        sta {
+            ssid = "yourssid";
+            pwd = "yourapssword";
+            auto_connect_enable = <0>;
+        };
+        ap {
+            ssid = "bl_test_005";
+            pwd = "12345678";
+            ap_channel = <11>;
+            auto_chan_detect = "disable";
+        };
+        brd_rf {
+            xtal_mode = "MF";
+            xtal = <36 36 0 60 60>;
+            /*
+            pwr_table = <   4 3 3 186
+                            4 3 4 176
+                            4 3 5 167
+                            3 3 0 159
+                            3 3 1 149
+                            3 3 2 140
+                            3 3 3 129
+                            3 3 4 119
+                            3 3 5 110
+                            2 3 0 101
+                            2 3 1 91
+                            2 3 2 82
+                            2 3 3 72
+                            2 3 4 62
+                            2 3 5 52
+                            1 3 3 10>;
+            */
+            pwr_mode = "bf";//B: only use power offset in EFUSE; b: use power offset in EFUSE with incremental mode; F: only use power offset in Flash; f: use power offset in Flash with incremental mode
+            pwr_table_11b = <20 20 20 18>;//1Mbps 2Mbps 5.5Mbps 11Mbps
+            pwr_table_11g = <18 18 18 18 18 18 14 14>; //6Mbps 9Mbps 12Mbps 18MBps 24Mbps 36Mbps 48Mbps 54Mbps
+            pwr_table_11n = <18 18 18 18 18 16 14 14>; //MCS0 MCS1 MCS2 MCS3 MCS4 MCS5 MCS6 MCS7
+            pwr_offset = <10 10 10 10 10 10 10 10 10 10 10 10 10 10>;//due to the limit of current DTC, negative value is used. So we work around by adding all the poweroffset with 10. so 8 represents -2; 10 represents 0; 13 represents 3
+        };
+        rf_temp {
+            en_tcal = <0>;
+            linear_or_follow = <1>;
+            Tchannels       = <2412 2427 2442 2457 2472>;
+            Tchannel_os     = <180  168  163  160  157>;
+            Tchannel_os_low = <199  186  170  165  160>;
+            Troom_os        = <255>;
+            //negative value is NOT supported. So we use '256' for 0, '255' for -1, '257' for 1,'511' for 256
+        };
+    };
+    bluetooth {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        brd_rf {
+            pwr_table_ble = <13>;  //range:-3~15dbm; if set -3, please set 253 here
+        };
+    };
+};
diff --git a/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_26M.dts b/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_26M.dts
new file mode 100644
index 00000000..ee95aea9
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_26M.dts
@@ -0,0 +1,348 @@
+/dts-v1/;
+/include/ "bl602_base.dtsi";
+// version: 17
+// last_comp_version: 16
+// boot_cpuid_phys: 0x0
+
+/ {
+    model = "bl bl602 IOT board";
+    compatible = "bl,bl602-sample", "bl,bl602-common";
+    #address-cells = <0x1>;
+    #size-cells = <0x1>;
+    gpio {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        max_num = <40>;
+        gpio0 {                                  
+            status = "okay";                     
+            pin  = <5>;                          
+            feature = "led";                     
+            active = "Hi"; //Hi or Lo
+            mode = "blink"; //blink or hearbeat
+            time = <100>; //duration for this mode
+        };
+        gpio1 {                                  
+            status = "disable";                     
+            pin  = <6>;                          
+            feature = "led";                     
+            active = "Hi"; //Hi or Lo
+            mode = "blink"; //blink or hearbeat
+            time = <100>; //duration for this mode
+        };
+        gpio2 {
+            status = "okay";
+            pin = <2>;
+            feature = "button";
+            active = "Hi";
+            mode = "multipress";
+            button {
+                debounce = <10>;
+                short_press_ms {
+                    start = <100>;
+                    end = <3000>;
+                    kevent = <2>;
+                };
+                long_press_ms {
+                    start = <6000>;
+                    end = <10000>;
+                    kevent = <3>;
+                };
+                longlong_press_ms {
+                    start = <15000>;
+                    kevent = <4>;
+                };
+                trig_level = "Hi";
+            };
+            hbn_use = "disable";
+        };
+    };
+    i2s {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        i2s@40017000 {
+            status = "okay";
+            compatible = "bl602_i2s";
+            reg = <0x40017000 0x100>;
+            mclk_only = "okay";
+            pin {
+                mclk = <11>;
+            };
+        };
+        i2s@40017100 {
+            status = "okay";
+            compatible = "bl602_i2s";
+            reg = <0x40017100 0x100>;
+            mclk_only = "disable";
+            pin {
+                bclk = <12>;
+                fs = <29>;
+                do = <30>;
+                di = <31>;
+            };
+        };
+    };
+    i2c {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        i2c@40011000 {
+            status = "okay";
+            compatible = "bl602_i2c";
+            reg = <0x40011000 0x100>;
+            pin {
+                scl = <32>;
+                sda = <13>;
+            };
+            devices {
+                list_addr = <0x18 0x21>;
+                list_driver = "i2c_es8311", "i2c_gc0308>";
+            };
+        };
+        i2c@40011100 {
+            status = "disable";
+            compatible = "bl602_i2c";
+            reg = <0x40011100 0x100>;
+            pin {
+                /*empty here*/
+            };
+        };
+    };
+    timer {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        timer@40014000 {
+            status = "disable";
+            compatible = "bl602_timer";
+            reg = <0x40014000 0x100>;
+        };
+        timer@40014100 {
+            status = "disable";
+            compatible = "bl602_timer";
+            reg = <0x40014100 0x100>;
+        };
+    };
+    pwm {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        pwm@4000A420 {
+            status = "okay";
+            compatible = "bl602_pwm";
+            reg = <0x4000A420 0x20>;
+            path = "/dev/pwm0";
+            id = <0>;
+            pin = <0>;
+            freq = <800000>;
+            duty = <50>;
+        };
+        pwm@4000A440 {
+            status = "disable";
+            reg = <0x4000A440 0x20>;
+            path = "/dev/pwm1";
+            id = <1>;
+            pin = <1>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A460 {
+            status = "disable";
+            reg = <0x4000A460 0x20>;
+            path = "/dev/pwm2";
+            id = <2>;
+            pin = <2>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A480 {
+            status = "disable";
+            reg = <0x4000A480 0x20>;
+            path = "/dev/pwm3";
+            id = <3>;
+            pin = <3>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A4A0 {
+            status = "disable";
+            reg = <0x4000A4A0 0x20>;
+            path = "/dev/pwm4";
+            id = <4>;
+            pin = <4>;
+            freq = <5000>;
+            duty = <50>;
+        };
+    };
+    ir {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ctrltype = <0>;
+        tx {
+            status = "disable";
+            pin = <11>;         // only support 11
+            mode = "NEC";       // NEC,ExtenedNEC,RC5,SWM
+            interval = <100>;   // ms
+            active_mode = "Hi"; //Hi,Lo
+        };
+        rx {
+            status = "okay";
+            pin = <12>;         // only support 12 13
+            mode = "NEC";       // NEC,ExtenedNEC,RC5,SWM
+            active_mode = "Hi"; //Hi,Lo
+            data_check = <2>;   //bit 0:check cmd, bit 1:check addr
+        };
+    };
+    uart {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        uart@4000A000 {
+            status = "okay";
+            id = <0>;
+            compatible = "bl602_uart";
+            path = "/dev/ttyS0";
+            baudrate = <2000000>;
+            pin {
+                rx = <7>;
+                tx = <16>;
+            };
+            buf_size {
+                rx_size = <512>;
+                tx_size = <512>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+        uart@4000A100 {
+            status = "okay";
+            id = <1>;
+            compatible = "bl602_uart";
+            path = "/dev/ttyS1";
+            baudrate = <115200>;
+            pin {
+                rx = <3>;
+                tx = <4>;
+            };
+            buf_size {
+                rx_size = <512>;
+                tx_size = <512>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+    };
+    spi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        spi@4000F000 {
+            status = "okay";         /* okay disable */
+            mode = "master";
+            reg = <0x4000F000 0x100>;   /* 4KB */
+            path = "/dev/spi0";
+            port = <0>;
+            polar_phase = <1>;                 /* 0,1,2,3 */
+            freq = <6000000>;
+            pin {
+                clk = <3>;
+                cs = <2>;
+                mosi = <1>;
+                miso = <0>;
+            };
+            dma_cfg {
+                tx_dma_ch = <2>;
+                rx_dma_ch = <3>;
+            };
+        };
+    };
+    gpip {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        adc_key {
+            status = "disable";
+            pin = <9>;
+            interrupt  = <3>;
+            key_vol = <0 100 400 300 500>;
+            key_pcb = "SW1", "SW2", "SW3", "SW4","SW5";
+            key_event = "Usr1", "Usr2", "Start", "Up", "Down";
+            key_raw = <1 2 3 4 5>;
+        };
+    };
+    qspi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        qspi@4000A000 {
+            status = "disable";
+            reg = <0x4000A000 0x1000>;/* 4KB */
+        };
+    };
+    wifi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        region {
+            country_code = <86>;
+        };
+        mac {
+            mode = "MBF";
+            sta_mac_addr = [C8 43 57 82 73 40];
+            ap_mac_addr = [C8 43 57 82 73 02];
+        };
+        sta {
+            ssid = "yourssid";
+            pwd = "yourapssword";
+            auto_connect_enable = <0>;
+        };
+        ap {
+            ssid = "bl_test_005";
+            pwd = "12345678";
+            ap_channel = <11>;
+            auto_chan_detect = "disable";
+        };
+        brd_rf {
+            xtal_mode = "MF";
+            xtal = <36 36 0 60 60>;
+            /*
+            pwr_table = <   4 3 3 186
+                            4 3 4 176
+                            4 3 5 167
+                            3 3 0 159
+                            3 3 1 149
+                            3 3 2 140
+                            3 3 3 129
+                            3 3 4 119
+                            3 3 5 110
+                            2 3 0 101
+                            2 3 1 91
+                            2 3 2 82
+                            2 3 3 72
+                            2 3 4 62
+                            2 3 5 52
+                            1 3 3 10>;
+            */
+            pwr_mode = "bf";//B: only use power offset in EFUSE; b: use power offset in EFUSE with incremental mode; F: only use power offset in Flash; f: use power offset in Flash with incremental mode
+            pwr_table_11b = <20 20 20 18>;//1Mbps 2Mbps 5.5Mbps 11Mbps
+            pwr_table_11g = <18 18 18 18 18 18 14 14>; //6Mbps 9Mbps 12Mbps 18MBps 24Mbps 36Mbps 48Mbps 54Mbps
+            pwr_table_11n = <18 18 18 18 18 16 14 14>; //MCS0 MCS1 MCS2 MCS3 MCS4 MCS5 MCS6 MCS7
+            pwr_offset = <10 10 10 10 10 10 10 10 10 10 10 10 10 10>;//due to the limit of current DTC, negative value is used. So we work around by adding all the poweroffset with 10. so 8 represents -2; 10 represents 0; 13 represents 3
+        };
+        rf_temp {
+            en_tcal = <0>;
+            linear_or_follow = <1>;
+            Tchannels       = <2412 2427 2442 2457 2472>;
+            Tchannel_os     = <180  168  163  160  157>;
+            Tchannel_os_low = <199  186  170  165  160>;
+            Troom_os        = <255>;
+            //negative value is NOT supported. So we use '256' for 0, '255' for -1, '257' for 1,'511' for 256
+        };
+    };
+    bluetooth {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        brd_rf {
+            pwr_table_ble = <13>;  //range:-3~15dbm; if set -3, please set 253 here
+        };
+    };
+};
diff --git a/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_32M.dts b/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_32M.dts
new file mode 100644
index 00000000..ee95aea9
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_32M.dts
@@ -0,0 +1,348 @@
+/dts-v1/;
+/include/ "bl602_base.dtsi";
+// version: 17
+// last_comp_version: 16
+// boot_cpuid_phys: 0x0
+
+/ {
+    model = "bl bl602 IOT board";
+    compatible = "bl,bl602-sample", "bl,bl602-common";
+    #address-cells = <0x1>;
+    #size-cells = <0x1>;
+    gpio {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        max_num = <40>;
+        gpio0 {                                  
+            status = "okay";                     
+            pin  = <5>;                          
+            feature = "led";                     
+            active = "Hi"; //Hi or Lo
+            mode = "blink"; //blink or hearbeat
+            time = <100>; //duration for this mode
+        };
+        gpio1 {                                  
+            status = "disable";                     
+            pin  = <6>;                          
+            feature = "led";                     
+            active = "Hi"; //Hi or Lo
+            mode = "blink"; //blink or hearbeat
+            time = <100>; //duration for this mode
+        };
+        gpio2 {
+            status = "okay";
+            pin = <2>;
+            feature = "button";
+            active = "Hi";
+            mode = "multipress";
+            button {
+                debounce = <10>;
+                short_press_ms {
+                    start = <100>;
+                    end = <3000>;
+                    kevent = <2>;
+                };
+                long_press_ms {
+                    start = <6000>;
+                    end = <10000>;
+                    kevent = <3>;
+                };
+                longlong_press_ms {
+                    start = <15000>;
+                    kevent = <4>;
+                };
+                trig_level = "Hi";
+            };
+            hbn_use = "disable";
+        };
+    };
+    i2s {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        i2s@40017000 {
+            status = "okay";
+            compatible = "bl602_i2s";
+            reg = <0x40017000 0x100>;
+            mclk_only = "okay";
+            pin {
+                mclk = <11>;
+            };
+        };
+        i2s@40017100 {
+            status = "okay";
+            compatible = "bl602_i2s";
+            reg = <0x40017100 0x100>;
+            mclk_only = "disable";
+            pin {
+                bclk = <12>;
+                fs = <29>;
+                do = <30>;
+                di = <31>;
+            };
+        };
+    };
+    i2c {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        i2c@40011000 {
+            status = "okay";
+            compatible = "bl602_i2c";
+            reg = <0x40011000 0x100>;
+            pin {
+                scl = <32>;
+                sda = <13>;
+            };
+            devices {
+                list_addr = <0x18 0x21>;
+                list_driver = "i2c_es8311", "i2c_gc0308>";
+            };
+        };
+        i2c@40011100 {
+            status = "disable";
+            compatible = "bl602_i2c";
+            reg = <0x40011100 0x100>;
+            pin {
+                /*empty here*/
+            };
+        };
+    };
+    timer {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        timer@40014000 {
+            status = "disable";
+            compatible = "bl602_timer";
+            reg = <0x40014000 0x100>;
+        };
+        timer@40014100 {
+            status = "disable";
+            compatible = "bl602_timer";
+            reg = <0x40014100 0x100>;
+        };
+    };
+    pwm {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        pwm@4000A420 {
+            status = "okay";
+            compatible = "bl602_pwm";
+            reg = <0x4000A420 0x20>;
+            path = "/dev/pwm0";
+            id = <0>;
+            pin = <0>;
+            freq = <800000>;
+            duty = <50>;
+        };
+        pwm@4000A440 {
+            status = "disable";
+            reg = <0x4000A440 0x20>;
+            path = "/dev/pwm1";
+            id = <1>;
+            pin = <1>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A460 {
+            status = "disable";
+            reg = <0x4000A460 0x20>;
+            path = "/dev/pwm2";
+            id = <2>;
+            pin = <2>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A480 {
+            status = "disable";
+            reg = <0x4000A480 0x20>;
+            path = "/dev/pwm3";
+            id = <3>;
+            pin = <3>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A4A0 {
+            status = "disable";
+            reg = <0x4000A4A0 0x20>;
+            path = "/dev/pwm4";
+            id = <4>;
+            pin = <4>;
+            freq = <5000>;
+            duty = <50>;
+        };
+    };
+    ir {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ctrltype = <0>;
+        tx {
+            status = "disable";
+            pin = <11>;         // only support 11
+            mode = "NEC";       // NEC,ExtenedNEC,RC5,SWM
+            interval = <100>;   // ms
+            active_mode = "Hi"; //Hi,Lo
+        };
+        rx {
+            status = "okay";
+            pin = <12>;         // only support 12 13
+            mode = "NEC";       // NEC,ExtenedNEC,RC5,SWM
+            active_mode = "Hi"; //Hi,Lo
+            data_check = <2>;   //bit 0:check cmd, bit 1:check addr
+        };
+    };
+    uart {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        uart@4000A000 {
+            status = "okay";
+            id = <0>;
+            compatible = "bl602_uart";
+            path = "/dev/ttyS0";
+            baudrate = <2000000>;
+            pin {
+                rx = <7>;
+                tx = <16>;
+            };
+            buf_size {
+                rx_size = <512>;
+                tx_size = <512>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+        uart@4000A100 {
+            status = "okay";
+            id = <1>;
+            compatible = "bl602_uart";
+            path = "/dev/ttyS1";
+            baudrate = <115200>;
+            pin {
+                rx = <3>;
+                tx = <4>;
+            };
+            buf_size {
+                rx_size = <512>;
+                tx_size = <512>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+    };
+    spi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        spi@4000F000 {
+            status = "okay";         /* okay disable */
+            mode = "master";
+            reg = <0x4000F000 0x100>;   /* 4KB */
+            path = "/dev/spi0";
+            port = <0>;
+            polar_phase = <1>;                 /* 0,1,2,3 */
+            freq = <6000000>;
+            pin {
+                clk = <3>;
+                cs = <2>;
+                mosi = <1>;
+                miso = <0>;
+            };
+            dma_cfg {
+                tx_dma_ch = <2>;
+                rx_dma_ch = <3>;
+            };
+        };
+    };
+    gpip {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        adc_key {
+            status = "disable";
+            pin = <9>;
+            interrupt  = <3>;
+            key_vol = <0 100 400 300 500>;
+            key_pcb = "SW1", "SW2", "SW3", "SW4","SW5";
+            key_event = "Usr1", "Usr2", "Start", "Up", "Down";
+            key_raw = <1 2 3 4 5>;
+        };
+    };
+    qspi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        qspi@4000A000 {
+            status = "disable";
+            reg = <0x4000A000 0x1000>;/* 4KB */
+        };
+    };
+    wifi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        region {
+            country_code = <86>;
+        };
+        mac {
+            mode = "MBF";
+            sta_mac_addr = [C8 43 57 82 73 40];
+            ap_mac_addr = [C8 43 57 82 73 02];
+        };
+        sta {
+            ssid = "yourssid";
+            pwd = "yourapssword";
+            auto_connect_enable = <0>;
+        };
+        ap {
+            ssid = "bl_test_005";
+            pwd = "12345678";
+            ap_channel = <11>;
+            auto_chan_detect = "disable";
+        };
+        brd_rf {
+            xtal_mode = "MF";
+            xtal = <36 36 0 60 60>;
+            /*
+            pwr_table = <   4 3 3 186
+                            4 3 4 176
+                            4 3 5 167
+                            3 3 0 159
+                            3 3 1 149
+                            3 3 2 140
+                            3 3 3 129
+                            3 3 4 119
+                            3 3 5 110
+                            2 3 0 101
+                            2 3 1 91
+                            2 3 2 82
+                            2 3 3 72
+                            2 3 4 62
+                            2 3 5 52
+                            1 3 3 10>;
+            */
+            pwr_mode = "bf";//B: only use power offset in EFUSE; b: use power offset in EFUSE with incremental mode; F: only use power offset in Flash; f: use power offset in Flash with incremental mode
+            pwr_table_11b = <20 20 20 18>;//1Mbps 2Mbps 5.5Mbps 11Mbps
+            pwr_table_11g = <18 18 18 18 18 18 14 14>; //6Mbps 9Mbps 12Mbps 18MBps 24Mbps 36Mbps 48Mbps 54Mbps
+            pwr_table_11n = <18 18 18 18 18 16 14 14>; //MCS0 MCS1 MCS2 MCS3 MCS4 MCS5 MCS6 MCS7
+            pwr_offset = <10 10 10 10 10 10 10 10 10 10 10 10 10 10>;//due to the limit of current DTC, negative value is used. So we work around by adding all the poweroffset with 10. so 8 represents -2; 10 represents 0; 13 represents 3
+        };
+        rf_temp {
+            en_tcal = <0>;
+            linear_or_follow = <1>;
+            Tchannels       = <2412 2427 2442 2457 2472>;
+            Tchannel_os     = <180  168  163  160  157>;
+            Tchannel_os_low = <199  186  170  165  160>;
+            Troom_os        = <255>;
+            //negative value is NOT supported. So we use '256' for 0, '255' for -1, '257' for 1,'511' for 256
+        };
+    };
+    bluetooth {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        brd_rf {
+            pwr_table_ble = <13>;  //range:-3~15dbm; if set -3, please set 253 here
+        };
+    };
+};
diff --git a/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_38.4M.dts b/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_38.4M.dts
new file mode 100644
index 00000000..ee95aea9
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_38.4M.dts
@@ -0,0 +1,348 @@
+/dts-v1/;
+/include/ "bl602_base.dtsi";
+// version: 17
+// last_comp_version: 16
+// boot_cpuid_phys: 0x0
+
+/ {
+    model = "bl bl602 IOT board";
+    compatible = "bl,bl602-sample", "bl,bl602-common";
+    #address-cells = <0x1>;
+    #size-cells = <0x1>;
+    gpio {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        max_num = <40>;
+        gpio0 {                                  
+            status = "okay";                     
+            pin  = <5>;                          
+            feature = "led";                     
+            active = "Hi"; //Hi or Lo
+            mode = "blink"; //blink or hearbeat
+            time = <100>; //duration for this mode
+        };
+        gpio1 {                                  
+            status = "disable";                     
+            pin  = <6>;                          
+            feature = "led";                     
+            active = "Hi"; //Hi or Lo
+            mode = "blink"; //blink or hearbeat
+            time = <100>; //duration for this mode
+        };
+        gpio2 {
+            status = "okay";
+            pin = <2>;
+            feature = "button";
+            active = "Hi";
+            mode = "multipress";
+            button {
+                debounce = <10>;
+                short_press_ms {
+                    start = <100>;
+                    end = <3000>;
+                    kevent = <2>;
+                };
+                long_press_ms {
+                    start = <6000>;
+                    end = <10000>;
+                    kevent = <3>;
+                };
+                longlong_press_ms {
+                    start = <15000>;
+                    kevent = <4>;
+                };
+                trig_level = "Hi";
+            };
+            hbn_use = "disable";
+        };
+    };
+    i2s {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        i2s@40017000 {
+            status = "okay";
+            compatible = "bl602_i2s";
+            reg = <0x40017000 0x100>;
+            mclk_only = "okay";
+            pin {
+                mclk = <11>;
+            };
+        };
+        i2s@40017100 {
+            status = "okay";
+            compatible = "bl602_i2s";
+            reg = <0x40017100 0x100>;
+            mclk_only = "disable";
+            pin {
+                bclk = <12>;
+                fs = <29>;
+                do = <30>;
+                di = <31>;
+            };
+        };
+    };
+    i2c {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        i2c@40011000 {
+            status = "okay";
+            compatible = "bl602_i2c";
+            reg = <0x40011000 0x100>;
+            pin {
+                scl = <32>;
+                sda = <13>;
+            };
+            devices {
+                list_addr = <0x18 0x21>;
+                list_driver = "i2c_es8311", "i2c_gc0308>";
+            };
+        };
+        i2c@40011100 {
+            status = "disable";
+            compatible = "bl602_i2c";
+            reg = <0x40011100 0x100>;
+            pin {
+                /*empty here*/
+            };
+        };
+    };
+    timer {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        timer@40014000 {
+            status = "disable";
+            compatible = "bl602_timer";
+            reg = <0x40014000 0x100>;
+        };
+        timer@40014100 {
+            status = "disable";
+            compatible = "bl602_timer";
+            reg = <0x40014100 0x100>;
+        };
+    };
+    pwm {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        pwm@4000A420 {
+            status = "okay";
+            compatible = "bl602_pwm";
+            reg = <0x4000A420 0x20>;
+            path = "/dev/pwm0";
+            id = <0>;
+            pin = <0>;
+            freq = <800000>;
+            duty = <50>;
+        };
+        pwm@4000A440 {
+            status = "disable";
+            reg = <0x4000A440 0x20>;
+            path = "/dev/pwm1";
+            id = <1>;
+            pin = <1>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A460 {
+            status = "disable";
+            reg = <0x4000A460 0x20>;
+            path = "/dev/pwm2";
+            id = <2>;
+            pin = <2>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A480 {
+            status = "disable";
+            reg = <0x4000A480 0x20>;
+            path = "/dev/pwm3";
+            id = <3>;
+            pin = <3>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A4A0 {
+            status = "disable";
+            reg = <0x4000A4A0 0x20>;
+            path = "/dev/pwm4";
+            id = <4>;
+            pin = <4>;
+            freq = <5000>;
+            duty = <50>;
+        };
+    };
+    ir {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ctrltype = <0>;
+        tx {
+            status = "disable";
+            pin = <11>;         // only support 11
+            mode = "NEC";       // NEC,ExtenedNEC,RC5,SWM
+            interval = <100>;   // ms
+            active_mode = "Hi"; //Hi,Lo
+        };
+        rx {
+            status = "okay";
+            pin = <12>;         // only support 12 13
+            mode = "NEC";       // NEC,ExtenedNEC,RC5,SWM
+            active_mode = "Hi"; //Hi,Lo
+            data_check = <2>;   //bit 0:check cmd, bit 1:check addr
+        };
+    };
+    uart {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        uart@4000A000 {
+            status = "okay";
+            id = <0>;
+            compatible = "bl602_uart";
+            path = "/dev/ttyS0";
+            baudrate = <2000000>;
+            pin {
+                rx = <7>;
+                tx = <16>;
+            };
+            buf_size {
+                rx_size = <512>;
+                tx_size = <512>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+        uart@4000A100 {
+            status = "okay";
+            id = <1>;
+            compatible = "bl602_uart";
+            path = "/dev/ttyS1";
+            baudrate = <115200>;
+            pin {
+                rx = <3>;
+                tx = <4>;
+            };
+            buf_size {
+                rx_size = <512>;
+                tx_size = <512>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+    };
+    spi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        spi@4000F000 {
+            status = "okay";         /* okay disable */
+            mode = "master";
+            reg = <0x4000F000 0x100>;   /* 4KB */
+            path = "/dev/spi0";
+            port = <0>;
+            polar_phase = <1>;                 /* 0,1,2,3 */
+            freq = <6000000>;
+            pin {
+                clk = <3>;
+                cs = <2>;
+                mosi = <1>;
+                miso = <0>;
+            };
+            dma_cfg {
+                tx_dma_ch = <2>;
+                rx_dma_ch = <3>;
+            };
+        };
+    };
+    gpip {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        adc_key {
+            status = "disable";
+            pin = <9>;
+            interrupt  = <3>;
+            key_vol = <0 100 400 300 500>;
+            key_pcb = "SW1", "SW2", "SW3", "SW4","SW5";
+            key_event = "Usr1", "Usr2", "Start", "Up", "Down";
+            key_raw = <1 2 3 4 5>;
+        };
+    };
+    qspi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        qspi@4000A000 {
+            status = "disable";
+            reg = <0x4000A000 0x1000>;/* 4KB */
+        };
+    };
+    wifi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        region {
+            country_code = <86>;
+        };
+        mac {
+            mode = "MBF";
+            sta_mac_addr = [C8 43 57 82 73 40];
+            ap_mac_addr = [C8 43 57 82 73 02];
+        };
+        sta {
+            ssid = "yourssid";
+            pwd = "yourapssword";
+            auto_connect_enable = <0>;
+        };
+        ap {
+            ssid = "bl_test_005";
+            pwd = "12345678";
+            ap_channel = <11>;
+            auto_chan_detect = "disable";
+        };
+        brd_rf {
+            xtal_mode = "MF";
+            xtal = <36 36 0 60 60>;
+            /*
+            pwr_table = <   4 3 3 186
+                            4 3 4 176
+                            4 3 5 167
+                            3 3 0 159
+                            3 3 1 149
+                            3 3 2 140
+                            3 3 3 129
+                            3 3 4 119
+                            3 3 5 110
+                            2 3 0 101
+                            2 3 1 91
+                            2 3 2 82
+                            2 3 3 72
+                            2 3 4 62
+                            2 3 5 52
+                            1 3 3 10>;
+            */
+            pwr_mode = "bf";//B: only use power offset in EFUSE; b: use power offset in EFUSE with incremental mode; F: only use power offset in Flash; f: use power offset in Flash with incremental mode
+            pwr_table_11b = <20 20 20 18>;//1Mbps 2Mbps 5.5Mbps 11Mbps
+            pwr_table_11g = <18 18 18 18 18 18 14 14>; //6Mbps 9Mbps 12Mbps 18MBps 24Mbps 36Mbps 48Mbps 54Mbps
+            pwr_table_11n = <18 18 18 18 18 16 14 14>; //MCS0 MCS1 MCS2 MCS3 MCS4 MCS5 MCS6 MCS7
+            pwr_offset = <10 10 10 10 10 10 10 10 10 10 10 10 10 10>;//due to the limit of current DTC, negative value is used. So we work around by adding all the poweroffset with 10. so 8 represents -2; 10 represents 0; 13 represents 3
+        };
+        rf_temp {
+            en_tcal = <0>;
+            linear_or_follow = <1>;
+            Tchannels       = <2412 2427 2442 2457 2472>;
+            Tchannel_os     = <180  168  163  160  157>;
+            Tchannel_os_low = <199  186  170  165  160>;
+            Troom_os        = <255>;
+            //negative value is NOT supported. So we use '256' for 0, '255' for -1, '257' for 1,'511' for 256
+        };
+    };
+    bluetooth {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        brd_rf {
+            pwr_table_ble = <13>;  //range:-3~15dbm; if set -3, please set 253 here
+        };
+    };
+};
diff --git a/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_40M.dts b/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_40M.dts
new file mode 100644
index 00000000..ee95aea9
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_40M.dts
@@ -0,0 +1,348 @@
+/dts-v1/;
+/include/ "bl602_base.dtsi";
+// version: 17
+// last_comp_version: 16
+// boot_cpuid_phys: 0x0
+
+/ {
+    model = "bl bl602 IOT board";
+    compatible = "bl,bl602-sample", "bl,bl602-common";
+    #address-cells = <0x1>;
+    #size-cells = <0x1>;
+    gpio {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        max_num = <40>;
+        gpio0 {                                  
+            status = "okay";                     
+            pin  = <5>;                          
+            feature = "led";                     
+            active = "Hi"; //Hi or Lo
+            mode = "blink"; //blink or hearbeat
+            time = <100>; //duration for this mode
+        };
+        gpio1 {                                  
+            status = "disable";                     
+            pin  = <6>;                          
+            feature = "led";                     
+            active = "Hi"; //Hi or Lo
+            mode = "blink"; //blink or hearbeat
+            time = <100>; //duration for this mode
+        };
+        gpio2 {
+            status = "okay";
+            pin = <2>;
+            feature = "button";
+            active = "Hi";
+            mode = "multipress";
+            button {
+                debounce = <10>;
+                short_press_ms {
+                    start = <100>;
+                    end = <3000>;
+                    kevent = <2>;
+                };
+                long_press_ms {
+                    start = <6000>;
+                    end = <10000>;
+                    kevent = <3>;
+                };
+                longlong_press_ms {
+                    start = <15000>;
+                    kevent = <4>;
+                };
+                trig_level = "Hi";
+            };
+            hbn_use = "disable";
+        };
+    };
+    i2s {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        i2s@40017000 {
+            status = "okay";
+            compatible = "bl602_i2s";
+            reg = <0x40017000 0x100>;
+            mclk_only = "okay";
+            pin {
+                mclk = <11>;
+            };
+        };
+        i2s@40017100 {
+            status = "okay";
+            compatible = "bl602_i2s";
+            reg = <0x40017100 0x100>;
+            mclk_only = "disable";
+            pin {
+                bclk = <12>;
+                fs = <29>;
+                do = <30>;
+                di = <31>;
+            };
+        };
+    };
+    i2c {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        i2c@40011000 {
+            status = "okay";
+            compatible = "bl602_i2c";
+            reg = <0x40011000 0x100>;
+            pin {
+                scl = <32>;
+                sda = <13>;
+            };
+            devices {
+                list_addr = <0x18 0x21>;
+                list_driver = "i2c_es8311", "i2c_gc0308>";
+            };
+        };
+        i2c@40011100 {
+            status = "disable";
+            compatible = "bl602_i2c";
+            reg = <0x40011100 0x100>;
+            pin {
+                /*empty here*/
+            };
+        };
+    };
+    timer {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        timer@40014000 {
+            status = "disable";
+            compatible = "bl602_timer";
+            reg = <0x40014000 0x100>;
+        };
+        timer@40014100 {
+            status = "disable";
+            compatible = "bl602_timer";
+            reg = <0x40014100 0x100>;
+        };
+    };
+    pwm {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        pwm@4000A420 {
+            status = "okay";
+            compatible = "bl602_pwm";
+            reg = <0x4000A420 0x20>;
+            path = "/dev/pwm0";
+            id = <0>;
+            pin = <0>;
+            freq = <800000>;
+            duty = <50>;
+        };
+        pwm@4000A440 {
+            status = "disable";
+            reg = <0x4000A440 0x20>;
+            path = "/dev/pwm1";
+            id = <1>;
+            pin = <1>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A460 {
+            status = "disable";
+            reg = <0x4000A460 0x20>;
+            path = "/dev/pwm2";
+            id = <2>;
+            pin = <2>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A480 {
+            status = "disable";
+            reg = <0x4000A480 0x20>;
+            path = "/dev/pwm3";
+            id = <3>;
+            pin = <3>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A4A0 {
+            status = "disable";
+            reg = <0x4000A4A0 0x20>;
+            path = "/dev/pwm4";
+            id = <4>;
+            pin = <4>;
+            freq = <5000>;
+            duty = <50>;
+        };
+    };
+    ir {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ctrltype = <0>;
+        tx {
+            status = "disable";
+            pin = <11>;         // only support 11
+            mode = "NEC";       // NEC,ExtenedNEC,RC5,SWM
+            interval = <100>;   // ms
+            active_mode = "Hi"; //Hi,Lo
+        };
+        rx {
+            status = "okay";
+            pin = <12>;         // only support 12 13
+            mode = "NEC";       // NEC,ExtenedNEC,RC5,SWM
+            active_mode = "Hi"; //Hi,Lo
+            data_check = <2>;   //bit 0:check cmd, bit 1:check addr
+        };
+    };
+    uart {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        uart@4000A000 {
+            status = "okay";
+            id = <0>;
+            compatible = "bl602_uart";
+            path = "/dev/ttyS0";
+            baudrate = <2000000>;
+            pin {
+                rx = <7>;
+                tx = <16>;
+            };
+            buf_size {
+                rx_size = <512>;
+                tx_size = <512>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+        uart@4000A100 {
+            status = "okay";
+            id = <1>;
+            compatible = "bl602_uart";
+            path = "/dev/ttyS1";
+            baudrate = <115200>;
+            pin {
+                rx = <3>;
+                tx = <4>;
+            };
+            buf_size {
+                rx_size = <512>;
+                tx_size = <512>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+    };
+    spi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        spi@4000F000 {
+            status = "okay";         /* okay disable */
+            mode = "master";
+            reg = <0x4000F000 0x100>;   /* 4KB */
+            path = "/dev/spi0";
+            port = <0>;
+            polar_phase = <1>;                 /* 0,1,2,3 */
+            freq = <6000000>;
+            pin {
+                clk = <3>;
+                cs = <2>;
+                mosi = <1>;
+                miso = <0>;
+            };
+            dma_cfg {
+                tx_dma_ch = <2>;
+                rx_dma_ch = <3>;
+            };
+        };
+    };
+    gpip {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        adc_key {
+            status = "disable";
+            pin = <9>;
+            interrupt  = <3>;
+            key_vol = <0 100 400 300 500>;
+            key_pcb = "SW1", "SW2", "SW3", "SW4","SW5";
+            key_event = "Usr1", "Usr2", "Start", "Up", "Down";
+            key_raw = <1 2 3 4 5>;
+        };
+    };
+    qspi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        qspi@4000A000 {
+            status = "disable";
+            reg = <0x4000A000 0x1000>;/* 4KB */
+        };
+    };
+    wifi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        region {
+            country_code = <86>;
+        };
+        mac {
+            mode = "MBF";
+            sta_mac_addr = [C8 43 57 82 73 40];
+            ap_mac_addr = [C8 43 57 82 73 02];
+        };
+        sta {
+            ssid = "yourssid";
+            pwd = "yourapssword";
+            auto_connect_enable = <0>;
+        };
+        ap {
+            ssid = "bl_test_005";
+            pwd = "12345678";
+            ap_channel = <11>;
+            auto_chan_detect = "disable";
+        };
+        brd_rf {
+            xtal_mode = "MF";
+            xtal = <36 36 0 60 60>;
+            /*
+            pwr_table = <   4 3 3 186
+                            4 3 4 176
+                            4 3 5 167
+                            3 3 0 159
+                            3 3 1 149
+                            3 3 2 140
+                            3 3 3 129
+                            3 3 4 119
+                            3 3 5 110
+                            2 3 0 101
+                            2 3 1 91
+                            2 3 2 82
+                            2 3 3 72
+                            2 3 4 62
+                            2 3 5 52
+                            1 3 3 10>;
+            */
+            pwr_mode = "bf";//B: only use power offset in EFUSE; b: use power offset in EFUSE with incremental mode; F: only use power offset in Flash; f: use power offset in Flash with incremental mode
+            pwr_table_11b = <20 20 20 18>;//1Mbps 2Mbps 5.5Mbps 11Mbps
+            pwr_table_11g = <18 18 18 18 18 18 14 14>; //6Mbps 9Mbps 12Mbps 18MBps 24Mbps 36Mbps 48Mbps 54Mbps
+            pwr_table_11n = <18 18 18 18 18 16 14 14>; //MCS0 MCS1 MCS2 MCS3 MCS4 MCS5 MCS6 MCS7
+            pwr_offset = <10 10 10 10 10 10 10 10 10 10 10 10 10 10>;//due to the limit of current DTC, negative value is used. So we work around by adding all the poweroffset with 10. so 8 represents -2; 10 represents 0; 13 represents 3
+        };
+        rf_temp {
+            en_tcal = <0>;
+            linear_or_follow = <1>;
+            Tchannels       = <2412 2427 2442 2457 2472>;
+            Tchannel_os     = <180  168  163  160  157>;
+            Tchannel_os_low = <199  186  170  165  160>;
+            Troom_os        = <255>;
+            //negative value is NOT supported. So we use '256' for 0, '255' for -1, '257' for 1,'511' for 256
+        };
+    };
+    bluetooth {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        brd_rf {
+            pwr_table_ble = <13>;  //range:-3~15dbm; if set -3, please set 253 here
+        };
+    };
+};
diff --git a/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_None.dts b/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_None.dts
new file mode 100644
index 00000000..ee95aea9
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_None.dts
@@ -0,0 +1,348 @@
+/dts-v1/;
+/include/ "bl602_base.dtsi";
+// version: 17
+// last_comp_version: 16
+// boot_cpuid_phys: 0x0
+
+/ {
+    model = "bl bl602 IOT board";
+    compatible = "bl,bl602-sample", "bl,bl602-common";
+    #address-cells = <0x1>;
+    #size-cells = <0x1>;
+    gpio {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        max_num = <40>;
+        gpio0 {                                  
+            status = "okay";                     
+            pin  = <5>;                          
+            feature = "led";                     
+            active = "Hi"; //Hi or Lo
+            mode = "blink"; //blink or hearbeat
+            time = <100>; //duration for this mode
+        };
+        gpio1 {                                  
+            status = "disable";                     
+            pin  = <6>;                          
+            feature = "led";                     
+            active = "Hi"; //Hi or Lo
+            mode = "blink"; //blink or hearbeat
+            time = <100>; //duration for this mode
+        };
+        gpio2 {
+            status = "okay";
+            pin = <2>;
+            feature = "button";
+            active = "Hi";
+            mode = "multipress";
+            button {
+                debounce = <10>;
+                short_press_ms {
+                    start = <100>;
+                    end = <3000>;
+                    kevent = <2>;
+                };
+                long_press_ms {
+                    start = <6000>;
+                    end = <10000>;
+                    kevent = <3>;
+                };
+                longlong_press_ms {
+                    start = <15000>;
+                    kevent = <4>;
+                };
+                trig_level = "Hi";
+            };
+            hbn_use = "disable";
+        };
+    };
+    i2s {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        i2s@40017000 {
+            status = "okay";
+            compatible = "bl602_i2s";
+            reg = <0x40017000 0x100>;
+            mclk_only = "okay";
+            pin {
+                mclk = <11>;
+            };
+        };
+        i2s@40017100 {
+            status = "okay";
+            compatible = "bl602_i2s";
+            reg = <0x40017100 0x100>;
+            mclk_only = "disable";
+            pin {
+                bclk = <12>;
+                fs = <29>;
+                do = <30>;
+                di = <31>;
+            };
+        };
+    };
+    i2c {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        i2c@40011000 {
+            status = "okay";
+            compatible = "bl602_i2c";
+            reg = <0x40011000 0x100>;
+            pin {
+                scl = <32>;
+                sda = <13>;
+            };
+            devices {
+                list_addr = <0x18 0x21>;
+                list_driver = "i2c_es8311", "i2c_gc0308>";
+            };
+        };
+        i2c@40011100 {
+            status = "disable";
+            compatible = "bl602_i2c";
+            reg = <0x40011100 0x100>;
+            pin {
+                /*empty here*/
+            };
+        };
+    };
+    timer {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        timer@40014000 {
+            status = "disable";
+            compatible = "bl602_timer";
+            reg = <0x40014000 0x100>;
+        };
+        timer@40014100 {
+            status = "disable";
+            compatible = "bl602_timer";
+            reg = <0x40014100 0x100>;
+        };
+    };
+    pwm {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        pwm@4000A420 {
+            status = "okay";
+            compatible = "bl602_pwm";
+            reg = <0x4000A420 0x20>;
+            path = "/dev/pwm0";
+            id = <0>;
+            pin = <0>;
+            freq = <800000>;
+            duty = <50>;
+        };
+        pwm@4000A440 {
+            status = "disable";
+            reg = <0x4000A440 0x20>;
+            path = "/dev/pwm1";
+            id = <1>;
+            pin = <1>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A460 {
+            status = "disable";
+            reg = <0x4000A460 0x20>;
+            path = "/dev/pwm2";
+            id = <2>;
+            pin = <2>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A480 {
+            status = "disable";
+            reg = <0x4000A480 0x20>;
+            path = "/dev/pwm3";
+            id = <3>;
+            pin = <3>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A4A0 {
+            status = "disable";
+            reg = <0x4000A4A0 0x20>;
+            path = "/dev/pwm4";
+            id = <4>;
+            pin = <4>;
+            freq = <5000>;
+            duty = <50>;
+        };
+    };
+    ir {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ctrltype = <0>;
+        tx {
+            status = "disable";
+            pin = <11>;         // only support 11
+            mode = "NEC";       // NEC,ExtenedNEC,RC5,SWM
+            interval = <100>;   // ms
+            active_mode = "Hi"; //Hi,Lo
+        };
+        rx {
+            status = "okay";
+            pin = <12>;         // only support 12 13
+            mode = "NEC";       // NEC,ExtenedNEC,RC5,SWM
+            active_mode = "Hi"; //Hi,Lo
+            data_check = <2>;   //bit 0:check cmd, bit 1:check addr
+        };
+    };
+    uart {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        uart@4000A000 {
+            status = "okay";
+            id = <0>;
+            compatible = "bl602_uart";
+            path = "/dev/ttyS0";
+            baudrate = <2000000>;
+            pin {
+                rx = <7>;
+                tx = <16>;
+            };
+            buf_size {
+                rx_size = <512>;
+                tx_size = <512>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+        uart@4000A100 {
+            status = "okay";
+            id = <1>;
+            compatible = "bl602_uart";
+            path = "/dev/ttyS1";
+            baudrate = <115200>;
+            pin {
+                rx = <3>;
+                tx = <4>;
+            };
+            buf_size {
+                rx_size = <512>;
+                tx_size = <512>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+    };
+    spi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        spi@4000F000 {
+            status = "okay";         /* okay disable */
+            mode = "master";
+            reg = <0x4000F000 0x100>;   /* 4KB */
+            path = "/dev/spi0";
+            port = <0>;
+            polar_phase = <1>;                 /* 0,1,2,3 */
+            freq = <6000000>;
+            pin {
+                clk = <3>;
+                cs = <2>;
+                mosi = <1>;
+                miso = <0>;
+            };
+            dma_cfg {
+                tx_dma_ch = <2>;
+                rx_dma_ch = <3>;
+            };
+        };
+    };
+    gpip {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        adc_key {
+            status = "disable";
+            pin = <9>;
+            interrupt  = <3>;
+            key_vol = <0 100 400 300 500>;
+            key_pcb = "SW1", "SW2", "SW3", "SW4","SW5";
+            key_event = "Usr1", "Usr2", "Start", "Up", "Down";
+            key_raw = <1 2 3 4 5>;
+        };
+    };
+    qspi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        qspi@4000A000 {
+            status = "disable";
+            reg = <0x4000A000 0x1000>;/* 4KB */
+        };
+    };
+    wifi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        region {
+            country_code = <86>;
+        };
+        mac {
+            mode = "MBF";
+            sta_mac_addr = [C8 43 57 82 73 40];
+            ap_mac_addr = [C8 43 57 82 73 02];
+        };
+        sta {
+            ssid = "yourssid";
+            pwd = "yourapssword";
+            auto_connect_enable = <0>;
+        };
+        ap {
+            ssid = "bl_test_005";
+            pwd = "12345678";
+            ap_channel = <11>;
+            auto_chan_detect = "disable";
+        };
+        brd_rf {
+            xtal_mode = "MF";
+            xtal = <36 36 0 60 60>;
+            /*
+            pwr_table = <   4 3 3 186
+                            4 3 4 176
+                            4 3 5 167
+                            3 3 0 159
+                            3 3 1 149
+                            3 3 2 140
+                            3 3 3 129
+                            3 3 4 119
+                            3 3 5 110
+                            2 3 0 101
+                            2 3 1 91
+                            2 3 2 82
+                            2 3 3 72
+                            2 3 4 62
+                            2 3 5 52
+                            1 3 3 10>;
+            */
+            pwr_mode = "bf";//B: only use power offset in EFUSE; b: use power offset in EFUSE with incremental mode; F: only use power offset in Flash; f: use power offset in Flash with incremental mode
+            pwr_table_11b = <20 20 20 18>;//1Mbps 2Mbps 5.5Mbps 11Mbps
+            pwr_table_11g = <18 18 18 18 18 18 14 14>; //6Mbps 9Mbps 12Mbps 18MBps 24Mbps 36Mbps 48Mbps 54Mbps
+            pwr_table_11n = <18 18 18 18 18 16 14 14>; //MCS0 MCS1 MCS2 MCS3 MCS4 MCS5 MCS6 MCS7
+            pwr_offset = <10 10 10 10 10 10 10 10 10 10 10 10 10 10>;//due to the limit of current DTC, negative value is used. So we work around by adding all the poweroffset with 10. so 8 represents -2; 10 represents 0; 13 represents 3
+        };
+        rf_temp {
+            en_tcal = <0>;
+            linear_or_follow = <1>;
+            Tchannels       = <2412 2427 2442 2457 2472>;
+            Tchannel_os     = <180  168  163  160  157>;
+            Tchannel_os_low = <199  186  170  165  160>;
+            Troom_os        = <255>;
+            //negative value is NOT supported. So we use '256' for 0, '255' for -1, '257' for 1,'511' for 256
+        };
+    };
+    bluetooth {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        brd_rf {
+            pwr_table_ble = <13>;  //range:-3~15dbm; if set -3, please set 253 here
+        };
+    };
+};
diff --git a/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_RC32M.dts b/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_RC32M.dts
new file mode 100644
index 00000000..ee95aea9
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/device_tree/bl_factory_params_IoTKitA_RC32M.dts
@@ -0,0 +1,348 @@
+/dts-v1/;
+/include/ "bl602_base.dtsi";
+// version: 17
+// last_comp_version: 16
+// boot_cpuid_phys: 0x0
+
+/ {
+    model = "bl bl602 IOT board";
+    compatible = "bl,bl602-sample", "bl,bl602-common";
+    #address-cells = <0x1>;
+    #size-cells = <0x1>;
+    gpio {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        max_num = <40>;
+        gpio0 {                                  
+            status = "okay";                     
+            pin  = <5>;                          
+            feature = "led";                     
+            active = "Hi"; //Hi or Lo
+            mode = "blink"; //blink or hearbeat
+            time = <100>; //duration for this mode
+        };
+        gpio1 {                                  
+            status = "disable";                     
+            pin  = <6>;                          
+            feature = "led";                     
+            active = "Hi"; //Hi or Lo
+            mode = "blink"; //blink or hearbeat
+            time = <100>; //duration for this mode
+        };
+        gpio2 {
+            status = "okay";
+            pin = <2>;
+            feature = "button";
+            active = "Hi";
+            mode = "multipress";
+            button {
+                debounce = <10>;
+                short_press_ms {
+                    start = <100>;
+                    end = <3000>;
+                    kevent = <2>;
+                };
+                long_press_ms {
+                    start = <6000>;
+                    end = <10000>;
+                    kevent = <3>;
+                };
+                longlong_press_ms {
+                    start = <15000>;
+                    kevent = <4>;
+                };
+                trig_level = "Hi";
+            };
+            hbn_use = "disable";
+        };
+    };
+    i2s {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        i2s@40017000 {
+            status = "okay";
+            compatible = "bl602_i2s";
+            reg = <0x40017000 0x100>;
+            mclk_only = "okay";
+            pin {
+                mclk = <11>;
+            };
+        };
+        i2s@40017100 {
+            status = "okay";
+            compatible = "bl602_i2s";
+            reg = <0x40017100 0x100>;
+            mclk_only = "disable";
+            pin {
+                bclk = <12>;
+                fs = <29>;
+                do = <30>;
+                di = <31>;
+            };
+        };
+    };
+    i2c {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        i2c@40011000 {
+            status = "okay";
+            compatible = "bl602_i2c";
+            reg = <0x40011000 0x100>;
+            pin {
+                scl = <32>;
+                sda = <13>;
+            };
+            devices {
+                list_addr = <0x18 0x21>;
+                list_driver = "i2c_es8311", "i2c_gc0308>";
+            };
+        };
+        i2c@40011100 {
+            status = "disable";
+            compatible = "bl602_i2c";
+            reg = <0x40011100 0x100>;
+            pin {
+                /*empty here*/
+            };
+        };
+    };
+    timer {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        timer@40014000 {
+            status = "disable";
+            compatible = "bl602_timer";
+            reg = <0x40014000 0x100>;
+        };
+        timer@40014100 {
+            status = "disable";
+            compatible = "bl602_timer";
+            reg = <0x40014100 0x100>;
+        };
+    };
+    pwm {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        pwm@4000A420 {
+            status = "okay";
+            compatible = "bl602_pwm";
+            reg = <0x4000A420 0x20>;
+            path = "/dev/pwm0";
+            id = <0>;
+            pin = <0>;
+            freq = <800000>;
+            duty = <50>;
+        };
+        pwm@4000A440 {
+            status = "disable";
+            reg = <0x4000A440 0x20>;
+            path = "/dev/pwm1";
+            id = <1>;
+            pin = <1>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A460 {
+            status = "disable";
+            reg = <0x4000A460 0x20>;
+            path = "/dev/pwm2";
+            id = <2>;
+            pin = <2>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A480 {
+            status = "disable";
+            reg = <0x4000A480 0x20>;
+            path = "/dev/pwm3";
+            id = <3>;
+            pin = <3>;
+            freq = <5000>;
+            duty = <50>;
+        };
+        pwm@4000A4A0 {
+            status = "disable";
+            reg = <0x4000A4A0 0x20>;
+            path = "/dev/pwm4";
+            id = <4>;
+            pin = <4>;
+            freq = <5000>;
+            duty = <50>;
+        };
+    };
+    ir {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ctrltype = <0>;
+        tx {
+            status = "disable";
+            pin = <11>;         // only support 11
+            mode = "NEC";       // NEC,ExtenedNEC,RC5,SWM
+            interval = <100>;   // ms
+            active_mode = "Hi"; //Hi,Lo
+        };
+        rx {
+            status = "okay";
+            pin = <12>;         // only support 12 13
+            mode = "NEC";       // NEC,ExtenedNEC,RC5,SWM
+            active_mode = "Hi"; //Hi,Lo
+            data_check = <2>;   //bit 0:check cmd, bit 1:check addr
+        };
+    };
+    uart {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        uart@4000A000 {
+            status = "okay";
+            id = <0>;
+            compatible = "bl602_uart";
+            path = "/dev/ttyS0";
+            baudrate = <2000000>;
+            pin {
+                rx = <7>;
+                tx = <16>;
+            };
+            buf_size {
+                rx_size = <512>;
+                tx_size = <512>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+        uart@4000A100 {
+            status = "okay";
+            id = <1>;
+            compatible = "bl602_uart";
+            path = "/dev/ttyS1";
+            baudrate = <115200>;
+            pin {
+                rx = <3>;
+                tx = <4>;
+            };
+            buf_size {
+                rx_size = <512>;
+                tx_size = <512>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+    };
+    spi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        spi@4000F000 {
+            status = "okay";         /* okay disable */
+            mode = "master";
+            reg = <0x4000F000 0x100>;   /* 4KB */
+            path = "/dev/spi0";
+            port = <0>;
+            polar_phase = <1>;                 /* 0,1,2,3 */
+            freq = <6000000>;
+            pin {
+                clk = <3>;
+                cs = <2>;
+                mosi = <1>;
+                miso = <0>;
+            };
+            dma_cfg {
+                tx_dma_ch = <2>;
+                rx_dma_ch = <3>;
+            };
+        };
+    };
+    gpip {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        adc_key {
+            status = "disable";
+            pin = <9>;
+            interrupt  = <3>;
+            key_vol = <0 100 400 300 500>;
+            key_pcb = "SW1", "SW2", "SW3", "SW4","SW5";
+            key_event = "Usr1", "Usr2", "Start", "Up", "Down";
+            key_raw = <1 2 3 4 5>;
+        };
+    };
+    qspi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        qspi@4000A000 {
+            status = "disable";
+            reg = <0x4000A000 0x1000>;/* 4KB */
+        };
+    };
+    wifi {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        region {
+            country_code = <86>;
+        };
+        mac {
+            mode = "MBF";
+            sta_mac_addr = [C8 43 57 82 73 40];
+            ap_mac_addr = [C8 43 57 82 73 02];
+        };
+        sta {
+            ssid = "yourssid";
+            pwd = "yourapssword";
+            auto_connect_enable = <0>;
+        };
+        ap {
+            ssid = "bl_test_005";
+            pwd = "12345678";
+            ap_channel = <11>;
+            auto_chan_detect = "disable";
+        };
+        brd_rf {
+            xtal_mode = "MF";
+            xtal = <36 36 0 60 60>;
+            /*
+            pwr_table = <   4 3 3 186
+                            4 3 4 176
+                            4 3 5 167
+                            3 3 0 159
+                            3 3 1 149
+                            3 3 2 140
+                            3 3 3 129
+                            3 3 4 119
+                            3 3 5 110
+                            2 3 0 101
+                            2 3 1 91
+                            2 3 2 82
+                            2 3 3 72
+                            2 3 4 62
+                            2 3 5 52
+                            1 3 3 10>;
+            */
+            pwr_mode = "bf";//B: only use power offset in EFUSE; b: use power offset in EFUSE with incremental mode; F: only use power offset in Flash; f: use power offset in Flash with incremental mode
+            pwr_table_11b = <20 20 20 18>;//1Mbps 2Mbps 5.5Mbps 11Mbps
+            pwr_table_11g = <18 18 18 18 18 18 14 14>; //6Mbps 9Mbps 12Mbps 18MBps 24Mbps 36Mbps 48Mbps 54Mbps
+            pwr_table_11n = <18 18 18 18 18 16 14 14>; //MCS0 MCS1 MCS2 MCS3 MCS4 MCS5 MCS6 MCS7
+            pwr_offset = <10 10 10 10 10 10 10 10 10 10 10 10 10 10>;//due to the limit of current DTC, negative value is used. So we work around by adding all the poweroffset with 10. so 8 represents -2; 10 represents 0; 13 represents 3
+        };
+        rf_temp {
+            en_tcal = <0>;
+            linear_or_follow = <1>;
+            Tchannels       = <2412 2427 2442 2457 2472>;
+            Tchannel_os     = <180  168  163  160  157>;
+            Tchannel_os_low = <199  186  170  165  160>;
+            Troom_os        = <255>;
+            //negative value is NOT supported. So we use '256' for 0, '255' for -1, '257' for 1,'511' for 256
+        };
+    };
+    bluetooth {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        brd_rf {
+            pwr_table_ble = <13>;  //range:-3~15dbm; if set -3, please set 253 here
+        };
+    };
+};
diff --git a/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader.elf b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader.elf
new file mode 100644
index 00000000..6946579c
Binary files /dev/null and b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader.elf differ
diff --git a/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader.map b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader.map
new file mode 100644
index 00000000..c4074b5c
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader.map
@@ -0,0 +1,11542 @@
+Archive member included to satisfy reference by file (symbol)
+
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libc.a(lib_a-memmove-stub.o)
+                              out/BSP_Common/xz/xz_dec_lzma2.o (memmove)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clzsi2.o)
+                              out/3rdParty/FreeRTOS/Source/tasks.o (__clzsi2)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_udivdi3.o)
+                              out/BSP_Common/libc/vsnprintf.o (__udivdi3)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_umoddi3.o)
+                              out/BSP_Common/libc/vsnprintf.o (__umoddi3)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(adddf3.o)
+                              out/BSP_Common/libc/atof.o (__adddf3)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(divdf3.o)
+                              out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o (__divdf3)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(muldf3.o)
+                              out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o (__muldf3)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(fixdfsi.o)
+                              out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o (__fixdfsi)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(fixunsdfsi.o)
+                              out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o (__fixunsdfsi)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatsidf.o)
+                              out/BSP_Common/libc/atof.o (__floatsidf)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+                              out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o (__floatunsidf)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clz.o)
+                              /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clzsi2.o) (__clz_tab)
+
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+LOAD out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+LOAD out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+LOAD out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+LOAD out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+LOAD out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+LOAD out/ChipTest/Eflash_Loader/bflb_eflash_loader_sdio.o
+LOAD out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+LOAD out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+LOAD out/ChipTest/Eflash_Loader/bflb_efuse.o
+LOAD out/ChipTest/Eflash_Loader/bflb_eflash_loader_cfg.o
+LOAD out/ChipTest/Eflash_Loader/bflb_set_clock.o
+LOAD out/ChipTest/Eflash_Loader/sdu.o
+LOAD out/BSP_Common/ring_buffer/ring_buffer.o
+LOAD out/BSP_Common/libc/atof.o
+LOAD out/BSP_Common/libc/atoi.o
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+LOAD out/BSP_Common/libc/seed48.o
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+LOAD out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+LOAD out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_gpio.o
+LOAD out/3rdParty/FreeRTOS/Source/tasks.o
+LOAD out/3rdParty/FreeRTOS/Source/list.o
+LOAD out/3rdParty/FreeRTOS/Source/queue.o
+LOAD out/3rdParty/FreeRTOS/Source/timers.o
+LOAD out/3rdParty/FreeRTOS/Source/stream_buffer.o
+LOAD out/3rdParty/FreeRTOS/Source/croutine.o
+LOAD out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libc.a
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libm.a
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a
+START GROUP
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libc.a
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libgloss.a
+END GROUP
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libc.a
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a
+                0x0000000000000400                StackSize = 0x400
+                0x0000000000000000                PROVIDE (__metal_chicken_bit = 0x0)
+
+.text           0x0000000022010000     0x8ab4
+                0x0000000022010000                . = ALIGN (0x4)
+                0x0000000022010000                __text_code_start__ = .
+ *(.text.metal.init.enter)
+ .text.metal.init.enter
+                0x0000000022010000       0x86 out/startup/GCC/entry.o
+                0x0000000022010000                _enter
+ *(SORT_NONE(.init))
+ *fill*         0x0000000022010086       0x3a 
+ .init          0x00000000220100c0      0x142 out/startup/interrupt.o
+                0x00000000220100c0                __Vectors
+ *(.text)
+ .text          0x0000000022010202       0xd0 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libc.a(lib_a-memmove-stub.o)
+                0x0000000022010202                memmove
+ .text          0x00000000220102d2      0x35e /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_udivdi3.o)
+                0x00000000220102d2                __udivdi3
+ .text          0x0000000022010630      0x352 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_umoddi3.o)
+                0x0000000022010630                __umoddi3
+ *(.text.*)
+ .text.startup.main
+                0x0000000022010982      0x1aa out/ChipTest/Eflash_Loader/main.o
+                0x0000000022010982                main
+ .text.bflb_eflash_loader_cmd_read_jedec_id
+                0x0000000022010b2c       0x50 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_read_log
+                0x0000000022010b7c       0x5a out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_ack.part.0
+                0x0000000022010bd6       0x1e out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_ack
+                0x0000000022010bf4       0x28 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_write_mem
+                0x0000000022010c1c       0x98 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_write_flash_check
+                0x0000000022010cb4       0x22 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_read_mac_addr
+                0x0000000022010cd6       0x88 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_read_efuse
+                0x0000000022010d5e      0x132 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_write_efuse
+                0x0000000022010e90       0xd0 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_xip_read_flash
+                0x0000000022010f60      0x166 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_xip_readSha_flash
+                0x00000000220110c6      0x154 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_readSha_flash
+                0x000000002201121a      0x154 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_read_flash
+                0x000000002201136e      0x168 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_flash_chip_erase
+                0x00000000220114d6       0x48 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_erase_flash
+                0x000000002201151e      0x14e out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_write_status_register
+                0x000000002201166c       0xca out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_set_flash_para
+                0x0000000022011736      0x110 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_read_mem
+                0x0000000022011846       0xec out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_read_status_register
+                0x0000000022011932       0xc6 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_flash_boot
+                0x00000000220119f8       0x32 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_reset
+                0x0000000022011a2a       0x34 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_write_flash
+                0x0000000022011a5e       0xba out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_write_flash_with_decompress
+                0x0000000022011b18      0x1ca out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_xip_read_flash_start
+                0x0000000022011ce2       0x20 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_xip_read_flash_finish
+                0x0000000022011d02       0x20 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_init
+                0x0000000022011d22        0xa out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                0x0000000022011d22                bflb_eflash_loader_cmd_init
+ .text.bflb_eflash_loader_cmd_process
+                0x0000000022011d2c       0x5a out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                0x0000000022011d2c                bflb_eflash_loader_cmd_process
+ .text.bootrom_read_boot_mode
+                0x0000000022011d86       0x48 out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+                0x0000000022011d86                bootrom_read_boot_mode
+ .text.bflb_eflash_loader_init_uart_gpio
+                0x0000000022011dce       0x3c out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+                0x0000000022011dce                bflb_eflash_loader_init_uart_gpio
+ .text.bflb_eflash_loader_init_sdio_gpio
+                0x0000000022011e0a       0x9c out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+                0x0000000022011e0a                bflb_eflash_loader_init_sdio_gpio
+ .text.bflb_eflash_loader_if_set
+                0x0000000022011ea6      0x128 out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                0x0000000022011ea6                bflb_eflash_loader_if_set
+ .text.bflb_eflash_loader_interface_init
+                0x0000000022011fce       0x14 out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                0x0000000022011fce                bflb_eflash_loader_interface_init
+ .text.bflb_eflash_loader_interface_deinit
+                0x0000000022011fe2       0x10 out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                0x0000000022011fe2                bflb_eflash_loader_interface_deinit
+ .text.bflb_eflash_loader_main
+                0x0000000022011ff2      0x14c out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                0x0000000022011ff2                bflb_eflash_loader_main
+ .text.bflb_eflash_loader_jlink_init
+                0x000000002201213e        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                0x000000002201213e                bflb_eflash_loader_jlink_init
+ .text.bflb_eflash_loader_jlink_handshake_poll
+                0x0000000022012142       0x6e out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                0x0000000022012142                bflb_eflash_loader_jlink_handshake_poll
+ .text.bflb_eflash_loader_jlink_recv
+                0x00000000220121b0       0x92 out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                0x00000000220121b0                bflb_eflash_loader_jlink_recv
+ .text.bflb_eflash_loader_jlink_send
+                0x0000000022012242       0x44 out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                0x0000000022012242                bflb_eflash_loader_jlink_send
+ .text.bflb_eflash_loader_jlink_wait_tx_idle
+                0x0000000022012286        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                0x0000000022012286                bflb_eflash_loader_jlink_wait_tx_idle
+ .text.bflb_eflash_loader_jlink_deinit
+                0x000000002201228a        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                0x000000002201228a                bflb_eflash_loader_jlink_deinit
+ .text.bflb_eflash_loader_usart_if_init
+                0x000000002201228e       0xb8 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ .text.uart_if_rto_cbf
+                0x0000000022012346       0x4e out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ .text.uart_if_rda_cbf
+                0x0000000022012394        0x2 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ .text.bflb_eflash_loader_usart_if_receive.isra.0
+                0x0000000022012396       0x9e out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ .text.bflb_eflash_loader_uart_init
+                0x0000000022012434       0x82 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                0x0000000022012434                bflb_eflash_loader_uart_init
+ .text.bflb_eflash_loader_uart_handshake_poll
+                0x00000000220124b6      0x12c out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                0x00000000220124b6                bflb_eflash_loader_uart_handshake_poll
+ .text.bflb_eflash_loader_uart_recv
+                0x00000000220125e2        0x8 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                0x00000000220125e2                bflb_eflash_loader_uart_recv
+ .text.bflb_eflash_loader_uart_send
+                0x00000000220125ea       0x16 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                0x00000000220125ea                bflb_eflash_loader_uart_send
+ .text.bflb_eflash_loader_usart_wait_tx_idle
+                0x0000000022012600       0x10 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                0x0000000022012600                bflb_eflash_loader_usart_wait_tx_idle
+ .text.bflb_eflash_loader_uart_deinit
+                0x0000000022012610        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                0x0000000022012610                bflb_eflash_loader_uart_deinit
+ .text.bflb_eflash_loader_sdio_init
+                0x0000000022012614        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_sdio.o
+                0x0000000022012614                bflb_eflash_loader_sdio_init
+ .text.bflb_eflash_loader_sdio_handshake_poll
+                0x0000000022012618       0x1e out/ChipTest/Eflash_Loader/bflb_eflash_loader_sdio.o
+                0x0000000022012618                bflb_eflash_loader_sdio_handshake_poll
+ .text.bflb_eflash_loader_sdio_recv
+                0x0000000022012636       0x34 out/ChipTest/Eflash_Loader/bflb_eflash_loader_sdio.o
+                0x0000000022012636                bflb_eflash_loader_sdio_recv
+ .text.bflb_eflash_loader_sdio_send
+                0x000000002201266a       0x10 out/ChipTest/Eflash_Loader/bflb_eflash_loader_sdio.o
+                0x000000002201266a                bflb_eflash_loader_sdio_send
+ .text.bflb_eflash_loader_sdio_wait_tx_idle
+                0x000000002201267a        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_sdio.o
+                0x000000002201267a                bflb_eflash_loader_sdio_wait_tx_idle
+ .text.bflb_eflash_loader_sdio_deinit
+                0x000000002201267e        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_sdio.o
+                0x000000002201267e                bflb_eflash_loader_sdio_deinit
+ .text.bflb_eflash_loader_clk_set_from_user
+                0x0000000022012682       0xda out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+                0x0000000022012682                bflb_eflash_loader_clk_set_from_user
+ .text.bflb_eflash_loader_parse_bootheader
+                0x000000002201275c      0x1a0 out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+                0x000000002201275c                bflb_eflash_loader_parse_bootheader
+ .text.bflb_eflash_loader_boot_pre_jump
+                0x00000000220128fc       0x38 out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+                0x00000000220128fc                bflb_eflash_loader_boot_pre_jump
+ .text.bflb_eflash_loader_boot
+                0x0000000022012934       0x4e out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+                0x0000000022012934                bflb_eflash_loader_boot
+ .text.bflb_eflash_loader_boot_main
+                0x0000000022012982       0xca out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+                0x0000000022012982                bflb_eflash_loader_boot_main
+ .text.bflb_eflash_loader_cache_enable
+                0x0000000022012a4c       0x9a out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012a4c                bflb_eflash_loader_cache_enable
+ .text.bflb_spi_flash_update_para
+                0x0000000022012ae6       0x1a out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012ae6                bflb_spi_flash_update_para
+ .text.bflb_spi_flash_xip_read_init
+                0x0000000022012b00       0x5e out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012b00                bflb_spi_flash_xip_read_init
+ .text.bflb_spi_flash_xip_read_exit
+                0x0000000022012b5e       0x26 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012b5e                bflb_spi_flash_xip_read_exit
+ .text.bflb_spi_flash_set_io_mode
+                0x0000000022012b84        0x6 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012b84                bflb_spi_flash_set_io_mode
+ .text.bflb_spi_flash_read_jedec_id
+                0x0000000022012b8a       0x40 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012b8a                bflb_spi_flash_read_jedec_id
+ .text.bflb_spi_flash_read_status_reg_with_cmd
+                0x0000000022012bca        0xe out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012bca                bflb_spi_flash_read_status_reg_with_cmd
+ .text.bflb_spi_flash_write_status_reg_with_cmd
+                0x0000000022012bd8       0x46 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012bd8                bflb_spi_flash_write_status_reg_with_cmd
+ .text.bflb_spi_flash_erase
+                0x0000000022012c1e       0x22 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012c1e                bflb_spi_flash_erase
+ .text.bflb_spi_flash_chiperase
+                0x0000000022012c40       0x1e out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012c40                bflb_spi_flash_chiperase
+ .text.bflb_spi_flash_program
+                0x0000000022012c5e       0x26 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012c5e                bflb_spi_flash_program
+ .text.bflb_spi_flash_read_sahb
+                0x0000000022012c84       0x24 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012c84                bflb_spi_flash_read_sahb
+ .text.bflb_spi_flash_read_xip
+                0x0000000022012ca8       0x32 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012ca8                bflb_spi_flash_read_xip
+ .text.bflb_spi_flash_read
+                0x0000000022012cda       0x1e out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012cda                bflb_spi_flash_read
+ .text.bflb_clear_flash_status_register
+                0x0000000022012cf8       0x74 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012cf8                bflb_clear_flash_status_register
+ .text.bflb_spi_flash_init
+                0x0000000022012d6c      0x10e out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012d6c                bflb_spi_flash_init
+ .text.bflb_efuse_write
+                0x0000000022012e7a       0x56 out/ChipTest/Eflash_Loader/bflb_efuse.o
+                0x0000000022012e7a                bflb_efuse_write
+ .text.bflb_efuse_read
+                0x0000000022012ed0       0x2c out/ChipTest/Eflash_Loader/bflb_efuse.o
+                0x0000000022012ed0                bflb_efuse_read
+ .text.xz_BSP_init
+                0x0000000022012efc        0x2 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cfg.o
+                0x0000000022012efc                xz_BSP_init
+ .text.xz_BSP_get_dict_buffer
+                0x0000000022012efe        0x6 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cfg.o
+                0x0000000022012efe                xz_BSP_get_dict_buffer
+ .text.xz_BSP_get_work_buffer
+                0x0000000022012f04        0x6 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cfg.o
+                0x0000000022012f04                xz_BSP_get_work_buffer
+ .text.xz_BSP_get_output_size
+                0x0000000022012f0a        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cfg.o
+                0x0000000022012f0a                xz_BSP_get_output_size
+ .text.bflb_set_high_speed_system_clock
+                0x0000000022012f0e        0x6 out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                0x0000000022012f0e                bflb_set_high_speed_system_clock
+ .text.bflb_set_high_speed_flash_clock
+                0x0000000022012f14        0xa out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                0x0000000022012f14                bflb_set_high_speed_flash_clock
+ .text.bflb_set_low_speed_flash_clock
+                0x0000000022012f1e        0xa out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                0x0000000022012f1e                bflb_set_low_speed_flash_clock
+ .text.bflb_set_flash_clock_div
+                0x0000000022012f28        0xa out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                0x0000000022012f28                bflb_set_flash_clock_div
+ .text.sdu_init
+                0x0000000022012f32       0x12 out/ChipTest/Eflash_Loader/sdu.o
+                0x0000000022012f32                sdu_init
+ .text.sdu_host_check
+                0x0000000022012f44      0x160 out/ChipTest/Eflash_Loader/sdu.o
+                0x0000000022012f44                sdu_host_check
+ .text.sdu_deinit
+                0x00000000220130a4       0x1e out/ChipTest/Eflash_Loader/sdu.o
+                0x00000000220130a4                sdu_deinit
+ .text.sdu_receive_data
+                0x00000000220130c2      0x16c out/ChipTest/Eflash_Loader/sdu.o
+                0x00000000220130c2                sdu_receive_data
+ .text.sdu_send_data
+                0x000000002201322e      0x124 out/ChipTest/Eflash_Loader/sdu.o
+                0x000000002201322e                sdu_send_data
+ .text.memcpy   0x0000000022013352       0x18 out/BSP_Common/libc/memcpy.o
+                0x0000000022013352                memcpy
+ .text.memset   0x000000002201336a       0x18 out/BSP_Common/libc/memset.o
+                0x000000002201336a                memset
+ .text.memcmp   0x0000000022013382       0x1e out/BSP_Common/libc/memcmp.o
+                0x0000000022013382                memcmp
+ .text.vsnprintf
+                0x00000000220133a0      0xae2 out/BSP_Common/libc/vsnprintf.o
+                0x00000000220133a0                vsnprintf
+ .text.strlen   0x0000000022013e82       0x1a out/BSP_Common/libc/strlen.o
+                0x0000000022013e82                strlen
+ .text.xz_crc32_init
+                0x0000000022013e9c        0x2 out/BSP_Common/xz/xz_crc32.o
+                0x0000000022013e9c                xz_crc32_init
+ .text.xz_crc32
+                0x0000000022013e9e       0x34 out/BSP_Common/xz/xz_crc32.o
+                0x0000000022013e9e                xz_crc32
+ .text.lzma_len
+                0x0000000022013ed2      0x17c out/BSP_Common/xz/xz_dec_lzma2.o
+ .text.dict_repeat.part.1
+                0x000000002201404e       0x64 out/BSP_Common/xz/xz_dec_lzma2.o
+ .text.lzma_main
+                0x00000000220140b2      0x74c out/BSP_Common/xz/xz_dec_lzma2.o
+ .text.xz_dec_lzma2_run
+                0x00000000220147fe      0x612 out/BSP_Common/xz/xz_dec_lzma2.o
+                0x00000000220147fe                xz_dec_lzma2_run
+ .text.xz_dec_lzma2_create
+                0x0000000022014e10       0x68 out/BSP_Common/xz/xz_dec_lzma2.o
+                0x0000000022014e10                xz_dec_lzma2_create
+ .text.xz_dec_lzma2_reset
+                0x0000000022014e78       0x78 out/BSP_Common/xz/xz_dec_lzma2.o
+                0x0000000022014e78                xz_dec_lzma2_reset
+ .text.xz_dec_lzma2_end
+                0x0000000022014ef0       0x2c out/BSP_Common/xz/xz_dec_lzma2.o
+                0x0000000022014ef0                xz_dec_lzma2_end
+ .text.fill_temp
+                0x0000000022014f1c       0x72 out/BSP_Common/xz/xz_dec_stream.o
+ .text.dec_vli.isra.0
+                0x0000000022014f8e       0x9a out/BSP_Common/xz/xz_dec_stream.o
+ .text.index_update.isra.2
+                0x0000000022015028       0x36 out/BSP_Common/xz/xz_dec_stream.o
+ .text.xz_dec_reset
+                0x000000002201505e       0x46 out/BSP_Common/xz/xz_dec_stream.o
+                0x000000002201505e                xz_dec_reset
+ .text.xz_dec_run
+                0x00000000220150a4      0x794 out/BSP_Common/xz/xz_dec_stream.o
+                0x00000000220150a4                xz_dec_run
+ .text.xz_dec_init
+                0x0000000022015838       0x46 out/BSP_Common/xz/xz_dec_stream.o
+                0x0000000022015838                xz_dec_init
+ .text.xz_dec_end
+                0x000000002201587e       0x1e out/BSP_Common/xz/xz_dec_stream.o
+                0x000000002201587e                xz_dec_end
+ .text.simple_malloc_init
+                0x000000002201589c       0x1a out/BSP_Common/xz/xz_port.o
+                0x000000002201589c                simple_malloc_init
+ .text.simple_malloc
+                0x00000000220158b6       0x44 out/BSP_Common/xz/xz_port.o
+                0x00000000220158b6                simple_malloc
+ .text.simple_free
+                0x00000000220158fa        0xe out/BSP_Common/xz/xz_port.o
+                0x00000000220158fa                simple_free
+ .text.SystemInit
+                0x0000000022015908       0xac out/startup/system_bl602.o
+                0x0000000022015908                SystemInit
+ .text.start_load
+                0x00000000220159b4      0x126 out/startup/GCC/start_load.o
+                0x00000000220159b4                start_load
+ .text.Interrupt_Handler_Stub
+                0x0000000022015ada       0x9a out/startup/interrupt.o
+                0x0000000022015ada                SDIO_IRQHandler_Wrapper
+                0x0000000022015ada                TIMER_WDT_IRQHandler_Wrapper
+                0x0000000022015ada                GPIO_INT0_IRQHandler_Wrapper
+                0x0000000022015ada                SEC_PKA_IRQHandler_Wrapper
+                0x0000000022015ada                SEC_TRNG_IRQHandler_Wrapper
+                0x0000000022015ada                MAC_GEN_IRQHandler_Wrapper
+                0x0000000022015ada                DMA_BMX_ERR_IRQHandler_Wrapper
+                0x0000000022015ada                EFUSE_IRQHandler_Wrapper
+                0x0000000022015ada                WIFI_IRQHandler_Wrapper
+                0x0000000022015ada                SEC_CDET_IRQHandler_Wrapper
+                0x0000000022015ada                SEC_AES_IRQHandler_Wrapper
+                0x0000000022015ada                PWM_IRQHandler_Wrapper
+                0x0000000022015ada                RF_TOP_INT1_IRQHandler_Wrapper
+                0x0000000022015ada                HBN_OUT0_IRQHandler_Wrapper
+                0x0000000022015ada                SF_CTRL_IRQHandler_Wrapper
+                0x0000000022015ada                TIMER_CH0_IRQHandler_Wrapper
+                0x0000000022015ada                clic_mext_handler_Wrapper
+                0x0000000022015ada                MAC_TXRX_TIMER_IRQHandler_Wrapper
+                0x0000000022015ada                Interrupt_Handler_Stub
+                0x0000000022015ada                clic_csoft_handler_Wrapper
+                0x0000000022015ada                I2C_IRQHandler_Wrapper
+                0x0000000022015ada                SPI_IRQHandler_Wrapper
+                0x0000000022015ada                MAC_PORT_TRG_IRQHandler_Wrapper
+                0x0000000022015ada                PDS_WAKEUP_IRQHandler_Wrapper
+                0x0000000022015ada                clic_mtimer_handler_Wrapper
+                0x0000000022015ada                L1C_BMX_ERR_IRQHandler_Wrapper
+                0x0000000022015ada                SEC_BMX_ERR_IRQHandler_Wrapper
+                0x0000000022015ada                MAC_RX_TRG_IRQHandler_Wrapper
+                0x0000000022015ada                MAC_TX_TRG_IRQHandler_Wrapper
+                0x0000000022015ada                HBN_OUT1_IRQHandler_Wrapper
+                0x0000000022015ada                SEC_GMAC_IRQHandler_Wrapper
+                0x0000000022015ada                clic_msip_handler_Wrapper
+                0x0000000022015ada                UART1_IRQHandler_Wrapper
+                0x0000000022015ada                GPADC_DMA_IRQHandler_Wrapper
+                0x0000000022015ada                MAC_TXRX_MISC_IRQHandler_Wrapper
+                0x0000000022015ada                DMA_ALL_IRQHandler_Wrapper
+                0x0000000022015ada                BLE_IRQHandler_Wrapper
+                0x0000000022015ada                SEC_SHA_IRQHandler_Wrapper
+                0x0000000022015ada                IRRX_IRQHandler_Wrapper
+                0x0000000022015ada                BMX_TO_IRQHandler_Wrapper
+                0x0000000022015ada                TIMER_CH1_IRQHandler_Wrapper
+                0x0000000022015ada                UART0_IRQHandler_Wrapper
+                0x0000000022015ada                BMX_ERR_IRQHandler_Wrapper
+                0x0000000022015ada                WIFI_IPC_PUBLIC_IRQHandler_Wrapper
+                0x0000000022015ada                L1C_BMX_TO_IRQHandler_Wrapper
+                0x0000000022015ada                BZ_PHY_IRQHandler_Wrapper
+                0x0000000022015ada                RF_TOP_INT0_IRQHandler_Wrapper
+                0x0000000022015ada                IRTX_IRQHandler_Wrapper
+                0x0000000022015ada                BOR_IRQHandler_Wrapper
+ *fill*         0x0000000022015b74        0xc 
+ .text.Trap_Handler_Stub
+                0x0000000022015b80       0xbc out/startup/interrupt.o
+                0x0000000022015b80                Trap_Handler_Stub
+ .text.clic_enable_interrupt
+                0x0000000022015c3c       0x12 out/startup/interrupt.o
+                0x0000000022015c3c                clic_enable_interrupt
+ .text.clic_disable_interrupt
+                0x0000000022015c4e       0x10 out/startup/interrupt.o
+                0x0000000022015c4e                clic_disable_interrupt
+ .text.clic_clear_pending
+                0x0000000022015c5e        0xc out/startup/interrupt.o
+                0x0000000022015c5e                clic_clear_pending
+ .text.Trap_Handler
+                0x0000000022015c6a      0x126 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+                0x0000000022015c6a                Trap_Handler
+ .text.Interrupt_Handler_Register
+                0x0000000022015d90       0x18 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+                0x0000000022015d90                Interrupt_Handler_Register
+ .text.Interrupt_Handler
+                0x0000000022015da8       0x9e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+                0x0000000022015da8                Interrupt_Handler
+ .text.UART_IntHandler
+                0x0000000022015e46      0x172 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+ .text.UART0_IRQHandler
+                0x0000000022015fb8        0x6 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x0000000022015fb8                UART0_IRQHandler
+ .text.UART1_IRQHandler
+                0x0000000022015fbe        0x6 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x0000000022015fbe                UART1_IRQHandler
+ .text.UART_Init
+                0x0000000022015fc4      0x11e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x0000000022015fc4                UART_Init
+ .text.UART_FifoConfig
+                0x00000000220160e2       0x6a out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x00000000220160e2                UART_FifoConfig
+ .text.UART_Enable
+                0x000000002201614c       0x34 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x000000002201614c                UART_Enable
+ .text.UART_Disable
+                0x0000000022016180       0x30 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x0000000022016180                UART_Disable
+ .text.UART_SetRxTimeoutValue
+                0x00000000220161b0       0x1e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x00000000220161b0                UART_SetRxTimeoutValue
+ .text.UART_TxFreeRun
+                0x00000000220161ce       0x28 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x00000000220161ce                UART_TxFreeRun
+ .text.UART_AutoBaudDetection
+                0x00000000220161f6       0x28 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x00000000220161f6                UART_AutoBaudDetection
+ .text.UART_IntMask
+                0x000000002201621e       0x48 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x000000002201621e                UART_IntMask
+ .text.UART_IntClear
+                0x0000000022016266       0x2e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x0000000022016266                UART_IntClear
+ .text.UART_Int_Callback_Install
+                0x0000000022016294       0x16 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x0000000022016294                UART_Int_Callback_Install
+ .text.UART_SendData
+                0x00000000220162aa       0x50 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x00000000220162aa                UART_SendData
+ .text.UART_ReceiveData
+                0x00000000220162fa       0x4e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x00000000220162fa                UART_ReceiveData
+ .text.UART_GetAutoBaudCount
+                0x0000000022016348       0x18 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x0000000022016348                UART_GetAutoBaudCount
+ .text.UART_GetIntStatus
+                0x0000000022016360       0x2e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x0000000022016360                UART_GetIntStatus
+ .text.UART_GetTxBusBusyStatus
+                0x000000002201638e       0x14 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                0x000000002201638e                UART_GetTxBusBusyStatus
+ .text.GLB_Set_UART_CLK
+                0x00000000220163a2       0x3e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                0x00000000220163a2                GLB_Set_UART_CLK
+ .text.GLB_AHB_Slave1_Reset
+                0x00000000220163e0       0x34 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                0x00000000220163e0                GLB_AHB_Slave1_Reset
+ .text.GLB_UART_Sig_Swap_Set
+                0x0000000022016414       0x1c out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                0x0000000022016414                GLB_UART_Sig_Swap_Set
+ .text.GLB_Set_MTimer_CLK
+                0x0000000022016430       0x4a out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                0x0000000022016430                GLB_Set_MTimer_CLK
+ .text.GLB_UART_Fun_Sel
+                0x000000002201647a       0x24 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                0x000000002201647a                GLB_UART_Fun_Sel
+ .text.GLB_GPIO_Read
+                0x000000002201649e       0x20 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                0x000000002201649e                GLB_GPIO_Read
+ .text.EF_Ctrl_Read_MAC_Address
+                0x00000000220164be       0xb6 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                0x00000000220164be                EF_Ctrl_Read_MAC_Address
+ .text.EF_Ctrl_Program_Direct_R0
+                0x0000000022016574       0x38 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                0x0000000022016574                EF_Ctrl_Program_Direct_R0
+ .text.EF_Ctrl_Read_Direct_R0
+                0x00000000220165ac       0x2e out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                0x00000000220165ac                EF_Ctrl_Read_Direct_R0
+ .text.HBN_Set_UART_CLK_Sel
+                0x00000000220165da       0x14 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+                0x00000000220165da                HBN_Set_UART_CLK_Sel
+ .text.HBN_Set_BOR_Cfg
+                0x00000000220165ee       0x5c out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+                0x00000000220165ee                HBN_Set_BOR_Cfg
+ .text.SEC_TRNG_IRQHandler
+                0x000000002201664a       0x26 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x000000002201664a                SEC_TRNG_IRQHandler
+ .text.SEC_SHA_IRQHandler
+                0x0000000022016670       0x22 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x0000000022016670                SEC_SHA_IRQHandler
+ .text.Sec_Eng_SHA256_Update.part.0
+                0x0000000022016692      0x17c out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+ .text.Sec_Eng_SHA256_Init
+                0x000000002201680e       0x60 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x000000002201680e                Sec_Eng_SHA256_Init
+ .text.Sec_Eng_SHA_Start
+                0x000000002201686e       0x12 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x000000002201686e                Sec_Eng_SHA_Start
+ .text.Sec_Eng_SHA256_Update
+                0x0000000022016880        0xe out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x0000000022016880                Sec_Eng_SHA256_Update
+ .text.Sec_Eng_SHA256_Finish
+                0x000000002201688e      0x22a out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x000000002201688e                Sec_Eng_SHA256_Finish
+ .text.Sec_Eng_Trng_Enable
+                0x0000000022016ab8       0x6a out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x0000000022016ab8                Sec_Eng_Trng_Enable
+ .text.Sec_Eng_Trng_Disable
+                0x0000000022016b22       0x14 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                0x0000000022016b22                Sec_Eng_Trng_Disable
+ .text.bflb_platform_uart_dbg_init
+                0x0000000022016b36       0x8e out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x0000000022016b36                bflb_platform_uart_dbg_init
+ .text.bflb_platform_get_log
+                0x0000000022016bc4       0x2c out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x0000000022016bc4                bflb_platform_get_log
+ .text.bflb_platform_usart_dbg_send
+                0x0000000022016bf0       0x52 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x0000000022016bf0                bflb_platform_usart_dbg_send
+ .text.bflb_platform_uart_dbg_deinit
+                0x0000000022016c42       0x18 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x0000000022016c42                bflb_platform_uart_dbg_deinit
+ .text.bflb_platform_printf
+                0x0000000022016c5a       0x5a out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x0000000022016c5a                bflb_platform_printf
+ .text.bflb_platform_clear_time
+                0x0000000022016cb4       0x12 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x0000000022016cb4                bflb_platform_clear_time
+ .text.bflb_platform_get_time_ms
+                0x0000000022016cc6       0x88 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x0000000022016cc6                bflb_platform_get_time_ms
+ .text.bflb_platform_init_time
+                0x0000000022016d4e       0x2a out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x0000000022016d4e                bflb_platform_init_time
+ .text.bflb_platform_delay_ms
+                0x0000000022016d78       0x66 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x0000000022016d78                bflb_platform_delay_ms
+ .text.bflb_platform_init
+                0x0000000022016dde       0x60 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x0000000022016dde                bflb_platform_init
+ .text.bflb_platform_deinit
+                0x0000000022016e3e       0x42 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x0000000022016e3e                bflb_platform_deinit
+ .text.bflb_platform_init_uart_debug_gpio
+                0x0000000022016e80       0x2e out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_gpio.o
+                0x0000000022016e80                bflb_platform_init_uart_debug_gpio
+ .text.bflb_platform_deinit_uart_debug_gpio
+                0x0000000022016eae       0x30 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_gpio.o
+                0x0000000022016eae                bflb_platform_deinit_uart_debug_gpio
+ *(.rodata)
+ *fill*         0x0000000022016ede        0x2 
+ .rodata        0x0000000022016ee0       0x10 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+ .rodata        0x0000000022016ef0      0x100 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clz.o)
+                0x0000000022016ef0                __clz_tab
+ *(.rodata.*)
+ .rodata.main.str1.4
+                0x0000000022016ff0       0xea out/ChipTest/Eflash_Loader/main.o
+ *fill*         0x00000000220170da        0x2 
+ .rodata.bflb_eflash_loader_cmd_erase_flash.str1.4
+                0x00000000220170dc        0x3 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ *fill*         0x00000000220170df        0x1 
+ .rodata.bflb_eflash_loader_cmd_flash_boot.str1.4
+                0x00000000220170e0        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .rodata.bflb_eflash_loader_cmd_flash_chip_erase.str1.4
+                0x00000000220170e4        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                                          0xa (size before relaxing)
+ .rodata.bflb_eflash_loader_cmd_readSha_flash.str1.4
+                0x00000000220170e8        0x6 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ *fill*         0x00000000220170ee        0x2 
+ .rodata.bflb_eflash_loader_cmd_read_efuse.str1.4
+                0x00000000220170f0        0x3 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ *fill*         0x00000000220170f3        0x1 
+ .rodata.bflb_eflash_loader_cmd_read_jedec_id.str1.4
+                0x00000000220170f4        0x5 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ *fill*         0x00000000220170f9        0x3 
+ .rodata.bflb_eflash_loader_cmd_read_log.str1.4
+                0x00000000220170fc        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .rodata.bflb_eflash_loader_cmd_read_mac_addr.str1.4
+                0x0000000022017100        0x5 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ *fill*         0x0000000022017105        0x3 
+ .rodata.bflb_eflash_loader_cmd_read_mem.str1.4
+                0x0000000022017108        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .rodata.bflb_eflash_loader_cmd_read_status_register.str1.4
+                0x000000002201710c        0x5 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
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+ .rodata.bflb_eflash_loader_cmd_reset.str1.4
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+ .rodata.bflb_eflash_loader_cmd_set_flash_para.str1.4
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+ .rodata.bflb_eflash_loader_cmd_write_efuse.str1.4
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+ .rodata.bflb_eflash_loader_cmd_write_flash_check.str1.4
+                0x000000002201712c        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .rodata.bflb_eflash_loader_cmd_write_flash_with_decompress.str1.4
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+ .rodata.bflb_eflash_loader_cmd_write_status_register.str1.4
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+ .rodata.bflb_eflash_loader_cmd_xip_readSha_flash.str1.4
+                0x0000000022017150        0x7 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                                          0xb (size before relaxing)
+ *fill*         0x0000000022017157        0x1 
+ .rodata.bflb_eflash_loader_cmd_xip_read_flash.str1.4
+                0x0000000022017158        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .rodata.bflb_eflash_loader_cmd_xip_read_flash_finish.str1.4
+                0x000000002201715c        0x6 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ *fill*         0x0000000022017162        0x2 
+ .rodata.bflb_eflash_loader_cmd_xip_read_flash_start.str1.4
+                0x0000000022017164        0x5 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ *fill*         0x0000000022017169        0x3 
+ .rodata.eflash_loader_cmds
+                0x000000002201716c       0xb8 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .rodata.bflb_eflash_loader_main.str1.4
+                0x0000000022017224       0x2e out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+ .rodata.eflash_loader_dump_data.str1.4
+                0x0000000022017252       0x2e out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                                          0x2 (size before relaxing)
+ *fill*         0x0000000022017252        0x2 
+ .rodata.bflb_eflash_loader_jlink_handshake_poll.str1.4
+                0x0000000022017254        0x7 out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+ *fill*         0x000000002201725b        0x1 
+ .rodata.bflb_eflash_loader_uart_handshake_poll.str1.4
+                0x000000002201725c       0x10 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                         0x14 (size before relaxing)
+ .rodata.bflb_eflash_loader_boot_main.str1.4
+                0x000000002201726c       0x13 out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+ *fill*         0x000000002201727f        0x1 
+ .rodata.bflb_eflash_loader_parse_bootheader.str1.4
+                0x0000000022017280       0x2b out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+ *fill*         0x00000000220172ab        0x1 
+ .rodata.bflb_eflash_loader_cache_enable.str1.4
+                0x00000000220172ac        0xf out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+ *fill*         0x00000000220172bb        0x1 
+ .rodata.bflb_spi_flash_init.str1.4
+                0x00000000220172bc       0x35 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+ *fill*         0x00000000220172f1        0x3 
+ .rodata.bflb_spi_flash_xip_read_init.str1.4
+                0x00000000220172f4        0xa out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+ *fill*         0x00000000220172fe        0x2 
+ .rodata.sdu_host_check.str1.4
+                0x0000000022017300       0x12 out/ChipTest/Eflash_Loader/sdu.o
+ *fill*         0x0000000022017312        0x2 
+ .rodata.sdu_send_data.str1.4
+                0x0000000022017314       0x13 out/ChipTest/Eflash_Loader/sdu.o
+ *fill*         0x0000000022017327        0x1 
+ .rodata.lcdigits.1541
+                0x0000000022017328       0x11 out/BSP_Common/libc/vsnprintf.o
+ *fill*         0x0000000022017339        0x3 
+ .rodata.ucdigits.1542
+                0x000000002201733c       0x11 out/BSP_Common/libc/vsnprintf.o
+ *fill*         0x000000002201734d        0x3 
+ .rodata.vsnprintf.str1.4
+                0x0000000022017350        0x7 out/BSP_Common/libc/vsnprintf.o
+ *fill*         0x0000000022017357        0x1 
+ .rodata.crc32Tab
+                0x0000000022017358      0x400 out/BSP_Common/soft_crc/softcrc.o
+                0x0000000022017358                crc32Tab
+ .rodata.xz_dec_run.str1.4
+                0x0000000022017758        0xb out/BSP_Common/xz/xz_dec_stream.o
+ *fill*         0x0000000022017763        0x1 
+ .rodata.simple_free.str1.4
+                0x0000000022017764       0x13 out/BSP_Common/xz/xz_port.o
+ *fill*         0x0000000022017777        0x1 
+ .rodata.simple_malloc.str1.4
+                0x0000000022017778       0x13 out/BSP_Common/xz/xz_port.o
+ *fill*         0x000000002201778b        0x1 
+ .rodata.Interrupt_Handler.str1.4
+                0x000000002201778c       0x8a out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+ *fill*         0x0000000022017816        0x2 
+ .rodata.Trap_Handler.str1.4
+                0x0000000022017818      0x13b out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+ *fill*         0x0000000022017953        0x1 
+ .rodata.uartAddr
+                0x0000000022017954        0x8 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+ .rodata.str1.4
+                0x000000002201795c        0x5 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+ *fill*         0x0000000022017961        0x3 
+ .rodata.bflb_platform_init.str1.4
+                0x0000000022017964       0x14 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                         0x13 (size before relaxing)
+ *(.srodata)
+ .srodata       0x0000000022017978        0x4 out/startup/system_bl602.o
+ .srodata       0x000000002201797c        0x4 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+ *(.srodata.*)
+ *(.tcm_code)
+ .tcm_code      0x0000000022017980      0x1f2 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                0x0000000022017980                GLB_GPIO_Init
+                0x0000000022017ab0                GLB_GPIO_INPUT_Enable
+                0x0000000022017ada                GLB_GPIO_INPUT_Disable
+                0x0000000022017b04                GLB_GPIO_Set_PullUp
+                0x0000000022017b3c                GLB_GPIO_Set_PullDown
+ .tcm_code      0x0000000022017b72      0x546 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                0x0000000022017b72                AON_Power_On_BG
+                0x0000000022017b7c                AON_Power_Off_BG
+                0x0000000022017b86                AON_Power_On_LDO11_SOC
+                0x0000000022017b90                AON_Power_Off_LDO11_SOC
+                0x0000000022017b9a                AON_Power_On_LDO15_RF
+                0x0000000022017ba4                AON_Power_Off_LDO15_RF
+                0x0000000022017bae                AON_Power_On_SFReg
+                0x0000000022017bb8                AON_Power_Off_SFReg
+                0x0000000022017bc2                AON_LowPower_Enter_PDS0
+                0x0000000022017bcc                AON_LowPower_Exit_PDS0
+                0x0000000022017bd6                ASM_Delay_Us
+                0x0000000022017be0                BL602_Delay_US
+                0x0000000022017bea                BL602_Delay_MS
+                0x0000000022017bf4                BL602_MemCpy
+                0x0000000022017bfe                BL602_MemCpy4
+                0x0000000022017c08                BL602_MemCpy_Fast
+                0x0000000022017c12                BL602_MemSet
+                0x0000000022017c1c                BL602_MemSet4
+                0x0000000022017c26                BL602_MemCmp
+                0x0000000022017c30                EF_Ctrl_Sw_AHB_Clk_0
+                0x0000000022017c3a                EF_Ctrl_Program_Efuse_0
+                0x0000000022017c44                EF_Ctrl_Load_Efuse_R0
+                0x0000000022017c4e                EF_Ctrl_Busy
+                0x0000000022017c58                EF_Ctrl_AutoLoad_Done
+                0x0000000022017c62                EF_Ctrl_Clear
+                0x0000000022017c6c                GLB_SW_System_Reset
+                0x0000000022017c76                GLB_SW_CPU_Reset
+                0x0000000022017c80                GLB_SW_POR_Reset
+                0x0000000022017c8a                GLB_Select_Internal_Flash
+                0x0000000022017c94                GLB_Select_External_Flash
+                0x0000000022017c9e                GLB_Deswap_Flash_Pin
+                0x0000000022017ca8                GLB_Swap_Flash_Pin
+                0x0000000022017cb2                GLB_GPIO_OUTPUT_Enable
+                0x0000000022017cbc                GLB_GPIO_OUTPUT_Disable
+                0x0000000022017cc6                GLB_GPIO_Set_HZ
+                0x0000000022017cd0                GLB_GPIO_Get_Fun
+                0x0000000022017cda                HBN_Power_Down_Flash
+                0x0000000022017ce4                HBN_Enable
+                0x0000000022017cee                HBN_Reset
+                0x0000000022017cf8                HBN_Set_Ldo11_Aon_Vout
+                0x0000000022017d02                HBN_Set_Ldo11_Rt_Vout
+                0x0000000022017d0c                HBN_Set_Ldo11_Soc_Vout
+                0x0000000022017d16                HBN_Hw_Pu_Pd_Cfg
+                0x0000000022017d20                HBN_Pin_WakeUp_Mask
+                0x0000000022017d2a                HBN_GPIO7_Dbg_Pull_Cfg
+                0x0000000022017d34                HBN_Set_Embedded_Flash_Pullup
+                0x0000000022017d3e                L1C_Set_Wrap
+                0x0000000022017d48                L1C_Set_Way_Disable
+                0x0000000022017d52                L1C_IROM_2T_Access_Set
+                0x0000000022017d5c                PDS_Reset
+                0x0000000022017d66                PDS_Enable
+                0x0000000022017d70                PDS_Force_Config
+                0x0000000022017d7a                PDS_RAM_Config
+                0x0000000022017d84                PDS_Default_Level_Config
+                0x0000000022017d8e                SEC_Eng_Turn_On_Sec_Ring
+                0x0000000022017d98                SEC_Eng_Turn_Off_Sec_Ring
+                0x0000000022017da2                SFlash_Init
+                0x0000000022017dac                SFlash_SetSPIMode
+                0x0000000022017db6                SFlash_Read_Reg
+                0x0000000022017dc0                SFlash_Write_Reg
+                0x0000000022017dca                SFlash_Busy
+                0x0000000022017dd4                SFlash_Write_Enable
+                0x0000000022017dde                SFlash_Qspi_Enable
+                0x0000000022017de8                SFlash_Volatile_Reg_Write_Enable
+                0x0000000022017df2                SFlash_Chip_Erase
+                0x0000000022017dfc                SFlash_Sector_Erase
+                0x0000000022017e06                SFlash_Blk32_Erase
+                0x0000000022017e10                SFlash_Blk64_Erase
+                0x0000000022017e1a                SFlash_Erase
+                0x0000000022017e24                SFlash_Program
+                0x0000000022017e2e                SFlash_GetUniqueId
+                0x0000000022017e38                SFlash_GetJedecId
+                0x0000000022017e42                SFlash_GetDeviceId
+                0x0000000022017e4c                SFlash_Powerdown
+                0x0000000022017e56                SFlash_Releae_Powerdown
+                0x0000000022017e60                SFlash_SetBurstWrap
+                0x0000000022017e6a                SFlash_DisableBurstWrap
+                0x0000000022017e74                SFlash_Software_Reset
+                0x0000000022017e7e                SFlash_Reset_Continue_Read
+                0x0000000022017e88                SFlash_Set_IDbus_Cfg
+                0x0000000022017e92                SFlash_IDbus_Read_Enable
+                0x0000000022017e9c                SFlash_Cache_Enable_Set
+                0x0000000022017ea6                SFlash_Cache_Flush
+                0x0000000022017eb0                SFlash_Cache_Read_Enable
+                0x0000000022017eba                SFlash_Cache_Hit_Count_Get
+                0x0000000022017ec4                SFlash_Cache_Miss_Count_Get
+                0x0000000022017ece                SFlash_Cache_Read_Disable
+                0x0000000022017ed8                SFlash_Read
+                0x0000000022017ee2                SFlash_Read_Reg_With_Cmd
+                0x0000000022017eec                SFlash_Write_Reg_With_Cmd
+                0x0000000022017ef6                SF_Cfg_Init_Ext_Flash_Gpio
+                0x0000000022017f00                SF_Cfg_Init_Internal_Flash_Gpio
+                0x0000000022017f0a                SF_Cfg_Deinit_Ext_Flash_Gpio
+                0x0000000022017f14                SF_Cfg_Restore_GPIO17_Fun
+                0x0000000022017f1e                SF_Cfg_Get_Flash_Cfg_Need_Lock
+                0x0000000022017f28                SF_Cfg_Init_Flash_Gpio
+                0x0000000022017f32                SF_Cfg_Flash_Identify
+                0x0000000022017f3c                SF_Ctrl_Enable
+                0x0000000022017f46                SF_Ctrl_Select_Pad
+                0x0000000022017f50                SF_Ctrl_Set_Owner
+                0x0000000022017f5a                SF_Ctrl_Disable
+                0x0000000022017f64                SF_Ctrl_AES_Enable_BE
+                0x0000000022017f6e                SF_Ctrl_AES_Enable_LE
+                0x0000000022017f78                SF_Ctrl_AES_Set_Region
+                0x0000000022017f82                SF_Ctrl_AES_Set_Key
+                0x0000000022017f8c                SF_Ctrl_AES_Set_Key_BE
+                0x0000000022017f96                SF_Ctrl_AES_Set_IV
+                0x0000000022017fa0                SF_Ctrl_AES_Set_IV_BE
+                0x0000000022017faa                SF_Ctrl_AES_Enable
+                0x0000000022017fb4                SF_Ctrl_AES_Disable
+                0x0000000022017fbe                SF_Ctrl_Set_Flash_Image_Offset
+                0x0000000022017fc8                SF_Ctrl_Get_Flash_Image_Offset
+                0x0000000022017fd2                SF_Ctrl_Select_Clock
+                0x0000000022017fdc                SF_Ctrl_SendCmd
+                0x0000000022017fe6                SF_Ctrl_Icache_Set
+                0x0000000022017ff0                SF_Ctrl_Icache2_Set
+                0x0000000022017ffa                SF_Ctrl_GetBusyState
+                0x0000000022018004                SF_Ctrl_Is_AES_Enable
+                0x000000002201800e                SF_Ctrl_Get_Clock_Delay
+                0x0000000022018018                SF_Ctrl_Set_Clock_Delay
+                0x0000000022018022                XIP_SFlash_State_Save
+                0x000000002201802c                XIP_SFlash_State_Restore
+                0x0000000022018036                XIP_SFlash_Erase_Need_Lock
+                0x0000000022018040                XIP_SFlash_Write_Need_Lock
+                0x000000002201804a                XIP_SFlash_Read_Need_Lock
+                0x0000000022018054                XIP_SFlash_GetJedecId_Need_Lock
+                0x000000002201805e                XIP_SFlash_GetDeviceId_Need_Lock
+                0x0000000022018068                XIP_SFlash_GetUniqueId_Need_Lock
+                0x0000000022018072                XIP_SFlash_Read_Via_Cache_Need_Lock
+                0x000000002201807c                XIP_SFlash_Read_With_Lock
+                0x0000000022018086                XIP_SFlash_Write_With_Lock
+                0x0000000022018090                XIP_SFlash_Erase_With_Lock
+                0x000000002201809a                XIP_SFlash_Opt_Enter
+                0x00000000220180a4                XIP_SFlash_Opt_Exit
+                0x00000000220180ae                BFLB_Soft_CRC32
+ .tcm_code      0x00000000220180b8      0x5ac out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+                0x00000000220180b8                SFlash_Restore_From_Powerdown
+                0x0000000022018164                SFlash_RCV_Enable
+                0x000000002201822e                SFlash_Erase_Security_Register
+                0x000000002201833c                SFlash_Program_Security_Register
+                0x00000000220184d8                SFlash_Read_Security_Register
+ .tcm_code      0x0000000022018664      0x152 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+                0x0000000022018664                SF_Cfg_Get_Flash_Cfg_Need_Lock_Ext
+                0x000000002201872c                SF_Cfg_Flash_Identify_Ext
+ *(.tcm_const)
+ *fill*         0x00000000220187b6        0x2 
+ .tcm_const     0x00000000220187b8      0x1bc out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+ *(.sclock_rlt_code)
+ .sclock_rlt_code
+                0x0000000022018974      0x140 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                0x0000000022018974                AON_Power_On_MBG
+                0x000000002201897e                AON_Power_Off_MBG
+                0x0000000022018988                AON_Power_On_XTAL
+                0x0000000022018992                AON_Set_Xtal_CapCode
+                0x000000002201899c                AON_Get_Xtal_CapCode
+                0x00000000220189a6                AON_Power_Off_XTAL
+                0x00000000220189b0                EF_Ctrl_Get_Trim_Parity
+                0x00000000220189ba                EF_Ctrl_Read_RC32M_Trim
+                0x00000000220189c4                EF_Ctrl_Read_RC32K_Trim
+                0x00000000220189ce                GLB_Get_Root_CLK_Sel
+                0x00000000220189d8                GLB_Set_System_CLK_Div
+                0x00000000220189e2                GLB_Get_BCLK_Div
+                0x00000000220189ec                GLB_Get_HCLK_Div
+                0x00000000220189f6                Update_SystemCoreClockWith_XTAL
+                0x0000000022018a00                GLB_Set_System_CLK
+                0x0000000022018a0a                System_Core_Clock_Update_From_RC32M
+                0x0000000022018a14                GLB_Set_SF_CLK
+                0x0000000022018a1e                GLB_Set_PKA_CLK_Sel
+                0x0000000022018a28                HBN_32K_Sel
+                0x0000000022018a32                HBN_Set_ROOT_CLK_Sel
+                0x0000000022018a3c                HBN_Power_On_Xtal_32K
+                0x0000000022018a46                HBN_Power_Off_Xtal_32K
+                0x0000000022018a50                HBN_Trim_RC32K
+                0x0000000022018a5a                PDS_Trim_RC32M
+                0x0000000022018a64                PDS_Select_RC32M_As_PLL_Ref
+                0x0000000022018a6e                PDS_Select_XTAL_As_PLL_Ref
+                0x0000000022018a78                PDS_Power_On_PLL
+                0x0000000022018a82                PDS_Enable_PLL_All_Clks
+                0x0000000022018a8c                PDS_Disable_PLL_All_Clks
+                0x0000000022018a96                PDS_Enable_PLL_Clk
+                0x0000000022018aa0                PDS_Disable_PLL_Clk
+                0x0000000022018aaa                PDS_Power_Off_PLL
+ *(.sclock_rlt_const)
+                0x0000000022018ab4                . = ALIGN (0x4)
+                0x0000000022018ab4                __text_code_end__ = .
+
+.rela.dyn       0x0000000022018ab4        0x0
+ .rela.text.start_load
+                0x0000000022018ab4        0x0 out/ChipTest/Eflash_Loader/main.o
+ .rela.init     0x0000000022018ab4        0x0 out/ChipTest/Eflash_Loader/main.o
+ .rela.text.metal.init.enter
+                0x0000000022018ab4        0x0 out/ChipTest/Eflash_Loader/main.o
+ .rela.text.bflb_platform_uart_dbg_init
+                0x0000000022018ab4        0x0 out/ChipTest/Eflash_Loader/main.o
+ .rela.text.bflb_platform_uart_dbg_deinit
+                0x0000000022018ab4        0x0 out/ChipTest/Eflash_Loader/main.o
+                0x0000000022018ab4                . = ALIGN (0x4)
+                0x0000000022018ab4                __itcm_load_addr = .
+
+.itcm_region    0x0000000022018ab4        0x0
+                0x0000000022018ab4                . = ALIGN (0x4)
+                0x0000000022018ab4                __tcm_code_start__ = .
+                0x0000000022018ab4                . = ALIGN (0x4)
+                0x0000000022018ab4                __tcm_code_end__ = .
+                0x0000000022018ab4                __dtcm_load_addr = (__itcm_load_addr + SIZEOF (.itcm_region))
+
+.dtcm_region    0x000000004201c000        0x0 load address 0x0000000022018ab4
+                0x000000004201c000                . = ALIGN (0x4)
+                0x000000004201c000                __tcm_data_start__ = .
+ *(.tcm_data)
+                0x000000004201c000                . = ALIGN (0x4)
+                0x000000004201c000                __tcm_data_end__ = .
+
+.stack_dummy    0x000000004201c000      0x400
+                0x000000004201c000                . = ALIGN (0x4)
+                0x000000004201c400                . = (. + StackSize)
+ *fill*         0x000000004201c000      0x400 
+                0x000000004201c400                . = ALIGN (0x4)
+                0x0000000042020000                __StackTop = (ORIGIN (dtcm_memory) + LENGTH (dtcm_memory))
+                0x000000004201fc00                __StackLimit = (__StackTop - SIZEOF (.stack_dummy))
+                0x0000000000000001                ASSERT ((__StackLimit >= __tcm_data_end__), region RAM overflowed with stack)
+                0x0000000022018ab4                __system_ram_load_addr = (__dtcm_load_addr + SIZEOF (.dtcm_region))
+
+.system_ram_data_region
+                0x0000000042020000        0x0 load address 0x0000000022018ab4
+                0x0000000042020000                . = ALIGN (0x4)
+                0x0000000042020000                __system_ram_data_start__ = .
+                0x0000000042020000                . = ALIGN (0x4)
+                0x0000000042020000                __system_ram_data_end__ = .
+                0x0000000022018ab4                __ram_load_addr = (__system_ram_load_addr + SIZEOF (.system_ram_data_region))
+
+RAM_DATA        0x0000000042020000       0xec load address 0x0000000022018ab4
+                0x0000000042020000                . = ALIGN (0x4)
+                0x0000000042020000                __ram_data_start__ = .
+                0x0000000042020800                PROVIDE (__global_pointer$ = (. + 0x800))
+ *(.data)
+ *(.data.*)
+ .data.flashCfg_Gd_Q80E_Q16E
+                0x0000000042020000       0x54 out/ChipTest/Eflash_Loader/main.o
+ .data.uart_if_cfg
+                0x0000000042020054       0x10 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ .data.boot_cpu_cfg
+                0x0000000042020064       0x24 out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+                0x0000000042020064                boot_cpu_cfg
+ .data.flashCfg_Gd_Q80E_Q16E
+                0x0000000042020088       0x54 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+ *(.sdata)
+ *(.sdata.*)
+ .sdata.xtalType
+                0x00000000420200dc        0x1 out/ChipTest/Eflash_Loader/main.o
+                0x00000000420200dc                xtalType
+ *fill*         0x00000000420200dd        0x3 
+ .sdata.xtal_clk
+                0x00000000420200e0        0x4 out/ChipTest/Eflash_Loader/main.o
+                0x00000000420200e0                xtal_clk
+ .sdata.uart_if_fifocfg
+                0x00000000420200e4        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ .sdata.SdioFuncReg
+                0x00000000420200e8        0x4 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sdu.o
+                0x00000000420200e8                SdioFuncReg
+ *(.sdata2)
+ *(.sdata2.*)
+                0x00000000420200ec                . = ALIGN (0x4)
+                0x00000000420200ec                __ram_data_end__ = .
+
+.bss            0x00000000420200ec     0xdbdc load address 0x0000000022018ba0
+                0x00000000420200ec                . = ALIGN (0x4)
+                0x00000000420200ec                __bss_start__ = .
+ *(.bss*)
+ .bss.eflash_loader_cmd_ack_buf
+                0x00000000420200ec       0x40 out/ChipTest/Eflash_Loader/main.o
+                0x00000000420200ec                eflash_loader_cmd_ack_buf
+ .bss.eflash_loader_readbuf
+                0x000000004202012c     0x8010 out/ChipTest/Eflash_Loader/main.o
+                0x000000004202012c                eflash_loader_readbuf
+ .bss.b.9351    0x000000004202813c       0x18 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .bss.eflash_loader_if_cfg
+                0x0000000042028154       0x24 out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+ .bss.image_cfg
+                0x0000000042028178       0x2c out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+                0x0000000042028178                image_cfg
+ .bss.otp_cfg   0x00000000420281a4       0x30 out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+                0x00000000420281a4                otp_cfg
+ .bss.__Interrupt_Handlers
+                0x00000000420281d4      0x140 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+                0x00000000420281d4                __Interrupt_Handlers
+ .bss.uartIntCbfArra
+                0x0000000042028314       0x40 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+ .bss.secEngIntCbfArra
+                0x0000000042028354       0x18 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+ .bss.print_buf.8849
+                0x000000004202836c       0x80 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+ *(.sbss*)
+ .sbss.bootMode
+                0x00000000420283ec        0x1 out/ChipTest/Eflash_Loader/main.o
+                0x00000000420283ec                bootMode
+ *fill*         0x00000000420283ed        0x3 
+ .sbss.jid      0x00000000420283f0        0x4 out/ChipTest/Eflash_Loader/main.o
+                0x00000000420283f0                jid
+ .sbss.rx_buf_index
+                0x00000000420283f4        0x4 out/ChipTest/Eflash_Loader/main.o
+                0x00000000420283f4                rx_buf_index
+ .sbss.rx_buf_len
+                0x00000000420283f8        0x4 out/ChipTest/Eflash_Loader/main.o
+                0x00000000420283f8                rx_buf_len
+ .sbss.eflash_loader_error
+                0x00000000420283fc        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .sbss.s.9352   0x0000000042028400        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .sbss.startaddr.9349
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+ .sbss.eflash_loader_if
+                0x0000000042028408        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                0x0000000042028408                eflash_loader_if
+ .sbss.abr_gpio_sel
+                0x000000004202840c        0x1 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ *fill*         0x000000004202840d        0x3 
+ .sbss.detected_baudrate
+                0x0000000042028410        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ .sbss.clk_locked.9085
+                0x0000000042028414        0x1 out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+ *fill*         0x0000000042028415        0x3 
+ .sbss.bflb_eflash_loader_flash_id_valid_flag
+                0x0000000042028418        0x4 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+ .sbss.curr_dnld_port.9000
+                0x000000004202841c        0x1 out/ChipTest/Eflash_Loader/sdu.o
+ .sbss.curr_upld_port.9017
+                0x000000004202841d        0x1 out/ChipTest/Eflash_Loader/sdu.o
+ *fill*         0x000000004202841e        0x2 
+ .sbss.sdu_rx_buf_attached
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+ *fill*         0x0000000042028422        0x2 
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+ .sbss.mallocBuf
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+ .sbss.malloced
+                0x000000004202842c        0x4 out/BSP_Common/xz/xz_port.o
+ .sbss.flag_mport
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+                0x0000000042028430                flag_mport
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+ .sbss.init_flag
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+ .sbss.log_len  0x0000000042028438        0x4 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+ .sbss.uart_dbg_disable
+                0x000000004202843c        0x1 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+ *(COMMON)
+ *(.system_ram)
+ *fill*         0x000000004202843d        0x3 
+ .system_ram    0x0000000042028440     0x4888 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                0x0000000042028440                padding
+                0x0000000042028480                shaTmpBuf
+                0x00000000420284c0                checkBuf
+                0x0000000042028cc0                ShaInbuf
+ .system_ram    0x000000004202ccc8     0x1000 out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                0x000000004202dcc8                . = ALIGN (0x4)
+                0x000000004202dcc8                __bss_end__ = .
+
+.noinit_data    0x000000004202dcc8        0x0
+                0x000000004202dcc8                . = ALIGN (0x4)
+                0x000000004202dcc8                __noinit_data_start__ = .
+ *(.noinit_data*)
+                0x000000004202dcc8                . = ALIGN (0x4)
+                0x000000004202dcc8                __noinit_data_end__ = .
+
+.heap           0x000000004202dcc8        0x0
+                0x000000004202dcc8                . = ALIGN (0x4)
+                0x000000004202dcc8                __HeapBase = .
+ *(.heap*)
+                0x000000004202dcc8                . = ALIGN (0x4)
+                0x000000004202dcc8                __HeapLimit = .
+OUTPUT(out/ChipTest/Eflash_Loader/chiptest_eflash_loader.elf elf32-littleriscv)
+
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+ .debug_info    0x0000000000023412      0xb9b /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clz.o)
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+
+Cross Reference Table
+
+Symbol                                            File
+ADC_Channel_Config                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Disable                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Enable                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_FIFO_Cfg                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_FIFO_Is_Empty                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_FIFO_Is_Full                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Gain_Trim                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_GetIntStatus                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Get_FIFO_Count                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Init                                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_IntClr                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_IntMask                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Int_Callback_Install                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_MIC_Bias_Disable                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_MIC_Bias_Enable                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Mic_Init                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Parse_Result                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Read_FIFO                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Reset                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_SET_TSVBE_HIGH                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_SET_TSVBE_LOW                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Scan_Channel_Config                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Start                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Stop                                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Trim_TSEN                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Tsen_Init                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Vbat_Disable                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+ADC_Vbat_Enable                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+AON_ACOMP_Enable                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_acomp.o
+AON_ACOMP_Get_Result                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_acomp.o
+AON_ACOMP_Init                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_acomp.o
+AON_Get_Xtal_CapCode                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_LowPower_Enter_PDS0                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_LowPower_Exit_PDS0                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_Off_BG                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_Off_LDO11_SOC                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_Off_LDO15_RF                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_Off_MBG                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_Off_SFReg                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_Off_XTAL                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_On_BG                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_On_LDO11_SOC                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_On_LDO15_RF                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_On_MBG                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_On_SFReg                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Power_On_XTAL                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+AON_Set_LDO11_SOC_Sstart_Delay                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_aon.o
+AON_Set_Xtal_CapCode                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+ASM_Delay_Us                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+BFLB_Soft_CRC16                                   out/BSP_Common/soft_crc/softcrc.o
+BFLB_Soft_CRC32                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+                                                  out/BSP_Common/partition/partition.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+BFLB_Soft_CRC32_Table                             out/BSP_Common/soft_crc/softcrc.o
+BL602_Delay_MS                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+BL602_Delay_US                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+BL602_MemCmp                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+BL602_MemCpy                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+BL602_MemCpy4                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+BL602_MemCpy_Fast                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/partition/partition.o
+                                                  out/BSP_Common/ring_buffer/ring_buffer.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+BL602_MemSet                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+BL602_MemSet4                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+BLE_IRQHandler_Wrapper                            out/startup/interrupt.o
+BMX_ERR_INT_Callback_Install                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+BMX_ERR_IRQHandler                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+BMX_ERR_IRQHandler_Wrapper                        out/startup/interrupt.o
+BMX_TIMEOUT_INT_Callback_Install                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+BMX_TO_IRQHandler                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+BMX_TO_IRQHandler_Wrapper                         out/startup/interrupt.o
+BOR_IRQHandler_Wrapper                            out/startup/interrupt.o
+BZ_PHY_IRQHandler_Wrapper                         out/startup/interrupt.o
+DMA_ALL_IRQHandler                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_ALL_IRQHandler_Wrapper                        out/startup/interrupt.o
+DMA_BMX_ERR_IRQHandler_Wrapper                    out/startup/interrupt.o
+DMA_Channel_Disable                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_Channel_Enable                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_Channel_Init                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_Channel_Is_Busy                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_Channel_TranferSize                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_Channel_Update_DstMemcfg                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_Channel_Update_SrcMemcfg                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_Disable                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_Enable                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_IntMask                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_Int_Callback_Install                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_Init                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_PpBuf_Append                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_PpBuf_Destroy                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_PpBuf_Remove_Completed_List               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_PpBuf_Start_New_Transmit                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_PpStruct_Init                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_PpStruct_Set_Transfer_Len                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_PpStruct_Start                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_PpStruct_Stop                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+DMA_LLI_Update                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+EFUSE_IRQHandler_Wrapper                          out/startup/interrupt.o
+EF_Ctrl_AutoLoad_Done                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+EF_Ctrl_Busy                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/ChipTest/Eflash_Loader/bflb_efuse.o
+EF_Ctrl_Clear                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+EF_Ctrl_Crc_Enable                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Crc_Is_Busy                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Crc_Result                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Crc_Set_Golden                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Get_Trim_Enable                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Get_Trim_Parity                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Is_All_Bits_Zero                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Is_CapCode_Slot_Empty                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Is_MAC_Address_Slot_Empty                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Is_PowerOffset_Slot_Empty                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Load_Efuse_R0                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/ChipTest/Eflash_Loader/bflb_efuse.o
+EF_Ctrl_Program_Direct_R0                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+                                                  out/ChipTest/Eflash_Loader/bflb_efuse.o
+EF_Ctrl_Program_Efuse_0                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Read_ADC_Gain_Trim                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+EF_Ctrl_Read_AES_Key                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Read_Ana_Trim                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Read_CapCode_Opt                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Read_Chip_ID                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Read_Dbg_Pwd                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Read_Device_Info                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Read_Direct_R0                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+                                                  out/ChipTest/Eflash_Loader/bflb_efuse.o
+EF_Ctrl_Read_MAC_Address                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+EF_Ctrl_Read_MAC_Address_Opt                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Read_MAC_Address_Raw                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Read_PowerOffset_Opt                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Read_R0                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Read_RC32K_Trim                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+EF_Ctrl_Read_RC32M_Trim                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+EF_Ctrl_Read_Secure_Boot                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Read_Secure_Cfg                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Read_Sw_Usage                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Read_TSEN_Trim                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+EF_Ctrl_Readlock_AES_Key                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Readlock_Dbg_Pwd                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Sw_AHB_Clk_0                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Write_AES_Key                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Write_Ana_Trim                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Write_CapCode_Opt                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Write_Dbg_Pwd                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Write_MAC_Address                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Write_MAC_Address_Opt                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Write_PowerOffset_Opt                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Write_R0                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+EF_Ctrl_Write_Secure_Boot                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Write_Secure_Cfg                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Write_Sw_Usage                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Writelock_AES_Key                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Writelock_Dbg_Pwd                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Writelock_MAC_Address                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+EF_Ctrl_Writelock_Sw_Usage                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ef_ctrl.o
+FreeRTOS_Interrupt_Handler                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+GLB_AHB_Slave1_Clock_Gate                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_AHB_Slave1_Reset                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/ChipTest/Eflash_Loader/sdu.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+GLB_BMX_Addr_Monitor_Disable                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_BMX_Addr_Monitor_Enable                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_BMX_BusErrResponse_Disable                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_BMX_BusErrResponse_Enable                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_BMX_Get_Err_Addr                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_BMX_Get_Status                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_BMX_Init                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Clr_GPIO_IntStatus                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_DAC_Init                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GLB_DAC_Set_ChanA_Config                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GLB_DAC_Set_ChanA_Value                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GLB_DAC_Set_ChanB_Config                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GLB_DAC_Set_ChanB_Value                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GLB_Deswap_Flash_Pin                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+GLB_GPIO_Func_Init                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_Get_Fun                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+GLB_GPIO_Get_Real_Fun                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_INPUT_Disable                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_INPUT_Enable                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_INT0_Callback_Install                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_INT0_IRQHandler_Install                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_Init                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_gpio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+GLB_GPIO_IntClear                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_IntMask                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_OUTPUT_Disable                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+GLB_GPIO_OUTPUT_Enable                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+GLB_GPIO_Read                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+GLB_GPIO_Set_HZ                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+GLB_GPIO_Set_PullDown                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_Set_PullUp                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIO_Write                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_GPIP_DAC_Init                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GLB_GPIP_DAC_Set_ChanA_Config                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GLB_GPIP_DAC_Set_ChanB_Config                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GLB_Get_BCLK_Div                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+GLB_Get_GPIO_IntCtlMod                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Get_GPIO_IntStatus                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Get_HCLK_Div                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+GLB_Get_Root_CLK_Sel                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+GLB_Get_SRAM_PARM                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Get_SRAM_RET                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Get_SRAM_SLP                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_IR_LED_Driver_Disable                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_IR_LED_Driver_Enable                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_IR_LED_Driver_Ibias                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_IR_RX_GPIO_Sel                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_JTAG_Sig_Swap_Set                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Platform_Wakeup_Disable                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Platform_Wakeup_Enable                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_SW_CPU_Reset                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+GLB_SW_POR_Reset                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+GLB_SW_System_Reset                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+GLB_Select_External_Flash                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+GLB_Select_Internal_Flash                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+GLB_Set_ADC_CLK                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_BLE_CLK                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_BT_Coex_Signal                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_DAC_CLK                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_DIG_32K_CLK                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_DIG_512K_CLK                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_DIG_CLK_Sel                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_DMA_CLK                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_EM_Sel                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_GPIO_IntMod                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_I2C_CLK                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+GLB_Set_IR_CLK                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+GLB_Set_MTimer_CLK                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+GLB_Set_PKA_CLK_Sel                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+GLB_Set_SF_CLK                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+GLB_Set_SPI_0_ACT_MOD_Sel                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_SPI_CLK                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+GLB_Set_SRAM_PARM                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_SRAM_RET                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_SRAM_SLP                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_System_CLK                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+                                                  out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+GLB_Set_System_CLK_Div                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+GLB_Set_UART_CLK                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+GLB_Set_WiFi_Core_CLK                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Set_WiFi_Encrypt_CLK                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_Swap_Flash_Pin                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+GLB_Swap_SPI_0_MOSI_With_MISO                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GLB_UART_Fun_Sel                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_gpio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+GLB_UART_Sig_Swap_Set                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_gpio.o
+GPADC_DMA_IRQHandler                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+GPADC_DMA_IRQHandler_Wrapper                      out/startup/interrupt.o
+GPIO_INT0_IRQHandler                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+GPIO_INT0_IRQHandler_Wrapper                      out/startup/interrupt.o
+GPIP_DAC_ChanA_Disable                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_DAC_ChanA_Enable                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_DAC_ChanB_Disable                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_DAC_ChanB_Enable                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_DAC_DMA_WriteData                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_Set_DAC_ChanA_SRC_SEL                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_Set_DAC_ChanB_SRC_SEL                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_Set_DAC_DMA_TX_Disable                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_Set_DAC_DMA_TX_Enable                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_Set_DAC_DMA_TX_FORMAT_SEL                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+GPIP_Set_DAC_Mod_SEL                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dac.o
+HBN_32K_Sel                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Aon_Pad_IeSmt_Cfg                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_App_Reset                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Clear_IRQ                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Clear_RTC_Counter                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Clear_RTC_INT                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Disable                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Disable_AComp0_IRQ                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Disable_AComp1_IRQ                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Disable_BOR_IRQ                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Enable                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Enable_AComp0_IRQ                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Enable_AComp1_IRQ                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Enable_BOR_IRQ                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Enable_Ext                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Enable_RTC_Counter                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_GPIO7_Dbg_Pull_Cfg                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+HBN_GPIO_INT_Disable                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_GPIO_INT_Enable                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Get_BOR_OUT_State                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Get_INT_State                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Get_PIR_Interval                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Get_PIR_Threshold                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Get_Pin_Wakeup_Mode                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Get_RTC_Timer_Val                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Get_Status_Flag                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Get_Wakeup_Addr                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Hw_Pu_Pd_Cfg                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Mode_Enter                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Mode_Enter_Ext                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_OUT0_IRQHandler                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_OUT0_IRQHandler_Wrapper                       out/startup/interrupt.o
+HBN_OUT1_IRQHandler                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_OUT1_IRQHandler_Wrapper                       out/startup/interrupt.o
+HBN_Out0_Callback_Install                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Out0_IRQHandler_Install                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Out1_Callback_Install                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Out1_IRQHandler_Install                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_PIR_Disable                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_PIR_Enable                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_PIR_HPF_Sel                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_PIR_INT_Config                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_PIR_LPF_Sel                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Pin_WakeUp_Mask                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Power_Down_Flash                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Power_Off_RC32K                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Power_Off_Xtal_32K                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Power_On_RC32K                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Power_On_Xtal_32K                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+HBN_Reset                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_BOR_Cfg                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+                                                  out/startup/system_bl602.o
+HBN_Set_BOR_Config                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_Embedded_Flash_Pullup                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_HRAM_Ret                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_HRAM_slp                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_Ldo11_All_Vout                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_Ldo11_Aon_Vout                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+HBN_Set_Ldo11_Rt_Vout                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+HBN_Set_Ldo11_Soc_Vout                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+HBN_Set_PIR_Interval                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_PIR_Threshold                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_ROOT_CLK_Sel                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+HBN_Set_RTC_Timer                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_Status_Flag                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_UART_CLK_Sel                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+HBN_Set_Wakeup_Addr                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+HBN_Set_XCLK_CLK_Sel                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+HBN_Trim_RC32K                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+I2C_ClockSet                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_Disable                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_Enable                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_IRQHandler                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_IRQHandler_Wrapper                            out/startup/interrupt.o
+I2C_Init                                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_IntMask                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_Int_Callback_Install                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_IsBusy                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_MasterReceiveBlocking                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_MasterSendBlocking                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_RecieveWord                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_Reset                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_SendWord                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_SetPrd                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+I2C_SetSclSync                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+IRRX_IRQHandler                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IRRX_IRQHandler_Wrapper                           out/startup/interrupt.o
+IRTX_IRQHandler                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IRTX_IRQHandler_Wrapper                           out/startup/interrupt.o
+IR_ClrIntStatus                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_DeInit                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_Disable                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_Enable                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_GetIntStatus                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_GetRxDataBitCount                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_GetRxFIFOCount                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_GetRxFIFOStatus                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_IntMask                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_Int_Callback_Install                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_LEDInit                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_LEDSend                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_LearnToInit                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_LearnToReceive                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_LearnToSend                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_ReceiveData                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_ReceiveNEC                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_RxFIFOClear                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_RxInit                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_SWMReceiveData                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_SWMSendCommand                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_SWMSendData                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_SendCommand                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_SendData                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_SendNEC                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_TxInit                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_TxPulseWidthConfig                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_TxSWM                                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+IR_TxSWMPulseWidthConfig                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+Interrupt_Handler                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+                                                  out/startup/interrupt.o
+Interrupt_Handler_Register                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pds.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_ir.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_hbn.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+Interrupt_Handler_Stub                            out/startup/interrupt.o
+L1C_BMX_Addr_Monitor_Disable                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_Addr_Monitor_Enable                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_BusErrResponse_Disable                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_BusErrResponse_Enable                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_ERR_INT_Callback_Install                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_ERR_IRQHandler                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_ERR_IRQHandler_Wrapper                    out/startup/interrupt.o
+L1C_BMX_Get_Err_Addr                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_Get_Status                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_Init                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_TIMEOUT_INT_Callback_Install              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_TO_IRQHandler                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+L1C_BMX_TO_IRQHandler_Wrapper                     out/startup/interrupt.o
+L1C_IROM_2T_Access_Set                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+L1C_Set_Way_Disable                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+L1C_Set_Wrap                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+MAC_GEN_IRQHandler_Wrapper                        out/startup/interrupt.o
+MAC_PORT_TRG_IRQHandler_Wrapper                   out/startup/interrupt.o
+MAC_RX_TRG_IRQHandler_Wrapper                     out/startup/interrupt.o
+MAC_TXRX_MISC_IRQHandler_Wrapper                  out/startup/interrupt.o
+MAC_TXRX_TIMER_IRQHandler_Wrapper                 out/startup/interrupt.o
+MAC_TX_TRG_IRQHandler_Wrapper                     out/startup/interrupt.o
+PDS_Default_Level_Config                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Disable_PLL_All_Clks                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Disable_PLL_Clk                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Enable                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Enable_PLL_All_Clks                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Enable_PLL_Clk                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Force_Config                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Get_IntStatus                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pds.o
+PDS_Get_PdsPllStstus                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pds.o
+PDS_Get_PdsRfStstus                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pds.o
+PDS_Get_PdsStstus                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pds.o
+PDS_IntClear                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pds.o
+PDS_IntMask                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pds.o
+PDS_Int_Callback_Install                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pds.o
+PDS_Power_Off_PLL                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Power_On_PLL                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_RAM_Config                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Reset                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Select_RC32M_As_PLL_Ref                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Select_XTAL_As_PLL_Ref                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_Trim_RC32M                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+PDS_WAKEUP_IRQHandler                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pds.o
+PDS_WAKEUP_IRQHandler_Install                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pds.o
+PDS_WAKEUP_IRQHandler_Wrapper                     out/startup/interrupt.o
+PWM_Channel_Disable                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Channel_Enable                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Channel_Fource_Output                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Channel_Get                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Channel_Init                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Channel_Set_Div                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Channel_Set_Period                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Channel_Set_Threshold1                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Channel_Set_Threshold2                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Channel_Update                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_IRQHandler                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_IRQHandler_Wrapper                            out/startup/interrupt.o
+PWM_IntMask                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Int_Callback_Install                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_SW_Force_Value                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_SW_Mode                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PWM_Smart_Configure                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_pwm.o
+PtTable_Create                                    out/BSP_Common/partition/partition.o
+PtTable_Flash_Erase                               out/BSP_Common/partition/partition.o
+PtTable_Flash_Read                                out/BSP_Common/partition/partition.o
+PtTable_Flash_Write                               out/BSP_Common/partition/partition.o
+PtTable_Get_Active_Entries_By_ID                  out/BSP_Common/partition/partition.o
+PtTable_Get_Active_Entries_By_Name                out/BSP_Common/partition/partition.o
+PtTable_Get_Active_Partition_Need_Lock            out/BSP_Common/partition/partition.o
+PtTable_Set_Flash_Operation                       out/BSP_Common/partition/partition.o
+PtTable_Update_Entry                              out/BSP_Common/partition/partition.o
+RF_TOP_INT0_IRQHandler_Wrapper                    out/startup/interrupt.o
+RF_TOP_INT1_IRQHandler_Wrapper                    out/startup/interrupt.o
+Ring_Buffer_Get_Empty_Length                      out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Get_Length                            out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Get_Status                            out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Init                                  out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Peek                                  out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Peek_Byte                             out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Read                                  out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Read_Byte                             out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Read_Callback                         out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Reset                                 out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Write                                 out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Write_Byte                            out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Write_Byte_Force                      out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Write_Callback                        out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Write_Force                           out/BSP_Common/ring_buffer/ring_buffer.o
+SDIO_IRQHandler_Wrapper                           out/startup/interrupt.o
+SEC_AES_IRQHandler                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+SEC_AES_IRQHandler_Wrapper                        out/startup/interrupt.o
+SEC_BMX_ERR_IRQHandler_Wrapper                    out/startup/interrupt.o
+SEC_CDET_IRQHandler                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+SEC_CDET_IRQHandler_Wrapper                       out/startup/interrupt.o
+SEC_Eng_ClrIntStatus                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+SEC_Eng_GetIntStatus                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+SEC_Eng_IntMask                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+SEC_Eng_Int_Callback_Install                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+SEC_Eng_Turn_Off_Sec_Ring                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SEC_Eng_Turn_On_Sec_Ring                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SEC_GMAC_IRQHandler                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+SEC_GMAC_IRQHandler_Wrapper                       out/startup/interrupt.o
+SEC_PKA_IRQHandler                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+SEC_PKA_IRQHandler_Wrapper                        out/startup/interrupt.o
+SEC_SHA_IRQHandler                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+SEC_SHA_IRQHandler_Wrapper                        out/startup/interrupt.o
+SEC_TRNG_IRQHandler                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+SEC_TRNG_IRQHandler_Wrapper                       out/startup/interrupt.o
+SF_CTRL_IRQHandler_Wrapper                        out/startup/interrupt.o
+SF_Cfg_Deinit_Ext_Flash_Gpio                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Cfg_Flash_Identify                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+SF_Cfg_Flash_Identify_Ext                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SF_Cfg_Get_Flash_Cfg_Need_Lock                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+SF_Cfg_Get_Flash_Cfg_Need_Lock_Ext                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+SF_Cfg_Init_Ext_Flash_Gpio                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Cfg_Init_Flash_Gpio                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Cfg_Init_Internal_Flash_Gpio                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Cfg_Restore_GPIO17_Fun                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_AES_Disable                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_AES_Enable                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_AES_Enable_BE                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_AES_Enable_LE                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_AES_Set_IV                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_AES_Set_IV_BE                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_AES_Set_Key                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_AES_Set_Key_BE                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_AES_Set_Region                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_Disable                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_Enable                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_GetBusyState                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SF_Ctrl_Get_Clock_Delay                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_Get_Flash_Image_Offset                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SF_Ctrl_Icache2_Set                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_Icache_Set                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_Is_AES_Enable                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_Select_Clock                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_Select_Pad                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_SendCmd                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SF_Ctrl_Set_Clock_Delay                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SF_Ctrl_Set_Flash_Image_Offset                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SF_Ctrl_Set_Owner                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Blk32_Erase                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Blk64_Erase                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Busy                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SFlash_Cache_Enable_Set                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Cache_Flush                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Cache_Hit_Count_Get                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Cache_Miss_Count_Get                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Cache_Read_Disable                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Cache_Read_Enable                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Chip_Erase                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_DisableBurstWrap                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Erase                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Erase_Security_Register                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SFlash_GetDeviceId                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+SFlash_GetJedecId                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/main.o
+SFlash_GetUniqueId                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+SFlash_IDbus_Read_Enable                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Init                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                                                  out/ChipTest/Eflash_Loader/main.o
+SFlash_Powerdown                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Program                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Program_Security_Register                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SFlash_Qspi_Enable                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/main.o
+SFlash_RCV_Enable                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Read                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Read_Reg                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Read_Reg_With_Cmd                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Read_Security_Register                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SFlash_Releae_Powerdown                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Reset_Continue_Read                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Restore_From_Powerdown                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SFlash_Sector_Erase                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_SetBurstWrap                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_SetSPIMode                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Set_IDbus_Cfg                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+SFlash_Software_Reset                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Volatile_Reg_Write_Enable                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+SFlash_Write_Enable                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Write_Reg                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Write_Reg_With_Cmd                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SPI_ClockConfig                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_ClrIntStatus                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_ClrRxFifo                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_ClrTxFifo                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_DeInit                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Disable                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Enable                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_FifoConfig                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_GetBusyStatus                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_GetFifoStatus                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_GetIntStatus                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_GetRxFifoCount                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_GetTxFifoCount                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_IRQHandler                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_IRQHandler_Wrapper                            out/startup/interrupt.o
+SPI_Init                                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_IntMask                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Int_Callback_Install                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_ReceiveData                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Recv_16bits                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Recv_24bits                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Recv_32bits                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Recv_8bits                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_RxIgnoreDisable                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_RxIgnoreEnable                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_SendData                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_SendRecv_16bits                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_SendRecv_24bits                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_SendRecv_32bits                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_SendRecv_8bits                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Send_16bits                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Send_24bits                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Send_32bits                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_Send_8bits                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_SetClock                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_SetDeglitchCount                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SPI_SetTimeOutValue                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_spi.o
+SdioFuncReg                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sdu.o
+                                                  out/ChipTest/Eflash_Loader/sdu.o
+Sec_Dbg_Read_Chip_ID                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_dbg.o
+Sec_Dbg_Read_Dbg_Enable                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_dbg.o
+Sec_Dbg_Read_Dbg_Mode                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_dbg.o
+Sec_Dbg_Read_WiFi_MAC                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_dbg.o
+Sec_Eng_AES_Crypt                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_crypt.o
+Sec_Eng_AES_Disable_Link                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_AES_Enable_BE                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_crypt.o
+Sec_Eng_AES_Enable_LE                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_AES_Enable_Link                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_AES_Finish                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_crypt.o
+Sec_Eng_AES_Init                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_crypt.o
+Sec_Eng_AES_Link_Work                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_AES_Set_Counter_Byte                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_AES_Set_Hw_Key_Src                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_AES_Set_Key_IV                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_AES_Set_Key_IV_BE                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_crypt.o
+Sec_Eng_GMAC_Disable_Link                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_GMAC_Enable_BE                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_GMAC_Enable_LE                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_GMAC_Enable_Link                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_GMAC_Link_Work                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_BigEndian_Enable                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_CREG                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_Clear_Int                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_GF2Mont                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_LADD                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_LCMP                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_LDIV                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_LDIV2N                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_LMOD2N                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_LMUL                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_LMUL2N                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_LSQR                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+Sec_Eng_PKA_LSUB                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_LittleEndian_Enable                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_MADD                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_MEXP                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+Sec_Eng_PKA_MINV                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_MMUL                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_MREM                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_MSQR                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_MSUB                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_Mont2GF                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_Move_Data                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_NREG                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_RESIZE                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_Read_Block                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_Read_Data                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_Reset                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_Write_Block                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_PKA_Write_Data                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_Write_Immediate                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_SHA256_Finish                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_hash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+Sec_Eng_SHA256_Init                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_hash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+Sec_Eng_SHA256_Link_Finish                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_SHA256_Link_Init                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_SHA256_Link_Update                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_SHA256_Update                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_hash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+Sec_Eng_SHA_Disable_Link                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_SHA_Enable_Link                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_SHA_Start                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_hash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+Sec_Eng_Trng_Disable                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+Sec_Eng_Trng_Enable                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_Trng_Int_Disable                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_Trng_Int_Enable                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_Trng_Int_Read                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_Trng_Int_Read_Trigger                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+Sec_Eng_Trng_Read                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+ShaInbuf                                          out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+SystemInit                                        out/startup/system_bl602.o
+                                                  out/startup/GCC/entry.o
+System_Core_Clock_Update_From_RC32M               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+System_NVIC_SetPriority                           out/startup/system_bl602.o
+TIMER_CH0_IRQHandler                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_CH0_IRQHandler_Wrapper                      out/startup/interrupt.o
+TIMER_CH1_IRQHandler                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_CH1_IRQHandler_Wrapper                      out/startup/interrupt.o
+TIMER_ClearIntStatus                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_Disable                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_Enable                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_GetCompValue                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_GetCounterValue                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_GetMatchStatus                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_GetPreloadValue                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_Init                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_IntMask                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_SetCompValue                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_SetCountMode                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_SetPreloadTrigSrc                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_SetPreloadValue                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_WDT_IRQHandler                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+TIMER_WDT_IRQHandler_Wrapper                      out/startup/interrupt.o
+TSEN_Get_Temp                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+TSEN_Get_V_Error                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_adc.o
+TZC_Sboot_Set                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_tzc_sec.o
+TZC_Set_Rom0_R0_Protect                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_tzc_sec.o
+TZC_Set_Rom0_R1_Protect                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_tzc_sec.o
+TZC_Set_Rom1_R0_Protect                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_tzc_sec.o
+TZC_Set_Rom1_R1_Protect                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_tzc_sec.o
+Timer_Int_Callback_Install                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+Trap_Handler                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+                                                  out/startup/interrupt.o
+Trap_Handler_Stub                                 out/startup/interrupt.o
+UART0_IRQHandler                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART0_IRQHandler_Wrapper                          out/startup/interrupt.o
+UART1_IRQHandler                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART1_IRQHandler_Wrapper                          out/startup/interrupt.o
+UART_AutoBaudDetection                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_ClrRtsValue                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_DeInit                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_Disable                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_Enable                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_FifoConfig                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_GetAutoBaudCount                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_GetBaudrate                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_GetIntStatus                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_GetOverflowStatus                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_GetRxBusBusyStatus                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_GetRxFifoCount                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_GetTxBusBusyStatus                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_GetTxFifoCount                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_Init                                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_IntClear                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_IntMask                                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_Int_Callback_Install                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_IrConfig                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_ReceiveData                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_RxFifoClear                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_SendData                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_SendDataBlock                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_SetBaudrate                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_SetDeglitchCount                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_SetRtsValue                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_SetRxDataLength                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_SetRxTimeoutValue                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_SetTxDataLength                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_TxFifoClear                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+UART_TxFreeRun                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_uart.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+Update_SystemCoreClockWith_XTAL                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+WDT_ClearResetStatus                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_Disable                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_Enable                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_GetCounterValue                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_GetMatchValue                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_GetResetStatus                                out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_IntMask                                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_Int_Callback_Install                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_ResetCounterValue                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_SetCompValue                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WDT_Set_Clock                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+WIFI_IPC_PUBLIC_IRQHandler_Wrapper                out/startup/interrupt.o
+WIFI_IRQHandler_Wrapper                           out/startup/interrupt.o
+XIP_SFlash_Erase                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_Erase_Need_Lock                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_Erase_Need_Lock_Ext                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_Erase_With_Lock                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_Erase_With_Lock_Ext                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_GetDeviceId_Need_Lock                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_GetDeviceId_Need_Lock_Ext              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_GetJedecId_Need_Lock                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_GetJedecId_Need_Lock_Ext               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_GetUniqueId_Need_Lock                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_GetUniqueId_Need_Lock_Ext              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_Init                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_Opt_Enter                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+XIP_SFlash_Opt_Exit                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+XIP_SFlash_RCV_Enable_Need_Lock                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_RCV_Enable_With_Lock                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_Read                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_Read_Need_Lock                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_Read_Need_Lock_Ext                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_Read_Via_Cache_Need_Lock               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sf_cfg_ext.o
+                                                  out/BSP_Common/partition/partition.o
+XIP_SFlash_Read_With_Lock                         out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_Read_With_Lock_Ext                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_State_Restore                          out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_State_Restore_Ext                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_State_Save                             out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_Write                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_Write_Need_Lock                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_Write_Need_Lock_Ext                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+XIP_SFlash_Write_With_Lock                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_romapi.o
+XIP_SFlash_Write_With_Lock_Ext                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+__Interrupt_Handlers                              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+__StackTop                                        out/startup/GCC/entry.o
+__Vectors                                         out/startup/interrupt.o
+                                                  out/startup/GCC/entry.o
+                                                  out/ChipTest/Eflash_Loader/main.o
+__adddf3                                          /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(adddf3.o)
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+                                                  out/BSP_Common/libc/atof.o
+__assert_func                                     out/BSP_Common/libc/common.o
+__bss_end__                                       out/startup/GCC/start_load.o
+__bss_start__                                     out/startup/GCC/start_load.o
+__clz_tab                                         /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clz.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_umoddi3.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_udivdi3.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clzsi2.o)
+__clzsi2                                          /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clzsi2.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatsidf.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(muldf3.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(divdf3.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(adddf3.o)
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+__ctypes                                          out/BSP_Common/libc/ctypes.o
+                                                  out/BSP_Common/libc/ctype_isxdigit.o
+                                                  out/BSP_Common/libc/ctype_toupper.o
+                                                  out/BSP_Common/libc/ctype_tolower.o
+                                                  out/BSP_Common/libc/ctype_isupper.o
+                                                  out/BSP_Common/libc/ctype_isspace.o
+                                                  out/BSP_Common/libc/ctype_isprint.o
+                                                  out/BSP_Common/libc/ctype_islower.o
+                                                  out/BSP_Common/libc/ctype_ispunct.o
+                                                  out/BSP_Common/libc/ctype_isgraph.o
+                                                  out/BSP_Common/libc/ctype_iscntrl.o
+                                                  out/BSP_Common/libc/ctype_isalpha.o
+                                                  out/BSP_Common/libc/ctype_isalnum.o
+__divdf3                                          /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(divdf3.o)
+                                                  out/BSP_Common/libc/atof.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+__dtcm_load_addr                                  out/startup/GCC/start_load.o
+__fixdfsi                                         /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(fixdfsi.o)
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+__fixunsdfsi                                      /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(fixunsdfsi.o)
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+__floatsidf                                       /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatsidf.o)
+                                                  out/BSP_Common/libc/atof.o
+__floatunsidf                                     /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+__freertos_irq_stack_top                          out/BSP_Common/FreeRTOS/port.o
+__global_pointer$                                 out/startup/GCC/entry.o
+__itcm_load_addr                                  out/startup/GCC/start_load.o
+__metal_after_main                                out/startup/GCC/entry.o
+__metal_chicken_bit                               out/startup/GCC/entry.o
+__muldf3                                          /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(muldf3.o)
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+                                                  out/BSP_Common/libc/atof.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+__ram_data_end__                                  out/startup/GCC/start_load.o
+__ram_data_start__                                out/startup/GCC/start_load.o
+__ram_load_addr                                   out/startup/GCC/start_load.o
+__rand48_seed                                     out/BSP_Common/libc/lrand48.o
+                                                  out/BSP_Common/libc/srand48.o
+                                                  out/BSP_Common/libc/seed48.o
+                                                  out/BSP_Common/libc/mrand48.o
+__register_frame_info                             out/startup/GCC/entry.o
+__strxspn                                         out/BSP_Common/libc/strxspn.o
+                                                  out/BSP_Common/libc/strpbrk.o
+                                                  out/BSP_Common/libc/strspn.o
+                                                  out/BSP_Common/libc/strcspn.o
+__system_ram_data_end__                           out/startup/GCC/start_load.o
+__system_ram_data_start__                         out/startup/GCC/start_load.o
+__system_ram_load_addr                            out/startup/GCC/start_load.o
+__tcm_code_end__                                  out/startup/GCC/start_load.o
+__tcm_code_start__                                out/startup/GCC/start_load.o
+__tcm_data_end__                                  out/startup/GCC/start_load.o
+__tcm_data_start__                                out/startup/GCC/start_load.o
+__udivdi3                                         /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_udivdi3.o)
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Common/libc/vsnprintf.o
+__umoddi3                                         /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_umoddi3.o)
+                                                  out/BSP_Common/libc/vsnprintf.o
+_enter                                            out/startup/GCC/entry.o
+atof                                              out/BSP_Common/libc/atof.o
+atoi                                              out/BSP_Common/libc/atoi.o
+atol                                              out/BSP_Common/libc/atol.o
+atoll                                             out/BSP_Common/libc/atoll.o
+bflb_clear_flash_status_register                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+bflb_crypt_auth_decrypt                           out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_auth_decrypt_do                        out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_decrypt                                out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_decrypt_do                             out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_deinit                                 out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_deinit_do                              out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_encrypt                                out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_encrypt_do                             out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_encrypt_tag                            out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_encrypt_tag_do                         out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_finish                                 out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_finish_do                              out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_init                                   out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_init_do                                out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_setadd                                 out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_setadd_do                              out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_setkey                                 out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_setkey_do                              out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_update                                 out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_update_do                              out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_dsa_decrypt_crt                              out/BSP_Common/cipher_suite/bflb_dsa.o
+bflb_dsa_init                                     out/BSP_Common/cipher_suite/bflb_dsa.o
+bflb_dsa_mexp_binary                              out/BSP_Common/cipher_suite/bflb_dsa.o
+bflb_dsa_mexp_mont                                out/BSP_Common/cipher_suite/bflb_dsa.o
+bflb_dsa_sign                                     out/BSP_Common/cipher_suite/bflb_dsa.o
+bflb_dsa_verify                                   out/BSP_Common/cipher_suite/bflb_dsa.o
+bflb_ecc_get_random_value                         out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdh_deinit                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdh_get_encrypt_key                         out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdh_get_public_key                          out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdh_init                                    out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdsa_deinit                                 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdsa_get_private_key                        out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdsa_get_public_key                         out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdsa_init                                   out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdsa_sign                                   out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdsa_verify                                 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_eflash_loader_boot                           out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+bflb_eflash_loader_boot_init                      out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+bflb_eflash_loader_boot_main                      out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_eflash_loader_boot_pre_jump                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+bflb_eflash_loader_boot_read                      out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+bflb_eflash_loader_cache_enable                   out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+bflb_eflash_loader_clk_set_from_user              out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+bflb_eflash_loader_cmd_init                       out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_cmd_process                    out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_deinit_sdio_gpio               out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+bflb_eflash_loader_deinit_uart_gpio               out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+bflb_eflash_loader_deinit_uart_gpio_do            out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+bflb_eflash_loader_disable_cci_sdio_co_exsit      out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+bflb_eflash_loader_if_deinit                      out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_if_handshake_poll              out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_if_init                        out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_if_read                        out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_if_select                      out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_if_set                         out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_if_wait_tx_idle                out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_if_write                       out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_init_flash_gpio                out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+bflb_eflash_loader_init_sdio_gpio                 out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_init_uart_gpio                 out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+bflb_eflash_loader_interface_deinit               out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+bflb_eflash_loader_interface_init                 out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                                                  out/ChipTest/Eflash_Loader/main.o
+bflb_eflash_loader_jlink_change_rate              out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+bflb_eflash_loader_jlink_deinit                   out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_jlink_handshake_poll           out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_jlink_init                     out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_jlink_recv                     out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_jlink_send                     out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_jlink_wait_tx_idle             out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_main                           out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                                                  out/ChipTest/Eflash_Loader/main.o
+bflb_eflash_loader_no_header_boot_enable          out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+bflb_eflash_loader_parse_bootheader               out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+bflb_eflash_loader_sdio_deinit                    out/ChipTest/Eflash_Loader/bflb_eflash_loader_sdio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_sdio_handshake_poll            out/ChipTest/Eflash_Loader/bflb_eflash_loader_sdio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_sdio_init                      out/ChipTest/Eflash_Loader/bflb_eflash_loader_sdio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_sdio_recv                      out/ChipTest/Eflash_Loader/bflb_eflash_loader_sdio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_sdio_send                      out/ChipTest/Eflash_Loader/bflb_eflash_loader_sdio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_sdio_wait_tx_idle              out/ChipTest/Eflash_Loader/bflb_eflash_loader_sdio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_uart_change_rate               out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+bflb_eflash_loader_uart_deinit                    out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_uart_handshake_poll            out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_uart_init                      out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_uart_recv                      out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_uart_send                      out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_usart_wait_tx_idle             out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_efuse_read                                   out/ChipTest/Eflash_Loader/bflb_efuse.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_efuse_write                                  out/ChipTest/Eflash_Loader/bflb_efuse.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_hash_deinit                                  out/BSP_Common/cipher_suite/bflb_hash.o
+bflb_hash_finish                                  out/BSP_Common/cipher_suite/bflb_hash.o
+bflb_hash_init                                    out/BSP_Common/cipher_suite/bflb_hash.o
+bflb_hash_start                                   out/BSP_Common/cipher_suite/bflb_hash.o
+bflb_hash_update                                  out/BSP_Common/cipher_suite/bflb_hash.o
+bflb_plat_uart_debug_port_set                     out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_clear_time                          out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/sdu.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_sdio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_platform_deinit                              out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+bflb_platform_deinit_time                         out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_deinit_uart_debug_gpio              out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_gpio.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_delay_ms                            out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_platform_dump                                out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_get_log                             out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_platform_get_random                          out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_platform_get_time_ms                         out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/sdu.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_sdio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+bflb_platform_get_time_us                         out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_init                                out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+                                                  out/ChipTest/Eflash_Loader/main.o
+bflb_platform_init_time                           out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_init_uart_debug_gpio                out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_gpio.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_print_set                           out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_printc                              out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_printf                              out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_l1c.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_glb.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_common.o
+                                                  out/BSP_Common/xz/xz_port.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_hash.o
+                                                  out/BSP_Common/cipher_suite/bflb_crypt.o
+                                                  out/ChipTest/Eflash_Loader/sdu.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                                                  out/ChipTest/Eflash_Loader/main.o
+bflb_platform_prints                              out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_printx                              out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_set_alarm_time                      out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_set_alarm_time_callback             out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_start_time                          out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_stop_time                           out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_uart_dbg_deinit                     out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_uart_dbg_init                       out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_platform_usart_dbg_send                      out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+bflb_qe_data_clear                                out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+bflb_set_flash_clock_div                          out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_set_high_speed_flash_clock                   out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                                                  out/ChipTest/Eflash_Loader/main.o
+bflb_set_high_speed_system_clock                  out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                                                  out/ChipTest/Eflash_Loader/main.o
+bflb_set_low_speed_flash_clock                    out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                                                  out/ChipTest/Eflash_Loader/main.o
+bflb_set_low_speed_system_clock                   out/ChipTest/Eflash_Loader/bflb_set_clock.o
+bflb_spi_flash_boot                               out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+bflb_spi_flash_chiperase                          out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_deinit                             out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+bflb_spi_flash_erase                              out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_init                               out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                                                  out/ChipTest/Eflash_Loader/main.o
+bflb_spi_flash_program                            out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_read                               out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+bflb_spi_flash_read_jedec_id                      out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_read_sahb                          out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_read_sahb_xip                      out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+bflb_spi_flash_read_status_reg_with_cmd           out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_read_xip                           out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_sbus_xip_read_init                 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+bflb_spi_flash_set_io_mode                        out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_update_cfg                         out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+bflb_spi_flash_update_controller                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+bflb_spi_flash_update_para                        out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_write_status_reg_with_cmd          out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_xip_read_exit                      out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_xip_read_init                      out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bootMode                                          out/ChipTest/Eflash_Loader/main.o
+boot_cpu_cfg                                      out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+bootrom_read_boot_mode                            out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+                                                  out/ChipTest/Eflash_Loader/main.o
+bsearch                                           out/BSP_Common/libc/bsearch.o
+calloc                                            out/BSP_Common/libc/stdlib.o
+chCRCHTalbe                                       out/BSP_Common/soft_crc/softcrc.o
+chCRCLTalbe                                       out/BSP_Common/soft_crc/softcrc.o
+checkBuf                                          out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+clic_clear_pending                                out/startup/interrupt.o
+                                                  out/ChipTest/Eflash_Loader/sdu.o
+clic_csoft_handler_Wrapper                        out/startup/interrupt.o
+clic_disable_interrupt                            out/startup/interrupt.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+                                                  out/ChipTest/Eflash_Loader/sdu.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+clic_enable_interrupt                             out/startup/interrupt.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_dma.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+clic_get_cliccfg                                  out/startup/interrupt.o
+clic_get_intcfg                                   out/startup/interrupt.o
+clic_mext_handler_Wrapper                         out/startup/interrupt.o
+clic_msip_handler_Wrapper                         out/startup/interrupt.o
+clic_mtimer_handler_Wrapper                       out/startup/interrupt.o
+clic_set_cliccfg                                  out/startup/interrupt.o
+clic_set_intcfg                                   out/startup/interrupt.o
+clic_set_pending                                  out/startup/interrupt.o
+crc32Tab                                          out/BSP_Common/soft_crc/softcrc.o
+                                                  out/BSP_Common/xz/xz_crc32.o
+eTaskGetState                                     out/3rdParty/FreeRTOS/Source/tasks.o
+eflash_loader_cmd_ack_buf                         out/ChipTest/Eflash_Loader/main.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+eflash_loader_dump_data                           out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+eflash_loader_if                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+eflash_loader_readbuf                             out/ChipTest/Eflash_Loader/main.o
+                                                  out/ChipTest/Eflash_Loader/sdu.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+flag_mport                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sdu.o
+                                                  out/ChipTest/Eflash_Loader/sdu.o
+fnmatch                                           out/BSP_Common/libc/fnmatch.o
+free                                              out/BSP_Common/libc/stdlib.o
+freertos_risc_v_trap_handler                      out/BSP_Common/FreeRTOS/portASM.o
+i2cIntCbfArra                                     out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_i2c.o
+image_cfg                                         out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+isalnum                                           out/BSP_Common/libc/ctype_isalnum.o
+isalpha                                           out/BSP_Common/libc/ctype_isalpha.o
+isascii                                           out/BSP_Common/libc/ctype_isascii.o
+isblank                                           out/BSP_Common/libc/ctype_isblank.o
+iscntrl                                           out/BSP_Common/libc/ctype_iscntrl.o
+isdigit                                           out/BSP_Common/libc/ctype_isdigit.o
+isgraph                                           out/BSP_Common/libc/ctype_isgraph.o
+islower                                           out/BSP_Common/libc/ctype_islower.o
+isprint                                           out/BSP_Common/libc/ctype_isprint.o
+ispunct                                           out/BSP_Common/libc/ctype_ispunct.o
+isspace                                           out/BSP_Common/libc/ctype_isspace.o
+                                                  out/BSP_Common/libc/strntoumax.o
+                                                  out/BSP_Common/libc/vsscanf.o
+                                                  out/BSP_Common/libc/atof.o
+isupper                                           out/BSP_Common/libc/ctype_isupper.o
+isxdigit                                          out/BSP_Common/libc/ctype_isxdigit.o
+jid                                               out/ChipTest/Eflash_Loader/main.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+jrand48                                           out/BSP_Common/libc/jrand48.o
+                                                  out/BSP_Common/libc/nrand48.o
+                                                  out/BSP_Common/libc/mrand48.o
+                                                  out/BSP_Common/libc/lrand48.o
+lrand48                                           out/BSP_Common/libc/lrand48.o
+main                                              out/ChipTest/Eflash_Loader/main.o
+                                                  out/startup/GCC/entry.o
+                                                  out/BSP_Common/partition/partition.o
+malloc                                            out/BSP_Common/libc/stdlib.o
+memccpy                                           out/BSP_Common/libc/memccpy.o
+memchr                                            out/BSP_Common/libc/memchr.o
+memcmp                                            out/BSP_Common/libc/memcmp.o
+                                                  out/BSP_Common/partition/partition.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+                                                  out/BSP_Common/libc/memmem.o
+memcpy                                            out/BSP_Common/libc/memcpy.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_xip_sflash_ext.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+                                                  out/BSP_Common/xz/xz_dec_lzma2.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+memmem                                            out/BSP_Common/libc/memmem.o
+                                                  out/BSP_Common/libc/strstr.o
+memmove                                           /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libc.a(lib_a-memmove-stub.o)
+                                                  out/BSP_Common/xz/xz_dec_lzma2.o
+memrchr                                           out/BSP_Common/libc/memrchr.o
+memset                                            out/BSP_Common/libc/memset.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_calib_data.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sec_eng.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+                                                  out/BSP_Common/xz/xz_dec_lzma2.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_hash.o
+                                                  out/BSP_Common/libc/strxspn.o
+                                                  out/BSP_Common/libc/strncpy.o
+memswap                                           out/BSP_Common/libc/memswap.o
+                                                  out/BSP_Common/libc/qsort.o
+mfg_efuse_get_rf_cal_slots                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_is_macaddr_slot_empty                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_is_poweroffset_slot_empty               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_is_xtal_capcode_slot_empty              out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_program                                 out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_read                                    out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_read_macaddr                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_read_poweroffset                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_read_xtal_capcode                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_set_rf_cal_slots                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_write_macaddr                           out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_write_macaddr_pre                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_write_poweroffset                       out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_write_poweroffset_pre                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_write_pre                               out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_write_xtal_capcode                      out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mfg_efuse_write_xtal_capcode_pre                  out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_mfg_efuse.o
+mrand48                                           out/BSP_Common/libc/mrand48.o
+notch_p                                           out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+nrand48                                           out/BSP_Common/libc/nrand48.o
+otp_cfg                                           out/ChipTest/Eflash_Loader/bflb_eflash_loader_boot.o
+padding                                           out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+pcQueueGetName                                    out/3rdParty/FreeRTOS/Source/queue.o
+pcTaskGetName                                     out/3rdParty/FreeRTOS/Source/tasks.o
+pcTimerGetName                                    out/3rdParty/FreeRTOS/Source/timers.o
+pullMachineTimerCompareRegister                   out/BSP_Common/FreeRTOS/port.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+pullMachineTimerCompareRegisterBase               out/BSP_Common/FreeRTOS/port.o
+pullNextTime                                      out/BSP_Common/FreeRTOS/port.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+pvPortMalloc                                      out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+pvTaskIncrementMutexHeldCount                     out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+pvTimerGetTimerID                                 out/3rdParty/FreeRTOS/Source/timers.o
+pxCurrentTCB                                      out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+pxPortInitialiseStack                             out/BSP_Common/FreeRTOS/portASM.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+qsort                                             out/BSP_Common/libc/qsort.o
+rand                                              out/BSP_Common/libc/lrand48.o
+random                                            out/BSP_Common/libc/lrand48.o
+realloc                                           out/BSP_Common/libc/stdlib.o
+rf_calib_data                                     out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_calib_data.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_config_bandwidth                           out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_fcal                                       out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_full_cal                                   out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_get_txgain_index                           out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_get_txgain_max                             out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_get_txgain_min                             out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_get_vco_freq_cw                            out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_get_vco_idac_cw                            out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_init                                       out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_init_calib_mem                             out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_calib_data.o
+rf_pri_init_fast                                  out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_lo_acal                                    out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_notch_param                                out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_query_txgain_table                         out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_rccal                                      out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_restore_cal_reg                            out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_roscal                                     out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_tcal_glb                                   out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_tx_gain_comp                               out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_txcal                                      out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_update_dvga_os                             out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_update_param                               out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_update_power_offset                        out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_update_tcal_param                          out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_update_tx_power_offset                     out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_update_tx_power_offset_res                 out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_update_txgain_tempos                       out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rf_pri_xtalfreq                                   out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rfc_apply_tx_dvga                                 out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+rx_buf_index                                      out/ChipTest/Eflash_Loader/main.o
+                                                  out/ChipTest/Eflash_Loader/sdu.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+rx_buf_len                                        out/ChipTest/Eflash_Loader/main.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+sdio_GEN_CARD2HOST_INT                            out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sdu.o
+sdio_ioctl                                        out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_sdu.o
+sdu_deinit                                        out/ChipTest/Eflash_Loader/sdu.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+sdu_host_check                                    out/ChipTest/Eflash_Loader/sdu.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_sdio.o
+sdu_init                                          out/ChipTest/Eflash_Loader/sdu.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+sdu_receive_data                                  out/ChipTest/Eflash_Loader/sdu.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_sdio.o
+sdu_send_data                                     out/ChipTest/Eflash_Loader/sdu.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_sdio.o
+secp256r1B                                        out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1Gx                                       out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1Gy                                       out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1InvR_N                                   out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1InvR_P                                   out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1N                                        out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1P                                        out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1PrimeN_N                                 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1PrimeN_P                                 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_1                                       out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_1M1                                     out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_1P1                                     out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_BAR2                                    out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_BAR3                                    out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_BAR4                                    out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_BAR8                                    out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_Gx                                      out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_Gy                                      out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_Zerox                                   out/BSP_Common/cipher_suite/bflb_ecdsa.o
+secp256r1_Zeroy                                   out/BSP_Common/cipher_suite/bflb_ecdsa.o
+seed48                                            out/BSP_Common/libc/seed48.o
+shaTmpBuf                                         out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+simple_free                                       out/BSP_Common/xz/xz_port.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+                                                  out/BSP_Common/xz/xz_dec_lzma2.o
+simple_malloc                                     out/BSP_Common/xz/xz_port.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+                                                  out/BSP_Common/xz/xz_dec_lzma2.o
+simple_malloc_init                                out/BSP_Common/xz/xz_port.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+snprintf                                          out/BSP_Common/libc/snprintf.o
+sprintf                                           out/BSP_Common/libc/sprintf.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+srand                                             out/BSP_Common/libc/srand48.o
+srand48                                           out/BSP_Common/libc/srand48.o
+srandom                                           out/BSP_Common/libc/srand48.o
+sscanf                                            out/BSP_Common/libc/sscanf.o
+start_load                                        out/startup/GCC/start_load.o
+                                                  out/startup/GCC/entry.o
+strcasecmp                                        out/BSP_Common/libc/strcasecmp.o
+strcat                                            out/BSP_Common/libc/strcat.o
+strchr                                            out/BSP_Common/libc/strchr.o
+strcmp                                            out/BSP_Common/libc/strcmp.o
+strcpy                                            out/BSP_Common/libc/strcpy.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/BSP_Common/libc/strcat.o
+strcspn                                           out/BSP_Common/libc/strcspn.o
+strlcat                                           out/BSP_Common/libc/strlcat.o
+strlcpy                                           out/BSP_Common/libc/strlcpy.o
+strlen                                            out/BSP_Common/libc/strlen.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Common/partition/partition.o
+                                                  out/BSP_Common/libc/strstr.o
+                                                  out/BSP_Common/libc/strncat.o
+                                                  out/BSP_Common/libc/strlcat.o
+                                                  out/BSP_Common/libc/strcat.o
+                                                  out/BSP_Common/libc/vsnprintf.o
+                                                  out/BSP_Common/libc/atof.o
+strncasecmp                                       out/BSP_Common/libc/strncasecmp.o
+strncat                                           out/BSP_Common/libc/strncat.o
+strncmp                                           out/BSP_Common/libc/strncmp.o
+strncpy                                           out/BSP_Common/libc/strncpy.o
+strnlen                                           out/BSP_Common/libc/strnlen.o
+strntof                                           out/BSP_Common/libc/atof.o
+strntoimax                                        out/BSP_Common/libc/strntoimax.o
+strntoumax                                        out/BSP_Common/libc/strntoumax.o
+                                                  out/BSP_Common/libc/strntoimax.o
+                                                  out/BSP_Common/libc/strtoumax.o
+                                                  out/BSP_Common/libc/strtoimax.o
+                                                  out/BSP_Common/libc/strtoull.o
+                                                  out/BSP_Common/libc/strtoul.o
+                                                  out/BSP_Common/libc/strtoll.o
+                                                  out/BSP_Common/libc/strtol.o
+                                                  out/BSP_Common/libc/vsscanf.o
+                                                  out/BSP_Common/libc/atoll.o
+                                                  out/BSP_Common/libc/atol.o
+                                                  out/BSP_Common/libc/atoi.o
+strpbrk                                           out/BSP_Common/libc/strpbrk.o
+                                                  out/BSP_Common/libc/strsep.o
+strrchr                                           out/BSP_Common/libc/strrchr.o
+strsep                                            out/BSP_Common/libc/strsep.o
+                                                  out/BSP_Common/libc/strtok_r.o
+strspn                                            out/BSP_Common/libc/strspn.o
+strstr                                            out/BSP_Common/libc/strstr.o
+strtof                                            out/BSP_Common/libc/common.o
+strtoimax                                         out/BSP_Common/libc/strtoimax.o
+strtok                                            out/BSP_Common/libc/strtok.o
+strtok_r                                          out/BSP_Common/libc/strtok_r.o
+                                                  out/BSP_Common/libc/strtok.o
+strtol                                            out/BSP_Common/libc/strtol.o
+strtoll                                           out/BSP_Common/libc/strtoll.o
+strtoul                                           out/BSP_Common/libc/strtoul.o
+strtoull                                          out/BSP_Common/libc/strtoull.o
+strtoumax                                         out/BSP_Common/libc/strtoumax.o
+system_bor_init                                   out/startup/system_bl602.o
+tcal_param                                        out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+timerIntCbfArra                                   out/BSP_Driver/BL602_BSP_Driver/StdDriver/bl602_timer.o
+tolower                                           out/BSP_Common/libc/ctype_tolower.o
+toupper                                           out/BSP_Common/libc/ctype_toupper.o
+                                                  out/BSP_Common/libc/strncasecmp.o
+                                                  out/BSP_Common/libc/strcasecmp.o
+tp_index                                          out/BSP_Driver/BL602_BSP_Driver/RFDriver/bl602_rf_private.o
+ucQueueGetQueueType                               out/3rdParty/FreeRTOS/Source/queue.o
+ucStreamBufferGetStreamBufferType                 out/3rdParty/FreeRTOS/Source/stream_buffer.o
+ulTaskNotifyTake                                  out/3rdParty/FreeRTOS/Source/tasks.o
+ullNextTime                                       out/BSP_Common/FreeRTOS/port.o
+uxListRemove                                      out/3rdParty/FreeRTOS/Source/list.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+uxQueueGetQueueNumber                             out/3rdParty/FreeRTOS/Source/queue.o
+uxQueueMessagesWaiting                            out/3rdParty/FreeRTOS/Source/queue.o
+uxQueueMessagesWaitingFromISR                     out/3rdParty/FreeRTOS/Source/queue.o
+uxQueueSpacesAvailable                            out/3rdParty/FreeRTOS/Source/queue.o
+uxStreamBufferGetStreamBufferNumber               out/3rdParty/FreeRTOS/Source/stream_buffer.o
+uxTaskGetNumberOfTasks                            out/3rdParty/FreeRTOS/Source/tasks.o
+uxTaskGetSystemState                              out/3rdParty/FreeRTOS/Source/tasks.o
+uxTaskGetTaskNumber                               out/3rdParty/FreeRTOS/Source/tasks.o
+uxTaskPriorityGet                                 out/3rdParty/FreeRTOS/Source/tasks.o
+uxTaskPriorityGetFromISR                          out/3rdParty/FreeRTOS/Source/tasks.o
+uxTaskResetEventItemValue                         out/3rdParty/FreeRTOS/Source/tasks.o
+uxTimerGetTimerNumber                             out/3rdParty/FreeRTOS/Source/timers.o
+uxTimerIncrementsForOneTick                       out/BSP_Common/FreeRTOS/port.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+vApplicationGetIdleTaskMemory                     out/3rdParty/FreeRTOS/Source/tasks.o
+vApplicationGetTimerTaskMemory                    out/3rdParty/FreeRTOS/Source/timers.o
+vApplicationMallocFailedHook                      out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+vApplicationStackOverflowHook                     out/3rdParty/FreeRTOS/Source/tasks.o
+vApplicationTickHook                              out/3rdParty/FreeRTOS/Source/tasks.o
+vAssertCalled                                     out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/BSP_Common/FreeRTOS/port.o
+vListInitialise                                   out/3rdParty/FreeRTOS/Source/list.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+vListInitialiseItem                               out/3rdParty/FreeRTOS/Source/list.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+vListInsert                                       out/3rdParty/FreeRTOS/Source/list.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+vListInsertEnd                                    out/3rdParty/FreeRTOS/Source/list.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+vPortDefineHeapRegions                            out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+vPortEndScheduler                                 out/BSP_Common/FreeRTOS/port.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+vPortFree                                         out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+vPortGetHeapStats                                 out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+vPortSetupTimerInterrupt                          out/BSP_Common/FreeRTOS/port.o
+vQueueAddToRegistry                               out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+vQueueDelete                                      out/3rdParty/FreeRTOS/Source/queue.o
+vQueueSetQueueNumber                              out/3rdParty/FreeRTOS/Source/queue.o
+vQueueUnregisterQueue                             out/3rdParty/FreeRTOS/Source/queue.o
+vQueueWaitForMessageRestricted                    out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+vStreamBufferDelete                               out/3rdParty/FreeRTOS/Source/stream_buffer.o
+vStreamBufferSetStreamBufferNumber                out/3rdParty/FreeRTOS/Source/stream_buffer.o
+vTaskDelay                                        out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskDelayUntil                                   out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskDelete                                       out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskEndScheduler                                 out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskEnterCritical                                out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+vTaskExitCritical                                 out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+vTaskGetInfo                                      out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskInternalSetTimeOutState                      out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+vTaskList                                         out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskMissedYield                                  out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+vTaskNotifyGiveFromISR                            out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskPlaceOnEventList                             out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+vTaskPlaceOnEventListRestricted                   out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+vTaskPlaceOnUnorderedEventList                    out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskPriorityDisinheritAfterTimeout               out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+vTaskPrioritySet                                  out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskRemoveFromUnorderedEventList                 out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskResume                                       out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskSetTaskNumber                                out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskSetTimeOutState                              out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+vTaskStartScheduler                               out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskSuspend                                      out/3rdParty/FreeRTOS/Source/tasks.o
+vTaskSuspendAll                                   out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+vTaskSwitchContext                                out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+vTimerSetReloadMode                               out/3rdParty/FreeRTOS/Source/timers.o
+vTimerSetTimerID                                  out/3rdParty/FreeRTOS/Source/timers.o
+vTimerSetTimerNumber                              out/3rdParty/FreeRTOS/Source/timers.o
+vsnprintf                                         out/BSP_Common/libc/vsnprintf.o
+                                                  out/BSP_Driver/BL602_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Common/libc/vsprintf.o
+                                                  out/BSP_Common/libc/sprintf.o
+                                                  out/BSP_Common/libc/snprintf.o
+vsprintf                                          out/BSP_Common/libc/vsprintf.o
+vsscanf                                           out/BSP_Common/libc/vsscanf.o
+                                                  out/BSP_Common/libc/sscanf.o
+xISRStackTop                                      out/BSP_Common/FreeRTOS/port.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+xPortGetFreeHeapSize                              out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+xPortGetMinimumEverFreeHeapSize                   out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+xPortStartFirstTask                               out/BSP_Common/FreeRTOS/portASM.o
+                                                  out/BSP_Common/FreeRTOS/port.o
+xPortStartScheduler                               out/BSP_Common/FreeRTOS/port.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+xQueueCreateCountingSemaphore                     out/3rdParty/FreeRTOS/Source/queue.o
+xQueueCreateCountingSemaphoreStatic               out/3rdParty/FreeRTOS/Source/queue.o
+xQueueCreateMutex                                 out/3rdParty/FreeRTOS/Source/queue.o
+xQueueCreateMutexStatic                           out/3rdParty/FreeRTOS/Source/queue.o
+xQueueGenericCreate                               out/3rdParty/FreeRTOS/Source/queue.o
+xQueueGenericCreateStatic                         out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+xQueueGenericReset                                out/3rdParty/FreeRTOS/Source/queue.o
+xQueueGenericSend                                 out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+xQueueGenericSendFromISR                          out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+xQueueGetMutexHolder                              out/3rdParty/FreeRTOS/Source/queue.o
+xQueueGetMutexHolderFromISR                       out/3rdParty/FreeRTOS/Source/queue.o
+xQueueGiveFromISR                                 out/3rdParty/FreeRTOS/Source/queue.o
+xQueueGiveMutexRecursive                          out/3rdParty/FreeRTOS/Source/queue.o
+xQueueIsQueueEmptyFromISR                         out/3rdParty/FreeRTOS/Source/queue.o
+xQueueIsQueueFullFromISR                          out/3rdParty/FreeRTOS/Source/queue.o
+xQueuePeek                                        out/3rdParty/FreeRTOS/Source/queue.o
+xQueuePeekFromISR                                 out/3rdParty/FreeRTOS/Source/queue.o
+xQueueReceive                                     out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+xQueueReceiveFromISR                              out/3rdParty/FreeRTOS/Source/queue.o
+xQueueRegistry                                    out/3rdParty/FreeRTOS/Source/queue.o
+xQueueSemaphoreTake                               out/3rdParty/FreeRTOS/Source/queue.o
+xQueueTakeMutexRecursive                          out/3rdParty/FreeRTOS/Source/queue.o
+xStreamBufferBytesAvailable                       out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferGenericCreate                        out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferGenericCreateStatic                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferIsEmpty                              out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferIsFull                               out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferNextMessageLengthBytes               out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferReceive                              out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferReceiveCompletedFromISR              out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferReceiveFromISR                       out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferReset                                out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferSend                                 out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferSendCompletedFromISR                 out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferSendFromISR                          out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferSetTriggerLevel                      out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferSpacesAvailable                      out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xTaskAbortDelay                                   out/3rdParty/FreeRTOS/Source/tasks.o
+xTaskCatchUpTicks                                 out/3rdParty/FreeRTOS/Source/tasks.o
+xTaskCheckForTimeOut                              out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+xTaskCreate                                       out/3rdParty/FreeRTOS/Source/tasks.o
+xTaskCreateStatic                                 out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+xTaskGenericNotify                                out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xTaskGenericNotifyFromISR                         out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xTaskGetCurrentTaskHandle                         out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+xTaskGetHandle                                    out/3rdParty/FreeRTOS/Source/tasks.o
+xTaskGetSchedulerState                            out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+xTaskGetTickCount                                 out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+xTaskGetTickCountFromISR                          out/3rdParty/FreeRTOS/Source/tasks.o
+xTaskIncrementTick                                out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+xTaskNotifyStateClear                             out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xTaskNotifyWait                                   out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xTaskPriorityDisinherit                           out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+xTaskPriorityInherit                              out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+xTaskRemoveFromEventList                          out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+xTaskResumeAll                                    out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+xTaskResumeFromISR                                out/3rdParty/FreeRTOS/Source/tasks.o
+xTimerCreate                                      out/3rdParty/FreeRTOS/Source/timers.o
+xTimerCreateStatic                                out/3rdParty/FreeRTOS/Source/timers.o
+xTimerCreateTimerTask                             out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+xTimerGenericCommand                              out/3rdParty/FreeRTOS/Source/timers.o
+xTimerGetExpiryTime                               out/3rdParty/FreeRTOS/Source/timers.o
+xTimerGetPeriod                                   out/3rdParty/FreeRTOS/Source/timers.o
+xTimerGetTimerDaemonTaskHandle                    out/3rdParty/FreeRTOS/Source/timers.o
+xTimerIsTimerActive                               out/3rdParty/FreeRTOS/Source/timers.o
+xTimerPendFunctionCall                            out/3rdParty/FreeRTOS/Source/timers.o
+xTimerPendFunctionCallFromISR                     out/3rdParty/FreeRTOS/Source/timers.o
+xtalType                                          out/ChipTest/Eflash_Loader/main.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+xtal_clk                                          out/ChipTest/Eflash_Loader/main.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+xz_BSP_get_dict_buffer                            out/ChipTest/Eflash_Loader/bflb_eflash_loader_cfg.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+xz_BSP_get_output_size                            out/ChipTest/Eflash_Loader/bflb_eflash_loader_cfg.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+xz_BSP_get_work_buffer                            out/ChipTest/Eflash_Loader/bflb_eflash_loader_cfg.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+xz_BSP_init                                       out/ChipTest/Eflash_Loader/bflb_eflash_loader_cfg.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+xz_crc32                                          out/BSP_Common/xz/xz_crc32.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+xz_crc32_init                                     out/BSP_Common/xz/xz_crc32.o
+                                                  out/BSP_Common/xz/xz_decompress.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+xz_dec_end                                        out/BSP_Common/xz/xz_dec_stream.o
+                                                  out/BSP_Common/xz/xz_decompress.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+xz_dec_init                                       out/BSP_Common/xz/xz_dec_stream.o
+                                                  out/BSP_Common/xz/xz_decompress.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+xz_dec_lzma2_create                               out/BSP_Common/xz/xz_dec_lzma2.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+xz_dec_lzma2_end                                  out/BSP_Common/xz/xz_dec_lzma2.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+xz_dec_lzma2_reset                                out/BSP_Common/xz/xz_dec_lzma2.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+xz_dec_lzma2_run                                  out/BSP_Common/xz/xz_dec_lzma2.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+xz_dec_reset                                      out/BSP_Common/xz/xz_dec_stream.o
+xz_dec_run                                        out/BSP_Common/xz/xz_dec_stream.o
+                                                  out/BSP_Common/xz/xz_decompress.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+xz_uncompress_end                                 out/BSP_Common/xz/xz_decompress.o
+xz_uncompress_init                                out/BSP_Common/xz/xz_decompress.o
+xz_uncompress_stream                              out/BSP_Common/xz/xz_decompress.o
diff --git a/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_24m.bin b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_24m.bin
new file mode 100644
index 00000000..0d978b93
Binary files /dev/null and b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_24m.bin differ
diff --git a/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_26m.bin b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_26m.bin
new file mode 100644
index 00000000..6a7f19e5
Binary files /dev/null and b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_26m.bin differ
diff --git a/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_32m.bin b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_32m.bin
new file mode 100644
index 00000000..689391a0
Binary files /dev/null and b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_32m.bin differ
diff --git a/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_38p4m.bin b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_38p4m.bin
new file mode 100644
index 00000000..a8156400
Binary files /dev/null and b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_38p4m.bin differ
diff --git a/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_40m.bin b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_40m.bin
new file mode 100644
index 00000000..734641ca
Binary files /dev/null and b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_40m.bin differ
diff --git a/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_cfg.conf b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_cfg.conf
new file mode 100644
index 00000000..14e6571f
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_cfg.conf
@@ -0,0 +1,56 @@
+[LOAD_CFG]
+#jlink or uart
+interface = uart
+device = COM1
+speed_uart_boot = 500000
+speed_uart_load = 500000
+speed_jlink = 2000
+openocd_config = ft2232
+#0:without load, 1:eflash_loader load
+load_function = 1
+auto_burn = false
+do_reset = true
+#reset retry+reset hold time
+reset_hold_time = 5
+shake_hand_delay = 100
+reset_revert = false
+#cutoff revert+cutoff time
+cutoff_time = 100
+shake_hand_retry = 2
+flash_burn_retry = 1
+checksum_err_retry = 3
+boot2_loader_timeout = 0
+#1:24M, 2:32M, 3:38.4M, 4:40M, 5:26M, 6:RC32M
+#xtal_type = 4
+erase_time_out = 15000
+#chiptype=602
+eflash_loader_file = chips/bl602/eflash_loader/eflash_loader_40m.bin
+check_mac = false
+#0:no erase,1:programmed section erase,2:chip erase
+erase = 1
+# switch eflash_loader command log save
+local_log = false
+#0:verify by calculating SHA256(xip), >0:read back verify and verify by calculating SHA256(sbus)
+verify = 0
+tx_size = 2056
+cpu_reset_after_load = false
+
+[FLASH_CFG]
+flash_id = ef4015
+flash_clock_cfg = 1
+#0:NIO, 1:DO, 2:QO, 3:DIO, 4:QIO
+flash_io_mode = 1
+#empty: auto,0: internal flash with io switch,1: internal flash no io switch,2: GPIO 17-22,3: GPIO 0-2&20-22
+flash_pin = ""
+#empty for auto, otherwise specified para file path: eg: chips/bl602/efuse_bootheader/flash_para.bin
+flash_para = chips/bl602/efuse_bootheader/flash_para.bin
+decompress_write = true
+file = chips/bl602/img_create/bootinfo_boot2.bin chips/bl602/img_create/img_boot2.bin chips/bl602/partition/partition.bin chips/bl602/partition/partition.bin
+address = 00000000 00002000 e000 f000
+
+[EFUSE_CFG]
+burn_en = true
+factory_mode = false
+security_write = false
+file = ../../../Tools/img_tools/efuse_bootheader/efusedata.bin
+maskfile = ../../../Tools/img_tools/efuse_bootheader/efusedata_mask.bin
diff --git a/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_none.bin b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_none.bin
new file mode 100644
index 00000000..9242cb85
Binary files /dev/null and b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_none.bin differ
diff --git a/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_rc32m.bin b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_rc32m.bin
new file mode 100644
index 00000000..3af11185
Binary files /dev/null and b/tools/bflb_flash_tool/chips/bl602/eflash_loader/eflash_loader_rc32m.bin differ
diff --git a/tools/bflb_flash_tool/chips/bl602/efuse_bootheader/efuse_bootheader_cfg.conf b/tools/bflb_flash_tool/chips/bl602/efuse_bootheader/efuse_bootheader_cfg.conf
new file mode 100644
index 00000000..58ce971e
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/efuse_bootheader/efuse_bootheader_cfg.conf
@@ -0,0 +1,196 @@
+[EFUSE_CFG]
+########################################################################
+#2bits
+ef_sf_aes_mode = 0
+#2bits
+ef_sboot_sign_mode = 0
+#2bits
+ef_sboot_en = 0
+#2bits
+ef_dbg_jtag_dis = 0
+#4bits
+ef_dbg_mode = 0
+#32bits
+ef_dbg_pwd_low = 0
+#32bits
+ef_dbg_pwd_high = 0
+#2bits
+flash_pwr_delay = 0
+###################################################################
+ef_key_slot_2_w0 = 0
+ef_key_slot_2_w1 = 0
+ef_key_slot_2_w2 = 0
+ef_key_slot_2_w3 = 0
+ef_key_slot_3_w0 = 0
+ef_key_slot_3_w1 = 0
+ef_key_slot_3_w2 = 0
+ef_key_slot_3_w3 = 0
+ef_key_slot_4_w0 = 0
+ef_key_slot_4_w1 = 0
+ef_key_slot_4_w2 = 0
+ef_key_slot_4_w3 = 0
+
+wr_lock_key_slot_4_l = 0
+wr_lock_dbg_pwd = 0
+wr_lock_key_slot_2 = 0
+wr_lock_key_slot_3 = 0
+wr_lock_key_slot_4_h = 0
+rd_lock_dbg_pwd = 0
+rd_lock_key_slot_2 = 0
+rd_lock_key_slot_3 = 0
+rd_lock_key_slot_4 = 0
+
+[BOOTHEADER_CFG]
+magic_code = 0x504e4642
+revision = 0x01
+#########################flash cfg#############################
+flashcfg_magic_code = 0x47464346
+#flashcfg_magic_code=0
+io_mode = 4
+cont_read_support = 1
+#0.5T sfctrl_clk_delay=0 sfctrl_clk_invert=3
+#1 T sfctrl_clk_delay=1 sfctrl_clk_invert=1
+#1.5T sfctrl_clk_delay=1 sfctrl_clk_invert=3
+sfctrl_clk_delay = 1
+sfctrl_clk_invert = 0x01
+
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+
+sector_size = 4
+mfg_id = 0xc8
+page_size = 256
+
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+
+write_enable_cmd = 0x06
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+
+wel_reg_index = 0
+qe_reg_index = 1
+busy_reg_index = 0
+wel_bit_pos = 1
+
+qe_bit_pos = 1
+busy_bit_pos = 0
+wel_reg_write_len = 2
+wel_reg_read_len = 1
+
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+release_power_down = 0xab
+busy_reg_read_len = 1
+
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+cont_read_code = 0xa0
+cont_read_exit_code = 0xff
+
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+
+sector_erase_time = 300
+blk32k_erase_time = 1200
+
+blk64k_erase_time = 1200
+page_prog_time = 5
+
+chip_erase_time = 200000
+power_down_delay = 20
+qe_data = 0
+
+flashcfg_crc32 = 0
+
+#########################clk cfg####################################
+clkcfg_magic_code = 0x47464350
+#clkcfg_magic_code=0
+
+#0:Not use XTAL to set PLL,1:XTAL is 24M ,2:XTAL is 32M ,3:XTAL is 38.4M
+#4:XTAL is 40M,5:XTAL is 26M,6:XTAL is RC32M
+xtal_type = 4
+#0:RC32M,1:XTAL,2:PLL 48M,3:PLL 120M,4:PLL 160M,5:PLL 192M
+pll_clk = 4
+hclk_div = 0
+bclk_div = 1
+#0:120M,1:XCLK(RC32M or XTAL),2:48M,3:80M,4:BCLK,5:96M
+flash_clk_type = 3
+flash_clk_div = 1
+clkcfg_crc32 = 0
+
+########################boot cfg####################################
+#1:ECC
+sign = 0
+#1:AES128,2:AES256,3:AES192
+encrypt_type = 0
+key_sel = 0
+no_segment = 1
+cache_enable = 1
+notload_in_bootrom = 0
+aes_region_lock = 0
+cache_way_disable = 0x03
+crc_ignore = 0
+hash_ignore = 0
+
+########################image cfg####################################
+#total image len or segment count 
+img_len = 0x100
+bootentry = 0
+#img RAM address or flash offset 
+img_start = 0x2000
+
+#img hash
+hash_0 = 0xdeadbeef
+hash_1 = 0
+hash_2 = 0
+hash_3 = 0
+hash_4 = 0
+hash_5 = 0
+hash_6 = 0
+hash_7 = 0
+
+crc32 = 0xdeadbeef
diff --git a/tools/bflb_flash_tool/chips/bl602/img_create_iot/img_create_cfg.conf b/tools/bflb_flash_tool/chips/bl602/img_create_iot/img_create_cfg.conf
new file mode 100644
index 00000000..3bb4fbad
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/img_create_iot/img_create_cfg.conf
@@ -0,0 +1,15 @@
+[Img_Cfg]
+boot_header_file = 
+efuse_file = 
+efuse_mask_file = 
+encrypt_key_org = 000102030405060708090A0B0C0D0E0F101112131415161718191A1B1C1D1E1F
+aesiv_file = img_create/aesiv_cpu0.bin
+publickey_file = img_create/publickey_uecc.pem
+privatekey_file_uecc = img_create/privatekey_uecc.pem
+segheader_file = img_create/segheader.bin
+segdata_file = 
+bootinfo_file = 
+img_file = 
+whole_img_file = 
+aes_key_org = 00000000000000000000000000000000
+aes_iv = 00000000000000000000000000000000
diff --git a/tools/bflb_flash_tool/chips/bl602/img_create_iot/img_create_cfg_boot2.conf b/tools/bflb_flash_tool/chips/bl602/img_create_iot/img_create_cfg_boot2.conf
new file mode 100644
index 00000000..1c886479
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/img_create_iot/img_create_cfg_boot2.conf
@@ -0,0 +1,15 @@
+[Img_Cfg]
+boot_header_file = 
+efuse_file = 
+efuse_mask_file = 
+encrypt_key_org = 000102030405060708090A0B0C0D0E0F101112131415161718191A1B1C1D1E1F
+aesiv_file = img_create/aesiv.bin
+publickey_file = img_create/publickey_uecc.pem
+privatekey_file_uecc = img_create/privatekey_uecc.pem
+segheader_file = img_create/segheader.bin
+segdata_file = 
+bootinfo_file =
+img_file = 
+whole_img_file = 
+aes_key_org = 11
+aes_iv = 11
diff --git a/tools/bflb_flash_tool/chips/bl602/img_create_iot/img_create_cfg_mfg.conf b/tools/bflb_flash_tool/chips/bl602/img_create_iot/img_create_cfg_mfg.conf
new file mode 100644
index 00000000..0e34c3f8
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/img_create_iot/img_create_cfg_mfg.conf
@@ -0,0 +1,13 @@
+[Img_Cfg]
+boot_header_file = ./efuse_bootheader/bootheader.bin
+efuse_file = ./efuse_bootheader/efusedata.bin
+efuse_mask_file = ./efuse_bootheader/efusedata_mask.bin
+encrypt_key_org = 000102030405060708090A0B0C0D0E0F101112131415161718191A1B1C1D1E1F
+aesiv_file = ./img_create/aesiv.bin
+publickey_file = ./img_create/publickey_uecc.pem
+privatekey_file_uecc = ./img_create/privatekey_uecc.pem
+segheader_file = ./img_create/segheader.bin
+segdata_file = 
+bootinfo_file = ./img_create/bootinfo_mfg.bin
+img_file = ./img_create/img_mfg.bin
+whole_img_file = ./img_create/wholeimg_mfg_if.bin
diff --git a/tools/bflb_flash_tool/chips/bl602/img_create_mcu/img_create_cfg.conf b/tools/bflb_flash_tool/chips/bl602/img_create_mcu/img_create_cfg.conf
new file mode 100644
index 00000000..3bb4fbad
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/img_create_mcu/img_create_cfg.conf
@@ -0,0 +1,15 @@
+[Img_Cfg]
+boot_header_file = 
+efuse_file = 
+efuse_mask_file = 
+encrypt_key_org = 000102030405060708090A0B0C0D0E0F101112131415161718191A1B1C1D1E1F
+aesiv_file = img_create/aesiv_cpu0.bin
+publickey_file = img_create/publickey_uecc.pem
+privatekey_file_uecc = img_create/privatekey_uecc.pem
+segheader_file = img_create/segheader.bin
+segdata_file = 
+bootinfo_file = 
+img_file = 
+whole_img_file = 
+aes_key_org = 00000000000000000000000000000000
+aes_iv = 00000000000000000000000000000000
diff --git a/tools/bflb_flash_tool/chips/bl602/img_create_mcu/img_create_cfg_boot2.conf b/tools/bflb_flash_tool/chips/bl602/img_create_mcu/img_create_cfg_boot2.conf
new file mode 100644
index 00000000..1c886479
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/img_create_mcu/img_create_cfg_boot2.conf
@@ -0,0 +1,15 @@
+[Img_Cfg]
+boot_header_file = 
+efuse_file = 
+efuse_mask_file = 
+encrypt_key_org = 000102030405060708090A0B0C0D0E0F101112131415161718191A1B1C1D1E1F
+aesiv_file = img_create/aesiv.bin
+publickey_file = img_create/publickey_uecc.pem
+privatekey_file_uecc = img_create/privatekey_uecc.pem
+segheader_file = img_create/segheader.bin
+segdata_file = 
+bootinfo_file =
+img_file = 
+whole_img_file = 
+aes_key_org = 11
+aes_iv = 11
diff --git a/tools/bflb_flash_tool/chips/bl602/img_create_mcu/img_create_cfg_mfg.conf b/tools/bflb_flash_tool/chips/bl602/img_create_mcu/img_create_cfg_mfg.conf
new file mode 100644
index 00000000..0e34c3f8
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/img_create_mcu/img_create_cfg_mfg.conf
@@ -0,0 +1,13 @@
+[Img_Cfg]
+boot_header_file = ./efuse_bootheader/bootheader.bin
+efuse_file = ./efuse_bootheader/efusedata.bin
+efuse_mask_file = ./efuse_bootheader/efusedata_mask.bin
+encrypt_key_org = 000102030405060708090A0B0C0D0E0F101112131415161718191A1B1C1D1E1F
+aesiv_file = ./img_create/aesiv.bin
+publickey_file = ./img_create/publickey_uecc.pem
+privatekey_file_uecc = ./img_create/privatekey_uecc.pem
+segheader_file = ./img_create/segheader.bin
+segdata_file = 
+bootinfo_file = ./img_create/bootinfo_mfg.bin
+img_file = ./img_create/img_mfg.bin
+whole_img_file = ./img_create/wholeimg_mfg_if.bin
diff --git a/tools/bflb_flash_tool/chips/bl602/partition/partition_cfg_1M.toml b/tools/bflb_flash_tool/chips/bl602/partition/partition_cfg_1M.toml
new file mode 100644
index 00000000..dfd33a57
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/partition/partition_cfg_1M.toml
@@ -0,0 +1,94 @@
+[pt_table]
+#partition table is 4K in size
+address0 = 0xE000
+address1 = 0xF000
+
+[[pt_entry]]
+type = 0
+name = "FW"
+device = 0
+address0 = 0x010000
+size0 = 0xE7000
+address1 = 0x000
+size1 = 0x000
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+[[pt_entry]]
+type = 2
+name = "mfg"
+device = 0
+address0 = 0x000
+size0 = 0x000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+[[pt_entry]]
+type = 3
+name = "media"
+device = 0
+address0 = 0x0F7000
+size0 = 0x2000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+[[pt_entry]]
+type = 4
+name = "PSM"
+device = 0
+address0 = 0x0F9000
+size0 = 0x2000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+[[pt_entry]]
+type = 5
+name = "KEY"
+device = 0
+address0 = 0x0000
+size0 = 0x000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+[[pt_entry]]
+type = 6
+name = "DATA"
+device = 0
+address0 = 0x0000
+size0 = 0x000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+
+[[pt_entry]]
+type = 7
+name = "factory"
+device = 0
+address0 = 0x0FB000
+size0 = 0x4000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+#if user want to put RF calibration data on flash, uncomment following pt entry
+#[[pt_entry]]
+#type = 8
+#name = "rf_para"
+#device = 0
+#address0 = 0x1FF000
+#size0 = 0x1000
+#address1 = 0
+#size1 = 0
+## compressed image must set len,normal image can left it to 0
+#len = 0
diff --git a/tools/bflb_flash_tool/chips/bl602/partition/partition_cfg_1M_ota.toml b/tools/bflb_flash_tool/chips/bl602/partition/partition_cfg_1M_ota.toml
new file mode 100644
index 00000000..6494d41a
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/partition/partition_cfg_1M_ota.toml
@@ -0,0 +1,94 @@
+[pt_table]
+#partition table is 4K in size
+address0 = 0xE000
+address1 = 0xF000
+
+[[pt_entry]]
+type = 0
+name = "FW"
+device = 0
+address0 = 0x010000
+size0 = 0x96000
+address1 = 0xA6000
+size1 = 0x50000
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+[[pt_entry]]
+type = 2
+name = "mfg"
+device = 0
+address0 = 0x000
+size0 = 0x000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+[[pt_entry]]
+type = 3
+name = "media"
+device = 0
+address0 = 0x0F6000
+size0 = 0x2000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+[[pt_entry]]
+type = 4
+name = "PSM"
+device = 0
+address0 = 0x0F8000
+size0 = 0x4000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+[[pt_entry]]
+type = 5
+name = "KEY"
+device = 0
+address0 = 0x0000
+size0 = 0x000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+[[pt_entry]]
+type = 6
+name = "DATA"
+device = 0
+address0 = 0x0000
+size0 = 0x000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+
+[[pt_entry]]
+type = 7
+name = "factory"
+device = 0
+address0 = 0x0FC000
+size0 = 0x4000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+#if user want to put RF calibration data on flash, uncomment following pt entry
+#[[pt_entry]]
+#type = 8
+#name = "rf_para"
+#device = 0
+#address0 = 0x1FF000
+#size0 = 0x1000
+#address1 = 0
+#size1 = 0
+## compressed image must set len,normal image can left it to 0
+#len = 0
diff --git a/tools/bflb_flash_tool/chips/bl602/partition/partition_cfg_2M.toml b/tools/bflb_flash_tool/chips/bl602/partition/partition_cfg_2M.toml
new file mode 100644
index 00000000..14e26737
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl602/partition/partition_cfg_2M.toml
@@ -0,0 +1,94 @@
+[pt_table]
+#partition table is 4K in size
+address0 = 0xE000
+address1 = 0xF000
+
+[[pt_entry]]
+type = 0
+name = "FW"
+device = 0
+address0 = 0x10000
+size0 = 0xC8000
+address1 = 0xD8000
+size1 = 0x88000
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+[[pt_entry]]
+type = 2
+name = "mfg"
+device = 0
+address0 = 0x160000
+size0 = 0x32000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+[[pt_entry]]
+type = 3
+name = "media"
+device = 0
+address0 = 0x192000
+size0 = 0x57000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+[[pt_entry]]
+type = 4
+name = "PSM"
+device = 0
+address0 = 0x1E9000
+size0 = 0x8000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+[[pt_entry]]
+type = 5
+name = "KEY"
+device = 0
+address0 = 0x1F1000
+size0 = 0x2000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+[[pt_entry]]
+type = 6
+name = "DATA"
+device = 0
+address0 = 0x1F3000
+size0 = 0x5000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+
+[[pt_entry]]
+type = 7
+name = "factory"
+device = 0
+address0 = 0x1F8000
+size0 = 0x7000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+
+#if user want to put RF calibration data on flash, uncomment following pt entry
+#[[pt_entry]]
+#type = 8
+#name = "rf_para"
+#device = 0
+#address0 = 0x1FF000
+#size0 = 0x1000
+#address1 = 0
+#size1 = 0
+## compressed image must set len,normal image can left it to 0
+#len = 0
diff --git a/tools/bflb_flash_tool/chips/bl702/builtin_imgs/mfg/bl702_mfg_stdfw.bin b/tools/bflb_flash_tool/chips/bl702/builtin_imgs/mfg/bl702_mfg_stdfw.bin
new file mode 100644
index 00000000..95aa1058
Binary files /dev/null and b/tools/bflb_flash_tool/chips/bl702/builtin_imgs/mfg/bl702_mfg_stdfw.bin differ
diff --git a/tools/bflb_flash_tool/chips/bl702/conf/ota.toml b/tools/bflb_flash_tool/chips/bl702/conf/ota.toml
new file mode 100644
index 00000000..a714ddf3
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl702/conf/ota.toml
@@ -0,0 +1,5 @@
+[ota]
+#max length of version_hardware is 15 bytes
+version_hardware = "BFL_Module_v1.1"
+#max length of version_software is 15 bytes
+version_software = "EVENT_V1.1.1"
diff --git a/tools/bflb_flash_tool/chips/bl702/device_tree/bl_factory_params_IoTKitA_32M.dts b/tools/bflb_flash_tool/chips/bl702/device_tree/bl_factory_params_IoTKitA_32M.dts
new file mode 100644
index 00000000..71b9fc43
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl702/device_tree/bl_factory_params_IoTKitA_32M.dts
@@ -0,0 +1,83 @@
+/dts-v1/;
+// version: 17
+// last_comp_version: 16
+// boot_cpuid_phys: 0x0
+
+/ {
+    model = "bl bl702 AVB board";
+    compatible = "bl,bl702-sample", "bl,bl702-common";
+    #address-cells = <0x1>;
+    #size-cells = <0x1>;
+    gpio {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        max_num = <40>;
+        gpio0 {
+            status = "okay";
+            pin  = <22>;
+            feature = "led";
+            active = "Hi"; //Hi or Lo
+            mode = "onoff"; //blink or hearbeat or onoff
+            time = <100>; //duration for this mode
+        };
+        gpio1 {
+            status = "disable";
+            pin  = <6>;
+            feature = "led";
+            active = "Hi"; //Hi or Lo
+            mode = "blink"; //blink or hearbeat or onoff
+            time = <100>; //duration for this mode
+        };
+    };
+    uart {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        uart@4000A000 {
+            status = "okay";
+            id = <0>;
+            compatible = "bl702_uart";
+            path = "/dev/ttyS0";
+            baudrate = <2000000>;
+            pin {
+                rx = <15>;
+                tx = <14>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+        uart@4000A100 {
+            status = "disable";
+            id = <1>;
+            compatible = "bl702_uart";
+            path = "/dev/ttyS1";
+            baudrate = <115200>;
+            pin {
+                rx = <3>;
+                tx = <4>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+    };
+    wireless {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        mac {
+            mode = "MBF";  // 'M': manufacture; 'B': efuse; 'F': flash
+            mac_addr = [C8 43 57 82 73 40 88 88];
+        };
+        brd_rf {
+            xtal_mode = "MF";
+            xtal = <36 36 0 60 60>;
+            pwr = <14>;
+        };
+    };
+};
diff --git a/tools/bflb_flash_tool/chips/bl702/device_tree/bl_factory_params_IoTKitA_None.dts b/tools/bflb_flash_tool/chips/bl702/device_tree/bl_factory_params_IoTKitA_None.dts
new file mode 100644
index 00000000..71b9fc43
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl702/device_tree/bl_factory_params_IoTKitA_None.dts
@@ -0,0 +1,83 @@
+/dts-v1/;
+// version: 17
+// last_comp_version: 16
+// boot_cpuid_phys: 0x0
+
+/ {
+    model = "bl bl702 AVB board";
+    compatible = "bl,bl702-sample", "bl,bl702-common";
+    #address-cells = <0x1>;
+    #size-cells = <0x1>;
+    gpio {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        max_num = <40>;
+        gpio0 {
+            status = "okay";
+            pin  = <22>;
+            feature = "led";
+            active = "Hi"; //Hi or Lo
+            mode = "onoff"; //blink or hearbeat or onoff
+            time = <100>; //duration for this mode
+        };
+        gpio1 {
+            status = "disable";
+            pin  = <6>;
+            feature = "led";
+            active = "Hi"; //Hi or Lo
+            mode = "blink"; //blink or hearbeat or onoff
+            time = <100>; //duration for this mode
+        };
+    };
+    uart {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        uart@4000A000 {
+            status = "okay";
+            id = <0>;
+            compatible = "bl702_uart";
+            path = "/dev/ttyS0";
+            baudrate = <2000000>;
+            pin {
+                rx = <15>;
+                tx = <14>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+        uart@4000A100 {
+            status = "disable";
+            id = <1>;
+            compatible = "bl702_uart";
+            path = "/dev/ttyS1";
+            baudrate = <115200>;
+            pin {
+                rx = <3>;
+                tx = <4>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+    };
+    wireless {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        mac {
+            mode = "MBF";  // 'M': manufacture; 'B': efuse; 'F': flash
+            mac_addr = [C8 43 57 82 73 40 88 88];
+        };
+        brd_rf {
+            xtal_mode = "MF";
+            xtal = <36 36 0 60 60>;
+            pwr = <14>;
+        };
+    };
+};
diff --git a/tools/bflb_flash_tool/chips/bl702/device_tree/bl_factory_params_IoTKitA_RC32M.dts b/tools/bflb_flash_tool/chips/bl702/device_tree/bl_factory_params_IoTKitA_RC32M.dts
new file mode 100644
index 00000000..71b9fc43
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl702/device_tree/bl_factory_params_IoTKitA_RC32M.dts
@@ -0,0 +1,83 @@
+/dts-v1/;
+// version: 17
+// last_comp_version: 16
+// boot_cpuid_phys: 0x0
+
+/ {
+    model = "bl bl702 AVB board";
+    compatible = "bl,bl702-sample", "bl,bl702-common";
+    #address-cells = <0x1>;
+    #size-cells = <0x1>;
+    gpio {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        max_num = <40>;
+        gpio0 {
+            status = "okay";
+            pin  = <22>;
+            feature = "led";
+            active = "Hi"; //Hi or Lo
+            mode = "onoff"; //blink or hearbeat or onoff
+            time = <100>; //duration for this mode
+        };
+        gpio1 {
+            status = "disable";
+            pin  = <6>;
+            feature = "led";
+            active = "Hi"; //Hi or Lo
+            mode = "blink"; //blink or hearbeat or onoff
+            time = <100>; //duration for this mode
+        };
+    };
+    uart {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        uart@4000A000 {
+            status = "okay";
+            id = <0>;
+            compatible = "bl702_uart";
+            path = "/dev/ttyS0";
+            baudrate = <2000000>;
+            pin {
+                rx = <15>;
+                tx = <14>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+        uart@4000A100 {
+            status = "disable";
+            id = <1>;
+            compatible = "bl702_uart";
+            path = "/dev/ttyS1";
+            baudrate = <115200>;
+            pin {
+                rx = <3>;
+                tx = <4>;
+            };
+            feature {
+                tx = "okay";
+                rx = "okay";
+                cts = "disable";
+                rts = "disable";
+            };
+        };
+    };
+    wireless {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        mac {
+            mode = "MBF";  // 'M': manufacture; 'B': efuse; 'F': flash
+            mac_addr = [C8 43 57 82 73 40 88 88];
+        };
+        brd_rf {
+            xtal_mode = "MF";
+            xtal = <36 36 0 60 60>;
+            pwr = <14>;
+        };
+    };
+};
diff --git a/tools/bflb_flash_tool/chips/bl702/eflash_loader/eflash_loader.elf b/tools/bflb_flash_tool/chips/bl702/eflash_loader/eflash_loader.elf
new file mode 100644
index 00000000..a97779fd
Binary files /dev/null and b/tools/bflb_flash_tool/chips/bl702/eflash_loader/eflash_loader.elf differ
diff --git a/tools/bflb_flash_tool/chips/bl702/eflash_loader/eflash_loader.map b/tools/bflb_flash_tool/chips/bl702/eflash_loader/eflash_loader.map
new file mode 100644
index 00000000..8eb0ab08
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl702/eflash_loader/eflash_loader.map
@@ -0,0 +1,15224 @@
+Archive member included to satisfy reference by file (symbol)
+
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libc.a(lib_a-memmove-stub.o)
+                              out/BSP_Common/xz/xz_dec_lzma2.o (memmove)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clzsi2.o)
+                              out/3rdParty/FreeRTOS/Source/tasks.o (__clzsi2)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_udivdi3.o)
+                              out/BSP_Common/libc/vsnprintf.o (__udivdi3)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_umoddi3.o)
+                              out/BSP_Common/libc/vsnprintf.o (__umoddi3)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(adddf3.o)
+                              out/BSP_Common/libc/atof.o (__adddf3)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(divdf3.o)
+                              out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o (__divdf3)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(muldf3.o)
+                              out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o (__muldf3)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(subdf3.o)
+                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o (__subdf3)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(fixunsdfsi.o)
+                              out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o (__fixunsdfsi)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatsidf.o)
+                              out/BSP_Common/libc/atof.o (__floatsidf)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+                              out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o (__floatunsidf)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(extendsfdf2.o)
+                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o (__extendsfdf2)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(truncdfsf2.o)
+                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o (__truncdfsf2)
+/home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clz.o)
+                              /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clzsi2.o) (__clz_tab)
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+LOAD out/BSP_Common/libc/ctype_tolower.o
+LOAD out/BSP_Common/libc/ctype_toupper.o
+LOAD out/BSP_Common/libc/ctype_isxdigit.o
+LOAD out/BSP_Common/libc/ctypes.o
+LOAD out/BSP_Common/soft_crc/softcrc.o
+LOAD out/BSP_Common/cipher_suite/bflb_crypt.o
+LOAD out/BSP_Common/cipher_suite/bflb_hash.o
+LOAD out/BSP_Common/cipher_suite/bflb_ecdsa.o
+LOAD out/BSP_Common/cipher_suite/bflb_dsa.o
+LOAD out/BSP_Common/usbd_core.o
+LOAD out/BSP_Common/usbd_ctlreq.o
+LOAD out/BSP_Common/usbd_ioreq.o
+LOAD out/BSP_Common/xz/xz_crc32.o
+LOAD out/BSP_Common/xz/xz_dec_lzma2.o
+LOAD out/BSP_Common/xz/xz_dec_stream.o
+LOAD out/BSP_Common/xz/xz_decompress.o
+LOAD out/BSP_Common/xz/xz_port.o
+LOAD out/BSP_Common/partition/partition.o
+LOAD out/startup/system_bl702.o
+LOAD out/startup/GCC/start_load.o
+LOAD out/startup/interrupt.o
+LOAD out/startup/GCC/entry.o
+LOAD out/BSP_Common/FreeRTOS/port.o
+LOAD out/BSP_Common/FreeRTOS/portASM.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_common.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_aon.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_l1c.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_ctrl.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sflash.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sflash_ext.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_clock.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_psram.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dac.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2s.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_kys.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_qdec.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash_ext.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pwm.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_acomp.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_dbg.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c_gpio_sim.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nf_cfg.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg_ext.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+LOAD out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_gpio.o
+LOAD out/HAL/hal_uart.o
+LOAD out/3rdParty/fatfs/source/diskio.o
+LOAD out/3rdParty/fatfs/source/ff.o
+LOAD out/3rdParty/fatfs/source/ffunicode.o
+LOAD out/3rdParty/FreeRTOS/Source/tasks.o
+LOAD out/3rdParty/FreeRTOS/Source/list.o
+LOAD out/3rdParty/FreeRTOS/Source/queue.o
+LOAD out/3rdParty/FreeRTOS/Source/timers.o
+LOAD out/3rdParty/FreeRTOS/Source/stream_buffer.o
+LOAD out/3rdParty/FreeRTOS/Source/croutine.o
+LOAD out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libc.a
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libm.a
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a
+START GROUP
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libc.a
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libgloss.a
+END GROUP
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/../../../../riscv64-unknown-elf/lib/rv32imafc/ilp32f/libc.a
+LOAD /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a
+                0x0000000000000400                StackSize = 0x400
+                0x0000000000000000                PROVIDE (__metal_chicken_bit = 0x0)
+
+.text           0x0000000022010000     0xbd24
+                0x0000000022010000                . = ALIGN (0x4)
+                0x0000000022010000                __text_code_start__ = .
+ *(.text.metal.init.enter)
+ .text.metal.init.enter
+                0x0000000022010000       0x86 out/startup/GCC/entry.o
+                0x0000000022010000                _enter
+ *(SORT_NONE(.init))
+ *fill*         0x0000000022010086       0x3a 
+ .init          0x00000000220100c0      0x142 out/startup/interrupt.o
+                0x00000000220100c0                __Vectors
+ *(.text)
+ .text          0x0000000022010202      0x35e /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_udivdi3.o)
+                0x0000000022010202                __udivdi3
+ .text          0x0000000022010560      0x352 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_umoddi3.o)
+                0x0000000022010560                __umoddi3
+ *(.text.*)
+ .text.startup.main
+                0x00000000220108b2      0x22e out/ChipTest/Eflash_Loader/eflash_loader.o
+                0x00000000220108b2                main
+ .text.bflb_eflash_loader_cmd_read_jedec_id
+                0x0000000022010ae0       0x4e out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_read_log
+                0x0000000022010b2e       0x5e out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_ack.part.0
+                0x0000000022010b8c       0x1e out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_ack
+                0x0000000022010baa       0x28 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_write_flash_check
+                0x0000000022010bd2       0x22 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_write_mem
+                0x0000000022010bf4       0x9c out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_write_status_register
+                0x0000000022010c90       0xe0 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_read_mac_addr
+                0x0000000022010d70       0xc0 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_read_efuse
+                0x0000000022010e30      0x146 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_write_efuse
+                0x0000000022010f76       0xdc out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_xip_read_flash
+                0x0000000022011052      0x16a out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_xip_readSha_flash
+                0x00000000220111bc      0x15e out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_readSha_flash
+                0x000000002201131a      0x160 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_read_flash
+                0x000000002201147a      0x16c out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_flash_chip_erase
+                0x00000000220115e6       0x48 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_erase_flash
+                0x000000002201162e       0x9e out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_set_flash_para
+                0x00000000220116cc      0x144 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_ecdh_chanllenge
+                0x0000000022011810      0x11e out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_get_ecdh_pk
+                0x000000002201192e       0xf0 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_read_mem
+                0x0000000022011a1e       0xee out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_read_status_register
+                0x0000000022011b0c       0xd4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_xip_read_flash_finish
+                0x0000000022011be0       0x20 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_reset
+                0x0000000022011c00       0x40 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_write_flash
+                0x0000000022011c40       0xba out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_xip_read_flash_start
+                0x0000000022011cfa       0x20 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .text.bflb_eflash_loader_cmd_init
+                0x0000000022011d1a        0xa out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                0x0000000022011d1a                bflb_eflash_loader_cmd_init
+ .text.bflb_eflash_loader_cmd_process
+                0x0000000022011d24       0x5a out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                0x0000000022011d24                bflb_eflash_loader_cmd_process
+ .text.bootrom_read_boot_mode
+                0x0000000022011d7e       0xec out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+                0x0000000022011d7e                bootrom_read_boot_mode
+ .text.bflb_eflash_loader_init_uart_gpio
+                0x0000000022011e6a       0x3c out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+                0x0000000022011e6a                bflb_eflash_loader_init_uart_gpio
+ .text.bflb_eflash_loader_if_set
+                0x0000000022011ea6      0x122 out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                0x0000000022011ea6                bflb_eflash_loader_if_set
+ .text.eflash_loader_dump_data
+                0x0000000022011fc8       0x5e out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                0x0000000022011fc8                eflash_loader_dump_data
+ .text.bflb_eflash_loader_main
+                0x0000000022012026      0x1c4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                0x0000000022012026                bflb_eflash_loader_main
+ .text.bflb_eflash_loader_jlink_init
+                0x00000000220121ea        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                0x00000000220121ea                bflb_eflash_loader_jlink_init
+ .text.bflb_eflash_loader_jlink_handshake_poll
+                0x00000000220121ee       0x6e out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                0x00000000220121ee                bflb_eflash_loader_jlink_handshake_poll
+ .text.bflb_eflash_loader_jlink_recv
+                0x000000002201225c       0xa4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                0x000000002201225c                bflb_eflash_loader_jlink_recv
+ .text.bflb_eflash_loader_jlink_send
+                0x0000000022012300       0x44 out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                0x0000000022012300                bflb_eflash_loader_jlink_send
+ .text.bflb_eflash_loader_jlink_wait_tx_idle
+                0x0000000022012344        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                0x0000000022012344                bflb_eflash_loader_jlink_wait_tx_idle
+ .text.bflb_eflash_loader_jlink_deinit
+                0x0000000022012348        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                0x0000000022012348                bflb_eflash_loader_jlink_deinit
+ .text.bflb_eflash_loader_usart_if_init
+                0x000000002201234c       0xb8 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ .text.uart_if_rto_cbf
+                0x0000000022012404       0x4c out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ .text.uart_if_rda_cbf
+                0x0000000022012450        0x2 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ .text.bflb_eflash_loader_usart_if_receive.isra.0
+                0x0000000022012452       0xb2 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ .text.bflb_eflash_loader_uart_init
+                0x0000000022012504       0x8a out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                0x0000000022012504                bflb_eflash_loader_uart_init
+ .text.bflb_eflash_loader_uart_handshake_poll
+                0x000000002201258e      0x13a out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                0x000000002201258e                bflb_eflash_loader_uart_handshake_poll
+ .text.bflb_eflash_loader_uart_recv
+                0x00000000220126c8        0x8 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                0x00000000220126c8                bflb_eflash_loader_uart_recv
+ .text.bflb_eflash_loader_uart_send
+                0x00000000220126d0       0x16 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                0x00000000220126d0                bflb_eflash_loader_uart_send
+ .text.bflb_eflash_loader_usart_wait_tx_idle
+                0x00000000220126e6       0x10 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                0x00000000220126e6                bflb_eflash_loader_usart_wait_tx_idle
+ .text.bflb_eflash_loader_uart_deinit
+                0x00000000220126f6        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                0x00000000220126f6                bflb_eflash_loader_uart_deinit
+ .text.bflb_efuse_write
+                0x00000000220126fa       0x56 out/ChipTest/Eflash_Loader/bflb_efuse.o
+                0x00000000220126fa                bflb_efuse_write
+ .text.bflb_efuse_read
+                0x0000000022012750       0x2c out/ChipTest/Eflash_Loader/bflb_efuse.o
+                0x0000000022012750                bflb_efuse_read
+ .text.bflb_set_high_speed_system_clock
+                0x000000002201277c        0x6 out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                0x000000002201277c                bflb_set_high_speed_system_clock
+ .text.bflb_set_low_speed_system_clock
+                0x0000000022012782        0x6 out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                0x0000000022012782                bflb_set_low_speed_system_clock
+ .text.bflb_set_high_speed_flash_clock
+                0x0000000022012788        0xa out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                0x0000000022012788                bflb_set_high_speed_flash_clock
+ .text.bflb_set_low_speed_flash_clock
+                0x0000000022012792        0xa out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                0x0000000022012792                bflb_set_low_speed_flash_clock
+ .text.bflb_set_flash_clock_div
+                0x000000002201279c        0xa out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                0x000000002201279c                bflb_set_flash_clock_div
+ .text.bflb_deinit_all_psram_cs
+                0x00000000220127a6       0x5a out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x00000000220127a6                bflb_deinit_all_psram_cs
+ .text.bflb_set_pad_pullnone
+                0x0000000022012800       0x70 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012800                bflb_set_pad_pullnone
+ .text.bflb_spi_flash_update_para
+                0x0000000022012870       0x1a out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012870                bflb_spi_flash_update_para
+ .text.bflb_spi_flash_xip_read_init
+                0x000000002201288a       0x62 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x000000002201288a                bflb_spi_flash_xip_read_init
+ .text.bflb_spi_flash_xip_read_exit
+                0x00000000220128ec       0x26 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x00000000220128ec                bflb_spi_flash_xip_read_exit
+ .text.bflb_spi_flash_set_io_mode
+                0x0000000022012912        0x6 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012912                bflb_spi_flash_set_io_mode
+ .text.bflb_spi_flash_read_jedec_id
+                0x0000000022012918       0x40 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012918                bflb_spi_flash_read_jedec_id
+ .text.bflb_spi_flash_read_status_reg_with_cmd
+                0x0000000022012958        0xe out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012958                bflb_spi_flash_read_status_reg_with_cmd
+ .text.bflb_spi_flash_write_status_reg_with_cmd
+                0x0000000022012966       0x46 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012966                bflb_spi_flash_write_status_reg_with_cmd
+ .text.bflb_spi_flash_erase
+                0x00000000220129ac       0x22 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x00000000220129ac                bflb_spi_flash_erase
+ .text.bflb_spi_flash_chiperase
+                0x00000000220129ce       0x1e out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x00000000220129ce                bflb_spi_flash_chiperase
+ .text.bflb_spi_flash_program
+                0x00000000220129ec       0x26 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x00000000220129ec                bflb_spi_flash_program
+ .text.bflb_spi_flash_read_sahb
+                0x0000000022012a12       0x24 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012a12                bflb_spi_flash_read_sahb
+ .text.bflb_spi_flash_read_xip
+                0x0000000022012a36       0x32 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012a36                bflb_spi_flash_read_xip
+ .text.bflb_clear_flash_status_register
+                0x0000000022012a68       0x74 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012a68                bflb_clear_flash_status_register
+ .text.bflb_spi_flash_init
+                0x0000000022012adc       0xd0 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                0x0000000022012adc                bflb_spi_flash_init
+ .text.bflb_eflash_loader_usb_if_send
+                0x0000000022012bac       0x8c out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+ .text.USB_Rework_In_Callback
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+                0x0000000022012c38                USB_Rework_In_Callback
+ .text.USB_Rework_Out_Callback
+                0x0000000022012c8c       0x40 out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                0x0000000022012c8c                USB_Rework_Out_Callback
+ .text.USB_Rework_IRQHandler
+                0x0000000022012ccc      0x234 out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                0x0000000022012ccc                USB_Rework_IRQHandler
+ .text.bflb_eflash_loader_usb_init
+                0x0000000022012f00      0x1fa out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                0x0000000022012f00                bflb_eflash_loader_usb_init
+ .text.bflb_eflash_loader_usb_handshake_poll
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+                0x00000000220130fa                bflb_eflash_loader_usb_handshake_poll
+ .text.bflb_eflash_loader_usb_recv
+                0x00000000220131b2       0xea out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                0x00000000220131b2                bflb_eflash_loader_usb_recv
+ .text.bflb_eflash_loader_usb_send
+                0x000000002201329c       0x10 out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                0x000000002201329c                bflb_eflash_loader_usb_send
+ .text.bflb_eflash_loader_usb_wait_tx_idle
+                0x00000000220132ac       0x10 out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                0x00000000220132ac                bflb_eflash_loader_usb_wait_tx_idle
+ .text.USB_Device_Init
+                0x00000000220132bc       0xae out/ChipTest/Eflash_Loader/usb_if/usb_device.o
+                0x00000000220132bc                USB_Device_Init
+ .text.USB_Error_Handler
+                0x000000002201336a        0xc out/ChipTest/Eflash_Loader/usb_if/usb_device.o
+                0x000000002201336a                USB_Error_Handler
+ .text.USBD_CDC_DataIn
+                0x0000000022013376       0x12 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+ .text.USBD_CDC_EP0_RxReady
+                0x0000000022013388       0x3a out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+ .text.USBD_CDC_GetFSCfgDesc
+                0x00000000220133c2        0xe out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+ .text.USBD_CDC_GetHSCfgDesc
+                0x00000000220133d0        0xe out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+ .text.USBD_CDC_GetOtherSpeedCfgDesc
+                0x00000000220133de        0xe out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+ .text.USBD_CDC_GetDeviceQualifierDescriptor
+                0x00000000220133ec        0xc out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+                0x00000000220133ec                USBD_CDC_GetDeviceQualifierDescriptor
+ .text.USBD_CDC_DataOut
+                0x00000000220133f8       0x44 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+ .text.USBD_CDC_Setup
+                0x000000002201343c       0xfc out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+ .text.USBD_CDC_DeInit
+                0x0000000022013538       0x3e out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+ .text.USBD_CDC_Init
+                0x0000000022013576       0xae out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+ .text.USBD_CDC_RegisterInterface
+                0x0000000022013624        0xe out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+                0x0000000022013624                USBD_CDC_RegisterInterface
+ .text.USBD_CDC_SetTxBuffer
+                0x0000000022013632       0x10 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+                0x0000000022013632                USBD_CDC_SetTxBuffer
+ .text.USBD_CDC_SetRxBuffer
+                0x0000000022013642        0xc out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+                0x0000000022013642                USBD_CDC_SetRxBuffer
+ .text.CDC_DeInit_FS
+                0x000000002201364e        0x4 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+ .text.CDC_Receive_FS
+                0x0000000022013652       0x92 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+ .text.CDC_Init_FS
+                0x00000000220136e4       0x36 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+ .text.CDC_Control_FS
+                0x000000002201371a      0x106 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+ .text.HAL_PCD_MspInit
+                0x0000000022013820      0x184 out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x0000000022013820                HAL_PCD_MspInit
+ .text.HAL_PCD_SetupStageCallback
+                0x00000000220139a4        0xe out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x00000000220139a4                HAL_PCD_SetupStageCallback
+ .text.HAL_PCD_DataOutStageCallback
+                0x00000000220139b2       0x16 out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x00000000220139b2                HAL_PCD_DataOutStageCallback
+ .text.HAL_PCD_DataInStageCallback
+                0x00000000220139c8       0x14 out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x00000000220139c8                HAL_PCD_DataInStageCallback
+ .text.HAL_PCD_SOFCallback
+                0x00000000220139dc        0x8 out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x00000000220139dc                HAL_PCD_SOFCallback
+ .text.HAL_PCD_ResetCallback
+                0x00000000220139e4       0x30 out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x00000000220139e4                HAL_PCD_ResetCallback
+ .text.USBD_LL_Init
+                0x0000000022013a14       0xdc out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x0000000022013a14                USBD_LL_Init
+ .text.USBD_LL_Start
+                0x0000000022013af0       0x2a out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x0000000022013af0                USBD_LL_Start
+ .text.USBD_LL_OpenEP
+                0x0000000022013b1a       0x30 out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x0000000022013b1a                USBD_LL_OpenEP
+ .text.USBD_LL_CloseEP
+                0x0000000022013b4a       0x2a out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x0000000022013b4a                USBD_LL_CloseEP
+ .text.USBD_LL_StallEP
+                0x0000000022013b74       0x2a out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x0000000022013b74                USBD_LL_StallEP
+ .text.USBD_LL_ClearStallEP
+                0x0000000022013b9e       0x2a out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x0000000022013b9e                USBD_LL_ClearStallEP
+ .text.USBD_LL_IsStallEP
+                0x0000000022013bc8       0x32 out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x0000000022013bc8                USBD_LL_IsStallEP
+ .text.USBD_LL_SetUSBAddress
+                0x0000000022013bfa       0x2a out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x0000000022013bfa                USBD_LL_SetUSBAddress
+ .text.USBD_LL_Transmit
+                0x0000000022013c24       0x2a out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x0000000022013c24                USBD_LL_Transmit
+ .text.USBD_LL_PrepareReceive
+                0x0000000022013c4e       0x2a out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x0000000022013c4e                USBD_LL_PrepareReceive
+ .text.USBD_LL_GetRxDataSize
+                0x0000000022013c78       0x12 out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x0000000022013c78                USBD_LL_GetRxDataSize
+ .text.USBD_static_malloc
+                0x0000000022013c8a        0xa out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x0000000022013c8a                USBD_static_malloc
+ .text.USBD_static_free
+                0x0000000022013c94        0x2 out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x0000000022013c94                USBD_static_free
+ .text.USBD_FS_DeviceDescriptor
+                0x0000000022013c96        0xc out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+                0x0000000022013c96                USBD_FS_DeviceDescriptor
+ .text.USBD_FS_LangIDStrDescriptor
+                0x0000000022013ca2        0xc out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+                0x0000000022013ca2                USBD_FS_LangIDStrDescriptor
+ .text.IntToUnicode
+                0x0000000022013cae       0x1e out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+ .text.USBD_FS_SerialStrDescriptor
+                0x0000000022013ccc       0x38 out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+                0x0000000022013ccc                USBD_FS_SerialStrDescriptor
+ .text.USBD_FS_ManufacturerStrDescriptor
+                0x0000000022013d04       0x28 out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+                0x0000000022013d04                USBD_FS_ManufacturerStrDescriptor
+ .text.USBD_FS_ProductStrDescriptor
+                0x0000000022013d2c       0x28 out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+                0x0000000022013d2c                USBD_FS_ProductStrDescriptor
+ .text.USBD_FS_ConfigStrDescriptor
+                0x0000000022013d54       0x28 out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+                0x0000000022013d54                USBD_FS_ConfigStrDescriptor
+ .text.USBD_FS_InterfaceStrDescriptor
+                0x0000000022013d7c       0x28 out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+                0x0000000022013d7c                USBD_FS_InterfaceStrDescriptor
+ .text.MEM_TO_FIFO_Copy
+                0x0000000022013da4       0x14 out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+ .text.USB_CMD_RB_Memory_Init
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+                0x0000000022013db8                USB_CMD_RB_Memory_Init
+ .text.USB_CMD_RB_Memory_Reset
+                0x0000000022013df0       0x1c out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                0x0000000022013df0                USB_CMD_RB_Memory_Reset
+ .text.USB_CMD_RB_Memory_Push
+                0x0000000022013e0c       0x34 out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                0x0000000022013e0c                USB_CMD_RB_Memory_Push
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+                0x0000000022013e40                USB_CMD_RB_Memory_Pop
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+                0x0000000022013e5a       0x1a out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                0x0000000022013e5a                USB_CMD_RB_Memory_Peek
+ .text.USB_CMD_RB_Memory_Get_Length
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+                0x0000000022013e74                USB_CMD_RB_Memory_Get_Length
+ .text.USB_CMD_RB_Memory_Get_Empty_Length
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+                0x0000000022013e90                USB_CMD_RB_Memory_Get_Empty_Length
+ .text.USB_RESP_RB_Memory_Init
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+                0x0000000022013eac                USB_RESP_RB_Memory_Init
+ .text.USB_RESP_RB_Memory_Push
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+                0x0000000022013ede                USB_RESP_RB_Memory_Push
+ .text.USB_RESP_RB_Memory_Pop
+                0x0000000022013f04       0x1c out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                0x0000000022013f04                USB_RESP_RB_Memory_Pop
+ .text.USB_RESP_RB_Memory_Get_Length
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+                0x0000000022013f20                USB_RESP_RB_Memory_Get_Length
+ .text.USB_RESP_RB_Memory_Get_Empty_Length
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+                0x0000000022013f3c                USB_RESP_RB_Memory_Get_Empty_Length
+ .text.Ring_Buffer_Write_Copy
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+ .text.Ring_Buffer_Read_Copy
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+ .text.Ring_Buffer_Init
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+                0x0000000022013f9e                Ring_Buffer_Init
+ .text.Ring_Buffer_Reset
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+                0x0000000022013fba                Ring_Buffer_Reset
+ .text.Ring_Buffer_Get_Length
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+                0x0000000022013fe8                Ring_Buffer_Get_Length
+ .text.Ring_Buffer_Read_Callback
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+                0x0000000022014032                Ring_Buffer_Read_Callback
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+                0x00000000220140de                Ring_Buffer_Read
+ .text.Ring_Buffer_Peek
+                0x00000000220140fc       0x90 out/BSP_Common/ring_buffer/ring_buffer.o
+                0x00000000220140fc                Ring_Buffer_Peek
+ .text.Ring_Buffer_Write_Callback
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+                0x000000002201418c                Ring_Buffer_Write_Callback
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+                0x000000002201423a                Ring_Buffer_Write
+ .text.Ring_Buffer_Get_Empty_Length
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+                0x0000000022014258                Ring_Buffer_Get_Empty_Length
+ .text.memcpy   0x0000000022014270       0x18 out/BSP_Common/libc/memcpy.o
+                0x0000000022014270                memcpy
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+                0x0000000022014288                memset
+ .text.vsnprintf
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+                0x00000000220142a0                vsnprintf
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+                0x0000000022014d82                strlen
+ .text.bflb_hash_init
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+                0x0000000022014d9c                bflb_hash_init
+ .text.bflb_hash_start
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+                0x0000000022014e10                bflb_hash_start
+ .text.bflb_hash_update
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+                0x0000000022014e48                bflb_hash_update
+ .text.bflb_hash_finish
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+                0x0000000022014e8c                bflb_hash_finish
+ .text.bflb_hash_deinit
+                0x0000000022014ece       0x30 out/BSP_Common/cipher_suite/bflb_hash.o
+                0x0000000022014ece                bflb_hash_deinit
+ .text.bflb_ecc_basic_parameter_init.isra.0
+                0x0000000022014efe       0x48 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .text.bflb_ecc_point_mul_init.isra.1
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+ .text.bflb_ecdsa_point_add.isra.4
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+ .text.bflb_ecdsa_verify_point_mul.isra.5
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+ .text.bflb_ecdh_get_scalar_point.isra.6
+                0x000000002201555a      0x2fc out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .text.bflb_ecdsa_get_public_key
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+                0x0000000022015856                bflb_ecdsa_get_public_key
+ .text.bflb_ecc_get_random_value
+                0x0000000022015864       0xda out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x0000000022015864                bflb_ecc_get_random_value
+ .text.bflb_ecdsa_sign
+                0x000000002201593e      0x200 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x000000002201593e                bflb_ecdsa_sign
+ .text.bflb_ecdsa_get_private_key
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+                0x0000000022015b3e                bflb_ecdsa_get_private_key
+ .text.bflb_ecdh_get_encrypt_key
+                0x0000000022015b5c        0xe out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x0000000022015b5c                bflb_ecdh_get_encrypt_key
+ .text.bflb_ecdh_get_public_key
+                0x0000000022015b6a        0x4 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                0x0000000022015b6a                bflb_ecdh_get_public_key
+ .text.USBD_Init
+                0x0000000022015b6e       0x54 out/BSP_Common/usbd_core.o
+                0x0000000022015b6e                USBD_Init
+ .text.USBD_RegisterClass
+                0x0000000022015bc2       0x22 out/BSP_Common/usbd_core.o
+                0x0000000022015bc2                USBD_RegisterClass
+ .text.USBD_Start
+                0x0000000022015be4       0x10 out/BSP_Common/usbd_core.o
+                0x0000000022015be4                USBD_Start
+ .text.USBD_SetClassConfig
+                0x0000000022015bf4       0x1c out/BSP_Common/usbd_core.o
+                0x0000000022015bf4                USBD_SetClassConfig
+ .text.USBD_ClrClassConfig
+                0x0000000022015c10       0x14 out/BSP_Common/usbd_core.o
+                0x0000000022015c10                USBD_ClrClassConfig
+ .text.USBD_LL_SetupStage
+                0x0000000022015c24       0x90 out/BSP_Common/usbd_core.o
+                0x0000000022015c24                USBD_LL_SetupStage
+ .text.USBD_LL_DataOutStage
+                0x0000000022015cb4       0x96 out/BSP_Common/usbd_core.o
+                0x0000000022015cb4                USBD_LL_DataOutStage
+ .text.USBD_LL_DataInStage
+                0x0000000022015d4a       0xe6 out/BSP_Common/usbd_core.o
+                0x0000000022015d4a                USBD_LL_DataInStage
+ .text.USBD_LL_Reset
+                0x0000000022015e30       0x5a out/BSP_Common/usbd_core.o
+                0x0000000022015e30                USBD_LL_Reset
+ .text.USBD_LL_SetSpeed
+                0x0000000022015e8a        0x8 out/BSP_Common/usbd_core.o
+                0x0000000022015e8a                USBD_LL_SetSpeed
+ .text.USBD_LL_SOF
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+                0x0000000022015e92                USBD_LL_SOF
+ .text.USBD_StdDevReq
+                0x0000000022015eb6      0x40e out/BSP_Common/usbd_ctlreq.o
+                0x0000000022015eb6                USBD_StdDevReq
+ .text.USBD_StdItfReq
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+                0x00000000220162c4                USBD_StdItfReq
+ .text.USBD_StdEPReq
+                0x0000000022016344      0x17e out/BSP_Common/usbd_ctlreq.o
+                0x0000000022016344                USBD_StdEPReq
+ .text.USBD_ParseSetupRequest
+                0x00000000220164c2       0x42 out/BSP_Common/usbd_ctlreq.o
+                0x00000000220164c2                USBD_ParseSetupRequest
+ .text.USBD_GetString
+                0x0000000022016504       0x6a out/BSP_Common/usbd_ctlreq.o
+                0x0000000022016504                USBD_GetString
+ .text.USBD_CtlSendData
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+                0x000000002201656e                USBD_CtlSendData
+ .text.USBD_CtlContinueSendData
+                0x000000002201658e       0x16 out/BSP_Common/usbd_ioreq.o
+                0x000000002201658e                USBD_CtlContinueSendData
+ .text.USBD_CtlPrepareRx
+                0x00000000220165a4       0x24 out/BSP_Common/usbd_ioreq.o
+                0x00000000220165a4                USBD_CtlPrepareRx
+ .text.USBD_CtlContinueRx
+                0x00000000220165c8       0x16 out/BSP_Common/usbd_ioreq.o
+                0x00000000220165c8                USBD_CtlContinueRx
+ .text.USBD_CtlSendStatus
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+                0x00000000220165de                USBD_CtlSendStatus
+ .text.USBD_CtlReceiveStatus
+                0x00000000220165fa       0x1c out/BSP_Common/usbd_ioreq.o
+                0x00000000220165fa                USBD_CtlReceiveStatus
+ .text.USB_DoNothing_IRQHandler
+                0x0000000022016616        0x8 out/startup/system_bl702.o
+                0x0000000022016616                USB_DoNothing_IRQHandler
+ .text.SystemInit
+                0x000000002201661e       0xa4 out/startup/system_bl702.o
+                0x000000002201661e                SystemInit
+ .text.start_load
+                0x00000000220166c2      0x126 out/startup/GCC/start_load.o
+                0x00000000220166c2                start_load
+ .text.Interrupt_Handler_Stub
+                0x00000000220167e8       0x9a out/startup/interrupt.o
+                0x00000000220167e8                TIMER_WDT_IRQHandler_Wrapper
+                0x00000000220167e8                GPIO_INT0_IRQHandler_Wrapper
+                0x00000000220167e8                SEC_PKA_IRQHandler_Wrapper
+                0x00000000220167e8                SEC_TRNG_IRQHandler_Wrapper
+                0x00000000220167e8                MAC_GEN_IRQHandler_Wrapper
+                0x00000000220167e8                DMA_BMX_ERR_IRQHandler_Wrapper
+                0x00000000220167e8                EFUSE_IRQHandler_Wrapper
+                0x00000000220167e8                KYS_IRQHandler_Wrapper
+                0x00000000220167e8                WIFI_IRQHandler_Wrapper
+                0x00000000220167e8                SEC_CDET_IRQHandler_Wrapper
+                0x00000000220167e8                I2S_IRQHandler_Wrapper
+                0x00000000220167e8                SEC_AES_IRQHandler_Wrapper
+                0x00000000220167e8                PWM_IRQHandler_Wrapper
+                0x00000000220167e8                RF_TOP_INT1_IRQHandler_Wrapper
+                0x00000000220167e8                HBN_OUT0_IRQHandler_Wrapper
+                0x00000000220167e8                SF_CTRL_IRQHandler_Wrapper
+                0x00000000220167e8                TIMER_CH0_IRQHandler_Wrapper
+                0x00000000220167e8                clic_mext_handler_Wrapper
+                0x00000000220167e8                MAC_TXRX_TIMER_IRQHandler_Wrapper
+                0x00000000220167e8                Interrupt_Handler_Stub
+                0x00000000220167e8                clic_csoft_handler_Wrapper
+                0x00000000220167e8                M154_AES_IRQHandler_Wrapper
+                0x00000000220167e8                I2C_IRQHandler_Wrapper
+                0x00000000220167e8                SPI_IRQHandler_Wrapper
+                0x00000000220167e8                MAC_PORT_TRG_IRQHandler_Wrapper
+                0x00000000220167e8                PDS_WAKEUP_IRQHandler_Wrapper
+                0x00000000220167e8                clic_mtimer_handler_Wrapper
+                0x00000000220167e8                L1C_BMX_ERR_IRQHandler_Wrapper
+                0x00000000220167e8                SEC_BMX_ERR_IRQHandler_Wrapper
+                0x00000000220167e8                TOUCH_IRQHandler_Wrapper
+                0x00000000220167e8                QDEC2_IRQHandler_Wrapper
+                0x00000000220167e8                MAC_RX_TRG_IRQHandler_Wrapper
+                0x00000000220167e8                MAC_TX_TRG_IRQHandler_Wrapper
+                0x00000000220167e8                EMAC_IRQHandler_Wrapper
+                0x00000000220167e8                MJPEG_IRQHandler_Wrapper
+                0x00000000220167e8                HBN_OUT1_IRQHandler_Wrapper
+                0x00000000220167e8                M154_REQ_ENH_ACK_IRQHandler_Wrapper
+                0x00000000220167e8                SEC_GMAC_IRQHandler_Wrapper
+                0x00000000220167e8                clic_msip_handler_Wrapper
+                0x00000000220167e8                UART1_IRQHandler_Wrapper
+                0x00000000220167e8                GPADC_DMA_IRQHandler_Wrapper
+                0x00000000220167e8                MAC_TXRX_MISC_IRQHandler_Wrapper
+                0x00000000220167e8                DMA_ALL_IRQHandler_Wrapper
+                0x00000000220167e8                CAM_IRQHandler_Wrapper
+                0x00000000220167e8                QDEC0_IRQHandler_Wrapper
+                0x00000000220167e8                BLE_IRQHandler_Wrapper
+                0x00000000220167e8                SEC_SHA_IRQHandler_Wrapper
+                0x00000000220167e8                IRRX_IRQHandler_Wrapper
+                0x00000000220167e8                BMX_TO_IRQHandler_Wrapper
+                0x00000000220167e8                TIMER_CH1_IRQHandler_Wrapper
+                0x00000000220167e8                UART0_IRQHandler_Wrapper
+                0x00000000220167e8                BMX_ERR_IRQHandler_Wrapper
+                0x00000000220167e8                WIFI_IPC_PUBLIC_IRQHandler_Wrapper
+                0x00000000220167e8                USB_IRQHandler_Wrapper
+                0x00000000220167e8                L1C_BMX_TO_IRQHandler_Wrapper
+                0x00000000220167e8                QDEC1_IRQHandler_Wrapper
+                0x00000000220167e8                BZ_PHY_IRQHandler_Wrapper
+                0x00000000220167e8                RF_TOP_INT0_IRQHandler_Wrapper
+                0x00000000220167e8                M154_IRQHandler_Wrapper
+                0x00000000220167e8                IRTX_IRQHandler_Wrapper
+                0x00000000220167e8                BOR_IRQHandler_Wrapper
+ *fill*         0x0000000022016882       0x3e 
+ .text.Trap_Handler_Stub
+                0x00000000220168c0       0xbc out/startup/interrupt.o
+                0x00000000220168c0                Trap_Handler_Stub
+ .text.clic_enable_interrupt
+                0x000000002201697c       0x12 out/startup/interrupt.o
+                0x000000002201697c                clic_enable_interrupt
+ .text.clic_disable_interrupt
+                0x000000002201698e       0x10 out/startup/interrupt.o
+                0x000000002201698e                clic_disable_interrupt
+ .text.Trap_Handler
+                0x000000002201699e      0x12e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_common.o
+                0x000000002201699e                Trap_Handler
+ .text.Interrupt_Handler_Register
+                0x0000000022016acc       0x18 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_common.o
+                0x0000000022016acc                Interrupt_Handler_Register
+ .text.Interrupt_Handler
+                0x0000000022016ae4       0x9e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_common.o
+                0x0000000022016ae4                Interrupt_Handler
+ .text.EF_Ctrl_Read_Sw_Usage
+                0x0000000022016b82       0x28 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+                0x0000000022016b82                EF_Ctrl_Read_Sw_Usage
+ .text.EF_Ctrl_Read_MAC_Address
+                0x0000000022016baa       0x96 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+                0x0000000022016baa                EF_Ctrl_Read_MAC_Address
+ .text.EF_Ctrl_Get_Chip_PIDVID
+                0x0000000022016c40       0x2c out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+                0x0000000022016c40                EF_Ctrl_Get_Chip_PIDVID
+ .text.EF_Ctrl_Get_Customer_PIDVID
+                0x0000000022016c6c       0x2c out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+                0x0000000022016c6c                EF_Ctrl_Get_Customer_PIDVID
+ .text.EF_Ctrl_Read_Device_Info
+                0x0000000022016c98       0x1c out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+                0x0000000022016c98                EF_Ctrl_Read_Device_Info
+ .text.EF_Ctrl_Program_Direct_R0
+                0x0000000022016cb4       0x64 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+                0x0000000022016cb4                EF_Ctrl_Program_Direct_R0
+ .text.EF_Ctrl_Read_Direct_R0
+                0x0000000022016d18       0x2e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+                0x0000000022016d18                EF_Ctrl_Read_Direct_R0
+ .text.GLB_Set_USB_CLK
+                0x0000000022016d46       0x22 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                0x0000000022016d46                GLB_Set_USB_CLK
+ .text.GLB_Set_UART_CLK
+                0x0000000022016d68       0x3e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                0x0000000022016d68                GLB_Set_UART_CLK
+ .text.GLB_AHB_Slave1_Reset
+                0x0000000022016da6       0x34 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                0x0000000022016da6                GLB_AHB_Slave1_Reset
+ .text.GLB_Set_EM_Sel
+                0x0000000022016dda       0x10 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                0x0000000022016dda                GLB_Set_EM_Sel
+ .text.GLB_UART_Sig_Swap_Set
+                0x0000000022016dea       0x1c out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                0x0000000022016dea                GLB_UART_Sig_Swap_Set
+ .text.GLB_Set_MTimer_CLK
+                0x0000000022016e06       0x4a out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                0x0000000022016e06                GLB_Set_MTimer_CLK
+ .text.GLB_UART_Fun_Sel
+                0x0000000022016e50       0x24 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                0x0000000022016e50                GLB_UART_Fun_Sel
+ .text.GLB_GPIO_Read
+                0x0000000022016e74       0x4a out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                0x0000000022016e74                GLB_GPIO_Read
+ .text.HBN_Set_UART_CLK_Sel
+                0x0000000022016ebe       0x14 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+                0x0000000022016ebe                HBN_Set_UART_CLK_Sel
+ .text.HBN_Get_Status_Flag
+                0x0000000022016ed2        0xa out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+                0x0000000022016ed2                HBN_Get_Status_Flag
+ .text.HBN_Set_Status_Flag
+                0x0000000022016edc        0xc out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+                0x0000000022016edc                HBN_Set_Status_Flag
+ .text.HBN_Set_BOR_Cfg
+                0x0000000022016ee8       0x5c out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+                0x0000000022016ee8                HBN_Set_BOR_Cfg
+ .text.UART_IntHandler
+                0x0000000022016f44      0x1de out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+ .text.UART0_IRQHandler
+                0x0000000022017122        0x6 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                0x0000000022017122                UART0_IRQHandler
+ .text.UART1_IRQHandler
+                0x0000000022017128        0x6 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                0x0000000022017128                UART1_IRQHandler
+ .text.UART_Init
+                0x000000002201712e      0x144 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                0x000000002201712e                UART_Init
+ .text.UART_FifoConfig
+                0x0000000022017272       0x6a out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                0x0000000022017272                UART_FifoConfig
+ .text.UART_Enable
+                0x00000000220172dc       0x34 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                0x00000000220172dc                UART_Enable
+ .text.UART_Disable
+                0x0000000022017310       0x30 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                0x0000000022017310                UART_Disable
+ .text.UART_SetRxTimeoutValue
+                0x0000000022017340       0x1e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                0x0000000022017340                UART_SetRxTimeoutValue
+ .text.UART_TxFreeRun
+                0x000000002201735e       0x28 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                0x000000002201735e                UART_TxFreeRun
+ .text.UART_AutoBaudDetection
+                0x0000000022017386       0x28 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                0x0000000022017386                UART_AutoBaudDetection
+ .text.UART_IntMask
+                0x00000000220173ae       0x48 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                0x00000000220173ae                UART_IntMask
+ .text.UART_IntClear
+                0x00000000220173f6       0x2e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                0x00000000220173f6                UART_IntClear
+ .text.UART_Int_Callback_Install
+                0x0000000022017424       0x1a out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                0x0000000022017424                UART_Int_Callback_Install
+ .text.UART_SendData
+                0x000000002201743e       0x50 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                0x000000002201743e                UART_SendData
+ .text.UART_ReceiveData
+                0x000000002201748e       0x4e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                0x000000002201748e                UART_ReceiveData
+ .text.UART_GetAutoBaudCount
+                0x00000000220174dc       0x18 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                0x00000000220174dc                UART_GetAutoBaudCount
+ .text.UART_GetIntStatus
+                0x00000000220174f4       0x2e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                0x00000000220174f4                UART_GetIntStatus
+ .text.UART_GetTxBusBusyStatus
+                0x0000000022017522       0x14 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                0x0000000022017522                UART_GetTxBusBusyStatus
+ .text.XIP_SFlash_Opt_Enter
+                0x0000000022017536       0x20 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash.o
+                0x0000000022017536                XIP_SFlash_Opt_Enter
+ .text.XIP_SFlash_Opt_Exit
+                0x0000000022017556       0x10 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash.o
+                0x0000000022017556                XIP_SFlash_Opt_Exit
+ .text.SEC_TRNG_IRQHandler
+                0x0000000022017566       0x26 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x0000000022017566                SEC_TRNG_IRQHandler
+ .text.SEC_PKA_IRQHandler
+                0x000000002201758c       0x26 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x000000002201758c                SEC_PKA_IRQHandler
+ .text.SEC_SHA_IRQHandler
+                0x00000000220175b2       0x22 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x00000000220175b2                SEC_SHA_IRQHandler
+ .text.Sec_Eng_SHA256_Update.part.0
+                0x00000000220175d4      0x17c out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+ .text.Sec_Eng_PKA_MREM.part.3
+                0x0000000022017750       0x1e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+ .text.Sec_Eng_SHA256_Init
+                0x000000002201776e       0x60 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x000000002201776e                Sec_Eng_SHA256_Init
+ .text.Sec_Eng_SHA_Start
+                0x00000000220177ce       0x12 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x00000000220177ce                Sec_Eng_SHA_Start
+ .text.Sec_Eng_SHA256_Update
+                0x00000000220177e0        0xe out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x00000000220177e0                Sec_Eng_SHA256_Update
+ .text.Sec_Eng_SHA256_Finish
+                0x00000000220177ee      0x22a out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x00000000220177ee                Sec_Eng_SHA256_Finish
+ .text.Sec_Eng_Trng_Enable
+                0x0000000022017a18       0x6a out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x0000000022017a18                Sec_Eng_Trng_Enable
+ .text.Sec_Eng_Trng_Read
+                0x0000000022017a82      0x18e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x0000000022017a82                Sec_Eng_Trng_Read
+ .text.Sec_Eng_Trng_Disable
+                0x0000000022017c10       0x14 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x0000000022017c10                Sec_Eng_Trng_Disable
+ .text.Sec_Eng_PKA_Reset
+                0x0000000022017c24       0x10 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x0000000022017c24                Sec_Eng_PKA_Reset
+ .text.Sec_Eng_PKA_BigEndian_Enable
+                0x0000000022017c34       0x1e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x0000000022017c34                Sec_Eng_PKA_BigEndian_Enable
+ .text.Sec_Eng_PKA_Write_Data
+                0x0000000022017c52       0xc2 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x0000000022017c52                Sec_Eng_PKA_Write_Data
+ .text.Sec_Eng_PKA_Read_Data
+                0x0000000022017d14       0xc2 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x0000000022017d14                Sec_Eng_PKA_Read_Data
+ .text.Sec_Eng_PKA_CREG
+                0x0000000022017dd6       0x64 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x0000000022017dd6                Sec_Eng_PKA_CREG
+ .text.Sec_Eng_PKA_Move_Data
+                0x0000000022017e3a       0x6a out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x0000000022017e3a                Sec_Eng_PKA_Move_Data
+ .text.Sec_Eng_PKA_MSUB
+                0x0000000022017ea4       0x9e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x0000000022017ea4                Sec_Eng_PKA_MSUB
+ .text.Sec_Eng_PKA_MREM
+                0x0000000022017f42       0x66 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x0000000022017f42                Sec_Eng_PKA_MREM
+ .text.Sec_Eng_PKA_MMUL
+                0x0000000022017fa8       0x9e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x0000000022017fa8                Sec_Eng_PKA_MMUL
+ .text.Sec_Eng_PKA_MINV
+                0x0000000022018046       0x80 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x0000000022018046                Sec_Eng_PKA_MINV
+ .text.Sec_Eng_PKA_LCMP
+                0x00000000220180c6       0x6a out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x00000000220180c6                Sec_Eng_PKA_LCMP
+ .text.Sec_Eng_PKA_LADD
+                0x0000000022018130       0x7e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x0000000022018130                Sec_Eng_PKA_LADD
+ .text.Sec_Eng_PKA_LMUL
+                0x00000000220181ae       0x64 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x00000000220181ae                Sec_Eng_PKA_LMUL
+ .text.Sec_Eng_PKA_GF2Mont
+                0x0000000022018212       0x44 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x0000000022018212                Sec_Eng_PKA_GF2Mont
+ .text.Sec_Eng_PKA_Mont2GF
+                0x0000000022018256       0x5c out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                0x0000000022018256                Sec_Eng_PKA_Mont2GF
+ .text.USB_Set_EPx_Rdy.part.1
+                0x00000000220182b2       0xe4 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+ .text.USB_Set_EPx_STALL.part.2
+                0x0000000022018396       0xac out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+ .text.USB_Set_EPx_Busy.part.4
+                0x0000000022018442       0xe4 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+ .text.USB_IRQHandler
+                0x0000000022018526        0xc out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x0000000022018526                USB_IRQHandler
+ .text.USB_Enable
+                0x0000000022018532       0x14 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x0000000022018532                USB_Enable
+ .text.USB_Set_Config
+                0x0000000022018546       0x90 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x0000000022018546                USB_Set_Config
+ .text.USB_Set_Device_Addr
+                0x00000000220185d6       0x1c out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x00000000220185d6                USB_Set_Device_Addr
+ .text.USB_Get_Device_Addr
+                0x00000000220185f2       0x10 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x00000000220185f2                USB_Get_Device_Addr
+ .text.USB_Set_EPx_Rdy
+                0x0000000022018602       0x30 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x0000000022018602                USB_Set_EPx_Rdy
+ .text.USB_Is_EPx_RDY_Free
+                0x0000000022018632       0xc0 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x0000000022018632                USB_Is_EPx_RDY_Free
+ .text.USB_Clr_EPx_STALL
+                0x00000000220186f2       0xba out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x00000000220186f2                USB_Clr_EPx_STALL
+ .text.USB_Set_EPx_Busy
+                0x00000000220187ac       0x28 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x00000000220187ac                USB_Set_EPx_Busy
+ .text.USB_Set_EPx_Status
+                0x00000000220187d4       0x80 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x00000000220187d4                USB_Set_EPx_Status
+ .text.USB_IntEn
+                0x0000000022018854       0x50 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x0000000022018854                USB_IntEn
+ .text.USB_IntMask
+                0x00000000220188a4       0x50 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x00000000220188a4                USB_IntMask
+ .text.USB_Get_IntStatus
+                0x00000000220188f4       0x2c out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x00000000220188f4                USB_Get_IntStatus
+ .text.USB_Clr_IntStatus
+                0x0000000022018920       0x2e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x0000000022018920                USB_Clr_IntStatus
+ .text.USB_Clr_EPx_IntStatus
+                0x000000002201894e       0x32 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x000000002201894e                USB_Clr_EPx_IntStatus
+ .text.USB_Set_EPx_Config
+                0x0000000022018980      0x180 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x0000000022018980                USB_Set_EPx_Config
+ .text.USB_Set_EPx_Type
+                0x0000000022018b00       0xe6 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x0000000022018b00                USB_Set_EPx_Type
+ .text.USB_EPx_Write_Data_To_FIFO
+                0x0000000022018be6      0x120 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x0000000022018be6                USB_EPx_Write_Data_To_FIFO
+ .text.USB_EPx_Read_Data_From_FIFO
+                0x0000000022018d06       0xb2 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x0000000022018d06                USB_EPx_Read_Data_From_FIFO
+ .text.USB_Get_EPx_RX_FIFO_CNT
+                0x0000000022018db8       0xae out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                0x0000000022018db8                USB_Get_EPx_RX_FIFO_CNT
+ .text.USB_HAL_GPIO_Init.part.0
+                0x0000000022018e66       0x42 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+ .text.HAL_PCD_Init
+                0x0000000022018ea8       0x9a out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x0000000022018ea8                HAL_PCD_Init
+ .text.HAL_PCD_Start
+                0x0000000022018f42        0xe out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x0000000022018f42                HAL_PCD_Start
+ .text.HAL_PCD_IRQHandler
+                0x0000000022018f50      0x27e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x0000000022018f50                HAL_PCD_IRQHandler
+ .text.HAL_PCD_SetAddress
+                0x00000000220191ce       0x4c out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x00000000220191ce                HAL_PCD_SetAddress
+ .text.HAL_PCD_EP_Open
+                0x000000002201921a       0xbc out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x000000002201921a                HAL_PCD_EP_Open
+ .text.HAL_PCD_EP_Close
+                0x00000000220192d6       0x80 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x00000000220192d6                HAL_PCD_EP_Close
+ .text.HAL_PCD_EP_Receive
+                0x0000000022019356       0x7e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x0000000022019356                HAL_PCD_EP_Receive
+ .text.HAL_PCD_EP_GetRxCount
+                0x00000000220193d4       0x14 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x00000000220193d4                HAL_PCD_EP_GetRxCount
+ .text.HAL_PCD_EP_Transmit
+                0x00000000220193e8       0xba out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x00000000220193e8                HAL_PCD_EP_Transmit
+ .text.HAL_PCD_EP_SetStall
+                0x00000000220194a2       0x82 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x00000000220194a2                HAL_PCD_EP_SetStall
+ .text.HAL_PCD_EP_ClrStall
+                0x0000000022019524       0x82 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x0000000022019524                HAL_PCD_EP_ClrStall
+ .text.HAL_PCDEx_PMAConfig
+                0x00000000220195a6       0x42 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x00000000220195a6                HAL_PCDEx_PMAConfig
+ .text.USB_HAL_Power_Up
+                0x00000000220195e8       0x14 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x00000000220195e8                USB_HAL_Power_Up
+ .text.USB_HAL_Power_Off
+                0x00000000220195fc       0x16 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x00000000220195fc                USB_HAL_Power_Off
+ .text.USB_HAL_Xcvr_Config
+                0x0000000022019612       0x82 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x0000000022019612                USB_HAL_Xcvr_Config
+ .text.USB_HAL_System_Init
+                0x0000000022019694       0x2c out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x0000000022019694                USB_HAL_System_Init
+ .text.USB_HAL_Interrupts_LPM_Init
+                0x00000000220196c0       0x2e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x00000000220196c0                USB_HAL_Interrupts_LPM_Init
+ .text.bflb_platform_uart_dbg_init
+                0x00000000220196ee       0x76 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                0x00000000220196ee                bflb_platform_uart_dbg_init
+ .text.bflb_platform_get_log
+                0x0000000022019764       0x2c out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                0x0000000022019764                bflb_platform_get_log
+ .text.bflb_platform_usart_dbg_send
+                0x0000000022019790       0x72 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                0x0000000022019790                bflb_platform_usart_dbg_send
+ .text.bflb_platform_uart_dbg_deinit
+                0x0000000022019802       0x18 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                0x0000000022019802                bflb_platform_uart_dbg_deinit
+ .text.bflb_platform_printf
+                0x000000002201981a       0x48 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                0x000000002201981a                bflb_platform_printf
+ .text.bflb_platform_printx
+                0x0000000022019862       0x34 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                0x0000000022019862                bflb_platform_printx
+ .text.bflb_platform_clear_time
+                0x0000000022019896       0x12 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                0x0000000022019896                bflb_platform_clear_time
+ .text.bflb_platform_get_time_us
+                0x00000000220198a8       0xc8 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                0x00000000220198a8                bflb_platform_get_time_us
+ .text.bflb_platform_init_time
+                0x0000000022019970       0x2a out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                0x0000000022019970                bflb_platform_init_time
+ .text.bflb_platform_delay_ms
+                0x000000002201999a       0x66 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                0x000000002201999a                bflb_platform_delay_ms
+ .text.bflb_platform_delay_us
+                0x0000000022019a00       0x5e out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                0x0000000022019a00                bflb_platform_delay_us
+ .text.bflb_platform_init
+                0x0000000022019a5e       0x60 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                0x0000000022019a5e                bflb_platform_init
+ .text.bflb_platform_deinit
+                0x0000000022019abe       0x42 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                0x0000000022019abe                bflb_platform_deinit
+ .text.bflb_platform_print_set
+                0x0000000022019b00        0xa out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                0x0000000022019b00                bflb_platform_print_set
+ .text.bflb_platform_get_random
+                0x0000000022019b0a       0x70 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                0x0000000022019b0a                bflb_platform_get_random
+ .text.bflb_platform_init_uart_debug_gpio
+                0x0000000022019b7a       0x2e out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_gpio.o
+                0x0000000022019b7a                bflb_platform_init_uart_debug_gpio
+ .text.bflb_platform_deinit_uart_debug_gpio
+                0x0000000022019ba8       0x30 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_gpio.o
+                0x0000000022019ba8                bflb_platform_deinit_uart_debug_gpio
+ *(.rodata)
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+                0x000000002201a838       0x71 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                         0x79 (size before relaxing)
+ *fill*         0x000000002201a8a9        0x3 
+ .rodata.HAL_PCD_Init.str1.4
+                0x000000002201a8ac       0x18 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+ .rodata.str1.4
+                0x000000002201a8c4        0x5 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg_ext.o
+ *fill*         0x000000002201a8c9        0x3 
+ .rodata.bflb_platform_init.str1.4
+                0x000000002201a8cc       0x14 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                         0x13 (size before relaxing)
+ .rodata.hexTable
+                0x000000002201a8e0       0x10 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+ *(.srodata)
+ .srodata       0x000000002201a8f0        0x4 out/startup/system_bl702.o
+ *(.srodata.*)
+ *(.tcm_code)
+ .tcm_code      0x000000002201a8f4      0x440 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                0x000000002201a8f4                GLB_GPIO_Init
+                0x000000002201ab0e                GLB_GPIO_INPUT_Enable
+                0x000000002201ab64                GLB_GPIO_INPUT_Disable
+                0x000000002201abc4                GLB_GPIO_OUTPUT_Enable
+                0x000000002201ac04                GLB_GPIO_OUTPUT_Disable
+                0x000000002201ac48                GLB_GPIO_Set_HZ
+ .tcm_code      0x000000002201ad34      0x448 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+                0x000000002201ad34                HBN_Power_Down_Flash
+                0x000000002201ad7e                HBN_Enable_Ext
+                0x000000002201ae28                HBN_Mode_Enter
+                0x000000002201afc4                HBN_Set_Ldo11_Aon_Vout
+                0x000000002201afda                HBN_Set_Ldo11_Rt_Vout
+                0x000000002201aff2                HBN_Set_Ldo11_Soc_Vout
+                0x000000002201b00a                HBN_Set_Ldo11_All_Vout
+                0x000000002201b03a                HBN_Set_Ldo11rt_Drive_Strength
+                0x000000002201b050                HBN_Hw_Pu_Pd_Cfg
+                0x000000002201b076                HBN_Pin_WakeUp_Mask
+                0x000000002201b08c                HBN_Set_Pad_23_28_Pullnone
+                0x000000002201b0a0                HBN_Set_Pad_23_28_Pullup
+                0x000000002201b0ba                HBN_Set_Pad_23_28_Pulldown
+                0x000000002201b0d4                HBN_Set_Pad_23_28_ActiveIE
+                0x000000002201b0ee                HBN_Enable
+ .tcm_code      0x000000002201b17c      0x224 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+                0x000000002201b17c                PDS_RAM_Config
+                0x000000002201b18e                PDS_Set_Pad_Config
+                0x000000002201b314                PDS_App_Enable
+                0x000000002201b370                PDS_Force_Config
+                0x000000002201b380                PDS_Default_Level_Config
+ .tcm_code      0x000000002201b3a0       0xd6 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg.o
+                0x000000002201b3a0                SF_Cfg_Init_Flash_Gpio
+ .tcm_code      0x000000002201b476      0x1ae out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg_ext.o
+                0x000000002201b476                SF_Cfg_Init_Internal_Flash_Gpio
+                0x000000002201b4ea                SF_Cfg_Get_Flash_Cfg_Need_Lock_Ext
+                0x000000002201b5a0                SF_Cfg_Flash_Identify_Ext
+ .tcm_code      0x000000002201b624      0x50a out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                0x000000002201b624                ASM_Delay_Us
+                0x000000002201b62e                BL702_Delay_US
+                0x000000002201b638                BL702_Delay_MS
+                0x000000002201b642                BL702_MemCpy
+                0x000000002201b64c                BL702_MemCpy4
+                0x000000002201b656                BL702_MemCpy_Fast
+                0x000000002201b660                ARCH_MemCpy_Fast
+                0x000000002201b66a                BL702_MemSet
+                0x000000002201b674                BL702_MemSet4
+                0x000000002201b67e                BL702_MemCmp
+                0x000000002201b688                BFLB_Soft_CRC32
+                0x000000002201b692                GLB_SW_System_Reset
+                0x000000002201b69c                GLB_SW_CPU_Reset
+                0x000000002201b6a6                GLB_SW_POR_Reset
+                0x000000002201b6b0                GLB_Select_Internal_Flash
+                0x000000002201b6ba                GLB_Swap_Flash_Pin
+                0x000000002201b6c4                GLB_Swap_Flash_CS_IO2_Pin
+                0x000000002201b6ce                GLB_Swap_Flash_IO0_IO3_Pin
+                0x000000002201b6d8                GLB_Select_Internal_PSram
+                0x000000002201b6e2                GLB_Deswap_Flash_Pin
+                0x000000002201b6ec                GLB_Select_External_Flash
+                0x000000002201b6f6                GLB_GPIO_Get_Fun
+                0x000000002201b700                EF_Ctrl_Busy
+                0x000000002201b70a                EF_Ctrl_Sw_AHB_Clk_0
+                0x000000002201b714                EF_Ctrl_Load_Efuse_R0
+                0x000000002201b71e                EF_Ctrl_Clear
+                0x000000002201b728                PDS_Reset
+                0x000000002201b732                PDS_Enable
+                0x000000002201b73c                PDS_Auto_Time_Config
+                0x000000002201b746                PDS_Auto_Enable
+                0x000000002201b750                PDS_Manual_Force_Turn_Off
+                0x000000002201b75a                PDS_Manual_Force_Turn_On
+                0x000000002201b764                HBN_Reset
+                0x000000002201b76e                HBN_GPIO_Dbg_Pull_Cfg
+                0x000000002201b778                XIP_SFlash_State_Save
+                0x000000002201b782                XIP_SFlash_State_Restore
+                0x000000002201b78c                XIP_SFlash_Erase_Need_Lock
+                0x000000002201b796                XIP_SFlash_Write_Need_Lock
+                0x000000002201b7a0                XIP_SFlash_Read_Need_Lock
+                0x000000002201b7aa                XIP_SFlash_GetJedecId_Need_Lock
+                0x000000002201b7b4                XIP_SFlash_GetDeviceId_Need_Lock
+                0x000000002201b7be                XIP_SFlash_GetUniqueId_Need_Lock
+                0x000000002201b7c8                XIP_SFlash_Read_Via_Cache_Need_Lock
+                0x000000002201b7d2                XIP_SFlash_Read_With_Lock
+                0x000000002201b7dc                XIP_SFlash_Write_With_Lock
+                0x000000002201b7e6                XIP_SFlash_Erase_With_Lock
+                0x000000002201b7f0                SFlash_Init
+                0x000000002201b7fa                SFlash_SetSPIMode
+                0x000000002201b804                SFlash_Read_Reg
+                0x000000002201b80e                SFlash_Write_Reg
+                0x000000002201b818                SFlash_Read_Reg_With_Cmd
+                0x000000002201b822                SFlash_Write_Reg_With_Cmd
+                0x000000002201b82c                SFlash_Busy
+                0x000000002201b836                SFlash_Write_Enable
+                0x000000002201b840                SFlash_Qspi_Enable
+                0x000000002201b84a                SFlash_Volatile_Reg_Write_Enable
+                0x000000002201b854                SFlash_Chip_Erase
+                0x000000002201b85e                SFlash_Sector_Erase
+                0x000000002201b868                SFlash_Blk32_Erase
+                0x000000002201b872                SFlash_Blk64_Erase
+                0x000000002201b87c                SFlash_Erase
+                0x000000002201b886                SFlash_Program
+                0x000000002201b890                SFlash_GetUniqueId
+                0x000000002201b89a                SFlash_GetJedecId
+                0x000000002201b8a4                SFlash_GetDeviceId
+                0x000000002201b8ae                SFlash_Powerdown
+                0x000000002201b8b8                SFlash_Releae_Powerdown
+                0x000000002201b8c2                SFlash_Restore_From_Powerdown
+                0x000000002201b8cc                SFlash_SetBurstWrap
+                0x000000002201b8d6                SFlash_DisableBurstWrap
+                0x000000002201b8e0                SFlash_Software_Reset
+                0x000000002201b8ea                SFlash_Reset_Continue_Read
+                0x000000002201b8f4                SFlash_Set_IDbus_Cfg
+                0x000000002201b8fe                SFlash_IDbus_Read_Enable
+                0x000000002201b908                SFlash_Cache_Read_Enable
+                0x000000002201b912                SFlash_Cache_Read_Disable
+                0x000000002201b91c                SFlash_Read
+                0x000000002201b926                L1C_Cache_Enable_Set
+                0x000000002201b930                L1C_Cache_Write_Set
+                0x000000002201b93a                L1C_Cache_Flush
+                0x000000002201b944                L1C_Cache_Hit_Count_Get
+                0x000000002201b94e                L1C_Cache_Miss_Count_Get
+                0x000000002201b958                L1C_Cache_Read_Disable
+                0x000000002201b962                L1C_Set_Wrap
+                0x000000002201b96c                L1C_Set_Way_Disable
+                0x000000002201b976                L1C_IROM_2T_Access_Set
+                0x000000002201b980                SF_Ctrl_Enable
+                0x000000002201b98a                SF_Ctrl_Get_Clock_Delay
+                0x000000002201b994                SF_Ctrl_Set_Clock_Delay
+                0x000000002201b99e                SF_Ctrl_Cmds_Set
+                0x000000002201b9a8                SF_Ctrl_Set_Owner
+                0x000000002201b9b2                SF_Ctrl_Disable
+                0x000000002201b9bc                SF_Ctrl_Select_Pad
+                0x000000002201b9c6                SF_Ctrl_Select_Bank
+                0x000000002201b9d0                SF_Ctrl_AES_Enable_BE
+                0x000000002201b9da                SF_Ctrl_AES_Enable_LE
+                0x000000002201b9e4                SF_Ctrl_AES_Set_Region
+                0x000000002201b9ee                SF_Ctrl_AES_Set_Key
+                0x000000002201b9f8                SF_Ctrl_AES_Set_Key_BE
+                0x000000002201ba02                SF_Ctrl_AES_Set_IV
+                0x000000002201ba0c                SF_Ctrl_AES_Set_IV_BE
+                0x000000002201ba16                SF_Ctrl_AES_Enable
+                0x000000002201ba20                SF_Ctrl_AES_Disable
+                0x000000002201ba2a                SF_Ctrl_Is_AES_Enable
+                0x000000002201ba34                SF_Ctrl_Set_Flash_Image_Offset
+                0x000000002201ba3e                SF_Ctrl_Get_Flash_Image_Offset
+                0x000000002201ba48                SF_Ctrl_Select_Clock
+                0x000000002201ba52                SF_Ctrl_SendCmd
+                0x000000002201ba5c                SF_Ctrl_Flash_Read_Icache_Set
+                0x000000002201ba66                SF_Ctrl_Psram_Write_Icache_Set
+                0x000000002201ba70                SF_Ctrl_Psram_Read_Icache_Set
+                0x000000002201ba7a                SF_Ctrl_GetBusyState
+                0x000000002201ba84                SF_Cfg_Deinit_Ext_Flash_Gpio
+                0x000000002201ba8e                SF_Cfg_Init_Ext_Flash_Gpio
+                0x000000002201ba98                SF_Cfg_Get_Flash_Cfg_Need_Lock
+                0x000000002201baa2                SF_Cfg_Flash_Identify
+                0x000000002201baac                Psram_ReadReg
+                0x000000002201bab6                Psram_WriteReg
+                0x000000002201bac0                Psram_SetDriveStrength
+                0x000000002201baca                Psram_SetBurstWrap
+                0x000000002201bad4                Psram_ReadId
+                0x000000002201bade                Psram_EnterQuadMode
+                0x000000002201bae8                Psram_ExitQuadMode
+                0x000000002201baf2                Psram_ToggleBurstLength
+                0x000000002201bafc                Psram_SoftwareReset
+                0x000000002201bb06                Psram_Set_IDbus_Cfg
+                0x000000002201bb10                Psram_Cache_Write_Set
+                0x000000002201bb1a                Psram_Write
+                0x000000002201bb24                Psram_Read
+ *(.tcm_const)
+ *fill*         0x000000002201bb2e        0x2 
+ .tcm_const     0x000000002201bb30       0xa8 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg_ext.o
+ *(.sclock_rlt_code)
+ .sclock_rlt_code
+                0x000000002201bbd8      0x14a out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                0x000000002201bbd8                AON_Power_On_MBG
+                0x000000002201bbe2                AON_Power_Off_MBG
+                0x000000002201bbec                AON_Power_On_XTAL
+                0x000000002201bbf6                AON_Set_Xtal_CapCode
+                0x000000002201bc00                AON_Power_Off_XTAL
+                0x000000002201bc0a                GLB_Get_Root_CLK_Sel
+                0x000000002201bc14                GLB_Set_System_CLK_Div
+                0x000000002201bc1e                GLB_Get_BCLK_Div
+                0x000000002201bc28                GLB_Get_HCLK_Div
+                0x000000002201bc32                Update_SystemCoreClockWith_XTAL
+                0x000000002201bc3c                GLB_Set_System_CLK
+                0x000000002201bc46                System_Core_Clock_Update_From_RC32M
+                0x000000002201bc50                GLB_Set_SF_CLK
+                0x000000002201bc5a                GLB_Power_Off_DLL
+                0x000000002201bc64                GLB_Power_On_DLL
+                0x000000002201bc6e                GLB_Enable_DLL_All_Clks
+                0x000000002201bc78                GLB_Enable_DLL_Clk
+                0x000000002201bc82                GLB_Disable_DLL_All_Clks
+                0x000000002201bc8c                GLB_Disable_DLL_Clk
+                0x000000002201bc96                EF_Ctrl_Get_Trim_Parity
+                0x000000002201bca0                EF_Ctrl_Read_RC32K_Trim
+                0x000000002201bcaa                EF_Ctrl_Read_RC32M_Trim
+                0x000000002201bcb4                PDS_Trim_RC32M
+                0x000000002201bcbe                PDS_Select_RC32M_As_PLL_Ref
+                0x000000002201bcc8                PDS_Select_XTAL_As_PLL_Ref
+                0x000000002201bcd2                PDS_Power_On_PLL
+                0x000000002201bcdc                PDS_Enable_PLL_All_Clks
+                0x000000002201bce6                PDS_Disable_PLL_All_Clks
+                0x000000002201bcf0                PDS_Enable_PLL_Clk
+                0x000000002201bcfa                PDS_Disable_PLL_Clk
+                0x000000002201bd04                PDS_Power_Off_PLL
+                0x000000002201bd0e                HBN_Trim_RC32K
+                0x000000002201bd18                HBN_Set_ROOT_CLK_Sel
+ *(.sclock_rlt_const)
+                0x000000002201bd24                . = ALIGN (0x4)
+ *fill*         0x000000002201bd22        0x2 
+                0x000000002201bd24                __text_code_end__ = .
+
+.rela.dyn       0x000000002201bd24        0x0
+ .rela.text.startup.main
+                0x000000002201bd24        0x0 out/ChipTest/Eflash_Loader/eflash_loader.o
+ .rela.text.start_load
+                0x000000002201bd24        0x0 out/ChipTest/Eflash_Loader/eflash_loader.o
+ .rela.init     0x000000002201bd24        0x0 out/ChipTest/Eflash_Loader/eflash_loader.o
+ .rela.text.metal.init.enter
+                0x000000002201bd24        0x0 out/ChipTest/Eflash_Loader/eflash_loader.o
+                0x000000002201bd24                . = ALIGN (0x4)
+                0x000000002201bd24                __itcm_load_addr = .
+
+.itcm_region    0x000000002201bd24        0x0
+                0x000000002201bd24                . = ALIGN (0x4)
+                0x000000002201bd24                __tcm_code_start__ = .
+                0x000000002201bd24                . = ALIGN (0x4)
+                0x000000002201bd24                __tcm_code_end__ = .
+                0x000000002201bd24                __dtcm_load_addr = (__itcm_load_addr + SIZEOF (.itcm_region))
+
+.dtcm_region    0x000000004201c000        0x0 load address 0x000000002201bd24
+                0x000000004201c000                . = ALIGN (0x4)
+                0x000000004201c000                __tcm_data_start__ = .
+ *(.tcm_data)
+                0x000000004201c000                . = ALIGN (0x4)
+                0x000000004201c000                __tcm_data_end__ = .
+
+.stack_dummy    0x000000004201c000      0x400
+                0x000000004201c000                . = ALIGN (0x4)
+                0x000000004201c400                . = (. + StackSize)
+ *fill*         0x000000004201c000      0x400 
+                0x000000004201c400                . = ALIGN (0x4)
+                0x0000000042020000                __StackTop = (ORIGIN (dtcm_memory) + LENGTH (dtcm_memory))
+                0x000000004201fc00                __StackLimit = (__StackTop - SIZEOF (.stack_dummy))
+                0x0000000000000001                ASSERT ((__StackLimit >= __tcm_data_end__), region RAM overflowed with stack)
+                0x000000002201bd24                __system_ram_load_addr = (__dtcm_load_addr + SIZEOF (.dtcm_region))
+
+.system_ram_data_region
+                0x0000000042020000     0x3d0c load address 0x000000002201bd24
+                0x0000000042020000                . = ALIGN (0x4)
+                0x0000000042020000                __system_ram_data_start__ = .
+ *(.system_ram)
+ .system_ram    0x0000000042020000     0x2d0c out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                0x0000000042020000                padding
+                0x0000000042020040                shaTmpBuf
+                0x0000000042020080                hash_handle
+                0x0000000042020104                checkBuf
+                0x0000000042020904                ShaInbuf
+ .system_ram    0x0000000042022d0c     0x1000 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                0x0000000042023d0c                . = ALIGN (0x4)
+                0x0000000042023d0c                __system_ram_data_end__ = .
+                0x000000002201fa30                __ram_load_addr = (__system_ram_load_addr + SIZEOF (.system_ram_data_region))
+
+RAM_DATA        0x0000000042023d0c      0x3a8 load address 0x000000002201fa30
+                0x0000000042023d0c                . = ALIGN (0x4)
+                0x0000000042023d0c                __ram_data_start__ = .
+                0x000000004202450c                PROVIDE (__global_pointer$ = (. + 0x800))
+ *(.data)
+ *(.data.*)
+ .data.flashCfg_Gd_Q80E_Q16E
+                0x0000000042023d0c       0x54 out/ChipTest/Eflash_Loader/eflash_loader.o
+ .data.uart_if_cfg
+                0x0000000042023d60       0x14 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ .data.flashCfg_Gd_Q80E_Q16E
+                0x0000000042023d74       0x54 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+ .data.hUsbDeviceFS
+                0x0000000042023dc8      0x148 out/ChipTest/Eflash_Loader/usb_if/usb_device.o
+                0x0000000042023dc8                hUsbDeviceFS
+ .data.USBD_CDC
+                0x0000000042023f10       0x38 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+                0x0000000042023f10                USBD_CDC
+ .data.USBD_CDC_CfgFSDesc
+                0x0000000042023f48       0x43 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+                0x0000000042023f48                USBD_CDC_CfgFSDesc
+ *fill*         0x0000000042023f8b        0x1 
+ .data.USBD_CDC_CfgHSDesc
+                0x0000000042023f8c       0x43 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+                0x0000000042023f8c                USBD_CDC_CfgHSDesc
+ *fill*         0x0000000042023fcf        0x1 
+ .data.USBD_CDC_DeviceQualifierDesc
+                0x0000000042023fd0        0xa out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+ *fill*         0x0000000042023fda        0x2 
+ .data.USBD_CDC_OtherSpeedCfgDesc
+                0x0000000042023fdc       0x43 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+                0x0000000042023fdc                USBD_CDC_OtherSpeedCfgDesc
+ *fill*         0x000000004202401f        0x1 
+ .data.USBD_Interface_fops_FS
+                0x0000000042024020       0x10 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+                0x0000000042024020                USBD_Interface_fops_FS
+ .data.cdc_line_coding
+                0x0000000042024030        0x8 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+                0x0000000042024030                cdc_line_coding
+ .data.FS_Desc  0x0000000042024038       0x20 out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+                0x0000000042024038                FS_Desc
+ .data.USBD_FS_DeviceDesc
+                0x0000000042024058       0x12 out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+                0x0000000042024058                USBD_FS_DeviceDesc
+ *fill*         0x000000004202406a        0x2 
+ .data.USBD_StringSerial
+                0x000000004202406c       0x1a out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+                0x000000004202406c                USBD_StringSerial
+ *fill*         0x0000000042024086        0x2 
+ .data.uart_dbg_cfg.10993
+                0x0000000042024088       0x14 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+ *(.sdata)
+ *(.sdata.*)
+ .sdata.uart_if_fifocfg
+                0x000000004202409c        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ .sdata.ReworkBaudrate
+                0x00000000420240a0        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+ .sdata.toCnt   0x00000000420240a4        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                0x00000000420240a4                toCnt
+ .sdata.USBD_LangIDDesc
+                0x00000000420240a8        0x4 out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+                0x00000000420240a8                USBD_LangIDDesc
+ .sdata.fifoCfg.10994
+                0x00000000420240ac        0x4 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+ *(.sdata2)
+ *(.sdata2.*)
+ .sdata2.CSWTCH.6
+                0x00000000420240b0        0x4 out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x00000000420240b4                . = ALIGN (0x4)
+                0x00000000420240b4                __ram_data_end__ = .
+
+.bss            0x00000000420240b4     0x6bf8 load address 0x000000002201fdd8
+                0x00000000420240b4                . = ALIGN (0x4)
+                0x00000000420240b4                __bss_start__ = .
+ *(.bss*)
+ .bss.eflash_loader_cmd_ack_buf
+                0x00000000420240b4       0x40 out/ChipTest/Eflash_Loader/eflash_loader.o
+                0x00000000420240b4                eflash_loader_cmd_ack_buf
+ .bss.eflash_loader_readbuf
+                0x00000000420240f4     0x4810 out/ChipTest/Eflash_Loader/eflash_loader.o
+                0x00000000420240f4                eflash_loader_readbuf
+ .bss.otp_cfg   0x0000000042028904        0x8 out/ChipTest/Eflash_Loader/eflash_loader.o
+                0x0000000042028904                otp_cfg
+ .bss.ecdh_shared_keyx
+                0x000000004202890c       0x20 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .bss.ecdh_shared_keyy
+                0x000000004202892c       0x20 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .bss.eflash_loader_if_cfg
+                0x000000004202894c       0x24 out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+ .bss.ReworkSetupCmd
+                0x0000000042028970       0x40 out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                0x0000000042028970                ReworkSetupCmd
+ .bss.ReworkSetupInData
+                0x00000000420289b0       0x40 out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                0x00000000420289b0                ReworkSetupInData
+ .bss.ReworkSetupOutData
+                0x00000000420289f0       0x40 out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                0x00000000420289f0                ReworkSetupOutData
+ .bss.UserRxBufferFS
+                0x0000000042028a30      0x3e8 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+                0x0000000042028a30                UserRxBufferFS
+ .bss.UserTxBufferFS
+                0x0000000042028e18      0x3e8 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+                0x0000000042028e18                UserTxBufferFS
+ .bss.hpcd_USB_FS
+                0x0000000042029200      0x2a4 out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                0x0000000042029200                hpcd_USB_FS
+ .bss.mem.11148
+                0x00000000420294a4      0x220 out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+ .bss.USBD_StrDesc
+                0x00000000420296c4      0x200 out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+                0x00000000420296c4                USBD_StrDesc
+ .bss.usbCmdRbHandle
+                0x00000000420298c4       0x20 out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                0x00000000420298c4                usbCmdRbHandle
+ .bss.usbRespRbHandle
+                0x00000000420298e4       0x20 out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                0x00000000420298e4                usbRespRbHandle
+ .bss.usb_cmd_rb_mem
+                0x0000000042029904      0xc00 out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                0x0000000042029904                usb_cmd_rb_mem
+ .bss.usb_resp_rb_mem
+                0x000000004202a504      0x400 out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                0x000000004202a504                usb_resp_rb_mem
+ .bss.shaCtx    0x000000004202a904       0x14 out/BSP_Common/cipher_suite/bflb_hash.o
+ .bss.__Interrupt_Handlers
+                0x000000004202a918      0x140 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_common.o
+                0x000000004202a918                __Interrupt_Handlers
+ .bss.uartIntCbfArra
+                0x000000004202aa58       0x48 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+ .bss.secEngIntCbfArra
+                0x000000004202aaa0       0x18 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+ .bss.ep0_in_data_buff
+                0x000000004202aab8       0x40 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x000000004202aab8                ep0_in_data_buff
+ .bss.ep0_out_data_buff
+                0x000000004202aaf8       0x40 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x000000004202aaf8                ep0_out_data_buff
+ .bss.ep1_out_data_buff
+                0x000000004202ab38       0x40 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x000000004202ab38                ep1_out_data_buff
+ .bss.ep2_in_data_buff
+                0x000000004202ab78       0x40 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x000000004202ab78                ep2_in_data_buff
+ .bss.ep3_out_data_buff
+                0x000000004202abb8       0x40 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                0x000000004202abb8                ep3_out_data_buff
+ .bss.print_buf.11011
+                0x000000004202abf8       0x80 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+ *(.sbss*)
+ .sbss.PllOnFlag
+                0x000000004202ac78        0x1 out/ChipTest/Eflash_Loader/eflash_loader.o
+                0x000000004202ac78                PllOnFlag
+ .sbss.bootMode
+                0x000000004202ac79        0x1 out/ChipTest/Eflash_Loader/eflash_loader.o
+                0x000000004202ac79                bootMode
+ *fill*         0x000000004202ac7a        0x2 
+ .sbss.rx_buf_index
+                0x000000004202ac7c        0x4 out/ChipTest/Eflash_Loader/eflash_loader.o
+                0x000000004202ac7c                rx_buf_index
+ .sbss.rx_buf_len
+                0x000000004202ac80        0x4 out/ChipTest/Eflash_Loader/eflash_loader.o
+                0x000000004202ac80                rx_buf_len
+ .sbss.xtalType
+                0x000000004202ac84        0x1 out/ChipTest/Eflash_Loader/eflash_loader.o
+                0x000000004202ac84                xtalType
+ *fill*         0x000000004202ac85        0x3 
+ .sbss.eflash_loader_error
+                0x000000004202ac88        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .sbss.eflash_loader_if
+                0x000000004202ac8c        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                0x000000004202ac8c                eflash_loader_if
+ .sbss.abr_gpio_sel
+                0x000000004202ac90        0x1 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ *fill*         0x000000004202ac91        0x3 
+ .sbss.detected_baudrate
+                0x000000004202ac94        0x4 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ .sbss.bflb_eflash_loader_flash_id_valid_flag
+                0x000000004202ac98        0x4 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+ .sbss.ifalt.10862
+                0x000000004202ac9c        0x1 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+ .sbss.cfgidx.10868
+                0x000000004202ac9d        0x1 out/BSP_Common/usbd_ctlreq.o
+ .sbss.aesEnable
+                0x000000004202ac9e        0x1 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash.o
+ *fill*         0x000000004202ac9f        0x1 
+ .sbss.init_flag
+                0x000000004202aca0        0x4 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+ .sbss.log_len  0x000000004202aca4        0x4 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+ .sbss.uart_dbg_disable
+                0x000000004202aca8        0x1 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+ *(COMMON)
+                0x000000004202acac                . = ALIGN (0x4)
+ *fill*         0x000000004202aca9        0x3 
+                0x000000004202acac                __bss_end__ = .
+
+.noinit_data    0x000000004202acac        0x0
+                0x000000004202acac                . = ALIGN (0x4)
+                0x000000004202acac                __noinit_data_start__ = .
+ *(.noinit_data*)
+                0x000000004202acac                . = ALIGN (0x4)
+                0x000000004202acac                __noinit_data_end__ = .
+
+.heap           0x000000004202acac        0x0
+                0x000000004202acac                . = ALIGN (0x4)
+                0x000000004202acac                __HeapBase = .
+ *(.heap*)
+                0x000000004202acac                . = ALIGN (0x4)
+                0x000000004202acac                __HeapLimit = .
+OUTPUT(out/ChipTest/Eflash_Loader/chiptest_eflash_loader.elf elf32-littleriscv)
+
+.debug_info     0x0000000000000000    0x3d1de
+ .debug_info    0x0000000000000000     0x17bd out/ChipTest/Eflash_Loader/eflash_loader.o
+ .debug_info    0x00000000000017bd     0x2f7c out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .debug_info    0x0000000000004739      0xf94 out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+ .debug_info    0x00000000000056cd     0x14e5 out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+ .debug_info    0x0000000000006bb2      0xe79 out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+ .debug_info    0x0000000000007a2b     0x1c8b out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ .debug_info    0x00000000000096b6      0x1fc out/ChipTest/Eflash_Loader/bflb_efuse.o
+ .debug_info    0x00000000000098b2      0xa2d out/ChipTest/Eflash_Loader/bflb_set_clock.o
+ .debug_info    0x000000000000a2df     0x1e84 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+ .debug_info    0x000000000000c163     0x20ed out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+ .debug_info    0x000000000000e250      0x7db out/ChipTest/Eflash_Loader/usb_if/usb_device.o
+ .debug_info    0x000000000000ea2b      0xde4 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+ .debug_info    0x000000000000f80f      0xb76 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+ .debug_info    0x0000000000010385     0x4448 out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+ .debug_info    0x00000000000147cd      0x5cc out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+ .debug_info    0x0000000000014d99      0xd78 out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+ .debug_info    0x0000000000015b11      0xa10 out/BSP_Common/ring_buffer/ring_buffer.o
+ .debug_info    0x0000000000016521       0xf7 out/BSP_Common/libc/memcpy.o
+ .debug_info    0x0000000000016618       0xd7 out/BSP_Common/libc/memset.o
+ .debug_info    0x00000000000166ef      0x525 out/BSP_Common/libc/vsnprintf.o
+ .debug_info    0x0000000000016c14       0xbf out/BSP_Common/libc/strlen.o
+ .debug_info    0x0000000000016cd3      0x4a8 out/BSP_Common/cipher_suite/bflb_hash.o
+ .debug_info    0x000000000001717b     0x32e1 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .debug_info    0x000000000001a45c      0xcdf out/BSP_Common/usbd_core.o
+ .debug_info    0x000000000001b13b     0x12f9 out/BSP_Common/usbd_ctlreq.o
+ .debug_info    0x000000000001c434      0x787 out/BSP_Common/usbd_ioreq.o
+ .debug_info    0x000000000001cbbb      0x439 out/startup/system_bl702.o
+ .debug_info    0x000000000001cff4      0x1cb out/startup/GCC/start_load.o
+ .debug_info    0x000000000001d1bf      0x24e out/startup/interrupt.o
+ .debug_info    0x000000000001d40d       0x22 out/startup/GCC/entry.o
+ .debug_info    0x000000000001d42f      0x595 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_common.o
+ .debug_info    0x000000000001d9c4     0x1bc0 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+ .debug_info    0x000000000001f584     0x267e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+ .debug_info    0x0000000000021c02     0x2650 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+ .debug_info    0x0000000000024252     0x13fa out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+ .debug_info    0x000000000002564c     0x150f out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+ .debug_info    0x0000000000026b5b      0x10f out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash.o
+ .debug_info    0x0000000000026c6a     0x4b60 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+ .debug_info    0x000000000002b7ca      0x1c0 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg.o
+ .debug_info    0x000000000002b98a     0x42e0 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+ .debug_info    0x000000000002fc6a     0x46a8 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+ .debug_info    0x0000000000034312      0xaa1 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg_ext.o
+ .debug_info    0x0000000000034db3     0x3e74 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+ .debug_info    0x0000000000038c27     0x1172 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+ .debug_info    0x0000000000039d99      0x360 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_gpio.o
+ .debug_info    0x000000000003a0f9     0x1276 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_udivdi3.o)
+ .debug_info    0x000000000003b36f     0x12d4 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_umoddi3.o)
+ .debug_info    0x000000000003c643      0xb9b /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clz.o)
+
+.debug_abbrev   0x0000000000000000     0x76b9
+ .debug_abbrev  0x0000000000000000      0x2f8 out/ChipTest/Eflash_Loader/eflash_loader.o
+ .debug_abbrev  0x00000000000002f8      0x568 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .debug_abbrev  0x0000000000000860      0x34d out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+ .debug_abbrev  0x0000000000000bad      0x391 out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+ .debug_abbrev  0x0000000000000f3e      0x2a0 out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+ .debug_abbrev  0x00000000000011de      0x425 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ .debug_abbrev  0x0000000000001603      0x10b out/ChipTest/Eflash_Loader/bflb_efuse.o
+ .debug_abbrev  0x000000000000170e      0x1e8 out/ChipTest/Eflash_Loader/bflb_set_clock.o
+ .debug_abbrev  0x00000000000018f6      0x329 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+ .debug_abbrev  0x0000000000001c1f      0x449 out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+ .debug_abbrev  0x0000000000002068      0x1cb out/ChipTest/Eflash_Loader/usb_if/usb_device.o
+ .debug_abbrev  0x0000000000002233      0x294 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+ .debug_abbrev  0x00000000000024c7      0x2cb out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+ .debug_abbrev  0x0000000000002792      0x36f out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+ .debug_abbrev  0x0000000000002b01      0x226 out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+ .debug_abbrev  0x0000000000002d27      0x2d3 out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+ .debug_abbrev  0x0000000000002ffa      0x2a0 out/BSP_Common/ring_buffer/ring_buffer.o
+ .debug_abbrev  0x000000000000329a       0xba out/BSP_Common/libc/memcpy.o
+ .debug_abbrev  0x0000000000003354       0x9d out/BSP_Common/libc/memset.o
+ .debug_abbrev  0x00000000000033f1      0x1f4 out/BSP_Common/libc/vsnprintf.o
+ .debug_abbrev  0x00000000000035e5       0x8c out/BSP_Common/libc/strlen.o
+ .debug_abbrev  0x0000000000003671      0x1ac out/BSP_Common/cipher_suite/bflb_hash.o
+ .debug_abbrev  0x000000000000381d      0x326 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .debug_abbrev  0x0000000000003b43      0x293 out/BSP_Common/usbd_core.o
+ .debug_abbrev  0x0000000000003dd6      0x397 out/BSP_Common/usbd_ctlreq.o
+ .debug_abbrev  0x000000000000416d      0x16d out/BSP_Common/usbd_ioreq.o
+ .debug_abbrev  0x00000000000042da      0x1c9 out/startup/system_bl702.o
+ .debug_abbrev  0x00000000000044a3       0x94 out/startup/GCC/start_load.o
+ .debug_abbrev  0x0000000000004537      0x130 out/startup/interrupt.o
+ .debug_abbrev  0x0000000000004667       0x12 out/startup/GCC/entry.o
+ .debug_abbrev  0x0000000000004679      0x191 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_common.o
+ .debug_abbrev  0x000000000000480a      0x30d out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+ .debug_abbrev  0x0000000000004b17      0x2af out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+ .debug_abbrev  0x0000000000004dc6      0x392 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+ .debug_abbrev  0x0000000000005158      0x335 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+ .debug_abbrev  0x000000000000548d      0x2ba out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+ .debug_abbrev  0x0000000000005747       0xa8 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash.o
+ .debug_abbrev  0x00000000000057ef      0x4a8 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+ .debug_abbrev  0x0000000000005c97      0x106 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg.o
+ .debug_abbrev  0x0000000000005d9d      0x3f8 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+ .debug_abbrev  0x0000000000006195      0x4a3 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+ .debug_abbrev  0x0000000000006638      0x1c9 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg_ext.o
+ .debug_abbrev  0x0000000000006801      0x2b4 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+ .debug_abbrev  0x0000000000006ab5      0x33c out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+ .debug_abbrev  0x0000000000006df1      0x111 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_gpio.o
+ .debug_abbrev  0x0000000000006f02      0x2d5 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_udivdi3.o)
+ .debug_abbrev  0x00000000000071d7      0x2f1 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_umoddi3.o)
+ .debug_abbrev  0x00000000000074c8      0x1f1 /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clz.o)
+
+.debug_loc      0x0000000000000000    0x2203c
+ .debug_loc     0x0000000000000000       0x7e out/ChipTest/Eflash_Loader/eflash_loader.o
+ .debug_loc     0x000000000000007e     0x164a out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .debug_loc     0x00000000000016c8      0x28a out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+ .debug_loc     0x0000000000001952      0x5ef out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+ .debug_loc     0x0000000000001f41      0x1f8 out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+ .debug_loc     0x0000000000002139      0x387 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ .debug_loc     0x00000000000024c0      0x151 out/ChipTest/Eflash_Loader/bflb_efuse.o
+ .debug_loc     0x0000000000002611       0x63 out/ChipTest/Eflash_Loader/bflb_set_clock.o
+ .debug_loc     0x0000000000002674      0x687 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+ .debug_loc     0x0000000000002cfb      0x5ae out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+ .debug_loc     0x00000000000032a9      0x62a out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+ .debug_loc     0x00000000000038d3      0x347 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+ .debug_loc     0x0000000000003c1a      0xe18 out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+ .debug_loc     0x0000000000004a32      0x2b0 out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+ .debug_loc     0x0000000000004ce2      0x325 out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+ .debug_loc     0x0000000000005007      0xa81 out/BSP_Common/ring_buffer/ring_buffer.o
+ .debug_loc     0x0000000000005a88       0x6f out/BSP_Common/libc/memcpy.o
+ .debug_loc     0x0000000000005af7       0x9a out/BSP_Common/libc/memset.o
+ .debug_loc     0x0000000000005b91     0x183c out/BSP_Common/libc/vsnprintf.o
+ .debug_loc     0x00000000000073cd       0x71 out/BSP_Common/libc/strlen.o
+ .debug_loc     0x000000000000743e      0x287 out/BSP_Common/cipher_suite/bflb_hash.o
+ .debug_loc     0x00000000000076c5      0xb4a out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .debug_loc     0x000000000000820f      0x870 out/BSP_Common/usbd_core.o
+ .debug_loc     0x0000000000008a7f      0xb42 out/BSP_Common/usbd_ctlreq.o
+ .debug_loc     0x00000000000095c1      0x23c out/BSP_Common/usbd_ioreq.o
+ .debug_loc     0x00000000000097fd       0x49 out/startup/system_bl702.o
+ .debug_loc     0x0000000000009846       0x73 out/startup/GCC/start_load.o
+ .debug_loc     0x00000000000098b9      0x122 out/startup/interrupt.o
+ .debug_loc     0x00000000000099db      0x2e5 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_common.o
+ .debug_loc     0x0000000000009cc0     0x248f out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+ .debug_loc     0x000000000000c14f     0x2aa5 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+ .debug_loc     0x000000000000ebf4     0x1a8b out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+ .debug_loc     0x000000000001067f      0xb0b out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
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+                0x00000000000001cc       0x2e out/ChipTest/Eflash_Loader/usb_if/usb_device.o
+ .riscv.attributes
+                0x00000000000001fa       0x2e out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+ .riscv.attributes
+                0x0000000000000228       0x2e out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+ .riscv.attributes
+                0x0000000000000256       0x2e out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+ .riscv.attributes
+                0x0000000000000284       0x2e out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+ .riscv.attributes
+                0x00000000000002b2       0x2e out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+ .riscv.attributes
+                0x00000000000002e0       0x2e out/BSP_Common/ring_buffer/ring_buffer.o
+ .riscv.attributes
+                0x000000000000030e       0x2e out/BSP_Common/libc/memcpy.o
+ .riscv.attributes
+                0x000000000000033c       0x2e out/BSP_Common/libc/memset.o
+ .riscv.attributes
+                0x000000000000036a       0x2e out/BSP_Common/libc/vsnprintf.o
+ .riscv.attributes
+                0x0000000000000398       0x2e out/BSP_Common/libc/strlen.o
+ .riscv.attributes
+                0x00000000000003c6       0x2e out/BSP_Common/cipher_suite/bflb_hash.o
+ .riscv.attributes
+                0x00000000000003f4       0x2e out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .riscv.attributes
+                0x0000000000000422       0x2e out/BSP_Common/usbd_core.o
+ .riscv.attributes
+                0x0000000000000450       0x2e out/BSP_Common/usbd_ctlreq.o
+ .riscv.attributes
+                0x000000000000047e       0x2e out/BSP_Common/usbd_ioreq.o
+ .riscv.attributes
+                0x00000000000004ac       0x2e out/startup/system_bl702.o
+ .riscv.attributes
+                0x00000000000004da       0x2e out/startup/GCC/start_load.o
+ .riscv.attributes
+                0x0000000000000508       0x2e out/startup/interrupt.o
+ .riscv.attributes
+                0x0000000000000536       0x2e out/startup/GCC/entry.o
+ .riscv.attributes
+                0x0000000000000564       0x2e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_common.o
+ .riscv.attributes
+                0x0000000000000592       0x2e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+ .riscv.attributes
+                0x00000000000005c0       0x2e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+ .riscv.attributes
+                0x00000000000005ee       0x2e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+ .riscv.attributes
+                0x000000000000061c       0x2e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+ .riscv.attributes
+                0x000000000000064a       0x2e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+ .riscv.attributes
+                0x0000000000000678       0x2e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash.o
+ .riscv.attributes
+                0x00000000000006a6       0x2e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+ .riscv.attributes
+                0x00000000000006d4       0x2e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg.o
+ .riscv.attributes
+                0x0000000000000702       0x2e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+ .riscv.attributes
+                0x0000000000000730       0x2e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+ .riscv.attributes
+                0x000000000000075e       0x2e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg_ext.o
+ .riscv.attributes
+                0x000000000000078c       0x2e out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+ .riscv.attributes
+                0x00000000000007ba       0x2e out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+ .riscv.attributes
+                0x00000000000007e8       0x2e out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_gpio.o
+ .riscv.attributes
+                0x0000000000000816       0x2e /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_udivdi3.o)
+ .riscv.attributes
+                0x0000000000000844       0x2e /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_umoddi3.o)
+ .riscv.attributes
+                0x0000000000000872       0x2e /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clz.o)
+
+.debug_frame    0x0000000000000000     0x599c
+ .debug_frame   0x0000000000000000       0x58 out/ChipTest/Eflash_Loader/eflash_loader.o
+ .debug_frame   0x0000000000000058      0x47c out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ .debug_frame   0x00000000000004d4      0x100 out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+ .debug_frame   0x00000000000005d4       0xf0 out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+ .debug_frame   0x00000000000006c4       0xdc out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+ .debug_frame   0x00000000000007a0      0x1a0 out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+ .debug_frame   0x0000000000000940       0x64 out/ChipTest/Eflash_Loader/bflb_efuse.o
+ .debug_frame   0x00000000000009a4       0x60 out/ChipTest/Eflash_Loader/bflb_set_clock.o
+ .debug_frame   0x0000000000000a04      0x2d8 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+ .debug_frame   0x0000000000000cdc      0x1ec out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+ .debug_frame   0x0000000000000ec8       0x50 out/ChipTest/Eflash_Loader/usb_if/usb_device.o
+ .debug_frame   0x0000000000000f18      0x1e4 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+ .debug_frame   0x00000000000010fc       0xf0 out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+ .debug_frame   0x00000000000011ec      0x338 out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+ .debug_frame   0x0000000000001524       0xe4 out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+ .debug_frame   0x0000000000001608      0x1a0 out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+ .debug_frame   0x00000000000017a8      0x2cc out/BSP_Common/ring_buffer/ring_buffer.o
+ .debug_frame   0x0000000000001a74       0x20 out/BSP_Common/libc/memcpy.o
+ .debug_frame   0x0000000000001a94       0x20 out/BSP_Common/libc/memset.o
+ .debug_frame   0x0000000000001ab4       0x60 out/BSP_Common/libc/vsnprintf.o
+ .debug_frame   0x0000000000001b14       0x20 out/BSP_Common/libc/strlen.o
+ .debug_frame   0x0000000000001b34       0xd0 out/BSP_Common/cipher_suite/bflb_hash.o
+ .debug_frame   0x0000000000001c04      0x278 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+ .debug_frame   0x0000000000001e7c      0x274 out/BSP_Common/usbd_core.o
+ .debug_frame   0x00000000000020f0       0xfc out/BSP_Common/usbd_ctlreq.o
+ .debug_frame   0x00000000000021ec       0xd4 out/BSP_Common/usbd_ioreq.o
+ .debug_frame   0x00000000000022c0       0x68 out/startup/system_bl702.o
+ .debug_frame   0x0000000000002328       0x20 out/startup/GCC/start_load.o
+ .debug_frame   0x0000000000002348      0x1e8 out/startup/interrupt.o
+ .debug_frame   0x0000000000002530       0x98 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_common.o
+ .debug_frame   0x00000000000025c8      0x6ec out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+ .debug_frame   0x0000000000002cb4      0x5f4 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+ .debug_frame   0x00000000000032a8      0x51c out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+ .debug_frame   0x00000000000037c4      0x1d0 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+ .debug_frame   0x0000000000003994      0x2a0 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+ .debug_frame   0x0000000000003c34       0x44 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash.o
+ .debug_frame   0x0000000000003c78      0x61c out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+ .debug_frame   0x0000000000004294       0x58 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg.o
+ .debug_frame   0x00000000000042ec      0x424 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+ .debug_frame   0x0000000000004710      0x3f4 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+ .debug_frame   0x0000000000004b04       0xb0 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg_ext.o
+ .debug_frame   0x0000000000004bb4      0xa30 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+ .debug_frame   0x00000000000055e4      0x370 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+ .debug_frame   0x0000000000005954       0x48 out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_gpio.o
+
+Cross Reference Table
+
+Symbol                                            File
+ADC_Channel_Config                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_Disable                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_Enable                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_FIFO_Cfg                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_FIFO_Is_Empty                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_FIFO_Is_Full                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_Gain_Trim                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_GetIntStatus                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_Get_FIFO_Count                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_Init                                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_IntClr                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_IntMask                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_Int_Callback_Install                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_MIC_Bias_Disable                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_MIC_Bias_Enable                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_Mic_Init                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_Parse_Result                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_Read_FIFO                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_Reset                                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_SET_TSVBE_HIGH                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_SET_TSVBE_LOW                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_Scan_Channel_Config                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_Start                                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_Stop                                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_Trim_TSEN                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_Tsen_Init                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_Vbat_Disable                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+ADC_Vbat_Enable                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+AON_ACOMP_Enable                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_acomp.o
+AON_ACOMP_Get_Result                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_acomp.o
+AON_ACOMP_Init                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_acomp.o
+AON_Get_Xtal_CapCode                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_aon.o
+AON_LowPower_Enter_PDS0                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_aon.o
+AON_LowPower_Exit_PDS0                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_aon.o
+AON_Power_Off_BG                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_aon.o
+AON_Power_Off_LDO11_SOC                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_aon.o
+AON_Power_Off_LDO15_RF                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_aon.o
+AON_Power_Off_MBG                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+AON_Power_Off_SFReg                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_aon.o
+AON_Power_Off_XTAL                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+AON_Power_On_BG                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_aon.o
+AON_Power_On_LDO11_SOC                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_aon.o
+AON_Power_On_LDO15_RF                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_aon.o
+AON_Power_On_MBG                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+AON_Power_On_SFReg                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_aon.o
+AON_Power_On_XTAL                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+AON_Set_LDO11_SOC_Sstart_Delay                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_aon.o
+AON_Set_Xtal_CapCode                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+ARCH_MemCpy_Fast                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Common/partition/partition.o
+                                                  out/BSP_Common/ring_buffer/ring_buffer.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ASM_Delay_Us                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+BFLB_Soft_CRC16                                   out/BSP_Common/soft_crc/softcrc.o
+BFLB_Soft_CRC32                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg_ext.o
+                                                  out/BSP_Common/partition/partition.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+BFLB_Soft_CRC32_Table                             out/BSP_Common/soft_crc/softcrc.o
+BL702_Delay_MS                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_l1c.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+BL702_Delay_US                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c_gpio_sim.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sflash_ext.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_aon.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+BL702_MemCmp                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg_ext.o
+BL702_MemCpy                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+BL702_MemCpy4                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+BL702_MemCpy_Fast                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg_ext.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nf_cfg.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+BL702_MemSet                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+BL702_MemSet4                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sflash_ext.o
+BLE_IRQHandler_Wrapper                            out/startup/interrupt.o
+BLSP_Boot2_Get_Log_Disable_Flag                   out/ChipTest/Eflash_Loader/eflash_loader.o
+BMX_ERR_INT_Callback_Install                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+BMX_ERR_IRQHandler                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+BMX_ERR_IRQHandler_Wrapper                        out/startup/interrupt.o
+BMX_TIMEOUT_INT_Callback_Install                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+BMX_TO_IRQHandler                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+BMX_TO_IRQHandler_Wrapper                         out/startup/interrupt.o
+BOR_IRQHandler_Wrapper                            out/startup/interrupt.o
+BZ_PHY_IRQHandler_Wrapper                         out/startup/interrupt.o
+CAM_Clock_Gate                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+CAM_Deinit                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+CAM_Disable                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+CAM_Enable                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+CAM_Get_Frame_Count_0                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+CAM_Get_Frame_Count_1                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+CAM_Hsync_Crop                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+CAM_IRQHandler                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+CAM_IRQHandler_Wrapper                            out/startup/interrupt.o
+CAM_Init                                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+CAM_IntClr                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+CAM_IntMask                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+CAM_Int_Callback_Install                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+CAM_Interleave_Get_Frame_Info                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+CAM_Interleave_Pop_Frame                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+CAM_Planar_Get_Frame_Info                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+CAM_Planar_Pop_Frame                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+CAM_Set_Hsync_Total_Count                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+CAM_Set_Vsync_Total_Count                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+CAM_Vsync_Crop                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+CDC_Transmit_FS                                   out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+Clock_Peripheral_Clock_Get                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_clock.o
+Clock_Peripheral_Clock_Set                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_clock.o
+Clock_System_Clock_Get                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_clock.o
+Clock_System_Clock_Set                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_clock.o
+DMA_ALL_IRQHandler                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_ALL_IRQHandler_Wrapper                        out/startup/interrupt.o
+DMA_BMX_ERR_IRQHandler_Wrapper                    out/startup/interrupt.o
+DMA_Channel_Disable                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_Channel_Enable                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_Channel_Init                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_Channel_Is_Busy                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_Channel_TranferSize                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_Channel_Update_DstMemcfg                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_Channel_Update_SrcMemcfg                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_Disable                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_Enable                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_IntMask                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_Int_Callback_Install                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_LLI_Init                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_LLI_PpBuf_Append                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_LLI_PpBuf_Destroy                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_LLI_PpBuf_Remove_Completed_List               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_LLI_PpBuf_Start_New_Transmit                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_LLI_PpStruct_Init                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_LLI_PpStruct_Set_Transfer_Len                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_LLI_PpStruct_Start                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_LLI_PpStruct_Stop                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+DMA_LLI_Update                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+EFUSE_IRQHandler_Wrapper                          out/startup/interrupt.o
+EF_Ctrl_AutoLoad_Done                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Busy                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+                                                  out/ChipTest/Eflash_Loader/bflb_efuse.o
+EF_Ctrl_Clear                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+EF_Ctrl_Crc_Enable                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Crc_Is_Busy                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Crc_Result                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Crc_Set_Golden                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Get_Chip_PIDVID                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+EF_Ctrl_Get_Customer_PIDVID                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+EF_Ctrl_Get_Trim_Parity                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Is_All_Bits_Zero                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Is_CapCode_Empty                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Is_MAC_Address_Slot_Empty                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Is_PowerOffset_Slot_Empty                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Load_Efuse_R0                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+                                                  out/ChipTest/Eflash_Loader/bflb_efuse.o
+EF_Ctrl_Program_Direct_R0                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+                                                  out/ChipTest/Eflash_Loader/bflb_efuse.o
+EF_Ctrl_Read_ADC_Gain_Trim                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+EF_Ctrl_Read_AES_Key                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Read_Ana_Trim                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Read_CapCode_Opt                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Read_Chip_ID                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Read_Dbg_Pwd                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Read_Device_Info                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+EF_Ctrl_Read_Direct_R0                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+                                                  out/ChipTest/Eflash_Loader/bflb_efuse.o
+EF_Ctrl_Read_MAC_Address                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+EF_Ctrl_Read_MAC_Address_Opt                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Read_MAC_Address_Raw                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Read_PowerOffset_Opt                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Read_RC32K_Trim                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+EF_Ctrl_Read_RC32M_Trim                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+EF_Ctrl_Read_Secure_Boot                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Read_Secure_Cfg                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Read_Sw_Usage                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+EF_Ctrl_Read_TSEN_Trim                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+EF_Ctrl_Readlock_AES_Key                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Readlock_Dbg_Pwd                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Sw_AHB_Clk_0                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Write_AES_Key                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Write_Ana_Trim                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Write_CapCode_Opt                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Write_Dbg_Pwd                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Write_MAC_Address                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Write_MAC_Address_Opt                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Write_PowerOffset_Opt                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Write_Secure_Boot                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Write_Secure_Cfg                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Write_Sw_Usage                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Writelock_AES_Key                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Writelock_Dbg_Pwd                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Writelock_MAC_Address                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EF_Ctrl_Writelock_Sw_Usage                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ef_ctrl.o
+EMAC_ClrIntStatus                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_DMADescListInit                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_DMATxDescGet                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_DeInit                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_Disable                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_Disable_TX                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_Enable                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_Enable_TX                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_GetIntStatus                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_IRQHandler                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_IRQHandler_Wrapper                           out/startup/interrupt.o
+EMAC_Init                                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_IntMask                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_Int_Callback_Install                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_PhyInit                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_Phy_AutoNegotiate                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_Phy_Linkup                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_Phy_Read                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_Phy_Reset                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_Phy_Write                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_SetHash                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_StartTx                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+EMAC_TxPauseReq                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+FS_Desc                                           out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usb_device.o
+FreeRTOS_Interrupt_Handler                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_common.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+GLB_AHB_Slave1_Clock_Gate                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pwm.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2s.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+GLB_AHB_Slave1_Reset                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+GLB_BMX_Addr_Monitor_Disable                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_BMX_Addr_Monitor_Enable                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_BMX_BusErrResponse_Disable                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_BMX_BusErrResponse_Enable                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_BMX_Get_Err_Addr                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_BMX_Get_Status                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_BMX_Init                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_CCI_Use_IO_0_1_2_7                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_CCI_Use_Jtag_Pin                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_DAC_Init                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dac.o
+GLB_DAC_Set_ChanA_Config                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dac.o
+GLB_DAC_Set_ChanA_Value                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dac.o
+GLB_DAC_Set_ChanB_Config                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dac.o
+GLB_DAC_Set_ChanB_Value                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dac.o
+GLB_Deswap_Flash_Pin                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+GLB_Disable_DLL_All_Clks                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+GLB_Disable_DLL_Clk                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+GLB_Enable_DLL_All_Clks                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+GLB_Enable_DLL_Clk                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+GLB_GPIO_Func_Init                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_GPIO_Get_Fun                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+GLB_GPIO_INPUT_Disable                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+GLB_GPIO_INPUT_Enable                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+GLB_GPIO_INT0_Callback_Install                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_GPIO_INT0_Callback_Install2                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_GPIO_INT0_IRQHandler_Install                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_GPIO_Init                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_gpio.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg_ext.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c_gpio_sim.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+GLB_GPIO_Int2Clear                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_GPIO_Int2Mask                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_GPIO_IntClear                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_GPIO_IntMask                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_GPIO_OUTPUT_Disable                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_GPIO_OUTPUT_Enable                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+GLB_GPIO_Read                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c_gpio_sim.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+GLB_GPIO_Set_HZ                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_GPIO_Write                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c_gpio_sim.o
+GLB_GPIP_DAC_Init                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dac.o
+GLB_GPIP_DAC_Set_ChanA_Config                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dac.o
+GLB_GPIP_DAC_Set_ChanB_Config                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dac.o
+GLB_Get_BCLK_Div                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+GLB_Get_GPIO_Int2CtlMod                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Get_GPIO_Int2Status                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Get_GPIO_IntCtlMod                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Get_GPIO_IntStatus                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Get_HCLK_Div                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+GLB_Get_Root_CLK_Sel                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+GLB_Get_SRAM_PARM                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Get_SRAM_RET                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Get_SRAM_SLP                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_IR_LED_Driver_Disable                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_IR_LED_Driver_Enable                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_IR_LED_Driver_Ibias                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_IR_LED_Driver_Output_Disable                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_IR_LED_Driver_Output_Enable                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_IR_RX_GPIO_Sel                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Invert_ETH_REF_O_CLK                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Invert_ETH_RX_CLK                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Invert_ETH_TX_CLK                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Invert_RF_TEST_O_CLK                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_JTAG_Sig_Swap_Set                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Power_Off_DLL                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+GLB_Power_On_DLL                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+GLB_SWAP_EMAC_CAM_Pin                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_SW_CPU_Reset                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+GLB_SW_POR_Reset                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+GLB_SW_System_Reset                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+GLB_Select_External_Flash                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+GLB_Select_Internal_Flash                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+GLB_Select_Internal_PSram                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+GLB_Set_ADC_CLK                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_BLE_CLK                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_BT_Coex_Signal                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_CAM_CLK                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_Chip_Out_0_CLK_Sel                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_Chip_Out_1_CLK_Sel                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_DAC_CLK                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_DIG_32K_CLK                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_DIG_512K_CLK                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_DIG_CLK_Sel                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_DMA_CLK                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_EM_Sel                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+GLB_Set_ETH_REF_O_CLK_Sel                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_Ext_Rst_Smt                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_GPIO_Int2Mod                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_GPIO_IntMod                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_I2C_CLK                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+GLB_Set_I2S_CLK                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_IR_CLK                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+GLB_Set_Kys_Drv_Col                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_MAC154_ZIGBEE_CLK                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_MTimer_CLK                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+GLB_Set_PDM_CLK                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_PKA_CLK_Sel                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_QDEC_CLK                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_SF_CLK                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_set_clock.o
+GLB_Set_SPI_0_ACT_MOD_Sel                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+GLB_Set_SPI_CLK                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+GLB_Set_SRAM_PARM                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_SRAM_RET                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_SRAM_SLP                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_Set_System_CLK                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+                                                  out/ChipTest/Eflash_Loader/bflb_set_clock.o
+GLB_Set_System_CLK_Div                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+GLB_Set_UART_CLK                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+GLB_Set_USB_CLK                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+GLB_Swap_Flash_CS_IO2_Pin                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+GLB_Swap_Flash_IO0_IO3_Pin                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+GLB_Swap_Flash_Pin                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+GLB_Swap_SPI_0_MOSI_With_MISO                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GLB_UART_Fun_Sel                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_gpio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+GLB_UART_Sig_Swap_Set                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_gpio.o
+GPADC_DMA_IRQHandler                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+GPADC_DMA_IRQHandler_Wrapper                      out/startup/interrupt.o
+GPIO_INT0_IRQHandler                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+GPIO_INT0_IRQHandler_Wrapper                      out/startup/interrupt.o
+GPIP_DAC_ChanA_Disable                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dac.o
+GPIP_DAC_ChanA_Enable                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dac.o
+GPIP_DAC_ChanB_Disable                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dac.o
+GPIP_DAC_ChanB_Enable                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dac.o
+GPIP_DAC_DMA_WriteData                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dac.o
+GPIP_Set_DAC_ChanA_SRC_SEL                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dac.o
+GPIP_Set_DAC_ChanB_SRC_SEL                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dac.o
+GPIP_Set_DAC_DMA_TX_Disable                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dac.o
+GPIP_Set_DAC_DMA_TX_Enable                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dac.o
+GPIP_Set_DAC_DMA_TX_FORMAT_SEL                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dac.o
+HAL_PCDEx_PMAConfig                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_ActivateRemoteWakeup                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+HAL_PCD_ConnectCallback                           out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_DataInStageCallback                       out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+HAL_PCD_DataOutStageCallback                      out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+HAL_PCD_DeActivateRemoteWakeup                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+HAL_PCD_DeInit                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_DevConnect                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+HAL_PCD_DevDisconnect                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+HAL_PCD_DisconnectCallback                        out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_EP_Close                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_EP_ClrStall                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_EP_Flush                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_EP_GetRxCount                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_EP_Open                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_EP_Receive                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_EP_SetStall                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_EP_Transmit                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_GetState                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+HAL_PCD_IRQHandler                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+HAL_PCD_ISOINIncompleteCallback                   out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_ISOOUTIncompleteCallback                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_Init                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_MspDeInit                                 out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_MspInit                                   out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+HAL_PCD_ResetCallback                             out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+HAL_PCD_ResumeCallback                            out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_SOFCallback                               out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+HAL_PCD_SetAddress                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_SetupStageCallback                        out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+HAL_PCD_Start                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_Stop                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HAL_PCD_SuspendCallback                           out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+HBN_32K_Sel                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Aon_Pad_IeSmt_Cfg                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_App_Reset                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Clear_IRQ                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Clear_RTC_Counter                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Clear_RTC_INT                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Clear_Reset_Event                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Disable                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Disable_AComp0_IRQ                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Disable_AComp1_IRQ                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Disable_BOR_IRQ                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Enable                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Enable_AComp0_IRQ                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Enable_AComp1_IRQ                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Enable_BOR_IRQ                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Enable_Ext                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Enable_RTC_Counter                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_GPIO_Dbg_Pull_Cfg                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+HBN_GPIO_INT_Disable                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_GPIO_INT_Enable                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Get_BOR_OUT_State                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Get_INT_State                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Get_PIR_Interval                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Get_PIR_Threshold                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Get_Pin_Wakeup_Mode                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Get_RTC_Timer_Val                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Get_Reset_Event                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Get_Status_Flag                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+HBN_Get_Wakeup_Addr                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Hw_Pu_Pd_Cfg                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Mode_Enter                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_OUT0_IRQHandler                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_OUT0_IRQHandler_Wrapper                       out/startup/interrupt.o
+HBN_OUT1_IRQHandler                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_OUT1_IRQHandler_Wrapper                       out/startup/interrupt.o
+HBN_Out0_Callback_Install                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Out0_IRQHandler_Install                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Out1_Callback_Install                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Out1_IRQHandler_Install                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_PIR_Disable                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_PIR_Enable                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_PIR_HPF_Sel                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_PIR_INT_Config                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_PIR_LPF_Sel                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Pin_WakeUp_Mask                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Power_Down_Flash                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Power_Off_RC32K                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Power_Off_Xtal_32K                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Power_On_RC32K                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Power_On_Xtal_32K                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Reset                                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Set_BOR_Cfg                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+                                                  out/startup/system_bl702.o
+HBN_Set_BOR_Config                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Set_HRAM_Ret                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Set_HRAM_slp                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Set_Ldo11_All_Vout                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Set_Ldo11_Aon_Vout                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Set_Ldo11_Rt_Vout                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Set_Ldo11_Soc_Vout                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Set_Ldo11rt_Drive_Strength                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Set_PIR_Interval                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Set_PIR_Threshold                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Set_Pad_23_28_ActiveIE                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Set_Pad_23_28_Pulldown                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Set_Pad_23_28_Pullnone                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+HBN_Set_Pad_23_28_Pullup                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Set_ROOT_CLK_Sel                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+HBN_Set_RTC_Timer                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Set_Status_Flag                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+HBN_Set_UART_CLK_Sel                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+HBN_Set_Wakeup_Addr                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+HBN_Set_XCLK_CLK_Sel                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+HBN_Trim_RC32K                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+I2C_ClockSet                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+I2C_Disable                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+I2C_Enable                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+I2C_GPIO_Sim_Init                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c_gpio_sim.o
+I2C_GetAck                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c_gpio_sim.o
+I2C_IRQHandler                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+I2C_IRQHandler_Wrapper                            out/startup/interrupt.o
+I2C_Init                                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+I2C_IntMask                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+I2C_Int_Callback_Install                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+I2C_IsBusy                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+I2C_MasterReceiveBlocking                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+I2C_MasterSendBlocking                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+I2C_ReadByte                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c_gpio_sim.o
+I2C_RecieveWord                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+I2C_Reset                                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+I2C_SendByte                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c_gpio_sim.o
+I2C_SendWord                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+I2C_SetPrd                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+I2C_SetSclSync                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+I2C_Start                                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c_gpio_sim.o
+I2C_Stop                                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c_gpio_sim.o
+I2C_TransferEndStatus                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+I2S_Disable                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2s.o
+I2S_Enable                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2s.o
+I2S_FifoConfig                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2s.o
+I2S_Flush                                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2s.o
+I2S_GetRxFIFO_AvlCnt                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2s.o
+I2S_GetTxFIFO_AvlCnt                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2s.o
+I2S_IOConfig                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2s.o
+I2S_IRQHandler_Wrapper                            out/startup/interrupt.o
+I2S_Init                                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2s.o
+I2S_Mute                                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2s.o
+I2S_Read                                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2s.o
+I2S_SetBclkPeriod                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2s.o
+I2S_SetFifoJustified                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2s.o
+I2S_Write                                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2s.o
+IRRX_IRQHandler                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IRRX_IRQHandler_Wrapper                           out/startup/interrupt.o
+IRTX_IRQHandler                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IRTX_IRQHandler_Wrapper                           out/startup/interrupt.o
+IR_ClrIntStatus                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_DeInit                                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_Disable                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_Enable                                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_GetIntStatus                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_GetRxDataBitCount                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_GetRxFIFOCount                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_GetRxFIFOStatus                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_IntMask                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_Int_Callback_Install                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_LEDInit                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_LEDSend                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_LearnToInit                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_LearnToReceive                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_LearnToSend                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_ReceiveData                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_ReceiveNEC                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_RxFIFOClear                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_RxInit                                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_SWMReceiveData                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_SWMSendCommand                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_SWMSendData                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_SendCommand                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_SendData                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_SendNEC                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_TxInit                                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_TxPulseWidthConfig                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_TxSWM                                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+IR_TxSWMPulseWidthConfig                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+Interrupt_Handler                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_common.o
+                                                  out/startup/interrupt.o
+Interrupt_Handler_Register                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_common.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pwm.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_cam.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_qdec.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_emac.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_kys.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_ir.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_l1c.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+                                                  out/startup/system_bl702.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+Interrupt_Handler_Stub                            out/startup/interrupt.o
+KYS_Disable                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_kys.o
+KYS_Enable                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_kys.o
+KYS_GetIntStatus                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_kys.o
+KYS_GetKeycode                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_kys.o
+KYS_IRQHandler                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_kys.o
+KYS_IRQHandler_Wrapper                            out/startup/interrupt.o
+KYS_Init                                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_kys.o
+KYS_IntClear                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_kys.o
+KYS_IntMask                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_kys.o
+KYS_Int_Callback_Install                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_kys.o
+L1C_BMX_Addr_Monitor_Disable                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_l1c.o
+L1C_BMX_Addr_Monitor_Enable                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_l1c.o
+L1C_BMX_BusErrResponse_Disable                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_l1c.o
+L1C_BMX_BusErrResponse_Enable                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_l1c.o
+L1C_BMX_ERR_INT_Callback_Install                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_l1c.o
+L1C_BMX_ERR_IRQHandler                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_l1c.o
+L1C_BMX_ERR_IRQHandler_Wrapper                    out/startup/interrupt.o
+L1C_BMX_Get_Err_Addr                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_l1c.o
+L1C_BMX_Get_Status                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_l1c.o
+L1C_BMX_Init                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_l1c.o
+L1C_BMX_TIMEOUT_INT_Callback_Install              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_l1c.o
+L1C_BMX_TO_IRQHandler                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_l1c.o
+L1C_BMX_TO_IRQHandler_Wrapper                     out/startup/interrupt.o
+L1C_Cache_Enable_Set                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+L1C_Cache_Flush                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+L1C_Cache_Hit_Count_Get                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+L1C_Cache_Miss_Count_Get                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+L1C_Cache_Read_Disable                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+L1C_Cache_Write_Set                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+L1C_IROM_2T_Access_Set                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+L1C_Set_Way_Disable                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+L1C_Set_Wrap                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+M154_AES_IRQHandler_Wrapper                       out/startup/interrupt.o
+M154_IRQHandler_Wrapper                           out/startup/interrupt.o
+M154_REQ_ENH_ACK_IRQHandler_Wrapper               out/startup/interrupt.o
+MAC_GEN_IRQHandler_Wrapper                        out/startup/interrupt.o
+MAC_PORT_TRG_IRQHandler_Wrapper                   out/startup/interrupt.o
+MAC_RX_TRG_IRQHandler_Wrapper                     out/startup/interrupt.o
+MAC_TXRX_MISC_IRQHandler_Wrapper                  out/startup/interrupt.o
+MAC_TXRX_TIMER_IRQHandler_Wrapper                 out/startup/interrupt.o
+MAC_TX_TRG_IRQHandler_Wrapper                     out/startup/interrupt.o
+MJPEG_Block_Is_Full                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_Current_Block_Clear                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_Current_Block_Is_End                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_Current_Block_Is_Start                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_Deinit                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_Disable                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_Enable                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_Get_Current_Block                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_Get_Frame_Count                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_Get_Frame_Info                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_Get_Remain_Bit                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_IRQHandler                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_IRQHandler_Wrapper                          out/startup/interrupt.o
+MJPEG_Init                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_IntClr                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_IntMask                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_Int_Callback_Install                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_Packet_Config                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_Pop_Frame                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_SW_Enable                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_SW_Run                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_Set_Frame_Threshold                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_Set_YUYV_Order_Interleave                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+MJPEG_Set_YUYV_Order_Planar                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_mjpeg.o
+NF_Cfg_Flash_Identify                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nf_cfg.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+NFlash_Blk128_Erase                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+NFlash_Check_Bad_Block                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+NFlash_Erase                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+NFlash_GetJedecId                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nf_cfg.o
+NFlash_Get_Feature                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+NFlash_Page_Read_To_Cache                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+NFlash_Program                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+NFlash_Program_Execute                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+NFlash_Program_Load                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+NFlash_Read                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+NFlash_Read_From_Cache                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+NFlash_Set_Feature                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+NFlash_Write_Enable                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+Nandflash_BlockErase                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_CS_High                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_CS_Low                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_CheckBadBlock                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_Check_ECC_Status                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_Clock_Init                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_Disk_Initialize                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_Disk_Ioctl                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_Disk_Read                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_Disk_Status                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_Disk_Write                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_Get_BlockLock                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_Get_Feature                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_Get_Status                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_Gpio_Init                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_Init                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_InternalDataMove                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_PageProgram                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_PageRead                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_PageReadToCache                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_PagesProgram                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_PagesRead                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_ProgramExecute                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_ProgramLoad                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_ProgramLoadRandomData                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_Psram_Cfg                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_ReadFromCache                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_ReadID                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_Reset                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_SPI_Init                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_SendRecv                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_Set_BlockLock                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_Set_Feature                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_Set_Status                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_Translate_Result_Code                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_WriteDisable                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_WriteEnable                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Nandflash_WriteUnprotect                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+PCD_EP_ISR_Handler                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+PCD_ReadPMA                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+PCD_WritePMA                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+PDS_App_Enable                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_Auto_Enable                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+PDS_Auto_Time_Config                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+PDS_Clear_Reset_Event                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_Default_Level_Config                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_Disable_PLL_All_Clks                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+PDS_Disable_PLL_Clk                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+PDS_Enable                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+PDS_Enable_PLL_All_Clks                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+PDS_Enable_PLL_Clk                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+PDS_Force_Config                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_Get_IntStatus                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_Get_PdsPllStstus                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_Get_PdsRfStstus                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_Get_PdsStstus                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_Get_Reset_Event                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_Get_Vddcore_GPIO_IntStatus                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_IntClear                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_IntEn                                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_IntMask                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_Int_Callback_Install                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_Manual_Force_Turn_Off                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+PDS_Manual_Force_Turn_On                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+PDS_Power_Off_PLL                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+PDS_Power_On_PLL                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+PDS_RAM_Config                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_Reset                                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+PDS_Select_RC32M_As_PLL_Ref                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+PDS_Select_XTAL_As_PLL_Ref                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+PDS_Set_Audio_PLL_Freq                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_Set_Pad_Config                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+PDS_Set_Vddcore_GPIO_IntCfg                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_Set_Vddcore_GPIO_IntClear                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_Set_Vddcore_GPIO_IntMask                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_Trim_RC32M                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+PDS_WAKEUP_IRQHandler                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_WAKEUP_IRQHandler_Install                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pds.o
+PDS_WAKEUP_IRQHandler_Wrapper                     out/startup/interrupt.o
+PWM_Channel_Disable                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pwm.o
+PWM_Channel_Enable                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pwm.o
+PWM_Channel_Fource_Output                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pwm.o
+PWM_Channel_Get                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pwm.o
+PWM_Channel_Init                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pwm.o
+PWM_Channel_Set_Div                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pwm.o
+PWM_Channel_Set_Period                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pwm.o
+PWM_Channel_Set_Threshold1                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pwm.o
+PWM_Channel_Set_Threshold2                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pwm.o
+PWM_Channel_Update                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pwm.o
+PWM_IRQHandler                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pwm.o
+PWM_IRQHandler_Wrapper                            out/startup/interrupt.o
+PWM_IntMask                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pwm.o
+PWM_Int_Callback_Install                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pwm.o
+PWM_SW_Force_Value                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pwm.o
+PWM_SW_Mode                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_pwm.o
+PllOnFlag                                         out/ChipTest/Eflash_Loader/eflash_loader.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+Psram_Cache_Write_Set                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Psram_EnterQuadMode                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+Psram_ExitQuadMode                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+Psram_Init                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_psram.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Psram_Read                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+Psram_ReadId                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Psram_ReadReg                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+Psram_SetBurstWrap                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_psram.o
+Psram_SetDriveStrength                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_psram.o
+Psram_Set_IDbus_Cfg                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+Psram_SoftwareReset                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+Psram_ToggleBurstLength                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+Psram_Write                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+Psram_WriteReg                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+PtTable_Create                                    out/BSP_Common/partition/partition.o
+PtTable_Flash_Erase                               out/BSP_Common/partition/partition.o
+PtTable_Flash_Read                                out/BSP_Common/partition/partition.o
+PtTable_Flash_Write                               out/BSP_Common/partition/partition.o
+PtTable_Get_Active_Entries_By_ID                  out/BSP_Common/partition/partition.o
+PtTable_Get_Active_Entries_By_Name                out/BSP_Common/partition/partition.o
+PtTable_Get_Active_Partition_Need_Lock            out/BSP_Common/partition/partition.o
+PtTable_Set_Flash_Operation                       out/BSP_Common/partition/partition.o
+PtTable_Update_Entry                              out/BSP_Common/partition/partition.o
+QDEC0_IRQHandler                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_qdec.o
+QDEC0_IRQHandler_Wrapper                          out/startup/interrupt.o
+QDEC1_IRQHandler                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_qdec.o
+QDEC1_IRQHandler_Wrapper                          out/startup/interrupt.o
+QDEC2_IRQHandler                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_qdec.o
+QDEC2_IRQHandler_Wrapper                          out/startup/interrupt.o
+QDEC_Clr_Int_Status                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_qdec.o
+QDEC_DeInit                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_qdec.o
+QDEC_Disable                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_qdec.o
+QDEC_Enable                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_qdec.o
+QDEC_GetIntMask                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_qdec.o
+QDEC_Get_Err_Cnt                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_qdec.o
+QDEC_Get_Int_Status                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_qdec.o
+QDEC_Get_Sample_Direction                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_qdec.o
+QDEC_Get_Sample_Val                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_qdec.o
+QDEC_Init                                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_qdec.o
+QDEC_IntHandler                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_qdec.o
+QDEC_Int_Callback_Install                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_qdec.o
+QDEC_SetIntMask                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_qdec.o
+RF_TOP_INT0_IRQHandler_Wrapper                    out/startup/interrupt.o
+RF_TOP_INT1_IRQHandler_Wrapper                    out/startup/interrupt.o
+ReworkSetupCmd                                    out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+ReworkSetupInData                                 out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+ReworkSetupOutData                                out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+Ring_Buffer_Get_Empty_Length                      out/BSP_Common/ring_buffer/ring_buffer.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+Ring_Buffer_Get_Length                            out/BSP_Common/ring_buffer/ring_buffer.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+Ring_Buffer_Get_Status                            out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Init                                  out/BSP_Common/ring_buffer/ring_buffer.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+Ring_Buffer_Peek                                  out/BSP_Common/ring_buffer/ring_buffer.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+Ring_Buffer_Peek_Byte                             out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Read                                  out/BSP_Common/ring_buffer/ring_buffer.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+Ring_Buffer_Read_Byte                             out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Read_Callback                         out/BSP_Common/ring_buffer/ring_buffer.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+Ring_Buffer_Reset                                 out/BSP_Common/ring_buffer/ring_buffer.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+Ring_Buffer_Write                                 out/BSP_Common/ring_buffer/ring_buffer.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+Ring_Buffer_Write_Byte                            out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Write_Byte_Force                      out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Write_Callback                        out/BSP_Common/ring_buffer/ring_buffer.o
+Ring_Buffer_Write_Force                           out/BSP_Common/ring_buffer/ring_buffer.o
+SCCB_Init                                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c_gpio_sim.o
+SCCB_Read                                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c_gpio_sim.o
+SCCB_Write                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_i2c_gpio_sim.o
+SEC_AES_IRQHandler                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+SEC_AES_IRQHandler_Wrapper                        out/startup/interrupt.o
+SEC_BMX_ERR_IRQHandler_Wrapper                    out/startup/interrupt.o
+SEC_CDET_IRQHandler                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+SEC_CDET_IRQHandler_Wrapper                       out/startup/interrupt.o
+SEC_Eng_ClrIntStatus                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+SEC_Eng_GetIntStatus                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+SEC_Eng_IntMask                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+SEC_Eng_Int_Callback_Install                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+SEC_Eng_Turn_Off_Sec_Ring                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+SEC_Eng_Turn_On_Sec_Ring                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+SEC_GMAC_IRQHandler                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+SEC_GMAC_IRQHandler_Wrapper                       out/startup/interrupt.o
+SEC_PKA_IRQHandler                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+SEC_PKA_IRQHandler_Wrapper                        out/startup/interrupt.o
+SEC_SHA_IRQHandler                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+SEC_SHA_IRQHandler_Wrapper                        out/startup/interrupt.o
+SEC_TRNG_IRQHandler                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+SEC_TRNG_IRQHandler_Wrapper                       out/startup/interrupt.o
+SF_CTRL_IRQHandler_Wrapper                        out/startup/interrupt.o
+SF_Cfg_Deinit_Ext_Flash_Gpio                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+SF_Cfg_Flash_Identify                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg_ext.o
+SF_Cfg_Flash_Identify_Ext                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg_ext.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SF_Cfg_Get_Flash_Cfg_Need_Lock                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg_ext.o
+SF_Cfg_Get_Flash_Cfg_Need_Lock_Ext                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg_ext.o
+SF_Cfg_Init_Ext_Flash_Gpio                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg.o
+SF_Cfg_Init_Flash_Gpio                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nf_cfg.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+SF_Cfg_Init_Internal_Flash_Gpio                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg_ext.o
+SF_Ctrl_AES_Disable                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash.o
+SF_Ctrl_AES_Enable                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash.o
+SF_Ctrl_AES_Enable_BE                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SF_Ctrl_AES_Enable_LE                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SF_Ctrl_AES_Set_IV                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SF_Ctrl_AES_Set_IV_BE                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SF_Ctrl_AES_Set_Key                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SF_Ctrl_AES_Set_Key_BE                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SF_Ctrl_AES_Set_Region                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SF_Ctrl_Cmds_Set                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_psram.o
+SF_Ctrl_Disable                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SF_Ctrl_Enable                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SF_Ctrl_Flash_Read_Icache_Set                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SF_Ctrl_GetBusyState                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sflash_ext.o
+SF_Ctrl_Get_Clock_Delay                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SF_Ctrl_Get_Flash_Image_Offset                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SF_Ctrl_IRQHandler                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_ctrl.o
+SF_Ctrl_Is_AES_Enable                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash.o
+SF_Ctrl_Psram_Init                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_ctrl.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_psram.o
+SF_Ctrl_Psram_Read_Icache_Set                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SF_Ctrl_Psram_Write_Icache_Set                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SF_Ctrl_Select_Bank                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_ctrl.o
+SF_Ctrl_Select_Clock                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SF_Ctrl_Select_Pad                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_ctrl.o
+SF_Ctrl_SendCmd                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_nflash.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sflash_ext.o
+SF_Ctrl_Set_Clock_Delay                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SF_Ctrl_Set_Flash_Image_Offset                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SF_Ctrl_Set_Owner                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_ctrl.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Blk32_Erase                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SFlash_Blk64_Erase                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SFlash_Busy                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sflash_ext.o
+SFlash_Cache_Read_Disable                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SFlash_Cache_Read_Enable                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SFlash_Chip_Erase                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_DisableBurstWrap                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Erase                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_GetDeviceId                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SFlash_GetJedecId                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+SFlash_GetUniqueId                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SFlash_IDbus_Read_Enable                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SFlash_Init                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+SFlash_Powerdown                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+SFlash_Program                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Qspi_Enable                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+SFlash_Read                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Read_Reg                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Read_Reg_With_Cmd                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Releae_Powerdown                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Reset_Continue_Read                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Restore_From_Powerdown                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SFlash_Sector_Erase                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SFlash_SetBurstWrap                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_SetSPIMode                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SFlash_Set_IDbus_Cfg                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Software_Reset                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SFlash_Volatile_Reg_Write_Enable                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+SFlash_Write_Enable                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Write_Reg                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SFlash_Write_Reg_With_Cmd                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+SPI_ClockConfig                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+SPI_ClrIntStatus                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_ClrRxFifo                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_ClrTxFifo                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_DeInit                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_Disable                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+SPI_Enable                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+SPI_FifoConfig                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_GetBusyStatus                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_GetFifoStatus                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_GetIntStatus                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_GetRxFifoCount                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_GetTxFifoCount                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_IRQHandler                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_IRQHandler_Wrapper                            out/startup/interrupt.o
+SPI_Init                                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+SPI_IntMask                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+SPI_Int_Callback_Install                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_ReceiveData                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_Recv_16bits                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_Recv_24bits                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_Recv_32bits                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_Recv_8bits                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+SPI_RxIgnoreDisable                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_RxIgnoreEnable                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_SendData                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_SendRecv_16bits                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_SendRecv_24bits                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_SendRecv_32bits                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_SendRecv_8bits                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+SPI_Send_16bits                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_Send_24bits                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_Send_32bits                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_Send_8bits                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+SPI_SetClock                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_SetDeglitchCount                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+SPI_SetTimeOutValue                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_spi.o
+Sec_Dbg_Read_Chip_ID                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_dbg.o
+Sec_Dbg_Read_Dbg_Enable                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_dbg.o
+Sec_Dbg_Read_Dbg_Mode                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_dbg.o
+Sec_Dbg_Read_WiFi_MAC                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_dbg.o
+Sec_Eng_AES_Crypt                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_crypt.o
+Sec_Eng_AES_Disable_Link                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_AES_Enable_BE                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_crypt.o
+Sec_Eng_AES_Enable_LE                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_AES_Enable_Link                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_AES_Finish                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_crypt.o
+Sec_Eng_AES_Init                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_crypt.o
+Sec_Eng_AES_Link_Work                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_AES_Set_Counter_Byte                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_AES_Set_Hw_Key_Src                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_AES_Set_Key_IV                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_AES_Set_Key_IV_BE                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_crypt.o
+Sec_Eng_GMAC_Disable_Link                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_GMAC_Enable_BE                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_GMAC_Enable_LE                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_GMAC_Enable_Link                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_GMAC_Link_Work                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_PKA_BigEndian_Enable                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+Sec_Eng_PKA_CREG                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_Clear_Int                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_PKA_GF2Mont                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_GetStatus                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_PKA_LADD                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_LCMP                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_LDIV                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_PKA_LDIV2N                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_PKA_LMOD2N                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_PKA_LMUL                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_LMUL2N                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_PKA_LSQR                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+Sec_Eng_PKA_LSUB                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_PKA_LittleEndian_Enable                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_PKA_MADD                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_PKA_MEXP                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+Sec_Eng_PKA_MINV                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_MMUL                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_MREM                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_MSQR                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_PKA_MSUB                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_Mont2GF                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_Move_Data                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_NREG                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_PKA_RESIZE                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_PKA_Read_Block                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_PKA_Read_Data                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_Reset                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+Sec_Eng_PKA_Write_Block                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_PKA_Write_Data                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_dsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_PKA_Write_Immediate                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_SHA256_Finish                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_hash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+Sec_Eng_SHA256_Init                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_hash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+Sec_Eng_SHA256_Link_Finish                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_SHA256_Link_Init                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_SHA256_Link_Update                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_SHA256_Update                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_hash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+Sec_Eng_SHA_Disable_Link                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_SHA_Enable_Link                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_SHA_Start                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Common/cipher_suite/bflb_hash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+Sec_Eng_Trng_Disable                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+Sec_Eng_Trng_Enable                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+Sec_Eng_Trng_Int_Disable                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_Trng_Int_Enable                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_Trng_Int_Read                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_Trng_Int_Read_Trigger                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+Sec_Eng_Trng_Read                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sec_eng.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+ShaInbuf                                          out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+StressTestItem                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+SystemClock_Config                                out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+SystemInit                                        out/startup/system_bl702.o
+                                                  out/startup/GCC/entry.o
+System_Core_Clock_Update_From_RC32M               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+System_NVIC_SetPriority                           out/startup/system_bl702.o
+TIMER_CH0_IRQHandler                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+TIMER_CH0_IRQHandler_Wrapper                      out/startup/interrupt.o
+TIMER_CH1_IRQHandler                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+TIMER_CH1_IRQHandler_Wrapper                      out/startup/interrupt.o
+TIMER_ClearIntStatus                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+TIMER_Disable                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+TIMER_Enable                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+TIMER_GetCompValue                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+TIMER_GetCounterValue                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+TIMER_GetMatchStatus                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+TIMER_GetPreloadValue                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+TIMER_Init                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+TIMER_IntMask                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+TIMER_SetCompValue                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+TIMER_SetCountMode                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+TIMER_SetPreloadTrigSrc                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+TIMER_SetPreloadValue                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+TIMER_WDT_IRQHandler                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+TIMER_WDT_IRQHandler_Wrapper                      out/startup/interrupt.o
+TOUCH_IRQHandler_Wrapper                          out/startup/interrupt.o
+TSEN_Get_Temp                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+TSEN_Get_V_Error                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+Timer_Int_Callback_Install                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+Trap_Handler                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_common.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+                                                  out/startup/interrupt.o
+Trap_Handler_Stub                                 out/startup/interrupt.o
+UART0_IRQHandler                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+UART0_IRQHandler_Wrapper                          out/startup/interrupt.o
+UART1_IRQHandler                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+UART1_IRQHandler_Wrapper                          out/startup/interrupt.o
+UART_AutoBaudDetection                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_ClrRtsValue                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+UART_ClrTxValue                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+UART_DeInit                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+UART_Disable                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_Enable                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_FifoConfig                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_GetAutoBaudCount                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_GetIntStatus                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_GetOverflowStatus                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+UART_GetRxBusBusyStatus                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+UART_GetRxFifoCount                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+UART_GetTxBusBusyStatus                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_GetTxFifoCount                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+UART_Init                                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_IntClear                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_IntMask                                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_Int_Callback_Install                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_IrConfig                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+UART_Params_init                                  out/HAL/hal_uart.o
+UART_ReceiveData                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_RxFifoClear                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+UART_SendData                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_SendDataBlock                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+UART_SetBaudrate                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+UART_SetDeglitchCount                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+UART_SetRtsValue                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+UART_SetRxDataLength                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+UART_SetRxTimeoutValue                            out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_SetTxDataLength                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+UART_SetTxValue                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+UART_TxFifoClear                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+UART_TxFreeRun                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_uart.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+UART_close                                        out/HAL/hal_uart.o
+UART_config                                       out/HAL/hal_uart.o
+UART_control                                      out/HAL/hal_uart.o
+UART_count                                        out/HAL/hal_uart.o
+UART_defaultParams                                out/HAL/hal_uart.o
+UART_getDMAAddr                                   out/HAL/hal_uart.o
+UART_getDMARxReq                                  out/HAL/hal_uart.o
+UART_getDMATxReq                                  out/HAL/hal_uart.o
+UART_init                                         out/HAL/hal_uart.o
+UART_open                                         out/HAL/hal_uart.o
+UART_read                                         out/HAL/hal_uart.o
+UART_readCancel                                   out/HAL/hal_uart.o
+UART_rxFifoDump                                   out/HAL/hal_uart.o
+UART_write                                        out/HAL/hal_uart.o
+UART_writeCancel                                  out/HAL/hal_uart.o
+USBD_CDC                                          out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usb_device.o
+USBD_CDC_CfgFSDesc                                out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+USBD_CDC_CfgHSDesc                                out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+USBD_CDC_GetDeviceQualifierDescriptor             out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+USBD_CDC_OtherSpeedCfgDesc                        out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+USBD_CDC_ReceivePacket                            out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+USBD_CDC_RegisterInterface                        out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usb_device.o
+USBD_CDC_SetRxBuffer                              out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+USBD_CDC_SetTxBuffer                              out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+USBD_CDC_TransmitPacket                           out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+USBD_ClrClassConfig                               out/BSP_Common/usbd_core.o
+                                                  out/BSP_Common/usbd_ctlreq.o
+USBD_CtlContinueRx                                out/BSP_Common/usbd_ioreq.o
+                                                  out/BSP_Common/usbd_core.o
+USBD_CtlContinueSendData                          out/BSP_Common/usbd_ioreq.o
+                                                  out/BSP_Common/usbd_core.o
+USBD_CtlError                                     out/BSP_Common/usbd_ctlreq.o
+USBD_CtlPrepareRx                                 out/BSP_Common/usbd_ioreq.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+USBD_CtlReceiveStatus                             out/BSP_Common/usbd_ioreq.o
+                                                  out/BSP_Common/usbd_core.o
+USBD_CtlSendData                                  out/BSP_Common/usbd_ioreq.o
+                                                  out/BSP_Common/usbd_ctlreq.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+USBD_CtlSendStatus                                out/BSP_Common/usbd_ioreq.o
+                                                  out/BSP_Common/usbd_ctlreq.o
+                                                  out/BSP_Common/usbd_core.o
+USBD_DeInit                                       out/BSP_Common/usbd_core.o
+USBD_FS_ConfigStrDescriptor                       out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+USBD_FS_DeviceDesc                                out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USBD_FS_DeviceDescriptor                          out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+USBD_FS_InterfaceStrDescriptor                    out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+USBD_FS_LangIDStrDescriptor                       out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+USBD_FS_ManufacturerStrDescriptor                 out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+USBD_FS_ProductStrDescriptor                      out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+USBD_FS_SerialStrDescriptor                       out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+USBD_GetRxCount                                   out/BSP_Common/usbd_ioreq.o
+USBD_GetString                                    out/BSP_Common/usbd_ctlreq.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+USBD_Init                                         out/BSP_Common/usbd_core.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usb_device.o
+USBD_Interface_fops_FS                            out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usb_device.o
+USBD_LL_ClearStallEP                              out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/BSP_Common/usbd_ctlreq.o
+USBD_LL_CloseEP                                   out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+USBD_LL_DataInStage                               out/BSP_Common/usbd_core.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USBD_LL_DataOutStage                              out/BSP_Common/usbd_core.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USBD_LL_DeInit                                    out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/BSP_Common/usbd_core.o
+USBD_LL_Delay                                     out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USBD_LL_DevConnected                              out/BSP_Common/usbd_core.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USBD_LL_DevDisconnected                           out/BSP_Common/usbd_core.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USBD_LL_FlushEP                                   out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USBD_LL_GetRxDataSize                             out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/BSP_Common/usbd_ioreq.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+USBD_LL_Init                                      out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/BSP_Common/usbd_core.o
+USBD_LL_IsStallEP                                 out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/BSP_Common/usbd_ctlreq.o
+USBD_LL_IsoINIncomplete                           out/BSP_Common/usbd_core.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USBD_LL_IsoOUTIncomplete                          out/BSP_Common/usbd_core.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USBD_LL_OpenEP                                    out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/BSP_Common/usbd_core.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+USBD_LL_PrepareReceive                            out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/BSP_Common/usbd_ioreq.o
+                                                  out/BSP_Common/usbd_core.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+USBD_LL_Reset                                     out/BSP_Common/usbd_core.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USBD_LL_Resume                                    out/BSP_Common/usbd_core.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USBD_LL_SOF                                       out/BSP_Common/usbd_core.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USBD_LL_SetSpeed                                  out/BSP_Common/usbd_core.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USBD_LL_SetUSBAddress                             out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/BSP_Common/usbd_ctlreq.o
+USBD_LL_SetupStage                                out/BSP_Common/usbd_core.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USBD_LL_StallEP                                   out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/BSP_Common/usbd_ctlreq.o
+                                                  out/BSP_Common/usbd_core.o
+USBD_LL_Start                                     out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/BSP_Common/usbd_core.o
+USBD_LL_Stop                                      out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/BSP_Common/usbd_core.o
+USBD_LL_Suspend                                   out/BSP_Common/usbd_core.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USBD_LL_Transmit                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/BSP_Common/usbd_ioreq.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+USBD_LangIDDesc                                   out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+USBD_ParseSetupRequest                            out/BSP_Common/usbd_ctlreq.o
+                                                  out/BSP_Common/usbd_core.o
+USBD_RegisterClass                                out/BSP_Common/usbd_core.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usb_device.o
+USBD_RunTestMode                                  out/BSP_Common/usbd_core.o
+USBD_SetClassConfig                               out/BSP_Common/usbd_core.o
+                                                  out/BSP_Common/usbd_ctlreq.o
+USBD_Start                                        out/BSP_Common/usbd_core.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usb_device.o
+USBD_StdDevReq                                    out/BSP_Common/usbd_ctlreq.o
+                                                  out/BSP_Common/usbd_core.o
+USBD_StdEPReq                                     out/BSP_Common/usbd_ctlreq.o
+                                                  out/BSP_Common/usbd_core.o
+USBD_StdItfReq                                    out/BSP_Common/usbd_ctlreq.o
+                                                  out/BSP_Common/usbd_core.o
+USBD_Stop                                         out/BSP_Common/usbd_core.o
+USBD_StrDesc                                      out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+USBD_StringSerial                                 out/ChipTest/Eflash_Loader/usb_if/usbd_desc.o
+USBD_static_free                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+USBD_static_malloc                                out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+USB_CMD_RB_Memory_Get_Empty_Length                out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_CMD_RB_Memory_Get_Length                      out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_CMD_RB_Memory_Init                            out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_CMD_RB_Memory_Peek                            out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_CMD_RB_Memory_Pop                             out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_CMD_RB_Memory_Push                            out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_CMD_RB_Memory_Reset                           out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_Clr_EPx_IntStatus                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_Clr_EPx_RX_FIFO_Errors                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Clr_EPx_STALL                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Clr_EPx_TX_FIFO_Errors                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Clr_Error_Status                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Clr_IntStatus                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/startup/system_bl702.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+USB_Clr_RstEndIntStatus                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Device_Init                                   out/ChipTest/Eflash_Loader/usb_if/usb_device.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_Device_Output_K_State                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Disable                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_DoNothing_IRQHandler                          out/startup/system_bl702.o
+USB_EPx_Read_Data_From_FIFO                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_EPx_Read_Data_From_FIFO_DMA                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_EPx_Write_Data_To_FIFO                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_EPx_Write_Data_To_FIFO_DMA                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Enable                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USB_Error_Handler                                 out/ChipTest/Eflash_Loader/usb_if/usb_device.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USB_Get_Current_Packet_EP                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Get_Current_Packet_PID                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Get_Device_Addr                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+USB_Get_EPx_Dir                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Get_EPx_RX_FIFO_CNT                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_Get_EPx_RX_FIFO_Errors                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Get_EPx_RX_FIFO_Status                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Get_EPx_Status                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Get_EPx_TX_FIFO_CNT                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Get_EPx_TX_FIFO_Errors                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Get_EPx_TX_FIFO_Status                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Get_EPx_Type                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Get_Error_Status                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Get_Frame_Num                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Get_IntStatus                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_Get_LPM_Packet_Attr                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Get_LPM_Status                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_HAL_Clock_Init                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+USB_HAL_GPIO_Init                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+USB_HAL_Interrupts_Init                           out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+USB_HAL_Interrupts_LPM_Init                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USB_HAL_Power_Off                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USB_HAL_Power_Up                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USB_HAL_System_Init                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USB_HAL_Xcvr_Config                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USB_IRQHandler                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_IRQHandler_Wrapper                            out/startup/interrupt.o
+USB_IntEn                                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_IntMask                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_Is_EPx_RDY_Free                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_LPM_Disable                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_LPM_Enable                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_RESP_RB_Memory_Get_Empty_Length               out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_RESP_RB_Memory_Get_Length                     out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_RESP_RB_Memory_Init                           out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_RESP_RB_Memory_Peek                           out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+USB_RESP_RB_Memory_Pop                            out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_RESP_RB_Memory_Push                           out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_RESP_RB_Memory_Reset                          out/ChipTest/Eflash_Loader/usb_if/usb_rb.o
+USB_Rework_IRQHandler                             out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_Rework_In_Callback                            out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_Rework_Out_Callback                           out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_Set_Config                                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+USB_Set_Device_Addr                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/BSP_Common/usbd_core.o
+USB_Set_EPx_Busy                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_Set_EPx_Config                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_Set_EPx_Dir                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Set_EPx_IN_Busy                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Set_EPx_IN_Stall                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Set_EPx_OUT_Busy                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Set_EPx_OUT_Stall                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Set_EPx_RX_DMA_Interface_Config               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Set_EPx_Rdy                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+USB_Set_EPx_STALL                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Set_EPx_Size                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Set_EPx_Status                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+USB_Set_EPx_TX_DMA_Interface_Config               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Set_EPx_Type                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+USB_Set_EPx_Xfer_Size                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Set_Internal_PullUp_Config                    out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Set_LPM_Default_Response                      out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_usb.o
+USB_Stress_Test_Data_Check                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+USB_Stress_Test_Origin_Data                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+USB_Stress_Test_Origin_Init                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+USB_Stress_Test_Recv_Data                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+Update_SystemCoreClockWith_XTAL                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+UserRxBufferFS                                    out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+UserTxBufferFS                                    out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+WDT_ClearResetStatus                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+WDT_Disable                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+WDT_Enable                                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+WDT_GetCounterValue                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+WDT_GetMatchValue                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+WDT_GetResetStatus                                out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+WDT_IntMask                                       out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+WDT_Int_Callback_Install                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+WDT_ResetCounterValue                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+WDT_SetCompValue                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+WDT_Set_Clock                                     out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_timer.o
+WIFI_IPC_PUBLIC_IRQHandler_Wrapper                out/startup/interrupt.o
+WIFI_IRQHandler_Wrapper                           out/startup/interrupt.o
+XIP_SFlash_Erase                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash_ext.o
+XIP_SFlash_Erase_Need_Lock                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash_ext.o
+XIP_SFlash_Erase_With_Lock                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+XIP_SFlash_GetDeviceId_Need_Lock                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+XIP_SFlash_GetJedecId_Need_Lock                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+XIP_SFlash_GetUniqueId_Need_Lock                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+XIP_SFlash_Init                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash_ext.o
+XIP_SFlash_Opt_Enter                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+XIP_SFlash_Opt_Exit                               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash_ext.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+XIP_SFlash_Read                                   out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash_ext.o
+XIP_SFlash_Read_Need_Lock                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash_ext.o
+XIP_SFlash_Read_Via_Cache_Need_Lock               out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_sf_cfg_ext.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hbn.o
+                                                  out/BSP_Common/partition/partition.o
+XIP_SFlash_Read_With_Lock                         out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+XIP_SFlash_State_Restore                          out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+XIP_SFlash_State_Save                             out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+XIP_SFlash_Write                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash_ext.o
+XIP_SFlash_Write_Need_Lock                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_xip_sflash_ext.o
+XIP_SFlash_Write_With_Lock                        out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_romapi.o
+__Interrupt_Handlers                              out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_common.o
+__StackTop                                        out/startup/GCC/entry.o
+__Vectors                                         out/startup/interrupt.o
+                                                  out/startup/GCC/entry.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+__adddf3                                          /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(adddf3.o)
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+                                                  out/BSP_Common/libc/atof.o
+__assert_func                                     out/BSP_Common/libc/common.o
+__bss_end__                                       out/startup/GCC/start_load.o
+__bss_start__                                     out/startup/GCC/start_load.o
+__clz_tab                                         /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clz.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_umoddi3.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_udivdi3.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clzsi2.o)
+__clzsi2                                          /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_clzsi2.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(extendsfdf2.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatsidf.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(subdf3.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(muldf3.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(divdf3.o)
+                                                  /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(adddf3.o)
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+__ctypes                                          out/BSP_Common/libc/ctypes.o
+                                                  out/BSP_Common/libc/ctype_isxdigit.o
+                                                  out/BSP_Common/libc/ctype_toupper.o
+                                                  out/BSP_Common/libc/ctype_tolower.o
+                                                  out/BSP_Common/libc/ctype_isupper.o
+                                                  out/BSP_Common/libc/ctype_isspace.o
+                                                  out/BSP_Common/libc/ctype_isprint.o
+                                                  out/BSP_Common/libc/ctype_islower.o
+                                                  out/BSP_Common/libc/ctype_ispunct.o
+                                                  out/BSP_Common/libc/ctype_isgraph.o
+                                                  out/BSP_Common/libc/ctype_iscntrl.o
+                                                  out/BSP_Common/libc/ctype_isalpha.o
+                                                  out/BSP_Common/libc/ctype_isalnum.o
+__divdf3                                          /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(divdf3.o)
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+                                                  out/BSP_Common/libc/atof.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+__dtcm_load_addr                                  out/startup/GCC/start_load.o
+__extendsfdf2                                     /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(extendsfdf2.o)
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+__fixunsdfsi                                      /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(fixunsdfsi.o)
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+__floatsidf                                       /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatsidf.o)
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+                                                  out/BSP_Common/libc/atof.o
+__floatunsidf                                     /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(floatunsidf.o)
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+__freertos_irq_stack_top                          out/BSP_Common/FreeRTOS/port.o
+__global_pointer$                                 out/startup/GCC/entry.o
+__itcm_load_addr                                  out/startup/GCC/start_load.o
+__metal_after_main                                out/startup/GCC/entry.o
+__metal_chicken_bit                               out/startup/GCC/entry.o
+__muldf3                                          /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(muldf3.o)
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+                                                  out/BSP_Common/libc/atof.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+__ram_data_end__                                  out/startup/GCC/start_load.o
+__ram_data_start__                                out/startup/GCC/start_load.o
+__ram_load_addr                                   out/startup/GCC/start_load.o
+__rand48_seed                                     out/BSP_Common/libc/lrand48.o
+                                                  out/BSP_Common/libc/srand48.o
+                                                  out/BSP_Common/libc/seed48.o
+                                                  out/BSP_Common/libc/mrand48.o
+__register_frame_info                             out/startup/GCC/entry.o
+__strxspn                                         out/BSP_Common/libc/strxspn.o
+                                                  out/BSP_Common/libc/strpbrk.o
+                                                  out/BSP_Common/libc/strspn.o
+                                                  out/BSP_Common/libc/strcspn.o
+__subdf3                                          /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(subdf3.o)
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+__system_ram_data_end__                           out/startup/GCC/start_load.o
+__system_ram_data_start__                         out/startup/GCC/start_load.o
+__system_ram_load_addr                            out/startup/GCC/start_load.o
+__tcm_code_end__                                  out/startup/GCC/start_load.o
+__tcm_code_start__                                out/startup/GCC/start_load.o
+__tcm_data_end__                                  out/startup/GCC/start_load.o
+__tcm_data_start__                                out/startup/GCC/start_load.o
+__truncdfsf2                                      /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(truncdfsf2.o)
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_adc.o
+__udivdi3                                         /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_udivdi3.o)
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Common/libc/vsnprintf.o
+__umoddi3                                         /home/cbpeng/toolchain/riscv64-elf-x86_64-20210120/bin/../lib/gcc/riscv64-unknown-elf/8.4.0/rv32imafc/ilp32f/libgcc.a(_umoddi3.o)
+                                                  out/BSP_Common/libc/vsnprintf.o
+_enter                                            out/startup/GCC/entry.o
+atof                                              out/BSP_Common/libc/atof.o
+atoi                                              out/BSP_Common/libc/atoi.o
+atol                                              out/BSP_Common/libc/atol.o
+atoll                                             out/BSP_Common/libc/atoll.o
+bflb_clear_flash_status_register                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+bflb_crypt_auth_decrypt                           out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_auth_decrypt_do                        out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_decrypt                                out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_decrypt_do                             out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_deinit                                 out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_deinit_do                              out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_encrypt                                out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_encrypt_do                             out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_encrypt_tag                            out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_encrypt_tag_do                         out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_finish                                 out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_finish_do                              out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_init                                   out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_init_do                                out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_setadd                                 out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_setadd_do                              out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_setkey                                 out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_setkey_do                              out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_update                                 out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_crypt_update_do                              out/BSP_Common/cipher_suite/bflb_crypt.o
+bflb_deinit_all_psram_cs                          out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+bflb_dsa_decrypt_crt                              out/BSP_Common/cipher_suite/bflb_dsa.o
+bflb_dsa_init                                     out/BSP_Common/cipher_suite/bflb_dsa.o
+bflb_dsa_mexp_binary                              out/BSP_Common/cipher_suite/bflb_dsa.o
+bflb_dsa_mexp_mont                                out/BSP_Common/cipher_suite/bflb_dsa.o
+bflb_dsa_sign                                     out/BSP_Common/cipher_suite/bflb_dsa.o
+bflb_dsa_verify                                   out/BSP_Common/cipher_suite/bflb_dsa.o
+bflb_ecc_get_random_value                         out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_ecdh_deinit                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdh_get_encrypt_key                         out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_ecdh_get_public_key                          out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_ecdh_init                                    out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdsa_deinit                                 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdsa_get_private_key                        out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_ecdsa_get_public_key                         out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdsa_init                                   out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_ecdsa_sign                                   out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_ecdsa_verify                                 out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_eflash_loader_cmd_init                       out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_cmd_process                    out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_deinit_uart_gpio               out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+bflb_eflash_loader_deinit_uart_gpio_do            out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+bflb_eflash_loader_deinit_usb_xcvr                out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+bflb_eflash_loader_if_deinit                      out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_if_handshake_poll              out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_if_init                        out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_if_read                        out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_if_select                      out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_if_set                         out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_if_wait_tx_idle                out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_if_write                       out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_init_flash_gpio                out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+bflb_eflash_loader_init_uart_gpio                 out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+bflb_eflash_loader_init_usb_xcvr                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+bflb_eflash_loader_jlink_change_rate              out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+bflb_eflash_loader_jlink_deinit                   out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_jlink_handshake_poll           out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_jlink_init                     out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_jlink_recv                     out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_jlink_send                     out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_jlink_wait_tx_idle             out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_main                           out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+bflb_eflash_loader_uart_change_rate               out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+bflb_eflash_loader_uart_deinit                    out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_uart_handshake_poll            out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_uart_init                      out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_uart_recv                      out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_uart_send                      out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_usart_wait_tx_idle             out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_usb_deinit                     out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+bflb_eflash_loader_usb_handshake_poll             out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_usb_init                       out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_usb_recv                       out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_usb_send                       out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_eflash_loader_usb_wait_tx_idle               out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+bflb_efuse_read                                   out/ChipTest/Eflash_Loader/bflb_efuse.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_efuse_write                                  out/ChipTest/Eflash_Loader/bflb_efuse.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_hash_deinit                                  out/BSP_Common/cipher_suite/bflb_hash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_hash_finish                                  out/BSP_Common/cipher_suite/bflb_hash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_hash_init                                    out/BSP_Common/cipher_suite/bflb_hash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_hash_start                                   out/BSP_Common/cipher_suite/bflb_hash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_hash_update                                  out/BSP_Common/cipher_suite/bflb_hash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_platform_clear_time                          out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_platform_deinit                              out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+bflb_platform_deinit_time                         out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+bflb_platform_deinit_uart_debug_gpio              out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_gpio.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+bflb_platform_delay_ms                            out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+bflb_platform_delay_us                            out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_platform_dump                                out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+bflb_platform_get_log                             out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_platform_get_random                          out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+bflb_platform_get_time_ms                         out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+bflb_platform_get_time_us                         out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+bflb_platform_init                                out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+bflb_platform_init_time                           out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+bflb_platform_init_uart_debug_gpio                out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_gpio.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+bflb_platform_print_set                           out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+bflb_platform_printc                              out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+bflb_platform_printf                              out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_snflash.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_l1c.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_glb.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_common.o
+                                                  out/BSP_Common/xz/xz_port.o
+                                                  out/BSP_Common/usbd_ctlreq.o
+                                                  out/BSP_Common/usbd_core.o
+                                                  out/BSP_Common/cipher_suite/bflb_ecdsa.o
+                                                  out/BSP_Common/cipher_suite/bflb_hash.o
+                                                  out/BSP_Common/cipher_suite/bflb_crypt.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_cdc.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usb_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_jlink.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+bflb_platform_prints                              out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+bflb_platform_printx                              out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+bflb_platform_set_alarm_time                      out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+bflb_platform_set_alarm_time_callback             out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+bflb_platform_start_time                          out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+bflb_platform_stop_time                           out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+bflb_platform_uart_dbg_deinit                     out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+bflb_platform_uart_dbg_init                       out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+bflb_platform_usart_dbg_send                      out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+bflb_qe_data_clear                                out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+bflb_set_flash_clock_div                          out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_set_high_speed_flash_clock                   out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+bflb_set_high_speed_system_clock                  out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+bflb_set_low_speed_flash_clock                    out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+bflb_set_low_speed_system_clock                   out/ChipTest/Eflash_Loader/bflb_set_clock.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_set_pad_pullnone                             out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+bflb_spi_flash_chiperase                          out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_deinit                             out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+bflb_spi_flash_erase                              out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_init                               out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+bflb_spi_flash_nread                              out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+bflb_spi_flash_program                            out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_read_jedec_id                      out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_read_sahb                          out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_read_sahb_xip                      out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+bflb_spi_flash_read_status_reg_with_cmd           out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_read_xip                           out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_sbus_xip_read_init                 out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+bflb_spi_flash_set_io_mode                        out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_update_para                        out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_write_status_reg_with_cmd          out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_xip_read_exit                      out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bflb_spi_flash_xip_read_init                      out/ChipTest/Eflash_Loader/bflb_spi_flash.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+bootMode                                          out/ChipTest/Eflash_Loader/eflash_loader.o
+bootrom_read_boot_mode                            out/ChipTest/Eflash_Loader/bflb_eflash_loader_gpio.o
+                                                  out/ChipTest/Eflash_Loader/eflash_loader.o
+bsearch                                           out/BSP_Common/libc/bsearch.o
+calloc                                            out/BSP_Common/libc/stdlib.o
+cdc_line_coding                                   out/ChipTest/Eflash_Loader/usb_if/usbd_cdc_if.o
+chCRCHTalbe                                       out/BSP_Common/soft_crc/softcrc.o
+chCRCLTalbe                                       out/BSP_Common/soft_crc/softcrc.o
+checkBuf                                          out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+clic_clear_pending                                out/startup/interrupt.o
+clic_csoft_handler_Wrapper                        out/startup/interrupt.o
+clic_disable_interrupt                            out/startup/interrupt.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+clic_enable_interrupt                             out/startup/interrupt.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_dma.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+clic_get_cliccfg                                  out/startup/interrupt.o
+clic_get_intcfg                                   out/startup/interrupt.o
+clic_mext_handler_Wrapper                         out/startup/interrupt.o
+clic_msip_handler_Wrapper                         out/startup/interrupt.o
+clic_mtimer_handler_Wrapper                       out/startup/interrupt.o
+clic_set_cliccfg                                  out/startup/interrupt.o
+clic_set_intcfg                                   out/startup/interrupt.o
+clic_set_pending                                  out/startup/interrupt.o
+crc32Tab                                          out/BSP_Common/soft_crc/softcrc.o
+                                                  out/BSP_Common/xz/xz_crc32.o
+disk_driver_callback_init                         out/3rdParty/fatfs/source/diskio.o
+disk_initialize                                   out/3rdParty/fatfs/source/diskio.o
+                                                  out/3rdParty/fatfs/source/ff.o
+disk_ioctl                                        out/3rdParty/fatfs/source/diskio.o
+                                                  out/3rdParty/fatfs/source/ff.o
+disk_read                                         out/3rdParty/fatfs/source/diskio.o
+                                                  out/3rdParty/fatfs/source/ff.o
+disk_status                                       out/3rdParty/fatfs/source/diskio.o
+                                                  out/3rdParty/fatfs/source/ff.o
+disk_write                                        out/3rdParty/fatfs/source/diskio.o
+                                                  out/3rdParty/fatfs/source/ff.o
+eTaskGetState                                     out/3rdParty/FreeRTOS/Source/tasks.o
+ecdsa_private_key                                 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ecdsa_public_keyx                                 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ecdsa_public_keyy                                 out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+eflash_loader_cmd_ack_buf                         out/ChipTest/Eflash_Loader/eflash_loader.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+eflash_loader_dump_data                           out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+eflash_loader_if                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_interface.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+eflash_loader_readbuf                             out/ChipTest/Eflash_Loader/eflash_loader.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_usb.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_uart.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+ep0_in_data_buff                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+ep0_out_data_buff                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+ep1_out_data_buff                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+ep2_in_data_buff                                  out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+ep3_out_data_buff                                 out/BSP_Driver/BL702_BSP_Driver/StdDriver/bl702_hal_pcd.o
+                                                  out/ChipTest/Eflash_Loader/usb_if/usbd_conf.o
+f_close                                           out/3rdParty/fatfs/source/ff.o
+f_closedir                                        out/3rdParty/fatfs/source/ff.o
+f_getfree                                         out/3rdParty/fatfs/source/ff.o
+f_lseek                                           out/3rdParty/fatfs/source/ff.o
+f_mkdir                                           out/3rdParty/fatfs/source/ff.o
+f_mkfs                                            out/3rdParty/fatfs/source/ff.o
+f_mount                                           out/3rdParty/fatfs/source/ff.o
+f_open                                            out/3rdParty/fatfs/source/ff.o
+f_opendir                                         out/3rdParty/fatfs/source/ff.o
+f_read                                            out/3rdParty/fatfs/source/ff.o
+f_readdir                                         out/3rdParty/fatfs/source/ff.o
+f_rename                                          out/3rdParty/fatfs/source/ff.o
+f_stat                                            out/3rdParty/fatfs/source/ff.o
+f_sync                                            out/3rdParty/fatfs/source/ff.o
+f_truncate                                        out/3rdParty/fatfs/source/ff.o
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+vsnprintf                                         out/BSP_Common/libc/vsnprintf.o
+                                                  out/BSP_Driver/BL702_BSP_Driver/platform_print/platform_device.o
+                                                  out/BSP_Common/libc/vsprintf.o
+                                                  out/BSP_Common/libc/sprintf.o
+                                                  out/BSP_Common/libc/snprintf.o
+vsprintf                                          out/BSP_Common/libc/vsprintf.o
+vsscanf                                           out/BSP_Common/libc/vsscanf.o
+                                                  out/BSP_Common/libc/sscanf.o
+xISRStackTop                                      out/BSP_Common/FreeRTOS/port.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+xPortGetFreeHeapSize                              out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+xPortGetMinimumEverFreeHeapSize                   out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+xPortStartFirstTask                               out/BSP_Common/FreeRTOS/portASM.o
+                                                  out/BSP_Common/FreeRTOS/port.o
+xPortStartScheduler                               out/BSP_Common/FreeRTOS/port.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+xQueueCreateCountingSemaphore                     out/3rdParty/FreeRTOS/Source/queue.o
+xQueueCreateCountingSemaphoreStatic               out/3rdParty/FreeRTOS/Source/queue.o
+xQueueCreateMutex                                 out/3rdParty/FreeRTOS/Source/queue.o
+xQueueCreateMutexStatic                           out/3rdParty/FreeRTOS/Source/queue.o
+xQueueGenericCreate                               out/3rdParty/FreeRTOS/Source/queue.o
+xQueueGenericCreateStatic                         out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+xQueueGenericReset                                out/3rdParty/FreeRTOS/Source/queue.o
+xQueueGenericSend                                 out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+xQueueGenericSendFromISR                          out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+xQueueGetMutexHolder                              out/3rdParty/FreeRTOS/Source/queue.o
+xQueueGetMutexHolderFromISR                       out/3rdParty/FreeRTOS/Source/queue.o
+xQueueGiveFromISR                                 out/3rdParty/FreeRTOS/Source/queue.o
+xQueueGiveMutexRecursive                          out/3rdParty/FreeRTOS/Source/queue.o
+xQueueIsQueueEmptyFromISR                         out/3rdParty/FreeRTOS/Source/queue.o
+xQueueIsQueueFullFromISR                          out/3rdParty/FreeRTOS/Source/queue.o
+xQueuePeek                                        out/3rdParty/FreeRTOS/Source/queue.o
+xQueuePeekFromISR                                 out/3rdParty/FreeRTOS/Source/queue.o
+xQueueReceive                                     out/3rdParty/FreeRTOS/Source/queue.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+xQueueReceiveFromISR                              out/3rdParty/FreeRTOS/Source/queue.o
+xQueueRegistry                                    out/3rdParty/FreeRTOS/Source/queue.o
+xQueueSemaphoreTake                               out/3rdParty/FreeRTOS/Source/queue.o
+xQueueTakeMutexRecursive                          out/3rdParty/FreeRTOS/Source/queue.o
+xStreamBufferBytesAvailable                       out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferGenericCreate                        out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferGenericCreateStatic                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferIsEmpty                              out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferIsFull                               out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferNextMessageLengthBytes               out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferReceive                              out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferReceiveCompletedFromISR              out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferReceiveFromISR                       out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferReset                                out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferSend                                 out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferSendCompletedFromISR                 out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferSendFromISR                          out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferSetTriggerLevel                      out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xStreamBufferSpacesAvailable                      out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xTaskAbortDelay                                   out/3rdParty/FreeRTOS/Source/tasks.o
+xTaskCatchUpTicks                                 out/3rdParty/FreeRTOS/Source/tasks.o
+xTaskCheckForTimeOut                              out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+xTaskCreate                                       out/3rdParty/FreeRTOS/Source/tasks.o
+xTaskCreateStatic                                 out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+xTaskGenericNotify                                out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xTaskGenericNotifyFromISR                         out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xTaskGetCurrentTaskHandle                         out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+xTaskGetHandle                                    out/3rdParty/FreeRTOS/Source/tasks.o
+xTaskGetSchedulerState                            out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+xTaskGetTickCount                                 out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+xTaskGetTickCountFromISR                          out/3rdParty/FreeRTOS/Source/tasks.o
+xTaskIncrementTick                                out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/BSP_Common/FreeRTOS/portASM.o
+xTaskNotifyStateClear                             out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xTaskNotifyWait                                   out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+xTaskPriorityDisinherit                           out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+xTaskPriorityInherit                              out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+xTaskRemoveFromEventList                          out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+xTaskResumeAll                                    out/3rdParty/FreeRTOS/Source/tasks.o
+                                                  out/3rdParty/FreeRTOS/Source/portable/MemMang/heap_5.o
+                                                  out/3rdParty/FreeRTOS/Source/stream_buffer.o
+                                                  out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/queue.o
+xTaskResumeFromISR                                out/3rdParty/FreeRTOS/Source/tasks.o
+xTimerCreate                                      out/3rdParty/FreeRTOS/Source/timers.o
+xTimerCreateStatic                                out/3rdParty/FreeRTOS/Source/timers.o
+xTimerCreateTimerTask                             out/3rdParty/FreeRTOS/Source/timers.o
+                                                  out/3rdParty/FreeRTOS/Source/tasks.o
+xTimerGenericCommand                              out/3rdParty/FreeRTOS/Source/timers.o
+xTimerGetExpiryTime                               out/3rdParty/FreeRTOS/Source/timers.o
+xTimerGetPeriod                                   out/3rdParty/FreeRTOS/Source/timers.o
+xTimerGetTimerDaemonTaskHandle                    out/3rdParty/FreeRTOS/Source/timers.o
+xTimerIsTimerActive                               out/3rdParty/FreeRTOS/Source/timers.o
+xTimerPendFunctionCall                            out/3rdParty/FreeRTOS/Source/timers.o
+xTimerPendFunctionCallFromISR                     out/3rdParty/FreeRTOS/Source/timers.o
+xtalType                                          out/ChipTest/Eflash_Loader/eflash_loader.o
+                                                  out/ChipTest/Eflash_Loader/bflb_eflash_loader_cmds.o
+xz_crc32                                          out/BSP_Common/xz/xz_crc32.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+xz_crc32_init                                     out/BSP_Common/xz/xz_crc32.o
+                                                  out/BSP_Common/xz/xz_decompress.o
+xz_dec_end                                        out/BSP_Common/xz/xz_dec_stream.o
+                                                  out/BSP_Common/xz/xz_decompress.o
+xz_dec_init                                       out/BSP_Common/xz/xz_dec_stream.o
+                                                  out/BSP_Common/xz/xz_decompress.o
+xz_dec_lzma2_create                               out/BSP_Common/xz/xz_dec_lzma2.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+xz_dec_lzma2_end                                  out/BSP_Common/xz/xz_dec_lzma2.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+xz_dec_lzma2_reset                                out/BSP_Common/xz/xz_dec_lzma2.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+xz_dec_lzma2_run                                  out/BSP_Common/xz/xz_dec_lzma2.o
+                                                  out/BSP_Common/xz/xz_dec_stream.o
+xz_dec_reset                                      out/BSP_Common/xz/xz_dec_stream.o
+xz_dec_run                                        out/BSP_Common/xz/xz_dec_stream.o
+                                                  out/BSP_Common/xz/xz_decompress.o
+xz_uncompress_end                                 out/BSP_Common/xz/xz_decompress.o
+xz_uncompress_init                                out/BSP_Common/xz/xz_decompress.o
+xz_uncompress_stream                              out/BSP_Common/xz/xz_decompress.o
diff --git a/tools/bflb_flash_tool/chips/bl702/eflash_loader/eflash_loader_32m.bin b/tools/bflb_flash_tool/chips/bl702/eflash_loader/eflash_loader_32m.bin
new file mode 100644
index 00000000..67efe8e5
Binary files /dev/null and b/tools/bflb_flash_tool/chips/bl702/eflash_loader/eflash_loader_32m.bin differ
diff --git a/tools/bflb_flash_tool/chips/bl702/eflash_loader/eflash_loader_cfg.conf b/tools/bflb_flash_tool/chips/bl702/eflash_loader/eflash_loader_cfg.conf
new file mode 100644
index 00000000..fe6124e4
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl702/eflash_loader/eflash_loader_cfg.conf
@@ -0,0 +1,57 @@
+[LOAD_CFG]
+#jlink or uart
+interface = uart
+device = COM1
+speed_uart_boot = 500000
+speed_uart_load = 500000
+openocd_config = ft2232
+auto_burn = false
+speed_jlink = 2000
+#0:without load, 1:eflash_loader load
+load_function = 1
+do_reset = true
+#reset retry+hold time
+reset_hold_time = 50
+shake_hand_delay = 100
+reset_revert = false
+cutoff_time = 50
+shake_hand_retry = 3
+flash_burn_retry = 1
+checksum_err_retry = 3
+boot2_loader_timeout = 0
+#1: 32M, 2: RC32M
+#xtal_type = 2
+erase_time_out = 15000
+#chiptype=702
+#eflash_loader_file=chips/bl702/eflash_loader/eflash_loader_32m.bin
+check_mac = false
+#0:no erase,1:programmed section erase,2:chip erase
+erase = 1
+# switch eflash_loader command log save
+local_log = false
+#0:verify by calculating SHA256(xip), >0:read back verify and verify by calculating SHA256(sbus)
+verify = 0
+tx_size = 2056
+cpu_reset_after_load = false
+
+[FLASH_CFG]
+flash_id = c84015
+flash_clock_cfg = 1
+#0:NIO, 1:DO, 2:QO, 3:DIO, 4:QIO
+flash_io_mode = 1
+#flash_pin value:
+#bit 0-1 = flash_cfg: 0: external gpio 23-28, 1: internal 512K, 2: internal 1M, 3: external gpio 17-22
+#bit 2-3 = swap_cfg: 0: do not swap, 1: swap cs&io2, 2: swap io0&io3, 3: swap cs&io2 io0&io3 both
+flash_pin = ""
+#empty for auto, otherwise specified para file path: eg: chips/bl702/efuse_bootheader/flash_para.bin
+flash_para = chips/bl702/efuse_bootheader/flash_para.bin
+decompress_write = false
+file = chips/bl702/img_create/bootinfo_boot2.bin chips/bl702/img_create/img_boot2.bin chips/bl702/partition/partition.bin chips/bl702/partition/partition.bin
+address = 00000000 00002000 e000 f000
+
+[EFUSE_CFG]
+burn_en = true
+factory_mode = false
+security_write = false
+file = ../../../Tools/img_tools/efuse_bootheader/efusedata.bin
+maskfile = ../../../Tools/img_tools/efuse_bootheader/efusedata_mask.bin
diff --git a/tools/bflb_flash_tool/chips/bl702/eflash_loader/eflash_loader_none.bin b/tools/bflb_flash_tool/chips/bl702/eflash_loader/eflash_loader_none.bin
new file mode 100644
index 00000000..5d646b9a
Binary files /dev/null and b/tools/bflb_flash_tool/chips/bl702/eflash_loader/eflash_loader_none.bin differ
diff --git a/tools/bflb_flash_tool/chips/bl702/eflash_loader/eflash_loader_rc32m.bin b/tools/bflb_flash_tool/chips/bl702/eflash_loader/eflash_loader_rc32m.bin
new file mode 100644
index 00000000..828d3801
Binary files /dev/null and b/tools/bflb_flash_tool/chips/bl702/eflash_loader/eflash_loader_rc32m.bin differ
diff --git a/tools/bflb_flash_tool/chips/bl702/efuse_bootheader/efuse_bootheader_cfg.conf b/tools/bflb_flash_tool/chips/bl702/efuse_bootheader/efuse_bootheader_cfg.conf
new file mode 100644
index 00000000..b9c5ad6c
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl702/efuse_bootheader/efuse_bootheader_cfg.conf
@@ -0,0 +1,196 @@
+[EFUSE_CFG]
+########################################################################
+#2bits
+ef_sf_aes_mode = 0
+#2bits
+ef_sboot_sign_mode = 0
+#2bits
+ef_sboot_en = 0
+#2bits
+ef_dbg_jtag_dis = 0
+#4bits
+ef_dbg_mode = 0
+#32bits
+ef_dbg_pwd_low = 0
+#32bits
+ef_dbg_pwd_high = 0
+###################################################################
+ef_key_slot_2_w0 = 0
+ef_key_slot_2_w1 = 0
+ef_key_slot_2_w2 = 0
+ef_key_slot_2_w3 = 0
+ef_key_slot_3_w0 = 0
+ef_key_slot_3_w1 = 0
+ef_key_slot_3_w2 = 0
+ef_key_slot_3_w3 = 0
+ef_key_slot_4_w0 = 0
+ef_key_slot_4_w1 = 0
+ef_key_slot_4_w2 = 0
+ef_key_slot_4_w3 = 0
+
+wr_lock_key_slot_4_l = 0
+wr_lock_dbg_pwd = 0
+wr_lock_key_slot_2 = 0
+wr_lock_key_slot_3 = 0
+wr_lock_key_slot_4_h = 0
+rd_lock_dbg_pwd = 0
+rd_lock_key_slot_2 = 0
+rd_lock_key_slot_3 = 0
+rd_lock_key_slot_4 = 0
+
+[BOOTHEADER_CFG]
+magic_code = 0x504e4642
+revision = 0x01
+#########################flash cfg#############################
+flashcfg_magic_code = 0x47464346
+#flashcfg_magic_code=0
+io_mode = 0x11
+cont_read_support = 0
+sfctrl_clk_delay = 1
+sfctrl_clk_invert = 0x01
+
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+
+sector_size = 4
+mfg_id = 0xc8
+page_size = 256
+
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+
+write_enable_cmd = 0x06
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+
+wel_reg_index = 0
+qe_reg_index = 1
+busy_reg_index = 0
+wel_bit_pos = 1
+
+qe_bit_pos = 1
+busy_bit_pos = 0
+wel_reg_write_len = 2
+wel_reg_read_len = 1
+
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+release_power_down = 0xab
+busy_reg_read_len = 1
+
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+cont_read_code = 0xa0
+cont_read_exit_code = 0xff
+
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+
+sector_erase_time = 300
+blk32k_erase_time = 1200
+
+blk64k_erase_time = 1200
+page_prog_time = 5
+
+chip_erase_time = 200000
+power_down_delay = 20
+qe_data = 0
+
+flashcfg_crc32 = 0
+
+#########################clk cfg####################################
+clkcfg_magic_code = 0x47464350
+#clkcfg_magic_code=0
+
+#0:Not use XTAL to set PLL, 1:XTAL is 32M, 2:XTAL is RC32M
+xtal_type = 1
+#0:RC32M, 1:XTAL, 2:PLL 57.6M, 3:PLL 96M, 4:PLL 144M
+pll_clk = 1
+hclk_div = 0
+bclk_div = 0
+#0:144M, 1:XCLK(RC32M or XTAL), 2:57.6M, 3:72M, 4:BCLK, 5:96M
+flash_clk_type = 1
+flash_clk_div = 0
+clkcfg_crc32 = 0
+
+########################boot cfg####################################
+#1:ECC
+sign = 0
+#1:AES128,2:AES256,3:AES192
+encrypt_type = 0
+key_sel = 1
+no_segment = 1
+cache_enable = 1
+notload_in_bootrom = 0
+aes_region_lock = 0
+cache_way_disable = 0x00
+crc_ignore = 0
+hash_ignore = 0
+boot2_enable=1
+boot2_rollback=0
+
+########################image cfg####################################
+#total image len or segment count
+img_len = 0x100
+bootentry = 0
+#img RAM address or flash offset
+img_start = 0x2000
+
+#img hash
+hash_0 = 0xdeadbeef
+hash_1 = 0
+hash_2 = 0
+hash_3 = 0
+hash_4 = 0
+hash_5 = 0
+hash_6 = 0
+hash_7 = 0
+
+#address of partition tables for boot2 in bootrom
+boot2_pt_table_0=0x1000
+boot2_pt_table_1=0x2000
+
+crc32 = 0xdeadbeef
diff --git a/tools/bflb_flash_tool/chips/bl702/img_create_iot/img_create_cfg.conf b/tools/bflb_flash_tool/chips/bl702/img_create_iot/img_create_cfg.conf
new file mode 100644
index 00000000..1ca04c85
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl702/img_create_iot/img_create_cfg.conf
@@ -0,0 +1,15 @@
+[Img_Cfg]
+boot_header_file = 
+efuse_file = 
+efuse_mask_file = 
+encrypt_key_org = 000102030405060708090A0B0C0D0E0F101112131415161718191A1B1C1D1E1F
+aesiv_file = img_create/aesiv_cpu0.bin
+publickey_file = img_create/publickey_uecc.pem
+privatekey_file_uecc = img_create/privatekey_uecc.pem
+segheader_file = img_create/segheader.bin
+segdata_file = 
+bootinfo_file =
+img_file = 
+whole_img_file = 
+aes_key_org = 00000000000000000000000000000000
+aes_iv = 00000000000000000000000000000000
diff --git a/tools/bflb_flash_tool/chips/bl702/img_create_iot/img_create_cfg_boot2.conf b/tools/bflb_flash_tool/chips/bl702/img_create_iot/img_create_cfg_boot2.conf
new file mode 100644
index 00000000..9ca12e55
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl702/img_create_iot/img_create_cfg_boot2.conf
@@ -0,0 +1,15 @@
+[Img_Cfg]
+boot_header_file = 
+efuse_file = 
+efuse_mask_file = 
+encrypt_key_org = 000102030405060708090A0B0C0D0E0F101112131415161718191A1B1C1D1E1F
+aesiv_file = img_create/aesiv.bin
+publickey_file = img_create/publickey_uecc.pem
+privatekey_file_uecc = img_create/privatekey_uecc.pem
+segheader_file = img_create/segheader.bin
+segdata_file = 
+bootinfo_file = 
+img_file = 
+whole_img_file = 
+aes_key_org = 11
+aes_iv = 11
diff --git a/tools/bflb_flash_tool/chips/bl702/img_create_iot/img_create_cfg_mfg.conf b/tools/bflb_flash_tool/chips/bl702/img_create_iot/img_create_cfg_mfg.conf
new file mode 100644
index 00000000..0e34c3f8
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl702/img_create_iot/img_create_cfg_mfg.conf
@@ -0,0 +1,13 @@
+[Img_Cfg]
+boot_header_file = ./efuse_bootheader/bootheader.bin
+efuse_file = ./efuse_bootheader/efusedata.bin
+efuse_mask_file = ./efuse_bootheader/efusedata_mask.bin
+encrypt_key_org = 000102030405060708090A0B0C0D0E0F101112131415161718191A1B1C1D1E1F
+aesiv_file = ./img_create/aesiv.bin
+publickey_file = ./img_create/publickey_uecc.pem
+privatekey_file_uecc = ./img_create/privatekey_uecc.pem
+segheader_file = ./img_create/segheader.bin
+segdata_file = 
+bootinfo_file = ./img_create/bootinfo_mfg.bin
+img_file = ./img_create/img_mfg.bin
+whole_img_file = ./img_create/wholeimg_mfg_if.bin
diff --git a/tools/bflb_flash_tool/chips/bl702/img_create_mcu/img_create_cfg.conf b/tools/bflb_flash_tool/chips/bl702/img_create_mcu/img_create_cfg.conf
new file mode 100644
index 00000000..1ca04c85
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl702/img_create_mcu/img_create_cfg.conf
@@ -0,0 +1,15 @@
+[Img_Cfg]
+boot_header_file = 
+efuse_file = 
+efuse_mask_file = 
+encrypt_key_org = 000102030405060708090A0B0C0D0E0F101112131415161718191A1B1C1D1E1F
+aesiv_file = img_create/aesiv_cpu0.bin
+publickey_file = img_create/publickey_uecc.pem
+privatekey_file_uecc = img_create/privatekey_uecc.pem
+segheader_file = img_create/segheader.bin
+segdata_file = 
+bootinfo_file =
+img_file = 
+whole_img_file = 
+aes_key_org = 00000000000000000000000000000000
+aes_iv = 00000000000000000000000000000000
diff --git a/tools/bflb_flash_tool/chips/bl702/img_create_mcu/img_create_cfg_boot2.conf b/tools/bflb_flash_tool/chips/bl702/img_create_mcu/img_create_cfg_boot2.conf
new file mode 100644
index 00000000..9ca12e55
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl702/img_create_mcu/img_create_cfg_boot2.conf
@@ -0,0 +1,15 @@
+[Img_Cfg]
+boot_header_file = 
+efuse_file = 
+efuse_mask_file = 
+encrypt_key_org = 000102030405060708090A0B0C0D0E0F101112131415161718191A1B1C1D1E1F
+aesiv_file = img_create/aesiv.bin
+publickey_file = img_create/publickey_uecc.pem
+privatekey_file_uecc = img_create/privatekey_uecc.pem
+segheader_file = img_create/segheader.bin
+segdata_file = 
+bootinfo_file = 
+img_file = 
+whole_img_file = 
+aes_key_org = 11
+aes_iv = 11
diff --git a/tools/bflb_flash_tool/chips/bl702/img_create_mcu/img_create_cfg_mfg.conf b/tools/bflb_flash_tool/chips/bl702/img_create_mcu/img_create_cfg_mfg.conf
new file mode 100644
index 00000000..0e34c3f8
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl702/img_create_mcu/img_create_cfg_mfg.conf
@@ -0,0 +1,13 @@
+[Img_Cfg]
+boot_header_file = ./efuse_bootheader/bootheader.bin
+efuse_file = ./efuse_bootheader/efusedata.bin
+efuse_mask_file = ./efuse_bootheader/efusedata_mask.bin
+encrypt_key_org = 000102030405060708090A0B0C0D0E0F101112131415161718191A1B1C1D1E1F
+aesiv_file = ./img_create/aesiv.bin
+publickey_file = ./img_create/publickey_uecc.pem
+privatekey_file_uecc = ./img_create/privatekey_uecc.pem
+segheader_file = ./img_create/segheader.bin
+segdata_file = 
+bootinfo_file = ./img_create/bootinfo_mfg.bin
+img_file = ./img_create/img_mfg.bin
+whole_img_file = ./img_create/wholeimg_mfg_if.bin
diff --git a/tools/bflb_flash_tool/chips/bl702/partition/partition_cfg_1M.toml b/tools/bflb_flash_tool/chips/bl702/partition/partition_cfg_1M.toml
new file mode 100644
index 00000000..d0f334bd
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl702/partition/partition_cfg_1M.toml
@@ -0,0 +1,70 @@
+[pt_table]
+#partition table is 4K in size
+address0 = 0x1000
+address1 = 0x2000
+
+[[pt_entry]]
+type = 0
+name = "FW"
+device = 0
+address0 = 0x3000
+size0 = 0x8D000
+address1 = 0x90000
+size1 = 0x63000
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 1
+name = "mfg"
+device = 0
+address0 = 0x90000
+size0 = 0x63000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 2
+name = "media"
+device = 0
+address0 = 0xF3000
+size0 = 0x5000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 3
+name = "PSM"
+device = 0
+address0 = 0xF8000
+size0 = 0x4000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 4
+name = "factory"
+device = 0
+address0 = 0xFC000
+size0 = 0x4000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
diff --git a/tools/bflb_flash_tool/chips/bl702/partition/partition_cfg_1M_FW1.toml b/tools/bflb_flash_tool/chips/bl702/partition/partition_cfg_1M_FW1.toml
new file mode 100644
index 00000000..8a81e904
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl702/partition/partition_cfg_1M_FW1.toml
@@ -0,0 +1,70 @@
+[pt_table]
+#partition table is 4K in size
+address0 = 0x1000
+address1 = 0x2000
+
+[[pt_entry]]
+type = 0
+name = "FW"
+device = 0
+address0 = 0x3000
+size0 = 0x8D000
+address1 = 0x90000
+size1 = 0x63000
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 1
+age = 0
+
+[[pt_entry]]
+type = 1
+name = "mfg"
+device = 0
+address0 = 0x90000
+size0 = 0x63000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 2
+name = "media"
+device = 0
+address0 = 0xF3000
+size0 = 0x5000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 3
+name = "PSM"
+device = 0
+address0 = 0xF8000
+size0 = 0x4000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 4
+name = "factory"
+device = 0
+address0 = 0xFC000
+size0 = 0x4000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
diff --git a/tools/bflb_flash_tool/chips/bl702/partition/partition_cfg_2M.toml b/tools/bflb_flash_tool/chips/bl702/partition/partition_cfg_2M.toml
new file mode 100644
index 00000000..fe211b60
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl702/partition/partition_cfg_2M.toml
@@ -0,0 +1,70 @@
+[pt_table]
+#partition table is 4K in size
+address0 = 0x1000
+address1 = 0x2000
+
+[[pt_entry]]
+type = 0
+name = "FW"
+device = 0
+address0 = 0x3000
+size0 = 0x123000
+address1 = 0x126000
+size1 = 0xCD000
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 1
+name = "mfg"
+device = 0
+address0 = 0x126000
+size0 = 0xCD000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 2
+name = "media"
+device = 0
+address0 = 0x1F3000
+size0 = 0x5000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 3
+name = "PSM"
+device = 0
+address0 = 0x1F8000
+size0 = 0x4000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 4
+name = "factory"
+device = 0
+address0 = 0x1FC000
+size0 = 0x4000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
diff --git a/tools/bflb_flash_tool/chips/bl702/partition/partition_cfg_2M_FW1.toml b/tools/bflb_flash_tool/chips/bl702/partition/partition_cfg_2M_FW1.toml
new file mode 100644
index 00000000..e8a3ab5e
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl702/partition/partition_cfg_2M_FW1.toml
@@ -0,0 +1,70 @@
+[pt_table]
+#partition table is 4K in size
+address0 = 0x1000
+address1 = 0x2000
+
+[[pt_entry]]
+type = 0
+name = "FW"
+device = 0
+address0 = 0x3000
+size0 = 0x123000
+address1 = 0x126000
+size1 = 0xCD000
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 1
+age = 0
+
+[[pt_entry]]
+type = 1
+name = "mfg"
+device = 0
+address0 = 0x126000
+size0 = 0xCD000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 2
+name = "media"
+device = 0
+address0 = 0x1F3000
+size0 = 0x5000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 3
+name = "PSM"
+device = 0
+address0 = 0x1F8000
+size0 = 0x4000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 4
+name = "factory"
+device = 0
+address0 = 0x1FC000
+size0 = 0x4000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
diff --git a/tools/bflb_flash_tool/chips/bl702/partition/partition_cfg_512K.toml b/tools/bflb_flash_tool/chips/bl702/partition/partition_cfg_512K.toml
new file mode 100644
index 00000000..c5da66f6
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl702/partition/partition_cfg_512K.toml
@@ -0,0 +1,70 @@
+[pt_table]
+#partition table is 4K in size
+address0 = 0x1000
+address1 = 0x2000
+
+[[pt_entry]]
+type = 0
+name = "FW"
+device = 0
+address0 = 0x3000
+size0 = 0x42000
+address1 = 0x45000
+size1 = 0x2E000
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 1
+name = "mfg"
+device = 0
+address0 = 0x45000
+size0 = 0x2E000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 2
+name = "media"
+device = 0
+address0 = 0x73000
+size0 = 0x5000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 3
+name = "PSM"
+device = 0
+address0 = 0x78000
+size0 = 0x4000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 4
+name = "factory"
+device = 0
+address0 = 0x7C000
+size0 = 0x4000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
diff --git a/tools/bflb_flash_tool/chips/bl702/partition/partition_cfg_512K_FW1.toml b/tools/bflb_flash_tool/chips/bl702/partition/partition_cfg_512K_FW1.toml
new file mode 100644
index 00000000..bb09fbb6
--- /dev/null
+++ b/tools/bflb_flash_tool/chips/bl702/partition/partition_cfg_512K_FW1.toml
@@ -0,0 +1,70 @@
+[pt_table]
+#partition table is 4K in size
+address0 = 0x1000
+address1 = 0x2000
+
+[[pt_entry]]
+type = 0
+name = "FW"
+device = 0
+address0 = 0x3000
+size0 = 0x42000
+address1 = 0x45000
+size1 = 0x2E000
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 1
+age = 0
+
+[[pt_entry]]
+type = 1
+name = "mfg"
+device = 0
+address0 = 0x45000
+size0 = 0x2E000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 2
+name = "media"
+device = 0
+address0 = 0x73000
+size0 = 0x5000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 3
+name = "PSM"
+device = 0
+address0 = 0x78000
+size0 = 0x4000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
+[[pt_entry]]
+type = 4
+name = "factory"
+device = 0
+address0 = 0x7C000
+size0 = 0x4000
+address1 = 0
+size1 = 0
+# compressed image must set len,normal image can left it to 0
+len = 0
+activeindex = 0
+age = 0
+
diff --git a/tools/bflb_flash_tool/clear.bat b/tools/bflb_flash_tool/clear.bat
new file mode 100644
index 00000000..ca94585c
--- /dev/null
+++ b/tools/bflb_flash_tool/clear.bat
@@ -0,0 +1,30 @@
+del /a /f /s /q "*.log"
+del /a /f /s /q "*.ini"
+del /a /f /s /q "iot.toml"
+del /a /f /s /q "mcu.toml"
+del /a /f /s /q "storage.toml"
+del /a /f /s /q "partition.bin"
+del /a /f /s /q "ro_params.dtb"
+del /a /f /s /q "flash_para.bin"
+del /a /f /s /q .\chips\bl602\img_create_iot\*.bin
+del /a /f /s /q .\chips\bl702\img_create_iot\*.bin
+del /a /f /s /q .\chips\bl56x\img_create_iot\*.bin
+del /a /f /s /q .\chips\bl60x\img_create_iot\*.bin
+del /a /f /s /q .\chips\bl606p\img_create_iot\*.bin
+del /a /f /s /q .\chips\bl602\img_create_mcu\*.bin
+del /a /f /s /q .\chips\bl702\img_create_mcu\*.bin
+del /a /f /s /q .\chips\bl56x\img_create_mcu\*.bin
+del /a /f /s /q .\chips\bl60x\img_create_mcu\*.bin
+del /a /f /s /q .\chips\bl606p\img_create_mcu\*.bin
+del /a /f /s /q .\chips\bl602\efuse_bootheader\*.bin
+del /a /f /s /q .\chips\bl702\efuse_bootheader\*.bin
+del /a /f /s /q .\chips\bl56x\efuse_bootheader\*.bin
+del /a /f /s /q .\chips\bl60x\efuse_bootheader\*.bin
+del /a /f /s /q .\chips\bl606p\efuse_bootheader\*.bin
+del /a /f /s /q .\chips\*.pack
+rd /s /Q .\chips\bl602\ota
+rd /s /Q .\chips\bl702\ota
+rd /s /Q .\chips\bl56x\ota
+rd /s /Q .\chips\bl60x\ota
+rd /s /Q .\chips\bl606p\ota
+pause
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/BY25128BS_684018.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/BY25128BS_684018.conf
new file mode 100644
index 00000000..7f875960
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/BY25128BS_684018.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x68
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/BY25Q16BS_684015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/BY25Q16BS_684015.conf
new file mode 100644
index 00000000..7f875960
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/BY25Q16BS_684015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x68
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/BY25Q32BS_684016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/BY25Q32BS_684016.conf
new file mode 100644
index 00000000..7f875960
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/BY25Q32BS_684016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x68
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/BY25Q64BS_684017.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/BY25Q64BS_684017.conf
new file mode 100644
index 00000000..7f875960
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/BY25Q64BS_684017.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x68
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/FM25Q08_a14014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/FM25Q08_a14014.conf
new file mode 100644
index 00000000..72c33abf
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/FM25Q08_a14014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 800
+blk32k_erase_time = 3000
+blk64k_erase_time = 4000
+page_prog_time = 10
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/FTVQ80_5e6014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/FTVQ80_5e6014.conf
new file mode 100644
index 00000000..2511550e
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/FTVQ80_5e6014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25LE16C_c86015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25LE16C_c86015.conf
new file mode 100644
index 00000000..8af338c6
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25LE16C_c86015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25LQ32D_c86016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25LQ32D_c86016.conf
new file mode 100644
index 00000000..8af338c6
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25LQ32D_c86016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25LQ80C_c86014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25LQ80C_c86014.conf
new file mode 100644
index 00000000..8af338c6
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25LQ80C_c86014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25Q16E_c84015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25Q16E_c84015.conf
new file mode 100644
index 00000000..de9a78d7
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25Q16E_c84015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25Q32C_c84016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25Q32C_c84016.conf
new file mode 100644
index 00000000..8343806d
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25Q32C_c84016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25Q64E_c84017.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25Q64E_c84017.conf
new file mode 100644
index 00000000..8343806d
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25Q64E_c84017.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25Q80E_c84014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25Q80E_c84014.conf
new file mode 100644
index 00000000..de9a78d7
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25Q80E_c84014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25WQ16E_c86515.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25WQ16E_c86515.conf
new file mode 100644
index 00000000..b8e63a53
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25WQ16E_c86515.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 4
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 1
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 4
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0x12
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25WQ32E_c86516.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25WQ32E_c86516.conf
new file mode 100644
index 00000000..8af338c6
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25WQ32E_c86516.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25WQ80E_c86514.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25WQ80E_c86514.conf
new file mode 100644
index 00000000..b8e63a53
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/GD25WQ80E_c86514.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 4
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 1
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 4
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0x12
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/IS25LP016D_9d6015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/IS25LP016D_9d6015.conf
new file mode 100644
index 00000000..2eec6257
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/IS25LP016D_9d6015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x9d
+io_mode = 4
+de_burst_wrap_cmd = 0xc0
+de_burst_wrap_cmd_dmy_clk = 0x00
+de_burst_wrap_code_mode = 0
+de_burst_wrap_code = 0x00
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 0
+qe_bit_pos = 6
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 0
+burst_wrap_code = 0x06
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 5
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/IS25LP032D_9d6016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/IS25LP032D_9d6016.conf
new file mode 100644
index 00000000..2eec6257
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/IS25LP032D_9d6016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x9d
+io_mode = 4
+de_burst_wrap_cmd = 0xc0
+de_burst_wrap_cmd_dmy_clk = 0x00
+de_burst_wrap_code_mode = 0
+de_burst_wrap_code = 0x00
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 0
+qe_bit_pos = 6
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 0
+burst_wrap_code = 0x06
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 5
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/IS25LP080D_9d6014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/IS25LP080D_9d6014.conf
new file mode 100644
index 00000000..2eec6257
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/IS25LP080D_9d6014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x9d
+io_mode = 4
+de_burst_wrap_cmd = 0xc0
+de_burst_wrap_cmd_dmy_clk = 0x00
+de_burst_wrap_code_mode = 0
+de_burst_wrap_code = 0x00
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 0
+qe_bit_pos = 6
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 0
+burst_wrap_code = 0x06
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 5
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/KH25V16_c22015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/KH25V16_c22015.conf
new file mode 100644
index 00000000..a2f4a6b2
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/KH25V16_c22015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc2
+io_mode = 0x11
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x00
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x00
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 0
+cont_read_code = 0x00
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/KH25V40_c22013.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/KH25V40_c22013.conf
new file mode 100644
index 00000000..a2f4a6b2
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/KH25V40_c22013.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc2
+io_mode = 0x11
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x00
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x00
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 0
+cont_read_code = 0x00
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/KH25V80_c22014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/KH25V80_c22014.conf
new file mode 100644
index 00000000..a2f4a6b2
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/KH25V80_c22014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc2
+io_mode = 0x11
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x00
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x00
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 0
+cont_read_code = 0x00
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/MD25D40_514013.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/MD25D40_514013.conf
new file mode 100644
index 00000000..616c93d7
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/MD25D40_514013.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x51
+io_mode = 0x11
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 0
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/MX25V1633FM_c22535.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/MX25V1633FM_c22535.conf
new file mode 100644
index 00000000..b6d5b097
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/MX25V1633FM_c22535.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc2
+io_mode = 4
+de_burst_wrap_cmd = 0xc0
+de_burst_wrap_cmd_dmy_clk = 0x00
+de_burst_wrap_code_mode = 0
+de_burst_wrap_code = 0x10
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 0
+qe_bit_pos = 6
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa5
+burst_wrap_cmd = 0xc0
+burst_wrap_dmy_clk = 0x00
+burst_wrap_data_mode = 0
+burst_wrap_code = 0x02
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 45
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/MX25V3233FM_c22536.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/MX25V3233FM_c22536.conf
new file mode 100644
index 00000000..b6d5b097
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/MX25V3233FM_c22536.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc2
+io_mode = 4
+de_burst_wrap_cmd = 0xc0
+de_burst_wrap_cmd_dmy_clk = 0x00
+de_burst_wrap_code_mode = 0
+de_burst_wrap_code = 0x10
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 0
+qe_bit_pos = 6
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa5
+burst_wrap_cmd = 0xc0
+burst_wrap_dmy_clk = 0x00
+burst_wrap_data_mode = 0
+burst_wrap_code = 0x02
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 45
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/MX25V8035F_c22534.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/MX25V8035F_c22534.conf
new file mode 100644
index 00000000..b6d5b097
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/MX25V8035F_c22534.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc2
+io_mode = 4
+de_burst_wrap_cmd = 0xc0
+de_burst_wrap_cmd_dmy_clk = 0x00
+de_burst_wrap_code_mode = 0
+de_burst_wrap_code = 0x10
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 0
+qe_bit_pos = 6
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa5
+burst_wrap_cmd = 0xc0
+burst_wrap_dmy_clk = 0x00
+burst_wrap_data_mode = 0
+burst_wrap_code = 0x02
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 45
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/P25Q16H_856015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/P25Q16H_856015.conf
new file mode 100644
index 00000000..cb31f9ec
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/P25Q16H_856015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x85
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/P25Q32H_856016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/P25Q32H_856016.conf
new file mode 100644
index 00000000..6a5d790c
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/P25Q32H_856016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x85
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/P25Q64H_856017.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/P25Q64H_856017.conf
new file mode 100644
index 00000000..6a5d790c
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/P25Q64H_856017.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x85
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/P25Q80H_856014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/P25Q80H_856014.conf
new file mode 100644
index 00000000..cb31f9ec
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/P25Q80H_856014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x85
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q128FW_ef6018.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q128FW_ef6018.conf
new file mode 100644
index 00000000..686cfd6a
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q128FW_ef6018.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q16FW_ef6015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q16FW_ef6015.conf
new file mode 100644
index 00000000..686cfd6a
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q16FW_ef6015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q16JV_ef4015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q16JV_ef4015.conf
new file mode 100644
index 00000000..686cfd6a
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q16JV_ef4015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q16JV_ef7015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q16JV_ef7015.conf
new file mode 100644
index 00000000..686cfd6a
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q16JV_ef7015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q32FV_ef4016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q32FV_ef4016.conf
new file mode 100644
index 00000000..686cfd6a
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q32FV_ef4016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q32FW_ef6016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q32FW_ef6016.conf
new file mode 100644
index 00000000..686cfd6a
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q32FW_ef6016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q32JW_ef8016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q32JW_ef8016.conf
new file mode 100644
index 00000000..686cfd6a
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q32JW_ef8016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q80DV_ef4014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q80DV_ef4014.conf
new file mode 100644
index 00000000..5e000a93
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q80DV_ef4014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xA0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q80EW_ef6014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q80EW_ef6014.conf
new file mode 100644
index 00000000..686cfd6a
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/W25Q80EW_ef6014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/XM25QH16_204015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/XM25QH16_204015.conf
new file mode 100644
index 00000000..bca0fff6
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/XM25QH16_204015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x20
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/XM25QH64_204017.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/XM25QH64_204017.conf
new file mode 100644
index 00000000..bca0fff6
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/XM25QH64_204017.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x20
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/XT25F16B_0b4015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/XT25F16B_0b4015.conf
new file mode 100644
index 00000000..842ba5a7
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/XT25F16B_0b4015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x0b
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/XT25F32B_0b4016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/XT25F32B_0b4016.conf
new file mode 100644
index 00000000..842ba5a7
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/XT25F32B_0b4016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x0b
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/XT25F64B_0b4017.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/XT25F64B_0b4017.conf
new file mode 100644
index 00000000..842ba5a7
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/XT25F64B_0b4017.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x0b
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/XT25Q32B_0b6016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/XT25Q32B_0b6016.conf
new file mode 100644
index 00000000..b68a87b9
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/XT25Q32B_0b6016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x0b
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 6000
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/XT25Q80B_0b6014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/XT25Q80B_0b6014.conf
new file mode 100644
index 00000000..842ba5a7
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/XT25Q80B_0b6014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x0b
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/ZBVQ16_5e6015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/ZBVQ16_5e6015.conf
new file mode 100644
index 00000000..d75813d4
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/ZBVQ16_5e6015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x5e
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl602/ZBVQ64_5e4017.conf b/tools/bflb_flash_tool/utils/flash-conf/bl602/ZBVQ64_5e4017.conf
new file mode 100644
index 00000000..d75813d4
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl602/ZBVQ64_5e4017.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x5e
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/BY25128BS_684018.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/BY25128BS_684018.conf
new file mode 100644
index 00000000..7f875960
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/BY25128BS_684018.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x68
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/BY25Q16BS_684015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/BY25Q16BS_684015.conf
new file mode 100644
index 00000000..7f875960
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/BY25Q16BS_684015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x68
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/BY25Q32BS_684016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/BY25Q32BS_684016.conf
new file mode 100644
index 00000000..7f875960
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/BY25Q32BS_684016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x68
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/BY25Q64BS_684017.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/BY25Q64BS_684017.conf
new file mode 100644
index 00000000..7f875960
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/BY25Q64BS_684017.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x68
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/FM25Q08_a14014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/FM25Q08_a14014.conf
new file mode 100644
index 00000000..8af338c6
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/FM25Q08_a14014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/FTVQ80_5e6014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/FTVQ80_5e6014.conf
new file mode 100644
index 00000000..2511550e
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/FTVQ80_5e6014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25LE16C_c86015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25LE16C_c86015.conf
new file mode 100644
index 00000000..8af338c6
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25LE16C_c86015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25LQ32D_c86016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25LQ32D_c86016.conf
new file mode 100644
index 00000000..8af338c6
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25LQ32D_c86016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25LQ80C_c86014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25LQ80C_c86014.conf
new file mode 100644
index 00000000..8af338c6
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25LQ80C_c86014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25Q16E_c84015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25Q16E_c84015.conf
new file mode 100644
index 00000000..de9a78d7
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25Q16E_c84015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25Q32C_c84016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25Q32C_c84016.conf
new file mode 100644
index 00000000..8343806d
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25Q32C_c84016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25Q80E_c84014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25Q80E_c84014.conf
new file mode 100644
index 00000000..de9a78d7
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25Q80E_c84014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25WQ16E_c86515.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25WQ16E_c86515.conf
new file mode 100644
index 00000000..b8e63a53
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25WQ16E_c86515.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 4
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 1
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 4
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0x12
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25WQ32E_c86516.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25WQ32E_c86516.conf
new file mode 100644
index 00000000..8af338c6
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25WQ32E_c86516.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25WQ80E_c86514.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25WQ80E_c86514.conf
new file mode 100644
index 00000000..b8e63a53
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/GD25WQ80E_c86514.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc8
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 4
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 1
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 4
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0x12
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/IS25LP016D_9d6015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/IS25LP016D_9d6015.conf
new file mode 100644
index 00000000..2eec6257
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/IS25LP016D_9d6015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x9d
+io_mode = 4
+de_burst_wrap_cmd = 0xc0
+de_burst_wrap_cmd_dmy_clk = 0x00
+de_burst_wrap_code_mode = 0
+de_burst_wrap_code = 0x00
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 0
+qe_bit_pos = 6
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 0
+burst_wrap_code = 0x06
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 5
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/IS25LP032D_9d6016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/IS25LP032D_9d6016.conf
new file mode 100644
index 00000000..2eec6257
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/IS25LP032D_9d6016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x9d
+io_mode = 4
+de_burst_wrap_cmd = 0xc0
+de_burst_wrap_cmd_dmy_clk = 0x00
+de_burst_wrap_code_mode = 0
+de_burst_wrap_code = 0x00
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 0
+qe_bit_pos = 6
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 0
+burst_wrap_code = 0x06
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 5
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/IS25LP080D_9d6014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/IS25LP080D_9d6014.conf
new file mode 100644
index 00000000..2eec6257
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/IS25LP080D_9d6014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x9d
+io_mode = 4
+de_burst_wrap_cmd = 0xc0
+de_burst_wrap_cmd_dmy_clk = 0x00
+de_burst_wrap_code_mode = 0
+de_burst_wrap_code = 0x00
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 0
+qe_bit_pos = 6
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 0
+burst_wrap_code = 0x06
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 5
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/KH25V16_c22015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/KH25V16_c22015.conf
new file mode 100644
index 00000000..a2f4a6b2
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/KH25V16_c22015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc2
+io_mode = 0x11
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x00
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x00
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 0
+cont_read_code = 0x00
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/KH25V40_c22013.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/KH25V40_c22013.conf
new file mode 100644
index 00000000..a2f4a6b2
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/KH25V40_c22013.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc2
+io_mode = 0x11
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x00
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x00
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 0
+cont_read_code = 0x00
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/KH25V80_c22014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/KH25V80_c22014.conf
new file mode 100644
index 00000000..a2f4a6b2
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/KH25V80_c22014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc2
+io_mode = 0x11
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x00
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x00
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 0
+cont_read_code = 0x00
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/MD25D40_514013.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/MD25D40_514013.conf
new file mode 100644
index 00000000..616c93d7
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/MD25D40_514013.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x51
+io_mode = 0x11
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 0
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/MX25V1633FM_c22535.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/MX25V1633FM_c22535.conf
new file mode 100644
index 00000000..b6d5b097
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/MX25V1633FM_c22535.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc2
+io_mode = 4
+de_burst_wrap_cmd = 0xc0
+de_burst_wrap_cmd_dmy_clk = 0x00
+de_burst_wrap_code_mode = 0
+de_burst_wrap_code = 0x10
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 0
+qe_bit_pos = 6
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa5
+burst_wrap_cmd = 0xc0
+burst_wrap_dmy_clk = 0x00
+burst_wrap_data_mode = 0
+burst_wrap_code = 0x02
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 45
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/MX25V3233FM_c22536.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/MX25V3233FM_c22536.conf
new file mode 100644
index 00000000..b6d5b097
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/MX25V3233FM_c22536.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc2
+io_mode = 4
+de_burst_wrap_cmd = 0xc0
+de_burst_wrap_cmd_dmy_clk = 0x00
+de_burst_wrap_code_mode = 0
+de_burst_wrap_code = 0x10
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 0
+qe_bit_pos = 6
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa5
+burst_wrap_cmd = 0xc0
+burst_wrap_dmy_clk = 0x00
+burst_wrap_data_mode = 0
+burst_wrap_code = 0x02
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 45
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/MX25V8035F_c22534.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/MX25V8035F_c22534.conf
new file mode 100644
index 00000000..b6d5b097
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/MX25V8035F_c22534.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xc2
+io_mode = 4
+de_burst_wrap_cmd = 0xc0
+de_burst_wrap_cmd_dmy_clk = 0x00
+de_burst_wrap_code_mode = 0
+de_burst_wrap_code = 0x10
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 0
+qe_bit_pos = 6
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa5
+burst_wrap_cmd = 0xc0
+burst_wrap_dmy_clk = 0x00
+burst_wrap_data_mode = 0
+burst_wrap_code = 0x02
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 45
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/P25Q16H_856015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/P25Q16H_856015.conf
new file mode 100644
index 00000000..cb31f9ec
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/P25Q16H_856015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x85
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/P25Q32H_856016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/P25Q32H_856016.conf
new file mode 100644
index 00000000..6a5d790c
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/P25Q32H_856016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x85
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/P25Q80H_856014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/P25Q80H_856014.conf
new file mode 100644
index 00000000..cb31f9ec
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/P25Q80H_856014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x85
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q128FW_ef6018.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q128FW_ef6018.conf
new file mode 100644
index 00000000..686cfd6a
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q128FW_ef6018.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q16FW_ef6015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q16FW_ef6015.conf
new file mode 100644
index 00000000..686cfd6a
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q16FW_ef6015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q16JV_ef4015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q16JV_ef4015.conf
new file mode 100644
index 00000000..686cfd6a
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q16JV_ef4015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q16JV_ef7015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q16JV_ef7015.conf
new file mode 100644
index 00000000..686cfd6a
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q16JV_ef7015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q32FV_ef4016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q32FV_ef4016.conf
new file mode 100644
index 00000000..686cfd6a
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q32FV_ef4016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q32FW_ef6016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q32FW_ef6016.conf
new file mode 100644
index 00000000..686cfd6a
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q32FW_ef6016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q32JW_ef8016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q32JW_ef8016.conf
new file mode 100644
index 00000000..686cfd6a
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q32JW_ef8016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q80DV_ef4014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q80DV_ef4014.conf
new file mode 100644
index 00000000..5e000a93
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q80DV_ef4014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xA0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q80EW_ef6014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q80EW_ef6014.conf
new file mode 100644
index 00000000..686cfd6a
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/W25Q80EW_ef6014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0xef
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 3
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/XT25F16B_0b4015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/XT25F16B_0b4015.conf
new file mode 100644
index 00000000..842ba5a7
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/XT25F16B_0b4015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x0b
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/XT25F32B_0b4016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/XT25F32B_0b4016.conf
new file mode 100644
index 00000000..842ba5a7
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/XT25F32B_0b4016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x0b
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/XT25Q32B_0b6016.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/XT25Q32B_0b6016.conf
new file mode 100644
index 00000000..b68a87b9
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/XT25Q32B_0b6016.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x0b
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 6000
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/XT25Q80B_0b6014.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/XT25Q80B_0b6014.conf
new file mode 100644
index 00000000..842ba5a7
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/XT25Q80B_0b6014.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x0b
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 2
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x01
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0xa0
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 20
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/flash-conf/bl702/ZBVQ16_5e6015.conf b/tools/bflb_flash_tool/utils/flash-conf/bl702/ZBVQ16_5e6015.conf
new file mode 100644
index 00000000..d75813d4
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/flash-conf/bl702/ZBVQ16_5e6015.conf
@@ -0,0 +1,73 @@
+[FLASH_CFG]
+exit_contread_cmd = 0xff
+exit_contread_cmd_size = 3
+mfg_id = 0x5e
+io_mode = 4
+de_burst_wrap_cmd = 0x77
+de_burst_wrap_cmd_dmy_clk = 0x03
+de_burst_wrap_code_mode = 2
+de_burst_wrap_code = 0xF0
+write_enable_cmd = 0x06
+wel_reg_index = 0
+wel_bit_pos = 1
+wel_reg_read_len = 1
+wel_reg_write_len = 2
+qe_reg_index = 1
+qe_bit_pos = 1
+qe_reg_write_len = 1
+qe_reg_read_len = 1
+busy_reg_index = 0
+busy_bit_pos = 0
+busy_reg_read_len = 1
+release_power_down = 0xab
+reg_read_cmd0 = 0x05
+reg_read_cmd1 = 0x35
+reg_write_cmd0 = 0x01
+reg_write_cmd1 = 0x31
+fast_read_qio_cmd = 0xeb
+fast_read_qio_dmy_clk = 2
+cont_read_support = 1
+cont_read_code = 0x20
+burst_wrap_cmd = 0x77
+burst_wrap_dmy_clk = 0x03
+burst_wrap_data_mode = 2
+burst_wrap_code = 0x40
+chip_erase_cmd = 0xc7
+sector_erase_cmd = 0x20
+blk32k_erase_cmd = 0x52
+blk64k_erase_cmd = 0xd8
+page_prog_cmd = 0x02
+qpage_prog_cmd = 0x32
+qual_page_prog_addr_mode = 0
+reset_en_cmd = 0x66
+reset_cmd = 0x99
+cont_read_exit_code = 0xff
+jedecid_cmd = 0x9f
+jedecid_cmd_dmy_clk = 0
+qpi_jedecid_cmd = 0x9f
+qpi_jedecid_dmy_clk = 0
+sector_size = 4
+page_size = 256
+fast_read_cmd = 0x0b
+fast_read_dmy_clk = 1
+qpi_fast_read_cmd = 0x0b
+qpi_fast_read_dmy_clk = 1
+fast_read_do_cmd = 0x3b
+fast_read_do_dmy_clk = 1
+fast_read_dio_cmd = 0xbb
+fast_read_dio_dmy_clk = 0
+fast_read_qo_cmd = 0x6b
+fast_read_qo_dmy_clk = 1
+qpi_fast_read_qio_cmd = 0xeb
+qpi_fast_read_qio_dmy_clk = 2
+qpi_page_prog_cmd = 0x02
+write_vreg_enable_cmd = 0x50
+enter_qpi_cmd = 0x38
+exit_qpi_cmd = 0xff
+sector_erase_time = 300
+blk32k_erase_time = 1200
+blk64k_erase_time = 1200
+page_prog_time = 5
+chip_erase_time = 65535
+power_down_delay = 8
+qe_data = 0
\ No newline at end of file
diff --git a/tools/bflb_flash_tool/utils/genromfs/cygwin1.dll b/tools/bflb_flash_tool/utils/genromfs/cygwin1.dll
new file mode 100644
index 00000000..5aa99284
Binary files /dev/null and b/tools/bflb_flash_tool/utils/genromfs/cygwin1.dll differ
diff --git a/tools/bflb_flash_tool/utils/genromfs/genromfs.exe b/tools/bflb_flash_tool/utils/genromfs/genromfs.exe
new file mode 100644
index 00000000..046ad075
Binary files /dev/null and b/tools/bflb_flash_tool/utils/genromfs/genromfs.exe differ
diff --git a/tools/bflb_flash_tool/utils/genromfs/genromfs_amd64 b/tools/bflb_flash_tool/utils/genromfs/genromfs_amd64
new file mode 100644
index 00000000..2f139f10
Binary files /dev/null and b/tools/bflb_flash_tool/utils/genromfs/genromfs_amd64 differ
diff --git a/tools/bflb_flash_tool/utils/genromfs/genromfs_armel b/tools/bflb_flash_tool/utils/genromfs/genromfs_armel
new file mode 100644
index 00000000..631c0b69
Binary files /dev/null and b/tools/bflb_flash_tool/utils/genromfs/genromfs_armel differ
diff --git a/tools/bflb_flash_tool/utils/jlink/JLink.exe b/tools/bflb_flash_tool/utils/jlink/JLink.exe
new file mode 100644
index 00000000..d06bfd7c
Binary files /dev/null and b/tools/bflb_flash_tool/utils/jlink/JLink.exe differ
diff --git a/tools/bflb_flash_tool/utils/jlink/JLinkARM.dll b/tools/bflb_flash_tool/utils/jlink/JLinkARM.dll
new file mode 100644
index 00000000..8700ffcc
Binary files /dev/null and b/tools/bflb_flash_tool/utils/jlink/JLinkARM.dll differ
diff --git a/tools/bflb_flash_tool/utils/openocd/if_bflb_dbg.cfg b/tools/bflb_flash_tool/utils/openocd/if_bflb_dbg.cfg
new file mode 100644
index 00000000..e2e382db
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/openocd/if_bflb_dbg.cfg
@@ -0,0 +1,16 @@
+# BouffaloLab USB-JTAG/TTL adapter
+interface ftdi
+ftdi_vid_pid 0x0403 0x6010
+
+ftdi_channel 1
+ftdi_tdo_sample_edge falling
+transport select jtag
+adapter_khz     10000
+
+ftdi_layout_init 0x00f8 0x00fb
+#ftdi_layout_signal nTRST -data 0x0400
+#ftdi_layout_signal nSRST -ndata 0x0020
+
+#reset_config srst_only srst_push_pull
+#adapter_nsrst_delay 100
+#adapter_nsrst_assert_width 100
diff --git a/tools/bflb_flash_tool/utils/openocd/image-loader.cfg b/tools/bflb_flash_tool/utils/openocd/image-loader.cfg
new file mode 100644
index 00000000..d152290f
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/openocd/image-loader.cfg
@@ -0,0 +1,22 @@
+# image loader
+
+proc install_bin {} {
+#    mww 0x21000000 0x55aaaa55
+#    sleep 1000
+    init
+    reset init
+	#reg pc 0x22010000
+    #eflash_loader_openocd.bin no bootheader
+    load_image bl602/eflash_loader/eflash_loader_openocd.bin 0x22010000 bin
+	sleep 500
+    reg pc 0x22010000
+    reg mstatus 0x80000000
+	sleep 500
+    resume
+	shutdown
+}
+
+echo "Ready for Remote Connections"
+
+#init
+install_bin
diff --git a/tools/bflb_flash_tool/utils/openocd/libftdi1.dll b/tools/bflb_flash_tool/utils/openocd/libftdi1.dll
new file mode 100644
index 00000000..95c7c33b
Binary files /dev/null and b/tools/bflb_flash_tool/utils/openocd/libftdi1.dll differ
diff --git a/tools/bflb_flash_tool/utils/openocd/libusb-0-1-4.dll b/tools/bflb_flash_tool/utils/openocd/libusb-0-1-4.dll
new file mode 100644
index 00000000..d7988bb8
Binary files /dev/null and b/tools/bflb_flash_tool/utils/openocd/libusb-0-1-4.dll differ
diff --git a/tools/bflb_flash_tool/utils/openocd/libusb-1.0.dll b/tools/bflb_flash_tool/utils/openocd/libusb-1.0.dll
new file mode 100644
index 00000000..c6f52123
Binary files /dev/null and b/tools/bflb_flash_tool/utils/openocd/libusb-1.0.dll differ
diff --git a/tools/bflb_flash_tool/utils/openocd/openocd-usb-sipeed.cfg b/tools/bflb_flash_tool/utils/openocd/openocd-usb-sipeed.cfg
new file mode 100644
index 00000000..bcb477b2
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/openocd/openocd-usb-sipeed.cfg
@@ -0,0 +1,25 @@
+# SiPEED USB-JTAG/TTL based on FT2232D
+interface ftdi
+ftdi_vid_pid 0x0403 0x6010
+# http://blog.sipeed.com/p/727.html
+ftdi_channel 0
+transport select jtag
+adapter_khz     8000
+
+ftdi_layout_init 0x0508 0x0f1b
+ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100
+ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400
+
+set _CHIPNAME riscv
+#jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000001
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x0
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
+#$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
+#$_TARGETNAME.0 configure -work-area-phys 0x50000000 -work-area-size 32768 -work-area-backup 0
+$_TARGETNAME.0 configure -work-area-phys 0x22020000 -work-area-size 0x10000 -work-area-backup 0
+riscv set_reset_timeout_sec 10
+riscv set_prefer_sba on
+##riscv set_command_timeout_sec 1000
+echo "SiPEED USB-JTAG/TTL Ready for Remote Connections"
diff --git a/tools/bflb_flash_tool/utils/openocd/openocd.exe b/tools/bflb_flash_tool/utils/openocd/openocd.exe
new file mode 100644
index 00000000..4d7e36d2
Binary files /dev/null and b/tools/bflb_flash_tool/utils/openocd/openocd.exe differ
diff --git a/tools/bflb_flash_tool/utils/openocd/tgt_602.cfg b/tools/bflb_flash_tool/utils/openocd/tgt_602.cfg
new file mode 100644
index 00000000..c30c1a17
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/openocd/tgt_602.cfg
@@ -0,0 +1,45 @@
+#target chip
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000c05
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
+$_TARGETNAME.0 configure -work-area-phys 0x22020000 -work-area-size 0x10000 -work-area-backup 1
+#$_TARGETNAME.0 configure -rtos auto
+
+echo "Ready for Remote Connections"
+
+$_TARGETNAME.0 configure -event reset-assert-pre {
+    echo "reset-assert-pre"
+    adapter_khz 100
+}
+
+$_TARGETNAME.0 configure -event reset-deassert-post {
+    echo "reset-deassert-post"
+    adapter_khz 4000
+    reg mstatus 0x7800
+    reg mie 0x0
+#    reg pc 0x22008000
+}
+
+$_TARGETNAME.0 configure -event reset-init {
+    echo "reset-init"
+# 4MHz for FPGA
+    adapter_khz 4000
+}
+
+gdb_memory_map enable
+gdb_flash_program disable
+
+riscv set_prefer_sba on
+riscv set_command_timeout_sec 1
+
+init
+reset init
+
+#jtag arp_init
+
+#resume
+#exit
+
diff --git a/tools/bflb_flash_tool/utils/openocd/tgt_702.cfg b/tools/bflb_flash_tool/utils/openocd/tgt_702.cfg
new file mode 100644
index 00000000..b1771666
--- /dev/null
+++ b/tools/bflb_flash_tool/utils/openocd/tgt_702.cfg
@@ -0,0 +1,45 @@
+#target chip
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000e05
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
+$_TARGETNAME.0 configure -work-area-phys 0x22020000 -work-area-size 0x10000 -work-area-backup 1
+#$_TARGETNAME.0 configure -rtos auto
+
+echo "Ready for Remote Connections"
+
+$_TARGETNAME.0 configure -event reset-assert-pre {
+    echo "reset-assert-pre"
+    adapter_khz 100
+}
+
+$_TARGETNAME.0 configure -event reset-deassert-post {
+    echo "reset-deassert-post"
+    adapter_khz 4000
+    reg mstatus 0x7800
+    reg mie 0x0
+#    reg pc 0x22008000
+}
+
+$_TARGETNAME.0 configure -event reset-init {
+    echo "reset-init"
+# 4MHz for FPGA
+    adapter_khz 4000
+}
+
+gdb_memory_map enable
+gdb_flash_program disable
+
+riscv set_prefer_sba on
+riscv set_command_timeout_sec 1
+
+init
+reset init
+
+#jtag arp_init
+
+#resume
+#exit
+
diff --git a/tools/cdk_flashloader/bl70x_flasher.elf b/tools/cdk_flashloader/bl70x_flasher.elf
new file mode 100644
index 00000000..3530563e
Binary files /dev/null and b/tools/cdk_flashloader/bl70x_flasher.elf differ
diff --git a/tools/cmake/compiler_flags.cmake b/tools/cmake/compiler_flags.cmake
new file mode 100644
index 00000000..30763262
--- /dev/null
+++ b/tools/cmake/compiler_flags.cmake
@@ -0,0 +1,91 @@
+#set(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY)
+# Object build options
+# -O0                   No optimizations, reduce compilation time and make debugging produce the expected results.
+# -fno-builtin          Do not use built-in functions provided by GCC.
+# -Wall                 Print only standard warnings, for all use Wextra
+# -ffunction-sections   Place each function item into its own section in the output file.
+# -fdata-sections       Place each data item into its own section in the output file.
+# -fomit-frame-pointer  Omit the frame pointer in functions that don’t need one.
+# -Og   Enables optimizations that do not interfere with debugging.
+# -g    Produce debugging information in the operating system’s native format.
+# -Os   Optimize for size. -Os enables all -O2 optimizations.
+# -flto Runs the standard link-time optimizer.
+
+SET(MARCH "rv32imafc")
+SET(MCPU "riscv-e24")
+SET(MABI "ilp32f")
+SET(MCU_FLAG "-march=${MARCH} -mabi=${MABI}")
+				 
+SET(COMMON_FLAGS "-O2 -g3 -fshort-enums -fno-common \
+-fms-extensions -ffunction-sections -fdata-sections -fstrict-volatile-bitfields \
+-Wall -Wshift-negative-value -Wchar-subscripts -Wformat -Wuninitialized -Winit-self -fno-jump-tables \
+-Wignored-qualifiers -Wswitch-default -Wunused -Wundef -msmall-data-limit=4")
+				 
+# compiler: language specific flags
+set(CMAKE_C_FLAGS "${MCU_FLAG} ${COMMON_FLAGS} -std=c99"  CACHE INTERNAL "c compiler flags")
+set(CMAKE_C_FLAGS_DEBUG "-Og -g" CACHE INTERNAL "c compiler flags: Debug")
+set(CMAKE_C_FLAGS_RELEASE "-Os -flto" CACHE INTERNAL "c compiler flags: Release")
+
+# message("")
+# message("-----------------------------------------------------------------------------------------------------------------------------------------------------")
+# message("Setting C compiler")
+# message("C compiler flags options:   ${CMAKE_C_FLAGS}")
+# message("C compiler debug options: ${CMAKE_C_FLAGS_DEBUG}")
+# message("C compiler release options: ${CMAKE_C_FLAGS_RELEASE}")
+# message("-----------------------------------------------------------------------------------------------------------------------------------------------------")
+
+
+set(CMAKE_CXX_FLAGS "${MCU_FLAG} ${COMMON_FLAGS} -std=c++11 " CACHE INTERNAL "cxx compiler flags")
+set(CMAKE_CXX_FLAGS_DEBUG "-Og -g" CACHE INTERNAL "cxx compiler flags: Debug")
+set(CMAKE_CXX_FLAGS_RELEASE "-Os -flto" CACHE INTERNAL "cxx compiler flags: Release")
+
+# message("")
+# message("-----------------------------------------------------------------------------------------------------------------------------------------------------")
+# message("Setting C++ compiler")
+# message("C++ compiler flags options:   ${CMAKE_CXX_FLAGS}")
+# message("C++ compiler debug options: ${CMAKE_CXX_FLAGS_DEBUG}")
+# message("C++ compiler release options: ${CMAKE_CXX_FLAGS_RELEASE}")
+# message("-----------------------------------------------------------------------------------------------------------------------------------------------------")
+
+
+set(CMAKE_ASM_FLAGS  "${MCU_FLAG} ${COMMON_FLAGS}" CACHE INTERNAL "asm compiler flags")
+set(CMAKE_ASM_FLAGS_DEBUG "-Og -g" CACHE INTERNAL "asm compiler flags: Debug")
+set(CMAKE_ASM_FLAGS_RELEASE "-Os -flto" CACHE INTERNAL "asm compiler flags: Release")
+
+# message("")
+# message("-----------------------------------------------------------------------------------------------------------------------------------------------------")
+# message("Setting ASM compiler")
+# message("ASM compiler flags options:   ${CMAKE_ASM_FLAGS}")
+# message("ASM compiler debug options: ${CMAKE_ASM_FLAGS_DEBUG}")
+# message("ASM compiler release options: ${CMAKE_ASM_FLAGS_RELEASE}")
+# message("-----------------------------------------------------------------------------------------------------------------------------------------------------")
+
+# -Wl,--gc-sections     Perform the dead code elimination.
+# --specs=nano.specs    Link with newlib-nano.
+# --specs=nosys.specs   No syscalls, provide empty implementations for the POSIX system calls.
+
+if(${SUPPORT_SHELL} STREQUAL "ENABLE")
+add_definitions(-DSHELL_SUPPORT)
+else()
+endif()
+
+if(${BOARD} MATCHES "(bl602u.*)")
+set(mcu bl602u)
+
+elseif(${BOARD} MATCHES "(bl602).*")
+set(mcu bl602)
+
+elseif(${BOARD} MATCHES "(bl702|bl704|bl706).*")
+set(mcu bl702)
+
+elseif(${BOARD} MATCHES "(bl606p).*")
+set(mcu bl606p)
+
+else()
+endif()
+
+SET(LINKER_SCRIPT ${CMAKE_SOURCE_DIR}/drivers/${mcu}_driver/${mcu}_flash.ld)
+
+set(CMAKE_EXE_LINKER_FLAGS "${MCU_FLAG} -Wl,--cref -Wl,--gc-sections -nostartfiles -lc -lm -g3  \
+-fms-extensions -ffunction-sections -fdata-sections -Wall -Wchar-subscripts \
+-Wformat -Wuninitialized -Winit-self -Wignored-qualifiers -Wswitch-default -Wunused -Wundef -std=c99" CACHE INTERNAL "Linker options")
diff --git a/tools/cmake/riscv64-unknown-elf-gcc.cmake b/tools/cmake/riscv64-unknown-elf-gcc.cmake
new file mode 100644
index 00000000..15651668
--- /dev/null
+++ b/tools/cmake/riscv64-unknown-elf-gcc.cmake
@@ -0,0 +1,40 @@
+SET(CMAKE_SYSTEM_NAME Generic)
+SET(CMAKE_SYSTEM_VERSION 1)
+set(CMAKE_SYSTEM_PROCESSOR RISCV)
+
+if(MINGW OR CYGWIN OR WIN32)
+    set(WHERE_CMD where)
+    set(TOOLCHAIN_SUFFIX ".exe")
+elseif(UNIX OR APPLE)
+    set(WHERE_CMD which)
+    set(TOOLCHAIN_SUFFIX "")
+endif()
+
+set(TOOLCHAIN_PREFIX riscv64-unknown-elf-)
+
+execute_process(
+  COMMAND ${WHERE_CMD} ${TOOLCHAIN_PREFIX}gcc
+  OUTPUT_VARIABLE TOOLCHAIN_PATH
+  OUTPUT_STRIP_TRAILING_WHITESPACE
+)
+
+message(STATUS "TOOLCHAIN_PATH:${TOOLCHAIN_PATH}")
+# specify cross compilers and tools
+SET(CMAKE_C_COMPILER ${TOOLCHAIN_PREFIX}gcc${TOOLCHAIN_SUFFIX} CACHE INTERNAL "")
+SET(CMAKE_CXX_COMPILER ${TOOLCHAIN_PREFIX}g++${TOOLCHAIN_SUFFIX} CACHE INTERNAL "")
+set(CMAKE_ASM_COMPILER ${TOOLCHAIN_PREFIX}gcc${TOOLCHAIN_SUFFIX} CACHE INTERNAL "")
+set(CMAKE_LINKER ${TOOLCHAIN_PREFIX}ld${TOOLCHAIN_SUFFIX} CACHE INTERNAL "")
+set(CMAKE_OBJCOPY ${TOOLCHAIN_PREFIX}objcopy CACHE INTERNAL "")
+set(CMAKE_OBJDUMP ${TOOLCHAIN_PREFIX}objdump CACHE INTERNAL "")
+set(SIZE ${TOOLCHAIN_PREFIX}size CACHE INTERNAL "")
+
+set(CMAKE_C_COMPILER_WORKS 1)
+set(CMAKE_CXX_COMPILER_WORKS 1)
+
+set(CMAKE_FIND_ROOT_PATH ${TOOLCHAIN_PATH})
+# search for programs in the build host directories
+set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER)
+# for libraries and headers in the target directories
+set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY)
+set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY)
+set(CMAKE_FIND_ROOT_PATH_MODE_PACKAGE ONLY)
diff --git a/tools/cmake/tools.cmake b/tools/cmake/tools.cmake
new file mode 100644
index 00000000..87100aa7
--- /dev/null
+++ b/tools/cmake/tools.cmake
@@ -0,0 +1,193 @@
+function(generate_library)
+    get_filename_component(library_name ${CMAKE_CURRENT_LIST_DIR} NAME)
+    message(STATUS "[register library component: ${library_name} ], path:${CMAKE_CURRENT_LIST_DIR}")
+
+    # Add src to lib
+    if(ADD_SRCS)
+        add_library(${library_name} STATIC ${ADD_SRCS})
+        set(include_type PUBLIC)
+    else()
+        add_library(${library_name} INTERFACE)
+        set(include_type INTERFACE)
+    endif()
+
+    # Add include
+    foreach(include_dir ${ADD_INCLUDE})
+        get_filename_component(abs_dir ${include_dir} ABSOLUTE BASE_DIR ${CMAKE_CURRENT_LIST_DIR})
+        if(NOT IS_DIRECTORY ${abs_dir})
+            message(FATAL_ERROR "${CMAKE_CURRENT_LIST_FILE}: ${include_dir} not found!")
+        endif()
+        target_include_directories(${library_name} ${include_type} ${abs_dir})
+    endforeach()
+
+    # Add private include
+    foreach(include_dir ${ADD_PRIVATE_INCLUDE})
+        if(${include_type} STREQUAL INTERFACE)
+            message(FATAL_ERROR "${CMAKE_CURRENT_LIST_FILE}: ADD_PRIVATE_INCLUDE set but no source file！")
+        endif()
+        get_filename_component(abs_dir ${include_dir} ABSOLUTE BASE_DIR ${CMAKE_CURRENT_LIST_DIR})
+        if(NOT IS_DIRECTORY ${abs_dir})
+            message(FATAL_ERROR "${CMAKE_CURRENT_LIST_FILE}: ${include_dir} not found!")
+        endif()
+        target_include_directories(${library_name} PRIVATE ${abs_dir})
+    endforeach()
+
+    # Add global config include
+    target_include_directories(${library_name} PUBLIC ${global_config_dir})
+
+    # Add requirements
+    target_link_libraries(${library_name} ${ADD_REQUIREMENTS})
+
+    # Add definitions public
+    foreach(difinition ${ADD_DEFINITIONS})
+        target_compile_options(${library_name} PUBLIC ${difinition})
+    endforeach()
+
+    # Add definitions private
+    foreach(difinition ${ADD_DEFINITIONS_PRIVATE})
+        target_compile_options(${library_name} PRIVATE ${difinition})
+    endforeach()
+
+    # Add static lib
+    if(ADD_STATIC_LIB)
+        foreach(lib ${ADD_STATIC_LIB})
+            if(NOT EXISTS "${lib}")
+                prepend(lib_full "${CMAKE_CURRENT_LIST_DIR}/" ${lib})
+                if(NOT EXISTS "${lib_full}")
+                    message(FATAL_ERROR "Can not find ${lib} or ${lib_full}")
+                endif()
+                set(lib ${lib_full})
+            endif()
+            target_link_libraries(${library_name} ${lib})
+        endforeach()
+    endif()
+    # Add dynamic lib
+    if(ADD_DYNAMIC_LIB)
+        set(dynamic_libs ${g_dynamic_libs})
+        foreach(lib ${ADD_DYNAMIC_LIB})
+            if(NOT EXISTS "${lib}")
+                prepend(lib_full "${CMAKE_CURRENT_LIST_DIR}/" ${lib})
+                if(NOT EXISTS "${lib_full}")
+                    message(FATAL_ERROR "Can not find ${lib} or ${lib_full}")
+                endif()
+                set(lib ${lib_full})
+            endif()
+            list(APPEND dynamic_libs ${lib})
+            get_filename_component(lib_dir ${lib} DIRECTORY)
+            get_filename_component(lib_name ${lib} NAME)
+            target_link_libraries(${library_name} -L${lib_dir} ${lib_name})
+        endforeach()
+        set(g_dynamic_libs ${dynamic_libs}  CACHE INTERNAL "g_dynamic_libs")
+    endif()
+endfunction()
+
+function(generate_bin)
+
+    get_filename_component(current_relative_dir_name ${CMAKE_CURRENT_LIST_DIR} NAME)
+
+    #上面写法等价于string(REGEX REPLACE ".*/(.*)" "\\1" current_relative_dir_name ${CMAKE_CURRENT_LIST_DIR})
+    string(REGEX REPLACE "(.*)/${current_relative_dir_name}$" "\\1" above_absolute_dir ${CMAKE_CURRENT_LIST_DIR})
+    
+    get_filename_component(above_relative_dir_name ${above_absolute_dir} NAME)
+
+    set(platform ${CMAKE_SOURCE_DIR}/bsp/bsp_common/platform/bflb_platform.c)
+
+    foreach(mainfile IN LISTS mains)
+    # Get file name without directory
+    get_filename_component(mainname ${mainfile} NAME_WE)
+
+	if(DEFINED OUTPUT)
+        set(OUTPUT_DIR ${OUTPUT})
+        set(target_name firmware)
+    else()
+        if(${above_relative_dir_name} STREQUAL "examples")
+            set(OUTPUT_DIR ${CMAKE_SOURCE_DIR}/out/${current_relative_dir_name})
+            set(target_name ${current_relative_dir_name}_${mainname})
+        else()
+            set(OUTPUT_DIR ${CMAKE_SOURCE_DIR}/out/${above_relative_dir_name}/${current_relative_dir_name})
+            set(target_name ${current_relative_dir_name}_${mainname})
+        endif()
+
+    endif()
+	
+	file(MAKE_DIRECTORY ${OUTPUT_DIR})    
+	set(HEX_FILE ${OUTPUT_DIR}/main.hex)
+    set(BIN_FILE ${OUTPUT_DIR}/main.bin)
+    set(MAP_FILE ${OUTPUT_DIR}/main.map)
+	
+    if(TARGET_REQUIRED_SRCS)
+        list(APPEND SRCS ${TARGET_REQUIRED_SRCS})
+    endif()
+
+    list(APPEND SRCS ${CMAKE_SOURCE_DIR}/bsp/board/${BOARD}/board.c)
+
+    add_executable(${target_name}.elf ${mainfile} ${SRCS} ${platform})
+
+    set_target_properties(${target_name}.elf PROPERTIES LINK_FLAGS "-T${LINKER_SCRIPT}")
+    set_target_properties(${target_name}.elf PROPERTIES LINK_DEPENDS ${LINKER_SCRIPT})
+    set_target_properties(${target_name}.elf PROPERTIES RUNTIME_OUTPUT_DIRECTORY "${OUTPUT_DIR}")
+
+    # Add private include
+    foreach(include_dir ${TARGET_REQUIRED_PRIVATE_INCLUDE})
+        get_filename_component(abs_dir ${include_dir} ABSOLUTE BASE_DIR ${CMAKE_SOURCE_DIR})
+        if(NOT IS_DIRECTORY ${abs_dir})
+            message(FATAL_ERROR "${CMAKE_CURRENT_LIST_FILE}: ${include_dir} not found!")
+        endif()
+        target_include_directories(${target_name}.elf PRIVATE ${abs_dir})
+    endforeach()
+
+    # Add definitions private
+    foreach(difinition ${TARGET_REQUIRED_PRIVATE_OPTIONS})
+        target_compile_options(${target_name}.elf PRIVATE ${difinition})
+    endforeach()   
+    # Add libs
+    target_link_libraries(${target_name}.elf ${mcu}_driver)
+
+    if(${SUPPORT_SHELL} STREQUAL "ENABLE")
+    target_link_libraries(${target_name}.elf shell)
+    else()
+    include_directories(${CMAKE_SOURCE_DIR}/components/shell)
+    endif()
+
+    if(TARGET_REQUIRED_LIBS)
+        target_link_libraries(${target_name}.elf ${TARGET_REQUIRED_LIBS})       
+    endif()
+    
+    target_link_libraries(${target_name}.elf "-Wl,-Map=${MAP_FILE}")
+
+    add_custom_command(TARGET ${target_name}.elf POST_BUILD
+        COMMAND ${CMAKE_OBJCOPY} -Obinary $ ${BIN_FILE}
+        # COMMAND ${CMAKE_OBJCOPY} -Oihex $ ${HEX_FILE}
+        COMMAND ${CMAKE_COMMAND} -E copy ${BIN_FILE} ${CMAKE_SOURCE_DIR}/tools/bflb_flash_tool/img/project.bin
+        COMMENT "Generate ${BIN_FILE}\r\nCopy ${BIN_FILE} into download path")
+    endforeach()
+endfunction(generate_bin)
+
+function(search_application component_path)
+
+if(DEFINED APP)
+
+    file(GLOB_RECURSE cmakelists_files ${component_path}/CMakeLists.txt)
+    set(app_find_ok 0)
+
+    foreach(cmakelists_file ${cmakelists_files})
+    get_filename_component(app_relative_dir ${cmakelists_file} DIRECTORY)
+    get_filename_component(app_name ${app_relative_dir} NAME)
+        if(${APP} STREQUAL "all")
+            message("[run app:${app_name}],path:${app_relative_dir}")
+            add_subdirectory(${app_relative_dir})
+            set(app_find_ok 1)
+        elseif(${app_name} MATCHES "^${APP}")
+            message("[run app:${app_name}],path:${app_relative_dir}")
+            add_subdirectory(${app_relative_dir})
+            set(app_find_ok 1)
+        endif()
+    endforeach()
+    if(NOT app_find_ok)
+    message(FATAL_ERROR "can not find app:${APP}")
+    endif()
+else()
+add_subdirectory($ENV{PROJECT_DIR}/src src)
+endif()
+
+endfunction()
diff --git a/tools/openocd/602.init b/tools/openocd/602.init
new file mode 100644
index 00000000..76910ed8
--- /dev/null
+++ b/tools/openocd/602.init
@@ -0,0 +1,15 @@
+set architecture riscv:rv32
+#target remote :3333
+#set disassemble-next-line on
+set mem inaccessible-by-default off
+#gdb_breakpoint_override [hard|soft|disable]
+
+mem 0x22008000 0x22014000 rw
+mem 0x42008000 0x42014000 rw
+mem 0x22014000 0x22020000 rw
+mem 0x42014000 0x42020000 rw
+mem 0x22020000 0x22030000 rw
+mem 0x42020000 0x42030000 rw
+mem 0x22030000 0x2204C000 rw
+mem 0x42030000 0x4204C000 rw
+mem 0x23000000 0x23400000 ro
diff --git a/tools/openocd/602.svd b/tools/openocd/602.svd
new file mode 100644
index 00000000..63f23bc7
--- /dev/null
+++ b/tools/openocd/602.svd
@@ -0,0 +1,236 @@
+
+
+  bouffalolab
+  bouffalolab
+  602
+  WiFi BT
+  
+  high-performance, 32-bit RV32IMAFC core
+  
+
+  8
+  32
+  32
+  0x00000000
+  0xFFFFFFFF
+
+  
+    602
+    little
+  
+
+  
+
+    
+      CLINT
+      Core Local Interruptor.
+      0x02000000
+      CLINT
+      32
+      read-write
+
+      
+        0
+        0x10000
+        registers
+      
+
+      
+
+        
+          MSIP
+          Machine Software Interrupt Pending Register.
+          0x0000
+        
+
+        
+          MTIMECMP_LO
+          Machine Timer Compare Register Low.
+          0x4000
+        
+
+        
+          MTIMECMP_HI
+          Machine Timer Compare Register High.
+          0x4004
+        
+
+        
+          MTIME_LO
+          Machine Timer Register Low.
+          0xBFF8
+        
+
+        
+          MTIME_HI
+          Machine Timer Register High.
+          0xBFFC
+        
+
+      
+     
+
+    
+      CLIC
+      Core Local Interrupter controller.
+      0x02800000
+      CLIC
+      8
+      read-write
+
+      
+        0
+        0x10000
+        registers
+      
+
+      
+
+        
+          128 
+          1
+          PENDING[%s]
+          CLIC Interrupt Pending Registers.
+          0x0000
+          
+            PENDING00
+          
+        
+
+        
+          128 
+          1
+          ENABLE[%s]
+          CLIC Interrupt enable Registers.
+          0x0400
+          
+            ENABLE00
+          
+        
+
+        
+          128 
+          1
+          INTCFG[%s]
+          CLIC Interrupt config Registers.
+          0x0800
+          
+            INTCFG37
+          
+        
+
+        
+          clic_cfg
+          clic_cfg.
+          0x0C00
+          
+            nvbits00
+            nlbits13
+            nmbits45
+          
+        
+
+      
+     
+
+    
+      GLB
+      GLB.
+      0x40000000
+      GLB
+      32
+      read-write
+
+      
+        0
+        0x1000
+        registers
+      
+
+      
+
+        
+          clk_cfg0
+          clk_cfg0.
+          0x0000
+          
+            pll_en00
+            fclk_en11
+            hclk_en22
+            bclk_en33
+            pll_set45
+            hbn_root_clk_set67
+            hclk_div815
+            bclk_div1623
+            fclk_sw_state2426
+            chip_rdy2727
+            glb_id2831
+          
+        
+
+      
+
+     
+
+    
+      eFuse
+      eFuse Programmable Memory.
+      0x40007000
+      eFuse
+      32
+      read-only
+
+      
+        0
+        0x1000
+        registers
+      
+
+      
+
+        
+          ef_cfg_0
+          ef_cfg_0.
+          0x0000
+          
+            ef_sboot_en45
+            ef_boot_sel811
+            ef_cpu0_enc_en77
+            ef_cpu1_enc_en66
+            ef_sboot_en45
+            ef_sboot_sign_mode23
+            ef_sf_aes_mode01
+          
+        
+
+        
+          ef_wifi_mac_low
+          ef_wifi_mac_low.
+          0x0014
+          
+            mac_addr1031
+          
+        
+
+        
+          ef_wifi_mac_high
+          ef_wifi_mac_high.
+          0x0018
+          
+            dev_info73131
+            dev_info63030
+            dev_info52929
+            dev_info4_32728
+            dev_info2_02426
+            cust_id1_02223
+            mac_addr1_crc5_01621
+            mac_addr1015
+          
+        
+
+      
+
+     
+
+  
+
diff --git a/tools/openocd/702.init b/tools/openocd/702.init
new file mode 100644
index 00000000..76910ed8
--- /dev/null
+++ b/tools/openocd/702.init
@@ -0,0 +1,15 @@
+set architecture riscv:rv32
+#target remote :3333
+#set disassemble-next-line on
+set mem inaccessible-by-default off
+#gdb_breakpoint_override [hard|soft|disable]
+
+mem 0x22008000 0x22014000 rw
+mem 0x42008000 0x42014000 rw
+mem 0x22014000 0x22020000 rw
+mem 0x42014000 0x42020000 rw
+mem 0x22020000 0x22030000 rw
+mem 0x42020000 0x42030000 rw
+mem 0x22030000 0x2204C000 rw
+mem 0x42030000 0x4204C000 rw
+mem 0x23000000 0x23400000 ro
diff --git a/tools/openocd/bl70x_gdb.init b/tools/openocd/bl70x_gdb.init
new file mode 100644
index 00000000..af3fbcc9
--- /dev/null
+++ b/tools/openocd/bl70x_gdb.init
@@ -0,0 +1,20 @@
+set mem inaccessible-by-default off
+set architecture riscv:rv32
+set remotetimeout 250
+
+
+set $pc=0x21000000
+set $mie=0
+set $mstatus=0x1880
+
+mem 0x22008000 0x22014000 rw
+mem 0x42008000 0x42014000 rw
+mem 0x22014000 0x22020000 rw
+mem 0x42014000 0x42020000 rw
+mem 0x22020000 0x22030000 rw
+mem 0x42020000 0x42030000 rw
+mem 0x22030000 0x2204C000 rw
+mem 0x42030000 0x4204C000 rw
+mem 0x23000000 0x23400000 ro
+
+
diff --git a/tools/openocd/eclipse_settings_debugger.jpg b/tools/openocd/eclipse_settings_debugger.jpg
new file mode 100644
index 00000000..2f84af83
Binary files /dev/null and b/tools/openocd/eclipse_settings_debugger.jpg differ
diff --git a/tools/openocd/eclipse_settings_startup_RAM.jpg b/tools/openocd/eclipse_settings_startup_RAM.jpg
new file mode 100644
index 00000000..2e0c6043
Binary files /dev/null and b/tools/openocd/eclipse_settings_startup_RAM.jpg differ
diff --git a/tools/openocd/if_bflb_dbg.cfg b/tools/openocd/if_bflb_dbg.cfg
new file mode 100644
index 00000000..9f754f8d
--- /dev/null
+++ b/tools/openocd/if_bflb_dbg.cfg
@@ -0,0 +1,16 @@
+# BouffaloLab USB-JTAG/TTL adapter
+interface ftdi
+ftdi_vid_pid 0x0403 0x6010
+
+ftdi_channel 1
+ftdi_tdo_sample_edge falling
+transport select jtag
+adapter_khz     10000
+
+ftdi_layout_init 0x00f8 0x00fb
+#ftdi_layout_signal nTRST -data 0x0400
+#ftdi_layout_signal nSRST -ndata 0x0020
+
+#reset_config srst_only srst_push_pull
+#adapter_nsrst_delay 100
+#adapter_nsrst_assert_width 100
diff --git a/tools/openocd/if_bflb_link.cfg b/tools/openocd/if_bflb_link.cfg
new file mode 100644
index 00000000..5de10689
--- /dev/null
+++ b/tools/openocd/if_bflb_link.cfg
@@ -0,0 +1,16 @@
+# BouffaloLab USB-JTAG/TTL adapter
+interface ftdi
+ftdi_vid_pid 0x0403 0x6010
+
+ftdi_channel 1
+ftdi_tdo_sample_edge falling
+transport select jtag
+adapter_khz     30000
+
+ftdi_layout_init 0x00f8 0x00fb
+#ftdi_layout_signal nTRST -data 0x0400
+#ftdi_layout_signal nSRST -ndata 0x0020
+
+#reset_config srst_only srst_push_pull
+#adapter_nsrst_delay 100
+#adapter_nsrst_assert_width 100
diff --git a/tools/openocd/if_ft2232d.cfg b/tools/openocd/if_ft2232d.cfg
new file mode 100644
index 00000000..1146ec73
--- /dev/null
+++ b/tools/openocd/if_ft2232d.cfg
@@ -0,0 +1,15 @@
+# USB-JTAG/TTL based on FT2232D
+interface ftdi
+ftdi_vid_pid 0x0403 0x6010
+
+ftdi_channel 0
+transport select jtag
+adapter_khz     2000
+
+ftdi_layout_init 0x0508 0x0f2b
+#ftdi_layout_signal nTRST -data 0x0400
+ftdi_layout_signal nSRST -ndata 0x0020
+
+reset_config srst_only srst_push_pull
+adapter_nsrst_delay 100
+adapter_nsrst_assert_width 100
diff --git a/tools/openocd/if_jlink.cfg b/tools/openocd/if_jlink.cfg
new file mode 100644
index 00000000..34e8d2c8
--- /dev/null
+++ b/tools/openocd/if_jlink.cfg
@@ -0,0 +1,7 @@
+# USB-JTAG/TTL based on FT2232D
+interface jlink
+
+transport select jtag
+adapter_khz      12000
+
+
diff --git a/tools/openocd/jtag_help.txt b/tools/openocd/jtag_help.txt
new file mode 100644
index 00000000..54c218d8
--- /dev/null
+++ b/tools/openocd/jtag_help.txt
@@ -0,0 +1,15 @@
+/*************************************************************************************************/
+ reg         --- show all registers
+ reg pc      --- show register pc
+ reg a0 0    --- set register x1 to 0
+ mdw         --- Memory Dump Word
+ mww         --- Memory Write Word
+ help mww    --- Show help info of command "mww"
+ dump_image  --- dump image from memory to file
+ load_image  --- load image from file to memory
+ halt        --- stop core
+ step        --- execute instructions
+ run         --- let the target run
+ bp          --- set breakpoint
+ help        --- Show all help info
+/*************************************************************************************************/
diff --git a/tools/openocd/openocd-usb-sipeed-xip.cfg b/tools/openocd/openocd-usb-sipeed-xip.cfg
new file mode 100644
index 00000000..1deb31d2
--- /dev/null
+++ b/tools/openocd/openocd-usb-sipeed-xip.cfg
@@ -0,0 +1,40 @@
+# SiPEED USB-JTAG/TTL based on FT2232D
+interface ftdi
+ftdi_vid_pid 0x0403 0x6010
+# http://blog.sipeed.com/p/727.html
+ftdi_channel 0
+transport select jtag
+adapter_khz     10000
+
+ftdi_layout_init 0x0508 0x0f1b
+ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100
+ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400
+
+set _CHIPNAME riscv
+#jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000001
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x0
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
+#$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
+#$_TARGETNAME.0 configure -work-area-phys 0x50000000 -work-area-size 32768 -work-area-backup 0
+
+echo "SiPEED USB-JTAG/TTL Ready for Remote Connections"
+
+proc install_bootrom {} {
+#    sleep 1000
+    init
+    reset init
+    load_image chiptest_bootrom.bin 0x21000000 bin
+    sleep 500
+    reg pc 0x21000000
+#    sleep 500
+#    bp 0x21002f0c 4 hw
+#    resume
+}
+
+echo "Start loading BOOTROM under project folder"
+install_bootrom
+echo "flash the XIP code before debugging"
+echo "ONLY load symbol in GDB"
+echo "use [gdb_breakpoint_override hard] for XIP debugging"
diff --git a/tools/openocd/openocd-usb-sipeed.cfg b/tools/openocd/openocd-usb-sipeed.cfg
new file mode 100644
index 00000000..b2460328
--- /dev/null
+++ b/tools/openocd/openocd-usb-sipeed.cfg
@@ -0,0 +1,24 @@
+# SiPEED USB-JTAG/TTL based on FT2232D
+interface ftdi
+ftdi_vid_pid 0x0403 0x6010
+# http://blog.sipeed.com/p/727.html
+ftdi_channel 0
+transport select jtag
+adapter_khz     1000
+
+ftdi_layout_init 0x0508 0x0f1b
+ftdi_layout_signal nTRST -data 0x0200 -noe 0x0100
+ftdi_layout_signal nSRST -data 0x0800 -noe 0x0400
+
+set _CHIPNAME riscv
+#jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000001
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x0
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
+#$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
+#$_TARGETNAME.0 configure -work-area-phys 0x50000000 -work-area-size 32768 -work-area-backup 0
+
+riscv set_prefer_sba on
+
+echo "SiPEED USB-JTAG/TTL Ready for Remote Connections"
diff --git a/tools/openocd/sifive-e2-ftdi.cfg b/tools/openocd/sifive-e2-ftdi.cfg
new file mode 100644
index 00000000..59a20eab
--- /dev/null
+++ b/tools/openocd/sifive-e2-ftdi.cfg
@@ -0,0 +1,23 @@
+# JTAG adapter setup
+
+interface ftdi
+ftdi_vid_pid 0x0403 0x6010
+# ftdi_channel 0 is port ADBUS, ftdi_channel 1 is port BDBUS.
+ftdi_channel 1
+transport select jtag
+adapter_khz     1000
+
+ftdi_layout_init 0x00f8 0x00fb
+ftdi_layout_signal nSRST -oe 0x0040
+ftdi_layout_signal nTRST -oe 0x0010
+
+set _CHIPNAME riscv
+#jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000001
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x0
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
+#$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
+#$_TARGETNAME.0 configure -work-area-phys 0x50000000 -work-area-size 32768 -work-area-backup 0
+
+echo "Ready for Remote Connections"
diff --git a/tools/openocd/tgt_602.cfg b/tools/openocd/tgt_602.cfg
new file mode 100644
index 00000000..53c813ba
--- /dev/null
+++ b/tools/openocd/tgt_602.cfg
@@ -0,0 +1,45 @@
+#target chip
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000c05
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
+$_TARGETNAME.0 configure -work-area-phys 0x22020000 -work-area-size 0x10000 -work-area-backup 1
+#$_TARGETNAME.0 configure -rtos auto
+
+echo "Ready for Remote Connections"
+
+$_TARGETNAME.0 configure -event reset-assert-pre {
+    echo "reset-assert-pre"
+    adapter_khz 100
+}
+
+$_TARGETNAME.0 configure -event reset-deassert-post {
+    echo "reset-deassert-post"
+    adapter_khz 4000
+    reg mstatus 0x7800
+    reg mie 0x0
+#    reg pc 0x22008000
+}
+
+$_TARGETNAME.0 configure -event reset-init {
+    echo "reset-init"
+# 4MHz for FPGA
+    adapter_khz 4000
+}
+
+gdb_memory_map enable
+gdb_flash_program disable
+
+riscv set_prefer_sba on
+riscv set_command_timeout_sec 1
+
+init
+reset init
+
+#jtag arp_init
+
+#resume
+#exit
+
diff --git a/tools/openocd/tgt_702.cfg b/tools/openocd/tgt_702.cfg
new file mode 100644
index 00000000..a3b46560
--- /dev/null
+++ b/tools/openocd/tgt_702.cfg
@@ -0,0 +1,45 @@
+#target chip
+
+set _CHIPNAME riscv
+jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000e05
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
+$_TARGETNAME.0 configure -work-area-phys 0x22020000 -work-area-size 0x10000 -work-area-backup 1
+#$_TARGETNAME.0 configure -rtos auto
+
+echo "Ready for Remote Connections"
+
+$_TARGETNAME.0 configure -event reset-assert-pre {
+    echo "reset-assert-pre"
+    adapter_khz 100
+}
+
+$_TARGETNAME.0 configure -event reset-deassert-post {
+    echo "reset-deassert-post"
+    adapter_khz 4000
+    reg mstatus 0x7800
+    reg mie 0x0
+#    reg pc 0x22008000
+}
+
+$_TARGETNAME.0 configure -event reset-init {
+    echo "reset-init"
+# 4MHz for FPGA
+    adapter_khz 4000
+}
+
+gdb_memory_map enable
+gdb_flash_program disable
+
+riscv set_prefer_sba on
+riscv set_command_timeout_sec 1
+
+init
+reset init
+
+#jtag arp_init
+
+#resume
+#exit
+