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[feat] add XXX_DEV definition

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This commit is contained in:
jzlv 2021-04-27 12:32:11 +08:00
parent 8f7b0919fd
commit 72ccc03bf9
23 changed files with 751 additions and 236 deletions
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36
drivers/bl702_driver/bl702_flash.ld
View File

@ -1,9 +1,9 @@
/****************************************************************************************
* @file map.txt
* @file bl702_flash.ld
*
* @brief This file is the map file (gnuarm or armgcc).
*
* Copyright (C) BouffaloLab 2018
* Copyright (C) BouffaloLab 2021
*
****************************************************************************************
*/
@ -56,14 +56,14 @@ SECTIONS
*(.text.*)
/*put .rodata**/
*(EXCLUDE_FILE( *bl602_glb.o \
*bl602_pds.o \
*bl602_common.o \
*bl602_sf_cfg.o \
*bl602_sf_ctrl.o \
*bl602_sflash.o \
*bl602_xip_sflash.o \
*bl602_ef_ctrl.o) .rodata*)
*(EXCLUDE_FILE( *bl702_glb.o \
*bl702_pds.o \
*bl702_common.o \
*bl702_sf_cfg.o \
*bl702_sf_ctrl.o \
*bl702_sflash.o \
*bl702_xip_sflash.o \
*bl702_ef_ctrl.o) .rodata*)
*(.rodata)
*(.rodata.*)
@ -87,14 +87,14 @@ SECTIONS
*(.sclock_rlt_code)
*(.sclock_rlt_const)
*bl602_glb.o*(.rodata*)
*bl602_pds.o*(.rodata*)
*bl602_common.o*(.rodata*)
*bl602_sf_cfg.o*(.rodata*)
*bl602_sf_ctrl.o*(.rodata*)
*bl602_sflash.o*(.rodata*)
*bl602_xip_sflash.o*(.rodata*)
*bl602_ef_ctrl.o*(.rodata*)
*bl702_glb.o*(.rodata*)
*bl702_pds.o*(.rodata*)
*bl702_common.o*(.rodata*)
*bl702_sf_cfg.o*(.rodata*)
*bl702_sf_ctrl.o*(.rodata*)
*bl702_sflash.o*(.rodata*)
*bl702_xip_sflash.o*(.rodata*)
*bl702_ef_ctrl.o*(.rodata*)
. = ALIGN(4);
__tcm_code_end__ = .;

6
drivers/bl702_driver/hal_drv/default_config/timer_config.h Normal file
View File

@ -0,0 +1,6 @@
#ifndef _TIMER_CONFIG_H
#define _TIMER_CONFIG_H
#define TIMER_CLK_SRC (0)
#endif

2
drivers/bl702_driver/hal_drv/inc/hal_adc.h
View File

@ -123,6 +123,8 @@ typedef struct adc_device
adc_data_width_t resWidth;
} adc_device_t;
#define ADC_DEV(dev) ((adc_device_t*)dev)
int adc_register(enum adc_index_type index, const char *name, uint16_t flag, adc_user_cfg_t *adc_user_cfg);
#endif

3
drivers/bl702_driver/hal_drv/inc/hal_dac.h
View File

@ -26,8 +26,6 @@
#include "drv_device.h"
#include "bl702_config.h"
#define DEVICE_CTRL_DAC_ATTACH_TX_DMA 0x12
enum dac_index_type
{
#ifdef BSP_USING_DAC0
@ -67,6 +65,7 @@ typedef struct dac_device
void* tx_dma;
} dac_device_t;
#define DAC_DEV(dev) ((adc_device_t*)dev)
int dac_register(enum dac_index_type index, const char *name, uint16_t flag);

18
drivers/bl702_driver/hal_drv/inc/hal_dma.h
View File

@ -26,10 +26,10 @@
#include "drv_device.h"
#include "bl702_config.h"
#define DMA_CHANNEL_GET_STATUS_CMD 0x10
#define DMA_CHANNEL_START_CMD 0x11
#define DMA_CHANNEL_STOP_CMD 0x12
#define DMA_CHANNEL_UPDATE_CMD 0x13
#define DMA_CHANNEL_GET_STATUS 0x10
#define DMA_CHANNEL_START 0x11
#define DMA_CHANNEL_STOP 0x12
#define DMA_CHANNEL_UPDATE 0x13
enum dma_index_type
{
@ -60,10 +60,10 @@ enum dma_index_type
DMA_MAX_INDEX
};
#define dma_channel_start(dev) device_control(dev,DMA_CHANNEL_START_CMD,NULL)
#define dma_channel_stop(dev) device_control(dev,DMA_CHANNEL_STOP_CMD,NULL)
#define dma_channel_update(dev,list) device_control(dev,DMA_CHANNEL_UPDATE_CMD,list)
#define dma_channel_check_busy(dev) device_control(dev,DMA_CHANNEL_GET_STATUS_CMD,NULL)
#define dma_channel_start(dev) device_control(dev,DMA_CHANNEL_START,NULL)
#define dma_channel_stop(dev) device_control(dev,DMA_CHANNEL_STOP,NULL)
#define dma_channel_update(dev,list) device_control(dev,DMA_CHANNEL_UPDATE,list)
#define dma_channel_check_busy(dev) device_control(dev,DMA_CHANNEL_GET_STATUS,NULL)
#define DMA_ADDR_UART0_TDR (0x4000A000+0x88)
#define DMA_ADDR_UART0_RDR (0x4000A000+0x8C)
@ -185,6 +185,8 @@ typedef struct dma_device
dma_lli_ctrl_t *lli_cfg;
} dma_device_t;
#define DMA_DEV(dev) ((dma_device_t*)dev)
int dma_register(enum dma_index_type, const char *name, uint16_t flag);
int dma_reload(struct device *dev, uint32_t src_addr, uint32_t dst_addr, uint32_t transfer_size);
int dma_allocate_register(const char *name, uint16_t flag);

34
drivers/bl702_driver/hal_drv/inc/hal_flash.h Normal file
View File

@ -0,0 +1,34 @@
/**
* @file hal_flash.h
* @brief
*
* Copyright 2019-2030 Bouffalolab team
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*/
#ifndef __HAL_FLASH__H__
#define __HAL_FLASH__H__
#include "drv_device.h"
#define FLASH_NOT_DETECT 0x10
int flash_erase(uint32_t addr, uint32_t size);
int flash_read(uint32_t addr, uint8_t *data, uint32_t size);
int flash_write(uint32_t addr, uint8_t *data, uint32_t size);
#endif

4
drivers/bl702_driver/hal_drv/inc/hal_i2c.h
View File

@ -65,7 +65,9 @@ typedef struct i2c_device
uint32_t phase;
} i2c_device_t;
#define I2C_DEV(dev) ((i2c_device_t*)dev)
int i2c_register(enum i2c_index_type index, const char *name, uint16_t flag);
uint32_t i2c_transfer(struct device *dev, i2c_msg_t msgs[], uint32_t num);
int i2c_transfer(struct device *dev, i2c_msg_t msgs[], uint32_t num);
#endif

2
drivers/bl702_driver/hal_drv/inc/hal_i2s.h
View File

@ -116,6 +116,8 @@ typedef struct i2s_device
void* rx_dma;
} i2s_device_t;
#define UART_DEV(dev) ((uart_device_t*)dev)
int i2s_register(enum i2s_index_type index,const char *name,uint16_t flag);
#endif

23
drivers/bl702_driver/hal_drv/inc/hal_pwm.h
View File

@ -29,20 +29,20 @@
enum pwm_index_type
{
#ifdef BSP_USING_UART0
PWM0_INDEX,
#ifdef BSP_USING_PWM_CH0
PWM_CH0_INDEX,
#endif
#ifdef BSP_USING_UART1
PWM1_INDEX,
#ifdef BSP_USING_PWM_CH1
PWM_CH1_INDEX,
#endif
#ifdef BSP_USING_UART2
PWM2_INDEX,
#ifdef BSP_USING_PWM_CH2
PWM_CH2_INDEX,
#endif
#ifdef BSP_USING_UART3
PWM3_INDEX,
#ifdef BSP_USING_PWM_CH3
PWM_CH3_INDEX,
#endif
#ifdef BSP_USING_UART4
PWM4_INDEX,
#ifdef BSP_USING_PWM_CH4
PWM_CH4_INDEX,
#endif
PWM_MAX_INDEX
};
@ -60,7 +60,8 @@ typedef struct pwm_device
uint8_t dutyCycle;
} pwm_device_t;
#define PWM_DEV(dev) ((pwm_device_t*)dev)
void pwm_register(enum pwm_index_type index, const char *name, uint16_t flag);
int pwm_register(enum pwm_index_type index, const char *name, uint16_t flag);
#endif

7
drivers/bl702_driver/hal_drv/inc/hal_spi.h
View File

@ -26,9 +26,7 @@
#include "drv_device.h"
#include "bl702_config.h"
#define DEVICE_CTRL_SPI_ATTACH_TX_DMA_CMD 0x10
#define DEVICE_CTRL_SPI_ATTACH_RX_DMA_CMD 0x11
#define DEVICE_CTRL_SPI_CONFIG_CLOCK_CMD 0x12
#define DEVICE_CTRL_SPI_CONFIG_CLOCK 0x10
enum spi_index_type
{
@ -92,9 +90,12 @@ typedef struct spi_device
void* rx_dma;
} spi_device_t;
#define SPI_DEV(dev) ((spi_device_t*)dev)
int spi_register(enum spi_index_type index, const char *name, uint16_t flag);
int spi_transmit(struct device *dev, void *buffer, uint32_t size, uint8_t type);
int spi_receive(struct device *dev, void *buffer, uint32_t size, uint8_t type);
int spi_transmit_receive(struct device *dev, const void *send_buf, void *recv_buf, uint32_t length, uint8_t type);
#endif

60
drivers/bl702_driver/hal_drv/inc/hal_timer.h
View File

@ -26,15 +26,69 @@
#include "drv_device.h"
#include "bl702_config.h"
enum timer_index_type
{
#ifdef BSP_USING_TIMER_CH0
TIMER_CH0_INDEX,
#endif
#ifdef BSP_USING_TIMER_CH1
TIMER_CH1_INDEX,
#endif
TIMER_MAX_INDEX
};
enum timer_event_type
{
TIMER_EVENT_COMP0,
TIMER_EVENT_COMP1,
TIMER_EVENT_COMP2,
TIMER_EVENT_UNKNOWN
};
enum timer_it_type
{
TIMER_COMP0_IT = 1 << 0,
TIMER_COMP1_IT = 1 << 1,
TIMER_COMP2_IT = 1 << 2,
TIMER_ALL_IT = 1 << 3
};
typedef enum{
TIMER_CLK_FCLK,
TIMER_CLK_32K,
TIMER_CLK_1K,
TIMER_CLK_XTAL,
}timer_clk_src_t;
typedef enum{
TIMER_PL_TRIG_NONE,
TIMER_PL_TRIG_COMP0,
TIMER_PL_TRIG_COMP1,
TIMER_PL_TRIG_COMP2,
}timer_pl_trig_t;
typedef enum{
TIMER_CNT_PRELOAD,
TIMER_CNT_FREERUN,
}timer_cnt_mode;
typedef struct {
uint32_t timeout_val;
}timer_user_cfg_t;
typedef struct timer_device
{
struct device parent;
// TIMER_CFG_Type *timerAttr;
uint8_t id;
uint8_t ch;
uint8_t clk_div;
timer_cnt_mode cnt_mode;
timer_pl_trig_t pl_trig_src;
} timer_device_t;
void timer_register(timer_device_t *device, const char *name, uint16_t flag);
#define TIMER_DEV(dev) ((timer_device_t*)dev)
int timer_register(enum timer_index_type index, const char *name, uint16_t flag, timer_user_cfg_t *timer_user_cfg);
extern timer_device_t timerx_device;
#endif

4
drivers/bl702_driver/hal_drv/inc/hal_uart.h
View File

@ -28,8 +28,6 @@
#define DEVICE_CTRL_UART_GET_TX_FIFO 0x10
#define DEVICE_CTRL_UART_GET_RX_FIFO 0x11
#define DEVICE_CTRL_UART_ATTACH_TX_DMA 0x12
#define DEVICE_CTRL_UART_ATTACH_RX_DMA 0x13
enum uart_index_type
{
@ -132,6 +130,8 @@ typedef struct uart_device
void* rx_dma;
} uart_device_t;
#define UART_DEV(dev) ((uart_device_t*)dev)
int uart_register(enum uart_index_type index, const char *name, uint16_t flag);
#endif

9
drivers/bl702_driver/hal_drv/inc/hal_usb.h
View File

@ -35,8 +35,9 @@
#define DEVICE_CTRL_USB_DC_GET_STALL 0X15
#define DEVICE_CTRL_USB_DC_CLR_NACK 0X16
#define DEVICE_CTRL_USB_DC_CHECK_EPCAP 0X17
#define DEVICE_CTRL_USB_DC_TX_FIFO_CNT_GET 0x18
#define DEVICE_CTRL_USB_DC_RX_FIFO_CNT_GET 0x19
#define DEVICE_CTRL_USB_DC_GET_TX_FIFO_CNT 0x18
#define DEVICE_CTRL_USB_DC_GET_RX_FIFO_CNT 0x19
#define DEVICE_CTRL_USB_DC_GET_EP_FREE 0x20
enum usb_index_type
{
@ -214,7 +215,7 @@ int usb_dc_ep_open(struct device *dev, const struct usb_dc_ep_cfg *ep_cfg);
int usb_dc_ep_is_stalled(struct device *dev, const uint8_t ep, uint8_t *stalled);
int usb_dc_ep_write(struct device *dev, const uint8_t ep, const uint8_t *data, uint32_t data_len, uint32_t *ret_bytes);
int usb_dc_ep_read(struct device *dev, const uint8_t ep, uint8_t *data, uint32_t data_len, uint32_t *read_bytes);
uint16_t usb_dc_receive_to_ringbuffer(struct device *dev,Ring_Buffer_Type* rb,uint8_t ep);
uint16_t usb_dc_send_from_ringbuffer(struct device *dev,Ring_Buffer_Type* rb,uint8_t ep);
int usb_dc_receive_to_ringbuffer(struct device *dev,Ring_Buffer_Type* rb,uint8_t ep);
int usb_dc_send_from_ringbuffer(struct device *dev,Ring_Buffer_Type* rb,uint8_t ep);
#endif

2
drivers/bl702_driver/hal_drv/src/hal_dac.c
View File

@ -157,7 +157,7 @@ int dac_control(struct device *dev, int cmd, void *args)
case DEVICE_CTRL_SUSPEND /* constant-expression */:
break;
case DEVICE_CTRL_DAC_ATTACH_TX_DMA /* constant-expression */:
case DEVICE_CTRL_ATTACH_TX_DMA /* constant-expression */:
dac_device->tx_dma = (struct device *)args;
break;
default:

8
drivers/bl702_driver/hal_drv/src/hal_dma.c
View File

@ -139,15 +139,15 @@ int dma_control(struct device *dev, int cmd, void *args)
break;
}
case DMA_CHANNEL_UPDATE_CMD:
case DMA_CHANNEL_UPDATE:
DMA_LLI_Update(dma_device->ch, (uint32_t)args);
break;
case DMA_CHANNEL_GET_STATUS_CMD /* constant-expression */:
case DMA_CHANNEL_GET_STATUS /* constant-expression */:
return DMA_Channel_Is_Busy(dma_device->ch);
case DMA_CHANNEL_START_CMD /* constant-expression */:
case DMA_CHANNEL_START /* constant-expression */:
DMA_Channel_Enable(dma_device->ch);
break;
case DMA_CHANNEL_STOP_CMD /* constant-expression */:
case DMA_CHANNEL_STOP /* constant-expression */:
DMA_Channel_Disable(dma_device->ch);
break;
default:

108
drivers/bl702_driver/hal_drv/src/hal_flash.c Normal file
View File

@ -0,0 +1,108 @@
/**
* @file hal_flash.c
* @brief
*
* Copyright 2019-2030 Bouffalolab team
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
*/
#include "bl702_xip_sflash.h"
#include "bl702_sf_cfg.h"
#include "bl702_glb.h"
#include "hal_flash.h"
/**
* @brief erase flash memory addr should be 4k aligned or will erase more than size Byte
* each block have 4K Byte
*
* @param addr flash memory block addr
* @param size erase bytes number
* @return int success or not
*/
int flash_erase(uint32_t addr, uint32_t size)
{
SPI_Flash_Cfg_Type flashCfg;
uint32_t ret = 0;
XIP_SFlash_Opt_Enter();
ret = SF_Cfg_Flash_Identify(1, 1, 0, 0, &flashCfg);
XIP_SFlash_Opt_Exit();
if ((ret & BFLB_FLASH_ID_VALID_FLAG) == 0)
{
return -FLASH_NOT_DETECT;
}
XIP_SFlash_Erase_With_Lock(&flashCfg, SF_CTRL_DO_MODE, addr, size - 1);
return 0;
}
/**
* @brief read data form flash
*
* @param addr read flash addr
* @param data read data pointer
* @param size read data size
* @return int
*/
int flash_read(uint32_t addr, uint8_t *data, uint32_t size)
{
SPI_Flash_Cfg_Type flashCfg;
uint32_t ret = 0;
XIP_SFlash_Opt_Enter();
ret = SF_Cfg_Flash_Identify(1, 1, 0, 0, &flashCfg);
XIP_SFlash_Opt_Exit();
if ((ret & BFLB_FLASH_ID_VALID_FLAG) == 0)
{
return -FLASH_NOT_DETECT;
}
XIP_SFlash_Read_With_Lock(&flashCfg, SF_CTRL_DO_MODE, addr, data, size);
return 0;
}
/**
* @brief write data to flash
*
* @param addr write flash addr
* @param data write data pointer
* @param size write data size
* @return int
*/
int flash_write(uint32_t addr, uint8_t *data, uint32_t size)
{
SPI_Flash_Cfg_Type flashCfg;
uint32_t ret = 0;
XIP_SFlash_Opt_Enter();
ret = SF_Cfg_Flash_Identify(1, 1, 0, 0, &flashCfg);
XIP_SFlash_Opt_Exit();
if ((ret & BFLB_FLASH_ID_VALID_FLAG) == 0)
{
return -FLASH_NOT_DETECT;
}
XIP_SFlash_Write_With_Lock(&flashCfg, SF_CTRL_DO_MODE, addr, data, size);
return 0;
}

2
drivers/bl702_driver/hal_drv/src/hal_i2c.c
View File

@ -138,7 +138,7 @@ int i2c_register(enum i2c_index_type index, const char *name, uint16_t flag)
* @param num
* @return uint32_t
*/
uint32_t i2c_transfer(struct device *dev, i2c_msg_t msgs[], uint32_t num)
int i2c_transfer(struct device *dev, i2c_msg_t msgs[], uint32_t num)
{
i2c_msg_t *msg;
I2C_Transfer_Cfg i2cCfg;

3
drivers/bl702_driver/hal_drv/src/hal_i2s.c
View File

@ -39,6 +39,9 @@ int i2s_open(struct device *dev, uint16_t oflag)
I2S_CFG_Type i2sCfg;
I2S_FifoCfg_Type fifoCfg;
GLB_Set_Chip_Out_0_CLK_Sel(GLB_CHIP_CLK_OUT_I2S_REF_CLK);
GLB_Set_I2S_CLK(ENABLE,GLB_I2S_OUT_REF_CLK_SRC);
/*Finding the right frequency*/
if(12288000 %(i2s_device->sampl_freq_hz) == 0)
{

29
drivers/bl702_driver/hal_drv/src/hal_pwm.c
View File

@ -25,24 +25,23 @@
#include "bl702_pwm.h"
#include "bl702_gpio.h"
#include "bl702_glb.h"
#include "bl702_config.h"
#include "pwm_config.h"
pwm_device_t pwmx_device[PWM_MAX_INDEX] = {
#ifdef BSP_USING_PWM0
PWM_CONFIG_0,
#ifdef BSP_USING_PWM_CH0
PWM_CH0_CONFIG,
#endif
#ifdef BSP_USING_PWM1
PWM_CONFIG_1,
#ifdef BSP_USING_PWM_CH1
PWM_CH1_CONFIG,
#endif
#ifdef BSP_USING_PWM2
PWM_CONFIG_2,
#ifdef BSP_USING_PWM_CH2
PWM_CH2_CONFIG,
#endif
#ifdef BSP_USING_PWM3
PWM_CONFIG_3,
#ifdef BSP_USING_PWM_CH3
PWM_CH3_CONFIG,
#endif
#ifdef BSP_USING_PWM4
PWM_CONFIG_4,
#ifdef BSP_USING_PWM_CH4
PWM_CH4_CONFIG,
#endif
};
@ -56,7 +55,6 @@ static void pwm_set(struct device *dev, PWM_CH_CFG_Type * pwmCfg ,uint32_t freq
pwm_device_t *pwm_device = (pwm_device_t *)dev;
switch(unit)
{
case HZ:
@ -183,10 +181,13 @@ int pwm_control(struct device *dev, int cmd, void *args)
}
void pwm_register(enum pwm_index_type index, const char *name, uint16_t flag)
int pwm_register(enum pwm_index_type index, const char *name, uint16_t flag)
{
struct device *dev;
if (PWM_MAX_INDEX == 0)
return -DEVICE_EINVAL;
dev = &(pwmx_device[index].parent);
dev->open = pwm_open;
@ -199,5 +200,5 @@ void pwm_register(enum pwm_index_type index, const char *name, uint16_t flag)
dev->type = DEVICE_CLASS_PWM;
dev->handle = NULL;
device_register(dev, name, flag);
return device_register(dev, name, flag);
}

38
drivers/bl702_driver/hal_drv/src/hal_spi.c
View File

@ -83,8 +83,8 @@ int spi_open(struct device *dev, uint16_t oflag)
}
else
{
clockCfg.dataPhase0Len = length % 2;
clockCfg.dataPhase1Len = length / 2;
clockCfg.dataPhase0Len = length / 2;
clockCfg.dataPhase1Len = length / 2 + 1;
}
SPI_ClockConfig(spi_device->id, &clockCfg);
@ -193,15 +193,43 @@ int spi_control(struct device *dev, int cmd, void *args)
case DEVICE_CTRL_CONFIG /* constant-expression */:
/* code */
break;
case DEVICE_CTRL_SPI_ATTACH_TX_DMA_CMD /* constant-expression */:
case DEVICE_CTRL_ATTACH_TX_DMA /* constant-expression */:
spi_device->tx_dma = (struct device *)args;
break;
case DEVICE_CTRL_SPI_ATTACH_RX_DMA_CMD /* constant-expression */:
case DEVICE_CTRL_ATTACH_RX_DMA /* constant-expression */:
spi_device->rx_dma = (struct device *)args;
break;
case DEVICE_CTRL_SPI_CONFIG_CLOCK_CMD /* constant-expression */:
case DEVICE_CTRL_SPI_CONFIG_CLOCK /* constant-expression */:
SPI_SetClock(spi_device->id,(uint32_t)args);
break;
case DEVICE_CTRL_TX_DMA_SUSPEND:
{
uint32_t tmpVal = BL_RD_REG(SPI_BASE+spi_device->id*0x100,SPI_FIFO_CONFIG_0);
tmpVal = BL_CLR_REG_BIT(tmpVal,SPI_DMA_TX_EN);
BL_WR_REG(SPI_BASE+spi_device->id*0x100,SPI_FIFO_CONFIG_0,tmpVal);
break;
}
case DEVICE_CTRL_RX_DMA_SUSPEND:
{
uint32_t tmpVal = BL_RD_REG(SPI_BASE+spi_device->id*0x100,SPI_FIFO_CONFIG_0);
tmpVal = BL_CLR_REG_BIT(tmpVal,SPI_DMA_RX_EN);
BL_WR_REG(SPI_BASE+spi_device->id*0x100,SPI_FIFO_CONFIG_0,tmpVal);
break;
}
case DEVICE_CTRL_TX_DMA_RESUME:
{
uint32_t tmpVal = BL_RD_REG(SPI_BASE+spi_device->id*0x100,SPI_FIFO_CONFIG_0);
tmpVal = BL_SET_REG_BIT(tmpVal,SPI_DMA_TX_EN);
BL_WR_REG(SPI_BASE+spi_device->id*0x100,SPI_FIFO_CONFIG_0,tmpVal);
break;
}
case DEVICE_CTRL_RX_DMA_RESUME:
{
uint32_t tmpVal = BL_RD_REG(SPI_BASE+spi_device->id*0x100,SPI_FIFO_CONFIG_0);
tmpVal = BL_SET_REG_BIT(tmpVal,SPI_DMA_RX_EN);
BL_WR_REG(SPI_BASE+spi_device->id*0x100,SPI_FIFO_CONFIG_0,tmpVal);
break;
}
default:
break;
}

305
drivers/bl702_driver/hal_drv/src/hal_timer.c
View File

@ -21,73 +21,145 @@
*
*/
#include "hal_timer.h"
#include "timer_config.h"
#include "bl702_glb.h"
#include "bl702_timer.h"
// extern struct device * timer;
// /****************************************************************************/ /**
// * @brief TIMER match 0 interrupt calllbaeck funtion
// *
// * @param None
// *
// * @return None
// *
// *******************************************************************************/
// static void Timer_Match0_Cbf(void)
// {
// MSG("Timer_Match0_Cbf\r\n"); //match0Arrived=1;
// //device_close(timer);
// }
#define TIMER_MAX_VALUE (0xFFFFFFFF)
#define TIMER_CLK_DIV (0)
// /****************************************************************************/ /**
// * @brief TIMER match 1 interrupt calllbaeck funtion
// *
// * @param None
// *
// * @return None
// *
// *******************************************************************************/
// static void Timer_Match1_Cbf(void)
// {
// MSG("Timer_Match1_Cbf\r\n"); //match1Arrived=1;
// // device_close(timer);
// }
void TIMER_CH0_IRQ(void);
void TIMER_CH1_IRQ(void);
// /****************************************************************************/ /**
// * @brief TIMER match 2 interrupt calllbaeck funtion
// *
// * @param None
// *
// * @return None
// *
// *******************************************************************************/
// static void Timer_Match2_Cbf(void)
// {
// MSG("Timer_Match2_Cbf\r\n"); //match2Arrived=1;
// device_close(timer);
// }
timer_device_t timerx_device[TIMER_MAX_INDEX] =
{
#ifdef BSP_USING_TIMER_CH0
TIMER_CH0_CONFIG,
#endif
#ifdef BSP_USING_TIMER_CH1
TIMER_CH1_CONFIG,
#endif
};
/**
* @brief
*
* @param dev
* @param oflag
* @return int
*/
int timer_open(struct device *dev, uint16_t oflag)
{
timer_device_t *timer_device = (timer_device_t *)dev;
TIMER_CFG_Type timer_cfg;
timer_cfg.timerCh = timer_device->ch;
timer_cfg.clkSrc = TIMER_CLK_SRC;
timer_cfg.plTrigSrc = timer_device->pl_trig_src;
timer_cfg.countMode = timer_device->cnt_mode;
timer_cfg.clockDivision = TIMER_CLK_DIV;
timer_cfg.matchVal0 = TIMER_MAX_VALUE;
timer_cfg.matchVal1 = TIMER_MAX_VALUE;
timer_cfg.matchVal2 = TIMER_MAX_VALUE;
timer_cfg.preLoadVal = TIMER_MAX_VALUE;
/* Disable all interrupt */
TIMER_IntMask(timer_device->ch,TIMER_INT_ALL, MASK);
/* Disable timer before config */
TIMER_Disable(timer_device->ch);
/* Timer init with default configuration */
TIMER_Init(&timer_cfg);
/* Clear interrupt status*/
TIMER_ClearIntStatus(timer_device->ch,TIMER_COMP_ID_0);
TIMER_ClearIntStatus(timer_device->ch,TIMER_COMP_ID_1);
TIMER_ClearIntStatus(timer_device->ch,TIMER_COMP_ID_2);
#ifdef BSP_USING_TIMER_CH0
if( timer_device->ch == TIMER_CH0)
Interrupt_Handler_Register(TIMER_CH0_IRQn, TIMER_CH0_IRQ);
#endif
#ifdef BSP_USING_TIMER_CH1
if( timer_device->ch == TIMER_CH1)
Interrupt_Handler_Register(TIMER_CH1_IRQn, TIMER_CH1_IRQ);
#endif
return 0;
}
/**
* @brief
*
* @param dev
* @return int
*/
int timer_close(struct device *dev)
{
timer_device_t *timer_device = (timer_device_t *)(dev);
TIMER_Disable(timer_device->ch);
return 0;
}
/**
* @brief
*
* @param dev
* @param cmd
* @param args
* @return int
*/
int timer_control(struct device *dev, int cmd, void *args)
{
timer_device_t* timer_device = (timer_device_t*)dev;
switch (cmd)
{
case DEVICE_CTRL_SET_INT /* constant-expression */:
{
uint32_t offset = __builtin_ctz((uint32_t)args);
while((0 <= offset) && (offset < 4))
{
if((uint32_t)args & (1 << offset))
{
TIMER_IntMask(timer_device->ch, offset, UNMASK);
}
offset ++;
}
if(timer_device->ch == TIMER_CH0)
{
NVIC_ClearPendingIRQ(TIMER_CH0_IRQn);
NVIC_EnableIRQ(TIMER_CH0_IRQn);
}
else if(timer_device->ch == TIMER_CH1)
{
NVIC_ClearPendingIRQ(TIMER_CH1_IRQn);
NVIC_EnableIRQ(TIMER_CH1_IRQn);
}
break;
}
case DEVICE_CTRL_CLR_INT /* constant-expression */:
/* code */
{
uint32_t offset = __builtin_ctz((uint32_t)args);
while((0 <= offset) && (offset < 4))
{
if ((uint32_t)args & (1 << offset))
{
TIMER_IntMask(timer_device->ch, offset, MASK);
}
offset ++;
}
if(timer_device->ch == TIMER_CH0)
{
NVIC_DisableIRQ(TIMER_CH0_IRQn);
}
else if (timer_device->ch == TIMER_CH1)
{
NVIC_DisableIRQ(TIMER_CH1_IRQn);
}
break;
}
case DEVICE_CTRL_GET_INT /* constant-expression */:
/* code */
break;
@ -95,46 +167,167 @@ int timer_control(struct device *dev, int cmd, void *args)
/* code */
break;
case DEVICE_CTRL_RESUME /* constant-expression */:
/* code */
{
uint32_t offset = __builtin_ctz((uint32_t)args);
timer_user_cfg_t *timer_user_cfg = ((timer_user_cfg_t *)(timer_device->parent.handle));
uint32_t timeout = (timer_user_cfg->timeout_val * 144 * 1000);
TIMER_SetPreloadValue(timer_device->ch, 0);
if(timer_device->ch == TIMER_CH0)
{
NVIC_ClearPendingIRQ(TIMER_CH0_IRQn);
NVIC_EnableIRQ(TIMER_CH0_IRQn);
}
else if(timer_device->ch == TIMER_CH1)
{
NVIC_ClearPendingIRQ(TIMER_CH1_IRQn);
NVIC_EnableIRQ(TIMER_CH1_IRQn);
}
while((0 <= offset) && (offset < 4))
{
if((uint32_t)args & (1 << offset))
{
TIMER_SetCompValue(timer_device->ch,offset,timeout);
TIMER_IntMask(timer_device->ch, offset, UNMASK);
}
offset ++;
}
/* Enable timer */
TIMER_Enable(timer_device->ch);
break;
}
case DEVICE_CTRL_SUSPEND /* constant-expression */:
/* code */
{
TIMER_Disable(timer_device->ch);
uint32_t offset = __builtin_ctz((uint32_t)args);
if(timer_device->ch == TIMER_CH0)
{
NVIC_DisableIRQ(TIMER_CH0_IRQn);
}
else if (timer_device->ch == TIMER_CH1)
{
NVIC_DisableIRQ(TIMER_CH1_IRQn);
}
while((0 <= offset) && (offset < 4))
{
if ((uint32_t)args & (1 << offset))
{
TIMER_SetCompValue(timer_device->ch,offset,TIMER_MAX_VALUE);
TIMER_IntMask(timer_device->ch, offset, MASK);
}
offset ++;
}
break;
}
case DEVICE_CTRL_GET_CONFIG:
return TIMER_GetCounterValue(timer_device->ch);
break;
default:
break;
}
return 0;
return 0;
}
int timer_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size)
{
return 0;
}
int timer_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size)
{
return 0;
}
void timer_register(timer_device_t *device, const char *name, uint16_t flag)
/**
* @brief timer register
*
* @param index
* @param name
* @param flag
* @param timer_user_cfg
* @return int
*/
int timer_register(enum timer_index_type index, const char *name, uint16_t flag, timer_user_cfg_t *timer_user_cfg)
{
struct device *dev;
dev = &(device->parent);
if(TIMER_MAX_INDEX == 0)
return -DEVICE_EINVAL;
dev = &(timerx_device[index].parent);
dev->open = timer_open;
dev->close = timer_close;
dev->control = timer_control;
dev->write = NULL;
dev->read = NULL;
// dev->write = NULL;
// dev->read = NULL;
dev->status = DEVICE_UNREGISTER;
dev->type = DEVICE_CLASS_TIMER;
dev->handle = NULL;
dev->handle = timer_user_cfg;
device_register(dev, name, flag);
return device_register(dev, name, flag);
}
void timer_isr(timer_device_t *handle)
{
uint32_t intId = 0;
uint32_t tmpVal = 0;
uint32_t tmpAddr = 0;
intId = BL_RD_WORD(TIMER_BASE + TIMER_TMSR2_OFFSET + 4 * handle->ch);
tmpAddr = TIMER_BASE + TIMER_TICR2_OFFSET + 4 * handle->ch;
tmpVal = BL_RD_WORD(tmpAddr);
if(!handle->parent.callback)
return;
/* Comparator 0 match interrupt */
if( BL_IS_REG_BIT_SET(intId, TIMER_TMSR_0) ){
BL_WR_WORD(tmpAddr, BL_SET_REG_BIT(tmpVal, TIMER_TCLR_0));
handle->parent.callback(&handle->parent, NULL, 0, TIMER_EVENT_COMP0);
}
/* Comparator 1 match interrupt */
if( BL_IS_REG_BIT_SET(intId,TIMER_TMSR_1) ){
BL_WR_WORD(tmpAddr,BL_SET_REG_BIT(tmpVal,TIMER_TCLR_1));
handle->parent.callback(&handle->parent, NULL, 0, TIMER_EVENT_COMP1);
}
/* Comparator 2 match interrupt */
if( BL_IS_REG_BIT_SET(intId,TIMER_TMSR_2) ){
BL_WR_WORD(tmpAddr,BL_SET_REG_BIT(tmpVal,TIMER_TCLR_2));
handle->parent.callback(&handle->parent, NULL, 0, TIMER_EVENT_COMP2);
}
}
#ifdef BSP_USING_TIMER_CH0
/**
* @brief
*
*/
void TIMER_CH0_IRQ(void)
{
timer_isr(&timerx_device[TIMER_CH0_INDEX]);
}
#endif
#ifdef BSP_USING_TIMER_CH1
/**
* @brief
*
*/
void TIMER_CH1_IRQ(void)
{
timer_isr(&timerx_device[TIMER_CH1_INDEX]);
}
#endif

45
drivers/bl702_driver/hal_drv/src/hal_uart.c
View File

@ -220,12 +220,40 @@ int uart_control(struct device *dev, int cmd, void *args)
}
case DEVICE_CTRL_GET_CONFIG /* constant-expression */:
break;
case DEVICE_CTRL_UART_ATTACH_TX_DMA /* constant-expression */:
case DEVICE_CTRL_ATTACH_TX_DMA /* constant-expression */:
uart_device->tx_dma = (struct device *)args;
break;
case DEVICE_CTRL_UART_ATTACH_RX_DMA /* constant-expression */:
case DEVICE_CTRL_ATTACH_RX_DMA /* constant-expression */:
uart_device->rx_dma = (struct device *)args;
break;
case DEVICE_CTRL_TX_DMA_SUSPEND:
{
uint32_t tmpVal = BL_RD_REG(UART0_BASE+uart_device->id*0x100,UART_FIFO_CONFIG_0);
tmpVal = BL_CLR_REG_BIT(tmpVal,UART_DMA_TX_EN);
BL_WR_REG(UART0_BASE+uart_device->id*0x100,UART_FIFO_CONFIG_0,tmpVal);
break;
}
case DEVICE_CTRL_RX_DMA_SUSPEND:
{
uint32_t tmpVal = BL_RD_REG(UART0_BASE+uart_device->id*0x100,UART_FIFO_CONFIG_0);
tmpVal = BL_CLR_REG_BIT(tmpVal,UART_DMA_RX_EN);
BL_WR_REG(UART0_BASE+uart_device->id*0x100,UART_FIFO_CONFIG_0,tmpVal);
break;
}
case DEVICE_CTRL_TX_DMA_RESUME:
{
uint32_t tmpVal = BL_RD_REG(UART0_BASE+uart_device->id*0x100,UART_FIFO_CONFIG_0);
tmpVal = BL_SET_REG_BIT(tmpVal,UART_DMA_TX_EN);
BL_WR_REG(UART0_BASE+uart_device->id*0x100,UART_FIFO_CONFIG_0,tmpVal);
break;
}
case DEVICE_CTRL_RX_DMA_RESUME:
{
uint32_t tmpVal = BL_RD_REG(UART0_BASE+uart_device->id*0x100,UART_FIFO_CONFIG_0);
tmpVal = BL_SET_REG_BIT(tmpVal,UART_DMA_RX_EN);
BL_WR_REG(UART0_BASE+uart_device->id*0x100,UART_FIFO_CONFIG_0,tmpVal);
break;
}
case DEVICE_CTRL_UART_GET_TX_FIFO /* constant-expression */:
return UART_GetTxFifoCount(uart_device->id);
case DEVICE_CTRL_UART_GET_RX_FIFO /* constant-expression */:
@ -369,16 +397,23 @@ void uart_isr(uart_device_t *handle)
if (BL_IS_REG_BIT_SET(tmpVal, UART_URX_FIFO_INT) && !BL_IS_REG_BIT_SET(maskVal, UART_CR_URX_FIFO_MASK))
{
uint8_t buffer[UART_FIFO_MAX_LEN];
UART_ReceiveData(handle->id, buffer, handle->fifo_threshold);
handle->parent.callback(&handle->parent, &buffer[0], handle->fifo_threshold, UART_EVENT_RX_FIFO);
uint8_t len = UART_ReceiveData(handle->id, buffer, handle->fifo_threshold);
if(len)
{
handle->parent.callback(&handle->parent, &buffer[0], len, UART_EVENT_RX_FIFO);
}
}
/* Rx time-out interrupt */
if (BL_IS_REG_BIT_SET(tmpVal, UART_URX_RTO_INT) && !BL_IS_REG_BIT_SET(maskVal, UART_CR_URX_RTO_MASK))
{
uint8_t buffer[UART_FIFO_MAX_LEN];
uint8_t len = UART_ReceiveData(handle->id, buffer, handle->fifo_threshold);
uint8_t len = UART_ReceiveData(handle->id, buffer, UART_FIFO_MAX_LEN);
if(len)
{
handle->parent.callback(&handle->parent, &buffer[0], len, UART_EVENT_RTO);
}
BL_WR_REG(UARTx, UART_INT_CLEAR, 0x10);
}

225
drivers/bl702_driver/hal_drv/src/hal_usb.c
View File

@ -213,6 +213,13 @@ int usb_open(struct device *dev, uint16_t oflag)
/* Init Device */
USB_Set_Config(DISABLE, &usbCfg);
usb_fs_device.out_ep[0].ep_ena = 1U;
usb_fs_device.in_ep[0].ep_ena = 1U;
usb_fs_device.out_ep[0].ep_cfg.ep_mps = USB_CTRL_EP_MPS;
usb_fs_device.out_ep[0].ep_cfg.ep_type = USBD_EP_TYPE_CTRL;
usb_fs_device.in_ep[0].ep_cfg.ep_mps = USB_CTRL_EP_MPS;
usb_fs_device.in_ep[0].ep_cfg.ep_type = USBD_EP_TYPE_CTRL;
/* USB interrupt enable config */
USB_IntEn(USB_INT_ALL, DISABLE); //all
USB_IntEn(USB_INT_RESET, ENABLE); //1
@ -366,25 +373,111 @@ int usb_control(struct device *dev, int cmd, void *args)
}
}
return 0;
case DEVICE_CTRL_USB_DC_TX_FIFO_CNT_GET:
case DEVICE_CTRL_USB_DC_GET_TX_FIFO_CNT:
return USB_Get_EPx_TX_FIFO_CNT(((uint32_t)args) & 0x7f);
case DEVICE_CTRL_USB_DC_RX_FIFO_CNT_GET:
case DEVICE_CTRL_USB_DC_GET_RX_FIFO_CNT:
return USB_Get_EPx_RX_FIFO_CNT(((uint32_t)args) & 0x7f);
case DEVICE_CTRL_USB_DC_GET_EP_FREE:
return USB_Is_EPx_RDY_Free(((uint32_t)args) & 0x7f);
default:
break;
}
return 0;
}
// int usb_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size)
// {
int usb_write(struct device *dev, uint32_t pos, const void *buffer, uint32_t size)
{
uint8_t ret = 0;
uint8_t *p = (uint8_t*)buffer;
// }
while(size)
{
if(USB_Is_EPx_RDY_Free(pos & 0x7f))
{
uint8_t len = USB_Get_EPx_TX_FIFO_CNT(pos & 0x7f);
if(len)
{
if(len < size)
{
ret = usb_dc_ep_write(dev,pos,p,len,NULL);
size -= len;
p += len;
}
else
{
ret = usb_dc_ep_write(dev,pos,p,size,NULL);
p += size;
size = 0;
}
// int usb_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size)
// {
}
}
}
if(!(size%64))
{
ret = usb_dc_ep_write(dev,pos,NULL,0,NULL);
}
return ret;
}
// }
int usb_read(struct device *dev, uint32_t pos, void *buffer, uint32_t size)
{
uint32_t total_rx_len = 0;
uint8_t ret = 0;
uint8_t *p = (uint8_t*)buffer;
while(total_rx_len < size)
{
if(USB_Is_EPx_RDY_Free(pos))
{
uint8_t len = USB_Get_EPx_RX_FIFO_CNT(pos);
if(len)
{
ret = usb_dc_ep_read(dev,pos,p,len,NULL);
ret = usb_dc_ep_read(dev,pos,NULL,0,NULL);
total_rx_len += len;
p += len;
}
else
{
ret = usb_dc_ep_read(dev,pos,NULL,0,NULL);
}
}
}
return ret;
}
/**
* @brief
*
* @param index
* @param name
* @param flag
* @return int
*/
int usb_dc_register(enum usb_index_type index, const char *name, uint16_t flag)
{
struct device *dev;
if (USB_MAX_INDEX == 0)
return -DEVICE_EINVAL;
dev = &(usb_fs_device.parent);
dev->open = usb_open;
dev->close = usb_close;
dev->control = usb_control;
dev->write = usb_write;
dev->read = usb_read;
dev->status = DEVICE_UNREGISTER;
dev->type = DEVICE_CLASS_USB;
dev->handle = NULL;
return device_register(dev, name, flag);
}
/**
* @brief configure and enable endpoint
@ -476,21 +569,13 @@ int usb_dc_ep_open(struct device *dev, const struct usb_dc_ep_cfg *ep_cfg)
/**
* @brief Check if the selected endpoint is stalled
*
* @param dev usb device
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[out] stalled Endpoint stall status
*
* @return 0 on success, negative errno code on fail.
*/
/**
* @brief
*
* @param dev
* @param ep
* @param stalled
* @return int
*/
int usb_dc_ep_is_stalled(struct device *dev, const uint8_t ep, uint8_t *stalled)
{
uint8_t ep_idx = USB_EP_GET_IDX(ep);
@ -514,6 +599,7 @@ int usb_dc_ep_is_stalled(struct device *dev, const uint8_t ep, uint8_t *stalled)
return 0;
}
/**
* @brief Write data to the specified endpoint
*
@ -521,6 +607,7 @@ int usb_dc_ep_is_stalled(struct device *dev, const uint8_t ep, uint8_t *stalled)
* supplied usbd_endpoint_callback function will be called when data is transmitted
* out.
*
* @param dev
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] data Pointer to data to write
@ -532,23 +619,13 @@ int usb_dc_ep_is_stalled(struct device *dev, const uint8_t ep, uint8_t *stalled)
*
* @return 0 on success, negative errno code on fail.
*/
/**
* @brief
*
* @param dev
* @param ep
* @param data
* @param data_len
* @param ret_bytes
* @return int
*/
int usb_dc_ep_write(struct device *dev, const uint8_t ep, const uint8_t *data, uint32_t data_len, uint32_t *ret_bytes)
{
uint8_t ep_idx = USB_EP_GET_IDX(ep);
uint8_t ep_idx;
uint32_t timeout = 0x00FFFFFF;
uint32_t ep_tx_fifo_addr;
ep_idx = USB_EP_GET_IDX(ep);
/* Check if IN ep */
if (USB_EP_GET_DIR(ep) != USB_EP_DIR_IN)
{
@ -602,8 +679,6 @@ int usb_dc_ep_write(struct device *dev, const uint8_t ep, const uint8_t *data, u
{
break;
}
/* Make sure we don't hog the CPU */
// k_yield();
//USB_DC_LOG_ERR("EP%d have remain data\r\n", ep_idx);
}
while (1);
@ -618,12 +693,20 @@ int usb_dc_ep_write(struct device *dev, const uint8_t ep, const uint8_t *data, u
* before accessing the register."
*/
ep_tx_fifo_addr = USB_BASE + USB_EP0_TX_FIFO_WDATA_OFFSET + ep_idx * 0x10;
if((data_len == 1) && (ep_idx == 0))
{
USB_Set_EPx_Xfer_Size(EP_ID0,1);
}
else if(ep_idx == 0)
{
USB_Set_EPx_Xfer_Size(EP_ID0,64);
}
memcopy_to_fifo((void *)ep_tx_fifo_addr, (uint8_t *)data, data_len);
/* Clear NAK and enable ep */
USB_Set_EPx_Status(USB_EP_GET_IDX(ep), USB_EP_STATUS_ACK);
// irq_unlock(key);
USB_DC_LOG_DBG("EP%d write %u bytes\r\n", ep_idx, data_len);
if (ret_bytes)
@ -633,6 +716,7 @@ int usb_dc_ep_write(struct device *dev, const uint8_t ep, const uint8_t *data, u
return 0;
}
/**
* @brief Read data from the specified endpoint
*
@ -641,6 +725,7 @@ int usb_dc_ep_write(struct device *dev, const uint8_t ep, const uint8_t *data, u
* upcalls till he is done with the processing of the data. The caller should
* reactivate ep by invoking usb_dc_ep_read_continue() do so.
*
* @param dev
* @param[in] ep Endpoint address corresponding to the one
* listed in the device configuration table
* @param[in] data Pointer to data buffer to write to
@ -651,17 +736,6 @@ int usb_dc_ep_write(struct device *dev, const uint8_t ep, const uint8_t *data, u
*
* @return 0 on success, negative errno code on fail.
*/
/**
* @brief
*
* @param dev
* @param ep
* @param data
* @param data_len
* @param read_bytes
* @return int
*/
int usb_dc_ep_read(struct device *dev, const uint8_t ep, uint8_t *data, uint32_t data_len, uint32_t *read_bytes)
{
uint8_t ep_idx = USB_EP_GET_IDX(ep);
@ -718,45 +792,15 @@ int usb_dc_ep_read(struct device *dev, const uint8_t ep, uint8_t *data, uint32_t
return 0;
}
/**
* @brief
*
* @param index
* @param name
* @param flag
* @return int
*/
int usb_dc_register(enum usb_index_type index, const char *name, uint16_t flag)
{
struct device *dev;
if (USB_MAX_INDEX == 0)
return -DEVICE_EINVAL;
dev = &(usb_fs_device.parent);
dev->open = usb_open;
dev->close = usb_close;
dev->control = usb_control;
// dev->write = usb_write;
// dev->read = usb_read;
dev->status = DEVICE_UNREGISTER;
dev->type = DEVICE_CLASS_USB;
dev->handle = NULL;
return device_register(dev, name, flag);
}
/**
* @brief
*
* @param dev
* @param rb
* @param ep
* @return uint16_t
* @return int
*/
uint16_t usb_dc_receive_to_ringbuffer(struct device *dev, Ring_Buffer_Type *rb, uint8_t ep)
int usb_dc_receive_to_ringbuffer(struct device *dev, Ring_Buffer_Type *rb, uint8_t ep)
{
uint8_t ep_idx;
uint8_t recv_len;
@ -791,28 +835,26 @@ uint16_t usb_dc_receive_to_ringbuffer(struct device *dev, Ring_Buffer_Type *rb,
/*if rx fifo count equal 0,it means last is send nack and ringbuffer is smaller than 64,
* so,if ringbuffer is larger than 64,set ack to recv next data.
*/
if(overflow_flag && (Ring_Buffer_Get_Empty_Length(rb)>64))
if(overflow_flag && (Ring_Buffer_Get_Empty_Length(rb)>64) && (!recv_len))
{
overflow_flag = false;
USB_Set_EPx_Rdy(ep_idx);
return -USB_DC_RB_SIZE_SMALL_ERR;
return 0;
}
else if(recv_len)
else
{
uint32_t addr = USB_BASE + 0x11C + (ep_idx - 1) * 0x10;
uint32_t actual_len = Ring_Buffer_Write_Callback(rb, recv_len, fifocopy_to_mem, (void *)addr);
Ring_Buffer_Write_Callback(rb, recv_len, fifocopy_to_mem, (void *)addr);
if(Ring_Buffer_Get_Empty_Length(rb) < 64)
{
overflow_flag = true;
return actual_len;
return -USB_DC_RB_SIZE_SMALL_ERR;
}
USB_Set_EPx_Rdy(ep_idx);
return actual_len;
}
return 0;
}
}
/**
* @brief
@ -820,15 +862,17 @@ uint16_t usb_dc_receive_to_ringbuffer(struct device *dev, Ring_Buffer_Type *rb,
* @param dev
* @param rb
* @param ep
* @return uint16_t
* @return int
*/
uint16_t usb_dc_send_from_ringbuffer(struct device *dev, Ring_Buffer_Type *rb, uint8_t ep)
int usb_dc_send_from_ringbuffer(struct device *dev, Ring_Buffer_Type *rb, uint8_t ep)
{
uint8_t ep_idx;
uint32_t timeout = 0x00FFFFFF;
static bool zlp_flag = false;
static uint32_t send_total_len = 0;
ep_idx = USB_EP_GET_IDX(ep);
/* Check if IN ep */
if (USB_EP_GET_DIR(ep) != USB_EP_DIR_IN)
{
@ -855,17 +899,18 @@ uint16_t usb_dc_send_from_ringbuffer(struct device *dev, Ring_Buffer_Type *rb, u
if(zlp_flag == false)
{
if (USB_Get_EPx_TX_FIFO_CNT(ep_idx) == USB_FS_MAX_PACKET_SIZE && Ring_Buffer_Get_Length(rb))
if ((USB_Get_EPx_TX_FIFO_CNT(ep_idx) == USB_FS_MAX_PACKET_SIZE) && Ring_Buffer_Get_Length(rb))
{
uint32_t actual_len = Ring_Buffer_Read_Callback(rb, USB_FS_MAX_PACKET_SIZE, memcopy_to_fifo, (void *)addr);
send_total_len += actual_len;
if(!Ring_Buffer_Get_Length(rb) && (!(send_total_len % 64)))
{
zlp_flag = true;
}
USB_Set_EPx_Rdy(ep_idx);
return actual_len;
USB_Set_EPx_Rdy(ep_idx);
return 0;
}
else
{
@ -879,8 +924,6 @@ uint16_t usb_dc_send_from_ringbuffer(struct device *dev, Ring_Buffer_Type *rb, u
USB_Set_EPx_Rdy(ep_idx);
return -USB_DC_ZLP_ERR;
}
return 0;
}
/**