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[feat][common] add no cache ram section macros

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This commit is contained in:
jzlv 2022-03-22 11:16:09 +08:00
parent fe34801106
commit 45be9d7759
2 changed files with 26 additions and 24 deletions
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18
common/list/drv_list.h
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@ -156,6 +156,15 @@ static inline unsigned int dlist_len(const dlist_t *l)
#define DLIST_DEFINE(list) \
dlist_t list = { &(list), &(list) }
/**
* @brief get the struct for this entry
* @param node the entry point
* @param type the type of structure
* @param member the name of list in structure
*/
#define dlist_entry(node, type, member) \
container_of(node, type, member)
/**
* dlist_first_entry - get the first element from a list
* @ptr: the list head to take the element from.
@ -177,15 +186,6 @@ static inline unsigned int dlist_len(const dlist_t *l)
#define dlist_first_entry_or_null(ptr, type, member) \
(dlist_isempty(ptr) ? NULL : dlist_first_entry(ptr, type, member))
/**
* @brief get the struct for this entry
* @param node the entry point
* @param type the type of structure
* @param member the name of list in structure
*/
#define dlist_entry(node, type, member) \
container_of(node, type, member)
/**
* dlist_for_each - iterate over a list
* @pos: the dlist_t * to use as a loop cursor.

2
common/misc/compiler/common.h
View File

@ -52,6 +52,8 @@
#define ATTR_DTCM_SECTION __attribute__((section(".tcm_data")))
#define ATTR_HSRAM_SECTION __attribute__((section(".hsram_code")))
#define ATTR_DMA_RAM_SECTION __attribute__((section(".system_ram")))
#define ATTR_NOCACHE_RAM_SECTION __attribute__((section(".nocache_ram")))
#define ATTR_NOCACHE_NOINIT_RAM_SECTION __attribute__((section(".nocache_noinit_ram")))
#define ATTR_HBN_RAM_SECTION __attribute__((section(".hbn_ram_code")))
#define ATTR_HBN_RAM_CONST_SECTION __attribute__((section(".hbn_ram_data")))
#define ATTR_EALIGN(x) __attribute__((aligned(x)))