[chore] add new flash command tool
This commit is contained in:
jzlv
parent
fcef1d15b6
commit
15a70512a7
BIN
tools/bflb_tools/bflb_fw_post_proc/bflb_fw_post_proc
Executable file
BIN
tools/bflb_tools/bflb_fw_post_proc/bflb_fw_post_proc
Executable file
Binary file not shown.
BIN
tools/bflb_tools/bflb_fw_post_proc/bflb_fw_post_proc.exe
Normal file
BIN
tools/bflb_tools/bflb_fw_post_proc/bflb_fw_post_proc.exe
Normal file
Binary file not shown.
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tools/bflb_tools/bflb_fw_post_proc/usage.txt
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tools/bflb_tools/bflb_fw_post_proc/usage.txt
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bflb_fw_post_proc is a command line firmware process tool to update correct bootheder information and encrypt or sign firmware.
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In order to achieve this goal, some parameters must be specified:
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--chipname: chipname that you are buiding
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--brdcfgdir: board config directory that you are using,this is used to copy boot2 like file to image directory
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--imgfile: image file that you want to deal with,',' can be used to split multiple files and '*' can be used to match the only one file
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--key: AES key when you want to encrypt you image with AES CTR
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--iv: AES iv when you want to encrypt you image with AES CTR
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--xtsmode: xts mode enable when you want to encrypt you image with AES xts and your chip support
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--privatekey: private key of ecc-256 in pem format
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--publickey: public key of ecc-256 in pem format
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Examples:
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bflb_fw_post_proc --chipname=bl616 --brdcfgdir=bsp/board/bl616dk/config --imgfile=./build/build_out/helloworld_bl616.bin
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bflb_fw_post_proc --chipname=bl616 --brdcfgdir=bsp/board/bl616dk/config --imgfile=./build/build_out/helloworld_bl616.bin,./build/build_out/boot2_*.bin
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bflb_fw_post_proc --chipname=bl616 --brdcfgdir=bsp/board/bl616dk/config --imgfile=./build/build_out/helloworld_bl616.bin --key=000102030405060708090A0B0C0D0E0F --iv=100102030405060708090A0B00000000
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bflb_fw_post_proc --chipname=bl616 --brdcfgdir=bsp/board/bl616dk/config --imgfile=./build/build_out/helloworld_bl616.bin --key=000102030405060708090A0B0C0D0E0F101112131415161718191A1B1C1D1E1F --iv=100102030405060708090A0B00000000 --xtsmode=1
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bflb_fw_post_proc --chipname=bl616 --brdcfgdir=bsp/board/bl616dk/config --imgfile=./build/build_out/helloworld_bl616.bin --privatekey=privatekey_uecc.pem --publickey=publickey_uecc.pem
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5
tools/bflb_tools/bouffalo_flash_cube/.gitignore
vendored
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tools/bflb_tools/bouffalo_flash_cube/.gitignore
vendored
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**/img_create_iot
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**/img_create_mcu
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**/log
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*.bin
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*.ini
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BIN
tools/bflb_tools/bouffalo_flash_cube/BLFlashCommand
Executable file
BIN
tools/bflb_tools/bouffalo_flash_cube/BLFlashCommand
Executable file
Binary file not shown.
BIN
tools/bflb_tools/bouffalo_flash_cube/BLFlashCommand.exe
Normal file
BIN
tools/bflb_tools/bouffalo_flash_cube/BLFlashCommand.exe
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Binary file not shown.
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File diff suppressed because it is too large
Load Diff
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[LOAD_CFG]
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#jlink or uart
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interface = uart
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device = COM1
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speed_uart_boot = 500000
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speed_uart_load = 500000
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speed_jlink = 2000
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#cklink usb vid|pid
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cklink_vidpid = 42bf|b210
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cklink_type = CKLink_Lite_Vendor-rog
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#eg: rv_dbg_plus, ft2232hl, ft2232d
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openocd_config = rv_dbg_plus
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#0:without load, 1:eflash_loader load
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load_function = 1
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auto_burn = false
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do_reset = true
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#reset retry+reset hold time
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reset_hold_time = 5
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shake_hand_delay = 100
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reset_revert = false
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#cutoff revert+cutoff time
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cutoff_time = 100
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shake_hand_retry = 2
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flash_burn_retry = 1
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checksum_err_retry = 3
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#1:24M, 2:32M, 3:38.4M, 4:40M, 5:26M, 6:RC32M
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#xtal_type = 4
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erase_time_out = 15000
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#chiptype=602
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eflash_loader_file = chips/bl602/eflash_loader/eflash_loader_40m.bin
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check_mac = true
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#0:no erase,1:programmed section erase,2:chip erase
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erase = 1
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# switch eflash_loader command log save
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local_log = false
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#0:verify by calculating SHA256(xip), >0:read back verify and verify by calculating SHA256(sbus)
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verify = 0
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tx_size = 2056
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cpu_reset_after_load = false
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#skip mode set first para is skip addr, second para is skip len
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skip_mode = 0x0, 0x0
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boot2_isp_mode = 0
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isp_mode_speed = 2000000
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isp_shakehand_timeout = 0
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[FLASH_CFG]
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flash_id = ef4015
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flash_clock_cfg = 1
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#0:NIO, 1:DO, 2:QO, 3:DIO, 4:QIO
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flash_io_mode = 1
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#empty: auto,0: internal flash with io switch,1: internal flash no io switch,2: GPIO 17-22,3: GPIO 0-2&20-22
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flash_pin = ""
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#empty for auto, otherwise specified para file path: eg: chips/bl602/efuse_bootheader/flash_para.bin
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flash_para = chips/bl602/efuse_bootheader/flash_para.bin
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decompress_write = true
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file = chips/bl602/img_create/bootinfo_boot2.bin chips/bl602/img_create/img_boot2.bin chips/bl602/partition/partition.bin chips/bl602/partition/partition.bin
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address = 00000000 00002000 e000 f000
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[EFUSE_CFG]
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burn_en = true
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factory_mode = false
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security_write = false
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security_save = true
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file = ../../../Tools/img_tools/efuse_bootheader/efusedata.bin
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maskfile = ../../../Tools/img_tools/efuse_bootheader/efusedata_mask.bin
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@ -0,0 +1,196 @@
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[EFUSE_CFG]
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########################################################################
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#2bits
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ef_sf_aes_mode = 0
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#2bits
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ef_sboot_sign_mode = 0
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#2bits
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ef_sboot_en = 0
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#2bits
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ef_dbg_jtag_dis = 0
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#4bits
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ef_dbg_mode = 0
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#32bits
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ef_dbg_pwd_low = 0
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#32bits
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ef_dbg_pwd_high = 0
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#2bits
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flash_pwr_delay = 0
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###################################################################
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ef_key_slot_2_w0 = 0
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ef_key_slot_2_w1 = 0
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ef_key_slot_2_w2 = 0
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ef_key_slot_2_w3 = 0
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ef_key_slot_3_w0 = 0
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ef_key_slot_3_w1 = 0
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ef_key_slot_3_w2 = 0
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ef_key_slot_3_w3 = 0
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ef_key_slot_4_w0 = 0
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ef_key_slot_4_w1 = 0
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ef_key_slot_4_w2 = 0
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ef_key_slot_4_w3 = 0
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wr_lock_key_slot_4_l = 0
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wr_lock_dbg_pwd = 0
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wr_lock_key_slot_2 = 0
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wr_lock_key_slot_3 = 0
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wr_lock_key_slot_4_h = 0
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rd_lock_dbg_pwd = 0
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rd_lock_key_slot_2 = 0
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rd_lock_key_slot_3 = 0
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rd_lock_key_slot_4 = 0
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[BOOTHEADER_CFG]
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magic_code = 0x504e4642
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revision = 0x01
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#########################flash cfg#############################
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flashcfg_magic_code = 0x47464346
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#flashcfg_magic_code=0
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io_mode = 0x10
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cont_read_support = 0
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#0.5T sfctrl_clk_delay=0 sfctrl_clk_invert=3
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#1 T sfctrl_clk_delay=1 sfctrl_clk_invert=1
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#1.5T sfctrl_clk_delay=1 sfctrl_clk_invert=3
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sfctrl_clk_delay = 1
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sfctrl_clk_invert = 0x01
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reset_en_cmd = 0x66
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reset_cmd = 0x99
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exit_contread_cmd = 0xff
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exit_contread_cmd_size = 3
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jedecid_cmd = 0x9f
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jedecid_cmd_dmy_clk = 0
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qpi_jedecid_cmd = 0x9f
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qpi_jedecid_dmy_clk = 0
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sector_size = 4
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mfg_id = 0xff
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page_size = 256
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chip_erase_cmd = 0xc7
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sector_erase_cmd = 0x20
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blk32k_erase_cmd = 0x52
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blk64k_erase_cmd = 0xd8
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write_enable_cmd = 0x06
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page_prog_cmd = 0x02
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qpage_prog_cmd = 0x32
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qual_page_prog_addr_mode = 0
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fast_read_cmd = 0x0b
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fast_read_dmy_clk = 1
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qpi_fast_read_cmd = 0x0b
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qpi_fast_read_dmy_clk = 1
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fast_read_do_cmd = 0x3b
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fast_read_do_dmy_clk = 1
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fast_read_dio_cmd = 0xbb
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fast_read_dio_dmy_clk = 0
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fast_read_qo_cmd = 0x6b
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fast_read_qo_dmy_clk = 1
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fast_read_qio_cmd = 0xeb
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fast_read_qio_dmy_clk = 2
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qpi_fast_read_qio_cmd = 0xeb
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qpi_fast_read_qio_dmy_clk = 2
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qpi_page_prog_cmd = 0x02
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write_vreg_enable_cmd = 0x50
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wel_reg_index = 0
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qe_reg_index = 1
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busy_reg_index = 0
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wel_bit_pos = 1
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qe_bit_pos = 1
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busy_bit_pos = 0
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wel_reg_write_len = 2
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wel_reg_read_len = 1
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qe_reg_write_len = 2
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qe_reg_read_len = 1
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release_power_down = 0xab
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busy_reg_read_len = 1
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reg_read_cmd0 = 0x05
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reg_read_cmd1 = 0x35
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reg_write_cmd0 = 0x01
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reg_write_cmd1 = 0x01
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enter_qpi_cmd = 0x38
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exit_qpi_cmd = 0xff
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cont_read_code = 0xa0
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cont_read_exit_code = 0xff
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burst_wrap_cmd = 0x77
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burst_wrap_dmy_clk = 0x03
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burst_wrap_data_mode = 2
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burst_wrap_code = 0x40
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de_burst_wrap_cmd = 0x77
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de_burst_wrap_cmd_dmy_clk = 0x03
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de_burst_wrap_code_mode = 2
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de_burst_wrap_code = 0xF0
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sector_erase_time = 300
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blk32k_erase_time = 1200
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blk64k_erase_time = 1200
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page_prog_time = 5
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chip_erase_time = 200000
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power_down_delay = 20
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qe_data = 0
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flashcfg_crc32 = 0
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#########################clk cfg####################################
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clkcfg_magic_code = 0x47464350
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#clkcfg_magic_code=0
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#0:Not use XTAL to set PLL,1:XTAL is 24M ,2:XTAL is 32M ,3:XTAL is 38.4M
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#4:XTAL is 40M,5:XTAL is 26M,6:XTAL is RC32M
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xtal_type = 4
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#0:RC32M,1:XTAL,2:PLL 48M,3:PLL 120M,4:PLL 160M,5:PLL 192M
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pll_clk = 4
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hclk_div = 0
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bclk_div = 1
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#0:120M,1:XCLK(RC32M or XTAL),2:48M,3:80M,4:BCLK,5:96M
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flash_clk_type = 3
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flash_clk_div = 1
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clkcfg_crc32 = 0
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########################boot cfg####################################
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#1:ECC
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sign = 0
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#1:AES128,2:AES256,3:AES192
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encrypt_type = 0
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key_sel = 0
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no_segment = 1
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cache_enable = 1
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notload_in_bootrom = 0
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aes_region_lock = 0
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cache_way_disable = 0x03
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crc_ignore = 0
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hash_ignore = 0
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########################image cfg####################################
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#total image len or segment count
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img_len = 0x100
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bootentry = 0
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#img RAM address or flash offset
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img_start = 0x2000
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#img hash
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hash_0 = 0xdeadbeef
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hash_1 = 0
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hash_2 = 0
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hash_3 = 0
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hash_4 = 0
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hash_5 = 0
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hash_6 = 0
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hash_7 = 0
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crc32 = 0xdeadbeef
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@ -0,0 +1,69 @@
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[LOAD_CFG]
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#jlink or uart
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interface = uart
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device = COM1
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speed_uart_boot = 500000
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speed_uart_load = 2000000
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#cklink usb vid|pid
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cklink_vidpid = 42bf|b210
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cklink_type = CKLink_Lite_Vendor-rog
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#eg: rv_dbg_plus, ft2232hl, ft2232d
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openocd_config = rv_dbg_plus
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auto_burn = false
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speed_jlink = 1000
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#0:without load, 1:eflash_loader load, 2: bootrom load
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load_function = 2
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do_reset = true
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#reset retry+hold time
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reset_hold_time = 50
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shake_hand_delay = 100
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reset_revert = false
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cutoff_time = 50
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shake_hand_retry = 3
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flash_burn_retry = 1
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checksum_err_retry = 3
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erase_time_out = 100000
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#chiptype=bl606p
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check_mac = true
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#0:no erase,1:programmed section erase,2:chip erase
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erase = 1
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# switch eflash_loader command log save
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local_log = false
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#0:verify by calculating SHA256(xip), >0:read back verify and verify by calculating SHA256(sbus)
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verify = 0
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tx_size = 4104
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cpu_reset_after_load = false
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#empty for auto, otherwise specified clock para file path: eg: chips/bl606p/efuse_bootheader/clock_para.bin
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clock_para = chips/bl606p/efuse_bootheader/clock_para.bin
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#skip mode set first para is skip addr, second para is skip len
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skip_mode = 0x0, 0x0
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boot2_isp_mode = 0
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isp_mode_speed = 2000000
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isp_shakehand_timeout = 0
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[FLASH_CFG]
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flash_id = ef4016
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#bit 7-4 flash_clock_type: 0:120M wifipll, 1:xtal, 2:128M cpupll, 3:80M wifipll, 4:bclk, 5:96M wifipll
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#bit 3-0 flash_clock_div
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flash_clock_cfg = 0x41
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#0:0.5T delay, 1:1T delay, 2:1.5T delay, 3:2T delay
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flash_clock_delay = 0
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#0:NIO, 1:DO, 2:QO, 3:DIO, 4:QIO
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flash_io_mode = 1
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#flash_pin value:
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#bit 7 flash pin autoscan
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#bit 6-0 flash pin cfg: 0: internal swap io0 with io3, 2: internal no swap io0 with io3, 4: external gpi34-39,
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flash_pin = 0x80
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#empty for auto, otherwise specified flash para file path: eg: chips/bl606p/efuse_bootheader/flash_para.bin
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flash_para = chips/bl606p/efuse_bootheader/flash_para.bin
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decompress_write = false
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file = chips/bl606p/img_create2/whole_img.bin
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address = 00000000
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[EFUSE_CFG]
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burn_en = true
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factory_mode = false
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security_write = false
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security_save = true
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file = ../../../Tools/img_tools/efuse_bootheader/efusedata.bin
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maskfile = ../../../Tools/img_tools/efuse_bootheader/efusedata_mask.bin
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@ -0,0 +1,520 @@
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[EFUSE_CFG]
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########################################################################
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ef_sf_aes_mode=0
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ef_no_xtal=0
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ef_force_no_trim=0
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ef_sf_key_re_sel=0
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ef_dbg_jtag_0_dis=0
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###################################################################
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ef_dbg_pwd_low=0
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ef_dbg_pwd_high=0
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ef_dbg_pwd2_low=0
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ef_dbg_pwd2_high=0
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ef_wifi_mac_low=0
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ef_wifi_mac_high=0
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ef_key_slot_0_w0=0
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ef_key_slot_0_w1=0
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ef_key_slot_0_w2=0
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ef_key_slot_0_w3=0
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ef_key_slot_1_w0=0
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ef_key_slot_1_w1=0
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ef_key_slot_1_w2=0
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ef_key_slot_1_w3=0
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ef_key_slot_2_w0=0
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ef_key_slot_2_w1=0
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ef_key_slot_2_w2=0
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ef_key_slot_2_w3=0
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ef_key_slot_3_w0=0
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ef_key_slot_3_w1=0
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ef_key_slot_3_w2=0
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ef_key_slot_3_w3=0
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##########################################
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ef_sw_usage_0=0
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ef_sw_usage_1=0
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ef_sw_usage_2=0
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ef_sw_usage_3=0
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ef_key_slot_11_w0=0
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ef_key_slot_11_w1=0
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ef_key_slot_11_w2=0
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ef_key_slot_11_w3=0
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###################################################################
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ef_sec_lifecycle=0
|
||||
wr_lock_rsvd_0=0
|
||||
wr_lock_boot_mode=0
|
||||
wr_lock_dbg_pwd=0
|
||||
wr_lock_wifi_mac=0
|
||||
wr_lock_key_slot_0=0
|
||||
wr_lock_key_slot_1=0
|
||||
wr_lock_key_slot_2=0
|
||||
wr_lock_key_slot_3=0
|
||||
wr_lock_sw_usage_0=0
|
||||
wr_lock_sw_usage_1=0
|
||||
wr_lock_sw_usage_2=0
|
||||
wr_lock_sw_usage_3=0
|
||||
wr_lock_key_slot_11=0
|
||||
rd_lock_dbg_pwd=0
|
||||
rd_lock_key_slot_0=0
|
||||
rd_lock_key_slot_1=0
|
||||
rd_lock_key_slot_2=0
|
||||
rd_lock_key_slot_3=0
|
||||
rd_lock_key_slot_11=0
|
||||
########################################################################
|
||||
ef_key_slot_4_w0=0
|
||||
ef_key_slot_4_w1=0
|
||||
ef_key_slot_4_w2=0
|
||||
ef_key_slot_4_w3=0
|
||||
ef_key_slot_5_w0=0
|
||||
ef_key_slot_5_w1=0
|
||||
ef_key_slot_5_w2=0
|
||||
ef_key_slot_5_w3=0
|
||||
ef_key_slot_6_w0=0
|
||||
ef_key_slot_6_w1=0
|
||||
ef_key_slot_6_w2=0
|
||||
ef_key_slot_6_w3=0
|
||||
ef_key_slot_7_w0=0
|
||||
ef_key_slot_7_w1=0
|
||||
ef_key_slot_7_w2=0
|
||||
ef_key_slot_7_w3=0
|
||||
ef_key_slot_8_w0=0
|
||||
ef_key_slot_8_w1=0
|
||||
ef_key_slot_8_w2=0
|
||||
ef_key_slot_8_w3=0
|
||||
ef_key_slot_9_w0=0
|
||||
ef_key_slot_9_w1=0
|
||||
ef_key_slot_9_w2=0
|
||||
ef_key_slot_9_w3=0
|
||||
ef_key_slot_10_w0=0
|
||||
ef_key_slot_10_w1=0
|
||||
ef_key_slot_10_w2=0
|
||||
ef_key_slot_10_w3=0
|
||||
ef_dat_1_rsvd_0=0
|
||||
ef_dat_1_rsvd_1=0
|
||||
ef_dat_1_rsvd_2=0
|
||||
########################################################################
|
||||
wr_lock_rsvd_1=0
|
||||
wr_lock_key_slot_4=0
|
||||
wr_lock_key_slot_5=0
|
||||
wr_lock_key_slot_6=0
|
||||
wr_lock_key_slot_7=0
|
||||
wr_lock_key_slot_8=0
|
||||
wr_lock_key_slot_9=0
|
||||
wr_lock_key_slot_10=0
|
||||
wr_lock_dat_1_rsvd_0=0
|
||||
wr_lock_dat_1_rsvd_1=0
|
||||
wr_lock_dat_1_rsvd_2=0
|
||||
rd_lock_key_slot_4=0
|
||||
rd_lock_key_slot_5=0
|
||||
rd_lock_key_slot_6=0
|
||||
rd_lock_key_slot_7=0
|
||||
rd_lock_key_slot_8=0
|
||||
rd_lock_key_slot_9=0
|
||||
rd_lock_key_slot_10=0
|
||||
|
||||
[BOOTHEADER_GROUP0_CFG]
|
||||
magic_code=0x504e4642
|
||||
revision=0x01
|
||||
#########################flash cfg#############################
|
||||
flashcfg_magic_code=0x47464346
|
||||
#flashcfg_magic_code=0
|
||||
io_mode=0x10
|
||||
#0.5T sfctrl_clk_delay=0 sfctrl_clk_invert=3
|
||||
#1 T sfctrl_clk_delay=1 sfctrl_clk_invert=1
|
||||
#1.5T sfctrl_clk_delay=1 sfctrl_clk_invert=3
|
||||
cont_read_support=0
|
||||
sfctrl_clk_delay=1
|
||||
sfctrl_clk_invert=0x01
|
||||
|
||||
reset_en_cmd=0x66
|
||||
reset_cmd=0x99
|
||||
exit_contread_cmd=0xff
|
||||
exit_contread_cmd_size=0x3
|
||||
|
||||
jedecid_cmd=0x9f
|
||||
jedecid_cmd_dmy_clk=0
|
||||
enter_32bits_addr_cmd=0xb7
|
||||
exit_32bits_addr_clk=0xe9
|
||||
|
||||
sector_size=4
|
||||
mfg_id=0xff
|
||||
page_size=256
|
||||
|
||||
chip_erase_cmd=0xc7
|
||||
sector_erase_cmd=0x20
|
||||
blk32k_erase_cmd=0x52
|
||||
blk64k_erase_cmd=0xd8
|
||||
|
||||
write_enable_cmd=0x06
|
||||
page_prog_cmd=0x02
|
||||
qpage_prog_cmd=0x32
|
||||
qual_page_prog_addr_mode=0
|
||||
|
||||
fast_read_cmd=0x0b
|
||||
fast_read_dmy_clk=1
|
||||
qpi_fast_read_cmd=0x0b
|
||||
qpi_fast_read_dmy_clk=1
|
||||
|
||||
fast_read_do_cmd=0x3b
|
||||
fast_read_do_dmy_clk=1
|
||||
fast_read_dio_cmd=0xbb
|
||||
fast_read_dio_dmy_clk=0
|
||||
|
||||
fast_read_qo_cmd=0x6b
|
||||
fast_read_qo_dmy_clk=1
|
||||
fast_read_qio_cmd=0xeb
|
||||
fast_read_qio_dmy_clk=2
|
||||
|
||||
qpi_fast_read_qio_cmd=0xeb
|
||||
qpi_fast_read_qio_dmy_clk=2
|
||||
qpi_page_prog_cmd=0x02
|
||||
write_vreg_enable_cmd=0x50
|
||||
|
||||
wel_reg_index=0
|
||||
qe_reg_index=1
|
||||
busy_reg_index=0
|
||||
wel_bit_pos=1
|
||||
|
||||
qe_bit_pos=1
|
||||
busy_bit_pos=0
|
||||
wel_reg_write_len=2
|
||||
wel_reg_read_len=1
|
||||
|
||||
qe_reg_write_len=2
|
||||
qe_reg_read_len=1
|
||||
release_power_down = 0xab
|
||||
busy_reg_read_len=1
|
||||
|
||||
reg_read_cmd0=0x05
|
||||
reg_read_cmd1=0x35
|
||||
|
||||
reg_write_cmd0=0x01
|
||||
reg_write_cmd1=0x01
|
||||
|
||||
enter_qpi_cmd=0x38
|
||||
exit_qpi_cmd=0xff
|
||||
cont_read_code=0x20
|
||||
cont_read_exit_code=0xf0
|
||||
|
||||
burst_wrap_cmd=0x77
|
||||
burst_wrap_dmy_clk=0x03
|
||||
burst_wrap_data_mode=2
|
||||
burst_wrap_code=0x40
|
||||
|
||||
de_burst_wrap_cmd=0x77
|
||||
de_burst_wrap_cmd_dmy_clk=0x03
|
||||
de_burst_wrap_code_mode=2
|
||||
de_burst_wrap_code=0xf0
|
||||
|
||||
sector_erase_time=300
|
||||
blk32k_erase_time=1200
|
||||
|
||||
blk64k_erase_time=1200
|
||||
|
||||
page_prog_time=50
|
||||
|
||||
chip_erase_time=200000
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
||||
flashcfg_crc32=0
|
||||
|
||||
#########################clk cfg#####################################
|
||||
clkcfg_magic_code=0x47464350
|
||||
#clkcfg_magic_code=0
|
||||
|
||||
#0:None,1:24M,2:32M,3:38.4M,4:40M,5:26M,6:RC32M
|
||||
xtal_type=4
|
||||
#0:RC32M,1:Xtal,2:cpupll 400M,3:wifipll 192M,4:wifipll 320M
|
||||
mcu_clk=4
|
||||
mcu_clk_div=0
|
||||
mcu_bclk_div=0
|
||||
mcu_pbclk_div=3
|
||||
|
||||
lp_div=1
|
||||
|
||||
#0:RC32M,1:Xtal,2:wifipll 240M,3:wifipll 320M,4:cpupll 400M
|
||||
dsp_clk=3
|
||||
dsp_clk_div=0
|
||||
dsp_bclk_div=1
|
||||
#0:RC32M,1:Xtal,2:wifipll 160M,3:cpupll 160M,4:wifipll 240M
|
||||
dsp_pbclk=2
|
||||
dsp_pbclk_div=0
|
||||
|
||||
#0:mcu pbclk,1:cpupll 200M,2:wifipll 320M,3:cpupll 400M
|
||||
emi_clk=2
|
||||
emi_clk_div=1
|
||||
|
||||
#0:wifipll 120M,1:xtal,2:cpupll 100M,3:wifipll 80M,4:bclk,5:wifipll 96M
|
||||
flash_clk_type=1
|
||||
flash_clk_div=0
|
||||
|
||||
wifipll_pu=1
|
||||
aupll_pu=1
|
||||
cpupll_pu=1
|
||||
mipipll_pu=1
|
||||
uhspll_pu=1
|
||||
|
||||
clkcfg_crc32=0
|
||||
|
||||
########################boot cfg#####################################
|
||||
#1:ECC
|
||||
sign=0
|
||||
#1:AES128, 2:AES256, 3:AES192
|
||||
encrypt_type=0
|
||||
key_sel=0
|
||||
#0:AES CTR MODE, 1:AES XTS MODE
|
||||
xts_mode=0
|
||||
aes_region_lock=0
|
||||
no_segment=1
|
||||
boot2_enable=0
|
||||
boot2_rollback=0
|
||||
cpu_master_id=0
|
||||
notload_in_bootrom=0
|
||||
crc_ignore=1
|
||||
hash_ignore=1
|
||||
power_on_mm=1
|
||||
em_sel=1
|
||||
cmds_en=1
|
||||
#0:cmds bypass wrap commands to macro, original mode;
|
||||
#1:cmds handle wrap commands, original mode;
|
||||
#2:cmds bypass wrap commands to macro, cmds force wrap16*4 splitted into two wrap8*4;
|
||||
#3:cmds handle wrap commands, cmds force wrap16*4 splitted into two wrap8*4
|
||||
cmds_wrap_mode=2
|
||||
#0:SF_CTRL_WRAP_LEN_8, 1:SF_CTRL_WRAP_LEN_16, 2:SF_CTRL_WRAP_LEN_32,
|
||||
#3:SF_CTRL_WRAP_LEN_64, 9: SF_CTRL_WRAP_LEN_4096
|
||||
cmds_wrap_len=2
|
||||
icache_invalid=1
|
||||
dcache_invalid=1
|
||||
fpga_halt_release=0
|
||||
|
||||
########################image cfg####################################
|
||||
#flash controller offset
|
||||
group_image_offset=0x00002000
|
||||
aes_region_len=0
|
||||
|
||||
#total image len or segment count
|
||||
img_len_cnt=0x8000
|
||||
#img hash
|
||||
hash_0=0xdeadbeef
|
||||
hash_1=0
|
||||
hash_2=0
|
||||
hash_3=0
|
||||
hash_4=0
|
||||
hash_5=0
|
||||
hash_6=0
|
||||
hash_7=0
|
||||
|
||||
########################CPU M0 cfg###################################
|
||||
m0_config_enable=1
|
||||
m0_halt_cpu=0
|
||||
m0_cache_enable=0
|
||||
m0_cache_wa=0
|
||||
m0_cache_wb=0
|
||||
m0_cache_wt=0
|
||||
m0_cache_way_dis=0
|
||||
m0_reserved=0
|
||||
m0_cache_range_h=0
|
||||
m0_cache_range_l=0
|
||||
|
||||
#img RAM address or flash offset
|
||||
m0_image_address_offset=0x00002000
|
||||
m0_boot_entry=0x58000000
|
||||
m0_msp_val=0
|
||||
|
||||
########################CPU D0 cfg###################################
|
||||
d0_config_enable=1
|
||||
d0_halt_cpu=0
|
||||
d0_cache_enable=0
|
||||
d0_cache_wa=0
|
||||
d0_cache_wb=0
|
||||
d0_cache_wt=0
|
||||
d0_cache_way_dis=0
|
||||
d0_reserved=0
|
||||
d0_cache_range_h=0
|
||||
d0_cache_range_l=0
|
||||
|
||||
#img RAM address or flash offset
|
||||
d0_image_address_offset=0x00022000
|
||||
d0_boot_entry=0x58020000
|
||||
d0_msp_val=0
|
||||
|
||||
########################CPU LP cfg###################################
|
||||
lp_config_enable=1
|
||||
lp_halt_cpu=0
|
||||
lp_cache_enable=0
|
||||
lp_cache_wa=0
|
||||
lp_cache_wb=0
|
||||
lp_cache_wt=0
|
||||
lp_cache_way_dis=0
|
||||
lp_reserved=0
|
||||
lp_cache_range_h=0x58050000
|
||||
lp_cache_range_l=0x58040000
|
||||
|
||||
#img RAM address or flash offset
|
||||
lp_image_address_offset=0x00042000
|
||||
lp_boot_entry=0x58040000
|
||||
lp_msp_val=0
|
||||
|
||||
boot2_pt_table_0=0
|
||||
boot2_pt_table_1=0
|
||||
|
||||
flashCfgTableAddr=0
|
||||
flashCfgTableLen=0
|
||||
|
||||
########################patch on read################################
|
||||
patch_read_addr0=0
|
||||
patch_read_value0=0
|
||||
patch_read_addr1=0
|
||||
patch_read_value1=0
|
||||
patch_read_addr2=0
|
||||
patch_read_value2=0
|
||||
patch_read_addr3=0
|
||||
patch_read_value3=0
|
||||
|
||||
########################patch on jump################################
|
||||
patch_jump_addr0=0x20000320
|
||||
patch_jump_value0=0
|
||||
patch_jump_addr1=0
|
||||
patch_jump_value1=0
|
||||
patch_jump_addr2=0
|
||||
patch_jump_value2=0
|
||||
patch_jump_addr3=0
|
||||
patch_jump_value3=0
|
||||
|
||||
reserved1=0
|
||||
reserved2=0
|
||||
reserved3=0
|
||||
reserved4=0
|
||||
|
||||
crc32=0xdeadbeef
|
||||
|
||||
[BOOTHEADER_GROUP1_CFG]
|
||||
magic_code=0x50414642
|
||||
revision=1
|
||||
|
||||
#########################flash cfg(ignored for group1)###############
|
||||
#########################clk cfg(ignored for group1)#################
|
||||
########################boot cfg#####################################
|
||||
#1:ECC
|
||||
sign=0
|
||||
#1:AES128,2:AES256,3:AES192
|
||||
encrypt_type=0
|
||||
key_sel=0
|
||||
xts_mode=0
|
||||
aes_region_lock=0
|
||||
no_segment=1
|
||||
boot2_enable=0
|
||||
boot2_rollback=0
|
||||
cpu_master_id=0
|
||||
notload_in_bootrom=0
|
||||
crc_ignore=1
|
||||
hash_ignore=1
|
||||
power_on_mm=0
|
||||
em_sel=0
|
||||
cmds_en=1
|
||||
cmds_wrap_mode=2
|
||||
#2:SF_CTRL_WRAP_LEN_32, 3:SF_CTRL_WRAP_LEN_64, 9: SF_CTRL_WRAP_LEN_4096
|
||||
cmds_wrap_len=2
|
||||
icache_invalid=1
|
||||
dcache_invalid=1
|
||||
fpga_halt_release=0
|
||||
|
||||
########################image cfg####################################
|
||||
#flash controller offset
|
||||
group_image_offset=0x00052000
|
||||
aes_region_len=0
|
||||
|
||||
#total image len or segment count
|
||||
img_len_cnt=0x8000
|
||||
#img hash
|
||||
hash_0=0xdeadbeef
|
||||
hash_1=0
|
||||
hash_2=0
|
||||
hash_3=0
|
||||
hash_4=0
|
||||
hash_5=0
|
||||
hash_6=0
|
||||
hash_7=0
|
||||
|
||||
########################CPU M0 cfg###################################
|
||||
m0_config_enable=1
|
||||
m0_halt_cpu=0
|
||||
m0_cache_enable=0
|
||||
m0_cache_wa=0
|
||||
m0_cache_wb=0
|
||||
m0_cache_wt=0
|
||||
m0_cache_way_dis=0
|
||||
m0_reserved=0
|
||||
m0_cache_range_h=0
|
||||
m0_cache_range_l=0
|
||||
|
||||
#img RAM address or flash offset
|
||||
m0_image_address_offset=0x00052000
|
||||
m0_boot_entry=0xD8000000
|
||||
m0_msp_val=0
|
||||
|
||||
########################CPU D0 cfg###################################
|
||||
d0_config_enable=1
|
||||
d0_halt_cpu=0
|
||||
d0_cache_enable=0
|
||||
d0_cache_wa=0
|
||||
d0_cache_wb=0
|
||||
d0_cache_wt=0
|
||||
d0_cache_way_dis=0
|
||||
d0_reserved=0
|
||||
d0_cache_range_h=0
|
||||
d0_cache_range_l=0
|
||||
|
||||
#img RAM address or flash offset
|
||||
d0_image_address_offset=0x00072000
|
||||
d0_boot_entry=0x58020000
|
||||
d0_msp_val=0
|
||||
|
||||
########################CPU LP cfg###################################
|
||||
lp_config_enable=1
|
||||
lp_halt_cpu=0
|
||||
lp_cache_enable=0
|
||||
lp_cache_wa=0
|
||||
lp_cache_wb=0
|
||||
lp_cache_wt=0
|
||||
lp_cache_way_dis=0
|
||||
lp_reserved=0
|
||||
lp_cache_range_h=0
|
||||
lp_cache_range_l=0
|
||||
|
||||
#img RAM address or flash offset
|
||||
lp_image_address_offset=0x00082000
|
||||
lp_boot_entry=0x58040000
|
||||
lp_msp_val=0
|
||||
|
||||
boot2_pt_table_0=0
|
||||
boot2_pt_table_1=0
|
||||
|
||||
flashCfgTableAddr=0
|
||||
flashCfgTableLen=0
|
||||
|
||||
########################patch on read################################
|
||||
patch_read_addr0=0
|
||||
patch_read_value0=0
|
||||
patch_read_addr1=0
|
||||
patch_read_value1=0
|
||||
patch_read_addr2=0
|
||||
patch_read_value2=0
|
||||
patch_read_addr3=0
|
||||
patch_read_value3=0
|
||||
|
||||
########################patch on jump################################
|
||||
patch_jump_addr0=0x20000320
|
||||
patch_jump_value0=0
|
||||
patch_jump_addr1=0
|
||||
patch_jump_value1=0
|
||||
patch_jump_addr2=0
|
||||
patch_jump_value2=0
|
||||
patch_jump_addr3=0
|
||||
patch_jump_value3=0
|
||||
|
||||
reserved1=0
|
||||
reserved2=0
|
||||
reserved3=0
|
||||
reserved4=0
|
||||
|
||||
crc32=0xdeadbeef
|
||||
@ -0,0 +1,119 @@
|
||||
[LOAD_CFG]
|
||||
#jlink or uart
|
||||
interface = uart
|
||||
device = COM1
|
||||
speed_uart_boot = 500000
|
||||
speed_uart_load = 2000000
|
||||
#cklink usb vid|pid
|
||||
cklink_vidpid = 42bf|b210
|
||||
cklink_type = CKLink_Lite_Vendor-rog
|
||||
#eg: rv_dbg_plus, ft2232hl, ft2232d
|
||||
openocd_config = rv_dbg_plus
|
||||
auto_burn = false
|
||||
speed_jlink = 1000
|
||||
#0:without load, 1:eflash_loader load, 2: bootrom load
|
||||
load_function = 2
|
||||
do_reset = true
|
||||
#reset retry+hold time
|
||||
reset_hold_time = 50
|
||||
shake_hand_delay = 100
|
||||
reset_revert = false
|
||||
cutoff_time = 50
|
||||
shake_hand_retry = 3
|
||||
flash_burn_retry = 1
|
||||
checksum_err_retry = 3
|
||||
erase_time_out = 100000
|
||||
#chiptype=bl616
|
||||
check_mac = true
|
||||
#0:no erase,1:programmed section erase,2:chip erase
|
||||
erase = 1
|
||||
# switch eflash_loader command log save
|
||||
local_log = false
|
||||
#0:verify by calculating SHA256(xip), >0:read back verify and verify by calculating SHA256(sbus)
|
||||
verify = 0
|
||||
tx_size = 2056
|
||||
cpu_reset_after_load = false
|
||||
#empty for auto, otherwise specified clock para file path: eg: chips/bl616/efuse_bootheader/clock_para.bin
|
||||
clock_para = ""
|
||||
#skip mode set first para is skip addr, second para is skip len
|
||||
skip_mode = 0x0, 0x0
|
||||
boot2_isp_mode = 0
|
||||
isp_mode_speed = 2000000
|
||||
isp_shakehand_timeout = 0
|
||||
|
||||
[FLASH_CFG]
|
||||
flash_id = ef4016
|
||||
#bit 7-4 flash_clock_type: 0:120M wifipll, 1:xtal, 2:128M cpupll, 3:80M wifipll, 4:bclk, 5:96M wifipll
|
||||
#bit 3-0 flash_clock_div
|
||||
flash_clock_cfg = 0x41
|
||||
#0:0.5T delay, 1:1T delay, 2:1.5T delay, 3:2T delay
|
||||
flash_clock_delay = 0
|
||||
#0:NIO, 1:DO, 2:QO, 3:DIO, 4:QIO
|
||||
flash_io_mode = 1
|
||||
#flash_pin value:
|
||||
#bit 7 flash pin autoscan
|
||||
#bit 6 flash select 0: flash1, 1: flash2
|
||||
#bit 5-0 flash pin cfg:
|
||||
#0x0: single flash, sf1 internal swap io3 and io0
|
||||
#0x1: single flash, sf1 internal swap io3 with io0 and io2 with cs
|
||||
#0x2: single flash, sf1 internal no swap
|
||||
#0x3: single flash, sf1 internal swap io2 with cs
|
||||
#0x4: single flash, sf2 external GPIO4-9 and swap io3 with io0
|
||||
#0x8: single flash, sf3 external GPIO10-15
|
||||
#0x14:dual flash, sf1 internal swap io3 and io0, sf2 external GPIO4-9 swap io3 with io0
|
||||
#0x15:dual flash, sf1 internal swap io3 with io0 and io2 with cs, sf2 external GPIO4-9 swap io3 with io0
|
||||
#0x16:dual flash, sf1 internal no swap, sf2 external GPIO4-9 swap io3 with io0
|
||||
#0x17:dual flash, sf1 internal swap io2 with cs, sf2 external GPIO4-9 swap io3 with io0
|
||||
#0x24:single flash, sf2 external GPIO4-9
|
||||
#0x34:dual flash, sf1 internal swap io3 and io0, sf2 external GPIO4-9 no swap
|
||||
#0x35:dual flash, sf1 internal swap io3 with io0 and io2 with cs, sf2 external GPIO4-9 no swap
|
||||
#0x36:dual flash, sf1 internal no swap, sf2 external GPIO4-9 no swap
|
||||
#0x37:dual flash, sf1 internal swap io2 with cs, sf2 external GPIO4-9 no swap
|
||||
flash_pin = 0x80
|
||||
#empty for auto, otherwise specified flash para file path: eg: chips/bl616/efuse_bootheader/flash_para.bin
|
||||
flash_para = chips/bl616/efuse_bootheader/flash_para.bin
|
||||
decompress_write = false
|
||||
file = chips/bl616/img_create2/whole_img.bin
|
||||
address = 00000000
|
||||
|
||||
[FLASH2_CFG]
|
||||
flash2_en = false
|
||||
#flash size, 0:0.5M, 1:1M, 2:2M, 4: 4M, 8: 8M, 16: 16M
|
||||
flash1_size = 4
|
||||
flash2_size = 2
|
||||
flash2_id = ef4015
|
||||
flash2_clock_cfg = 0x41
|
||||
#0:0.5T delay, 1:1T delay, 2:1.5T delay, 3:2T delay
|
||||
flash2_clock_delay = 0
|
||||
#0:NIO, 1:DO, 2:QO, 3:DIO, 4:QIO
|
||||
flash2_io_mode = 0x10
|
||||
#flash_pin value:
|
||||
#bit 7 flash pin autoscan
|
||||
#bit 6 flash select 0: flash1, 1: flash2
|
||||
#bit 5-0 flash pin cfg:
|
||||
#0x0: single flash, sf1 internal swap io3 and io0
|
||||
#0x1: single flash, sf1 internal swap io3 with io0 and io2 with cs
|
||||
#0x2: single flash, sf1 internal no swap
|
||||
#0x3: single flash, sf1 internal swap io2 with cs
|
||||
#0x4: single flash, sf2 external GPIO4-9 and swap io3 with io0
|
||||
#0x8: single flash, sf3 external GPIO10-15
|
||||
#0x14:dual flash, sf1 internal swap io3 and io0, sf2 external GPIO4-9 swap io3 with io0
|
||||
#0x15:dual flash, sf1 internal swap io3 with io0 and io2 with cs, sf2 external GPIO4-9 swap io3 with io0
|
||||
#0x16:dual flash, sf1 internal no swap, sf2 external GPIO4-9 swap io3 with io0
|
||||
#0x17:dual flash, sf1 internal swap io2 with cs, sf2 external GPIO4-9 swap io3 with io0
|
||||
#0x24:single flash, sf2 external GPIO4-9
|
||||
#0x34:dual flash, sf1 internal swap io3 and io0, sf2 external GPIO4-9 no swap
|
||||
#0x35:dual flash, sf1 internal swap io3 with io0 and io2 with cs, sf2 external GPIO4-9 no swap
|
||||
#0x36:dual flash, sf1 internal no swap, sf2 external GPIO4-9 no swap
|
||||
#0x37:dual flash, sf1 internal swap io2 with cs, sf2 external GPIO4-9 no swap
|
||||
flash2_pin = 0xC0
|
||||
#empty for auto, otherwise specified flash para file path: eg: chips/bl616/efuse_bootheader/flash2_para.bin
|
||||
flash2_para = chips/bl616/efuse_bootheader/flash2_para.bin
|
||||
|
||||
[EFUSE_CFG]
|
||||
burn_en = true
|
||||
factory_mode = false
|
||||
security_write = false
|
||||
security_save = true
|
||||
file = ../../../Tools/img_tools/efuse_bootheader/efusedata.bin
|
||||
maskfile = ../../../Tools/img_tools/efuse_bootheader/efusedata_mask.bin
|
||||
@ -0,0 +1,382 @@
|
||||
[EFUSE_CFG]
|
||||
########################################################################
|
||||
ef_sf_aes_mode = 0
|
||||
ef_sboot_en = 0
|
||||
ef_dbg_jtag_0_dis = 0
|
||||
ef_dbg_mode = 0
|
||||
###################################################################
|
||||
ef_dbg_pwd_low = 0
|
||||
ef_dbg_pwd_high = 0
|
||||
##########################################
|
||||
sign_cfg = 0
|
||||
################################################################
|
||||
|
||||
ef_key_slot_0_w0 = 0
|
||||
ef_key_slot_0_w1 = 0
|
||||
ef_key_slot_0_w2 = 0
|
||||
ef_key_slot_0_w3 = 0
|
||||
ef_key_slot_1_w0 = 0
|
||||
ef_key_slot_1_w1 = 0
|
||||
ef_key_slot_1_w2 = 0
|
||||
ef_key_slot_1_w3 = 0
|
||||
ef_key_slot_2_w0 = 0
|
||||
ef_key_slot_2_w1 = 0
|
||||
ef_key_slot_2_w2 = 0
|
||||
ef_key_slot_2_w3 = 0
|
||||
ef_key_slot_3_w0 = 0
|
||||
ef_key_slot_3_w1 = 0
|
||||
ef_key_slot_3_w2 = 0
|
||||
ef_key_slot_3_w3 = 0
|
||||
wr_lock_key_slot_0 = 0
|
||||
wr_lock_key_slot_1 = 0
|
||||
wr_lock_key_slot_2 = 0
|
||||
wr_lock_key_slot_3 = 0
|
||||
wr_lock_sw_usage_0 = 0
|
||||
wr_lock_sw_usage_1 = 0
|
||||
wr_lock_sw_usage_2 = 0
|
||||
wr_lock_sw_usage_3 = 0
|
||||
wr_lock_key_slot_11 = 0
|
||||
rd_lock_dbg_pwd = 0
|
||||
rd_lock_key_slot_0 = 0
|
||||
rd_lock_key_slot_1 = 0
|
||||
rd_lock_key_slot_2 = 0
|
||||
rd_lock_key_slot_3 = 0
|
||||
rd_lock_key_slot_11 = 0
|
||||
########################################################################
|
||||
ef_key_slot_4_w0 = 0
|
||||
ef_key_slot_4_w1 = 0
|
||||
ef_key_slot_4_w2 = 0
|
||||
ef_key_slot_4_w3 = 0
|
||||
ef_key_slot_5_w0 = 0
|
||||
ef_key_slot_5_w1 = 0
|
||||
ef_key_slot_5_w2 = 0
|
||||
ef_key_slot_5_w3 = 0
|
||||
ef_key_slot_6_w0 = 0
|
||||
ef_key_slot_6_w1 = 0
|
||||
ef_key_slot_6_w2 = 0
|
||||
ef_key_slot_6_w3 = 0
|
||||
ef_key_slot_7_w0 = 0
|
||||
ef_key_slot_7_w1 = 0
|
||||
ef_key_slot_7_w2 = 0
|
||||
ef_key_slot_7_w3 = 0
|
||||
ef_key_slot_8_w0 = 0
|
||||
ef_key_slot_8_w1 = 0
|
||||
ef_key_slot_8_w2 = 0
|
||||
ef_key_slot_8_w3 = 0
|
||||
ef_key_slot_9_w0 = 0
|
||||
ef_key_slot_9_w1 = 0
|
||||
ef_key_slot_9_w2 = 0
|
||||
ef_key_slot_9_w3 = 0
|
||||
ef_key_slot_10_w0 = 0
|
||||
ef_key_slot_10_w1 = 0
|
||||
ef_key_slot_10_w2 = 0
|
||||
ef_key_slot_10_w3 = 0
|
||||
ef_dat_1_rsvd_0 = 0
|
||||
ef_dat_1_rsvd_1 = 0
|
||||
ef_dat_1_rsvd_2 = 0
|
||||
########################################################################
|
||||
wr_lock_rsvd_2 = 0
|
||||
wr_lock_key_slot_4 = 0
|
||||
wr_lock_key_slot_5 = 0
|
||||
wr_lock_key_slot_6 = 0
|
||||
wr_lock_key_slot_7 = 0
|
||||
wr_lock_key_slot_8 = 0
|
||||
wr_lock_key_slot_9 = 0
|
||||
wr_lock_key_slot_10 = 0
|
||||
wr_lock_dat_1_rsvd_0 = 0
|
||||
wr_lock_dat_1_rsvd_1 = 0
|
||||
wr_lock_dat_1_rsvd_2 = 0
|
||||
rd_lock_key_slot_4 = 0
|
||||
rd_lock_key_slot_5 = 0
|
||||
rd_lock_key_slot_6 = 0
|
||||
rd_lock_key_slot_7 = 0
|
||||
rd_lock_key_slot_8 = 0
|
||||
rd_lock_key_slot_9 = 0
|
||||
rd_lock_key_slot_10 = 0
|
||||
########################################################################
|
||||
ef_zone_00_w0 = 0
|
||||
ef_zone_00_w1 = 0
|
||||
ef_zone_00_w2 = 0
|
||||
ef_zone_00_w3 = 0
|
||||
ef_zone_01_w0 = 0
|
||||
ef_zone_01_w1 = 0
|
||||
ef_zone_01_w2 = 0
|
||||
ef_zone_01_w3 = 0
|
||||
ef_zone_02_w0 = 0
|
||||
ef_zone_02_w1 = 0
|
||||
ef_zone_02_w2 = 0
|
||||
ef_zone_02_w3 = 0
|
||||
ef_zone_03_w0 = 0
|
||||
ef_zone_03_w1 = 0
|
||||
ef_zone_03_w2 = 0
|
||||
ef_zone_03_w3 = 0
|
||||
ef_zone_04_w0 = 0
|
||||
ef_zone_04_w1 = 0
|
||||
ef_zone_04_w2 = 0
|
||||
ef_zone_04_w3 = 0
|
||||
ef_zone_05_w0 = 0
|
||||
ef_zone_05_w1 = 0
|
||||
ef_zone_05_w2 = 0
|
||||
ef_zone_05_w3 = 0
|
||||
ef_zone_06_w0 = 0
|
||||
ef_zone_06_w1 = 0
|
||||
ef_zone_06_w2 = 0
|
||||
ef_zone_06_w3 = 0
|
||||
ef_zone_07_w0 = 0
|
||||
ef_zone_07_w1 = 0
|
||||
ef_zone_07_w2 = 0
|
||||
ef_zone_07_w3 = 0
|
||||
ef_zone_08_w0 = 0
|
||||
ef_zone_08_w1 = 0
|
||||
ef_zone_08_w2 = 0
|
||||
ef_zone_08_w3 = 0
|
||||
ef_zone_09_w0 = 0
|
||||
ef_zone_09_w1 = 0
|
||||
ef_zone_09_w2 = 0
|
||||
ef_zone_09_w3 = 0
|
||||
ef_zone_10_w0 = 0
|
||||
ef_zone_10_w1 = 0
|
||||
ef_zone_10_w2 = 0
|
||||
ef_zone_10_w3 = 0
|
||||
ef_zone_11_w0 = 0
|
||||
ef_zone_11_w1 = 0
|
||||
ef_zone_11_w2 = 0
|
||||
ef_zone_11_w3 = 0
|
||||
ef_zone_12_w0 = 0
|
||||
ef_zone_12_w1 = 0
|
||||
ef_zone_12_w2 = 0
|
||||
ef_zone_12_w3 = 0
|
||||
ef_zone_13_w0 = 0
|
||||
ef_zone_13_w1 = 0
|
||||
ef_zone_13_w2 = 0
|
||||
ef_zone_13_w3 = 0
|
||||
ef_zone_14_w0 = 0
|
||||
ef_zone_14_w1 = 0
|
||||
ef_zone_14_w2 = 0
|
||||
ef_zone_14_w3 = 0
|
||||
ef_zone_15_w0 = 0
|
||||
ef_zone_15_w1 = 0
|
||||
ef_zone_15_w2 = 0
|
||||
ef_zone_15_w3 = 0
|
||||
|
||||
[BOOTHEADER_GROUP0_CFG]
|
||||
magic_code = 0x504e4642
|
||||
revision = 0x01
|
||||
#########################flash cfg#############################
|
||||
flashcfg_magic_code = 0x47464346
|
||||
#flashcfg_magic_code=0
|
||||
io_mode = 0x10
|
||||
#0.5T sfctrl_clk_delay=0 sfctrl_clk_invert=3
|
||||
#1 T sfctrl_clk_delay=1 sfctrl_clk_invert=1
|
||||
#1.5T sfctrl_clk_delay=1 sfctrl_clk_invert=3
|
||||
cont_read_support = 0
|
||||
sfctrl_clk_delay = 1
|
||||
sfctrl_clk_invert = 0x01
|
||||
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 0x3
|
||||
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
enter_32bits_addr_cmd = 0xb7
|
||||
exit_32bits_addr_clk = 0xe9
|
||||
|
||||
sector_size = 4
|
||||
mfg_id = 0xff
|
||||
page_size = 256
|
||||
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
|
||||
write_enable_cmd = 0x06
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
|
||||
wel_reg_index = 0
|
||||
qe_reg_index = 1
|
||||
busy_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
|
||||
qe_bit_pos = 1
|
||||
busy_bit_pos = 0
|
||||
wel_reg_write_len = 2
|
||||
wel_reg_read_len = 1
|
||||
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
busy_reg_read_len = 1
|
||||
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
cont_read_code = 0x20
|
||||
cont_read_exit_code = 0xf0
|
||||
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xf0
|
||||
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
|
||||
blk64k_erase_time = 1200
|
||||
|
||||
page_prog_time = 50
|
||||
|
||||
chip_erase_time = 200000
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
||||
flashcfg_crc32 = 0
|
||||
|
||||
#########################clk cfg#####################################
|
||||
clkcfg_magic_code = 0x47464350
|
||||
#clkcfg_magic_code=0
|
||||
|
||||
#0:None,1:24M,2:32M,3:38.4M,4:40M,5:26M,6:RC32M
|
||||
xtal_type = 7
|
||||
#mcu_clk 0:RC32M;1:XTAL;2:aupll_div2;3:aupll_div1;4:wifipll_240M;5:wifipll_320M
|
||||
mcu_clk = 5
|
||||
mcu_clk_div = 0
|
||||
mcu_bclk_div = 0
|
||||
mcu_pbclk_div = 3
|
||||
|
||||
#0:mcu pbclk,1:cpupll 200M,2:wifipll 320M,3:cpupll 400M
|
||||
emi_clk = 2
|
||||
emi_clk_div = 1
|
||||
|
||||
#flash_clk_type 0:wifipll_120M;1:xtal;2:aupll_div5;3:muxpll_80M;4:bclk;5:wifipll_96M
|
||||
flash_clk_type = 1
|
||||
flash_clk_div = 0
|
||||
|
||||
wifipll_pu = 1
|
||||
aupll_pu = 1
|
||||
|
||||
rsvd0 = 0
|
||||
|
||||
clkcfg_crc32 = 0
|
||||
|
||||
########################boot cfg#####################################
|
||||
#1:ECC
|
||||
sign = 0
|
||||
#1:AES128 CTR,2:AES256 CTR,3:AES192 CTR,4:AES128 XTS
|
||||
encrypt_type = 0
|
||||
key_sel = 0
|
||||
xts_mode = 0
|
||||
aes_region_lock = 0
|
||||
no_segment = 1
|
||||
boot2_enable = 0
|
||||
boot2_rollback = 0
|
||||
cpu_master_id = 0
|
||||
notload_in_bootrom = 0
|
||||
crc_ignore = 0
|
||||
hash_ignore = 0
|
||||
power_on_mm = 1
|
||||
em_sel = 1
|
||||
cmds_en = 1
|
||||
#0:cmds bypass wrap commands to macro, original mode;
|
||||
#1:cmds handle wrap commands, original mode;
|
||||
#2:cmds bypass wrap commands to macro, cmds force wrap16*4 splitted into two wrap8*4;
|
||||
#3:cmds handle wrap commands, cmds force wrap16*4 splitted into two wrap8*4
|
||||
cmds_wrap_mode = 2
|
||||
#0:SF_CTRL_WRAP_LEN_8, 1:SF_CTRL_WRAP_LEN_16, 2:SF_CTRL_WRAP_LEN_32,
|
||||
#3:SF_CTRL_WRAP_LEN_64, 9: SF_CTRL_WRAP_LEN_4096
|
||||
cmds_wrap_len = 2
|
||||
icache_invalid = 1
|
||||
dcache_invalid = 1
|
||||
fpga_halt_release = 0
|
||||
|
||||
########################image cfg####################################
|
||||
#flash controller offset
|
||||
group_image_offset = 0x2000
|
||||
aes_region_len = 0
|
||||
|
||||
#total image len or segment count
|
||||
img_len_cnt = 0x100
|
||||
#img hash
|
||||
hash_0 = 0xdeadbeef
|
||||
hash_1 = 0
|
||||
hash_2 = 0
|
||||
hash_3 = 0
|
||||
hash_4 = 0
|
||||
hash_5 = 0
|
||||
hash_6 = 0
|
||||
hash_7 = 0
|
||||
|
||||
########################CPU M0 cfg###################################
|
||||
m0_config_enable = 1
|
||||
m0_halt_cpu = 0
|
||||
m0_cache_enable = 0
|
||||
m0_cache_wa = 0
|
||||
m0_cache_wb = 0
|
||||
m0_cache_wt = 0
|
||||
m0_cache_way_dis = 0
|
||||
m0_reserved = 0
|
||||
|
||||
#img RAM address or flash offset
|
||||
m0_image_address_offset = 0x0
|
||||
m0_boot_entry = 0xA0000000
|
||||
m0_msp_val = 0
|
||||
|
||||
boot2_pt_table_0 = 0
|
||||
boot2_pt_table_1 = 0
|
||||
|
||||
flashCfgTableAddr = 0
|
||||
flashCfgTableLen = 0
|
||||
|
||||
########################patch on read################################
|
||||
patch_read_addr0 = 0
|
||||
patch_read_value0 = 0
|
||||
patch_read_addr1 = 0
|
||||
patch_read_value1 = 0
|
||||
patch_read_addr2 = 0
|
||||
patch_read_value2 = 0
|
||||
|
||||
########################patch on jump################################
|
||||
patch_jump_addr0 = 0
|
||||
patch_jump_value0 = 0
|
||||
patch_jump_addr1 = 0
|
||||
patch_jump_value1 = 0
|
||||
patch_jump_addr2 = 0
|
||||
patch_jump_value2 = 0
|
||||
|
||||
reserved = 0
|
||||
|
||||
crc32 = 0xdeadbeef
|
||||
BIN
tools/bflb_tools/bouffalo_flash_cube/chips/bl616/img_create/whole_img.pack
Executable file
BIN
tools/bflb_tools/bouffalo_flash_cube/chips/bl616/img_create/whole_img.pack
Executable file
Binary file not shown.
Binary file not shown.
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,67 @@
|
||||
[LOAD_CFG]
|
||||
#jlink or uart
|
||||
interface = uart
|
||||
device = COM1
|
||||
speed_uart_boot = 500000
|
||||
speed_uart_load = 500000
|
||||
#cklink usb vid|pid
|
||||
cklink_vidpid = 42bf|b210
|
||||
cklink_type = CKLink_Lite_Vendor-rog
|
||||
#eg: rv_dbg_plus, ft2232hl, ft2232d
|
||||
openocd_config = rv_dbg_plus
|
||||
auto_burn = false
|
||||
speed_jlink = 2000
|
||||
#0:without load, 1:eflash_loader load
|
||||
load_function = 1
|
||||
do_reset = true
|
||||
#reset retry+hold time
|
||||
reset_hold_time = 50
|
||||
shake_hand_delay = 100
|
||||
reset_revert = false
|
||||
cutoff_time = 50
|
||||
shake_hand_retry = 3
|
||||
flash_burn_retry = 1
|
||||
checksum_err_retry = 3
|
||||
#1: 32M, 2: RC32M
|
||||
#xtal_type = 2
|
||||
erase_time_out = 15000
|
||||
#chiptype=702
|
||||
eflash_loader_file=chips/bl702/eflash_loader/eflash_loader_32m.bin
|
||||
check_mac = true
|
||||
#0:no erase,1:programmed section erase,2:chip erase
|
||||
erase = 1
|
||||
# switch eflash_loader command log save
|
||||
local_log = false
|
||||
#0:verify by calculating SHA256(xip), >0:read back verify and verify by calculating SHA256(sbus)
|
||||
verify = 0
|
||||
tx_size = 2056
|
||||
cpu_reset_after_load = false
|
||||
#skip mode set first para is skip addr, second para is skip len
|
||||
skip_mode = 0x0, 0x0
|
||||
boot2_isp_mode = 0
|
||||
isp_mode_speed = 2000000
|
||||
isp_shakehand_timeout = 0
|
||||
|
||||
[FLASH_CFG]
|
||||
flash_id = c84015
|
||||
#flash clock 0:72M, 1:36M, 2:24M, 3:18M
|
||||
flash_clock_cfg = 2
|
||||
#0:NIO, 1:DO, 2:QO, 3:DIO, 4:QIO
|
||||
flash_io_mode = 1
|
||||
#flash_pin value:
|
||||
#bit 2-3 = flash_cfg: 0: external gpio 23-28, 1: internal 512K, 2: internal 1M, 3: external gpio 17-22
|
||||
#bit 0-1 = swap_cfg: 0: do not swap, 1: swap cs&io2, 2: swap io0&io3, 3: swap cs&io2 io0&io3 both
|
||||
flash_pin = ""
|
||||
#empty for auto, otherwise specified para file path: eg: chips/bl702/efuse_bootheader/flash_para.bin
|
||||
flash_para = chips/bl702/efuse_bootheader/flash_para.bin
|
||||
decompress_write = false
|
||||
file = chips/bl702/img_create/bootinfo_boot2.bin chips/bl702/img_create/img_boot2.bin chips/bl702/partition/partition.bin chips/bl702/partition/partition.bin
|
||||
address = 00000000 00002000 e000 f000
|
||||
|
||||
[EFUSE_CFG]
|
||||
burn_en = true
|
||||
factory_mode = false
|
||||
security_write = false
|
||||
security_save = true
|
||||
file = ../../../Tools/img_tools/efuse_bootheader/efusedata.bin
|
||||
maskfile = ../../../Tools/img_tools/efuse_bootheader/efusedata_mask.bin
|
||||
@ -0,0 +1,196 @@
|
||||
[EFUSE_CFG]
|
||||
########################################################################
|
||||
#2bits
|
||||
ef_sf_aes_mode = 0
|
||||
#2bits
|
||||
ef_sboot_sign_mode = 0
|
||||
#2bits
|
||||
ef_sboot_en = 0
|
||||
#2bits
|
||||
ef_dbg_jtag_dis = 0
|
||||
#4bits
|
||||
ef_dbg_mode = 0
|
||||
#32bits
|
||||
ef_dbg_pwd_low = 0
|
||||
#32bits
|
||||
ef_dbg_pwd_high = 0
|
||||
###################################################################
|
||||
ef_key_slot_2_w0 = 0
|
||||
ef_key_slot_2_w1 = 0
|
||||
ef_key_slot_2_w2 = 0
|
||||
ef_key_slot_2_w3 = 0
|
||||
ef_key_slot_3_w0 = 0
|
||||
ef_key_slot_3_w1 = 0
|
||||
ef_key_slot_3_w2 = 0
|
||||
ef_key_slot_3_w3 = 0
|
||||
ef_key_slot_4_w0 = 0
|
||||
ef_key_slot_4_w1 = 0
|
||||
ef_key_slot_4_w2 = 0
|
||||
ef_key_slot_4_w3 = 0
|
||||
|
||||
wr_lock_key_slot_4_l = 0
|
||||
wr_lock_dbg_pwd = 0
|
||||
wr_lock_key_slot_2 = 0
|
||||
wr_lock_key_slot_3 = 0
|
||||
wr_lock_key_slot_4_h = 0
|
||||
rd_lock_dbg_pwd = 0
|
||||
rd_lock_key_slot_2 = 0
|
||||
rd_lock_key_slot_3 = 0
|
||||
rd_lock_key_slot_4 = 0
|
||||
|
||||
[BOOTHEADER_CFG]
|
||||
magic_code = 0x504e4642
|
||||
revision = 0x01
|
||||
#########################flash cfg#############################
|
||||
flashcfg_magic_code = 0x47464346
|
||||
#flashcfg_magic_code=0
|
||||
io_mode = 0x10
|
||||
cont_read_support = 0
|
||||
sfctrl_clk_delay = 0
|
||||
sfctrl_clk_invert = 0x03
|
||||
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
|
||||
sector_size = 4
|
||||
mfg_id = 0xff
|
||||
page_size = 256
|
||||
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
|
||||
write_enable_cmd = 0x06
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
|
||||
wel_reg_index = 0
|
||||
qe_reg_index = 1
|
||||
busy_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
|
||||
qe_bit_pos = 1
|
||||
busy_bit_pos = 0
|
||||
wel_reg_write_len = 2
|
||||
wel_reg_read_len = 1
|
||||
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
busy_reg_read_len = 1
|
||||
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
cont_read_code = 0xa0
|
||||
cont_read_exit_code = 0xff
|
||||
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
|
||||
chip_erase_time = 200000
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
||||
flashcfg_crc32 = 0
|
||||
|
||||
#########################clk cfg####################################
|
||||
clkcfg_magic_code = 0x47464350
|
||||
#clkcfg_magic_code=0
|
||||
|
||||
#0:Not use XTAL to set PLL, 1:XTAL is 32M, 2:XTAL is RC32M
|
||||
xtal_type = 1
|
||||
#0:RC32M, 1:XTAL, 2:PLL 57.6M, 3:PLL 96M, 4:PLL 144M
|
||||
pll_clk = 1
|
||||
hclk_div = 0
|
||||
bclk_div = 0
|
||||
#0:144M, 1:XCLK(RC32M or XTAL), 2:57.6M, 3:72M, 4:BCLK, 5:96M
|
||||
flash_clk_type = 1
|
||||
flash_clk_div = 0
|
||||
clkcfg_crc32 = 0
|
||||
|
||||
########################boot cfg####################################
|
||||
#1:ECC
|
||||
sign = 0
|
||||
#1:AES128,2:AES256,3:AES192
|
||||
encrypt_type = 0
|
||||
key_sel = 1
|
||||
no_segment = 1
|
||||
cache_enable = 1
|
||||
notload_in_bootrom = 0
|
||||
aes_region_lock = 0
|
||||
cache_way_disable = 0x00
|
||||
crc_ignore = 1
|
||||
hash_ignore = 1
|
||||
boot2_enable=1
|
||||
boot2_rollback=0
|
||||
|
||||
########################image cfg####################################
|
||||
#total image len or segment count
|
||||
img_len = 0x100
|
||||
bootentry = 0
|
||||
#img RAM address or flash offset
|
||||
img_start = 0x2000
|
||||
|
||||
#img hash
|
||||
hash_0 = 0xdeadbeef
|
||||
hash_1 = 0
|
||||
hash_2 = 0
|
||||
hash_3 = 0
|
||||
hash_4 = 0
|
||||
hash_5 = 0
|
||||
hash_6 = 0
|
||||
hash_7 = 0
|
||||
|
||||
#address of partition tables for boot2 in bootrom
|
||||
boot2_pt_table_0=0x1000
|
||||
boot2_pt_table_1=0x2000
|
||||
|
||||
crc32 = 0xdeadbeef
|
||||
@ -0,0 +1,82 @@
|
||||
[LOAD_CFG]
|
||||
#jlink or uart
|
||||
interface = uart
|
||||
device = COM1
|
||||
speed_uart_boot = 500000
|
||||
speed_uart_load = 500000
|
||||
#cklink usb vid|pid
|
||||
cklink_vidpid = 42bf|b210
|
||||
cklink_type = CKLink_Lite_Vendor-rog
|
||||
#eg: rv_dbg_plus, ft2232hl, ft2232d
|
||||
openocd_config = rv_dbg_plus
|
||||
auto_burn = false
|
||||
speed_jlink = 2000
|
||||
#0:without load, 1:eflash_loader load, 2: bootrom load
|
||||
load_function = 2
|
||||
do_reset = true
|
||||
#reset retry+hold time
|
||||
reset_hold_time = 50
|
||||
shake_hand_delay = 100
|
||||
reset_revert = false
|
||||
cutoff_time = 50
|
||||
shake_hand_retry = 3
|
||||
flash_burn_retry = 1
|
||||
checksum_err_retry = 3
|
||||
#1: 32M, 2: RC32M
|
||||
#xtal_type = 2
|
||||
erase_time_out = 15000
|
||||
#chiptype=702l
|
||||
eflash_loader_file=chips/bl702l/eflash_loader/eflash_loader_32m.bin
|
||||
check_mac = true
|
||||
#0:no erase,1:programmed section erase,2:chip erase
|
||||
erase = 1
|
||||
# switch eflash_loader command log save
|
||||
local_log = false
|
||||
#0:verify by calculating SHA256(xip), >0:read back verify and verify by calculating SHA256(sbus)
|
||||
verify = 0
|
||||
tx_size = 2056
|
||||
cpu_reset_after_load = false
|
||||
#empty for auto, otherwise specified clock para file path: eg: chips/bl702l/efuse_bootheader/clock_para.bin
|
||||
clock_para = chips/bl702l/efuse_bootheader/clock_para.bin
|
||||
#skip mode set first para is skip addr, second para is skip len
|
||||
skip_mode = 0x0, 0x0
|
||||
boot2_isp_mode = 0
|
||||
isp_mode_speed = 2000000
|
||||
isp_shakehand_timeout = 0
|
||||
|
||||
[FLASH_CFG]
|
||||
flash_id = c84015
|
||||
#bit 7-4 flash_clock_type: 0:XCLK(RC32M or XTAL), 1:64M, 2:BCLK, 3:42.67M
|
||||
#bit 3-0 flash_clock_div
|
||||
flash_clock_cfg = 0
|
||||
#0:0.5T delay, 1:1T delay, 2:1.5T delay
|
||||
flash_clock_delay = 1
|
||||
#0:NIO, 1:DO, 2:QO, 3:DIO, 4:QIO
|
||||
flash_io_mode = 1
|
||||
#flash_pin value:
|
||||
#bit 7 flash pin set from efuse flash cfg
|
||||
#bit 6-0 flash pin cfg:
|
||||
#0x0: sf2 external flash use GPIO23-28
|
||||
#0x1: sf1 embedded flash no swap
|
||||
#0x2: sf1 embedded flash swap io2 with cs
|
||||
#0x3: sf1 embedded flash swap io3 with io0
|
||||
#0x4: sf1 embedded flash swap io3 with io0 and io2 with cs
|
||||
#0x5: sf1 embedded flash interface reverse and no swap
|
||||
#0x6: sf1 embedded flash interface reverse and swap io2 with cs
|
||||
#0x7: sf1 embedded flash interface reverse and swap io3 with io0
|
||||
#0x8: sf1 embedded flash interface reverse and swap io3 with io0 and io2 with cs
|
||||
#0x80:flash pin set from efuse flash cfg
|
||||
flash_pin = 0x80
|
||||
#empty for auto, otherwise specified para file path: eg: chips/bl702l/efuse_bootheader/flash_para.bin
|
||||
flash_para = chips/bl702l/efuse_bootheader/flash_para.bin
|
||||
decompress_write = true
|
||||
file = chips/bl702l/img_create/bootinfo_boot2.bin chips/bl702l/img_create/img_boot2.bin chips/bl702l/partition/partition.bin chips/bl702l/partition/partition.bin
|
||||
address = 00000000 00002000 e000 f000
|
||||
|
||||
[EFUSE_CFG]
|
||||
burn_en = true
|
||||
factory_mode = false
|
||||
security_write = false
|
||||
security_save = true
|
||||
file = ../../../Tools/img_tools/efuse_bootheader/efusedata.bin
|
||||
maskfile = ../../../Tools/img_tools/efuse_bootheader/efusedata_mask.bin
|
||||
@ -0,0 +1,218 @@
|
||||
[EFUSE_CFG]
|
||||
########################################################################
|
||||
#2bits
|
||||
ef_sf_aes_mode = 0
|
||||
#2bits
|
||||
ef_sboot_sign_mode = 0
|
||||
#2bits
|
||||
ef_sboot_en = 0
|
||||
#2bits
|
||||
ef_dbg_jtag_dis = 0
|
||||
#4bits
|
||||
ef_dbg_mode = 0
|
||||
#32bits
|
||||
ef_dbg_pwd_low = 0
|
||||
#32bits
|
||||
ef_dbg_pwd_high = 0
|
||||
###################################################################
|
||||
ef_key_slot_2_w0 = 0
|
||||
ef_key_slot_2_w1 = 0
|
||||
ef_key_slot_2_w2 = 0
|
||||
ef_key_slot_2_w3 = 0
|
||||
ef_key_slot_3_w0 = 0
|
||||
ef_key_slot_3_w1 = 0
|
||||
ef_key_slot_3_w2 = 0
|
||||
ef_key_slot_3_w3 = 0
|
||||
ef_key_slot_4_w0 = 0
|
||||
ef_key_slot_4_w1 = 0
|
||||
ef_key_slot_4_w2 = 0
|
||||
ef_key_slot_4_w3 = 0
|
||||
|
||||
wr_lock_key_slot_4_l = 0
|
||||
wr_lock_dbg_pwd = 0
|
||||
wr_lock_key_slot_2 = 0
|
||||
wr_lock_key_slot_3 = 0
|
||||
wr_lock_key_slot_4_h = 0
|
||||
rd_lock_dbg_pwd = 0
|
||||
rd_lock_key_slot_2 = 0
|
||||
rd_lock_key_slot_3 = 0
|
||||
rd_lock_key_slot_4 = 0
|
||||
|
||||
[BOOTHEADER_CFG]
|
||||
magic_code = 0x504e4642
|
||||
revision = 0x01
|
||||
#########################flash cfg#############################
|
||||
flashcfg_magic_code = 0x47464346
|
||||
#flashcfg_magic_code=0
|
||||
io_mode = 0x10
|
||||
cont_read_support = 0
|
||||
sfctrl_clk_delay = 1
|
||||
sfctrl_clk_invert = 0x01
|
||||
|
||||
reset_en_cmd = 0x66
|
||||
reset_cmd = 0x99
|
||||
exit_contread_cmd = 0xff
|
||||
exit_contread_cmd_size = 3
|
||||
|
||||
jedecid_cmd = 0x9f
|
||||
jedecid_cmd_dmy_clk = 0
|
||||
qpi_jedecid_cmd = 0x9f
|
||||
qpi_jedecid_dmy_clk = 0
|
||||
|
||||
sector_size = 4
|
||||
mfg_id = 0xff
|
||||
page_size = 256
|
||||
|
||||
chip_erase_cmd = 0xc7
|
||||
sector_erase_cmd = 0x20
|
||||
blk32k_erase_cmd = 0x52
|
||||
blk64k_erase_cmd = 0xd8
|
||||
|
||||
write_enable_cmd = 0x06
|
||||
page_prog_cmd = 0x02
|
||||
qpage_prog_cmd = 0x32
|
||||
qual_page_prog_addr_mode = 0
|
||||
|
||||
fast_read_cmd = 0x0b
|
||||
fast_read_dmy_clk = 1
|
||||
qpi_fast_read_cmd = 0x0b
|
||||
qpi_fast_read_dmy_clk = 1
|
||||
|
||||
fast_read_do_cmd = 0x3b
|
||||
fast_read_do_dmy_clk = 1
|
||||
fast_read_dio_cmd = 0xbb
|
||||
fast_read_dio_dmy_clk = 0
|
||||
|
||||
fast_read_qo_cmd = 0x6b
|
||||
fast_read_qo_dmy_clk = 1
|
||||
fast_read_qio_cmd = 0xeb
|
||||
fast_read_qio_dmy_clk = 2
|
||||
|
||||
qpi_fast_read_qio_cmd = 0xeb
|
||||
qpi_fast_read_qio_dmy_clk = 2
|
||||
qpi_page_prog_cmd = 0x02
|
||||
write_vreg_enable_cmd = 0x50
|
||||
|
||||
wel_reg_index = 0
|
||||
qe_reg_index = 1
|
||||
busy_reg_index = 0
|
||||
wel_bit_pos = 1
|
||||
|
||||
qe_bit_pos = 1
|
||||
busy_bit_pos = 0
|
||||
wel_reg_write_len = 2
|
||||
wel_reg_read_len = 1
|
||||
|
||||
qe_reg_write_len = 2
|
||||
qe_reg_read_len = 1
|
||||
release_power_down = 0xab
|
||||
busy_reg_read_len = 1
|
||||
|
||||
reg_read_cmd0 = 0x05
|
||||
reg_read_cmd1 = 0x35
|
||||
|
||||
reg_write_cmd0 = 0x01
|
||||
reg_write_cmd1 = 0x01
|
||||
|
||||
enter_qpi_cmd = 0x38
|
||||
exit_qpi_cmd = 0xff
|
||||
cont_read_code = 0xa0
|
||||
cont_read_exit_code = 0xff
|
||||
|
||||
burst_wrap_cmd = 0x77
|
||||
burst_wrap_dmy_clk = 0x03
|
||||
burst_wrap_data_mode = 2
|
||||
burst_wrap_code = 0x40
|
||||
|
||||
de_burst_wrap_cmd = 0x77
|
||||
de_burst_wrap_cmd_dmy_clk = 0x03
|
||||
de_burst_wrap_code_mode = 2
|
||||
de_burst_wrap_code = 0xF0
|
||||
|
||||
sector_erase_time = 300
|
||||
blk32k_erase_time = 1200
|
||||
|
||||
blk64k_erase_time = 1200
|
||||
page_prog_time = 5
|
||||
|
||||
chip_erase_time = 33000
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
||||
flashcfg_crc32 = 0
|
||||
|
||||
#########################clk cfg####################################
|
||||
clkcfg_magic_code = 0x47464350
|
||||
#clkcfg_magic_code=0
|
||||
|
||||
#0:Not use XTAL to set PLL, 1:XTAL is 32M, 2:XTAL is RC32M
|
||||
xtal_type = 1
|
||||
#0:RC32M, 1:XTAL, 2:DLL 26.6M, 3:DLL 42.67M, 4:DLL 64M, 5:DLL 128M
|
||||
pll_clk = 5
|
||||
hclk_div = 0
|
||||
bclk_div = 1
|
||||
#0:XCLK(RC32M or XTAL), 1:64M, 2:BCLK, 3:42.67M
|
||||
flash_clk_type = 0
|
||||
flash_clk_div = 0
|
||||
clkcfg_crc32 = 0
|
||||
|
||||
########################boot cfg####################################
|
||||
#1:ECC
|
||||
sign = 0
|
||||
#1:AES128,2:AES256,3:AES192
|
||||
encrypt_type = 0
|
||||
key_sel = 1
|
||||
no_segment = 1
|
||||
cache_enable = 1
|
||||
notload_in_bootrom = 0
|
||||
aes_region_lock = 0
|
||||
cache_way_disable = 0x00
|
||||
crc_ignore = 1
|
||||
hash_ignore = 1
|
||||
boot2_enable=1
|
||||
boot2_rollback=0
|
||||
|
||||
########################image cfg####################################
|
||||
#total image len or segment count
|
||||
img_len = 0x100
|
||||
bootentry = 0
|
||||
#img RAM address or flash offset
|
||||
img_start = 0x2000
|
||||
|
||||
#img hash
|
||||
hash_0 = 0xdeadbeef
|
||||
hash_1 = 0
|
||||
hash_2 = 0
|
||||
hash_3 = 0
|
||||
hash_4 = 0
|
||||
hash_5 = 0
|
||||
hash_6 = 0
|
||||
hash_7 = 0
|
||||
|
||||
#address of partition tables for boot2 in bootrom
|
||||
boot2_pt_table_0=0x1000
|
||||
boot2_pt_table_1=0x2000
|
||||
|
||||
flashCfgTableAddr = 0
|
||||
flashCfgTableLen = 0
|
||||
|
||||
########################patch on read################################
|
||||
patch_read_addr0 = 0
|
||||
patch_read_value0 = 0
|
||||
patch_read_addr1 = 0
|
||||
patch_read_value1 = 0
|
||||
patch_read_addr2 = 0
|
||||
patch_read_value2 = 0
|
||||
|
||||
########################patch on jump################################
|
||||
patch_jump_addr0 = 0
|
||||
patch_jump_value0 = 0
|
||||
patch_jump_addr1 = 0
|
||||
patch_jump_value1 = 0
|
||||
patch_jump_addr2 = 0
|
||||
patch_jump_value2 = 0
|
||||
|
||||
reserved1 = 0
|
||||
reserved2 = 0
|
||||
|
||||
crc32 = 0xdeadbeef
|
||||
@ -0,0 +1,69 @@
|
||||
[LOAD_CFG]
|
||||
#jlink or uart
|
||||
interface = uart
|
||||
device = COM1
|
||||
speed_uart_boot = 500000
|
||||
speed_uart_load = 2000000
|
||||
#cklink usb vid|pid
|
||||
cklink_vidpid = 42bf|b210
|
||||
cklink_type = CKLink_Lite_Vendor-rog
|
||||
#eg: rv_dbg_plus, ft2232hl, ft2232d
|
||||
openocd_config = rv_dbg_plus
|
||||
auto_burn = false
|
||||
speed_jlink = 1000
|
||||
#0:without load, 1:eflash_loader load, 2: bootrom load
|
||||
load_function = 2
|
||||
do_reset = true
|
||||
#reset retry+hold time
|
||||
reset_hold_time = 50
|
||||
shake_hand_delay = 100
|
||||
reset_revert = false
|
||||
cutoff_time = 50
|
||||
shake_hand_retry = 3
|
||||
flash_burn_retry = 1
|
||||
checksum_err_retry = 3
|
||||
erase_time_out = 100000
|
||||
#chiptype=bl808
|
||||
check_mac = true
|
||||
#0:no erase,1:programmed section erase,2:chip erase
|
||||
erase = 1
|
||||
# switch eflash_loader command log save
|
||||
local_log = false
|
||||
#0:verify by calculating SHA256(xip), >0:read back verify and verify by calculating SHA256(sbus)
|
||||
verify = 0
|
||||
tx_size = 4104
|
||||
cpu_reset_after_load = false
|
||||
#empty for auto, otherwise specified clock para file path: eg: chips/bl808/efuse_bootheader/clock_para.bin
|
||||
clock_para = chips/bl808/efuse_bootheader/clock_para.bin
|
||||
#skip mode set first para is skip addr, second para is skip len
|
||||
skip_mode = 0x0, 0x0
|
||||
boot2_isp_mode = 0
|
||||
isp_mode_speed = 2000000
|
||||
isp_shakehand_timeout = 0
|
||||
|
||||
[FLASH_CFG]
|
||||
flash_id = ef4016
|
||||
#bit 7-4 flash_clock_type: 0:120M wifipll, 1:xtal, 2:128M cpupll, 3:80M wifipll, 4:bclk, 5:96M wifipll
|
||||
#bit 3-0 flash_clock_div
|
||||
flash_clock_cfg = 0x41
|
||||
#0:0.5T delay, 1:1T delay, 2:1.5T delay, 3:2T delay
|
||||
flash_clock_delay = 0
|
||||
#0:NIO, 1:DO, 2:QO, 3:DIO, 4:QIO
|
||||
flash_io_mode = 1
|
||||
#flash_pin value:
|
||||
#bit 7 flash pin autoscan
|
||||
#bit 6-0 flash pin cfg: 0: internal swap io0 with io3, 2: internal no swap io0 with io3, 4: external gpi34-39,
|
||||
flash_pin = 0x80
|
||||
#empty for auto, otherwise specified flash para file path: eg: chips/bl808/efuse_bootheader/flash_para.bin
|
||||
flash_para = chips/bl808/efuse_bootheader/flash_para.bin
|
||||
decompress_write = false
|
||||
file = chips/bl808/img_create2/whole_img.bin
|
||||
address = 00000000
|
||||
|
||||
[EFUSE_CFG]
|
||||
burn_en = true
|
||||
factory_mode = false
|
||||
security_write = false
|
||||
security_save = true
|
||||
file = ../../../Tools/img_tools/efuse_bootheader/efusedata.bin
|
||||
maskfile = ../../../Tools/img_tools/efuse_bootheader/efusedata_mask.bin
|
||||
@ -0,0 +1,520 @@
|
||||
[EFUSE_CFG]
|
||||
########################################################################
|
||||
ef_sf_aes_mode=0
|
||||
ef_no_xtal=0
|
||||
ef_force_no_trim=0
|
||||
ef_sf_key_re_sel=0
|
||||
ef_dbg_jtag_0_dis=0
|
||||
###################################################################
|
||||
ef_dbg_pwd_low=0
|
||||
ef_dbg_pwd_high=0
|
||||
ef_dbg_pwd2_low=0
|
||||
ef_dbg_pwd2_high=0
|
||||
ef_wifi_mac_low=0
|
||||
ef_wifi_mac_high=0
|
||||
ef_key_slot_0_w0=0
|
||||
ef_key_slot_0_w1=0
|
||||
ef_key_slot_0_w2=0
|
||||
ef_key_slot_0_w3=0
|
||||
ef_key_slot_1_w0=0
|
||||
ef_key_slot_1_w1=0
|
||||
ef_key_slot_1_w2=0
|
||||
ef_key_slot_1_w3=0
|
||||
ef_key_slot_2_w0=0
|
||||
ef_key_slot_2_w1=0
|
||||
ef_key_slot_2_w2=0
|
||||
ef_key_slot_2_w3=0
|
||||
ef_key_slot_3_w0=0
|
||||
ef_key_slot_3_w1=0
|
||||
ef_key_slot_3_w2=0
|
||||
ef_key_slot_3_w3=0
|
||||
##########################################
|
||||
ef_sw_usage_0=0
|
||||
ef_sw_usage_1=0
|
||||
ef_sw_usage_2=0
|
||||
ef_sw_usage_3=0
|
||||
ef_key_slot_11_w0=0
|
||||
ef_key_slot_11_w1=0
|
||||
ef_key_slot_11_w2=0
|
||||
ef_key_slot_11_w3=0
|
||||
###################################################################
|
||||
ef_sec_lifecycle=0
|
||||
wr_lock_rsvd_0=0
|
||||
wr_lock_boot_mode=0
|
||||
wr_lock_dbg_pwd=0
|
||||
wr_lock_wifi_mac=0
|
||||
wr_lock_key_slot_0=0
|
||||
wr_lock_key_slot_1=0
|
||||
wr_lock_key_slot_2=0
|
||||
wr_lock_key_slot_3=0
|
||||
wr_lock_sw_usage_0=0
|
||||
wr_lock_sw_usage_1=0
|
||||
wr_lock_sw_usage_2=0
|
||||
wr_lock_sw_usage_3=0
|
||||
wr_lock_key_slot_11=0
|
||||
rd_lock_dbg_pwd=0
|
||||
rd_lock_key_slot_0=0
|
||||
rd_lock_key_slot_1=0
|
||||
rd_lock_key_slot_2=0
|
||||
rd_lock_key_slot_3=0
|
||||
rd_lock_key_slot_11=0
|
||||
########################################################################
|
||||
ef_key_slot_4_w0=0
|
||||
ef_key_slot_4_w1=0
|
||||
ef_key_slot_4_w2=0
|
||||
ef_key_slot_4_w3=0
|
||||
ef_key_slot_5_w0=0
|
||||
ef_key_slot_5_w1=0
|
||||
ef_key_slot_5_w2=0
|
||||
ef_key_slot_5_w3=0
|
||||
ef_key_slot_6_w0=0
|
||||
ef_key_slot_6_w1=0
|
||||
ef_key_slot_6_w2=0
|
||||
ef_key_slot_6_w3=0
|
||||
ef_key_slot_7_w0=0
|
||||
ef_key_slot_7_w1=0
|
||||
ef_key_slot_7_w2=0
|
||||
ef_key_slot_7_w3=0
|
||||
ef_key_slot_8_w0=0
|
||||
ef_key_slot_8_w1=0
|
||||
ef_key_slot_8_w2=0
|
||||
ef_key_slot_8_w3=0
|
||||
ef_key_slot_9_w0=0
|
||||
ef_key_slot_9_w1=0
|
||||
ef_key_slot_9_w2=0
|
||||
ef_key_slot_9_w3=0
|
||||
ef_key_slot_10_w0=0
|
||||
ef_key_slot_10_w1=0
|
||||
ef_key_slot_10_w2=0
|
||||
ef_key_slot_10_w3=0
|
||||
ef_dat_1_rsvd_0=0
|
||||
ef_dat_1_rsvd_1=0
|
||||
ef_dat_1_rsvd_2=0
|
||||
########################################################################
|
||||
wr_lock_rsvd_1=0
|
||||
wr_lock_key_slot_4=0
|
||||
wr_lock_key_slot_5=0
|
||||
wr_lock_key_slot_6=0
|
||||
wr_lock_key_slot_7=0
|
||||
wr_lock_key_slot_8=0
|
||||
wr_lock_key_slot_9=0
|
||||
wr_lock_key_slot_10=0
|
||||
wr_lock_dat_1_rsvd_0=0
|
||||
wr_lock_dat_1_rsvd_1=0
|
||||
wr_lock_dat_1_rsvd_2=0
|
||||
rd_lock_key_slot_4=0
|
||||
rd_lock_key_slot_5=0
|
||||
rd_lock_key_slot_6=0
|
||||
rd_lock_key_slot_7=0
|
||||
rd_lock_key_slot_8=0
|
||||
rd_lock_key_slot_9=0
|
||||
rd_lock_key_slot_10=0
|
||||
|
||||
[BOOTHEADER_GROUP0_CFG]
|
||||
magic_code=0x504e4642
|
||||
revision=0x01
|
||||
#########################flash cfg#############################
|
||||
flashcfg_magic_code=0x47464346
|
||||
#flashcfg_magic_code=0
|
||||
io_mode=0x10
|
||||
#0.5T sfctrl_clk_delay=0 sfctrl_clk_invert=3
|
||||
#1 T sfctrl_clk_delay=1 sfctrl_clk_invert=1
|
||||
#1.5T sfctrl_clk_delay=1 sfctrl_clk_invert=3
|
||||
cont_read_support=0
|
||||
sfctrl_clk_delay=1
|
||||
sfctrl_clk_invert=0x01
|
||||
|
||||
reset_en_cmd=0x66
|
||||
reset_cmd=0x99
|
||||
exit_contread_cmd=0xff
|
||||
exit_contread_cmd_size=0x3
|
||||
|
||||
jedecid_cmd=0x9f
|
||||
jedecid_cmd_dmy_clk=0
|
||||
enter_32bits_addr_cmd=0xb7
|
||||
exit_32bits_addr_clk=0xe9
|
||||
|
||||
sector_size=4
|
||||
mfg_id=0xff
|
||||
page_size=256
|
||||
|
||||
chip_erase_cmd=0xc7
|
||||
sector_erase_cmd=0x20
|
||||
blk32k_erase_cmd=0x52
|
||||
blk64k_erase_cmd=0xd8
|
||||
|
||||
write_enable_cmd=0x06
|
||||
page_prog_cmd=0x02
|
||||
qpage_prog_cmd=0x32
|
||||
qual_page_prog_addr_mode=0
|
||||
|
||||
fast_read_cmd=0x0b
|
||||
fast_read_dmy_clk=1
|
||||
qpi_fast_read_cmd=0x0b
|
||||
qpi_fast_read_dmy_clk=1
|
||||
|
||||
fast_read_do_cmd=0x3b
|
||||
fast_read_do_dmy_clk=1
|
||||
fast_read_dio_cmd=0xbb
|
||||
fast_read_dio_dmy_clk=0
|
||||
|
||||
fast_read_qo_cmd=0x6b
|
||||
fast_read_qo_dmy_clk=1
|
||||
fast_read_qio_cmd=0xeb
|
||||
fast_read_qio_dmy_clk=2
|
||||
|
||||
qpi_fast_read_qio_cmd=0xeb
|
||||
qpi_fast_read_qio_dmy_clk=2
|
||||
qpi_page_prog_cmd=0x02
|
||||
write_vreg_enable_cmd=0x50
|
||||
|
||||
wel_reg_index=0
|
||||
qe_reg_index=1
|
||||
busy_reg_index=0
|
||||
wel_bit_pos=1
|
||||
|
||||
qe_bit_pos=1
|
||||
busy_bit_pos=0
|
||||
wel_reg_write_len=2
|
||||
wel_reg_read_len=1
|
||||
|
||||
qe_reg_write_len=2
|
||||
qe_reg_read_len=1
|
||||
release_power_down = 0xab
|
||||
busy_reg_read_len=1
|
||||
|
||||
reg_read_cmd0=0x05
|
||||
reg_read_cmd1=0x35
|
||||
|
||||
reg_write_cmd0=0x01
|
||||
reg_write_cmd1=0x01
|
||||
|
||||
enter_qpi_cmd=0x38
|
||||
exit_qpi_cmd=0xff
|
||||
cont_read_code=0x20
|
||||
cont_read_exit_code=0xf0
|
||||
|
||||
burst_wrap_cmd=0x77
|
||||
burst_wrap_dmy_clk=0x03
|
||||
burst_wrap_data_mode=2
|
||||
burst_wrap_code=0x40
|
||||
|
||||
de_burst_wrap_cmd=0x77
|
||||
de_burst_wrap_cmd_dmy_clk=0x03
|
||||
de_burst_wrap_code_mode=2
|
||||
de_burst_wrap_code=0xf0
|
||||
|
||||
sector_erase_time=300
|
||||
blk32k_erase_time=1200
|
||||
|
||||
blk64k_erase_time=1200
|
||||
|
||||
page_prog_time=50
|
||||
|
||||
chip_erase_time=200000
|
||||
power_down_delay = 20
|
||||
qe_data = 0
|
||||
|
||||
flashcfg_crc32=0
|
||||
|
||||
#########################clk cfg#####################################
|
||||
clkcfg_magic_code=0x47464350
|
||||
#clkcfg_magic_code=0
|
||||
|
||||
#0:None,1:24M,2:32M,3:38.4M,4:40M,5:26M,6:RC32M
|
||||
xtal_type=4
|
||||
#0:RC32M,1:Xtal,2:cpupll 400M,3:wifipll 192M,4:wifipll 320M
|
||||
mcu_clk=4
|
||||
mcu_clk_div=0
|
||||
mcu_bclk_div=0
|
||||
mcu_pbclk_div=3
|
||||
|
||||
lp_div=1
|
||||
|
||||
#0:RC32M,1:Xtal,2:wifipll 240M,3:wifipll 320M,4:cpupll 400M
|
||||
dsp_clk=3
|
||||
dsp_clk_div=0
|
||||
dsp_bclk_div=1
|
||||
#0:RC32M,1:Xtal,2:wifipll 160M,3:cpupll 160M,4:wifipll 240M
|
||||
dsp_pbclk=2
|
||||
dsp_pbclk_div=0
|
||||
|
||||
#0:mcu pbclk,1:cpupll 200M,2:wifipll 320M,3:cpupll 400M
|
||||
emi_clk=2
|
||||
emi_clk_div=1
|
||||
|
||||
#0:wifipll 120M,1:xtal,2:cpupll 100M,3:wifipll 80M,4:bclk,5:wifipll 96M
|
||||
flash_clk_type=1
|
||||
flash_clk_div=0
|
||||
|
||||
wifipll_pu=1
|
||||
aupll_pu=1
|
||||
cpupll_pu=1
|
||||
mipipll_pu=1
|
||||
uhspll_pu=1
|
||||
|
||||
clkcfg_crc32=0
|
||||
|
||||
########################boot cfg#####################################
|
||||
#1:ECC
|
||||
sign=0
|
||||
#1:AES128, 2:AES256, 3:AES192
|
||||
encrypt_type=0
|
||||
key_sel=0
|
||||
#0:AES CTR MODE, 1:AES XTS MODE
|
||||
xts_mode=0
|
||||
aes_region_lock=0
|
||||
no_segment=1
|
||||
boot2_enable=0
|
||||
boot2_rollback=0
|
||||
cpu_master_id=0
|
||||
notload_in_bootrom=0
|
||||
crc_ignore=1
|
||||
hash_ignore=1
|
||||
power_on_mm=1
|
||||
em_sel=1
|
||||
cmds_en=1
|
||||
#0:cmds bypass wrap commands to macro, original mode;
|
||||
#1:cmds handle wrap commands, original mode;
|
||||
#2:cmds bypass wrap commands to macro, cmds force wrap16*4 splitted into two wrap8*4;
|
||||
#3:cmds handle wrap commands, cmds force wrap16*4 splitted into two wrap8*4
|
||||
cmds_wrap_mode=2
|
||||
#0:SF_CTRL_WRAP_LEN_8, 1:SF_CTRL_WRAP_LEN_16, 2:SF_CTRL_WRAP_LEN_32,
|
||||
#3:SF_CTRL_WRAP_LEN_64, 9: SF_CTRL_WRAP_LEN_4096
|
||||
cmds_wrap_len=2
|
||||
icache_invalid=1
|
||||
dcache_invalid=1
|
||||
fpga_halt_release=0
|
||||
|
||||
########################image cfg####################################
|
||||
#flash controller offset
|
||||
group_image_offset=0x00002000
|
||||
aes_region_len=0
|
||||
|
||||
#total image len or segment count
|
||||
img_len_cnt=0x8000
|
||||
#img hash
|
||||
hash_0=0xdeadbeef
|
||||
hash_1=0
|
||||
hash_2=0
|
||||
hash_3=0
|
||||
hash_4=0
|
||||
hash_5=0
|
||||
hash_6=0
|
||||
hash_7=0
|
||||
|
||||
########################CPU M0 cfg###################################
|
||||
m0_config_enable=1
|
||||
m0_halt_cpu=0
|
||||
m0_cache_enable=0
|
||||
m0_cache_wa=0
|
||||
m0_cache_wb=0
|
||||
m0_cache_wt=0
|
||||
m0_cache_way_dis=0
|
||||
m0_reserved=0
|
||||
m0_cache_range_h=0
|
||||
m0_cache_range_l=0
|
||||
|
||||
#img RAM address or flash offset
|
||||
m0_image_address_offset=0x00002000
|
||||
m0_boot_entry=0x58000000
|
||||
m0_msp_val=0
|
||||
|
||||
########################CPU D0 cfg###################################
|
||||
d0_config_enable=1
|
||||
d0_halt_cpu=0
|
||||
d0_cache_enable=0
|
||||
d0_cache_wa=0
|
||||
d0_cache_wb=0
|
||||
d0_cache_wt=0
|
||||
d0_cache_way_dis=0
|
||||
d0_reserved=0
|
||||
d0_cache_range_h=0
|
||||
d0_cache_range_l=0
|
||||
|
||||
#img RAM address or flash offset
|
||||
d0_image_address_offset=0x00022000
|
||||
d0_boot_entry=0x58020000
|
||||
d0_msp_val=0
|
||||
|
||||
########################CPU LP cfg###################################
|
||||
lp_config_enable=1
|
||||
lp_halt_cpu=0
|
||||
lp_cache_enable=0
|
||||
lp_cache_wa=0
|
||||
lp_cache_wb=0
|
||||
lp_cache_wt=0
|
||||
lp_cache_way_dis=0
|
||||
lp_reserved=0
|
||||
lp_cache_range_h=0x58050000
|
||||
lp_cache_range_l=0x58040000
|
||||
|
||||
#img RAM address or flash offset
|
||||
lp_image_address_offset=0x00042000
|
||||
lp_boot_entry=0x58040000
|
||||
lp_msp_val=0
|
||||
|
||||
boot2_pt_table_0=0
|
||||
boot2_pt_table_1=0
|
||||
|
||||
flashCfgTableAddr=0
|
||||
flashCfgTableLen=0
|
||||
|
||||
########################patch on read################################
|
||||
patch_read_addr0=0
|
||||
patch_read_value0=0
|
||||
patch_read_addr1=0
|
||||
patch_read_value1=0
|
||||
patch_read_addr2=0
|
||||
patch_read_value2=0
|
||||
patch_read_addr3=0
|
||||
patch_read_value3=0
|
||||
|
||||
########################patch on jump################################
|
||||
patch_jump_addr0=0x20000320
|
||||
patch_jump_value0=0
|
||||
patch_jump_addr1=0x2000f038
|
||||
patch_jump_value1=0x18000000
|
||||
patch_jump_addr2=0
|
||||
patch_jump_value2=0
|
||||
patch_jump_addr3=0
|
||||
patch_jump_value3=0
|
||||
|
||||
reserved1=0
|
||||
reserved2=0
|
||||
reserved3=0
|
||||
reserved4=0
|
||||
|
||||
crc32=0xdeadbeef
|
||||
|
||||
[BOOTHEADER_GROUP1_CFG]
|
||||
magic_code=0x50414642
|
||||
revision=1
|
||||
|
||||
#########################flash cfg(ignored for group1)###############
|
||||
#########################clk cfg(ignored for group1)#################
|
||||
########################boot cfg#####################################
|
||||
#1:ECC
|
||||
sign=0
|
||||
#1:AES128,2:AES256,3:AES192
|
||||
encrypt_type=0
|
||||
key_sel=0
|
||||
xts_mode=0
|
||||
aes_region_lock=0
|
||||
no_segment=1
|
||||
boot2_enable=0
|
||||
boot2_rollback=0
|
||||
cpu_master_id=0
|
||||
notload_in_bootrom=0
|
||||
crc_ignore=1
|
||||
hash_ignore=1
|
||||
power_on_mm=0
|
||||
em_sel=0
|
||||
cmds_en=1
|
||||
cmds_wrap_mode=2
|
||||
#2:SF_CTRL_WRAP_LEN_32, 3:SF_CTRL_WRAP_LEN_64, 9: SF_CTRL_WRAP_LEN_4096
|
||||
cmds_wrap_len=2
|
||||
icache_invalid=1
|
||||
dcache_invalid=1
|
||||
fpga_halt_release=0
|
||||
|
||||
########################image cfg####################################
|
||||
#flash controller offset
|
||||
group_image_offset=0x00052000
|
||||
aes_region_len=0
|
||||
|
||||
#total image len or segment count
|
||||
img_len_cnt=0x8000
|
||||
#img hash
|
||||
hash_0=0xdeadbeef
|
||||
hash_1=0
|
||||
hash_2=0
|
||||
hash_3=0
|
||||
hash_4=0
|
||||
hash_5=0
|
||||
hash_6=0
|
||||
hash_7=0
|
||||
|
||||
########################CPU M0 cfg###################################
|
||||
m0_config_enable=1
|
||||
m0_halt_cpu=0
|
||||
m0_cache_enable=0
|
||||
m0_cache_wa=0
|
||||
m0_cache_wb=0
|
||||
m0_cache_wt=0
|
||||
m0_cache_way_dis=0
|
||||
m0_reserved=0
|
||||
m0_cache_range_h=0
|
||||
m0_cache_range_l=0
|
||||
|
||||
#img RAM address or flash offset
|
||||
m0_image_address_offset=0x00052000
|
||||
m0_boot_entry=0xD8000000
|
||||
m0_msp_val=0
|
||||
|
||||
########################CPU D0 cfg###################################
|
||||
d0_config_enable=1
|
||||
d0_halt_cpu=0
|
||||
d0_cache_enable=0
|
||||
d0_cache_wa=0
|
||||
d0_cache_wb=0
|
||||
d0_cache_wt=0
|
||||
d0_cache_way_dis=0
|
||||
d0_reserved=0
|
||||
d0_cache_range_h=0
|
||||
d0_cache_range_l=0
|
||||
|
||||
#img RAM address or flash offset
|
||||
d0_image_address_offset=0x00072000
|
||||
d0_boot_entry=0x58020000
|
||||
d0_msp_val=0
|
||||
|
||||
########################CPU LP cfg###################################
|
||||
lp_config_enable=1
|
||||
lp_halt_cpu=0
|
||||
lp_cache_enable=0
|
||||
lp_cache_wa=0
|
||||
lp_cache_wb=0
|
||||
lp_cache_wt=0
|
||||
lp_cache_way_dis=0
|
||||
lp_reserved=0
|
||||
lp_cache_range_h=0
|
||||
lp_cache_range_l=0
|
||||
|
||||
#img RAM address or flash offset
|
||||
lp_image_address_offset=0x00082000
|
||||
lp_boot_entry=0x58040000
|
||||
lp_msp_val=0
|
||||
|
||||
boot2_pt_table_0=0
|
||||
boot2_pt_table_1=0
|
||||
|
||||
flashCfgTableAddr=0
|
||||
flashCfgTableLen=0
|
||||
|
||||
########################patch on read################################
|
||||
patch_read_addr0=0
|
||||
patch_read_value0=0
|
||||
patch_read_addr1=0
|
||||
patch_read_value1=0
|
||||
patch_read_addr2=0
|
||||
patch_read_value2=0
|
||||
patch_read_addr3=0
|
||||
patch_read_value3=0
|
||||
|
||||
########################patch on jump################################
|
||||
patch_jump_addr0=0x20000320
|
||||
patch_jump_value0=0
|
||||
patch_jump_addr1=0x2000f038
|
||||
patch_jump_value1=0x18000000
|
||||
patch_jump_addr2=0
|
||||
patch_jump_value2=0
|
||||
patch_jump_addr3=0
|
||||
patch_jump_value3=0
|
||||
|
||||
reserved1=0
|
||||
reserved2=0
|
||||
reserved3=0
|
||||
reserved4=0
|
||||
|
||||
crc32=0xdeadbeef
|
||||
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/Target.dll
Normal file
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/Target.dll
Normal file
Binary file not shown.
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/Utils.dll
Normal file
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/Utils.dll
Normal file
Binary file not shown.
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/XmlParser.dll
Normal file
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/XmlParser.dll
Normal file
Binary file not shown.
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/libScripts.so
Normal file
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/libScripts.so
Normal file
Binary file not shown.
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/libTarget.so
Normal file
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/libTarget.so
Normal file
Binary file not shown.
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/libUtils.so
Normal file
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/libUtils.so
Normal file
Binary file not shown.
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/libXml.so
Normal file
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/libXml.so
Normal file
Binary file not shown.
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/libstdc++.so.6
Normal file
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/libstdc++.so.6
Normal file
Binary file not shown.
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/libusb-1.0.dll
Normal file
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/libusb-1.0.dll
Normal file
Binary file not shown.
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/libusb-1.0.so
Normal file
BIN
tools/bflb_tools/bouffalo_flash_cube/utils/cklink/libusb-1.0.so
Normal file
Binary file not shown.
Binary file not shown.
Binary file not shown.
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,885 @@
|
||||
:020000040800F2
|
||||
:10000000280800201D350008050A0008070A000816
|
||||
:100010000B0A00080F0A0008130A0008000000007D
|
||||
:10002000000000000000000000000000170A0008A7
|
||||
:10003000190A0008000000001B0A00081D0A000839
|
||||
:1000400037350008373500083735000837350008E0
|
||||
:1000500037350008373500083735000837350008D0
|
||||
:1000600037350008373500083735000837350008C0
|
||||
:1000700037350008373500083735000837350008B0
|
||||
:100080003735000837350008373500082F0A0008D3
|
||||
:10009000370A0008373500083735000837350008BB
|
||||
:1000A0003735000837350008373500083735000880
|
||||
:1000B0003735000837350008373500083735000870
|
||||
:1000C0003735000837350008373500083735000860
|
||||
:1000D0003735000837350008373500083735000850
|
||||
:1000E00037350008373500083735000800F002F8CA
|
||||
:1000F00000F05AF80AA090E8000C82448344AAF168
|
||||
:100100000107DA4501D100F04FF8AFF2090EBAE865
|
||||
:100110000F0013F0010F18BFFB1A43F0010318473B
|
||||
:1001200058350000783500000A444FF0000C10F8F4
|
||||
:10013000013B13F0070408BF10F8014B1D1108BF65
|
||||
:1001400010F8015B641E05D010F8016B641E01F805
|
||||
:10015000016BF9D113F0080F1EBF10F8014BAD1C55
|
||||
:100160000C1B09D16D1E58BF01F801CBFAD505E073
|
||||
:1001700014F8016B01F8016B6D1EF9D59142D6D3CD
|
||||
:10018000704700000023002400250026103A28BFF5
|
||||
:1001900078C1FBD8520728BF30C148BF0B607047F9
|
||||
:1001A0001FB51FBD10B510BD03F0DBF91146FFF7F9
|
||||
:1001B000F7FF00F01FFB03F0F9F903B4FFF7F2FFBC
|
||||
:1001C00003BC03F001FA0000EFF30980704780F3ED
|
||||
:1001D00009887047EFF30880704780F308887047FC
|
||||
:1001E00040BA7047C0BA704708B501211C2001F021
|
||||
:1001F0006BFC4FF48040ADF8000010208DF8030038
|
||||
:1002000002208DF802006946844801F0A1F94FF4FC
|
||||
:100210008040824908614000ADF8000069467F488F
|
||||
:1002200001F096F94FF400407C4908612020ADF8B8
|
||||
:10023000000069467A4801F08BF94FF48070ADF800
|
||||
:1002400000006946774801F083F94FF48060ADF80B
|
||||
:10025000000048208DF803006946724801F078F9E3
|
||||
:1002600008BD08B501214FF4FE7001F02DFC4FF6DA
|
||||
:10027000FF70ADF8000000208DF803006946684863
|
||||
:1002800001F066F96946654801F062F96946664819
|
||||
:1002900001F05EF96946654801F05AF9694664481B
|
||||
:1002A00001F056F96946634801F052F908BD10B5EE
|
||||
:1002B0000121080701F015FC0121402001F0F7FBA6
|
||||
:1002C000FFF7CFFFFFF790FF10BD38B54FF0FF30BD
|
||||
:1002D0000021002807DA0A07140E574A00F00F031E
|
||||
:1002E0001B1FD45403E00A07130E544A135400BFD3
|
||||
:1002F0004FF4E06000F080FD25208DF80000012023
|
||||
:100300008DF8020000208DF80300684600F079FDAA
|
||||
:1003100038BD08B54FF4C06000F06EFD14208DF8B4
|
||||
:10032000000001208DF801008DF8020000208DF8FA
|
||||
:100330000300684600F065FD13208DF800000120E1
|
||||
:100340008DF8010000208DF802008DF8030068464A
|
||||
:1003500000F057FD08BD10B500214FF0805001F0AE
|
||||
:10036000C0FB0021402001F0A2FB00214FF400005F
|
||||
:1003700001F0B7FBFFF775FFFFF7CBFFFFF7A5FF16
|
||||
:1003800010BD10B5002001F0FFFA0121C80501F0F1
|
||||
:10039000A8FB10BD03202A49086070472948817ACC
|
||||
:1003A00019B10521264A116002E00121244A116099
|
||||
:1003B000704708B54FF4C06000F01EFD14208DF8A2
|
||||
:1003C000000001208DF801008DF802008DF8030077
|
||||
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|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="ss0" bitsize="32" regnum="95" group="cr"/>
|
||||
<reg name="ss1" bitsize="32" regnum="96" group="cr"/>
|
||||
<reg name="ss2" bitsize="32" regnum="97" group="cr"/>
|
||||
<reg name="ss3" bitsize="32" regnum="98" group="cr"/>
|
||||
<reg name="ss4" bitsize="32" regnum="99" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr14" bitsize="32" regnum="103" group="cr"/>
|
||||
<reg name="cr15" bitsize="32" regnum="104" group="cr"/>
|
||||
<reg name="cr16" bitsize="32" regnum="105" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr19" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="cr20" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="cr21" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="cr22" bitsize="32" regnum="111" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr24" bitsize="32" regnum="113" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr26" bitsize="32" regnum="115" group="cr"/>
|
||||
<reg name="cr27" bitsize="32" regnum="116" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<!-- ECC Information -->
|
||||
<reg name="errlc" bitsize="32" regnum="195" group="bank1"/>
|
||||
<reg name="erraddr" bitsize="32" regnum="196" group="bank1"/>
|
||||
<reg name="errsts" bitsize="32" regnum="197" group="bank1"/>
|
||||
<reg name="errinj" bitsize="32" regnum="198" group="bank1"/>
|
||||
<!-- -->
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
<reg name="cp1cr20" bitsize="32" regnum="209" group="bank1"/>
|
||||
<!-- Debug Regs -->
|
||||
<reg name="cindex" bitsize="32" regnum="215" group="bank1"/>
|
||||
<reg name="cdata0" bitsize="32" regnum="216" group="bank1"/>
|
||||
<reg name="cdata1" bitsize="32" regnum="217" group="bank1"/>
|
||||
<reg name="cdata2" bitsize="32" regnum="218" group="bank1"/>
|
||||
<reg name="cins" bitsize="32" regnum="220" group="bank1"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,192 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<union id="float64_union">
|
||||
<field name="double64" type="ieee_double"/>
|
||||
<field name="float32" type="ieee_single"/>
|
||||
<field name="uint64" type="uint64"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="64" regnum="40" type="float64_union" group="fpu"/>
|
||||
<reg name="fr1" bitsize="64" regnum="41" type="float64_union" group="fpu"/>
|
||||
<reg name="fr2" bitsize="64" regnum="42" type="float64_union" group="fpu"/>
|
||||
<reg name="fr3" bitsize="64" regnum="43" type="float64_union" group="fpu"/>
|
||||
<reg name="fr4" bitsize="64" regnum="44" type="float64_union" group="fpu"/>
|
||||
<reg name="fr5" bitsize="64" regnum="45" type="float64_union" group="fpu"/>
|
||||
<reg name="fr6" bitsize="64" regnum="46" type="float64_union" group="fpu"/>
|
||||
<reg name="fr7" bitsize="64" regnum="47" type="float64_union" group="fpu"/>
|
||||
<reg name="fr8" bitsize="64" regnum="48" type="float64_union" group="fpu"/>
|
||||
<reg name="fr9" bitsize="64" regnum="49" type="float64_union" group="fpu"/>
|
||||
<reg name="fr10" bitsize="64" regnum="50" type="float64_union" group="fpu"/>
|
||||
<reg name="fr11" bitsize="64" regnum="51" type="float64_union" group="fpu"/>
|
||||
<reg name="fr12" bitsize="64" regnum="52" type="float64_union" group="fpu"/>
|
||||
<reg name="fr13" bitsize="64" regnum="53" type="float64_union" group="fpu"/>
|
||||
<reg name="fr14" bitsize="64" regnum="54" type="float64_union" group="fpu"/>
|
||||
<reg name="fr15" bitsize="64" regnum="55" type="float64_union" group="fpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="ss0" bitsize="32" regnum="95" group="cr"/>
|
||||
<reg name="ss1" bitsize="32" regnum="96" group="cr"/>
|
||||
<reg name="ss2" bitsize="32" regnum="97" group="cr"/>
|
||||
<reg name="ss3" bitsize="32" regnum="98" group="cr"/>
|
||||
<reg name="ss4" bitsize="32" regnum="99" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr14" bitsize="32" regnum="103" group="cr"/>
|
||||
<reg name="cr15" bitsize="32" regnum="104" group="cr"/>
|
||||
<reg name="cr16" bitsize="32" regnum="105" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr19" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="cr20" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="cr21" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="cr22" bitsize="32" regnum="111" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr24" bitsize="32" regnum="113" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr26" bitsize="32" regnum="115" group="cr"/>
|
||||
<reg name="cr27" bitsize="32" regnum="116" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<!-- ECC Information -->
|
||||
<reg name="errlc" bitsize="32" regnum="195" group="bank1"/>
|
||||
<reg name="erraddr" bitsize="32" regnum="196" group="bank1"/>
|
||||
<reg name="errsts" bitsize="32" regnum="197" group="bank1"/>
|
||||
<reg name="errinj" bitsize="32" regnum="198" group="bank1"/>
|
||||
<!-- -->
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
<reg name="cp1cr20" bitsize="32" regnum="209" group="bank1"/>
|
||||
<!-- Debug Regs -->
|
||||
<reg name="cindex" bitsize="32" regnum="215" group="bank1"/>
|
||||
<reg name="cdata0" bitsize="32" regnum="216" group="bank1"/>
|
||||
<reg name="cdata1" bitsize="32" regnum="217" group="bank1"/>
|
||||
<reg name="cdata2" bitsize="32" regnum="218" group="bank1"/>
|
||||
<reg name="cins" bitsize="32" regnum="220" group="bank1"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,180 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<union id="float64_union">
|
||||
<field name="double64" type="ieee_double"/>
|
||||
<field name="float32" type="ieee_single"/>
|
||||
<field name="uint64" type="uint64"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="64" regnum="40" type="float64_union" group="fpu"/>
|
||||
<reg name="fr1" bitsize="64" regnum="41" type="float64_union" group="fpu"/>
|
||||
<reg name="fr2" bitsize="64" regnum="42" type="float64_union" group="fpu"/>
|
||||
<reg name="fr3" bitsize="64" regnum="43" type="float64_union" group="fpu"/>
|
||||
<reg name="fr4" bitsize="64" regnum="44" type="float64_union" group="fpu"/>
|
||||
<reg name="fr5" bitsize="64" regnum="45" type="float64_union" group="fpu"/>
|
||||
<reg name="fr6" bitsize="64" regnum="46" type="float64_union" group="fpu"/>
|
||||
<reg name="fr7" bitsize="64" regnum="47" type="float64_union" group="fpu"/>
|
||||
<reg name="fr8" bitsize="64" regnum="48" type="float64_union" group="fpu"/>
|
||||
<reg name="fr9" bitsize="64" regnum="49" type="float64_union" group="fpu"/>
|
||||
<reg name="fr10" bitsize="64" regnum="50" type="float64_union" group="fpu"/>
|
||||
<reg name="fr11" bitsize="64" regnum="51" type="float64_union" group="fpu"/>
|
||||
<reg name="fr12" bitsize="64" regnum="52" type="float64_union" group="fpu"/>
|
||||
<reg name="fr13" bitsize="64" regnum="53" type="float64_union" group="fpu"/>
|
||||
<reg name="fr14" bitsize="64" regnum="54" type="float64_union" group="fpu"/>
|
||||
<reg name="fr15" bitsize="64" regnum="55" type="float64_union" group="fpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="ss0" bitsize="32" regnum="95" group="cr"/>
|
||||
<reg name="ss1" bitsize="32" regnum="96" group="cr"/>
|
||||
<reg name="ss2" bitsize="32" regnum="97" group="cr"/>
|
||||
<reg name="ss3" bitsize="32" regnum="98" group="cr"/>
|
||||
<reg name="ss4" bitsize="32" regnum="99" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr14" bitsize="32" regnum="103" group="cr"/>
|
||||
<reg name="cr15" bitsize="32" regnum="104" group="cr"/>
|
||||
<reg name="cr16" bitsize="32" regnum="105" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr19" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="cr20" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="cr21" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="cr22" bitsize="32" regnum="111" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr24" bitsize="32" regnum="113" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr26" bitsize="32" regnum="115" group="cr"/>
|
||||
<reg name="cr27" bitsize="32" regnum="116" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
<reg name="cp1cr20" bitsize="32" regnum="209" group="bank1"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,239 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<union id="float64_union">
|
||||
<field name="double64" type="ieee_double"/>
|
||||
<field name="float32" type="ieee_single"/>
|
||||
<field name="uint64" type="uint64"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="64" regnum="40" type="float64_union" group="fpu"/>
|
||||
<reg name="fr1" bitsize="64" regnum="41" type="float64_union" group="fpu"/>
|
||||
<reg name="fr2" bitsize="64" regnum="42" type="float64_union" group="fpu"/>
|
||||
<reg name="fr3" bitsize="64" regnum="43" type="float64_union" group="fpu"/>
|
||||
<reg name="fr4" bitsize="64" regnum="44" type="float64_union" group="fpu"/>
|
||||
<reg name="fr5" bitsize="64" regnum="45" type="float64_union" group="fpu"/>
|
||||
<reg name="fr6" bitsize="64" regnum="46" type="float64_union" group="fpu"/>
|
||||
<reg name="fr7" bitsize="64" regnum="47" type="float64_union" group="fpu"/>
|
||||
<reg name="fr8" bitsize="64" regnum="48" type="float64_union" group="fpu"/>
|
||||
<reg name="fr9" bitsize="64" regnum="49" type="float64_union" group="fpu"/>
|
||||
<reg name="fr10" bitsize="64" regnum="50" type="float64_union" group="fpu"/>
|
||||
<reg name="fr11" bitsize="64" regnum="51" type="float64_union" group="fpu"/>
|
||||
<reg name="fr12" bitsize="64" regnum="52" type="float64_union" group="fpu"/>
|
||||
<reg name="fr13" bitsize="64" regnum="53" type="float64_union" group="fpu"/>
|
||||
<reg name="fr14" bitsize="64" regnum="54" type="float64_union" group="fpu"/>
|
||||
<reg name="fr15" bitsize="64" regnum="55" type="float64_union" group="fpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="SP[29]" start="29" end="29" type="int8"/>
|
||||
<field name="T[30]" start="30" end="30" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="ss0" bitsize="32" regnum="95" group="cr"/>
|
||||
<reg name="ss1" bitsize="32" regnum="96" group="cr"/>
|
||||
<reg name="ss2" bitsize="32" regnum="97" group="cr"/>
|
||||
<reg name="ss3" bitsize="32" regnum="98" group="cr"/>
|
||||
<reg name="ss4" bitsize="32" regnum="99" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr14" bitsize="32" regnum="103" group="cr"/>
|
||||
<reg name="cr15" bitsize="32" regnum="104" group="cr"/>
|
||||
<reg name="cr16" bitsize="32" regnum="105" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr19" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="cr20" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="cr21" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="cr22" bitsize="32" regnum="111" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr24" bitsize="32" regnum="113" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr26" bitsize="32" regnum="115" group="cr"/>
|
||||
<reg name="cr27" bitsize="32" regnum="116" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
<reg name="cp1cr20" bitsize="32" regnum="209" group="bank1"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.tee">
|
||||
<reg name="ebr" bitsize="32" regnum="190" group="cr"/>
|
||||
<reg name="dcr" bitsize="32" regnum="229" group="cr"/>
|
||||
<reg name="t_wssr" bitsize="32" regnum="221" group="tee"/>
|
||||
<reg name="t_wrcr" bitsize="32" regnum="222" group="tee"/>
|
||||
<reg name="t_pcr" bitsize="32" regnum="230" group="tee"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.pseudo">
|
||||
<!--cr tee vs ree-->
|
||||
<reg name="t_psr" bitsize="32" regs="89" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_vbr" bitsize="32" regs="90" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epsr" bitsize="32" regs="91" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_fpsr" bitsize="32" regs="92" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_fpc" bitsize="32" regs="94" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epc" bitsize="32" regs="93" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ebr" bitsize="32" regs="190" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_dcr" bitsize="32" regs="229" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_usp" bitsize="32" regs="127" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_psr" bitsize="32" regs="89" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_vbr" bitsize="32" regs="90" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epsr" bitsize="32" regs="91" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_fpsr" bitsize="32" regs="92" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_fpc" bitsize="32" regs="94" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epc" bitsize="32" regs="93" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ebr" bitsize="32" regs="190" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_dcr" bitsize="32" regs="229" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_usp" bitsize="32" regs="127" group="ree" type="int32" env="ree"/>
|
||||
<!--cache tee vs ree-->
|
||||
<reg name="t_cfr" bitsize="32" regs="106" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ccr" bitsize="32" regs="107" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_cir" bitsize="32" regs="111" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ccr2" bitsize="32" regs="112" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_cfr2" bitsize="32" regs="113" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_hint" bitsize="32" regs="120" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_cfr" bitsize="32" regs="106" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ccr" bitsize="32" regs="107" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_cir" bitsize="32" regs="111" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_cfr2" bitsize="32" regs="113" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_hint" bitsize="32" regs="120" group="ree" type="int32" env="ree"/>
|
||||
<!--mmu tee vs ree-->
|
||||
<reg name="t_mir" bitsize="32" regs="128" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_mel0" bitsize="32" regs="129" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_mel1" bitsize="32" regs="130" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_meh" bitsize="32" regs="131" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_mpr" bitsize="32" regs="132" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_mcir" bitsize="32" regs="133" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_msa0" bitsize="32" regs="135" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_msa1" bitsize="32" regs="136" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_mir" bitsize="32" regs="128" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_mel0" bitsize="32" regs="129" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_mel1" bitsize="32" regs="130" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_meh" bitsize="32" regs="131" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_mpr" bitsize="32" regs="132" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_mcir" bitsize="32" regs="133" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_msa0" bitsize="32" regs="135" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_msa1" bitsize="32" regs="136" group="ree" type="int32" env="ree"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,271 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<vector id="v4f" type="ieee_single" count="4"/>
|
||||
<vector id="v2d" type="ieee_double" count="2"/>
|
||||
<vector id="v16i8" type="int8" count="16"/>
|
||||
<vector id="v8i16" type="int16" count="8"/>
|
||||
<vector id="v4i32" type="int32" count="4"/>
|
||||
<vector id="v2i64" type="int64" count="2"/>
|
||||
<union id="vec128">
|
||||
<field name="v4_float" type="v4f"/>
|
||||
<field name="v2_double" type="v2d"/>
|
||||
<field name="v16_int8" type="v16i8"/>
|
||||
<field name="v8_int16" type="v8i16"/>
|
||||
<field name="v4_int32" type="v4i32"/>
|
||||
<field name="v2_int64" type="v2i64"/>
|
||||
<field name="uint128" type="uint128"/>
|
||||
</union>
|
||||
<union id="float64_union">
|
||||
<field name="double64" type="ieee_double"/>
|
||||
<field name="float32" type="ieee_single"/>
|
||||
<field name="uint64" type="uint64"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="64" regnum="40" type="float64_union" group="fpu"/>
|
||||
<reg name="fr1" bitsize="64" regnum="41" type="float64_union" group="fpu"/>
|
||||
<reg name="fr2" bitsize="64" regnum="42" type="float64_union" group="fpu"/>
|
||||
<reg name="fr3" bitsize="64" regnum="43" type="float64_union" group="fpu"/>
|
||||
<reg name="fr4" bitsize="64" regnum="44" type="float64_union" group="fpu"/>
|
||||
<reg name="fr5" bitsize="64" regnum="45" type="float64_union" group="fpu"/>
|
||||
<reg name="fr6" bitsize="64" regnum="46" type="float64_union" group="fpu"/>
|
||||
<reg name="fr7" bitsize="64" regnum="47" type="float64_union" group="fpu"/>
|
||||
<reg name="fr8" bitsize="64" regnum="48" type="float64_union" group="fpu"/>
|
||||
<reg name="fr9" bitsize="64" regnum="49" type="float64_union" group="fpu"/>
|
||||
<reg name="fr10" bitsize="64" regnum="50" type="float64_union" group="fpu"/>
|
||||
<reg name="fr11" bitsize="64" regnum="51" type="float64_union" group="fpu"/>
|
||||
<reg name="fr12" bitsize="64" regnum="52" type="float64_union" group="fpu"/>
|
||||
<reg name="fr13" bitsize="64" regnum="53" type="float64_union" group="fpu"/>
|
||||
<reg name="fr14" bitsize="64" regnum="54" type="float64_union" group="fpu"/>
|
||||
<reg name="fr15" bitsize="64" regnum="55" type="float64_union" group="fpu"/>
|
||||
<!--vector register-->
|
||||
<reg name="vr0" bitsize="128" regnum="56" type="vec128" group="vpu"/>
|
||||
<reg name="vr1" bitsize="128" regnum="57" type="vec128" group="vpu"/>
|
||||
<reg name="vr2" bitsize="128" regnum="58" type="vec128" group="vpu"/>
|
||||
<reg name="vr3" bitsize="128" regnum="59" type="vec128" group="vpu"/>
|
||||
<reg name="vr4" bitsize="128" regnum="60" type="vec128" group="vpu"/>
|
||||
<reg name="vr5" bitsize="128" regnum="61" type="vec128" group="vpu"/>
|
||||
<reg name="vr6" bitsize="128" regnum="62" type="vec128" group="vpu"/>
|
||||
<reg name="vr7" bitsize="128" regnum="63" type="vec128" group="vpu"/>
|
||||
<reg name="vr8" bitsize="128" regnum="64" type="vec128" group="vpu"/>
|
||||
<reg name="vr9" bitsize="128" regnum="65" type="vec128" group="vpu"/>
|
||||
<reg name="vr10" bitsize="128" regnum="66" type="vec128" group="vpu"/>
|
||||
<reg name="vr11" bitsize="128" regnum="67" type="vec128" group="vpu"/>
|
||||
<reg name="vr12" bitsize="128" regnum="68" type="vec128" group="vpu"/>
|
||||
<reg name="vr13" bitsize="128" regnum="69" type="vec128" group="vpu"/>
|
||||
<reg name="vr14" bitsize="128" regnum="70" type="vec128" group="vpu"/>
|
||||
<reg name="vr15" bitsize="128" regnum="71" type="vec128" group="vpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="SP[29]" start="29" end="29" type="int8"/>
|
||||
<field name="T[30]" start="30" end="30" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="ss0" bitsize="32" regnum="95" group="cr"/>
|
||||
<reg name="ss1" bitsize="32" regnum="96" group="cr"/>
|
||||
<reg name="ss2" bitsize="32" regnum="97" group="cr"/>
|
||||
<reg name="ss3" bitsize="32" regnum="98" group="cr"/>
|
||||
<reg name="ss4" bitsize="32" regnum="99" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr14" bitsize="32" regnum="103" group="cr"/>
|
||||
<reg name="cr15" bitsize="32" regnum="104" group="cr"/>
|
||||
<reg name="cr16" bitsize="32" regnum="105" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr19" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="cr20" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="cr21" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="cr22" bitsize="32" regnum="111" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr24" bitsize="32" regnum="113" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr26" bitsize="32" regnum="115" group="cr"/>
|
||||
<reg name="cr27" bitsize="32" regnum="116" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
<reg name="cp1cr20" bitsize="32" regnum="209" group="bank1"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.tee">
|
||||
<reg name="ebr" bitsize="32" regnum="190" group="cr"/>
|
||||
<reg name="dcr" bitsize="32" regnum="229" group="cr"/>
|
||||
<reg name="t_wssr" bitsize="32" regnum="221" group="tee"/>
|
||||
<reg name="t_wrcr" bitsize="32" regnum="222" group="tee"/>
|
||||
<reg name="t_pcr" bitsize="32" regnum="230" group="tee"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.pseudo">
|
||||
<!--cr tee vs ree-->
|
||||
<reg name="t_psr" bitsize="32" regs="89" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_vbr" bitsize="32" regs="90" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epsr" bitsize="32" regs="91" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_fpsr" bitsize="32" regs="92" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_fpc" bitsize="32" regs="94" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epc" bitsize="32" regs="93" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ebr" bitsize="32" regs="190" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_dcr" bitsize="32" regs="229" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_usp" bitsize="32" regs="127" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_psr" bitsize="32" regs="89" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_vbr" bitsize="32" regs="90" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epsr" bitsize="32" regs="91" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_fpsr" bitsize="32" regs="92" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_fpc" bitsize="32" regs="94" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epc" bitsize="32" regs="93" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ebr" bitsize="32" regs="190" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_dcr" bitsize="32" regs="229" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_usp" bitsize="32" regs="127" group="ree" type="int32" env="ree"/>
|
||||
<!--cache tee vs ree-->
|
||||
<reg name="t_cfr" bitsize="32" regs="106" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ccr" bitsize="32" regs="107" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_cir" bitsize="32" regs="111" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ccr2" bitsize="32" regs="112" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_cfr2" bitsize="32" regs="113" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_hint" bitsize="32" regs="120" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_cfr" bitsize="32" regs="106" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ccr" bitsize="32" regs="107" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_cir" bitsize="32" regs="111" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_cfr2" bitsize="32" regs="113" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_hint" bitsize="32" regs="120" group="ree" type="int32" env="ree"/>
|
||||
<!--mmu tee vs ree-->
|
||||
<reg name="t_mir" bitsize="32" regs="128" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_mel0" bitsize="32" regs="129" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_mel1" bitsize="32" regs="130" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_meh" bitsize="32" regs="131" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_mpr" bitsize="32" regs="132" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_mcir" bitsize="32" regs="133" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_msa0" bitsize="32" regs="135" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_msa1" bitsize="32" regs="136" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_mir" bitsize="32" regs="128" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_mel0" bitsize="32" regs="129" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_mel1" bitsize="32" regs="130" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_meh" bitsize="32" regs="131" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_mpr" bitsize="32" regs="132" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_mcir" bitsize="32" regs="133" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_msa0" bitsize="32" regs="135" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_msa1" bitsize="32" regs="136" group="ree" type="int32" env="ree"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,214 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<vector id="v4f" type="ieee_single" count="4"/>
|
||||
<vector id="v2d" type="ieee_double" count="2"/>
|
||||
<vector id="v16i8" type="int8" count="16"/>
|
||||
<vector id="v8i16" type="int16" count="8"/>
|
||||
<vector id="v4i32" type="int32" count="4"/>
|
||||
<vector id="v2i64" type="int64" count="2"/>
|
||||
<union id="vec128">
|
||||
<field name="v4_float" type="v4f"/>
|
||||
<field name="v2_double" type="v2d"/>
|
||||
<field name="v16_int8" type="v16i8"/>
|
||||
<field name="v8_int16" type="v8i16"/>
|
||||
<field name="v4_int32" type="v4i32"/>
|
||||
<field name="v2_int64" type="v2i64"/>
|
||||
<field name="uint128" type="uint128"/>
|
||||
</union>
|
||||
<union id="float64_union">
|
||||
<union id="float64_union">
|
||||
<field name="double64" type="ieee_double"/>
|
||||
<field name="float32" type="ieee_single"/>
|
||||
<field name="uint64" type="uint64"/>
|
||||
</union>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="64" regnum="40" type="float64_union" group="fpu"/>
|
||||
<reg name="fr1" bitsize="64" regnum="41" type="float64_union" group="fpu"/>
|
||||
<reg name="fr2" bitsize="64" regnum="42" type="float64_union" group="fpu"/>
|
||||
<reg name="fr3" bitsize="64" regnum="43" type="float64_union" group="fpu"/>
|
||||
<reg name="fr4" bitsize="64" regnum="44" type="float64_union" group="fpu"/>
|
||||
<reg name="fr5" bitsize="64" regnum="45" type="float64_union" group="fpu"/>
|
||||
<reg name="fr6" bitsize="64" regnum="46" type="float64_union" group="fpu"/>
|
||||
<reg name="fr7" bitsize="64" regnum="47" type="float64_union" group="fpu"/>
|
||||
<reg name="fr8" bitsize="64" regnum="48" type="float64_union" group="fpu"/>
|
||||
<reg name="fr9" bitsize="64" regnum="49" type="float64_union" group="fpu"/>
|
||||
<reg name="fr10" bitsize="64" regnum="50" type="float64_union" group="fpu"/>
|
||||
<reg name="fr11" bitsize="64" regnum="51" type="float64_union" group="fpu"/>
|
||||
<reg name="fr12" bitsize="64" regnum="52" type="float64_union" group="fpu"/>
|
||||
<reg name="fr13" bitsize="64" regnum="53" type="float64_union" group="fpu"/>
|
||||
<reg name="fr14" bitsize="64" regnum="54" type="float64_union" group="fpu"/>
|
||||
<reg name="fr15" bitsize="64" regnum="55" type="float64_union" group="fpu"/>
|
||||
<!--vector register-->
|
||||
<reg name="vr0" bitsize="128" regnum="56" type="vec128" group="vpu"/>
|
||||
<reg name="vr1" bitsize="128" regnum="57" type="vec128" group="vpu"/>
|
||||
<reg name="vr2" bitsize="128" regnum="58" type="vec128" group="vpu"/>
|
||||
<reg name="vr3" bitsize="128" regnum="59" type="vec128" group="vpu"/>
|
||||
<reg name="vr4" bitsize="128" regnum="60" type="vec128" group="vpu"/>
|
||||
<reg name="vr5" bitsize="128" regnum="61" type="vec128" group="vpu"/>
|
||||
<reg name="vr6" bitsize="128" regnum="62" type="vec128" group="vpu"/>
|
||||
<reg name="vr7" bitsize="128" regnum="63" type="vec128" group="vpu"/>
|
||||
<reg name="vr8" bitsize="128" regnum="64" type="vec128" group="vpu"/>
|
||||
<reg name="vr9" bitsize="128" regnum="65" type="vec128" group="vpu"/>
|
||||
<reg name="vr10" bitsize="128" regnum="66" type="vec128" group="vpu"/>
|
||||
<reg name="vr11" bitsize="128" regnum="67" type="vec128" group="vpu"/>
|
||||
<reg name="vr12" bitsize="128" regnum="68" type="vec128" group="vpu"/>
|
||||
<reg name="vr13" bitsize="128" regnum="69" type="vec128" group="vpu"/>
|
||||
<reg name="vr14" bitsize="128" regnum="70" type="vec128" group="vpu"/>
|
||||
<reg name="vr15" bitsize="128" regnum="71" type="vec128" group="vpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="ss0" bitsize="32" regnum="95" group="cr"/>
|
||||
<reg name="ss1" bitsize="32" regnum="96" group="cr"/>
|
||||
<reg name="ss2" bitsize="32" regnum="97" group="cr"/>
|
||||
<reg name="ss3" bitsize="32" regnum="98" group="cr"/>
|
||||
<reg name="ss4" bitsize="32" regnum="99" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr14" bitsize="32" regnum="103" group="cr"/>
|
||||
<reg name="cr15" bitsize="32" regnum="104" group="cr"/>
|
||||
<reg name="cr16" bitsize="32" regnum="105" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr19" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="cr20" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="cr21" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="cr22" bitsize="32" regnum="111" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr24" bitsize="32" regnum="113" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr26" bitsize="32" regnum="115" group="cr"/>
|
||||
<reg name="cr27" bitsize="32" regnum="116" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
<reg name="cp1cr20" bitsize="32" regnum="209" group="bank1"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,179 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<union id="float64_union">
|
||||
<field name="double64" type="ieee_double"/>
|
||||
<field name="float32" type="ieee_single"/>
|
||||
<field name="uint64" type="uint64"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="64" regnum="40" type="float64_union" group="fpu"/>
|
||||
<reg name="fr1" bitsize="64" regnum="41" type="float64_union" group="fpu"/>
|
||||
<reg name="fr2" bitsize="64" regnum="42" type="float64_union" group="fpu"/>
|
||||
<reg name="fr3" bitsize="64" regnum="43" type="float64_union" group="fpu"/>
|
||||
<reg name="fr4" bitsize="64" regnum="44" type="float64_union" group="fpu"/>
|
||||
<reg name="fr5" bitsize="64" regnum="45" type="float64_union" group="fpu"/>
|
||||
<reg name="fr6" bitsize="64" regnum="46" type="float64_union" group="fpu"/>
|
||||
<reg name="fr7" bitsize="64" regnum="47" type="float64_union" group="fpu"/>
|
||||
<reg name="fr8" bitsize="64" regnum="48" type="float64_union" group="fpu"/>
|
||||
<reg name="fr9" bitsize="64" regnum="49" type="float64_union" group="fpu"/>
|
||||
<reg name="fr10" bitsize="64" regnum="50" type="float64_union" group="fpu"/>
|
||||
<reg name="fr11" bitsize="64" regnum="51" type="float64_union" group="fpu"/>
|
||||
<reg name="fr12" bitsize="64" regnum="52" type="float64_union" group="fpu"/>
|
||||
<reg name="fr13" bitsize="64" regnum="53" type="float64_union" group="fpu"/>
|
||||
<reg name="fr14" bitsize="64" regnum="54" type="float64_union" group="fpu"/>
|
||||
<reg name="fr15" bitsize="64" regnum="55" type="float64_union" group="fpu"/>
|
||||
<reg name="fr16" bitsize="64" regnum="1172" type="float64_union" group="fpu"/>
|
||||
<reg name="fr17" bitsize="64" regnum="1173" type="float64_union" group="fpu"/>
|
||||
<reg name="fr18" bitsize="64" regnum="1174" type="float64_union" group="fpu"/>
|
||||
<reg name="fr19" bitsize="64" regnum="1175" type="float64_union" group="fpu"/>
|
||||
<reg name="fr20" bitsize="64" regnum="1176" type="float64_union" group="fpu"/>
|
||||
<reg name="fr21" bitsize="64" regnum="1177" type="float64_union" group="fpu"/>
|
||||
<reg name="fr22" bitsize="64" regnum="1178" type="float64_union" group="fpu"/>
|
||||
<reg name="fr23" bitsize="64" regnum="1179" type="float64_union" group="fpu"/>
|
||||
<reg name="fr24" bitsize="64" regnum="1180" type="float64_union" group="fpu"/>
|
||||
<reg name="fr25" bitsize="64" regnum="1181" type="float64_union" group="fpu"/>
|
||||
<reg name="fr26" bitsize="64" regnum="1182" type="float64_union" group="fpu"/>
|
||||
<reg name="fr27" bitsize="64" regnum="1183" type="float64_union" group="fpu"/>
|
||||
<reg name="fr28" bitsize="64" regnum="1184" type="float64_union" group="fpu"/>
|
||||
<reg name="fr29" bitsize="64" regnum="1185" type="float64_union" group="fpu"/>
|
||||
<reg name="fr30" bitsize="64" regnum="1186" type="float64_union" group="fpu"/>
|
||||
<reg name="fr31" bitsize="64" regnum="1187" type="float64_union" group="fpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
<reg name="cp1cr20" bitsize="32" regnum="209" group="bank1"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,211 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<vector id="v4f" type="ieee_single" count="4"/>
|
||||
<vector id="v2d" type="ieee_double" count="2"/>
|
||||
<vector id="v16i8" type="int8" count="16"/>
|
||||
<vector id="v8i16" type="int16" count="8"/>
|
||||
<vector id="v4i32" type="int32" count="4"/>
|
||||
<vector id="v2i64" type="int64" count="2"/>
|
||||
<union id="vec128">
|
||||
<field name="v4_float" type="v4f"/>
|
||||
<field name="v2_double" type="v2d"/>
|
||||
<field name="v16_int8" type="v16i8"/>
|
||||
<field name="v8_int16" type="v8i16"/>
|
||||
<field name="v4_int32" type="v4i32"/>
|
||||
<field name="v2_int64" type="v2i64"/>
|
||||
<field name="uint128" type="uint128"/>
|
||||
</union>
|
||||
<union id="float64_union">
|
||||
<field name="double64" type="ieee_double"/>
|
||||
<field name="float32" type="ieee_single"/>
|
||||
<field name="uint64" type="uint64"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="64" regnum="40" type="float64_union" group="fpu"/>
|
||||
<reg name="fr1" bitsize="64" regnum="41" type="float64_union" group="fpu"/>
|
||||
<reg name="fr2" bitsize="64" regnum="42" type="float64_union" group="fpu"/>
|
||||
<reg name="fr3" bitsize="64" regnum="43" type="float64_union" group="fpu"/>
|
||||
<reg name="fr4" bitsize="64" regnum="44" type="float64_union" group="fpu"/>
|
||||
<reg name="fr5" bitsize="64" regnum="45" type="float64_union" group="fpu"/>
|
||||
<reg name="fr6" bitsize="64" regnum="46" type="float64_union" group="fpu"/>
|
||||
<reg name="fr7" bitsize="64" regnum="47" type="float64_union" group="fpu"/>
|
||||
<reg name="fr8" bitsize="64" regnum="48" type="float64_union" group="fpu"/>
|
||||
<reg name="fr9" bitsize="64" regnum="49" type="float64_union" group="fpu"/>
|
||||
<reg name="fr10" bitsize="64" regnum="50" type="float64_union" group="fpu"/>
|
||||
<reg name="fr11" bitsize="64" regnum="51" type="float64_union" group="fpu"/>
|
||||
<reg name="fr12" bitsize="64" regnum="52" type="float64_union" group="fpu"/>
|
||||
<reg name="fr13" bitsize="64" regnum="53" type="float64_union" group="fpu"/>
|
||||
<reg name="fr14" bitsize="64" regnum="54" type="float64_union" group="fpu"/>
|
||||
<reg name="fr15" bitsize="64" regnum="55" type="float64_union" group="fpu"/>
|
||||
<reg name="fr16" bitsize="64" regnum="1172" type="float64_union" group="fpu"/>
|
||||
<reg name="fr17" bitsize="64" regnum="1173" type="float64_union" group="fpu"/>
|
||||
<reg name="fr18" bitsize="64" regnum="1174" type="float64_union" group="fpu"/>
|
||||
<reg name="fr19" bitsize="64" regnum="1175" type="float64_union" group="fpu"/>
|
||||
<reg name="fr20" bitsize="64" regnum="1176" type="float64_union" group="fpu"/>
|
||||
<reg name="fr21" bitsize="64" regnum="1177" type="float64_union" group="fpu"/>
|
||||
<reg name="fr22" bitsize="64" regnum="1178" type="float64_union" group="fpu"/>
|
||||
<reg name="fr23" bitsize="64" regnum="1179" type="float64_union" group="fpu"/>
|
||||
<reg name="fr24" bitsize="64" regnum="1180" type="float64_union" group="fpu"/>
|
||||
<reg name="fr25" bitsize="64" regnum="1181" type="float64_union" group="fpu"/>
|
||||
<reg name="fr26" bitsize="64" regnum="1182" type="float64_union" group="fpu"/>
|
||||
<reg name="fr27" bitsize="64" regnum="1183" type="float64_union" group="fpu"/>
|
||||
<reg name="fr28" bitsize="64" regnum="1184" type="float64_union" group="fpu"/>
|
||||
<reg name="fr29" bitsize="64" regnum="1185" type="float64_union" group="fpu"/>
|
||||
<reg name="fr30" bitsize="64" regnum="1186" type="float64_union" group="fpu"/>
|
||||
<reg name="fr31" bitsize="64" regnum="1187" type="float64_union" group="fpu"/>
|
||||
<!--vector register-->
|
||||
<reg name="vr0" bitsize="128" regnum="56" type="vec128" group="vpu"/>
|
||||
<reg name="vr1" bitsize="128" regnum="57" type="vec128" group="vpu"/>
|
||||
<reg name="vr2" bitsize="128" regnum="58" type="vec128" group="vpu"/>
|
||||
<reg name="vr3" bitsize="128" regnum="59" type="vec128" group="vpu"/>
|
||||
<reg name="vr4" bitsize="128" regnum="60" type="vec128" group="vpu"/>
|
||||
<reg name="vr5" bitsize="128" regnum="61" type="vec128" group="vpu"/>
|
||||
<reg name="vr6" bitsize="128" regnum="62" type="vec128" group="vpu"/>
|
||||
<reg name="vr7" bitsize="128" regnum="63" type="vec128" group="vpu"/>
|
||||
<reg name="vr8" bitsize="128" regnum="64" type="vec128" group="vpu"/>
|
||||
<reg name="vr9" bitsize="128" regnum="65" type="vec128" group="vpu"/>
|
||||
<reg name="vr10" bitsize="128" regnum="66" type="vec128" group="vpu"/>
|
||||
<reg name="vr11" bitsize="128" regnum="67" type="vec128" group="vpu"/>
|
||||
<reg name="vr12" bitsize="128" regnum="68" type="vec128" group="vpu"/>
|
||||
<reg name="vr13" bitsize="128" regnum="69" type="vec128" group="vpu"/>
|
||||
<reg name="vr14" bitsize="128" regnum="70" type="vec128" group="vpu"/>
|
||||
<reg name="vr15" bitsize="128" regnum="71" type="vec128" group="vpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
<reg name="cp1cr20" bitsize="32" regnum="209" group="bank1"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,156 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv1.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="20"/>
|
||||
<reg name="lo" bitsize="32" regnum="21"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv1.fpu">
|
||||
<reg name="cp1gr0" bitsize="32" regnum="24" group="fpu"/>
|
||||
<reg name="cp1gr1" bitsize="32" regnum="25" group="fpu"/>
|
||||
<reg name="cp1gr2" bitsize="32" regnum="26" group="fpu"/>
|
||||
<reg name="cp1gr3" bitsize="32" regnum="27" group="fpu"/>
|
||||
<reg name="cp1gr4" bitsize="32" regnum="28" group="fpu"/>
|
||||
<reg name="cp1gr5" bitsize="32" regnum="29" group="fpu"/>
|
||||
<reg name="cp1gr6" bitsize="32" regnum="30" group="fpu"/>
|
||||
<reg name="cp1gr7" bitsize="32" regnum="31" group="fpu"/>
|
||||
<reg name="cp1gr8" bitsize="32" regnum="32" group="fpu"/>
|
||||
<reg name="cp1gr9" bitsize="32" regnum="33" group="fpu"/>
|
||||
<reg name="cp1gr10" bitsize="32" regnum="34" group="fpu"/>
|
||||
<reg name="cp1gr11" bitsize="32" regnum="35" group="fpu"/>
|
||||
<reg name="cp1gr12" bitsize="32" regnum="36" group="fpu"/>
|
||||
<reg name="cp1gr13" bitsize="32" regnum="37" group="fpu"/>
|
||||
<reg name="cp1gr14" bitsize="32" regnum="38" group="fpu"/>
|
||||
<reg name="cp1gr15" bitsize="32" regnum="39" group="fpu"/>
|
||||
<reg name="cp1gr16" bitsize="32" regnum="40" group="fpu"/>
|
||||
<reg name="cp1gr17" bitsize="32" regnum="41" group="fpu"/>
|
||||
<reg name="cp1gr18" bitsize="32" regnum="42" group="fpu"/>
|
||||
<reg name="cp1gr19" bitsize="32" regnum="43" group="fpu"/>
|
||||
<reg name="cp1gr20" bitsize="32" regnum="44" group="fpu"/>
|
||||
<reg name="cp1gr21" bitsize="32" regnum="45" group="fpu"/>
|
||||
<reg name="cp1gr22" bitsize="32" regnum="46" group="fpu"/>
|
||||
<reg name="cp1gr23" bitsize="32" regnum="47" group="fpu"/>
|
||||
<reg name="cp1gr24" bitsize="32" regnum="48" group="fpu"/>
|
||||
<reg name="cp1gr25" bitsize="32" regnum="49" group="fpu"/>
|
||||
<reg name="cp1gr26" bitsize="32" regnum="50" group="fpu"/>
|
||||
<reg name="cp1gr27" bitsize="32" regnum="51" group="fpu"/>
|
||||
<reg name="cp1gr28" bitsize="32" regnum="52" group="fpu"/>
|
||||
<reg name="cp1gr29" bitsize="32" regnum="53" group="fpu"/>
|
||||
<reg name="cp1gr30" bitsize="32" regnum="54" group="fpu"/>
|
||||
<reg name="cp1gr31" bitsize="32" regnum="55" group="fpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv1.gar">
|
||||
<reg name="ar0" bitsize="32" regnum="73" group="gar"/>
|
||||
<reg name="ar1" bitsize="32" regnum="74" group="gar"/>
|
||||
<reg name="ar2" bitsize="32" regnum="75" group="gar"/>
|
||||
<reg name="ar3" bitsize="32" regnum="76" group="gar"/>
|
||||
<reg name="ar4" bitsize="32" regnum="77" group="gar"/>
|
||||
<reg name="ar5" bitsize="32" regnum="78" group="gar"/>
|
||||
<reg name="ar6" bitsize="32" regnum="79" group="gar"/>
|
||||
<reg name="ar7" bitsize="32" regnum="80" group="gar"/>
|
||||
<reg name="ar8" bitsize="32" regnum="81" group="gar"/>
|
||||
<reg name="ar9" bitsize="32" regnum="82" group="gar"/>
|
||||
<reg name="ar10" bitsize="32" regnum="83" group="gar"/>
|
||||
<reg name="ar11" bitsize="32" regnum="84" group="gar"/>
|
||||
<reg name="ar12" bitsize="32" regnum="85" group="gar"/>
|
||||
<reg name="ar13" bitsize="32" regnum="86" group="gar"/>
|
||||
<reg name="ar14" bitsize="32" regnum="87" group="gar"/>
|
||||
<reg name="ar15" bitsize="32" regnum="88" group="gar"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv1.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C" start="0" end="0" type="int8"/>
|
||||
<field name="AF" start="1" end="1" type="int8"/>
|
||||
<field name="FE" start="4" end="4" type="int8"/>
|
||||
<field name="IE" start="6" end="6" type="int8"/>
|
||||
<field name="IC" start="7" end="7" type="int8"/>
|
||||
<field name="EE" start="8" end="8" type="int8"/>
|
||||
<field name="MM" start="9" end="9" type="int8"/>
|
||||
<field name="TE" start="12" end="12" type="int8"/>
|
||||
<field name="TP" start="13" end="13" type="int8"/>
|
||||
<field name="TM[1:0]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[7:0]" start="16" end="23" type="int8"/>
|
||||
<field name="CPID[3:0]" start="24" end="27" type="int8"/>
|
||||
<field name="S" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="ss0" bitsize="32" regnum="95" group="cr"/>
|
||||
<reg name="ss1" bitsize="32" regnum="96" group="cr"/>
|
||||
<reg name="ss2" bitsize="32" regnum="97" group="cr"/>
|
||||
<reg name="ss3" bitsize="32" regnum="98" group="cr"/>
|
||||
<reg name="ss4" bitsize="32" regnum="99" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr14" bitsize="32" regnum="103" group="cr"/>
|
||||
<reg name="cr15" bitsize="32" regnum="104" group="cr"/>
|
||||
<reg name="cr16" bitsize="32" regnum="105" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr19" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="cr20" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="cr21" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="cr22" bitsize="32" regnum="111" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr24" bitsize="32" regnum="113" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr26" bitsize="32" regnum="115" group="cr"/>
|
||||
<reg name="cr27" bitsize="32" regnum="116" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv1.fcr">
|
||||
<reg name="cp1cr0" bitsize="32" regnum="121" group="fcr"/>
|
||||
<reg name="cp1cr1" bitsize="32" regnum="122" group="fcr"/>
|
||||
<reg name="cp1cr2" bitsize="32" regnum="123" group="fcr"/>
|
||||
<reg name="cp1cr3" bitsize="32" regnum="124" group="fcr"/>
|
||||
<reg name="cp1cr4" bitsize="32" regnum="125" group="fcr"/>
|
||||
<reg name="cp1cr5" bitsize="32" regnum="126" group="fcr"/>
|
||||
<reg name="cp1cr6" bitsize="32" regnum="127" group="fcr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv1.mmu">
|
||||
<reg name="cp15cr0" bitsize="32" regnum="128" group="mmu"/>
|
||||
<reg name="cp15cr1" bitsize="32" regnum="129" group="mmu"/>
|
||||
<reg name="cp15cr2" bitsize="32" regnum="130" group="mmu"/>
|
||||
<reg name="cp15cr3" bitsize="32" regnum="131" group="mmu"/>
|
||||
<reg name="cp15cr4" bitsize="32" regnum="132" group="mmu"/>
|
||||
<reg name="cp15cr5" bitsize="32" regnum="133" group="mmu"/>
|
||||
<reg name="cp15cr6" bitsize="32" regnum="134" group="mmu"/>
|
||||
<reg name="cp15cr7" bitsize="32" regnum="135" group="mmu"/>
|
||||
<reg name="cp15cr8" bitsize="32" regnum="136" group="mmu"/>
|
||||
<reg name="cp15cr9" bitsize="32" regnum="137" group="mmu"/>
|
||||
<reg name="cp15cr10" bitsize="32" regnum="138" group="mmu"/>
|
||||
<reg name="cp15cr11" bitsize="32" regnum="139" group="mmu"/>
|
||||
<reg name="cp15cr12" bitsize="32" regnum="140" group="mmu"/>
|
||||
<reg name="cp15cr13" bitsize="32" regnum="141" group="mmu"/>
|
||||
<reg name="cp15cr14" bitsize="32" regnum="142" group="mmu"/>
|
||||
<reg name="cp15cr15" bitsize="32" regnum="143" group="mmu"/>
|
||||
<reg name="cp15cr16" bitsize="32" regnum="144" group="mmu"/>
|
||||
<reg name="cp15cr29" bitsize="32" regnum="145" group="mmu"/>
|
||||
<reg name="cp15cr30" bitsize="32" regnum="146" group="mmu"/>
|
||||
<reg name="cp15cr31" bitsize="32" regnum="147" group="mmu"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,44 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<!-- usp <14, 1> -->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,70 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="SV[25]" start="25" end="25" type="int8"/>
|
||||
<field name="SD[26]" start="26" end="26" type="int8"/>
|
||||
<field name="SC[27]" start="27" end="27" type="int8"/>
|
||||
<field name="HS[28]" start="28" end="28" type="int8"/>
|
||||
<field name="SP[29]" start="29" end="29" type="int8"/>
|
||||
<field name="T[30]" start="30" end="30" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="ss4" bitsize="32" regnum="99" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.tee">
|
||||
<reg name="nt_usp" bitsize="32" regnum="127" group="ree"/>
|
||||
<reg name="ebr" bitsize="32" regnum="190" group="cr"/>
|
||||
<reg name="dcr" bitsize="32" regnum="229" group="cr"/>
|
||||
<reg name="t_usp" bitsize="32" regnum="228" group="tee"/>
|
||||
<reg name="t_pcr" bitsize="32" regnum="230" group="tee"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.pseudo">
|
||||
<reg name="t_psr" bitsize="32" regs="89" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_vbr" bitsize="32" regs="90" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epsr" bitsize="32" regs="91" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epc" bitsize="32" regs="93" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ebr" bitsize="32" regs="190" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_psr" bitsize="32" regs="89" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_vbr" bitsize="32" regs="90" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epsr" bitsize="32" regs="91" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epc" bitsize="32" regs="93" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ebr" bitsize="32" regs="190" group="ree" type="int32" env="ree"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,49 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="BM[2]" start="2" end="2" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,53 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="BM[2]" start="2" end="2" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,78 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="SV[25]" start="25" end="25" type="int8"/>
|
||||
<field name="SD[26]" start="26" end="26" type="int8"/>
|
||||
<field name="SC[27]" start="27" end="27" type="int8"/>
|
||||
<field name="HS[28]" start="28" end="28" type="int8"/>
|
||||
<field name="SP[29]" start="29" end="29" type="int8"/>
|
||||
<field name="T[30]" start="30" end="30" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.tee">
|
||||
<reg name="nt_usp" bitsize="32" regnum="127" group="ree"/>
|
||||
<reg name="ebr" bitsize="32" regnum="190" group="cr"/>
|
||||
<reg name="dcr" bitsize="32" regnum="229" group="cr"/>
|
||||
<reg name="t_usp" bitsize="32" regnum="228" group="tee"/>
|
||||
<reg name="t_pcr" bitsize="32" regnum="230" group="tee"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.pseudo">
|
||||
<reg name="t_psr" bitsize="32" regs="89" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_vbr" bitsize="32" regs="90" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epsr" bitsize="32" regs="91" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epc" bitsize="32" regs="93" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ebr" bitsize="32" regs="190" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_psr" bitsize="32" regs="89" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_vbr" bitsize="32" regs="90" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epsr" bitsize="32" regs="91" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epc" bitsize="32" regs="93" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ebr" bitsize="32" regs="190" group="ree" type="int32" env="ree"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,51 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,53 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,81 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<union id="float32_union">
|
||||
<field name="float" type="ieee_single"/>
|
||||
<field name="uint32" type="uint32"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="32" regnum="40" group="fpu" type="float32_union"/>
|
||||
<reg name="fr1" bitsize="32" regnum="41" group="fpu" type="float32_union"/>
|
||||
<reg name="fr2" bitsize="32" regnum="42" group="fpu" type="float32_union"/>
|
||||
<reg name="fr3" bitsize="32" regnum="43" group="fpu" type="float32_union"/>
|
||||
<reg name="fr4" bitsize="32" regnum="44" group="fpu" type="float32_union"/>
|
||||
<reg name="fr5" bitsize="32" regnum="45" group="fpu" type="float32_union"/>
|
||||
<reg name="fr6" bitsize="32" regnum="46" group="fpu" type="float32_union"/>
|
||||
<reg name="fr7" bitsize="32" regnum="47" group="fpu" type="float32_union"/>
|
||||
<reg name="fr8" bitsize="32" regnum="48" group="fpu" type="float32_union"/>
|
||||
<reg name="fr9" bitsize="32" regnum="49" group="fpu" type="float32_union"/>
|
||||
<reg name="fr10" bitsize="32" regnum="50" group="fpu" type="float32_union"/>
|
||||
<reg name="fr11" bitsize="32" regnum="51" group="fpu" type="float32_union"/>
|
||||
<reg name="fr12" bitsize="32" regnum="52" group="fpu" type="float32_union"/>
|
||||
<reg name="fr13" bitsize="32" regnum="53" group="fpu" type="float32_union"/>
|
||||
<reg name="fr14" bitsize="32" regnum="54" group="fpu" type="float32_union"/>
|
||||
<reg name="fr15" bitsize="32" regnum="55" group="fpu" type="float32_union"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,103 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<union id="float32_union">
|
||||
<field name="float" type="ieee_single"/>
|
||||
<field name="uint32" type="uint32"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="32" regnum="40" group="fpu" type="float32_union"/>
|
||||
<reg name="fr1" bitsize="32" regnum="41" group="fpu" type="float32_union"/>
|
||||
<reg name="fr2" bitsize="32" regnum="42" group="fpu" type="float32_union"/>
|
||||
<reg name="fr3" bitsize="32" regnum="43" group="fpu" type="float32_union"/>
|
||||
<reg name="fr4" bitsize="32" regnum="44" group="fpu" type="float32_union"/>
|
||||
<reg name="fr5" bitsize="32" regnum="45" group="fpu" type="float32_union"/>
|
||||
<reg name="fr6" bitsize="32" regnum="46" group="fpu" type="float32_union"/>
|
||||
<reg name="fr7" bitsize="32" regnum="47" group="fpu" type="float32_union"/>
|
||||
<reg name="fr8" bitsize="32" regnum="48" group="fpu" type="float32_union"/>
|
||||
<reg name="fr9" bitsize="32" regnum="49" group="fpu" type="float32_union"/>
|
||||
<reg name="fr10" bitsize="32" regnum="50" group="fpu" type="float32_union"/>
|
||||
<reg name="fr11" bitsize="32" regnum="51" group="fpu" type="float32_union"/>
|
||||
<reg name="fr12" bitsize="32" regnum="52" group="fpu" type="float32_union"/>
|
||||
<reg name="fr13" bitsize="32" regnum="53" group="fpu" type="float32_union"/>
|
||||
<reg name="fr14" bitsize="32" regnum="54" group="fpu" type="float32_union"/>
|
||||
<reg name="fr15" bitsize="32" regnum="55" group="fpu" type="float32_union"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="SV[25]" start="25" end="25" type="int8"/>
|
||||
<field name="SD[26]" start="26" end="26" type="int8"/>
|
||||
<field name="SC[27]" start="27" end="27" type="int8"/>
|
||||
<field name="HS[28]" start="28" end="28" type="int8"/>
|
||||
<field name="SP[29]" start="29" end="29" type="int8"/>
|
||||
<field name="T[30]" start="30" end="30" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.tee">
|
||||
<reg name="nt_usp" bitsize="32" regnum="127" group="ree"/>
|
||||
<reg name="ebr" bitsize="32" regnum="190" group="cr"/>
|
||||
<reg name="dcr" bitsize="32" regnum="229" group="cr"/>
|
||||
<reg name="t_usp" bitsize="32" regnum="228" group="tee"/>
|
||||
<reg name="t_pcr" bitsize="32" regnum="230" group="tee"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.pseudo">
|
||||
<reg name="t_psr" bitsize="32" regs="89" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_vbr" bitsize="32" regs="90" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epsr" bitsize="32" regs="91" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epc" bitsize="32" regs="93" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ebr" bitsize="32" regs="190" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_psr" bitsize="32" regs="89" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_vbr" bitsize="32" regs="90" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epsr" bitsize="32" regs="91" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epc" bitsize="32" regs="93" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ebr" bitsize="32" regs="190" group="ree" type="int32" env="ree"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,75 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="SV[25]" start="25" end="25" type="int8"/>
|
||||
<field name="SD[26]" start="26" end="26" type="int8"/>
|
||||
<field name="SC[27]" start="27" end="27" type="int8"/>
|
||||
<field name="HS[28]" start="28" end="28" type="int8"/>
|
||||
<field name="SP[29]" start="29" end="29" type="int8"/>
|
||||
<field name="T[30]" start="30" end="30" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.tee">
|
||||
<reg name="nt_usp" bitsize="32" regnum="127" group="ree"/>
|
||||
<reg name="ebr" bitsize="32" regnum="190" group="cr"/>
|
||||
<reg name="dcr" bitsize="32" regnum="229" group="cr"/>
|
||||
<reg name="t_usp" bitsize="32" regnum="228" group="tee"/>
|
||||
<reg name="t_pcr" bitsize="32" regnum="230" group="tee"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.pseudo">
|
||||
<reg name="t_psr" bitsize="32" regs="89" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_vbr" bitsize="32" regs="90" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epsr" bitsize="32" regs="91" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epc" bitsize="32" regs="93" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ebr" bitsize="32" regs="190" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_psr" bitsize="32" regs="89" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_vbr" bitsize="32" regs="90" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epsr" bitsize="32" regs="91" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epc" bitsize="32" regs="93" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ebr" bitsize="32" regs="190" group="ree" type="int32" env="ree"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,79 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<union id="float32_union">
|
||||
<field name="float" type="ieee_single"/>
|
||||
<field name="uint32" type="uint32"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="32" regnum="40" group="fpu" type="float32_union"/>
|
||||
<reg name="fr1" bitsize="32" regnum="41" group="fpu" type="float32_union"/>
|
||||
<reg name="fr2" bitsize="32" regnum="42" group="fpu" type="float32_union"/>
|
||||
<reg name="fr3" bitsize="32" regnum="43" group="fpu" type="float32_union"/>
|
||||
<reg name="fr4" bitsize="32" regnum="44" group="fpu" type="float32_union"/>
|
||||
<reg name="fr5" bitsize="32" regnum="45" group="fpu" type="float32_union"/>
|
||||
<reg name="fr6" bitsize="32" regnum="46" group="fpu" type="float32_union"/>
|
||||
<reg name="fr7" bitsize="32" regnum="47" group="fpu" type="float32_union"/>
|
||||
<reg name="fr8" bitsize="32" regnum="48" group="fpu" type="float32_union"/>
|
||||
<reg name="fr9" bitsize="32" regnum="49" group="fpu" type="float32_union"/>
|
||||
<reg name="fr10" bitsize="32" regnum="50" group="fpu" type="float32_union"/>
|
||||
<reg name="fr11" bitsize="32" regnum="51" group="fpu" type="float32_union"/>
|
||||
<reg name="fr12" bitsize="32" regnum="52" group="fpu" type="float32_union"/>
|
||||
<reg name="fr13" bitsize="32" regnum="53" group="fpu" type="float32_union"/>
|
||||
<reg name="fr14" bitsize="32" regnum="54" group="fpu" type="float32_union"/>
|
||||
<reg name="fr15" bitsize="32" regnum="55" group="fpu" type="float32_union"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,101 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<union id="float32_union">
|
||||
<field name="float" type="ieee_single"/>
|
||||
<field name="uint32" type="uint32"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="32" regnum="40" group="fpu" type="float32_union"/>
|
||||
<reg name="fr1" bitsize="32" regnum="41" group="fpu" type="float32_union"/>
|
||||
<reg name="fr2" bitsize="32" regnum="42" group="fpu" type="float32_union"/>
|
||||
<reg name="fr3" bitsize="32" regnum="43" group="fpu" type="float32_union"/>
|
||||
<reg name="fr4" bitsize="32" regnum="44" group="fpu" type="float32_union"/>
|
||||
<reg name="fr5" bitsize="32" regnum="45" group="fpu" type="float32_union"/>
|
||||
<reg name="fr6" bitsize="32" regnum="46" group="fpu" type="float32_union"/>
|
||||
<reg name="fr7" bitsize="32" regnum="47" group="fpu" type="float32_union"/>
|
||||
<reg name="fr8" bitsize="32" regnum="48" group="fpu" type="float32_union"/>
|
||||
<reg name="fr9" bitsize="32" regnum="49" group="fpu" type="float32_union"/>
|
||||
<reg name="fr10" bitsize="32" regnum="50" group="fpu" type="float32_union"/>
|
||||
<reg name="fr11" bitsize="32" regnum="51" group="fpu" type="float32_union"/>
|
||||
<reg name="fr12" bitsize="32" regnum="52" group="fpu" type="float32_union"/>
|
||||
<reg name="fr13" bitsize="32" regnum="53" group="fpu" type="float32_union"/>
|
||||
<reg name="fr14" bitsize="32" regnum="54" group="fpu" type="float32_union"/>
|
||||
<reg name="fr15" bitsize="32" regnum="55" group="fpu" type="float32_union"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="SV[25]" start="25" end="25" type="int8"/>
|
||||
<field name="SD[26]" start="26" end="26" type="int8"/>
|
||||
<field name="SC[27]" start="27" end="27" type="int8"/>
|
||||
<field name="HS[28]" start="28" end="28" type="int8"/>
|
||||
<field name="SP[29]" start="29" end="29" type="int8"/>
|
||||
<field name="T[30]" start="30" end="30" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.tee">
|
||||
<reg name="nt_usp" bitsize="32" regnum="127" group="ree"/>
|
||||
<reg name="ebr" bitsize="32" regnum="190" group="cr"/>
|
||||
<reg name="dcr" bitsize="32" regnum="229" group="cr"/>
|
||||
<reg name="t_usp" bitsize="32" regnum="228" group="tee"/>
|
||||
<reg name="t_pcr" bitsize="32" regnum="230" group="tee"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.pseudo">
|
||||
<reg name="t_psr" bitsize="32" regs="89" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_vbr" bitsize="32" regs="90" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epsr" bitsize="32" regs="91" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epc" bitsize="32" regs="93" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ebr" bitsize="32" regs="190" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_psr" bitsize="32" regs="89" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_vbr" bitsize="32" regs="90" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epsr" bitsize="32" regs="91" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epc" bitsize="32" regs="93" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ebr" bitsize="32" regs="190" group="ree" type="int32" env="ree"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,118 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<vector id="v4f" type="ieee_single" count="4"/>
|
||||
<vector id="v2d" type="ieee_double" count="2"/>
|
||||
<vector id="v16i8" type="int8" count="16"/>
|
||||
<vector id="v8i16" type="int16" count="8"/>
|
||||
<vector id="v4i32" type="int32" count="4"/>
|
||||
<vector id="v2i64" type="int64" count="2"/>
|
||||
<union id="vec128">
|
||||
<field name="v4_float" type="v4f"/>
|
||||
<field name="v2_double" type="v2d"/>
|
||||
<field name="v16_int8" type="v16i8"/>
|
||||
<field name="v8_int16" type="v8i16"/>
|
||||
<field name="v4_int32" type="v4i32"/>
|
||||
<field name="v2_int64" type="v2i64"/>
|
||||
<field name="uint128" type="uint128"/>
|
||||
</union>
|
||||
<union id="float32_union">
|
||||
<field name="float" type="ieee_single"/>
|
||||
<field name="uint32" type="uint32"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="32" regnum="40" group="fpu" type="float32_union"/>
|
||||
<reg name="fr1" bitsize="32" regnum="41" group="fpu" type="float32_union"/>
|
||||
<reg name="fr2" bitsize="32" regnum="42" group="fpu" type="float32_union"/>
|
||||
<reg name="fr3" bitsize="32" regnum="43" group="fpu" type="float32_union"/>
|
||||
<reg name="fr4" bitsize="32" regnum="44" group="fpu" type="float32_union"/>
|
||||
<reg name="fr5" bitsize="32" regnum="45" group="fpu" type="float32_union"/>
|
||||
<reg name="fr6" bitsize="32" regnum="46" group="fpu" type="float32_union"/>
|
||||
<reg name="fr7" bitsize="32" regnum="47" group="fpu" type="float32_union"/>
|
||||
<reg name="fr8" bitsize="32" regnum="48" group="fpu" type="float32_union"/>
|
||||
<reg name="fr9" bitsize="32" regnum="49" group="fpu" type="float32_union"/>
|
||||
<reg name="fr10" bitsize="32" regnum="50" group="fpu" type="float32_union"/>
|
||||
<reg name="fr11" bitsize="32" regnum="51" group="fpu" type="float32_union"/>
|
||||
<reg name="fr12" bitsize="32" regnum="52" group="fpu" type="float32_union"/>
|
||||
<reg name="fr13" bitsize="32" regnum="53" group="fpu" type="float32_union"/>
|
||||
<reg name="fr14" bitsize="32" regnum="54" group="fpu" type="float32_union"/>
|
||||
<reg name="fr15" bitsize="32" regnum="55" group="fpu" type="float32_union"/>
|
||||
<!--vector register-->
|
||||
<reg name="vr0" bitsize="128" regnum="56" type="vec128" group="vpu"/>
|
||||
<reg name="vr1" bitsize="128" regnum="57" type="vec128" group="vpu"/>
|
||||
<reg name="vr2" bitsize="128" regnum="58" type="vec128" group="vpu"/>
|
||||
<reg name="vr3" bitsize="128" regnum="59" type="vec128" group="vpu"/>
|
||||
<reg name="vr4" bitsize="128" regnum="60" type="vec128" group="vpu"/>
|
||||
<reg name="vr5" bitsize="128" regnum="61" type="vec128" group="vpu"/>
|
||||
<reg name="vr6" bitsize="128" regnum="62" type="vec128" group="vpu"/>
|
||||
<reg name="vr7" bitsize="128" regnum="63" type="vec128" group="vpu"/>
|
||||
<reg name="vr8" bitsize="128" regnum="64" type="vec128" group="vpu"/>
|
||||
<reg name="vr9" bitsize="128" regnum="65" type="vec128" group="vpu"/>
|
||||
<reg name="vr10" bitsize="128" regnum="66" type="vec128" group="vpu"/>
|
||||
<reg name="vr11" bitsize="128" regnum="67" type="vec128" group="vpu"/>
|
||||
<reg name="vr12" bitsize="128" regnum="68" type="vec128" group="vpu"/>
|
||||
<reg name="vr13" bitsize="128" regnum="69" type="vec128" group="vpu"/>
|
||||
<reg name="vr14" bitsize="128" regnum="70" type="vec128" group="vpu"/>
|
||||
<reg name="vr15" bitsize="128" regnum="71" type="vec128" group="vpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank3">
|
||||
<reg name="sepsr" bitsize="32" regnum="221" group="bank3"/>
|
||||
<reg name="sevbr" bitsize="32" regnum="222" group="bank3"/>
|
||||
<reg name="seepsr" bitsize="32" regnum="223" group="bank3"/>
|
||||
<reg name="seepc" bitsize="32" regnum="225" group="bank3"/>
|
||||
<reg name="nsssp" bitsize="32" regnum="227" group="bank3"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,72 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="SV[25]" start="25" end="25" type="int8"/>
|
||||
<field name="SD[26]" start="26" end="26" type="int8"/>
|
||||
<field name="SC[27]" start="27" end="27" type="int8"/>
|
||||
<field name="HS[28]" start="28" end="28" type="int8"/>
|
||||
<field name="SP[29]" start="29" end="29" type="int8"/>
|
||||
<field name="T[30]" start="30" end="30" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.tee">
|
||||
<reg name="nt_usp" bitsize="32" regnum="127" group="ree"/>
|
||||
<reg name="ebr" bitsize="32" regnum="190" group="cr"/>
|
||||
<reg name="dcr" bitsize="32" regnum="229" group="cr"/>
|
||||
<reg name="t_usp" bitsize="32" regnum="228" group="tee"/>
|
||||
<reg name="t_pcr" bitsize="32" regnum="230" group="tee"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.pseudo">
|
||||
<reg name="t_psr" bitsize="32" regs="89" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_vbr" bitsize="32" regs="90" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epsr" bitsize="32" regs="91" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epc" bitsize="32" regs="93" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ebr" bitsize="32" regs="190" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_psr" bitsize="32" regs="89" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_vbr" bitsize="32" regs="90" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epsr" bitsize="32" regs="91" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epc" bitsize="32" regs="93" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ebr" bitsize="32" regs="190" group="ree" type="int32" env="ree"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,90 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<vector id="v4f" type="ieee_single" count="4"/>
|
||||
<vector id="v2d" type="ieee_double" count="2"/>
|
||||
<vector id="v16i8" type="int8" count="16"/>
|
||||
<vector id="v8i16" type="int16" count="8"/>
|
||||
<vector id="v4i32" type="int32" count="4"/>
|
||||
<vector id="v2i64" type="int64" count="2"/>
|
||||
<union id="vec128">
|
||||
<field name="v4_float" type="v4f"/>
|
||||
<field name="v2_double" type="v2d"/>
|
||||
<field name="v16_int8" type="v16i8"/>
|
||||
<field name="v8_int16" type="v8i16"/>
|
||||
<field name="v4_int32" type="v4i32"/>
|
||||
<field name="v2_int64" type="v2i64"/>
|
||||
<field name="uint128" type="uint128"/>
|
||||
</union>
|
||||
<reg name="vr0" bitsize="128" regnum="56" type="vec128" group="vpu"/>
|
||||
<reg name="vr1" bitsize="128" regnum="57" type="vec128" group="vpu"/>
|
||||
<reg name="vr2" bitsize="128" regnum="58" type="vec128" group="vpu"/>
|
||||
<reg name="vr3" bitsize="128" regnum="59" type="vec128" group="vpu"/>
|
||||
<reg name="vr4" bitsize="128" regnum="60" type="vec128" group="vpu"/>
|
||||
<reg name="vr5" bitsize="128" regnum="61" type="vec128" group="vpu"/>
|
||||
<reg name="vr6" bitsize="128" regnum="62" type="vec128" group="vpu"/>
|
||||
<reg name="vr7" bitsize="128" regnum="63" type="vec128" group="vpu"/>
|
||||
<reg name="vr8" bitsize="128" regnum="64" type="vec128" group="vpu"/>
|
||||
<reg name="vr9" bitsize="128" regnum="65" type="vec128" group="vpu"/>
|
||||
<reg name="vr10" bitsize="128" regnum="66" type="vec128" group="vpu"/>
|
||||
<reg name="vr11" bitsize="128" regnum="67" type="vec128" group="vpu"/>
|
||||
<reg name="vr12" bitsize="128" regnum="68" type="vec128" group="vpu"/>
|
||||
<reg name="vr13" bitsize="128" regnum="69" type="vec128" group="vpu"/>
|
||||
<reg name="vr14" bitsize="128" regnum="70" type="vec128" group="vpu"/>
|
||||
<reg name="vr15" bitsize="128" regnum="71" type="vec128" group="vpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank3">
|
||||
<reg name="sepsr" bitsize="32" regnum="221" group="bank3"/>
|
||||
<reg name="sevbr" bitsize="32" regnum="222" group="bank3"/>
|
||||
<reg name="seepsr" bitsize="32" regnum="223" group="bank3"/>
|
||||
<reg name="seepc" bitsize="32" regnum="225" group="bank3"/>
|
||||
<reg name="nsssp" bitsize="32" regnum="227" group="bank3"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,63 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,65 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,93 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<union id="float32_union">
|
||||
<field name="float" type="ieee_single"/>
|
||||
<field name="uint32" type="uint32"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="32" regnum="40" group="fpu" type="float32_union"/>
|
||||
<reg name="fr1" bitsize="32" regnum="41" group="fpu" type="float32_union"/>
|
||||
<reg name="fr2" bitsize="32" regnum="42" group="fpu" type="float32_union"/>
|
||||
<reg name="fr3" bitsize="32" regnum="43" group="fpu" type="float32_union"/>
|
||||
<reg name="fr4" bitsize="32" regnum="44" group="fpu" type="float32_union"/>
|
||||
<reg name="fr5" bitsize="32" regnum="45" group="fpu" type="float32_union"/>
|
||||
<reg name="fr6" bitsize="32" regnum="46" group="fpu" type="float32_union"/>
|
||||
<reg name="fr7" bitsize="32" regnum="47" group="fpu" type="float32_union"/>
|
||||
<reg name="fr8" bitsize="32" regnum="48" group="fpu" type="float32_union"/>
|
||||
<reg name="fr9" bitsize="32" regnum="49" group="fpu" type="float32_union"/>
|
||||
<reg name="fr10" bitsize="32" regnum="50" group="fpu" type="float32_union"/>
|
||||
<reg name="fr11" bitsize="32" regnum="51" group="fpu" type="float32_union"/>
|
||||
<reg name="fr12" bitsize="32" regnum="52" group="fpu" type="float32_union"/>
|
||||
<reg name="fr13" bitsize="32" regnum="53" group="fpu" type="float32_union"/>
|
||||
<reg name="fr14" bitsize="32" regnum="54" group="fpu" type="float32_union"/>
|
||||
<reg name="fr15" bitsize="32" regnum="55" group="fpu" type="float32_union"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,118 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<union id="float32_union">
|
||||
<field name="float" type="ieee_single"/>
|
||||
<field name="uint32" type="uint32"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="32" regnum="40" group="fpu" type="float32_union"/>
|
||||
<reg name="fr1" bitsize="32" regnum="41" group="fpu" type="float32_union"/>
|
||||
<reg name="fr2" bitsize="32" regnum="42" group="fpu" type="float32_union"/>
|
||||
<reg name="fr3" bitsize="32" regnum="43" group="fpu" type="float32_union"/>
|
||||
<reg name="fr4" bitsize="32" regnum="44" group="fpu" type="float32_union"/>
|
||||
<reg name="fr5" bitsize="32" regnum="45" group="fpu" type="float32_union"/>
|
||||
<reg name="fr6" bitsize="32" regnum="46" group="fpu" type="float32_union"/>
|
||||
<reg name="fr7" bitsize="32" regnum="47" group="fpu" type="float32_union"/>
|
||||
<reg name="fr8" bitsize="32" regnum="48" group="fpu" type="float32_union"/>
|
||||
<reg name="fr9" bitsize="32" regnum="49" group="fpu" type="float32_union"/>
|
||||
<reg name="fr10" bitsize="32" regnum="50" group="fpu" type="float32_union"/>
|
||||
<reg name="fr11" bitsize="32" regnum="51" group="fpu" type="float32_union"/>
|
||||
<reg name="fr12" bitsize="32" regnum="52" group="fpu" type="float32_union"/>
|
||||
<reg name="fr13" bitsize="32" regnum="53" group="fpu" type="float32_union"/>
|
||||
<reg name="fr14" bitsize="32" regnum="54" group="fpu" type="float32_union"/>
|
||||
<reg name="fr15" bitsize="32" regnum="55" group="fpu" type="float32_union"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="SV[25]" start="25" end="25" type="int8"/>
|
||||
<field name="SD[26]" start="26" end="26" type="int8"/>
|
||||
<field name="SC[27]" start="27" end="27" type="int8"/>
|
||||
<field name="HS[28]" start="28" end="28" type="int8"/>
|
||||
<field name="SP[29]" start="29" end="29" type="int8"/>
|
||||
<field name="T[30]" start="30" end="30" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.tee">
|
||||
<reg name="nt_usp" bitsize="32" regnum="127" group="ree"/>
|
||||
<reg name="ebr" bitsize="32" regnum="190" group="cr"/>
|
||||
<reg name="dcr" bitsize="32" regnum="229" group="cr"/>
|
||||
<reg name="t_usp" bitsize="32" regnum="228" group="tee"/>
|
||||
<reg name="t_pcr" bitsize="32" regnum="230" group="tee"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.pseudo">
|
||||
<reg name="t_psr" bitsize="32" regs="89" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_vbr" bitsize="32" regs="90" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epsr" bitsize="32" regs="91" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epc" bitsize="32" regs="93" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ebr" bitsize="32" regs="190" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_psr" bitsize="32" regs="89" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_vbr" bitsize="32" regs="90" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epsr" bitsize="32" regs="91" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epc" bitsize="32" regs="93" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ebr" bitsize="32" regs="190" group="ree" type="int32" env="ree"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,90 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="SV[25]" start="25" end="25" type="int8"/>
|
||||
<field name="SD[26]" start="26" end="26" type="int8"/>
|
||||
<field name="SC[27]" start="27" end="27" type="int8"/>
|
||||
<field name="HS[28]" start="28" end="28" type="int8"/>
|
||||
<field name="SP[29]" start="29" end="29" type="int8"/>
|
||||
<field name="T[30]" start="30" end="30" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.tee">
|
||||
<reg name="nt_usp" bitsize="32" regnum="127" group="ree"/>
|
||||
<reg name="ebr" bitsize="32" regnum="190" group="cr"/>
|
||||
<reg name="dcr" bitsize="32" regnum="229" group="cr"/>
|
||||
<reg name="t_usp" bitsize="32" regnum="228" group="tee"/>
|
||||
<reg name="t_pcr" bitsize="32" regnum="230" group="tee"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.pseudo">
|
||||
<reg name="t_psr" bitsize="32" regs="89" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_vbr" bitsize="32" regs="90" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epsr" bitsize="32" regs="91" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epc" bitsize="32" regs="93" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ebr" bitsize="32" regs="190" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_psr" bitsize="32" regs="89" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_vbr" bitsize="32" regs="90" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epsr" bitsize="32" regs="91" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epc" bitsize="32" regs="93" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ebr" bitsize="32" regs="190" group="ree" type="int32" env="ree"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,91 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<union id="float32_union">
|
||||
<field name="float" type="ieee_single"/>
|
||||
<field name="uint32" type="uint32"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="32" regnum="40" group="fpu" type="float32_union"/>
|
||||
<reg name="fr1" bitsize="32" regnum="41" group="fpu" type="float32_union"/>
|
||||
<reg name="fr2" bitsize="32" regnum="42" group="fpu" type="float32_union"/>
|
||||
<reg name="fr3" bitsize="32" regnum="43" group="fpu" type="float32_union"/>
|
||||
<reg name="fr4" bitsize="32" regnum="44" group="fpu" type="float32_union"/>
|
||||
<reg name="fr5" bitsize="32" regnum="45" group="fpu" type="float32_union"/>
|
||||
<reg name="fr6" bitsize="32" regnum="46" group="fpu" type="float32_union"/>
|
||||
<reg name="fr7" bitsize="32" regnum="47" group="fpu" type="float32_union"/>
|
||||
<reg name="fr8" bitsize="32" regnum="48" group="fpu" type="float32_union"/>
|
||||
<reg name="fr9" bitsize="32" regnum="49" group="fpu" type="float32_union"/>
|
||||
<reg name="fr10" bitsize="32" regnum="50" group="fpu" type="float32_union"/>
|
||||
<reg name="fr11" bitsize="32" regnum="51" group="fpu" type="float32_union"/>
|
||||
<reg name="fr12" bitsize="32" regnum="52" group="fpu" type="float32_union"/>
|
||||
<reg name="fr13" bitsize="32" regnum="53" group="fpu" type="float32_union"/>
|
||||
<reg name="fr14" bitsize="32" regnum="54" group="fpu" type="float32_union"/>
|
||||
<reg name="fr15" bitsize="32" regnum="55" group="fpu" type="float32_union"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,116 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<union id="float32_union">
|
||||
<field name="float" type="ieee_single"/>
|
||||
<field name="uint32" type="uint32"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="32" regnum="40" group="fpu" type="float32_union"/>
|
||||
<reg name="fr1" bitsize="32" regnum="41" group="fpu" type="float32_union"/>
|
||||
<reg name="fr2" bitsize="32" regnum="42" group="fpu" type="float32_union"/>
|
||||
<reg name="fr3" bitsize="32" regnum="43" group="fpu" type="float32_union"/>
|
||||
<reg name="fr4" bitsize="32" regnum="44" group="fpu" type="float32_union"/>
|
||||
<reg name="fr5" bitsize="32" regnum="45" group="fpu" type="float32_union"/>
|
||||
<reg name="fr6" bitsize="32" regnum="46" group="fpu" type="float32_union"/>
|
||||
<reg name="fr7" bitsize="32" regnum="47" group="fpu" type="float32_union"/>
|
||||
<reg name="fr8" bitsize="32" regnum="48" group="fpu" type="float32_union"/>
|
||||
<reg name="fr9" bitsize="32" regnum="49" group="fpu" type="float32_union"/>
|
||||
<reg name="fr10" bitsize="32" regnum="50" group="fpu" type="float32_union"/>
|
||||
<reg name="fr11" bitsize="32" regnum="51" group="fpu" type="float32_union"/>
|
||||
<reg name="fr12" bitsize="32" regnum="52" group="fpu" type="float32_union"/>
|
||||
<reg name="fr13" bitsize="32" regnum="53" group="fpu" type="float32_union"/>
|
||||
<reg name="fr14" bitsize="32" regnum="54" group="fpu" type="float32_union"/>
|
||||
<reg name="fr15" bitsize="32" regnum="55" group="fpu" type="float32_union"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="SV[25]" start="25" end="25" type="int8"/>
|
||||
<field name="SD[26]" start="26" end="26" type="int8"/>
|
||||
<field name="SC[27]" start="27" end="27" type="int8"/>
|
||||
<field name="HS[28]" start="28" end="28" type="int8"/>
|
||||
<field name="SP[29]" start="29" end="29" type="int8"/>
|
||||
<field name="T[30]" start="30" end="30" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.tee">
|
||||
<reg name="nt_usp" bitsize="32" regnum="127" group="ree"/>
|
||||
<reg name="ebr" bitsize="32" regnum="190" group="cr"/>
|
||||
<reg name="dcr" bitsize="32" regnum="229" group="cr"/>
|
||||
<reg name="t_usp" bitsize="32" regnum="228" group="tee"/>
|
||||
<reg name="t_pcr" bitsize="32" regnum="230" group="tee"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.pseudo">
|
||||
<reg name="t_psr" bitsize="32" regs="89" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_vbr" bitsize="32" regs="90" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epsr" bitsize="32" regs="91" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epc" bitsize="32" regs="93" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ebr" bitsize="32" regs="190" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_psr" bitsize="32" regs="89" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_vbr" bitsize="32" regs="90" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epsr" bitsize="32" regs="91" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epc" bitsize="32" regs="93" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ebr" bitsize="32" regs="190" group="ree" type="int32" env="ree"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,130 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<vector id="v4f" type="ieee_single" count="4"/>
|
||||
<vector id="v2d" type="ieee_double" count="2"/>
|
||||
<vector id="v16i8" type="int8" count="16"/>
|
||||
<vector id="v8i16" type="int16" count="8"/>
|
||||
<vector id="v4i32" type="int32" count="4"/>
|
||||
<vector id="v2i64" type="int64" count="2"/>
|
||||
<union id="vec128">
|
||||
<field name="v4_float" type="v4f"/>
|
||||
<field name="v2_double" type="v2d"/>
|
||||
<field name="v16_int8" type="v16i8"/>
|
||||
<field name="v8_int16" type="v8i16"/>
|
||||
<field name="v4_int32" type="v4i32"/>
|
||||
<field name="v2_int64" type="v2i64"/>
|
||||
<field name="uint128" type="uint128"/>
|
||||
</union>
|
||||
<union id="float32_union">
|
||||
<field name="float" type="ieee_single"/>
|
||||
<field name="uint32" type="uint32"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="32" regnum="40" group="fpu" type="float32_union"/>
|
||||
<reg name="fr1" bitsize="32" regnum="41" group="fpu" type="float32_union"/>
|
||||
<reg name="fr2" bitsize="32" regnum="42" group="fpu" type="float32_union"/>
|
||||
<reg name="fr3" bitsize="32" regnum="43" group="fpu" type="float32_union"/>
|
||||
<reg name="fr4" bitsize="32" regnum="44" group="fpu" type="float32_union"/>
|
||||
<reg name="fr5" bitsize="32" regnum="45" group="fpu" type="float32_union"/>
|
||||
<reg name="fr6" bitsize="32" regnum="46" group="fpu" type="float32_union"/>
|
||||
<reg name="fr7" bitsize="32" regnum="47" group="fpu" type="float32_union"/>
|
||||
<reg name="fr8" bitsize="32" regnum="48" group="fpu" type="float32_union"/>
|
||||
<reg name="fr9" bitsize="32" regnum="49" group="fpu" type="float32_union"/>
|
||||
<reg name="fr10" bitsize="32" regnum="50" group="fpu" type="float32_union"/>
|
||||
<reg name="fr11" bitsize="32" regnum="51" group="fpu" type="float32_union"/>
|
||||
<reg name="fr12" bitsize="32" regnum="52" group="fpu" type="float32_union"/>
|
||||
<reg name="fr13" bitsize="32" regnum="53" group="fpu" type="float32_union"/>
|
||||
<reg name="fr14" bitsize="32" regnum="54" group="fpu" type="float32_union"/>
|
||||
<reg name="fr15" bitsize="32" regnum="55" group="fpu" type="float32_union"/>
|
||||
<!--vector register-->
|
||||
<reg name="vr0" bitsize="128" regnum="56" type="vec128" group="vpu"/>
|
||||
<reg name="vr1" bitsize="128" regnum="57" type="vec128" group="vpu"/>
|
||||
<reg name="vr2" bitsize="128" regnum="58" type="vec128" group="vpu"/>
|
||||
<reg name="vr3" bitsize="128" regnum="59" type="vec128" group="vpu"/>
|
||||
<reg name="vr4" bitsize="128" regnum="60" type="vec128" group="vpu"/>
|
||||
<reg name="vr5" bitsize="128" regnum="61" type="vec128" group="vpu"/>
|
||||
<reg name="vr6" bitsize="128" regnum="62" type="vec128" group="vpu"/>
|
||||
<reg name="vr7" bitsize="128" regnum="63" type="vec128" group="vpu"/>
|
||||
<reg name="vr8" bitsize="128" regnum="64" type="vec128" group="vpu"/>
|
||||
<reg name="vr9" bitsize="128" regnum="65" type="vec128" group="vpu"/>
|
||||
<reg name="vr10" bitsize="128" regnum="66" type="vec128" group="vpu"/>
|
||||
<reg name="vr11" bitsize="128" regnum="67" type="vec128" group="vpu"/>
|
||||
<reg name="vr12" bitsize="128" regnum="68" type="vec128" group="vpu"/>
|
||||
<reg name="vr13" bitsize="128" regnum="69" type="vec128" group="vpu"/>
|
||||
<reg name="vr14" bitsize="128" regnum="70" type="vec128" group="vpu"/>
|
||||
<reg name="vr15" bitsize="128" regnum="71" type="vec128" group="vpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank3">
|
||||
<reg name="sepsr" bitsize="32" regnum="221" group="bank3"/>
|
||||
<reg name="sevbr" bitsize="32" regnum="222" group="bank3"/>
|
||||
<reg name="seepsr" bitsize="32" regnum="223" group="bank3"/>
|
||||
<reg name="seepc" bitsize="32" regnum="225" group="bank3"/>
|
||||
<reg name="nsssp" bitsize="32" regnum="227" group="bank3"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,87 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="SV[25]" start="25" end="25" type="int8"/>
|
||||
<field name="SD[26]" start="26" end="26" type="int8"/>
|
||||
<field name="SC[27]" start="27" end="27" type="int8"/>
|
||||
<field name="HS[28]" start="28" end="28" type="int8"/>
|
||||
<field name="SP[29]" start="29" end="29" type="int8"/>
|
||||
<field name="T[30]" start="30" end="30" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.tee">
|
||||
<reg name="nt_usp" bitsize="32" regnum="127" group="ree"/>
|
||||
<reg name="ebr" bitsize="32" regnum="190" group="cr"/>
|
||||
<reg name="dcr" bitsize="32" regnum="229" group="cr"/>
|
||||
<reg name="t_usp" bitsize="32" regnum="228" group="tee"/>
|
||||
<reg name="t_pcr" bitsize="32" regnum="230" group="tee"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.pseudo">
|
||||
<reg name="t_psr" bitsize="32" regs="89" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_vbr" bitsize="32" regs="90" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epsr" bitsize="32" regs="91" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epc" bitsize="32" regs="93" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ebr" bitsize="32" regs="190" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_psr" bitsize="32" regs="89" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_vbr" bitsize="32" regs="90" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epsr" bitsize="32" regs="91" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epc" bitsize="32" regs="93" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ebr" bitsize="32" regs="190" group="ree" type="int32" env="ree"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,102 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<vector id="v4f" type="ieee_single" count="4"/>
|
||||
<vector id="v2d" type="ieee_double" count="2"/>
|
||||
<vector id="v16i8" type="int8" count="16"/>
|
||||
<vector id="v8i16" type="int16" count="8"/>
|
||||
<vector id="v4i32" type="int32" count="4"/>
|
||||
<vector id="v2i64" type="int64" count="2"/>
|
||||
<union id="vec128">
|
||||
<field name="v4_float" type="v4f"/>
|
||||
<field name="v2_double" type="v2d"/>
|
||||
<field name="v16_int8" type="v16i8"/>
|
||||
<field name="v8_int16" type="v8i16"/>
|
||||
<field name="v4_int32" type="v4i32"/>
|
||||
<field name="v2_int64" type="v2i64"/>
|
||||
<field name="uint128" type="uint128"/>
|
||||
</union>
|
||||
<reg name="vr0" bitsize="128" regnum="56" type="vec128" group="vpu"/>
|
||||
<reg name="vr1" bitsize="128" regnum="57" type="vec128" group="vpu"/>
|
||||
<reg name="vr2" bitsize="128" regnum="58" type="vec128" group="vpu"/>
|
||||
<reg name="vr3" bitsize="128" regnum="59" type="vec128" group="vpu"/>
|
||||
<reg name="vr4" bitsize="128" regnum="60" type="vec128" group="vpu"/>
|
||||
<reg name="vr5" bitsize="128" regnum="61" type="vec128" group="vpu"/>
|
||||
<reg name="vr6" bitsize="128" regnum="62" type="vec128" group="vpu"/>
|
||||
<reg name="vr7" bitsize="128" regnum="63" type="vec128" group="vpu"/>
|
||||
<reg name="vr8" bitsize="128" regnum="64" type="vec128" group="vpu"/>
|
||||
<reg name="vr9" bitsize="128" regnum="65" type="vec128" group="vpu"/>
|
||||
<reg name="vr10" bitsize="128" regnum="66" type="vec128" group="vpu"/>
|
||||
<reg name="vr11" bitsize="128" regnum="67" type="vec128" group="vpu"/>
|
||||
<reg name="vr12" bitsize="128" regnum="68" type="vec128" group="vpu"/>
|
||||
<reg name="vr13" bitsize="128" regnum="69" type="vec128" group="vpu"/>
|
||||
<reg name="vr14" bitsize="128" regnum="70" type="vec128" group="vpu"/>
|
||||
<reg name="vr15" bitsize="128" regnum="71" type="vec128" group="vpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank3">
|
||||
<reg name="sepsr" bitsize="32" regnum="221" group="bank3"/>
|
||||
<reg name="sevbr" bitsize="32" regnum="222" group="bank3"/>
|
||||
<reg name="seepsr" bitsize="32" regnum="223" group="bank3"/>
|
||||
<reg name="seepc" bitsize="32" regnum="225" group="bank3"/>
|
||||
<reg name="nsssp" bitsize="32" regnum="227" group="bank3"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,150 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<vector id="v4f" type="ieee_single" count="4"/>
|
||||
<vector id="v2d" type="ieee_double" count="2"/>
|
||||
<vector id="v16i8" type="int8" count="16"/>
|
||||
<vector id="v8i16" type="int16" count="8"/>
|
||||
<vector id="v4i32" type="int32" count="4"/>
|
||||
<vector id="v2i64" type="int64" count="2"/>
|
||||
<union id="vec128">
|
||||
<field name="v4_float" type="v4f"/>
|
||||
<field name="v2_double" type="v2d"/>
|
||||
<field name="v16_int8" type="v16i8"/>
|
||||
<field name="v8_int16" type="v8i16"/>
|
||||
<field name="v4_int32" type="v4i32"/>
|
||||
<field name="v2_int64" type="v2i64"/>
|
||||
<field name="uint128" type="uint128"/>
|
||||
</union>
|
||||
<union id="float32_union">
|
||||
<field name="float" type="ieee_single"/>
|
||||
<field name="uint32" type="uint32"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="32" regnum="40" group="fpu" type="float32_union"/>
|
||||
<reg name="fr1" bitsize="32" regnum="41" group="fpu" type="float32_union"/>
|
||||
<reg name="fr2" bitsize="32" regnum="42" group="fpu" type="float32_union"/>
|
||||
<reg name="fr3" bitsize="32" regnum="43" group="fpu" type="float32_union"/>
|
||||
<reg name="fr4" bitsize="32" regnum="44" group="fpu" type="float32_union"/>
|
||||
<reg name="fr5" bitsize="32" regnum="45" group="fpu" type="float32_union"/>
|
||||
<reg name="fr6" bitsize="32" regnum="46" group="fpu" type="float32_union"/>
|
||||
<reg name="fr7" bitsize="32" regnum="47" group="fpu" type="float32_union"/>
|
||||
<reg name="fr8" bitsize="32" regnum="48" group="fpu" type="float32_union"/>
|
||||
<reg name="fr9" bitsize="32" regnum="49" group="fpu" type="float32_union"/>
|
||||
<reg name="fr10" bitsize="32" regnum="50" group="fpu" type="float32_union"/>
|
||||
<reg name="fr11" bitsize="32" regnum="51" group="fpu" type="float32_union"/>
|
||||
<reg name="fr12" bitsize="32" regnum="52" group="fpu" type="float32_union"/>
|
||||
<reg name="fr13" bitsize="32" regnum="53" group="fpu" type="float32_union"/>
|
||||
<reg name="fr14" bitsize="32" regnum="54" group="fpu" type="float32_union"/>
|
||||
<reg name="fr15" bitsize="32" regnum="55" group="fpu" type="float32_union"/>
|
||||
<!--vector register-->
|
||||
<reg name="vr0" bitsize="128" regnum="56" type="vec128" group="vpu"/>
|
||||
<reg name="vr1" bitsize="128" regnum="57" type="vec128" group="vpu"/>
|
||||
<reg name="vr2" bitsize="128" regnum="58" type="vec128" group="vpu"/>
|
||||
<reg name="vr3" bitsize="128" regnum="59" type="vec128" group="vpu"/>
|
||||
<reg name="vr4" bitsize="128" regnum="60" type="vec128" group="vpu"/>
|
||||
<reg name="vr5" bitsize="128" regnum="61" type="vec128" group="vpu"/>
|
||||
<reg name="vr6" bitsize="128" regnum="62" type="vec128" group="vpu"/>
|
||||
<reg name="vr7" bitsize="128" regnum="63" type="vec128" group="vpu"/>
|
||||
<reg name="vr8" bitsize="128" regnum="64" type="vec128" group="vpu"/>
|
||||
<reg name="vr9" bitsize="128" regnum="65" type="vec128" group="vpu"/>
|
||||
<reg name="vr10" bitsize="128" regnum="66" type="vec128" group="vpu"/>
|
||||
<reg name="vr11" bitsize="128" regnum="67" type="vec128" group="vpu"/>
|
||||
<reg name="vr12" bitsize="128" regnum="68" type="vec128" group="vpu"/>
|
||||
<reg name="vr13" bitsize="128" regnum="69" type="vec128" group="vpu"/>
|
||||
<reg name="vr14" bitsize="128" regnum="70" type="vec128" group="vpu"/>
|
||||
<reg name="vr15" bitsize="128" regnum="71" type="vec128" group="vpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="SV[25]" start="25" end="25" type="int8"/>
|
||||
<field name="SD[26]" start="26" end="26" type="int8"/>
|
||||
<field name="SC[27]" start="27" end="27" type="int8"/>
|
||||
<field name="HS[28]" start="28" end="28" type="int8"/>
|
||||
<field name="SP[29]" start="29" end="29" type="int8"/>
|
||||
<field name="T[30]" start="30" end="30" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.tee">
|
||||
<reg name="nt_usp" bitsize="32" regnum="127" group="ree"/>
|
||||
<reg name="ebr" bitsize="32" regnum="190" group="cr"/>
|
||||
<reg name="dcr" bitsize="32" regnum="229" group="cr"/>
|
||||
<reg name="t_usp" bitsize="32" regnum="228" group="tee"/>
|
||||
<reg name="t_pcr" bitsize="32" regnum="230" group="tee"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.pseudo">
|
||||
<reg name="t_psr" bitsize="32" regs="89" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_vbr" bitsize="32" regs="90" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epsr" bitsize="32" regs="91" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epc" bitsize="32" regs="93" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ebr" bitsize="32" regs="190" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_psr" bitsize="32" regs="89" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_vbr" bitsize="32" regs="90" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epsr" bitsize="32" regs="91" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epc" bitsize="32" regs="93" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ebr" bitsize="32" regs="190" group="ree" type="int32" env="ree"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,125 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<vector id="v4f" type="ieee_single" count="4"/>
|
||||
<vector id="v2d" type="ieee_double" count="2"/>
|
||||
<vector id="v16i8" type="int8" count="16"/>
|
||||
<vector id="v8i16" type="int16" count="8"/>
|
||||
<vector id="v4i32" type="int32" count="4"/>
|
||||
<vector id="v2i64" type="int64" count="2"/>
|
||||
<union id="vec128">
|
||||
<field name="v4_float" type="v4f"/>
|
||||
<field name="v2_double" type="v2d"/>
|
||||
<field name="v16_int8" type="v16i8"/>
|
||||
<field name="v8_int16" type="v8i16"/>
|
||||
<field name="v4_int32" type="v4i32"/>
|
||||
<field name="v2_int64" type="v2i64"/>
|
||||
<field name="uint128" type="uint128"/>
|
||||
</union>
|
||||
<union id="float32_union">
|
||||
<field name="float" type="ieee_single"/>
|
||||
<field name="uint32" type="uint32"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="32" regnum="40" group="fpu" type="float32_union"/>
|
||||
<reg name="fr1" bitsize="32" regnum="41" group="fpu" type="float32_union"/>
|
||||
<reg name="fr2" bitsize="32" regnum="42" group="fpu" type="float32_union"/>
|
||||
<reg name="fr3" bitsize="32" regnum="43" group="fpu" type="float32_union"/>
|
||||
<reg name="fr4" bitsize="32" regnum="44" group="fpu" type="float32_union"/>
|
||||
<reg name="fr5" bitsize="32" regnum="45" group="fpu" type="float32_union"/>
|
||||
<reg name="fr6" bitsize="32" regnum="46" group="fpu" type="float32_union"/>
|
||||
<reg name="fr7" bitsize="32" regnum="47" group="fpu" type="float32_union"/>
|
||||
<reg name="fr8" bitsize="32" regnum="48" group="fpu" type="float32_union"/>
|
||||
<reg name="fr9" bitsize="32" regnum="49" group="fpu" type="float32_union"/>
|
||||
<reg name="fr10" bitsize="32" regnum="50" group="fpu" type="float32_union"/>
|
||||
<reg name="fr11" bitsize="32" regnum="51" group="fpu" type="float32_union"/>
|
||||
<reg name="fr12" bitsize="32" regnum="52" group="fpu" type="float32_union"/>
|
||||
<reg name="fr13" bitsize="32" regnum="53" group="fpu" type="float32_union"/>
|
||||
<reg name="fr14" bitsize="32" regnum="54" group="fpu" type="float32_union"/>
|
||||
<reg name="fr15" bitsize="32" regnum="55" group="fpu" type="float32_union"/>
|
||||
<!--vector register-->
|
||||
<reg name="vr0" bitsize="128" regnum="56" type="vec128" group="vpu"/>
|
||||
<reg name="vr1" bitsize="128" regnum="57" type="vec128" group="vpu"/>
|
||||
<reg name="vr2" bitsize="128" regnum="58" type="vec128" group="vpu"/>
|
||||
<reg name="vr3" bitsize="128" regnum="59" type="vec128" group="vpu"/>
|
||||
<reg name="vr4" bitsize="128" regnum="60" type="vec128" group="vpu"/>
|
||||
<reg name="vr5" bitsize="128" regnum="61" type="vec128" group="vpu"/>
|
||||
<reg name="vr6" bitsize="128" regnum="62" type="vec128" group="vpu"/>
|
||||
<reg name="vr7" bitsize="128" regnum="63" type="vec128" group="vpu"/>
|
||||
<reg name="vr8" bitsize="128" regnum="64" type="vec128" group="vpu"/>
|
||||
<reg name="vr9" bitsize="128" regnum="65" type="vec128" group="vpu"/>
|
||||
<reg name="vr10" bitsize="128" regnum="66" type="vec128" group="vpu"/>
|
||||
<reg name="vr11" bitsize="128" regnum="67" type="vec128" group="vpu"/>
|
||||
<reg name="vr12" bitsize="128" regnum="68" type="vec128" group="vpu"/>
|
||||
<reg name="vr13" bitsize="128" regnum="69" type="vec128" group="vpu"/>
|
||||
<reg name="vr14" bitsize="128" regnum="70" type="vec128" group="vpu"/>
|
||||
<reg name="vr15" bitsize="128" regnum="71" type="vec128" group="vpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,123 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<vector id="v4f" type="ieee_single" count="4"/>
|
||||
<vector id="v2d" type="ieee_double" count="2"/>
|
||||
<vector id="v16i8" type="int8" count="16"/>
|
||||
<vector id="v8i16" type="int16" count="8"/>
|
||||
<vector id="v4i32" type="int32" count="4"/>
|
||||
<vector id="v2i64" type="int64" count="2"/>
|
||||
<union id="vec128">
|
||||
<field name="v4_float" type="v4f"/>
|
||||
<field name="v2_double" type="v2d"/>
|
||||
<field name="v16_int8" type="v16i8"/>
|
||||
<field name="v8_int16" type="v8i16"/>
|
||||
<field name="v4_int32" type="v4i32"/>
|
||||
<field name="v2_int64" type="v2i64"/>
|
||||
<field name="uint128" type="uint128"/>
|
||||
</union>
|
||||
<reg name="vr0" bitsize="128" regnum="56" type="vec128" group="vpu"/>
|
||||
<reg name="vr1" bitsize="128" regnum="57" type="vec128" group="vpu"/>
|
||||
<reg name="vr2" bitsize="128" regnum="58" type="vec128" group="vpu"/>
|
||||
<reg name="vr3" bitsize="128" regnum="59" type="vec128" group="vpu"/>
|
||||
<reg name="vr4" bitsize="128" regnum="60" type="vec128" group="vpu"/>
|
||||
<reg name="vr5" bitsize="128" regnum="61" type="vec128" group="vpu"/>
|
||||
<reg name="vr6" bitsize="128" regnum="62" type="vec128" group="vpu"/>
|
||||
<reg name="vr7" bitsize="128" regnum="63" type="vec128" group="vpu"/>
|
||||
<reg name="vr8" bitsize="128" regnum="64" type="vec128" group="vpu"/>
|
||||
<reg name="vr9" bitsize="128" regnum="65" type="vec128" group="vpu"/>
|
||||
<reg name="vr10" bitsize="128" regnum="66" type="vec128" group="vpu"/>
|
||||
<reg name="vr11" bitsize="128" regnum="67" type="vec128" group="vpu"/>
|
||||
<reg name="vr12" bitsize="128" regnum="68" type="vec128" group="vpu"/>
|
||||
<reg name="vr13" bitsize="128" regnum="69" type="vec128" group="vpu"/>
|
||||
<reg name="vr14" bitsize="128" regnum="70" type="vec128" group="vpu"/>
|
||||
<reg name="vr15" bitsize="128" regnum="71" type="vec128" group="vpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="SV[25]" start="25" end="25" type="int8"/>
|
||||
<field name="SD[26]" start="26" end="26" type="int8"/>
|
||||
<field name="SC[27]" start="27" end="27" type="int8"/>
|
||||
<field name="HS[28]" start="28" end="28" type="int8"/>
|
||||
<field name="SP[29]" start="29" end="29" type="int8"/>
|
||||
<field name="T[30]" start="30" end="30" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.tee">
|
||||
<reg name="nt_usp" bitsize="32" regnum="127" group="ree"/>
|
||||
<reg name="ebr" bitsize="32" regnum="190" group="cr"/>
|
||||
<reg name="dcr" bitsize="32" regnum="229" group="cr"/>
|
||||
<reg name="t_usp" bitsize="32" regnum="228" group="tee"/>
|
||||
<reg name="t_pcr" bitsize="32" regnum="230" group="tee"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.pseudo">
|
||||
<reg name="t_psr" bitsize="32" regs="89" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_vbr" bitsize="32" regs="90" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epsr" bitsize="32" regs="91" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epc" bitsize="32" regs="93" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ebr" bitsize="32" regs="190" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_psr" bitsize="32" regs="89" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_vbr" bitsize="32" regs="90" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epsr" bitsize="32" regs="91" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epc" bitsize="32" regs="93" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ebr" bitsize="32" regs="190" group="ree" type="int32" env="ree"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,98 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<vector id="v4f" type="ieee_single" count="4"/>
|
||||
<vector id="v2d" type="ieee_double" count="2"/>
|
||||
<vector id="v16i8" type="int8" count="16"/>
|
||||
<vector id="v8i16" type="int16" count="8"/>
|
||||
<vector id="v4i32" type="int32" count="4"/>
|
||||
<vector id="v2i64" type="int64" count="2"/>
|
||||
<union id="vec128">
|
||||
<field name="v4_float" type="v4f"/>
|
||||
<field name="v2_double" type="v2d"/>
|
||||
<field name="v16_int8" type="v16i8"/>
|
||||
<field name="v8_int16" type="v8i16"/>
|
||||
<field name="v4_int32" type="v4i32"/>
|
||||
<field name="v2_int64" type="v2i64"/>
|
||||
<field name="uint128" type="uint128"/>
|
||||
</union>
|
||||
<reg name="vr0" bitsize="128" regnum="56" type="vec128" group="vpu"/>
|
||||
<reg name="vr1" bitsize="128" regnum="57" type="vec128" group="vpu"/>
|
||||
<reg name="vr2" bitsize="128" regnum="58" type="vec128" group="vpu"/>
|
||||
<reg name="vr3" bitsize="128" regnum="59" type="vec128" group="vpu"/>
|
||||
<reg name="vr4" bitsize="128" regnum="60" type="vec128" group="vpu"/>
|
||||
<reg name="vr5" bitsize="128" regnum="61" type="vec128" group="vpu"/>
|
||||
<reg name="vr6" bitsize="128" regnum="62" type="vec128" group="vpu"/>
|
||||
<reg name="vr7" bitsize="128" regnum="63" type="vec128" group="vpu"/>
|
||||
<reg name="vr8" bitsize="128" regnum="64" type="vec128" group="vpu"/>
|
||||
<reg name="vr9" bitsize="128" regnum="65" type="vec128" group="vpu"/>
|
||||
<reg name="vr10" bitsize="128" regnum="66" type="vec128" group="vpu"/>
|
||||
<reg name="vr11" bitsize="128" regnum="67" type="vec128" group="vpu"/>
|
||||
<reg name="vr12" bitsize="128" regnum="68" type="vec128" group="vpu"/>
|
||||
<reg name="vr13" bitsize="128" regnum="69" type="vec128" group="vpu"/>
|
||||
<reg name="vr14" bitsize="128" regnum="70" type="vec128" group="vpu"/>
|
||||
<reg name="vr15" bitsize="128" regnum="71" type="vec128" group="vpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,148 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<vector id="v4f" type="ieee_single" count="4"/>
|
||||
<vector id="v2d" type="ieee_double" count="2"/>
|
||||
<vector id="v16i8" type="int8" count="16"/>
|
||||
<vector id="v8i16" type="int16" count="8"/>
|
||||
<vector id="v4i32" type="int32" count="4"/>
|
||||
<vector id="v2i64" type="int64" count="2"/>
|
||||
<union id="vec128">
|
||||
<field name="v4_float" type="v4f"/>
|
||||
<field name="v2_double" type="v2d"/>
|
||||
<field name="v16_int8" type="v16i8"/>
|
||||
<field name="v8_int16" type="v8i16"/>
|
||||
<field name="v4_int32" type="v4i32"/>
|
||||
<field name="v2_int64" type="v2i64"/>
|
||||
<field name="uint128" type="uint128"/>
|
||||
</union>
|
||||
<union id="float32_union">
|
||||
<field name="float" type="ieee_single"/>
|
||||
<field name="uint32" type="uint32"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="32" regnum="40" group="fpu" type="float32_union"/>
|
||||
<reg name="fr1" bitsize="32" regnum="41" group="fpu" type="float32_union"/>
|
||||
<reg name="fr2" bitsize="32" regnum="42" group="fpu" type="float32_union"/>
|
||||
<reg name="fr3" bitsize="32" regnum="43" group="fpu" type="float32_union"/>
|
||||
<reg name="fr4" bitsize="32" regnum="44" group="fpu" type="float32_union"/>
|
||||
<reg name="fr5" bitsize="32" regnum="45" group="fpu" type="float32_union"/>
|
||||
<reg name="fr6" bitsize="32" regnum="46" group="fpu" type="float32_union"/>
|
||||
<reg name="fr7" bitsize="32" regnum="47" group="fpu" type="float32_union"/>
|
||||
<reg name="fr8" bitsize="32" regnum="48" group="fpu" type="float32_union"/>
|
||||
<reg name="fr9" bitsize="32" regnum="49" group="fpu" type="float32_union"/>
|
||||
<reg name="fr10" bitsize="32" regnum="50" group="fpu" type="float32_union"/>
|
||||
<reg name="fr11" bitsize="32" regnum="51" group="fpu" type="float32_union"/>
|
||||
<reg name="fr12" bitsize="32" regnum="52" group="fpu" type="float32_union"/>
|
||||
<reg name="fr13" bitsize="32" regnum="53" group="fpu" type="float32_union"/>
|
||||
<reg name="fr14" bitsize="32" regnum="54" group="fpu" type="float32_union"/>
|
||||
<reg name="fr15" bitsize="32" regnum="55" group="fpu" type="float32_union"/>
|
||||
<!--vector register-->
|
||||
<reg name="vr0" bitsize="128" regnum="56" type="vec128" group="vpu"/>
|
||||
<reg name="vr1" bitsize="128" regnum="57" type="vec128" group="vpu"/>
|
||||
<reg name="vr2" bitsize="128" regnum="58" type="vec128" group="vpu"/>
|
||||
<reg name="vr3" bitsize="128" regnum="59" type="vec128" group="vpu"/>
|
||||
<reg name="vr4" bitsize="128" regnum="60" type="vec128" group="vpu"/>
|
||||
<reg name="vr5" bitsize="128" regnum="61" type="vec128" group="vpu"/>
|
||||
<reg name="vr6" bitsize="128" regnum="62" type="vec128" group="vpu"/>
|
||||
<reg name="vr7" bitsize="128" regnum="63" type="vec128" group="vpu"/>
|
||||
<reg name="vr8" bitsize="128" regnum="64" type="vec128" group="vpu"/>
|
||||
<reg name="vr9" bitsize="128" regnum="65" type="vec128" group="vpu"/>
|
||||
<reg name="vr10" bitsize="128" regnum="66" type="vec128" group="vpu"/>
|
||||
<reg name="vr11" bitsize="128" regnum="67" type="vec128" group="vpu"/>
|
||||
<reg name="vr12" bitsize="128" regnum="68" type="vec128" group="vpu"/>
|
||||
<reg name="vr13" bitsize="128" regnum="69" type="vec128" group="vpu"/>
|
||||
<reg name="vr14" bitsize="128" regnum="70" type="vec128" group="vpu"/>
|
||||
<reg name="vr15" bitsize="128" regnum="71" type="vec128" group="vpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="SV[25]" start="25" end="25" type="int8"/>
|
||||
<field name="SD[26]" start="26" end="26" type="int8"/>
|
||||
<field name="SC[27]" start="27" end="27" type="int8"/>
|
||||
<field name="HS[28]" start="28" end="28" type="int8"/>
|
||||
<field name="SP[29]" start="29" end="29" type="int8"/>
|
||||
<field name="T[30]" start="30" end="30" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.tee">
|
||||
<reg name="nt_usp" bitsize="32" regnum="127" group="ree"/>
|
||||
<reg name="ebr" bitsize="32" regnum="190" group="cr"/>
|
||||
<reg name="dcr" bitsize="32" regnum="229" group="cr"/>
|
||||
<reg name="t_usp" bitsize="32" regnum="228" group="tee"/>
|
||||
<reg name="t_pcr" bitsize="32" regnum="230" group="tee"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.pseudo">
|
||||
<reg name="t_psr" bitsize="32" regs="89" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_vbr" bitsize="32" regs="90" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epsr" bitsize="32" regs="91" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epc" bitsize="32" regs="93" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ebr" bitsize="32" regs="190" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_psr" bitsize="32" regs="89" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_vbr" bitsize="32" regs="90" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epsr" bitsize="32" regs="91" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epc" bitsize="32" regs="93" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ebr" bitsize="32" regs="190" group="ree" type="int32" env="ree"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,130 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<vector id="v4f" type="ieee_single" count="4"/>
|
||||
<vector id="v2d" type="ieee_double" count="2"/>
|
||||
<vector id="v16i8" type="int8" count="16"/>
|
||||
<vector id="v8i16" type="int16" count="8"/>
|
||||
<vector id="v4i32" type="int32" count="4"/>
|
||||
<vector id="v2i64" type="int64" count="2"/>
|
||||
<union id="vec128">
|
||||
<field name="v4_float" type="v4f"/>
|
||||
<field name="v2_double" type="v2d"/>
|
||||
<field name="v16_int8" type="v16i8"/>
|
||||
<field name="v8_int16" type="v8i16"/>
|
||||
<field name="v4_int32" type="v4i32"/>
|
||||
<field name="v2_int64" type="v2i64"/>
|
||||
<field name="uint128" type="uint128"/>
|
||||
</union>
|
||||
<union id="float32_union">
|
||||
<field name="float" type="ieee_single"/>
|
||||
<field name="uint32" type="uint32"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="32" regnum="40" group="fpu" type="float32_union"/>
|
||||
<reg name="fr1" bitsize="32" regnum="41" group="fpu" type="float32_union"/>
|
||||
<reg name="fr2" bitsize="32" regnum="42" group="fpu" type="float32_union"/>
|
||||
<reg name="fr3" bitsize="32" regnum="43" group="fpu" type="float32_union"/>
|
||||
<reg name="fr4" bitsize="32" regnum="44" group="fpu" type="float32_union"/>
|
||||
<reg name="fr5" bitsize="32" regnum="45" group="fpu" type="float32_union"/>
|
||||
<reg name="fr6" bitsize="32" regnum="46" group="fpu" type="float32_union"/>
|
||||
<reg name="fr7" bitsize="32" regnum="47" group="fpu" type="float32_union"/>
|
||||
<reg name="fr8" bitsize="32" regnum="48" group="fpu" type="float32_union"/>
|
||||
<reg name="fr9" bitsize="32" regnum="49" group="fpu" type="float32_union"/>
|
||||
<reg name="fr10" bitsize="32" regnum="50" group="fpu" type="float32_union"/>
|
||||
<reg name="fr11" bitsize="32" regnum="51" group="fpu" type="float32_union"/>
|
||||
<reg name="fr12" bitsize="32" regnum="52" group="fpu" type="float32_union"/>
|
||||
<reg name="fr13" bitsize="32" regnum="53" group="fpu" type="float32_union"/>
|
||||
<reg name="fr14" bitsize="32" regnum="54" group="fpu" type="float32_union"/>
|
||||
<reg name="fr15" bitsize="32" regnum="55" group="fpu" type="float32_union"/>
|
||||
<!--vector register-->
|
||||
<reg name="vr0" bitsize="128" regnum="56" type="vec128" group="vpu"/>
|
||||
<reg name="vr1" bitsize="128" regnum="57" type="vec128" group="vpu"/>
|
||||
<reg name="vr2" bitsize="128" regnum="58" type="vec128" group="vpu"/>
|
||||
<reg name="vr3" bitsize="128" regnum="59" type="vec128" group="vpu"/>
|
||||
<reg name="vr4" bitsize="128" regnum="60" type="vec128" group="vpu"/>
|
||||
<reg name="vr5" bitsize="128" regnum="61" type="vec128" group="vpu"/>
|
||||
<reg name="vr6" bitsize="128" regnum="62" type="vec128" group="vpu"/>
|
||||
<reg name="vr7" bitsize="128" regnum="63" type="vec128" group="vpu"/>
|
||||
<reg name="vr8" bitsize="128" regnum="64" type="vec128" group="vpu"/>
|
||||
<reg name="vr9" bitsize="128" regnum="65" type="vec128" group="vpu"/>
|
||||
<reg name="vr10" bitsize="128" regnum="66" type="vec128" group="vpu"/>
|
||||
<reg name="vr11" bitsize="128" regnum="67" type="vec128" group="vpu"/>
|
||||
<reg name="vr12" bitsize="128" regnum="68" type="vec128" group="vpu"/>
|
||||
<reg name="vr13" bitsize="128" regnum="69" type="vec128" group="vpu"/>
|
||||
<reg name="vr14" bitsize="128" regnum="70" type="vec128" group="vpu"/>
|
||||
<reg name="vr15" bitsize="128" regnum="71" type="vec128" group="vpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="chr" bitsize="32" regnum="120" group="cr"/>
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank3">
|
||||
<reg name="sepsr" bitsize="32" regnum="221" group="bank3"/>
|
||||
<reg name="sevbr" bitsize="32" regnum="222" group="bank3"/>
|
||||
<reg name="seepsr" bitsize="32" regnum="223" group="bank3"/>
|
||||
<reg name="seepc" bitsize="32" regnum="225" group="bank3"/>
|
||||
<reg name="nsssp" bitsize="32" regnum="227" group="bank3"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,121 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<vector id="v4f" type="ieee_single" count="4"/>
|
||||
<vector id="v2d" type="ieee_double" count="2"/>
|
||||
<vector id="v16i8" type="int8" count="16"/>
|
||||
<vector id="v8i16" type="int16" count="8"/>
|
||||
<vector id="v4i32" type="int32" count="4"/>
|
||||
<vector id="v2i64" type="int64" count="2"/>
|
||||
<union id="vec128">
|
||||
<field name="v4_float" type="v4f"/>
|
||||
<field name="v2_double" type="v2d"/>
|
||||
<field name="v16_int8" type="v16i8"/>
|
||||
<field name="v8_int16" type="v8i16"/>
|
||||
<field name="v4_int32" type="v4i32"/>
|
||||
<field name="v2_int64" type="v2i64"/>
|
||||
<field name="uint128" type="uint128"/>
|
||||
</union>
|
||||
<!--vector register-->
|
||||
<reg name="vr0" bitsize="128" regnum="56" type="vec128" group="vpu"/>
|
||||
<reg name="vr1" bitsize="128" regnum="57" type="vec128" group="vpu"/>
|
||||
<reg name="vr2" bitsize="128" regnum="58" type="vec128" group="vpu"/>
|
||||
<reg name="vr3" bitsize="128" regnum="59" type="vec128" group="vpu"/>
|
||||
<reg name="vr4" bitsize="128" regnum="60" type="vec128" group="vpu"/>
|
||||
<reg name="vr5" bitsize="128" regnum="61" type="vec128" group="vpu"/>
|
||||
<reg name="vr6" bitsize="128" regnum="62" type="vec128" group="vpu"/>
|
||||
<reg name="vr7" bitsize="128" regnum="63" type="vec128" group="vpu"/>
|
||||
<reg name="vr8" bitsize="128" regnum="64" type="vec128" group="vpu"/>
|
||||
<reg name="vr9" bitsize="128" regnum="65" type="vec128" group="vpu"/>
|
||||
<reg name="vr10" bitsize="128" regnum="66" type="vec128" group="vpu"/>
|
||||
<reg name="vr11" bitsize="128" regnum="67" type="vec128" group="vpu"/>
|
||||
<reg name="vr12" bitsize="128" regnum="68" type="vec128" group="vpu"/>
|
||||
<reg name="vr13" bitsize="128" regnum="69" type="vec128" group="vpu"/>
|
||||
<reg name="vr14" bitsize="128" regnum="70" type="vec128" group="vpu"/>
|
||||
<reg name="vr15" bitsize="128" regnum="71" type="vec128" group="vpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="SV[25]" start="25" end="25" type="int8"/>
|
||||
<field name="SD[26]" start="26" end="26" type="int8"/>
|
||||
<field name="SC[27]" start="27" end="27" type="int8"/>
|
||||
<field name="HS[28]" start="28" end="28" type="int8"/>
|
||||
<field name="SP[29]" start="29" end="29" type="int8"/>
|
||||
<field name="T[30]" start="30" end="30" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.tee">
|
||||
<reg name="nt_usp" bitsize="32" regnum="127" group="ree"/>
|
||||
<reg name="ebr" bitsize="32" regnum="190" group="cr"/>
|
||||
<reg name="dcr" bitsize="32" regnum="229" group="cr"/>
|
||||
<reg name="t_usp" bitsize="32" regnum="228" group="tee"/>
|
||||
<reg name="t_pcr" bitsize="32" regnum="230" group="tee"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.pseudo">
|
||||
<reg name="t_psr" bitsize="32" regs="89" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_vbr" bitsize="32" regs="90" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epsr" bitsize="32" regs="91" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epc" bitsize="32" regs="93" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ebr" bitsize="32" regs="190" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_psr" bitsize="32" regs="89" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_vbr" bitsize="32" regs="90" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epsr" bitsize="32" regs="91" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epc" bitsize="32" regs="93" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ebr" bitsize="32" regs="190" group="ree" type="int32" env="ree"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,102 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<vector id="v4f" type="ieee_single" count="4"/>
|
||||
<vector id="v2d" type="ieee_double" count="2"/>
|
||||
<vector id="v16i8" type="int8" count="16"/>
|
||||
<vector id="v8i16" type="int16" count="8"/>
|
||||
<vector id="v4i32" type="int32" count="4"/>
|
||||
<vector id="v2i64" type="int64" count="2"/>
|
||||
<union id="vec128">
|
||||
<field name="v4_float" type="v4f"/>
|
||||
<field name="v2_double" type="v2d"/>
|
||||
<field name="v16_int8" type="v16i8"/>
|
||||
<field name="v8_int16" type="v8i16"/>
|
||||
<field name="v4_int32" type="v4i32"/>
|
||||
<field name="v2_int64" type="v2i64"/>
|
||||
<field name="uint128" type="uint128"/>
|
||||
</union>
|
||||
<reg name="vr0" bitsize="128" regnum="56" type="vec128" group="vpu"/>
|
||||
<reg name="vr1" bitsize="128" regnum="57" type="vec128" group="vpu"/>
|
||||
<reg name="vr2" bitsize="128" regnum="58" type="vec128" group="vpu"/>
|
||||
<reg name="vr3" bitsize="128" regnum="59" type="vec128" group="vpu"/>
|
||||
<reg name="vr4" bitsize="128" regnum="60" type="vec128" group="vpu"/>
|
||||
<reg name="vr5" bitsize="128" regnum="61" type="vec128" group="vpu"/>
|
||||
<reg name="vr6" bitsize="128" regnum="62" type="vec128" group="vpu"/>
|
||||
<reg name="vr7" bitsize="128" regnum="63" type="vec128" group="vpu"/>
|
||||
<reg name="vr8" bitsize="128" regnum="64" type="vec128" group="vpu"/>
|
||||
<reg name="vr9" bitsize="128" regnum="65" type="vec128" group="vpu"/>
|
||||
<reg name="vr10" bitsize="128" regnum="66" type="vec128" group="vpu"/>
|
||||
<reg name="vr11" bitsize="128" regnum="67" type="vec128" group="vpu"/>
|
||||
<reg name="vr12" bitsize="128" regnum="68" type="vec128" group="vpu"/>
|
||||
<reg name="vr13" bitsize="128" regnum="69" type="vec128" group="vpu"/>
|
||||
<reg name="vr14" bitsize="128" regnum="70" type="vec128" group="vpu"/>
|
||||
<reg name="vr15" bitsize="128" regnum="71" type="vec128" group="vpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="cpuid" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="ccr" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="capr" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="pacr" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="prsr" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
<reg name="int_sp" bitsize="32" regnum="204"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank3">
|
||||
<reg name="sepsr" bitsize="32" regnum="221" group="bank3"/>
|
||||
<reg name="sevbr" bitsize="32" regnum="222" group="bank3"/>
|
||||
<reg name="seepsr" bitsize="32" regnum="223" group="bank3"/>
|
||||
<reg name="seepc" bitsize="32" regnum="225" group="bank3"/>
|
||||
<reg name="nsssp" bitsize="32" regnum="227" group="bank3"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,152 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="ss0" bitsize="32" regnum="95" group="cr"/>
|
||||
<reg name="ss1" bitsize="32" regnum="96" group="cr"/>
|
||||
<reg name="ss2" bitsize="32" regnum="97" group="cr"/>
|
||||
<reg name="ss3" bitsize="32" regnum="98" group="cr"/>
|
||||
<reg name="ss4" bitsize="32" regnum="99" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr14" bitsize="32" regnum="103" group="cr"/>
|
||||
<reg name="cr15" bitsize="32" regnum="104" group="cr"/>
|
||||
<reg name="cr16" bitsize="32" regnum="105" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr19" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="cr20" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="cr21" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="cr22" bitsize="32" regnum="111" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr24" bitsize="32" regnum="113" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr26" bitsize="32" regnum="115" group="cr"/>
|
||||
<reg name="cr27" bitsize="32" regnum="116" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,180 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<union id="float64_union">
|
||||
<field name="double64" type="ieee_double"/>
|
||||
<field name="float32" type="ieee_single"/>
|
||||
<field name="uint64" type="uint64"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="64" regnum="40" type="float64_union" group="fpu"/>
|
||||
<reg name="fr1" bitsize="64" regnum="41" type="float64_union" group="fpu"/>
|
||||
<reg name="fr2" bitsize="64" regnum="42" type="float64_union" group="fpu"/>
|
||||
<reg name="fr3" bitsize="64" regnum="43" type="float64_union" group="fpu"/>
|
||||
<reg name="fr4" bitsize="64" regnum="44" type="float64_union" group="fpu"/>
|
||||
<reg name="fr5" bitsize="64" regnum="45" type="float64_union" group="fpu"/>
|
||||
<reg name="fr6" bitsize="64" regnum="46" type="float64_union" group="fpu"/>
|
||||
<reg name="fr7" bitsize="64" regnum="47" type="float64_union" group="fpu"/>
|
||||
<reg name="fr8" bitsize="64" regnum="48" type="float64_union" group="fpu"/>
|
||||
<reg name="fr9" bitsize="64" regnum="49" type="float64_union" group="fpu"/>
|
||||
<reg name="fr10" bitsize="64" regnum="50" type="float64_union" group="fpu"/>
|
||||
<reg name="fr11" bitsize="64" regnum="51" type="float64_union" group="fpu"/>
|
||||
<reg name="fr12" bitsize="64" regnum="52" type="float64_union" group="fpu"/>
|
||||
<reg name="fr13" bitsize="64" regnum="53" type="float64_union" group="fpu"/>
|
||||
<reg name="fr14" bitsize="64" regnum="54" type="float64_union" group="fpu"/>
|
||||
<reg name="fr15" bitsize="64" regnum="55" type="float64_union" group="fpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="ss0" bitsize="32" regnum="95" group="cr"/>
|
||||
<reg name="ss1" bitsize="32" regnum="96" group="cr"/>
|
||||
<reg name="ss2" bitsize="32" regnum="97" group="cr"/>
|
||||
<reg name="ss3" bitsize="32" regnum="98" group="cr"/>
|
||||
<reg name="ss4" bitsize="32" regnum="99" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr14" bitsize="32" regnum="103" group="cr"/>
|
||||
<reg name="cr15" bitsize="32" regnum="104" group="cr"/>
|
||||
<reg name="cr16" bitsize="32" regnum="105" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr19" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="cr20" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="cr21" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="cr22" bitsize="32" regnum="111" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr24" bitsize="32" regnum="113" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr26" bitsize="32" regnum="115" group="cr"/>
|
||||
<reg name="cr27" bitsize="32" regnum="116" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
<reg name="cp1cr20" bitsize="32" regnum="209" group="bank1"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,180 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<union id="float64_union">
|
||||
<field name="double64" type="ieee_double"/>
|
||||
<field name="float32" type="ieee_single"/>
|
||||
<field name="uint64" type="uint64"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="64" regnum="40" type="float64_union" group="fpu"/>
|
||||
<reg name="fr1" bitsize="64" regnum="41" type="float64_union" group="fpu"/>
|
||||
<reg name="fr2" bitsize="64" regnum="42" type="float64_union" group="fpu"/>
|
||||
<reg name="fr3" bitsize="64" regnum="43" type="float64_union" group="fpu"/>
|
||||
<reg name="fr4" bitsize="64" regnum="44" type="float64_union" group="fpu"/>
|
||||
<reg name="fr5" bitsize="64" regnum="45" type="float64_union" group="fpu"/>
|
||||
<reg name="fr6" bitsize="64" regnum="46" type="float64_union" group="fpu"/>
|
||||
<reg name="fr7" bitsize="64" regnum="47" type="float64_union" group="fpu"/>
|
||||
<reg name="fr8" bitsize="64" regnum="48" type="float64_union" group="fpu"/>
|
||||
<reg name="fr9" bitsize="64" regnum="49" type="float64_union" group="fpu"/>
|
||||
<reg name="fr10" bitsize="64" regnum="50" type="float64_union" group="fpu"/>
|
||||
<reg name="fr11" bitsize="64" regnum="51" type="float64_union" group="fpu"/>
|
||||
<reg name="fr12" bitsize="64" regnum="52" type="float64_union" group="fpu"/>
|
||||
<reg name="fr13" bitsize="64" regnum="53" type="float64_union" group="fpu"/>
|
||||
<reg name="fr14" bitsize="64" regnum="54" type="float64_union" group="fpu"/>
|
||||
<reg name="fr15" bitsize="64" regnum="55" type="float64_union" group="fpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="ss0" bitsize="32" regnum="95" group="cr"/>
|
||||
<reg name="ss1" bitsize="32" regnum="96" group="cr"/>
|
||||
<reg name="ss2" bitsize="32" regnum="97" group="cr"/>
|
||||
<reg name="ss3" bitsize="32" regnum="98" group="cr"/>
|
||||
<reg name="ss4" bitsize="32" regnum="99" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr14" bitsize="32" regnum="103" group="cr"/>
|
||||
<reg name="cr15" bitsize="32" regnum="104" group="cr"/>
|
||||
<reg name="cr16" bitsize="32" regnum="105" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr19" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="cr20" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="cr21" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="cr22" bitsize="32" regnum="111" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr24" bitsize="32" regnum="113" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr26" bitsize="32" regnum="115" group="cr"/>
|
||||
<reg name="cr27" bitsize="32" regnum="116" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
<reg name="cp1cr20" bitsize="32" regnum="209" group="bank1"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,152 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="ss0" bitsize="32" regnum="95" group="cr"/>
|
||||
<reg name="ss1" bitsize="32" regnum="96" group="cr"/>
|
||||
<reg name="ss2" bitsize="32" regnum="97" group="cr"/>
|
||||
<reg name="ss3" bitsize="32" regnum="98" group="cr"/>
|
||||
<reg name="ss4" bitsize="32" regnum="99" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr14" bitsize="32" regnum="103" group="cr"/>
|
||||
<reg name="cr15" bitsize="32" regnum="104" group="cr"/>
|
||||
<reg name="cr16" bitsize="32" regnum="105" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr19" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="cr20" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="cr21" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="cr22" bitsize="32" regnum="111" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr24" bitsize="32" regnum="113" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr26" bitsize="32" regnum="115" group="cr"/>
|
||||
<reg name="cr27" bitsize="32" regnum="116" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,180 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<union id="float64_union">
|
||||
<field name="double64" type="ieee_double"/>
|
||||
<field name="float32" type="ieee_single"/>
|
||||
<field name="uint64" type="uint64"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="64" regnum="40" type="float64_union" group="fpu"/>
|
||||
<reg name="fr1" bitsize="64" regnum="41" type="float64_union" group="fpu"/>
|
||||
<reg name="fr2" bitsize="64" regnum="42" type="float64_union" group="fpu"/>
|
||||
<reg name="fr3" bitsize="64" regnum="43" type="float64_union" group="fpu"/>
|
||||
<reg name="fr4" bitsize="64" regnum="44" type="float64_union" group="fpu"/>
|
||||
<reg name="fr5" bitsize="64" regnum="45" type="float64_union" group="fpu"/>
|
||||
<reg name="fr6" bitsize="64" regnum="46" type="float64_union" group="fpu"/>
|
||||
<reg name="fr7" bitsize="64" regnum="47" type="float64_union" group="fpu"/>
|
||||
<reg name="fr8" bitsize="64" regnum="48" type="float64_union" group="fpu"/>
|
||||
<reg name="fr9" bitsize="64" regnum="49" type="float64_union" group="fpu"/>
|
||||
<reg name="fr10" bitsize="64" regnum="50" type="float64_union" group="fpu"/>
|
||||
<reg name="fr11" bitsize="64" regnum="51" type="float64_union" group="fpu"/>
|
||||
<reg name="fr12" bitsize="64" regnum="52" type="float64_union" group="fpu"/>
|
||||
<reg name="fr13" bitsize="64" regnum="53" type="float64_union" group="fpu"/>
|
||||
<reg name="fr14" bitsize="64" regnum="54" type="float64_union" group="fpu"/>
|
||||
<reg name="fr15" bitsize="64" regnum="55" type="float64_union" group="fpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="ss0" bitsize="32" regnum="95" group="cr"/>
|
||||
<reg name="ss1" bitsize="32" regnum="96" group="cr"/>
|
||||
<reg name="ss2" bitsize="32" regnum="97" group="cr"/>
|
||||
<reg name="ss3" bitsize="32" regnum="98" group="cr"/>
|
||||
<reg name="ss4" bitsize="32" regnum="99" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr14" bitsize="32" regnum="103" group="cr"/>
|
||||
<reg name="cr15" bitsize="32" regnum="104" group="cr"/>
|
||||
<reg name="cr16" bitsize="32" regnum="105" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr19" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="cr20" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="cr21" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="cr22" bitsize="32" regnum="111" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr24" bitsize="32" regnum="113" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr26" bitsize="32" regnum="115" group="cr"/>
|
||||
<reg name="cr27" bitsize="32" regnum="116" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
<reg name="cp1cr20" bitsize="32" regnum="209" group="bank1"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,239 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<union id="float64_union">
|
||||
<field name="double64" type="ieee_double"/>
|
||||
<field name="float32" type="ieee_single"/>
|
||||
<field name="uint64" type="uint64"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="64" regnum="40" type="float64_union" group="fpu"/>
|
||||
<reg name="fr1" bitsize="64" regnum="41" type="float64_union" group="fpu"/>
|
||||
<reg name="fr2" bitsize="64" regnum="42" type="float64_union" group="fpu"/>
|
||||
<reg name="fr3" bitsize="64" regnum="43" type="float64_union" group="fpu"/>
|
||||
<reg name="fr4" bitsize="64" regnum="44" type="float64_union" group="fpu"/>
|
||||
<reg name="fr5" bitsize="64" regnum="45" type="float64_union" group="fpu"/>
|
||||
<reg name="fr6" bitsize="64" regnum="46" type="float64_union" group="fpu"/>
|
||||
<reg name="fr7" bitsize="64" regnum="47" type="float64_union" group="fpu"/>
|
||||
<reg name="fr8" bitsize="64" regnum="48" type="float64_union" group="fpu"/>
|
||||
<reg name="fr9" bitsize="64" regnum="49" type="float64_union" group="fpu"/>
|
||||
<reg name="fr10" bitsize="64" regnum="50" type="float64_union" group="fpu"/>
|
||||
<reg name="fr11" bitsize="64" regnum="51" type="float64_union" group="fpu"/>
|
||||
<reg name="fr12" bitsize="64" regnum="52" type="float64_union" group="fpu"/>
|
||||
<reg name="fr13" bitsize="64" regnum="53" type="float64_union" group="fpu"/>
|
||||
<reg name="fr14" bitsize="64" regnum="54" type="float64_union" group="fpu"/>
|
||||
<reg name="fr15" bitsize="64" regnum="55" type="float64_union" group="fpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="SP[29]" start="29" end="29" type="int8"/>
|
||||
<field name="T[30]" start="30" end="30" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="ss0" bitsize="32" regnum="95" group="cr"/>
|
||||
<reg name="ss1" bitsize="32" regnum="96" group="cr"/>
|
||||
<reg name="ss2" bitsize="32" regnum="97" group="cr"/>
|
||||
<reg name="ss3" bitsize="32" regnum="98" group="cr"/>
|
||||
<reg name="ss4" bitsize="32" regnum="99" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr14" bitsize="32" regnum="103" group="cr"/>
|
||||
<reg name="cr15" bitsize="32" regnum="104" group="cr"/>
|
||||
<reg name="cr16" bitsize="32" regnum="105" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr19" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="cr20" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="cr21" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="cr22" bitsize="32" regnum="111" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr24" bitsize="32" regnum="113" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr26" bitsize="32" regnum="115" group="cr"/>
|
||||
<reg name="cr27" bitsize="32" regnum="116" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
<reg name="cp1cr20" bitsize="32" regnum="209" group="bank1"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.tee">
|
||||
<reg name="ebr" bitsize="32" regnum="190" group="cr"/>
|
||||
<reg name="dcr" bitsize="32" regnum="229" group="cr"/>
|
||||
<reg name="t_wssr" bitsize="32" regnum="221" group="tee"/>
|
||||
<reg name="t_wrcr" bitsize="32" regnum="222" group="tee"/>
|
||||
<reg name="t_pcr" bitsize="32" regnum="230" group="tee"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.pseudo">
|
||||
<!--cr tee vs ree-->
|
||||
<reg name="t_psr" bitsize="32" regs="89" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_vbr" bitsize="32" regs="90" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epsr" bitsize="32" regs="91" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_fpsr" bitsize="32" regs="92" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_fpc" bitsize="32" regs="94" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epc" bitsize="32" regs="93" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ebr" bitsize="32" regs="190" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_dcr" bitsize="32" regs="229" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_usp" bitsize="32" regs="127" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_psr" bitsize="32" regs="89" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_vbr" bitsize="32" regs="90" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epsr" bitsize="32" regs="91" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_fpsr" bitsize="32" regs="92" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_fpc" bitsize="32" regs="94" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epc" bitsize="32" regs="93" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ebr" bitsize="32" regs="190" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_dcr" bitsize="32" regs="229" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_usp" bitsize="32" regs="127" group="ree" type="int32" env="ree"/>
|
||||
<!--cache tee vs ree-->
|
||||
<reg name="t_cfr" bitsize="32" regs="106" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ccr" bitsize="32" regs="107" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_cir" bitsize="32" regs="111" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ccr2" bitsize="32" regs="112" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_cfr2" bitsize="32" regs="113" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_hint" bitsize="32" regs="120" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_cfr" bitsize="32" regs="106" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ccr" bitsize="32" regs="107" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_cir" bitsize="32" regs="111" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_cfr2" bitsize="32" regs="113" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_hint" bitsize="32" regs="120" group="ree" type="int32" env="ree"/>
|
||||
<!--mmu tee vs ree-->
|
||||
<reg name="t_mir" bitsize="32" regs="128" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_mel0" bitsize="32" regs="129" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_mel1" bitsize="32" regs="130" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_meh" bitsize="32" regs="131" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_mpr" bitsize="32" regs="132" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_mcir" bitsize="32" regs="133" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_msa0" bitsize="32" regs="135" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_msa1" bitsize="32" regs="136" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_mir" bitsize="32" regs="128" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_mel0" bitsize="32" regs="129" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_mel1" bitsize="32" regs="130" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_meh" bitsize="32" regs="131" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_mpr" bitsize="32" regs="132" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_mcir" bitsize="32" regs="133" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_msa0" bitsize="32" regs="135" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_msa1" bitsize="32" regs="136" group="ree" type="int32" env="ree"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,271 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<vector id="v4f" type="ieee_single" count="4"/>
|
||||
<vector id="v2d" type="ieee_double" count="2"/>
|
||||
<vector id="v16i8" type="int8" count="16"/>
|
||||
<vector id="v8i16" type="int16" count="8"/>
|
||||
<vector id="v4i32" type="int32" count="4"/>
|
||||
<vector id="v2i64" type="int64" count="2"/>
|
||||
<union id="vec128">
|
||||
<field name="v4_float" type="v4f"/>
|
||||
<field name="v2_double" type="v2d"/>
|
||||
<field name="v16_int8" type="v16i8"/>
|
||||
<field name="v8_int16" type="v8i16"/>
|
||||
<field name="v4_int32" type="v4i32"/>
|
||||
<field name="v2_int64" type="v2i64"/>
|
||||
<field name="uint128" type="uint128"/>
|
||||
</union>
|
||||
<union id="float64_union">
|
||||
<field name="double64" type="ieee_double"/>
|
||||
<field name="float32" type="ieee_single"/>
|
||||
<field name="uint64" type="uint64"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="64" regnum="40" type="float64_union" group="fpu"/>
|
||||
<reg name="fr1" bitsize="64" regnum="41" type="float64_union" group="fpu"/>
|
||||
<reg name="fr2" bitsize="64" regnum="42" type="float64_union" group="fpu"/>
|
||||
<reg name="fr3" bitsize="64" regnum="43" type="float64_union" group="fpu"/>
|
||||
<reg name="fr4" bitsize="64" regnum="44" type="float64_union" group="fpu"/>
|
||||
<reg name="fr5" bitsize="64" regnum="45" type="float64_union" group="fpu"/>
|
||||
<reg name="fr6" bitsize="64" regnum="46" type="float64_union" group="fpu"/>
|
||||
<reg name="fr7" bitsize="64" regnum="47" type="float64_union" group="fpu"/>
|
||||
<reg name="fr8" bitsize="64" regnum="48" type="float64_union" group="fpu"/>
|
||||
<reg name="fr9" bitsize="64" regnum="49" type="float64_union" group="fpu"/>
|
||||
<reg name="fr10" bitsize="64" regnum="50" type="float64_union" group="fpu"/>
|
||||
<reg name="fr11" bitsize="64" regnum="51" type="float64_union" group="fpu"/>
|
||||
<reg name="fr12" bitsize="64" regnum="52" type="float64_union" group="fpu"/>
|
||||
<reg name="fr13" bitsize="64" regnum="53" type="float64_union" group="fpu"/>
|
||||
<reg name="fr14" bitsize="64" regnum="54" type="float64_union" group="fpu"/>
|
||||
<reg name="fr15" bitsize="64" regnum="55" type="float64_union" group="fpu"/>
|
||||
<!--vector register-->
|
||||
<reg name="vr0" bitsize="128" regnum="56" type="vec128" group="vpu"/>
|
||||
<reg name="vr1" bitsize="128" regnum="57" type="vec128" group="vpu"/>
|
||||
<reg name="vr2" bitsize="128" regnum="58" type="vec128" group="vpu"/>
|
||||
<reg name="vr3" bitsize="128" regnum="59" type="vec128" group="vpu"/>
|
||||
<reg name="vr4" bitsize="128" regnum="60" type="vec128" group="vpu"/>
|
||||
<reg name="vr5" bitsize="128" regnum="61" type="vec128" group="vpu"/>
|
||||
<reg name="vr6" bitsize="128" regnum="62" type="vec128" group="vpu"/>
|
||||
<reg name="vr7" bitsize="128" regnum="63" type="vec128" group="vpu"/>
|
||||
<reg name="vr8" bitsize="128" regnum="64" type="vec128" group="vpu"/>
|
||||
<reg name="vr9" bitsize="128" regnum="65" type="vec128" group="vpu"/>
|
||||
<reg name="vr10" bitsize="128" regnum="66" type="vec128" group="vpu"/>
|
||||
<reg name="vr11" bitsize="128" regnum="67" type="vec128" group="vpu"/>
|
||||
<reg name="vr12" bitsize="128" regnum="68" type="vec128" group="vpu"/>
|
||||
<reg name="vr13" bitsize="128" regnum="69" type="vec128" group="vpu"/>
|
||||
<reg name="vr14" bitsize="128" regnum="70" type="vec128" group="vpu"/>
|
||||
<reg name="vr15" bitsize="128" regnum="71" type="vec128" group="vpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="SP[29]" start="29" end="29" type="int8"/>
|
||||
<field name="T[30]" start="30" end="30" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="ss0" bitsize="32" regnum="95" group="cr"/>
|
||||
<reg name="ss1" bitsize="32" regnum="96" group="cr"/>
|
||||
<reg name="ss2" bitsize="32" regnum="97" group="cr"/>
|
||||
<reg name="ss3" bitsize="32" regnum="98" group="cr"/>
|
||||
<reg name="ss4" bitsize="32" regnum="99" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr14" bitsize="32" regnum="103" group="cr"/>
|
||||
<reg name="cr15" bitsize="32" regnum="104" group="cr"/>
|
||||
<reg name="cr16" bitsize="32" regnum="105" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr19" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="cr20" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="cr21" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="cr22" bitsize="32" regnum="111" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr24" bitsize="32" regnum="113" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr26" bitsize="32" regnum="115" group="cr"/>
|
||||
<reg name="cr27" bitsize="32" regnum="116" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
<reg name="cp1cr20" bitsize="32" regnum="209" group="bank1"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.tee">
|
||||
<reg name="ebr" bitsize="32" regnum="190" group="cr"/>
|
||||
<reg name="dcr" bitsize="32" regnum="229" group="cr"/>
|
||||
<reg name="t_wssr" bitsize="32" regnum="221" group="tee"/>
|
||||
<reg name="t_wrcr" bitsize="32" regnum="222" group="tee"/>
|
||||
<reg name="t_pcr" bitsize="32" regnum="230" group="tee"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.pseudo">
|
||||
<!--cr tee vs ree-->
|
||||
<reg name="t_psr" bitsize="32" regs="89" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_vbr" bitsize="32" regs="90" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epsr" bitsize="32" regs="91" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_fpsr" bitsize="32" regs="92" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_fpc" bitsize="32" regs="94" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_epc" bitsize="32" regs="93" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ebr" bitsize="32" regs="190" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_dcr" bitsize="32" regs="229" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_usp" bitsize="32" regs="127" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_psr" bitsize="32" regs="89" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_vbr" bitsize="32" regs="90" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epsr" bitsize="32" regs="91" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_fpsr" bitsize="32" regs="92" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_fpc" bitsize="32" regs="94" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_epc" bitsize="32" regs="93" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ebr" bitsize="32" regs="190" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_dcr" bitsize="32" regs="229" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_usp" bitsize="32" regs="127" group="ree" type="int32" env="ree"/>
|
||||
<!--cache tee vs ree-->
|
||||
<reg name="t_cfr" bitsize="32" regs="106" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ccr" bitsize="32" regs="107" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_cir" bitsize="32" regs="111" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_ccr2" bitsize="32" regs="112" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_cfr2" bitsize="32" regs="113" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_hint" bitsize="32" regs="120" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_cfr" bitsize="32" regs="106" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_ccr" bitsize="32" regs="107" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_cir" bitsize="32" regs="111" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_cfr2" bitsize="32" regs="113" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_hint" bitsize="32" regs="120" group="ree" type="int32" env="ree"/>
|
||||
<!--mmu tee vs ree-->
|
||||
<reg name="t_mir" bitsize="32" regs="128" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_mel0" bitsize="32" regs="129" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_mel1" bitsize="32" regs="130" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_meh" bitsize="32" regs="131" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_mpr" bitsize="32" regs="132" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_mcir" bitsize="32" regs="133" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_msa0" bitsize="32" regs="135" group="tee" type="int32" env="tee"/>
|
||||
<reg name="t_msa1" bitsize="32" regs="136" group="tee" type="int32" env="tee"/>
|
||||
<reg name="nt_mir" bitsize="32" regs="128" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_mel0" bitsize="32" regs="129" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_mel1" bitsize="32" regs="130" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_meh" bitsize="32" regs="131" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_mpr" bitsize="32" regs="132" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_mcir" bitsize="32" regs="133" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_msa0" bitsize="32" regs="135" group="ree" type="int32" env="ree"/>
|
||||
<reg name="nt_msa1" bitsize="32" regs="136" group="ree" type="int32" env="ree"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,212 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<vector id="v4f" type="ieee_single" count="4"/>
|
||||
<vector id="v2d" type="ieee_double" count="2"/>
|
||||
<vector id="v16i8" type="int8" count="16"/>
|
||||
<vector id="v8i16" type="int16" count="8"/>
|
||||
<vector id="v4i32" type="int32" count="4"/>
|
||||
<vector id="v2i64" type="int64" count="2"/>
|
||||
<union id="vec128">
|
||||
<field name="v4_float" type="v4f"/>
|
||||
<field name="v2_double" type="v2d"/>
|
||||
<field name="v16_int8" type="v16i8"/>
|
||||
<field name="v8_int16" type="v8i16"/>
|
||||
<field name="v4_int32" type="v4i32"/>
|
||||
<field name="v2_int64" type="v2i64"/>
|
||||
<field name="uint128" type="uint128"/>
|
||||
</union>
|
||||
<union id="float64_union">
|
||||
<field name="double64" type="ieee_double"/>
|
||||
<field name="float32" type="ieee_single"/>
|
||||
<field name="uint64" type="uint64"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="64" regnum="40" type="float64_union" group="fpu"/>
|
||||
<reg name="fr1" bitsize="64" regnum="41" type="float64_union" group="fpu"/>
|
||||
<reg name="fr2" bitsize="64" regnum="42" type="float64_union" group="fpu"/>
|
||||
<reg name="fr3" bitsize="64" regnum="43" type="float64_union" group="fpu"/>
|
||||
<reg name="fr4" bitsize="64" regnum="44" type="float64_union" group="fpu"/>
|
||||
<reg name="fr5" bitsize="64" regnum="45" type="float64_union" group="fpu"/>
|
||||
<reg name="fr6" bitsize="64" regnum="46" type="float64_union" group="fpu"/>
|
||||
<reg name="fr7" bitsize="64" regnum="47" type="float64_union" group="fpu"/>
|
||||
<reg name="fr8" bitsize="64" regnum="48" type="float64_union" group="fpu"/>
|
||||
<reg name="fr9" bitsize="64" regnum="49" type="float64_union" group="fpu"/>
|
||||
<reg name="fr10" bitsize="64" regnum="50" type="float64_union" group="fpu"/>
|
||||
<reg name="fr11" bitsize="64" regnum="51" type="float64_union" group="fpu"/>
|
||||
<reg name="fr12" bitsize="64" regnum="52" type="float64_union" group="fpu"/>
|
||||
<reg name="fr13" bitsize="64" regnum="53" type="float64_union" group="fpu"/>
|
||||
<reg name="fr14" bitsize="64" regnum="54" type="float64_union" group="fpu"/>
|
||||
<reg name="fr15" bitsize="64" regnum="55" type="float64_union" group="fpu"/>
|
||||
<!--vector register-->
|
||||
<reg name="vr0" bitsize="128" regnum="56" group="vpu" type="vec128"/>
|
||||
<reg name="vr1" bitsize="128" regnum="57" group="vpu" type="vec128"/>
|
||||
<reg name="vr2" bitsize="128" regnum="58" group="vpu" type="vec128"/>
|
||||
<reg name="vr3" bitsize="128" regnum="59" group="vpu" type="vec128"/>
|
||||
<reg name="vr4" bitsize="128" regnum="60" group="vpu" type="vec128"/>
|
||||
<reg name="vr5" bitsize="128" regnum="61" group="vpu" type="vec128"/>
|
||||
<reg name="vr6" bitsize="128" regnum="62" group="vpu" type="vec128"/>
|
||||
<reg name="vr7" bitsize="128" regnum="63" group="vpu" type="vec128"/>
|
||||
<reg name="vr8" bitsize="128" regnum="64" group="vpu" type="vec128"/>
|
||||
<reg name="vr9" bitsize="128" regnum="65" group="vpu" type="vec128"/>
|
||||
<reg name="vr10" bitsize="128" regnum="66" group="vpu" type="vec128"/>
|
||||
<reg name="vr11" bitsize="128" regnum="67" group="vpu" type="vec128"/>
|
||||
<reg name="vr12" bitsize="128" regnum="68" group="vpu" type="vec128"/>
|
||||
<reg name="vr13" bitsize="128" regnum="69" group="vpu" type="vec128"/>
|
||||
<reg name="vr14" bitsize="128" regnum="70" group="vpu" type="vec128"/>
|
||||
<reg name="vr15" bitsize="128" regnum="71" group="vpu" type="vec128"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="ss0" bitsize="32" regnum="95" group="cr"/>
|
||||
<reg name="ss1" bitsize="32" regnum="96" group="cr"/>
|
||||
<reg name="ss2" bitsize="32" regnum="97" group="cr"/>
|
||||
<reg name="ss3" bitsize="32" regnum="98" group="cr"/>
|
||||
<reg name="ss4" bitsize="32" regnum="99" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr14" bitsize="32" regnum="103" group="cr"/>
|
||||
<reg name="cr15" bitsize="32" regnum="104" group="cr"/>
|
||||
<reg name="cr16" bitsize="32" regnum="105" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr19" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="cr20" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="cr21" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="cr22" bitsize="32" regnum="111" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr24" bitsize="32" regnum="113" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr26" bitsize="32" regnum="115" group="cr"/>
|
||||
<reg name="cr27" bitsize="32" regnum="116" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
<reg name="cp1cr20" bitsize="32" regnum="209" group="bank1"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,208 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="hi" bitsize="32" regnum="36"/>
|
||||
<reg name="lo" bitsize="32" regnum="37"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="ss0" bitsize="32" regnum="95" group="cr"/>
|
||||
<reg name="ss1" bitsize="32" regnum="96" group="cr"/>
|
||||
<reg name="ss2" bitsize="32" regnum="97" group="cr"/>
|
||||
<reg name="ss3" bitsize="32" regnum="98" group="cr"/>
|
||||
<reg name="ss4" bitsize="32" regnum="99" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr14" bitsize="32" regnum="103" group="cr"/>
|
||||
<reg name="cr15" bitsize="32" regnum="104" group="cr"/>
|
||||
<reg name="cr16" bitsize="32" regnum="105" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr19" bitsize="32" regnum="108" group="cr"/>
|
||||
<reg name="cr20" bitsize="32" regnum="109" group="cr"/>
|
||||
<reg name="cr21" bitsize="32" regnum="110" group="cr"/>
|
||||
<reg name="cr22" bitsize="32" regnum="111" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr24" bitsize="32" regnum="113" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr26" bitsize="32" regnum="115" group="cr"/>
|
||||
<reg name="cr27" bitsize="32" regnum="116" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature><feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index" start="0" end="9" type="int16"/>
|
||||
<field name="TF" start="30" end="30" type="int8"/>
|
||||
<field name="P" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V" start="1" end="1" type="int8"/>
|
||||
<field name="D" start="2" end="2" type="int8"/>
|
||||
<field name="C" start="3" end="3" type="int8"/>
|
||||
<field name="SEC" start="4" end="4" type="int8"/>
|
||||
<field name="SO" start="5" end="5" type="int8"/>
|
||||
<field name="B" start="6" end="6" type="int8"/>
|
||||
<field name="PFN" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID" start="0" end="7" type="int8"/>
|
||||
<field name="VPN" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE" start="0" end="0" type="int8"/>
|
||||
<field name="PBA" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V" start="1" end="1" type="int8"/>
|
||||
<field name="D" start="2" end="2" type="int8"/>
|
||||
<field name="C" start="3" end="3" type="int8"/>
|
||||
<field name="SEC" start="4" end="4" type="int8"/>
|
||||
<field name="SO" start="5" end="5" type="int8"/>
|
||||
<field name="B" start="6" end="6" type="int8"/>
|
||||
<field name="BA" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,179 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<union id="float64_union">
|
||||
<field name="double64" type="ieee_double"/>
|
||||
<field name="float32" type="ieee_single"/>
|
||||
<field name="uint64" type="uint64"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="64" regnum="40" type="float64_union" group="fpu"/>
|
||||
<reg name="fr1" bitsize="64" regnum="41" type="float64_union" group="fpu"/>
|
||||
<reg name="fr2" bitsize="64" regnum="42" type="float64_union" group="fpu"/>
|
||||
<reg name="fr3" bitsize="64" regnum="43" type="float64_union" group="fpu"/>
|
||||
<reg name="fr4" bitsize="64" regnum="44" type="float64_union" group="fpu"/>
|
||||
<reg name="fr5" bitsize="64" regnum="45" type="float64_union" group="fpu"/>
|
||||
<reg name="fr6" bitsize="64" regnum="46" type="float64_union" group="fpu"/>
|
||||
<reg name="fr7" bitsize="64" regnum="47" type="float64_union" group="fpu"/>
|
||||
<reg name="fr8" bitsize="64" regnum="48" type="float64_union" group="fpu"/>
|
||||
<reg name="fr9" bitsize="64" regnum="49" type="float64_union" group="fpu"/>
|
||||
<reg name="fr10" bitsize="64" regnum="50" type="float64_union" group="fpu"/>
|
||||
<reg name="fr11" bitsize="64" regnum="51" type="float64_union" group="fpu"/>
|
||||
<reg name="fr12" bitsize="64" regnum="52" type="float64_union" group="fpu"/>
|
||||
<reg name="fr13" bitsize="64" regnum="53" type="float64_union" group="fpu"/>
|
||||
<reg name="fr14" bitsize="64" regnum="54" type="float64_union" group="fpu"/>
|
||||
<reg name="fr15" bitsize="64" regnum="55" type="float64_union" group="fpu"/>
|
||||
<reg name="fr16" bitsize="64" regnum="1172" type="float64_union" group="fpu"/>
|
||||
<reg name="fr17" bitsize="64" regnum="1173" type="float64_union" group="fpu"/>
|
||||
<reg name="fr18" bitsize="64" regnum="1174" type="float64_union" group="fpu"/>
|
||||
<reg name="fr19" bitsize="64" regnum="1175" type="float64_union" group="fpu"/>
|
||||
<reg name="fr20" bitsize="64" regnum="1176" type="float64_union" group="fpu"/>
|
||||
<reg name="fr21" bitsize="64" regnum="1177" type="float64_union" group="fpu"/>
|
||||
<reg name="fr22" bitsize="64" regnum="1178" type="float64_union" group="fpu"/>
|
||||
<reg name="fr23" bitsize="64" regnum="1179" type="float64_union" group="fpu"/>
|
||||
<reg name="fr24" bitsize="64" regnum="1180" type="float64_union" group="fpu"/>
|
||||
<reg name="fr25" bitsize="64" regnum="1181" type="float64_union" group="fpu"/>
|
||||
<reg name="fr26" bitsize="64" regnum="1182" type="float64_union" group="fpu"/>
|
||||
<reg name="fr27" bitsize="64" regnum="1183" type="float64_union" group="fpu"/>
|
||||
<reg name="fr28" bitsize="64" regnum="1184" type="float64_union" group="fpu"/>
|
||||
<reg name="fr29" bitsize="64" regnum="1185" type="float64_union" group="fpu"/>
|
||||
<reg name="fr30" bitsize="64" regnum="1186" type="float64_union" group="fpu"/>
|
||||
<reg name="fr31" bitsize="64" regnum="1187" type="float64_union" group="fpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
<reg name="cp1cr20" bitsize="32" regnum="209" group="bank1"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,211 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fpu">
|
||||
<vector id="v4f" type="ieee_single" count="4"/>
|
||||
<vector id="v2d" type="ieee_double" count="2"/>
|
||||
<vector id="v16i8" type="int8" count="16"/>
|
||||
<vector id="v8i16" type="int16" count="8"/>
|
||||
<vector id="v4i32" type="int32" count="4"/>
|
||||
<vector id="v2i64" type="int64" count="2"/>
|
||||
<union id="vec128">
|
||||
<field name="v4_float" type="v4f"/>
|
||||
<field name="v2_double" type="v2d"/>
|
||||
<field name="v16_int8" type="v16i8"/>
|
||||
<field name="v8_int16" type="v8i16"/>
|
||||
<field name="v4_int32" type="v4i32"/>
|
||||
<field name="v2_int64" type="v2i64"/>
|
||||
<field name="uint128" type="uint128"/>
|
||||
</union>
|
||||
<union id="float64_union">
|
||||
<field name="double64" type="ieee_double"/>
|
||||
<field name="float32" type="ieee_single"/>
|
||||
<field name="uint64" type="uint64"/>
|
||||
</union>
|
||||
<!--float register-->
|
||||
<reg name="fr0" bitsize="64" regnum="40" type="float64_union" group="fpu"/>
|
||||
<reg name="fr1" bitsize="64" regnum="41" type="float64_union" group="fpu"/>
|
||||
<reg name="fr2" bitsize="64" regnum="42" type="float64_union" group="fpu"/>
|
||||
<reg name="fr3" bitsize="64" regnum="43" type="float64_union" group="fpu"/>
|
||||
<reg name="fr4" bitsize="64" regnum="44" type="float64_union" group="fpu"/>
|
||||
<reg name="fr5" bitsize="64" regnum="45" type="float64_union" group="fpu"/>
|
||||
<reg name="fr6" bitsize="64" regnum="46" type="float64_union" group="fpu"/>
|
||||
<reg name="fr7" bitsize="64" regnum="47" type="float64_union" group="fpu"/>
|
||||
<reg name="fr8" bitsize="64" regnum="48" type="float64_union" group="fpu"/>
|
||||
<reg name="fr9" bitsize="64" regnum="49" type="float64_union" group="fpu"/>
|
||||
<reg name="fr10" bitsize="64" regnum="50" type="float64_union" group="fpu"/>
|
||||
<reg name="fr11" bitsize="64" regnum="51" type="float64_union" group="fpu"/>
|
||||
<reg name="fr12" bitsize="64" regnum="52" type="float64_union" group="fpu"/>
|
||||
<reg name="fr13" bitsize="64" regnum="53" type="float64_union" group="fpu"/>
|
||||
<reg name="fr14" bitsize="64" regnum="54" type="float64_union" group="fpu"/>
|
||||
<reg name="fr15" bitsize="64" regnum="55" type="float64_union" group="fpu"/>
|
||||
<reg name="fr16" bitsize="64" regnum="1172" type="float64_union" group="fpu"/>
|
||||
<reg name="fr17" bitsize="64" regnum="1173" type="float64_union" group="fpu"/>
|
||||
<reg name="fr18" bitsize="64" regnum="1174" type="float64_union" group="fpu"/>
|
||||
<reg name="fr19" bitsize="64" regnum="1175" type="float64_union" group="fpu"/>
|
||||
<reg name="fr20" bitsize="64" regnum="1176" type="float64_union" group="fpu"/>
|
||||
<reg name="fr21" bitsize="64" regnum="1177" type="float64_union" group="fpu"/>
|
||||
<reg name="fr22" bitsize="64" regnum="1178" type="float64_union" group="fpu"/>
|
||||
<reg name="fr23" bitsize="64" regnum="1179" type="float64_union" group="fpu"/>
|
||||
<reg name="fr24" bitsize="64" regnum="1180" type="float64_union" group="fpu"/>
|
||||
<reg name="fr25" bitsize="64" regnum="1181" type="float64_union" group="fpu"/>
|
||||
<reg name="fr26" bitsize="64" regnum="1182" type="float64_union" group="fpu"/>
|
||||
<reg name="fr27" bitsize="64" regnum="1183" type="float64_union" group="fpu"/>
|
||||
<reg name="fr28" bitsize="64" regnum="1184" type="float64_union" group="fpu"/>
|
||||
<reg name="fr29" bitsize="64" regnum="1185" type="float64_union" group="fpu"/>
|
||||
<reg name="fr30" bitsize="64" regnum="1186" type="float64_union" group="fpu"/>
|
||||
<reg name="fr31" bitsize="64" regnum="1187" type="float64_union" group="fpu"/>
|
||||
<!--vector register-->
|
||||
<reg name="vr0" bitsize="128" regnum="56" type="vec128" group="vpu"/>
|
||||
<reg name="vr1" bitsize="128" regnum="57" type="vec128" group="vpu"/>
|
||||
<reg name="vr2" bitsize="128" regnum="58" type="vec128" group="vpu"/>
|
||||
<reg name="vr3" bitsize="128" regnum="59" type="vec128" group="vpu"/>
|
||||
<reg name="vr4" bitsize="128" regnum="60" type="vec128" group="vpu"/>
|
||||
<reg name="vr5" bitsize="128" regnum="61" type="vec128" group="vpu"/>
|
||||
<reg name="vr6" bitsize="128" regnum="62" type="vec128" group="vpu"/>
|
||||
<reg name="vr7" bitsize="128" regnum="63" type="vec128" group="vpu"/>
|
||||
<reg name="vr8" bitsize="128" regnum="64" type="vec128" group="vpu"/>
|
||||
<reg name="vr9" bitsize="128" regnum="65" type="vec128" group="vpu"/>
|
||||
<reg name="vr10" bitsize="128" regnum="66" type="vec128" group="vpu"/>
|
||||
<reg name="vr11" bitsize="128" regnum="67" type="vec128" group="vpu"/>
|
||||
<reg name="vr12" bitsize="128" regnum="68" type="vec128" group="vpu"/>
|
||||
<reg name="vr13" bitsize="128" regnum="69" type="vec128" group="vpu"/>
|
||||
<reg name="vr14" bitsize="128" regnum="70" type="vec128" group="vpu"/>
|
||||
<reg name="vr15" bitsize="128" regnum="71" type="vec128" group="vpu"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<reg name="fcr" bitsize="32" regnum="121" group="fvcr"/>
|
||||
<reg name="fid" bitsize="32" regnum="122" group="fvcr"/>
|
||||
<reg name="fesr" bitsize="32" regnum="123" group="fvcr"/>
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
<reg name="cp1cr20" bitsize="32" regnum="209" group="bank1"/>
|
||||
</feature>
|
||||
</target>
|
||||
@ -0,0 +1,136 @@
|
||||
<?xml version="1.0"?>
|
||||
<target>
|
||||
<architecture>csky</architecture>
|
||||
<feature name="org.gnu.csky.abiv2.gpr">
|
||||
<reg name="r0" bitsize="32" regnum="0" group="gpr"/>
|
||||
<reg name="r1" bitsize="32" regnum="1" group="gpr"/>
|
||||
<reg name="r2" bitsize="32" regnum="2" group="gpr"/>
|
||||
<reg name="r3" bitsize="32" regnum="3" group="gpr"/>
|
||||
<reg name="r4" bitsize="32" regnum="4" group="gpr"/>
|
||||
<reg name="r5" bitsize="32" regnum="5" group="gpr"/>
|
||||
<reg name="r6" bitsize="32" regnum="6" group="gpr"/>
|
||||
<reg name="r7" bitsize="32" regnum="7" group="gpr"/>
|
||||
<reg name="r8" bitsize="32" regnum="8" group="gpr"/>
|
||||
<reg name="r9" bitsize="32" regnum="9" group="gpr"/>
|
||||
<reg name="r10" bitsize="32" regnum="10" group="gpr"/>
|
||||
<reg name="r11" bitsize="32" regnum="11" group="gpr"/>
|
||||
<reg name="r12" bitsize="32" regnum="12" group="gpr"/>
|
||||
<reg name="r13" bitsize="32" regnum="13" group="gpr"/>
|
||||
<reg name="r14" bitsize="32" regnum="14" group="gpr"/>
|
||||
<reg name="r15" bitsize="32" regnum="15" group="gpr"/>
|
||||
<reg name="r16" bitsize="32" regnum="16" group="gpr"/>
|
||||
<reg name="r17" bitsize="32" regnum="17" group="gpr"/>
|
||||
<reg name="r18" bitsize="32" regnum="18" group="gpr"/>
|
||||
<reg name="r19" bitsize="32" regnum="19" group="gpr"/>
|
||||
<reg name="r20" bitsize="32" regnum="20" group="gpr"/>
|
||||
<reg name="r21" bitsize="32" regnum="21" group="gpr"/>
|
||||
<reg name="r22" bitsize="32" regnum="22" group="gpr"/>
|
||||
<reg name="r23" bitsize="32" regnum="23" group="gpr"/>
|
||||
<reg name="r24" bitsize="32" regnum="24" group="gpr"/>
|
||||
<reg name="r25" bitsize="32" regnum="25" group="gpr"/>
|
||||
<reg name="r26" bitsize="32" regnum="26" group="gpr"/>
|
||||
<reg name="r27" bitsize="32" regnum="27" group="gpr"/>
|
||||
<reg name="r28" bitsize="32" regnum="28" group="gpr"/>
|
||||
<reg name="r29" bitsize="32" regnum="29" group="gpr"/>
|
||||
<reg name="r30" bitsize="32" regnum="30" group="gpr"/>
|
||||
<reg name="r31" bitsize="32" regnum="31" group="gpr"/>
|
||||
<reg name="pc" bitsize="32" regnum="72"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.cr">
|
||||
<flags id="ckcpu_psr" size="4">
|
||||
<field name="C[0]" start="0" end="0" type="int8"/>
|
||||
<field name="AF[1]" start="1" end="1" type="int8"/>
|
||||
<field name="FE[4]" start="4" end="4" type="int8"/>
|
||||
<field name="IE[6]" start="6" end="6" type="int8"/>
|
||||
<field name="IC[7]" start="7" end="7" type="int8"/>
|
||||
<field name="EE[8]" start="8" end="8" type="int8"/>
|
||||
<field name="MM[9]" start="9" end="9" type="int8"/>
|
||||
<field name="TE[12]" start="12" end="12" type="int8"/>
|
||||
<field name="TM[15:14]" start="14" end="15" type="int8"/>
|
||||
<field name="VEC[23:16]" start="16" end="23" type="int8"/>
|
||||
<field name="S[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="psr" bitsize="32" regnum="89" group="cr" type="ckcpu_psr"/>
|
||||
<reg name="vbr" bitsize="32" regnum="90" group="cr"/>
|
||||
<reg name="epsr" bitsize="32" regnum="91" group="cr"/>
|
||||
<reg name="fpsr" bitsize="32" regnum="92" group="cr"/>
|
||||
<reg name="epc" bitsize="32" regnum="93" group="cr"/>
|
||||
<reg name="fpc" bitsize="32" regnum="94" group="cr"/>
|
||||
<reg name="gcr" bitsize="32" regnum="100" group="cr"/>
|
||||
<reg name="gsr" bitsize="32" regnum="101" group="cr"/>
|
||||
<reg name="cr13" bitsize="32" regnum="102" group="cr"/>
|
||||
<reg name="cr17" bitsize="32" regnum="106" group="cr"/>
|
||||
<reg name="cr18" bitsize="32" regnum="107" group="cr"/>
|
||||
<reg name="cr23" bitsize="32" regnum="112" group="cr"/>
|
||||
<reg name="cr25" bitsize="32" regnum="114" group="cr"/>
|
||||
<reg name="cr28" bitsize="32" regnum="117" group="cr"/>
|
||||
<reg name="cr29" bitsize="32" regnum="118" group="cr"/>
|
||||
<reg name="cr30" bitsize="32" regnum="119" group="cr"/>
|
||||
<reg name="cr31" bitsize="32" regnum="120" group="cr"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.fvcr">
|
||||
<!--usp cr_bank1-->
|
||||
<reg name="usp" bitsize="32" regnum="127"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.mmu">
|
||||
<flags id="ckcpu_mir" size="4">
|
||||
<field name="Index[9:0]" start="0" end="9" type="int16"/>
|
||||
<field name="TF[30]" start="30" end="30" type="int8"/>
|
||||
<field name="P[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mel" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="PFN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_meh" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="VPN[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpr" size="4">
|
||||
<field name="PageMask[24:13]" start="13" end="24" type="int16"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mcir" size="4">
|
||||
<field name="ASID[7:0]" start="0" end="7" type="int8"/>
|
||||
<field name="TLBINV_ALL[26]" start="26" end="26" type="int8"/>
|
||||
<field name="TLBINV[27]" start="27" end="27" type="int8"/>
|
||||
<field name="TLBWR[28]" start="28" end="28" type="int8"/>
|
||||
<field name="TLBWI[29]" start="29" end="29" type="int8"/>
|
||||
<field name="TLBR[30]" start="30" end="30" type="int8"/>
|
||||
<field name="TLBP[31]" start="31" end="31" type="int8"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_mpgd" size="4">
|
||||
<field name="HRE[0]" start="0" end="0" type="int8"/>
|
||||
<field name="PBA[31:12]" start="12" end="31" type="int32"/>
|
||||
</flags>
|
||||
<flags id="ckcpu_msa" size="4">
|
||||
<field name="V[1]" start="1" end="1" type="int8"/>
|
||||
<field name="D[2]" start="2" end="2" type="int8"/>
|
||||
<field name="C[3]" start="3" end="3" type="int8"/>
|
||||
<field name="SEC[4]" start="4" end="4" type="int8"/>
|
||||
<field name="SO[5]" start="5" end="5" type="int8"/>
|
||||
<field name="B[6]" start="6" end="6" type="int8"/>
|
||||
<field name="BA[31:29]" start="29" end="31" type="int8"/>
|
||||
</flags>
|
||||
<reg name="mir" bitsize="32" regnum="128" group="mmu" type="ckcpu_mir"/>
|
||||
<reg name="mel0" bitsize="32" regnum="129" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="mel1" bitsize="32" regnum="130" group="mmu" type="ckcpu_mel"/>
|
||||
<reg name="meh" bitsize="32" regnum="131" group="mmu" type="ckcpu_meh"/>
|
||||
<reg name="mpr" bitsize="32" regnum="132" group="mmu" type="ckcpu_mpr"/>
|
||||
<reg name="mcir" bitsize="32" regnum="133" group="mmu" type="ckcpu_mcir"/>
|
||||
<reg name="mpgd" bitsize="32" regnum="134" group="mmu" type="ckcpu_mpgd"/>
|
||||
<reg name="msa0" bitsize="32" regnum="135" group="mmu" type="ckcpu_msa"/>
|
||||
<reg name="msa1" bitsize="32" regnum="136" group="mmu" type="ckcpu_msa"/>
|
||||
</feature>
|
||||
<feature name="org.gnu.csky.abiv2.bank1">
|
||||
<reg name="cp1cr16" bitsize="32" regnum="205" group="bank1"/>
|
||||
<reg name="cp1cr17" bitsize="32" regnum="206" group="bank1"/>
|
||||
<reg name="cp1cr18" bitsize="32" regnum="207" group="bank1"/>
|
||||
<reg name="cp1cr19" bitsize="32" regnum="208" group="bank1"/>
|
||||
<reg name="cp1cr20" bitsize="32" regnum="209" group="bank1"/>
|
||||
</feature>
|
||||
</target>
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user