2021-06-04 17:56:34 +08:00
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/****************************************************************************************
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* @file map.txt
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*
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* @brief This file is the map file (gnuarm or armgcc).
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*
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* Copyright (C) BouffaloLab 2018
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*
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****************************************************************************************
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*/
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/* configure the CPU type */
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OUTPUT_ARCH( "riscv" )
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/* link with the standard c library */
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INPUT(-lc)
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/* link with the standard GCC library */
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INPUT(-lgcc)
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/* configure the entry point */
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ENTRY(_enter)
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StackSize = 0x1000; /* 4KB */
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HeapSize = 0x1000; /* 4KB */
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MEMORY
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{
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xip_memory (rx) : ORIGIN = 0x23000000, LENGTH = 1024K
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itcm_memory (rx) : ORIGIN = 0x22014000, LENGTH = 10K
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dtcm_memory (rx) : ORIGIN = 0x42016800, LENGTH = 10K
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ram_memory (!rx) : ORIGIN = 0x42019000, LENGTH = 20K
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}
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SECTIONS
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{
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PROVIDE(__metal_chicken_bit = 0);
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.text :
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{
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. = ALIGN(4);
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__text_code_start__ = .;
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2021-06-04 17:56:34 +08:00
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KEEP (*(.text.metal.init.enter))
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KEEP (*(SORT_NONE(.init)))
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/* section information for finsh shell */
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. = ALIGN(4);
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_shell_command_start = .;
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KEEP(*(shellCommand))
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_shell_command_end = .;
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/* section information for usb desc */
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. = ALIGN(4);
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_usb_desc_start = .;
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KEEP(*(usb_desc))
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. = ALIGN(4);
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2021-06-21 14:45:33 +08:00
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_usb_desc_end = .;
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2021-06-04 17:56:34 +08:00
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*(.text)
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*(.text.*)
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2021-06-04 17:56:34 +08:00
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/*put .rodata**/
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*(EXCLUDE_FILE( *bl702_glb.o \
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*bl702_pds.o \
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*bl702_common.o \
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*bl702_sf_cfg.o \
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*bl702_sf_ctrl.o \
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*bl702_sflash.o \
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*bl702_xip_sflash.o \
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*bl702_ef_ctrl.o) .rodata*)
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*(.rodata)
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*(.rodata.*)
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*(.srodata)
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*(.srodata.*)
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. = ALIGN(4);
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__text_code_end__ = .;
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} > xip_memory
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. = ALIGN(4);
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__itcm_load_addr = .;
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2021-06-04 17:56:34 +08:00
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.itcm_region : AT (__itcm_load_addr)
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{
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. = ALIGN(4);
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__tcm_code_start__ = .;
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*(.tcm_code)
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*(.tcm_const)
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*(.sclock_rlt_code)
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*(.sclock_rlt_const)
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*bl702_glb.o*(.rodata*)
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*bl702_pds.o*(.rodata*)
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*bl702_common.o*(.rodata*)
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*bl702_sf_cfg.o*(.rodata*)
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*bl702_sf_ctrl.o*(.rodata*)
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*bl702_sflash.o*(.rodata*)
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*bl702_xip_sflash.o*(.rodata*)
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*bl702_ef_ctrl.o*(.rodata*)
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. = ALIGN(4);
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__tcm_code_end__ = .;
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} > itcm_memory
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__dtcm_load_addr = __itcm_load_addr + SIZEOF(.itcm_region);
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.dtcm_region : AT (__dtcm_load_addr)
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{
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. = ALIGN(4);
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__tcm_data_start__ = .;
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*(.tcm_data)
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/* *finger_print.o(.data*) */
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. = ALIGN(4);
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__tcm_data_end__ = .;
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} > dtcm_memory
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/* .heap_dummy section doesn't contains any symbols. It is only
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* used for linker to calculate size of heap sections, and assign
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* values to heap symbols later */
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.heap_dummy (NOLOAD):
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{
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. = ALIGN(0x4);
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. = . + HeapSize;
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. = ALIGN(0x4);
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} > dtcm_memory
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2021-06-21 14:45:33 +08:00
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_HeapBase = ORIGIN(dtcm_memory) + LENGTH(dtcm_memory) - StackSize - HeapSize;
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_HeapSize = HeapSize;
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2021-06-21 14:45:33 +08:00
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2021-06-04 17:56:34 +08:00
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/* Check if data + heap + stack exceeds RAM limit */
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ASSERT(_HeapBase >= __tcm_data_end__, "region RAM overflowed with stack")
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2021-06-04 17:56:34 +08:00
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/*************************************************************************/
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/* .stack_dummy section doesn't contains any symbols. It is only
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* used for linker to calculate size of stack sections, and assign
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* values to stack symbols later */
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.stack_dummy (NOLOAD):
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{
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. = ALIGN(0x4);
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. = . + StackSize;
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. = ALIGN(0x4);
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} > dtcm_memory
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2021-06-04 17:56:34 +08:00
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/* Set stack top to end of RAM, and stack limit move down by
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* size of stack_dummy section */
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__StackTop = ORIGIN(dtcm_memory) + LENGTH(dtcm_memory);
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PROVIDE( __freertos_irq_stack_top = __StackTop);
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__StackLimit = __StackTop - SIZEOF(.stack_dummy);
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2021-06-04 17:56:34 +08:00
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/* Check if data + heap + stack exceeds RAM limit */
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ASSERT(__StackLimit >= __tcm_data_end__, "region RAM overflowed with stack")
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/*************************************************************************/
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2021-06-04 17:56:34 +08:00
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__system_ram_load_addr = __dtcm_load_addr + SIZEOF(.dtcm_region);
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.system_ram_data_region : AT (__system_ram_load_addr)
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{
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. = ALIGN(4);
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__system_ram_data_start__ = .;
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2021-06-04 17:56:34 +08:00
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*(.system_ram)
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. = ALIGN(4);
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__system_ram_data_end__ = .;
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} > ram_memory
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2021-06-04 17:56:34 +08:00
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__ram_load_addr = __system_ram_load_addr + SIZEOF(.system_ram_data_region);
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/* Data section */
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RAM_DATA : AT (__ram_load_addr)
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{
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. = ALIGN(4);
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__ram_data_start__ = .;
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2021-06-04 17:56:34 +08:00
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PROVIDE( __global_pointer$ = . + 0x800 );
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*(.data)
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*(.data.*)
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*(.sdata)
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*(.sdata.*)
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*(.sdata2)
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*(.sdata2.*)
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. = ALIGN(4);
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__ram_data_end__ = .;
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} > ram_memory
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2021-06-04 17:56:34 +08:00
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.bss (NOLOAD) :
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{
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. = ALIGN(4);
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__bss_start__ = .;
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2021-06-04 17:56:34 +08:00
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*(.bss*)
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*(.sbss*)
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*(COMMON)
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2021-06-04 17:56:34 +08:00
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. = ALIGN(4);
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__bss_end__ = .;
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} > ram_memory
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.noinit_data (NOLOAD) :
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{
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. = ALIGN(4);
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__noinit_data_start__ = .;
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2021-06-04 17:56:34 +08:00
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*(.noinit_data*)
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. = ALIGN(4);
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__noinit_data_end__ = .;
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} > ram_memory
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2021-06-21 14:45:33 +08:00
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2021-06-04 17:56:34 +08:00
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.heap (NOLOAD):
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{
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. = ALIGN(4);
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__HeapBase = .;
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2021-06-21 14:45:33 +08:00
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2021-06-04 17:56:34 +08:00
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/*__end__ = .;*/
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/*end = __end__;*/
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KEEP(*(.heap*))
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2021-06-04 17:56:34 +08:00
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. = ALIGN(4);
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__HeapLimit = .;
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} > ram_memory
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__HeapLimit = ORIGIN(ram_memory) + LENGTH(ram_memory);
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2021-06-21 14:45:33 +08:00
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2021-06-04 17:56:34 +08:00
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}
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