2022-10-21 10:17:49 +08:00
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#ifndef _BFLB_I2C_H
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#define _BFLB_I2C_H
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#include "bflb_core.h"
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2022-12-21 20:20:33 +08:00
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/** @addtogroup LHAL
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* @{
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*/
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/** @addtogroup I2C
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* @{
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*/
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2022-10-21 10:17:49 +08:00
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/* Bit definitions for the flags field in struct bflb_i2c_msg_s
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*
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* START/STOP Rules:
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*
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* 1. The lower half I2C driver will always issue the START condition at the
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* beginning of a message unless I2C_M_NOSTART flag is set in the
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* message.
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*
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* 2. The lower half I2C driver will always issue the STOP condition at the
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* end of the messages unless:
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*
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* a. The I2C_M_NOSTOP flag is set in the message, OR
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* b. The following message has the I2C_M_NOSTART flag set (meaning
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* that following message is simply a continuation of the transfer).
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*
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* A proper I2C repeated start would then have I2C_M_NOSTOP set on msg[n]
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* and I2C_M_NOSTART *not* set on msg[n+1]. See the following table:
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*
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* msg[n].flags msg[n+1].flags Behavior
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* ------------ --------------- -----------------------------------------
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* 0 0 Two normal, separate messages with STOP
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* on msg[n] then START on msg[n+1]
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* 0* I2C_M_NOSTART Continuation of the same transfer (must
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* be the same direction). See NOTE below.
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* NO_STOP 0 No STOP on msg[n]; repeated START on
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* msg[n+1].
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*
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* * NOTE: NO_STOP is implied in this case and may or not be explicitly
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* included in the msg[n] flags
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*/
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#define I2C_M_READ 0x0001 /* Read data, from slave to master */
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#define I2C_M_TEN 0x0002 /* Ten bit address */
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#define I2C_M_DMA 0x0004 /* Enable dma mode */
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#define I2C_M_NOSTOP 0x0040 /* Message should not end with a STOP */
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#define I2C_M_NOSTART 0x0080 /* Message should not begin with a START */
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2022-10-29 13:33:23 +08:00
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/** @defgroup I2C_INTSTS i2c interrupt status definition
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* @{
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*/
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#define I2C_INTSTS_END (1 << 0) /* Transfer end interrupt */
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#define I2C_INTSTS_TX_FIFO (1 << 1) /* TX FIFO ready interrupt */
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#define I2C_INTSTS_RX_FIFO (1 << 2) /* RX FIFO ready interrupt */
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#define I2C_INTSTS_NACK (1 << 3) /* NACK interrupt */
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#define I2C_INTSTS_ARB (1 << 4) /* Arbitration lost interrupt */
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#define I2C_INTSTS_FER (1 << 5) /* TX/RX FIFO error interrupt */
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/**
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* @}
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*/
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/** @defgroup I2C_INTCLR i2c interrupt clear definition
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* @{
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*/
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2022-12-21 20:20:33 +08:00
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#define I2C_INTCLR_END (1 << 0) /* Transfer end interrupt */
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#define I2C_INTCLR_NACK (1 << 3) /* NACK interrupt */
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#define I2C_INTCLR_ARB (1 << 4) /* Arbitration lost interrupt */
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2022-10-29 13:33:23 +08:00
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/**
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* @}
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*/
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2022-12-21 20:20:33 +08:00
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/** @defgroup I2C_INTEN i2c interrupt enable definition
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* @{
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*/
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#define I2C_INTEN_END (1 << 0) /* Transfer end interrupt */
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#define I2C_INTEN_TX_FIFO (1 << 1) /* TX FIFO ready interrupt */
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#define I2C_INTEN_RX_FIFO (1 << 2) /* RX FIFO ready interrupt */
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#define I2C_INTEN_NACK (1 << 3) /* NACK interrupt */
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#define I2C_INTEN_ARB (1 << 4) /* Arbitration lost interrupt */
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#define I2C_INTEN_FER (1 << 5) /* TX/RX FIFO error interrupt */
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/**
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* @}
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*/
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2022-10-29 13:33:23 +08:00
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2022-10-21 10:17:49 +08:00
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/**
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* @brief I2C message structure
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*
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* @param addr Slave address (7- or 10-bit)
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* @param flags See I2C_M_* definitions
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* @param buffer Buffer to be transferred
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* @param length Length of the buffer in bytes, should be less than 256.
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*/
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struct bflb_i2c_msg_s {
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uint16_t addr;
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uint16_t flags;
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uint8_t *buffer;
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uint16_t length;
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};
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#ifdef __cplusplus
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extern "C" {
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#endif
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2022-12-21 20:20:33 +08:00
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/**
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* @brief Initialize i2c.
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*
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* @param [in] dev device handle
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* @param [in] frequency i2c frequency, range from 305Hz to 400KHz
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*/
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void bflb_i2c_init(struct bflb_device_s *dev, uint32_t frequency);
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/**
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* @brief Deinitialize i2c.
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*
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* @param [in] dev device handle
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*/
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2022-10-21 10:17:49 +08:00
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void bflb_i2c_deinit(struct bflb_device_s *dev);
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2022-12-21 20:20:33 +08:00
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/**
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* @brief Enable i2c tx dma.
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*
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* @param [in] dev device handle
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* @param [in] enable true means enable, otherwise disable.
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*/
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void bflb_i2c_link_txdma(struct bflb_device_s *dev, bool enable);
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/**
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* @brief Enable i2c rx dma.
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*
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* @param [in] dev device handle
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* @param [in] enable true means enable, otherwise disable.
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*/
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void bflb_i2c_link_rxdma(struct bflb_device_s *dev, bool enable);
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2022-12-21 20:20:33 +08:00
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/**
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* @brief Start transferring i2c message.
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*
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* @param [in] dev device handle
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* @param [in] msgs pointer to i2c message
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* @param [in] count message count
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* @return A negated errno value on failure.
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*/
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2022-10-21 10:17:49 +08:00
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int bflb_i2c_transfer(struct bflb_device_s *dev, struct bflb_i2c_msg_s *msgs, int count);
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2022-12-21 20:20:33 +08:00
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/**
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* @brief Enable or disable i2c interrupt.
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*
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* @param [in] dev device handle
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* @param [in] int_type interrupt type ,use @ref I2C_INTEN
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* @param [in] mask true means disable, false means enable
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*/
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2022-10-29 13:33:23 +08:00
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void bflb_i2c_int_mask(struct bflb_device_s *dev, uint32_t int_type, bool mask);
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2022-12-21 20:20:33 +08:00
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/**
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* @brief Clear i2c interrupt status.
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*
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* @param [in] dev device handle
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* @param [in] int_clear clear value, use @ref I2C_INTCLR
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*/
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void bflb_i2c_int_clear(struct bflb_device_s *dev, uint32_t int_clear);
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/**
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* @brief Get i2c interrupt status.
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*
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* @param [in] dev device handle
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* @return interrupt status value, use @ref I2C_INTSTS
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*/
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uint32_t bflb_i2c_get_intstatus(struct bflb_device_s *dev);
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2022-12-21 20:20:33 +08:00
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/**
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* @brief Control i2c feature.
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*
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* @param [in] dev device handle
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* @param [in] cmd feature command
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* @param [in] arg user data
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* @return A negated errno value on failure.
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*/
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2022-10-29 13:33:23 +08:00
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int bflb_i2c_feature_control(struct bflb_device_s *dev, int cmd, size_t arg);
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#ifdef __cplusplus
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}
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#endif
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2022-12-21 20:20:33 +08:00
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/**
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* @}
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*/
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/**
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* @}
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*/
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2022-10-29 13:33:23 +08:00
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#endif
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