bl_mcu_sdk/tools/openocd/602.svd

<?xml version="1.0" encoding="utf-8"?>
<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_0.xsd" >
  <vendor>bouffalolab</vendor>
  <vendorID>bouffalolab</vendorID>
  <name>602</name>
  <series>WiFi BT</series>
  <version></version>
  <description>high-performance, 32-bit RV32IMAFC core
  </description>

  <addressUnitBits>8</addressUnitBits>
  <width>32</width>
  <size>32</size>
  <resetValue>0x00000000</resetValue>
  <resetMask>0xFFFFFFFF</resetMask>

  <cpu>
    <name>602</name>
    <endian>little</endian>
  </cpu>

  <peripherals>

    <peripheral>
      <name>CLINT</name>
      <description>Core Local Interruptor.</description>
      <baseAddress>0x02000000</baseAddress>
      <groupName>CLINT</groupName>
      <size>32</size>
      <access>read-write</access>

      <addressBlock>
        <offset>0</offset>
        <size>0x10000</size>
        <usage>registers</usage>
      </addressBlock>

      <registers>

        <register>
          <name>MSIP</name>
          <description>Machine Software Interrupt Pending Register.</description>
          <addressOffset>0x0000</addressOffset>
        </register>

        <register>
          <name>MTIMECMP_LO</name>
          <description>Machine Timer Compare Register Low.</description>
          <addressOffset>0x4000</addressOffset>
        </register>

        <register>
          <name>MTIMECMP_HI</name>
          <description>Machine Timer Compare Register High.</description>
          <addressOffset>0x4004</addressOffset>
        </register>

        <register>
          <name>MTIME_LO</name>
          <description>Machine Timer Register Low.</description>
          <addressOffset>0xBFF8</addressOffset>
        </register>

        <register>
          <name>MTIME_HI</name>
          <description>Machine Timer Register High.</description>
          <addressOffset>0xBFFC</addressOffset>
        </register>

      </registers>
    </peripheral> <!-- CLINT -->

    <peripheral>
      <name>CLIC</name>
      <description>Core Local Interrupter controller.</description>
      <baseAddress>0x02800000</baseAddress>
      <groupName>CLIC</groupName>
      <size>8</size>
      <access>read-write</access>

      <addressBlock>
        <offset>0</offset>
        <size>0x10000</size>
        <usage>registers</usage>
      </addressBlock>

      <registers>

        <register>
          <dim>128</dim> <!-- 64 user interrupt sources o 602 -->
          <dimIncrement>1</dimIncrement>
          <name>PENDING[%s]</name>
          <description>CLIC Interrupt Pending Registers.</description>
          <addressOffset>0x0000</addressOffset>
          <fields>
            <field><name>PENDING</name><lsb>0</lsb><msb>0</msb></field>
          </fields>
        </register>

        <register>
          <dim>128</dim> <!-- 64 user interrupt sources o 602 -->
          <dimIncrement>1</dimIncrement>
          <name>ENABLE[%s]</name>
          <description>CLIC Interrupt enable Registers.</description>
          <addressOffset>0x0400</addressOffset>
          <fields>
            <field><name>ENABLE</name><lsb>0</lsb><msb>0</msb></field>
          </fields>
        </register>

        <register>
          <dim>128</dim> <!-- 64 user interrupt sources o 602 -->
          <dimIncrement>1</dimIncrement>
          <name>INTCFG[%s]</name>
          <description>CLIC Interrupt config Registers.</description>
          <addressOffset>0x0800</addressOffset>
          <fields>
            <field><name>INTCFG</name><lsb>3</lsb><msb>7</msb></field>
          </fields>
        </register>

        <register>
          <name>clic_cfg</name>
          <description>clic_cfg.</description>
          <addressOffset>0x0C00</addressOffset>
          <fields>
            <field><name>nvbits</name><lsb>0</lsb><msb>0</msb></field>
            <field><name>nlbits</name><lsb>1</lsb><msb>3</msb></field>
            <field><name>nmbits</name><lsb>4</lsb><msb>5</msb></field>
          </fields>
        </register>

      </registers>
    </peripheral> <!-- CLIC -->

    <peripheral>
      <name>GLB</name>
      <description>GLB.</description>
      <baseAddress>0x40000000</baseAddress>
      <groupName>GLB</groupName>
      <size>32</size>
      <access>read-write</access>

      <addressBlock>
        <offset>0</offset>
        <size>0x1000</size>
        <usage>registers</usage>
      </addressBlock>

      <registers>

        <register>
          <name>clk_cfg0</name>
          <description>clk_cfg0.</description>
          <addressOffset>0x0000</addressOffset>
          <fields>
            <field><name>pll_en</name><lsb>0</lsb><msb>0</msb></field>
            <field><name>fclk_en</name><lsb>1</lsb><msb>1</msb></field>
            <field><name>hclk_en</name><lsb>2</lsb><msb>2</msb></field>
            <field><name>bclk_en</name><lsb>3</lsb><msb>3</msb></field>
            <field><name>pll_set</name><lsb>4</lsb><msb>5</msb></field>
            <field><name>hbn_root_clk_set</name><lsb>6</lsb><msb>7</msb></field>
            <field><name>hclk_div</name><lsb>8</lsb><msb>15</msb></field>
            <field><name>bclk_div</name><lsb>16</lsb><msb>23</msb></field>
            <field><name>fclk_sw_state</name><lsb>24</lsb><msb>26</msb></field>
            <field><name>chip_rdy</name><lsb>27</lsb><msb>27</msb></field>
            <field><name>glb_id</name><lsb>28</lsb><msb>31</msb></field>
          </fields>
        </register>

      </registers>

    </peripheral> <!-- GLB -->

    <peripheral>
      <name>eFuse</name>
      <description>eFuse Programmable Memory.</description>
      <baseAddress>0x40007000</baseAddress>
      <groupName>eFuse</groupName>
      <size>32</size>
      <access>read-only</access>

      <addressBlock>
        <offset>0</offset>
        <size>0x1000</size>
        <usage>registers</usage>
      </addressBlock>

      <registers>

        <register>
          <name>ef_cfg_0</name>
          <description>ef_cfg_0.</description>
          <addressOffset>0x0000</addressOffset>
          <fields>
            <field><name>ef_sboot_en</name><lsb>4</lsb><msb>5</msb></field>
            <field><name>ef_boot_sel</name><lsb>8</lsb><msb>11</msb></field>
            <field><name>ef_cpu0_enc_en</name><lsb>7</lsb><msb>7</msb></field>
            <field><name>ef_cpu1_enc_en</name><lsb>6</lsb><msb>6</msb></field>
            <field><name>ef_sboot_en</name><lsb>4</lsb><msb>5</msb></field>
            <field><name>ef_sboot_sign_mode</name><lsb>2</lsb><msb>3</msb></field>
            <field><name>ef_sf_aes_mode</name><lsb>0</lsb><msb>1</msb></field>
          </fields>
        </register>

        <register>
          <name>ef_wifi_mac_low</name>
          <description>ef_wifi_mac_low.</description>
          <addressOffset>0x0014</addressOffset>
          <fields>
            <field><name>mac_addr1</name><lsb>0</lsb><msb>31</msb></field>
          </fields>
        </register>

        <register>
          <name>ef_wifi_mac_high</name>
          <description>ef_wifi_mac_high.</description>
          <addressOffset>0x0018</addressOffset>
          <fields>
            <field><name>dev_info7</name><lsb>31</lsb><msb>31</msb></field>
            <field><name>dev_info6</name><lsb>30</lsb><msb>30</msb></field>
            <field><name>dev_info5</name><lsb>29</lsb><msb>29</msb></field>
            <field><name>dev_info4_3</name><lsb>27</lsb><msb>28</msb></field>
            <field><name>dev_info2_0</name><lsb>24</lsb><msb>26</msb></field>
            <field><name>cust_id1_0</name><lsb>22</lsb><msb>23</msb></field>
            <field><name>mac_addr1_crc5_0</name><lsb>16</lsb><msb>21</msb></field>
            <field><name>mac_addr1</name><lsb>0</lsb><msb>15</msb></field>
          </fields>
        </register>

      </registers>

    </peripheral> <!-- eFuse -->

  </peripherals>
</device>