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bl_mcu_sdk/drivers/bl702_driver/bl702_ram.ld

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/****************************************************************************************
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* @file bl702_ram.ld
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*
* @brief This file is the map file (gnuarm or armgcc).
*
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* Copyright (C) BouffaloLab 2021
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*
****************************************************************************************
*/
/* configure the CPU type */
OUTPUT_ARCH( "riscv" )
/* link with the standard c library */
/* INPUT(-lc) */
/* link with the standard GCC library */
/* INPUT(-lgcc) */
/* configure the entry point */
ENTRY(_enter)
StackSize = 0x0400; /* 1KB */
MEMORY
{
itcm_memory (rx) : ORIGIN = 0x22010000, LENGTH = 32K
dtcm_memory (rx) : ORIGIN = 0x42018000, LENGTH = 32K
ram_memory (!rx) : ORIGIN = 0x42020000, LENGTH = 48K
hbn_memory (rx) : ORIGIN = 0x40010000, LENGTH = 4K /* hbn ram 4K*/
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}
SECTIONS
{
PROVIDE(__metal_chicken_bit = 0);
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.text :
{
. = ALIGN(4);
__text_code_start__ = .;
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KEEP (*(.text.metal.init.enter))
KEEP (*(SORT_NONE(.init)))
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*(.text)
*(.text.*)
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*(.rodata)
*(.rodata.*)
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*(.srodata)
*(.srodata.*)
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*(.tcm_code.*)
*(.tcm_const.*)
*(.sclock_rlt_code.*)
*(.sclock_rlt_const.*)
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. = ALIGN(4);
__text_code_end__ = .;
} > itcm_memory
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. = ALIGN(4);
__itcm_load_addr = .;
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.itcm_region : AT (__itcm_load_addr)
{
. = ALIGN(4);
__tcm_code_start__ = .;
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. = ALIGN(4);
__tcm_code_end__ = .;
} > itcm_memory
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__hbn_load_addr = __itcm_load_addr + SIZEOF(.itcm_region);
.hbn_ram_region : AT (__hbn_load_addr)
{
. = ALIGN(4);
__hbn_ram_start__ = .;
*(.hbn_ram_code)
*(.hbn_data)
. = ALIGN(4);
__hbn_ram_end__ = .;
} > hbn_memory
__dtcm_load_addr = __hbn_load_addr + SIZEOF(.hbn_ram_region);
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.dtcm_region : AT (__dtcm_load_addr)
{
. = ALIGN(4);
__tcm_data_start__ = .;
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*(.tcm_data)
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. = ALIGN(4);
__tcm_data_end__ = .;
} > dtcm_memory
/*************************************************************************/
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy (NOLOAD):
{
. = ALIGN(0x4);
. = . + StackSize;
. = ALIGN(0x4);
} > dtcm_memory
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/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(dtcm_memory) + LENGTH(dtcm_memory);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
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/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __tcm_data_end__, "region RAM overflowed with stack")
/*************************************************************************/
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__system_ram_load_addr = __dtcm_load_addr + SIZEOF(.dtcm_region);
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.system_ram_data_region : AT (__system_ram_load_addr)
{
. = ALIGN(4);
__system_ram_data_start__ = .;
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*(.system_ram)
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. = ALIGN(4);
__system_ram_data_end__ = .;
} > ram_memory
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__ram_load_addr = __system_ram_load_addr + SIZEOF(.system_ram_data_region);
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/* Data section */
RAM_DATA : AT (__ram_load_addr)
{
. = ALIGN(4);
__ram_data_start__ = .;
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PROVIDE( __global_pointer$ = . + 0x800 );
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*(.data)
*(.data.*)
*(.sdata)
*(.sdata.*)
*(.sdata2)
*(.sdata2.*)
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. = ALIGN(4);
__ram_data_end__ = .;
} > ram_memory
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.bss (NOLOAD) :
{
. = ALIGN(4);
__bss_start__ = .;
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*(.bss*)
*(.sbss*)
*(COMMON)
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. = ALIGN(4);
__bss_end__ = .;
} > ram_memory
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.noinit_data (NOLOAD) :
{
. = ALIGN(4);
__noinit_data_start__ = .;
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*(.noinit_data*)
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. = ALIGN(4);
__noinit_data_end__ = .;
} > ram_memory
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.heap (NOLOAD):
{
. = ALIGN(4);
__HeapBase = .;
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/*__end__ = .;*/
/*end = __end__;*/
KEEP(*(.heap*))
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. = ALIGN(4);
__HeapLimit = .;
} > ram_memory
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PROVIDE (__heap_min_size = 0x400);
__HeapLimit = ORIGIN(ram_memory) + LENGTH(ram_memory);
ASSERT((__HeapLimit - __HeapBase ) >= __heap_min_size, "heap size is too short.")
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}