87 lines
2.6 KiB
C
87 lines
2.6 KiB
C
/*
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FreeRTOS.org V4.2.0 - Copyright (C) 2003-2007 Richard Barry.
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This file is part of the FreeRTOS.org distribution.
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FreeRTOS.org is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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FreeRTOS.org is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FreeRTOS.org; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes FreeRTOS.org, without being obliged to provide
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the source code for any proprietary components. See the licensing section
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of http://www.FreeRTOS.org for full details of how and when the exception
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can be applied.
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***************************************************************************
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See http://www.FreeRTOS.org for documentation, latest information, license
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and contact details. Please ensure to read the configuration and relevant
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port sections of the online documentation.
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***************************************************************************
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*/
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/*
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* startup.c
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* Author Jefferson L Smith, Robotronics Inc.
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*
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* __premain() is the startup code to init hardware and ram to execute the
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* C application.
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*
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*/
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#include <sys/ports.h>
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#include "cpu.h"
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void ATTR_NEAR __premain (void);
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void
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__premain (void)
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{
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// in case special mode enabled, avoid conflict on PORTE
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PEAR |= NECLK;
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// bgnd mode stops COP and RTI clocks
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COPCTL = RSBCK;
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// stops TCNT counter when debugging stops
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TSCR1 |= (1<<5); // TFRZ
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// PLL
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CLKSEL = 0; // disable PLL to configure
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// xtal 16MHz, bus 24MHz
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SYNR = 3 - 1;
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REFDV = 2 - 1;
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while (!(CRGFLG & 0x08)) // wait for PLL LOCK
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cop_optional_reset();
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CLKSEL |= 0x80; // use PLL
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// init switch inputs
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PERH = 0xff; // pullups
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// outputs
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#if PORT_LED==M6811_PORTB //PORTB
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DDRB = 0xff; // init LED
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#elif PORT_LED==M6811_PORTA //PORTA
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DDRA = 0xff;
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#elif PORT_LED==M6811_PTT //PTT
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DDRT = 0xff;
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#elif PORT_LED==M6811_PTM //PTM
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DDRM = 0xff;
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#elif PORT_LED==M6811_PTP //PTP
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DDRP = 0xff;
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#elif PORT_LED==M6811_PTH //PTH
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DDRH = 0xff;
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#endif
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}
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