225 lines
9.3 KiB
C
225 lines
9.3 KiB
C
/*
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FreeRTOS.org V4.0.2 - Copyright (C) 2003-2006 Richard Barry.
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This file is part of the FreeRTOS.org distribution.
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FreeRTOS.org is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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FreeRTOS.org is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FreeRTOS.org; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes FreeRTOS.org, without being obliged to provide
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the source code for any proprietary components. See the licensing section
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of http://www.FreeRTOS.org for full details of how and when the exception
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can be applied.
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***************************************************************************
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See http://www.FreeRTOS.org for documentation, latest information, license
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and contact details. Please ensure to read the configuration and relevant
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port sections of the online documentation.
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***************************************************************************
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*/
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#ifndef PORTMACRO_H
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#define PORTMACRO_H
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/*-----------------------------------------------------------
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* Port specific definitions.
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*
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* The settings in this file configure FreeRTOS correctly for the
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* given hardware and compiler.
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*
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* These settings should not be altered.
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*-----------------------------------------------------------
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*/
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/* Type definitions. */
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE unsigned portLONG
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#define portBASE_TYPE portLONG
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#if( configUSE_16_BIT_TICKS == 1 )
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typedef unsigned portSHORT portTickType;
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#define portMAX_DELAY ( portTickType ) 0xffff
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#else
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typedef unsigned portLONG portTickType;
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#define portMAX_DELAY ( portTickType ) 0xffffffff
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#endif
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/*-----------------------------------------------------------*/
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/* Hardware specifics. */
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 4
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/*-----------------------------------------------------------*/
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/* Task utilities. */
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#define portRESTORE_CONTEXT() \
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{ \
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extern volatile unsigned portLONG ulCriticalNesting; \
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extern volatile void * volatile pxCurrentTCB; \
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\
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__asm{ LDR R1, =pxCurrentTCB };/* Set the LR to the task stack. The location was ... */ \
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__asm{ LDR R0, [R1] }; /* ... stored in pxCurrentTCB. */ \
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__asm{ LDR LR, [R0] }; \
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\
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__asm{ LDR R0, =ulCriticalNesting }; /* The critical nesting depth is the first item on ... */ \
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__asm{ LDMFD LR!, {R1 } } /* ... the stack. Load it into the ulCriticalNesting var. */ \
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__asm{ STR R1, [R0] } \
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\
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__asm{ LDMFD LR!, {R0} }; /* Get the SPSR from the stack. */ \
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__asm{ MSR SPSR_CXSF, R0 }; \
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\
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__asm{ LDMFD LR, {R0-R14}^ }; /* Restore all system mode registers for the task. */ \
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__asm{ NOP }; \
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\
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__asm{ LDR LR, [LR, #+60] }; /* Restore the return address. */ \
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\
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/* And return - correcting the offset in the LR to obtain ... */ \
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__asm{ SUBS PC, LR, #4 }; /* ... the correct address. */ \
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}
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/*----------------------------------------------------------*/
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#define portSAVE_CONTEXT() \
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{ \
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extern volatile unsigned portLONG ulCriticalNesting; \
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extern volatile void * volatile pxCurrentTCB; \
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\
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__asm{ STMDB SP!, {R0} }; /* Store R0 first as we need to use it. */ \
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\
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__asm{ STMDB SP,{SP}^ }; /* Set R0 to point to the task stack pointer. */ \
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__asm{ NOP }; \
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__asm{ SUB SP, SP, #4 }; \
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__asm{ LDMIA SP!,{R0} }; \
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\
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__asm{ STMDB R0!, {LR} }; /* Push the return address onto the stack. */ \
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__asm{ MOV LR, R0 }; /* Now we have saved LR we can use it instead of R0. */ \
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__asm{ LDMIA SP!, {R0} }; /* Pop R0 so we can save it onto the system mode stack. */ \
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\
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__asm{ STMDB LR,{R0-LR}^ }; /* Push all the system mode registers onto the task stack. */ \
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__asm{ NOP }; \
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__asm{ SUB LR, LR, #60 }; \
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\
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__asm{ MRS R0, SPSR }; /* Push the SPSR onto the task stack. */ \
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__asm{ STMDB LR!, {R0} }; \
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\
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__asm{ LDR R0, =ulCriticalNesting }; \
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__asm{ LDR R0, [R0] }; \
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__asm{ STMDB LR!, {R0} }; \
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\
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__asm{ LDR R0, =pxCurrentTCB };/* Store the new top of stack for the task. */ \
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__asm{ LDR R1, [R0] }; \
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__asm{ STR LR, [R1] }; \
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}
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/*-----------------------------------------------------------
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* ISR entry and exit macros. These are only required if a task switch
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* is required from an ISR.
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*----------------------------------------------------------*/
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#define portENTER_SWITCHING_ISR() \
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portSAVE_CONTEXT(); \
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{
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#define portEXIT_SWITCHING_ISR( SwitchRequired ) \
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/* If a switch is required then we just need to call */ \
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/* vTaskSwitchContext() as the context has already been */ \
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/* saved. */ \
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if( SwitchRequired ) \
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{ \
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vTaskSwitchContext(); \
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} \
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} \
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/* Restore the context of which ever task is now the highest */ \
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/* priority that is ready to run. */ \
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portRESTORE_CONTEXT();
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/* Yield the processor - force a context switch. */
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#define portYIELD() __asm{ SWI 0 };
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/*-----------------------------------------------------------*/
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/* Critical section management. */
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/*-----------------------------------------------------------
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* Interrupt control macros.
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*
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* The interrupt management utilities can only be called from ARM mode. When
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* KEIL_THUMB_INTERWORK is defined the utilities are defined as functions in
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* portISR.c to ensure a switch to ARM mode. When KEIL_THUMB_INTERWORK is not
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* defined then the utilities are defined as macros here - as per other ports.
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*----------------------------------------------------------*/
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#ifdef KEIL_THUMB_INTERWORK
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extern void vPortDisableInterruptsFromThumb( void ) __task;
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extern void vPortEnableInterruptsFromThumb( void ) __task;
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#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb()
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#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb()
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#else
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/*-----------------------------------------------------------*/
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#define portDISABLE_INTERRUPTS() \
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__asm{ STMDB SP!, {R0} }; /* Push R0. */ \
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__asm{ MRS R0, CPSR }; /* Get CPSR. */ \
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__asm{ ORR R0, R0, #0xC0 }; /* Disable IRQ, FIQ. */ \
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__asm{ MSR CPSR_CXSF, R0 }; /* Write back modified value. */ \
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__asm{ LDMIA SP!, {R0} } /* Pop R0. */
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#define portENABLE_INTERRUPTS() \
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__asm{ STMDB SP!, {R0} }; /* Push R0. */ \
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__asm{ MRS R0, CPSR }; /* Get CPSR. */ \
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__asm{ BIC R0, R0, #0xC0 }; /* Enable IRQ, FIQ. */ \
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__asm{ MSR CPSR_CXSF, R0 }; /* Write back modified value. */ \
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__asm{ LDMIA SP!, {R0} } /* Pop R0. */
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#endif /* KEIL_THUMB_INTERWORK */
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/*-----------------------------------------------------------
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* Critical section control
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*
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* The code generated by the Keil compiler does not maintain separate
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* stack and frame pointers. The portENTER_CRITICAL macro cannot therefore
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* use the stack as per other ports. Instead a variable is used to keep
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* track of the critical section nesting. This necessitates the use of a
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* function in place of the macro.
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*----------------------------------------------------------*/
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extern void vPortEnterCritical( void );
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extern void vPortExitCritical( void );
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#define portENTER_CRITICAL() vPortEnterCritical();
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#define portEXIT_CRITICAL() vPortExitCritical();
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/*-----------------------------------------------------------*/
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/* Compiler specifics. */
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#define inline
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#define register
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#define portNOP() __asm{ NOP }
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/*-----------------------------------------------------------*/
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/* Task function macros as described on the FreeRTOS.org WEB site. */
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) __task
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
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#endif /* PORTMACRO_H */
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