0a9c978f18
+ Changed the method used to force a context switch within an ISR for the ARM7/9 GCC ports only. The portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros are no longer supported. This is to ensure correct behaviour no matter which GCC version is used, with or without the -fomit-frame-pointer option, and at all optimisation levels. + Corrected the prototype for xQueueGenericSend() within queue.h.
114 lines
3.3 KiB
C
114 lines
3.3 KiB
C
/*
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FreeRTOS.org V4.6.0 - Copyright (C) 2003-2007 Richard Barry.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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FreeRTOS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FreeRTOS; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes FreeRTOS, without being obliged to provide
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the source code for any proprietary components. See the licensing section
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of http://www.FreeRTOS.org for full details of how and when the exception
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can be applied.
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***************************************************************************
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See http://www.FreeRTOS.org for documentation, latest information, license
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and contact details. Please ensure to read the configuration and relevant
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port sections of the online documentation.
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Also see http://www.SafeRTOS.com for an IEC 61508 compliant version along
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with commercial development and support options.
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***************************************************************************
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*/
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EXTERN pxCurrentTCB
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EXTERN ulCriticalNesting
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Context save and restore macro definitions
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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portSAVE_CONTEXT MACRO
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; Push R0 as we are going to use the register.
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STMDB SP!, {R0}
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; Set R0 to point to the task stack pointer.
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STMDB SP, {SP}^
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NOP
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SUB SP, SP, #4
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LDMIA SP!, {R0}
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; Push the return address onto the stack.
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STMDB R0!, {LR}
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; Now we have saved LR we can use it instead of R0.
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MOV LR, R0
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; Pop R0 so we can save it onto the system mode stack.
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LDMIA SP!, {R0}
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; Push all the system mode registers onto the task stack.
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STMDB LR, {R0-LR}^
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NOP
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SUB LR, LR, #60
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; Push the SPSR onto the task stack.
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MRS R0, SPSR
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STMDB LR!, {R0}
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LDR R0, =ulCriticalNesting
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LDR R0, [R0]
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STMDB LR!, {R0}
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; Store the new top of stack for the task.
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LDR R1, =pxCurrentTCB
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LDR R0, [R1]
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STR LR, [R0]
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ENDM
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portRESTORE_CONTEXT MACRO
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; Set the LR to the task stack.
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LDR R1, =pxCurrentTCB
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LDR R0, [R1]
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LDR LR, [R0]
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; The critical nesting depth is the first item on the stack.
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; Load it into the ulCriticalNesting variable.
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LDR R0, =ulCriticalNesting
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LDMFD LR!, {R1}
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STR R1, [R0]
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; Get the SPSR from the stack.
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LDMFD LR!, {R0}
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MSR SPSR_cxsf, R0
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; Restore all system mode registers for the task.
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LDMFD LR, {R0-R14}^
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NOP
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; Restore the return address.
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LDR LR, [LR, #+60]
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; And return - correcting the offset in the LR to obtain the
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; correct address.
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SUBS PC, LR, #4
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ENDM
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