/* FreeRTOS.org V5.4.0 - Copyright (C) 2003-2009 Richard Barry. This file is part of the FreeRTOS.org distribution. FreeRTOS.org is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License (version 2) as published by the Free Software Foundation and modified by the FreeRTOS exception. **NOTE** The exception to the GPL is included to allow you to distribute a combined work that includes FreeRTOS.org without being obliged to provide the source code for any proprietary components. Alternative commercial license and support terms are also available upon request. See the licensing section of http://www.FreeRTOS.org for full details. FreeRTOS.org is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with FreeRTOS.org; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. *************************************************************************** * * * Get the FreeRTOS eBook! See http://www.FreeRTOS.org/Documentation * * * * This is a concise, step by step, 'hands on' guide that describes both * * general multitasking concepts and FreeRTOS specifics. It presents and * * explains numerous examples that are written using the FreeRTOS API. * * Full source code for all the examples is provided in an accompanying * * .zip file. * * * *************************************************************************** 1 tab == 4 spaces! Please ensure to read the configuration and relevant port sections of the online documentation. http://www.FreeRTOS.org - Documentation, latest information, license and contact details. http://www.SafeRTOS.com - A version that is certified for use in safety critical systems. http://www.OpenRTOS.com - Commercial support, development, porting, licensing and training services. */ /* Standard includes. */ #include /* Scheduler includes. */ #include "FreeRTOS.h" #include "task.h" /* Constants required to setup the initial task context. */ #define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */ #define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 ) #define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 ) #define portNO_CRITICAL_SECTION_NESTING ( ( portSTACK_TYPE ) 0 ) /* Constants required to setup the tick ISR. */ #define portENABLE_TIMER ( ( unsigned portCHAR ) 0x01 ) #define portPRESCALE_VALUE 0x00 #define portINTERRUPT_ON_MATCH ( ( unsigned portLONG ) 0x01 ) #define portRESET_COUNT_ON_MATCH ( ( unsigned portLONG ) 0x02 ) /* Constants required to setup the VIC for the tick ISR. */ #define portTIMER_VIC_CHANNEL ( ( unsigned portLONG ) 0x0004 ) #define portTIMER_VIC_CHANNEL_BIT ( ( unsigned portLONG ) 0x0010 ) #define portTIMER_VIC_ENABLE ( ( unsigned portLONG ) 0x0020 ) /* Constants required to handle interrupts. */ #define portTIMER_MATCH_ISR_BIT ( ( unsigned portCHAR ) 0x01 ) #define portCLEAR_VIC_INTERRUPT ( ( unsigned portLONG ) 0 ) /*-----------------------------------------------------------*/ /* The code generated by the Keil compiler does not maintain separate stack and frame pointers. The portENTER_CRITICAL macro cannot therefore use the stack as per other ports. Instead a variable is used to keep track of the critical section nesting. This variable has to be stored as part of the task context and must be initialised to a non zero value. */ #define portNO_CRITICAL_NESTING ( ( unsigned portLONG ) 0 ) volatile unsigned portLONG ulCriticalNesting = 9999UL; /*-----------------------------------------------------------*/ /* Setup the timer to generate the tick interrupts. */ static void prvSetupTimerInterrupt( void ); /* * The scheduler can only be started from ARM mode, so * vPortStartFirstSTask() is defined in portISR.c. */ extern __asm void vPortStartFirstTask( void ); /*-----------------------------------------------------------*/ /* * See header file for description. */ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) { portSTACK_TYPE *pxOriginalTOS; /* Setup the initial stack of the task. The stack is set exactly as expected by the portRESTORE_CONTEXT() macro. Remember where the top of the (simulated) stack is before we place anything on it. */ pxOriginalTOS = pxTopOfStack; /* First on the stack is the return address - which in this case is the start of the task. The offset is added to make the return address appear as it would within an IRQ ISR. */ *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */ pxTopOfStack--; *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */ pxTopOfStack--; /* The last thing onto the stack is the status register, which is set for system mode, with interrupts enabled. */ *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR; #ifdef KEIL_THUMB_INTERWORK { /* We want the task to start in thumb mode. */ *pxTopOfStack |= portTHUMB_MODE_BIT; } #endif pxTopOfStack--; /* The code generated by the Keil compiler does not maintain separate stack and frame pointers. The portENTER_CRITICAL macro cannot therefore use the stack as per other ports. Instead a variable is used to keep track of the critical section nesting. This variable has to be stored as part of the task context and is initially set to zero. */ *pxTopOfStack = portNO_CRITICAL_SECTION_NESTING; return pxTopOfStack; } /*-----------------------------------------------------------*/ portBASE_TYPE xPortStartScheduler( void ) { /* Start the timer that generates the tick ISR. */ prvSetupTimerInterrupt(); /* Start the first task. This is done from portISR.c as ARM mode must be used. */ vPortStartFirstTask(); /* Should not get here! */ return 0; } /*-----------------------------------------------------------*/ void vPortEndScheduler( void ) { /* It is unlikely that the ARM port will require this function as there is nothing to return to. If this is required - stop the tick ISR then return back to main. */ } /*-----------------------------------------------------------*/ #if configUSE_PREEMPTION == 0 /* * The cooperative scheduler requires a normal IRQ service routine to * simply increment the system tick. */ void vNonPreemptiveTick( void ) __irq; void vNonPreemptiveTick( void ) __irq { /* Increment the tick count - this may make a delaying task ready to run - but a context switch is not performed. */ vTaskIncrementTick(); T0IR = portTIMER_MATCH_ISR_BIT; /* Clear the timer event */ VICVectAddr = portCLEAR_VIC_INTERRUPT; /* Acknowledge the Interrupt */ } #else /* ************************************************************************** * The preemptive scheduler ISR is written in assembler and can be found * in the portASM.s file. This will only get used if portUSE_PREEMPTION * is set to 1 in portmacro.h ************************************************************************** */ void vPreemptiveTick( void ); #endif /*-----------------------------------------------------------*/ static void prvSetupTimerInterrupt( void ) { unsigned portLONG ulCompareMatch; /* A 1ms tick does not require the use of the timer prescale. This is defaulted to zero but can be used if necessary. */ T0PR = portPRESCALE_VALUE; /* Calculate the match value required for our wanted tick rate. */ ulCompareMatch = configCPU_CLOCK_HZ / configTICK_RATE_HZ; /* Protect against divide by zero. Using an if() statement still results in a warning - hence the #if. */ #if portPRESCALE_VALUE != 0 { ulCompareMatch /= ( portPRESCALE_VALUE + 1 ); } #endif T0MR0 = ulCompareMatch; /* Generate tick with timer 0 compare match. */ T0MCR = portRESET_COUNT_ON_MATCH | portINTERRUPT_ON_MATCH; /* Setup the VIC for the timer. */ VICIntSelect &= ~( portTIMER_VIC_CHANNEL_BIT ); VICIntEnable |= portTIMER_VIC_CHANNEL_BIT; /* The ISR installed depends on whether the preemptive or cooperative scheduler is being used. */ #if configUSE_PREEMPTION == 1 { VICVectAddr0 = ( unsigned portLONG ) vPreemptiveTick; } #else { VICVectAddr0 = ( unsigned portLONG ) vNonPreemptiveTick; } #endif VICVectCntl0 = portTIMER_VIC_CHANNEL | portTIMER_VIC_ENABLE; /* Start the timer - interrupts are disabled when this function is called so it is okay to do this here. */ T0TCR = portENABLE_TIMER; } /*-----------------------------------------------------------*/ void vPortEnterCritical( void ) { /* Disable interrupts as per portDISABLE_INTERRUPTS(); */ __disable_irq(); /* Now interrupts are disabled ulCriticalNesting can be accessed directly. Increment ulCriticalNesting to keep a count of how many times portENTER_CRITICAL() has been called. */ ulCriticalNesting++; } /*-----------------------------------------------------------*/ void vPortExitCritical( void ) { if( ulCriticalNesting > portNO_CRITICAL_NESTING ) { /* Decrement the nesting count as we are leaving a critical section. */ ulCriticalNesting--; /* If the nesting level has reached zero then interrupts should be re-enabled. */ if( ulCriticalNesting == portNO_CRITICAL_NESTING ) { /* Enable interrupts as per portEXIT_CRITICAL(). */ __enable_irq(); } } } /*-----------------------------------------------------------*/