Commit Graph

32 Commits

Author SHA1 Message Date
Gaurav Aggarwal
ea9c26f524 Use highest numbered MPU regions for kernel
ARMv7-M allows overlapping MPU regions. When 2 MPU regions overlap, the
MPU configuration of the higher numbered MPU region is applied. For
example, if a memory area is covered by 2 MPU regions 0 and 1, the
memory permissions for MPU region 1 are applied.

We use 5 MPU regions for kernel code and kernel data protections and
leave the remaining for the application writer. We were using lowest
numbered MPU regions (0-4) for kernel protections and leaving the
remaining for the application writer. The application writer could
configure those higher numbered MPU regions to override kernel
protections.

This commit changes the code to use highest numbered MPU regions for
kernel protections and leave the remaining for the application writer.
This ensures that the application writer cannot override kernel
protections.

We thank the SecLab team at Northeastern University for reporting this
issue.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-09-17 00:03:08 +05:30
Paul Bartell
2dfdfc4ba4
Add Cortex M7 r0p1 Errata 837070 workaround to CM4_MPU ports (#513)
* Clarify Cortex M7 r0p1 errata number in r0p1 specific port.

* Add ARM Cortex M7 r0p0 / r0p1 Errata 837070 workaround to CM4 MPU ports.

Optionally, enable the errata workaround by defining configTARGET_ARM_CM7_r0p0 or configTARGET_ARM_CM7_r0p1 in FreeRTOSConfig.h.

* Add r0p1 errata support to IAR port as well

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Change macro name to configENABLE_ERRATA_837070_WORKAROUND

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-06-30 10:35:26 +05:30
Gaurav Aggarwal
44fc137428 Add option to disable unprivileged critical sections
This commit introduces a new config
configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS which enables developers to
prevent critical sections from unprivileged tasks. It defaults to 1 for
backward compatibility. Application should set it to 0 to disable
critical sections from unprivileged tasks.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-11-15 15:09:12 -08:00
Gaurav Aggarwal
7a3848753b Change xPortRaisePrivilege and vPortResetPrivilege to macros
This prevents non-kernel code from calling these functions.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-11-15 15:09:12 -08:00
swaldhoer
a030d0a02b
fix typo (#399) 2021-10-06 15:32:07 -07:00
Paul Bartell
eec42331b4 Normalize files with mixed line endings (introduced in commit 3a413d1) 2021-06-01 17:55:18 -07:00
Paul Bartell
3a413d1022 Add SPDX-License-Identifier: MIT to MIT licensed files. 2021-05-27 19:57:55 -07:00
Paul Bartell
adfc53368f Update copyright year from 2020 to 2021 2021-05-27 19:57:55 -07:00
Paul Bartell
08dc6f64ee Change kernel revision in each file header from V10.4.3 to <DEVELOPMENT BRANCH> 2021-05-27 19:57:55 -07:00
j4cbo
f37bcd5c14
Wrap macros in do { ... } while( 0 ) (#240) 2021-05-24 14:41:58 -07:00
carlo-dev-git
75e0c36eb4
Code cleanup (#288)
* Update port.c

* Code cleanup

Misc coding style cleanup and typo fixes

* Fix ASM style

Fix ASM style

* Fix header check

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Carl Lundin <53273776+lundinc2@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2021-04-07 14:19:31 -07:00
Cobus van Eeden
ec62f69dab [AUTO][RELEASE]: Bump file header version to "10.4.3" 2020-12-14 10:13:39 -08:00
David Chalco
337bca615e [AUTO][RELEASE]: Bump file header version to "10.4.2" 2020-11-10 14:42:58 -08:00
David Chalco
3604527e3b
Update version number to 10.4.1 (#173) 2020-09-17 15:25:15 -07:00
NoMaY (a user of Japan.RenesasRulz.com)
242808132c
Fix broken #warning message in ARM_CMx_MPU/portmacro.h between 10.3.1 and 10.4.0 (#171) 2020-09-15 01:55:55 -07:00
David Chalco
5dfab0306b
Update version number to 10.4.0 (#153) 2020-09-10 19:49:34 -07:00
alfred gedeon
0afc048cf2
Style: Add uncrustify guards, fix asm (#136)
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-24 15:32:02 -07:00
alfred gedeon
a038146915
Style: Make freertos.org = FreeRTOS.org and add https (#134)
* Style: make freertos.org = FreeRTOS.org also add https

* Style: Fix freertos into FreeRTOS

* Style: Fix freertos into FreeRTOS

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-21 11:30:39 -07:00
alfred gedeon
0b0a2060c0
Style: Change FreeRTOS websites in comments (#131)
* Style: Change FreeRTOS websites in comments

* Style: Change freertos to FreeRTOS in comments

* Style: Remove broken link

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-20 14:59:28 -07:00
alfred gedeon
8c77117c32
Style: Remove tabs and tab == 4 spaces (#120)
* Style: Remove tabls and tab == 4 spaces

* Style: remove xx accidentally left

* Style: revert uncrustify for untested portable directories

* Style: revert more uncrustify files

* Style: Revert more uncrustified files

* Style: Revert some uncrutified files

* Style: change more files

* Style: remove t tab == 4 spaces

* Style: remove tabs = spaces

* Style: revert changed files

* Style: redo the stuyles

* Style: add uncrustify disable parsing for asm

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-17 14:50:56 -07:00
alfred gedeon
86653e2a1f
Style: Revert uncrustify for portable directories (#122)
* Style: revert uncrustify portable directories

* Style: Uncrustify Some Portable files

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-17 10:51:02 -07:00
Gaurav-Aggarwal-AWS
287361091b
Allow application to override TEX,S,C and B bits for Flash and RAM (#113)
The TEX,  Shareable (S), Cacheable (C) and Bufferable (B) bits define
the memory type, and where necessary the cacheable and shareable
properties of the memory region.

The default values for these bits, as configured in our MPU ports, are
sometimes not suitable for application. One such example is when the MCU
has a cache, the application writer may not want to mark the memory as
shareable to avoid disabling the cache. This change allows the
application writer to override default vales for TEX, S C and B bits for
Flash and RAM in their FreeRTOSConfig.h. The following two new
configurations are introduced:

- configTEX_S_C_B_FLASH
- configTEX_S_C_B_SRAM

If undefined, the default values for the above configurations are
TEX=000, S=1, C=1, B=1. This ensures backward compatibility.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-08-08 18:37:14 -07:00
Gaurav-Aggarwal-AWS
7dd6b76011
Add support for 16 MPU regions to Cortex-M4 MPU ports (#96)
ARMv7-M supports 8 or 16 MPU regions. FreeRTOS Cortex-M4 MPU ports so
far assumed 8 regions. This change adds support for 16 MPU regions. The
hardware with 16 MPU regions must define configTOTAL_MPU_REGIONS to 16
in their FreeRTOSConfig.h.

If left undefined, it defaults to 8 for backward compatibility.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-24 07:47:41 -07:00
Gaurav-Aggarwal-AWS
149f06c70f
Update incorrect port in comments (#87)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-15 19:44:57 -07:00
Gaurav-Aggarwal-AWS
a717d9c62b
Update portNVIC_SYSPRI2_REG to portNVIC_SHPR3_REG (#86)
The reason for the change is that the register is called System Handler
Priority Register 3 (SHPR3).

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-15 19:44:45 -07:00
Alfred Gedeon
587a83d647 Style: uncrustify kernel files 2020-07-08 10:24:06 -07:00
Alfred Gedeon
2c530ba5c3 Style: uncrustify 2020-07-08 10:24:06 -07:00
Alfred Gedeon
718178c68a Style: uncrusitfy 2020-07-08 10:24:06 -07:00
Alfred Gedeon
a5dbc2b1de Style: uncrustify kernel files 2020-07-08 10:24:06 -07:00
Gaurav-Aggarwal-AWS
334de5d8ab
Enable ARMv7-M MPU ports to place FreeRTOS kernel code outside of flash (#46)
Problem Description
-------------------
The current flash organization in ARMv7-M MPU ports looks as follows:

__FLASH_segment_start__ ------->+-----------+<----- __FLASH_segment_start__
                                |  Vector   |
                                |   Table   |
                                |     +     |
                                |   Kernel  |
                                |    Code   |
                                +-----------+<-----  __privileged_functions_end__
                                |           |
                                |           |
                                |           |
                                |   Other   |
                                |   Code    |
                                |           |
                                |           |
                                |           |
   __FLASH_segment_end__ ------>+-----------+

The FreeRTOS kernel sets up the following MPU regions:

* Unprivileged Code - __FLASH_segment_start__ to __FLASH_segment_end__.
* Privileged Code - __FLASH_segment_start__ to __privileged_functions_end__.

The above setup assumes that the FreeRTOS kernel code
(i.e. privileged_functions) is placed at the beginning of the flash and,
therefore, uses __FLASH_segment_start__ as the starting location of the
privileged code. This prevents a user from placing the FreeRTOS kernel
code outside of flash (say to an external RAM) and still have vector
table at the beginning of flash (which is many times a hardware
requirement).

Solution
--------
This commit addresses the above limitation by using a new variable
__privileged_functions_start__ as the starting location of the
privileged code. This enables users to place the FreeRTOS kernel code
wherever they choose.

The FreeRTOS kernel now sets up the following MPU regions:

* Unprivileged Code - __FLASH_segment_start__ to __FLASH_segment_end__.
* Privileged Code - __privileged_functions_start__ to __privileged_functions_end__.

As a result, a user can now place the kernel code to an external RAM. A
possible organization is:

                                 Flash              External RAM
                              +------------+        +-----------+<------ __privileged_functions_start__
                              |   Vector   |        |           |
                              |   Table    |        |           |
                              |            |        |           |
__FLASH_segment_start__ ----->+------------+        |   Kernel  |
                              |            |        |    Code   |
                              |            |        |           |
                              |            |        |           |
                              |            |        |           |
                              |   Other    |        |           |
                              |    Code    |        +-----------+<------ __privileged_functions_end__
                              |            |
                              |            |
                              |            |
  __FLASH_segment_end__ ----->+------------+

Note that the above configuration places the vector table in an unmapped
region. This is okay because we enable the background region, and so the
vector table will still be accessible to the privileged code and not
accessible to the unprivileged code (vector table is only needed by the
privileged code).

Backward Compatibility
----------------------
The FreeRTOS kernel code now uses a new variable, namely
__privileged_functions_start__, which needs to be exported from linker
script to indicate the starting location of the privileged code. All of
our existing demos already export this variable and therefore, they will
continue to work.

If a user has created a project which does not export this variable,
they will get a linker error for unresolved symbol
__privileged_functions_start__. They need to export a variable
__privileged_functions_start__ with the value equal to
__FLASH_segment_start__.

Issue
-----
https://sourceforge.net/p/freertos/feature-requests/56/

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-04-06 15:51:40 -07:00
Yuhui.Zheng
88e32327e9
version bump to v10.3.1 (#16)
* Verion bump from 10.3.0 to 10.3.1.
* version bump in task.h
* change history for 10.3.1.
2020-02-18 22:03:54 -08:00
Yuhui Zheng
210b1ffcc8 Re-sync with upstream and stripping away none kernel related. 2020-02-10 13:45:57 -08:00