Commit Graph

53 Commits

Author SHA1 Message Date
Gaurav-Aggarwal-AWS
40c37bd3ab
Add configSYSTICK_CLOCK_HZ to Cortex-M0 ports (#484)
This is needed to support the case when SysTick timer is not clocked
from the same source as CPU. This support already exists in other
Cortex-M ports.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-04-08 11:13:11 -07:00
Felipe Torrezan
4539e1c574
Migrated RL78/IAR port to EWRL78v3+ (#461)
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2022-02-24 10:04:46 -07:00
Gaurav-Aggarwal-AWS
cf248aec2d
Add support for 16 MPU regions to GCC Cortex-M33 ports (#448)
* Add support for 16 MPU regions to GCC Cortex-M33 TZ port

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Add support for 16 MPU regions to Cortex-M33 NTZ GCC port

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-02-07 16:51:19 -08:00
Gaurav Aggarwal
44fc137428 Add option to disable unprivileged critical sections
This commit introduces a new config
configALLOW_UNPRIVILEGED_CRITICAL_SECTIONS which enables developers to
prevent critical sections from unprivileged tasks. It defaults to 1 for
backward compatibility. Application should set it to 0 to disable
critical sections from unprivileged tasks.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-11-15 15:09:12 -08:00
Gaurav Aggarwal
7a3848753b Change xPortRaisePrivilege and vPortResetPrivilege to macros
This prevents non-kernel code from calling these functions.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-11-15 15:09:12 -08:00
swaldhoer
a030d0a02b
fix typo (#399) 2021-10-06 15:32:07 -07:00
Gaurav Aggarwal
99a5a5fe82 Fix free secure context for Cortex-M23 ports
Update the branching condition to correctly free secure context when
there is one.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-10 16:44:36 -07:00
Gaurav Aggarwal
06ea7275b3 Implement secure stack sealing as per ARM's recommendation
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-10 16:44:36 -07:00
Gaurav Aggarwal
61f7560243 Associate secure context with task handle
The secure side context management code now checks that the secure
context being saved or restored belongs to the task being switched-out
or switched-in respectively.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-10 16:44:36 -07:00
Gaurav Aggarwal
ccaa0f4d6e Pre-allocate secure-side context structures
This commit improves ARMv8-M security by pre-allocating secure-side task
context structures and changing how tasks reference a secure-side
context structure when calling a secure function. The new configuration
constant secureconfigMAX_SECURE_CONTEXTS sets the number of secure
context structures to pre-allocate. secureconfigMAX_SECURE_CONTEXTS
defaults to 8 if left undefined.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2021-09-10 16:44:36 -07:00
Kristine Jassmann
b5a9229563
Warning fixes. (#356)
* Use cast to fix warnings.

* Remove all empty definitions of portCLEAN_UP_TCB( pxTCB ) and
  portALLOCATE_SECURE_CONTEXT( ulSecureStackSize ) from ports.
  When these are undefined, the default empty definition is defined
  in FreeRTOS.h.
2021-07-20 12:55:49 -07:00
Paul Bartell
eec42331b4 Normalize files with mixed line endings (introduced in commit 3a413d1) 2021-06-01 17:55:18 -07:00
Paul Bartell
3a413d1022 Add SPDX-License-Identifier: MIT to MIT licensed files. 2021-05-27 19:57:55 -07:00
Paul Bartell
b286f173e8 Update license text for ports that were previously missed. 2021-05-27 19:57:55 -07:00
Paul Bartell
e31dccae80 Remove "1 tab == 4 spaces!" line from files that still contain it. 2021-05-27 19:57:55 -07:00
Paul Bartell
adfc53368f Update copyright year from 2020 to 2021 2021-05-27 19:57:55 -07:00
Paul Bartell
08dc6f64ee Change kernel revision in each file header from V10.4.3 to <DEVELOPMENT BRANCH> 2021-05-27 19:57:55 -07:00
j4cbo
f37bcd5c14
Wrap macros in do { ... } while( 0 ) (#240) 2021-05-24 14:41:58 -07:00
Cobus van Eeden
ec62f69dab [AUTO][RELEASE]: Bump file header version to "10.4.3" 2020-12-14 10:13:39 -08:00
David Chalco
337bca615e [AUTO][RELEASE]: Bump file header version to "10.4.2" 2020-11-10 14:42:58 -08:00
Gaurav-Aggarwal-AWS
ebbe2cf854
Ensure interrupts are enabled at first task start (#214)
Critical sections in FreeRTOS are implemented using the following two
functions:

void vPortEnterCritical( void )
{
    portDISABLE_INTERRUPTS();
    uxCriticalNesting++;
}

void vPortExitCritical( void )
{
    uxCriticalNesting--;

    if( uxCriticalNesting == 0 )
    {
        portENABLE_INTERRUPTS();
    }
}

uxCriticalNesting is initialized to a large value at the start and set
to zero when the scheduler is started (xPortStartScheduler). As a
result, before the scheduler is started, a pair of enter/exit critical
section will leave the interrupts disabled because uxCriticalNesting
will not reach zero in the vPortExitCritical function. This is done to
ensure that the interrupts remain disabled from the time first FreeRTOS
API is called to the time when the scheduler is started. The scheduler
starting code is expected to enure that interrupts are enabled before
the first task starts executing.

Cortex-M33 ports were not enabling interrupts before starting the first
task and as a result, the first task was started with interrupts
disabled. This PR fixes the issue by ensuring that interrupts are
enabled before the first task is started.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-11-05 09:26:56 -08:00
filipgeorge
1431b65110
porthardware.h file update for AVR Mega0 and Dx (#212)
* Added guard for ioavr.h include in AVR Dx porthardware.h file.
* Added guard for ioavr.h include in AVR Mega0 porthardware.h file.
2020-10-27 12:26:52 -07:00
NoMaY (a user of Japan.RenesasRulz.com)
c3117b4237
Maintenance: Add readme.txt in each Renesas RX folder to show recommended port (#152)
* Maintenance: Add readme.txt in each Renesas RX folder to show recomended port
* Update readme.txt in each Renesas RX folder regarding to Notes *1 and *2 (both are RX100 port)
2020-09-28 00:09:49 -07:00
alfred gedeon
d428209d01
Fix some broken/redirected URL (#172)
* Style: fix some broken/redirect links

* Fix: atmel url

* Fix microchip typo

* Fix url links

* Fix shortcut link

* Comment: fix line wrapping

* Style: fix line wrapping to 80 chars

* Add now microchip beside Atmel

* Fix link in History

* Add Now Microchip before Atmel link

* Comment: add *
2020-09-21 15:49:55 -07:00
Cobus van Eeden
385e700953
Update History.txt and fix versioning in asm files (#177) 2020-09-18 08:05:13 -07:00
David Chalco
3604527e3b
Update version number to 10.4.1 (#173) 2020-09-17 15:25:15 -07:00
NoMaY (a user of Japan.RenesasRulz.com)
242808132c
Fix broken #warning message in ARM_CMx_MPU/portmacro.h between 10.3.1 and 10.4.0 (#171) 2020-09-15 01:55:55 -07:00
RichardBarry
85768bb3e0
Sets the version number to 10.4.0 in assembly files. The (#166)
assembly files were missed when the other source files had
their version numbers updated.
2020-09-14 09:49:46 -07:00
David Chalco
5dfab0306b
Update version number to 10.4.0 (#153) 2020-09-10 19:49:34 -07:00
alfred gedeon
a038146915
Style: Make freertos.org = FreeRTOS.org and add https (#134)
* Style: make freertos.org = FreeRTOS.org also add https

* Style: Fix freertos into FreeRTOS

* Style: Fix freertos into FreeRTOS

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-21 11:30:39 -07:00
alfred gedeon
0b0a2060c0
Style: Change FreeRTOS websites in comments (#131)
* Style: Change FreeRTOS websites in comments

* Style: Change freertos to FreeRTOS in comments

* Style: Remove broken link

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-20 14:59:28 -07:00
Joseph Julicher
386d854e0b
added a warning concerning the incomplete testing of the RX700v3_DFPU port (#124) 2020-08-17 15:33:10 -07:00
alfred gedeon
8c77117c32
Style: Remove tabs and tab == 4 spaces (#120)
* Style: Remove tabls and tab == 4 spaces

* Style: remove xx accidentally left

* Style: revert uncrustify for untested portable directories

* Style: revert more uncrustify files

* Style: Revert more uncrustified files

* Style: Revert some uncrutified files

* Style: change more files

* Style: remove t tab == 4 spaces

* Style: remove tabs = spaces

* Style: revert changed files

* Style: redo the stuyles

* Style: add uncrustify disable parsing for asm

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-17 14:50:56 -07:00
alfred gedeon
86653e2a1f
Style: Revert uncrustify for portable directories (#122)
* Style: revert uncrustify portable directories

* Style: Uncrustify Some Portable files

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-17 10:51:02 -07:00
NoMaY (a user of Japan.RenesasRulz.com)
a6da1cd0ce
Add Renesas RXv3 port layer supporting RXv3's double precision FPU (#104) 2020-08-14 11:16:48 -07:00
Gaurav-Aggarwal-AWS
287361091b
Allow application to override TEX,S,C and B bits for Flash and RAM (#113)
The TEX,  Shareable (S), Cacheable (C) and Bufferable (B) bits define
the memory type, and where necessary the cacheable and shareable
properties of the memory region.

The default values for these bits, as configured in our MPU ports, are
sometimes not suitable for application. One such example is when the MCU
has a cache, the application writer may not want to mark the memory as
shareable to avoid disabling the cache. This change allows the
application writer to override default vales for TEX, S C and B bits for
Flash and RAM in their FreeRTOSConfig.h. The following two new
configurations are introduced:

- configTEX_S_C_B_FLASH
- configTEX_S_C_B_SRAM

If undefined, the default values for the above configurations are
TEX=000, S=1, C=1, B=1. This ensures backward compatibility.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-08-08 18:37:14 -07:00
m17336
a2e00f0c6b
Update to AVR_Mega0 and AVR_Dx GCC ports + addition of their IAR equivalents (#106)
* Removed TICK_stop() macro from portable/GCC/{AVR_AVRDx, AVR_Mega0}/porthardware.h because it is not used anywhere.

* Updated indentation in portable/GCC/{AVR_AVRDx, AVR_Mega0}/* files.

* Added portable/IAR/{AVR_AVRDx, AVR_Mega0 folders.
2020-08-06 16:24:05 -07:00
DavidJurajdaNXP
bda9869271
IAR Embedded Workbench modified behaviour of weak declaration "#pragma weak" in release 8.50.5. (#83)
This modification result in build error in case of FreeRTOS CM0 port.
To fix the issue use __weak in function definition instead.
2020-07-30 21:00:10 -07:00
Gaurav-Aggarwal-AWS
676d99e302
Use configSYSTICK_CLOCK_HZ to configure SysTick (#103)
configSYSTICK_CLOCK_HZ should be used to configure SysTick to support
the use case when the clock for SysTick timer is scaled from the main
CPU clock.

configSYSTICK_CLOCK_HZ is defined to configCPU_CLOCK_HZ when it is not
defined in FreeRTOSConfig.h.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-24 09:45:42 -07:00
Gaurav-Aggarwal-AWS
7dd6b76011
Add support for 16 MPU regions to Cortex-M4 MPU ports (#96)
ARMv7-M supports 8 or 16 MPU regions. FreeRTOS Cortex-M4 MPU ports so
far assumed 8 regions. This change adds support for 16 MPU regions. The
hardware with 16 MPU regions must define configTOTAL_MPU_REGIONS to 16
in their FreeRTOSConfig.h.

If left undefined, it defaults to 8 for backward compatibility.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-24 07:47:41 -07:00
Gaurav-Aggarwal-AWS
149f06c70f
Update incorrect port in comments (#87)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-15 19:44:57 -07:00
Gaurav-Aggarwal-AWS
a717d9c62b
Update portNVIC_SYSPRI2_REG to portNVIC_SHPR3_REG (#86)
The reason for the change is that the register is called System Handler
Priority Register 3 (SHPR3).

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-15 19:44:45 -07:00
Gaurav-Aggarwal-AWS
bb1c429378
Place privileged symbols correctly (#84)
Some of the privileged symbols were not being placed in their respective
sections. This commit addresses those and places them in
privileged_functions or privileged_data section.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-14 16:22:42 -07:00
Gaurav-Aggarwal-AWS
b6a43866da
Add support for privileged heap to ARMV8-M ports (#85)
If xTaskCreate API is used to create a task, the task's stack is
allocated on heap using pvPortMalloc. This places the task's stack
in the privileged data section, if the heap is placed in the
privileged data section.

We use a separate MPU region to grant a task access to its stack.
If the task's stack is in the privileged data section, this results in
overlapping MPU regions as privileged data section is already protected
using a separate MPU region. ARMv8-M does not allow overlapping MPU
regions and this results in a fault. This commit ensures to not use a
separate MPU region for the task's stack if it lies within the
privileged data section.

Note that if the heap memory is placed in the privileged data section,
the xTaskCreate API cannot be used to create an unprivileged task as
the task's stack will be in the privileged data section and the task
won't have access to it. xTaskCreateRestricted and
xTaskCreateRestrictedStatic API should be used to create unprivileged
tasks.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-14 16:22:14 -07:00
Alfred Gedeon
587a83d647 Style: uncrustify kernel files 2020-07-08 10:24:06 -07:00
Alfred Gedeon
2c530ba5c3 Style: uncrustify 2020-07-08 10:24:06 -07:00
Alfred Gedeon
718178c68a Style: uncrusitfy 2020-07-08 10:24:06 -07:00
Alfred Gedeon
a5dbc2b1de Style: uncrustify kernel files 2020-07-08 10:24:06 -07:00
RichardBarry
bac101c988
Fix/clear MIE bit in initial RISC-V mstatus register. (#57)
* fix: CLEAR MIE BIT IN INITIAL RISC-V MSTATUS VALUE
The MIE bit in the RISC-V MSTATUS register is used to globally enable
or disable interrupts.  It is copied into the MPIE bit and cleared
on entry to an interrupt, and then copied back from the MPIE bit on
exit from an interrupt.

When a task is created it is given an initial MSTATUS value that is
derived from the current MSTATUS value with the MPIE bit force to 1,
but the MIE bit is not forced into any state.  This change forces
the MIE bit to 0 (interrupts disabled).

Why:
If a task is created before the scheduler is started the MIE bit
will happen to be 0 (interrupts disabled), which is fine.  If a
task is created after the scheduler has been started the MIE bit
is set (interrupts enabled), causing interrupts to unintentionally
become enabled inside the interrupt in which the task is first
moved to the running state - effectively breaking a critical
section which in turn could cause a crash if enabling interrupts
causes interrupts to nest.  It is only an issue when starting a
newly created task that was created after the scheduler was started.

Related Issues:
https://forums.freertos.org/t/risc-v-port-pxportinitialisestack-issue-about-mstatus-value-onto-the-stack/9622
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2020-05-01 22:35:42 -07:00
Gaurav-Aggarwal-AWS
334de5d8ab
Enable ARMv7-M MPU ports to place FreeRTOS kernel code outside of flash (#46)
Problem Description
-------------------
The current flash organization in ARMv7-M MPU ports looks as follows:

__FLASH_segment_start__ ------->+-----------+<----- __FLASH_segment_start__
                                |  Vector   |
                                |   Table   |
                                |     +     |
                                |   Kernel  |
                                |    Code   |
                                +-----------+<-----  __privileged_functions_end__
                                |           |
                                |           |
                                |           |
                                |   Other   |
                                |   Code    |
                                |           |
                                |           |
                                |           |
   __FLASH_segment_end__ ------>+-----------+

The FreeRTOS kernel sets up the following MPU regions:

* Unprivileged Code - __FLASH_segment_start__ to __FLASH_segment_end__.
* Privileged Code - __FLASH_segment_start__ to __privileged_functions_end__.

The above setup assumes that the FreeRTOS kernel code
(i.e. privileged_functions) is placed at the beginning of the flash and,
therefore, uses __FLASH_segment_start__ as the starting location of the
privileged code. This prevents a user from placing the FreeRTOS kernel
code outside of flash (say to an external RAM) and still have vector
table at the beginning of flash (which is many times a hardware
requirement).

Solution
--------
This commit addresses the above limitation by using a new variable
__privileged_functions_start__ as the starting location of the
privileged code. This enables users to place the FreeRTOS kernel code
wherever they choose.

The FreeRTOS kernel now sets up the following MPU regions:

* Unprivileged Code - __FLASH_segment_start__ to __FLASH_segment_end__.
* Privileged Code - __privileged_functions_start__ to __privileged_functions_end__.

As a result, a user can now place the kernel code to an external RAM. A
possible organization is:

                                 Flash              External RAM
                              +------------+        +-----------+<------ __privileged_functions_start__
                              |   Vector   |        |           |
                              |   Table    |        |           |
                              |            |        |           |
__FLASH_segment_start__ ----->+------------+        |   Kernel  |
                              |            |        |    Code   |
                              |            |        |           |
                              |            |        |           |
                              |            |        |           |
                              |   Other    |        |           |
                              |    Code    |        +-----------+<------ __privileged_functions_end__
                              |            |
                              |            |
                              |            |
  __FLASH_segment_end__ ----->+------------+

Note that the above configuration places the vector table in an unmapped
region. This is okay because we enable the background region, and so the
vector table will still be accessible to the privileged code and not
accessible to the unprivileged code (vector table is only needed by the
privileged code).

Backward Compatibility
----------------------
The FreeRTOS kernel code now uses a new variable, namely
__privileged_functions_start__, which needs to be exported from linker
script to indicate the starting location of the privileged code. All of
our existing demos already export this variable and therefore, they will
continue to work.

If a user has created a project which does not export this variable,
they will get a linker error for unresolved symbol
__privileged_functions_start__. They need to export a variable
__privileged_functions_start__ with the value equal to
__FLASH_segment_start__.

Issue
-----
https://sourceforge.net/p/freertos/feature-requests/56/

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-04-06 15:51:40 -07:00