Commit Graph

142 Commits

Author SHA1 Message Date
Tobias Schulte
cb7bef09f2
Adjust portPOINTER_SIZE_TYPE to correct size (#275)
* Adjust portPOINTER_SIZE_TYPE to correct size

portPOINTER_SIZE_TYPE wasn't yet set correctly to be 16 bit

* Fixed FreeRTOS file header to comply with automatic checks

Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2021-03-19 15:35:21 -07:00
carlo-dev-git
49c38f08de
Update port.c (#283) 2021-03-19 15:22:22 -07:00
David Chalco
578d040659
Add git attributes (#245)
* Add .gitattributes configured to normailze line endings to LF

* replace crlf with lf, per .gitattributes
2021-01-15 12:04:31 -07:00
Thomas Pedersen
23f641850d
Posix: fix build failure (#235)
Fixes: a48f137896 ("Posix Port: Comment and remove unused variables (#230)")

Authored-by: Thomas Pedersen <thomas@adapt-ip.com>
2021-01-08 14:19:15 -08:00
Shubham Kulkarni
ef4c305244
Update ESP32 port to ESP-IDF release v4.2 and add ESP-IDF version check (#231)
* Revert "Reintroduce Espressif's IDF v4.2 changes to ESP32 port (#193)"

This reverts commit 3d4d17178f.

* Update ESP32 port files to work with ESP-IDF v4.2 as well as ESP-IDF v3.3

Add changes required to support ESP32-S2

* portmacro.h: Change return type of vApplicationSleep to void

This fixes build failure when automatic light sleep is enabled

* prevent header checks for files with different licensing

Co-authored-by: David Chalco <david@chalco.io>
2020-12-22 13:00:45 -08:00
sherryzhang
8e99e2d38b
Align the TF-M version of the integration with kernel to version TF-Mv1.2.0 (#228)
Change-Id: I6d5f0732f4cb123df54b9df0b9820ef4dcf70fa4
Signed-off-by: Sherry Zhang <sherry.zhang2@arm.com>
2020-12-15 09:17:20 -08:00
Cobus van Eeden
ec62f69dab [AUTO][RELEASE]: Bump file header version to "10.4.3" 2020-12-14 10:13:39 -08:00
alfred gedeon
a48f137896
Posix Port: Comment and remove unused variables (#230)
* Posix Port: Comment and remove unused variables
* Fix header, replace tabs with spaces
2020-12-13 17:33:45 -08:00
Cobus van Eeden
c7a9a01c94
Improve heap2 bounds checking (#224)
* Improve heap bounds checking in pvPortMalloc
2020-12-07 10:36:27 -08:00
Gaurav-Aggarwal-AWS
b5020cb3d8
Prevent unprivileged task from altering MPU configuration (#227)
This change removes the FreeRTOS System Calls (aka MPU wrappers) for the
following kernel APIs:
- xTaskCreateRestricted
- xTaskCreateRestrictedStatic
- vTaskAllocateMPURegions

A system call allows an unprivileged task to execute a kernel API which
is otherwise accessible to privileged software only. The above 3 APIs
can create a new task with a different MPU configuration or alter the
MPU configuration of an existing task. This an be (mis)used by an
unprivileged task to grant itself access to a region which it does not
have access to.

Removing the system calls for these APIs ensures that an unprivileged
task cannot execute this APIs. If an unprivileged task attempts to
execute any of these API, it will result in a Memory Fault.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-12-07 09:53:22 -08:00
David Chalco
337bca615e [AUTO][RELEASE]: Bump file header version to "10.4.2" 2020-11-10 14:42:58 -08:00
Gaurav-Aggarwal-AWS
ebbe2cf854
Ensure interrupts are enabled at first task start (#214)
Critical sections in FreeRTOS are implemented using the following two
functions:

void vPortEnterCritical( void )
{
    portDISABLE_INTERRUPTS();
    uxCriticalNesting++;
}

void vPortExitCritical( void )
{
    uxCriticalNesting--;

    if( uxCriticalNesting == 0 )
    {
        portENABLE_INTERRUPTS();
    }
}

uxCriticalNesting is initialized to a large value at the start and set
to zero when the scheduler is started (xPortStartScheduler). As a
result, before the scheduler is started, a pair of enter/exit critical
section will leave the interrupts disabled because uxCriticalNesting
will not reach zero in the vPortExitCritical function. This is done to
ensure that the interrupts remain disabled from the time first FreeRTOS
API is called to the time when the scheduler is started. The scheduler
starting code is expected to enure that interrupts are enabled before
the first task starts executing.

Cortex-M33 ports were not enabling interrupts before starting the first
task and as a result, the first task was started with interrupts
disabled. This PR fixes the issue by ensuring that interrupts are
enabled before the first task is started.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-11-05 09:26:56 -08:00
filipgeorge
1431b65110
porthardware.h file update for AVR Mega0 and Dx (#212)
* Added guard for ioavr.h include in AVR Dx porthardware.h file.
* Added guard for ioavr.h include in AVR Mega0 porthardware.h file.
2020-10-27 12:26:52 -07:00
Carl Lundin
6a5784598a
Upstream stack masking fix to GCC ports. (#210)
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2020-10-27 11:32:09 -07:00
Jon Snow
bdb38d85dc
update interrupt vector names for ATMega32 (#196) 2020-10-26 13:31:15 -07:00
magicse7en
82df39764a
Xtensa: fix the coproc_area incorrect issue (#117)
* Xtensa: fix the coproc_area incorrect issue

foss-xtensa/amazon-freertos#2 mentioned a issue:
1.
In function pxPortInitialiseStack(StackType_t *pxTopOfStack....)
p = (uint32_t *)(((uint32_t) pxTopOfStack - XT_CP_SIZE) & ~0xf);

In function prvInitialiseNewTask (file: task.c)
pxTopOfStack = (pxStack + (ulStackDepth - 1)) & (~portBYTE_ALIGNMENT_MASK)

So the co-processor area is at
p = (uint32_t *)(((uint32_t)((pxStack + (ulStackDepth - 1)) & (~portBYTE_ALIGNMENT_MASK)) - XT_CP_SIZE) & ~0xf);

2.
In function vPortStoreTaskMPUSettings( .... , StackType_t pxBottomOfStack ...)
xMPUSettings->coproc_area = (StackType_t)((((uint32_t)(pxBottomOfStack + usStackDepth - 1)) - XT_CP_SIZE) & ~0xf);

pxBottomOfStack = pxStack

=> xMPUSettings->coproc_area = (StackType_t*)((((uint32_t)(pxStack+ ulStackDepth - 1)) - XT_CP_SIZE ) & ~0xf);

The p is coproc_area that should be equal to xMPUSettings->coproc_area.

For example, assume pxStack is 0xa0000000, ulStackDepth is 0x2000,
portBYTE_ALIGNMENT_MASK is 0x7f, XT_CP_SIZE is 0x100.

The p = (uint32_t)(((uint32_t)((pxStack + (ulStackDepth - 1)) & (~portBYTE_ALIGNMENT_MASK)) - XT_CP_SIZE) & ~0xf)
      = 0xa0001e80
The xMPUSettings->coproc_area = (StackType_t)((((uint32_t)(pxStack+ usStackDepth - 1)) - XT_CP_SIZE ) & ~0xf)
                              = 0xa0001ef0
Obviously, the p is not equal to the xMPUSettings->coproc_area, which will cause context switching error.

Signed-off-by: magicse7en <magicse7en@outlook.com>

* Update port.c

Co-authored-by: Carl Lundin <53273776+lundinc2@users.noreply.github.com>
2020-10-26 11:47:21 -07:00
magicse7en
b9748e50ea
Xtensa: fix stack overlap coproc_area issue (#118)
In function pxPortInitialiseStack of port.c:
	sp = ( StackType_t * ) ( ( ( UBaseType_t ) ( pxTopOfStack + 1 )  - XT_CP_SIZE - XT_STK_FRMSZ ) & ~0xf );
We assume XT_CP_SIZE is 0xE4, XT_STK_FRMSZ is 0xA0, pxTopOfStack is 0xA0000000, sp is 0x9FFFFE80.
From port.c, we know the frame->a1 as below:
	frame->a1 = ( UBaseType_t ) sp + XT_STK_FRMSZ;  /* physical top of stack frame    */
So frame->a1 is 0x9FFFFF20. Therefore the interrupt stack frame range is 0x9FFFFE80 ~ 0x9FFFFF20.

The coproc_area is: p = ( uint32_t * ) ( ( ( uint32_t ) pxTopOfStack - XT_CP_SIZE ) & ~0xf );
So its value is 0x9FFFFF10. Obviously, the interrupt stack frame overlaps the coproc_area.

Co-authored-by: Carl Lundin <53273776+lundinc2@users.noreply.github.com>
2020-10-26 11:07:32 -07:00
RichardBarry
5fb26de019
Recently vTaskDelayUntil() was updated to xTaskDelayUntil() because the function now returns a value. The PR didn't make the same change in the MPU port, or update the constants required to include the xTaskDelayUntil() function in the build. (#199)
This PR:
Changes the INCLUDE_vTaskDelayUntil compile time constant to INCLUDE_xTaskDelayUntil.
Updates FreeRTOS.h to ensure backward compatibility for projects that already have INCLUDE_vTaskDelayUntil defined.
Updates the MPU prototypes, wrapper and implementation to use the updated xTaskDelayUntil() function.

Tests to be checked into the FreeRTOS/FreeRTOS repository after this PR.
2020-10-11 14:04:49 -07:00
Joseph Julicher
6375d52250
matching the preprocessor conditionals for xTaskGetCurrentTaskHandle() (#197) 2020-10-08 18:44:30 -07:00
Carl Lundin
3d4d17178f
Reintroduce Espressif's IDF v4.2 changes to ESP32 port (#193)
* Renamed old port to ESP_IDF_V3

* Update ESP32 port files to support IDF v4.2.

* Add changes required to support ESP32-S2

Co-authored-by: Shubham Kulkarni <shubham.kulkarni@espressif.com>
2020-10-08 11:03:27 -07:00
Reda Maher
77ad717400
Posix: Fix no task switching issue if a task ended its main function (#184)
* Posix: Fix no task switching issue if a task ended

When the main function of a task exits, no task switching happened.
This is because all the remaining tasks are waiting on the condition
variable. The fix is to trigger a task switch and mark the exiting
task as "Dying" to be suspened and exited properly from the scheduler.

* Posix: Assert and stop if the Task function returned

* Posix: just assert if a task returned from its main function

Co-authored-by: alfred gedeon <alfred2g@hotmail.com>
2020-10-05 18:06:51 -07:00
Reda Maher
baeb5af9a4
Posix: Free the allocated memory after deleting a task or ending the scheduler (#181)
* Posix: Free Idle task resources after ending the scheduler

In case of using Posix simulator and ending the scheduler, it does
not free the resources allocated by the idle task. This
causes the memory checkers (Valgrind, Address Sanitizers, ..) to
complain.

* Posix: Free the condition variable memory in the correct place

In case of deleting a task from another task, the deletion happens
immediately and the thread is canceled but the memory allocated by
the task condition variable is not freed. This causes the memory
checkers (Valgrind, Address sanitizers, ..) to complain.

* Posix: End Timer thread and free its resources after ending the scheduler
2020-09-29 14:06:10 -07:00
Gaurav-Aggarwal-AWS
2225bb5620
Fix Stack alignment for Microchip PIC32MX port (#182)
* Fix Stack alignment for Microchip PIC32MX port

The stack of a task was not 8 byte aligned. Adding one more unused space
at the beginning of task stack (before simulated context) ensures that
the stack is 8 byte aligned. The stack (with simulated context) of a
newly created task looks like the following:

                    +------------+
                    | UNUSED     |
                    +------------+
                    | UNUSED     |
                    +------------+
                    | 0xDEADBEEF |
                    +------------+
                    | 0x12345678 |
                ^   +------------+
                |   | CAUSE      | <-- SP After Context Restore
                |   +------------+
                |   | STATUS     |
                |   +------------+
                |   | EPC        |
                |   +------------+
                |   | ra         |
                |   +------------+
                |   | s8         |
                |   +------------+
                |   | t9         |
                |   +------------+
                |   | t8         |
                |   +------------+
                |   | t7         |
                |   +------------+
                |   | t6         |
                |   +------------+
                |   | t5         |
                |   +------------+
                |   | t4         |
                |   +------------+
                |   | t3         |
                |   +------------+
                |   | t2         |
                |   +------------+
                |   | t1         |
                |   +------------+
    Context     |   | t0         |
  (132 bytes)   |   +------------+
                |   | a3         |
                |   +------------+
                |   | a2         |
                |   +------------+
                |   | a1         |
                |   +------------+
                |   | a0         |
                |   +------------+
                |   | v1         |
                |   +------------+
                |   | v0         |
                |   +------------+
                |   | s7         |
                |   +------------+
                |   | s6         |
                |   +------------+
                |   | s5         |
                |   +------------+
                |   | s4         |
                |   +------------+
                |   | s3         |
                |   +------------+
                |   | s2         |
                |   +------------+
                |   | s1         |
                |   +------------+
                |   | s0         |
                |   +------------+
                |   | at         |
                |   +------------+
                |   | HI         |
                |   +------------+
                |   | LO         |
                |   +------------+
                V   |            |
                    +------------+
                    |            | <-- SP After Context Save
                    +------------+

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Update comment

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-09-28 00:16:18 -07:00
NoMaY (a user of Japan.RenesasRulz.com)
c3117b4237
Maintenance: Add readme.txt in each Renesas RX folder to show recommended port (#152)
* Maintenance: Add readme.txt in each Renesas RX folder to show recomended port
* Update readme.txt in each Renesas RX folder regarding to Notes *1 and *2 (both are RX100 port)
2020-09-28 00:09:49 -07:00
alfred gedeon
d428209d01
Fix some broken/redirected URL (#172)
* Style: fix some broken/redirect links

* Fix: atmel url

* Fix microchip typo

* Fix url links

* Fix shortcut link

* Comment: fix line wrapping

* Style: fix line wrapping to 80 chars

* Add now microchip beside Atmel

* Fix link in History

* Add Now Microchip before Atmel link

* Comment: add *
2020-09-21 15:49:55 -07:00
Cobus van Eeden
385e700953
Update History.txt and fix versioning in asm files (#177) 2020-09-18 08:05:13 -07:00
David Chalco
3604527e3b
Update version number to 10.4.1 (#173) 2020-09-17 15:25:15 -07:00
NoMaY (a user of Japan.RenesasRulz.com)
242808132c
Fix broken #warning message in ARM_CMx_MPU/portmacro.h between 10.3.1 and 10.4.0 (#171) 2020-09-15 01:55:55 -07:00
RichardBarry
85768bb3e0
Sets the version number to 10.4.0 in assembly files. The (#166)
assembly files were missed when the other source files had
their version numbers updated.
2020-09-14 09:49:46 -07:00
David Chalco
5dfab0306b
Update version number to 10.4.0 (#153) 2020-09-10 19:49:34 -07:00
alfred gedeon
16bc35c21c
Fix: Comment - xTaskIncrementTick loop - to adhere to demo requirement (#162)
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-09-10 14:36:34 -07:00
Joseph Julicher
2f14899ce8
Revert "RISC-V: Add RV32E / FPU support for GCC (#140)" (#163)
This reverts commit 0037a6c574.
2020-09-10 12:46:15 -07:00
Cobus van Eeden
cfb51b3db8
Add url link for Linux Simulator documentation (#161) 2020-09-09 14:35:52 -07:00
Emmanuel Puerto
0037a6c574
RISC-V: Add RV32E / FPU support for GCC (#140)
* Change vPortSetupTimerInterrupt in order to have 64bits access on rv64

* Support RV32E - RISC-V architecture (GCC)

Signed-off-by: Emmanuel Puerto <emmanuel.puerto@sifive.com>

* Support FPU - RISC-V architecture (GCC)

Signed-off-by: Emmanuel Puerto <emmanuel.puerto@sifive.com>

* Fix interrupt managment and FPU initialization
2020-09-09 11:06:16 -07:00
sherryzhang
524e78d58b
Introduce Trusted Firmware M support in Kernel on ARM Cortex M33 (#108)
This port adds the support that FreeRTOS applications can call the secure
    services in Trusted Firmware M(TF-M) via PSA Platform Security
    Architecture(PSA) API based on Arm Cortex-M33 platform with GCC compiler.

    More information:
    PSA - https://www.arm.com/why-arm/architecture/platform-security-architecture
    TF-M - https://git.trustedfirmware.org/trusted-firmware-m.git/

Change-Id: I2e771b66e8d75927abc2505a187a16250d504db2
Signed-off-by: Sherry Zhang <sherry.zhang2@arm.com>
2020-09-09 08:15:50 -07:00
YuguoWH
651289ef04
Synopsys ARC v1 Port: add support to Synopsys ARC v1 series cores (#110)
* Synopsys Port: Adding support to Synopsys ARC v1 series cores
ARC v1 cores include ARC605, ARC610d, and ARC710d

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>

* Synopsys ARC v1 port: run uncrustify to fix code style

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>

* Synopsys port: modify license headers, change copyright only

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
2020-09-08 08:40:17 -07:00
alfred gedeon
35f0b2ab84
Change the Linux Port to use condition variables instead of Signals (#156)
* Posix port with pthread cond instead of signals
* Comment: replace signal with pthread_cond
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-09-07 09:56:28 -07:00
Ming Yue
82fdc1c3ee
Change the header file name into lower case so it can work on GNU/Linux for MinGW cross-compiling. (#144) 2020-08-28 14:59:30 -07:00
alfred gedeon
148c81a7bc
Revert "Fix: Add Parenthesis around if-statement in macro (#138)" (#148)
This reverts commit 45e97bd246.
2020-08-28 14:19:31 -07:00
Ming Yue
58ffcb1a6d
Revert "Fix race condition when tracing is enabled (#95)" (#149)
This reverts commit 61635d5b8b.
2020-08-28 14:17:29 -07:00
Cobus van Eeden
d7fd5a1195
Revert "Fix inaccurate ticks in windows port (#142)" (#143)
This reverts commit d85fd461d9.
2020-08-27 12:06:03 -07:00
Cobus van Eeden
d85fd461d9
Fix inaccurate ticks in windows port (#142) 2020-08-27 10:12:51 -07:00
alfred gedeon
45e97bd246
Fix: Add Parenthesis around if-statement in macro (#138)
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-26 10:50:35 -07:00
Ravishankar Bhagavandas
1d8df4752e
Update Renesas GCC compiler ports (#135)
* Add RX200 GCC compiler

Signed-off-by: Dinh Van Nam <vannam.dinh.xt@renesas.com>

* Update GCC compiler for:
 * RX600v2
 * RX600
 * RX100

Signed-off-by: Dinh Van Nam <vannam.dinh.xt@renesas.com>

* Use configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H flag

* Use configINCLUDE_PLATFORM_H_INSTEAD_OF_IODEFINE_H flag RX100, RX200

Co-authored-by: Dinh Van Nam <vannam.dinh.xt@renesas.com>
2020-08-24 15:32:45 -07:00
alfred gedeon
0afc048cf2
Style: Add uncrustify guards, fix asm (#136)
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-24 15:32:02 -07:00
alfred gedeon
a038146915
Style: Make freertos.org = FreeRTOS.org and add https (#134)
* Style: make freertos.org = FreeRTOS.org also add https

* Style: Fix freertos into FreeRTOS

* Style: Fix freertos into FreeRTOS

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-21 11:30:39 -07:00
Carl Lundin
7cd4a4f276
Fix compiler issues cause by formatting assembly code on ESP32 port (#133) 2020-08-21 10:55:58 -07:00
alfred gedeon
0b0a2060c0
Style: Change FreeRTOS websites in comments (#131)
* Style: Change FreeRTOS websites in comments

* Style: Change freertos to FreeRTOS in comments

* Style: Remove broken link

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-20 14:59:28 -07:00
Carl Lundin
10a0b1e54b
Revert "Update ESP32 port files (#92)" (#132)
This reverts commit adbfca5420.
2020-08-20 14:41:44 -07:00
Joseph Julicher
386d854e0b
added a warning concerning the incomplete testing of the RX700v3_DFPU port (#124) 2020-08-17 15:33:10 -07:00
alfred gedeon
8c77117c32
Style: Remove tabs and tab == 4 spaces (#120)
* Style: Remove tabls and tab == 4 spaces

* Style: remove xx accidentally left

* Style: revert uncrustify for untested portable directories

* Style: revert more uncrustify files

* Style: Revert more uncrustified files

* Style: Revert some uncrutified files

* Style: change more files

* Style: remove t tab == 4 spaces

* Style: remove tabs = spaces

* Style: revert changed files

* Style: redo the stuyles

* Style: add uncrustify disable parsing for asm

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-17 14:50:56 -07:00
alfred gedeon
86653e2a1f
Style: Revert uncrustify for portable directories (#122)
* Style: revert uncrustify portable directories

* Style: Uncrustify Some Portable files

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-08-17 10:51:02 -07:00
NoMaY (a user of Japan.RenesasRulz.com)
a6da1cd0ce
Add Renesas RXv3 port layer supporting RXv3's double precision FPU (#104) 2020-08-14 11:16:48 -07:00
Simon Beaudoin
61635d5b8b
Fix race condition when tracing is enabled (#95)
* Update port.c

I discovered a very snicky and tricky race condition scenario when integrating tracealyzer code into our project.

A little background  on CortexR5 : When the IRQ line (comming from the interrupt controller, to which every peripheral IRQ lines connect) of the processor rises and the IRQ Enable bit in the status register of the CPU permits it, the CPU traps into interrupt mode. Several things happen. First, the CPU finishes the instruction it was performing. Second, it places the content of the CPSR register into the SPSR_irq register. And third, the mode of the CPU is changed to IRQ_Mode and /!\ THE IRQ ENABLE BIT IN CPSR_irq IS AUTOMATICALLY CLEARED /!\. The reason is to ensure that upon landing into IRQ code, we find ourselves automatically in a critical section because we cannot be interrupted again because the bit is cleared. The programmer can, if he wants, re-enable IRQs inside IRQ code itself to allow interrupt nesting. But it has to be wanted and meditated. 


Now, inside portASM.S, at the end of 'FreeRTOS_IRQ_Handler' assembly function, a call to 'vTaskSwitchContextConst' is made if the variable 'ulPortYieldRequired' was set by someone while executing the interrupt. Before branching to that function, a 'CPSID	i' instruction was placed to ensure that interrupts are disabled in case someone re-enabled it. Inside 'vTaskSwitchContext', there is the macro 'traceTASK_SWITCHED_OUT' that gets populated when tracing is enabled. 

The bug is right there.. If the macro is populated and inside that macro there is a matching call to 'ulPortSetInterruptMask' and 'vPortClearInterruptMask', a race condition can occure is there is a OS Tick timer interrupt waiting at the interrupt controller's door. Upon calling 'vTaskSwitchContext', the interrupts are not masked in the interrupt controller, the only barrier against the CPU servicing that tick interrupt while already performing the function is that the IRQ Enable bit cleared. 'ulPortSetInterruptMask' 
does what's its supposed to do, but doesn't take into account the IRQ Enable bit in CPSR. Wheter or not the bit was cleared, the function sets it at the end. When calling the matching 'vPortClearInterruptMask', the function clears the interrupt mask in the interrupt controller. Because the IRQ Enable bit (that was cleared) has been set no matter what in 'ulPortSetInterruptMask', the CPU services the OS Tick Interrupt right away. 

The bug is there : instead of completing the 'vTaskSwitchContext' function, the CPU re-enters the switch context path right after 'traceTASK_SWITCHED_OUT' thus corrupting the CPU state and eventually triggering either an undefined instruction, data or instruction abort.

* Update port.c

Error on my part, this is the right inline asm code to retreive CPSR register

* Update port.c

Forgot an * while writing comment..
2020-08-10 09:46:39 -07:00
Gaurav-Aggarwal-AWS
287361091b
Allow application to override TEX,S,C and B bits for Flash and RAM (#113)
The TEX,  Shareable (S), Cacheable (C) and Bufferable (B) bits define
the memory type, and where necessary the cacheable and shareable
properties of the memory region.

The default values for these bits, as configured in our MPU ports, are
sometimes not suitable for application. One such example is when the MCU
has a cache, the application writer may not want to mark the memory as
shareable to avoid disabling the cache. This change allows the
application writer to override default vales for TEX, S C and B bits for
Flash and RAM in their FreeRTOSConfig.h. The following two new
configurations are introduced:

- configTEX_S_C_B_FLASH
- configTEX_S_C_B_SRAM

If undefined, the default values for the above configurations are
TEX=000, S=1, C=1, B=1. This ensures backward compatibility.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-08-08 18:37:14 -07:00
m17336
a2e00f0c6b
Update to AVR_Mega0 and AVR_Dx GCC ports + addition of their IAR equivalents (#106)
* Removed TICK_stop() macro from portable/GCC/{AVR_AVRDx, AVR_Mega0}/porthardware.h because it is not used anywhere.

* Updated indentation in portable/GCC/{AVR_AVRDx, AVR_Mega0}/* files.

* Added portable/IAR/{AVR_AVRDx, AVR_Mega0 folders.
2020-08-06 16:24:05 -07:00
DavidJurajdaNXP
bda9869271
IAR Embedded Workbench modified behaviour of weak declaration "#pragma weak" in release 8.50.5. (#83)
This modification result in build error in case of FreeRTOS CM0 port.
To fix the issue use __weak in function definition instead.
2020-07-30 21:00:10 -07:00
Shubham Kulkarni
adbfca5420
Update ESP32 port files (#92)
Add changes required to support ESP32-S2
2020-07-30 20:58:51 -07:00
Gaurav-Aggarwal-AWS
4383c8fae3
Change the xRunningPrivileged check from "!=true" to "==false" (#109)
The expected behaviour of portIS_PRIVILEGED is:
- return 0 if the processor is not running privileged.
- return 1 if the processor is running privileged.

Some TI ports do not return 1 when the processor is running privileged
causing the following check to fail: if( xRunningPrivileged != pdTRUE )

This commit change the check to: if( xRunningPrivileged == pdFALSE ). It
ensures that the check is successful even on the ports which return incorrect
value from portIS_PRIVILEGED when the processor is running privileged.

See https://forums.freertos.org/t/kernel-bug-nested-mpu-wrapper-calls-generate-an-exception/10391

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-30 19:32:31 -07:00
Gaurav-Aggarwal-AWS
676d99e302
Use configSYSTICK_CLOCK_HZ to configure SysTick (#103)
configSYSTICK_CLOCK_HZ should be used to configure SysTick to support
the use case when the clock for SysTick timer is scaled from the main
CPU clock.

configSYSTICK_CLOCK_HZ is defined to configCPU_CLOCK_HZ when it is not
defined in FreeRTOSConfig.h.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-24 09:45:42 -07:00
Gaurav-Aggarwal-AWS
7dd6b76011
Add support for 16 MPU regions to Cortex-M4 MPU ports (#96)
ARMv7-M supports 8 or 16 MPU regions. FreeRTOS Cortex-M4 MPU ports so
far assumed 8 regions. This change adds support for 16 MPU regions. The
hardware with 16 MPU regions must define configTOTAL_MPU_REGIONS to 16
in their FreeRTOSConfig.h.

If left undefined, it defaults to 8 for backward compatibility.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-24 07:47:41 -07:00
YuguoWH
5b6c2ab085
Synopsys ARC update, with updated BSP support (#99)
Update BSP APIs to latest version
Remove unused macro which could have caused warnings
(Code Style) Manually align some macros

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
2020-07-22 17:14:09 -07:00
m17336
bb56edff2f
Added GCC port files for AVR Mega0 and AVR Dx. (#101) 2020-07-21 15:11:57 -07:00
Gaurav-Aggarwal-AWS
c273690296
Rmove MPU_pvPortMalloc and MPU_vPortFree from mpu_wrappers.c (#88)
These definitions were not useful because the corresponding mapping was
removed from mpu_wrappers.h earlier.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-15 19:46:35 -07:00
Gaurav-Aggarwal-AWS
149f06c70f
Update incorrect port in comments (#87)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-15 19:44:57 -07:00
Gaurav-Aggarwal-AWS
a717d9c62b
Update portNVIC_SYSPRI2_REG to portNVIC_SHPR3_REG (#86)
The reason for the change is that the register is called System Handler
Priority Register 3 (SHPR3).

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-15 19:44:45 -07:00
Gaurav-Aggarwal-AWS
bb1c429378
Place privileged symbols correctly (#84)
Some of the privileged symbols were not being placed in their respective
sections. This commit addresses those and places them in
privileged_functions or privileged_data section.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-14 16:22:42 -07:00
Gaurav-Aggarwal-AWS
b6a43866da
Add support for privileged heap to ARMV8-M ports (#85)
If xTaskCreate API is used to create a task, the task's stack is
allocated on heap using pvPortMalloc. This places the task's stack
in the privileged data section, if the heap is placed in the
privileged data section.

We use a separate MPU region to grant a task access to its stack.
If the task's stack is in the privileged data section, this results in
overlapping MPU regions as privileged data section is already protected
using a separate MPU region. ARMv8-M does not allow overlapping MPU
regions and this results in a fault. This commit ensures to not use a
separate MPU region for the task's stack if it lies within the
privileged data section.

Note that if the heap memory is placed in the privileged data section,
the xTaskCreate API cannot be used to create an unprivileged task as
the task's stack will be in the privileged data section and the task
won't have access to it. xTaskCreateRestricted and
xTaskCreateRestrictedStatic API should be used to create unprivileged
tasks.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-07-14 16:22:14 -07:00
Alfred Gedeon
587a83d647 Style: uncrustify kernel files 2020-07-08 10:24:06 -07:00
Alfred Gedeon
66a815653b Style: uncrustify 2020-07-08 10:24:06 -07:00
Alfred Gedeon
f8ac4107ec Style: uncrustify 2020-07-08 10:24:06 -07:00
Alfred Gedeon
2c530ba5c3 Style: uncrustify 2020-07-08 10:24:06 -07:00
Alfred Gedeon
718178c68a Style: uncrusitfy 2020-07-08 10:24:06 -07:00
Alfred Gedeon
a5dbc2b1de Style: uncrustify kernel files 2020-07-08 10:24:06 -07:00
Gaurav-Aggarwal-AWS
b47ca712d8
Update mpu_wrappers with task notification changes (#79)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-06-26 09:35:28 -07:00
Gaurav-Aggarwal-AWS
c4b4156fcf
Fix out of offset errors when LTO is enabled (#71)
When Link Time Optimization (LTO) is enabled, some of the LDR
instructions result in out of range access. The reason is that the
default generated literal pool is too far and not within the permissible
range of 4K.

This commit adds LTORG assembly instructions at required places to
ensure that access to literals remain in the permissible range of 4K.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-06-10 10:03:11 -07:00
Yuhui Zheng
f602be2a90
Removing vPortEndScheduler() implementation, since it's not implemented according to spec. (#61)
Refer to https://www.freertos.org/a00133.html.
The issue with the implementation is that, if only stop kernel tick the program will keep executing current task.
The desired behavior is to at least return/jump to the next instruction after vTaskStartScheduler().

Signed-off-by: Yuhui Zheng <10982575+yuhui-zheng@users.noreply.github.com>
2020-05-27 14:08:44 -07:00
RichardBarry
bac101c988
Fix/clear MIE bit in initial RISC-V mstatus register. (#57)
* fix: CLEAR MIE BIT IN INITIAL RISC-V MSTATUS VALUE
The MIE bit in the RISC-V MSTATUS register is used to globally enable
or disable interrupts.  It is copied into the MPIE bit and cleared
on entry to an interrupt, and then copied back from the MPIE bit on
exit from an interrupt.

When a task is created it is given an initial MSTATUS value that is
derived from the current MSTATUS value with the MPIE bit force to 1,
but the MIE bit is not forced into any state.  This change forces
the MIE bit to 0 (interrupts disabled).

Why:
If a task is created before the scheduler is started the MIE bit
will happen to be 0 (interrupts disabled), which is fine.  If a
task is created after the scheduler has been started the MIE bit
is set (interrupts enabled), causing interrupts to unintentionally
become enabled inside the interrupt in which the task is first
moved to the running state - effectively breaking a critical
section which in turn could cause a crash if enabling interrupts
causes interrupts to nest.  It is only an issue when starting a
newly created task that was created after the scheduler was started.

Related Issues:
https://forums.freertos.org/t/risc-v-port-pxportinitialisestack-issue-about-mstatus-value-onto-the-stack/9622
Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com>
2020-05-01 22:35:42 -07:00
alfred gedeon
eac2b9a271
Fix Linux port Valgrind errors (#56)
Fix Valgrind uninitialized variables warning.
Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
2020-04-28 14:42:34 -07:00
Yuhui Zheng
6e7523041d
GCC/ATmegaxxxx port path and name change. (#51)
Moving ATmega port to third party directory, and mature it there. Once we are fully done, the port could then be moved back to portable/GCC.
2020-04-21 13:21:19 -07:00
Phillip Stevens
1abca83c89
ATmegaxxxx - generalised support (#48)
ATmegaxxxx - generalised support. Please see README.md included in the same PR for usage and limitations.
2020-04-15 18:51:57 -07:00
Gaurav-Aggarwal-AWS
07e672c448
Add definition of portDONT_DISCARD to ARMv7-M ports (#50)
Enabling Link Time Optimization (LTO) causes some of the functions used
in assembly to be incorrectly stripped off, resulting in linker error.
To avoid this, these functions are marked with portDONT_DISCARD macro,
definition of which is port specific. This commit adds the definition
of portDONT_DISCARD for ARMv7-M ports.

Signed-off-by: Gaurav Aggarwal
2020-04-14 09:03:11 -07:00
Gaurav-Aggarwal-AWS
334de5d8ab
Enable ARMv7-M MPU ports to place FreeRTOS kernel code outside of flash (#46)
Problem Description
-------------------
The current flash organization in ARMv7-M MPU ports looks as follows:

__FLASH_segment_start__ ------->+-----------+<----- __FLASH_segment_start__
                                |  Vector   |
                                |   Table   |
                                |     +     |
                                |   Kernel  |
                                |    Code   |
                                +-----------+<-----  __privileged_functions_end__
                                |           |
                                |           |
                                |           |
                                |   Other   |
                                |   Code    |
                                |           |
                                |           |
                                |           |
   __FLASH_segment_end__ ------>+-----------+

The FreeRTOS kernel sets up the following MPU regions:

* Unprivileged Code - __FLASH_segment_start__ to __FLASH_segment_end__.
* Privileged Code - __FLASH_segment_start__ to __privileged_functions_end__.

The above setup assumes that the FreeRTOS kernel code
(i.e. privileged_functions) is placed at the beginning of the flash and,
therefore, uses __FLASH_segment_start__ as the starting location of the
privileged code. This prevents a user from placing the FreeRTOS kernel
code outside of flash (say to an external RAM) and still have vector
table at the beginning of flash (which is many times a hardware
requirement).

Solution
--------
This commit addresses the above limitation by using a new variable
__privileged_functions_start__ as the starting location of the
privileged code. This enables users to place the FreeRTOS kernel code
wherever they choose.

The FreeRTOS kernel now sets up the following MPU regions:

* Unprivileged Code - __FLASH_segment_start__ to __FLASH_segment_end__.
* Privileged Code - __privileged_functions_start__ to __privileged_functions_end__.

As a result, a user can now place the kernel code to an external RAM. A
possible organization is:

                                 Flash              External RAM
                              +------------+        +-----------+<------ __privileged_functions_start__
                              |   Vector   |        |           |
                              |   Table    |        |           |
                              |            |        |           |
__FLASH_segment_start__ ----->+------------+        |   Kernel  |
                              |            |        |    Code   |
                              |            |        |           |
                              |            |        |           |
                              |            |        |           |
                              |   Other    |        |           |
                              |    Code    |        +-----------+<------ __privileged_functions_end__
                              |            |
                              |            |
                              |            |
  __FLASH_segment_end__ ----->+------------+

Note that the above configuration places the vector table in an unmapped
region. This is okay because we enable the background region, and so the
vector table will still be accessible to the privileged code and not
accessible to the unprivileged code (vector table is only needed by the
privileged code).

Backward Compatibility
----------------------
The FreeRTOS kernel code now uses a new variable, namely
__privileged_functions_start__, which needs to be exported from linker
script to indicate the starting location of the privileged code. All of
our existing demos already export this variable and therefore, they will
continue to work.

If a user has created a project which does not export this variable,
they will get a linker error for unresolved symbol
__privileged_functions_start__. They need to export a variable
__privileged_functions_start__ with the value equal to
__FLASH_segment_start__.

Issue
-----
https://sourceforge.net/p/freertos/feature-requests/56/

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-04-06 15:51:40 -07:00
Yuhui Zheng
464695a4f2
Synopsys ARC port, adding support for ARC EM and HS cores -- continued from PR #8. (#28)
Synopsys ARC port, adding support for ARC EM and HS cores.
2020-03-24 11:54:03 -07:00
David Vrabel
90a3584749 portable/GCC/Posix: add new port for Posix (Linux) applications
This is similar to the Windows port, allowing FreeRTOS kernel
applications to run as regular applications on Posix (Linux) systems.

You can use this in a 32-bit or 64-bit application (although there are
dynamic memory allocation trace points that do not support 64-bit
addresses).

Many of the same caveats of running an RTOS on a non-real-time system
apply, but this is still very useful for easy debugging/testing
applications in a simulated environment. In particular, it allows easy
use of tools such as valgrind.

You can call standard library functions from tasks but care must be
taken with any that internally take mutexes or block. This includes
malloc()/free() and many stdio functions (e.g., printf()).

Replacement malloc(), free(), realloc(), and calloc() functions are
provided which are safe. printf() needs to be called with a FreeRTOS
mutex help (or called from only a single task).

Each task is run in its own pthread, which makes debugging with
standard tools (such as GDB) easier backtraces for individual tasks
are available. Threads for non-running tasks are blocked in sigwait().

The stack for each task (thread) is allocated when the thread is
created, and the stack provided during task creation is not used. This
is so the stack has guard pages, to help with detecting stack
overflows.

Task switch is done by resuming the thread for the next task by
sending it the resume signal (SIGUSR1) and then suspending the current
thread.

The timer interrupt uses SIGALRM and care is taken to ensure that the
signal handler runs only on the thread for the current task.

The additional data needed per-thread is stored at the top on the
task's stack.

When a running task is being deleted, its thread is marked it as dying
so when we switch away from it it exits instead of suspending. This
ensures that even if the idle task doesn't run, threads are deleted
which allows for more threads to be created (if many tasks are being
created and deleted in rapid succession).

To further aid debugging, SIGINT (^C) is not blocked inside critical
sections. This allows it to be used break into GDB while in a critical
section. This means that care must be taken with any custom SIGINT
handlers as these are like NMIs.

This is somewhat inspired by an existing port by William Davy
(https://www.freertos.org/FreeRTOS-simulator-for-Linux.html) but it
takes a number of different approaches to make it switch tasks
reliableand there's little similarly with the original implementation.

- Critical sections block scheduling/"interrupts" by blocking signals
  using pthread_sigmask(). This is more expensive than attempting to
  use flags but works reliably and is analogous to the interrupt
  enable/disable on real hardware.

- Care is take to ensure that the SIGALRM handler (for the timer tick)
  is runnable only on the pthread for the running task. This makes
  tasks switches more straight-forward and reliable as we can suspend
  the thread while in the signal handler.

- Task switches save/restore the critical nesting on the stack.

- Only uses a single (SIGUSR1) signal which is ignored and thus GDB's
  default signal handling options won't trap/print on this signal.

- Extra per-thread data is stored on the task's stack, making it
  accessible in O(1) instead of performing a O(n) lookup of the array.

- Uses the task create/delete hooks in a similar way to the Windows
  port, rather than overloading trace points.
2020-03-20 16:14:08 -07:00
Gaurav-Aggarwal-AWS
177e79fc79
Add "Tickless Idle" support for ARMv8M ports (#29)
Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
2020-03-16 10:50:49 -07:00
RichardBarry
459dceb29c Fix Coverity warnings: In most cases the return value of xTaskResumeAll() is cast to void when it is not needed. This PR fixes a couple of instances in the heap_n.c implementations where that was not the case. 2020-03-16 10:20:25 -07:00
RichardBarry
b49eec35f6 The Windows port layer is built with both MSVC and GCC. GCC generated a warning relating to the variable lWaitForYield being set but not used. This change removes the variable. 2020-03-15 20:24:18 -07:00
Vladimir Umek
9b02ee0af2 Cortex-A9 port: Adding stack alignment directive to assembly code 2020-03-13 12:19:31 -07:00
Sachin Parekh
8e3cf978c4 Xtensa_ESP32: Change _iram_end to _iram_text_end
xtensa_loadstore_handler.S uses _iram_end to prevent modification of IRAM
code. With the LoadStore exception handler in place, IRAM can also be
used for .bss and .data section. Hence the sanity check should be based
upon _iram_text_end and not _iram_end
2020-02-28 15:15:47 -08:00
Yuhui.Zheng
88e32327e9
version bump to v10.3.1 (#16)
* Verion bump from 10.3.0 to 10.3.1.
* version bump in task.h
* change history for 10.3.1.
2020-02-18 22:03:54 -08:00
Yuhui Zheng
210b1ffcc8 Re-sync with upstream and stripping away none kernel related. 2020-02-10 13:45:57 -08:00