Commit Graph

2853 Commits

Author SHA1 Message Date
Richard Barry
75b81a1fab Work in progress update of LPC51U68 MCUXpresso project to rearrange the folder structure and names. 2020-01-09 00:19:36 +00:00
Richard Barry
fbb23055cd Replace portasmHAS_CLINT with configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS definitions in the GCC RISC-V port - portasmHAS_CLIT will still work by deriving the new definitions from the old. 2020-01-07 01:14:36 +00:00
Richard Barry
eaf9318df8 Add Source/portable/ARMClang file that directs users to the GCC port if they which to use the ARMClang compiler. 2020-01-04 00:14:18 +00:00
Richard Barry
881958514b If tickless idle mode is in use then ensure prvResetNextTaskUnblockTime() is called after a task is unblocked due to a bit being set in an event group. This allows the MCU to re-enter sleep mode at the earliest possible time (rather than waiting until the timeout that would occur had the task not being unblocked be the event group) and matches a similar change made for queues and derivative objects (semaphores, etc.) some time ago. 2020-01-03 22:50:31 +00:00
Richard Barry
853856e8cc Correct #error text in multiple fat file system files. 2020-01-03 20:53:27 +00:00
Richard Barry
9e86cb95a7 Add xPortIsInsideInterrupt() to the IAR ARMv7-M ports. 2020-01-03 01:17:29 +00:00
Richard Barry
be3561ed53 Added xTaskAbortDelayFromISR() and ulTaskNotifyValueClear() API functions.
Added tests for xTaskAbortDelayFromISR() into Demo/Common/Minimal/AbortDelay.c.
Added tests for ulTaskNotifyValueClear() into Demo/Common/Minimal/TaskNotify.c.
2020-01-02 18:55:20 +00:00
Richard Barry
0a29d350b1 Renamed RISC-V_RV32_SiFive_HiFive1_IAR directory to RISC-V_RV32_SiFive_HiFive1-RevB_IAR as it targets the RevB hardware. 2020-01-01 22:38:23 +00:00
Richard Barry
62b413627a Minor updates to comment block for xTaskCheckForTimeOut(). 2020-01-01 22:24:44 +00:00
Richard Barry
dfc1bf8ec3 Rename RISC-V_RV32_SiFive_HiFive1-FreedomStudio directory to RISC-V_RV32_SiFive_HiFive1-RevB-FreedomStudio as it targets Rev B of the hardware. 2020-01-01 22:05:35 +00:00
Richard Barry
4b943b35e0 Update RISCC-V-RV32-SiFive_HiFive1_FreedomStudio project to latest tools and metal library versions. 2020-01-01 22:02:06 +00:00
Gaurav Aggarwal
cfa83672ef Rename STM32Cube to GCC for STM32L4 Discovery projects as GCC is
the compiler used.
2020-01-01 00:35:42 +00:00
Gaurav Aggarwal
474182ab39 Make vSetupTimerInterrupt weak in the RVDS M4 MPU port to give the
application writer a chance to override this function. This gives
the application write ability to use a different timer.
2020-01-01 00:04:10 +00:00
Gaurav Aggarwal
22dd9a55ab Update documentation of xTaskCheckForTimeOut function to reflect the
intended use of this API.
2019-12-31 20:49:07 +00:00
Yuhui.Zheng
8f0eaf274c - Updates to projects due to demo folder name change. (IAR source file paths and assembler path were fixed. Keil source file paths were fixed.)
- Added back power static library for GCC and IAR. (Power management related interface definitions are in drivers/fsl_power.h. power.c is empty due to "implementation is in header file and power library")
- Note for GCC link: the command used for linking is `arm-none-eabi-gcc -nostdlib -L<additional lib search path> -Xlinker ... -o "CORTEX_M0+_LPC51U68_LPCXpresso.axf" <all *.o> -lpower`. Per GCC doc, static library name in file system is libpower.a.
2019-12-31 08:06:33 +00:00
Richard Barry
3203c5cc85 Previously the STM32F0518 compiler setting was changed to enable the use of the __weak attribute - however changing the port layer to use #pragma weak in place of __weak means the compiler setting change is not required and removes the risk of introducing incompatibilities - so this check in reverts the compiler settings change. 2019-12-30 22:24:58 +00:00
Richard Barry
cc673eb6a5 Ensure the CORTEX_M0_STM32F0518_IAR demo builds after updates to the Cortex-M0 port layer - required an update to the project settings to allow IAR extensions as the port layer now uses the _weak qualifier. 2019-12-30 22:07:33 +00:00
Richard Barry
801e63bd10 Ensure the LPC1114 demo still builds after updates to the Cortex-M0 port layer - includes minor update to remove compiler warning that resulted from a newer compiler version. 2019-12-30 22:00:26 +00:00
Richard Barry
53c98357b0 Ensure the LPC1114 demo still builds after updates to the Cortex-M0 port layer - includes minor update to remove compiler warning that resulted from a newer compiler version. 2019-12-30 21:59:11 +00:00
Richard Barry
49052a6581 Ensure the XMC1000_IAR_KEIL_GCC projects still build after updates to the Cortex-M0 port layer - minor change to remove warning related to using a newer version of the IAR tools. 2019-12-30 21:44:22 +00:00
Richard Barry
e292c67933 Replace the static prvSetupTimerInterrupt() function in the Cortex-M port layers that still used it (other than MPU ports so far) with a weakly defined function call vPortSetupTimerInterrupt() - which allows application writers to override the function with one that uses a different clock. 2019-12-30 21:16:09 +00:00
Richard Barry
e23d638afd Correct use of xStreamBufferRead() to xStreamBufferReceive() in code comments - no source code changes. 2019-12-30 20:00:49 +00:00
Richard Barry
c72df2f98d Tidy up comments only. 2019-12-27 21:22:07 +00:00
Richard Barry
7ddea8fc8b Enable the Win32 comprehensive test/demo build and run when configUSE_QUEUE_SETS is set to 0. 2019-12-27 21:02:23 +00:00
Richard Barry
70dbc12579 Update the LM3Sxxxx_IAR_Keil demo so the IAR project writes to the UART and executes in QEMU. 2019-12-27 20:59:57 +00:00
Gaurav Aggarwal
cef6548e8b Updates to CM4_MPU RCDS port
- System calls are now only allowed from kernel code. This change can be turned on
  or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
  with ARM recommendations.
2019-12-24 22:45:32 +00:00
Gaurav Aggarwal
18c3e5e02a Remove local paths from the URL files 2019-12-24 19:16:19 +00:00
Richard Barry
05adf564f6 Add readme into the third party RISC-V port that points to the directories that contains the official ports. 2019-12-24 17:24:23 +00:00
Gaurav Aggarwal
ce7e8b87d8 Add IAR MPU project for STM32L475 Discovery Kit IoT Node 2019-12-21 00:04:04 +00:00
Gaurav Aggarwal
96b6746364 Updates to CM4_MPU IAR port
- System calls are now only allowed from kernel code. This change can be turned on
  or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
  with ARM recommendations.
2019-12-21 00:02:31 +00:00
Richard Barry
b27fb82bc1 Increase test coverage for queue sets.
Rename the CORTEX_M0+_LPC51U68_LPCXpresso demo to CORTEX_M0+_LPC51U68_GCC_IAR_KEIL as it supports all three compilers.
2019-12-20 02:54:30 +00:00
Richard Barry
b55bbe55ac Remove build files accidentally checked in.
Remove the CMSIS math library as it is large and not used.
2019-12-20 02:49:15 +00:00
Gaurav Aggarwal
47c666bb1e Add MPU projects for STM32L475 Discovery Kit IoT Node 2019-12-20 02:07:09 +00:00
Gaurav Aggarwal
47d8ac6ac6 Updates to CM4_MPU GCC port
- System calls are now only allowed from kernel code. This change can be turned on
  or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
  with ARM recommendations.
2019-12-20 02:05:44 +00:00
Yuhui.Zheng
c07f60c383 Adding GCC/Keil/IAR projects for NXP LPC51U68 (CM0+).
Please see readme.txt for todo items.
2019-12-18 10:06:30 +00:00
Yuhui.Zheng
9c0e3fe9f1 Cortex M0 GCC/IAR/Keil ports -- tickless support.
The default portMISSED_COUNTS_FACTOR is set to 45 cycles. User could override this value, if a more accurate count is available.
2019-12-18 09:55:08 +00:00
Yuhui.Zheng
3cde02a046 RVDS/Keil weak linkage for vPortSetupTimerInterrupt() -- CM4F, CM3
Test steps are documented in this PR https://github.com/aws/amazon-freertos/pull/1141.
2019-12-18 02:08:06 +00:00
Gaurav Aggarwal
d58e6a7b09 Use linker script variables for MPU setup for Nuvoton M2351 Keil Project
Earlier we were using hard-coded addresses for MPU setup which
were ensured to be the same as linker script setup. This change
updates the Keil uVision project for Nuvoton Numaker-PFM-M2351
to use the variables exported from the linker script. This ensures
that the MPU setup never goes out of sync with linker script.
2019-12-17 01:45:53 +00:00
Gaurav Aggarwal
d449c8979d Use the linker script variables for MPU setup for Keil Simulator Demo
Earlier we were using hard-coded addresses for MPU setup which
were ensured to be the same as linker script setup. This change
updates the Keil Simulator demo to use the variables exported
from the linker script. This ensures that the MPU setup does not
go out of sync with linker script.
2019-12-17 00:14:26 +00:00
Gaurav Aggarwal
66ce9f7d72 Move warning suppression for IAR compiler to portmacro.h for v8M ports
IAR produces some warnings which can not be fixed in the source code because
then other compilers start generating warnings. We suppressed those warnings
in the project file before. This change moves the warning suppression from
project files to portmacro.h.
2019-12-07 01:23:17 +00:00
Yuhui.Zheng
1deeb6dd84 Check socket binding result before doing anything with socket. (This is to address ARG findings.) Breaking the single return rule here, due to precedent violation at line 1039 and 1144.
prvTransferConnect() now returns:
- pdTRUE: everything's good. pdTRUE = 1.
- -pdFREERTOS_ERRNO_ENOMEM: FreeRTOS_socket() failed. -pdFREERTOS_ERRNO_ENOMEM = -12.
- -pdFREERTOS_ERRNO_EINVAL || -pdFREERTOS_ERRNO_ECANCELED: FreeRTOS_bind() failed. Negative values.

Thus, at line 569 and line 617, needs to check != pdTRUE instead of == pdFALSE.

This commit is done on behalf of Alfred.
2019-12-04 07:52:49 +00:00
Richard Barry
9491af1fd7 Fix bug when xQueueOverwrite() and xQueueOverwrite() from ISR are used to overwrite items in two queues that are part of the same set.
Minor queue optimisations.
2019-12-03 01:50:07 +00:00
Richard Barry
e5708b38e9 Add the Labs projects provided in the V10.2.1_191129 zip file. 2019-12-02 23:39:25 +00:00
Richard Barry
46e5937529 Remove guards against __ARMCC_VERSION version numbers that were previously used to avoid compiler warnings in some GCC ARM Cortex ports. 2019-11-21 22:35:21 +00:00
Richard Barry
d1fb8907ab Add software timer to the Win32 blinky demo. 2019-11-18 17:35:40 +00:00
Richard Barry
07622ed3ee Remove driver files that generate compiler warnings from the RISC-V_Renode_Emulator_SoftConsole project.
Update RISC-V ports so the interrupt stack is set to a known value before the scheduler is started if the interrupt stack is statically defined rather than re-using the main.c() stack.
2019-11-18 17:23:14 +00:00
Richard Barry
16639d2d63 Update to the latest atomic.h.
Improve commenting in RISC-V GCC port.
Fix IAR RISC-V port so the first task starts with interrupts enabled.
Add references to third party page ref using newlib with FreeRTOS into the tasks.c file in each place newlib is referenced.
Move the position of the traceTASK_DELETE() trace macro in case of use with a memory allocator that writes over freed memory even when inside a critical section.
Efficiency improvement:  Make sure xTaskIncrementTick() does not return pdTRUE when the scheduler is locked.  This just prevents an unnecessary yield interrupt (unnecessary as it is ignored) when xYieldPending happens to be pdTRUE.
2019-11-18 16:28:03 +00:00
Richard Barry
18916d5820 Rename the RISC-V_RV32_SiFive_Hifive1_GCC folder to RISC-V_RV32_SiFive_HiFive1_FreedomStudio as it is built with Freedom Studio. 2019-10-22 22:30:06 +00:00
Richard Barry
5306ba245d Add nano-specs linker option to HiFive1_GCC demo. 2019-10-22 22:27:55 +00:00
Richard Barry
c0741e36ed Fix spelling mistakes copied and pasted into a couple of RISC-V demo main.c files. 2019-10-22 16:31:57 +00:00