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7d6758ee1a
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73 Commits

Author SHA1 Message Date
Richard Barry
7d6758ee1a Minor updates and change version number for V7.5.0 release. 2013-07-17 18:32:57 +00:00
Richard Barry
7d1292ced2 Linting and MISRA checking 2013-07-15 14:27:15 +00:00
Richard Barry
ce9c3b7413 Variable name change in the PIC32 port layer only. 2013-07-14 13:06:17 +00:00
Richard Barry
da0fff63c9 Update Cortex-M MPU version to include new API functions. 2013-07-13 19:37:35 +00:00
Richard Barry
e5d9640863 Update RX ports to only include additional check on the existing IPL (so it is not lowered) if configASSERT() is defined. 2013-07-13 11:31:35 +00:00
Richard Barry
4b964814de Implement portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for PIC32. 2013-07-12 19:25:21 +00:00
Richard Barry
ad8fa53043 Kernel optimisations. 2013-07-12 11:11:19 +00:00
Richard Barry
5d902f2b9c Complete additions of portASSERT_IF_INTERRUPT_PRIORITY_INVALID() for all RX compiler ports. 2013-07-11 10:05:06 +00:00
Richard Barry
65704174c9 Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the RX ports that use the Renesas compiler. 
Add portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to the Cortex-A9 ports.
 2013-07-09 17:57:59 +00:00
Richard Barry
0f6b0d3a59 Enhance heap_4.c to prevent blocks accidentally being freed twice, or blocks that don't have a valid block link descriptor being freed. 
Update the Cortex-A9 port to include asserts if an ISR safe FreeRTOS function is called from an interrupt that has a higher logical priority than configMAX_SYSCALL_INTERRUPT_PRIORITY (or whatever the CA9 equivalent is called), and also assert if the binary point is not set correctly.
 2013-07-09 12:49:49 +00:00
Richard Barry
c4eef61d39 Added portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to Cortex-M3 and Cortex-M4F ports. 2013-07-04 11:20:28 +00:00
Richard Barry
0c0b54c175 Refine the default tickless idle implementation in the Cortex-M3 port layers. 2013-06-30 10:38:31 +00:00
Richard Barry
a7c47131fa Remove portALIGNMENT_ASSERT_pxCurrentTCB() macro, which serves no purpose. 2013-06-25 13:39:50 +00:00
Richard Barry
6cbbfd2eb5 Slight correction to coding standard in heap_2.c and heap_4.c. 2013-06-25 13:25:08 +00:00
Richard Barry
fb47260e80 Improve efficiency of memory allocation when the memory block is already aligned correctly. 2013-06-25 12:20:29 +00:00
Richard Barry
c3f9e3c5ff Update RVDS port layer to match IAR port layer. 2013-06-20 14:56:40 +00:00
Richard Barry
5013baa2cd RVDS ARM Cortex-A port layer. 2013-06-20 12:47:21 +00:00
Richard Barry
04dafed839 IAR ARM Cortex-A port layer. 2013-06-20 12:20:40 +00:00
Richard Barry
2fd431e971 Modify the GCC/AVR port to make use of the xTaskIncrementTick return value. 
Add pre-processor directives in the dsPIC and PIC24 port layers that allows both port files to be included in the same project.
 2013-06-11 20:15:15 +00:00
Richard Barry
62c0ae0926 Update port layers to make better use of the xTaskIncrementTick() return value. 2013-06-08 18:36:25 +00:00
Richard Barry
59a834eb86 Update ports that have their tick configuration in an application callback to use xTaskIncrementTick() in place of vTaskIncrementTick(). 2013-06-07 12:39:56 +00:00
Richard Barry
c04b074707 Convert the remaining ports to use xTaskIncrementTick() in place of vTaskIncremenTick(). 2013-06-07 12:16:58 +00:00
Richard Barry
2fc9d033c6 Update the PIC32 port to use xTaskIncrementTick() and change the macro used to detect if XC is being used. 2013-06-07 11:15:43 +00:00
Richard Barry
51d9ee0c1c Add configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS mechanism to the relevant port.c file to allow the user to define functions that will execute in privileged mode. 2013-06-07 09:45:34 +00:00
Richard Barry
f904d26957 Convert more ports to use xTaskIncrementTick() in place of vTaskIncrementTick(). 2013-06-06 16:31:15 +00:00
Richard Barry
15ec6c87f7 Convert mpre ports to use xTaskIncrementTick() in place of vTaskIncrementTick(). 2013-06-06 16:06:48 +00:00
Richard Barry
686d190798 Convert some ports to use xTaskIncrementTick() in place of vTaskIncrementTick(). 
Move DSB instructions to before WFI instructions in line with ARM recommendations.
 2013-06-06 15:46:40 +00:00
Richard Barry
06953169ba Update RM48/TMS570 port to use xTaskIncrementTick in place of vTaskIncrementTick. 2013-06-06 13:06:24 +00:00
Richard Barry
a03b171992 Fix compiler warning in psp_test.c when compiled with ARM compiler. 
Add portYIELD_FROM_ISR() macros to Cortex-M ports.  The new macro just calls the exiting portEND_SWITCHING_ISR() macro.
Remove code from the MSVC port layer that was left over from a previous implementation and become obsolete.
 2013-05-19 09:43:00 +00:00
Richard Barry
fb9662009a Update comments in Atmel Studio CreateProjectDirectoryStructure.bat files to remove references to replace references to Eclipse with references to Atmel Studio. 
Update the tickless idle implementations that use up counters for tick interrupt generate to ensure they remain in low power mode for the desired time instead of one tick less than the desired time.
 2013-05-09 09:56:04 +00:00
Richard Barry
96ceae8edd Update version number ready to release the FAT file system demo. 2013-04-30 21:42:41 +00:00
Richard Barry
f9918345e1 Update version numbers to V7.4.1. 2013-04-18 12:58:17 +00:00
Richard Barry
2b41be4cb9 Update yield code in RX200/Renesas compiler port. 2013-04-17 08:55:16 +00:00
Richard Barry
0013028c7a Update yield code in RX600/IAR compiler port. 2013-04-17 08:46:10 +00:00
Richard Barry
4f5f527c73 Update yield code in RX600/Renesas compiler port. 2013-04-17 08:35:20 +00:00
Richard Barry
b7487b8dc2 Update yield code in RX600/GCC port. 2013-04-17 08:23:02 +00:00
Richard Barry
a69933782d Add RX100 Renesas compiler port layer. 2013-04-16 15:59:21 +00:00
Richard Barry
74290b4425 Add RX100 IAR port layer. 2013-04-16 15:58:46 +00:00
Richard Barry
a0056e8fd3 Add RX100 GCC port layer. 2013-04-16 15:58:14 +00:00
Richard Barry
9a15f50b00 Add memory barrier instructions to Tasking CM4F port. 2013-04-16 15:50:17 +00:00
Richard Barry
7132e88685 Add memory barrier instructions to the RVDS CM3 ports. 2013-04-16 15:30:43 +00:00
Richard Barry
895ee2bb3e Add barrier instructions to IAR CM3 ports. 2013-04-16 14:56:49 +00:00
Richard Barry
d135e45676 Replace the read back of the software interrupt register with barrier instructions (CCS/RM48/TMS570). 2013-04-16 14:17:35 +00:00
Richard Barry
0527099b51 Add barrier instructions to the GCC CM3 ports. 2013-04-16 14:16:30 +00:00
Richard Barry
6d20e2b5cd Add barrier instructions to GCC CM3/4 code. 2013-04-07 19:43:52 +00:00
Richard Barry
3762630f27 RL78/IAR port - Allow the end user to define their own tick interrupt configuration by defining configSETUP_TIMER_INTERRUPT(). 2013-03-25 17:00:13 +00:00
Richard Barry
a9b8f0ca69 Minor mods common files to fix warnings generated by Renesas compiler. 
Correct the header comments in het.c and het.h (RM48/TMS570 demo) which were corrupt.
Correct version numbers in RX63N Renesas compiler demo.
Ensure stacks set up for tasks in the RX200 port layer end on 8 byte boundaries (was 4, which didn't matter but didn't match the definition).
Replaced unqualified (unsigned) in calls to standard functions with (size_t).
 2013-03-25 16:30:42 +00:00
Richard Barry
caf1fbc899 Ensure IAR RL port layer works on devices using two different naming conventions for the interval timer registers. 2013-03-18 16:40:47 +00:00
Richard Barry
8c66fdbb8c Updated IAR RL78 port layer. 2013-03-17 16:54:17 +00:00
Richard Barry
17bba16fa6 Added YRDKRL78G14 build configuration to the IAR RL78 demo. 2013-02-24 19:48:26 +00:00