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Author SHA1 Message Date
Richard Barry
7bea399061 Update libraries and sundry check-ins ready for the V10.3.0 kernel release. 2020-02-06 18:52:35 +00:00
Yuhui.Zheng
d319bb0c71 ESP GCC port -- Added LoadStore Exception handlers. 
https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/9 -- Handles LoadStoreErrorCause and LoadStoreAlignmentCause allowing to use 32-bit memory region (IRAM) as 8-bit or 16-bit memory region
 2020-01-31 19:31:50 +00:00
Yuhui.Zheng
9fdfbf33e9 Sync FreeRTOS-Labs -CLI -TCP -Trace with the version in FreeRTOS-Plus. 
Projects under FreeRTOS-Labs directory are in beta, developers updating projects please make sure you are using the correct version of -CLI -TCP -Trace. If you must edit -CLI -TCP and -Trace, please ensure the copies are synced.
 2020-01-31 19:21:15 +00:00
Yuhui.Zheng
ec6f3d77c3 Sync FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP with the version in GitHub at (23665258cabe49d5d68ba23968b6845a7c80eb34). 
Notes: 
- header has version 2.2.0. 
- This sync did not bring in ./test directory, though we should. 
- New NetworkInterfaces are introduced by this merge.
- Keil compiler support. 
- FreeRTOS_IP.h new API xApplicationGetRandomNumber().
- FreeRTOS_IP_Private.h new eIPEvent_t eNetworkTxEvent. 
- FreeRTOS_Stream_Buffer.h removing static xStreamBufferIsEmpty() and xStreamBufferIsFull().
- FreeRTOSConfigDefaults.h provides default ipconfigDNS_RECEIVE_BLOCK_TIME_TICKS. 
- other type changes.
 2020-01-31 00:07:53 +00:00
Yuhui.Zheng
0c1c85a9dd Removing RISC-V port under ThirdParty. 
RISC-V ports for IAR and GCC can now be found under \FreeRTOS\Source\portable\GCC\RISC-V and \FreeRTOS\Source\portable\IAR\RISC-V.
 2020-01-30 22:23:03 +00:00
Yuhui.Zheng
99e796eb01 Removing unnecessary ThirdParty ports -- Wiced_CY and nrf52840-dk. 
For projects depending on either of these two ports, please update your projects according to below:
Wiced_CY -- Use GCC/ARM_CRx_No_GIC instead. 
nrf52840-dk -- Use GCC/ARM_CM7/r0p1 instead. Please note that, kernel port shall only take dependency on MCU core, not MCU peripherals. (Please take out RTC related from kernel port.) For low power feature (tickless) in FreeRTOS, please follow this page https://www.freertos.org/low-power-ARM-cortex-rtos.html. In case ARM_CM7/rop1 is missing any feature, reach out to us.
 2020-01-30 19:45:03 +00:00
Richard Barry
4d4493e61a Remove the FreeRTOS-IoT-Libraries from FreeRTOS-Plus as it was an old copy with a newer copy in FreeRTOS-Labs. 2020-01-30 00:05:23 +00:00
Richard Barry
0d54d1c4dc Correct an err in queue.c introduced when previously updating behaviour when queue sets are used in combination with queue overwrites. 2020-01-29 19:52:38 +00:00
Yuhui.Zheng
f5b5b2db04 Cleaning up LPC51U68 projects: 
- user playable settings are all in FreeRTOSConfig.h.
- removed reference to IntQueue.h in main_full.c
- readme.txt wording.
 2020-01-24 07:53:14 +00:00
Richard Barry
2415dc26b0 Introduce the portSOFTWARE_BARRIER macro which thus far is only used by the Win32 demo to hold execution up in case a simulated interrupt is executing simultaneously. That should never happen as all threads should execute on the same core, but we have had numerous reports that this and other Win32 port changes we have made fixed these issues - although we have not been able to replicate them ourselves. 2020-01-23 23:49:24 +00:00
Gaurav Aggarwal
18f87e8c33 Add MPU demo project for Nulceo-L152RE which is Coretx-M3. 2020-01-23 01:56:36 +00:00
Gaurav Aggarwal
e058a65b16 Updates to CM3_MPU GCC port 
- System calls are now only allowed from kernel code. This change can be turned on
  or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
  with ARM recommendations.
 2020-01-23 01:50:25 +00:00
Richard Barry
42a0eaafdc Ensure both one-shot and auto-reload are written consistently with a hyphen in comments. 2020-01-16 04:25:29 +00:00
Richard Barry
9456992c1f Added uxTimerGetReloadMode() API function. 2020-01-16 04:10:18 +00:00
Gaurav Aggarwal
c472c5b04f Add MPU demo project for LPC54018 board. 2020-01-12 12:33:17 +00:00
Yuhui.Zheng
0d95aca202 Introduce a port for T-HEAD CK802. A simple demo for T-HEAD CB2201 is also included. 2020-01-10 07:53:14 +00:00
Richard Barry
d2914041f8 Update the GCC and IAR SiFive HiFive rev-b demos to use the new configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS constants in place of the deprecated configCLINT_BASE_ADDRESS constant. 
Update the IAR RISC-V HiFive demo to use the latest IAR Embedded Workbench version.
 2020-01-09 02:28:45 +00:00
Richard Barry
066e2bc7d2 Replace portasmHAS_CLINT with configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS definitions in the IAR RISC-V port - portasmHAS_CLIT will still work by deriving the new definitions from the old. 2020-01-09 02:23:51 +00:00
Richard Barry
75b81a1fab Work in progress update of LPC51U68 MCUXpresso project to rearrange the folder structure and names. 2020-01-09 00:19:36 +00:00
Richard Barry
fbb23055cd Replace portasmHAS_CLINT with configMTIME_BASE_ADDRESS and configMTIMECMP_BASE_ADDRESS definitions in the GCC RISC-V port - portasmHAS_CLIT will still work by deriving the new definitions from the old. 2020-01-07 01:14:36 +00:00
Richard Barry
eaf9318df8 Add Source/portable/ARMClang file that directs users to the GCC port if they which to use the ARMClang compiler. 2020-01-04 00:14:18 +00:00
Richard Barry
881958514b If tickless idle mode is in use then ensure prvResetNextTaskUnblockTime() is called after a task is unblocked due to a bit being set in an event group. This allows the MCU to re-enter sleep mode at the earliest possible time (rather than waiting until the timeout that would occur had the task not being unblocked be the event group) and matches a similar change made for queues and derivative objects (semaphores, etc.) some time ago. 2020-01-03 22:50:31 +00:00
Richard Barry
853856e8cc Correct #error text in multiple fat file system files. 2020-01-03 20:53:27 +00:00
Richard Barry
9e86cb95a7 Add xPortIsInsideInterrupt() to the IAR ARMv7-M ports. 2020-01-03 01:17:29 +00:00
Richard Barry
be3561ed53 Added xTaskAbortDelayFromISR() and ulTaskNotifyValueClear() API functions. 
Added tests for xTaskAbortDelayFromISR() into Demo/Common/Minimal/AbortDelay.c.
Added tests for ulTaskNotifyValueClear() into Demo/Common/Minimal/TaskNotify.c.
 2020-01-02 18:55:20 +00:00
Richard Barry
0a29d350b1 Renamed RISC-V_RV32_SiFive_HiFive1_IAR directory to RISC-V_RV32_SiFive_HiFive1-RevB_IAR as it targets the RevB hardware. 2020-01-01 22:38:23 +00:00
Richard Barry
62b413627a Minor updates to comment block for xTaskCheckForTimeOut(). 2020-01-01 22:24:44 +00:00
Richard Barry
dfc1bf8ec3 Rename RISC-V_RV32_SiFive_HiFive1-FreedomStudio directory to RISC-V_RV32_SiFive_HiFive1-RevB-FreedomStudio as it targets Rev B of the hardware. 2020-01-01 22:05:35 +00:00
Richard Barry
4b943b35e0 Update RISCC-V-RV32-SiFive_HiFive1_FreedomStudio project to latest tools and metal library versions. 2020-01-01 22:02:06 +00:00
Gaurav Aggarwal
cfa83672ef Rename STM32Cube to GCC for STM32L4 Discovery projects as GCC is 
the compiler used.
 2020-01-01 00:35:42 +00:00
Gaurav Aggarwal
474182ab39 Make vSetupTimerInterrupt weak in the RVDS M4 MPU port to give the 
application writer a chance to override this function. This gives
the application write ability to use a different timer.
 2020-01-01 00:04:10 +00:00
Gaurav Aggarwal
22dd9a55ab Update documentation of xTaskCheckForTimeOut function to reflect the 
intended use of this API.
 2019-12-31 20:49:07 +00:00
Yuhui.Zheng
8f0eaf274c - Updates to projects due to demo folder name change. (IAR source file paths and assembler path were fixed. Keil source file paths were fixed.) 
- Added back power static library for GCC and IAR. (Power management related interface definitions are in drivers/fsl_power.h. power.c is empty due to "implementation is in header file and power library")
- Note for GCC link: the command used for linking is `arm-none-eabi-gcc -nostdlib -L<additional lib search path> -Xlinker ... -o "CORTEX_M0+_LPC51U68_LPCXpresso.axf" <all *.o> -lpower`. Per GCC doc, static library name in file system is libpower.a.
 2019-12-31 08:06:33 +00:00
Richard Barry
3203c5cc85 Previously the STM32F0518 compiler setting was changed to enable the use of the __weak attribute - however changing the port layer to use #pragma weak in place of __weak means the compiler setting change is not required and removes the risk of introducing incompatibilities - so this check in reverts the compiler settings change. 2019-12-30 22:24:58 +00:00
Richard Barry
cc673eb6a5 Ensure the CORTEX_M0_STM32F0518_IAR demo builds after updates to the Cortex-M0 port layer - required an update to the project settings to allow IAR extensions as the port layer now uses the _weak qualifier. 2019-12-30 22:07:33 +00:00
Richard Barry
801e63bd10 Ensure the LPC1114 demo still builds after updates to the Cortex-M0 port layer - includes minor update to remove compiler warning that resulted from a newer compiler version. 2019-12-30 22:00:26 +00:00
Richard Barry
53c98357b0 Ensure the LPC1114 demo still builds after updates to the Cortex-M0 port layer - includes minor update to remove compiler warning that resulted from a newer compiler version. 2019-12-30 21:59:11 +00:00
Richard Barry
49052a6581 Ensure the XMC1000_IAR_KEIL_GCC projects still build after updates to the Cortex-M0 port layer - minor change to remove warning related to using a newer version of the IAR tools. 2019-12-30 21:44:22 +00:00
Richard Barry
e292c67933 Replace the static prvSetupTimerInterrupt() function in the Cortex-M port layers that still used it (other than MPU ports so far) with a weakly defined function call vPortSetupTimerInterrupt() - which allows application writers to override the function with one that uses a different clock. 2019-12-30 21:16:09 +00:00
Richard Barry
e23d638afd Correct use of xStreamBufferRead() to xStreamBufferReceive() in code comments - no source code changes. 2019-12-30 20:00:49 +00:00
Richard Barry
c72df2f98d Tidy up comments only. 2019-12-27 21:22:07 +00:00
Richard Barry
7ddea8fc8b Enable the Win32 comprehensive test/demo build and run when configUSE_QUEUE_SETS is set to 0. 2019-12-27 21:02:23 +00:00
Richard Barry
70dbc12579 Update the LM3Sxxxx_IAR_Keil demo so the IAR project writes to the UART and executes in QEMU. 2019-12-27 20:59:57 +00:00
Gaurav Aggarwal
cef6548e8b Updates to CM4_MPU RCDS port 
- System calls are now only allowed from kernel code. This change can be turned on
  or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
  with ARM recommendations.
 2019-12-24 22:45:32 +00:00
Gaurav Aggarwal
18c3e5e02a Remove local paths from the URL files 2019-12-24 19:16:19 +00:00
Richard Barry
05adf564f6 Add readme into the third party RISC-V port that points to the directories that contains the official ports. 2019-12-24 17:24:23 +00:00
Gaurav Aggarwal
ce7e8b87d8 Add IAR MPU project for STM32L475 Discovery Kit IoT Node 2019-12-21 00:04:04 +00:00
Gaurav Aggarwal
96b6746364 Updates to CM4_MPU IAR port 
- System calls are now only allowed from kernel code. This change can be turned on
  or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY.
- MPU is disabled before reprogramming it and enabled afterwards to be compliant
  with ARM recommendations.
 2019-12-21 00:02:31 +00:00
Richard Barry
b27fb82bc1 Increase test coverage for queue sets. 
Rename the CORTEX_M0+_LPC51U68_LPCXpresso demo to CORTEX_M0+_LPC51U68_GCC_IAR_KEIL as it supports all three compilers.
 2019-12-20 02:54:30 +00:00
Richard Barry
b55bbe55ac Remove build files accidentally checked in. 
Remove the CMSIS math library as it is large and not used.
 2019-12-20 02:49:15 +00:00