Commit Graph

9 Commits

Author SHA1 Message Date
Richard Barry
d135e45676 Replace the read back of the software interrupt register with barrier instructions (CCS/RM48/TMS570). 2013-04-16 14:17:35 +00:00
Richard Barry
a5d0e3f0c1 Prepare for V7.4.0 release. 2013-02-19 18:36:58 +00:00
Richard Barry
4e7b460eaf Replace the CLZ function with a CLZ intrinsic in the Cortex-R4 port layer.
Add EDS support in the PIC24 port layer.
Remove unnecessary EHB instructions from PIC32 port.
In the PIC32 port assembly code, replace the &= code with a single ins instruction.
2013-01-23 16:06:45 +00:00
Richard Barry
9fe5156b53 Work around compiler bug in CCS5 by replacing the _call_swi() function with a #pragma SWI_ALIAS. 2012-10-29 11:38:19 +00:00
Richard Barry
f5c52bdb1d Re-jig some of the new functions to correctly assign them public or private linkage, and remove some functions that were added in but never used. 2012-10-22 16:40:45 +00:00
Richard Barry
f06a945444 Prepare for V7.3.0 release. 2012-10-16 12:17:47 +00:00
Richard Barry
e03ab659f3 Add tickless idle support in Cortex-M ports.
Change CCS R4 directory name.
2012-10-16 07:55:40 +00:00
Richard Barry
e0bab5981a Prepare for V7.2.0 release. 2012-08-14 12:14:48 +00:00
Richard Barry
f508a5f653 Add FreeRTOS-Plus directory. 2012-08-11 21:34:11 +00:00