Commit Graph

23 Commits

Author SHA1 Message Date
Richard Barry
b51529a284 Update version number ready for next release. 2019-05-11 01:47:37 +00:00
Richard Barry
58ba10eee8 Update version number in readiness for V10.2.0 release. 2019-02-17 22:36:16 +00:00
Richard Barry
92ae8e7aff Update version numbers ready for release. 2018-09-07 18:13:20 +00:00
Richard Barry
3a1631fda3 Update copyright date ready for tagging V10.1.0. 2018-08-22 23:23:03 +00:00
Richard Barry
fb9de58f56 Update version numbers in preparation for a new release. 2018-08-21 19:50:48 +00:00
Richard Barry
13651934be Roll up the minor changes checked into svn since V10.0.0 into new V10.0.1 ready for release. 2017-12-18 22:54:18 +00:00
Richard Barry
cfc268814a Update to MIT licensed FreeRTOS V10.0.0 - see https://www.freertos.org/History.txt 2017-11-29 16:53:26 +00:00
Richard Barry
6eea3d8d4b Correct long time mis-spelled portINITIAL_EXEC_RETURN to portINITIAL_EXC_RETURN 2017-05-30 00:36:09 +00:00
Richard Barry
464c2660ad Updates to the Cortex-M tickless idle code to reduce clock slippage.
Updates to prevent the vTaskSwitchContext() function being removed from GCC builds when link time optimisation is used.
2017-03-28 03:13:48 +00:00
Richard Barry
8d041c8e21 Update version number in preparation for maintenance release. 2017-01-22 05:28:13 +00:00
Richard Barry
75ffac21d7 Changes to core code and port layer:
+ Add configASSERT() into ARM Cortex-M ports to check the number of priority
      bit settings.
    + Clear the 'control' register before starting ARM Cortex-M4F ports in case
      the FPU is used before the scheduler is started.  This just saves a few
      bytes on the main stack as it prevents space being left for a later save
      of FPU registers.
    + Added xSemaphoreGetMutexHolderFromISR().
    + Corrected use of portNVIC_PENDSVSET to portNVIC_PENDSVSET_BIT in MPU ports.
2016-08-16 11:38:58 +00:00
Richard Barry
bdbf347c22 Remove clrex instruction from Cortex-M ports again as it is implicit in interrupt entry. 2016-06-28 10:39:25 +00:00
Richard Barry
c296e2cff8 Improvements to the Cortex-M ports:
- Clear the SysTick current value register before starting the SysTick (only required if something uses SysTick before starting the scheduler).
- Ensure atomic operations are thread safe by executing clrex in the context switch.
2016-06-27 13:13:05 +00:00
Richard Barry
2bd7884ace Prepare for V9.0.0 release:
+ Change version number from V9.0.0rc2 to V9.0.0.
2016-05-20 18:05:46 +00:00
Richard Barry
255145bde1 xTaskGetTaskHandle() changed to xTaskGetHandle().
Tidy up CEC1302 demo.
Ensure bit 0 of the task address is clear when setting up stack of initial Cortex-M3/4/7 stacks (for strict compliance, although not practically necessary).
vTaskGetTaskInfo() changed to vTaskGetInfo() - with a macro added for backward compatibility.
2016-04-15 11:48:07 +00:00
Richard Barry
07ac1399ee Update version number to 9.0.0rc2. 2016-03-30 12:20:36 +00:00
Richard Barry
d3ba0aa98d Update version number ready for version 9 release candidate 1. 2016-02-18 17:11:14 +00:00
Richard Barry
d7253324cd Prepare for a FreeRTOS V9 release candidate:
- Remove the standard demo files that used the [long since deprecated] alternative API.
- Add standard demo task that tests the new xTaskAbortDelay() function.
- Update the Win32 Visual Studio project to use Visual Studio 2015 Community Edition.
- Rename the xGenericListItem TCB member to xStateListItem as it better describes the member's purpose.
2016-02-18 10:07:42 +00:00
Richard Barry
e9561c946c Kernel changes:
+ Support tickless idle when configUSE_PREEMPTION is 0 (previously tickless idle was only supported when the pre-emptive scheduler was being used).
+ If a stack was statically allocated, then don't try freeing it if the TCB cannot be allocated.
+ Remove use of INCLUDE_xEventGroupsSetBitsFromISR() pre-processor macro, as it was not tested anyway.

Demo app changes:

+ Updated SAM4L Atmel Studio project to use Atmel Studio 7.
2015-11-20 14:11:11 +00:00
Richard Barry
825b43a188 Update version number ready for the V8.2.3 release. 2015-10-16 14:57:00 +00:00
Richard Barry
99d4f2c454 Update version numbers in preparation for new release. 2015-08-05 12:59:42 +00:00
Richard Barry
693d0520bc Update version number ready for V8.2.1 release. 2015-03-21 21:03:42 +00:00
Richard Barry
63b3c773d5 Kernel changes:
Exclude the entire croutine.c file when configUSE_CO_ROUTINES is 0.

New ports:
Added Cortex-M7 IAR and Keil port layers that include a minor errata workaround r0p1 Cortex-M7 devices.
Added Cortex-M4F port layer for CCS.

New demo applications:
Added demo application for STM32F7.
Added demo application for SAMv71.
2015-03-21 14:01:43 +00:00