Richard Barry
0c56f5018d
Add some defensive programming in the default tickless mode in case the application supplied post tick hook takes a long time to complete.
2013-10-08 12:33:46 +00:00
Richard Barry
aedf7824cb
Introduce the prvTaskExitError() function for all ARM_CMn ports.
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Introduce the configTASK_RETURN_ADDRESS macro for the GCC ARM_CMn ports.
Improve time slippage penalty when entering tickless mode is abandoned.
2013-10-08 11:30:40 +00:00
Richard Barry
2f754d9b0c
Add additional critical section to the default tickless implementations.
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Update version number for maintenance release.
2013-07-24 09:45:17 +00:00
Richard Barry
3cbe0a724d
Update version number.
2013-07-23 10:51:45 +00:00
Richard Barry
679a3c670c
Update the Cortex-M vPortValidateInterruptPriority() implementation to ensure compatibility with the STM32 standard peripheral library.
2013-07-23 09:44:00 +00:00
Richard Barry
7d6758ee1a
Minor updates and change version number for V7.5.0 release.
2013-07-17 18:32:57 +00:00
Richard Barry
c4eef61d39
Added portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to Cortex-M3 and Cortex-M4F ports.
2013-07-04 11:20:28 +00:00
Richard Barry
0c0b54c175
Refine the default tickless idle implementation in the Cortex-M3 port layers.
2013-06-30 10:38:31 +00:00
Richard Barry
686d190798
Convert some ports to use xTaskIncrementTick() in place of vTaskIncrementTick().
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Move DSB instructions to before WFI instructions in line with ARM recommendations.
2013-06-06 15:46:40 +00:00
Richard Barry
96ceae8edd
Update version number ready to release the FAT file system demo.
2013-04-30 21:42:41 +00:00
Richard Barry
f9918345e1
Update version numbers to V7.4.1.
2013-04-18 12:58:17 +00:00
Richard Barry
0527099b51
Add barrier instructions to the GCC CM3 ports.
2013-04-16 14:16:30 +00:00
Richard Barry
6d20e2b5cd
Add barrier instructions to GCC CM3/4 code.
2013-04-07 19:43:52 +00:00
Richard Barry
a5d0e3f0c1
Prepare for V7.4.0 release.
2013-02-19 18:36:58 +00:00
Richard Barry
902f9e1a58
Update PIC32 demo application to remove reliance on PLIB functions.
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Update the default low power implementation in all the Cortex-M port layers to add a small critical section.
2013-02-18 16:41:11 +00:00
Richard Barry
ac78adae4b
Added INCLUDE_xSemaphoreGetMutexHolder() default.
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Changed eTaskStateGet() to eTaskGetState() and added #define to ensure backward compatibility.
Added configEXPECTED_IDLE_TIME_BEFORE_SLEEP definition - was previously hard coded to 2.
Slight change to the default CM3 tickless sleep function to allow the idle time to be set to zero in the pre-sleep processing macro.
Changed stack alignment for the FreeRTOS-MPU port to ensure it didn't trigger the assert() in the generic create function.
2013-01-31 14:18:03 +00:00
Richard Barry
ba686260ca
Make CM3/4 tick configuration a weak function to allow application writers to use an alternative tick source.
2012-10-29 15:56:26 +00:00
Richard Barry
f5c52bdb1d
Re-jig some of the new functions to correctly assign them public or private linkage, and remove some functions that were added in but never used.
2012-10-22 16:40:45 +00:00
Richard Barry
f06a945444
Prepare for V7.3.0 release.
2012-10-16 12:17:47 +00:00
Richard Barry
e03ab659f3
Add tickless idle support in Cortex-M ports.
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Change CCS R4 directory name.
2012-10-16 07:55:40 +00:00
Richard Barry
e0bab5981a
Prepare for V7.2.0 release.
2012-08-14 12:14:48 +00:00
Richard Barry
73ad4387e2
Remove the remnants of the legacy trace functionality (since replaced with FreeRTOS+Trace).
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Replaced the #error that traps configMAX_SYSCALL_INTERRUPT_PRIORITY being set to 0 with a configASSERT() for GCC Cortex-M3/4 ports as the #error does not work if configMAX_SYSCALL_INTERRUPT_PRIORITY includes any casting. Not a problem for other compilers as they cannot have casting anyway as that would break the assembly code.
2012-08-12 17:05:23 +00:00
Richard Barry
f508a5f653
Add FreeRTOS-Plus directory.
2012-08-11 21:34:11 +00:00
