+ Support tickless idle when configUSE_PREEMPTION is 0 (previously tickless idle was only supported when the pre-emptive scheduler was being used).
+ If a stack was statically allocated, then don't try freeing it if the TCB cannot be allocated.
+ Remove use of INCLUDE_xEventGroupsSetBitsFromISR() pre-processor macro, as it was not tested anyway.
Demo app changes:
+ Updated SAM4L Atmel Studio project to use Atmel Studio 7.
Windows port: Add code to ensure Windows threads are truely suspended before resuming another thread.
Typo correction to the task notification standard demo task.
Correct case of some include file names to fix build issues on Linux.
Allow the stats formatting functions to be built in without stdio.h being included inside tasks.c.
Kernel port code:
- Slight change to the Cortex-A GIC-less port to move all non portable code to the application level.
SAMA5D4 demo project:
- Update the Atmel provided library to V1.1.
- Create a DDR build configuration.
- Ensure interrupts are all edge sensitive.
- Update the regtest code to use all 32 flop registers.
- Re-introduce the ability to give a mutex from an ISR.
Common demo code:
- Add additional tests into the GenQTest files for priority inheritance and using a mutex from an ISR.
- Add additional tests to GenQTest.c to test the updated priority inheritance mechanism.
- Slightly increase some delays in recmutex.c to prevent it reporting false errors in high load test cases.
SAMA5D3 Xplained IAR demo:
- Remove space being allocated for stacks that are not used.
- Remove explicit enabling of interrupts in ISR handers as this is now done from the central ISR callback before the individual handers are invoked.
- Reduce both the allocated heap size and the stack allocated to each task.
- Enable I cache.
- Add full interrupt nesting tests.
- Add additional critical section/context switching tests.
- Set interrupt priorities so everything can run at once without any software watchdog errors.
- Re-enable interrupts in each IRQ handler.
- Add in run-time stats.
