CloudEdge/FreeRTOS-Kernel
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35 Commits

Author SHA1 Message Date
Richard Barry
113220628f Add code to assert() if non ISR safe API function is called from ISR in IAR and GCC CM3 and CM4F ports - Keil and tasking to follow. 2014-06-14 13:56:25 +00:00
Richard Barry
0bb794301a Update version number ready for release. 2014-04-24 14:26:36 +00:00
Richard Barry
e101e7e437 Update version number to V8.0.0 (without the release candidate number). 2014-02-18 14:01:57 +00:00
Richard Barry
a56d4b998c Minor tidy ups that don't effect code generation, plus: 
When a task is unblocked the need for a context switch is only signalled if the unblocked task has a priority higher than the currently running task, instead of higher than or equal to the priority of the currently running task.
 2014-01-05 20:12:20 +00:00
Richard Barry
a8836b5c43 Change version numbers ready for V8.0.0 release candidate 1 tag. 2013-12-31 20:10:09 +00:00
Richard Barry
2aa19f1a14 Add xEventGroupClearBitsFromISR() and xEventGroupGetBitsFromISR() functions. 
Move some types defines out of generic kernel headers into feature specific headers.
Convert the function prototype dypedefs to the new _t naming.
 2013-12-31 16:45:49 +00:00
Richard Barry
e95b482f56 Minor updates to demo projects to ensure correct building with V8 rc1. 2013-12-30 11:24:34 +00:00
Richard Barry
3e20aa7d60 Replace standard types with stdint.h types. 
Replace #define types with typedefs.
Rename all typedefs to have a _t extension.
Add #defines to automatically convert old FreeRTOS specific types to their new names (with the _t).
 2013-12-29 14:06:04 +00:00
Richard Barry
4b2f9dad42 Force the SysTick clock bit to be set in Cortex-M3 and Cortex-M4F bits if configSYSTICK_CLOCK_HZ is not defined, otherwise leave the bit as it is found as the SysTick may use a divided clock. 2013-12-15 10:27:37 +00:00
Richard Barry
0d1e12522b Update Cortex-M3 and Cortex-M4F ports to allow the SysTick to be clocked at a different speed than the system clock (as is done in the recent STM32L demo. ). 
Add additional asserts and isb instructions into the Cortex-M3 and Cortex-M4F ports.
 2013-12-12 14:07:20 +00:00
Richard Barry
00ad1a0200 Multiple tidy up, documentation corrections and typo corrections highlighted by Tamas Kleiber's diligent review. 2013-11-28 10:48:33 +00:00
Richard Barry
0cd79ad81d Change version numbers in preparation for V7.6.0 release. 2013-11-08 11:47:35 +00:00
Richard Barry
a12ea2d212 Update FreeRTOS version number to V7.5.3 
Update FreeRTOS+CLI version number to V1.0.2
Update FreeRTOS+UDP version number to V1.0.1
 2013-10-14 19:56:47 +00:00
Richard Barry
0c56f5018d Add some defensive programming in the default tickless mode in case the application supplied post tick hook takes a long time to complete. 2013-10-08 12:33:46 +00:00
Richard Barry
c40370e96a Fix a few typos and remove the "register" keyword. 2013-08-16 13:31:54 +00:00
Richard Barry
2f754d9b0c Add additional critical section to the default tickless implementations. 
Update version number for maintenance release.
 2013-07-24 09:45:17 +00:00
Richard Barry
3cbe0a724d Update version number. 2013-07-23 10:51:45 +00:00
Richard Barry
679a3c670c Update the Cortex-M vPortValidateInterruptPriority() implementation to ensure compatibility with the STM32 standard peripheral library. 2013-07-23 09:44:00 +00:00
Richard Barry
7d6758ee1a Minor updates and change version number for V7.5.0 release. 2013-07-17 18:32:57 +00:00
Richard Barry
c4eef61d39 Added portASSERT_IF_INTERRUPT_PRIORITY_INVALID() implementation to Cortex-M3 and Cortex-M4F ports. 2013-07-04 11:20:28 +00:00
Richard Barry
0c0b54c175 Refine the default tickless idle implementation in the Cortex-M3 port layers. 2013-06-30 10:38:31 +00:00
Richard Barry
15ec6c87f7 Convert mpre ports to use xTaskIncrementTick() in place of vTaskIncrementTick(). 2013-06-06 16:06:48 +00:00
Richard Barry
686d190798 Convert some ports to use xTaskIncrementTick() in place of vTaskIncrementTick(). 
Move DSB instructions to before WFI instructions in line with ARM recommendations.
 2013-06-06 15:46:40 +00:00
Richard Barry
96ceae8edd Update version number ready to release the FAT file system demo. 2013-04-30 21:42:41 +00:00
Richard Barry
f9918345e1 Update version numbers to V7.4.1. 2013-04-18 12:58:17 +00:00
Richard Barry
895ee2bb3e Add barrier instructions to IAR CM3 ports. 2013-04-16 14:56:49 +00:00
Richard Barry
a5d0e3f0c1 Prepare for V7.4.0 release. 2013-02-19 18:36:58 +00:00
Richard Barry
902f9e1a58 Update PIC32 demo application to remove reliance on PLIB functions. 
Update the default low power implementation in all the Cortex-M port layers to add a small critical section.
 2013-02-18 16:41:11 +00:00
Richard Barry
ac78adae4b Added INCLUDE_xSemaphoreGetMutexHolder() default. 
Changed eTaskStateGet() to eTaskGetState() and added #define to ensure backward compatibility.
Added configEXPECTED_IDLE_TIME_BEFORE_SLEEP definition - was previously hard coded to 2.
Slight change to the default CM3 tickless sleep function to allow the idle time to be set to zero in the pre-sleep processing macro.
Changed stack alignment for the FreeRTOS-MPU port to ensure it didn't trigger the assert() in the generic create function.
 2013-01-31 14:18:03 +00:00
Richard Barry
ba686260ca Make CM3/4 tick configuration a weak function to allow application writers to use an alternative tick source. 2012-10-29 15:56:26 +00:00
Richard Barry
f5c52bdb1d Re-jig some of the new functions to correctly assign them public or private linkage, and remove some functions that were added in but never used. 2012-10-22 16:40:45 +00:00
Richard Barry
f06a945444 Prepare for V7.3.0 release. 2012-10-16 12:17:47 +00:00
Richard Barry
e03ab659f3 Add tickless idle support in Cortex-M ports. 
Change CCS R4 directory name.
 2012-10-16 07:55:40 +00:00
Richard Barry
e0bab5981a Prepare for V7.2.0 release. 2012-08-14 12:14:48 +00:00
Richard Barry
f508a5f653 Add FreeRTOS-Plus directory. 2012-08-11 21:34:11 +00:00