All related to RL78 GCC demos (which are still a work in progress):

- Abstract out the IO port handling for the LED output so the same code can be used on multiple eval boards.
- Add in the RESTORE_CONTEXT macros.
- Swap to use heap_1.c instead of heap_4.c.
- Add data model macros to FreeRTOSConfig.h (may be removed if only one data model is supported by the compiler).
- Install interrupt handlers.
This commit is contained in:
Richard Barry 2013-03-04 13:23:48 +00:00
parent 37d302b8ee
commit fba04057ec
16 changed files with 1852 additions and 842 deletions

View File

@ -55,12 +55,17 @@
<option id="com.renesas.cdt.core.Compiler.option.warning11.1438339511" name="Issue Warning if an uninitialised automatic variable is used(-Wuninitialized)" superClass="com.renesas.cdt.core.Compiler.option.warning11" value="true" valueType="boolean"/>
<option id="com.renesas.cdt.core.Compiler.option.warning12.62902878" name="Issue Warning of member intialisation mismatch(-Wreorder)" superClass="com.renesas.cdt.core.Compiler.option.warning12" value="true" valueType="boolean"/>
<option id="com.renesas.cdt.core.Compiler.option.warning13.1346187712" name="Issue Warning of bad sign comparisions(-Wsign-compare)" superClass="com.renesas.cdt.core.Compiler.option.warning13" value="true" valueType="boolean"/>
<option id="com.renesas.cdt.rl78.HardwareDebug.Compiler.option.debugFormat.2111907264" name="Debug format" superClass="com.renesas.cdt.rl78.HardwareDebug.Compiler.option.debugFormat" value="com.renesas.cdt.rl78.HardwareDebug.Compiler.option.debugFormat.dwarf" valueType="enumerated"/>
<option id="com.renesas.cdt.rl78.HardwareDebug.Compiler.option.optimizationLevel.474691448" name="Optimization level" superClass="com.renesas.cdt.rl78.HardwareDebug.Compiler.option.optimizationLevel" value="com.renesas.cdt.rl78.HardwareDebug.Compiler.option.optimizationLevel.none" valueType="enumerated"/>
<option id="com.renesas.cdt.rl78.HardwareDebug.Compiler.option.macroDefines.1975812623" name="Macro Defines" superClass="com.renesas.cdt.rl78.HardwareDebug.Compiler.option.macroDefines" valueType="stringList"/>
<option id="com.renesas.cdt.core.Compiler.option.includeSymbolTable.1341454572" name="Include Symbol Table(s)" superClass="com.renesas.cdt.core.Compiler.option.includeSymbolTable" value="true" valueType="boolean"/>
<inputType id="%Base.Compiler.C.InputType.Id.304532987" name="C Input" superClass="%Base.Compiler.C.InputType.Id"/>
</tool>
<tool id="com.renesas.cdt.rl78.hardwaredebug.win32.tool.assembler.Id.1483562315" name="Assembler" superClass="com.renesas.cdt.rl78.hardwaredebug.win32.tool.assembler.Id">
<option id="com.renesas.cdt.core.Assembler.option.includeFileDirectories.1195749866" name="Include file directories" superClass="com.renesas.cdt.core.Assembler.option.includeFileDirectories" valueType="includePath">
<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}}\src&quot;"/>
</option>
<option id="com.renesas.cdt.core.Assembler.option.includeSymbolTable.139641641" name="Include Symbol Table(-as)" superClass="com.renesas.cdt.core.Assembler.option.includeSymbolTable" value="true" valueType="boolean"/>
<inputType id="%Base.Assembler.inputType.Id.1124641218" name="Assembler InputType" superClass="%Base.Assembler.inputType.Id"/>
</tool>
<tool command="rl78-elf-ld" commandLinePattern="${COMMAND} ${OUTPUT_FLAG}${OUTPUT_PREFIX} ${OUTPUT}${INPUTS} ${FLAGS}" id="com.renesas.cdt.rl78.hardwaredebug.win32.tool.linker.Id.148124689" name="Linker" superClass="com.renesas.cdt.rl78.hardwaredebug.win32.tool.linker.Id">
@ -75,13 +80,11 @@
<option id="com.renesas.cdt.core.Linker.option.userDefinedOptions.1480388571" name="User defined options" superClass="com.renesas.cdt.core.Linker.option.userDefinedOptions" valueType="stringList">
<listOptionValue builtIn="false" value="-e_PowerON_Reset"/>
</option>
<option command="-stats" id="com.renesas.cdt.core.Linker.option.misc8.1524197031" name="Compute and display statistics about the operation of the linker(-stats)" superClass="com.renesas.cdt.core.Linker.option.misc8" value="true" valueType="boolean"/>
</tool>
<tool id="com.renesas.cdt.rl78.hardwaredebug.win32.tool.objcopy.Id.1332327082" name="Objcopy" superClass="com.renesas.cdt.rl78.hardwaredebug.win32.tool.objcopy.Id"/>
</toolChain>
</folderInfo>
<fileInfo id="com.renesas.cdt.RL78.configuration.hardwaredebug.1462655394.1069911675" name="RegTest.S" rcbsApplicability="disable" resourcePath="src/RegTest.S" toolsToInvoke="com.renesas.cdt.rl78.hardwaredebug.win32.tool.compiler.Id.323331132.901443813">
<tool id="com.renesas.cdt.rl78.hardwaredebug.win32.tool.compiler.Id.323331132.901443813" name="Compiler" superClass="com.renesas.cdt.rl78.hardwaredebug.win32.tool.compiler.Id.323331132"/>
</fileInfo>
<sourceEntries>
<entry excluding="src/RegTest.S" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
</sourceEntries>

View File

@ -8,21 +8,36 @@
<stringAttribute key="com.renesas.cdt.core.optionInitCommands" value=""/>
<intAttribute key="com.renesas.cdt.core.portNumber" value="61234"/>
<stringAttribute key="com.renesas.cdt.core.runCommands" value=""/>
<stringAttribute key="com.renesas.cdt.core.serverParam" value="-g E1 -l 0 -t R5F10JBC -p 61234 -d 61236 -umFreq= 0 -usFreq= 0 -umClock= 1 -w 1 -usupplyVoltage= 0 -ucommMethod= 0 -usecurityID= 00000000000000000000 -upermitFlash= 1 -uuseWideVoltageMode= 1 -ueraseRom= 1 -uuseOnChipDebug= 0 -uuseUserOptionByte= 0 -ustopTimerEmu= 0 -ustopSerialEmu= 0 -umaskInternalResetSignal= 0 -umaskTargetResetSignal= 0 -n 0 -uverifyOnWritingMemory= 1"/>
<stringAttribute key="com.renesas.cdt.core.serverParam" value="-g E1 -l 0 -t R5F104PJ -p 61234 -d 61236 -umFreq= 0 -usFreq= 0 -umClock= 1 -w 1 -usupplyVoltage= 1 -ucommMethod= 0 -usecurityID= 00000000000000000000 -upermitFlash= 1 -uuseWideVoltageMode= 1 -ueraseRom= 1 -uuseOnChipDebug= 0 -uuseUserOptionByte= 0 -ustopTimerEmu= 0 -ustopSerialEmu= 0 -umaskInternalResetSignal= 0 -umaskTargetResetSignal= 0 -n 0 -uverifyOnWritingMemory= 1"/>
<booleanAttribute key="com.renesas.cdt.core.setResume" value="true"/>
<booleanAttribute key="com.renesas.cdt.core.setStopAt" value="true"/>
<booleanAttribute key="com.renesas.cdt.core.startServer" value="true"/>
<stringAttribute key="com.renesas.cdt.core.stopAt" value="main"/>
<stringAttribute key="com.renesas.cdt.core.targetDevice" value="R5F10JBC"/>
<stringAttribute key="com.renesas.cdt.core.targetDevice" value="R5F104PJ"/>
<booleanAttribute key="com.renesas.cdt.core.useRemoteTarget" value="true"/>
<stringAttribute key="com.renesas.cdt.launch.dsf.IO_MAP" value="${eclipse_home}..\internal\IoFiles\RL78\R5F10JBC.sfrx"/>
<booleanAttribute key="com.renesas.cdt.core.verboseMode" value="false"/>
<stringAttribute key="com.renesas.cdt.launch.dsf.IO_MAP" value="${eclipse_home}..\internal\IoFiles\RL78\R5F104PJ.sfrx"/>
<booleanAttribute key="com.renesas.cdt.launch.dsf.USE_DEFAULT_IO_MAP" value="true"/>
<booleanAttribute key="com.renesas.hardwaredebug.e1.le" value="true"/>
<stringAttribute key="com.renesas.hardwaredebug.e1rl78.communication.method" value="0"/>
<booleanAttribute key="com.renesas.hardwaredebug.e1rl78.e1_pwr" value="true"/>
<booleanAttribute key="com.renesas.hardwaredebug.e1rl78.eraseFlash" value="true"/>
<booleanAttribute key="com.renesas.hardwaredebug.e1rl78.hw_break" value="false"/>
<booleanAttribute key="com.renesas.hardwaredebug.e1rl78.le" value="true"/>
<stringAttribute key="com.renesas.hardwaredebug.e1rl78.main.clock.freq" value="0"/>
<booleanAttribute key="com.renesas.hardwaredebug.e1rl78.mask.internal.reset.signal" value="false"/>
<booleanAttribute key="com.renesas.hardwaredebug.e1rl78.mask.target.reset.signal" value="false"/>
<stringAttribute key="com.renesas.hardwaredebug.e1rl78.monitor.clock" value="1"/>
<booleanAttribute key="com.renesas.hardwaredebug.e1rl78.permit.flash.programming" value="true"/>
<stringAttribute key="com.renesas.hardwaredebug.e1rl78.security.id" value="00000000000000000000"/>
<booleanAttribute key="com.renesas.hardwaredebug.e1rl78.stopSerialEmu" value="false"/>
<booleanAttribute key="com.renesas.hardwaredebug.e1rl78.stopTimerEmu" value="false"/>
<stringAttribute key="com.renesas.hardwaredebug.e1rl78.sub.clock.freq" value="0"/>
<stringAttribute key="com.renesas.hardwaredebug.e1rl78.supply.voltage" value="1"/>
<booleanAttribute key="com.renesas.hardwaredebug.e1rl78.use.wide.voltage.mode" value="true"/>
<booleanAttribute key="com.renesas.hardwaredebug.e1rl78.verify.on.writing.to.memory" value="true"/>
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.delay" value="3"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="false"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doHalt" value="true"/>
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.doReset" value="false"/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
@ -43,8 +58,12 @@
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${eclipse_home}../DebugComp/rl78-elf-gdb"/>
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.NON_STOP" value="true"/>
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/>
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN_SYMBOL" value="main"/>
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="HardwareDebug\RTOSDemo.x"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="RTOSDemo"/>
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/>
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
<listEntry value="/RTOSDemo"/>
</listAttribute>
@ -52,4 +71,5 @@
<listEntry value="4"/>
</listAttribute>
<booleanAttribute key="org.eclipse.debug.ui.ATTR_LAUNCH_IN_BACKGROUND" value="false"/>
<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList context=&quot;reserved-for-future-use&quot;/&gt;&#13;&#10;"/>
</launchConfiguration>

View File

@ -56,19 +56,19 @@
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, and our new
fully thread aware and reentrant UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems, who sell the code with commercial support,
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems, who sell the code with commercial support,
indemnification and middleware, under the OpenRTOS brand.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
*/
@ -87,23 +87,9 @@
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
/* This #ifdef prevents the enclosed code being included from within an
asm file. It is valid in a C file, but not valid in an asm file. */
#ifdef __IAR_SYSTEMS_ICC__
#pragma language=extended
#pragma system_include
#include <intrinsics.h>
/* Device specific includes. */
#include <ior5f100le.h>
#include <ior5f100le_ext.h>
#endif /* __IAR_SYSTEMS_ICC__ */
#define configUSE_PREEMPTION 1
#define configTICK_RATE_HZ ( ( unsigned short ) 1000 )
#define configCPU_CLOCK_HZ ( ( unsigned long ) 32000000 ) /* Using the internal high speed clock */
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 4 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 80 )
#define configMAX_TASK_NAME_LEN ( 10 )
@ -141,26 +127,11 @@ to exclude the API function. */
#define INCLUDE_xTaskGetIdleTaskHandle 0
#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
/******************************************************************************
* PORT SPECIFIC CONFIGURATION OPTIONS
******************************************************************************/
/*
* RL78/G13 Clock Source Configuration
* 1 = use internal High Speed Clock Source (typically 32Mhz on the RL78/G13)
* 0 = use external Clock Source
*/
#define configCLOCK_SOURCE 1
#if configCLOCK_SOURCE == 0
#define configCPU_CLOCK_HZ ( ( unsigned long ) 20000000 ) /* using the external clock source */
#else
#define configCPU_CLOCK_HZ ( ( unsigned long ) 32000000 ) /* using the internal high speed clock */
#endif /* configCLOCK_SOURCE */
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
#define __DATA_MODEL_FAR__ 0
#define __DATA_MODEL_NEAR__ 1
#define __DATA_MODEL__ __DATA_MODEL_FAR__
#endif /* FREERTOS_CONFIG_H */

View File

@ -72,6 +72,7 @@
mission critical applications that require provable dependability.
*/
#include "FreeRTOSConfig.h"
#include "ISR_Support.h"
#define CS 0xFFFFC
@ -93,40 +94,34 @@ _vPortYield:
portSAVE_CONTEXT
/* Call the scheduler to select the next task. */
call !!_vTaskSwitchContext
/*portRESTORE_CONTEXT ; Restore the context of the next task to run.*/
/* Restore the context of the next task to run. */
portRESTORE_CONTEXT
retb
/* Starts the scheduler by restoring the context of the task that will execute
first. */
_vPortStartFirstTask:
/* portRESTORE_CONTEXT ; Restore the context of whichever task the ... */
reti /*An interrupt stack frame is used so the task */
/* is started using a RETI instruction. */
/* Restore the context of whichever task will execute first. */
portRESTORE_CONTEXT
/* An interrupt stack frame is used so the task is started using RETI. */
reti
/* FreeRTOS tick handler. This is installed as the interval timer interrupt
handler. */
_vPortTickISR:
/* portSAVE_CONTEXT ; Save the context of the current task. */
call !!_vTaskIncrementTick /* Call the timer tick function. */
/* Save the context of the currently executing task. */
portSAVE_CONTEXT
/* Call the RTOS tick function. */
call !!_vTaskIncrementTick
#if configUSE_PREEMPTION == 1
call !!_vTaskSwitchContext /* Call the scheduler to select the next task. */
/* Select the next task to run. */
call !!_vTaskSwitchContext
#endif
/* portRESTORE_CONTEXT ; Restore the context of the next task to run. */
/* Retore the context of whichever task will run next. */
portRESTORE_CONTEXT
reti
/* Install the interrupt handlers
COMMON INTVEC:CODE:ROOT(1)
ORG 56
DW vPortTickISR
COMMON INTVEC:CODE:ROOT(1)
ORG 126
DW vPortYield */
.end

View File

@ -0,0 +1,177 @@
/*
FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
details. You should have received a copy of the GNU General Public License
and the FreeRTOS license exception along with FreeRTOS; if not itcan be
viewed here: http://www.freertos.org/a00114.html and also obtained by
writing to Real Time Engineers Ltd., contact details for whom are available
on the FreeRTOS WEB site.
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, and our new
fully thread aware and reentrant UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems, who sell the code with commercial support,
indemnification and middleware, under the OpenRTOS brand.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
*/
/*
* The simplest possible implementation of pvPortMalloc(). Note that this
* implementation does NOT allow allocated memory to be freed again.
*
* See heap_2.c, heap_3.c and heap_4.c for alternative implementations, and the
* memory management pages of http://www.FreeRTOS.org for more information.
*/
#include <stdlib.h>
/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
all the API functions to use the MPU wrappers. That should only be done when
task.h is included from an application file. */
#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
#include "FreeRTOS.h"
#include "task.h"
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
/* A few bytes might be lost to byte aligning the heap start address. */
#define configADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )
/* Allocate the memory for the heap. */
static unsigned char ucHeap[ configTOTAL_HEAP_SIZE ];
static size_t xNextFreeByte = ( size_t ) 0;
/*-----------------------------------------------------------*/
void *pvPortMalloc( size_t xWantedSize )
{
void *pvReturn = NULL;
static unsigned char *pucAlignedHeap = NULL;
/* Ensure that blocks are always aligned to the required number of bytes. */
#if portBYTE_ALIGNMENT != 1
if( xWantedSize & portBYTE_ALIGNMENT_MASK )
{
/* Byte alignment required. */
xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
}
#endif
vTaskSuspendAll();
{
if( pucAlignedHeap == NULL )
{
/* Ensure the heap starts on a correctly aligned boundary. */
pucAlignedHeap = ( unsigned char * ) ( ( ( portPOINTER_SIZE_TYPE ) &ucHeap[ portBYTE_ALIGNMENT ] ) & ( ( portPOINTER_SIZE_TYPE ) ~portBYTE_ALIGNMENT_MASK ) );
}
/* Check there is enough room left for the allocation. */
if( ( ( xNextFreeByte + xWantedSize ) < configADJUSTED_HEAP_SIZE ) &&
( ( xNextFreeByte + xWantedSize ) > xNextFreeByte ) )/* Check for overflow. */
{
/* Return the next free byte then increment the index past this
block. */
pvReturn = pucAlignedHeap + xNextFreeByte;
xNextFreeByte += xWantedSize;
}
}
xTaskResumeAll();
#if( configUSE_MALLOC_FAILED_HOOK == 1 )
{
if( pvReturn == NULL )
{
extern void vApplicationMallocFailedHook( void );
vApplicationMallocFailedHook();
}
}
#endif
return pvReturn;
}
/*-----------------------------------------------------------*/
void vPortFree( void *pv )
{
/* Memory cannot be freed using this scheme. See heap_2.c, heap_3.c and
heap_4.c for alternative implementations, and the memory management pages of
http://www.FreeRTOS.org for more information. */
( void ) pv;
/* Force an assert as it is invalid to call this function. */
configASSERT( pv == NULL );
}
/*-----------------------------------------------------------*/
void vPortInitialiseBlocks( void )
{
/* Only required when static memory is not cleared. */
xNextFreeByte = ( size_t ) 0;
}
/*-----------------------------------------------------------*/
size_t xPortGetFreeHeapSize( void )
{
return ( configADJUSTED_HEAP_SIZE - xNextFreeByte );
}

View File

@ -1,359 +0,0 @@
/*
FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
details. You should have received a copy of the GNU General Public License
and the FreeRTOS license exception along with FreeRTOS; if not itcan be
viewed here: http://www.freertos.org/a00114.html and also obtained by
writing to Real Time Engineers Ltd., contact details for whom are available
on the FreeRTOS WEB site.
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, and our new
fully thread aware and reentrant UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems, who sell the code with commercial support,
indemnification and middleware, under the OpenRTOS brand.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
*/
/*
* A sample implementation of pvPortMalloc() and vPortFree() that combines
* (coalescences) adjacent memory blocks as they are freed, and in so doing
* limits memory fragmentation.
*
* See heap_1.c, heap_2.c and heap_3.c for alternative implementations, and the
* memory management pages of http://www.FreeRTOS.org for more information.
*/
#include <stdlib.h>
/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
all the API functions to use the MPU wrappers. That should only be done when
task.h is included from an application file. */
#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
#include "FreeRTOS.h"
#include "task.h"
#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
/* Block sizes must not get too small. */
#define heapMINIMUM_BLOCK_SIZE ( ( size_t ) ( heapSTRUCT_SIZE * 2 ) )
/* A few bytes might be lost to byte aligning the heap start address. */
#define configADJUSTED_HEAP_SIZE ( configTOTAL_HEAP_SIZE - portBYTE_ALIGNMENT )
/* Allocate the memory for the heap. */
static unsigned char ucHeap[ configTOTAL_HEAP_SIZE ];
/* Define the linked list structure. This is used to link free blocks in order
of their memory address. */
typedef struct A_BLOCK_LINK
{
struct A_BLOCK_LINK *pxNextFreeBlock; /*<< The next free block in the list. */
size_t xBlockSize; /*<< The size of the free block. */
} xBlockLink;
/*-----------------------------------------------------------*/
/*
* Inserts a block of memory that is being freed into the correct position in
* the list of free memory blocks. The block being freed will be merged with
* the block in front it and/or the block behind it if the memory blocks are
* adjacent to each other.
*/
static void prvInsertBlockIntoFreeList( xBlockLink *pxBlockToInsert );
/*
* Called automatically to setup the required heap structures the first time
* pvPortMalloc() is called.
*/
static void prvHeapInit( void );
/*-----------------------------------------------------------*/
/* The size of the structure placed at the beginning of each allocated memory
block must by correctly byte aligned. */
static const unsigned short heapSTRUCT_SIZE = ( sizeof( xBlockLink ) + portBYTE_ALIGNMENT - ( sizeof( xBlockLink ) % portBYTE_ALIGNMENT ) );
/* Ensure the pxEnd pointer will end up on the correct byte alignment. */
static const size_t xTotalHeapSize = ( ( size_t ) configADJUSTED_HEAP_SIZE ) & ( ( size_t ) ~portBYTE_ALIGNMENT_MASK );
/* Create a couple of list links to mark the start and end of the list. */
static xBlockLink xStart, *pxEnd = NULL;
/* Keeps track of the number of free bytes remaining, but says nothing about
fragmentation. */
static size_t xFreeBytesRemaining = ( ( size_t ) configADJUSTED_HEAP_SIZE ) & ( ( size_t ) ~portBYTE_ALIGNMENT_MASK );
/* STATIC FUNCTIONS ARE DEFINED AS MACROS TO MINIMIZE THE FUNCTION CALL DEPTH. */
/*-----------------------------------------------------------*/
void *pvPortMalloc( size_t xWantedSize )
{
xBlockLink *pxBlock, *pxPreviousBlock, *pxNewBlockLink;
void *pvReturn = NULL;
vTaskSuspendAll();
{
/* If this is the first call to malloc then the heap will require
initialisation to setup the list of free blocks. */
if( pxEnd == NULL )
{
prvHeapInit();
}
/* The wanted size is increased so it can contain a xBlockLink
structure in addition to the requested amount of bytes. */
if( xWantedSize > 0 )
{
xWantedSize += heapSTRUCT_SIZE;
/* Ensure that blocks are always aligned to the required number of
bytes. */
if( xWantedSize & portBYTE_ALIGNMENT_MASK )
{
/* Byte alignment required. */
xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) );
}
}
if( ( xWantedSize > 0 ) && ( xWantedSize < xTotalHeapSize ) )
{
/* Traverse the list from the start (lowest address) block until one
of adequate size is found. */
pxPreviousBlock = &xStart;
pxBlock = xStart.pxNextFreeBlock;
while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) )
{
pxPreviousBlock = pxBlock;
pxBlock = pxBlock->pxNextFreeBlock;
}
/* If the end marker was reached then a block of adequate size was
not found. */
if( pxBlock != pxEnd )
{
/* Return the memory space - jumping over the xBlockLink structure
at its start. */
pvReturn = ( void * ) ( ( ( unsigned char * ) pxPreviousBlock->pxNextFreeBlock ) + heapSTRUCT_SIZE );
/* This block is being returned for use so must be taken out of
the list of free blocks. */
pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock;
/* If the block is larger than required it can be split into two. */
if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE )
{
/* This block is to be split into two. Create a new block
following the number of bytes requested. The void cast is
used to prevent byte alignment warnings from the compiler. */
pxNewBlockLink = ( void * ) ( ( ( unsigned char * ) pxBlock ) + xWantedSize );
/* Calculate the sizes of two blocks split from the single
block. */
pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize;
pxBlock->xBlockSize = xWantedSize;
/* Insert the new block into the list of free blocks. */
prvInsertBlockIntoFreeList( ( pxNewBlockLink ) );
}
xFreeBytesRemaining -= pxBlock->xBlockSize;
}
}
}
xTaskResumeAll();
#if( configUSE_MALLOC_FAILED_HOOK == 1 )
{
if( pvReturn == NULL )
{
extern void vApplicationMallocFailedHook( void );
vApplicationMallocFailedHook();
}
}
#endif
return pvReturn;
}
/*-----------------------------------------------------------*/
void vPortFree( void *pv )
{
unsigned char *puc = ( unsigned char * ) pv;
xBlockLink *pxLink;
if( pv != NULL )
{
/* The memory being freed will have an xBlockLink structure immediately
before it. */
puc -= heapSTRUCT_SIZE;
/* This casting is to keep the compiler from issuing warnings. */
pxLink = ( void * ) puc;
vTaskSuspendAll();
{
/* Add this block to the list of free blocks. */
xFreeBytesRemaining += pxLink->xBlockSize;
prvInsertBlockIntoFreeList( ( ( xBlockLink * ) pxLink ) );
}
xTaskResumeAll();
}
}
/*-----------------------------------------------------------*/
size_t xPortGetFreeHeapSize( void )
{
return xFreeBytesRemaining;
}
/*-----------------------------------------------------------*/
void vPortInitialiseBlocks( void )
{
/* This just exists to keep the linker quiet. */
}
/*-----------------------------------------------------------*/
static void prvHeapInit( void )
{
xBlockLink *pxFirstFreeBlock;
unsigned char *pucHeapEnd, *pucAlignedHeap;
/* Ensure the heap starts on a correctly aligned boundary. */
pucAlignedHeap = ( unsigned char * ) ( ( ( portPOINTER_SIZE_TYPE ) &ucHeap[ portBYTE_ALIGNMENT ] ) & ( ( portPOINTER_SIZE_TYPE ) ~portBYTE_ALIGNMENT_MASK ) );
/* xStart is used to hold a pointer to the first item in the list of free
blocks. The void cast is used to prevent compiler warnings. */
xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap;
xStart.xBlockSize = ( size_t ) 0;
/* pxEnd is used to mark the end of the list of free blocks and is inserted
at the end of the heap space. */
pucHeapEnd = pucAlignedHeap + xTotalHeapSize;
pucHeapEnd -= heapSTRUCT_SIZE;
pxEnd = ( void * ) pucHeapEnd;
configASSERT( ( ( ( unsigned long ) pxEnd ) & ( ( unsigned long ) portBYTE_ALIGNMENT_MASK ) ) == 0UL );
pxEnd->xBlockSize = 0;
pxEnd->pxNextFreeBlock = NULL;
/* To start with there is a single free block that is sized to take up the
entire heap space, minus the space taken by pxEnd. */
pxFirstFreeBlock = ( void * ) pucAlignedHeap;
pxFirstFreeBlock->xBlockSize = xTotalHeapSize - heapSTRUCT_SIZE;
pxFirstFreeBlock->pxNextFreeBlock = pxEnd;
/* The heap now contains pxEnd. */
xFreeBytesRemaining -= heapSTRUCT_SIZE;
}
/*-----------------------------------------------------------*/
static void prvInsertBlockIntoFreeList( xBlockLink *pxBlockToInsert )
{
xBlockLink *pxIterator;
unsigned char *puc;
/* Iterate through the list until a block is found that has a higher address
than the block being inserted. */
for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock )
{
/* Nothing to do here, just iterate to the right position. */
}
/* Do the block being inserted, and the block it is being inserted after
make a contiguous block of memory? */
puc = ( unsigned char * ) pxIterator;
if( ( puc + pxIterator->xBlockSize ) == ( unsigned char * ) pxBlockToInsert )
{
pxIterator->xBlockSize += pxBlockToInsert->xBlockSize;
pxBlockToInsert = pxIterator;
}
/* Do the block being inserted, and the block it is being inserted before
make a contiguous block of memory? */
puc = ( unsigned char * ) pxBlockToInsert;
if( ( puc + pxBlockToInsert->xBlockSize ) == ( unsigned char * ) pxIterator->pxNextFreeBlock )
{
if( pxIterator->pxNextFreeBlock != pxEnd )
{
/* Form one big block from the two blocks. */
pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize;
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock;
}
else
{
pxBlockToInsert->pxNextFreeBlock = pxEnd;
}
}
else
{
pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock;
}
/* If the block being inserted plugged a gab, so was merged with the block
before and the block after, then it's pxNextFreeBlock pointer will have
already been set, and should not be set here as that would make it point
to itself. */
if( pxIterator != pxBlockToInsert )
{
pxIterator->pxNextFreeBlock = pxBlockToInsert;
}
}

View File

@ -0,0 +1,102 @@
/*
FreeRTOS V7.4.0 - Copyright (C) 2013 Real Time Engineers Ltd.
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel.
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
details. You should have received a copy of the GNU General Public License
and the FreeRTOS license exception along with FreeRTOS; if not itcan be
viewed here: http://www.freertos.org/a00114.html and also obtained by
writing to Real Time Engineers Ltd., contact details for whom are available
on the FreeRTOS WEB site.
1 tab == 4 spaces!
***************************************************************************
* *
* Having a problem? Start by reading the FAQ "My application does *
* not run, what could be wrong?" *
* *
* http://www.FreeRTOS.org/FAQHelp.html *
* *
***************************************************************************
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd. contact details.
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS+Trace - an indispensable productivity tool, and our new
fully thread aware and reentrant UDP/IP stack.
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
Integrity Systems, who sell the code with commercial support,
indemnification and middleware, under the OpenRTOS brand.
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
engineered and independently SIL3 certified version for use in safety and
mission critical applications that require provable dependability.
*/
/*
* Board specific macros to initialise and toggle an LED.
*/
#ifndef LED_IO_H
#define LED_IO_H
#ifdef YRPBRL78G13
#define LED_BIT ( P7_bit.no7 )
#define LED_INIT() P7 &= 0x7F; PM7 &= 0x7F
#endif /* YRPBRL78G13 */
#ifdef YRDKRL78G14
#define LED_BIT ( P1_bit.no0 )
#define LED_INIT() P1 &= 0xFE; PM1 &= 0xFE
#endif /* YRDKRL78G14 */
#ifdef RSKRL78G1C
#define LED_BIT ( P0_bit.no1 )
#define LED_INIT() P0 &= 0xFD; PM0 &= 0xFD
#endif /* RSKRL78G1C */
#ifndef LED_BIT
#error The hardware platform is not defined
#endif
#endif /* LED_IO_H */

View File

@ -9,18 +9,36 @@
/* This file is generated by e2studio. */
/* */
/***********************************************************************/
#ifdef __cplusplus
extern "C" {
#endif
extern void HardwareSetup(void);
#ifdef __cplusplus
}
#endif
/* Scheduler include files. */
#include "FreeRTOS.h"
/* Hardware includes. */
#include "port_iodefine.h"
void HardwareSetup(void)
{
}
unsigned char ucResetFlag = RESF;
portDISABLE_INTERRUPTS();
/* Set fMX */
CMC = 0x00;
MSTOP = 1U;
/* Set fMAIN */
MCM0 = 0U;
/* Set fSUB */
XTSTOP = 1U;
OSMC = 0x10;
/* Set fCLK */
CSS = 0U;
/* Set fIH */
HIOSTOP = 0U;
/* LED port initialization. */
LED_INIT();
}

View File

@ -3,8 +3,8 @@
/* PROJECT NAME : RTOSDemo */
/* FILE : interrupt_handlers.c */
/* DESCRIPTION : Interrupt Handler */
/* CPU SERIES : RL78 - G1C */
/* CPU TYPE : R5F10JBC */
/* CPU SERIES : RL78 - G14 */
/* CPU TYPE : R5F104PJ */
/* */
/* This file is generated by e2studio. */
/* */
@ -54,14 +54,24 @@ void INT_P4 (void) { }
void INT_P5 (void) { }
/*
* INT_DMA0 (0x1A)
* INT_CSI20/INT_IIC20/INT_ST2 (0x14)
*/
void INT_DMA0 (void) { }
void INT_ST2 (void) { }
//void INT_CSI20 (void) { }
//void INT_IIC20 (void) { }
/*
* INT_CSI21/INT_IIC21/INT_SR2 (0x16)
*/
void INT_SR2 (void) { }
//void INT_CSI21 (void) { }
//void INT_IIC21 (void) { }
/*
* INT_DMA1 (0x1C)
* INT_SRE2/INT_TM11H (0x18)
*/
void INT_DMA1 (void) { }
void INT_TM11H (void) { }
//void INT_SRE2 (void) { }
/*
* INT_CSI00/INT_IIC00/INT_ST0 (0x1E)
@ -71,32 +81,47 @@ void INT_ST0 (void) { }
//void INT_IIC00 (void) { }
/*
* INT_TM00 (0x20)
*/
void INT_TM00 (void) { }
/*
* INT_CSI01/INT_IIC01/INT_SR0 (0x22)
* INT_CSI01/INT_IIC01/INT_SR0 (0x20)
*/
void INT_SR0 (void) { }
//void INT_CSI01 (void) { }
//void INT_IIC01 (void) { }
/*
* INT_SRE0/INT_TM01H (0x24)
* INT_SRE0/INT_TM01H (0x22)
*/
void INT_TM01H (void) { }
//void INT_SRE0 (void) { }
/*
* INT_TM03H (0x2A)
* INT_CSI10/INT_IIC10/INT_ST1 (0x24)
*/
void INT_ST1 (void) { }
//void INT_CSI10 (void) { }
//void INT_IIC10 (void) { }
/*
* INT_CSI11/INT_IIC11/INT_SR1 (0x26)
*/
void INT_SR1 (void) { }
//void INT_CSI11 (void) { }
//void INT_IIC11 (void) { }
/*
* INT_SRE1/INT_TM03H (0x28)
*/
void INT_TM03H (void) { }
//void INT_SRE1 (void) { }
/*
* INT_IICA0 (0x2C)
* INT_IICA0 (0x2A)
*/
void INT_IICA0 (void) { }
/*
* INT_TM00 (0x2C)
*/
void INT_TM00 (void) { }
/*
* INT_TM01 (0x2E)
@ -129,16 +154,60 @@ void INT_RTC (void) { }
void INT_IT (void) { }
/*
* INT_USB (0x3C)
* INT_KR (0x3A)
*/
void INT_USB (void) { }
void INT_KR (void) { }
/*
* INT_CSI30/INT_IIC30/INT_ST3 (0x3C)
*/
void INT_ST3 (void) { }
//void INT_CSI30 (void) { }
//void INT_IIC30 (void) { }
/*
* INT_RSUM (0x3E)
* INT_CSI31/INT_IIC31/INT_SR3 (0x3E)
*/
void INT_SR3 (void) { }
//void INT_CSI31 (void) { }
//void INT_IIC31 (void) { }
/*
* INT_TRJ0 (0x40)
*/
void INT_TRJ0 (void) { }
/*
* INT_TM10 (0x42)
*/
void INT_TM10 (void) { }
/*
* INT_TM11 (0x44)
*/
void INT_TM11 (void) { }
/*
* INT_TM12 (0x46)
*/
void INT_TM12 (void) { }
/*
* INT_TM13 (0x48)
*/
void INT_RSUM (void) { }
void INT_TM13 (void) { }
/*
* INT_P6 (0x4A)
*/
void INT_P6 (void) { }
/*
* INT_P7 (0x4C)
*/
void INT_P7 (void) { }
/*
* INT_P8 (0x4E)
*/
void INT_P8 (void) { }
@ -149,11 +218,44 @@ void INT_P8 (void) { }
void INT_P9 (void) { }
/*
* INT_MD (0x5E)
* INT_CMP0/INT_P10 (0x52)
*/
void INT_P10 (void) { }
//void INT_CMP0 (void) { }
/*
* INT_CMP1/INT_P11 (0x54)
*/
void INT_P11 (void) { }
//void INT_CMP1 (void) { }
/*
* INT_TRD0 (0x56)
*/
void INT_MD (void) { }
void INT_TRD0 (void) { }
/*
* INT_TRD1 (0x58)
*/
void INT_TRD1 (void) { }
/*
* INT_TRG (0x5A)
*/
void INT_TRG (void) { }
/*
* INT_SRE3/INT_TM13H (0x5C)
*/
void INT_TM13H (void) { }
//void INT_SRE3 (void) { }
/*
* INT_IICA1 (0x60)
*/
void INT_IICA1 (void) { }
/*
* INT_FL (0x62)
*/
void INT_FL (void) { }

View File

@ -3,8 +3,8 @@
/* PROJECT NAME : RTOSDemo */
/* FILE : interrupt_handlers.h */
/* DESCRIPTION : Interrupt Handler Declarations */
/* CPU SERIES : RL78 - G1C */
/* CPU TYPE : R5F10JBC */
/* CPU SERIES : RL78 - G14 */
/* CPU TYPE : R5F104PJ */
/* */
/* This file is generated by e2studio. */
/* */
@ -55,14 +55,24 @@ void INT_P4(void) __attribute__ ((interrupt));
void INT_P5(void) __attribute__ ((interrupt));
/*
* INT_DMA0 (0x1A)
* INT_CSI20/INT_IIC20/INT_ST2 (0x14)
*/
void INT_DMA0(void) __attribute__ ((interrupt));
void INT_ST2(void) __attribute__ ((interrupt));
//void INT_CSI20(void) __attribute__ ((interrupt));
//void INT_IIC20(void) __attribute__ ((interrupt));
/*
* INT_DMA1 (0x1C)
* INT_CSI21/INT_IIC21/INT_SR2 (0x16)
*/
void INT_DMA1(void) __attribute__ ((interrupt));
void INT_SR2(void) __attribute__ ((interrupt));
//void INT_CSI21(void) __attribute__ ((interrupt));
//void INT_IIC21(void) __attribute__ ((interrupt));
/*
* INT_SRE2/INT_TM11H (0x18)
*/
void INT_TM11H(void) __attribute__ ((interrupt));
//void INT_SRE2(void) __attribute__ ((interrupt));
/*
* INT_CSI00/INT_IIC00/INT_ST0 (0x1E)
@ -72,33 +82,48 @@ void INT_ST0(void) __attribute__ ((interrupt));
//void INT_IIC00(void) __attribute__ ((interrupt));
/*
* INT_TM00 (0x20)
*/
void INT_TM00(void) __attribute__ ((interrupt));
/*
* INT_CSI01/INT_IIC01/INT_SR0 (0x22)
* INT_CSI01/INT_IIC01/INT_SR0 (0x20)
*/
void INT_SR0(void) __attribute__ ((interrupt));
//void INT_CSI01(void) __attribute__ ((interrupt));
//void INT_IIC01(void) __attribute__ ((interrupt));
/*
* INT_SRE0/INT_TM01H (0x24)
* INT_SRE0/INT_TM01H (0x22)
*/
void INT_TM01H(void) __attribute__ ((interrupt));
//void INT_SRE0(void) __attribute__ ((interrupt));
/*
* INT_TM03H (0x2A)
* INT_CSI10/INT_IIC10/INT_ST1 (0x24)
*/
void INT_TM03H(void) __attribute__ ((interrupt));
void INT_ST1(void) __attribute__ ((interrupt));
//void INT_CSI10(void) __attribute__ ((interrupt));
//void INT_IIC10(void) __attribute__ ((interrupt));
/*
* INT_IICA0 (0x2C)
* INT_CSI11/INT_IIC11/INT_SR1 (0x26)
*/
void INT_SR1(void) __attribute__ ((interrupt));
//void INT_CSI11(void) __attribute__ ((interrupt));
//void INT_IIC11(void) __attribute__ ((interrupt));
/*
* INT_SRE1/INT_TM03H (0x28)
*/
void INT_TM03H(void) __attribute__ ((interrupt));
//void INT_SRE1(void) __attribute__ ((interrupt));
/*
* INT_IICA0 (0x2A)
*/
void INT_IICA0(void) __attribute__ ((interrupt));
/*
* INT_TM00 (0x2C)
*/
void INT_TM00(void) __attribute__ ((interrupt));
/*
* INT_TM01 (0x2E)
*/
@ -130,14 +155,58 @@ void INT_RTC(void) __attribute__ ((interrupt));
void INT_IT(void) __attribute__ ((interrupt));
/*
* INT_USB (0x3C)
* INT_KR (0x3A)
*/
void INT_USB(void) __attribute__ ((interrupt));
void INT_KR(void) __attribute__ ((interrupt));
/*
* INT_RSUM (0x3E)
* INT_CSI30/INT_IIC30/INT_ST3 (0x3C)
*/
void INT_RSUM(void) __attribute__ ((interrupt));
void INT_ST3(void) __attribute__ ((interrupt));
//void INT_CSI30(void) __attribute__ ((interrupt));
//void INT_IIC30(void) __attribute__ ((interrupt));
/*
* INT_CSI31/INT_IIC31/INT_SR3 (0x3E)
*/
void INT_SR3(void) __attribute__ ((interrupt));
//void INT_CSI31(void) __attribute__ ((interrupt));
//void INT_IIC31(void) __attribute__ ((interrupt));
/*
* INT_TRJ0 (0x40)
*/
void INT_TRJ0(void) __attribute__ ((interrupt));
/*
* INT_TM10 (0x42)
*/
void INT_TM10(void) __attribute__ ((interrupt));
/*
* INT_TM11 (0x44)
*/
void INT_TM11(void) __attribute__ ((interrupt));
/*
* INT_TM12 (0x46)
*/
void INT_TM12(void) __attribute__ ((interrupt));
/*
* INT_TM13 (0x48)
*/
void INT_TM13(void) __attribute__ ((interrupt));
/*
* INT_P6 (0x4A)
*/
void INT_P6(void) __attribute__ ((interrupt));
/*
* INT_P7 (0x4C)
*/
void INT_P7(void) __attribute__ ((interrupt));
/*
* INT_P8 (0x4E)
@ -150,9 +219,42 @@ void INT_P8(void) __attribute__ ((interrupt));
void INT_P9(void) __attribute__ ((interrupt));
/*
* INT_MD (0x5E)
* INT_CMP0/INT_P10 (0x52)
*/
void INT_MD(void) __attribute__ ((interrupt));
void INT_P10(void) __attribute__ ((interrupt));
//void INT_CMP0(void) __attribute__ ((interrupt));
/*
* INT_CMP1/INT_P11 (0x54)
*/
void INT_P11(void) __attribute__ ((interrupt));
//void INT_CMP1(void) __attribute__ ((interrupt));
/*
* INT_TRD0 (0x56)
*/
void INT_TRD0(void) __attribute__ ((interrupt));
/*
* INT_TRD1 (0x58)
*/
void INT_TRD1(void) __attribute__ ((interrupt));
/*
* INT_TRG (0x5A)
*/
void INT_TRG(void) __attribute__ ((interrupt));
/*
* INT_SRE3/INT_TM13H (0x5C)
*/
void INT_TM13H(void) __attribute__ ((interrupt));
//void INT_SRE3(void) __attribute__ ((interrupt));
/*
* INT_IICA1 (0x60)
*/
void INT_IICA1(void) __attribute__ ((interrupt));
/*
* INT_FL (0x62)

View File

@ -3,22 +3,22 @@
/* PROJECT NAME : RTOSDemo */
/* FILE : iodefine.h */
/* DESCRIPTION : Definition of I/O Registers */
/* CPU SERIES : RL78 - G1C */
/* CPU TYPE : R5F10JBC */
/* CPU SERIES : RL78 - G14 */
/* CPU TYPE : R5F104PJ */
/* */
/* This file is generated by e2studio. */
/* */
/***********************************************************************/
/***********************************************************************/
/************************************************************************/
/* Header file generated from device file: */
/* DR5F10JBC.DVF */
/* DR5F104PJ.DVF */
/* Copyright(C) 2012 Renesas */
/* File Version V1.00 */
/* File Version V2.00 */
/* Tool Version 1.9.7121 */
/* Date Generated 13/11/2012 */
/************************************************************************/
#ifndef __IOREG_BIT_STRUCTURES
#define __IOREG_BIT_STRUCTURES
typedef struct {
@ -91,6 +91,18 @@ union un_p7 {
unsigned char p7;
__BITS8 BIT;
};
union un_p8 {
unsigned char p8;
__BITS8 BIT;
};
union un_p10 {
unsigned char p10;
__BITS8 BIT;
};
union un_p11 {
unsigned char p11;
__BITS8 BIT;
};
union un_p12 {
unsigned char p12;
__BITS8 BIT;
@ -99,6 +111,14 @@ union un_p13 {
unsigned char p13;
__BITS8 BIT;
};
union un_p14 {
unsigned char p14;
__BITS8 BIT;
};
union un_p15 {
unsigned char p15;
__BITS8 BIT;
};
union un_pm0 {
unsigned char pm0;
__BITS8 BIT;
@ -131,10 +151,30 @@ union un_pm7 {
unsigned char pm7;
__BITS8 BIT;
};
union un_pm8 {
unsigned char pm8;
__BITS8 BIT;
};
union un_pm10 {
unsigned char pm10;
__BITS8 BIT;
};
union un_pm11 {
unsigned char pm11;
__BITS8 BIT;
};
union un_pm12 {
unsigned char pm12;
__BITS8 BIT;
};
union un_pm14 {
unsigned char pm14;
__BITS8 BIT;
};
union un_pm15 {
unsigned char pm15;
__BITS8 BIT;
};
union un_adm0 {
unsigned char adm0;
__BITS8 BIT;
@ -147,6 +187,14 @@ union un_adm1 {
unsigned char adm1;
__BITS8 BIT;
};
union un_dam {
unsigned char dam;
__BITS8 BIT;
};
union un_krm {
unsigned char krm;
__BITS8 BIT;
};
union un_egp0 {
unsigned char egp0;
__BITS8 BIT;
@ -171,6 +219,14 @@ union un_iicf0 {
unsigned char iicf0;
__BITS8 BIT;
};
union un_iics1 {
unsigned char iics1;
__BITS8 BIT;
};
union un_iicf1 {
unsigned char iicf1;
__BITS8 BIT;
};
union un_flars {
unsigned char flars;
__BITS8 BIT;
@ -235,22 +291,6 @@ union un_asim {
unsigned char asim;
__BITS8 BIT;
};
union un_dmc0 {
unsigned char dmc0;
__BITS8 BIT;
};
union un_dmc1 {
unsigned char dmc1;
__BITS8 BIT;
};
union un_drc0 {
unsigned char drc0;
__BITS8 BIT;
};
union un_drc1 {
unsigned char drc1;
__BITS8 BIT;
};
union un_if2 {
unsigned short if2;
__BITS16 BIT;
@ -416,16 +456,32 @@ union un_pmc {
#define P6_bit (*(volatile union un_p6 *)0xFFF06).BIT
#define P7 (*(volatile union un_p7 *)0xFFF07).p7
#define P7_bit (*(volatile union un_p7 *)0xFFF07).BIT
#define P8 (*(volatile union un_p8 *)0xFFF08).p8
#define P8_bit (*(volatile union un_p8 *)0xFFF08).BIT
#define P10 (*(volatile union un_p10 *)0xFFF0A).p10
#define P10_bit (*(volatile union un_p10 *)0xFFF0A).BIT
#define P11 (*(volatile union un_p11 *)0xFFF0B).p11
#define P11_bit (*(volatile union un_p11 *)0xFFF0B).BIT
#define P12 (*(volatile union un_p12 *)0xFFF0C).p12
#define P12_bit (*(volatile union un_p12 *)0xFFF0C).BIT
#define P13 (*(volatile union un_p13 *)0xFFF0D).p13
#define P13_bit (*(volatile union un_p13 *)0xFFF0D).BIT
#define P14 (*(volatile union un_p14 *)0xFFF0E).p14
#define P14_bit (*(volatile union un_p14 *)0xFFF0E).BIT
#define P15 (*(volatile union un_p15 *)0xFFF0F).p15
#define P15_bit (*(volatile union un_p15 *)0xFFF0F).BIT
#define SDR00 (*(volatile unsigned short *)0xFFF10)
#define SIO00 (*(volatile unsigned char *)0xFFF10)
#define TXD0 (*(volatile unsigned char *)0xFFF10)
#define SDR01 (*(volatile unsigned short *)0xFFF12)
#define RXD0 (*(volatile unsigned char *)0xFFF12)
#define SIO01 (*(volatile unsigned char *)0xFFF12)
#define SDR12 (*(volatile unsigned short *)0xFFF14)
#define SIO30 (*(volatile unsigned char *)0xFFF14)
#define TXD3 (*(volatile unsigned char *)0xFFF14)
#define SDR13 (*(volatile unsigned short *)0xFFF16)
#define RXD3 (*(volatile unsigned char *)0xFFF16)
#define SIO31 (*(volatile unsigned char *)0xFFF16)
#define TDR00 (*(volatile unsigned short *)0xFFF18)
#define TDR01 (*(volatile unsigned short *)0xFFF1A)
#define TDR01L (*(volatile unsigned char *)0xFFF1A)
@ -448,14 +504,30 @@ union un_pmc {
#define PM6_bit (*(volatile union un_pm6 *)0xFFF26).BIT
#define PM7 (*(volatile union un_pm7 *)0xFFF27).pm7
#define PM7_bit (*(volatile union un_pm7 *)0xFFF27).BIT
#define PM8 (*(volatile union un_pm8 *)0xFFF28).pm8
#define PM8_bit (*(volatile union un_pm8 *)0xFFF28).BIT
#define PM10 (*(volatile union un_pm10 *)0xFFF2A).pm10
#define PM10_bit (*(volatile union un_pm10 *)0xFFF2A).BIT
#define PM11 (*(volatile union un_pm11 *)0xFFF2B).pm11
#define PM11_bit (*(volatile union un_pm11 *)0xFFF2B).BIT
#define PM12 (*(volatile union un_pm12 *)0xFFF2C).pm12
#define PM12_bit (*(volatile union un_pm12 *)0xFFF2C).BIT
#define PM14 (*(volatile union un_pm14 *)0xFFF2E).pm14
#define PM14_bit (*(volatile union un_pm14 *)0xFFF2E).BIT
#define PM15 (*(volatile union un_pm15 *)0xFFF2F).pm15
#define PM15_bit (*(volatile union un_pm15 *)0xFFF2F).BIT
#define ADM0 (*(volatile union un_adm0 *)0xFFF30).adm0
#define ADM0_bit (*(volatile union un_adm0 *)0xFFF30).BIT
#define ADS (*(volatile union un_ads *)0xFFF31).ads
#define ADS_bit (*(volatile union un_ads *)0xFFF31).BIT
#define ADM1 (*(volatile union un_adm1 *)0xFFF32).adm1
#define ADM1_bit (*(volatile union un_adm1 *)0xFFF32).BIT
#define DACS0 (*(volatile unsigned char *)0xFFF34)
#define DACS1 (*(volatile unsigned char *)0xFFF35)
#define DAM (*(volatile union un_dam *)0xFFF36).dam
#define DAM_bit (*(volatile union un_dam *)0xFFF36).BIT
#define KRM (*(volatile union un_krm *)0xFFF37).krm
#define KRM_bit (*(volatile union un_krm *)0xFFF37).BIT
#define EGP0 (*(volatile union un_egp0 *)0xFFF38).egp0
#define EGP0_bit (*(volatile union un_egp0 *)0xFFF38).BIT
#define EGN0 (*(volatile union un_egn0 *)0xFFF39).egn0
@ -464,21 +536,46 @@ union un_pmc {
#define EGP1_bit (*(volatile union un_egp1 *)0xFFF3A).BIT
#define EGN1 (*(volatile union un_egn1 *)0xFFF3B).egn1
#define EGN1_bit (*(volatile union un_egn1 *)0xFFF3B).BIT
#define SDR02 (*(volatile unsigned short *)0xFFF44)
#define SIO10 (*(volatile unsigned char *)0xFFF44)
#define TXD1 (*(volatile unsigned char *)0xFFF44)
#define SDR03 (*(volatile unsigned short *)0xFFF46)
#define RXD1 (*(volatile unsigned char *)0xFFF46)
#define SIO11 (*(volatile unsigned char *)0xFFF46)
#define SDR10 (*(volatile unsigned short *)0xFFF48)
#define SIO20 (*(volatile unsigned char *)0xFFF48)
#define TXD2 (*(volatile unsigned char *)0xFFF48)
#define SDR11 (*(volatile unsigned short *)0xFFF4A)
#define RXD2 (*(volatile unsigned char *)0xFFF4A)
#define SIO21 (*(volatile unsigned char *)0xFFF4A)
#define IICA0 (*(volatile unsigned char *)0xFFF50)
#define IICS0 (*(volatile union un_iics0 *)0xFFF51).iics0
#define IICS0_bit (*(volatile union un_iics0 *)0xFFF51).BIT
#define IICF0 (*(volatile union un_iicf0 *)0xFFF52).iicf0
#define IICF0_bit (*(volatile union un_iicf0 *)0xFFF52).BIT
#define CFIFO (*(volatile unsigned short *)0xFFF54)
#define CFIFOL (*(volatile unsigned char *)0xFFF54)
#define D0FIFO (*(volatile unsigned short *)0xFFF58)
#define D0FIFOL (*(volatile unsigned char *)0xFFF58)
#define D1FIFO (*(volatile unsigned short *)0xFFF5C)
#define D1FIFOL (*(volatile unsigned char *)0xFFF5C)
#define IICA1 (*(volatile unsigned char *)0xFFF54)
#define IICS1 (*(volatile union un_iics1 *)0xFFF55).iics1
#define IICS1_bit (*(volatile union un_iics1 *)0xFFF55).BIT
#define IICF1 (*(volatile union un_iicf1 *)0xFFF56).iicf1
#define IICF1_bit (*(volatile union un_iicf1 *)0xFFF56).BIT
#define TRDGRC0 (*(volatile unsigned short *)0xFFF58)
#define TRDGRD0 (*(volatile unsigned short *)0xFFF5A)
#define TRDGRC1 (*(volatile unsigned short *)0xFFF5C)
#define TRDGRD1 (*(volatile unsigned short *)0xFFF5E)
#define TRGGRC (*(volatile unsigned short *)0xFFF60)
#define TRGGRD (*(volatile unsigned short *)0xFFF62)
#define TDR02 (*(volatile unsigned short *)0xFFF64)
#define TDR03 (*(volatile unsigned short *)0xFFF66)
#define TDR03L (*(volatile unsigned char *)0xFFF66)
#define TDR03H (*(volatile unsigned char *)0xFFF67)
#define TDR10 (*(volatile unsigned short *)0xFFF70)
#define TDR11 (*(volatile unsigned short *)0xFFF72)
#define TDR11L (*(volatile unsigned char *)0xFFF72)
#define TDR11H (*(volatile unsigned char *)0xFFF73)
#define TDR12 (*(volatile unsigned short *)0xFFF74)
#define TDR13 (*(volatile unsigned short *)0xFFF76)
#define TDR13L (*(volatile unsigned char *)0xFFF76)
#define TDR13H (*(volatile unsigned char *)0xFFF77)
#define FLPMC (*(volatile unsigned char *)0xFFF80)
#define FLARS (*(volatile union un_flars *)0xFFF81).flars
#define FLARS_bit (*(volatile union un_flars *)0xFFF81).BIT
@ -537,28 +634,6 @@ union un_pmc {
#define MONSTA0_bit (*(volatile union un_monsta0 *)0xFFFAE).BIT
#define ASIM (*(volatile union un_asim *)0xFFFAF).asim
#define ASIM_bit (*(volatile union un_asim *)0xFFFAF).BIT
#define DSA0 (*(volatile unsigned char *)0xFFFB0)
#define DSA1 (*(volatile unsigned char *)0xFFFB1)
#define DRA0 (*(volatile unsigned short *)0xFFFB2)
#define DRA0L (*(volatile unsigned char *)0xFFFB2)
#define DRA0H (*(volatile unsigned char *)0xFFFB3)
#define DRA1 (*(volatile unsigned short *)0xFFFB4)
#define DRA1L (*(volatile unsigned char *)0xFFFB4)
#define DRA1H (*(volatile unsigned char *)0xFFFB5)
#define DBC0 (*(volatile unsigned short *)0xFFFB6)
#define DBC0L (*(volatile unsigned char *)0xFFFB6)
#define DBC0H (*(volatile unsigned char *)0xFFFB7)
#define DBC1 (*(volatile unsigned short *)0xFFFB8)
#define DBC1L (*(volatile unsigned char *)0xFFFB8)
#define DBC1H (*(volatile unsigned char *)0xFFFB9)
#define DMC0 (*(volatile union un_dmc0 *)0xFFFBA).dmc0
#define DMC0_bit (*(volatile union un_dmc0 *)0xFFFBA).BIT
#define DMC1 (*(volatile union un_dmc1 *)0xFFFBB).dmc1
#define DMC1_bit (*(volatile union un_dmc1 *)0xFFFBB).BIT
#define DRC0 (*(volatile union un_drc0 *)0xFFFBC).drc0
#define DRC0_bit (*(volatile union un_drc0 *)0xFFFBC).BIT
#define DRC1 (*(volatile union un_drc1 *)0xFFFBD).drc1
#define DRC1_bit (*(volatile union un_drc1 *)0xFFFBD).BIT
#define IF2 (*(volatile union un_if2 *)0xFFFD0).if2
#define IF2_bit (*(volatile union un_if2 *)0xFFFD0).BIT
#define IF2L (*(volatile union un_if2l *)0xFFFD0).if2l
@ -631,14 +706,9 @@ union un_pmc {
#define PR11L_bit (*(volatile union un_pr11l *)0xFFFEE).BIT
#define PR11H (*(volatile union un_pr11h *)0xFFFEF).pr11h
#define PR11H_bit (*(volatile union un_pr11h *)0xFFFEF).BIT
#define MDAL (*(volatile unsigned short *)0xFFFF0)
#define MULA (*(volatile unsigned short *)0xFFFF0)
#define MDAH (*(volatile unsigned short *)0xFFFF2)
#define MULB (*(volatile unsigned short *)0xFFFF2)
#define MDBH (*(volatile unsigned short *)0xFFFF4)
#define MULOH (*(volatile unsigned short *)0xFFFF4)
#define MDBL (*(volatile unsigned short *)0xFFFF6)
#define MULOL (*(volatile unsigned short *)0xFFFF6)
#define MACRL (*(volatile unsigned short *)0xFFFF0)
#define MACRH (*(volatile unsigned short *)0xFFFF2)
#define MDUC (*(volatile unsigned char *)0xFFFFB)
#define PMC (*(volatile union un_pmc *)0xFFFFE).pmc
#define PMC_bit (*(volatile union un_pmc *)0xFFFFE).BIT
@ -647,6 +717,8 @@ union un_pmc {
*/
#define ADCE ADM0_bit.no0
#define ADCS ADM0_bit.no7
#define DACE0 DAM_bit.no4
#define DACE1 DAM_bit.no5
#define SPD0 IICS0_bit.no0
#define STD0 IICS0_bit.no1
#define ACKD0 IICS0_bit.no2
@ -659,10 +731,23 @@ union un_pmc {
#define STCEN0 IICF0_bit.no1
#define IICBSY0 IICF0_bit.no6
#define STCF0 IICF0_bit.no7
#define SPD1 IICS1_bit.no0
#define STD1 IICS1_bit.no1
#define ACKD1 IICS1_bit.no2
#define TRC1 IICS1_bit.no3
#define COI1 IICS1_bit.no4
#define EXC1 IICS1_bit.no5
#define ALD1 IICS1_bit.no6
#define MSTS1 IICS1_bit.no7
#define IICRSV1 IICF1_bit.no0
#define STCEN1 IICF1_bit.no1
#define IICBSY1 IICF1_bit.no6
#define STCF1 IICF1_bit.no7
#define FSSTP FSSQ_bit.no6
#define SQST FSSQ_bit.no7
#define SQEND FSASTH_bit.no6
#define ESQEND FSASTH_bit.no7
#define RCLOE1 RTCC0_bit.no5
#define RTCE RTCC0_bit.no7
#define RWAIT RTCC1_bit.no0
#define RWST RTCC1_bit.no1
@ -671,9 +756,13 @@ union un_pmc {
#define WALIE RTCC1_bit.no6
#define WALE RTCC1_bit.no7
#define HIOSTOP CSC_bit.no0
#define XTSTOP CSC_bit.no6
#define MSTOP CSC_bit.no7
#define SDIV CKC_bit.no3
#define MCM0 CKC_bit.no4
#define MCS CKC_bit.no5
#define CSS CKC_bit.no6
#define CLS CKC_bit.no7
#define PCLOE0 CKS0_bit.no7
#define PCLOE1 CKS1_bit.no7
#define LVIF LVIM_bit.no0
@ -681,34 +770,79 @@ union un_pmc {
#define LVISEN LVIM_bit.no7
#define LVILV LVIS_bit.no0
#define LVIMD LVIS_bit.no7
#define DWAIT0 DMC0_bit.no4
#define DS0 DMC0_bit.no5
#define DRS0 DMC0_bit.no6
#define STG0 DMC0_bit.no7
#define DWAIT1 DMC1_bit.no4
#define DS1 DMC1_bit.no5
#define DRS1 DMC1_bit.no6
#define STG1 DMC1_bit.no7
#define DST0 DRC0_bit.no0
#define DEN0 DRC0_bit.no7
#define DST1 DRC1_bit.no0
#define DEN1 DRC1_bit.no7
#define TMIF11 IF2_bit.no0
#define TMIF12 IF2_bit.no1
#define TMIF13 IF2_bit.no2
#define PIF6 IF2_bit.no3
#define PIF7 IF2_bit.no4
#define PIF8 IF2_bit.no5
#define PIF9 IF2_bit.no6
#define MDIF IF2H_bit.no5
#define CMPIF0 IF2_bit.no7
#define PIF10 IF2_bit.no7
#define CMPIF1 IF2H_bit.no0
#define PIF11 IF2H_bit.no0
#define TRDIF0 IF2H_bit.no1
#define TRDIF1 IF2H_bit.no2
#define TRGIF IF2H_bit.no3
#define SREIF3 IF2H_bit.no4
#define TMIF13H IF2H_bit.no4
#define IICAIF1 IF2H_bit.no6
#define FLIF IF2H_bit.no7
#define TMMK11 MK2_bit.no0
#define TMMK12 MK2_bit.no1
#define TMMK13 MK2_bit.no2
#define PMK6 MK2_bit.no3
#define PMK7 MK2_bit.no4
#define PMK8 MK2_bit.no5
#define PMK9 MK2_bit.no6
#define MDMK MK2H_bit.no5
#define CMPMK0 MK2_bit.no7
#define PMK10 MK2_bit.no7
#define CMPMK1 MK2H_bit.no0
#define PMK11 MK2H_bit.no0
#define TRDMK0 MK2H_bit.no1
#define TRDMK1 MK2H_bit.no2
#define TRGMK MK2H_bit.no3
#define SREMK3 MK2H_bit.no4
#define TMMK13H MK2H_bit.no4
#define IICAMK1 MK2H_bit.no6
#define FLMK MK2H_bit.no7
#define TMPR011 PR02_bit.no0
#define TMPR012 PR02_bit.no1
#define TMPR013 PR02_bit.no2
#define PPR06 PR02_bit.no3
#define PPR07 PR02_bit.no4
#define PPR08 PR02_bit.no5
#define PPR09 PR02_bit.no6
#define MDPR0 PR02H_bit.no5
#define CMPPR00 PR02_bit.no7
#define PPR010 PR02_bit.no7
#define CMPPR01 PR02H_bit.no0
#define PPR011 PR02H_bit.no0
#define TRDPR00 PR02H_bit.no1
#define TRDPR01 PR02H_bit.no2
#define TRGPR0 PR02H_bit.no3
#define SREPR03 PR02H_bit.no4
#define TMPR013H PR02H_bit.no4
#define IICAPR01 PR02H_bit.no6
#define FLPR0 PR02H_bit.no7
#define TMPR111 PR12_bit.no0
#define TMPR112 PR12_bit.no1
#define TMPR113 PR12_bit.no2
#define PPR16 PR12_bit.no3
#define PPR17 PR12_bit.no4
#define PPR18 PR12_bit.no5
#define PPR19 PR12_bit.no6
#define MDPR1 PR12H_bit.no5
#define CMPPR10 PR12_bit.no7
#define PPR110 PR12_bit.no7
#define CMPPR11 PR12H_bit.no0
#define PPR111 PR12H_bit.no0
#define TRDPR10 PR12H_bit.no1
#define TRDPR11 PR12H_bit.no2
#define TRGPR1 PR12H_bit.no3
#define SREPR13 PR12H_bit.no4
#define TMPR113H PR12H_bit.no4
#define IICAPR11 PR12H_bit.no6
#define FLPR1 PR12H_bit.no7
#define SROIF IF0_bit.no0
#define WDTIIF IF0_bit.no0
#define LVIIF IF0_bit.no1
#define PIF0 IF0_bit.no2
@ -717,27 +851,48 @@ union un_pmc {
#define PIF3 IF0_bit.no5
#define PIF4 IF0_bit.no6
#define PIF5 IF0_bit.no7
#define DMAIF0 IF0H_bit.no3
#define DMAIF1 IF0H_bit.no4
#define CSIIF20 IF0H_bit.no0
#define IICIF20 IF0H_bit.no0
#define STIF2 IF0H_bit.no0
#define CSIIF21 IF0H_bit.no1
#define IICIF21 IF0H_bit.no1
#define SRIF2 IF0H_bit.no1
#define SREIF2 IF0H_bit.no2
#define TMIF11H IF0H_bit.no2
#define CSIIF00 IF0H_bit.no5
#define IICIF00 IF0H_bit.no5
#define STIF0 IF0H_bit.no5
#define TMIF00 IF0H_bit.no6
#define CSIIF01 IF0H_bit.no7
#define IICIF01 IF0H_bit.no7
#define SRIF0 IF0H_bit.no7
#define SREIF0 IF1_bit.no0
#define TMIF01H IF1_bit.no0
#define TMIF03H IF1_bit.no3
#define IICAIF0 IF1_bit.no4
#define CSIIF01 IF0H_bit.no6
#define IICIF01 IF0H_bit.no6
#define SRIF0 IF0H_bit.no6
#define SREIF0 IF0H_bit.no7
#define TMIF01H IF0H_bit.no7
#define CSIIF10 IF1_bit.no0
#define IICIF10 IF1_bit.no0
#define STIF1 IF1_bit.no0
#define CSIIF11 IF1_bit.no1
#define IICIF11 IF1_bit.no1
#define SRIF1 IF1_bit.no1
#define SREIF1 IF1_bit.no2
#define TMIF03H IF1_bit.no2
#define IICAIF0 IF1_bit.no3
#define TMIF00 IF1_bit.no4
#define TMIF01 IF1_bit.no5
#define TMIF02 IF1_bit.no6
#define TMIF03 IF1_bit.no7
#define ADIF IF1H_bit.no0
#define RTCIF IF1H_bit.no1
#define ITIF IF1H_bit.no2
#define USBIF IF1H_bit.no4
#define RSUIF IF1H_bit.no5
#define KRIF IF1H_bit.no3
#define CSIIF30 IF1H_bit.no4
#define IICIF30 IF1H_bit.no4
#define STIF3 IF1H_bit.no4
#define CSIIF31 IF1H_bit.no5
#define IICIF31 IF1H_bit.no5
#define SRIF3 IF1H_bit.no5
#define TRJIF0 IF1H_bit.no6
#define TMIF10 IF1H_bit.no7
#define SROMK MK0_bit.no0
#define WDTIMK MK0_bit.no0
#define LVIMK MK0_bit.no1
#define PMK0 MK0_bit.no2
@ -746,27 +901,48 @@ union un_pmc {
#define PMK3 MK0_bit.no5
#define PMK4 MK0_bit.no6
#define PMK5 MK0_bit.no7
#define DMAMK0 MK0H_bit.no3
#define DMAMK1 MK0H_bit.no4
#define CSIMK20 MK0H_bit.no0
#define IICMK20 MK0H_bit.no0
#define STMK2 MK0H_bit.no0
#define CSIMK21 MK0H_bit.no1
#define IICMK21 MK0H_bit.no1
#define SRMK2 MK0H_bit.no1
#define SREMK2 MK0H_bit.no2
#define TMMK11H MK0H_bit.no2
#define CSIMK00 MK0H_bit.no5
#define IICMK00 MK0H_bit.no5
#define STMK0 MK0H_bit.no5
#define TMMK00 MK0H_bit.no6
#define CSIMK01 MK0H_bit.no7
#define IICMK01 MK0H_bit.no7
#define SRMK0 MK0H_bit.no7
#define SREMK0 MK1_bit.no0
#define TMMK01H MK1_bit.no0
#define TMMK03H MK1_bit.no3
#define IICAMK0 MK1_bit.no4
#define CSIMK01 MK0H_bit.no6
#define IICMK01 MK0H_bit.no6
#define SRMK0 MK0H_bit.no6
#define SREMK0 MK0H_bit.no7
#define TMMK01H MK0H_bit.no7
#define CSIMK10 MK1_bit.no0
#define IICMK10 MK1_bit.no0
#define STMK1 MK1_bit.no0
#define CSIMK11 MK1_bit.no1
#define IICMK11 MK1_bit.no1
#define SRMK1 MK1_bit.no1
#define SREMK1 MK1_bit.no2
#define TMMK03H MK1_bit.no2
#define IICAMK0 MK1_bit.no3
#define TMMK00 MK1_bit.no4
#define TMMK01 MK1_bit.no5
#define TMMK02 MK1_bit.no6
#define TMMK03 MK1_bit.no7
#define ADMK MK1H_bit.no0
#define RTCMK MK1H_bit.no1
#define ITMK MK1H_bit.no2
#define USBMK MK1H_bit.no4
#define RSUMK MK1H_bit.no5
#define KRMK MK1H_bit.no3
#define CSIMK30 MK1H_bit.no4
#define IICMK30 MK1H_bit.no4
#define STMK3 MK1H_bit.no4
#define CSIMK31 MK1H_bit.no5
#define IICMK31 MK1H_bit.no5
#define SRMK3 MK1H_bit.no5
#define TRJMK0 MK1H_bit.no6
#define TMMK10 MK1H_bit.no7
#define SROPR0 PR00_bit.no0
#define WDTIPR0 PR00_bit.no0
#define LVIPR0 PR00_bit.no1
#define PPR00 PR00_bit.no2
@ -775,27 +951,48 @@ union un_pmc {
#define PPR03 PR00_bit.no5
#define PPR04 PR00_bit.no6
#define PPR05 PR00_bit.no7
#define DMAPR00 PR00H_bit.no3
#define DMAPR01 PR00H_bit.no4
#define CSIPR020 PR00H_bit.no0
#define IICPR020 PR00H_bit.no0
#define STPR02 PR00H_bit.no0
#define CSIPR021 PR00H_bit.no1
#define IICPR021 PR00H_bit.no1
#define SRPR02 PR00H_bit.no1
#define SREPR02 PR00H_bit.no2
#define TMPR011H PR00H_bit.no2
#define CSIPR000 PR00H_bit.no5
#define IICPR000 PR00H_bit.no5
#define STPR00 PR00H_bit.no5
#define TMPR000 PR00H_bit.no6
#define CSIPR001 PR00H_bit.no7
#define IICPR001 PR00H_bit.no7
#define SRPR00 PR00H_bit.no7
#define SREPR00 PR01_bit.no0
#define TMPR001H PR01_bit.no0
#define TMPR003H PR01_bit.no3
#define IICAPR00 PR01_bit.no4
#define CSIPR001 PR00H_bit.no6
#define IICPR001 PR00H_bit.no6
#define SRPR00 PR00H_bit.no6
#define SREPR00 PR00H_bit.no7
#define TMPR001H PR00H_bit.no7
#define CSIPR010 PR01_bit.no0
#define IICPR010 PR01_bit.no0
#define STPR01 PR01_bit.no0
#define CSIPR011 PR01_bit.no1
#define IICPR011 PR01_bit.no1
#define SRPR01 PR01_bit.no1
#define SREPR01 PR01_bit.no2
#define TMPR003H PR01_bit.no2
#define IICAPR00 PR01_bit.no3
#define TMPR000 PR01_bit.no4
#define TMPR001 PR01_bit.no5
#define TMPR002 PR01_bit.no6
#define TMPR003 PR01_bit.no7
#define ADPR0 PR01H_bit.no0
#define RTCPR0 PR01H_bit.no1
#define ITPR0 PR01H_bit.no2
#define USBPR0 PR01H_bit.no4
#define RSUPR0 PR01H_bit.no5
#define KRPR0 PR01H_bit.no3
#define CSIPR030 PR01H_bit.no4
#define IICPR030 PR01H_bit.no4
#define STPR03 PR01H_bit.no4
#define CSIPR031 PR01H_bit.no5
#define IICPR031 PR01H_bit.no5
#define SRPR03 PR01H_bit.no5
#define TRJPR00 PR01H_bit.no6
#define TMPR010 PR01H_bit.no7
#define SROPR1 PR10_bit.no0
#define WDTIPR1 PR10_bit.no0
#define LVIPR1 PR10_bit.no1
#define PPR10 PR10_bit.no2
@ -804,27 +1001,47 @@ union un_pmc {
#define PPR13 PR10_bit.no5
#define PPR14 PR10_bit.no6
#define PPR15 PR10_bit.no7
#define DMAPR10 PR10H_bit.no3
#define DMAPR11 PR10H_bit.no4
#define CSIPR120 PR10H_bit.no0
#define IICPR120 PR10H_bit.no0
#define STPR12 PR10H_bit.no0
#define CSIPR121 PR10H_bit.no1
#define IICPR121 PR10H_bit.no1
#define SRPR12 PR10H_bit.no1
#define SREPR12 PR10H_bit.no2
#define TMPR111H PR10H_bit.no2
#define CSIPR100 PR10H_bit.no5
#define IICPR100 PR10H_bit.no5
#define STPR10 PR10H_bit.no5
#define TMPR100 PR10H_bit.no6
#define CSIPR101 PR10H_bit.no7
#define IICPR101 PR10H_bit.no7
#define SRPR10 PR10H_bit.no7
#define SREPR10 PR11_bit.no0
#define TMPR101H PR11_bit.no0
#define TMPR103H PR11_bit.no3
#define IICAPR10 PR11_bit.no4
#define CSIPR101 PR10H_bit.no6
#define IICPR101 PR10H_bit.no6
#define SRPR10 PR10H_bit.no6
#define SREPR10 PR10H_bit.no7
#define TMPR101H PR10H_bit.no7
#define CSIPR110 PR11_bit.no0
#define IICPR110 PR11_bit.no0
#define STPR11 PR11_bit.no0
#define CSIPR111 PR11_bit.no1
#define IICPR111 PR11_bit.no1
#define SRPR11 PR11_bit.no1
#define SREPR11 PR11_bit.no2
#define TMPR103H PR11_bit.no2
#define IICAPR10 PR11_bit.no3
#define TMPR100 PR11_bit.no4
#define TMPR101 PR11_bit.no5
#define TMPR102 PR11_bit.no6
#define TMPR103 PR11_bit.no7
#define ADPR1 PR11H_bit.no0
#define RTCPR1 PR11H_bit.no1
#define ITPR1 PR11H_bit.no2
#define USBPR1 PR11H_bit.no4
#define RSUPR1 PR11H_bit.no5
#define KRPR1 PR11H_bit.no3
#define CSIPR130 PR11H_bit.no4
#define IICPR130 PR11H_bit.no4
#define STPR13 PR11H_bit.no4
#define CSIPR131 PR11H_bit.no5
#define IICPR131 PR11H_bit.no5
#define SRPR13 PR11H_bit.no5
#define TRJPR10 PR11H_bit.no6
#define TMPR110 PR11H_bit.no7
#define MAA PMC_bit.no0
/*
@ -841,30 +1058,64 @@ union un_pmc {
#define INTP3_vect (0xE)
#define INTP4_vect (0x10)
#define INTP5_vect (0x12)
#define INTDMA0_vect (0x1A)
#define INTDMA1_vect (0x1C)
#define INTCSI20_vect (0x14)
#define INTIIC20_vect (0x14)
#define INTST2_vect (0x14)
#define INTCSI21_vect (0x16)
#define INTIIC21_vect (0x16)
#define INTSR2_vect (0x16)
#define INTSRE2_vect (0x18)
#define INTTM11H_vect (0x18)
#define INTCSI00_vect (0x1E)
#define INTIIC00_vect (0x1E)
#define INTST0_vect (0x1E)
#define INTTM00_vect (0x20)
#define INTCSI01_vect (0x22)
#define INTIIC01_vect (0x22)
#define INTSR0_vect (0x22)
#define INTSRE0_vect (0x24)
#define INTTM01H_vect (0x24)
#define INTTM03H_vect (0x2A)
#define INTIICA0_vect (0x2C)
#define INTCSI01_vect (0x20)
#define INTIIC01_vect (0x20)
#define INTSR0_vect (0x20)
#define INTSRE0_vect (0x22)
#define INTTM01H_vect (0x22)
#define INTCSI10_vect (0x24)
#define INTIIC10_vect (0x24)
#define INTST1_vect (0x24)
#define INTCSI11_vect (0x26)
#define INTIIC11_vect (0x26)
#define INTSR1_vect (0x26)
#define INTSRE1_vect (0x28)
#define INTTM03H_vect (0x28)
#define INTIICA0_vect (0x2A)
#define INTTM00_vect (0x2C)
#define INTTM01_vect (0x2E)
#define INTTM02_vect (0x30)
#define INTTM03_vect (0x32)
#define INTAD_vect (0x34)
#define INTRTC_vect (0x36)
#define INTIT_vect (0x38)
#define INTUSB_vect (0x3C)
#define INTRSUM_vect (0x3E)
#define INTKR_vect (0x3A)
#define INTCSI30_vect (0x3C)
#define INTIIC30_vect (0x3C)
#define INTST3_vect (0x3C)
#define INTCSI31_vect (0x3E)
#define INTIIC31_vect (0x3E)
#define INTSR3_vect (0x3E)
#define INTTRJ0_vect (0x40)
#define INTTM10_vect (0x42)
#define INTTM11_vect (0x44)
#define INTTM12_vect (0x46)
#define INTTM13_vect (0x48)
#define INTP6_vect (0x4A)
#define INTP7_vect (0x4C)
#define INTP8_vect (0x4E)
#define INTP9_vect (0x50)
#define INTMD_vect (0x5E)
#define INTCMP0_vect (0x52)
#define INTP10_vect (0x52)
#define INTCMP1_vect (0x54)
#define INTP11_vect (0x54)
#define INTTRD0_vect (0x56)
#define INTTRD1_vect (0x58)
#define INTTRG_vect (0x5A)
#define INTSRE3_vect (0x5C)
#define INTTM13H_vect (0x5C)
#define INTIICA1_vect (0x60)
#define INTFL_vect (0x62)
#define BRK_I_vect (0x7E)
#endif

File diff suppressed because it is too large Load Diff

View File

@ -135,6 +135,8 @@
/* Hardware includes. */
#include "port_iodefine.h"
#include "port_iodefine_ext.h"
#include "LED.h"
/* The period at which the check timer will expire, in ms, provided no errors
have been reported by any of the standard demo tasks. ms are converted to the
@ -154,9 +156,6 @@ its own executions. */
#define mainDEMO_TIMER_INCREMENTS_PER_CHECK_TIMER_TIMEOUT ( 100UL )
#define mainDEMO_TIMER_PERIOD_MS ( mainCHECK_TIMER_PERIOD_MS / mainDEMO_TIMER_INCREMENTS_PER_CHECK_TIMER_TIMEOUT )
/* The LED toggled by the check timer. */
#define mainLED_0 P1_bit.no0
/* A block time of zero simple means "don't block". */
#define mainDONT_BLOCK ( 0U )
@ -172,12 +171,6 @@ static void prvCheckTimerCallback( xTimerHandle xTimer );
*/
static void prvDemoTimerCallback( xTimerHandle xTimer );
/*
* This function is called from the C startup routine to setup the processor -
* in particular the clock source.
*/
int __low_level_init(void);
/*
* Functions that define the RegTest tasks, as described at the top of this file.
*/
@ -201,25 +194,14 @@ static xTimerHandle xDemoTimer = NULL;
/* This variable is incremented each time the demo timer expires. */
static volatile unsigned long ulDemoSoftwareTimerCounter = 0UL;
/* RL78/G13 Option Byte Definition. Watchdog disabled, LVI enabled, OCD interface
enabled. */
#if 0
__root __far const unsigned char OptionByte[] @ 0x00C0 =
{
0x00U, 0xFFU, 0xF8U, 0x81U
};
/* Security byte definition */
__root __far const unsigned char ucSecurityCode[] @ 0x00C4 =
{
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
#endif
/*-----------------------------------------------------------*/
volatile unsigned char ucTemp;
short main( void )
{
ucTemp = RESF;
ucTemp = sizeof( char* );
ucTemp = sizeof( pdTASK_CODE );
/* Creates all the tasks and timers, then starts the scheduler. */
/* First create the 'standard demo' tasks. These are used to demonstrate
@ -349,45 +331,7 @@ static unsigned short usLastRegTest1Counter = 0, usLastRegTest2Counter = 0;
/* Toggle the LED. The toggle rate will depend on whether or not an error
has been found in any tasks. */
mainLED_0 = !mainLED_0;
}
/*-----------------------------------------------------------*/
int __low_level_init(void)
{
unsigned portCHAR ucResetFlag = RESF;
portDISABLE_INTERRUPTS();
/* Set fMX */
CMC = 0x00;
MSTOP = 1U;
/* Set fMAIN */
MCM0 = 0U;
/* Set fSUB */
XTSTOP = 1U;
OSMC = 0x10;
/* Set fCLK */
CSS = 0U;
/* Set fIH */
HIOSTOP = 0U;
/* LED port initialization - set port register. */
// P7 &= 0x7F;
P1 &= 0xFE;
/* Set port mode register. */
// PM7 &= 0x7F;
PM1 &= 0xFE;
/* Switch pin initialization - enable pull-up resistor. */
// PU12_bit.no0 = 1;
return pdTRUE;
LED_BIT = !LED_BIT;
}
/*-----------------------------------------------------------*/
@ -438,4 +382,5 @@ volatile size_t xFreeHeapSpace;
RAM. */
xFreeHeapSpace = xPortGetFreeHeapSize();
}
/*-----------------------------------------------------------*/

View File

@ -3,8 +3,8 @@
/* PROJECT NAME : RTOSDemo */
/* FILE : reset_program.asm */
/* DESCRIPTION : Reset Program */
/* CPU SERIES : RL78 - G1C */
/* CPU TYPE : R5F10JBC */
/* CPU SERIES : RL78 - G14 */
/* CPU TYPE : R5F104PJ */
/* */
/* This file is generated by e2studio. */
/* */

View File

@ -3,8 +3,8 @@
/* PROJECT NAME : RTOSDemo */
/* FILE : typedefine.h */
/* DESCRIPTION : Aliases of Integer Type */
/* CPU SERIES : RL78 - G1C */
/* CPU TYPE : R5F10JBC */
/* CPU SERIES : RL78 - G14 */
/* CPU TYPE : R5F104PJ */
/* */
/* This file is generated by e2studio. */
/* */

View File

@ -1,21 +1,24 @@
/***********************************************************************/
/* */
/* PROJECT NAME : RTOSDemo */
/* PROJECT NAME : test */
/* FILE : vector_table.c */
/* DESCRIPTION : Vector Table */
/* CPU SERIES : RL78 - G1C */
/* CPU TYPE : R5F10JBC */
/* CPU SERIES : RL78 - G14 */
/* CPU TYPE : R5F104PJ */
/* */
/* This file is generated by e2studio. */
/* */
/***********************************************************************/
#include "interrupt_handlers.h"
extern void PowerON_Reset (void);
extern void PowerON_Reset( void );
extern void vPortTickISR( void );
extern void vPortYield( void );
#warning Check the options bytes.
const unsigned char Option_Bytes[] __attribute__ ((section (".option_bytes"))) = {
0xef, 0xff, 0xe8, 0x85
0x6e, 0xff, 0xe8, 0x85 /* 0x00U, 0xFFU, 0xF8U, 0x81U */
};
const unsigned char Security_Id[] __attribute__ ((section (".security_id"))) = {
@ -46,32 +49,32 @@ const void *Vectors[] VECT_SECT = {
INT_P4,
//INT_P5 (0x12)
INT_P5,
//INT_CSI20/INT_IIC20/INT_ST2 (0x14)
INT_ST2,
//INT_CSI21/INT_IIC21/INT_SR2 (0x16)
INT_SR2,
//INT_SRE2/INT_TM11H (0x18)
INT_TM11H,
// Padding
(void*)0xFFFF,
// Padding
(void*)0xFFFF,
// Padding
(void*)0xFFFF,
//INT_DMA0 (0x1A)
INT_DMA0,
//INT_DMA1 (0x1C)
INT_DMA1,
//INT_CSI00/INT_IIC00/INT_ST0 (0x1E)
INT_ST0,
//INT_TM00 (0x20)
INT_TM00,
//INT_CSI01/INT_IIC01/INT_SR0 (0x22)
//INT_CSI01/INT_IIC01/INT_SR0 (0x20)
INT_SR0,
//INT_SRE0/INT_TM01H (0x24)
//INT_SRE0/INT_TM01H (0x22)
INT_TM01H,
// Padding
(void*)0xFFFF,
// Padding
(void*)0xFFFF,
//INT_TM03H (0x2A)
//INT_CSI10/INT_IIC10/INT_ST1 (0x24)
INT_ST1,
//INT_CSI11/INT_IIC11/INT_SR1 (0x26)
INT_SR1,
//INT_SRE1/INT_TM03H (0x28)
INT_TM03H,
//INT_IICA0 (0x2C)
//INT_IICA0 (0x2A)
INT_IICA0,
//INT_TM00 (0x2C)
INT_TM00,
//INT_TM01 (0x2E)
INT_TM01,
//INT_TM02 (0x30)
@ -83,47 +86,47 @@ const void *Vectors[] VECT_SECT = {
//INT_RTC (0x36)
INT_RTC,
//INT_IT (0x38)
INT_IT,
// Padding
(void*)0xFFFF,
//INT_USB (0x3C)
INT_USB,
//INT_RSUM (0x3E)
INT_RSUM,
// Padding
(void*)0xFFFF,
// Padding
(void*)0xFFFF,
// Padding
(void*)0xFFFF,
// Padding
(void*)0xFFFF,
// Padding
(void*)0xFFFF,
// Padding
(void*)0xFFFF,
// Padding
(void*)0xFFFF,
vPortTickISR,
//INT_KR (0x3A)
INT_KR,
//INT_CSI30/INT_IIC30/INT_ST3 (0x3C)
INT_ST3,
//INT_CSI31/INT_IIC31/INT_SR3 (0x3E)
INT_SR3,
//INT_TRJ0 (0x40)
INT_TRJ0,
//INT_TM10 (0x42)
INT_TM10,
//INT_TM11 (0x44)
INT_TM11,
//INT_TM12 (0x46)
INT_TM12,
//INT_TM13 (0x48)
INT_TM13,
//INT_P6 (0x4A)
INT_P6,
//INT_P7 (0x4C)
INT_P7,
//INT_P8 (0x4E)
INT_P8,
//INT_P9 (0x50)
INT_P9,
//INT_CMP0/INT_P10 (0x52)
INT_P10,
//INT_CMP1/INT_P11 (0x54)
INT_P11,
//INT_TRD0 (0x56)
INT_TRD0,
//INT_TRD1 (0x58)
INT_TRD1,
//INT_TRG (0x5A)
INT_TRG,
//INT_SRE3/INT_TM13H (0x5C)
INT_TM13H,
// Padding
(void*)0xFFFF,
// Padding
(void*)0xFFFF,
// Padding
(void*)0xFFFF,
// Padding
(void*)0xFFFF,
// Padding
(void*)0xFFFF,
// Padding
(void*)0xFFFF,
//INT_MD (0x5E)
INT_MD,
// Padding
(void*)0xFFFF,
//INT_IICA1 (0x60)
INT_IICA1,
//INT_FL (0x62)
INT_FL,
// Padding
@ -153,6 +156,6 @@ const void *Vectors[] VECT_SECT = {
// Padding
(void*)0xFFFF,
//INT_BRK_I (0x7E)
INT_BRK_I,
vPortYield,
};