Adding GCC/Keil/IAR projects for NXP LPC51U68 (CM0+).
Please see readme.txt for todo items.
This commit is contained in:
Yuhui.Zheng
parent
9c0e3fe9f1
commit
c07f60c383
797
FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/.cproject
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797
FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/.cproject
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<option id="com.crt.advproject.link.ecrp.235561114" name="Enhanced CRP" superClass="com.crt.advproject.link.ecrp"/>
|
||||
<option id="com.crt.advproject.link.gcc.hdrlib.1318746602" name="Library" superClass="com.crt.advproject.link.gcc.hdrlib" value="com.crt.advproject.gcc.link.hdrlib.codered.nohost_nf" valueType="enumerated"/>
|
||||
<option id="com.crt.advproject.link.gcc.nanofloat.1176939728" name="Enable printf float " superClass="com.crt.advproject.link.gcc.nanofloat"/>
|
||||
<option id="com.crt.advproject.link.gcc.nanofloat.scanf.2009723850" name="Enable scanf float " superClass="com.crt.advproject.link.gcc.nanofloat.scanf"/>
|
||||
<option id="com.crt.advproject.link.toram.1034538465" name="Link application to RAM" superClass="com.crt.advproject.link.toram"/>
|
||||
<option defaultValue="com.crt.advproject.heapAndStack.mcuXpressoStyle" id="com.crt.advproject.link.memory.heapAndStack.style.2036090275" name="Heap and Stack placement" superClass="com.crt.advproject.link.memory.heapAndStack.style" valueType="enumerated"/>
|
||||
<option id="com.crt.advproject.link.stackOffset.610127548" name="Stack offset" superClass="com.crt.advproject.link.stackOffset"/>
|
||||
<option id="com.crt.advproject.link.gcc.multicore.slave.528555100" name="Multicore configuration" superClass="com.crt.advproject.link.gcc.multicore.slave"/>
|
||||
<option id="com.crt.advproject.link.gcc.multicore.master.622377763" name="Multicore master" superClass="com.crt.advproject.link.gcc.multicore.master"/>
|
||||
<option id="com.crt.advproject.link.gcc.multicore.empty.392757559" name="No Multicore options for this project" superClass="com.crt.advproject.link.gcc.multicore.empty"/>
|
||||
<option id="com.crt.advproject.link.config.1648365937" name="Obsolete (Config)" superClass="com.crt.advproject.link.config"/>
|
||||
<option id="com.crt.advproject.link.store.61505212" name="Obsolete (Store)" superClass="com.crt.advproject.link.store"/>
|
||||
<option id="com.crt.advproject.link.securestate.689470570" name="TrustZone Project Type" superClass="com.crt.advproject.link.securestate"/>
|
||||
<option id="com.crt.advproject.link.sgstubs.placement.1233117386" name="Secure Gateway Placement" superClass="com.crt.advproject.link.sgstubs.placement"/>
|
||||
<option id="com.crt.advproject.link.sgstubenable.138399628" name="Enable generation of Secure Gateway Import Library" superClass="com.crt.advproject.link.sgstubenable"/>
|
||||
<option id="com.crt.advproject.link.nonsecureobject.1063343059" name="Secure Gateway Import Library" superClass="com.crt.advproject.link.nonsecureobject"/>
|
||||
<option id="com.crt.advproject.link.inimplib.976818411" name="Input Secure Gateway Import Library" superClass="com.crt.advproject.link.inimplib"/>
|
||||
<inputType id="cdt.managedbuild.tool.gnu.c.linker.input.1202837200" superClass="cdt.managedbuild.tool.gnu.c.linker.input">
|
||||
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
|
||||
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
|
||||
</inputType>
|
||||
</tool>
|
||||
<tool id="com.crt.advproject.tool.debug.release.2087936142" name="MCU Debugger" superClass="com.crt.advproject.tool.debug.release">
|
||||
<option id="com.crt.advproject.miscellaneous.end_of_heap.294279426" name="Last used address of the heap" superClass="com.crt.advproject.miscellaneous.end_of_heap"/>
|
||||
<option id="com.crt.advproject.miscellaneous.pvHeapStart.774328861" name="First address of the heap" superClass="com.crt.advproject.miscellaneous.pvHeapStart"/>
|
||||
<option id="com.crt.advproject.miscellaneous.pvHeapLimit.239417366" name="Maximum extent of heap" superClass="com.crt.advproject.miscellaneous.pvHeapLimit"/>
|
||||
<option id="com.crt.advproject.debugger.security.nonsecureimageenable.2071268734" name="Enable pre-programming of Non-Secure Image" superClass="com.crt.advproject.debugger.security.nonsecureimageenable"/>
|
||||
<option id="com.crt.advproject.debugger.security.nonsecureimage.1016842747" name="Non-Secure Project" superClass="com.crt.advproject.debugger.security.nonsecureimage"/>
|
||||
</tool>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
<folderInfo id="com.crt.advproject.config.exe.release.464536397.1055803883" name="/" resourcePath="GCC_specific">
|
||||
<toolChain id="com.crt.advproject.toolchain.exe.release.1684039254" name="NXP MCU Tools" superClass="com.crt.advproject.toolchain.exe.release" unusedChildren="">
|
||||
<targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.release" name="ARM-based MCU (Release)" superClass="com.crt.advproject.platform.exe.release"/>
|
||||
<tool id="com.crt.advproject.cpp.exe.release.1563645430" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.release.335033598"/>
|
||||
<tool id="com.crt.advproject.gcc.exe.release.721503565" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.release.495339751">
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.c.compiler.option.include.paths.158723152" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" valueType="includePath">
|
||||
<listOptionValue builtIn="false" value="../drivers"/>
|
||||
<listOptionValue builtIn="false" value="../utilities"/>
|
||||
<listOptionValue builtIn="false" value="../component/serial_manager"/>
|
||||
<listOptionValue builtIn="false" value="../CMSIS"/>
|
||||
<listOptionValue builtIn="false" value="../component/uart"/>
|
||||
<listOptionValue builtIn="false" value="../device"/>
|
||||
<listOptionValue builtIn="false" value="../component/lists"/>
|
||||
<listOptionValue builtIn="false" value="../app"/>
|
||||
<listOptionValue builtIn="false" value="../../../Source/include"/>
|
||||
<listOptionValue builtIn="false" value="../../../Source/portable/GCC/ARM_CM0"/>
|
||||
<listOptionValue builtIn="false" value="../../../Demo/Common/include"/>
|
||||
<listOptionValue builtIn="false" value="../board"/>
|
||||
<listOptionValue builtIn="false" value="../board/boards"/>
|
||||
<listOptionValue builtIn="false" value="../../../Source"/>
|
||||
<listOptionValue builtIn="false" value="../source"/>
|
||||
<listOptionValue builtIn="false" value="../"/>
|
||||
<listOptionValue builtIn="false" value="../../Source/include"/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/CORTEX_M0+_LPC51U68_LPCXpresso/Source}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/CORTEX_M0+_LPC51U68_LPCXpresso/Source/include}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/CORTEX_M0+_LPC51U68_LPCXpresso/Source/portable/GCC/ARM_CM0}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/CORTEX_M0+_LPC51U68_LPCXpresso/Source/portable/MemMang}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/Demo/Common/include}""/>
|
||||
<listOptionValue builtIn="false" value="../GCC_specific"/>
|
||||
</option>
|
||||
<inputType id="com.crt.advproject.compiler.input.1678318070" superClass="com.crt.advproject.compiler.input"/>
|
||||
</tool>
|
||||
<tool id="com.crt.advproject.gas.exe.release.1825799419" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.release.500750498">
|
||||
<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="gnu.both.asm.option.include.paths.1523484051" name="Include paths (-I)" superClass="gnu.both.asm.option.include.paths" valueType="includePath">
|
||||
<listOptionValue builtIn="false" value="../drivers"/>
|
||||
<listOptionValue builtIn="false" value="../utilities"/>
|
||||
<listOptionValue builtIn="false" value="../component/serial_manager"/>
|
||||
<listOptionValue builtIn="false" value="../CMSIS"/>
|
||||
<listOptionValue builtIn="false" value="../component/uart"/>
|
||||
<listOptionValue builtIn="false" value="../device"/>
|
||||
<listOptionValue builtIn="false" value="../component/lists"/>
|
||||
<listOptionValue builtIn="false" value="../app"/>
|
||||
<listOptionValue builtIn="false" value="../../../Source/include"/>
|
||||
<listOptionValue builtIn="false" value="../../../Source/portable/GCC/ARM_CM0"/>
|
||||
<listOptionValue builtIn="false" value="../../../Demo/Common/include"/>
|
||||
<listOptionValue builtIn="false" value="../board"/>
|
||||
<listOptionValue builtIn="false" value="../board/boards"/>
|
||||
<listOptionValue builtIn="false" value="../../../Source"/>
|
||||
<listOptionValue builtIn="false" value="../source"/>
|
||||
<listOptionValue builtIn="false" value="../"/>
|
||||
<listOptionValue builtIn="false" value="../../Source/include"/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/CORTEX_M0+_LPC51U68_LPCXpresso/Source}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/CORTEX_M0+_LPC51U68_LPCXpresso/Source/include}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/CORTEX_M0+_LPC51U68_LPCXpresso/Source/portable/GCC/ARM_CM0}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/CORTEX_M0+_LPC51U68_LPCXpresso/Source/portable/MemMang}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/Demo/Common/include}""/>
|
||||
<listOptionValue builtIn="false" value="../GCC_specific"/>
|
||||
</option>
|
||||
<inputType id="cdt.managedbuild.tool.gnu.assembler.input.1338154701" superClass="cdt.managedbuild.tool.gnu.assembler.input"/>
|
||||
<inputType id="com.crt.advproject.assembler.input.1744235101" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
|
||||
</tool>
|
||||
<tool id="com.crt.advproject.link.cpp.exe.release.2090280956" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.release.14924287"/>
|
||||
<tool id="com.crt.advproject.link.exe.release.232652354" name="MCU Linker" superClass="com.crt.advproject.link.exe.release.1218322303"/>
|
||||
<tool id="com.crt.advproject.tool.debug.release.467758912" name="MCU Debugger" superClass="com.crt.advproject.tool.debug.release.2087936142"/>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
<sourceEntries>
|
||||
<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="CMSIS"/>
|
||||
<entry flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name="Minimal"/>
|
||||
<entry flags="VALUE_WORKSPACE_PATH" kind="sourcePath" name="Source"/>
|
||||
<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="app"/>
|
||||
<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="board"/>
|
||||
<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="component"/>
|
||||
<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="device"/>
|
||||
<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="drivers"/>
|
||||
<entry flags="LOCAL|VALUE_WORKSPACE_PATH" kind="sourcePath" name="utilities"/>
|
||||
</sourceEntries>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<project id="COREX_M0+_LPC51U68_LPCXpresso.null.659568989" name="COREX_M0+_LPC51U68_LPCXpresso" projectType="com.crt.advproject.projecttype.exe"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
<storageModule moduleId="com.nxp.mcuxpresso.core.datamodels">
|
||||
<sdkName>SDK_2.x_LPCXpresso51U68</sdkName>
|
||||
<sdkVersion>2.6.0</sdkVersion>
|
||||
<sdkComponents>middleware.baremetal.LPC51U68;platform.drivers.clock.LPC51U68;device.LPC51U68_CMSIS.LPC51U68;platform.Include_common.LPC51U68;platform.Include_core_cm0plus.LPC51U68;platform.drivers.common.LPC51U68;platform.drivers.power.LPC51U68;platform.drivers.reset.LPC51U68;platform.drivers.flexcomm.LPC51U68;platform.drivers.flexcomm_usart.LPC51U68;platform.drivers.lpc_gpio.LPC51U68;platform.drivers.lpc_iocon.LPC51U68;platform.drivers.pint.LPC51U68;component.serial_manager.LPC51U68;component.lists.LPC51U68;component.serial_manager_uart.LPC51U68;component.usart_adapter.LPC51U68;platform.utilities.assert.LPC51U68;utility.debug_console.LPC51U68;device.LPC51U68_startup.LPC51U68;project_template.lpcxpresso51u68.LPC51U68;platform.drivers.ctimer.LPC51U68;</sdkComponents>
|
||||
<boardId>lpcxpresso51u68</boardId>
|
||||
<package>LPC51U68JBD64</package>
|
||||
<core>cm0plus</core>
|
||||
<coreId>core0_LPC51U68</coreId>
|
||||
</storageModule>
|
||||
<storageModule moduleId="com.crt.config">
|
||||
<projectStorage><?xml version="1.0" encoding="UTF-8"?>
|
||||
<TargetConfig>
|
||||
<Properties property_3="NXP" property_4="LPC51U68" property_count="5" version="100300"/>
|
||||
<infoList vendor="NXP">
|
||||
<info chip="LPC51U68" name="LPC51U68">
|
||||
<chip>
|
||||
<name>LPC51U68</name>
|
||||
<family>LPC51U68</family>
|
||||
<vendor>NXP</vendor>
|
||||
<memory can_program="true" id="Flash" is_ro="true" size="256" type="Flash"/>
|
||||
<memory id="RAM" size="96" type="RAM"/>
|
||||
<memoryInstance derived_from="Flash" driver="LPC51U6x_256K.cfx" edited="true" id="PROGRAM_FLASH" location="0x0" size="0x40000"/>
|
||||
<memoryInstance derived_from="RAM" edited="true" id="SRAM_00" location="0x4000000" size="0x8000"/>
|
||||
<memoryInstance derived_from="RAM" edited="true" id="SRAM0" location="0x20000000" size="0x10000"/>
|
||||
</chip>
|
||||
<processor>
|
||||
<name gcc_name="cortex-m0plus">Cortex-M0+</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig></projectStorage>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||
<storageModule moduleId="refreshScope" versionNumber="2">
|
||||
<configuration configurationName="Debug">
|
||||
<resource resourceType="PROJECT" workspacePath="/COREX_M0+_LPC51U68_LPCXpresso"/>
|
||||
</configuration>
|
||||
<configuration configurationName="Release">
|
||||
<resource resourceType="PROJECT" workspacePath="/COREX_M0+_LPC51U68_LPCXpresso"/>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
<scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.464536397;com.crt.advproject.config.exe.release.464536397.;com.crt.advproject.gcc.exe.release.495339751;com.crt.advproject.compiler.input.1469030344">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.release.464536397;com.crt.advproject.config.exe.release.464536397.;com.crt.advproject.gas.exe.release.500750498;com.crt.advproject.assembler.input.749159986">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.debug.1988191436;com.crt.advproject.config.exe.debug.1988191436.;com.crt.advproject.gcc.exe.debug.939138790;com.crt.advproject.compiler.input.192222618">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="com.crt.advproject.config.exe.debug.1988191436;com.crt.advproject.config.exe.debug.1988191436.;com.crt.advproject.gas.exe.debug.349708279;com.crt.advproject.assembler.input.1159931818">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
</storageModule>
|
||||
</cproject>
|
||||
13
FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/.gitignore
vendored
Normal file
13
FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/.gitignore
vendored
Normal file
@ -0,0 +1,13 @@
|
||||
# Ignore Xpresso generated files.
|
||||
/.settings/
|
||||
/Debug/
|
||||
|
||||
# Ignore Keil generated files.
|
||||
*.uvguix.*
|
||||
EventRecorderStub.scvd
|
||||
/Listings/
|
||||
/Objects/
|
||||
|
||||
# Ignore IAR generated files.
|
||||
/settings/
|
||||
/Debug_IAR/
|
||||
317
FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/.project
Normal file
317
FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/.project
Normal file
@ -0,0 +1,317 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>CORTEX_M0+_LPC51U68_LPCXpresso</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>com.nxp.mcuxpresso.core.datamodels.sdkNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
</natures>
|
||||
<linkedResources>
|
||||
<link>
|
||||
<name>Minimal</name>
|
||||
<type>2</type>
|
||||
<locationURI>virtual:/virtual</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>Source</name>
|
||||
<type>2</type>
|
||||
<locationURI>virtual:/virtual</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>Minimal/IntQueue.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-1-PROJECT_LOC/Common/Minimal/IntQueue.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>Minimal/blocktim.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-1-PROJECT_LOC/Common/Minimal/blocktim.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>Minimal/countsem.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-1-PROJECT_LOC/Common/Minimal/countsem.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>Minimal/recmutex.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-1-PROJECT_LOC/Common/Minimal/recmutex.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>Source/croutine.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-2-PROJECT_LOC/Source/croutine.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>Source/event_groups.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-2-PROJECT_LOC/Source/event_groups.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>Source/include</name>
|
||||
<type>2</type>
|
||||
<locationURI>virtual:/virtual</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>Source/list.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-2-PROJECT_LOC/Source/list.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>Source/portable</name>
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/* ----------------------------------------------------------------------
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||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_common_tables.h
|
||||
* Description: Extern declaration for common tables
|
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*
|
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* $Date: 27. January 2017
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* $Revision: V.1.5.1
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*
|
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* Target Processor: Cortex-M cores
|
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* -------------------------------------------------------------------- */
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/*
|
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* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
|
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*
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* SPDX-License-Identifier: Apache-2.0
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*
|
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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|
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
|
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_COMMON_TABLES_H
|
||||
#define _ARM_COMMON_TABLES_H
|
||||
|
||||
#include "arm_math.h"
|
||||
|
||||
extern const uint16_t armBitRevTable[1024];
|
||||
extern const q15_t armRecipTableQ15[64];
|
||||
extern const q31_t armRecipTableQ31[64];
|
||||
extern const float32_t twiddleCoef_16[32];
|
||||
extern const float32_t twiddleCoef_32[64];
|
||||
extern const float32_t twiddleCoef_64[128];
|
||||
extern const float32_t twiddleCoef_128[256];
|
||||
extern const float32_t twiddleCoef_256[512];
|
||||
extern const float32_t twiddleCoef_512[1024];
|
||||
extern const float32_t twiddleCoef_1024[2048];
|
||||
extern const float32_t twiddleCoef_2048[4096];
|
||||
extern const float32_t twiddleCoef_4096[8192];
|
||||
#define twiddleCoef twiddleCoef_4096
|
||||
extern const q31_t twiddleCoef_16_q31[24];
|
||||
extern const q31_t twiddleCoef_32_q31[48];
|
||||
extern const q31_t twiddleCoef_64_q31[96];
|
||||
extern const q31_t twiddleCoef_128_q31[192];
|
||||
extern const q31_t twiddleCoef_256_q31[384];
|
||||
extern const q31_t twiddleCoef_512_q31[768];
|
||||
extern const q31_t twiddleCoef_1024_q31[1536];
|
||||
extern const q31_t twiddleCoef_2048_q31[3072];
|
||||
extern const q31_t twiddleCoef_4096_q31[6144];
|
||||
extern const q15_t twiddleCoef_16_q15[24];
|
||||
extern const q15_t twiddleCoef_32_q15[48];
|
||||
extern const q15_t twiddleCoef_64_q15[96];
|
||||
extern const q15_t twiddleCoef_128_q15[192];
|
||||
extern const q15_t twiddleCoef_256_q15[384];
|
||||
extern const q15_t twiddleCoef_512_q15[768];
|
||||
extern const q15_t twiddleCoef_1024_q15[1536];
|
||||
extern const q15_t twiddleCoef_2048_q15[3072];
|
||||
extern const q15_t twiddleCoef_4096_q15[6144];
|
||||
extern const float32_t twiddleCoef_rfft_32[32];
|
||||
extern const float32_t twiddleCoef_rfft_64[64];
|
||||
extern const float32_t twiddleCoef_rfft_128[128];
|
||||
extern const float32_t twiddleCoef_rfft_256[256];
|
||||
extern const float32_t twiddleCoef_rfft_512[512];
|
||||
extern const float32_t twiddleCoef_rfft_1024[1024];
|
||||
extern const float32_t twiddleCoef_rfft_2048[2048];
|
||||
extern const float32_t twiddleCoef_rfft_4096[4096];
|
||||
|
||||
/* floating-point bit reversal tables */
|
||||
#define ARMBITREVINDEXTABLE_16_TABLE_LENGTH ((uint16_t)20)
|
||||
#define ARMBITREVINDEXTABLE_32_TABLE_LENGTH ((uint16_t)48)
|
||||
#define ARMBITREVINDEXTABLE_64_TABLE_LENGTH ((uint16_t)56)
|
||||
#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)
|
||||
#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)
|
||||
#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)
|
||||
#define ARMBITREVINDEXTABLE_1024_TABLE_LENGTH ((uint16_t)1800)
|
||||
#define ARMBITREVINDEXTABLE_2048_TABLE_LENGTH ((uint16_t)3808)
|
||||
#define ARMBITREVINDEXTABLE_4096_TABLE_LENGTH ((uint16_t)4032)
|
||||
|
||||
extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH];
|
||||
|
||||
/* fixed-point bit reversal tables */
|
||||
#define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH ((uint16_t)12)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH ((uint16_t)24)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH ((uint16_t)56)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH ((uint16_t)112)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH ((uint16_t)240)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH ((uint16_t)480)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
|
||||
#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
|
||||
|
||||
extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
|
||||
extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
|
||||
|
||||
/* Tables for Fast Math Sine and Cosine */
|
||||
extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
|
||||
extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
|
||||
extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
|
||||
|
||||
#endif /* ARM_COMMON_TABLES_H */
|
||||
@ -0,0 +1,66 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_const_structs.h
|
||||
* Description: Constant structs that are initialized for user convenience.
|
||||
* For example, some can be given as arguments to the arm_cfft_f32() function.
|
||||
*
|
||||
* $Date: 27. January 2017
|
||||
* $Revision: V.1.5.1
|
||||
*
|
||||
* Target Processor: Cortex-M cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_CONST_STRUCTS_H
|
||||
#define _ARM_CONST_STRUCTS_H
|
||||
|
||||
#include "arm_math.h"
|
||||
#include "arm_common_tables.h"
|
||||
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
|
||||
extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
|
||||
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
|
||||
extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
|
||||
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
|
||||
extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
|
||||
|
||||
#endif
|
||||
7160
FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/CMSIS/arm_math.h
Normal file
7160
FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/CMSIS/arm_math.h
Normal file
File diff suppressed because it is too large
Load Diff
870
FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/CMSIS/cmsis_armcc.h
Normal file
870
FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/CMSIS/cmsis_armcc.h
Normal file
@ -0,0 +1,870 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_armcc.h
|
||||
* @brief CMSIS compiler ARMCC (Arm Compiler 5) header file
|
||||
* @version V5.0.4
|
||||
* @date 10. January 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_ARMCC_H
|
||||
#define __CMSIS_ARMCC_H
|
||||
|
||||
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
|
||||
#error "Please use Arm Compiler Toolchain V4.0.677 or later!"
|
||||
#endif
|
||||
|
||||
/* CMSIS compiler control architecture macros */
|
||||
#if ((defined (__TARGET_ARCH_6_M ) && (__TARGET_ARCH_6_M == 1)) || \
|
||||
(defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M == 1)) )
|
||||
#define __ARM_ARCH_6M__ 1
|
||||
#endif
|
||||
|
||||
#if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M == 1))
|
||||
#define __ARM_ARCH_7M__ 1
|
||||
#endif
|
||||
|
||||
#if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
|
||||
#define __ARM_ARCH_7EM__ 1
|
||||
#endif
|
||||
|
||||
/* __ARM_ARCH_8M_BASE__ not applicable */
|
||||
/* __ARM_ARCH_8M_MAIN__ not applicable */
|
||||
|
||||
|
||||
/* CMSIS compiler specific defines */
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE __inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static __inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE static __forceinline
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __declspec(noreturn)
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT __packed struct
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION __packed union
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
#define __UNALIGNED_UINT32(x) (*((__packed uint32_t *)(x)))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) ((*((__packed uint16_t *)(addr))) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
#define __UNALIGNED_UINT16_READ(addr) (*((const __packed uint16_t *)(addr)))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) ((*((__packed uint32_t *)(addr))) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
#define __UNALIGNED_UINT32_READ(addr) (*((const __packed uint32_t *)(addr)))
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#define __RESTRICT __restrict
|
||||
#endif
|
||||
|
||||
/* ########################### Core Function Access ########################### */
|
||||
/** \ingroup CMSIS_Core_FunctionInterface
|
||||
\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief Enable IRQ Interrupts
|
||||
\details Enables IRQ interrupts by clearing the I-bit in the CPSR.
|
||||
Can only be executed in Privileged modes.
|
||||
*/
|
||||
/* intrinsic void __enable_irq(); */
|
||||
|
||||
|
||||
/**
|
||||
\brief Disable IRQ Interrupts
|
||||
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
|
||||
Can only be executed in Privileged modes.
|
||||
*/
|
||||
/* intrinsic void __disable_irq(); */
|
||||
|
||||
/**
|
||||
\brief Get Control Register
|
||||
\details Returns the content of the Control Register.
|
||||
\return Control Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_CONTROL(void)
|
||||
{
|
||||
register uint32_t __regControl __ASM("control");
|
||||
return(__regControl);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Control Register
|
||||
\details Writes the given value to the Control Register.
|
||||
\param [in] control Control Register value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_CONTROL(uint32_t control)
|
||||
{
|
||||
register uint32_t __regControl __ASM("control");
|
||||
__regControl = control;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get IPSR Register
|
||||
\details Returns the content of the IPSR Register.
|
||||
\return IPSR Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_IPSR(void)
|
||||
{
|
||||
register uint32_t __regIPSR __ASM("ipsr");
|
||||
return(__regIPSR);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get APSR Register
|
||||
\details Returns the content of the APSR Register.
|
||||
\return APSR Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_APSR(void)
|
||||
{
|
||||
register uint32_t __regAPSR __ASM("apsr");
|
||||
return(__regAPSR);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get xPSR Register
|
||||
\details Returns the content of the xPSR Register.
|
||||
\return xPSR Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_xPSR(void)
|
||||
{
|
||||
register uint32_t __regXPSR __ASM("xpsr");
|
||||
return(__regXPSR);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Process Stack Pointer
|
||||
\details Returns the current value of the Process Stack Pointer (PSP).
|
||||
\return PSP Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_PSP(void)
|
||||
{
|
||||
register uint32_t __regProcessStackPointer __ASM("psp");
|
||||
return(__regProcessStackPointer);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Process Stack Pointer
|
||||
\details Assigns the given value to the Process Stack Pointer (PSP).
|
||||
\param [in] topOfProcStack Process Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
|
||||
{
|
||||
register uint32_t __regProcessStackPointer __ASM("psp");
|
||||
__regProcessStackPointer = topOfProcStack;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Main Stack Pointer
|
||||
\details Returns the current value of the Main Stack Pointer (MSP).
|
||||
\return MSP Register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_MSP(void)
|
||||
{
|
||||
register uint32_t __regMainStackPointer __ASM("msp");
|
||||
return(__regMainStackPointer);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Main Stack Pointer
|
||||
\details Assigns the given value to the Main Stack Pointer (MSP).
|
||||
\param [in] topOfMainStack Main Stack Pointer value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
|
||||
{
|
||||
register uint32_t __regMainStackPointer __ASM("msp");
|
||||
__regMainStackPointer = topOfMainStack;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Priority Mask
|
||||
\details Returns the current state of the priority mask bit from the Priority Mask Register.
|
||||
\return Priority Mask value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_PRIMASK(void)
|
||||
{
|
||||
register uint32_t __regPriMask __ASM("primask");
|
||||
return(__regPriMask);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Priority Mask
|
||||
\details Assigns the given value to the Priority Mask Register.
|
||||
\param [in] priMask Priority Mask
|
||||
*/
|
||||
__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
|
||||
{
|
||||
register uint32_t __regPriMask __ASM("primask");
|
||||
__regPriMask = (priMask);
|
||||
}
|
||||
|
||||
|
||||
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||||
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
|
||||
|
||||
/**
|
||||
\brief Enable FIQ
|
||||
\details Enables FIQ interrupts by clearing the F-bit in the CPSR.
|
||||
Can only be executed in Privileged modes.
|
||||
*/
|
||||
#define __enable_fault_irq __enable_fiq
|
||||
|
||||
|
||||
/**
|
||||
\brief Disable FIQ
|
||||
\details Disables FIQ interrupts by setting the F-bit in the CPSR.
|
||||
Can only be executed in Privileged modes.
|
||||
*/
|
||||
#define __disable_fault_irq __disable_fiq
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Base Priority
|
||||
\details Returns the current value of the Base Priority register.
|
||||
\return Base Priority register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_BASEPRI(void)
|
||||
{
|
||||
register uint32_t __regBasePri __ASM("basepri");
|
||||
return(__regBasePri);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Base Priority
|
||||
\details Assigns the given value to the Base Priority register.
|
||||
\param [in] basePri Base Priority value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
|
||||
{
|
||||
register uint32_t __regBasePri __ASM("basepri");
|
||||
__regBasePri = (basePri & 0xFFU);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Base Priority with condition
|
||||
\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
|
||||
or the new value increases the BASEPRI priority level.
|
||||
\param [in] basePri Base Priority value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
|
||||
{
|
||||
register uint32_t __regBasePriMax __ASM("basepri_max");
|
||||
__regBasePriMax = (basePri & 0xFFU);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Get Fault Mask
|
||||
\details Returns the current value of the Fault Mask register.
|
||||
\return Fault Mask register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_FAULTMASK(void)
|
||||
{
|
||||
register uint32_t __regFaultMask __ASM("faultmask");
|
||||
return(__regFaultMask);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set Fault Mask
|
||||
\details Assigns the given value to the Fault Mask register.
|
||||
\param [in] faultMask Fault Mask value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
|
||||
{
|
||||
register uint32_t __regFaultMask __ASM("faultmask");
|
||||
__regFaultMask = (faultMask & (uint32_t)1U);
|
||||
}
|
||||
|
||||
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||||
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
|
||||
|
||||
|
||||
#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
|
||||
|
||||
/**
|
||||
\brief Get FPSCR
|
||||
\details Returns the current value of the Floating Point Status/Control register.
|
||||
\return Floating Point Status/Control register value
|
||||
*/
|
||||
__STATIC_INLINE uint32_t __get_FPSCR(void)
|
||||
{
|
||||
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||||
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
|
||||
register uint32_t __regfpscr __ASM("fpscr");
|
||||
return(__regfpscr);
|
||||
#else
|
||||
return(0U);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
\brief Set FPSCR
|
||||
\details Assigns the given value to the Floating Point Status/Control register.
|
||||
\param [in] fpscr Floating Point Status/Control value to set
|
||||
*/
|
||||
__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
|
||||
{
|
||||
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||||
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
|
||||
register uint32_t __regfpscr __ASM("fpscr");
|
||||
__regfpscr = (fpscr);
|
||||
#else
|
||||
(void)fpscr;
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
|
||||
|
||||
|
||||
|
||||
/*@} end of CMSIS_Core_RegAccFunctions */
|
||||
|
||||
|
||||
/* ########################## Core Instruction Access ######################### */
|
||||
/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
|
||||
Access to dedicated instructions
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
\brief No Operation
|
||||
\details No Operation does nothing. This instruction can be used for code alignment purposes.
|
||||
*/
|
||||
#define __NOP __nop
|
||||
|
||||
|
||||
/**
|
||||
\brief Wait For Interrupt
|
||||
\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
|
||||
*/
|
||||
#define __WFI __wfi
|
||||
|
||||
|
||||
/**
|
||||
\brief Wait For Event
|
||||
\details Wait For Event is a hint instruction that permits the processor to enter
|
||||
a low-power state until one of a number of events occurs.
|
||||
*/
|
||||
#define __WFE __wfe
|
||||
|
||||
|
||||
/**
|
||||
\brief Send Event
|
||||
\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
|
||||
*/
|
||||
#define __SEV __sev
|
||||
|
||||
|
||||
/**
|
||||
\brief Instruction Synchronization Barrier
|
||||
\details Instruction Synchronization Barrier flushes the pipeline in the processor,
|
||||
so that all instructions following the ISB are fetched from cache or memory,
|
||||
after the instruction has been completed.
|
||||
*/
|
||||
#define __ISB() do {\
|
||||
__schedule_barrier();\
|
||||
__isb(0xF);\
|
||||
__schedule_barrier();\
|
||||
} while (0U)
|
||||
|
||||
/**
|
||||
\brief Data Synchronization Barrier
|
||||
\details Acts as a special kind of Data Memory Barrier.
|
||||
It completes when all explicit memory accesses before this instruction complete.
|
||||
*/
|
||||
#define __DSB() do {\
|
||||
__schedule_barrier();\
|
||||
__dsb(0xF);\
|
||||
__schedule_barrier();\
|
||||
} while (0U)
|
||||
|
||||
/**
|
||||
\brief Data Memory Barrier
|
||||
\details Ensures the apparent order of the explicit memory operations before
|
||||
and after the instruction, without ensuring their completion.
|
||||
*/
|
||||
#define __DMB() do {\
|
||||
__schedule_barrier();\
|
||||
__dmb(0xF);\
|
||||
__schedule_barrier();\
|
||||
} while (0U)
|
||||
|
||||
|
||||
/**
|
||||
\brief Reverse byte order (32 bit)
|
||||
\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
|
||||
\param [in] value Value to reverse
|
||||
\return Reversed value
|
||||
*/
|
||||
#define __REV __rev
|
||||
|
||||
|
||||
/**
|
||||
\brief Reverse byte order (16 bit)
|
||||
\details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
|
||||
\param [in] value Value to reverse
|
||||
\return Reversed value
|
||||
*/
|
||||
#ifndef __NO_EMBEDDED_ASM
|
||||
__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
|
||||
{
|
||||
rev16 r0, r0
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief Reverse byte order (16 bit)
|
||||
\details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
|
||||
\param [in] value Value to reverse
|
||||
\return Reversed value
|
||||
*/
|
||||
#ifndef __NO_EMBEDDED_ASM
|
||||
__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)
|
||||
{
|
||||
revsh r0, r0
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief Rotate Right in unsigned value (32 bit)
|
||||
\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
|
||||
\param [in] op1 Value to rotate
|
||||
\param [in] op2 Number of Bits to rotate
|
||||
\return Rotated value
|
||||
*/
|
||||
#define __ROR __ror
|
||||
|
||||
|
||||
/**
|
||||
\brief Breakpoint
|
||||
\details Causes the processor to enter Debug state.
|
||||
Debug tools can use this to investigate system state when the instruction at a particular address is reached.
|
||||
\param [in] value is ignored by the processor.
|
||||
If required, a debugger can use it to store additional information about the breakpoint.
|
||||
*/
|
||||
#define __BKPT(value) __breakpoint(value)
|
||||
|
||||
|
||||
/**
|
||||
\brief Reverse bit order of value
|
||||
\details Reverses the bit order of the given value.
|
||||
\param [in] value Value to reverse
|
||||
\return Reversed value
|
||||
*/
|
||||
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||||
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
|
||||
#define __RBIT __rbit
|
||||
#else
|
||||
__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
|
||||
{
|
||||
uint32_t result;
|
||||
uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
|
||||
|
||||
result = value; /* r will be reversed bits of v; first get LSB of v */
|
||||
for (value >>= 1U; value != 0U; value >>= 1U)
|
||||
{
|
||||
result <<= 1U;
|
||||
result |= value & 1U;
|
||||
s--;
|
||||
}
|
||||
result <<= s; /* shift when v's highest bits are zero */
|
||||
return result;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief Count leading zeros
|
||||
\details Counts the number of leading zeros of a data value.
|
||||
\param [in] value Value to count the leading zeros
|
||||
\return number of leading zeros in value
|
||||
*/
|
||||
#define __CLZ __clz
|
||||
|
||||
|
||||
#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||||
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
|
||||
|
||||
/**
|
||||
\brief LDR Exclusive (8 bit)
|
||||
\details Executes a exclusive LDR instruction for 8 bit value.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint8_t at (*ptr)
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
|
||||
#else
|
||||
#define __LDREXB(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr)) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief LDR Exclusive (16 bit)
|
||||
\details Executes a exclusive LDR instruction for 16 bit values.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint16_t at (*ptr)
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
|
||||
#else
|
||||
#define __LDREXH(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr)) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief LDR Exclusive (32 bit)
|
||||
\details Executes a exclusive LDR instruction for 32 bit values.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint32_t at (*ptr)
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
|
||||
#else
|
||||
#define __LDREXW(ptr) _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr)) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief STR Exclusive (8 bit)
|
||||
\details Executes a exclusive STR instruction for 8 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
\return 0 Function succeeded
|
||||
\return 1 Function failed
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __STREXB(value, ptr) __strex(value, ptr)
|
||||
#else
|
||||
#define __STREXB(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief STR Exclusive (16 bit)
|
||||
\details Executes a exclusive STR instruction for 16 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
\return 0 Function succeeded
|
||||
\return 1 Function failed
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __STREXH(value, ptr) __strex(value, ptr)
|
||||
#else
|
||||
#define __STREXH(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief STR Exclusive (32 bit)
|
||||
\details Executes a exclusive STR instruction for 32 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
\return 0 Function succeeded
|
||||
\return 1 Function failed
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
|
||||
#define __STREXW(value, ptr) __strex(value, ptr)
|
||||
#else
|
||||
#define __STREXW(value, ptr) _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr) _Pragma("pop")
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief Remove the exclusive lock
|
||||
\details Removes the exclusive lock which is created by LDREX.
|
||||
*/
|
||||
#define __CLREX __clrex
|
||||
|
||||
|
||||
/**
|
||||
\brief Signed Saturate
|
||||
\details Saturates a signed value.
|
||||
\param [in] value Value to be saturated
|
||||
\param [in] sat Bit position to saturate to (1..32)
|
||||
\return Saturated value
|
||||
*/
|
||||
#define __SSAT __ssat
|
||||
|
||||
|
||||
/**
|
||||
\brief Unsigned Saturate
|
||||
\details Saturates an unsigned value.
|
||||
\param [in] value Value to be saturated
|
||||
\param [in] sat Bit position to saturate to (0..31)
|
||||
\return Saturated value
|
||||
*/
|
||||
#define __USAT __usat
|
||||
|
||||
|
||||
/**
|
||||
\brief Rotate Right with Extend (32 bit)
|
||||
\details Moves each bit of a bitstring right by one bit.
|
||||
The carry input is shifted in at the left end of the bitstring.
|
||||
\param [in] value Value to rotate
|
||||
\return Rotated value
|
||||
*/
|
||||
#ifndef __NO_EMBEDDED_ASM
|
||||
__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
|
||||
{
|
||||
rrx r0, r0
|
||||
bx lr
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
\brief LDRT Unprivileged (8 bit)
|
||||
\details Executes a Unprivileged LDRT instruction for 8 bit value.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint8_t at (*ptr)
|
||||
*/
|
||||
#define __LDRBT(ptr) ((uint8_t ) __ldrt(ptr))
|
||||
|
||||
|
||||
/**
|
||||
\brief LDRT Unprivileged (16 bit)
|
||||
\details Executes a Unprivileged LDRT instruction for 16 bit values.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint16_t at (*ptr)
|
||||
*/
|
||||
#define __LDRHT(ptr) ((uint16_t) __ldrt(ptr))
|
||||
|
||||
|
||||
/**
|
||||
\brief LDRT Unprivileged (32 bit)
|
||||
\details Executes a Unprivileged LDRT instruction for 32 bit values.
|
||||
\param [in] ptr Pointer to data
|
||||
\return value of type uint32_t at (*ptr)
|
||||
*/
|
||||
#define __LDRT(ptr) ((uint32_t ) __ldrt(ptr))
|
||||
|
||||
|
||||
/**
|
||||
\brief STRT Unprivileged (8 bit)
|
||||
\details Executes a Unprivileged STRT instruction for 8 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
*/
|
||||
#define __STRBT(value, ptr) __strt(value, ptr)
|
||||
|
||||
|
||||
/**
|
||||
\brief STRT Unprivileged (16 bit)
|
||||
\details Executes a Unprivileged STRT instruction for 16 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
*/
|
||||
#define __STRHT(value, ptr) __strt(value, ptr)
|
||||
|
||||
|
||||
/**
|
||||
\brief STRT Unprivileged (32 bit)
|
||||
\details Executes a Unprivileged STRT instruction for 32 bit values.
|
||||
\param [in] value Value to store
|
||||
\param [in] ptr Pointer to location
|
||||
*/
|
||||
#define __STRT(value, ptr) __strt(value, ptr)
|
||||
|
||||
#else /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||||
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
|
||||
|
||||
/**
|
||||
\brief Signed Saturate
|
||||
\details Saturates a signed value.
|
||||
\param [in] value Value to be saturated
|
||||
\param [in] sat Bit position to saturate to (1..32)
|
||||
\return Saturated value
|
||||
*/
|
||||
__attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
|
||||
{
|
||||
if ((sat >= 1U) && (sat <= 32U))
|
||||
{
|
||||
const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
|
||||
const int32_t min = -1 - max ;
|
||||
if (val > max)
|
||||
{
|
||||
return max;
|
||||
}
|
||||
else if (val < min)
|
||||
{
|
||||
return min;
|
||||
}
|
||||
}
|
||||
return val;
|
||||
}
|
||||
|
||||
/**
|
||||
\brief Unsigned Saturate
|
||||
\details Saturates an unsigned value.
|
||||
\param [in] value Value to be saturated
|
||||
\param [in] sat Bit position to saturate to (0..31)
|
||||
\return Saturated value
|
||||
*/
|
||||
__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
|
||||
{
|
||||
if (sat <= 31U)
|
||||
{
|
||||
const uint32_t max = ((1U << sat) - 1U);
|
||||
if (val > (int32_t)max)
|
||||
{
|
||||
return max;
|
||||
}
|
||||
else if (val < 0)
|
||||
{
|
||||
return 0U;
|
||||
}
|
||||
}
|
||||
return (uint32_t)val;
|
||||
}
|
||||
|
||||
#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
|
||||
(defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
|
||||
|
||||
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
|
||||
|
||||
|
||||
/* ################### Compiler specific Intrinsics ########################### */
|
||||
/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
|
||||
Access to dedicated SIMD instructions
|
||||
@{
|
||||
*/
|
||||
|
||||
#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) )
|
||||
|
||||
#define __SADD8 __sadd8
|
||||
#define __QADD8 __qadd8
|
||||
#define __SHADD8 __shadd8
|
||||
#define __UADD8 __uadd8
|
||||
#define __UQADD8 __uqadd8
|
||||
#define __UHADD8 __uhadd8
|
||||
#define __SSUB8 __ssub8
|
||||
#define __QSUB8 __qsub8
|
||||
#define __SHSUB8 __shsub8
|
||||
#define __USUB8 __usub8
|
||||
#define __UQSUB8 __uqsub8
|
||||
#define __UHSUB8 __uhsub8
|
||||
#define __SADD16 __sadd16
|
||||
#define __QADD16 __qadd16
|
||||
#define __SHADD16 __shadd16
|
||||
#define __UADD16 __uadd16
|
||||
#define __UQADD16 __uqadd16
|
||||
#define __UHADD16 __uhadd16
|
||||
#define __SSUB16 __ssub16
|
||||
#define __QSUB16 __qsub16
|
||||
#define __SHSUB16 __shsub16
|
||||
#define __USUB16 __usub16
|
||||
#define __UQSUB16 __uqsub16
|
||||
#define __UHSUB16 __uhsub16
|
||||
#define __SASX __sasx
|
||||
#define __QASX __qasx
|
||||
#define __SHASX __shasx
|
||||
#define __UASX __uasx
|
||||
#define __UQASX __uqasx
|
||||
#define __UHASX __uhasx
|
||||
#define __SSAX __ssax
|
||||
#define __QSAX __qsax
|
||||
#define __SHSAX __shsax
|
||||
#define __USAX __usax
|
||||
#define __UQSAX __uqsax
|
||||
#define __UHSAX __uhsax
|
||||
#define __USAD8 __usad8
|
||||
#define __USADA8 __usada8
|
||||
#define __SSAT16 __ssat16
|
||||
#define __USAT16 __usat16
|
||||
#define __UXTB16 __uxtb16
|
||||
#define __UXTAB16 __uxtab16
|
||||
#define __SXTB16 __sxtb16
|
||||
#define __SXTAB16 __sxtab16
|
||||
#define __SMUAD __smuad
|
||||
#define __SMUADX __smuadx
|
||||
#define __SMLAD __smlad
|
||||
#define __SMLADX __smladx
|
||||
#define __SMLALD __smlald
|
||||
#define __SMLALDX __smlaldx
|
||||
#define __SMUSD __smusd
|
||||
#define __SMUSDX __smusdx
|
||||
#define __SMLSD __smlsd
|
||||
#define __SMLSDX __smlsdx
|
||||
#define __SMLSLD __smlsld
|
||||
#define __SMLSLDX __smlsldx
|
||||
#define __SEL __sel
|
||||
#define __QADD __qadd
|
||||
#define __QSUB __qsub
|
||||
|
||||
#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
|
||||
((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
|
||||
|
||||
#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
|
||||
((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
|
||||
|
||||
#define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
|
||||
((int64_t)(ARG3) << 32U) ) >> 32U))
|
||||
|
||||
#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1)) ) */
|
||||
/*@} end of group CMSIS_SIMD_intrinsics */
|
||||
|
||||
|
||||
#endif /* __CMSIS_ARMCC_H */
|
||||
1877
FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/CMSIS/cmsis_armclang.h
Normal file
1877
FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/CMSIS/cmsis_armclang.h
Normal file
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,266 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_compiler.h
|
||||
* @brief CMSIS compiler generic header file
|
||||
* @version V5.0.4
|
||||
* @date 10. January 2018
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#ifndef __CMSIS_COMPILER_H
|
||||
#define __CMSIS_COMPILER_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/*
|
||||
* Arm Compiler 4/5
|
||||
*/
|
||||
#if defined ( __CC_ARM )
|
||||
#include "cmsis_armcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* Arm Compiler 6 (armclang)
|
||||
*/
|
||||
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
|
||||
#include "cmsis_armclang.h"
|
||||
|
||||
|
||||
/*
|
||||
* GNU Compiler
|
||||
*/
|
||||
#elif defined ( __GNUC__ )
|
||||
#include "cmsis_gcc.h"
|
||||
|
||||
|
||||
/*
|
||||
* IAR Compiler
|
||||
*/
|
||||
#elif defined ( __ICCARM__ )
|
||||
#include <cmsis_iccarm.h>
|
||||
|
||||
|
||||
/*
|
||||
* TI Arm Compiler
|
||||
*/
|
||||
#elif defined ( __TI_ARM__ )
|
||||
#include <cmsis_ccs.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __attribute__((packed))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* TASKING Compiler
|
||||
*/
|
||||
#elif defined ( __TASKING__ )
|
||||
/*
|
||||
* The CMSIS functions have been implemented as intrinsics in the compiler.
|
||||
* Please use "carm -?i" to get an up to date list of all intrinsics,
|
||||
* Including the CMSIS ones.
|
||||
*/
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
#define __NO_RETURN __attribute__((noreturn))
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#define __USED __attribute__((used))
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __attribute__((weak))
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT struct __packed__
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION union __packed__
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
struct __packed__ T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#define __ALIGNED(x) __align(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
* COSMIC Compiler
|
||||
*/
|
||||
#elif defined ( __CSMC__ )
|
||||
#include <cmsis_csm.h>
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM _asm
|
||||
#endif
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
#ifndef __NO_RETURN
|
||||
// NO RETURN is automatically detected hence no warning here
|
||||
#define __NO_RETURN
|
||||
#endif
|
||||
#ifndef __USED
|
||||
#warning No compiler specific solution for __USED. __USED is ignored.
|
||||
#define __USED
|
||||
#endif
|
||||
#ifndef __WEAK
|
||||
#define __WEAK __weak
|
||||
#endif
|
||||
#ifndef __PACKED
|
||||
#define __PACKED @packed
|
||||
#endif
|
||||
#ifndef __PACKED_STRUCT
|
||||
#define __PACKED_STRUCT @packed struct
|
||||
#endif
|
||||
#ifndef __PACKED_UNION
|
||||
#define __PACKED_UNION @packed union
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
@packed struct T_UINT32 { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
|
||||
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
|
||||
#endif
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
|
||||
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
|
||||
#endif
|
||||
#ifndef __ALIGNED
|
||||
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
|
||||
#define __ALIGNED(x)
|
||||
#endif
|
||||
#ifndef __RESTRICT
|
||||
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
|
||||
#define __RESTRICT
|
||||
#endif
|
||||
|
||||
|
||||
#else
|
||||
#error Unknown compiler.
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* __CMSIS_COMPILER_H */
|
||||
|
||||
2088
FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/CMSIS/cmsis_gcc.h
Normal file
2088
FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/CMSIS/cmsis_gcc.h
Normal file
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,913 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_iccarm.h
|
||||
* @brief CMSIS compiler ICCARM (IAR Compiler for Arm) header file
|
||||
* @version V5.0.5
|
||||
* @date 10. January 2018
|
||||
******************************************************************************/
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
//
|
||||
// Copyright (c) 2017-2018 IAR Systems
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License")
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
//
|
||||
//------------------------------------------------------------------------------
|
||||
|
||||
|
||||
#ifndef __CMSIS_ICCARM_H__
|
||||
#define __CMSIS_ICCARM_H__
|
||||
|
||||
#ifndef __ICCARM__
|
||||
#error This file should only be compiled by ICCARM
|
||||
#endif
|
||||
|
||||
#pragma system_include
|
||||
|
||||
#define __IAR_FT _Pragma("inline=forced") __intrinsic
|
||||
|
||||
#if (__VER__ >= 8000000)
|
||||
#define __ICCARM_V8 1
|
||||
#else
|
||||
#define __ICCARM_V8 0
|
||||
#endif
|
||||
|
||||
#ifndef __ALIGNED
|
||||
#if __ICCARM_V8
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#elif (__VER__ >= 7080000)
|
||||
/* Needs IAR language extensions */
|
||||
#define __ALIGNED(x) __attribute__((aligned(x)))
|
||||
#else
|
||||
#warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
|
||||
#define __ALIGNED(x)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
/* Define compiler macros for CPU architecture, used in CMSIS 5.
|
||||
*/
|
||||
#if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
|
||||
/* Macros already defined */
|
||||
#else
|
||||
#if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
|
||||
#define __ARM_ARCH_8M_MAIN__ 1
|
||||
#elif defined(__ARM8M_BASELINE__)
|
||||
#define __ARM_ARCH_8M_BASE__ 1
|
||||
#elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
|
||||
#if __ARM_ARCH == 6
|
||||
#define __ARM_ARCH_6M__ 1
|
||||
#elif __ARM_ARCH == 7
|
||||
#if __ARM_FEATURE_DSP
|
||||
#define __ARM_ARCH_7EM__ 1
|
||||
#else
|
||||
#define __ARM_ARCH_7M__ 1
|
||||
#endif
|
||||
#endif /* __ARM_ARCH */
|
||||
#endif /* __ARM_ARCH_PROFILE == 'M' */
|
||||
#endif
|
||||
|
||||
/* Alternativ core deduction for older ICCARM's */
|
||||
#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \
|
||||
!defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)
|
||||
#if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
|
||||
#define __ARM_ARCH_6M__ 1
|
||||
#elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
|
||||
#define __ARM_ARCH_7M__ 1
|
||||
#elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
|
||||
#define __ARM_ARCH_7EM__ 1
|
||||
#elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
|
||||
#define __ARM_ARCH_8M_BASE__ 1
|
||||
#elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
|
||||
#define __ARM_ARCH_8M_MAIN__ 1
|
||||
#elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
|
||||
#define __ARM_ARCH_8M_MAIN__ 1
|
||||
#else
|
||||
#error "Unknown target."
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1
|
||||
#define __IAR_M0_FAMILY 1
|
||||
#elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1
|
||||
#define __IAR_M0_FAMILY 1
|
||||
#else
|
||||
#define __IAR_M0_FAMILY 0
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef __ASM
|
||||
#define __ASM __asm
|
||||
#endif
|
||||
|
||||
#ifndef __INLINE
|
||||
#define __INLINE inline
|
||||
#endif
|
||||
|
||||
#ifndef __NO_RETURN
|
||||
#if __ICCARM_V8
|
||||
#define __NO_RETURN __attribute__((__noreturn__))
|
||||
#else
|
||||
#define __NO_RETURN _Pragma("object_attribute=__noreturn")
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef __PACKED
|
||||
#if __ICCARM_V8
|
||||
#define __PACKED __attribute__((packed, aligned(1)))
|
||||
#else
|
||||
/* Needs IAR language extensions */
|
||||
#define __PACKED __packed
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef __PACKED_STRUCT
|
||||
#if __ICCARM_V8
|
||||
#define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
|
||||
#else
|
||||
/* Needs IAR language extensions */
|
||||
#define __PACKED_STRUCT __packed struct
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef __PACKED_UNION
|
||||
#if __ICCARM_V8
|
||||
#define __PACKED_UNION union __attribute__((packed, aligned(1)))
|
||||
#else
|
||||
/* Needs IAR language extensions */
|
||||
#define __PACKED_UNION __packed union
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef __RESTRICT
|
||||
#define __RESTRICT restrict
|
||||
#endif
|
||||
|
||||
#ifndef __STATIC_INLINE
|
||||
#define __STATIC_INLINE static inline
|
||||
#endif
|
||||
|
||||
#ifndef __FORCEINLINE
|
||||
#define __FORCEINLINE _Pragma("inline=forced")
|
||||
#endif
|
||||
|
||||
#ifndef __STATIC_FORCEINLINE
|
||||
#define __STATIC_FORCEINLINE __FORCEINLINE __STATIC_INLINE
|
||||
#endif
|
||||
|
||||
#ifndef __UNALIGNED_UINT16_READ
|
||||
#pragma language=save
|
||||
#pragma language=extended
|
||||
__IAR_FT uint16_t __iar_uint16_read(void const *ptr)
|
||||
{
|
||||
return *(__packed uint16_t*)(ptr);
|
||||
}
|
||||
#pragma language=restore
|
||||
#define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef __UNALIGNED_UINT16_WRITE
|
||||
#pragma language=save
|
||||
#pragma language=extended
|
||||
__IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
|
||||
{
|
||||
*(__packed uint16_t*)(ptr) = val;;
|
||||
}
|
||||
#pragma language=restore
|
||||
#define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
|
||||
#endif
|
||||
|
||||
#ifndef __UNALIGNED_UINT32_READ
|
||||
#pragma language=save
|
||||
#pragma language=extended
|
||||
__IAR_FT uint32_t __iar_uint32_read(void const *ptr)
|
||||
{
|
||||
return *(__packed uint32_t*)(ptr);
|
||||
}
|
||||
#pragma language=restore
|
||||
#define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)
|
||||
#endif
|
||||
|
||||
#ifndef __UNALIGNED_UINT32_WRITE
|
||||
#pragma language=save
|
||||
#pragma language=extended
|
||||
__IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
|
||||
{
|
||||
*(__packed uint32_t*)(ptr) = val;;
|
||||
}
|
||||
#pragma language=restore
|
||||
#define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
|
||||
#endif
|
||||
|
||||
#ifndef __UNALIGNED_UINT32 /* deprecated */
|
||||
#pragma language=save
|
||||
#pragma language=extended
|
||||
__packed struct __iar_u32 { uint32_t v; };
|
||||
#pragma language=restore
|
||||
#define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
|
||||
#endif
|
||||
|
||||
#ifndef __USED
|
||||
#if __ICCARM_V8
|
||||
#define __USED __attribute__((used))
|
||||
#else
|
||||
#define __USED _Pragma("__root")
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef __WEAK
|
||||
#if __ICCARM_V8
|
||||
#define __WEAK __attribute__((weak))
|
||||
#else
|
||||
#define __WEAK _Pragma("__weak")
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef __ICCARM_INTRINSICS_VERSION__
|
||||
#define __ICCARM_INTRINSICS_VERSION__ 0
|
||||
#endif
|
||||
|
||||
#if __ICCARM_INTRINSICS_VERSION__ == 2
|
||||
|
||||
#if defined(__CLZ)
|
||||
#undef __CLZ
|
||||
#endif
|
||||
#if defined(__REVSH)
|
||||
#undef __REVSH
|
||||
#endif
|
||||
#if defined(__RBIT)
|
||||
#undef __RBIT
|
||||
#endif
|
||||
#if defined(__SSAT)
|
||||
#undef __SSAT
|
||||
#endif
|
||||
#if defined(__USAT)
|
||||
#undef __USAT
|
||||
#endif
|
||||
|
||||
#include "iccarm_builtin.h"
|
||||
|
||||
#define __disable_fault_irq __iar_builtin_disable_fiq
|
||||
#define __disable_irq __iar_builtin_disable_interrupt
|
||||
#define __enable_fault_irq __iar_builtin_enable_fiq
|
||||
#define __enable_irq __iar_builtin_enable_interrupt
|
||||
#define __arm_rsr __iar_builtin_rsr
|
||||
#define __arm_wsr __iar_builtin_wsr
|
||||
|
||||
|
||||
#define __get_APSR() (__arm_rsr("APSR"))
|
||||
#define __get_BASEPRI() (__arm_rsr("BASEPRI"))
|
||||
#define __get_CONTROL() (__arm_rsr("CONTROL"))
|
||||
#define __get_FAULTMASK() (__arm_rsr("FAULTMASK"))
|
||||
|
||||
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||||
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
|
||||
#define __get_FPSCR() (__arm_rsr("FPSCR"))
|
||||
#define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
|
||||
#else
|
||||
#define __get_FPSCR() ( 0 )
|
||||
#define __set_FPSCR(VALUE) ((void)VALUE)
|
||||
#endif
|
||||
|
||||
#define __get_IPSR() (__arm_rsr("IPSR"))
|
||||
#define __get_MSP() (__arm_rsr("MSP"))
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure MSPLIM is RAZ/WI
|
||||
#define __get_MSPLIM() (0U)
|
||||
#else
|
||||
#define __get_MSPLIM() (__arm_rsr("MSPLIM"))
|
||||
#endif
|
||||
#define __get_PRIMASK() (__arm_rsr("PRIMASK"))
|
||||
#define __get_PSP() (__arm_rsr("PSP"))
|
||||
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure PSPLIM is RAZ/WI
|
||||
#define __get_PSPLIM() (0U)
|
||||
#else
|
||||
#define __get_PSPLIM() (__arm_rsr("PSPLIM"))
|
||||
#endif
|
||||
|
||||
#define __get_xPSR() (__arm_rsr("xPSR"))
|
||||
|
||||
#define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
|
||||
#define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE)))
|
||||
#define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
|
||||
#define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE)))
|
||||
#define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
|
||||
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure MSPLIM is RAZ/WI
|
||||
#define __set_MSPLIM(VALUE) ((void)(VALUE))
|
||||
#else
|
||||
#define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
|
||||
#endif
|
||||
#define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE)))
|
||||
#define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure PSPLIM is RAZ/WI
|
||||
#define __set_PSPLIM(VALUE) ((void)(VALUE))
|
||||
#else
|
||||
#define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
|
||||
#endif
|
||||
|
||||
#define __TZ_get_CONTROL_NS() (__arm_rsr("CONTROL_NS"))
|
||||
#define __TZ_set_CONTROL_NS(VALUE) (__arm_wsr("CONTROL_NS", (VALUE)))
|
||||
#define __TZ_get_PSP_NS() (__arm_rsr("PSP_NS"))
|
||||
#define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
|
||||
#define __TZ_get_MSP_NS() (__arm_rsr("MSP_NS"))
|
||||
#define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
|
||||
#define __TZ_get_SP_NS() (__arm_rsr("SP_NS"))
|
||||
#define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE)))
|
||||
#define __TZ_get_PRIMASK_NS() (__arm_rsr("PRIMASK_NS"))
|
||||
#define __TZ_set_PRIMASK_NS(VALUE) (__arm_wsr("PRIMASK_NS", (VALUE)))
|
||||
#define __TZ_get_BASEPRI_NS() (__arm_rsr("BASEPRI_NS"))
|
||||
#define __TZ_set_BASEPRI_NS(VALUE) (__arm_wsr("BASEPRI_NS", (VALUE)))
|
||||
#define __TZ_get_FAULTMASK_NS() (__arm_rsr("FAULTMASK_NS"))
|
||||
#define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE)))
|
||||
#define __TZ_get_PSPLIM_NS() (__arm_rsr("PSPLIM_NS"))
|
||||
#define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE)))
|
||||
#define __TZ_get_MSPLIM_NS() (__arm_rsr("MSPLIM_NS"))
|
||||
#define __TZ_set_MSPLIM_NS(VALUE) (__arm_wsr("MSPLIM_NS", (VALUE)))
|
||||
|
||||
#define __NOP __iar_builtin_no_operation
|
||||
|
||||
#define __CLZ __iar_builtin_CLZ
|
||||
#define __CLREX __iar_builtin_CLREX
|
||||
|
||||
#define __DMB __iar_builtin_DMB
|
||||
#define __DSB __iar_builtin_DSB
|
||||
#define __ISB __iar_builtin_ISB
|
||||
|
||||
#define __LDREXB __iar_builtin_LDREXB
|
||||
#define __LDREXH __iar_builtin_LDREXH
|
||||
#define __LDREXW __iar_builtin_LDREX
|
||||
|
||||
#define __RBIT __iar_builtin_RBIT
|
||||
#define __REV __iar_builtin_REV
|
||||
#define __REV16 __iar_builtin_REV16
|
||||
|
||||
__IAR_FT int16_t __REVSH(int16_t val)
|
||||
{
|
||||
return (int16_t) __iar_builtin_REVSH(val);
|
||||
}
|
||||
|
||||
#define __ROR __iar_builtin_ROR
|
||||
#define __RRX __iar_builtin_RRX
|
||||
|
||||
#define __SEV __iar_builtin_SEV
|
||||
|
||||
#if !__IAR_M0_FAMILY
|
||||
#define __SSAT __iar_builtin_SSAT
|
||||
#endif
|
||||
|
||||
#define __STREXB __iar_builtin_STREXB
|
||||
#define __STREXH __iar_builtin_STREXH
|
||||
#define __STREXW __iar_builtin_STREX
|
||||
|
||||
#if !__IAR_M0_FAMILY
|
||||
#define __USAT __iar_builtin_USAT
|
||||
#endif
|
||||
|
||||
#define __WFE __iar_builtin_WFE
|
||||
#define __WFI __iar_builtin_WFI
|
||||
|
||||
#if __ARM_MEDIA__
|
||||
#define __SADD8 __iar_builtin_SADD8
|
||||
#define __QADD8 __iar_builtin_QADD8
|
||||
#define __SHADD8 __iar_builtin_SHADD8
|
||||
#define __UADD8 __iar_builtin_UADD8
|
||||
#define __UQADD8 __iar_builtin_UQADD8
|
||||
#define __UHADD8 __iar_builtin_UHADD8
|
||||
#define __SSUB8 __iar_builtin_SSUB8
|
||||
#define __QSUB8 __iar_builtin_QSUB8
|
||||
#define __SHSUB8 __iar_builtin_SHSUB8
|
||||
#define __USUB8 __iar_builtin_USUB8
|
||||
#define __UQSUB8 __iar_builtin_UQSUB8
|
||||
#define __UHSUB8 __iar_builtin_UHSUB8
|
||||
#define __SADD16 __iar_builtin_SADD16
|
||||
#define __QADD16 __iar_builtin_QADD16
|
||||
#define __SHADD16 __iar_builtin_SHADD16
|
||||
#define __UADD16 __iar_builtin_UADD16
|
||||
#define __UQADD16 __iar_builtin_UQADD16
|
||||
#define __UHADD16 __iar_builtin_UHADD16
|
||||
#define __SSUB16 __iar_builtin_SSUB16
|
||||
#define __QSUB16 __iar_builtin_QSUB16
|
||||
#define __SHSUB16 __iar_builtin_SHSUB16
|
||||
#define __USUB16 __iar_builtin_USUB16
|
||||
#define __UQSUB16 __iar_builtin_UQSUB16
|
||||
#define __UHSUB16 __iar_builtin_UHSUB16
|
||||
#define __SASX __iar_builtin_SASX
|
||||
#define __QASX __iar_builtin_QASX
|
||||
#define __SHASX __iar_builtin_SHASX
|
||||
#define __UASX __iar_builtin_UASX
|
||||
#define __UQASX __iar_builtin_UQASX
|
||||
#define __UHASX __iar_builtin_UHASX
|
||||
#define __SSAX __iar_builtin_SSAX
|
||||
#define __QSAX __iar_builtin_QSAX
|
||||
#define __SHSAX __iar_builtin_SHSAX
|
||||
#define __USAX __iar_builtin_USAX
|
||||
#define __UQSAX __iar_builtin_UQSAX
|
||||
#define __UHSAX __iar_builtin_UHSAX
|
||||
#define __USAD8 __iar_builtin_USAD8
|
||||
#define __USADA8 __iar_builtin_USADA8
|
||||
#define __SSAT16 __iar_builtin_SSAT16
|
||||
#define __USAT16 __iar_builtin_USAT16
|
||||
#define __UXTB16 __iar_builtin_UXTB16
|
||||
#define __UXTAB16 __iar_builtin_UXTAB16
|
||||
#define __SXTB16 __iar_builtin_SXTB16
|
||||
#define __SXTAB16 __iar_builtin_SXTAB16
|
||||
#define __SMUAD __iar_builtin_SMUAD
|
||||
#define __SMUADX __iar_builtin_SMUADX
|
||||
#define __SMMLA __iar_builtin_SMMLA
|
||||
#define __SMLAD __iar_builtin_SMLAD
|
||||
#define __SMLADX __iar_builtin_SMLADX
|
||||
#define __SMLALD __iar_builtin_SMLALD
|
||||
#define __SMLALDX __iar_builtin_SMLALDX
|
||||
#define __SMUSD __iar_builtin_SMUSD
|
||||
#define __SMUSDX __iar_builtin_SMUSDX
|
||||
#define __SMLSD __iar_builtin_SMLSD
|
||||
#define __SMLSDX __iar_builtin_SMLSDX
|
||||
#define __SMLSLD __iar_builtin_SMLSLD
|
||||
#define __SMLSLDX __iar_builtin_SMLSLDX
|
||||
#define __SEL __iar_builtin_SEL
|
||||
#define __QADD __iar_builtin_QADD
|
||||
#define __QSUB __iar_builtin_QSUB
|
||||
#define __PKHBT __iar_builtin_PKHBT
|
||||
#define __PKHTB __iar_builtin_PKHTB
|
||||
#endif
|
||||
|
||||
#else /* __ICCARM_INTRINSICS_VERSION__ == 2 */
|
||||
|
||||
#if __IAR_M0_FAMILY
|
||||
/* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
|
||||
#define __CLZ __cmsis_iar_clz_not_active
|
||||
#define __SSAT __cmsis_iar_ssat_not_active
|
||||
#define __USAT __cmsis_iar_usat_not_active
|
||||
#define __RBIT __cmsis_iar_rbit_not_active
|
||||
#define __get_APSR __cmsis_iar_get_APSR_not_active
|
||||
#endif
|
||||
|
||||
|
||||
#if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||||
(defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
|
||||
#define __get_FPSCR __cmsis_iar_get_FPSR_not_active
|
||||
#define __set_FPSCR __cmsis_iar_set_FPSR_not_active
|
||||
#endif
|
||||
|
||||
#ifdef __INTRINSICS_INCLUDED
|
||||
#error intrinsics.h is already included previously!
|
||||
#endif
|
||||
|
||||
#include <intrinsics.h>
|
||||
|
||||
#if __IAR_M0_FAMILY
|
||||
/* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
|
||||
#undef __CLZ
|
||||
#undef __SSAT
|
||||
#undef __USAT
|
||||
#undef __RBIT
|
||||
#undef __get_APSR
|
||||
|
||||
__STATIC_INLINE uint8_t __CLZ(uint32_t data)
|
||||
{
|
||||
if (data == 0U) { return 32U; }
|
||||
|
||||
uint32_t count = 0U;
|
||||
uint32_t mask = 0x80000000U;
|
||||
|
||||
while ((data & mask) == 0U)
|
||||
{
|
||||
count += 1U;
|
||||
mask = mask >> 1U;
|
||||
}
|
||||
return count;
|
||||
}
|
||||
|
||||
__STATIC_INLINE uint32_t __RBIT(uint32_t v)
|
||||
{
|
||||
uint8_t sc = 31U;
|
||||
uint32_t r = v;
|
||||
for (v >>= 1U; v; v >>= 1U)
|
||||
{
|
||||
r <<= 1U;
|
||||
r |= v & 1U;
|
||||
sc--;
|
||||
}
|
||||
return (r << sc);
|
||||
}
|
||||
|
||||
__STATIC_INLINE uint32_t __get_APSR(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm("MRS %0,APSR" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
|
||||
(defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
|
||||
#undef __get_FPSCR
|
||||
#undef __set_FPSCR
|
||||
#define __get_FPSCR() (0)
|
||||
#define __set_FPSCR(VALUE) ((void)VALUE)
|
||||
#endif
|
||||
|
||||
#pragma diag_suppress=Pe940
|
||||
#pragma diag_suppress=Pe177
|
||||
|
||||
#define __enable_irq __enable_interrupt
|
||||
#define __disable_irq __disable_interrupt
|
||||
#define __NOP __no_operation
|
||||
|
||||
#define __get_xPSR __get_PSR
|
||||
|
||||
#if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0)
|
||||
|
||||
__IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
|
||||
{
|
||||
return __LDREX((unsigned long *)ptr);
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
|
||||
{
|
||||
return __STREX(value, (unsigned long *)ptr);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
|
||||
#if (__CORTEX_M >= 0x03)
|
||||
|
||||
__IAR_FT uint32_t __RRX(uint32_t value)
|
||||
{
|
||||
uint32_t result;
|
||||
__ASM("RRX %0, %1" : "=r"(result) : "r" (value) : "cc");
|
||||
return(result);
|
||||
}
|
||||
|
||||
__IAR_FT void __set_BASEPRI_MAX(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR BASEPRI_MAX,%0"::"r" (value));
|
||||
}
|
||||
|
||||
|
||||
#define __enable_fault_irq __enable_fiq
|
||||
#define __disable_fault_irq __disable_fiq
|
||||
|
||||
|
||||
#endif /* (__CORTEX_M >= 0x03) */
|
||||
|
||||
__IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
|
||||
{
|
||||
return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
|
||||
}
|
||||
|
||||
#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
|
||||
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
|
||||
|
||||
__IAR_FT uint32_t __get_MSPLIM(void)
|
||||
{
|
||||
uint32_t res;
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure MSPLIM is RAZ/WI
|
||||
res = 0U;
|
||||
#else
|
||||
__asm volatile("MRS %0,MSPLIM" : "=r" (res));
|
||||
#endif
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __set_MSPLIM(uint32_t value)
|
||||
{
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure MSPLIM is RAZ/WI
|
||||
(void)value;
|
||||
#else
|
||||
__asm volatile("MSR MSPLIM,%0" :: "r" (value));
|
||||
#endif
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __get_PSPLIM(void)
|
||||
{
|
||||
uint32_t res;
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure PSPLIM is RAZ/WI
|
||||
res = 0U;
|
||||
#else
|
||||
__asm volatile("MRS %0,PSPLIM" : "=r" (res));
|
||||
#endif
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __set_PSPLIM(uint32_t value)
|
||||
{
|
||||
#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
|
||||
(!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
|
||||
// without main extensions, the non-secure PSPLIM is RAZ/WI
|
||||
(void)value;
|
||||
#else
|
||||
__asm volatile("MSR PSPLIM,%0" :: "r" (value));
|
||||
#endif
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_CONTROL_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,CONTROL_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_CONTROL_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR CONTROL_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_PSP_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,PSP_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_PSP_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR PSP_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_MSP_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,MSP_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_MSP_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR MSP_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_SP_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,SP_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
__IAR_FT void __TZ_set_SP_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR SP_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_PRIMASK_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,PRIMASK_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR PRIMASK_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_BASEPRI_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,BASEPRI_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR BASEPRI_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,FAULTMASK_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR FAULTMASK_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_PSPLIM_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,PSPLIM_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
__IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR PSPLIM_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __TZ_get_MSPLIM_NS(void)
|
||||
{
|
||||
uint32_t res;
|
||||
__asm volatile("MRS %0,MSPLIM_NS" : "=r" (res));
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value)
|
||||
{
|
||||
__asm volatile("MSR MSPLIM_NS,%0" :: "r" (value));
|
||||
}
|
||||
|
||||
#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
|
||||
|
||||
#endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */
|
||||
|
||||
#define __BKPT(value) __asm volatile ("BKPT %0" : : "i"(value))
|
||||
|
||||
#if __IAR_M0_FAMILY
|
||||
__STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
|
||||
{
|
||||
if ((sat >= 1U) && (sat <= 32U))
|
||||
{
|
||||
const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
|
||||
const int32_t min = -1 - max ;
|
||||
if (val > max)
|
||||
{
|
||||
return max;
|
||||
}
|
||||
else if (val < min)
|
||||
{
|
||||
return min;
|
||||
}
|
||||
}
|
||||
return val;
|
||||
}
|
||||
|
||||
__STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
|
||||
{
|
||||
if (sat <= 31U)
|
||||
{
|
||||
const uint32_t max = ((1U << sat) - 1U);
|
||||
if (val > (int32_t)max)
|
||||
{
|
||||
return max;
|
||||
}
|
||||
else if (val < 0)
|
||||
{
|
||||
return 0U;
|
||||
}
|
||||
}
|
||||
return (uint32_t)val;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if (__CORTEX_M >= 0x03) /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
|
||||
|
||||
__IAR_FT uint8_t __LDRBT(volatile uint8_t *addr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
|
||||
return ((uint8_t)res);
|
||||
}
|
||||
|
||||
__IAR_FT uint16_t __LDRHT(volatile uint16_t *addr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
|
||||
return ((uint16_t)res);
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __LDRT(volatile uint32_t *addr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr)
|
||||
{
|
||||
__ASM("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
|
||||
}
|
||||
|
||||
__IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr)
|
||||
{
|
||||
__ASM("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
|
||||
}
|
||||
|
||||
__IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr)
|
||||
{
|
||||
__ASM("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory");
|
||||
}
|
||||
|
||||
#endif /* (__CORTEX_M >= 0x03) */
|
||||
|
||||
#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
|
||||
(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
|
||||
|
||||
|
||||
__IAR_FT uint8_t __LDAB(volatile uint8_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
|
||||
return ((uint8_t)res);
|
||||
}
|
||||
|
||||
__IAR_FT uint16_t __LDAH(volatile uint16_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
|
||||
return ((uint16_t)res);
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __LDA(volatile uint32_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr)
|
||||
{
|
||||
__ASM volatile ("STLB %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
|
||||
}
|
||||
|
||||
__IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr)
|
||||
{
|
||||
__ASM volatile ("STLH %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
|
||||
}
|
||||
|
||||
__IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr)
|
||||
{
|
||||
__ASM volatile ("STL %1, [%0]" :: "r" (*ptr), "r" (value) : "memory");
|
||||
}
|
||||
|
||||
__IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
|
||||
return ((uint8_t)res);
|
||||
}
|
||||
|
||||
__IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
|
||||
return ((uint16_t)res);
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (*ptr) : "memory");
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
|
||||
return res;
|
||||
}
|
||||
|
||||
__IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
|
||||
{
|
||||
uint32_t res;
|
||||
__ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (*ptr), "r" (value) : "memory");
|
||||
return res;
|
||||
}
|
||||
|
||||
#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
|
||||
|
||||
#undef __IAR_FT
|
||||
#undef __IAR_M0_FAMILY
|
||||
#undef __ICCARM_V8
|
||||
|
||||
#pragma diag_default=Pe940
|
||||
#pragma diag_default=Pe177
|
||||
|
||||
#endif /* __CMSIS_ICCARM_H__ */
|
||||
@ -0,0 +1,39 @@
|
||||
/**************************************************************************//**
|
||||
* @file cmsis_version.h
|
||||
* @brief CMSIS Core(M) Version definitions
|
||||
* @version V5.0.2
|
||||
* @date 19. April 2017
|
||||
******************************************************************************/
|
||||
/*
|
||||
* Copyright (c) 2009-2017 ARM Limited. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#if defined ( __ICCARM__ )
|
||||
#pragma system_include /* treat file as system include file for MISRA check */
|
||||
#elif defined (__clang__)
|
||||
#pragma clang system_header /* treat file as system include file */
|
||||
#endif
|
||||
|
||||
#ifndef __CMSIS_VERSION_H
|
||||
#define __CMSIS_VERSION_H
|
||||
|
||||
/* CMSIS Version definitions */
|
||||
#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
|
||||
#define __CM_CMSIS_VERSION_SUB ( 1U) /*!< [15:0] CMSIS Core(M) sub version */
|
||||
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
|
||||
__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
|
||||
#endif
|
||||
1023
FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/CMSIS/core_cm0plus.h
Normal file
1023
FreeRTOS/Demo/CORTEX_M0+_LPC51U68_LPCXpresso/CMSIS/core_cm0plus.h
Normal file
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,7 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\CORTEX_M0+_LPC51U68_IAR.ewp</path>
|
||||
</project>
|
||||
<batchBuild />
|
||||
</workspace>
|
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,972 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
|
||||
|
||||
<SchemaVersion>2.1</SchemaVersion>
|
||||
|
||||
<Header>### uVision Project, (C) Keil Software</Header>
|
||||
|
||||
<Targets>
|
||||
<Target>
|
||||
<TargetName>CORTEX_M0+_LPC51U68_Keil</TargetName>
|
||||
<ToolsetNumber>0x4</ToolsetNumber>
|
||||
<ToolsetName>ARM-ADS</ToolsetName>
|
||||
<pCCUsed>5060750::V5.06 update 6 (build 750)::ARMCC</pCCUsed>
|
||||
<uAC6>0</uAC6>
|
||||
<TargetOption>
|
||||
<TargetCommonOption>
|
||||
<Device>LPC51U68JBD64</Device>
|
||||
<Vendor>NXP</Vendor>
|
||||
<PackID>NXP.LPC51U68_DFP.12.0.0</PackID>
|
||||
<PackURL>http://mcuxpresso.nxp.com/cmsis_pack/repo/</PackURL>
|
||||
<Cpu>IRAM(0x20000000,0x010000) IRAM2(0x04000000,0x8000) IROM(0x00000000,0x040000) CPUTYPE("Cortex-M0+") CLOCK(12000000) ELITTLE</Cpu>
|
||||
<FlashUtilSpec></FlashUtilSpec>
|
||||
<StartupFile></StartupFile>
|
||||
<FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0LPC51U68_256 -FS00 -FL040000 -FP0($$Device:LPC51U68JBD64$arm\LPC51U68_256.FLM))</FlashDriverDll>
|
||||
<DeviceId>0</DeviceId>
|
||||
<RegisterFile>$$Device:LPC51U68JBD64$fsl_device_registers.h</RegisterFile>
|
||||
<MemoryEnv></MemoryEnv>
|
||||
<Cmp></Cmp>
|
||||
<Asm></Asm>
|
||||
<Linker></Linker>
|
||||
<OHString></OHString>
|
||||
<InfinionOptionDll></InfinionOptionDll>
|
||||
<SLE66CMisc></SLE66CMisc>
|
||||
<SLE66AMisc></SLE66AMisc>
|
||||
<SLE66LinkerMisc></SLE66LinkerMisc>
|
||||
<SFDFile>$$Device:LPC51U68JBD64$LPC51U68.xml</SFDFile>
|
||||
<bCustSvd>0</bCustSvd>
|
||||
<UseEnv>0</UseEnv>
|
||||
<BinPath></BinPath>
|
||||
<IncludePath></IncludePath>
|
||||
<LibPath></LibPath>
|
||||
<RegisterFilePath></RegisterFilePath>
|
||||
<DBRegisterFilePath></DBRegisterFilePath>
|
||||
<TargetStatus>
|
||||
<Error>0</Error>
|
||||
<ExitCodeStop>0</ExitCodeStop>
|
||||
<ButtonStop>0</ButtonStop>
|
||||
<NotGenerated>0</NotGenerated>
|
||||
<InvalidFlash>1</InvalidFlash>
|
||||
</TargetStatus>
|
||||
<OutputDirectory>.\Objects\</OutputDirectory>
|
||||
<OutputName>CORTEX_M0+_LPC51U68_Keil</OutputName>
|
||||
<CreateExecutable>1</CreateExecutable>
|
||||
<CreateLib>0</CreateLib>
|
||||
<CreateHexFile>0</CreateHexFile>
|
||||
<DebugInformation>1</DebugInformation>
|
||||
<BrowseInformation>1</BrowseInformation>
|
||||
<ListingPath>.\Listings\</ListingPath>
|
||||
<HexFormatSelection>1</HexFormatSelection>
|
||||
<Merge32K>0</Merge32K>
|
||||
<CreateBatchFile>0</CreateBatchFile>
|
||||
<BeforeCompile>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopU1X>0</nStopU1X>
|
||||
<nStopU2X>0</nStopU2X>
|
||||
</BeforeCompile>
|
||||
<BeforeMake>
|
||||
<RunUserProg1>0</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name></UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopB1X>0</nStopB1X>
|
||||
<nStopB2X>0</nStopB2X>
|
||||
</BeforeMake>
|
||||
<AfterMake>
|
||||
<RunUserProg1>1</RunUserProg1>
|
||||
<RunUserProg2>0</RunUserProg2>
|
||||
<UserProg1Name>$K/ARM/BIN/ElfDwT.exe !L BASEADDRESS(0x0)</UserProg1Name>
|
||||
<UserProg2Name></UserProg2Name>
|
||||
<UserProg1Dos16Mode>0</UserProg1Dos16Mode>
|
||||
<UserProg2Dos16Mode>0</UserProg2Dos16Mode>
|
||||
<nStopA1X>0</nStopA1X>
|
||||
<nStopA2X>0</nStopA2X>
|
||||
</AfterMake>
|
||||
<SelectedForBatchBuild>0</SelectedForBatchBuild>
|
||||
<SVCSIdString></SVCSIdString>
|
||||
</TargetCommonOption>
|
||||
<CommonProperty>
|
||||
<UseCPPCompiler>0</UseCPPCompiler>
|
||||
<RVCTCodeConst>0</RVCTCodeConst>
|
||||
<RVCTZI>0</RVCTZI>
|
||||
<RVCTOtherData>0</RVCTOtherData>
|
||||
<ModuleSelection>0</ModuleSelection>
|
||||
<IncludeInBuild>1</IncludeInBuild>
|
||||
<AlwaysBuild>0</AlwaysBuild>
|
||||
<GenerateAssemblyFile>0</GenerateAssemblyFile>
|
||||
<AssembleAssemblyFile>0</AssembleAssemblyFile>
|
||||
<PublicsOnly>0</PublicsOnly>
|
||||
<StopOnExitCode>3</StopOnExitCode>
|
||||
<CustomArgument></CustomArgument>
|
||||
<IncludeLibraryModules></IncludeLibraryModules>
|
||||
<ComprImg>1</ComprImg>
|
||||
</CommonProperty>
|
||||
<DllOption>
|
||||
<SimDllName>SARMCM3.DLL</SimDllName>
|
||||
<SimDllArguments> </SimDllArguments>
|
||||
<SimDlgDll>DARMCM1.DLL</SimDlgDll>
|
||||
<SimDlgDllArguments>-pCM0+</SimDlgDllArguments>
|
||||
<TargetDllName>SARMCM3.DLL</TargetDllName>
|
||||
<TargetDllArguments> </TargetDllArguments>
|
||||
<TargetDlgDll>TARMCM1.DLL</TargetDlgDll>
|
||||
<TargetDlgDllArguments>-pCM0+</TargetDlgDllArguments>
|
||||
</DllOption>
|
||||
<DebugOption>
|
||||
<OPTHX>
|
||||
<HexSelection>1</HexSelection>
|
||||
<HexRangeLowAddress>0</HexRangeLowAddress>
|
||||
<HexRangeHighAddress>0</HexRangeHighAddress>
|
||||
<HexOffset>0</HexOffset>
|
||||
<Oh166RecLen>16</Oh166RecLen>
|
||||
</OPTHX>
|
||||
</DebugOption>
|
||||
<Utilities>
|
||||
<Flash1>
|
||||
<UseTargetDll>1</UseTargetDll>
|
||||
<UseExternalTool>0</UseExternalTool>
|
||||
<RunIndependent>0</RunIndependent>
|
||||
<UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
|
||||
<Capability>1</Capability>
|
||||
<DriverSelection>4096</DriverSelection>
|
||||
</Flash1>
|
||||
<bUseTDR>1</bUseTDR>
|
||||
<Flash2>BIN\UL2CM3.DLL</Flash2>
|
||||
<Flash3>"" ()</Flash3>
|
||||
<Flash4></Flash4>
|
||||
<pFcarmOut></pFcarmOut>
|
||||
<pFcarmGrp></pFcarmGrp>
|
||||
<pFcArmRoot></pFcArmRoot>
|
||||
<FcArmLst>0</FcArmLst>
|
||||
</Utilities>
|
||||
<TargetArmAds>
|
||||
<ArmAdsMisc>
|
||||
<GenerateListings>0</GenerateListings>
|
||||
<asHll>1</asHll>
|
||||
<asAsm>1</asAsm>
|
||||
<asMacX>1</asMacX>
|
||||
<asSyms>1</asSyms>
|
||||
<asFals>1</asFals>
|
||||
<asDbgD>1</asDbgD>
|
||||
<asForm>1</asForm>
|
||||
<ldLst>0</ldLst>
|
||||
<ldmm>1</ldmm>
|
||||
<ldXref>1</ldXref>
|
||||
<BigEnd>0</BigEnd>
|
||||
<AdsALst>1</AdsALst>
|
||||
<AdsACrf>1</AdsACrf>
|
||||
<AdsANop>0</AdsANop>
|
||||
<AdsANot>0</AdsANot>
|
||||
<AdsLLst>1</AdsLLst>
|
||||
<AdsLmap>1</AdsLmap>
|
||||
<AdsLcgr>1</AdsLcgr>
|
||||
<AdsLsym>1</AdsLsym>
|
||||
<AdsLszi>1</AdsLszi>
|
||||
<AdsLtoi>1</AdsLtoi>
|
||||
<AdsLsun>1</AdsLsun>
|
||||
<AdsLven>1</AdsLven>
|
||||
<AdsLsxf>1</AdsLsxf>
|
||||
<RvctClst>0</RvctClst>
|
||||
<GenPPlst>0</GenPPlst>
|
||||
<AdsCpuType>"Cortex-M0+"</AdsCpuType>
|
||||
<RvctDeviceName></RvctDeviceName>
|
||||
<mOS>0</mOS>
|
||||
<uocRom>0</uocRom>
|
||||
<uocRam>0</uocRam>
|
||||
<hadIROM>1</hadIROM>
|
||||
<hadIRAM>1</hadIRAM>
|
||||
<hadXRAM>0</hadXRAM>
|
||||
<uocXRam>0</uocXRam>
|
||||
<RvdsVP>0</RvdsVP>
|
||||
<RvdsMve>0</RvdsMve>
|
||||
<hadIRAM2>1</hadIRAM2>
|
||||
<hadIROM2>0</hadIROM2>
|
||||
<StupSel>8</StupSel>
|
||||
<useUlib>0</useUlib>
|
||||
<EndSel>0</EndSel>
|
||||
<uLtcg>0</uLtcg>
|
||||
<nSecure>0</nSecure>
|
||||
<RoSelD>3</RoSelD>
|
||||
<RwSelD>3</RwSelD>
|
||||
<CodeSel>0</CodeSel>
|
||||
<OptFeed>0</OptFeed>
|
||||
<NoZi1>0</NoZi1>
|
||||
<NoZi2>0</NoZi2>
|
||||
<NoZi3>0</NoZi3>
|
||||
<NoZi4>0</NoZi4>
|
||||
<NoZi5>0</NoZi5>
|
||||
<Ro1Chk>0</Ro1Chk>
|
||||
<Ro2Chk>0</Ro2Chk>
|
||||
<Ro3Chk>0</Ro3Chk>
|
||||
<Ir1Chk>1</Ir1Chk>
|
||||
<Ir2Chk>0</Ir2Chk>
|
||||
<Ra1Chk>0</Ra1Chk>
|
||||
<Ra2Chk>0</Ra2Chk>
|
||||
<Ra3Chk>0</Ra3Chk>
|
||||
<Im1Chk>1</Im1Chk>
|
||||
<Im2Chk>1</Im2Chk>
|
||||
<OnChipMemories>
|
||||
<Ocm1>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm1>
|
||||
<Ocm2>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm2>
|
||||
<Ocm3>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm3>
|
||||
<Ocm4>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm4>
|
||||
<Ocm5>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm5>
|
||||
<Ocm6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</Ocm6>
|
||||
<IRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</IRAM>
|
||||
<IROM>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</IROM>
|
||||
<XRAM>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</XRAM>
|
||||
<OCR_RVCT1>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT1>
|
||||
<OCR_RVCT2>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT2>
|
||||
<OCR_RVCT3>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT3>
|
||||
<OCR_RVCT4>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x40000</Size>
|
||||
</OCR_RVCT4>
|
||||
<OCR_RVCT5>
|
||||
<Type>1</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT5>
|
||||
<OCR_RVCT6>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT6>
|
||||
<OCR_RVCT7>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT7>
|
||||
<OCR_RVCT8>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x0</StartAddress>
|
||||
<Size>0x0</Size>
|
||||
</OCR_RVCT8>
|
||||
<OCR_RVCT9>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x4000000</StartAddress>
|
||||
<Size>0x8000</Size>
|
||||
</OCR_RVCT9>
|
||||
<OCR_RVCT10>
|
||||
<Type>0</Type>
|
||||
<StartAddress>0x20000000</StartAddress>
|
||||
<Size>0x10000</Size>
|
||||
</OCR_RVCT10>
|
||||
</OnChipMemories>
|
||||
<RvctStartVector></RvctStartVector>
|
||||
</ArmAdsMisc>
|
||||
<Cads>
|
||||
<interw>1</interw>
|
||||
<Optim>1</Optim>
|
||||
<oTime>0</oTime>
|
||||
<SplitLS>0</SplitLS>
|
||||
<OneElfS>1</OneElfS>
|
||||
<Strict>0</Strict>
|
||||
<EnumInt>0</EnumInt>
|
||||
<PlainCh>0</PlainCh>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<wLevel>2</wLevel>
|
||||
<uThumb>0</uThumb>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<uC99>1</uC99>
|
||||
<uGnu>0</uGnu>
|
||||
<useXO>0</useXO>
|
||||
<v6Lang>1</v6Lang>
|
||||
<v6LangP>1</v6LangP>
|
||||
<vShortEn>1</vShortEn>
|
||||
<vShortWch>1</vShortWch>
|
||||
<v6Lto>0</v6Lto>
|
||||
<v6WtE>0</v6WtE>
|
||||
<v6Rtti>0</v6Rtti>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath>..\..\Source\include;..\..\Source\portable\RVDS\ARM_CM0;..\Common\include;.\CMSIS;.\app;.\board\boards;.\component\lists;.\component\serial_manager;.\component\uart;.\device;.\drivers;.\utilities;.\Keil_specific</IncludePath>
|
||||
</VariousControls>
|
||||
</Cads>
|
||||
<Aads>
|
||||
<interw>1</interw>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<thumb>0</thumb>
|
||||
<SplitLS>0</SplitLS>
|
||||
<SwStkChk>0</SwStkChk>
|
||||
<NoWarn>0</NoWarn>
|
||||
<uSurpInc>0</uSurpInc>
|
||||
<useXO>0</useXO>
|
||||
<uClangAs>0</uClangAs>
|
||||
<VariousControls>
|
||||
<MiscControls></MiscControls>
|
||||
<Define></Define>
|
||||
<Undefine></Undefine>
|
||||
<IncludePath></IncludePath>
|
||||
</VariousControls>
|
||||
</Aads>
|
||||
<LDads>
|
||||
<umfTarg>0</umfTarg>
|
||||
<Ropi>0</Ropi>
|
||||
<Rwpi>0</Rwpi>
|
||||
<noStLib>0</noStLib>
|
||||
<RepFail>1</RepFail>
|
||||
<useFile>0</useFile>
|
||||
<TextAddressRange>0x00000000</TextAddressRange>
|
||||
<DataAddressRange>0x04000000</DataAddressRange>
|
||||
<pXoBase></pXoBase>
|
||||
<ScatterFile>.\Keil_specific\LPC51U68_flash.scf</ScatterFile>
|
||||
<IncludeLibs></IncludeLibs>
|
||||
<IncludeLibsPath></IncludeLibsPath>
|
||||
<Misc></Misc>
|
||||
<LinkerInputFile></LinkerInputFile>
|
||||
<DisabledWarnings></DisabledWarnings>
|
||||
</LDads>
|
||||
</TargetArmAds>
|
||||
</TargetOption>
|
||||
<Groups>
|
||||
<Group>
|
||||
<GroupName>Application_Code</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>main_full.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\app\main_full.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>main_blinky.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\app\main_blinky.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>main.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\app\main.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>IntQueueTimer.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\app\IntQueueTimer.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>IntQueueTimer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\app\IntQueueTimer.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>FreeRTOSConfig.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\app\FreeRTOSConfig.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>RegTest_Keil.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>.\Keil_specific\RegTest_Keil.s</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>compiler_attributes.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>.\Keil_specific\compiler_attributes.h</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>board</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>board.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards\board.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>board.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards\board.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>clock_config.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards\clock_config.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>clock_config.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards\clock_config.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>peripherals.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards\peripherals.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>peripherals.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards\peripherals.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>pin_mux.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards\pin_mux.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>pin_mux.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards\pin_mux.h</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>component-lists</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>generic_list.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\component\lists\generic_list.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>generic_list.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\component\lists\generic_list.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>component-serial-manager</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>serial_manager.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
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|
||||
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|
||||
<File>
|
||||
<FileName>serial_manager.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
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|
||||
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|
||||
<File>
|
||||
<FileName>serial_port_internal.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
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|
||||
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|
||||
<File>
|
||||
<FileName>serial_port_uart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
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|
||||
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|
||||
<File>
|
||||
<FileName>serial_port_uart.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<Group>
|
||||
<GroupName>componnet-uart</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>uart.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\component\uart\uart.h</FilePath>
|
||||
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|
||||
<File>
|
||||
<FileName>usart_adapter.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<Group>
|
||||
<GroupName>device</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>fsl_device_registers.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\device\fsl_device_registers.h</FilePath>
|
||||
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|
||||
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|
||||
<FileName>LPC51U68.h</FileName>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<FileName>LPC51U68_features.h</FileName>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<FileName>system_LPC51U68.c</FileName>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<FileName>system_LPC51U68.h</FileName>
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
<GroupName>drivers</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>fsl_clock.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\fsl_clock.c</FilePath>
|
||||
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|
||||
<File>
|
||||
<FileName>fsl_clock.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\fsl_clock.h</FilePath>
|
||||
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|
||||
<File>
|
||||
<FileName>fsl_common.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
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|
||||
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|
||||
<File>
|
||||
<FileName>fsl_common.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\fsl_common.h</FilePath>
|
||||
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|
||||
<File>
|
||||
<FileName>fsl_ctimer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
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|
||||
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|
||||
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|
||||
<FileName>fsl_ctimer.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\fsl_ctimer.h</FilePath>
|
||||
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|
||||
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|
||||
<FileName>fsl_flexcomm.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
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|
||||
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|
||||
<File>
|
||||
<FileName>fsl_flexcomm.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
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|
||||
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|
||||
<File>
|
||||
<FileName>fsl_gpio.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
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|
||||
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|
||||
<File>
|
||||
<FileName>fsl_gpio.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
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|
||||
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|
||||
<File>
|
||||
<FileName>fsl_iocon.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\fsl_iocon.h</FilePath>
|
||||
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|
||||
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|
||||
<FileName>fsl_pint.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\fsl_pint.c</FilePath>
|
||||
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|
||||
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|
||||
<FileName>fsl_pint.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\fsl_pint.h</FilePath>
|
||||
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|
||||
<File>
|
||||
<FileName>fsl_power.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\fsl_power.c</FilePath>
|
||||
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|
||||
<File>
|
||||
<FileName>fsl_power.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\fsl_power.h</FilePath>
|
||||
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|
||||
<File>
|
||||
<FileName>fsl_reset.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\fsl_reset.c</FilePath>
|
||||
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|
||||
<File>
|
||||
<FileName>fsl_reset.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\fsl_reset.h</FilePath>
|
||||
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|
||||
<File>
|
||||
<FileName>fsl_usart.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\fsl_usart.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>fsl_usart.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\fsl_usart.h</FilePath>
|
||||
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|
||||
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|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>startup</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>startup_LPC51U68.s</FileName>
|
||||
<FileType>2</FileType>
|
||||
<FilePath>.\Keil_specific\startup_LPC51U68.s</FilePath>
|
||||
</File>
|
||||
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|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>utilities</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>fsl_assert.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\utilities\fsl_assert.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>fsl_debug_console.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\utilities\fsl_debug_console.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>fsl_debug_console.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\utilities\fsl_debug_console.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>fsl_debug_console_conf.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\utilities\fsl_debug_console_conf.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>fsl_str.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\utilities\fsl_str.c</FilePath>
|
||||
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|
||||
<File>
|
||||
<FileName>fsl_str.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\utilities\fsl_str.h</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>CMSIS</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>arm_common_tables.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS\arm_common_tables.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>arm_const_structs.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS\arm_const_structs.h</FilePath>
|
||||
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|
||||
<File>
|
||||
<FileName>arm_math.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS\arm_math.h</FilePath>
|
||||
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|
||||
<File>
|
||||
<FileName>cmsis_armcc.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS\cmsis_armcc.h</FilePath>
|
||||
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|
||||
<File>
|
||||
<FileName>cmsis_armclang.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS\cmsis_armclang.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>cmsis_compiler.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS\cmsis_compiler.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>cmsis_gcc.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS\cmsis_gcc.h</FilePath>
|
||||
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|
||||
<File>
|
||||
<FileName>cmsis_iccarm.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
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|
||||
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|
||||
<File>
|
||||
<FileName>cmsis_version.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
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|
||||
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|
||||
<File>
|
||||
<FileName>core_cm0plus.h</FileName>
|
||||
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|
||||
<FilePath>..\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS\core_cm0plus.h</FilePath>
|
||||
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|
||||
</Files>
|
||||
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|
||||
<Group>
|
||||
<GroupName>FreeRTOS_Source</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>croutine.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Source\croutine.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>event_groups.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Source\event_groups.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>list.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Source\list.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>queue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Source\queue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stream_buffer.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Source\stream_buffer.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>tasks.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Source\tasks.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>timers.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Source\timers.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>atomic.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\Source\include\atomic.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>croutine.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\Source\include\croutine.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>deprecated_definitions.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\Source\include\deprecated_definitions.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>event_groups.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\Source\include\event_groups.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>FreeRTOS.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\Source\include\FreeRTOS.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>list.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\Source\include\list.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>message_buffer.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\Source\include\message_buffer.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mpu_prototypes.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\Source\include\mpu_prototypes.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>mpu_wrappers.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\Source\include\mpu_wrappers.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>portable.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\Source\include\portable.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>projdefs.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\Source\include\projdefs.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>queue.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\Source\include\queue.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>semphr.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\Source\include\semphr.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stack_macros.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\Source\include\stack_macros.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>StackMacros.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\Source\include\StackMacros.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>stream_buffer.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\Source\include\stream_buffer.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>task.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\Source\include\task.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>timers.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\Source\include\timers.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>port.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Source\portable\RVDS\ARM_CM0\port.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>portmacro.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\..\Source\portable\RVDS\ARM_CM0\portmacro.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>heap_5.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\..\Source\portable\MemMang\heap_5.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>Stadard_Demo_Tasks</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>blocktim.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\Common\include\blocktim.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>countsem.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\Common\include\countsem.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>IntQueue.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\Common\include\IntQueue.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>recmutex.h</FileName>
|
||||
<FileType>5</FileType>
|
||||
<FilePath>..\Common\include\recmutex.h</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>blocktim.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Common\Minimal\blocktim.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>IntQueue.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Common\Minimal\IntQueue.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>recmutex.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Common\Minimal\recmutex.c</FilePath>
|
||||
</File>
|
||||
<File>
|
||||
<FileName>countsem.c</FileName>
|
||||
<FileType>1</FileType>
|
||||
<FilePath>..\Common\Minimal\countsem.c</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
<Group>
|
||||
<GroupName>libs</GroupName>
|
||||
<Files>
|
||||
<File>
|
||||
<FileName>keil_lib_power.lib</FileName>
|
||||
<FileType>4</FileType>
|
||||
<FilePath>.\Keil_specific\keil_lib_power.lib</FilePath>
|
||||
</File>
|
||||
</Files>
|
||||
</Group>
|
||||
</Groups>
|
||||
</Target>
|
||||
</Targets>
|
||||
|
||||
<RTE>
|
||||
<apis/>
|
||||
<components/>
|
||||
<files/>
|
||||
</RTE>
|
||||
|
||||
</Project>
|
||||
Binary file not shown.
@ -0,0 +1,54 @@
|
||||
# ninja log v5
|
||||
6 633 5983664614120842 main_blinky.pbi 466194622a862efd
|
||||
633 960 5983664617402246 serial_port_uart.pbi 6135ba6d402d3190
|
||||
960 1177 5983664619433367 fsl_clock.pbi bbaae9561bdf2d67
|
||||
1178 1324 5983664621152109 fsl_flexcomm.pbi 109adc567ec48eef
|
||||
1325 1500 5983664622870987 usart_adapter.pbi a9d40b971e307970
|
||||
1501 1649 5983664624277297 clock_config.pbi ff0ffc2d6ab311f0
|
||||
1649 1807 5983664625839594 fsl_gpio.pbi 95ebfa96ec32a48e
|
||||
1808 2015 5983664628027092 IntQueueTimer.pbi 428eaccda7104143
|
||||
2015 2192 5983664629590000 fsl_pint.pbi f542e114c3aa3fc7
|
||||
2193 2351 5983664631308368 fsl_power.pbi 3c751da8daf76175
|
||||
2352 2522 5983664633027101 fsl_usart.pbi 79a81f2479f3515c
|
||||
2523 2687 5983664634745859 generic_list.pbi af726adf6aa1e31d
|
||||
2687 3012 5983664637870870 main.pbi 98f5ddcfa15fcbf9
|
||||
3013 3223 5983664639746404 fsl_ctimer.pbi 38784fa54306cddb
|
||||
3225 3473 5983664642089613 fsl_reset.pbi 60f260c096aaae92
|
||||
3473 3754 5983664645370841 heap_5.pbi 31b00e715019681b
|
||||
3755 3981 5983664647558364 serial_manager.pbi ee5b21caebfe84a0
|
||||
3982 4138 5983664649277374 board.pbi 778bb06e81ea4787
|
||||
4138 4191 5983664649745988 peripherals.pbi 598c9732d0747b54
|
||||
4192 4280 5983664650683367 main_full.pbi 741c88cead516813
|
||||
4281 4447 5983664652246257 pin_mux.pbi 7acc35bcac4ecdc5
|
||||
4447 4619 5983664653964614 fsl_common.pbi daeb490c65ce9670
|
||||
4620 4760 5983664655370878 system_LPC51U68.pbi c51b7d238c70cd
|
||||
4760 4941 5983664657245971 CORTEX_M0+_LPC51U68_IAR_part2.pbi deaae12d1cdcc9c
|
||||
4941 5049 5983664658339727 queue.pbi 14ac0bd34d1dee7a
|
||||
5050 5148 5983664659282982 blocktim.pbi 6dfac064a349ca26
|
||||
5148 5244 5983664660215726 recmutex.pbi 8f4e3154c7998752
|
||||
5245 5322 5983664660997382 event_groups.pbi b0117a93bb36a613
|
||||
5323 5467 5983664662563244 fsl_debug_console.pbi 19f8118ec4581cfa
|
||||
5467 5604 5983664663808354 CORTEX_M0+_LPC51U68_IAR_part1.pbi 9e2c289274637eb2
|
||||
5604 5686 5983664664589608 croutine.pbi 65e3213de074fe6a
|
||||
5686 5794 5983664665683524 stream_buffer.pbi d36ace7ee56c8e7b
|
||||
5795 5882 5983664666622159 IntQueue.pbi 2d9e66086d8be845
|
||||
5882 6014 5983664668027093 CORTEX_M0+_LPC51U68_IAR_part3.pbi c9ad824ecb205bde
|
||||
6015 6104 5983664668808482 countsem.pbi 586f70db4e41373
|
||||
6105 6244 5983664670214572 fsl_assert.pbi c99ac87c03d94763
|
||||
6245 6346 5983664671308335 CORTEX_M0+_LPC51U68_IAR_part5.pbi f53db81bd98fd2e2
|
||||
6347 6673 5983664674589618 fsl_str.pbi d52040727905d48b
|
||||
6673 6731 5983664675214763 CORTEX_M0+_LPC51U68_IAR_part6.pbi ad0bd60b599eb481
|
||||
6731 6864 5983664676465011 CORTEX_M0+_LPC51U68_IAR_part0.pbi 194a97c54c0b60c0
|
||||
6865 7094 5983664678809842 tasks.pbi b6d2e7233a0c4a29
|
||||
7094 7200 5983664679745976 list.pbi 85bae7d49ea82543
|
||||
7200 7315 5983664680995979 timers.pbi 691eecea006767f7
|
||||
7315 7393 5983664681777860 CORTEX_M0+_LPC51U68_IAR_part4.pbi 82dbdf419dac96fd
|
||||
7393 7615 5983664683965266 CORTEX_M0+_LPC51U68_IAR.pbd 4d06c615094d48dd
|
||||
7616 9291 5983664700528130 CORTEX_M0+_LPC51U68_IAR.pbw 8eea75a905a779e9
|
||||
26 134 5983664724590397 CORTEX_M0+_LPC51U68_IAR_part6.pbi 69e24b26346e9158
|
||||
135 206 5983664725370838 CORTEX_M0+_LPC51U68_IAR_part4.pbi 842d144e830aec2e
|
||||
207 304 5983664726308379 CORTEX_M0+_LPC51U68_IAR_part5.pbi 4e99c80f7e166f45
|
||||
305 4348 5983664766624919 port.pbi 6601f1f6b557096c
|
||||
4348 4491 5983664768183515 CORTEX_M0+_LPC51U68_IAR_part3.pbi af55a75b2ff03e60
|
||||
4492 4743 5983664770683618 CORTEX_M0+_LPC51U68_IAR.pbd 4d06c615094d48dd
|
||||
4745 7219 5983664793970413 CORTEX_M0+_LPC51U68_IAR.pbw 8eea75a905a779e9
|
||||
Binary file not shown.
Binary file not shown.
File diff suppressed because it is too large
Load Diff
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
@ -0,0 +1,25 @@
|
||||
IntQueue.pbi: \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\Common\Minimal\IntQueue.c \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\string.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\ycheck.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\yvals.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\DLib_Defaults.h \
|
||||
C:\\Program\ Files\ (x86)\\IAR\ Systems\\Embedded\ Workbench\ 8.3\\arm\\inc\\c\\DLib_Config_Normal.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\DLib_Product.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\ysizet.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\DLib_Product_string.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\..\Source\include\FreeRTOS.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\stddef.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\stdint.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\app\FreeRTOSConfig.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\..\Source\include/projdefs.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\..\Source\include/portable.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\..\Source\include/deprecated_definitions.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\..\Source\portable\IAR\ARM_CM0\portmacro.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\..\Source\include/mpu_wrappers.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\..\Source\include\queue.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\..\Source\include/task.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\..\Source\include/list.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\..\Source\include\task.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\Common\include\IntQueue.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\app\IntQueueTimer.h
|
||||
@ -0,0 +1,363 @@
|
||||
"C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\Common\Minimal\IntQueue.c"
|
||||
-std=c11
|
||||
-ferror-limit=0
|
||||
-fbracket-depth=512
|
||||
-MD
|
||||
-MF
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\Debug_IAR\Obj\IntQueue.pbi.dep
|
||||
-o
|
||||
IntQueue.pbi
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\Common\Minimal
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\..\Source\include
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\..\Source\portable\IAR\ARM_CM0
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\Common\include
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\app
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\component\lists
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\component\serial_manager
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\component\uart
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\device
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\IAR_specific
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\utilities
|
||||
-I
|
||||
C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\arm\inc
|
||||
-I
|
||||
C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\arm\inc\c
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Source\include
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Source\portable\IAR\ARM_CM0
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\Common\include
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\app
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\component\lists
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\component\serial_manager
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\component\uart
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\device
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\drivers
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\IAR_specific
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\utilities
|
||||
-D__CHAR_BITS__=8
|
||||
-D__CHAR_MAX__=0xff
|
||||
-D__CHAR_MIN__=0
|
||||
-D__CHAR_SIZE__=1
|
||||
-D__UNSIGNED_CHAR_MAX__=0xff
|
||||
-D__SIGNED_CHAR_MAX__=127
|
||||
-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)
|
||||
-D__CHAR_ALIGN__=1
|
||||
-D__SHORT_SIZE__=2
|
||||
-D__UNSIGNED_SHORT_MAX__=0xffff
|
||||
-D__SIGNED_SHORT_MAX__=32767
|
||||
-D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)
|
||||
-D__SHORT_ALIGN__=2
|
||||
-D__INT_SIZE__=4
|
||||
-D__UNSIGNED_INT_MAX__=0xffffffffU
|
||||
-D__SIGNED_INT_MAX__=2147483647
|
||||
-D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)
|
||||
-D__INT_ALIGN__=4
|
||||
-D__LONG_SIZE__=4
|
||||
-D__UNSIGNED_LONG_MAX__=0xffffffffUL
|
||||
-D__SIGNED_LONG_MAX__=2147483647L
|
||||
-D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)
|
||||
-D__LONG_ALIGN__=4
|
||||
-D__LONG_LONG_SIZE__=8
|
||||
-D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL
|
||||
-D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL
|
||||
-D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)
|
||||
-D__LONG_LONG_ALIGN__=8
|
||||
-D__INT8_T_TYPE__=signed char
|
||||
-D__INT8_T_MAX__=127
|
||||
-D__INT8_T_MIN__=(-__INT8_T_MAX__-1)
|
||||
-D__UINT8_T_TYPE__=unsigned char
|
||||
-D__UINT8_T_MAX__=0xff
|
||||
-D__INT8_SIZE_PREFIX__="hh"
|
||||
-D__INT16_T_TYPE__=signed short int
|
||||
-D__INT16_T_MAX__=32767
|
||||
-D__INT16_T_MIN__=(-__INT16_T_MAX__-1)
|
||||
-D__UINT16_T_TYPE__=unsigned short int
|
||||
-D__UINT16_T_MAX__=0xffff
|
||||
-D__INT16_SIZE_PREFIX__="h"
|
||||
-D__INT32_T_TYPE__=signed int
|
||||
-D__INT32_T_MAX__=2147483647
|
||||
-D__INT32_T_MIN__=(-__INT32_T_MAX__-1)
|
||||
-D__UINT32_T_TYPE__=unsigned int
|
||||
-D__UINT32_T_MAX__=0xffffffffU
|
||||
-D__INT32_SIZE_PREFIX__=""
|
||||
-D__INT64_T_TYPE__=signed long long int
|
||||
-D__INT64_T_MAX__=9223372036854775807LL
|
||||
-D__INT64_T_MIN__=(-__INT64_T_MAX__-1)
|
||||
-D__UINT64_T_TYPE__=unsigned long long int
|
||||
-D__UINT64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_SIZE_PREFIX__="ll"
|
||||
-D__INT_LEAST8_T_TYPE__=signed char
|
||||
-D__INT_LEAST8_T_MAX__=127
|
||||
-D__INT_LEAST8_T_MIN__=(-__INT_LEAST8_T_MAX__-1)
|
||||
-D__UINT_LEAST8_T_TYPE__=unsigned char
|
||||
-D__UINT_LEAST8_T_MAX__=0xff
|
||||
-D__INT8_C_SUFFIX__=
|
||||
-D__UINT8_C_SUFFIX__=
|
||||
-D__INT_LEAST8_SIZE_PREFIX__="hh"
|
||||
-D__INT_LEAST16_T_TYPE__=signed short int
|
||||
-D__INT_LEAST16_T_MAX__=32767
|
||||
-D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)
|
||||
-D__UINT_LEAST16_T_TYPE__=unsigned short int
|
||||
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board.pbi: \
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|
||||
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||||
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|
||||
"C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards\board.c"
|
||||
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||||
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|
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C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards
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|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS
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C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\component\lists
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|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\component\serial_manager
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||||
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|
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|
||||
-D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPM_DATA_MEMORY_LIST1__()=
|
||||
-D__TOPM_DATA_MEMORY_LIST2__(_P1)=
|
||||
-D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=
|
||||
-D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEM0_SIZE_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INDEX_TYPE__=signed int
|
||||
-D__iar_fp2bits32(x)=0
|
||||
-D__iar_fp2bits64(x)=0
|
||||
-D__iar_fpgethi64(x)=0
|
||||
-D__iar_atomic_add_fetch(x,y,z)=0
|
||||
-D__iar_atomic_sub_fetch(x,y,z)=0
|
||||
-D__iar_atomic_load(x,y)=0ULL
|
||||
-D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0
|
||||
@ -0,0 +1,71 @@
|
||||
#Generating source browse information for project CORTEX_M0+_LPC51U68_IAR
|
||||
|
||||
|
||||
#Abbreviations
|
||||
cc = C$:\Program$ Files$ (x86)\IAR$ Systems\Embedded$ Workbench$ 8.3\common\bin\SourceIndexer.exe
|
||||
ll = C$:\Program$ Files$ (x86)\IAR$ Systems\Embedded$ Workbench$ 8.3\common\bin\PbdLink.exe
|
||||
bd = C$:\Program$ Files$ (x86)\IAR$ Systems\Embedded$ Workbench$ 8.3\common\bin\makeBrowseData.exe
|
||||
|
||||
|
||||
|
||||
#Rules
|
||||
rule index
|
||||
depfile = $out.dep
|
||||
command = $cc -out=$out -f $in
|
||||
rule link
|
||||
command = $ll -M $out $in
|
||||
rule browsedata
|
||||
command = $bd $in -output $out
|
||||
|
||||
|
||||
|
||||
#Build steps
|
||||
build IntQueueTimer.pbi : index IntQueueTimer.xcl
|
||||
build main.pbi : index main.xcl
|
||||
build main_blinky.pbi : index main_blinky.xcl
|
||||
build main_full.pbi : index main_full.xcl
|
||||
build board.pbi : index board.xcl
|
||||
build clock_config.pbi : index clock_config.xcl
|
||||
build peripherals.pbi : index peripherals.xcl
|
||||
build pin_mux.pbi : index pin_mux.xcl
|
||||
build generic_list.pbi : index generic_list.xcl
|
||||
build serial_manager.pbi : index serial_manager.xcl
|
||||
build serial_port_uart.pbi : index serial_port_uart.xcl
|
||||
build usart_adapter.pbi : index usart_adapter.xcl
|
||||
build system_LPC51U68.pbi : index system_LPC51U68.xcl
|
||||
build fsl_clock.pbi : index fsl_clock.xcl
|
||||
build fsl_common.pbi : index fsl_common.xcl
|
||||
build fsl_ctimer.pbi : index fsl_ctimer.xcl
|
||||
build fsl_flexcomm.pbi : index fsl_flexcomm.xcl
|
||||
build fsl_gpio.pbi : index fsl_gpio.xcl
|
||||
build fsl_pint.pbi : index fsl_pint.xcl
|
||||
build fsl_power.pbi : index fsl_power.xcl
|
||||
build fsl_reset.pbi : index fsl_reset.xcl
|
||||
build fsl_usart.pbi : index fsl_usart.xcl
|
||||
build port.pbi : index port.xcl
|
||||
build heap_5.pbi : index heap_5.xcl
|
||||
build croutine.pbi : index croutine.xcl
|
||||
build event_groups.pbi : index event_groups.xcl
|
||||
build list.pbi : index list.xcl
|
||||
build queue.pbi : index queue.xcl
|
||||
build stream_buffer.pbi : index stream_buffer.xcl
|
||||
build tasks.pbi : index tasks.xcl
|
||||
build timers.pbi : index timers.xcl
|
||||
build blocktim.pbi : index blocktim.xcl
|
||||
build countsem.pbi : index countsem.xcl
|
||||
build IntQueue.pbi : index IntQueue.xcl
|
||||
build recmutex.pbi : index recmutex.xcl
|
||||
build fsl_assert.pbi : index fsl_assert.xcl
|
||||
build fsl_debug_console.pbi : index fsl_debug_console.xcl
|
||||
build fsl_str.pbi : index fsl_str.xcl
|
||||
build CORTEX_M0+_LPC51U68_IAR_part0.pbi : link IntQueueTimer.pbi main.pbi main_blinky.pbi main_full.pbi board.pbi clock_config.pbi
|
||||
build CORTEX_M0+_LPC51U68_IAR_part1.pbi : link peripherals.pbi pin_mux.pbi generic_list.pbi serial_manager.pbi serial_port_uart.pbi usart_adapter.pbi
|
||||
build CORTEX_M0+_LPC51U68_IAR_part2.pbi : link system_LPC51U68.pbi fsl_clock.pbi fsl_common.pbi fsl_ctimer.pbi fsl_flexcomm.pbi fsl_gpio.pbi
|
||||
build CORTEX_M0+_LPC51U68_IAR_part3.pbi : link fsl_pint.pbi fsl_power.pbi fsl_reset.pbi fsl_usart.pbi port.pbi heap_5.pbi
|
||||
build CORTEX_M0+_LPC51U68_IAR_part4.pbi : link croutine.pbi event_groups.pbi list.pbi queue.pbi stream_buffer.pbi tasks.pbi
|
||||
build CORTEX_M0+_LPC51U68_IAR_part5.pbi : link timers.pbi blocktim.pbi countsem.pbi IntQueue.pbi recmutex.pbi fsl_assert.pbi
|
||||
build CORTEX_M0+_LPC51U68_IAR_part6.pbi : link fsl_debug_console.pbi fsl_str.pbi
|
||||
build CORTEX_M0+_LPC51U68_IAR.pbd : link CORTEX_M0+_LPC51U68_IAR_part0.pbi CORTEX_M0+_LPC51U68_IAR_part1.pbi CORTEX_M0+_LPC51U68_IAR_part2.pbi CORTEX_M0+_LPC51U68_IAR_part3.pbi CORTEX_M0+_LPC51U68_IAR_part4.pbi CORTEX_M0+_LPC51U68_IAR_part5.pbi CORTEX_M0+_LPC51U68_IAR_part6.pbi
|
||||
build CORTEX_M0+_LPC51U68_IAR.pbw : browsedata CORTEX_M0+_LPC51U68_IAR.pbd
|
||||
|
||||
|
||||
Binary file not shown.
@ -0,0 +1,32 @@
|
||||
clock_config.pbi: \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards\clock_config.c \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\fsl_power.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers/fsl_common.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\assert.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\ycheck.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\yvals.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\DLib_Defaults.h \
|
||||
C:\\Program\ Files\ (x86)\\IAR\ Systems\\Embedded\ Workbench\ 8.3\\arm\\inc\\c\\DLib_Config_Normal.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\DLib_Product.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\stdbool.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\stdint.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\string.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\ysizet.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\DLib_Product_string.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\stdlib.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\DLib_Product_stdlib.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\stddef.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\device\fsl_device_registers.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\device/LPC51U68.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS\core_cm0plus.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS/cmsis_version.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS/cmsis_compiler.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS\cmsis_iccarm.h \
|
||||
C:\Program\ Files\ (x86)\IAR\ Systems\Embedded\ Workbench\ 8.3\arm\inc\c\iccarm_builtin.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\device/system_LPC51U68.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\device/LPC51U68_features.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers/fsl_clock.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers/fsl_reset.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\fsl_clock.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards/clock_config.h \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers\fsl_common.h
|
||||
@ -0,0 +1,363 @@
|
||||
"C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards\clock_config.c"
|
||||
-std=c11
|
||||
-ferror-limit=0
|
||||
-fbracket-depth=512
|
||||
-MD
|
||||
-MF
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\Debug_IAR\Obj\clock_config.pbi.dep
|
||||
-o
|
||||
clock_config.pbi
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\..\Source\include
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\..\Source\portable\IAR\ARM_CM0
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\Common\include
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\app
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\component\lists
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\component\serial_manager
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\component\uart
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\device
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\drivers
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\IAR_specific
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\..\CORTEX_M0+_LPC51U68_LPCXpresso\utilities
|
||||
-I
|
||||
C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\arm\inc
|
||||
-I
|
||||
C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.3\arm\inc\c
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Source\include
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Source\portable\IAR\ARM_CM0
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\Common\include
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\app
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\board\boards
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\CMSIS
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\component\lists
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\component\serial_manager
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\component\uart
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\device
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\drivers
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\IAR_specific
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\utilities
|
||||
-D__CHAR_BITS__=8
|
||||
-D__CHAR_MAX__=0xff
|
||||
-D__CHAR_MIN__=0
|
||||
-D__CHAR_SIZE__=1
|
||||
-D__UNSIGNED_CHAR_MAX__=0xff
|
||||
-D__SIGNED_CHAR_MAX__=127
|
||||
-D__SIGNED_CHAR_MIN__=(-__SIGNED_CHAR_MAX__-1)
|
||||
-D__CHAR_ALIGN__=1
|
||||
-D__SHORT_SIZE__=2
|
||||
-D__UNSIGNED_SHORT_MAX__=0xffff
|
||||
-D__SIGNED_SHORT_MAX__=32767
|
||||
-D__SIGNED_SHORT_MIN__=(-__SIGNED_SHORT_MAX__-1)
|
||||
-D__SHORT_ALIGN__=2
|
||||
-D__INT_SIZE__=4
|
||||
-D__UNSIGNED_INT_MAX__=0xffffffffU
|
||||
-D__SIGNED_INT_MAX__=2147483647
|
||||
-D__SIGNED_INT_MIN__=(-__SIGNED_INT_MAX__-1)
|
||||
-D__INT_ALIGN__=4
|
||||
-D__LONG_SIZE__=4
|
||||
-D__UNSIGNED_LONG_MAX__=0xffffffffUL
|
||||
-D__SIGNED_LONG_MAX__=2147483647L
|
||||
-D__SIGNED_LONG_MIN__=(-__SIGNED_LONG_MAX__-1)
|
||||
-D__LONG_ALIGN__=4
|
||||
-D__LONG_LONG_SIZE__=8
|
||||
-D__UNSIGNED_LONG_LONG_MAX__=0xffffffffffffffffULL
|
||||
-D__SIGNED_LONG_LONG_MAX__=9223372036854775807LL
|
||||
-D__SIGNED_LONG_LONG_MIN__=(-__SIGNED_LONG_LONG_MAX__-1)
|
||||
-D__LONG_LONG_ALIGN__=8
|
||||
-D__INT8_T_TYPE__=signed char
|
||||
-D__INT8_T_MAX__=127
|
||||
-D__INT8_T_MIN__=(-__INT8_T_MAX__-1)
|
||||
-D__UINT8_T_TYPE__=unsigned char
|
||||
-D__UINT8_T_MAX__=0xff
|
||||
-D__INT8_SIZE_PREFIX__="hh"
|
||||
-D__INT16_T_TYPE__=signed short int
|
||||
-D__INT16_T_MAX__=32767
|
||||
-D__INT16_T_MIN__=(-__INT16_T_MAX__-1)
|
||||
-D__UINT16_T_TYPE__=unsigned short int
|
||||
-D__UINT16_T_MAX__=0xffff
|
||||
-D__INT16_SIZE_PREFIX__="h"
|
||||
-D__INT32_T_TYPE__=signed int
|
||||
-D__INT32_T_MAX__=2147483647
|
||||
-D__INT32_T_MIN__=(-__INT32_T_MAX__-1)
|
||||
-D__UINT32_T_TYPE__=unsigned int
|
||||
-D__UINT32_T_MAX__=0xffffffffU
|
||||
-D__INT32_SIZE_PREFIX__=""
|
||||
-D__INT64_T_TYPE__=signed long long int
|
||||
-D__INT64_T_MAX__=9223372036854775807LL
|
||||
-D__INT64_T_MIN__=(-__INT64_T_MAX__-1)
|
||||
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fsl_gpio.pbi: \
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@ -0,0 +1,363 @@
|
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|
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|
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|
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|
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||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\component\serial_manager
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\component\uart
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\device
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\drivers
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\IAR_specific
|
||||
-I
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\utilities
|
||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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||||
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|
||||
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|
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||||
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||||
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|
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|
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|
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|
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|
||||
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|
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|
||||
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|
||||
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|
||||
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|
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|
||||
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|
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|
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|
||||
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|
||||
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|
||||
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|
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|
||||
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|
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|
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|
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|
||||
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Binary file not shown.
@ -0,0 +1,30 @@
|
||||
generic_list.pbi: \
|
||||
C:\Users\yuhzheng\Documents\FreeRTOS\FreeRTOS\Demo\CORTEX_M0+_LPC51U68_LPCXpresso\component\lists\generic_list.c \
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||||
-D__INT_LEAST16_T_TYPE__=signed short int
|
||||
-D__INT_LEAST16_T_MAX__=32767
|
||||
-D__INT_LEAST16_T_MIN__=(-__INT_LEAST16_T_MAX__-1)
|
||||
-D__UINT_LEAST16_T_TYPE__=unsigned short int
|
||||
-D__UINT_LEAST16_T_MAX__=0xffff
|
||||
-D__INT16_C_SUFFIX__=
|
||||
-D__UINT16_C_SUFFIX__=
|
||||
-D__INT_LEAST16_SIZE_PREFIX__="h"
|
||||
-D__INT_LEAST32_T_TYPE__=signed int
|
||||
-D__INT_LEAST32_T_MAX__=2147483647
|
||||
-D__INT_LEAST32_T_MIN__=(-__INT_LEAST32_T_MAX__-1)
|
||||
-D__UINT_LEAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_LEAST32_T_MAX__=0xffffffffU
|
||||
-D__INT32_C_SUFFIX__=
|
||||
-D__UINT32_C_SUFFIX__=U
|
||||
-D__INT_LEAST32_SIZE_PREFIX__=""
|
||||
-D__INT_LEAST64_T_TYPE__=signed long long int
|
||||
-D__INT_LEAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_LEAST64_T_MIN__=(-__INT_LEAST64_T_MAX__-1)
|
||||
-D__UINT_LEAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_LEAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT64_C_SUFFIX__=LL
|
||||
-D__UINT64_C_SUFFIX__=ULL
|
||||
-D__INT_LEAST64_SIZE_PREFIX__="ll"
|
||||
-D__INT_FAST8_T_TYPE__=signed int
|
||||
-D__INT_FAST8_T_MAX__=2147483647
|
||||
-D__INT_FAST8_T_MIN__=(-__INT_FAST8_T_MAX__-1)
|
||||
-D__UINT_FAST8_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST8_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST8_SIZE_PREFIX__=""
|
||||
-D__INT_FAST16_T_TYPE__=signed int
|
||||
-D__INT_FAST16_T_MAX__=2147483647
|
||||
-D__INT_FAST16_T_MIN__=(-__INT_FAST16_T_MAX__-1)
|
||||
-D__UINT_FAST16_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST16_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST16_SIZE_PREFIX__=""
|
||||
-D__INT_FAST32_T_TYPE__=signed int
|
||||
-D__INT_FAST32_T_MAX__=2147483647
|
||||
-D__INT_FAST32_T_MIN__=(-__INT_FAST32_T_MAX__-1)
|
||||
-D__UINT_FAST32_T_TYPE__=unsigned int
|
||||
-D__UINT_FAST32_T_MAX__=0xffffffffU
|
||||
-D__INT_FAST32_SIZE_PREFIX__=""
|
||||
-D__INT_FAST64_T_TYPE__=signed long long int
|
||||
-D__INT_FAST64_T_MAX__=9223372036854775807LL
|
||||
-D__INT_FAST64_T_MIN__=(-__INT_FAST64_T_MAX__-1)
|
||||
-D__UINT_FAST64_T_TYPE__=unsigned long long int
|
||||
-D__UINT_FAST64_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INT_FAST64_SIZE_PREFIX__="ll"
|
||||
-D__INTMAX_T_TYPE__=signed long long int
|
||||
-D__INTMAX_T_MAX__=9223372036854775807LL
|
||||
-D__INTMAX_T_MIN__=(-__INTMAX_T_MAX__-1)
|
||||
-D__UINTMAX_T_TYPE__=unsigned long long int
|
||||
-D__UINTMAX_T_MAX__=0xffffffffffffffffULL
|
||||
-D__INTMAX_C_SUFFIX__=LL
|
||||
-D__UINTMAX_C_SUFFIX__=ULL
|
||||
-D__INTMAX_SIZE_PREFIX__="ll"
|
||||
-D__FLOAT_SIZE__=4
|
||||
-D__FLOAT_ALIGN__=4
|
||||
-D__DOUBLE_SIZE__=8
|
||||
-D__DOUBLE_ALIGN__=8
|
||||
-D__LONG_DOUBLE_SIZE__=8
|
||||
-D__LONG_DOUBLE_ALIGN__=8
|
||||
-D____FP16_SIZE__=2
|
||||
-D____FP16_ALIGN__=2
|
||||
-D__NAN_HAS_HIGH_MANTISSA_BIT_SET__=0
|
||||
-D__SUBNORMAL_FLOATING_POINTS__=0
|
||||
-D__SIZE_T_TYPE__=unsigned int
|
||||
-D__SIZE_T_MAX__=0xffffffffU
|
||||
-D__PTRDIFF_T_TYPE__=signed int
|
||||
-D__PTRDIFF_T_MAX__=2147483647
|
||||
-D__PTRDIFF_T_MIN__=(-__PTRDIFF_T_MAX__-1)
|
||||
-D__INTPTR_T_TYPE__=signed int
|
||||
-D__INTPTR_T_MAX__=2147483647
|
||||
-D__INTPTR_T_MIN__=(-__INTPTR_T_MAX__-1)
|
||||
-D__UINTPTR_T_TYPE__=unsigned int
|
||||
-D__UINTPTR_T_MAX__=0xffffffffU
|
||||
-D__INTPTR_SIZE_PREFIX__=""
|
||||
-D__JMP_BUF_ELEMENT_TYPE__=unsigned long long int
|
||||
-D__JMP_BUF_NUM_ELEMENTS__=8
|
||||
-D__TID__=0xcf70
|
||||
-D__VER__=8040002
|
||||
-D__BUILD_NUMBER__=214
|
||||
-D__IAR_SYSTEMS_ICC__=9
|
||||
-D_MAX_ALIGNMENT=8
|
||||
-D__LITTLE_ENDIAN__=1
|
||||
-D__BOOL_TYPE__=unsigned char
|
||||
-D__BOOL_SIZE__=1
|
||||
-D__WCHAR_T_TYPE__=unsigned int
|
||||
-D__WCHAR_T_SIZE__=4
|
||||
-D__WCHAR_T_MAX__=0xffffffffU
|
||||
-D__DEF_PTR_MEM__=__data
|
||||
-D__DEF_PTR_SIZE__=4
|
||||
-D__DATA_MEM0__=__data
|
||||
-D__DATA_MEM0_POINTER_OK__=1
|
||||
-D__DATA_MEM0_UNIQUE_POINTER__=1
|
||||
-D__DATA_MEM0_VAR_OK__=1
|
||||
-D__DATA_MEM0_INTPTR_TYPE__=int
|
||||
-D__DATA_MEM0_UINTPTR_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INTPTR_SIZE_PREFIX__=""
|
||||
-D__DATA_MEM0_MAX_SIZE__=0x7fffffffU
|
||||
-D_RSIZE_MAX=0x7fffffffU
|
||||
-D__DATA_MEM0_HEAP_SEGMENT__="HEAP"
|
||||
-D__DATA_MEM0_PAGE_SIZE__=0
|
||||
-D__DATA_MEM0_HEAP__=0
|
||||
-D__CODE_MEM0__=__code
|
||||
-D__CODE_MEM0_POINTER_OK__=1
|
||||
-D__CODE_MEM0_UNIQUE_POINTER__=1
|
||||
-D__HEAP_MEM0__=0
|
||||
-D__HEAP_DEFAULT_MEM__=0
|
||||
-D__HEAPND_MEMORY_LIST1__()=
|
||||
-D__MULTIPLE_HEAPS__=0
|
||||
-D__DEF_HEAP_MEM__=__data
|
||||
-D__DEF_STACK_MEM_INDEX__=0
|
||||
-D__PRAGMA_PACK_ON__=1
|
||||
-D__MULTIPLE_INHERITANCE__=1
|
||||
-D__AAPCS__=1
|
||||
-D__ARM4TM__=4
|
||||
-D__ARM5TM__=5
|
||||
-D__ARM5T__=5
|
||||
-D__ARM5__=5
|
||||
-D__ARM6M__=11
|
||||
-D__ARM6SM__=12
|
||||
-D__ARM6__=6
|
||||
-D__ARM_32BIT_STATE=1
|
||||
-D__ARM_ACLE=201
|
||||
-D__ARM_ALIGN_MAX_PWR=8
|
||||
-D__ARM_ALIGN_MAX_STACK_PWR=3
|
||||
-D__ARM_ARCH=6
|
||||
-D__ARM_ARCH_ISA_THUMB=1
|
||||
-D__ARM_ARCH_PROFILE='M'
|
||||
-D__ARM_FEATURE_COPROC=0
|
||||
-D__ARM_FP16_ARGS=1
|
||||
-D__ARM_FP16_FORMAT_IEEE=1
|
||||
-D__ARM_PCS=1
|
||||
-D__ARM_PROFILE_M__=1
|
||||
-D__ARM_SIZE_MINIMAL_ENUM=1
|
||||
-D__ARM_SIZE_WCHAR_T=4
|
||||
-D__CODE_SIZE_LIMIT=0
|
||||
-D__CORE__=__ARM6M__
|
||||
-D__CPU_MODE__=1
|
||||
-D__ICCARM_INTRINSICS_VERSION__=2
|
||||
-D__ICCARM__=1
|
||||
-D__INTERWORKING__=1
|
||||
-D__PLAIN_INT_BITFIELD_IS_SIGNED__=0
|
||||
-D__HAS_WEAK__=1
|
||||
-D__HAS_PACKED__=1
|
||||
-D__HAS_JOINED_TYPES__=1
|
||||
-D__HAS_LOCATED_DECLARATION__=1
|
||||
-D__HAS_LOCATED_WITH_INIT__=1
|
||||
-D__IAR_COMPILERBASE__=656646
|
||||
-D__IAR_COMPILERBASE_STR__=10.5.6.1181
|
||||
-D__UNICODE_SOURCE_SUPPORTED__=1
|
||||
-D__VTABLE_MEM__=
|
||||
-D__PRAGMA_REDEFINE_EXTNAME=1
|
||||
-D__STDC__=1
|
||||
-D__STDC_VERSION__=201710L
|
||||
-D__STDC_NO_VLA__=1
|
||||
-D__STDC_NO_ATOMICS__=1
|
||||
-D__STDC_UTF_16__=1
|
||||
-D__STDC_UTF_32__=1
|
||||
-D__STDC_LIB_EXT1__=201112L
|
||||
-D__STDC_NO_THREADS__=1
|
||||
-D__STDC_ISO_10646__=201103L
|
||||
-D__STDC_HOSTED__=1
|
||||
-D__EDG_IA64_ABI=1
|
||||
-D__EDG_IA64_ABI_VARIANT_CTORS_AND_DTORS_RETURN_THIS=1
|
||||
-D__EDG_IA64_ABI_USE_INT_STATIC_INIT_GUARD=1
|
||||
-D__cpp_hex_float=201603L
|
||||
-D__cpp_unicode_literals=200710L
|
||||
-D__cpp_static_assert=200410L
|
||||
-D__EDG__=1
|
||||
-D__EDG_VERSION__=500
|
||||
-D__EDG_SIZE_TYPE__=unsigned int
|
||||
-D__EDG_PTRDIFF_TYPE__=int
|
||||
-D__EDG_DELTA_TYPE=int
|
||||
-D__EDG_IA64_VTABLE_ENTRY_TYPE=int
|
||||
-D__EDG_VIRTUAL_FUNCTION_INDEX_TYPE=unsigned short
|
||||
-D__EDG_LOWER_VARIABLE_LENGTH_ARRAYS=1
|
||||
-D__EDG_IA64_ABI_USE_VARIANT_ARRAY_COOKIES=1
|
||||
-D__EDG_ABI_COMPATIBILITY_VERSION=9999
|
||||
-D__EDG_ABI_CHANGES_FOR_RTTI=1
|
||||
-D__EDG_ABI_CHANGES_FOR_ARRAY_NEW_AND_DELETE=1
|
||||
-D__EDG_ABI_CHANGES_FOR_PLACEMENT_DELETE=1
|
||||
-D__EDG_BSD=0
|
||||
-D__EDG_SYSV=0
|
||||
-D__EDG_ANSIC=1
|
||||
-D__EDG_CPP11_IL_EXTENSIONS_SUPPORTED=1
|
||||
-D__EDG_FLOAT80_ENABLING_POSSIBLE=0
|
||||
-D__EDG_FLOAT128_ENABLING_POSSIBLE=0
|
||||
-D__EDG_INT128_EXTENSIONS_ALLOWED=0
|
||||
-DDEBUG=1
|
||||
-DCPU_LPC51U68JBD64=1
|
||||
-D_DLIB_CONFIG_FILE_HEADER_NAME="C:\\Program Files (x86)\\IAR Systems\\Embedded Workbench 8.3\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D_DLIB_CONFIG_FILE_STRING="C:\\Program Files (x86)\\IAR Systems\\Embedded Workbench 8.3\\arm\\inc\\c\\DLib_Config_Normal.h"
|
||||
-D__VERSION__="IAR ANSI C/C++ Compiler V8.40.2.214/W32 for ARM"
|
||||
-D_VA_DEFINED=
|
||||
-D_VA_LIST=struct __va_list
|
||||
-D__ICCARM_OLD_DEFINED_VAARGS__=1
|
||||
-D__VA_STACK_ALIGN__=8
|
||||
-D__CODE_MEMORY_LIST1__()=__CODE_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_MEMORY_LIST2__(_P1)=__CODE_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_MEMORY_LIST3__(_P1,_P2)=__CODE_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEMORY_LIST1__()=__DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_MEMORY_LIST2__(_P1)=__DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_MEMORY_LIST3__(_P1,_P2)=__DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__CODE_PTR_MEMORY_LIST1__()=__CODE_PTR_MEM_HELPER1__(__code, 0 )
|
||||
-D__CODE_PTR_MEMORY_LIST2__(_P1)=__CODE_PTR_MEM_HELPER2__(__code, 0 , _P1 )
|
||||
-D__CODE_PTR_MEMORY_LIST3__(_P1,_P2)=__CODE_PTR_MEM_HELPER3__(__code, 0 , _P1 , _P2 )
|
||||
-D__DATA_PTR_MEMORY_LIST1__()=__DATA_PTR_MEM_HELPER1__(__data, 0 )
|
||||
-D__DATA_PTR_MEMORY_LIST2__(_P1)=__DATA_PTR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__DATA_PTR_MEMORY_LIST3__(_P1,_P2)=__DATA_PTR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VAR_MEMORY_LIST1__()=__VAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__VAR_MEMORY_LIST2__(_P1)=__VAR_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__VAR_MEMORY_LIST3__(_P1,_P2)=__VAR_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__VARD_MEMORY_LIST1__()=__VARD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAP_MEMORY_LIST1__()=__HEAP_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAP_MEMORY_LIST2__(_P1)=__HEAP_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__HEAP_MEMORY_LIST3__(_P1,_P2)=__HEAP_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__HVAR_MEMORY_LIST1__()=__HVAR_MEM_HELPER1__(__data, 0 )
|
||||
-D__HEAPD_MEMORY_LIST1__()=__HEAPD_MEM_HELPER1__(__data, 0, _ )
|
||||
-D__HEAPU_MEMORY_LIST1__()=__HEAPU_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPM_DATA_MEMORY_LIST1__()=
|
||||
-D__TOPM_DATA_MEMORY_LIST2__(_P1)=
|
||||
-D__TOPM_DATA_MEMORY_LIST3__(_P1,_P2)=
|
||||
-D__TOPP_DATA_MEMORY_LIST1__()=__TOPP_DATA_MEM_HELPER1__(__data, 0 )
|
||||
-D__TOPP_DATA_MEMORY_LIST2__(_P1)=__TOPP_DATA_MEM_HELPER2__(__data, 0 , _P1 )
|
||||
-D__TOPP_DATA_MEMORY_LIST3__(_P1,_P2)=__TOPP_DATA_MEM_HELPER3__(__data, 0 , _P1 , _P2 )
|
||||
-D__DATA_MEM0_SIZE_TYPE__=unsigned int
|
||||
-D__DATA_MEM0_INDEX_TYPE__=signed int
|
||||
-D__iar_fp2bits32(x)=0
|
||||
-D__iar_fp2bits64(x)=0
|
||||
-D__iar_fpgethi64(x)=0
|
||||
-D__iar_atomic_add_fetch(x,y,z)=0
|
||||
-D__iar_atomic_sub_fetch(x,y,z)=0
|
||||
-D__iar_atomic_load(x,y)=0ULL
|
||||
-D__iar_atomic_compare_exchange_weak(a,b,c,d,e)=0
|
||||
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Reference in New Issue
Block a user