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Update the CM3 MPU port so it builds with the changes made to enable the FreeRTOS+Trace tool.

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This commit is contained in:
Richard Barry 2012-04-02 18:33:46 +00:00
parent 892d28f2c4
commit 83d5097ed2
2 changed files with 41 additions and 41 deletions
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2
Source/include/mpu_wrappers.h
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@ -88,7 +88,7 @@ only for ports that are using the MPU. */
#define xTaskGetCurrentTaskHandle MPU_xTaskGetCurrentTaskHandle
#define xTaskGetSchedulerState MPU_xTaskGetSchedulerState
#define xQueueCreate MPU_xQueueCreate
#define xQueueGenericCreate MPU_xQueueGenericCreate
#define xQueueCreateMutex MPU_xQueueCreateMutex
#define xQueueGiveMutexRecursive MPU_xQueueGiveMutexRecursive
#define xQueueTakeMutexRecursive MPU_xQueueTakeMutexRecursive

80
Source/portable/GCC/ARM_CM3_MPU/port.c
View File

@ -1,6 +1,6 @@
/*
FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
@ -123,14 +123,14 @@ static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
*/
static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
/*
/*
* Return the smallest MPU region size that a given number of bytes will fit
* into. The region size is returned as the value that should be programmed
* into the region attribute register for that region.
*/
static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes ) PRIVILEGED_FUNCTION;
/*
/*
* Checks to see if being called from the context of an unprivileged task, and
* if so raises the privilege level and returns false - otherwise does nothing
* other than return true.
@ -182,7 +182,7 @@ portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParam
unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask );
xTaskHandle MPU_xTaskGetCurrentTaskHandle( void );
portBASE_TYPE MPU_xTaskGetSchedulerState( void );
xQueueHandle MPU_xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize );
xQueueHandle MPU_xQueueGenericCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize, unsigned char ucQueueType );
signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition );
unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue );
signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking );
@ -233,7 +233,7 @@ portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE
void vPortSVCHandler( void )
{
/* Assumes psp was in use. */
__asm volatile
__asm volatile
(
#ifndef USE_PROCESS_STACK /* Code should not be required if a main() is using the process stack. */
" tst lr, #4 \n"
@ -269,7 +269,7 @@ unsigned char ucSVCNumber;
case portSVC_YIELD : *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
break;
case portSVC_RAISE_PRIVILEGE : __asm volatile
case portSVC_RAISE_PRIVILEGE : __asm volatile
(
" mrs r1, control \n" /* Obtain current control value. */
" bic r1, #1 \n" /* Set privilege bit. */
@ -286,7 +286,7 @@ unsigned char ucSVCNumber;
static void prvRestoreContextOfFirstTask( void )
{
__asm volatile
__asm volatile
(
" ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */
" ldr r0, [r0] \n"
@ -457,14 +457,14 @@ extern unsigned long __privileged_data_end__[];
/* First setup the entire flash for unprivileged read only access. */
*portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */
( portMPU_REGION_VALID ) |
( portUNPRIVILEGED_FLASH_REGION );
( portUNPRIVILEGED_FLASH_REGION );
*portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_ONLY ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
( prvGetMPURegionSizeSetting( ( unsigned long ) __FLASH_segment_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |
( portMPU_REGION_ENABLE );
/* Setup the first 16K for privileged only access (even though less
/* Setup the first 16K for privileged only access (even though less
than 10K is actually being used). This is where the kernel code is
placed. */
*portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */
@ -472,8 +472,8 @@ extern unsigned long __privileged_data_end__[];
( portPRIVILEGED_FLASH_REGION );
*portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
( prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_functions_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
( prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_functions_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |
( portMPU_REGION_ENABLE );
/* Setup the privileged data RAM region. This is where the kernel data
@ -491,7 +491,7 @@ extern unsigned long __privileged_data_end__[];
system peripherals and registers are protected. */
*portMPU_REGION_BASE_ADDRESS = ( portPERIPHERALS_START_ADDRESS ) |
( portMPU_REGION_VALID ) |
( portGENERAL_PERIPHERALS_REGION );
( portGENERAL_PERIPHERALS_REGION );
*portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |
( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |
@ -533,7 +533,7 @@ unsigned long ulRegionSize, ulReturnValue = 4;
static portBASE_TYPE prvRaisePrivilege( void )
{
__asm volatile
(
(
" mrs r0, control \n"
" tst r0, #1 \n" /* Is the task running privileged? */
" itte ne \n"
@ -541,7 +541,7 @@ static portBASE_TYPE prvRaisePrivilege( void )
" svcne %0 \n" /* Switch to privileged. */
" moveq r0, #1 \n" /* CONTROL[0]==0, return true. */
" bx lr \n"
:: "i" (portSVC_RAISE_PRIVILEGE) : "r0"
:: "i" (portSVC_RAISE_PRIVILEGE) : "r0"
);
return 0;
@ -560,34 +560,34 @@ unsigned long ul;
if( xRegions == NULL )
{
/* No MPU regions are specified so allow access to all RAM. */
xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
( ( unsigned long ) __SRAM_segment_start__ ) | /* Base address. */
( portMPU_REGION_VALID ) |
( portSTACK_REGION );
xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
( portMPU_REGION_READ_WRITE ) |
xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
( portMPU_REGION_READ_WRITE ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
( prvGetMPURegionSizeSetting( ( unsigned long ) __SRAM_segment_end__ - ( unsigned long ) __SRAM_segment_start__ ) ) |
( portMPU_REGION_ENABLE );
/* Re-instate the privileged only RAM region as xRegion[ 0 ] will have
just removed the privileged only parameters. */
xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =
xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =
( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */
( portMPU_REGION_VALID ) |
( portSTACK_REGION + 1 );
xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |
( portMPU_REGION_ENABLE );
/* Invalidate all other regions. */
for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
{
xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
{
xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
}
}
@ -600,12 +600,12 @@ unsigned long ul;
if( usStackDepth > 0 )
{
/* Define the region that allows access to the stack. */
xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
( ( unsigned long ) pxBottomOfStack ) |
xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
( ( unsigned long ) pxBottomOfStack ) |
( portMPU_REGION_VALID ) |
( portSTACK_REGION ); /* Region number. */
xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
( portMPU_REGION_READ_WRITE ) | /* Read and write. */
( prvGetMPURegionSizeSetting( ( unsigned long ) usStackDepth * ( unsigned long ) sizeof( portSTACK_TYPE ) ) ) |
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
@ -618,23 +618,23 @@ unsigned long ul;
{
if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )
{
/* Translate the generic region definition contained in
xRegions into the CM3 specific MPU settings that are then
/* Translate the generic region definition contained in
xRegions into the CM3 specific MPU settings that are then
stored in xMPUSettings. */
xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) |
xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) |
( portMPU_REGION_VALID ) |
( portSTACK_REGION + ul ); /* Region number. */
xMPUSettings->xRegion[ ul ].ulRegionAttribute =
( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
( xRegions[ lIndex ].ulParameters ) |
( portMPU_REGION_ENABLE );
xMPUSettings->xRegion[ ul ].ulRegionAttribute =
( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
( xRegions[ lIndex ].ulParameters ) |
( portMPU_REGION_ENABLE );
}
else
{
/* Invalidate the region. */
xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
}
@ -802,7 +802,7 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
void MPU_vTaskList( signed char *pcWriteBuffer )
{
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
vTaskList( pcWriteBuffer );
portRESET_PRIVILEGE( xRunningPrivileged );
}
@ -920,12 +920,12 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
#endif
/*-----------------------------------------------------------*/
xQueueHandle MPU_xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize )
xQueueHandle MPU_xQueueGenericCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize, unsigned char ucQueueType )
{
xQueueHandle xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
xReturn = xQueueCreate( uxQueueLength, uxItemSize );
xReturn = xQueueGenericCreate( uxQueueLength, uxItemSize, ucQueueType );
portRESET_PRIVILEGE( xRunningPrivileged );
return xReturn;
}
@ -970,7 +970,7 @@ signed portBASE_TYPE xReturn;
xQueueHandle xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
xReturn = xQueueCreateMutex();
xReturn = xQueueCreateMutex( queueQUEUE_TYPE_MUTEX );
portRESET_PRIVILEGE( xRunningPrivileged );
return xReturn;
}
@ -983,7 +983,7 @@ signed portBASE_TYPE xReturn;
xQueueHandle xReturn;
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
xReturn = xQueueHandle xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );
xReturn = xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );
portRESET_PRIVILEGE( xRunningPrivileged );
return xReturn;
}
@ -1095,7 +1095,7 @@ portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
xReturn = xPortGetFreeHeapSize();
portRESET_PRIVILEGE( xRunningPrivileged );
return xReturn;
}