Split out the processor dependent stuff from main.c.
This commit is contained in:
Richard Barry
parent
f622836e18
commit
42d07bc94b
128
Demo/NEC_V850ES_Fx3_IAR/LowLevelInit/LowLevelInit_Fx3.c
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128
Demo/NEC_V850ES_Fx3_IAR/LowLevelInit/LowLevelInit_Fx3.c
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/*
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FreeRTOS.org V5.1.1 - Copyright (C) 2003-2008 Richard Barry.
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This file is part of the FreeRTOS.org distribution.
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FreeRTOS.org is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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FreeRTOS.org is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FreeRTOS.org; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes FreeRTOS.org, without being obliged to provide
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the source code for any proprietary components. See the licensing section
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of http://www.FreeRTOS.org for full details of how and when the exception
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can be applied.
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***************************************************************************
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***************************************************************************
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* *
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* SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
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* and even write all or part of your application on your behalf. *
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* See http://www.OpenRTOS.com for details of the services we provide to *
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* expedite your project. *
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* *
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***************************************************************************
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***************************************************************************
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Please ensure to read the configuration and relevant port sections of the
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online documentation.
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http://www.FreeRTOS.org - Documentation, latest information, license and
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contact details.
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http://www.SafeRTOS.com - A version that is certified for use in safety
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critical systems.
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http://www.OpenRTOS.com - Commercial support, development, porting,
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licensing and training services.
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*/
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#include "FreeRTOS.h"
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/*-----------------------------------------------------------*/
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/* Called by the startup code to initialise the run time system. */
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unsigned portCHAR __low_level_init(void);
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/*-----------------------------------------------------------*/
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unsigned portCHAR __low_level_init(void)
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{
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unsigned portCHAR resetflag = RESF;
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unsigned portCHAR psval = 0;
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/* Setup provided by NEC. */
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/* Disable global interrupts to ensure no interrupts occur during system
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setup. */
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portDISABLE_INTERRUPTS();
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PRCMD = 0x00;
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OCDM = 0x00;
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VSWC = 0x12;
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VSWC = 18;
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/* Set main system clock */
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OSTS = 0x06;
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psval = 0x80;
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PRCMD = psval;
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PCC = psval;
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while (!OSTC)
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{
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;
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}
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PLLS = 0x03;
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PLLON = 1;
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while (LOCKR)
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{
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;
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}
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psval = 0x01;
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PRCMD = psval;
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MCM = psval;
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SELPLL = 1;
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/* Set fCPU */
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psval = PCC | 0x00;
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PRCMD = psval;
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PCC = psval;
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RCM = 0x83;
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/* Set fXP1 */
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SELCNT4 = 0x00;
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/* Set fBRG */
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PRSM0 = 0x00;
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/* Stand-by setting */
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psval = 0x00;
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PRCMD = psval;
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PSC = psval;
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/* WDT2 setting */
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WDTM2 = 0x1F;
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/* PCL setting */
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PCLM = 0x00;
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/* disable dma0 - dma3 */
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E00 = 0;
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E11 = 0;
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E22 = 0;
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E33 = 0;
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return pdTRUE;
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}
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/*-----------------------------------------------------------*/
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99
Demo/NEC_V850ES_Fx3_IAR/LowLevelInit/LowLevelInit_Jx3.c
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99
Demo/NEC_V850ES_Fx3_IAR/LowLevelInit/LowLevelInit_Jx3.c
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@ -0,0 +1,99 @@
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/*
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FreeRTOS.org V5.1.1 - Copyright (C) 2003-2008 Richard Barry.
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This file is part of the FreeRTOS.org distribution.
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|
||||
FreeRTOS.org is free software; you can redistribute it and/or modify
|
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it under the terms of the GNU General Public License as published by
|
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the Free Software Foundation; either version 2 of the License, or
|
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(at your option) any later version.
|
||||
|
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FreeRTOS.org is distributed in the hope that it will be useful,
|
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but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
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along with FreeRTOS.org; if not, write to the Free Software
|
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
|
||||
A special exception to the GPL can be applied should you wish to distribute
|
||||
a combined work that includes FreeRTOS.org, without being obliged to provide
|
||||
the source code for any proprietary components. See the licensing section
|
||||
of http://www.FreeRTOS.org for full details of how and when the exception
|
||||
can be applied.
|
||||
|
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***************************************************************************
|
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***************************************************************************
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* *
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* SAVE TIME AND MONEY! We can port FreeRTOS.org to your own hardware, *
|
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* and even write all or part of your application on your behalf. *
|
||||
* See http://www.OpenRTOS.com for details of the services we provide to *
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* expedite your project. *
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* *
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***************************************************************************
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***************************************************************************
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Please ensure to read the configuration and relevant port sections of the
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online documentation.
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|
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http://www.FreeRTOS.org - Documentation, latest information, license and
|
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contact details.
|
||||
|
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http://www.SafeRTOS.com - A version that is certified for use in safety
|
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critical systems.
|
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|
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http://www.OpenRTOS.com - Commercial support, development, porting,
|
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licensing and training services.
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*/
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#include "FreeRTOS.h"
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/*-----------------------------------------------------------*/
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/* Called by the startup code to initialise the run time system. */
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unsigned portCHAR __low_level_init(void);
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/*-----------------------------------------------------------*/
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unsigned portCHAR __low_level_init(void)
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{
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unsigned portCHAR resetflag = RESF;
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unsigned portCHAR psval = 0;
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unsigned portBASE_TYPE i = 0;
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/* Setup provided by NEC. */
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portDISABLE_INTERRUPTS(); /* disable global interrupts */
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PRCMD = 0x00; /* On-chip debug mode */
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OCDM = 0x00;
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VSWC = 0x00; /* set system wait control register */
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WDTM2 = 0x00; /* WDT2 setting */
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PLLON = 0; /* PLL stop mode */
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psval = 0x0A | 0x00;
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PRCMD = psval; /* set Command Register */
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CKC = psval; /* set Clock Control Register */
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PLLS = 0x03;
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psval = 0x80; /* Set fXX and fCPU */
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PRCMD = psval;
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PCC = psval;
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PLLON = 1; /* activate PLL */
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for( i = 0; i <= 2000; i++ ) /* Wait for stabilisation */
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{
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portNOP();
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}
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while( LOCK ) /* Wait for PLL frequency stabiliasation */
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{
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;
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}
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SELPLL = 1; /* Set PLL mode active */
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RSTOP = 0; /* Set fR (enable) */
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BGCE0 = 0; /* Set fBRG(disable) */
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psval = 0x00; /* Stand-by setting */
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PRCMD = psval; /* set Command Register */
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PSC = psval; /* set Power Save Control Register */
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return pdTRUE;
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}
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/*-----------------------------------------------------------*/
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