Starting point for YRDK RX63N demo.

This commit is contained in:
Richard Barry 2012-04-18 08:40:34 +00:00
parent 0cf8643863
commit 3bc093f562
51 changed files with 29335 additions and 0 deletions

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/*
FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/* Board specifics. */
#include "rskrx63ndef.h"
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
#define configUSE_PREEMPTION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( ICLK_FREQUENCY ) /* Set in rskrx62ndef.h. */
#define configPERIPHERAL_CLOCK_HZ ( PCLK_FREQUENCY ) /* Set in rskrx62ndef.h. */
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 140 )
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 50 * 1024 ) )
#define configMAX_TASK_NAME_LEN ( 12 )
#define configUSE_TRACE_FACILITY 1
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_CO_ROUTINES 0
#define configUSE_MUTEXES 1
#define configGENERATE_RUN_TIME_STATS 1
#define configCHECK_FOR_STACK_OVERFLOW 2
#define configUSE_RECURSIVE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 0
#define configUSE_MALLOC_FAILED_HOOK 1
#define configUSE_APPLICATION_TASK_TAG 0
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 7 )
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Software timer definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY ( 3 )
#define configTIMER_QUEUE_LENGTH 5
#define configTIMER_TASK_STACK_DEPTH ( configMINIMAL_STACK_SIZE )
/* The interrupt priority used by the kernel itself for the tick interrupt and
the pended interrupt. This would normally be the lowest priority. */
#define configKERNEL_INTERRUPT_PRIORITY 1
/* The maximum interrupt priority from which FreeRTOS API calls can be made.
Interrupts that use a priority above this will not be effected by anything the
kernel is doing. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4
/* The peripheral used to generate the tick interrupt is configured as part of
the application code. This constant should be set to the vector number of the
peripheral chosen. As supplied this is CMT0. */
#define configTICK_VECTOR _CMT0_CMI0
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_uxTaskGetStackHighWaterMark 1
#define INCLUDE_xTaskGetSchedulerState 1
#define configASSERT( x ) if( ( x ) == 0 ) { taskDISABLE_INTERRUPTS(); for( ;; ); }
extern volatile unsigned long ulHighFrequencyTickCount;
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() nop() /* Run time stats use the same timer as the high frequency timer test. */
#define portGET_RUN_TIME_COUNTER_VALUE() ulHighFrequencyTickCount
/* Override some of the priorities set in the common demo tasks. This is
required to ensure flase positive timing errors are not reported. */
#define bktPRIMARY_PRIORITY ( configMAX_PRIORITIES - 3 )
#define bktSECONDARY_PRIORITY ( configMAX_PRIORITIES - 4 )
#define intqHIGHER_PRIORITY ( configMAX_PRIORITIES - 3 )
/*-----------------------------------------------------------
* Ethernet configuration.
*-----------------------------------------------------------*/
/* MAC address configuration. */
#define configMAC_ADDR0 0x00
#define configMAC_ADDR1 0x12
#define configMAC_ADDR2 0x13
#define configMAC_ADDR3 0x10
#define configMAC_ADDR4 0x15
#define configMAC_ADDR5 0x11
/* IP address configuration. */
#define configIP_ADDR0 192
#define configIP_ADDR1 168
#define configIP_ADDR2 0
#define configIP_ADDR3 200
/* Netmask configuration. */
#define configNET_MASK0 255
#define configNET_MASK1 255
#define configNET_MASK2 255
#define configNET_MASK3 0
#endif /* FREERTOS_CONFIG_H */

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/*
FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
* High frequency timer test as described in main.c.
*/
/* Scheduler includes. */
#include "FreeRTOS.h"
/* Hardware specifics. */
#include "iodefine.h"
/* The set frequency of the interrupt. Deviations from this are measured as
the jitter. */
#define timerINTERRUPT_FREQUENCY ( 20000UL )
/* The expected time between each of the timer interrupts - if the jitter was
zero. */
#define timerEXPECTED_DIFFERENCE_VALUE ( ( unsigned short ) ( ( configPERIPHERAL_CLOCK_HZ / 8UL ) / timerINTERRUPT_FREQUENCY ) )
/* The highest available interrupt priority. */
#define timerHIGHEST_PRIORITY ( 15 )
/* Misc defines. */
#define timerTIMER_3_COUNT_VALUE ( *( ( unsigned short * ) 0x8801a ) ) /*( CMT3.CMCNT )*/
/*-----------------------------------------------------------*/
/* Interrupt handler in which the jitter is measured. */
static void prvTimer2IntHandler( void );
/* Stores the value of the maximum recorded jitter between interrupts. This is
displayed on one of the served web pages. */
volatile unsigned short usMaxJitter = 0;
/* Counts the number of high frequency interrupts - used to generate the run
time stats. */
volatile unsigned long ulHighFrequencyTickCount = 0UL;
/*-----------------------------------------------------------*/
void vSetupHighFrequencyTimer( void )
{
/* Timer CMT2 is used to generate the interrupts, and CMT3 is used
to measure the jitter. */
/* Enable compare match timer 2 and 3. */
MSTP( CMT2 ) = 0;
MSTP( CMT3 ) = 0;
/* Interrupt on compare match. */
CMT2.CMCR.BIT.CMIE = 1;
/* Set the compare match value. */
CMT2.CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / timerINTERRUPT_FREQUENCY ) -1 ) / 8 );
/* Divide the PCLK by 8. */
CMT2.CMCR.BIT.CKS = 0;
CMT3.CMCR.BIT.CKS = 0;
/* Enable the interrupt... */
_IEN( _CMT2_CMI2 ) = 1;
/* ...and set its priority to the maximum possible, this is above the priority
set by configMAX_SYSCALL_INTERRUPT_PRIORITY so will nest. */
_IPR( _CMT2_CMI2 ) = timerHIGHEST_PRIORITY;
/* Start the timers. */
CMT.CMSTR1.BIT.STR2 = 1;
CMT.CMSTR1.BIT.STR3 = 1;
}
/*-----------------------------------------------------------*/
#pragma interrupt ( prvTimer2IntHandler( vect = _VECT( _CMT2_CMI2 ), enable ) )
static void prvTimer2IntHandler( void )
{
volatile unsigned short usCurrentCount;
static unsigned short usMaxCount = 0;
static unsigned long ulErrorCount = 0UL;
/* We use the timer 1 counter value to measure the clock cycles between
the timer 0 interrupts. First stop the clock. */
CMT.CMSTR1.BIT.STR3 = 0;
nop();
nop();
usCurrentCount = timerTIMER_3_COUNT_VALUE;
/* Is this the largest count we have measured yet? */
if( usCurrentCount > usMaxCount )
{
if( usCurrentCount > timerEXPECTED_DIFFERENCE_VALUE )
{
usMaxJitter = usCurrentCount - timerEXPECTED_DIFFERENCE_VALUE;
}
else
{
/* This should not happen! */
ulErrorCount++;
}
usMaxCount = usCurrentCount;
}
/* Used to generate the run time stats. */
ulHighFrequencyTickCount++;
/* Clear the timer. */
timerTIMER_3_COUNT_VALUE = 0;
/* Then start the clock again. */
CMT.CMSTR1.BIT.STR3 = 1;
}

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/*
FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
* This file contains the non-portable and therefore RX62N specific parts of
* the IntQueue standard demo task - namely the configuration of the timers
* that generate the interrupts and the interrupt entry points.
*/
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Demo includes. */
#include "IntQueueTimer.h"
#include "IntQueue.h"
/* Hardware specifics. */
#include "iodefine.h"
#define tmrTIMER_0_1_FREQUENCY ( 2000UL )
#define tmrTIMER_2_3_FREQUENCY ( 2001UL )
void vInitialiseTimerForIntQueueTest( void )
{
/* Ensure interrupts do not start until full configuration is complete. */
portENTER_CRITICAL();
{
/* Cascade two 8bit timer channels to generate the interrupts.
8bit timer unit 1 (TMR0 and TMR1) and 8bit timer unit 2 (TMR2 and TMR3 are
utilised for this test. */
/* Enable the timers. */
SYSTEM.MSTPCRA.BIT.MSTPA5 = 0;
SYSTEM.MSTPCRA.BIT.MSTPA4 = 0;
/* Enable compare match A interrupt request. */
TMR0.TCR.BIT.CMIEA = 1;
TMR2.TCR.BIT.CMIEA = 1;
/* Clear the timer on compare match A. */
TMR0.TCR.BIT.CCLR = 1;
TMR2.TCR.BIT.CCLR = 1;
/* Set the compare match value. */
TMR01.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
TMR23.TCORA = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / tmrTIMER_0_1_FREQUENCY ) -1 ) / 8 );
/* 16 bit operation ( count from timer 1,2 ). */
TMR0.TCCR.BIT.CSS = 3;
TMR2.TCCR.BIT.CSS = 3;
/* Use PCLK as the input. */
TMR1.TCCR.BIT.CSS = 1;
TMR3.TCCR.BIT.CSS = 1;
/* Divide PCLK by 8. */
TMR1.TCCR.BIT.CKS = 2;
TMR3.TCCR.BIT.CKS = 2;
/* Enable TMR 0, 2 interrupts. */
IEN( TMR0, CMIA0 ) = 1;
IEN( TMR2, CMIA2 ) = 1;
/* Set the timer interrupts to be above the kernel. The interrupts are
assigned different priorities so they nest with each other. */
IPR( TMR0, CMIA0 ) = configMAX_SYSCALL_INTERRUPT_PRIORITY - 1;
IPR( TMR2, CMIA2 ) = ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 2 );
}
portEXIT_CRITICAL();
/* Ensure the interrupts are clear as they are edge detected. */
IR( TMR0, CMIA0 ) = 0;
IR( TMR2, CMIA2 ) = 0;
}
/*-----------------------------------------------------------*/
#pragma interrupt ( vT0_1InterruptHandler( vect = VECT_TMR0_CMIA0, enable ) )
void vT0_1InterruptHandler( void )
{
portYIELD_FROM_ISR( xFirstTimerHandler() );
}
/*-----------------------------------------------------------*/
#pragma interrupt ( vT2_3InterruptHandler( vect = VECT_TMR2_CMIA2, enable ) )
void vT2_3InterruptHandler( void )
{
portYIELD_FROM_ISR( xSecondTimerHandler() );
}

View File

@ -0,0 +1,183 @@
/*
FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*-----------------------------------------------------------
* Simple IO routines to control the LEDs.
*-----------------------------------------------------------*/
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
/* Demo includes. */
#include "partest.h"
/* Hardware specifics. */
#include "iodefine.h"
#define partestNUM_LEDS ( 4 )
long lParTestGetLEDState( unsigned long ulLED );
/*-----------------------------------------------------------*/
void vParTestInitialise( void )
{
/* Port pin configuration is done by the low level set up prior to this
function being called. */
}
/*-----------------------------------------------------------*/
void vParTestSetLED( unsigned long ulLED, signed long xValue )
{
if( ulLED < partestNUM_LEDS )
{
if( xValue != 0 )
{
/* Turn the LED on. */
taskENTER_CRITICAL();
{
switch( ulLED )
{
case 0: LED0 = LED_ON;
break;
case 1: LED1 = LED_ON;
break;
case 2: LED2 = LED_ON;
break;
case 3: LED3 = LED_ON;
break;
}
}
taskEXIT_CRITICAL();
}
else
{
/* Turn the LED off. */
taskENTER_CRITICAL();
{
switch( ulLED )
{
case 0: LED0 = LED_OFF;
break;
case 1: LED1 = LED_OFF;
break;
case 2: LED2 = LED_OFF;
break;
case 3: LED3 = LED_OFF;
break;
}
}
taskEXIT_CRITICAL();
}
}
}
/*-----------------------------------------------------------*/
void vParTestToggleLED( unsigned long ulLED )
{
if( ulLED < partestNUM_LEDS )
{
taskENTER_CRITICAL();
{
if( lParTestGetLEDState( ulLED ) != 0x00 )
{
vParTestSetLED( ulLED, 0 );
}
else
{
vParTestSetLED( ulLED, 1 );
}
}
taskEXIT_CRITICAL();
}
}
/*-----------------------------------------------------------*/
long lParTestGetLEDState( unsigned long ulLED )
{
long lReturn = pdTRUE;
if( ulLED < partestNUM_LEDS )
{
switch( ulLED )
{
case 0 : if( LED0 != 0 )
{
lReturn = pdFALSE;
}
break;
case 1 : if( LED1 != 0 )
{
lReturn = pdFALSE;
}
break;
case 2 : if( LED2 != 0 )
{
lReturn = pdFALSE;
}
break;
case 3 : if( LED3 != 0 )
{
lReturn = pdFALSE;
}
break;
}
}
return lReturn;
}
/*-----------------------------------------------------------*/

View File

@ -0,0 +1,234 @@
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[OPTIONS_Blinky_Renesas RX C/C++ Library Generator]
"Single Shot" "00a669f6bf10dc10" 1
[OPTIONS_Blinky_Renesas RX Configurator]
"Single Shot" "0dfd884a4540dc10" 6
[OPTIONS_Blinky]
"" 0
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" 1
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[OPTIONS_Debug_Renesas OptLinker]
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[OPTIONS_Debug_Renesas RX Assembler]
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[OPTIONS_Debug_Renesas RX C/C++ Compiler]
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[OPTIONS_Debug_Renesas RX Configurator]
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" 3
"[V|VERSION|1] [S|MODE|BUILD/CHANGED] [S|EXISTOUTPUTPATH|^"$(CONFIGDIR)\$(PROJECTNAME).lib^"] [B|RUNTIME|1] [B|MATH|1] [B|STDIO|1] [B|STDLIB|1] [B|STRING|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(PROJECTNAME).lib^"] [B|SIZE|1] [I|INLINE|100] [I|LOOP|2] [S|CPU|RX600] [S|BASE|00000000=NONE]
" 1
"[V|VERSION|6] [S|PRELINK|SKIP] [S|FORM|STYPE] [S|BYTE_COUNT_VALUE|FF] [B|DEBUG|1] [S|ROM|(D,R)|(D_1,R_1)|(D_2,R_2)] [S|CRC|NONE|DEFAULT|00000000] [B|LIST|1] [S|LIST|^"$(CONFIGDIR)\$(PROJECTNAME).map^"] [S|SHOW|METHODALL|SYMBOL|REFERENCE|XREFERENCE] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).mot^"] [I|SPACE|^"FF^"] [B|OPTIMIZE|0] [S|START|B_RX_DESC,B_TX_DESC,B_ETHERNET_BUFFERS,B_1,R_1,B_2,R_2,B,R,SU,SI(01000)|PResetPRG(0FFF80000)|C_1,C_2,C,L*,C$*,D*,P,PIntPRG,W*(0FFF81000)|FIXEDVECT(0FFFFFFD0)] [S|MEMORY|HIGH]
" 5
[EXCLUDED_FILES_Debug]
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX63N-RDK_Renesas\RTOSDemo\main-blinky.c"
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX63N-RDK_Renesas\RTOSDemo\Renesas-Files\lowlvl.src"
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX63N-RDK_Renesas\RTOSDemo\Renesas-Files\lowsrc.c"
[LINKAGE_ORDER_Debug]
[GENERAL_DATA_CONFIGURATION_Debug]
[OPTIONS_Debug_with_optimisation_Renesas OptLinker]
"Single Shot" "05011f85f540dc10" 5
[OPTIONS_Debug_with_optimisation_Renesas RX Assembler]
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"C:\E\Dev\FreeRTOS\WorkingCopy\Source\portable\Renesas\RX600\port_asm.src" "0f42b9f6bf10dc10" 4
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"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\Minimal\death.c" "0f42b9f6bf10dc10" 2
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"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\Common\ethernet\FreeTCPIP\apps\httpd\http-strings.c" "005cfa364540dc10" 2
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"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX63N-RDK_Renesas\RTOSDemo\webserver\httpd-cgi.c" "06576eb24540dc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX63N-RDK_Renesas\RTOSDemo\webserver\phy.c" "06576eb24540dc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\list.c" "0f42b9f6bf10dc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\portable\MemMang\heap_2.c" "0f42b9f6bf10dc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\portable\Renesas\RX600\port.c" "0f42b9f6bf10dc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\queue.c" "0f42b9f6bf10dc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\tasks.c" "0f42b9f6bf10dc10" 2
"C:\E\Dev\FreeRTOS\WorkingCopy\Source\timers.c" "0f42b9f6bf10dc10" 2
[OPTIONS_Debug_with_optimisation_Renesas RX C/C++ Library Generator]
"Single Shot" "0f42b9f6bf10dc10" 1
[OPTIONS_Debug_with_optimisation_Renesas RX Configurator]
"Single Shot" "0dfd884a4540dc10" 6
[OPTIONS_Debug_with_optimisation]
"" 0
"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON4] [S|OUTPUTPATH|^"$(CONFIGDIR)^"] [S|CPU|RX600] [S|ENDIAN|LITTLE] [S|FINT_REGISTER|0]" 6
"[V|VERSION|1] [B|SJIS|1] [B|DEBUG|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).obj^"] [S|CPU|RX600] [S|BASE|00000000=NONE] [B|SKIPDEPENDENCY|1]
" 4
"[V|VERSION|1] [S|LANG|CPP] [B|SJIS|1] [S|INCLUDE|^"$(PROJDIR)\..\..\..\Source\portable\Renesas\RX600^"|^"$(PROJDIR)\..\..\..\Source\include^"|^"$(PROJDIR)\.^"|^"$(PROJDIR)\..\..\include^"|^"$(PROJDIR)\..\..\Common\include^"|^"$(PROJDIR)\.\include^"|^"$(PROJDIR)\..\..\Common\ethernet\FreeTCPIP^"|^"$(PROJDIR)\webserver^"] [S|DEFINE|INCLUDE_HIGH_FREQUENCY_TIMER_TEST=1] [S|CHANGE_MESSAGE|INFORMATION|] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).obj^"] [B|DEBUG|1] [B|LISTFILE|1] [S|LISTFILEPATH|^"$(CONFIGDIR)\$(FILELEAF).lst^"] [S|SHOW|SOURCE|CONDITIONALS|DEFINITIONS|EXPANSIONS] [S|OPTIMIZE|MAX] [B|SIZE|1] [B|MAP|0] [I|INLINE|100] [I|LOOP|2] [B|FPU|0] [S|MISRA2004_CHECK_RULE|ALL] [S|MISRA2004_RULE|1.1|3.4|4.1|5.2|5.3|5.4|5.5|5.6|5.7|6.1|6.2|6.3|6.4|6.5|7.1|8.1|8.2|8.3|8.5|8.6|8.7|8.8|8.11|8.12|9.2|9.3|10.1|10.2|10.3|10.4|10.5|10.6|11.1|11.2|11.3|11.4|11.5|12.1|12.2|12.3|12.4|12.5|12.6|12.7|12.8|12.9|12.10|12.11|12.12|12.13|13.1|13.2|13.3|13.4|13.7|14.1|14.2|14.3|14.4|14.5|14.6|14.7|14.8|14.9|14.10|15.1|15.2|15.3|15.4|15.5|16.1|16.2|16.3|16.4|16.5|16.6|16.8|16.9|17.3|17.4|17.5|17.6|18.1|18.2|18.4|19.1|20.2|20.4|20.5|20.7|20.8|20.9|20.10|20.11|20.12] [S|MISRA1998_CHECK_RULE|ALL] [S|MISRA1998_RULE|1|5|8|12|13|14|17|18|19|20|21|22|24|28|29|31|32|33|34|35|36|37|38|39|40|42|43|44|45|46|48|49|50|51|53|54|55|56|57|58|59|60|61|62|63|64|65|68|69|70|71|72|73|74|75|76|77|78|79|80|82|83|84|85|99|101|102|103|104|105|106|108|110|111|112|113|115|118|119|121|122|123|124|125|126|127] [S|MISRA_GROUP_FILE_PATH|^"$(PROJDIR)\$(PROJECTNAME).rde^"] [S|CPU|RX600] [S|BASE|00000000=NONE] [I|PID|16] [B|SKIPDEPENDENCY|1] [N|DEPENDSCAN|1]
" 3
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" 2
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" 1
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" 5
[EXCLUDED_FILES_Debug_with_optimisation]
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX63N-RDK_Renesas\RTOSDemo\main-blinky.c"
[LINKAGE_ORDER_Debug_with_optimisation]
[GENERAL_DATA_CONFIGURATION_Debug_with_optimisation]
[GENERAL_DATA_CONFIGURATION_SESSION_Blinky_RDK_Jlink]
[SESSION_DATA_CONFIGURATION_SESSION_Blinky_RDK_Jlink]
"MEMORY_MAPPING_OPTIONS" ""
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RDK_Jlink]
[SESSION_DATA_CONFIGURATION_SESSION_Debug_RDK_Jlink]
"MEMORY_MAPPING_OPTIONS" ""
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_with_optimisation_RDK_Jlink]
[SESSION_DATA_CONFIGURATION_SESSION_Debug_with_optimisation_RDK_Jlink]
"MEMORY_MAPPING_OPTIONS" ""
[EXT_DEBUGGER_INFO]
0 "" "" "" ""
[END]

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@ -0,0 +1,33 @@
[HIMDBVersion]
2.0
[DATABASE_VERSION]
"1.1"
[SESSIONS_]
"RDK_Jlink"
[CONFIGURATIONS]
"Blinky"
"Debug"
"Debug_with_optimisation"
[CURRENT_CONFIGURATION]
"Blinky"
[CURRENT_SESSION]
"RDK_Jlink"
[GENERAL_DATA_PROJECT]
"FDT_UserBootAreaFiles" ""
[GENERAL_DATA_CONFIGURATION_Blinky]
"PROJECT_FILES_MODIFIED_DATA_TAG" "FALSE"
[SESSIONS_Blinky]
"RDK_Jlink"
[GENERAL_DATA_CONFIGURATION_Debug]
"PROJECT_FILES_MODIFIED_DATA_TAG" "FALSE"
[SESSIONS_Debug]
"RDK_Jlink"
[GENERAL_DATA_CONFIGURATION_Debug_with_optimisation]
"PROJECT_FILES_MODIFIED_DATA_TAG" "FALSE"
[SESSIONS_Debug_with_optimisation]
"RDK_Jlink"
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_with_optimisation_RDK_Jlink]
[GENERAL_DATA_SESSION_RDK_Jlink]
[GENERAL_DATA_CONFIGURATION_SESSION_Blinky_RDK_Jlink]
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_RDK_Jlink]
[END]

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@ -0,0 +1,66 @@
/***********************************************************************/
/* */
/* FILE :dbsct.c */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Setting of B,R Section */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX
*
* File Name : dbsct.c
*
* Abstract : Setting of B,R Section.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
#include "typedefine.h"
#pragma unpack
#pragma section C C$DSEC
extern const struct {
_UBYTE *rom_s; /* Start address of the initialized data section in ROM */
_UBYTE *rom_e; /* End address of the initialized data section in ROM */
_UBYTE *ram_s; /* Start address of the initialized data section in RAM */
} _DTBL[] = {
{ __sectop("D"), __secend("D"), __sectop("R") },
{ __sectop("D_2"), __secend("D_2"), __sectop("R_2") },
{ __sectop("D_1"), __secend("D_1"), __sectop("R_1") }
};
#pragma section C C$BSEC
extern const struct {
_UBYTE *b_s; /* Start address of non-initialized data section */
_UBYTE *b_e; /* End address of non-initialized data section */
} _BTBL[] = {
{ __sectop("B"), __secend("B") },
{ __sectop("B_2"), __secend("B_2") },
{ __sectop("B_1"), __secend("B_1") }
};
#pragma section
/*
** CTBL prevents excessive output of L1100 messages when linking.
** Even if CTBL is deleted, the operation of the program does not change.
*/
_UBYTE * const _CTBL[] = {
__sectop("C_1"), __sectop("C_2"), __sectop("C"),
__sectop("W_1"), __sectop("W_2"), __sectop("W")
};
#pragma packoption

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@ -0,0 +1,293 @@
/******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Technology Corp. and is only
* intended for use with Renesas products. No other uses are authorized.
* This software is owned by Renesas Technology Corp. and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES
* REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY,
* INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
* PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY
* DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* TECHNOLOGY CORP. NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES
* FOR ANY REASON RELATED TO THE THIS SOFTWARE, EVEN IF RENESAS OR ITS
* AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this
* software and to discontinue the availability of this software.
* By using this software, you agree to the additional terms and
* conditions found by accessing the following link:
* http://www.renesas.com/disclaimer
******************************************************************************
* Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
*******************************************************************************
* File Name : hwsetup.c
* Version : 1.00
* Description : Power up hardware initializations
******************************************************************************
* History : DD.MM.YYYY Version Description
* : 15.02.2010 1.00 First Release
******************************************************************************/
/******************************************************************************
Includes <System Includes> , "Project Includes"
******************************************************************************/
#include <stdint.h>
#include "iodefine.h"
#include "r_ether.h"
#include "rskrx63ndef.h"
/******************************************************************************
Typedef definitions
******************************************************************************/
/******************************************************************************
Macro definitions
******************************************************************************/
/******************************************************************************
Imported global variables and functions (from other files)
******************************************************************************/
/******************************************************************************
Exported global variables and functions (to be accessed by other files)
******************************************************************************/
/******************************************************************************
Private global variables and functions
******************************************************************************/
void io_set_cpg(void);
void ConfigurePortPins(void);
void EnablePeripheralModules(void);
/******************************************************************************
* Function Name: HardwareSetup
* Description : This function does initial setting for CPG port pins used in
* : the Demo including the MII pins of the Ethernet PHY connection.
* Arguments : none
* Return Value : none
******************************************************************************/
void HardwareSetup(void)
{
/* CPG setting */
io_set_cpg();
/* Setup the port pins */
ConfigurePortPins();
/* Enables peripherals */
EnablePeripheralModules();
#if INCLUDE_LCD == 1
/* Initialize display */
InitialiseDisplay();
#endif
}
/******************************************************************************
* Function Name: EnablePeripheralModules
* Description : Enables Peripheral Modules before use
* Arguments : none
* Return Value : none
******************************************************************************/
void EnablePeripheralModules(void)
{
/* Module standby clear */
SYSTEM.MSTPCRB.BIT.MSTPB15 = 0; /* EtherC, EDMAC */
SYSTEM.MSTPCRA.BIT.MSTPA15 = 0; /* CMT0 */
}
/******************************************************************************
* Function Name: ConfigurePortPins
* Description : Configures port pins.
* Arguments : none
* Return Value : none
******************************************************************************/
void ConfigurePortPins(void)
{
/* Port pins default to inputs. To ensure safe initialisation set the pin states
before changing the data direction registers. This will avoid any unintentional
state changes on the external ports.
Many peripheral modules will override the setting of the port registers. Ensure
that the state is safe for external devices if the internal peripheral module is
disabled or powered down. */
#if(0) /* NOTE: ETHERNET PORT IS NOT YET CONFIGURED FOR THE RX63N. */
/* ==== MII/RMII Pins setting ==== */
/*--------------------------------------*/
/* Port Function Control Register */
/*--------------------------------------*/
#if ETH_MODE_SEL == ETH_MII_MODE
/* EE=1, PHYMODE=1, ENETE3=1, ENETE2=0, ENETE1=1, ENETE0=0 (Ethernet) */
IOPORT.PFENET.BYTE = 0x9A;
#endif /* ETH_MODE_SEL */
#if ETH_MODE_SEL == ETH_RMII_MODE
/* EE=1, PHYMODE=0, ENETE3=0, ENETE2=0, ENETE1=1, ENETE0=0 (Ethernet) */
IOPORT.PFENET.BYTE = 0x82;
#endif /* ETH_MODE_SEL */
/*-------------------------------------------*/
/* Input Buffer Control Register (ICR) */
/*-------------------------------------------*/
#if ETH_MODE_SEL == ETH_MII_MODE
/* P54=1 Set ET_LINKSTA input */
PORT5.ICR.BIT.B4 = 1;
/* P71=1 Set ET_MDIO input */
PORT7.ICR.BIT.B1 = 1;
/* P74=1 Set ET_ERXD1 input */
PORT7.ICR.BIT.B4 = 1;
/* P75=1 Set ET_ERXD0 input */
PORT7.ICR.BIT.B5 = 1;
/* P76=1 Set ET_RX_CLK input */
PORT7.ICR.BIT.B6 = 1;
/* P77=1 Set ET_RX_ER input */
PORT7.ICR.BIT.B7 = 1;
/* P83=1 Set ET_CRS input */
PORT8.ICR.BIT.B3 = 1;
/* PC0=1 Set ET_ERXD3 input */
PORTC.ICR.BIT.B0 = 1;
/* PC1=1 Set ET_ERXD2 input */
PORTC.ICR.BIT.B1 = 1;
/* PC2=1 Set ET_RX_DV input */
PORTC.ICR.BIT.B2 = 1;
/* PC4=1 Set EX_TX_CLK input */
PORTC.ICR.BIT.B4 = 1;
/* PC7=1 Set ET_COL input */
PORTC.ICR.BIT.B7 = 1;
#endif /* ETH_MODE_SEL */
#if ETH_MODE_SEL == ETH_RMII_MODE
/* P54=1 Set ET_LINKSTA input */
PORT5.ICR.BIT.B4 = 1;
/* P71=1 Set ET_MDIO input */
PORT7.ICR.BIT.B1 = 1;
/* P74=1 Set RMII_RXD1 input */
PORT7.ICR.BIT.B4 = 1;
/* P75=1 Set RMII_RXD0 input */
PORT7.ICR.BIT.B5 = 1;
/* P76=1 Set REF50CLK input */
PORT7.ICR.BIT.B6 = 1;
/* P77=1 Set RMII_RX_ER input */
PORT7.ICR.BIT.B7 = 1;
/* P83=1 Set RMII_CRS_DV input */
PORT8.ICR.BIT.B3 = 1;
#endif /* ETH_MODE_SEL */
#endif /* 0 */
/* Configure LED 0-4 pin settings */
PORT1.PODR.BIT.B4 = 1;
PORT1.PODR.BIT.B5 = 1;
PORT1.PODR.BIT.B6 = 1;
PORT1.PODR.BIT.B7 = 1;
PORT1.PDR.BIT.B4 = 1;
PORT1.PDR.BIT.B5 = 1;
PORT1.PDR.BIT.B6 = 1;
PORT1.PDR.BIT.B7 = 1;
#if INCLUDE_LCD == 1
/* Set LCD pins as outputs */
/* LCD-RS */
PORTJ.PDR.BIT.B1 = 1;
/* LCD-EN */
PORTJ.PDR.BIT.B3 = 1;
/*LCD-data */
PORTH.PDR.BYTE = 0x0F;
#endif
}
/******************************************************************************
* Function Name: io_set_cpg
* Description : Sets up operating speed
* Arguments : none
* Return Value : none
******************************************************************************/
void io_set_cpg(void)
{
unsigned long i;
SYSTEM.PRCR.WORD = 0xA503; /* Access registers via PRCR */
SYSTEM.SOSCCR.BYTE = 0x00; /* Sub-clock oscillator ON */
SYSTEM.HOCOPCR.BYTE = 0x00; /* HOCO ON */
SYSTEM.MOSCWTCR.BYTE = 0x0e; /* Main Clock Oscillator Wait Control Register */
/* 262144 states */
SYSTEM.PLLWTCR.BYTE = 0x0e; /* PLL Wait Control Register */
/* 2097152 states */
SYSTEM.MOSCCR.BYTE = 0x00; /* EXTAL ON */
SYSTEM.PLLCR2.BYTE = 0x01; /* PLL OFF */
SYSTEM.PLLCR.WORD = 0x0f00; /* x16 @PLL */
/* Input to PLL = EXTAL */
/* Therefore: */
/* PLL = EXTAL */
/* = 12 */
/* PLL * 16 = 192MHz */
/* External oscillation input selection */
SYSTEM.PLLCR2.BYTE = 0x00; /* PLL ON */
for(i = 0; i<2500; i++) /* Wait for stabilisation of PLL and main clock */
{ /* = 20ms */
/* (2500 x 1/125kHz = 20ms) */
}
/************************************************************************/
/* */
/* SYSTEM.SCKCR.BIT.PCKB = 2; ( b11: b8 ) PLL/4 = 48MHz */
/* SYSTEM.SCKCR.BIT.PCKA = 2; ( b15:b12 ) PLL/4 = 48MHz */
/* SYSTEM.SCKCR.BIT.BCK = 2; ( b16:b19 ) PLL/4 = 48MHz */
/* SYSTEM.SCKCR.BIT.PSTOP0 = 1; ( b22 ) SDCLK CLK OUT Disabled */
/* SYSTEM.SCKCR.BIT.PSTOP1 = 1; ( b23 ) BUS CLK OUT Disabled */
/* SYSTEM.SCKCR.BIT.ICK = 1; ( b24:b27 ) PLL/2 = 96MHz */
/* SYSTEM.SCKCR.BIT.FCK = 2; ( b31:b28 ) PLL/3 = 48MHz */
/* */
/* SYSTEM.SCKCR2.BIT.UCK = 2; PLL/4 = 48MHz */
/* SYSTEM.SCKCR2.BIT.IEBCK = 3; PLL/4 = 48MHz */
/************************************************************************/
SYSTEM.SCKCR.LONG = 0x21c22222; /* set these bits to the same a this bit */
/* ||| | | */
/* |++---------------+ | */
/* | | */
/* +-------------------------------------+ */
SYSTEM.SCKCR2.WORD = 0x0033;
// SYSTEM.SCKCR3.WORD = 0x0000; /* LOCO -> LOCO */
// SYSTEM.SCKCR3.WORD = 0x0100; /* LOCO -> HOCO */
// SYSTEM.SCKCR3.WORD = 0x0200; /* LOCO -> MAIN */
// SYSTEM.SCKCR3.WORD = 0x0300; /* LOCO -> Sub-Clock */
SYSTEM.SCKCR3.WORD = 0x0400; /* LOCO -> PLL */
#if 1
// Configure LED - I/O pins as Outputs
// First set the Data Levels
LED0 = 1; // LED0 : OFF =1, ON = 0
LED1 = 1; // LED1 : OFF =1, ON = 0
LED2 = 1; // LED2 : OFF =1, ON = 0
LED3 = 1; // LED3 : OFF =1, ON = 0
// Set Port Direction Registers
LED0_PDR = 1; // LED0 : 1 = output
LED1_PDR = 1; // LED1 : 1 = output
LED2_PDR = 1; // LED2 : 1 = output
LED3_PDR = 1; // LED3 : 1 = output
#endif
/* Gain access to the Port Function Select Registers */
MPC.PWPR.BIT.B0WI = 0;
MPC.PWPR.BIT.PFSWE = 1;
}

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/***********************************************************************/
/* */
/* FILE :intprg.c */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Interrupt Program */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX/RX600
*
* File Name : intprg.c
*
* Abstract : Interrupt Program.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
#include <machine.h>
#include "vect.h"
#pragma section IntPRG
// Exception(Supervisor Instruction)
void Excep_SuperVisorInst(void){/* brk(); */}
// Exception(Undefined Instruction)
void Excep_UndefinedInst(void){/* brk(); */}
// Exception(Floating Point)
void Excep_FloatingPoint(void){/* brk(); */}
// NMI
void NonMaskableInterrupt(void){/* brk(); */}
// Dummy
void Dummy(void){/* brk(); */}
// BRK
void Excep_BRK(void){ wait(); }

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@ -0,0 +1,120 @@
; Comment out the orginal code
.IF 0
;------------------------------------------------------------------------
; |
; FILE :lowlvl.src |
; DATE :Wed, Jun 16, 2010 |
; DESCRIPTION :Program of Low level |
; CPU TYPE :Other |
; |
; This file is generated by Renesas Project Generator (Ver.4.50). |
; NOTE:THIS IS A TYPICAL EXAMPLE. |
; |
;------------------------------------------------------------------------
.GLB _charput
.GLB _charget
SIM_IO .EQU 0h
.SECTION P,CODE
;-----------------------------------------------------------------------
; _charput:
;-----------------------------------------------------------------------
_charput:
MOV.L #IO_BUF,R2
MOV.B R1,[R2]
MOV.L #1220000h,R1
MOV.L #PARM,R3
MOV.L R2,[R3]
MOV.L R3,R2
MOV.L #SIM_IO,R3
JSR R3
RTS
;-----------------------------------------------------------------------
; _charget:
;-----------------------------------------------------------------------
_charget:
MOV.L #1210000h,R1
MOV.L #IO_BUF,R2
MOV.L #PARM,R3
MOV.L R2,[R3]
MOV.L R3,R2
MOV.L #SIM_IO,R3
JSR R3
MOV.L #IO_BUF,R2
MOVU.B [R2],R1
RTS
;-----------------------------------------------------------------------
; I/O Buffer
;-----------------------------------------------------------------------
.SECTION B,DATA,ALIGN=4
PARM: .BLKL 1
.SECTION B_1,DATA
IO_BUF: .BLKB 1
; .END ; Commented out for conditional assembly
; Code below is for debug console
.ELSE
;-----------------------------------------------------------------------
;
; FILE :lowlvl.src
; DATE :Wed, Jul 01, 2009
; DESCRIPTION :Program of Low level
; CPU TYPE :RX
;
;-----------------------------------------------------------------------
.GLB _charput
.GLB _charget
FC2E0 .EQU 00084080h
FE2C0 .EQU 00084090h
DBGSTAT .EQU 000840C0h
RXFL0EN .EQU 00001000h
TXFL0EN .EQU 00000100h
.SECTION P,CODE
;-----------------------------------------------------------------------
; _charput:
;-----------------------------------------------------------------------
_charput:
.STACK _charput = 00000000h
__C2ESTART: MOV.L #TXFL0EN,R3
MOV.L #DBGSTAT,R4
__TXLOOP: MOV.L [R4],R5
AND R3,R5
BNZ __TXLOOP
__WRITEFC2E0: MOV.L #FC2E0,R2
MOV.L R1,[R2]
__CHARPUTEXIT: RTS
;-----------------------------------------------------------------------
; _charget:
;-----------------------------------------------------------------------
_charget:
.STACK _charget = 00000000h
__E2CSTART: MOV.L #RXFL0EN,R3
MOV.L #DBGSTAT,R4
__RXLOOP: MOV.L [R4],R5
AND R3,R5
BZ __RXLOOP
__READFE2C0: MOV.L #FE2C0,R2
MOV.L [R2],R1
__CHARGETEXIT: RTS
;-----------------------------------------------------------------------
; End of conditional code
.ENDIF
.END

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@ -0,0 +1,329 @@
/***********************************************************************/
/* */
/* FILE :lowsrc.c */
/* DATE :Wed, Jun 16, 2010 */
/* DESCRIPTION :Program of I/O Stream */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX
*
* File Name : lowsrc.c
*
* Abstract : Program of I/O Stream.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
#include <string.h>
#include <stdio.h>
#include <stddef.h>
#include "lowsrc.h"
/* file number */
#define STDIN 0 /* Standard input (console) */
#define STDOUT 1 /* Standard output (console) */
#define STDERR 2 /* Standard error output (console) */
#define FLMIN 0 /* Minimum file number */
#define _MOPENR 0x1
#define _MOPENW 0x2
#define _MOPENA 0x4
#define _MTRUNC 0x8
#define _MCREAT 0x10
#define _MBIN 0x20
#define _MEXCL 0x40
#define _MALBUF 0x40
#define _MALFIL 0x80
#define _MEOF 0x100
#define _MERR 0x200
#define _MLBF 0x400
#define _MNBF 0x800
#define _MREAD 0x1000
#define _MWRITE 0x2000
#define _MBYTE 0x4000
#define _MWIDE 0x8000
/* File Flags */
#define O_RDONLY 0x0001 /* Read only */
#define O_WRONLY 0x0002 /* Write only */
#define O_RDWR 0x0004 /* Both read and Write */
#define O_CREAT 0x0008 /* A file is created if it is not existed */
#define O_TRUNC 0x0010 /* The file size is changed to 0 if it is existed. */
#define O_APPEND 0x0020 /* The position is set for next reading/writing */
/* 0: Top of the file 1: End of file */
/* Special character code */
#define CR 0x0d /* Carriage return */
#define LF 0x0a /* Line feed */
#if defined( __RX )
const long _nfiles = IOSTREAM; /* The number of files for input/output files */
#else
const int _nfiles = IOSTREAM; /* The number of files for input/output files */
#endif
char flmod[IOSTREAM]; /* The location for the mode of opened file. */
unsigned char sml_buf[IOSTREAM];
#define FPATH_STDIN "C:\\stdin"
#define FPATH_STDOUT "C:\\stdout"
#define FPATH_STDERR "C:\\stderr"
/* H8 Normal mode ,SH and RX */
#if defined( __2000N__ ) || defined( __2600N__ ) || defined( __300HN__ ) || defined( _SH )
/* Output one character to standard output */
extern void charput(char);
/* Input one character from standard input */
extern char charget(void);
/* Output one character to the file */
extern char fcharput(char, unsigned char);
/* Input one character from the file */
extern char fcharget(char*, unsigned char);
/* Open the file */
extern char fileopen(char*, unsigned char, unsigned char*);
/* Close the file */
extern char fileclose(unsigned char);
/* Move the file offset */
extern char fpseek(unsigned char, long, unsigned char);
/* Get the file offset */
extern char fptell(unsigned char, long*);
/* RX */
#elif defined( __RX )
/* Output one character to standard output */
extern void charput(unsigned char);
/* Input one character from standard input */
extern unsigned char charget(void);
/* H8 Advanced mode */
#elif defined( __2000A__ ) || defined( __2600A__ ) || defined( __300HA__ ) || defined( __H8SXN__ ) || defined( __H8SXA__ ) || defined( __H8SXM__ ) || defined( __H8SXX__ )
/* Output one character to standard output */
extern void charput(char);
/* Input one character from standard input */
extern char charget(void);
/* Output one character to the file */
extern char fcharput(char, unsigned char);
/* Input one character from the file */
extern char fcharget(char*, unsigned char);
/* Open the file */
/* Specified as the number of register which stored paramter is 3 */
extern char __regparam3 fileopen(char*, unsigned char, unsigned char*);
/* Close the file */
extern char fileclose(unsigned char);
/* Move the file offset */
extern char fpseek(unsigned char, long, unsigned char);
/* Get the file offset */
extern char fptell(unsigned char, long*);
/* H8300 and H8300L */
#elif defined( __300__ ) || defined( __300L__ )
/* Output one character to standard output */
extern void charput(char);
/* Input one character from standard input */
extern char charget(void);
/* Output one character to the file */
extern char fcharput(char, unsigned char);
/* Input one character from the file */
extern char fcharget(char*, unsigned char);
/* Open the file */
/* Specified as the number of register which stored paramter is 3 */
extern char __regparam3 fileopen(char*, unsigned char, unsigned char*);
/* Close the file */
extern char fileclose(unsigned char);
/* Move the file offset */
/* Move the file offset */
extern char __regparam3 fpseek(unsigned char, long, unsigned char);
/* Get the file offset */
extern char fptell(unsigned char, long*);
#endif
#include <stdio.h>
FILE *_Files[IOSTREAM]; // structure for FILE
char *env_list[] = { // Array for environment variables(**environ)
"ENV1=temp01",
"ENV2=temp02",
"ENV9=end",
'\0' // Terminal for environment variables
};
char **environ = env_list;
/****************************************************************************/
/* _INIT_IOLIB */
/* Initialize C library Functions, if necessary. */
/* Define USES_SIMIO on Assembler Option. */
/****************************************************************************/
void _INIT_IOLIB( void )
{
/* A file for standard input/output is opened or created. Each FILE */
/* structure members are initialized by the library. Each _Buf member */
/* in it is re-set the end of buffer pointer. */
/* Standard Input File */
if( freopen( FPATH_STDIN, "r", stdin ) == NULL )
stdin->_Mode = 0xffff; /* Not allow the access if it fails to open */
stdin->_Mode = _MOPENR; /* Read only attribute */
stdin->_Mode |= _MNBF; /* Non-buffering for data */
stdin->_Bend = stdin->_Buf + 1; /* Re-set pointer to the end of buffer */
/* Standard Output File */
if( freopen( FPATH_STDOUT, "w", stdout ) == NULL )
stdout->_Mode = 0xffff; /* Not allow the access if it fails to open */
stdout->_Mode |= _MNBF; /* Non-buffering for data */
stdout->_Bend = stdout->_Buf + 1;/* Re-set pointer to the end of buffer */
/* Standard Error File */
if( freopen( FPATH_STDERR, "w", stderr ) == NULL )
stderr->_Mode = 0xffff; /* Not allow the access if it fails to open */
stderr->_Mode |= _MNBF; /* Non-buffering for data */
stderr->_Bend = stderr->_Buf + 1;/* Re-set pointer to the end of buffer */
}
/****************************************************************************/
/* _CLOSEALL */
/****************************************************************************/
void _CLOSEALL( void )
{
long i;
for( i=0; i < _nfiles; i++ )
{
/* Checks if the file is opened or not */
if( _Files[i]->_Mode & (_MOPENR | _MOPENW | _MOPENA ) )
fclose( _Files[i] ); /* Closes the file */
}
}
/**************************************************************************/
/* open:file open */
/* Return value:File number (Pass) */
/* -1 (Failure) */
/**************************************************************************/
#if defined( __RX )
long open(const char *name, /* File name */
long mode, /* Open mode */
long flg) /* Open flag */
#else
int open(char *name, /* File name */
int mode, /* Open mode */
int flg) /* Open flag */
#endif
{
if( strcmp( name, FPATH_STDIN ) == 0 ) /* Standard Input file? */
{
if( ( mode & O_RDONLY ) == 0 ) return -1;
flmod[STDIN] = mode;
return STDIN;
}
else if( strcmp( name, FPATH_STDOUT ) == 0 )/* Standard Output file? */
{
if( ( mode & O_WRONLY ) == 0 ) return -1;
flmod[STDOUT] = mode;
return STDOUT;
}
else if(strcmp(name, FPATH_STDERR ) == 0 ) /* Standard Error file? */
{
if( ( mode & O_WRONLY ) == 0 ) return -1;
flmod[STDERR] = mode;
return STDERR;
}
else return -1; /*Others */
}
#if defined( __RX )
long close( long fileno )
#else
int close( int fileno )
#endif
{
return 1;
}
/**************************************************************************/
/* write:Data write */
/* Return value:Number of write characters (Pass) */
/* -1 (Failure) */
/**************************************************************************/
#if defined( __RX )
long write(long fileno, /* File number */
const unsigned char *buf, /* The address of destination buffer */
long count) /* The number of chacter to write */
#else
int write(int fileno, /* File number */
char *buf, /* The address of destination buffer */
int count) /* The number of chacter to write */
#endif
{
long i; /* A variable for counter */
unsigned char c; /* An output character */
/* Checking the mode of file , output each character */
/* Checking the attribute for Write-Only, Read-Only or Read-Write */
if(flmod[fileno]&O_WRONLY || flmod[fileno]&O_RDWR)
{
if( fileno == STDIN ) return -1; /* Standard Input */
else if( (fileno == STDOUT) || (fileno == STDERR) )
/* Standard Error/output */
{
for( i = count; i > 0; --i )
{
c = *buf++;
charput(c);
}
return count; /*Return the number of written characters */
}
else return -1; /* Incorrect file number */
}
else return -1; /* An error */
}
#if defined( __RX )
long read( long fileno, unsigned char *buf, long count )
#else
int read( int fileno, char *buf, unsigned int count )
#endif
{
long i;
/* Checking the file mode with the file number, each character is input and stored the buffer */
if((flmod[fileno]&_MOPENR) || (flmod[fileno]&O_RDWR)){
for(i = count; i > 0; i--){
*buf = charget();
if(*buf==CR){ /* Replace the new line character */
*buf = LF;
}
buf++;
}
return count;
}
else {
return -1;
}
}
#if defined( __RX )
long lseek( long fileno, long offset, long base )
#else
long lseek( int fileno, long offset, int base )
#endif
{
return -1L;
}

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@ -0,0 +1,129 @@
/***********************************************************************/
/* */
/* FILE :resetprg.c */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Reset Program */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX/RX600
*
* File Name : resetprg.c
*
* Abstract : Reset Program.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
#include <machine.h>
#include <_h_c_lib.h>
//#include <stddef.h> // Remove the comment when you use errno
//#include <stdlib.h> // Remove the comment when you use rand()
#include "typedefine.h"
#include "stacksct.h"
#pragma inline_asm Change_PSW_PM_to_UserMode
static void Change_PSW_PM_to_UserMode(void);
#ifdef __cplusplus
extern "C" {
#endif
void PowerON_Reset_PC(void);
void main(void);
#ifdef __cplusplus
}
#endif
#ifdef __cplusplus // Use SIM I/O
extern "C" {
#endif
extern void _INIT_IOLIB(void);
extern void _CLOSEALL(void);
#ifdef __cplusplus
}
#endif
#define PSW_init 0x00010000
#define FPSW_init 0x00000100
//extern void srand(_UINT); // Remove the comment when you use rand()
//extern _SBYTE *_s1ptr; // Remove the comment when you use strtok()
//#ifdef __cplusplus // Use Hardware Setup
//extern "C" {
//#endif
//extern void HardwareSetup(void);
//#ifdef __cplusplus
//}
//#endif
//#ifdef __cplusplus // Remove the comment when you use global class object
//extern "C" { // Sections C$INIT and C$END will be generated
//#endif
//extern void _CALL_INIT(void);
//extern void _CALL_END(void);
//#ifdef __cplusplus
//}
//#endif
#pragma section ResetPRG
#pragma entry PowerON_Reset_PC
void PowerON_Reset_PC(void)
{
set_intb((unsigned long)__sectop("C$VECT"));
set_fpsw(FPSW_init);
_INITSCT();
// _INIT_IOLIB(); // Remove the comment when you use SIM I/O
// errno=0; // Remove the comment when you use errno
// srand((_UINT)1); // Remove the comment when you use rand()
// _s1ptr=NULL; // Remove the comment when you use strtok()
// HardwareSetup(); // Use Hardware Setup
nop();
// _CALL_INIT(); // Remove the comment when you use global class object
set_psw(PSW_init); // Set Ubit & Ibit for PSW
// Change_PSW_PM_to_UserMode(); // DO NOT CHANGE TO USER MODE IF USING FREERTOS!
( void ) Change_PSW_PM_to_UserMode; // Just to avoid compiler warnings.
main();
// _CLOSEALL(); // Use SIM I/O
// _CALL_END(); // Remove the comment when you use global class object
brk();
}
static void Change_PSW_PM_to_UserMode(void)
{
MVFC PSW,R1
OR #00100000h,R1
PUSH.L R1
MVFC PC,R1
ADD #10,R1
PUSH.L R1
RTE
NOP
NOP
}

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@ -0,0 +1,142 @@
/***********************************************************************/
/* */
/* FILE :resetprg.c */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Reset Program */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX/RX600
*
* File Name : resetprg.c
*
* Abstract : Reset Program.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
/* Types used in this file. */
#include "typedefine.h"
/* Defines machine level functions used in this file */
#include <machine.h>
/* Defines MCU configuration functions used in this file */
#include <_h_c_lib.h>
/* Hardware definitions" */
#include "iodefine.h"
/* Defines the size of the stack which configured in this file */
#include "stacksct.h"
#define PSW_init 0x00010000
#define FPSW_init 0x00000100
extern void HardwareSetup( void );
#pragma section ResetPRG
#pragma entry PowerON_Reset_PC
/* It is ok to use stack variables here because "#pragma entry" is used, so the
stack is setup in the compiler generated prologue. */
void PowerON_Reset_PC(void)
{
volatile unsigned int i;
set_intb(__sectop("C$VECT"));
set_fpsw(FPSW_init);
/* MCU boots using the LOCO, so turn the speed up before setting up the C
run-time environment.
Clock Description Frequency
----------------------------------------
Input Clock Frequency............ 12 MHz
PLL frequency (x16).............. 192 MHz
Internal Clock Frequency......... 96 MHz
Peripheral Clock Frequency....... 48 MHz
USB Clock Frequency.............. 48 MHz
External Bus Clock Frequency..... 24 MHz */
/* Protect off. */
SYSTEM.PRCR.WORD = 0xA50B;
/* Uncomment if not using sub-clock */
//SYSTEM.SOSCCR.BYTE = 0x01; /* stop sub-clock */
SYSTEM.SOSCCR.BYTE = 0x00; /* Enable sub-clock for RTC */
/* Wait 131,072 cycles * 12 MHz = 10.9 ms */
SYSTEM.MOSCWTCR.BYTE = 0x0D;
/* PLL wait is 4,194,304 cycles (default) * 192 MHz (12 MHz * 16) = 20.1 ms*/
SYSTEM.PLLWTCR.BYTE = 0x04;
/* x16 @PLL */
SYSTEM.PLLCR.WORD = 0x0F00;
/* EXTAL ON */
SYSTEM.MOSCCR.BYTE = 0x00;
/* PLL ON */
SYSTEM.PLLCR2.BYTE = 0x00;
for(i = 0;i< 0x168;i++)
{
/* Wait over 12ms */
nop() ;
}
/* Setup system clocks
SCKCR - System Clock Control Register
b31:b28 FCK[3:0] 0x02 = Flash clock: PLL/4 = (192 / 4) = 48 MHz
b27:b24 ICK[3:0] 0x01 = System clock: PLL/2 = (192 / 2) = 96 MHz
b23 PSTOP1 0x00 = BCLK pin output is enabled
b19:b16 BCK[3:0] 0x03 = BCLK: PLL/8 = 24 MHz
b11:b8 PCKB[3:0] 0x02 = Peripheral clock B: PLL/4 = 48 MHz
*/
SYSTEM.SCKCR.LONG = 0x21031222; /* ICK=PLL/2,BCK,FCK,PCK=PLL/4 */
/* Setup IEBUS and USB clocks
SCKCR2 - System Clock Control Register 2
b7:b4 UCK[3:0] 0x03 = USB clock is PLL/4 = 48 MHz
b3:b0 IEBCK[3:0] 0x01 = IE Bus clock is PLL/2 = 96 MHz
*/
SYSTEM.SCKCR2.WORD = 0x0031;
/* ICLK, PCLKB, FCLK, BCLK, IECLK, and USBCLK all come from PLL circuit */
SYSTEM.SCKCR3.WORD = 0x0400;
/* Protect on. */
SYSTEM.PRCR.WORD = 0xA500;
/* Initialize C runtime environment */
_INITSCT();
/* Setup the hardware for the RSK. */
HardwareSetup();
nop();
/* Set Ubit and Ibit for PSW. */
set_psw(PSW_init);
/* Call the application code. */
main();
/* Main should not return. */
brk();
}

View File

@ -0,0 +1,28 @@
#include <stddef.h>
#include <stdio.h>
#define HEAPSIZE 0x400
signed char *sbrk( size_t size );
union HEAP_TYPE
{
signed long dummy;
signed char heap[HEAPSIZE];
};
static union HEAP_TYPE heap_area;
/* End address allocated by sbrk */
static signed char *brk = ( signed char * ) &heap_area;
signed char *sbrk( size_t size )
{
signed char *p;
if( brk + size > heap_area.heap + HEAPSIZE )
{
p = ( signed char * ) - 1;
}
else
{
p = brk;
brk += size;
}
return p;
}

View File

@ -0,0 +1,64 @@
/***********************************************************************/
/* */
/* FILE :vecttbl.c */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Initialize of Vector Table */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX/RX600
*
* File Name : vecttbl.c
*
* Abstract : Initialize of Vector Table.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
#include "vect.h"
#pragma section C FIXEDVECT
void* const Fixed_Vectors[] = {
//;0xffffffd0 Exception(Supervisor Instruction)
(void*) Excep_SuperVisorInst,
//;0xffffffd4 Reserved
Dummy,
//;0xffffffd8 Reserved
Dummy,
//;0xffffffdc Exception(Undefined Instruction)
(void*) Excep_UndefinedInst,
//;0xffffffe0 Reserved
Dummy,
//;0xffffffe4 Exception(Floating Point)
(void*) Excep_FloatingPoint,
//;0xffffffe8 Reserved
Dummy,
//;0xffffffec Reserved
Dummy,
//;0xfffffff0 Reserved
Dummy,
//;0xfffffff4 Reserved
Dummy,
//;0xfffffff8 NMI
(void*) NonMaskableInterrupt,
//;0xfffffffc RESET
//;<<VECTOR DATA START (POWER ON RESET)>>
//;Power On Reset PC
PowerON_Reset_PC
//;<<VECTOR DATA END (POWER ON RESET)>>
};

View File

@ -0,0 +1,290 @@
[HIMDBVersion]
2.0
[DATABASE_VERSION]
"2.3"
[SESSION_DETAILS]
""
[INFORMATION]
""
[GENERAL_DATA]
"FIRST_CONNECTION_TAG" "NO"
"RESET_CPU_AFTER_DOWNLOAD_TAG" "VARIANT_FALSE_STORE_TAG"
"{287A8023-99B5-49E1-A54E-4DDCA43D7959}MapCtrlECX_MAP_FIND_SYMBOL_LIST" ""
"{287A8023-99B5-49E1-A54E-4DDCA43D7959}MapCtrlViews" "0"
"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}ECXLABEL_ADDDLG_ADDR" ""
"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}LabelCtrlSymbolFileDir" ""
"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}LabelCtrlSymbolFileName" ""
"{2BA6A3EE-6488-11D5-80D4-00C04F68EAD7}LabelCtrlViews" "0"
"{2BA6A3EF-6488-11D5-80D4-00C04F68EAD7}StatusCtrlViews" "0"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBatchFileName" ""
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBreakpointFlag" "-1 "
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBreakpointStatus" "-1 "
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBrowseDirectory" ""
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlLogFileName" ""
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlSplitterPosition" "242"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlViews" "1"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlWindowProperties" "17"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineWndInstanceKey0" "{WK_00000001_CmdLine}"
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}TclTkCtrlLogFileName" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_COMPARE_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_COMPARE_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_DISPLAY_DEST_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_DISPLAY_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_DISPLAY_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_FILL_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_FILL_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_MOVE_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_MOVE_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_SEARCH_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_SEARCH_START_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_SET_DEST_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_TEST_END_ADDRESS" ""
"{313F4FC2-6566-11D5-8BBE-0004E2013C71}ECX_MEMORY_TEST_START_ADDRESS" ""
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"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_BREAK_BREAK_CYCLE_COUNT" "0"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_BREAK_BREAK_DATA_COUNT" "0"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_BREAK_BREAK_REGISTER_COUNT" "0"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_BREAK_BREAK_SEQUENCE_COUNT" "0"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_BREAK_PC_BREAK_COUNT" "0"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_BUSCYCLEOCCUR_COUNT" "0"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_CONFIG_CPU_FREQUENCY" "100000"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_CONFIG_ENDIAN" "LITTLE"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_CONFIG_PCLOCKRATE" "1"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_CONFIG_ROUND" "RM_NEAR"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_EXEC_EXEC_MODE" "STOP"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_EXEC_STEP_RATE" "40000"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_FILEIOPORT_COUNT" "0"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_FILEIOVARIALBE_COUNT" "0"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_INST_DECODE_CACHE_ENABLE_FLAG" "OFF"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_IODLL_COUNT" "0"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_AUTO_ALLOC_RESOURCE" "1"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_BUS_WIDTH" "32"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP0" "0x00000000,0x0001FFFF,32, 1,RAM"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP0_ENDIAN" "2"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP0_WRITE_STATE" "1"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP1" "0x00080000,0x000FFFFF,32, 1,I/O"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP1_ENDIAN" "0"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP1_WRITE_STATE" "1"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP2" "0x00100000,0x00107FFF,32, 1,ROM"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP2_ENDIAN" "2"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP2_WRITE_STATE" "1"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP3" "0x007F8000,0x007F9FFF,32, 1,RAM"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP3_ENDIAN" "2"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP3_WRITE_STATE" "1"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP4" "0x007FC000,0x007FC4FF,32, 1,I/O"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP4_ENDIAN" "0"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP4_WRITE_STATE" "1"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP5" "0x007FFC00,0x007FFFFF,32, 1,I/O"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP5_ENDIAN" "0"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP5_WRITE_STATE" "1"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP6" "0x00E00000,0x00FFFFFF,32, 1,ROM"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP6_ENDIAN" "2"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP6_WRITE_STATE" "1"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP7" "0xFEFFE000,0xFEFFFFFF,32, 1,ROM"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP7_ENDIAN" "2"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP7_WRITE_STATE" "1"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP8" "0xFF7FC000,0xFF7FFFFF,32, 1,ROM"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP8_ENDIAN" "2"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP8_WRITE_STATE" "1"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_MAP9" "0xFFE00000,0xFFFFFFFF,32, 1,ROM"
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"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_MAP_PRG_WIDTH" "-1"
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"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_RESOURCE_MEMRES0" "0x00000000,0x0001FFFF,3"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_RESOURCE_MEMRES1" "0x00080000,0x000FFFFF,3"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_RESOURCE_MEMRES2" "0x007FC000,0x007FC4FF,3"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_RESOURCE_MEMRES3" "0x007FFC00,0x007FFFFF,3"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_MEMORY_RESOURCE_MEMRES4" "0xFFFF8000,0xFFFFFFFF,3"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_SESSION_IS_SAVED" "YES"
"{3575AD59-64F7-49AB-BD50-52BB206A6DDE}T_SYSTEM_CALL_Interrupt_Exception" "1"
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"{48FF5DA0-6FFA-11D5-B7CE-00E029352378}EcxCov_Open_Start" ""
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"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_15" "0000000000000000"
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"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_17" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_18" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_19" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_2" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_20" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_21" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_22" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_23" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_24" "0000000000000100"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_25" "0000000000000000"
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"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_4" "0000000000000000"
"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_5" "0000000000000000"
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"{64753FED-D387-4B8C-A91D-D3419C869C07}C_REGISTER_REG_7" "0000000000000000"
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"{6C4D5B81-FD67-46A9-A089-EA44DCDE47FD}RAMMonitorManagerCtrlBlockInfoFileName" ""
"{7943C44E-7D44-422A-9140-4CF55C88F7D3}DifferenceCtrlViews" "0"
"{7FA2E460-7EC0-11D5-8EB6-00004CC34E9D}SimIOCtrlViews" "0"
"{855C64C3-E49C-4450-9BCA-C9822566D214}OSObjectCtrlViews" "0"
"{85AC95E0-0CE6-11D6-8EB6-00004CC34E9D}TriggerCtrlViews" "0"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE" "00000000,00000000,0,0"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_ADDRESS_NAME" ""
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_COMB_ADDRESS" ",,,,"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_COMB_BUFFER" ",,,,"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}ECX_WAVE_SAMPLING_RATE" "1000"
"{8A898260-6F1D-11D5-8EB6-00004CC34E9D}WaveformCtrlViews" "0"
"{95A081A1-7001-11D5-B1FD-00A0C9E23A58}RegistersCtrlViews" "0"
"{99F424FE-E727-45AE-AE1F-11E29DEF272C}ECX_GuiIO_SAMPLING_RATE" "1000"
"{99F424FE-E727-45AE-AE1F-11E29DEF272C}PDGuiIOCtrlPDGuiIOLastSaveDirectory" ""
"{99F424FE-E727-45AE-AE1F-11E29DEF272C}PDGuiIOCtrlViews" "0"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_ADDRESS_NAME" ""
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_BUFFER" "00000000,00000000,0,0"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_COLOR" "0,0,0,0"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_COMB_ADDRESS" ",,,,"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_COMB_PALETTE" ",,,,"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_PALETTE_NAME" ""
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_REDRAW_CONTINUOUSLY" "0,2"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_SAMPLEING_RATE" "1000"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ECX_IMAGE_VIEW" "0,0,0,0,0,0"
"{AC411480-6F0A-11D5-8EB6-00004CC34E9D}ImageCtrlViews" "0"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchCtrlViews" "0"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWndInitial_Radix" "0"
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWndRecentFile_WatchRecord" ""
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWndRecentFile_WatchSave" ""
"{B266D880-6FA1-11D5-8613-00A024591A38}WatchWndUpdate_Interval" "100"
"{CBEBB610-1516-11D4-8F2D-00409545B67B}ElfDwarf2Objects" "1"
"{CBEBB610-1516-11D4-8F2D-00409545B67B}LoadModule0OBJ_ELFDWARF2_ARRAY_EXPAND_LIMIT" "-1"
"{CBEBB610-1516-11D4-8F2D-00409545B67B}LoadModule0OBJ_ELFDWARF2_STATIC_MEM_EXPAND" "1"
"{D595F9C0-EF22-11D5-B7DB-0000E10B3DA9}EventCtrlViews" "0"
"{EEDC9300-6FBE-11D5-8613-00A024591A38}LocalsCtrlViews" "0"
"{EEDC9301-6FBE-11D5-8613-00A024591A38}StackTraceCtrlViews" "0"
"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOCtrlIOFile" ""
"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOCtrlSaveFileDir" "$(CONFIGDIR)"
"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOCtrlSaveFileName" ""
"{F866DB60-6186-11D5-8BBE-0004E2013C71}IOCtrlViews" "0"
"{F923CED3-3318-4B43-B931-0AE76B289176}TaskTraceCtrlAnalyzeViews" "0"
"{F923CED3-3318-4B43-B931-0AE76B289176}TaskTraceCtrlFileSaveDirectory" ""
"{F923CED3-3318-4B43-B931-0AE76B289176}TaskTraceCtrlTraceViews" "0"
[LANGUAGE]
"English"
[CONFIG_INFO_VD1]
1
[CONFIG_INFO_VD2]
0
[CONFIG_INFO_VD3]
0
[CONFIG_INFO_VD4]
0
[WINDOW_POSITION_STATE_DATA_VD1]
"Help" "TOOLBAR 0" 59419 1 5 "0.00" 0 0 0 0 0 17 0 "" "0.0"
"{WK_00000001_CmdLine}" "WINDOW" 59422 0 1 "0.07" 228 0 0 350 200 17 0 "32771|32772|32778|<<separator>>|32773|32774|<<separator>>|32820|<<separator>>|32801|32824" "0.0"
"{WK_00000001_OUTPUT}" "WINDOW" 59422 0 0 "1.00" 228 560 340 350 200 18 0 "36756|36757|36758|36759|<<separator>>|36746|36747|<<separator>>|39531|<<separator>>|39500|39534|<<separator>>|36687" "0.0"
"{WK_00000002_WORKSPACE}" "WINDOW" 59420 0 0 "1.00" 346 560 340 350 200 18 0 "" "0.0"
"{WK_TB00000001_STANDARD}" "TOOLBAR 0" 59419 0 2 "0.00" 0 0 0 0 0 18 0 "" "0.0"
"{WK_TB00000002_EDITOR}" "TOOLBAR 0" 59419 0 0 "0.00" 0 0 0 0 0 18 0 "" "0.0"
"{WK_TB00000003_BOOKMARKS}" "TOOLBAR 0" 59419 1 1 "0.00" 0 0 0 0 0 17 0 "" "0.0"
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"{WK_TB00000008_DEBUGRUN}" "TOOLBAR 0" 59419 0 3 "0.00" 0 298 189 0 0 18 0 "" "0.0"
"{WK_TB00000009_VERSIONCONTROL}" "TOOLBAR 0" 59419 1 3 "0.00" 0 0 0 0 0 17 0 "" "0.0"
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"{WK_TB00000014_CODE}" "TOOLBAR 0" 59419 2 4 "0.00" 0 0 0 0 0 17 0 "" "0.0"
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"{WK_TB00000016_GRAPHIC}" "TOOLBAR 0" 59419 2 3 "0.00" 0 0 0 0 0 17 0 "" "0.0"
"{WK_TB00000018_DEFAULTWINDOW}" "TOOLBAR 0" 59419 1 2 "0.00" 0 0 0 0 0 17 0 "" "0.0"
"{WK_TB00000023_RTOS}" "TOOLBAR 0" 59419 2 6 "0.00" 0 0 0 0 0 17 0 "" "0.0"
"{WK_TB00000025_HELPSYSTEMTOOL}" "TOOLBAR 0" 59419 0 0 "0.00" 0 788 192 0 0 5 0 "" "0.0"
"{WK_TB00000026_MACRO}" "TOOLBAR 0" 59419 1 6 "0.00" 0 0 0 0 0 17 0 "" "0.0"
"{WK_TB00000028_RTOSDEBUG}" "TOOLBAR 0" 59419 0 0 "0.00" 0 559 254 0 0 5 0 "" "0.0"
"{WK_TB00000029_SYSTEMTOOL}" "TOOLBAR 0" 59419 2 0 "0.00" 0 0 0 0 0 17 0 "" "0.0"
[WINDOW_POSITION_STATE_DATA_VD2]
[WINDOW_POSITION_STATE_DATA_VD3]
[WINDOW_POSITION_STATE_DATA_VD4]
[WINDOW_Z_ORDER]
"{WK_TB00000007_DEBUG} TOOLBAR 0"
"{WK_TB00000028_RTOSDEBUG} TOOLBAR 0"
"{WK_TB00000025_HELPSYSTEMTOOL} TOOLBAR 0"
"C:\E\Dev\FreeRTOS\WorkingCopy\Demo\RX600_RX62N-MDK_Renesas\RTOSDemo\main-full.c"
[TARGET_NAME]
"RX600 Simulator" "" 0
[STATUSBAR_STATEINFO_VD1]
"MasterShowState" 1
"ApplicationShowState" 1
"DebuggerShowState" 1
[STATUSBAR_STATEINFO_VD2]
"MasterShowState" 1
"ApplicationShowState" 1
"DebuggerShowState" 1
[STATUSBAR_STATEINFO_VD3]
"MasterShowState" 1
"ApplicationShowState" 1
"DebuggerShowState" 1
[STATUSBAR_STATEINFO_VD4]
"MasterShowState" 1
"ApplicationShowState" 1
"DebuggerShowState" 1
[STATUSBAR_DEBUGGER_PANESTATE_VD1]
[STATUSBAR_DEBUGGER_PANESTATE_VD2]
[STATUSBAR_DEBUGGER_PANESTATE_VD3]
[STATUSBAR_DEBUGGER_PANESTATE_VD4]
[DEBUGGER_OPTIONS]
"[V|VERSION|1] [S|MAP|^"0x00000000,0x0001FFFF,RAM,32,101 0x00080000,0x000FFFFF,I/O,32,101 0x00100000,0x00107FFF,ROM,32,101 0x007F8000,0x007F9FFF,RAM,32,101 0x007FC000,0x007FC4FF,I/O,32,101 0x007FFC00,0x007FFFFF,I/O,32,101 0x00E00000,0x00FFFFFF,ROM,32,101 0xFEFFE000,0xFEFFFFFF,ROM,32,101 0xFF7FC000,0xFF7FFFFF,ROM,32,101 0xFFE00000,0xFFFFFFFF,ROM,32,101^"] [S|RESOURCE|^"0x00000000,0x0001FFFF,R/W 0x00080000,0x000FFFFF,R/W 0x007FC000,0x007FC4FF,R/W 0x007FFC00,0x007FFFFF,R/W 0xFFFF8000,0xFFFFFFFF,R/W^"] [B|SIMIOF|0] [I|SIMIOADR|0x00000000] [I|BUS_MODE|0] [S|ENDIAN|^"LITTLE^"] [S|PATCH|^"OFF^"] [S|ROM_MODE|^"^"]"
[DOWNLOAD_MODULES]
"$(CONFIGDIR)\$(PROJECTNAME).abs" 0 "Elf/Dwarf2" 0 0 1 0
[CONNECT_ON_GO]
"FALSE"
[DOWNLOAD_MODULES_AFTER_BUILD]
"TRUE"
[REMOVE_BREAKPOINTS_ON_DOWNLOAD]
"FALSE"
[DISABLE_MEMORY_ACCESS_PRIOR_TO_COMMAND_FILE_EXECUTION]
"FALSE"
[LIMIT_DISASSEMBLY_MEMORY_ACCESS]
"FALSE"
[DISABLE_MEMORY_ACCESS_DURING_EXECUTION]
"FALSE"
[DEBUGGER_OPTIONS_PROPERTIES]
"1"
[COMMAND_FILES]
[DEFAULT_DEBUG_FORMAT]
"Elf/Dwarf2"
[FLASH_DETAILS]
"0.000000" 0 0 "" 0 "" 0 0 "" 1 1 0 0 0 0 0 "" "" "" "" ""
[BREAKPOINTS]
[END]

View File

@ -0,0 +1,62 @@
/*
FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
#ifndef INT_QUEUE_TIMER_H
#define INT_QUEUE_TIMER_H
void vInitialiseTimerForIntQueueTest( void );
portBASE_TYPE xTimer0Handler( void );
portBASE_TYPE xTimer1Handler( void );
#endif

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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@ -0,0 +1,13 @@
/***********************************************************************/
/* */
/* FILE :lowsrc.h */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Header file of I/O Stream file */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*Number of I/O Stream*/
#define IOSTREAM 20

View File

@ -0,0 +1,107 @@
/******************************************************************************
* DISCLAIMER
* Please refer to http://www.renesas.com/disclaimer
******************************************************************************
Copyright (C) 2011. Renesas Electronics Corp., All Rights Reserved.
*******************************************************************************
* File Name : rsksh7216.h
* Version : 1.00
* Description : RSK RX63N board specific settings
******************************************************************************
* History : DD.MM.YYYY Version Description
* : 12.09.2011 1.00 First Release
******************************************************************************/
#ifndef RSKRX63N_H
#define RSKRX63N_H
/******************************************************************************
Includes <System Includes> , "Project Includes"
******************************************************************************/
/******************************************************************************
Typedef definitions
******************************************************************************/
/******************************************************************************
Macro definitions
******************************************************************************/
/* System Clock Settings */
/* DETAIL THIS LATER !!!! */
#define XTAL_FREQUENCY (12000000L)
#define PLL_MUL (16)
#define PLL_INPUT_FREQ_DIV (1)
#define ICLK_DIV (2)
#define PCLK_DIV (4)
#define BCLK_DIV (4)
#define PLL_FREQUENCY (XTAL_FREQUENCY * (PLL_MUL / PLL_INPUT_FREQ_DIV))
#define ICLK_FREQUENCY (PLL_FREQUENCY / ICLK_DIV)
#define PCLK_FREQUENCY (PLL_FREQUENCY / PCLK_DIV)
#define BCLK_FREQUENCY (PLL_FREQUENCY / BCLK_DIV)
#define CMT0_CLK_SELECT (512)
/* General Values */
#define LED_ON (0)
#define LED_OFF (1)
#define SET_BIT_HIGH (1)
#define SET_BIT_LOW (0)
#define SET_BYTE_HIGH (0xFF)
#define SET_BYTE_LOW (0x00)
/* Define switches to be polled if not available as interrupts */
#define SW_ACTIVE FALSE
#define SW1 PORT0.DR.BIT.B0
#define SW2 PORT0.DR.BIT.B1
#define SW3 PORT0.DR.BIT.B7
#define SW1_DDR PORT0.DDR.BIT.B0
#define SW2_DDR PORT0.DDR.BIT.B1
#define SW3_DDR PORT0.DDR.BIT.B7
#define SW1_ICR PORT0.ICR.BIT.B0
#define SW2_ICR PORT0.ICR.BIT.B1
#define SW3_ICR PORT0.ICR.BIT.B7
/* LEDs */
#define LED0 PORT0.PODR.BIT.B3
#define LED1 PORT0.PODR.BIT.B5
#define LED2 PORT1.PODR.BIT.B0
#define LED3 PORT1.PODR.BIT.B1
//#define LED4 PORT6.DR.BIT.B0
//#define LED5 PORT7.DR.BIT.B3
#define LED0_PDR PORT0.PDR.BIT.B3
#define LED1_PDR PORT0.PDR.BIT.B5
#define LED2_PDR PORT1.PDR.BIT.B0
#define LED3_PDR PORT1.PDR.BIT.B1
//#define LED4_DDR PORT6.DDR.BIT.B0
//#define LED5_DDR PORT7.DDR.BIT.B3
/* 2x8 segment LCD */
#if 0
#define INCLUDE_LCD 1
#define LCD_RS PORTJ.PODR.BIT.B1
#define LCD_EN PORTJ.PODR.BIT.B3
#define LCD_DATA PORTH.PODR.BYTE
#define LCD_RS_DDR PORTJ.PDR.BIT.B1
#define LCD_EN_DDR PORTJ.PDR.BIT.B3
#define LCD_DATA_DDR PORTH.PDR.BYTE
#endif
/******************************************************************************
Variable Externs
******************************************************************************/
/******************************************************************************
Functions Prototypes
******************************************************************************/
/* RSKRX63N_H */
#endif

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@ -0,0 +1,13 @@
/***********************************************************************/
/* */
/* FILE :stacksct.h */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Setting of Stack area */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
#pragma stacksize su=0x300
#pragma stacksize si=0x100

View File

@ -0,0 +1,41 @@
/***********************************************************************/
/* */
/* FILE :typedefine.h */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Aliases of Integer Type */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX
*
* File Name : typedefine.h
*
* Abstract : Aliases of Integer Type.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
typedef signed char _SBYTE;
typedef unsigned char _UBYTE;
typedef signed short _SWORD;
typedef unsigned short _UWORD;
typedef signed int _SINT;
typedef unsigned int _UINT;
typedef signed long _SDWORD;
typedef unsigned long _UDWORD;
typedef signed long long _SQWORD;
typedef unsigned long long _UQWORD;

View File

@ -0,0 +1,60 @@
/***********************************************************************/
/* */
/* FILE :vect.h */
/* DATE :Wed, Aug 11, 2010 */
/* DESCRIPTION :Definition of Vector */
/* CPU TYPE :Other */
/* */
/* This file is generated by Renesas Project Generator (Ver.4.50). */
/* NOTE:THIS IS A TYPICAL EXAMPLE. */
/* */
/***********************************************************************/
/*********************************************************************
*
* Device : RX/RX600
*
* File Name : vect.h
*
* Abstract : Definition of Vector.
*
* History : 1.00 (2009-08-07)
*
* NOTE : THIS IS A TYPICAL EXAMPLE.
*
* Copyright(c) 2009 Renesas Technology Corp.
* And Renesas Solutions Corp.,All Rights Reserved.
*
*********************************************************************/
// Exception(Supervisor Instruction)
#pragma interrupt (Excep_SuperVisorInst)
void Excep_SuperVisorInst(void);
// Exception(Undefined Instruction)
#pragma interrupt (Excep_UndefinedInst)
void Excep_UndefinedInst(void);
// Exception(Floating Point)
#pragma interrupt (Excep_FloatingPoint)
void Excep_FloatingPoint(void);
// NMI
#pragma interrupt (NonMaskableInterrupt)
void NonMaskableInterrupt(void);
// Dummy
#pragma interrupt (Dummy)
void Dummy(void);
// BRK
#pragma interrupt (Excep_BRK(vect=0))
void Excep_BRK(void);
//;<<VECTOR DATA START (POWER ON RESET)>>
//;Power On Reset PC
extern void PowerON_Reset_PC(void);
//;<<VECTOR DATA END (POWER ON RESET)>>

View File

@ -0,0 +1,264 @@
/*
FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/*
* This is a very simple demo that creates two tasks, one queue, and one
* software timer. For a much more complete and complex example select either
* the Debug or Debug_with_optimisation build configurations within the HEW,
* which build main_full.c in place of this file.
*
* One task (the queue receive task) blocks on the queue to wait for data to
* arrive, toggling LED0 each time '100' is received. The other task (the
* queue send task) repeatedly blocks for a fixed period before sending '100'
* to the queue (causing the first task to toggle the LED).
*
* The software timer is configured to auto-reload. The timer callback
* function periodically toggles LED1.
*/
/* Hardware specific includes. */
#include "iodefine.h"
/* Kernel includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "timers.h"
#include "queue.h"
/* Priorities at which the tasks are created. */
#define configQUEUE_RECEIVE_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define configQUEUE_SEND_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
/* The rate at which data is sent to the queue, specified in milliseconds. */
#define mainQUEUE_SEND_PERIOD_MS ( 500 / portTICK_RATE_MS )
/* The period of the software timer, specified in milliseconds. */
#define mainSOFTWARE_TIMER_PERIOD_MS ( 150 / portTICK_RATE_MS )
/* The number of items the queue can hold. This is 1 as the receive task
will remove items as they are added so the send task should always find the
queue empty. */
#define mainQUEUE_LENGTH ( 1 )
/* The LEDs toggle by the task and timer respectively. */
#define mainTASK_LED ( 0 )
#define mainTIMER_LED ( 1 )
/*
* The tasks as defined at the top of this file.
*/
static void prvQueueReceiveTask( void *pvParameters );
static void prvQueueSendTask( void *pvParameters );
/*
* The callback function used by the software timer.
*/
static void prvBlinkyTimerCallback( xTimerHandle xTimer );
/* The queue used by both tasks. */
static xQueueHandle xQueue = NULL;
/* This variable is not used by this simple Blinky example. It is defined
purely to allow the project to link as it is used by the full project. */
volatile unsigned long ulHighFrequencyTickCount = 0UL;
/*-----------------------------------------------------------*/
void main(void)
{
xTimerHandle xTimer;
/* Turn all LEDs off. */
vParTestInitialise();
/* Create the queue. */
xQueue = xQueueCreate( mainQUEUE_LENGTH, sizeof( unsigned long ) );
/* Create the software timer, as described at the top of this file. */
xTimer = xTimerCreate( "BlinkyTimer", /* Just a text name to make debugging easier - not used by the scheduler. */
mainSOFTWARE_TIMER_PERIOD_MS, /* The timer period. */
pdTRUE, /* Set to pdTRUE for periodic timer, or pdFALSE for one-shot timer. */
NULL, /* The timer ID is not required. */
prvBlinkyTimerCallback ); /* The function executed when the timer expires. */
if( xTimer != NULL )
{
/* Start the timer - it will not actually start running until the
scheduler has started. The block time is set to 0, although, because
xTimerStart() is being called before the scheduler has been started,
the any block time specified would be ignored anyway. */
xTimerStart( xTimer, 0UL );
}
if( xQueue != NULL )
{
/* Start the two tasks as described at the top of this file. */
xTaskCreate( prvQueueReceiveTask, /* The function that implements the task. */
"Rx", /* Just a text name to make debugging easier - not used by the scheduler. */
configMINIMAL_STACK_SIZE, /* The size of the task stack, in words. */
NULL, /* The task parameter is not used. */
configQUEUE_RECEIVE_TASK_PRIORITY, /* The priority assigned to the task when it is created. */
NULL ); /* The task handle is not used. */
xTaskCreate( prvQueueSendTask, "TX", configMINIMAL_STACK_SIZE, NULL, configQUEUE_SEND_TASK_PRIORITY, NULL );
/* Start the tasks running. */
vTaskStartScheduler();
}
/* If all is well we will never reach here as the scheduler will now be
running. If we do reach here then it is likely that there was insufficient
heap available for the idle task to be created. */
for( ;; );
}
/*-----------------------------------------------------------*/
static void prvQueueSendTask( void *pvParameters )
{
portTickType xNextWakeTime;
const unsigned long ulValueToSend = 100UL;
/* Initialise xNextWakeTime - this only needs to be done once. */
xNextWakeTime = xTaskGetTickCount();
for( ;; )
{
/* Place this task in the blocked state until it is time to run again.
The block state is specified in ticks, the constant used converts ticks
to ms. */
vTaskDelayUntil( &xNextWakeTime, mainQUEUE_SEND_PERIOD_MS );
/* Send to the queue - causing the queue receive task to flash its LED. 0
is used so the send does not block - it shouldn't need to as the queue
should always be empty here. */
xQueueSend( xQueue, &ulValueToSend, 0 );
}
}
/*-----------------------------------------------------------*/
static void prvQueueReceiveTask( void *pvParameters )
{
unsigned long ulReceivedValue;
for( ;; )
{
/* Wait until something arives in the queue - this will block
indefinitely provided INCLUDE_vTaskSuspend is set to 1 in
FreeRTOSConfig.h. */
xQueueReceive( xQueue, &ulReceivedValue, portMAX_DELAY );
/* To get here something must have arrived, but is it the expected
value? If it is, toggle the LED. */
if( ulReceivedValue == 100UL )
{
vParTestToggleLED( mainTASK_LED );
}
}
}
/*-----------------------------------------------------------*/
static void prvBlinkyTimerCallback( xTimerHandle xTimer )
{
/* The software timer does nothing but toggle an LED. */
vParTestToggleLED( mainTIMER_LED );
}
/*-----------------------------------------------------------*/
void vApplicationSetupTimerInterrupt( void )
{
/* Enable compare match timer 0. */
MSTP( CMT0 ) = 0;
/* Interrupt on compare match. */
CMT0.CMCR.BIT.CMIE = 1;
/* Set the compare match value. */
CMT0.CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) -1 ) / 8 );
/* Divide the PCLK by 8. */
CMT0.CMCR.BIT.CKS = 0;
/* Enable the interrupt... */
_IEN( _CMT0_CMI0 ) = 1;
/* ...and set its priority to the application defined kernel priority. */
_IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY;
/* Start the timer. */
CMT.CMSTR0.BIT.STR0 = 1;
}
/*-----------------------------------------------------------*/
/* This function is explained by the comments above its prototype at the top
of this file. */
void vApplicationMallocFailedHook( void )
{
for( ;; );
}
/*-----------------------------------------------------------*/
/* This function is explained by the comments above its prototype at the top
of this file. */
void vApplicationStackOverflowHook( xTaskHandle pxTask, signed char *pcTaskName )
{
for( ;; );
}
/*-----------------------------------------------------------*/
/* This function is explained by the comments above its prototype at the top
of this file. */
void vApplicationIdleHook( void )
{
/* Just to prevent the variable getting optimised away. */
( void ) ulHighFrequencyTickCount;
}
/*-----------------------------------------------------------*/

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@ -0,0 +1,702 @@
/*
FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/* ****************************************************************************
* This project includes a lot of tasks and tests and is therefore complex.
* If you would prefer a much simpler project to get started with then select
* the 'Blinky' build configuration within the HEW IDE. The Blinky
* configuration builds main-blinky.c in place of this file.
* ****************************************************************************
*
* Creates all the demo application tasks, then starts the scheduler. The web
* documentation provides more details of the standard demo application tasks,
* which provide no particular functionality but do provide a good example of
* how to use the FreeRTOS API. The tasks defined in flop.c are included in the
* set of standard demo tasks to ensure the floating point unit gets some
* exercise.
*
* In addition to the standard demo tasks, the following tasks and tests are
* defined and/or created within this file:
*
* Webserver ("uIP") task - This serves a number of dynamically generated WEB
* pages to a standard WEB browser. The IP and MAC addresses are configured by
* constants defined at the bottom of FreeRTOSConfig.h. Use either a standard
* Ethernet cable to connect through a hug, or a cross over (point to point)
* cable to connect directly. Ensure the IP address used is compatible with the
* IP address of the machine running the browser - the easiest way to achieve
* this is to ensure the first three octets of the IP addresses are the same.
*
* "Reg test" tasks - These fill the registers with known values, then check
* that each register still contains its expected value. Each task uses
* different values. The tasks run with very low priority so get preempted
* very frequently. A check variable is incremented on each iteration of the
* test loop. A register containing an unexpected value is indicative of an
* error in the context switching mechanism and will result in a branch to a
* null loop - which in turn will prevent the check variable from incrementing
* any further and allow the check task (described below) to determine that an
* error has occurred. The nature of the reg test tasks necessitates that they
* are written in assembly code.
*
* "Check" timer - The check software timer period is initially set to five
* seconds. The callback function associated with the check software timer
* checks that all the standard demo tasks, and the register check tasks, are
* not only still executing, but are executing without reporting any errors. If
* the check software timer discovers that a task has either stalled, or
* reported an error, then it changes its own execution period from the initial
* five seconds, to just 200ms. The check software timer callback function
* also toggles LED3 each time it is called. This provides a visual indication
* of the system status: If LED3 toggles every five seconds, then no issues
* have been discovered. If the LED toggles every 200ms, then an issue has been
* discovered with at least one task.
*
* "High frequency timer test" - A high frequency periodic interrupt is
* generated using a timer - the interrupt is assigned a priority above
* configMAX_SYSCALL_INTERRUPT_PRIORITY so should not be effected by anything
* the kernel is doing. The frequency and priority of the interrupt, in
* combination with other standard tests executed in this demo, should result
* in interrupts nesting at least 3 and probably 4 deep. This test is only
* included in build configurations that have the optimiser switched on. In
* optimised builds the count of high frequency ticks is used as the time base
* for the run time stats.
*
* *NOTE 1* If LED3 is toggling every 5 seconds then all the demo application
* tasks are executing as expected and no errors have been reported in any
* tasks. The toggle rate increasing to 200ms indicates that at least one task
* has reported unexpected behaviour.
*
* *NOTE 2* vApplicationSetupTimerInterrupt() is called by the kernel to let
* the application set up a timer to generate the tick interrupt. In this
* example a compare match timer is used for this purpose.
*
* *NOTE 3* The CPU must be in Supervisor mode when the scheduler is started.
* The PowerON_Reset_PC() supplied in resetprg.c with this demo has
* Change_PSW_PM_to_UserMode() commented out to ensure this is the case.
*
* *NOTE 4* The IntQueue common demo tasks test interrupt nesting and make use
* of all the 8bit timers (as two cascaded 16bit units).
*
* *
*/
#include <string.h>
/* Hardware specific includes. */
#include "iodefine.h"
/* Kernel includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "timers.h"
#include "semphr.h"
/* Standard demo includes. */
#include "partest.h"
#include "flash_timer.h"
#include "IntQueue.h"
#include "BlockQ.h"
#include "death.h"
#include "integer.h"
#include "blocktim.h"
#include "semtest.h"
#include "PollQ.h"
#include "GenQTest.h"
#include "QPeek.h"
#include "recmutex.h"
#include "flop.h"
/* Values that are passed into the reg test tasks using the task parameter. The
tasks check that the values are passed in correctly. */
#define mainREG_TEST_1_PARAMETER ( 0x12121212UL )
#define mainREG_TEST_2_PARAMETER ( 0x12345678UL )
/* Priorities at which the tasks are created. */
#define mainCHECK_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
#define mainuIP_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
#define mainINTEGER_TASK_PRIORITY ( tskIDLE_PRIORITY )
#define mainGEN_QUEUE_TASK_PRIORITY ( tskIDLE_PRIORITY )
#define mainFLOP_TASK_PRIORITY ( tskIDLE_PRIORITY )
/* The WEB server uses string handling functions, which in turn use a bit more
stack than most of the other tasks. */
#define mainuIP_STACK_SIZE ( configMINIMAL_STACK_SIZE * 3 )
/* The LED toggled by the check timer. */
#define mainCHECK_LED ( 3 )
/* The rate at which mainCHECK_LED will toggle when all the tasks are running
without error. Controlled by the check timer as described at the top of this
file. */
#define mainNO_ERROR_CHECK_TIMER_PERIOD_MS ( 5000 / portTICK_RATE_MS )
/* The rate at which mainCHECK_LED will toggle when an error has been reported
by at least one task. Controlled by the check timer as described at the top of
this file. */
#define mainERROR_CHECK_TIMER_PERIOD_MS ( 200 / portTICK_RATE_MS )
/* A block time of zero simply means "don't block". */
#define mainDONT_BLOCK ( 0UL )
/* A set of timers are created, each of which toggles and LED. This specifies
the number of timers to create. */
#define mainNUMBER_OF_LEDS_TO_FLASH ( 3 )
/*
* vApplicationMallocFailedHook() will only be called if
* configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook
* function that will execute if a call to pvPortMalloc() fails.
* pvPortMalloc() is called internally by the kernel whenever a task, queue or
* semaphore is created. It is also called by various parts of the demo
* application.
*/
void vApplicationMallocFailedHook( void );
/*
* vApplicationIdleHook() will only be called if configUSE_IDLE_HOOK is set to 1
* in FreeRTOSConfig.h. It is a hook function that is called on each iteration
* of the idle task. It is essential that code added to this hook function
* never attempts to block in any way (for example, call xQueueReceive() with
* a block time specified). If the application makes use of the vTaskDelete()
* API function (as this demo application does) then it is also important that
* vApplicationIdleHook() is permitted to return to its calling function because
* it is the responsibility of the idle task to clean up memory allocated by the
* kernel to any task that has since been deleted.
*/
void vApplicationIdleHook( void );
/*
* vApplicationStackOverflowHook() will only be called if
* configCHECK_FOR_STACK_OVERFLOW is set to a non-zero value. The handle and
* name of the offending task should be passed in the function parameters, but
* it is possible that the stack overflow will have corrupted these - in which
* case pxCurrentTCB can be inspected to find the same information.
*/
void vApplicationStackOverflowHook( xTaskHandle pxTask, signed char *pcTaskName );
/*
* The reg test tasks as described at the top of this file.
*/
static void prvRegTest1Task( void *pvParameters );
static void prvRegTest2Task( void *pvParameters );
/*
* The actual implementation of the reg test functionality, which, because of
* the direct register access, have to be in assembly.
*/
static void prvRegTest1Implementation( void );
static void prvRegTest2Implementation( void );
/*
* The check timer callback function, as described at the top of this file.
*/
static void prvCheckTimerCallback( xTimerHandle xTimer );
/*
* Contains the implementation of the WEB server.
*/
extern void vuIP_Task( void *pvParameters );
/*-----------------------------------------------------------*/
/* Variables that are incremented on each iteration of the reg test tasks -
provided the tasks have not reported any errors. The check task inspects these
variables to ensure they are still incrementing as expected. If a variable
stops incrementing then it is likely that its associate task has stalled. */
unsigned long ulRegTest1CycleCount = 0UL, ulRegTest2CycleCount = 0UL;
/* The status message that is displayed at the bottom of the "task stats" web
page, which is served by the uIP task. This will report any errors picked up
by the reg test task. */
const char *pcStatusMessage = "All tasks executing without error.";
/*-----------------------------------------------------------*/
void main(void)
{
xTimerHandle xCheckTimer;
extern void HardwareSetup( void );
/* Turn all LEDs off. */
vParTestInitialise();
/* Start the reg test tasks which test the context switching mechanism. */
xTaskCreate( prvRegTest1Task, "RegTst1", configMINIMAL_STACK_SIZE, ( void * ) mainREG_TEST_1_PARAMETER, tskIDLE_PRIORITY, NULL );
xTaskCreate( prvRegTest2Task, "RegTst2", configMINIMAL_STACK_SIZE, ( void * ) mainREG_TEST_2_PARAMETER, tskIDLE_PRIORITY, NULL );
/* The web server task. NOTE: COMMENTED OUT AS THE ETHERNET PORT IS NOT
YET BEING CONFIGURED IN hwsetup.c. */
//xTaskCreate( vuIP_Task, "uIP", mainuIP_STACK_SIZE, NULL, mainuIP_TASK_PRIORITY, NULL );
/* Create the standard demo tasks. */
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
vCreateBlockTimeTasks();
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
vStartIntegerMathTasks( mainINTEGER_TASK_PRIORITY );
vStartGenericQueueTasks( mainGEN_QUEUE_TASK_PRIORITY );
vStartQueuePeekTasks();
vStartRecursiveMutexTasks();
vStartInterruptQueueTasks();
vStartMathTasks( mainFLOP_TASK_PRIORITY );
/* Create the timers used to toggle the LEDs. */
vStartLEDFlashTimers( mainNUMBER_OF_LEDS_TO_FLASH );
/* Create the software timer that performs the 'check' functionality,
as described at the top of this file. */
xCheckTimer = xTimerCreate( "CheckTimer", /* A text name, purely to help debugging. */
( mainNO_ERROR_CHECK_TIMER_PERIOD_MS ), /* The timer period, in this case 5000ms (5s). */
pdTRUE, /* This is an auto-reload timer, so xAutoReload is set to pdTRUE. */
( void * ) 0, /* The ID is not used, so can be set to anything. */
prvCheckTimerCallback /* The callback function that inspects the status of all the other tasks. */
);
if( xCheckTimer != NULL )
{
xTimerStart( xCheckTimer, mainDONT_BLOCK );
}
/* The suicide tasks must be created last as they need to know how many
tasks were running prior to their creation in order to ascertain whether
or not the correct/expected number of tasks are running at any given time. */
vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );
/* Start the tasks running. */
vTaskStartScheduler();
/* If all is well, the scheduler will now be running, and the following line
will never be reached. If the following line does execute, then there was
insufficient FreeRTOS heap memory available for the idle and/or timer tasks
to be created. See the memory management section on the FreeRTOS web site
for more details. */
for( ;; );
}
/*-----------------------------------------------------------*/
static void prvCheckTimerCallback( xTimerHandle xTimer )
{
static long lChangedTimerPeriodAlready = pdFALSE;
static unsigned long ulLastRegTest1CycleCount = 0, ulLastRegTest2CycleCount = 0;
long lErrorFound = pdFALSE;
/* If this is being executed then the kernel has been started. Start the
high frequency timer test as described at the top of this file. This is
only included in the optimised build configuration - otherwise it takes up
too much CPU time and can disrupt other tests. */
#ifdef INCLUDE_HIGH_FREQUENCY_TIMER_TEST
vSetupHighFrequencyTimer();
#endif
/* Check the standard demo tasks are running without error. */
if( xAreGenericQueueTasksStillRunning() != pdTRUE )
{
lErrorFound = pdTRUE;
pcStatusMessage = "Error: GenQueue";
}
else if( xAreQueuePeekTasksStillRunning() != pdTRUE )
{
lErrorFound = pdTRUE;
pcStatusMessage = "Error: QueuePeek";
}
else if( xAreBlockingQueuesStillRunning() != pdTRUE )
{
lErrorFound = pdTRUE;
pcStatusMessage = "Error: BlockQueue";
}
else if( xAreBlockTimeTestTasksStillRunning() != pdTRUE )
{
lErrorFound = pdTRUE;
pcStatusMessage = "Error: BlockTime";
}
else if( xAreSemaphoreTasksStillRunning() != pdTRUE )
{
lErrorFound = pdTRUE;
pcStatusMessage = "Error: SemTest";
}
else if( xArePollingQueuesStillRunning() != pdTRUE )
{
lErrorFound = pdTRUE;
pcStatusMessage = "Error: PollQueue";
}
else if( xIsCreateTaskStillRunning() != pdTRUE )
{
lErrorFound = pdTRUE;
pcStatusMessage = "Error: Death";
}
else if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
{
lErrorFound = pdTRUE;
pcStatusMessage = "Error: IntMath";
}
else if( xAreRecursiveMutexTasksStillRunning() != pdTRUE )
{
lErrorFound = pdTRUE;
pcStatusMessage = "Error: RecMutex";
}
else if( xAreIntQueueTasksStillRunning() != pdPASS )
{
lErrorFound = pdTRUE;
pcStatusMessage = "Error: IntQueue";
}
else if( xAreMathsTaskStillRunning() != pdPASS )
{
lErrorFound = pdTRUE;
pcStatusMessage = "Error: Flop";
}
/* Check the reg test tasks are still cycling. They will stop incrementing
their loop counters if they encounter an error. */
if( ulRegTest1CycleCount == ulLastRegTest1CycleCount )
{
lErrorFound = pdTRUE;
pcStatusMessage = "Error: RegTest1";
}
if( ulRegTest2CycleCount == ulLastRegTest2CycleCount )
{
lErrorFound = pdTRUE;
pcStatusMessage = "Error: RegTest2";
}
ulLastRegTest1CycleCount = ulRegTest1CycleCount;
ulLastRegTest2CycleCount = ulRegTest2CycleCount;
/* Toggle the check LED to give an indication of the system status. If
the LED toggles every mainNO_ERROR_CHECK_TIMER_PERIOD_MS milliseconds then
everything is ok. A faster toggle indicates an error. */
vParTestToggleLED( mainCHECK_LED );
/* Have any errors been latch in lErrorFound? If so, shorten the
period of the check timer to mainERROR_CHECK_TIMER_PERIOD_MS milliseconds.
This will result in an increase in the rate at which mainCHECK_LED
toggles. */
if( lErrorFound != pdFALSE )
{
if( lChangedTimerPeriodAlready == pdFALSE )
{
lChangedTimerPeriodAlready = pdTRUE;
/* This call to xTimerChangePeriod() uses a zero block time.
Functions called from inside of a timer callback function must
*never* attempt to block. */
xTimerChangePeriod( xTimer, ( mainERROR_CHECK_TIMER_PERIOD_MS ), mainDONT_BLOCK );
}
}
}
/*-----------------------------------------------------------*/
/* The RX port uses this callback function to configure its tick interrupt.
This allows the application to choose the tick interrupt source. */
void vApplicationSetupTimerInterrupt( void )
{
/* Enable compare match timer 0. */
MSTP( CMT0 ) = 0;
/* Interrupt on compare match. */
CMT0.CMCR.BIT.CMIE = 1;
/* Set the compare match value. */
CMT0.CMCOR = ( unsigned short ) ( ( ( configPERIPHERAL_CLOCK_HZ / configTICK_RATE_HZ ) -1 ) / 8 );
/* Divide the PCLK by 8. */
CMT0.CMCR.BIT.CKS = 0;
/* Enable the interrupt... */
_IEN( _CMT0_CMI0 ) = 1;
/* ...and set its priority to the application defined kernel priority. */
_IPR( _CMT0_CMI0 ) = configKERNEL_INTERRUPT_PRIORITY;
/* Start the timer. */
CMT.CMSTR0.BIT.STR0 = 1;
}
/*-----------------------------------------------------------*/
/* This function is explained by the comments above its prototype at the top
of this file. */
void vApplicationMallocFailedHook( void )
{
for( ;; );
}
/*-----------------------------------------------------------*/
/* This function is explained by the comments above its prototype at the top
of this file. */
void vApplicationStackOverflowHook( xTaskHandle pxTask, signed char *pcTaskName )
{
for( ;; );
}
/*-----------------------------------------------------------*/
/* This function is explained by the comments above its prototype at the top
of this file. */
void vApplicationIdleHook( void )
{
}
/*-----------------------------------------------------------*/
/* This function is explained in the comments at the top of this file. */
static void prvRegTest1Task( void *pvParameters )
{
if( ( ( unsigned long ) pvParameters ) != mainREG_TEST_1_PARAMETER )
{
/* The parameter did not contain the expected value. */
for( ;; )
{
/* Stop the tick interrupt so its obvious something has gone wrong. */
taskDISABLE_INTERRUPTS();
}
}
/* This is an inline asm function that never returns. */
prvRegTest1Implementation();
}
/*-----------------------------------------------------------*/
/* This function is explained in the comments at the top of this file. */
static void prvRegTest2Task( void *pvParameters )
{
if( ( ( unsigned long ) pvParameters ) != mainREG_TEST_2_PARAMETER )
{
/* The parameter did not contain the expected value. */
for( ;; )
{
/* Stop the tick interrupt so its obvious something has gone wrong. */
taskDISABLE_INTERRUPTS();
}
}
/* This is an inline asm function that never returns. */
prvRegTest2Implementation();
}
/*-----------------------------------------------------------*/
/* This function is explained in the comments at the top of this file. */
#pragma inline_asm prvRegTest1Implementation
static void prvRegTest1Implementation( void )
{
; Put a known value in each register.
MOV.L #1, R1
MOV.L #2, R2
MOV.L #3, R3
MOV.L #4, R4
MOV.L #5, R5
MOV.L #6, R6
MOV.L #7, R7
MOV.L #8, R8
MOV.L #9, R9
MOV.L #10, R10
MOV.L #11, R11
MOV.L #12, R12
MOV.L #13, R13
MOV.L #14, R14
MOV.L #15, R15
; Loop, checking each itteration that each register still contains the
; expected value.
TestLoop1:
; Push the registers that are going to get clobbered.
PUSHM R14-R15
; Increment the loop counter to show this task is still getting CPU time.
MOV.L #_ulRegTest1CycleCount, R14
MOV.L [ R14 ], R15
ADD #1, R15
MOV.L R15, [ R14 ]
; Yield to extend the text coverage. Set the bit in the ITU SWINTR register.
MOV.L #1, R14
MOV.L #0872E0H, R15
MOV.B R14, [R15]
NOP
NOP
; Restore the clobbered registers.
POPM R14-R15
; Now compare each register to ensure it still contains the value that was
; set before this loop was entered.
CMP #1, R1
BNE RegTest1Error
CMP #2, R2
BNE RegTest1Error
CMP #3, R3
BNE RegTest1Error
CMP #4, R4
BNE RegTest1Error
CMP #5, R5
BNE RegTest1Error
CMP #6, R6
BNE RegTest1Error
CMP #7, R7
BNE RegTest1Error
CMP #8, R8
BNE RegTest1Error
CMP #9, R9
BNE RegTest1Error
CMP #10, R10
BNE RegTest1Error
CMP #11, R11
BNE RegTest1Error
CMP #12, R12
BNE RegTest1Error
CMP #13, R13
BNE RegTest1Error
CMP #14, R14
BNE RegTest1Error
CMP #15, R15
BNE RegTest1Error
; All comparisons passed, start a new itteratio of this loop.
BRA TestLoop1
RegTest1Error:
; A compare failed, just loop here so the loop counter stops incrementing
; causing the check task to indicate the error.
BRA RegTest1Error
}
/*-----------------------------------------------------------*/
/* This function is explained in the comments at the top of this file. */
#pragma inline_asm prvRegTest2Implementation
static void prvRegTest2Implementation( void )
{
; Put a known value in each register.
MOV.L #10, R1
MOV.L #20, R2
MOV.L #30, R3
MOV.L #40, R4
MOV.L #50, R5
MOV.L #60, R6
MOV.L #70, R7
MOV.L #80, R8
MOV.L #90, R9
MOV.L #100, R10
MOV.L #110, R11
MOV.L #120, R12
MOV.L #130, R13
MOV.L #140, R14
MOV.L #150, R15
; Loop, checking on each itteration that each register still contains the
; expected value.
TestLoop2:
; Push the registers that are going to get clobbered.
PUSHM R14-R15
; Increment the loop counter to show this task is still getting CPU time.
MOV.L #_ulRegTest2CycleCount, R14
MOV.L [ R14 ], R15
ADD #1, R15
MOV.L R15, [ R14 ]
; Restore the clobbered registers.
POPM R14-R15
CMP #10, R1
BNE RegTest2Error
CMP #20, R2
BNE RegTest2Error
CMP #30, R3
BNE RegTest2Error
CMP #40, R4
BNE RegTest2Error
CMP #50, R5
BNE RegTest2Error
CMP #60, R6
BNE RegTest2Error
CMP #70, R7
BNE RegTest2Error
CMP #80, R8
BNE RegTest2Error
CMP #90, R9
BNE RegTest2Error
CMP #100, R10
BNE RegTest2Error
CMP #110, R11
BNE RegTest2Error
CMP #120, R12
BNE RegTest2Error
CMP #130, R13
BNE RegTest2Error
CMP #140, R14
BNE RegTest2Error
CMP #150, R15
BNE RegTest2Error
; All comparisons passed, start a new itteratio of this loop.
BRA TestLoop2
RegTest2Error:
; A compare failed, just loop here so the loop counter stops incrementing
; - causing the check task to indicate the error.
BRA RegTest2Error
}
/*-----------------------------------------------------------*/
char *pcGetTaskStatusMessage( void )
{
/* Not bothered about a critical section here although technically because of
the task priorities the pointer could change it will be atomic if not near
atomic and its not critical. */
return ( char * ) pcStatusMessage;
}
/*-----------------------------------------------------------*/

View File

@ -0,0 +1,345 @@
/*
FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/* Standard includes. */
#include <string.h>
/* Scheduler includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "timers.h"
#include "queue.h"
/* uip includes. */
#include "net/uip.h"
#include "net/uip_arp.h"
#include "apps/httpd/httpd.h"
#include "sys/timer.h"
#include "net/clock-arch.h"
#include "r_ether.h"
/* Demo includes. */
#include "ParTest.h"
/*-----------------------------------------------------------*/
/* How long to wait before attempting to connect the MAC again. */
#define uipINIT_WAIT ( 100 / portTICK_RATE_MS )
/* Shortcut to the header within the Rx buffer. */
#define xHeader ((struct uip_eth_hdr *) &uip_buf[ 0 ])
/* Standard constant. */
#define uipTOTAL_FRAME_HEADER_SIZE 54
/* The ARP timer and the periodic timer share a callback function, so the
respective timer IDs are used to determine which timer actually expired. These
constants are assigned to the timer IDs. */
#define uipARP_TIMER 0
#define uipPERIODIC_TIMER 1
/* A block time of zero ticks simply means, "don't block". */
#define uipDONT_BLOCK 0UL
/*-----------------------------------------------------------*/
/*
* Setup the MAC address in the MAC itself, and in the uIP stack.
*/
static void prvSetMACAddress( void );
/*
* Perform any uIP initialisation necessary.
*/
static void prvInitialise_uIP( void );
/*
* The callback function that is assigned to both the periodic timer and the
* ARP timer.
*/
static void prvUIPTimerCallback( xTimerHandle xTimer );
/*
* Port functions required by the uIP stack.
*/
clock_time_t clock_time( void );
/*-----------------------------------------------------------*/
/* The queue used to send TCP/IP events to the uIP stack. */
xQueueHandle xEMACEventQueue = NULL;
/*-----------------------------------------------------------*/
clock_time_t clock_time( void )
{
return xTaskGetTickCount();
}
/*-----------------------------------------------------------*/
void vuIP_Task( void *pvParameters )
{
portBASE_TYPE i;
unsigned long ulNewEvent = 0UL;
unsigned long ulUIP_Events = 0UL;
( void ) pvParameters;
/* Initialise the uIP stack. */
prvInitialise_uIP();
/* Initialise the MAC. */
vInitEmac();
while( lEMACWaitForLink() != pdPASS )
{
vTaskDelay( uipINIT_WAIT );
}
for( ;; )
{
if( ( ulUIP_Events & uipETHERNET_RX_EVENT ) != 0UL )
{
/* Is there received data ready to be processed? */
uip_len = ( unsigned short ) ulEMACRead();
if( ( uip_len > 0 ) && ( uip_buf != NULL ) )
{
/* Standard uIP loop taken from the uIP manual. */
if( xHeader->type == htons( UIP_ETHTYPE_IP ) )
{
uip_arp_ipin();
uip_input();
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
uip_arp_out();
vEMACWrite();
}
}
else if( xHeader->type == htons( UIP_ETHTYPE_ARP ) )
{
uip_arp_arpin();
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
vEMACWrite();
}
}
}
else
{
ulUIP_Events &= ~uipETHERNET_RX_EVENT;
}
}
if( ( ulUIP_Events & uipPERIODIC_TIMER_EVENT ) != 0UL )
{
ulUIP_Events &= ~uipPERIODIC_TIMER_EVENT;
for( i = 0; i < UIP_CONNS; i++ )
{
uip_periodic( i );
/* If the above function invocation resulted in data that
should be sent out on the network, the global variable
uip_len is set to a value > 0. */
if( uip_len > 0 )
{
uip_arp_out();
vEMACWrite();
}
}
}
/* Call the ARP timer function every 10 seconds. */
if( ( ulUIP_Events & uipARP_TIMER_EVENT ) != 0 )
{
ulUIP_Events &= ~uipARP_TIMER_EVENT;
uip_arp_timer();
}
if( ulUIP_Events == pdFALSE )
{
xQueueReceive( xEMACEventQueue, &ulNewEvent, portMAX_DELAY );
ulUIP_Events |= ulNewEvent;
}
}
}
/*-----------------------------------------------------------*/
static void prvInitialise_uIP( void )
{
xTimerHandle xARPTimer, xPeriodicTimer;
uip_ipaddr_t xIPAddr;
const unsigned long ul_uIPEventQueueLength = 10UL;
/* Initialise the uIP stack. */
uip_init();
uip_ipaddr( &xIPAddr, configIP_ADDR0, configIP_ADDR1, configIP_ADDR2, configIP_ADDR3 );
uip_sethostaddr( &xIPAddr );
uip_ipaddr( &xIPAddr, configNET_MASK0, configNET_MASK1, configNET_MASK2, configNET_MASK3 );
uip_setnetmask( &xIPAddr );
prvSetMACAddress();
httpd_init();
/* Create the queue used to sent TCP/IP events to the uIP stack. */
xEMACEventQueue = xQueueCreate( ul_uIPEventQueueLength, sizeof( unsigned long ) );
/* Create and start the uIP timers. */
xARPTimer = xTimerCreate( ( const signed char * const ) "ARPTimer", /* Just a name that is helpful for debugging, not used by the kernel. */
( 10000UL / portTICK_RATE_MS ), /* Timer period. */
pdTRUE, /* Autor-reload. */
( void * ) uipARP_TIMER,
prvUIPTimerCallback
);
xPeriodicTimer = xTimerCreate( ( const signed char * const ) "PeriodicTimer",
( 50 / portTICK_RATE_MS ),
pdTRUE, /* Autor-reload. */
( void * ) uipPERIODIC_TIMER,
prvUIPTimerCallback
);
configASSERT( xARPTimer );
configASSERT( xPeriodicTimer );
xTimerStart( xARPTimer, portMAX_DELAY );
xTimerStart( xPeriodicTimer, portMAX_DELAY );
}
/*-----------------------------------------------------------*/
static void prvUIPTimerCallback( xTimerHandle xTimer )
{
static const unsigned long ulARPTimerExpired = uipARP_TIMER_EVENT;
static const unsigned long ulPeriodicTimerExpired = uipPERIODIC_TIMER_EVENT;
/* This is a time callback, so calls to xQueueSend() must not attempt to
block. */
switch( ( int ) pvTimerGetTimerID( xTimer ) )
{
case uipARP_TIMER : xQueueSend( xEMACEventQueue, &ulARPTimerExpired, uipDONT_BLOCK );
break;
case uipPERIODIC_TIMER : xQueueSend( xEMACEventQueue, &ulPeriodicTimerExpired, uipDONT_BLOCK );
break;
default : /* Should not get here. */
break;
}
}
/*-----------------------------------------------------------*/
static void prvSetMACAddress( void )
{
struct uip_eth_addr xAddr;
/* Configure the MAC address in the uIP stack. */
xAddr.addr[ 0 ] = configMAC_ADDR0;
xAddr.addr[ 1 ] = configMAC_ADDR1;
xAddr.addr[ 2 ] = configMAC_ADDR2;
xAddr.addr[ 3 ] = configMAC_ADDR3;
xAddr.addr[ 4 ] = configMAC_ADDR4;
xAddr.addr[ 5 ] = configMAC_ADDR5;
uip_setethaddr( xAddr );
}
/*-----------------------------------------------------------*/
void vApplicationProcessFormInput( char *pcInputString )
{
char *c;
/* Only interested in processing form input if this is the IO page. */
c = strstr( pcInputString, "io.shtml" );
if( c )
{
/* Is there a command in the string? */
c = strstr( pcInputString, "?" );
if( c )
{
/* Turn the LED's on or off in accordance with the check box status. */
if( strstr( c, "LED0=1" ) != NULL )
{
/* Turn the LEDs on. */
vParTestSetLED( 7, 1 );
vParTestSetLED( 8, 1 );
vParTestSetLED( 9, 1 );
vParTestSetLED( 10, 1 );
}
else
{
/* Turn the LEDs off. */
vParTestSetLED( 7, 0 );
vParTestSetLED( 8, 0 );
vParTestSetLED( 9, 0 );
vParTestSetLED( 10, 0 );
}
}
else
{
/* Commands to turn LEDs off are not always explicit. */
vParTestSetLED( 7, 0 );
vParTestSetLED( 8, 0 );
vParTestSetLED( 9, 0 );
vParTestSetLED( 10, 0 );
}
}
}

View File

@ -0,0 +1,562 @@
/*
FreeRTOS V7.1.0 - Copyright (C) 2011 Real Time Engineers Ltd.
***************************************************************************
* *
* FreeRTOS tutorial books are available in pdf and paperback. *
* Complete, revised, and edited pdf reference manuals are also *
* available. *
* *
* Purchasing FreeRTOS documentation will not only help you, by *
* ensuring you get running as quickly as possible and with an *
* in-depth knowledge of how to use FreeRTOS, it will also help *
* the FreeRTOS project to continue with its mission of providing *
* professional grade, cross platform, de facto standard solutions *
* for microcontrollers - completely free of charge! *
* *
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS, and thank you for your support! *
* *
***************************************************************************
This file is part of the FreeRTOS distribution.
FreeRTOS is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License (version 2) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
>>>NOTE<<< The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel. FreeRTOS is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details. You should have received a copy of the GNU General Public
License and the FreeRTOS license exception along with FreeRTOS; if not it
can be viewed here: http://www.freertos.org/a00114.html and also obtained
by writing to Richard Barry, contact details for whom are available on the
FreeRTOS WEB site.
1 tab == 4 spaces!
http://www.FreeRTOS.org - Documentation, latest information, license and
contact details.
http://www.SafeRTOS.com - A version that is certified for use in safety
critical systems.
http://www.OpenRTOS.com - Commercial support, development, porting,
licensing and training services.
*/
/* Hardware specific includes. */
#include "iodefine.h"
#include "typedefine.h"
#include "r_ether.h"
#include "phy.h"
/* FreeRTOS includes. */
#include "FreeRTOS.h"
#include "task.h"
#include "semphr.h"
/* uIP includes. */
#include "net/uip.h"
/* The time to wait between attempts to obtain a free buffer. */
#define emacBUFFER_WAIT_DELAY_ms ( 3 / portTICK_RATE_MS )
/* The number of times emacBUFFER_WAIT_DELAY_ms should be waited before giving
up on attempting to obtain a free buffer all together. */
#define emacBUFFER_WAIT_ATTEMPTS ( 30 )
/* The number of Rx descriptors. */
#define emacNUM_RX_DESCRIPTORS 8
/* The number of Tx descriptors. When using uIP there is not point in having
more than two. */
#define emacNUM_TX_BUFFERS 2
/* The total number of EMAC buffers to allocate. */
#define emacNUM_BUFFERS ( emacNUM_RX_DESCRIPTORS + emacNUM_TX_BUFFERS )
/* The time to wait for the Tx descriptor to become free. */
#define emacTX_WAIT_DELAY_ms ( 10 / portTICK_RATE_MS )
/* The total number of times to wait emacTX_WAIT_DELAY_ms for the Tx descriptor to
become free. */
#define emacTX_WAIT_ATTEMPTS ( 50 )
/* Only Rx end and Tx end interrupts are used by this driver. */
#define emacTX_END_INTERRUPT ( 1UL << 21UL )
#define emacRX_END_INTERRUPT ( 1UL << 18UL )
/*-----------------------------------------------------------*/
/* The buffers and descriptors themselves. */
#pragma section _RX_DESC
volatile ethfifo xRxDescriptors[ emacNUM_RX_DESCRIPTORS ];
#pragma section _TX_DESC
volatile ethfifo xTxDescriptors[ emacNUM_TX_BUFFERS ];
#pragma section _ETHERNET_BUFFERS
struct
{
unsigned long ulAlignmentVariable;
char cBuffer[ emacNUM_BUFFERS ][ UIP_BUFSIZE ];
} xEthernetBuffers;
#pragma section
/* Used to indicate which buffers are free and which are in use. If an index
contains 0 then the corresponding buffer in xEthernetBuffers is free, otherwise
the buffer is in use or about to be used. */
static unsigned char ucBufferInUse[ emacNUM_BUFFERS ];
/*-----------------------------------------------------------*/
/*
* Initialise both the Rx and Tx descriptors.
*/
static void prvInitialiseDescriptors( void );
/*
* Return a pointer to a free buffer within xEthernetBuffers.
*/
static unsigned char *prvGetNextBuffer( void );
/*
* Return a buffer to the list of free buffers.
*/
static void prvReturnBuffer( unsigned char *pucBuffer );
/*
* Examine the status of the next Rx FIFO to see if it contains new data.
*/
static unsigned long prvCheckRxFifoStatus( void );
/*
* Setup the microcontroller for communication with the PHY.
*/
static void prvResetMAC( void );
/*
* Configure the Ethernet interface peripherals.
*/
static void prvConfigureEtherCAndEDMAC( void );
/*
* Something has gone wrong with the descriptor usage. Reset all the buffers
* and descriptors.
*/
static void prvResetEverything( void );
/*-----------------------------------------------------------*/
/* Points to the Rx descriptor currently in use. */
static ethfifo *pxCurrentRxDesc = NULL;
/* The buffer used by the uIP stack to both receive and send. This points to
one of the Ethernet buffers when its actually in use. */
unsigned char *uip_buf = NULL;
/*-----------------------------------------------------------*/
void vInitEmac( void )
{
/* Software reset. */
prvResetMAC();
/* Set the Rx and Tx descriptors into their initial state. */
prvInitialiseDescriptors();
/* Set the MAC address into the ETHERC */
ETHERC.MAHR = ( ( unsigned long ) configMAC_ADDR0 << 24UL ) |
( ( unsigned long ) configMAC_ADDR1 << 16UL ) |
( ( unsigned long ) configMAC_ADDR2 << 8UL ) |
( unsigned long ) configMAC_ADDR3;
ETHERC.MALR.BIT.MA = ( ( unsigned long ) configMAC_ADDR4 << 8UL ) |
( unsigned long ) configMAC_ADDR5;
/* Perform rest of interface hardware configuration. */
prvConfigureEtherCAndEDMAC();
/* Nothing received yet, so uip_buf points nowhere. */
uip_buf = NULL;
/* Initialize the PHY */
phy_init();
}
/*-----------------------------------------------------------*/
void vEMACWrite( void )
{
long x;
/* Wait until the second transmission of the last packet has completed. */
for( x = 0; x < emacTX_WAIT_ATTEMPTS; x++ )
{
if( ( xTxDescriptors[ 1 ].status & ACT ) != 0 )
{
/* Descriptor is still active. */
vTaskDelay( emacTX_WAIT_DELAY_ms );
}
else
{
break;
}
}
/* Is the descriptor free after waiting for it? */
if( ( xTxDescriptors[ 1 ].status & ACT ) != 0 )
{
/* Something has gone wrong. */
prvResetEverything();
}
/* Setup both descriptors to transmit the frame. */
xTxDescriptors[ 0 ].buf_p = ( char * ) uip_buf;
xTxDescriptors[ 0 ].bufsize = uip_len;
xTxDescriptors[ 1 ].buf_p = ( char * ) uip_buf;
xTxDescriptors[ 1 ].bufsize = uip_len;
/* uip_buf is being sent by the Tx descriptor. Allocate a new buffer
for use by the stack. */
uip_buf = prvGetNextBuffer();
/* Clear previous settings and go. */
xTxDescriptors[0].status &= ~( FP1 | FP0 );
xTxDescriptors[0].status |= ( FP1 | FP0 | ACT );
xTxDescriptors[1].status &= ~( FP1 | FP0 );
xTxDescriptors[1].status |= ( FP1 | FP0 | ACT );
EDMAC.EDTRR.LONG = 0x00000001;
}
/*-----------------------------------------------------------*/
unsigned long ulEMACRead( void )
{
unsigned long ulBytesReceived;
ulBytesReceived = prvCheckRxFifoStatus();
if( ulBytesReceived > 0 )
{
/* Mark the pxDescriptor buffer as free as uip_buf is going to be set to
the buffer that contains the received data. */
prvReturnBuffer( uip_buf );
/* Point uip_buf to the data about ot be processed. */
uip_buf = ( void * ) pxCurrentRxDesc->buf_p;
/* Allocate a new buffer to the descriptor, as uip_buf is now using it's
old descriptor. */
pxCurrentRxDesc->buf_p = prvGetNextBuffer();
/* Prepare the descriptor to go again. */
pxCurrentRxDesc->status &= ~( FP1 | FP0 );
pxCurrentRxDesc->status |= ACT;
/* Move onto the next buffer in the ring. */
pxCurrentRxDesc = pxCurrentRxDesc->next;
if( EDMAC.EDRRR.LONG == 0x00000000L )
{
/* Restart Ethernet if it has stopped */
EDMAC.EDRRR.LONG = 0x00000001L;
}
}
return ulBytesReceived;
}
/*-----------------------------------------------------------*/
long lEMACWaitForLink( void )
{
long lReturn;
/* Set the link status. */
switch( phy_set_autonegotiate() )
{
/* Half duplex link */
case PHY_LINK_100H:
ETHERC.ECMR.BIT.DM = 0;
ETHERC.ECMR.BIT.RTM = 1;
lReturn = pdPASS;
break;
case PHY_LINK_10H:
ETHERC.ECMR.BIT.DM = 0;
ETHERC.ECMR.BIT.RTM = 0;
lReturn = pdPASS;
break;
/* Full duplex link */
case PHY_LINK_100F:
ETHERC.ECMR.BIT.DM = 1;
ETHERC.ECMR.BIT.RTM = 1;
lReturn = pdPASS;
break;
case PHY_LINK_10F:
ETHERC.ECMR.BIT.DM = 1;
ETHERC.ECMR.BIT.RTM = 0;
lReturn = pdPASS;
break;
default:
lReturn = pdFAIL;
break;
}
if( lReturn == pdPASS )
{
/* Enable receive and transmit. */
ETHERC.ECMR.BIT.RE = 1;
ETHERC.ECMR.BIT.TE = 1;
/* Enable EDMAC receive */
EDMAC.EDRRR.LONG = 0x1;
}
return lReturn;
}
/*-----------------------------------------------------------*/
static void prvInitialiseDescriptors( void )
{
ethfifo *pxDescriptor;
long x;
for( x = 0; x < emacNUM_BUFFERS; x++ )
{
/* Ensure none of the buffers are shown as in use at the start. */
ucBufferInUse[ x ] = pdFALSE;
}
/* Initialise the Rx descriptors. */
for( x = 0; x < emacNUM_RX_DESCRIPTORS; x++ )
{
pxDescriptor = &( xRxDescriptors[ x ] );
pxDescriptor->buf_p = &( xEthernetBuffers.cBuffer[ x ][ 0 ] );
pxDescriptor->bufsize = UIP_BUFSIZE;
pxDescriptor->size = 0;
pxDescriptor->status = ACT;
pxDescriptor->next = &xRxDescriptors[ x + 1 ];
/* Mark this buffer as in use. */
ucBufferInUse[ x ] = pdTRUE;
}
/* The last descriptor points back to the start. */
pxDescriptor->status |= DL;
pxDescriptor->next = &xRxDescriptors[ 0 ];
/* Initialise the Tx descriptors. */
for( x = 0; x < emacNUM_TX_BUFFERS; x++ )
{
pxDescriptor = &( xTxDescriptors[ x ] );
/* A buffer is not allocated to the Tx descriptor until a send is
actually required. */
pxDescriptor->buf_p = NULL;
pxDescriptor->bufsize = UIP_BUFSIZE;
pxDescriptor->size = 0;
pxDescriptor->status = 0;
pxDescriptor->next = &xTxDescriptors[ x + 1 ];
}
/* The last descriptor points back to the start. */
pxDescriptor->status |= DL;
pxDescriptor->next = &( xTxDescriptors[ 0 ] );
/* Use the first Rx descriptor to start with. */
pxCurrentRxDesc = &( xRxDescriptors[ 0 ] );
}
/*-----------------------------------------------------------*/
static unsigned char *prvGetNextBuffer( void )
{
long x;
unsigned char *pucReturn = NULL;
unsigned long ulAttempts = 0;
while( pucReturn == NULL )
{
/* Look through the buffers to find one that is not in use by
anything else. */
for( x = 0; x < emacNUM_BUFFERS; x++ )
{
if( ucBufferInUse[ x ] == pdFALSE )
{
ucBufferInUse[ x ] = pdTRUE;
pucReturn = ( unsigned char * ) &( xEthernetBuffers.cBuffer[ x ][ 0 ] );
break;
}
}
/* Was a buffer found? */
if( pucReturn == NULL )
{
ulAttempts++;
if( ulAttempts >= emacBUFFER_WAIT_ATTEMPTS )
{
break;
}
/* Wait then look again. */
vTaskDelay( emacBUFFER_WAIT_DELAY_ms );
}
}
return pucReturn;
}
/*-----------------------------------------------------------*/
static void prvReturnBuffer( unsigned char *pucBuffer )
{
unsigned long ul;
/* Return a buffer to the pool of free buffers. */
for( ul = 0; ul < emacNUM_BUFFERS; ul++ )
{
if( &( xEthernetBuffers.cBuffer[ ul ][ 0 ] ) == ( void * ) pucBuffer )
{
ucBufferInUse[ ul ] = pdFALSE;
break;
}
}
}
/*-----------------------------------------------------------*/
static void prvResetEverything( void )
{
/* Temporary code just to see if this gets called. This function has not
been implemented. */
portDISABLE_INTERRUPTS();
for( ;; );
}
/*-----------------------------------------------------------*/
static unsigned long prvCheckRxFifoStatus( void )
{
unsigned long ulReturn = 0;
if( ( pxCurrentRxDesc->status & ACT ) != 0 )
{
/* Current descriptor is still active. */
}
else if( ( pxCurrentRxDesc->status & FE ) != 0 )
{
/* Frame error. Clear the error. */
pxCurrentRxDesc->status &= ~( FP1 | FP0 | FE );
pxCurrentRxDesc->status &= ~( RMAF | RRF | RTLF | RTSF | PRE | CERF );
pxCurrentRxDesc->status |= ACT;
pxCurrentRxDesc = pxCurrentRxDesc->next;
if( EDMAC.EDRRR.LONG == 0x00000000UL )
{
/* Restart Ethernet if it has stopped. */
EDMAC.EDRRR.LONG = 0x00000001UL;
}
}
else
{
/* The descriptor contains a frame. Because of the size of the buffers
the frame should always be complete. */
if( ( pxCurrentRxDesc->status & FP0 ) == FP0 )
{
ulReturn = pxCurrentRxDesc->size;
}
else
{
/* Do not expect to get here. */
prvResetEverything();
}
}
return ulReturn;
}
/*-----------------------------------------------------------*/
static void prvResetMAC( void )
{
/* Ensure the EtherC and EDMAC are enabled. */
SYSTEM.MSTPCRB.BIT.MSTPB15 = 0;
vTaskDelay( 100 / portTICK_RATE_MS );
EDMAC.EDMR.BIT.SWR = 1;
/* Crude wait for reset to complete. */
vTaskDelay( 500 / portTICK_RATE_MS );
}
/*-----------------------------------------------------------*/
static void prvConfigureEtherCAndEDMAC( void )
{
/* Initialisation code taken from Renesas example project. */
/* TODO: Check bit 5 */
ETHERC.ECSR.LONG = 0x00000037; /* Clear all ETHERC statuS BFR, PSRTO, LCHNG, MPD, ICD */
/* Set the EDMAC interrupt priority. */
_IPR( _ETHER_EINT ) = configKERNEL_INTERRUPT_PRIORITY;
/* TODO: Check bit 5 */
/* Enable interrupts of interest only. */
EDMAC.EESIPR.LONG = emacTX_END_INTERRUPT | emacRX_END_INTERRUPT;
ETHERC.RFLR.LONG = 1518; /* Ether payload is 1500+ CRC */
ETHERC.IPGR.LONG = 0x00000014; /* Intergap is 96-bit time */
/* EDMAC */
EDMAC.EESR.LONG = 0x47FF0F9F; /* Clear all ETHERC and EDMAC status bits */
#ifdef __LIT
EDMAC.EDMR.BIT.DE = 1;
#endif
EDMAC.RDLAR = ( void * ) pxCurrentRxDesc; /* Initialaize Rx Descriptor List Address */
EDMAC.TDLAR = &( xTxDescriptors[ 0 ] ); /* Initialaize Tx Descriptor List Address */
EDMAC.TRSCER.LONG = 0x00000000; /* Copy-back status is RFE & TFE only */
EDMAC.TFTR.LONG = 0x00000000; /* Threshold of Tx_FIFO */
EDMAC.FDR.LONG = 0x00000000; /* Transmit fifo & receive fifo is 256 bytes */
EDMAC.RMCR.LONG = 0x00000003; /* Receive function is normal mode(continued) */
ETHERC.ECMR.BIT.PRM = 0; /* Ensure promiscuous mode is off. */
/* Enable the interrupt... */
_IEN( _ETHER_EINT ) = 1;
}
/*-----------------------------------------------------------*/
#pragma interrupt ( vEMAC_ISR_Handler( vect = VECT_ETHER_EINT, enable ) )
void vEMAC_ISR_Handler( void )
{
unsigned long ul = EDMAC.EESR.LONG;
long lHigherPriorityTaskWoken = pdFALSE;
extern xQueueHandle xEMACEventQueue;
const unsigned long ulRxEvent = uipETHERNET_RX_EVENT;
/* Has a Tx end occurred? */
if( ul & emacTX_END_INTERRUPT )
{
/* Only return the buffer to the pool once both Txes have completed. */
prvReturnBuffer( ( void * ) xTxDescriptors[ 0 ].buf_p );
EDMAC.EESR.LONG = emacTX_END_INTERRUPT;
}
/* Has an Rx end occurred? */
if( ul & emacRX_END_INTERRUPT )
{
/* Make sure the Ethernet task is not blocked waiting for a packet. */
xQueueSendFromISR( xEMACEventQueue, &ulRxEvent, &lHigherPriorityTaskWoken );
portYIELD_FROM_ISR( lHigherPriorityTaskWoken );
EDMAC.EESR.LONG = emacRX_END_INTERRUPT;
}
}

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@ -0,0 +1,277 @@
/**
* \addtogroup httpd
* @{
*/
/**
* \file
* Web server script interface
* \author
* Adam Dunkels <adam@sics.se>
*
*/
/*
* Copyright (c) 2001-2006, Adam Dunkels.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote
* products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* This file is part of the uIP TCP/IP stack.
*
* $Id: httpd-cgi.c,v 1.2 2006/06/11 21:46:37 adam Exp $
*
*/
#include "net/uip.h"
#include "net/psock.h"
#include "apps/httpd/httpd.h"
#include "apps/httpd/httpd-cgi.h"
#include "apps/httpd/httpd-fs.h"
#include <stdio.h>
#include <string.h>
#include "FreeRTOS.h"
#include "task.h"
HTTPD_CGI_CALL( file, "file-stats", file_stats );
HTTPD_CGI_CALL( tcp, "tcp-connections", tcp_stats );
HTTPD_CGI_CALL( net, "net-stats", net_stats );
HTTPD_CGI_CALL( rtos, "rtos-stats", rtos_stats );
HTTPD_CGI_CALL( run, "run-time", run_time );
HTTPD_CGI_CALL( io, "led-io", led_io );
static const struct httpd_cgi_call *calls[] = { &file, &tcp, &net, &rtos, &run, &io, NULL };
/*---------------------------------------------------------------------------*/
static PT_THREAD( nullfunction ( struct httpd_state *s, char *ptr ) )
{
PSOCK_BEGIN( &s->sout );
( void ) ptr;
( void ) PT_YIELD_FLAG;
PSOCK_END( &s->sout );
}
/*---------------------------------------------------------------------------*/
httpd_cgifunction httpd_cgi( char *name )
{
const struct httpd_cgi_call **f;
/* Find the matching name in the table, return the function. */
for( f = calls; *f != NULL; ++f )
{
if( strncmp((*f)->name, name, strlen((*f)->name)) == 0 )
{
return( *f )->function;
}
}
return nullfunction;
}
/*---------------------------------------------------------------------------*/
static unsigned short generate_file_stats( void *arg )
{
char *f = ( char * ) arg;
return sprintf( ( char * ) uip_appdata, "%5u", httpd_fs_count(f) );
}
/*---------------------------------------------------------------------------*/
static PT_THREAD( file_stats ( struct httpd_state *s, char *ptr ) )
{
PSOCK_BEGIN( &s->sout );
( void ) PT_YIELD_FLAG;
PSOCK_GENERATOR_SEND( &s->sout, generate_file_stats, strchr(ptr, ' ') + 1 );
PSOCK_END( &s->sout );
}
/*---------------------------------------------------------------------------*/
static const char closed[] = /* "CLOSED",*/ { 0x43, 0x4c, 0x4f, 0x53, 0x45, 0x44, 0 };
static const char syn_rcvd[] = /* "SYN-RCVD",*/ { 0x53, 0x59, 0x4e, 0x2d, 0x52, 0x43, 0x56, 0x44, 0 };
static const char syn_sent[] = /* "SYN-SENT",*/ { 0x53, 0x59, 0x4e, 0x2d, 0x53, 0x45, 0x4e, 0x54, 0 };
static const char established[] = /* "ESTABLISHED",*/ { 0x45, 0x53, 0x54, 0x41, 0x42, 0x4c, 0x49, 0x53, 0x48, 0x45, 0x44, 0 };
static const char fin_wait_1[] = /* "FIN-WAIT-1",*/ { 0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49, 0x54, 0x2d, 0x31, 0 };
static const char fin_wait_2[] = /* "FIN-WAIT-2",*/ { 0x46, 0x49, 0x4e, 0x2d, 0x57, 0x41, 0x49, 0x54, 0x2d, 0x32, 0 };
static const char closing[] = /* "CLOSING",*/ { 0x43, 0x4c, 0x4f, 0x53, 0x49, 0x4e, 0x47, 0 };
static const char time_wait[] = /* "TIME-WAIT,"*/ { 0x54, 0x49, 0x4d, 0x45, 0x2d, 0x57, 0x41, 0x49, 0x54, 0 };
static const char last_ack[] = /* "LAST-ACK"*/ { 0x4c, 0x41, 0x53, 0x54, 0x2d, 0x41, 0x43, 0x4b, 0 };
static const char *states[] = { closed, syn_rcvd, syn_sent, established, fin_wait_1, fin_wait_2, closing, time_wait, last_ack };
static unsigned short generate_tcp_stats( void *arg )
{
struct uip_conn *conn;
struct httpd_state *s = ( struct httpd_state * ) arg;
conn = &uip_conns[s->count];
return sprintf( ( char * ) uip_appdata,
"<tr><td>%d</td><td>%u.%u.%u.%u:%u</td><td>%s</td><td>%u</td><td>%u</td><td>%c %c</td></tr>\r\n", htons(conn->lport),
htons(conn->ripaddr.u16[0]) >> 8, htons(conn->ripaddr.u16[0]) & 0xff, htons(conn->ripaddr.u16[1]) >> 8,
htons(conn->ripaddr.u16[1]) & 0xff, htons(conn->rport), states[conn->tcpstateflags & UIP_TS_MASK], conn->nrtx, conn->timer,
(uip_outstanding(conn)) ? '*' : ' ', (uip_stopped(conn)) ? '!' : ' ' );
}
/*---------------------------------------------------------------------------*/
static PT_THREAD( tcp_stats ( struct httpd_state *s, char *ptr ) )
{
PSOCK_BEGIN( &s->sout );
( void ) ptr;
( void ) PT_YIELD_FLAG;
for( s->count = 0; s->count < UIP_CONNS; ++s->count )
{
if( (uip_conns[s->count].tcpstateflags & UIP_TS_MASK) != UIP_CLOSED )
{
PSOCK_GENERATOR_SEND( &s->sout, generate_tcp_stats, s );
}
}
PSOCK_END( &s->sout );
}
/*---------------------------------------------------------------------------*/
static unsigned short generate_net_stats( void *arg )
{
struct httpd_state *s = ( struct httpd_state * ) arg;
return sprintf( ( char * ) uip_appdata, "%5u\n", (( uip_stats_t * ) &uip_stat)[s->count] );
}
static PT_THREAD( net_stats ( struct httpd_state *s, char *ptr ) )
{
PSOCK_BEGIN( &s->sout );
( void ) ptr;
( void ) PT_YIELD_FLAG;
#if UIP_STATISTICS
for( s->count = 0; s->count < sizeof(uip_stat) / sizeof(uip_stats_t); ++s->count )
{
PSOCK_GENERATOR_SEND( &s->sout, generate_net_stats, s );
}
#endif /* UIP_STATISTICS */
PSOCK_END( &s->sout );
}
/*---------------------------------------------------------------------------*/
extern void vTaskList( signed char *pcWriteBuffer );
extern char *pcGetTaskStatusMessage( void );
static char cCountBuf[128];
long lRefreshCount = 0;
static unsigned short generate_rtos_stats( void *arg )
{
( void ) arg;
lRefreshCount++;
sprintf( cCountBuf, "<p><br>Refresh count = %d<p><br>%s", ( int ) lRefreshCount, pcGetTaskStatusMessage() );
vTaskList( uip_appdata );
strcat( uip_appdata, cCountBuf );
return strlen( uip_appdata );
}
/*---------------------------------------------------------------------------*/
static PT_THREAD( rtos_stats ( struct httpd_state *s, char *ptr ) )
{
PSOCK_BEGIN( &s->sout );
( void ) ptr;
( void ) PT_YIELD_FLAG;
PSOCK_GENERATOR_SEND( &s->sout, generate_rtos_stats, NULL );
PSOCK_END( &s->sout );
}
/*---------------------------------------------------------------------------*/
char *pcStatus;
unsigned long ulString;
static unsigned short generate_io_state( void *arg )
{
extern long lParTestGetLEDState( unsigned long ulLED );
( void ) arg;
/* Are the dynamically setable LEDs currently on or off? */
if( lParTestGetLEDState( 3 ) )
{
pcStatus = "checked";
}
else
{
pcStatus = "";
}
sprintf( uip_appdata, "<input type=\"checkbox\" name=\"LED0\" value=\"1\" %s>LED<p><p>", pcStatus );
return strlen( uip_appdata );
}
/*---------------------------------------------------------------------------*/
extern void vTaskGetRunTimeStats( signed char *pcWriteBuffer );
extern unsigned short usMaxJitter;
static char cJitterBuffer[ 200 ];
static unsigned short generate_runtime_stats( void *arg )
{
( void ) arg;
lRefreshCount++;
sprintf( cCountBuf, "<p><br>Refresh count = %d", ( int ) lRefreshCount );
#ifdef INCLUDE_HIGH_FREQUENCY_TIMER_TEST
{
sprintf( cJitterBuffer, "<p><br>Max high frequency timer jitter = %d peripheral clock periods.<p><br>", ( int ) usMaxJitter );
vTaskGetRunTimeStats( uip_appdata );
strcat( uip_appdata, cJitterBuffer );
}
#else
{
( void ) cJitterBuffer;
strcpy( uip_appdata, "<p>Run time stats are only available in the debug_with_optimisation build configuration.<p>" );
}
#endif
strcat( uip_appdata, cCountBuf );
return strlen( uip_appdata );
}
/*---------------------------------------------------------------------------*/
static PT_THREAD( run_time ( struct httpd_state *s, char *ptr ) )
{
PSOCK_BEGIN( &s->sout );
( void ) ptr;
( void ) PT_YIELD_FLAG;
PSOCK_GENERATOR_SEND( &s->sout, generate_runtime_stats, NULL );
PSOCK_END( &s->sout );
}
/*---------------------------------------------------------------------------*/
static PT_THREAD( led_io ( struct httpd_state *s, char *ptr ) )
{
PSOCK_BEGIN( &s->sout );
( void ) ptr;
( void ) PT_YIELD_FLAG;
PSOCK_GENERATOR_SEND( &s->sout, generate_io_state, NULL );
PSOCK_END( &s->sout );
}
/** @} */

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<html>
<body bgcolor="white">
<center>
<h1>404 - file not found</h1>
<h3>Go <a href="/">here</a> instead.</h3>
</center>
</body>
</html>

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html>
<head>
<title>FreeRTOS.org uIP WEB server demo</title>
</head>
<BODY onLoad="window.setTimeout(&quot;location.href='index.shtml'&quot;,100)">
<font face="arial">
Loading index.shtml. Click <a href="index.shtml">here</a> if not automatically redirected.
</font>
</font>
</body>
</html>

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html>
<head>
<title>FreeRTOS.org uIP WEB server demo</title>
</head>
<BODY onLoad="window.setTimeout(&quot;location.href='index.shtml'&quot;,2000)">
<font face="arial">
<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS Homepage</a> <b>|</b> <a href="io.shtml">IO</a> <b>|</b> <a href="logo.jpg">37K jpg</a>
<br><p>
<hr>
<br><p>
<h2>Task statistics</h2>
Page will refresh every 2 seconds.<p>
<font face="courier"><pre>Task State Priority Stack #<br>************************************************<br>
%! rtos-stats
</pre></font>
</font>
</body>
</html>

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html>
<head>
<title>FreeRTOS.org uIP WEB server demo</title>
</head>
<BODY>
<font face="arial">
<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS Homepage</a> <b>|</b> <a href="io.shtml">IO</a> <b>|</b> <a href="logo.jpg">37K jpg</a>
<br><p>
<hr>
<b>LED and LCD IO</b><br>
<p>
Use the check box to turn on or off LED 4, then click "Update IO".
<p>
<form name="aForm" action="/io.shtml" method="get">
%! led-io
<p>
<input type="submit" value="Update IO">
</form>
<br><p>
</font>
</body>
</html>

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html>
<head>
<title>FreeRTOS.org uIP WEB server demo</title>
</head>
<BODY onLoad="window.setTimeout(&quot;location.href='runtime.shtml'&quot;,2000)">
<font face="arial">
<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS Homepage</a> <b>|</b> <a href="io.shtml">IO</a> <b>|</b> <a href="logo.jpg">37K jpg</a>
<br><p>
<hr>
<br><p>
<h2>Run-time statistics</h2>
Page will refresh every 2 seconds.<p>
<font face="courier"><pre>Task Abs Time % Time<br>****************************************<br>
%! run-time
</pre></font>
</font>
</body>
</html>

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html>
<head>
<title>FreeRTOS.org uIP WEB server demo</title>
</head>
<BODY>
<font face="arial">
<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS Homepage</a> <b>|</b> <a href="io.shtml">IO</a> <b>|</b> <a href="logo.jpg">37K jpg</a>
<br><p>
<hr>
<br><p>
<h2>Network statistics</h2>
<table width="300" border="0">
<tr><td align="left"><font face="courier"><pre>
IP Packets received
Packets sent
Forwaded
Dropped
IP errors IP version/header length
IP length, high byte
IP length, low byte
IP fragments
Header checksum
Wrong protocol
ICMP Packets received
Packets sent
Packets dropped
Type errors
Checksum errors
TCP Packets received
Packets sent
Packets dropped
Checksum errors
Data packets without ACKs
Resets
Retransmissionsa
Syn to closed port
UDP Packets dropped
Packets received
Packets sent
Packets chkerr
No connection avaliable
</pre></font></td><td><font face="courier"><pre>%! net-stats
</pre></font></td></table>
</font>
</body>
</html>

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd">
<html>
<head>
<title>FreeRTOS.org uIP WEB server demo</title>
</head>
<BODY>
<font face="arial">
<a href="index.shtml">Task Stats</a> <b>|</b> <a href="runtime.shtml">Run Time Stats</a> <b>|</b> <a href="stats.shtml">TCP Stats</a> <b>|</b> <a href="tcp.shtml">Connections</a> <b>|</b> <a href="http://www.freertos.org/">FreeRTOS Homepage</a> <b>|</b> <a href="io.shtml">IO</a> <b>|</b> <a href="logo.jpg">37K jpg</a>
<br><p>
<hr>
<br>
<h2>Network connections</h2>
<p>
<table>
<tr><th>Local</th><th>Remote</th><th>State</th><th>Retransmissions</th><th>Timer</th><th>Flags</th></tr>
%! tcp-connections
</pre></font>
</font>
</body>
</html>

File diff suppressed because it is too large Load Diff

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#!/usr/bin/perl
open(OUTPUT, "> httpd-fsdata.c");
chdir("httpd-fs");
opendir(DIR, ".");
@files = grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);
closedir(DIR);
foreach $file (@files) {
if(-d $file && $file !~ /^\./) {
print "Processing directory $file\n";
opendir(DIR, $file);
@newfiles = grep { !/^\./ && !/(CVS|~)/ } readdir(DIR);
closedir(DIR);
printf "Adding files @newfiles\n";
@files = (@files, map { $_ = "$file/$_" } @newfiles);
next;
}
}
foreach $file (@files) {
if(-f $file) {
print "Adding file $file\n";
open(FILE, $file) || die "Could not open file $file\n";
binmode FILE;
$file =~ s-^-/-;
$fvar = $file;
$fvar =~ s-/-_-g;
$fvar =~ s-\.-_-g;
# for AVR, add PROGMEM here
print(OUTPUT "static const char data".$fvar."[] = {\n");
print(OUTPUT "\t/* $file */\n\t");
for($j = 0; $j < length($file); $j++) {
printf(OUTPUT "%#02x, ", unpack("C", substr($file, $j, 1)));
}
printf(OUTPUT "0,\n");
$i = 0;
while(read(FILE, $data, 1)) {
if($i == 0) {
print(OUTPUT "\t");
}
printf(OUTPUT "%#02x, ", unpack("C", $data));
$i++;
if($i == 10) {
print(OUTPUT "\n");
$i = 0;
}
}
print(OUTPUT "0};\n\n");
close(FILE);
push(@fvars, $fvar);
push(@pfiles, $file);
}
}
for($i = 0; $i < @fvars; $i++) {
$file = $pfiles[$i];
$fvar = $fvars[$i];
if($i == 0) {
$prevfile = "NULL";
} else {
$prevfile = "file" . $fvars[$i - 1];
}
print(OUTPUT "const struct httpd_fsdata_file file".$fvar."[] = {{$prevfile, data$fvar, ");
print(OUTPUT "data$fvar + ". (length($file) + 1) .", ");
print(OUTPUT "sizeof(data$fvar) - ". (length($file) + 1) ."}};\n\n");
}
print(OUTPUT "#define HTTPD_FS_ROOT file$fvars[$i - 1]\n\n");
print(OUTPUT "#define HTTPD_FS_NUMFILES $i\n");

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/******************************************************************************
* DISCLAIMER
* This software is supplied by Renesas Technology Corp. and is only
* intended for use with Renesas products. No other uses are authorized.
* This software is owned by Renesas Technology Corp. and is protected under
* all applicable laws, including copyright laws.
* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES
* REGARDING THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY,
* INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
* PARTICULAR PURPOSE AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY
* DISCLAIMED.
* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
* TECHNOLOGY CORP. NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES
* FOR ANY REASON RELATED TO THE THIS SOFTWARE, EVEN IF RENESAS OR ITS
* AFFILIATES HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
* Renesas reserves the right, without notice, to make changes to this
* software and to discontinue the availability of this software.
* By using this software, you agree to the additional terms and
* conditions found by accessing the following link:
* http://www.renesas.com/disclaimer
******************************************************************************
* Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
*******************************************************************************
* File Name : phy.c
* Version : 1.01
* Description : Ethernet PHY device driver
******************************************************************************
* History : DD.MM.YYYY Version Description
* : 15.02.2010 1.00 First Release
* : 06.04.2010 1.01 RX62N changes
******************************************************************************/
/******************************************************************************
Includes <System Includes> , "Project Includes"
******************************************************************************/
#include "iodefine.h"
#include "r_ether.h"
#include "phy.h"
#include "FreeRTOS.h"
#include "task.h"
/******************************************************************************
Typedef definitions
******************************************************************************/
/******************************************************************************
Macro definitions
******************************************************************************/
/******************************************************************************
Imported global variables and functions (from other files)
******************************************************************************/
/******************************************************************************
Exported global variables and functions (to be accessed by other files)
******************************************************************************/
/******************************************************************************
Private global variables and functions
******************************************************************************/
uint16_t _phy_read( uint16_t reg_addr );
void _phy_write( uint16_t reg_addr, uint16_t data );
void _phy_preamble( void );
void _phy_reg_set( uint16_t reg_addr, int32_t option );
void _phy_reg_read( uint16_t *data );
void _phy_reg_write( uint16_t data );
void _phy_ta_z0( void );
void _phy_ta_10( void );
void _phy_mii_write_1( void );
void _phy_mii_write_0( void );
/**
* External functions
*/
/******************************************************************************
* Function Name: phy_init
* Description : Resets Ethernet PHY device
* Arguments : none
* Return Value : none
******************************************************************************/
int16_t phy_init( void )
{
uint16_t reg;
uint32_t count;
/* Reset PHY */
_phy_write(BASIC_MODE_CONTROL_REG, 0x8000);
count = 0;
do
{
vTaskDelay( 2 / portTICK_RATE_MS );
reg = _phy_read(BASIC_MODE_CONTROL_REG);
count++;
} while (reg & 0x8000 && count < PHY_RESET_WAIT);
if( count < PHY_RESET_WAIT )
{
return R_PHY_OK;
}
return R_PHY_ERROR;
}
/******************************************************************************
* Function Name: phy_set_100full
* Description : Set Ethernet PHY device to 100 Mbps full duplex
* Arguments : none
* Return Value : none
******************************************************************************/
void phy_set_100full( void )
{
_phy_write(BASIC_MODE_CONTROL_REG, 0x2100);
}
/******************************************************************************
* Function Name: phy_set_10half
* Description : Sets Ethernet PHY device to 10 Mbps half duplexR
* Arguments : none
* Return Value : none
******************************************************************************/
void phy_set_10half( void )
{
_phy_write(BASIC_MODE_CONTROL_REG, 0x0000);
}
/******************************************************************************
* Function Name: phy_set_autonegotiate
* Description : Starts autonegotiate and reports the other side's
* : physical capability
* Arguments : none
* Return Value : bit 8 - Full duplex 100 mbps
* : bit 7 - Half duplex 100 mbps
* : bit 6 - Full duplex 10 mbps
* : bit 5 - Half duplex 10 mbps
* : bit 4:0 - Always set to 00001 (IEEE 802.3)
* : -1 if error
******************************************************************************/
int16_t phy_set_autonegotiate( void )
{
uint16_t reg;
uint32_t count;
_phy_write(AN_ADVERTISEMENT_REG, 0x01E1);
_phy_write(BASIC_MODE_CONTROL_REG, 0x1200);
count = 0;
do
{
reg = _phy_read(BASIC_MODE_STATUS_REG);
count++;
vTaskDelay( 100 / portTICK_RATE_MS );
/* Make sure we don't break out if reg just contains 0xffff. */
if( reg == 0xffff )
{
reg = 0;
}
} while (!(reg & 0x0020) && (count < PHY_AUTO_NEGOTIATON_WAIT));
if (count >= PHY_AUTO_NEGOTIATON_WAIT)
{
return R_PHY_ERROR;
}
else
{
/* Get the link partner response */
reg = (int16_t)_phy_read(AN_LINK_PARTNER_ABILITY_REG);
if (reg & ( 1 << 8 ) )
{
return PHY_LINK_100F;
}
if (reg & ( 1 << 7 ) )
{
return PHY_LINK_100H;
}
if (reg & ( 1 << 6 ) )
{
return PHY_LINK_10F;
}
if (reg & 1 << 5 )
{
return PHY_LINK_10H;
}
return (-1);
}
}
/**
* Internal functions
*/
/******************************************************************************
* Function Name: _phy_read
* Description : Reads a PHY register
* Arguments : reg_addr - address of the PHY register
* Return Value : read value
******************************************************************************/
uint16_t _phy_read( uint16_t reg_addr )
{
uint16_t data;
_phy_preamble();
_phy_reg_set( reg_addr, PHY_READ );
_phy_ta_z0();
_phy_reg_read( &data );
_phy_ta_z0();
return( data );
}
/******************************************************************************
* Function Name: _phy_write
* Description : Writes to a PHY register
* Arguments : reg_addr - address of the PHY register
* : data - value
* Return Value : none
******************************************************************************/
void _phy_write( uint16_t reg_addr, uint16_t data )
{
_phy_preamble();
_phy_reg_set( reg_addr, PHY_WRITE );
_phy_ta_10();
_phy_reg_write( data );
_phy_ta_z0();
}
/******************************************************************************
* Function Name: _phy_preamble
* Description : As preliminary preparation for access to the PHY module register,
* "1" is output via the MII management interface.
* Arguments : none
* Return Value : none
******************************************************************************/
void _phy_preamble( void )
{
int16_t i;
i = 32;
while( i > 0 )
{
_phy_mii_write_1();
i--;
}
}
/******************************************************************************
* Function Name: _phy_reg_set
* Description : Sets a PHY device to read or write mode
* Arguments : reg_addr - address of the PHY register
* : option - mode
* Return Value : none
******************************************************************************/
void _phy_reg_set( uint16_t reg_addr, int32_t option )
{
int32_t i;
uint16_t data;
data = 0;
data = (PHY_ST << 14); /* ST code */
if( option == PHY_READ )
{
data |= (PHY_READ << 12); /* OP code(RD) */
}
else
{
data |= (PHY_WRITE << 12); /* OP code(WT) */
}
data |= (PHY_ADDR << 7); /* PHY Address */
data |= (reg_addr << 2); /* Reg Address */
i = 14;
while( i > 0 )
{
if( (data & 0x8000) == 0 )
{
_phy_mii_write_0();
}
else
{
_phy_mii_write_1();
}
data <<= 1;
i--;
}
}
/******************************************************************************
* Function Name: _phy_reg_read
* Description : Reads PHY register through MII interface
* Arguments : data - pointer to store the data read
* Return Value : none
******************************************************************************/
void _phy_reg_read( uint16_t *data )
{
int32_t i, j;
uint16_t reg_data;
reg_data = 0;
i = 16;
while( i > 0 )
{
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000000;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000001;
}
reg_data <<= 1;
reg_data |= (uint16_t)((ETHERC.PIR.LONG & 0x00000008) >> 3); /* MDI read */
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000001;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000000;
}
i--;
}
*data = reg_data;
}
/******************************************************************************
* Function Name: _phy_reg_write
* Description : Writes to PHY register through MII interface
* Arguments : data - value to write
* Return Value : none
******************************************************************************/
void _phy_reg_write( uint16_t data )
{
int32_t i;
i = 16;
while( i > 0 )
{
if( (data & 0x8000) == 0 )
{
_phy_mii_write_0();
}
else
{
_phy_mii_write_1();
}
i--;
data <<= 1;
}
}
/******************************************************************************
* Function Name: _phy_ta_z0
* Description : Performs bus release so that PHY can drive data
* : for read operation
* Arguments : none
* Return Value : none
******************************************************************************/
void _phy_ta_z0( void )
{
int32_t j;
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000000;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000001;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000001;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000000;
}
}
/******************************************************************************
* Function Name: _phy_ta_10
* Description : Switches data bus so MII interface can drive data
* : for write operation
* Arguments : none
* Return Value : none
******************************************************************************/
void _phy_ta_10(void)
{
_phy_mii_write_1();
_phy_mii_write_0();
}
/******************************************************************************
* Function Name: _phy_mii_write_1
* Description : Outputs 1 to the MII interface
* Arguments : none
* Return Value : none
******************************************************************************/
void _phy_mii_write_1( void )
{
int32_t j;
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000006;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000007;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000007;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000006;
}
}
/******************************************************************************
* Function Name: _phy_mii_write_0
* Description : Outputs 0 to the MII interface
* Arguments : none
* Return Value : none
******************************************************************************/
void _phy_mii_write_0( void )
{
int32_t j;
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000002;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000003;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000003;
}
for(j = MDC_WAIT; j > 0; j--)
{
ETHERC.PIR.LONG = 0x00000002;
}
}

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/******************************************************************************
* DISCLAIMER
* Please refer to http://www.renesas.com/disclaimer
******************************************************************************
Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
*******************************************************************************
* File Name : phy.h
* Version : 1.02
* Description : Ethernet PHY device driver
******************************************************************************
* History : DD.MM.YYYY Version Description
* : 15.02.2010 1.00 First Release
* : 17.03.2010 1.01 Modification of macro definitions for access timing
* : 06.04.2010 1.02 RX62N changes
******************************************************************************/
#ifndef PHY_H
#define PHY_H
/******************************************************************************
Includes <System Includes> , "Project Includes"
******************************************************************************/
#include <stdint.h>
/******************************************************************************
Typedef definitions
******************************************************************************/
/******************************************************************************
Macro definitions
******************************************************************************/
/* Standard PHY Registers */
#define BASIC_MODE_CONTROL_REG 0
#define BASIC_MODE_STATUS_REG 1
#define PHY_IDENTIFIER1_REG 2
#define PHY_IDENTIFIER2_REG 3
#define AN_ADVERTISEMENT_REG 4
#define AN_LINK_PARTNER_ABILITY_REG 5
#define AN_EXPANSION_REG 6
/* Media Independent Interface */
#define PHY_ST 1
#define PHY_READ 2
#define PHY_WRITE 1
#define PHY_ADDR 0x1F
#define MDC_WAIT 2
/* PHY return definitions */
#define R_PHY_OK 0
#define R_PHY_ERROR -1
/* Auto-Negotiation Link Partner Status */
#define PHY_AN_LINK_PARTNER_100BASE 0x0180
#define PHY_AN_LINK_PARTNER_FULL 0x0140
#define PHY_AN_COMPLETE ( 1 << 5 )
/*
* Wait counter definitions of PHY-LSI initialization
* ICLK = 96MHz
*/
#define PHY_RESET_WAIT 0x00000020L
#define PHY_AUTO_NEGOTIATON_WAIT 75
#define PHY_AN_ENABLE 0x1200
#define PHY_AN_10_100_F_H 0xde1
/******************************************************************************
Variable Externs
******************************************************************************/
/******************************************************************************
Functions Prototypes
******************************************************************************/
/**
* External prototypes
**/
int16_t phy_init( void );
void phy_set_100full( void );
void phy_set_10half( void );
int16_t phy_set_autonegotiate( void );
#endif /* PHY_H */

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/******************************************************************************
* DISCLAIMER
* Please refer to http://www.renesas.com/disclaimer
******************************************************************************
Copyright (C) 2008. Renesas Technology Corp., All Rights Reserved.
*******************************************************************************
* File Name : r_ether.h
* Version : 1.02
* Description : Ethernet module device driver
******************************************************************************
* History : DD.MM.YYYY Version Description
* : 15.02.2010 1.00 First Release
* : 03.03.2010 1.01 Buffer size is aligned on the 32-byte boundary.
* : 04.06.2010 1.02 RX62N changes
******************************************************************************/
#ifndef R_ETHER_H
#define R_ETHER_H
/******************************************************************************
Includes <System Includes> , "Project Includes"
******************************************************************************/
#include <stdint.h>
/******************************************************************************
Typedef definitions
******************************************************************************/
struct Descriptor
{
__evenaccess uint32_t status;
#if __LIT
/* Little endian */
__evenaccess uint16_t size;
__evenaccess uint16_t bufsize;
#else
/* Big endian */
__evenaccess uint16_t bufsize;
__evenaccess uint16_t size;
#endif
int8_t *buf_p;
struct Descriptor *next;
};
typedef struct Descriptor ethfifo;
typedef enum _NETLNK
{
PHY_NO_LINK = 0,
PHY_LINK_10H,
PHY_LINK_10F,
PHY_LINK_100H,
PHY_LINK_100F
} NETLNK;
/******************************************************************************
Macro definitions
******************************************************************************/
#define BUFSIZE 256 /* Must be 32-bit aligned */
#define ENTRY 8 /* Number of RX and TX buffers */
#define ACT 0x80000000
#define DL 0x40000000
#define FP1 0x20000000
#define FP0 0x10000000
#define FE 0x08000000
#define RFOVER 0x00000200
#define RAD 0x00000100
#define RMAF 0x00000080
#define RRF 0x00000010
#define RTLF 0x00000008
#define RTSF 0x00000004
#define PRE 0x00000002
#define CERF 0x00000001
#define TAD 0x00000100
#define CND 0x00000008
#define DLC 0x00000004
#define CD 0x00000002
#define TRO 0x00000001
/**
* Renesas Ethernet API return defines
**/
#define R_ETHER_OK 0
#define R_ETHER_ERROR -1
/* Ether Interface definitions */
#define ETH_RMII_MODE 0
#define ETH_MII_MODE 1
/* Select Ether Interface Mode */
#define ETH_MODE_SEL ETH_MII_MODE
/******************************************************************************
Variable Externs
******************************************************************************/
/******************************************************************************
Functions Prototypes
******************************************************************************/
/**
* Renesas Ethernet API prototypes
**/
int32_t R_Ether_Open(uint32_t ch, uint8_t mac_addr[]);
int32_t R_Ether_Close(uint32_t ch);
int32_t R_Ether_Write(uint32_t ch, void *buf, uint32_t len);
int32_t R_Ether_Read(uint32_t ch, void *buf);
/**
* FreeRTOS Ethernet API prototypes.
*/
/*
* Configure all the ethernet components (MAC, DMA, PHY) ready for communication.
*/
void vInitEmac( void );
/*
* Auto negotiate the link, returning pass or fail depending on whether a link
* was established or not.
*/
long lEMACWaitForLink( void );
/*
* Check the Rx status, and return the number of bytes received if any.
*/
unsigned long ulEMACRead( void );
/*
* Send uip_len bytes from uip_buf to the Tx descriptors and initiate a Tx.
*/
void vEMACWrite( void );
/****************************************************/
/* Ethernet statistic collection data */
struct enet_stats
{
uint32_t rx_packets; /* total packets received */
uint32_t tx_packets; /* total packets transmitted */
uint32_t rx_errors; /* bad packets received */
uint32_t tx_errors; /* packet transmit problems */
uint32_t rx_dropped; /* no space in buffers */
uint32_t tx_dropped; /* no space available */
uint32_t multicast; /* multicast packets received */
uint32_t collisions;
/* detailed rx_errors: */
uint32_t rx_length_errors;
uint32_t rx_over_errors; /* receiver ring buffer overflow */
uint32_t rx_crc_errors; /* recved pkt with crc error */
uint32_t rx_frame_errors; /* recv'd frame alignment error */
uint32_t rx_fifo_errors; /* recv'r fifo overrun */
uint32_t rx_missed_errors; /* receiver missed packet */
/* detailed tx_errors */
uint32_t tx_aborted_errors;
uint32_t tx_carrier_errors;
uint32_t tx_fifo_errors;
uint32_t tx_heartbeat_errors;
uint32_t tx_window_errors;
};
struct ei_device
{
const int8_t *name;
uint8_t open;
uint8_t Tx_act;
uint8_t Rx_act;
uint8_t txing; /* Transmit Active */
uint8_t irqlock; /* EDMAC's interrupt disabled when '1'. */
uint8_t dmaing; /* EDMAC Active */
ethfifo *rxcurrent; /* current receive discripter */
ethfifo *txcurrent; /* current transmit discripter */
uint8_t save_irq; /* Original dev->irq value. */
struct enet_stats stat;
uint8_t mac_addr[6];
};
#endif /* R_ETHER_H */

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/**
* \addtogroup uipopt
* @{
*/
/**
* \name Project-specific configuration options
* @{
*
* uIP has a number of configuration options that can be overridden
* for each project. These are kept in a project-specific uip-conf.h
* file and all configuration names have the prefix UIP_CONF.
*/
/*
* Copyright (c) 2006, Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* This file is part of the uIP TCP/IP stack
*
* $Id: uip-conf.h,v 1.6 2006/06/12 08:00:31 adam Exp $
*/
/**
* \file
* An example uIP configuration file
* \author
* Adam Dunkels <adam@sics.se>
*/
#ifndef __UIP_CONF_H__
#define __UIP_CONF_H__
#define UIP_CONF_EXTERNAL_BUFFER
#define UIP_CONF_PROCESS_HTTPD_FORMS 1
/**
* 8 bit datatype
*
* This typedef defines the 8-bit type used throughout uIP.
*
* \hideinitializer
*/
typedef unsigned char u8_t;
/**
* 16 bit datatype
*
* This typedef defines the 16-bit type used throughout uIP.
*
* \hideinitializer
*/
typedef unsigned short u16_t;
typedef unsigned long u32_t;
/**
* Statistics datatype
*
* This typedef defines the dataype used for keeping statistics in
* uIP.
*
* \hideinitializer
*/
typedef unsigned short uip_stats_t;
/**
* Maximum number of TCP connections.
*
* \hideinitializer
*/
#define UIP_CONF_MAX_CONNECTIONS 40
/**
* Maximum number of listening TCP ports.
*
* \hideinitializer
*/
#define UIP_CONF_MAX_LISTENPORTS 40
/**
* uIP buffer size.
*
* \hideinitializer
*/
#define UIP_CONF_BUFFER_SIZE 1480
/**
* CPU byte order.
*
* \hideinitializer
*/
#ifdef __LIT
#define UIP_CONF_BYTE_ORDER UIP_LITTLE_ENDIAN
#else
#define UIP_CONF_BYTE_ORDER UIP_BIG_ENDIAN
#endif
/**
* Logging on or off
*
* \hideinitializer
*/
#define UIP_CONF_LOGGING 0
/**
* UDP support on or off
*
* \hideinitializer
*/
#define UIP_CONF_UDP 0
/**
* UDP checksums on or off
*
* \hideinitializer
*/
#define UIP_CONF_UDP_CHECKSUMS 1
/**
* uIP statistics on or off
*
* \hideinitializer
*/
#define UIP_CONF_STATISTICS 1
/* Here we include the header file for the application(s) we use in
our project. */
/*#include "smtp.h"*/
/*#include "hello-world.h"*/
/*#include "telnetd.h"*/
#include "webserver.h"
/*#include "dhcpc.h"*/
/*#include "resolv.h"*/
/*#include "webclient.h"*/
#define CCIF
#define CC_REGISTER_ARG
#endif /* __UIP_CONF_H__ */
/** @} */
/** @} */

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/*
* Copyright (c) 2002, Adam Dunkels.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials provided
* with the distribution.
* 3. The name of the author may not be used to endorse or promote
* products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* This file is part of the uIP TCP/IP stack
*
* $Id: webserver.h,v 1.2 2006/06/11 21:46:38 adam Exp $
*
*/
#ifndef __WEBSERVER_H__
#define __WEBSERVER_H__
#include "apps/httpd/httpd.h"
typedef struct httpd_state uip_tcp_appstate_t;
/* UIP_APPCALL: the name of the application function. This function
must return void and take no arguments (i.e., C type "void
appfunc(void)"). */
#define UIP_APPCALL httpd_appcall
#endif /* __WEBSERVER_H__ */