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Update SPI driver header to latest version.

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This commit is contained in:
Richard Barry 2009-06-20 16:43:26 +00:00
parent 01ffe66a83
commit 1f501bb518
1 changed files with 399 additions and 149 deletions
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548
Demo/Common/drivers/ST/STM32F10xFWLib/inc/stm32f10x_spi.h
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@ -1,202 +1,452 @@
/******************** (C) COPYRIGHT 2007 STMicroelectronics ******************** /**
* File Name : stm32f10x_spi.h ******************************************************************************
* Author : MCD Application Team * @file stm32f10x_spi.h
* Date First Issued : 09/29/2006 * @author MCD Application Team
* Description : This file contains all the functions prototypes for the * @version V3.0.0
* SPI firmware library. * @date 04/06/2009
******************************************************************************** * @brief This file contains all the functions prototypes for the SPI firmware
* History: * library.
* 04/02/2007: V0.2 ******************************************************************************
* 02/05/2007: V0.1 * @copy
* 09/29/2006: V0.01 *
******************************************************************************** * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. *
*******************************************************************************/ * <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
*/
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_SPI_H #ifndef __STM32F10x_SPI_H
#define __STM32F10x_SPI_H #define __STM32F10x_SPI_H
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
//#include "stm32f10x.h"
#include "stm32f10x_map.h" #include "stm32f10x_map.h"
/* Exported types ------------------------------------------------------------*/ #define uint16_t unsigned short
/* SPI Init structure definition */ #define uint8_t unsigned char
#define uint32_t unsigned long
#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)
#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00)
#define SPI3 ((SPI_TypeDef *) SPI3_BASE)
#define GPIO_Remap_SPI3 ( 1UL << 28UL )
/** @addtogroup StdPeriph_Driver
* @{
*/
/** @addtogroup SPI
* @{
*/
/** @defgroup SPI_Exported_Types
* @{
*/
/**
* @brief SPI Init structure definition
*/
typedef struct typedef struct
{ {
u16 SPI_Direction; uint16_t SPI_Direction;
u16 SPI_Mode; uint16_t SPI_Mode;
u16 SPI_DataSize; uint16_t SPI_DataSize;
u16 SPI_CPOL; uint16_t SPI_CPOL;
u16 SPI_CPHA; uint16_t SPI_CPHA;
u16 SPI_NSS; uint16_t SPI_NSS;
u16 SPI_BaudRatePrescaler; uint16_t SPI_BaudRatePrescaler;
u16 SPI_FirstBit; uint16_t SPI_FirstBit;
u16 SPI_CRCPolynomial; uint16_t SPI_CRCPolynomial;
}SPI_InitTypeDef; }SPI_InitTypeDef;
/* Exported constants --------------------------------------------------------*/ /**
/* SPI data direction mode */ * @brief I2S Init structure definition
#define SPI_Direction_2Lines_FullDuplex ((u16)0x0000) */
#define SPI_Direction_2Lines_RxOnly ((u16)0x0400)
#define SPI_Direction_1Line_Rx ((u16)0x8000)
#define SPI_Direction_1Line_Tx ((u16)0xC000)
#define IS_SPI_DIRECTION_MODE(MODE) ((MODE == SPI_Direction_2Lines_FullDuplex) || \ typedef struct
(MODE == SPI_Direction_2Lines_RxOnly) || \ {
(MODE == SPI_Direction_1Line_Rx) || \ uint16_t I2S_Mode;
(MODE == SPI_Direction_1Line_Tx)) uint16_t I2S_Standard;
uint16_t I2S_DataFormat;
uint16_t I2S_MCLKOutput;
uint16_t I2S_AudioFreq;
uint16_t I2S_CPOL;
}I2S_InitTypeDef;
/* SPI master/slave mode */ /**
#define SPI_Mode_Master ((u16)0x0104) * @}
#define SPI_Mode_Slave ((u16)0x0000) */
#define IS_SPI_MODE(MODE) ((MODE == SPI_Mode_Master) || \ /** @defgroup SPI_Exported_Constants
(MODE == SPI_Mode_Slave)) * @{
*/
/* SPI data size */ #define IS_SPI_ALL_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == SPI1_BASE) || \
#define SPI_DataSize_16b ((u16)0x0800) ((*(uint32_t*)&(PERIPH)) == SPI2_BASE) || \
#define SPI_DataSize_8b ((u16)0x0000) ((*(uint32_t*)&(PERIPH)) == SPI3_BASE))
#define IS_SPI_23_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == SPI2_BASE) || \
((*(uint32_t*)&(PERIPH)) == SPI3_BASE))
#define IS_SPI_DATASIZE(DATASIZE) ((DATASIZE == SPI_DataSize_16b) || \ /** @defgroup SPI_data_direction_mode
(DATASIZE == SPI_DataSize_8b)) * @{
*/
/* SPI Clock Polarity */ #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
#define SPI_CPOL_Low ((u16)0x0000) #define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
#define SPI_CPOL_High ((u16)0x0002) #define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
#define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
((MODE) == SPI_Direction_2Lines_RxOnly) || \
((MODE) == SPI_Direction_1Line_Rx) || \
((MODE) == SPI_Direction_1Line_Tx))
/**
* @}
*/
#define IS_SPI_CPOL(CPOL) ((CPOL == SPI_CPOL_Low) || \ /** @defgroup SPI_master_slave_mode
(CPOL == SPI_CPOL_High)) * @{
*/
/* SPI Clock Phase */ #define SPI_Mode_Master ((uint16_t)0x0104)
#define SPI_CPHA_1Edge ((u16)0x0000) #define SPI_Mode_Slave ((uint16_t)0x0000)
#define SPI_CPHA_2Edge ((u16)0x0001) #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
((MODE) == SPI_Mode_Slave))
/**
* @}
*/
#define IS_SPI_CPHA(CPHA) ((CPHA == SPI_CPHA_1Edge) || \ /** @defgroup SPI_data_size
(CPHA == SPI_CPHA_2Edge)) * @{
*/
/* SPI Slave Select management */ #define SPI_DataSize_16b ((uint16_t)0x0800)
#define SPI_NSS_Soft ((u16)0x0200) #define SPI_DataSize_8b ((uint16_t)0x0000)
#define SPI_NSS_Hard ((u16)0x0000) #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
((DATASIZE) == SPI_DataSize_8b))
/**
* @}
*/
#define IS_SPI_NSS(NSS) ((NSS == SPI_NSS_Soft) || \ /** @defgroup SPI_Clock_Polarity
(NSS == SPI_NSS_Hard)) * @{
*/
/* SPI BaudRate Prescaler */ #define SPI_CPOL_Low ((uint16_t)0x0000)
#define SPI_BaudRatePrescaler_2 ((u16)0x0000) #define SPI_CPOL_High ((uint16_t)0x0002)
#define SPI_BaudRatePrescaler_4 ((u16)0x0008) #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
#define SPI_BaudRatePrescaler_8 ((u16)0x0010) ((CPOL) == SPI_CPOL_High))
#define SPI_BaudRatePrescaler_16 ((u16)0x0018) /**
#define SPI_BaudRatePrescaler_32 ((u16)0x0020) * @}
#define SPI_BaudRatePrescaler_64 ((u16)0x0028) */
#define SPI_BaudRatePrescaler_128 ((u16)0x0030)
#define SPI_BaudRatePrescaler_256 ((u16)0x0038)
#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) ((PRESCALER == SPI_BaudRatePrescaler_2) || \ /** @defgroup SPI_Clock_Phase
(PRESCALER == SPI_BaudRatePrescaler_4) || \ * @{
(PRESCALER == SPI_BaudRatePrescaler_8) || \ */
(PRESCALER == SPI_BaudRatePrescaler_16) || \
(PRESCALER == SPI_BaudRatePrescaler_32) || \
(PRESCALER == SPI_BaudRatePrescaler_64) || \
(PRESCALER == SPI_BaudRatePrescaler_128) || \
(PRESCALER == SPI_BaudRatePrescaler_256))
/* SPI MSB/LSB transmission */ #define SPI_CPHA_1Edge ((uint16_t)0x0000)
#define SPI_FirstBit_MSB ((u16)0x0000) #define SPI_CPHA_2Edge ((uint16_t)0x0001)
#define SPI_FirstBit_LSB ((u16)0x0080) #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
((CPHA) == SPI_CPHA_2Edge))
/**
* @}
*/
#define IS_SPI_FIRST_BIT(BIT) ((BIT == SPI_FirstBit_MSB) || \ /** @defgroup SPI_Slave_Select_management
(BIT == SPI_FirstBit_LSB)) * @{
*/
/* SPI DMA transfer requests */ #define SPI_NSS_Soft ((uint16_t)0x0200)
#define SPI_DMAReq_Tx ((u16)0x0002) #define SPI_NSS_Hard ((uint16_t)0x0000)
#define SPI_DMAReq_Rx ((u16)0x0001) #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
((NSS) == SPI_NSS_Hard))
/**
* @}
*/
#define IS_SPI_DMA_REQ(REQ) (((REQ & (u16)0xFFFC) == 0x00) && (REQ != 0x00)) /** @defgroup SPI_BaudRate_Prescaler_
* @{
*/
/* SPI NSS internal software mangement */ #define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
#define SPI_NSSInternalSoft_Set ((u16)0x0100) #define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
#define SPI_NSSInternalSoft_Reset ((u16)0xFEFF) #define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
((PRESCALER) == SPI_BaudRatePrescaler_4) || \
((PRESCALER) == SPI_BaudRatePrescaler_8) || \
((PRESCALER) == SPI_BaudRatePrescaler_16) || \
((PRESCALER) == SPI_BaudRatePrescaler_32) || \
((PRESCALER) == SPI_BaudRatePrescaler_64) || \
((PRESCALER) == SPI_BaudRatePrescaler_128) || \
((PRESCALER) == SPI_BaudRatePrescaler_256))
/**
* @}
*/
#define IS_SPI_NSS_INTERNAL(INTERNAL) ((INTERNAL == SPI_NSSInternalSoft_Set) || \ /** @defgroup SPI_MSB_LSB_transmission
(INTERNAL == SPI_NSSInternalSoft_Reset)) * @{
*/
/* SPI CRC Transmit/Receive */ #define SPI_FirstBit_MSB ((uint16_t)0x0000)
#define SPI_CRC_Tx ((u8)0x00) #define SPI_FirstBit_LSB ((uint16_t)0x0080)
#define SPI_CRC_Rx ((u8)0x01) #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
((BIT) == SPI_FirstBit_LSB))
/**
* @}
*/
#define IS_SPI_CRC(CRC) ((CRC == SPI_CRC_Tx) || (CRC == SPI_CRC_Rx)) /** @defgroup I2S_Mode
* @{
*/
/* SPI direction transmit/receive */ #define I2S_Mode_SlaveTx ((uint16_t)0x0000)
#define SPI_Direction_Rx ((u16)0xBFFF) #define I2S_Mode_SlaveRx ((uint16_t)0x0100)
#define SPI_Direction_Tx ((u16)0x4000) #define I2S_Mode_MasterTx ((uint16_t)0x0200)
#define I2S_Mode_MasterRx ((uint16_t)0x0300)
#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
((MODE) == I2S_Mode_SlaveRx) || \
((MODE) == I2S_Mode_MasterTx) || \
((MODE) == I2S_Mode_MasterRx) )
/**
* @}
*/
#define IS_SPI_DIRECTION(DIRECTION) ((DIRECTION == SPI_Direction_Rx) || \ /** @defgroup I2S_Standard
(DIRECTION == SPI_Direction_Tx)) * @{
*/
/* SPI interrupts definition */ #define I2S_Standard_Phillips ((uint16_t)0x0000)
#define SPI_IT_TXE ((u8)0x71) #define I2S_Standard_MSB ((uint16_t)0x0010)
#define SPI_IT_RXNE ((u8)0x60) #define I2S_Standard_LSB ((uint16_t)0x0020)
#define SPI_IT_ERR ((u8)0x50) #define I2S_Standard_PCMShort ((uint16_t)0x0030)
#define I2S_Standard_PCMLong ((uint16_t)0x00B0)
#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
((STANDARD) == I2S_Standard_MSB) || \
((STANDARD) == I2S_Standard_LSB) || \
((STANDARD) == I2S_Standard_PCMShort) || \
((STANDARD) == I2S_Standard_PCMLong))
/**
* @}
*/
#define IS_SPI_CONFIG_IT(IT) ((IT == SPI_IT_TXE) || (IT == SPI_IT_RXNE) || \ /** @defgroup I2S_Data_Format
(IT == SPI_IT_ERR)) * @{
*/
#define SPI_IT_OVR ((u8)0x56) #define I2S_DataFormat_16b ((uint16_t)0x0000)
#define SPI_IT_MODF ((u8)0x55) #define I2S_DataFormat_16bextended ((uint16_t)0x0001)
#define SPI_IT_CRCERR ((u8)0x54) #define I2S_DataFormat_24b ((uint16_t)0x0003)
#define I2S_DataFormat_32b ((uint16_t)0x0005)
#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
((FORMAT) == I2S_DataFormat_16bextended) || \
((FORMAT) == I2S_DataFormat_24b) || \
((FORMAT) == I2S_DataFormat_32b))
/**
* @}
*/
#define IS_SPI_CLEAR_IT(IT) ((IT == SPI_IT_OVR) || (IT == SPI_IT_MODF) || \ /** @defgroup I2S_MCLK_Output
(IT == SPI_IT_CRCERR)) * @{
*/
#define IS_SPI_GET_IT(IT) ((IT == SPI_IT_TXE) || (IT == SPI_IT_RXNE) || \ #define I2S_MCLKOutput_Enable ((uint16_t)0x0200)
(IT == SPI_IT_OVR) || (IT == SPI_IT_MODF) || \ #define I2S_MCLKOutput_Disable ((uint16_t)0x0000)
(IT == SPI_IT_CRCERR)) #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
((OUTPUT) == I2S_MCLKOutput_Disable))
/**
* @}
*/
/* SPI flags definition */ /** @defgroup I2S_Audio_Frequency
#define SPI_FLAG_RXNE ((u16)0x0001) * @{
#define SPI_FLAG_TXE ((u16)0x0002) */
#define SPI_FLAG_CRCERR ((u16)0x0010)
#define SPI_FLAG_MODF ((u16)0x0020)
#define SPI_FLAG_OVR ((u16)0x0040)
#define SPI_FLAG_BSY ((u16)0x0080)
#define IS_SPI_CLEAR_FLAG(FLAG) (((FLAG & (u16)0xFF8F) == 0x00) && (FLAG != 0x00)) #define I2S_AudioFreq_48k ((uint16_t)48000)
#define IS_SPI_GET_FLAG(FLAG) ((FLAG == SPI_FLAG_BSY) || (FLAG == SPI_FLAG_OVR) || \ #define I2S_AudioFreq_44k ((uint16_t)44100)
(FLAG == SPI_FLAG_MODF) || (FLAG == SPI_FLAG_CRCERR) || \ #define I2S_AudioFreq_22k ((uint16_t)22050)
(FLAG == SPI_FLAG_TXE) || (FLAG == SPI_FLAG_RXNE)) #define I2S_AudioFreq_16k ((uint16_t)16000)
#define I2S_AudioFreq_8k ((uint16_t)8000)
#define I2S_AudioFreq_Default ((uint16_t)2)
#define IS_I2S_AUDIO_FREQ(FREQ) (((FREQ) == I2S_AudioFreq_48k) || \
((FREQ) == I2S_AudioFreq_44k) || \
((FREQ) == I2S_AudioFreq_22k) || \
((FREQ) == I2S_AudioFreq_16k) || \
((FREQ) == I2S_AudioFreq_8k) || \
((FREQ) == I2S_AudioFreq_Default))
/**
* @}
*/
/* SPI CRC polynomial --------------------------------------------------------*/ /** @defgroup I2S_Clock_Polarity
#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (POLYNOMIAL >= 0x1) * @{
*/
/* Exported macro ------------------------------------------------------------*/ #define I2S_CPOL_Low ((uint16_t)0x0000)
/* Exported functions ------------------------------------------------------- */ #define I2S_CPOL_High ((uint16_t)0x0008)
void SPI_DeInit(SPI_TypeDef* SPIx); #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
((CPOL) == I2S_CPOL_High))
/**
* @}
*/
/** @defgroup SPI_I2S_DMA_transfer_requests
* @{
*/
#define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)
#define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)
#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
/**
* @}
*/
/** @defgroup SPI_NSS_internal_software_mangement
* @{
*/
#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
((INTERNAL) == SPI_NSSInternalSoft_Reset))
/**
* @}
*/
/** @defgroup SPI_CRC_Transmit_Receive
* @{
*/
#define SPI_CRC_Tx ((uint8_t)0x00)
#define SPI_CRC_Rx ((uint8_t)0x01)
#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
/**
* @}
*/
/** @defgroup SPI_direction_transmit_receive
* @{
*/
#define SPI_Direction_Rx ((uint16_t)0xBFFF)
#define SPI_Direction_Tx ((uint16_t)0x4000)
#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
((DIRECTION) == SPI_Direction_Tx))
/**
* @}
*/
/** @defgroup SPI_I2S_interrupts_definition
* @{
*/
#define SPI_I2S_IT_TXE ((uint8_t)0x71)
#define SPI_I2S_IT_RXNE ((uint8_t)0x60)
#define SPI_I2S_IT_ERR ((uint8_t)0x50)
#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
((IT) == SPI_I2S_IT_RXNE) || \
((IT) == SPI_I2S_IT_ERR))
#define SPI_I2S_IT_OVR ((uint8_t)0x56)
#define SPI_IT_MODF ((uint8_t)0x55)
#define SPI_IT_CRCERR ((uint8_t)0x54)
#define I2S_IT_UDR ((uint8_t)0x53)
#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \
((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))
/**
* @}
*/
/** @defgroup SPI_I2S_flags_definition
* @{
*/
#define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)
#define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)
#define I2S_FLAG_CHSIDE ((uint16_t)0x0004)
#define I2S_FLAG_UDR ((uint16_t)0x0008)
#define SPI_FLAG_CRCERR ((uint16_t)0x0010)
#define SPI_FLAG_MODF ((uint16_t)0x0020)
#define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)
#define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)
#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
/**
* @}
*/
/** @defgroup SPI_CRC_polynomial
* @{
*/
#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
/**
* @}
*/
/**
* @}
*/
/** @defgroup SPI_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup SPI_Exported_Functions
* @{
*/
void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct); void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct); void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState); void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
void SPI_ITConfig(SPI_TypeDef* SPIx, u8 SPI_IT, FunctionalState NewState); void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
void SPI_DMACmd(SPI_TypeDef* SPIx, u16 SPI_DMAReq, FunctionalState NewState); void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
void SPI_SendData(SPI_TypeDef* SPIx, u16 Data); void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
u16 SPI_ReceiveData(SPI_TypeDef* SPIx); void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, u16 SPI_NSSInternalSoft); uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState); void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, u16 SPI_DataSize); void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
void SPI_TransmitCRC(SPI_TypeDef* SPIx); void SPI_TransmitCRC(SPI_TypeDef* SPIx);
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState); void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
u16 SPI_GetCRC(SPI_TypeDef* SPIx, u8 SPI_CRC); uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
u16 SPI_GetCRCPolynomial(SPI_TypeDef* SPIx); uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, u16 SPI_Direction); void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
FlagStatus SPI_GetFlagStatus(SPI_TypeDef* SPIx, u16 SPI_FLAG); FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
void SPI_ClearFlag(SPI_TypeDef* SPIx, u16 SPI_FLAG); void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
ITStatus SPI_GetITStatus(SPI_TypeDef* SPIx, u8 SPI_IT); ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
void SPI_ClearITPendingBit(SPI_TypeDef* SPIx, u8 SPI_IT); void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
#endif /*__STM32F10x_SPI_H */ #endif /*__STM32F10x_SPI_H */
/**
* @}
*/
/******************* (C) COPYRIGHT 2007 STMicroelectronics *****END OF FILE****/ /**
* @}
*/
/**
* @}
*/
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/