Style: Add uncrustify guards, fix asm (#136)

Co-authored-by: Alfred Gedeon <gedeonag@amazon.com>
This commit is contained in:
alfred gedeon 2020-08-24 15:32:02 -07:00 committed by GitHub
parent a038146915
commit 0afc048cf2
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11 changed files with 142 additions and 195 deletions

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@ -22,16 +22,17 @@
* https://www.FreeRTOS.org * https://www.FreeRTOS.org
* https://github.com/FreeRTOS * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -138,9 +139,11 @@ extern void vPortExitCritical( void );
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) #define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
/* *INDENT-ON* */
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

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@ -22,7 +22,6 @@
* https://www.FreeRTOS.org * https://www.FreeRTOS.org
* https://github.com/FreeRTOS * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H

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@ -186,16 +186,10 @@ __asm void prvPortStartFirstTask( void )
movs r0, # 2 /* Switch to the psp stack. */ movs r0, # 2 /* Switch to the psp stack. */
msr CONTROL, r0 msr CONTROL, r0
isb isb
pop { pop { r0 - r5 } /* Pop the registers that are saved automatically. */
r0 - r5
} /* Pop the registers that are saved automatically. */
mov lr, r5 /* lr is now in r5. */ mov lr, r5 /* lr is now in r5. */
pop { pop { r3 } /* The return address is now in r3. */
r3 pop { r2 } /* Pop and discard the XPSR. */
} /* The return address is now in r3. */
pop {
r2
} /* Pop and discard the XPSR. */
cpsie i /* The first task has its context and interrupts can be enabled. */ cpsie i /* The first task has its context and interrupts can be enabled. */
bx r3 /* Finally, jump to the user defined task code. */ bx r3 /* Finally, jump to the user defined task code. */
@ -272,16 +266,20 @@ void vPortExitCritical( void )
__asm uint32_t ulSetInterruptMaskFromISR( void ) __asm uint32_t ulSetInterruptMaskFromISR( void )
{ {
/* *INDENT-OFF* */
mrs r0, PRIMASK mrs r0, PRIMASK
cpsid i cpsid i
bx lr bx lr
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
__asm void vClearInterruptMaskFromISR( uint32_t ulMask ) __asm void vClearInterruptMaskFromISR( uint32_t ulMask )
{ {
/* *INDENT-OFF* */
msr PRIMASK, r0 msr PRIMASK, r0
bx lr bx lr
/* *INDENT-ON* */
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -300,33 +298,23 @@ __asm void xPortPendSVHandler( void )
subs r0, # 32 /* Make space for the remaining low registers. */ subs r0, # 32 /* Make space for the remaining low registers. */
str r0, [ r2 ] /* Save the new top of stack. */ str r0, [ r2 ] /* Save the new top of stack. */
stmia r0 !, { stmia r0 !, { r4 - r7 } /* Store the low registers that are not saved automatically. */
r4 - r7
} /* Store the low registers that are not saved automatically. */
mov r4, r8 /* Store the high registers. */ mov r4, r8 /* Store the high registers. */
mov r5, r9 mov r5, r9
mov r6, r10 mov r6, r10
mov r7, r11 mov r7, r11
stmia r0 !, { stmia r0 !, { r4 - r7 }
r4 - r7
}
push { push { r3, r14 }
r3, r14
}
cpsid i cpsid i
bl vTaskSwitchContext bl vTaskSwitchContext
cpsie i cpsie i
pop { pop { r2, r3 } /* lr goes in r3. r2 now holds tcb pointer. */
r2, r3
} /* lr goes in r3. r2 now holds tcb pointer. */
ldr r1, [ r2 ] ldr r1, [ r2 ]
ldr r0, [ r1 ] /* The first item in pxCurrentTCB is the task top of stack. */ ldr r0, [ r1 ] /* The first item in pxCurrentTCB is the task top of stack. */
adds r0, # 16 /* Move to the high registers. */ adds r0, # 16 /* Move to the high registers. */
ldmia r0 !, { ldmia r0 !, { r4 - r7 } /* Pop the high registers. */
r4 - r7
} /* Pop the high registers. */
mov r8, r4 mov r8, r4
mov r9, r5 mov r9, r5
mov r10, r6 mov r10, r6
@ -335,9 +323,7 @@ __asm void xPortPendSVHandler( void )
msr psp, r0 /* Remember the new top of stack for the task. */ msr psp, r0 /* Remember the new top of stack for the task. */
subs r0, # 32 /* Go back for the low registers that are not automatically restored. */ subs r0, # 32 /* Go back for the low registers that are not automatically restored. */
ldmia r0 !, { ldmia r0 !, { r4 - r7 } /* Pop low registers. */
r4 - r7
} /* Pop low registers. */
bx r3 bx r3
ALIGN ALIGN

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@ -22,16 +22,17 @@
* https://www.FreeRTOS.org * https://www.FreeRTOS.org
* https://github.com/FreeRTOS * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -113,8 +114,10 @@
#define portNOP() #define portNOP()
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
/* *INDENT-ON* */
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

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@ -218,9 +218,7 @@ __asm void vPortSVCHandler( void )
ldr r3, = pxCurrentTCB /* Restore the context. */ ldr r3, = pxCurrentTCB /* Restore the context. */
ldr r1, [ r3 ] /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */ ldr r1, [ r3 ] /* Use pxCurrentTCBConst to get the pxCurrentTCB address. */
ldr r0, [ r1 ] /* The first item in pxCurrentTCB is the task top of stack. */ ldr r0, [ r1 ] /* The first item in pxCurrentTCB is the task top of stack. */
ldmia r0 !, { ldmia r0 !, { r4 - r11 } /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
r4 - r11
} /* Pop the registers that are not automatically saved on exception entry and the critical nesting count. */
msr psp, r0 /* Restore the task stack pointer. */ msr psp, r0 /* Restore the task stack pointer. */
isb isb
mov r0, # 0 mov r0, # 0
@ -400,14 +398,10 @@ __asm void xPortPendSVHandler( void )
ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */ ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */
ldr r2, [ r3 ] ldr r2, [ r3 ]
stmdb r0 !, { stmdb r0 !, { r4 - r11 } /* Save the remaining registers. */
r4 - r11
} /* Save the remaining registers. */
str r0, [ r2 ] /* Save the new top of stack into the first member of the TCB. */ str r0, [ r2 ] /* Save the new top of stack into the first member of the TCB. */
stmdb sp !, { stmdb sp !, { r3, r14 }
r3, r14
}
mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
msr basepri, r0 msr basepri, r0
dsb dsb
@ -415,15 +409,11 @@ __asm void xPortPendSVHandler( void )
bl vTaskSwitchContext bl vTaskSwitchContext
mov r0, #0 mov r0, #0
msr basepri, r0 msr basepri, r0
ldmia sp !, { ldmia sp !, { r3, r14 }
r3, r14
}
ldr r1, [ r3 ] ldr r1, [ r3 ]
ldr r0, [ r1 ] /* The first item in pxCurrentTCB is the task top of stack. */ ldr r0, [ r1 ] /* The first item in pxCurrentTCB is the task top of stack. */
ldmia r0 !, { ldmia r0 !, { r4 - r11 } /* Pop the registers and the critical nesting count. */
r4 - r11
} /* Pop the registers and the critical nesting count. */
msr psp, r0 msr psp, r0
isb isb
bx r14 bx r14

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@ -22,16 +22,17 @@
* https://www.FreeRTOS.org * https://www.FreeRTOS.org
* https://github.com/FreeRTOS * https://github.com/FreeRTOS
* *
* 1 tab == 4 spaces!
*/ */
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -170,7 +171,9 @@
{ {
/* Barrier instructions are not used as this function is only used to /* Barrier instructions are not used as this function is only used to
* lower the BASEPRI value. */ * lower the BASEPRI value. */
/* *INDENT-OFF* */
msr basepri, ulBASEPRI msr basepri, ulBASEPRI
/* *INDENT-ON* */
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -183,9 +186,11 @@
{ {
/* Set BASEPRI to the max syscall priority to effect a critical /* Set BASEPRI to the max syscall priority to effect a critical
* section. */ * section. */
/* *INDENT-OFF* */
msr basepri, ulNewBASEPRI msr basepri, ulNewBASEPRI
dsb dsb
isb isb
/* *INDENT-ON* */
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -197,7 +202,9 @@
/* Set BASEPRI to 0 so no interrupts are masked. This function is only /* Set BASEPRI to 0 so no interrupts are masked. This function is only
* used to lower the mask in an interrupt, so memory barriers are not * used to lower the mask in an interrupt, so memory barriers are not
* used. */ * used. */
/* *INDENT-OFF* */
msr basepri, # 0 msr basepri, # 0
/* *INDENT-ON* */
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -210,10 +217,12 @@
{ {
/* Set BASEPRI to the max syscall priority to effect a critical /* Set BASEPRI to the max syscall priority to effect a critical
* section. */ * section. */
/* *INDENT-OFF* */
mrs ulReturn, basepri mrs ulReturn, basepri
msr basepri, ulNewBASEPRI msr basepri, ulNewBASEPRI
dsb dsb
isb isb
/* *INDENT-ON* */
} }
return ulReturn; return ulReturn;
@ -228,7 +237,9 @@
/* Obtain the number of the currently executing interrupt. */ /* Obtain the number of the currently executing interrupt. */
__asm __asm
{ {
/* *INDENT-OFF* */
mrs ulCurrentInterrupt, ipsr mrs ulCurrentInterrupt, ipsr
/* *INDENT-ON* */
} }
if( ulCurrentInterrupt == 0 ) if( ulCurrentInterrupt == 0 )
@ -244,8 +255,10 @@
} }
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
/* *INDENT-ON* */
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

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@ -247,9 +247,7 @@ __asm void vPortSVCHandler( void )
ldr r1, [ r3 ] ldr r1, [ r3 ]
ldr r0, [ r1 ] ldr r0, [ r1 ]
/* Pop the core registers. */ /* Pop the core registers. */
ldmia r0 !, { ldmia r0 !, {r4-r11,r14}
r4 - r11, r14
}
msr psp, r0 msr psp, r0
isb isb
mov r0, # 0 mov r0, # 0
@ -470,21 +468,15 @@ __asm void xPortPendSVHandler( void )
/* Is the task using the FPU context? If so, push high vfp registers. */ /* Is the task using the FPU context? If so, push high vfp registers. */
tst r14, #0x10 tst r14, #0x10
it eq it eq
vstmdbeq r0 !, { vstmdbeq r0!, {s16-s31}
s16 - s31
}
/* Save the core registers. */ /* Save the core registers. */
stmdb r0 !, { stmdb r0!, {r4-r11, r14}
r4 - r11, r14
}
/* Save the new top of stack into the first member of the TCB. */ /* Save the new top of stack into the first member of the TCB. */
str r0, [ r2 ] str r0, [ r2 ]
stmdb sp !, { stmdb sp!, {r0, r3}
r0, r3
}
mov r0, # configMAX_SYSCALL_INTERRUPT_PRIORITY mov r0, # configMAX_SYSCALL_INTERRUPT_PRIORITY
msr basepri, r0 msr basepri, r0
dsb dsb
@ -492,37 +484,27 @@ __asm void xPortPendSVHandler( void )
bl vTaskSwitchContext bl vTaskSwitchContext
mov r0, # 0 mov r0, # 0
msr basepri, r0 msr basepri, r0
ldmia sp !, { ldmia sp!, {r0, r3}
r0, r3
}
/* The first item in pxCurrentTCB is the task top of stack. */ /* The first item in pxCurrentTCB is the task top of stack. */
ldr r1, [ r3 ] ldr r1, [ r3 ]
ldr r0, [ r1 ] ldr r0, [ r1 ]
/* Pop the core registers. */ /* Pop the core registers. */
ldmia r0 !, { ldmia r0!, {r4-r11, r14}
r4 - r11, r14
}
/* Is the task using the FPU context? If so, pop the high vfp registers /* Is the task using the FPU context? If so, pop the high vfp registers
* too. */ * too. */
tst r14, # 0x10 tst r14, # 0x10
it eq it eq
vldmiaeq r0 !, { vldmiaeq r0!, {s16-s31}
s16 - s31
}
msr psp, r0 msr psp, r0
isb isb
#ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */ #ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */
#if WORKAROUND_PMU_CM001 == 1 #if WORKAROUND_PMU_CM001 == 1
push { push { r14 }
r14 pop { pc }
}
pop {
pc
}
nop nop
#endif #endif
#endif #endif

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@ -28,10 +28,12 @@
#ifndef PORTMACRO_H #ifndef PORTMACRO_H
#define PORTMACRO_H #define PORTMACRO_H
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* *INDENT-ON* */
/*----------------------------------------------------------- /*-----------------------------------------------------------
* Port specific definitions. * Port specific definitions.
@ -170,7 +172,9 @@
{ {
/* Barrier instructions are not used as this function is only used to /* Barrier instructions are not used as this function is only used to
* lower the BASEPRI value. */ * lower the BASEPRI value. */
/* *INDENT-OFF* */
msr basepri, ulBASEPRI msr basepri, ulBASEPRI
/* *INDENT-ON* */
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -183,9 +187,11 @@
{ {
/* Set BASEPRI to the max syscall priority to effect a critical /* Set BASEPRI to the max syscall priority to effect a critical
* section. */ * section. */
/* *INDENT-OFF* */
msr basepri, ulNewBASEPRI msr basepri, ulNewBASEPRI
dsb dsb
isb isb
/* *INDENT-ON* */
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -197,7 +203,9 @@
/* Set BASEPRI to 0 so no interrupts are masked. This function is only /* Set BASEPRI to 0 so no interrupts are masked. This function is only
* used to lower the mask in an interrupt, so memory barriers are not * used to lower the mask in an interrupt, so memory barriers are not
* used. */ * used. */
/* *INDENT-OFF* */
msr basepri, # 0 msr basepri, # 0
/* *INDENT-ON* */
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -210,10 +218,12 @@
{ {
/* Set BASEPRI to the max syscall priority to effect a critical /* Set BASEPRI to the max syscall priority to effect a critical
* section. */ * section. */
/* *INDENT-OFF* */
mrs ulReturn, basepri mrs ulReturn, basepri
msr basepri, ulNewBASEPRI msr basepri, ulNewBASEPRI
dsb dsb
isb isb
/* *INDENT-ON* */
} }
return ulReturn; return ulReturn;
@ -228,7 +238,9 @@
/* Obtain the number of the currently executing interrupt. */ /* Obtain the number of the currently executing interrupt. */
__asm __asm
{ {
/* *INDENT-OFF* */
mrs ulCurrentInterrupt, ipsr mrs ulCurrentInterrupt, ipsr
/* *INDENT-ON* */
} }
if( ulCurrentInterrupt == 0 ) if( ulCurrentInterrupt == 0 )
@ -243,9 +255,10 @@
return xReturn; return xReturn;
} }
/* *INDENT-OFF* */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
/* *INDENT-ON* */
#endif /* PORTMACRO_H */ #endif /* PORTMACRO_H */

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@ -281,9 +281,11 @@ void prvSVCHandler( uint32_t * pulParam )
{ {
__asm __asm
{ {
/* *INDENT-OFF* */
mrs ulReg, control /* Obtain current control value. */ mrs ulReg, control /* Obtain current control value. */
bic ulReg, # 1 /* Set privilege bit. */ bic ulReg, # 1 /* Set privilege bit. */
msr control, ulReg /* Write back new control value. */ msr control, ulReg /* Write back new control value. */
/* *INDENT-ON* */
} }
} }
@ -292,9 +294,11 @@ void prvSVCHandler( uint32_t * pulParam )
case portSVC_RAISE_PRIVILEGE: case portSVC_RAISE_PRIVILEGE:
__asm __asm
{ {
/* *INDENT-OFF* */
mrs ulReg, control /* Obtain current control value. */ mrs ulReg, control /* Obtain current control value. */
bic ulReg, # 1 /* Set privilege bit. */ bic ulReg, # 1 /* Set privilege bit. */
msr control, ulReg /* Write back new control value. */ msr control, ulReg /* Write back new control value. */
/* *INDENT-ON* */
} }
break; break;
#endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */ #endif /* #if( configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY == 1 ) */
@ -348,26 +352,14 @@ __asm void prvRestoreContextOfFirstTask( void )
str r3, [ r2 ] /* Disable MPU. */ str r3, [ r2 ] /* Disable MPU. */
ldr r2, =0xe000ed9c /* Region Base Address register. */ ldr r2, =0xe000ed9c /* Region Base Address register. */
ldmia r1 !, { ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
r4 - r11 stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
stmia r2, {
r4 - r11
} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
#if ( portTOTAL_NUM_REGIONS == 16 ) #if ( portTOTAL_NUM_REGIONS == 16 )
ldmia r1 !, { ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
r4 - r11 stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */ ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
stmia r2, { stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
r4 - r11
} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
ldmia r1 !, {
r4 - r11
} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
stmia r2, {
r4 - r11
} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
#endif /* portTOTAL_NUM_REGIONS == 16. */ #endif /* portTOTAL_NUM_REGIONS == 16. */
ldr r2, =0xe000ed94 /* MPU_CTRL register. */ ldr r2, =0xe000ed94 /* MPU_CTRL register. */
@ -376,9 +368,7 @@ __asm void prvRestoreContextOfFirstTask( void )
str r3, [ r2 ] /* Enable MPU. */ str r3, [ r2 ] /* Enable MPU. */
dsb /* Force memory writes before continuing. */ dsb /* Force memory writes before continuing. */
ldmia r0 !, { ldmia r0 !, { r3 - r11, r14 } /* Pop the registers that are not automatically saved on exception entry. */
r3 - r11, r14
} /* Pop the registers that are not automatically saved on exception entry. */
msr control, r3 msr control, r3
msr psp, r0 /* Restore the task stack pointer. */ msr psp, r0 /* Restore the task stack pointer. */
mov r0, #0 mov r0, #0
@ -571,19 +561,13 @@ __asm void xPortPendSVHandler( void )
tst r14, #0x10 /* Is the task using the FPU context? If so, push high vfp registers. */ tst r14, #0x10 /* Is the task using the FPU context? If so, push high vfp registers. */
it eq it eq
vstmdbeq r0 !, { vstmdbeq r0 !, { s16 - s31 }
s16 - s31
}
mrs r1, control mrs r1, control
stmdb r0 !, { stmdb r0 !, { r1, r4 - r11, r14 } /* Save the remaining registers. */
r1, r4 - r11, r14
} /* Save the remaining registers. */
str r0, [ r2 ] /* Save the new top of stack into the first member of the TCB. */ str r0, [ r2 ] /* Save the new top of stack into the first member of the TCB. */
stmdb sp !, { stmdb sp !, { r0, r3 }
r0, r3
}
mov r0, # configMAX_SYSCALL_INTERRUPT_PRIORITY mov r0, # configMAX_SYSCALL_INTERRUPT_PRIORITY
msr basepri, r0 msr basepri, r0
dsb dsb
@ -591,9 +575,7 @@ __asm void xPortPendSVHandler( void )
bl vTaskSwitchContext bl vTaskSwitchContext
mov r0, #0 mov r0, #0
msr basepri, r0 msr basepri, r0
ldmia sp !, { ldmia sp !, { r0, r3 }
r0, r3
}
/* Restore the context. */ /* Restore the context. */
ldr r1, [ r3 ] ldr r1, [ r3 ]
ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */ ldr r0, [ r1 ] /* The first item in the TCB is the task top of stack. */
@ -606,26 +588,14 @@ __asm void xPortPendSVHandler( void )
str r3, [ r2 ] /* Disable MPU. */ str r3, [ r2 ] /* Disable MPU. */
ldr r2, =0xe000ed9c /* Region Base Address register. */ ldr r2, =0xe000ed9c /* Region Base Address register. */
ldmia r1 !, { ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
r4 - r11 stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
} /* Read 4 sets of MPU registers [MPU Region # 4 - 7]. */
stmia r2, {
r4 - r11
} /* Write 4 sets of MPU registers [MPU Region # 4 - 7]. */
#if ( portTOTAL_NUM_REGIONS == 16 ) #if ( portTOTAL_NUM_REGIONS == 16 )
ldmia r1 !, { ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */
r4 - r11 stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
} /* Read 4 sets of MPU registers [MPU Region # 8 - 11]. */ ldmia r1 !, { r4 - r11 } /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
stmia r2, { stmia r2, { r4 - r11 } /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
r4 - r11
} /* Write 4 sets of MPU registers. [MPU Region # 8 - 11]. */
ldmia r1 !, {
r4 - r11
} /* Read 4 sets of MPU registers [MPU Region # 12 - 15]. */
stmia r2, {
r4 - r11
} /* Write 4 sets of MPU registers. [MPU Region # 12 - 15]. */
#endif /* portTOTAL_NUM_REGIONS == 16. */ #endif /* portTOTAL_NUM_REGIONS == 16. */
ldr r2, =0xe000ed94 /* MPU_CTRL register. */ ldr r2, =0xe000ed94 /* MPU_CTRL register. */
@ -634,16 +604,12 @@ __asm void xPortPendSVHandler( void )
str r3, [ r2 ] /* Enable MPU. */ str r3, [ r2 ] /* Enable MPU. */
dsb /* Force memory writes before continuing. */ dsb /* Force memory writes before continuing. */
ldmia r0 !, { ldmia r0 !, { r3 - r11, r14 } /* Pop the registers that are not automatically saved on exception entry. */
r3 - r11, r14
} /* Pop the registers that are not automatically saved on exception entry. */
msr control, r3 msr control, r3
tst r14, #0x10 /* Is the task using the FPU context? If so, pop the high vfp registers too. */ tst r14, #0x10 /* Is the task using the FPU context? If so, pop the high vfp registers too. */
it eq it eq
vldmiaeq r0 !, { vldmiaeq r0 !, { s16 - s31 }
s16 - s31
}
msr psp, r0 msr psp, r0
bx r14 bx r14

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@ -241,9 +241,7 @@ __asm void vPortSVCHandler( void )
ldr r1, [ r3 ] ldr r1, [ r3 ]
ldr r0, [ r1 ] ldr r0, [ r1 ]
/* Pop the core registers. */ /* Pop the core registers. */
ldmia r0 !, { ldmia r0 !, { r4 - r11, r14 }
r4 - r11, r14
}
msr psp, r0 msr psp, r0
isb isb
mov r0, #0 mov r0, #0
@ -455,21 +453,15 @@ __asm void xPortPendSVHandler( void )
/* Is the task using the FPU context? If so, push high vfp registers. */ /* Is the task using the FPU context? If so, push high vfp registers. */
tst r14, #0x10 tst r14, #0x10
it eq it eq
vstmdbeq r0 !, { vstmdbeq r0 !, { s16 - s31 }
s16 - s31
}
/* Save the core registers. */ /* Save the core registers. */
stmdb r0 !, { stmdb r0 !, { r4 - r11, r14 }
r4 - r11, r14
}
/* Save the new top of stack into the first member of the TCB. */ /* Save the new top of stack into the first member of the TCB. */
str r0, [ r2 ] str r0, [ r2 ]
stmdb sp !, { stmdb sp !, { r0, r3 }
r0, r3
}
mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
cpsid i cpsid i
msr basepri, r0 msr basepri, r0
@ -479,37 +471,27 @@ __asm void xPortPendSVHandler( void )
bl vTaskSwitchContext bl vTaskSwitchContext
mov r0, #0 mov r0, #0
msr basepri, r0 msr basepri, r0
ldmia sp !, { ldmia sp !, { r0, r3 }
r0, r3
}
/* The first item in pxCurrentTCB is the task top of stack. */ /* The first item in pxCurrentTCB is the task top of stack. */
ldr r1, [ r3 ] ldr r1, [ r3 ]
ldr r0, [ r1 ] ldr r0, [ r1 ]
/* Pop the core registers. */ /* Pop the core registers. */
ldmia r0 !, { ldmia r0 !, { r4 - r11, r14 }
r4 - r11, r14
}
/* Is the task using the FPU context? If so, pop the high vfp registers /* Is the task using the FPU context? If so, pop the high vfp registers
* too. */ * too. */
tst r14, #0x10 tst r14, #0x10
it eq it eq
vldmiaeq r0 !, { vldmiaeq r0 !, { s16 - s31 }
s16 - s31
}
msr psp, r0 msr psp, r0
isb isb
#ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */ #ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */
#if WORKAROUND_PMU_CM001 == 1 #if WORKAROUND_PMU_CM001 == 1
push { push { r14 }
r14 pop { pc }
}
pop {
pc
}
nop nop
#endif #endif
#endif #endif

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@ -170,7 +170,9 @@
{ {
/* Barrier instructions are not used as this function is only used to /* Barrier instructions are not used as this function is only used to
* lower the BASEPRI value. */ * lower the BASEPRI value. */
/* *INDENT-OFF* */
msr basepri, ulBASEPRI msr basepri, ulBASEPRI
/* *INDENT-ON* */
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -183,11 +185,13 @@
{ {
/* Set BASEPRI to the max syscall priority to effect a critical /* Set BASEPRI to the max syscall priority to effect a critical
* section. */ * section. */
/* *INDENT-OFF* */
cpsid i cpsid i
msr basepri, ulNewBASEPRI msr basepri, ulNewBASEPRI
dsb dsb
isb isb
cpsie i cpsie i
/* *INDENT-ON* */
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -199,7 +203,9 @@
/* Set BASEPRI to 0 so no interrupts are masked. This function is only /* Set BASEPRI to 0 so no interrupts are masked. This function is only
* used to lower the mask in an interrupt, so memory barriers are not * used to lower the mask in an interrupt, so memory barriers are not
* used. */ * used. */
/* *INDENT-OFF* */
msr basepri, # 0 msr basepri, # 0
/* *INDENT-ON* */
} }
} }
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -212,12 +218,14 @@
{ {
/* Set BASEPRI to the max syscall priority to effect a critical /* Set BASEPRI to the max syscall priority to effect a critical
* section. */ * section. */
/* *INDENT-OFF* */
mrs ulReturn, basepri mrs ulReturn, basepri
cpsid i cpsid i
msr basepri, ulNewBASEPRI msr basepri, ulNewBASEPRI
dsb dsb
isb isb
cpsie i cpsie i
/* *INDENT-ON* */
} }
return ulReturn; return ulReturn;
@ -232,7 +240,9 @@
/* Obtain the number of the currently executing interrupt. */ /* Obtain the number of the currently executing interrupt. */
__asm __asm
{ {
/* *INDENT-OFF* */
mrs ulCurrentInterrupt, ipsr mrs ulCurrentInterrupt, ipsr
/* *INDENT-ON* */
} }
if( ulCurrentInterrupt == 0 ) if( ulCurrentInterrupt == 0 )