Temporarily revert the AVR32 port back to the V6.0.5 files. Work will continue on the reverted files following the next release.
This commit is contained in:
Richard Barry
parent
ef35a4aab1
commit
0615862c9e
File diff suppressed because it is too large
Load Diff
@ -1,8 +0,0 @@
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<?xml version="1.0" encoding="UTF-8"?>
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||||
<?fileVersion 1.0.0?>
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||||
<framework-data>
|
||||
<options>
|
||||
</options>
|
||||
<files>
|
||||
</files>
|
||||
</framework-data>
|
||||
@ -1,70 +0,0 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>RTOSDemo</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
<dictionary>
|
||||
<key>?name?</key>
|
||||
<value></value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.append_environment</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.buildArguments</key>
|
||||
<value></value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.buildCommand</key>
|
||||
<value>make</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.buildLocation</key>
|
||||
<value>${workspace_loc:/FreeRTOS6/Debug}</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.contents</key>
|
||||
<value>org.eclipse.cdt.make.core.activeConfigSettings</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.enableAutoBuild</key>
|
||||
<value>false</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.enableCleanBuild</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.enableFullBuild</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.stopOnError</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
<dictionary>
|
||||
<key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
|
||||
<value>true</value>
|
||||
</dictionary>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>com.atmel.avr32.core.nature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
</natures>
|
||||
</projectDescription>
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||||
@ -1,4 +0,0 @@
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||||
#Wed Dec 02 11:26:33 GMT 2009
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Search.Terms=
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SelectedWatchables=
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eclipse.preferences.version=1
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||||
@ -1,6 +0,0 @@
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#Sun Jun 13 13:55:07 BST 2010
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eclipse.preferences.version=1
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||||
project.part.id=UC3A0512
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||||
project.secured=false
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||||
project.secured.flash=0
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||||
project.secured.ram=0
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||||
@ -1,330 +0,0 @@
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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
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/*This file is prepared for Doxygen automatic documentation generation.*/
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/*! \file *********************************************************************
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*
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* \brief AT32UC3A EVK1100 board header file.
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*
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||||
* This file contains definitions and services related to the features of the
|
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* EVK1100 board rev. B and C.
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*
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* To use this board, define BOARD=EVK1100.
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*
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* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
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* - Supported devices: All AVR32 AT32UC3A devices can be used.
|
||||
* - AppNote:
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*
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||||
* \author Atmel Corporation: http://www.atmel.com \n
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||||
* Support and FAQ: http://support.atmel.no/
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||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
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||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
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||||
*/
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||||
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||||
#ifndef _EVK1100_H_
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#define _EVK1100_H_
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#ifdef EVK1100_REVA
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# include "evk1100_revA.h"
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#else
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#include "compiler.h"
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#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
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# include "led.h"
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#endif // __AVR32_ABI_COMPILER__
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/*! \name Oscillator Definitions
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*/
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||||
//! @{
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// RCOsc has no custom calibration by default. Set the following definition to
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// the appropriate value if a custom RCOsc calibration has been applied to your
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// part.
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//#define FRCOSC AVR32_PM_RCOSC_FREQUENCY //!< RCOsc frequency: Hz.
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#define FOSC32 32768 //!< Osc32 frequency: Hz.
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#define OSC32_STARTUP AVR32_PM_OSCCTRL32_STARTUP_8192_RCOSC //!< Osc32 startup time: RCOsc periods.
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#define FOSC0 12000000 //!< Osc0 frequency: Hz.
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#define OSC0_STARTUP AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC //!< Osc0 startup time: RCOsc periods.
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// Osc1 crystal is not mounted by default. Set the following definitions to the
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// appropriate values if a custom Osc1 crystal is mounted on your board.
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//#define FOSC1 12000000 //!< Osc1 frequency: Hz.
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//#define OSC1_STARTUP AVR32_PM_OSCCTRL1_STARTUP_2048_RCOSC //!< Osc1 startup time: RCOsc periods.
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//! @}
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|
||||
/*! \name SDRAM Definitions
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*/
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//! @{
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|
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//! Part header file of used SDRAM(s).
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||||
#define SDRAM_PART_HDR "MT48LC16M16A2TG7E/mt48lc16m16a2tg7e.h"
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|
||||
//! Data bus width to use the SDRAM(s) with (16 or 32 bits; always 16 bits on
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//! UC3).
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#define SDRAM_DBW 16
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//! @}
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||||
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/*! \name USB Definitions
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||||
*/
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//! @{
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//! Multiplexed pin used for USB_ID: AVR32_USBB_USB_ID_x_x.
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//! To be selected according to the AVR32_USBB_USB_ID_x_x_PIN and
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//! AVR32_USBB_USB_ID_x_x_FUNCTION definitions from <avr32/uc3axxxx.h>.
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#define USB_ID AVR32_USBB_USB_ID_0_0
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//! Multiplexed pin used for USB_VBOF: AVR32_USBB_USB_VBOF_x_x.
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//! To be selected according to the AVR32_USBB_USB_VBOF_x_x_PIN and
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//! AVR32_USBB_USB_VBOF_x_x_FUNCTION definitions from <avr32/uc3axxxx.h>.
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#define USB_VBOF AVR32_USBB_USB_VBOF_0_1
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||||
//! Active level of the USB_VBOF output pin.
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#define USB_VBOF_ACTIVE_LEVEL LOW
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//! USB overcurrent detection pin.
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#define USB_OVERCURRENT_DETECT_PIN AVR32_PIN_PX33
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||||
//! @}
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||||
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||||
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||||
//! GPIO connection of the MAC PHY PWR_DOWN/INT signal.
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#define MACB_INTERRUPT_PIN AVR32_PIN_PA24
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||||
//! Number of LEDs.
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#define LED_COUNT 8
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||||
/*! \name GPIO Connections of LEDs
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||||
*/
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||||
//! @{
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#define LED0_GPIO AVR32_PIN_PB27
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#define LED1_GPIO AVR32_PIN_PB28
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#define LED2_GPIO AVR32_PIN_PB29
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#define LED3_GPIO AVR32_PIN_PB30
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||||
#define LED4_GPIO AVR32_PIN_PB19
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#define LED5_GPIO AVR32_PIN_PB20
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#define LED6_GPIO AVR32_PIN_PB21
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#define LED7_GPIO AVR32_PIN_PB22
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//! @}
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||||
|
||||
/*! \name PWM Channels of LEDs
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||||
*/
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||||
//! @{
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#define LED0_PWM (-1)
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||||
#define LED1_PWM (-1)
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||||
#define LED2_PWM (-1)
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||||
#define LED3_PWM (-1)
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||||
#define LED4_PWM 0
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||||
#define LED5_PWM 1
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||||
#define LED6_PWM 2
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||||
#define LED7_PWM 3
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||||
//! @}
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||||
|
||||
/*! \name PWM Functions of LEDs
|
||||
*/
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||||
//! @{
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||||
#define LED0_PWM_FUNCTION (-1)
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||||
#define LED1_PWM_FUNCTION (-1)
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#define LED2_PWM_FUNCTION (-1)
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||||
#define LED3_PWM_FUNCTION (-1)
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||||
#define LED4_PWM_FUNCTION AVR32_PWM_0_FUNCTION
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||||
#define LED5_PWM_FUNCTION AVR32_PWM_1_FUNCTION
|
||||
#define LED6_PWM_FUNCTION AVR32_PWM_2_FUNCTION
|
||||
#define LED7_PWM_FUNCTION AVR32_PWM_3_FUNCTION
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||||
//! @}
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||||
|
||||
/*! \name Color Identifiers of LEDs to Use with LED Functions
|
||||
*/
|
||||
//! @{
|
||||
#define LED_MONO0_GREEN LED0
|
||||
#define LED_MONO1_GREEN LED1
|
||||
#define LED_MONO2_GREEN LED2
|
||||
#define LED_MONO3_GREEN LED3
|
||||
#define LED_BI0_GREEN LED5
|
||||
#define LED_BI0_RED LED4
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||||
#define LED_BI1_GREEN LED7
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||||
#define LED_BI1_RED LED6
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \name GPIO Connections of Push Buttons
|
||||
*/
|
||||
//! @{
|
||||
#define GPIO_PUSH_BUTTON_0 AVR32_PIN_PX16
|
||||
#define GPIO_PUSH_BUTTON_0_PRESSED 0
|
||||
#define GPIO_PUSH_BUTTON_1 AVR32_PIN_PX19
|
||||
#define GPIO_PUSH_BUTTON_1_PRESSED 0
|
||||
#define GPIO_PUSH_BUTTON_2 AVR32_PIN_PX22
|
||||
#define GPIO_PUSH_BUTTON_2_PRESSED 0
|
||||
//! @}
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||||
|
||||
|
||||
/*! \name GPIO Connections of the Joystick
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||||
*/
|
||||
//! @{
|
||||
#define GPIO_JOYSTICK_PUSH AVR32_PIN_PA20
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||||
#define GPIO_JOYSTICK_PUSH_PRESSED 0
|
||||
#define GPIO_JOYSTICK_LEFT AVR32_PIN_PA25
|
||||
#define GPIO_JOYSTICK_LEFT_PRESSED 0
|
||||
#define GPIO_JOYSTICK_RIGHT AVR32_PIN_PA28
|
||||
#define GPIO_JOYSTICK_RIGHT_PRESSED 0
|
||||
#define GPIO_JOYSTICK_UP AVR32_PIN_PA26
|
||||
#define GPIO_JOYSTICK_UP_PRESSED 0
|
||||
#define GPIO_JOYSTICK_DOWN AVR32_PIN_PA27
|
||||
#define GPIO_JOYSTICK_DOWN_PRESSED 0
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \name ADC Connection of the Potentiometer
|
||||
*/
|
||||
//! @{
|
||||
#define ADC_POTENTIOMETER_CHANNEL 1
|
||||
#define ADC_POTENTIOMETER_PIN AVR32_ADC_AD_1_PIN
|
||||
#define ADC_POTENTIOMETER_FUNCTION AVR32_ADC_AD_1_FUNCTION
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \name ADC Connection of the Temperature Sensor
|
||||
*/
|
||||
//! @{
|
||||
#define ADC_TEMPERATURE_CHANNEL 0
|
||||
#define ADC_TEMPERATURE_PIN AVR32_ADC_AD_0_PIN
|
||||
#define ADC_TEMPERATURE_FUNCTION AVR32_ADC_AD_0_FUNCTION
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \name ADC Connection of the Light Sensor
|
||||
*/
|
||||
//! @{
|
||||
#define ADC_LIGHT_CHANNEL 2
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#define ADC_LIGHT_PIN AVR32_ADC_AD_2_PIN
|
||||
#define ADC_LIGHT_FUNCTION AVR32_ADC_AD_2_FUNCTION
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \name SPI Connections of the DIP204 LCD
|
||||
*/
|
||||
//! @{
|
||||
#define DIP204_SPI (&AVR32_SPI1)
|
||||
#define DIP204_SPI_NPCS 2
|
||||
#define DIP204_SPI_SCK_PIN AVR32_SPI1_SCK_0_0_PIN
|
||||
#define DIP204_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_0_FUNCTION
|
||||
#define DIP204_SPI_MISO_PIN AVR32_SPI1_MISO_0_0_PIN
|
||||
#define DIP204_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_0_FUNCTION
|
||||
#define DIP204_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_0_PIN
|
||||
#define DIP204_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_0_FUNCTION
|
||||
#define DIP204_SPI_NPCS_PIN AVR32_SPI1_NPCS_2_0_PIN
|
||||
#define DIP204_SPI_NPCS_FUNCTION AVR32_SPI1_NPCS_2_0_FUNCTION
|
||||
//! @}
|
||||
|
||||
/*! \name GPIO and PWM Connections of the DIP204 LCD Backlight
|
||||
*/
|
||||
//! @{
|
||||
#define DIP204_BACKLIGHT_PIN AVR32_PIN_PB18
|
||||
#define DIP204_PWM_CHANNEL 6
|
||||
#define DIP204_PWM_PIN AVR32_PWM_6_PIN
|
||||
#define DIP204_PWM_FUNCTION AVR32_PWM_6_FUNCTION
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \name SPI Connections of the AT45DBX Data Flash Memory
|
||||
*/
|
||||
//! @{
|
||||
#define AT45DBX_SPI (&AVR32_SPI1)
|
||||
#define AT45DBX_SPI_NPCS 0
|
||||
#define AT45DBX_SPI_SCK_PIN AVR32_SPI1_SCK_0_0_PIN
|
||||
#define AT45DBX_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_0_FUNCTION
|
||||
#define AT45DBX_SPI_MISO_PIN AVR32_SPI1_MISO_0_0_PIN
|
||||
#define AT45DBX_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_0_FUNCTION
|
||||
#define AT45DBX_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_0_PIN
|
||||
#define AT45DBX_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_0_FUNCTION
|
||||
#define AT45DBX_SPI_NPCS0_PIN AVR32_SPI1_NPCS_0_0_PIN
|
||||
#define AT45DBX_SPI_NPCS0_FUNCTION AVR32_SPI1_NPCS_0_0_FUNCTION
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \name GPIO and SPI Connections of the SD/MMC Connector
|
||||
*/
|
||||
//! @{
|
||||
#define SD_MMC_CARD_DETECT_PIN AVR32_PIN_PA02
|
||||
#define SD_MMC_WRITE_PROTECT_PIN AVR32_PIN_PA07
|
||||
#define SD_MMC_SPI (&AVR32_SPI1)
|
||||
#define SD_MMC_SPI_NPCS 1
|
||||
#define SD_MMC_SPI_SCK_PIN AVR32_SPI1_SCK_0_0_PIN
|
||||
#define SD_MMC_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_0_FUNCTION
|
||||
#define SD_MMC_SPI_MISO_PIN AVR32_SPI1_MISO_0_0_PIN
|
||||
#define SD_MMC_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_0_FUNCTION
|
||||
#define SD_MMC_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_0_PIN
|
||||
#define SD_MMC_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_0_FUNCTION
|
||||
#define SD_MMC_SPI_NPCS_PIN AVR32_SPI1_NPCS_1_0_PIN
|
||||
#define SD_MMC_SPI_NPCS_FUNCTION AVR32_SPI1_NPCS_1_0_FUNCTION
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \name TWI Connections of the Spare TWI Connector
|
||||
*/
|
||||
//! @{
|
||||
#define SPARE_TWI (&AVR32_TWI)
|
||||
#define SPARE_TWI_SCL_PIN AVR32_TWI_SCL_0_0_PIN
|
||||
#define SPARE_TWI_SCL_FUNCTION AVR32_TWI_SCL_0_0_FUNCTION
|
||||
#define SPARE_TWI_SDA_PIN AVR32_TWI_SDA_0_0_PIN
|
||||
#define SPARE_TWI_SDA_FUNCTION AVR32_TWI_SDA_0_0_FUNCTION
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \name SPI Connections of the Spare SPI Connector
|
||||
*/
|
||||
//! @{
|
||||
#define SPARE_SPI (&AVR32_SPI0)
|
||||
#define SPARE_SPI_NPCS 0
|
||||
#define SPARE_SPI_SCK_PIN AVR32_SPI0_SCK_0_0_PIN
|
||||
#define SPARE_SPI_SCK_FUNCTION AVR32_SPI0_SCK_0_0_FUNCTION
|
||||
#define SPARE_SPI_MISO_PIN AVR32_SPI0_MISO_0_0_PIN
|
||||
#define SPARE_SPI_MISO_FUNCTION AVR32_SPI0_MISO_0_0_FUNCTION
|
||||
#define SPARE_SPI_MOSI_PIN AVR32_SPI0_MOSI_0_0_PIN
|
||||
#define SPARE_SPI_MOSI_FUNCTION AVR32_SPI0_MOSI_0_0_FUNCTION
|
||||
#define SPARE_SPI_NPCS_PIN AVR32_SPI0_NPCS_0_0_PIN
|
||||
#define SPARE_SPI_NPCS_FUNCTION AVR32_SPI0_NPCS_0_0_FUNCTION
|
||||
//! @}
|
||||
|
||||
|
||||
#endif // !EVK1100_REVA
|
||||
|
||||
#endif // _EVK1100_H_
|
||||
@ -1,346 +0,0 @@
|
||||
/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief AT32UC3A EVK1100 board LEDs support package.
|
||||
*
|
||||
* This file contains definitions and services related to the LED features of
|
||||
* the EVK1100 board.
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 AT32UC3A devices can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#include <avr32/io.h>
|
||||
#include "preprocessor.h"
|
||||
#include "compiler.h"
|
||||
#include "evk1100.h"
|
||||
#include "led.h"
|
||||
|
||||
|
||||
//! Structure describing LED hardware connections.
|
||||
typedef const struct
|
||||
{
|
||||
struct
|
||||
{
|
||||
U32 PORT; //!< LED GPIO port.
|
||||
U32 PIN_MASK; //!< Bit-mask of LED pin in GPIO port.
|
||||
} GPIO; //!< LED GPIO descriptor.
|
||||
struct
|
||||
{
|
||||
S32 CHANNEL; //!< LED PWM channel (< 0 if N/A).
|
||||
S32 FUNCTION; //!< LED pin PWM function (< 0 if N/A).
|
||||
} PWM; //!< LED PWM descriptor.
|
||||
} tLED_DESCRIPTOR;
|
||||
|
||||
|
||||
//! Hardware descriptors of all LEDs.
|
||||
static tLED_DESCRIPTOR LED_DESCRIPTOR[LED_COUNT] =
|
||||
{
|
||||
#define INSERT_LED_DESCRIPTOR(LED_NO, unused) \
|
||||
{ \
|
||||
{LED##LED_NO##_GPIO / 32, 1 << (LED##LED_NO##_GPIO % 32)},\
|
||||
{LED##LED_NO##_PWM, LED##LED_NO##_PWM_FUNCTION } \
|
||||
},
|
||||
MREPEAT(LED_COUNT, INSERT_LED_DESCRIPTOR, ~)
|
||||
#undef INSERT_LED_DESCRIPTOR
|
||||
};
|
||||
|
||||
|
||||
//! Saved state of all LEDs.
|
||||
static volatile U32 LED_State = (1 << LED_COUNT) - 1;
|
||||
|
||||
|
||||
U32 LED_Read_Display(void)
|
||||
{
|
||||
return LED_State;
|
||||
}
|
||||
|
||||
|
||||
void LED_Display(U32 leds)
|
||||
{
|
||||
// Use the LED descriptors to get the connections of a given LED to the MCU.
|
||||
tLED_DESCRIPTOR *led_descriptor;
|
||||
volatile avr32_gpio_port_t *led_gpio_port;
|
||||
|
||||
// Make sure only existing LEDs are specified.
|
||||
leds &= (1 << LED_COUNT) - 1;
|
||||
|
||||
// Update the saved state of all LEDs with the requested changes.
|
||||
LED_State = leds;
|
||||
|
||||
// For all LEDs...
|
||||
for (led_descriptor = &LED_DESCRIPTOR[0];
|
||||
led_descriptor < LED_DESCRIPTOR + LED_COUNT;
|
||||
led_descriptor++)
|
||||
{
|
||||
// Set the LED to the requested state.
|
||||
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
|
||||
if (leds & 1)
|
||||
{
|
||||
led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
|
||||
}
|
||||
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
|
||||
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
|
||||
leds >>= 1;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
U32 LED_Read_Display_Mask(U32 mask)
|
||||
{
|
||||
return Rd_bits(LED_State, mask);
|
||||
}
|
||||
|
||||
|
||||
void LED_Display_Mask(U32 mask, U32 leds)
|
||||
{
|
||||
// Use the LED descriptors to get the connections of a given LED to the MCU.
|
||||
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
|
||||
volatile avr32_gpio_port_t *led_gpio_port;
|
||||
U8 led_shift;
|
||||
|
||||
// Make sure only existing LEDs are specified.
|
||||
mask &= (1 << LED_COUNT) - 1;
|
||||
|
||||
// Update the saved state of all LEDs with the requested changes.
|
||||
Wr_bits(LED_State, mask, leds);
|
||||
|
||||
// While there are specified LEDs left to manage...
|
||||
while (mask)
|
||||
{
|
||||
// Select the next specified LED and set it to the requested state.
|
||||
led_shift = 1 + ctz(mask);
|
||||
led_descriptor += led_shift;
|
||||
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
|
||||
leds >>= led_shift - 1;
|
||||
if (leds & 1)
|
||||
{
|
||||
led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
|
||||
}
|
||||
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
|
||||
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
|
||||
leds >>= 1;
|
||||
mask >>= led_shift;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Bool LED_Test(U32 leds)
|
||||
{
|
||||
return Tst_bits(LED_State, leds);
|
||||
}
|
||||
|
||||
|
||||
void LED_Off(U32 leds)
|
||||
{
|
||||
// Use the LED descriptors to get the connections of a given LED to the MCU.
|
||||
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
|
||||
volatile avr32_gpio_port_t *led_gpio_port;
|
||||
U8 led_shift;
|
||||
|
||||
// Make sure only existing LEDs are specified.
|
||||
leds &= (1 << LED_COUNT) - 1;
|
||||
|
||||
// Update the saved state of all LEDs with the requested changes.
|
||||
Clr_bits(LED_State, leds);
|
||||
|
||||
// While there are specified LEDs left to manage...
|
||||
while (leds)
|
||||
{
|
||||
// Select the next specified LED and turn it off.
|
||||
led_shift = 1 + ctz(leds);
|
||||
led_descriptor += led_shift;
|
||||
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
|
||||
led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
|
||||
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
|
||||
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
|
||||
leds >>= led_shift;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void LED_On(U32 leds)
|
||||
{
|
||||
// Use the LED descriptors to get the connections of a given LED to the MCU.
|
||||
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
|
||||
volatile avr32_gpio_port_t *led_gpio_port;
|
||||
U8 led_shift;
|
||||
|
||||
// Make sure only existing LEDs are specified.
|
||||
leds &= (1 << LED_COUNT) - 1;
|
||||
|
||||
// Update the saved state of all LEDs with the requested changes.
|
||||
Set_bits(LED_State, leds);
|
||||
|
||||
// While there are specified LEDs left to manage...
|
||||
while (leds)
|
||||
{
|
||||
// Select the next specified LED and turn it on.
|
||||
led_shift = 1 + ctz(leds);
|
||||
led_descriptor += led_shift;
|
||||
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
|
||||
led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
|
||||
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
|
||||
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
|
||||
leds >>= led_shift;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void LED_Toggle(U32 leds)
|
||||
{
|
||||
// Use the LED descriptors to get the connections of a given LED to the MCU.
|
||||
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
|
||||
volatile avr32_gpio_port_t *led_gpio_port;
|
||||
U8 led_shift;
|
||||
|
||||
// Make sure only existing LEDs are specified.
|
||||
leds &= (1 << LED_COUNT) - 1;
|
||||
|
||||
// Update the saved state of all LEDs with the requested changes.
|
||||
Tgl_bits(LED_State, leds);
|
||||
|
||||
// While there are specified LEDs left to manage...
|
||||
while (leds)
|
||||
{
|
||||
// Select the next specified LED and toggle it.
|
||||
led_shift = 1 + ctz(leds);
|
||||
led_descriptor += led_shift;
|
||||
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
|
||||
led_gpio_port->ovrt = led_descriptor->GPIO.PIN_MASK;
|
||||
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
|
||||
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
|
||||
leds >>= led_shift;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
U32 LED_Read_Display_Field(U32 field)
|
||||
{
|
||||
return Rd_bitfield(LED_State, field);
|
||||
}
|
||||
|
||||
|
||||
void LED_Display_Field(U32 field, U32 leds)
|
||||
{
|
||||
// Move the bit-field to the appropriate position for the bit-mask.
|
||||
LED_Display_Mask(field, leds << ctz(field));
|
||||
}
|
||||
|
||||
|
||||
U8 LED_Get_Intensity(U32 led)
|
||||
{
|
||||
tLED_DESCRIPTOR *led_descriptor;
|
||||
|
||||
// Check that the argument value is valid.
|
||||
led = ctz(led);
|
||||
led_descriptor = &LED_DESCRIPTOR[led];
|
||||
if (led >= LED_COUNT || led_descriptor->PWM.CHANNEL < 0) return 0;
|
||||
|
||||
// Return the duty cycle value if the LED PWM channel is enabled, else 0.
|
||||
return (AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)) ?
|
||||
AVR32_PWM.channel[led_descriptor->PWM.CHANNEL].cdty : 0;
|
||||
}
|
||||
|
||||
|
||||
void LED_Set_Intensity(U32 leds, U8 intensity)
|
||||
{
|
||||
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
|
||||
volatile avr32_pwm_channel_t *led_pwm_channel;
|
||||
volatile avr32_gpio_port_t *led_gpio_port;
|
||||
U8 led_shift;
|
||||
|
||||
// For each specified LED...
|
||||
for (leds &= (1 << LED_COUNT) - 1; leds; leds >>= led_shift)
|
||||
{
|
||||
// Select the next specified LED and check that it has a PWM channel.
|
||||
led_shift = 1 + ctz(leds);
|
||||
led_descriptor += led_shift;
|
||||
if (led_descriptor->PWM.CHANNEL < 0) continue;
|
||||
|
||||
// Initialize or update the LED PWM channel.
|
||||
led_pwm_channel = &AVR32_PWM.channel[led_descriptor->PWM.CHANNEL];
|
||||
if (!(AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)))
|
||||
{
|
||||
led_pwm_channel->cmr = (AVR32_PWM_CPRE_MCK << AVR32_PWM_CPRE_OFFSET) &
|
||||
~(AVR32_PWM_CALG_MASK |
|
||||
AVR32_PWM_CPOL_MASK |
|
||||
AVR32_PWM_CPD_MASK);
|
||||
led_pwm_channel->cprd = 0x000000FF;
|
||||
led_pwm_channel->cdty = intensity;
|
||||
AVR32_PWM.ena = 1 << led_descriptor->PWM.CHANNEL;
|
||||
}
|
||||
else
|
||||
{
|
||||
AVR32_PWM.isr;
|
||||
while (!(AVR32_PWM.isr & (1 << led_descriptor->PWM.CHANNEL)));
|
||||
led_pwm_channel->cupd = intensity;
|
||||
}
|
||||
|
||||
// Switch the LED pin to its PWM function.
|
||||
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
|
||||
if (led_descriptor->PWM.FUNCTION & 0x1)
|
||||
{
|
||||
led_gpio_port->pmr0s = led_descriptor->GPIO.PIN_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
led_gpio_port->pmr0c = led_descriptor->GPIO.PIN_MASK;
|
||||
}
|
||||
if (led_descriptor->PWM.FUNCTION & 0x2)
|
||||
{
|
||||
led_gpio_port->pmr1s = led_descriptor->GPIO.PIN_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
led_gpio_port->pmr1c = led_descriptor->GPIO.PIN_MASK;
|
||||
}
|
||||
led_gpio_port->gperc = led_descriptor->GPIO.PIN_MASK;
|
||||
}
|
||||
}
|
||||
@ -1,191 +0,0 @@
|
||||
/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief AT32UC3A EVK1100 board LEDs support package.
|
||||
*
|
||||
* This file contains definitions and services related to the LED features of
|
||||
* the EVK1100 board.
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 AT32UC3A devices can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _LED_H_
|
||||
#define _LED_H_
|
||||
|
||||
#include "compiler.h"
|
||||
|
||||
|
||||
/*! \name Identifiers of LEDs to Use with LED Functions
|
||||
*/
|
||||
//! @{
|
||||
#define LED0 0x01
|
||||
#define LED1 0x02
|
||||
#define LED2 0x04
|
||||
#define LED3 0x08
|
||||
#define LED4 0x10
|
||||
#define LED5 0x20
|
||||
#define LED6 0x40
|
||||
#define LED7 0x80
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \brief Gets the last state of all LEDs set through the LED API.
|
||||
*
|
||||
* \return State of all LEDs (1 bit per LED).
|
||||
*
|
||||
* \note The GPIO pin configuration of all LEDs is left unchanged.
|
||||
*/
|
||||
extern U32 LED_Read_Display(void);
|
||||
|
||||
/*! \brief Sets the state of all LEDs.
|
||||
*
|
||||
* \param leds New state of all LEDs (1 bit per LED).
|
||||
*
|
||||
* \note The pins of all LEDs are set to GPIO output mode.
|
||||
*/
|
||||
extern void LED_Display(U32 leds);
|
||||
|
||||
/*! \brief Gets the last state of the specified LEDs set through the LED API.
|
||||
*
|
||||
* \param mask LEDs of which to get the state (1 bit per LED).
|
||||
*
|
||||
* \return State of the specified LEDs (1 bit per LED).
|
||||
*
|
||||
* \note The GPIO pin configuration of all LEDs is left unchanged.
|
||||
*/
|
||||
extern U32 LED_Read_Display_Mask(U32 mask);
|
||||
|
||||
/*! \brief Sets the state of the specified LEDs.
|
||||
*
|
||||
* \param mask LEDs of which to set the state (1 bit per LED).
|
||||
*
|
||||
* \param leds New state of the specified LEDs (1 bit per LED).
|
||||
*
|
||||
* \note The pins of the specified LEDs are set to GPIO output mode.
|
||||
*/
|
||||
extern void LED_Display_Mask(U32 mask, U32 leds);
|
||||
|
||||
/*! \brief Tests the last state of the specified LEDs set through the LED API.
|
||||
*
|
||||
* \param leds LEDs of which to test the state (1 bit per LED).
|
||||
*
|
||||
* \return \c TRUE if at least one of the specified LEDs has a state on, else
|
||||
* \c FALSE.
|
||||
*
|
||||
* \note The GPIO pin configuration of all LEDs is left unchanged.
|
||||
*/
|
||||
extern Bool LED_Test(U32 leds);
|
||||
|
||||
/*! \brief Turns off the specified LEDs.
|
||||
*
|
||||
* \param leds LEDs to turn off (1 bit per LED).
|
||||
*
|
||||
* \note The pins of the specified LEDs are set to GPIO output mode.
|
||||
*/
|
||||
extern void LED_Off(U32 leds);
|
||||
|
||||
/*! \brief Turns on the specified LEDs.
|
||||
*
|
||||
* \param leds LEDs to turn on (1 bit per LED).
|
||||
*
|
||||
* \note The pins of the specified LEDs are set to GPIO output mode.
|
||||
*/
|
||||
extern void LED_On(U32 leds);
|
||||
|
||||
/*! \brief Toggles the specified LEDs.
|
||||
*
|
||||
* \param leds LEDs to toggle (1 bit per LED).
|
||||
*
|
||||
* \note The pins of the specified LEDs are set to GPIO output mode.
|
||||
*/
|
||||
extern void LED_Toggle(U32 leds);
|
||||
|
||||
/*! \brief Gets as a bit-field the last state of the specified LEDs set through
|
||||
* the LED API.
|
||||
*
|
||||
* \param field LEDs of which to get the state (1 bit per LED).
|
||||
*
|
||||
* \return State of the specified LEDs (1 bit per LED, beginning with the first
|
||||
* specified LED).
|
||||
*
|
||||
* \note The GPIO pin configuration of all LEDs is left unchanged.
|
||||
*/
|
||||
extern U32 LED_Read_Display_Field(U32 field);
|
||||
|
||||
/*! \brief Sets as a bit-field the state of the specified LEDs.
|
||||
*
|
||||
* \param field LEDs of which to set the state (1 bit per LED).
|
||||
* \param leds New state of the specified LEDs (1 bit per LED, beginning with
|
||||
* the first specified LED).
|
||||
*
|
||||
* \note The pins of the specified LEDs are set to GPIO output mode.
|
||||
*/
|
||||
extern void LED_Display_Field(U32 field, U32 leds);
|
||||
|
||||
/*! \brief Gets the intensity of the specified LED.
|
||||
*
|
||||
* \param led LED of which to get the intensity (1 bit per LED; only the least
|
||||
* significant set bit is used).
|
||||
*
|
||||
* \return Intensity of the specified LED (0x00 to 0xFF).
|
||||
*
|
||||
* \warning The PWM channel of the specified LED is supposed to be used only by
|
||||
* this module.
|
||||
*
|
||||
* \note The GPIO pin configuration of all LEDs is left unchanged.
|
||||
*/
|
||||
extern U8 LED_Get_Intensity(U32 led);
|
||||
|
||||
/*! \brief Sets the intensity of the specified LEDs.
|
||||
*
|
||||
* \param leds LEDs of which to set the intensity (1 bit per LED).
|
||||
* \param intensity New intensity of the specified LEDs (0x00 to 0xFF).
|
||||
*
|
||||
* \warning The PWM channels of the specified LEDs are supposed to be used only
|
||||
* by this module.
|
||||
*
|
||||
* \note The pins of the specified LEDs are set to PWM output mode.
|
||||
*/
|
||||
extern void LED_Set_Intensity(U32 leds, U8 intensity);
|
||||
|
||||
|
||||
#endif // _LED_H_
|
||||
@ -1,33 +0,0 @@
|
||||
<!doctype HTML public "-//W3C//DTD HTML 4.0 Frameset//EN">
|
||||
<html>
|
||||
<head>
|
||||
<link rel="stylesheet" type="text/css" href="../../.docsrc/AVR32_ns.css">
|
||||
</head>
|
||||
<body>
|
||||
<div id="wrapper">
|
||||
<p align="left" class="whs2"><a href="../BOARDS_Readme.html"<font color="red"></font>Back to BOARDS page</a></p>
|
||||
<h1 align="center" class="whs1">AVR UC3 Series Software Framework: EVK1100 board software abstraction<br>
|
||||
</h1>
|
||||
|
||||
<p align="center" class="whs2">Copyright © 2007 Atmel Corporation</p>
|
||||
|
||||
<h2>Content</h2>
|
||||
<p>The abstraction is made of the following files:</p>
|
||||
<DL>
|
||||
<DT><li><a href="evk1100.h">evk1100.h:</a>a preprocessor mapping of the on-board AT32UC3A pins connections to the on-board hardware resources.</li>
|
||||
</DL>
|
||||
<DL>
|
||||
<DT><li><a href="led.c">led.c</a> and <a href="led.h">led.h: </a>a specific set of functions to easily control the EVK1100 LEDs.</li>
|
||||
</DL>
|
||||
|
||||
|
||||
<p> </p>
|
||||
|
||||
|
||||
<hr align="center" width="50%" class="whs4">
|
||||
|
||||
<p class=legalfooter>AVR is a registered trademark of
|
||||
Atmel Corporation.</p>
|
||||
<div>>
|
||||
</body>
|
||||
</html>
|
||||
@ -1,121 +0,0 @@
|
||||
/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief Standard board header file.
|
||||
*
|
||||
* This file includes the appropriate board header file according to the
|
||||
* defined board.
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _BOARD_H_
|
||||
#define _BOARD_H_
|
||||
|
||||
#include <avr32/io.h>
|
||||
|
||||
/*! \name Base Boards
|
||||
*/
|
||||
//! @{
|
||||
#define EVK1100 1 //!< AT32UC3A EVK1100 board.
|
||||
#define EVK1101 2 //!< AT32UC3B EVK1101 board.
|
||||
#define UC3C_EK 3 //!< AT32UC3C UC3C_EK board.
|
||||
#define EVK1104 4 //!< AT32UC3A3 EVK1104 board.
|
||||
#define EVK1105 5 //!< AT32UC3A EVK1105 board.
|
||||
#define STK1000 6 //!< AT32AP7000 STK1000 board.
|
||||
#define NGW100 7 //!< AT32AP7000 NGW100 board.
|
||||
#define STK600_RCUC3L0 8 //!< STK600 RCUC3L0 board.
|
||||
#define UC3L_EK 9 //!< AT32UC3L-EK board.
|
||||
#define USER_BOARD 99 //!< User-reserved board (if any).
|
||||
//! @}
|
||||
|
||||
/*! \name Extension Boards
|
||||
*/
|
||||
//! @{
|
||||
#define EXT1102 1 //!< AT32UC3B EXT1102 board.
|
||||
#define MC300 2 //!< AT32UC3 MC300 board.
|
||||
#define USER_EXT_BOARD 99 //!< User-reserved extension board (if any).
|
||||
//! @}
|
||||
|
||||
#if BOARD == EVK1100
|
||||
#include "EVK1100/evk1100.h"
|
||||
#elif BOARD == EVK1101
|
||||
#include "EVK1101/evk1101.h"
|
||||
#elif BOARD == UC3C_EK
|
||||
#include "UC3C_EK/uc3c_ek.h"
|
||||
#elif BOARD == EVK1104
|
||||
#include "EVK1104/evk1104.h"
|
||||
#elif BOARD == EVK1105
|
||||
#include "EVK1105/evk1105.h"
|
||||
#elif BOARD == STK1000
|
||||
#include "STK1000/stk1000.h"
|
||||
#elif BOARD == NGW100
|
||||
#include "NGW100/ngw100.h"
|
||||
#elif BOARD == STK600_RCUC3L0
|
||||
#include "STK600/RCUC3L0/stk600_rcuc3l0.h"
|
||||
#elif BOARD == UC3L_EK
|
||||
#include "UC3L_EK/uc3l_ek.h"
|
||||
#elif BOARD == USER_BOARD
|
||||
// User-reserved area: #include the header file of your board here (if any).
|
||||
#include "user_board.h"
|
||||
#else
|
||||
#error No known AVR32 board defined
|
||||
#endif
|
||||
|
||||
#if (defined EXT_BOARD)
|
||||
#if EXT_BOARD == EXT1102
|
||||
#include "EXT1102/ext1102.h"
|
||||
#elif EXT_BOARD == MC300
|
||||
#include "MC300/mc300.h"
|
||||
#elif EXT_BOARD == USER_EXT_BOARD
|
||||
// User-reserved area: #include the header file of your extension board here
|
||||
// (if any).
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
#ifndef FRCOSC
|
||||
#define FRCOSC AVR32_PM_RCOSC_FREQUENCY //!< Default RCOsc frequency.
|
||||
#endif
|
||||
|
||||
|
||||
#endif // _BOARD_H_
|
||||
@ -1,458 +0,0 @@
|
||||
/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file has been prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief GPIO driver for AVR32 UC3.
|
||||
*
|
||||
* This file defines a useful set of functions for the GPIO.
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices with a GPIO module can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#include "gpio.h"
|
||||
|
||||
//! GPIO module instance.
|
||||
#define GPIO AVR32_GPIO
|
||||
|
||||
|
||||
/*! \name Peripheral Bus Interface
|
||||
*/
|
||||
//! @{
|
||||
|
||||
|
||||
int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size)
|
||||
{
|
||||
int status = GPIO_SUCCESS;
|
||||
unsigned int i;
|
||||
|
||||
for (i = 0; i < size; i++)
|
||||
{
|
||||
status |= gpio_enable_module_pin(gpiomap->pin, gpiomap->function);
|
||||
gpiomap++;
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
|
||||
int gpio_enable_module_pin(unsigned int pin, unsigned int function)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
|
||||
// Enable the correct function.
|
||||
switch (function)
|
||||
{
|
||||
case 0: // A function.
|
||||
gpio_port->pmr0c = 1 << (pin & 0x1F);
|
||||
gpio_port->pmr1c = 1 << (pin & 0x1F);
|
||||
#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
|
||||
gpio_port->pmr2c = 1 << (pin & 0x1F);
|
||||
#endif
|
||||
break;
|
||||
|
||||
case 1: // B function.
|
||||
gpio_port->pmr0s = 1 << (pin & 0x1F);
|
||||
gpio_port->pmr1c = 1 << (pin & 0x1F);
|
||||
#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
|
||||
gpio_port->pmr2c = 1 << (pin & 0x1F);
|
||||
#endif
|
||||
break;
|
||||
|
||||
case 2: // C function.
|
||||
gpio_port->pmr0c = 1 << (pin & 0x1F);
|
||||
gpio_port->pmr1s = 1 << (pin & 0x1F);
|
||||
#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
|
||||
gpio_port->pmr2c = 1 << (pin & 0x1F);
|
||||
#endif
|
||||
break;
|
||||
|
||||
case 3: // D function.
|
||||
gpio_port->pmr0s = 1 << (pin & 0x1F);
|
||||
gpio_port->pmr1s = 1 << (pin & 0x1F);
|
||||
#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
|
||||
gpio_port->pmr2c = 1 << (pin & 0x1F);
|
||||
#endif
|
||||
break;
|
||||
|
||||
#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
|
||||
case 4: // E function.
|
||||
gpio_port->pmr0c = 1 << (pin & 0x1F);
|
||||
gpio_port->pmr1c = 1 << (pin & 0x1F);
|
||||
gpio_port->pmr2s = 1 << (pin & 0x1F);
|
||||
break;
|
||||
|
||||
case 5: // F function.
|
||||
gpio_port->pmr0s = 1 << (pin & 0x1F);
|
||||
gpio_port->pmr1c = 1 << (pin & 0x1F);
|
||||
gpio_port->pmr2s = 1 << (pin & 0x1F);
|
||||
break;
|
||||
|
||||
case 6: // G function.
|
||||
gpio_port->pmr0c = 1 << (pin & 0x1F);
|
||||
gpio_port->pmr1s = 1 << (pin & 0x1F);
|
||||
gpio_port->pmr2s = 1 << (pin & 0x1F);
|
||||
break;
|
||||
|
||||
case 7: // H function.
|
||||
gpio_port->pmr0s = 1 << (pin & 0x1F);
|
||||
gpio_port->pmr1s = 1 << (pin & 0x1F);
|
||||
gpio_port->pmr2s = 1 << (pin & 0x1F);
|
||||
break;
|
||||
#endif
|
||||
|
||||
default:
|
||||
return GPIO_INVALID_ARGUMENT;
|
||||
}
|
||||
|
||||
// Disable GPIO control.
|
||||
gpio_port->gperc = 1 << (pin & 0x1F);
|
||||
|
||||
return GPIO_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
for (i = 0; i < size; i++)
|
||||
{
|
||||
gpio_enable_gpio_pin(gpiomap->pin);
|
||||
gpiomap++;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void gpio_enable_gpio_pin(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
gpio_port->oderc = 1 << (pin & 0x1F);
|
||||
gpio_port->gpers = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
|
||||
// The open-drain mode is not synthesized on the current AVR32 products.
|
||||
// If one day some AVR32 products have this feature, the corresponding part
|
||||
// numbers should be listed in the #if below.
|
||||
// Note that other functions are available in this driver to use pins with open
|
||||
// drain in GPIO mode. The advantage of the open-drain mode functions over these
|
||||
// other functions is that they can be used not only in GPIO mode but also in
|
||||
// module mode.
|
||||
#if 0
|
||||
|
||||
|
||||
void gpio_enable_pin_open_drain(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
gpio_port->odmers = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
|
||||
void gpio_disable_pin_open_drain(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
gpio_port->odmerc = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
void gpio_enable_pin_pull_up(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
gpio_port->puers = 1 << (pin & 0x1F);
|
||||
#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
|
||||
gpio_port->pderc = 1 << (pin & 0x1F);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
void gpio_disable_pin_pull_up(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
gpio_port->puerc = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
|
||||
// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control.
|
||||
|
||||
/*! \brief Enables the pull-down resistor of a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
void gpio_enable_pin_pull_down(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
gpio_port->puerc = 1 << (pin & 0x1F);
|
||||
gpio_port->pders = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
/*! \brief Disables the pull-down resistor of a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
void gpio_disable_pin_pull_down(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
gpio_port->pderc = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
/*! \brief Enables the buskeeper functionality on a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
void gpio_enable_pin_buskeeper(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
gpio_port->puers = 1 << (pin & 0x1F);
|
||||
gpio_port->pders = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
/*! \brief Disables the buskeeper functionality on a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
void gpio_disable_pin_buskeeper(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
gpio_port->puerc = 1 << (pin & 0x1F);
|
||||
gpio_port->pderc = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
int gpio_get_pin_value(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
return (gpio_port->pvr >> (pin & 0x1F)) & 1;
|
||||
}
|
||||
|
||||
|
||||
int gpio_get_gpio_pin_output_value(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
return (gpio_port->ovr >> (pin & 0x1F)) & 1;
|
||||
}
|
||||
|
||||
|
||||
int gpio_get_gpio_open_drain_pin_output_value(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
return ((gpio_port->oder >> (pin & 0x1F)) & 1) ^ 1;
|
||||
}
|
||||
|
||||
|
||||
void gpio_set_gpio_pin(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
|
||||
gpio_port->ovrs = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 1.
|
||||
gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
|
||||
gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
|
||||
}
|
||||
|
||||
|
||||
void gpio_clr_gpio_pin(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
|
||||
gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0.
|
||||
gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
|
||||
gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
|
||||
}
|
||||
|
||||
|
||||
void gpio_tgl_gpio_pin(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
|
||||
gpio_port->ovrt = 1 << (pin & 0x1F); // Toggle the I/O line.
|
||||
gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
|
||||
gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
|
||||
}
|
||||
|
||||
|
||||
void gpio_set_gpio_open_drain_pin(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
|
||||
gpio_port->oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin.
|
||||
gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
|
||||
}
|
||||
|
||||
|
||||
void gpio_clr_gpio_open_drain_pin(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
|
||||
gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0.
|
||||
gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
|
||||
gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
|
||||
}
|
||||
|
||||
|
||||
void gpio_tgl_gpio_open_drain_pin(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
|
||||
gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line if the GPIO output driver is enabled: 0.
|
||||
gpio_port->odert = 1 << (pin & 0x1F); // The GPIO output driver is toggled for that pin.
|
||||
gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
|
||||
}
|
||||
|
||||
|
||||
void gpio_enable_pin_glitch_filter(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
gpio_port->gfers = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
|
||||
void gpio_disable_pin_glitch_filter(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
gpio_port->gferc = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
/*! \brief Configure the edge detector of an input pin
|
||||
*
|
||||
* \param pin The pin number.
|
||||
* \param mode The edge detection mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE
|
||||
* or \ref GPIO_FALLING_EDGE).
|
||||
*
|
||||
* \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
|
||||
*/
|
||||
static int gpio_configure_edge_detector(unsigned int pin, unsigned int mode)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
|
||||
// Configure the edge detector.
|
||||
switch (mode)
|
||||
{
|
||||
case GPIO_PIN_CHANGE:
|
||||
gpio_port->imr0c = 1 << (pin & 0x1F);
|
||||
gpio_port->imr1c = 1 << (pin & 0x1F);
|
||||
break;
|
||||
|
||||
case GPIO_RISING_EDGE:
|
||||
gpio_port->imr0s = 1 << (pin & 0x1F);
|
||||
gpio_port->imr1c = 1 << (pin & 0x1F);
|
||||
break;
|
||||
|
||||
case GPIO_FALLING_EDGE:
|
||||
gpio_port->imr0c = 1 << (pin & 0x1F);
|
||||
gpio_port->imr1s = 1 << (pin & 0x1F);
|
||||
break;
|
||||
|
||||
default:
|
||||
return GPIO_INVALID_ARGUMENT;
|
||||
}
|
||||
|
||||
return GPIO_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
|
||||
// Enable the glitch filter.
|
||||
gpio_port->gfers = 1 << (pin & 0x1F);
|
||||
|
||||
// Configure the edge detector.
|
||||
if(GPIO_INVALID_ARGUMENT == gpio_configure_edge_detector(pin, mode))
|
||||
return(GPIO_INVALID_ARGUMENT);
|
||||
|
||||
// Enable interrupt.
|
||||
gpio_port->iers = 1 << (pin & 0x1F);
|
||||
|
||||
return GPIO_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
void gpio_disable_pin_interrupt(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
gpio_port->ierc = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
|
||||
int gpio_get_pin_interrupt_flag(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
return (gpio_port->ifr >> (pin & 0x1F)) & 1;
|
||||
}
|
||||
|
||||
|
||||
void gpio_clear_pin_interrupt_flag(unsigned int pin)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
gpio_port->ifrc = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
|
||||
//#
|
||||
//# Peripheral Event System Support.
|
||||
//#
|
||||
#if UC3L
|
||||
int gpio_configure_pin_periph_event_mode(unsigned int pin, unsigned int mode, unsigned int use_igf)
|
||||
{
|
||||
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
|
||||
|
||||
if(TRUE == use_igf)
|
||||
{
|
||||
// Enable the glitch filter.
|
||||
gpio_port->gfers = 1 << (pin & 0x1F);
|
||||
}
|
||||
else
|
||||
{
|
||||
// Disable the glitch filter.
|
||||
gpio_port->gferc = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
// Configure the edge detector.
|
||||
return(gpio_configure_edge_detector(pin, mode));
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
//! @}
|
||||
@ -1,583 +0,0 @@
|
||||
/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file has been prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief GPIO header for AVR32 UC3.
|
||||
*
|
||||
* This file contains basic GPIO driver functions.
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices with a GPIO module can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _GPIO_H_
|
||||
#define _GPIO_H_
|
||||
|
||||
#include <avr32/io.h>
|
||||
#include "compiler.h"
|
||||
|
||||
/*! \name Return Values of the GPIO API
|
||||
*/
|
||||
//! @{
|
||||
#define GPIO_SUCCESS 0 //!< Function successfully completed.
|
||||
#define GPIO_INVALID_ARGUMENT 1 //!< Input parameters are out of range.
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \name Interrupt Trigger Modes
|
||||
*/
|
||||
//! @{
|
||||
#define GPIO_PIN_CHANGE 0 //!< Interrupt triggered upon pin change.
|
||||
#define GPIO_RISING_EDGE 1 //!< Interrupt triggered upon rising edge.
|
||||
#define GPIO_FALLING_EDGE 2 //!< Interrupt triggered upon falling edge.
|
||||
//! @}
|
||||
|
||||
|
||||
//! A type definition of pins and modules connectivity.
|
||||
typedef struct
|
||||
{
|
||||
unsigned char pin; //!< Module pin.
|
||||
unsigned char function; //!< Module function.
|
||||
} gpio_map_t[];
|
||||
|
||||
|
||||
/*! \name Peripheral Bus Interface
|
||||
*
|
||||
* Low-speed interface with a non-deterministic number of clock cycles per
|
||||
* access.
|
||||
*
|
||||
* This interface operates with lower clock frequencies (fPB <= fCPU), and its
|
||||
* timing is not deterministic since it needs to access a shared bus which may
|
||||
* be heavily loaded.
|
||||
*
|
||||
* \note This interface is immediately available without initialization.
|
||||
*/
|
||||
//! @{
|
||||
|
||||
/*! \brief Enables specific module modes for a set of pins.
|
||||
*
|
||||
* \param gpiomap The pin map.
|
||||
* \param size The number of pins in \a gpiomap.
|
||||
*
|
||||
* \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
|
||||
*/
|
||||
extern int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size);
|
||||
|
||||
/*! \brief Enables a specific module mode for a pin.
|
||||
*
|
||||
* \param pin The pin number.\n
|
||||
* Refer to the product header file `uc3x.h' (where x is the part
|
||||
* number; e.g. x = a0512) for module pins. E.g., to enable a PWM
|
||||
* channel output, the pin number can be AVR32_PWM_3_PIN for PWM
|
||||
* channel 3.
|
||||
* \param function The pin function.\n
|
||||
* Refer to the product header file `uc3x.h' (where x is the
|
||||
* part number; e.g. x = a0512) for module pin functions. E.g.,
|
||||
* to enable a PWM channel output, the pin function can be
|
||||
* AVR32_PWM_3_FUNCTION for PWM channel 3.
|
||||
*
|
||||
* \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
|
||||
*/
|
||||
extern int gpio_enable_module_pin(unsigned int pin, unsigned int function);
|
||||
|
||||
/*! \brief Enables the GPIO mode of a set of pins.
|
||||
*
|
||||
* \param gpiomap The pin map.
|
||||
* \param size The number of pins in \a gpiomap.
|
||||
*/
|
||||
extern void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size);
|
||||
|
||||
/*! \brief Enables the GPIO mode of a pin.
|
||||
*
|
||||
* \param pin The pin number.\n
|
||||
* Refer to the product header file `uc3x.h' (where x is the part
|
||||
* number; e.g. x = a0512) for pin definitions. E.g., to enable the
|
||||
* GPIO mode of PX21, AVR32_PIN_PX21 can be used. Module pins such as
|
||||
* AVR32_PWM_3_PIN for PWM channel 3 can also be used to release
|
||||
* module pins for GPIO.
|
||||
*/
|
||||
extern void gpio_enable_gpio_pin(unsigned int pin);
|
||||
|
||||
// The open-drain mode is not synthesized on the current AVR32 products.
|
||||
// If one day some AVR32 products have this feature, the corresponding part
|
||||
// numbers should be listed in the #if below.
|
||||
// Note that other functions are available in this driver to use pins with open
|
||||
// drain in GPIO mode. The advantage of the open-drain mode functions over these
|
||||
// other functions is that they can be used not only in GPIO mode but also in
|
||||
// module mode.
|
||||
#if 0
|
||||
|
||||
/*! \brief Enables the open-drain mode of a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
extern void gpio_enable_pin_open_drain(unsigned int pin);
|
||||
|
||||
/*! \brief Disables the open-drain mode of a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
extern void gpio_disable_pin_open_drain(unsigned int pin);
|
||||
|
||||
#endif
|
||||
|
||||
/*! \brief Enables the pull-up resistor of a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
extern void gpio_enable_pin_pull_up(unsigned int pin);
|
||||
|
||||
/*! \brief Disables the pull-up resistor of a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
extern void gpio_disable_pin_pull_up(unsigned int pin);
|
||||
|
||||
#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
|
||||
// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control.
|
||||
|
||||
/*! \brief Enables the pull-down resistor of a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
extern void gpio_enable_pin_pull_down(unsigned int pin);
|
||||
|
||||
/*! \brief Disables the pull-down resistor of a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
extern void gpio_disable_pin_pull_down(unsigned int pin);
|
||||
|
||||
/*! \brief Enables the buskeeper functionality on a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
extern void gpio_enable_pin_buskeeper(unsigned int pin);
|
||||
|
||||
/*! \brief Disables the buskeeper functionality on a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
extern void gpio_disable_pin_buskeeper(unsigned int pin);
|
||||
|
||||
#endif
|
||||
|
||||
/*! \brief Returns the value of a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*
|
||||
* \return The pin value.
|
||||
*/
|
||||
extern int gpio_get_pin_value(unsigned int pin);
|
||||
|
||||
/*! \brief Returns the output value set for a GPIO pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*
|
||||
* \return The pin output value.
|
||||
*
|
||||
* \note This function must be used in conjunction with \ref gpio_set_gpio_pin,
|
||||
* \ref gpio_clr_gpio_pin and \ref gpio_tgl_gpio_pin.
|
||||
*/
|
||||
extern int gpio_get_gpio_pin_output_value(unsigned int pin);
|
||||
|
||||
/*! \brief Returns the output value set for a GPIO pin using open drain.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*
|
||||
* \return The pin output value.
|
||||
*
|
||||
* \note This function must be used in conjunction with
|
||||
* \ref gpio_set_gpio_open_drain_pin, \ref gpio_clr_gpio_open_drain_pin
|
||||
* and \ref gpio_tgl_gpio_open_drain_pin.
|
||||
*/
|
||||
extern int gpio_get_gpio_open_drain_pin_output_value(unsigned int pin);
|
||||
|
||||
/*! \brief Drives a GPIO pin to 1.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
extern void gpio_set_gpio_pin(unsigned int pin);
|
||||
|
||||
/*! \brief Drives a GPIO pin to 0.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
extern void gpio_clr_gpio_pin(unsigned int pin);
|
||||
|
||||
/*! \brief Toggles a GPIO pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
extern void gpio_tgl_gpio_pin(unsigned int pin);
|
||||
|
||||
/*! \brief Drives a GPIO pin to 1 using open drain.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
extern void gpio_set_gpio_open_drain_pin(unsigned int pin);
|
||||
|
||||
/*! \brief Drives a GPIO pin to 0 using open drain.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
extern void gpio_clr_gpio_open_drain_pin(unsigned int pin);
|
||||
|
||||
/*! \brief Toggles a GPIO pin using open drain.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
extern void gpio_tgl_gpio_open_drain_pin(unsigned int pin);
|
||||
|
||||
/*! \brief Enables the glitch filter of a pin.
|
||||
*
|
||||
* When the glitch filter is enabled, a glitch with duration of less than 1
|
||||
* clock cycle is automatically rejected, while a pulse with duration of 2 clock
|
||||
* cycles or more is accepted. For pulse durations between 1 clock cycle and 2
|
||||
* clock cycles, the pulse may or may not be taken into account, depending on
|
||||
* the precise timing of its occurrence. Thus for a pulse to be guaranteed
|
||||
* visible it must exceed 2 clock cycles, whereas for a glitch to be reliably
|
||||
* filtered out, its duration must not exceed 1 clock cycle. The filter
|
||||
* introduces 2 clock cycles latency.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
extern void gpio_enable_pin_glitch_filter(unsigned int pin);
|
||||
|
||||
/*! \brief Disables the glitch filter of a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
extern void gpio_disable_pin_glitch_filter(unsigned int pin);
|
||||
|
||||
/*! \brief Enables the interrupt of a pin with the specified settings.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
* \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or
|
||||
* \ref GPIO_FALLING_EDGE).
|
||||
*
|
||||
* \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
|
||||
*/
|
||||
extern int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode);
|
||||
|
||||
/*! \brief Disables the interrupt of a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
extern void gpio_disable_pin_interrupt(unsigned int pin);
|
||||
|
||||
/*! \brief Gets the interrupt flag of a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*
|
||||
* \return The pin interrupt flag.
|
||||
*/
|
||||
extern int gpio_get_pin_interrupt_flag(unsigned int pin);
|
||||
|
||||
/*! \brief Clears the interrupt flag of a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*/
|
||||
extern void gpio_clear_pin_interrupt_flag(unsigned int pin);
|
||||
|
||||
//! @}
|
||||
|
||||
|
||||
#if (defined AVR32_GPIO_LOCAL_ADDRESS)
|
||||
/*! \name Local Bus Interface
|
||||
*
|
||||
* High-speed interface with only one clock cycle per access.
|
||||
*
|
||||
* This interface operates with high clock frequency (fCPU), and its timing is
|
||||
* deterministic since it does not need to access a shared bus which may be
|
||||
* heavily loaded.
|
||||
*
|
||||
* \warning To use this interface, the clock frequency of the peripheral bus on
|
||||
* which the GPIO peripheral is connected must be set to the CPU clock
|
||||
* frequency (fPB = fCPU).
|
||||
*
|
||||
* \note This interface has to be initialized in order to be available.
|
||||
*/
|
||||
//! @{
|
||||
|
||||
/*! \brief Enables the local bus interface for GPIO.
|
||||
*
|
||||
* \note This function must have been called at least once before using other
|
||||
* functions in this interface.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void gpio_local_init(void)
|
||||
{
|
||||
Set_system_register(AVR32_CPUCR,
|
||||
Get_system_register(AVR32_CPUCR) | AVR32_CPUCR_LOCEN_MASK);
|
||||
}
|
||||
|
||||
/*! \brief Enables the output driver of a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*
|
||||
* \note \ref gpio_local_init must have been called beforehand.
|
||||
*
|
||||
* \note This function does not enable the GPIO mode of the pin.
|
||||
* \ref gpio_enable_gpio_pin can be called for this purpose.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void gpio_local_enable_pin_output_driver(unsigned int pin)
|
||||
{
|
||||
AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
/*! \brief Disables the output driver of a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*
|
||||
* \note \ref gpio_local_init must have been called beforehand.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void gpio_local_disable_pin_output_driver(unsigned int pin)
|
||||
{
|
||||
AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
/*! \brief Returns the value of a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*
|
||||
* \return The pin value.
|
||||
*
|
||||
* \note \ref gpio_local_init must have been called beforehand.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ int gpio_local_get_pin_value(unsigned int pin)
|
||||
{
|
||||
return (AVR32_GPIO_LOCAL.port[pin >> 5].pvr >> (pin & 0x1F)) & 1;
|
||||
}
|
||||
|
||||
/*! \brief Drives a GPIO pin to 1.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*
|
||||
* \note \ref gpio_local_init must have been called beforehand.
|
||||
*
|
||||
* \note This function does not enable the GPIO mode of the pin nor its output
|
||||
* driver. \ref gpio_enable_gpio_pin and
|
||||
* \ref gpio_local_enable_pin_output_driver can be called for this
|
||||
* purpose.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void gpio_local_set_gpio_pin(unsigned int pin)
|
||||
{
|
||||
AVR32_GPIO_LOCAL.port[pin >> 5].ovrs = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
/*! \brief Drives a GPIO pin to 0.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*
|
||||
* \note \ref gpio_local_init must have been called beforehand.
|
||||
*
|
||||
* \note This function does not enable the GPIO mode of the pin nor its output
|
||||
* driver. \ref gpio_enable_gpio_pin and
|
||||
* \ref gpio_local_enable_pin_output_driver can be called for this
|
||||
* purpose.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void gpio_local_clr_gpio_pin(unsigned int pin)
|
||||
{
|
||||
AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
/*! \brief Toggles a GPIO pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*
|
||||
* \note \ref gpio_local_init must have been called beforehand.
|
||||
*
|
||||
* \note This function does not enable the GPIO mode of the pin nor its output
|
||||
* driver. \ref gpio_enable_gpio_pin and
|
||||
* \ref gpio_local_enable_pin_output_driver can be called for this
|
||||
* purpose.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void gpio_local_tgl_gpio_pin(unsigned int pin)
|
||||
{
|
||||
AVR32_GPIO_LOCAL.port[pin >> 5].ovrt = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
/*! \brief Initializes the configuration of a GPIO pin so that it can be used
|
||||
* with GPIO open-drain functions.
|
||||
*
|
||||
* \note This function must have been called at least once before using
|
||||
* \ref gpio_local_set_gpio_open_drain_pin,
|
||||
* \ref gpio_local_clr_gpio_open_drain_pin or
|
||||
* \ref gpio_local_tgl_gpio_open_drain_pin.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void gpio_local_init_gpio_open_drain_pin(unsigned int pin)
|
||||
{
|
||||
AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
/*! \brief Drives a GPIO pin to 1 using open drain.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*
|
||||
* \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must
|
||||
* have been called beforehand.
|
||||
*
|
||||
* \note This function does not enable the GPIO mode of the pin.
|
||||
* \ref gpio_enable_gpio_pin can be called for this purpose.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void gpio_local_set_gpio_open_drain_pin(unsigned int pin)
|
||||
{
|
||||
AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
/*! \brief Drives a GPIO pin to 0 using open drain.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*
|
||||
* \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must
|
||||
* have been called beforehand.
|
||||
*
|
||||
* \note This function does not enable the GPIO mode of the pin.
|
||||
* \ref gpio_enable_gpio_pin can be called for this purpose.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void gpio_local_clr_gpio_open_drain_pin(unsigned int pin)
|
||||
{
|
||||
AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
/*! \brief Toggles a GPIO pin using open drain.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*
|
||||
* \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must
|
||||
* have been called beforehand.
|
||||
*
|
||||
* \note This function does not enable the GPIO mode of the pin.
|
||||
* \ref gpio_enable_gpio_pin can be called for this purpose.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void gpio_local_tgl_gpio_open_drain_pin(unsigned int pin)
|
||||
{
|
||||
AVR32_GPIO_LOCAL.port[pin >> 5].odert = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
//! @}
|
||||
#endif // AVR32_GPIO_LOCAL_ADDRESS
|
||||
|
||||
#if UC3L
|
||||
//! @{
|
||||
/*! \name Peripheral Event System support
|
||||
*
|
||||
* The GPIO can be programmed to output peripheral events whenever an interrupt
|
||||
* condition is detected, such as pin value change, or only when a rising or
|
||||
* falling edge is detected.
|
||||
*
|
||||
*/
|
||||
|
||||
/*! \brief Enables the peripheral event generation of a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void gpio_enable_pin_periph_event(unsigned int pin)
|
||||
{
|
||||
AVR32_GPIO.port[pin >> 5].oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin.
|
||||
AVR32_GPIO.port[pin >> 5].evers = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
/*! \brief Disables the peripheral event generation of a pin.
|
||||
*
|
||||
* \param pin The pin number.
|
||||
*
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void gpio_disable_pin_periph_event(unsigned int pin)
|
||||
{
|
||||
AVR32_GPIO.port[pin >> 5].everc = 1 << (pin & 0x1F);
|
||||
}
|
||||
|
||||
/*! \brief Configure the peripheral event trigger mode of a pin
|
||||
*
|
||||
* \param pin The pin number.
|
||||
* \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or
|
||||
* \ref GPIO_FALLING_EDGE).
|
||||
* \param use_igf use the Input Glitch Filter (TRUE) or not (FALSE).
|
||||
*
|
||||
* \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
|
||||
*/
|
||||
extern int gpio_configure_pin_periph_event_mode(unsigned int pin, unsigned int mode, unsigned int use_igf);
|
||||
|
||||
//! @}
|
||||
#endif
|
||||
|
||||
|
||||
#endif // _GPIO_H_
|
||||
@ -1,40 +0,0 @@
|
||||
<!doctype HTML public "-//W3C//DTD HTML 4.0 Frameset//EN">
|
||||
<html>
|
||||
<head>
|
||||
<link rel="stylesheet" type="text/css" href="../../.docsrc/AVR32_ns.css">
|
||||
</head>
|
||||
<body>
|
||||
<div id="wrapper">
|
||||
<p align="left" class="whs2"><a href="../DRIVERS_Readme.html"<font color="red"></font>Back to DRIVERS page</a></p>
|
||||
<h1 align="center" class="whs1">AVR UC3 Series Software Framework: General-Purpose Input/Output (GPIO) Driver<br>
|
||||
</h1>
|
||||
|
||||
<p align="center" class="whs2">Copyright © 2007 Atmel Corporation</p>
|
||||
|
||||
<h2>Introduction</h2>
|
||||
<p>The General-Purpose Input/Output (GPIO) gives access to the MCU pins.
|
||||
The GPIO can be interfaced through a peripheral bus or the local bus.</p>
|
||||
|
||||
<p> </p>
|
||||
|
||||
<h2>GPIO Software Driver</h2>
|
||||
|
||||
<p>This driver provides an API to get access to the main features of the GPIO controller.</p>
|
||||
<p> </p>
|
||||
<p>The driver is composed of <a href="gpio.c">gpio.c</a> and <a href="gpio.h">gpio.h</a> (for accurate API description, read this header file).</p>
|
||||
<p> </p>
|
||||
|
||||
<h2>GPIO Software Driver Examples</h2>
|
||||
<p>Two examples are currently available:
|
||||
<li><a href="./PERIPHERAL_BUS_EXAMPLE/readme.html"> demonstrates the peripheral bus interface</a>;</li>
|
||||
<li><a href="./LOCAL_BUS_EXAMPLE/readme.html"> demonstrates the local bus interface</a>.</li>
|
||||
</p>
|
||||
<p> </p>
|
||||
|
||||
<hr align="center" width="50%" class="whs4">
|
||||
|
||||
<p class=legalfooter>AVR is a registered trademark of
|
||||
Atmel Corporation.</p>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
@ -1,239 +0,0 @@
|
||||
/* This file is part of the ATMEL AVR32-SoftwareFramework-AT32UC3-1.5.0 Release */
|
||||
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief Exception and interrupt vectors.
|
||||
*
|
||||
* This file maps all events supported by an AVR32.
|
||||
*
|
||||
* - Compiler: GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices with an INTC module can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#if !__AVR32_UC__ && !__AVR32_AP__
|
||||
#error Implementation of the AVR32 architecture not supported by the INTC driver.
|
||||
#endif
|
||||
|
||||
|
||||
#include <avr32/io.h>
|
||||
|
||||
|
||||
//! @{
|
||||
//! \verbatim
|
||||
|
||||
|
||||
.section .exception, "ax", @progbits
|
||||
|
||||
|
||||
// Start of Exception Vector Table.
|
||||
|
||||
// EVBA must be aligned with a power of two strictly greater than the EVBA-
|
||||
// relative offset of the last vector.
|
||||
.balign 0x200
|
||||
|
||||
// Export symbol.
|
||||
.global _evba
|
||||
.type _evba, @function
|
||||
_evba:
|
||||
|
||||
.org 0x000
|
||||
// Unrecoverable Exception.
|
||||
_handle_Unrecoverable_Exception:
|
||||
rjmp $
|
||||
|
||||
.org 0x004
|
||||
// TLB Multiple Hit.
|
||||
_handle_TLB_Multiple_Hit:
|
||||
rjmp $
|
||||
|
||||
.org 0x008
|
||||
// Bus Error Data Fetch.
|
||||
_handle_Bus_Error_Data_Fetch:
|
||||
rjmp $
|
||||
|
||||
.org 0x00C
|
||||
// Bus Error Instruction Fetch.
|
||||
_handle_Bus_Error_Instruction_Fetch:
|
||||
rjmp $
|
||||
|
||||
.org 0x010
|
||||
// NMI.
|
||||
_handle_NMI:
|
||||
rjmp $
|
||||
|
||||
.org 0x014
|
||||
// Instruction Address.
|
||||
_handle_Instruction_Address:
|
||||
rjmp $
|
||||
|
||||
.org 0x018
|
||||
// ITLB Protection.
|
||||
_handle_ITLB_Protection:
|
||||
rjmp $
|
||||
|
||||
.org 0x01C
|
||||
// Breakpoint.
|
||||
_handle_Breakpoint:
|
||||
rjmp $
|
||||
|
||||
.org 0x020
|
||||
// Illegal Opcode.
|
||||
_handle_Illegal_Opcode:
|
||||
rjmp $
|
||||
|
||||
.org 0x024
|
||||
// Unimplemented Instruction.
|
||||
_handle_Unimplemented_Instruction:
|
||||
rjmp $
|
||||
|
||||
.org 0x028
|
||||
// Privilege Violation.
|
||||
_handle_Privilege_Violation:
|
||||
rjmp $
|
||||
|
||||
.org 0x02C
|
||||
// Floating-Point: UNUSED IN AVR32UC and AVR32AP.
|
||||
_handle_Floating_Point:
|
||||
rjmp $
|
||||
|
||||
.org 0x030
|
||||
// Coprocessor Absent: UNUSED IN AVR32UC.
|
||||
_handle_Coprocessor_Absent:
|
||||
rjmp $
|
||||
|
||||
.org 0x034
|
||||
// Data Address (Read).
|
||||
_handle_Data_Address_Read:
|
||||
rjmp $
|
||||
|
||||
.org 0x038
|
||||
// Data Address (Write).
|
||||
_handle_Data_Address_Write:
|
||||
rjmp $
|
||||
|
||||
.org 0x03C
|
||||
// DTLB Protection (Read).
|
||||
_handle_DTLB_Protection_Read:
|
||||
rjmp $
|
||||
|
||||
.org 0x040
|
||||
// DTLB Protection (Write).
|
||||
_handle_DTLB_Protection_Write:
|
||||
rjmp $
|
||||
|
||||
.org 0x044
|
||||
// DTLB Modified: UNUSED IN AVR32UC.
|
||||
_handle_DTLB_Modified:
|
||||
rjmp $
|
||||
|
||||
.org 0x050
|
||||
// ITLB Miss.
|
||||
_handle_ITLB_Miss:
|
||||
rjmp $
|
||||
|
||||
.org 0x060
|
||||
// DTLB Miss (Read).
|
||||
_handle_DTLB_Miss_Read:
|
||||
rjmp $
|
||||
|
||||
.org 0x070
|
||||
// DTLB Miss (Write).
|
||||
_handle_DTLB_Miss_Write:
|
||||
rjmp $
|
||||
|
||||
.org 0x100
|
||||
// Supervisor Call.
|
||||
_handle_Supervisor_Call:
|
||||
rjmp $
|
||||
|
||||
|
||||
// Interrupt support.
|
||||
// The interrupt controller must provide the offset address relative to EVBA.
|
||||
// Important note:
|
||||
// All interrupts call a C function named _get_interrupt_handler.
|
||||
// This function will read group and interrupt line number to then return in
|
||||
// R12 a pointer to a user-provided interrupt handler.
|
||||
|
||||
.balign 4
|
||||
|
||||
.irp priority, 0, 1, 2, 3
|
||||
_int\priority:
|
||||
#if __AVR32_UC__
|
||||
// R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
|
||||
// CPU upon interrupt entry. No other register is saved by hardware.
|
||||
#elif __AVR32_AP__
|
||||
// PC and SR are automatically saved in respectively RAR_INTx and RSR_INTx by
|
||||
// the CPU upon interrupt entry. No other register is saved by hardware.
|
||||
pushm r8-r12, lr
|
||||
#endif
|
||||
mov r12, \priority // Pass the int_level parameter to the _get_interrupt_handler function.
|
||||
call _get_interrupt_handler
|
||||
cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
|
||||
#if __AVR32_UC__
|
||||
movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
|
||||
#elif __AVR32_AP__
|
||||
breq spint\priority // If this was a spurious interrupt (R12 == NULL), branch.
|
||||
st.w --sp, r12 // Push the pointer to the interrupt handler onto the system stack since no register may be altered.
|
||||
popm r8-r12, lr, pc // Restore registers and jump to the handler.
|
||||
spint\priority:
|
||||
popm r8-r12, lr
|
||||
#endif
|
||||
rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
|
||||
.endr
|
||||
|
||||
|
||||
// Constant data area.
|
||||
|
||||
.balign 4
|
||||
|
||||
// Values to store in the interrupt priority registers for the various interrupt priority levels.
|
||||
// The interrupt priority registers contain the interrupt priority level and
|
||||
// the EVBA-relative interrupt vector offset.
|
||||
.global ipr_val
|
||||
.type ipr_val, @object
|
||||
ipr_val:
|
||||
.word (AVR32_INTC_INT0 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int0 - _evba),\
|
||||
(AVR32_INTC_INT1 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int1 - _evba),\
|
||||
(AVR32_INTC_INT2 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int2 - _evba),\
|
||||
(AVR32_INTC_INT3 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int3 - _evba)
|
||||
|
||||
|
||||
//! \endverbatim
|
||||
//! @}
|
||||
@ -1,247 +0,0 @@
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief Exception and interrupt vectors.
|
||||
*
|
||||
* This file maps all events supported by an AVR32.
|
||||
*
|
||||
* - Compiler: IAR EWAVR32
|
||||
* - Supported devices: All AVR32 devices with an INTC module can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#if __CORE__ != __AVR32A__ && __CORE__ != __AVR32B__
|
||||
#error Implementation of the AVR32 architecture not supported by the INTC driver.
|
||||
#endif
|
||||
|
||||
|
||||
#include <avr32/io.h>
|
||||
|
||||
|
||||
//! @{
|
||||
//! \verbatim
|
||||
|
||||
|
||||
// Start of Exception Vector Table.
|
||||
|
||||
// EVBA must be aligned with a power of two strictly greater than the EVBA-
|
||||
// relative offset of the last vector.
|
||||
COMMON EVTAB:CODE:ROOT(9)
|
||||
|
||||
|
||||
// Force EVBA initialization.
|
||||
EXTERN ??init_EVBA
|
||||
REQUIRE ??init_EVBA
|
||||
|
||||
// Export symbol.
|
||||
PUBLIC ??EVBA
|
||||
PUBLIC _evba
|
||||
??EVBA:
|
||||
_evba:
|
||||
|
||||
ORG 0x000
|
||||
// Unrecoverable Exception.
|
||||
_handle_Unrecoverable_Exception:
|
||||
rjmp $
|
||||
|
||||
ORG 0x004
|
||||
// TLB Multiple Hit.
|
||||
_handle_TLB_Multiple_Hit:
|
||||
rjmp $
|
||||
|
||||
ORG 0x008
|
||||
// Bus Error Data Fetch.
|
||||
_handle_Bus_Error_Data_Fetch:
|
||||
rjmp $
|
||||
|
||||
ORG 0x00C
|
||||
// Bus Error Instruction Fetch.
|
||||
_handle_Bus_Error_Instruction_Fetch:
|
||||
rjmp $
|
||||
|
||||
ORG 0x010
|
||||
// NMI.
|
||||
_handle_NMI:
|
||||
rjmp $
|
||||
|
||||
ORG 0x014
|
||||
// Instruction Address.
|
||||
_handle_Instruction_Address:
|
||||
rjmp $
|
||||
|
||||
ORG 0x018
|
||||
// ITLB Protection.
|
||||
_handle_ITLB_Protection:
|
||||
rjmp $
|
||||
|
||||
ORG 0x01C
|
||||
// Breakpoint.
|
||||
_handle_Breakpoint:
|
||||
rjmp $
|
||||
|
||||
ORG 0x020
|
||||
// Illegal Opcode.
|
||||
_handle_Illegal_Opcode:
|
||||
rjmp $
|
||||
|
||||
ORG 0x024
|
||||
// Unimplemented Instruction.
|
||||
_handle_Unimplemented_Instruction:
|
||||
rjmp $
|
||||
|
||||
ORG 0x028
|
||||
// Privilege Violation.
|
||||
_handle_Privilege_Violation:
|
||||
rjmp $
|
||||
|
||||
ORG 0x02C
|
||||
// Floating-Point: UNUSED IN AVR32UC and AVR32AP.
|
||||
_handle_Floating_Point:
|
||||
rjmp $
|
||||
|
||||
ORG 0x030
|
||||
// Coprocessor Absent: UNUSED IN AVR32UC.
|
||||
_handle_Coprocessor_Absent:
|
||||
rjmp $
|
||||
|
||||
ORG 0x034
|
||||
// Data Address (Read).
|
||||
_handle_Data_Address_Read:
|
||||
rjmp $
|
||||
|
||||
ORG 0x038
|
||||
// Data Address (Write).
|
||||
_handle_Data_Address_Write:
|
||||
rjmp $
|
||||
|
||||
ORG 0x03C
|
||||
// DTLB Protection (Read).
|
||||
_handle_DTLB_Protection_Read:
|
||||
rjmp $
|
||||
|
||||
ORG 0x040
|
||||
// DTLB Protection (Write).
|
||||
_handle_DTLB_Protection_Write:
|
||||
rjmp $
|
||||
|
||||
ORG 0x044
|
||||
// DTLB Modified: UNUSED IN AVR32UC.
|
||||
_handle_DTLB_Modified:
|
||||
rjmp $
|
||||
|
||||
ORG 0x050
|
||||
// ITLB Miss.
|
||||
_handle_ITLB_Miss:
|
||||
rjmp $
|
||||
|
||||
ORG 0x060
|
||||
// DTLB Miss (Read).
|
||||
_handle_DTLB_Miss_Read:
|
||||
rjmp $
|
||||
|
||||
ORG 0x070
|
||||
// DTLB Miss (Write).
|
||||
_handle_DTLB_Miss_Write:
|
||||
rjmp $
|
||||
|
||||
ORG 0x100
|
||||
// Supervisor Call.
|
||||
_handle_Supervisor_Call:
|
||||
rjmp $
|
||||
|
||||
|
||||
// Interrupt support.
|
||||
// The interrupt controller must provide the offset address relative to EVBA.
|
||||
// Important note:
|
||||
// All interrupts call a C function named _get_interrupt_handler.
|
||||
// This function will read group and interrupt line number to then return in
|
||||
// R12 a pointer to a user-provided interrupt handler.
|
||||
|
||||
ALIGN 2
|
||||
|
||||
REPTI priority, 0, 1, 2, 3
|
||||
_int<priority>:
|
||||
#if __CORE__ == __AVR32A__
|
||||
// R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
|
||||
// CPU upon interrupt entry. No other register is saved by hardware.
|
||||
#elif __CORE__ == __AVR32B__
|
||||
// PC and SR are automatically saved in respectively RAR_INTx and RSR_INTx by
|
||||
// the CPU upon interrupt entry. No other register is saved by hardware.
|
||||
pushm r8-r12, lr
|
||||
#endif
|
||||
mov r12, priority // Pass the int_level parameter to the _get_interrupt_handler function.
|
||||
mcall __get_interrupt_handler
|
||||
cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
|
||||
#if __CORE__ == __AVR32A__
|
||||
movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
|
||||
#elif __CORE__ == __AVR32B__
|
||||
breq spint<priority> // If this was a spurious interrupt (R12 == NULL), branch.
|
||||
st.w --sp, r12 // Push the pointer to the interrupt handler onto the system stack since no register may be altered.
|
||||
popm r8-r12, lr, pc // Restore registers and jump to the handler.
|
||||
spint<priority>:
|
||||
popm r8-r12, lr
|
||||
#endif
|
||||
rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
|
||||
ENDR
|
||||
|
||||
|
||||
// Constant data area.
|
||||
|
||||
ALIGN 2
|
||||
|
||||
// Import symbol.
|
||||
EXTERN _get_interrupt_handler
|
||||
__get_interrupt_handler:
|
||||
DC32 _get_interrupt_handler
|
||||
|
||||
// Values to store in the interrupt priority registers for the various interrupt priority levels.
|
||||
// The interrupt priority registers contain the interrupt priority level and
|
||||
// the EVBA-relative interrupt vector offset.
|
||||
PUBLIC ipr_val
|
||||
ipr_val:
|
||||
DC32 (AVR32_INTC_INT0 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int0 - _evba),\
|
||||
(AVR32_INTC_INT1 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int1 - _evba),\
|
||||
(AVR32_INTC_INT2 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int2 - _evba),\
|
||||
(AVR32_INTC_INT3 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int3 - _evba)
|
||||
|
||||
|
||||
END
|
||||
|
||||
|
||||
//! \endverbatim
|
||||
//! @}
|
||||
@ -1,214 +0,0 @@
|
||||
/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief INTC driver for AVR32 UC3.
|
||||
*
|
||||
* AVR32 Interrupt Controller driver module.
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices with an INTC module can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#include <avr32/io.h>
|
||||
#include "compiler.h"
|
||||
#include "preprocessor.h"
|
||||
#include "intc.h"
|
||||
|
||||
// define _evba from exception.S
|
||||
extern void _evba;
|
||||
|
||||
//! Values to store in the interrupt priority registers for the various interrupt priority levels.
|
||||
extern const unsigned int ipr_val[AVR32_INTC_NUM_INT_LEVELS];
|
||||
|
||||
//! Creates a table of interrupt line handlers per interrupt group in order to optimize RAM space.
|
||||
//! Each line handler table contains a set of pointers to interrupt handlers.
|
||||
#if (defined __GNUC__)
|
||||
#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \
|
||||
static volatile __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];
|
||||
#elif (defined __ICCAVR32__)
|
||||
#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \
|
||||
static volatile __no_init __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];
|
||||
#endif
|
||||
MREPEAT(AVR32_INTC_NUM_INT_GRPS, DECL_INT_LINE_HANDLER_TABLE, ~);
|
||||
#undef DECL_INT_LINE_HANDLER_TABLE
|
||||
|
||||
//! Table containing for each interrupt group the number of interrupt request
|
||||
//! lines and a pointer to the table of interrupt line handlers.
|
||||
static const struct
|
||||
{
|
||||
unsigned int num_irqs;
|
||||
volatile __int_handler *_int_line_handler_table;
|
||||
} _int_handler_table[AVR32_INTC_NUM_INT_GRPS] =
|
||||
{
|
||||
#define INSERT_INT_LINE_HANDLER_TABLE(GRP, unused) \
|
||||
{AVR32_INTC_NUM_IRQS_PER_GRP##GRP, _int_line_handler_table_##GRP},
|
||||
MREPEAT(AVR32_INTC_NUM_INT_GRPS, INSERT_INT_LINE_HANDLER_TABLE, ~)
|
||||
#undef INSERT_INT_LINE_HANDLER_TABLE
|
||||
};
|
||||
|
||||
|
||||
/*! \brief Default interrupt handler.
|
||||
*
|
||||
* \note Taken and adapted from Newlib.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__interrupt__))
|
||||
#elif (defined __ICCAVR32__)
|
||||
__interrupt
|
||||
#endif
|
||||
static void _unhandled_interrupt(void)
|
||||
{
|
||||
// Catch unregistered interrupts.
|
||||
while (TRUE);
|
||||
}
|
||||
|
||||
|
||||
/*! \brief Gets the interrupt handler of the current event at the \a int_level
|
||||
* interrupt priority level (called from exception.S).
|
||||
*
|
||||
* \param int_level Interrupt priority level to handle.
|
||||
*
|
||||
* \return Interrupt handler to execute.
|
||||
*
|
||||
* \note Taken and adapted from Newlib.
|
||||
*/
|
||||
__int_handler _get_interrupt_handler(unsigned int int_level)
|
||||
{
|
||||
// ICR3 is mapped first, ICR0 last.
|
||||
// Code in exception.S puts int_level in R12 which is used by AVR32-GCC to
|
||||
// pass a single argument to a function.
|
||||
unsigned int int_grp = AVR32_INTC.icr[AVR32_INTC_INT3 - int_level];
|
||||
unsigned int int_req = AVR32_INTC.irr[int_grp];
|
||||
|
||||
// As an interrupt may disappear while it is being fetched by the CPU
|
||||
// (spurious interrupt caused by a delayed response from an MCU peripheral to
|
||||
// an interrupt flag clear or interrupt disable instruction), check if there
|
||||
// are remaining interrupt lines to process.
|
||||
// If a spurious interrupt occurs, the status register (SR) contains an
|
||||
// execution mode and interrupt level masks corresponding to a level 0
|
||||
// interrupt, whatever the interrupt priority level causing the spurious
|
||||
// event. This behavior has been chosen because a spurious interrupt has not
|
||||
// to be a priority one and because it may not cause any trouble to other
|
||||
// interrupts.
|
||||
// However, these spurious interrupts place the hardware in an unstable state
|
||||
// and could give problems in other/future versions of the CPU, so the
|
||||
// software has to be written so that they never occur. The only safe way of
|
||||
// achieving this is to always clear or disable peripheral interrupts with the
|
||||
// following sequence:
|
||||
// 1: Mask the interrupt in the CPU by setting GM (or IxM) in SR.
|
||||
// 2: Perform the bus access to the peripheral register that clears or
|
||||
// disables the interrupt.
|
||||
// 3: Wait until the interrupt has actually been cleared or disabled by the
|
||||
// peripheral. This is usually performed by reading from a register in the
|
||||
// same peripheral (it DOES NOT have to be the same register that was
|
||||
// accessed in step 2, but it MUST be in the same peripheral), what takes
|
||||
// bus system latencies into account, but peripheral internal latencies
|
||||
// (generally 0 cycle) also have to be considered.
|
||||
// 4: Unmask the interrupt in the CPU by clearing GM (or IxM) in SR.
|
||||
// Note that steps 1 and 4 are useless inside interrupt handlers as the
|
||||
// corresponding interrupt level is automatically masked by IxM (unless IxM is
|
||||
// explicitly cleared by the software).
|
||||
//
|
||||
// Get the right IRQ handler.
|
||||
//
|
||||
// If several interrupt lines are active in the group, the interrupt line with
|
||||
// the highest number is selected. This is to be coherent with the
|
||||
// prioritization of interrupt groups performed by the hardware interrupt
|
||||
// controller.
|
||||
//
|
||||
// If no handler has been registered for the pending interrupt,
|
||||
// _unhandled_interrupt will be selected thanks to the initialization of
|
||||
// _int_line_handler_table_x by INTC_init_interrupts.
|
||||
//
|
||||
// exception.S will provide the interrupt handler with a clean interrupt stack
|
||||
// frame, with nothing more pushed onto the stack. The interrupt handler must
|
||||
// manage the `rete' instruction, what can be done thanks to pure assembly,
|
||||
// inline assembly or the `__attribute__((__interrupt__))' C function
|
||||
// attribute.
|
||||
return (int_req) ? _int_handler_table[int_grp]._int_line_handler_table[32 - clz(int_req) - 1] : NULL;
|
||||
}
|
||||
|
||||
//! Init EVBA address. This sequence might also be done in the UTILS/STARTUP/GCC/crt0.S
|
||||
static __inline__ void INTC_init_evba(void)
|
||||
{
|
||||
Set_system_register(AVR32_EVBA, (int)&_evba );
|
||||
}
|
||||
|
||||
void INTC_init_interrupts(void)
|
||||
{
|
||||
unsigned int int_grp, int_req;
|
||||
|
||||
INTC_init_evba();
|
||||
|
||||
// For all interrupt groups,
|
||||
for (int_grp = 0; int_grp < AVR32_INTC_NUM_INT_GRPS; int_grp++)
|
||||
{
|
||||
// For all interrupt request lines of each group,
|
||||
for (int_req = 0; int_req < _int_handler_table[int_grp].num_irqs; int_req++)
|
||||
{
|
||||
// Assign _unhandled_interrupt as default interrupt handler.
|
||||
_int_handler_table[int_grp]._int_line_handler_table[int_req] = &_unhandled_interrupt;
|
||||
}
|
||||
|
||||
// Set the interrupt group priority register to its default value.
|
||||
// By default, all interrupt groups are linked to the interrupt priority
|
||||
// level 0 and to the interrupt vector _int0.
|
||||
AVR32_INTC.ipr[int_grp] = ipr_val[AVR32_INTC_INT0];
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level)
|
||||
{
|
||||
// Determine the group of the IRQ.
|
||||
unsigned int int_grp = irq / AVR32_INTC_MAX_NUM_IRQS_PER_GRP;
|
||||
|
||||
// Store in _int_line_handler_table_x the pointer to the interrupt handler, so
|
||||
// that _get_interrupt_handler can retrieve it when the interrupt is vectored.
|
||||
_int_handler_table[int_grp]._int_line_handler_table[irq % AVR32_INTC_MAX_NUM_IRQS_PER_GRP] = handler;
|
||||
|
||||
// Program the corresponding IPRX register to set the interrupt priority level
|
||||
// and the interrupt vector offset that will be fetched by the core interrupt
|
||||
// system.
|
||||
// NOTE: The _intx functions are intermediate assembly functions between the
|
||||
// core interrupt system and the user interrupt handler.
|
||||
AVR32_INTC.ipr[int_grp] = ipr_val[int_level & (AVR32_INTC_IPR_INTLEVEL_MASK >> AVR32_INTC_IPR_INTLEVEL_OFFSET)];
|
||||
}
|
||||
@ -1,100 +0,0 @@
|
||||
/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief INTC driver for AVR32 UC3.
|
||||
*
|
||||
* AVR32 Interrupt Controller driver module.
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices with an INTC module can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _INTC_H_
|
||||
#define _INTC_H_
|
||||
|
||||
#include "compiler.h"
|
||||
|
||||
|
||||
//! Maximal number of interrupt request lines per group.
|
||||
#define AVR32_INTC_MAX_NUM_IRQS_PER_GRP 32
|
||||
|
||||
//! Number of interrupt priority levels.
|
||||
#define AVR32_INTC_NUM_INT_LEVELS (1 << AVR32_INTC_IPR_INTLEVEL_SIZE)
|
||||
|
||||
|
||||
#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
|
||||
|
||||
//! Pointer to interrupt handler.
|
||||
#if (defined __GNUC__)
|
||||
typedef void (*__int_handler)(void);
|
||||
#elif (defined __ICCAVR32__)
|
||||
typedef void (__interrupt *__int_handler)(void);
|
||||
#endif
|
||||
|
||||
|
||||
/*! \brief Initializes the hardware interrupt controller driver.
|
||||
*
|
||||
* \note Taken and adapted from Newlib.
|
||||
*/
|
||||
extern void INTC_init_interrupts(void);
|
||||
|
||||
/*! \brief Registers an interrupt handler.
|
||||
*
|
||||
* \param handler Interrupt handler to register.
|
||||
* \param irq IRQ of the interrupt handler to register.
|
||||
* \param int_level Interrupt priority level to assign to the group of this IRQ.
|
||||
*
|
||||
* \warning The interrupt handler must manage the `rete' instruction, what can
|
||||
* be done thanks to pure assembly, inline assembly or the
|
||||
* `__attribute__((__interrupt__))' C function attribute.
|
||||
*
|
||||
* \warning If several interrupt handlers of a same group are registered with
|
||||
* different priority levels, only the latest priority level set will
|
||||
* be effective.
|
||||
*
|
||||
* \note Taken and adapted from Newlib.
|
||||
*/
|
||||
extern void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level);
|
||||
|
||||
#endif // __AVR32_ABI_COMPILER__
|
||||
|
||||
|
||||
#endif // _INTC_H_
|
||||
@ -1,30 +0,0 @@
|
||||
|
||||
The PM module is very specific to the device it is integrated in. Thus instead
|
||||
of providing one low-level software driver for all PM modules which could be
|
||||
cumbersome to use and maintain, this folder contains instead several versions of
|
||||
PM software drivers, depending on the device it was intended for.
|
||||
|
||||
Furthermore, the software drivers do not have the same API (mostly due to major
|
||||
differences between PM module versions).
|
||||
|
||||
Note however that the power_clocks_lib.c/.h collection is destined to provide
|
||||
a high-level API abstracting the existence of modules dealing with Power
|
||||
Management and Clock configuration and System Control.
|
||||
|
||||
Here is a brief presentation of the files present in this folder:
|
||||
- pm_at32ap7000.h, pm_at32ap7000.c: low-level software driver for a PM module
|
||||
with version 100
|
||||
|
||||
- pm.c, pm.h: low-level software driver for a PM module with version 2xx
|
||||
- pm_conf_clocks.c: Clocks configuration library relying on pm.c/.h for a PM
|
||||
module with version 2xx. Its interface is available in pm.h.
|
||||
|
||||
- pm_uc3l.h, pm_uc3l.c: low-level software driver for the UC3L devices PM module
|
||||
|
||||
- pm_uc3c.h, pm_uc3c.c: low-level software driver for the UC3C devices PM module
|
||||
|
||||
- power_clocks_lib.h, power_clocks_lib.c: high-level library to abstract features
|
||||
such as oscillators/pll/dfll configuration, clock configuration, System-sensible
|
||||
parameters configuration, buses clocks configuration, sleep mode, reset. This
|
||||
list of features being quite broad, an implementation of this library must
|
||||
use several modules of a device.
|
||||
@ -1,546 +0,0 @@
|
||||
/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file has been prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief Power Manager driver.
|
||||
*
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#include "compiler.h"
|
||||
#include "pm.h"
|
||||
|
||||
|
||||
/*! \name PM Writable Bit-Field Registers
|
||||
*/
|
||||
//! @{
|
||||
|
||||
typedef union
|
||||
{
|
||||
unsigned long mcctrl;
|
||||
avr32_pm_mcctrl_t MCCTRL;
|
||||
} u_avr32_pm_mcctrl_t;
|
||||
|
||||
typedef union
|
||||
{
|
||||
unsigned long cksel;
|
||||
avr32_pm_cksel_t CKSEL;
|
||||
} u_avr32_pm_cksel_t;
|
||||
|
||||
typedef union
|
||||
{
|
||||
unsigned long pll;
|
||||
avr32_pm_pll_t PLL;
|
||||
} u_avr32_pm_pll_t;
|
||||
|
||||
typedef union
|
||||
{
|
||||
unsigned long oscctrl0;
|
||||
avr32_pm_oscctrl0_t OSCCTRL0;
|
||||
} u_avr32_pm_oscctrl0_t;
|
||||
|
||||
typedef union
|
||||
{
|
||||
unsigned long oscctrl1;
|
||||
avr32_pm_oscctrl1_t OSCCTRL1;
|
||||
} u_avr32_pm_oscctrl1_t;
|
||||
|
||||
typedef union
|
||||
{
|
||||
unsigned long oscctrl32;
|
||||
avr32_pm_oscctrl32_t OSCCTRL32;
|
||||
} u_avr32_pm_oscctrl32_t;
|
||||
|
||||
typedef union
|
||||
{
|
||||
unsigned long ier;
|
||||
avr32_pm_ier_t IER;
|
||||
} u_avr32_pm_ier_t;
|
||||
|
||||
typedef union
|
||||
{
|
||||
unsigned long idr;
|
||||
avr32_pm_idr_t IDR;
|
||||
} u_avr32_pm_idr_t;
|
||||
|
||||
typedef union
|
||||
{
|
||||
unsigned long icr;
|
||||
avr32_pm_icr_t ICR;
|
||||
} u_avr32_pm_icr_t;
|
||||
|
||||
typedef union
|
||||
{
|
||||
unsigned long gcctrl;
|
||||
avr32_pm_gcctrl_t GCCTRL;
|
||||
} u_avr32_pm_gcctrl_t;
|
||||
|
||||
typedef union
|
||||
{
|
||||
unsigned long rccr;
|
||||
avr32_pm_rccr_t RCCR;
|
||||
} u_avr32_pm_rccr_t;
|
||||
|
||||
typedef union
|
||||
{
|
||||
unsigned long bgcr;
|
||||
avr32_pm_bgcr_t BGCR;
|
||||
} u_avr32_pm_bgcr_t;
|
||||
|
||||
typedef union
|
||||
{
|
||||
unsigned long vregcr;
|
||||
avr32_pm_vregcr_t VREGCR;
|
||||
} u_avr32_pm_vregcr_t;
|
||||
|
||||
typedef union
|
||||
{
|
||||
unsigned long bod;
|
||||
avr32_pm_bod_t BOD;
|
||||
} u_avr32_pm_bod_t;
|
||||
|
||||
//! @}
|
||||
|
||||
|
||||
/*! \brief Sets the mode of the oscillator 0.
|
||||
*
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
|
||||
* \param mode Oscillator 0 mode (i.e. AVR32_PM_OSCCTRL0_MODE_x).
|
||||
*/
|
||||
static void pm_set_osc0_mode(volatile avr32_pm_t *pm, unsigned int mode)
|
||||
{
|
||||
// Read
|
||||
u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0};
|
||||
// Modify
|
||||
u_avr32_pm_oscctrl0.OSCCTRL0.mode = mode;
|
||||
// Write
|
||||
pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0;
|
||||
}
|
||||
|
||||
|
||||
void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm)
|
||||
{
|
||||
pm_set_osc0_mode(pm, AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK);
|
||||
}
|
||||
|
||||
|
||||
void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0)
|
||||
{
|
||||
pm_set_osc0_mode(pm, (fosc0 < 900000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G0 :
|
||||
(fosc0 < 3000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G1 :
|
||||
(fosc0 < 8000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2 :
|
||||
AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3);
|
||||
}
|
||||
|
||||
|
||||
void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup)
|
||||
{
|
||||
pm_enable_clk0_no_wait(pm, startup);
|
||||
pm_wait_for_clk0_ready(pm);
|
||||
}
|
||||
|
||||
|
||||
void pm_disable_clk0(volatile avr32_pm_t *pm)
|
||||
{
|
||||
pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC0EN_MASK;
|
||||
}
|
||||
|
||||
|
||||
void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
|
||||
{
|
||||
// Read register
|
||||
u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0};
|
||||
// Modify
|
||||
u_avr32_pm_oscctrl0.OSCCTRL0.startup = startup;
|
||||
// Write back
|
||||
pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0;
|
||||
|
||||
pm->mcctrl |= AVR32_PM_MCCTRL_OSC0EN_MASK;
|
||||
}
|
||||
|
||||
|
||||
void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm)
|
||||
{
|
||||
while (!(pm->poscsr & AVR32_PM_POSCSR_OSC0RDY_MASK));
|
||||
}
|
||||
|
||||
|
||||
/*! \brief Sets the mode of the oscillator 1.
|
||||
*
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
|
||||
* \param mode Oscillator 1 mode (i.e. AVR32_PM_OSCCTRL1_MODE_x).
|
||||
*/
|
||||
static void pm_set_osc1_mode(volatile avr32_pm_t *pm, unsigned int mode)
|
||||
{
|
||||
// Read
|
||||
u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1};
|
||||
// Modify
|
||||
u_avr32_pm_oscctrl1.OSCCTRL1.mode = mode;
|
||||
// Write
|
||||
pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1;
|
||||
}
|
||||
|
||||
|
||||
void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm)
|
||||
{
|
||||
pm_set_osc1_mode(pm, AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK);
|
||||
}
|
||||
|
||||
|
||||
void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1)
|
||||
{
|
||||
pm_set_osc1_mode(pm, (fosc1 < 900000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G0 :
|
||||
(fosc1 < 3000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G1 :
|
||||
(fosc1 < 8000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G2 :
|
||||
AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G3);
|
||||
}
|
||||
|
||||
|
||||
void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup)
|
||||
{
|
||||
pm_enable_clk1_no_wait(pm, startup);
|
||||
pm_wait_for_clk1_ready(pm);
|
||||
}
|
||||
|
||||
|
||||
void pm_disable_clk1(volatile avr32_pm_t *pm)
|
||||
{
|
||||
pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC1EN_MASK;
|
||||
}
|
||||
|
||||
|
||||
void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
|
||||
{
|
||||
// Read register
|
||||
u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1};
|
||||
// Modify
|
||||
u_avr32_pm_oscctrl1.OSCCTRL1.startup = startup;
|
||||
// Write back
|
||||
pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1;
|
||||
|
||||
pm->mcctrl |= AVR32_PM_MCCTRL_OSC1EN_MASK;
|
||||
}
|
||||
|
||||
|
||||
void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm)
|
||||
{
|
||||
while (!(pm->poscsr & AVR32_PM_POSCSR_OSC1RDY_MASK));
|
||||
}
|
||||
|
||||
|
||||
/*! \brief Sets the mode of the 32-kHz oscillator.
|
||||
*
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
|
||||
* \param mode 32-kHz oscillator mode (i.e. AVR32_PM_OSCCTRL32_MODE_x).
|
||||
*/
|
||||
static void pm_set_osc32_mode(volatile avr32_pm_t *pm, unsigned int mode)
|
||||
{
|
||||
// Read
|
||||
u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32};
|
||||
// Modify
|
||||
u_avr32_pm_oscctrl32.OSCCTRL32.mode = mode;
|
||||
// Write
|
||||
pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32;
|
||||
}
|
||||
|
||||
|
||||
void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm)
|
||||
{
|
||||
pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK);
|
||||
}
|
||||
|
||||
|
||||
void pm_enable_osc32_crystal(volatile avr32_pm_t *pm)
|
||||
{
|
||||
pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_CRYSTAL);
|
||||
}
|
||||
|
||||
|
||||
void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup)
|
||||
{
|
||||
pm_enable_clk32_no_wait(pm, startup);
|
||||
pm_wait_for_clk32_ready(pm);
|
||||
}
|
||||
|
||||
|
||||
void pm_disable_clk32(volatile avr32_pm_t *pm)
|
||||
{
|
||||
pm->oscctrl32 &= ~AVR32_PM_OSCCTRL32_OSC32EN_MASK;
|
||||
}
|
||||
|
||||
|
||||
void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
|
||||
{
|
||||
// Read register
|
||||
u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32};
|
||||
// Modify
|
||||
u_avr32_pm_oscctrl32.OSCCTRL32.osc32en = 1;
|
||||
u_avr32_pm_oscctrl32.OSCCTRL32.startup = startup;
|
||||
// Write back
|
||||
pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32;
|
||||
}
|
||||
|
||||
|
||||
void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm)
|
||||
{
|
||||
while (!(pm->poscsr & AVR32_PM_POSCSR_OSC32RDY_MASK));
|
||||
}
|
||||
|
||||
|
||||
void pm_cksel(volatile avr32_pm_t *pm,
|
||||
unsigned int pbadiv,
|
||||
unsigned int pbasel,
|
||||
unsigned int pbbdiv,
|
||||
unsigned int pbbsel,
|
||||
unsigned int hsbdiv,
|
||||
unsigned int hsbsel)
|
||||
{
|
||||
u_avr32_pm_cksel_t u_avr32_pm_cksel = {0};
|
||||
|
||||
u_avr32_pm_cksel.CKSEL.cpusel = hsbsel;
|
||||
u_avr32_pm_cksel.CKSEL.cpudiv = hsbdiv;
|
||||
u_avr32_pm_cksel.CKSEL.hsbsel = hsbsel;
|
||||
u_avr32_pm_cksel.CKSEL.hsbdiv = hsbdiv;
|
||||
u_avr32_pm_cksel.CKSEL.pbasel = pbasel;
|
||||
u_avr32_pm_cksel.CKSEL.pbadiv = pbadiv;
|
||||
u_avr32_pm_cksel.CKSEL.pbbsel = pbbsel;
|
||||
u_avr32_pm_cksel.CKSEL.pbbdiv = pbbdiv;
|
||||
|
||||
pm->cksel = u_avr32_pm_cksel.cksel;
|
||||
|
||||
// Wait for ckrdy bit and then clear it
|
||||
while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK));
|
||||
}
|
||||
|
||||
|
||||
void pm_gc_setup(volatile avr32_pm_t *pm,
|
||||
unsigned int gc,
|
||||
unsigned int osc_or_pll, // Use Osc (=0) or PLL (=1)
|
||||
unsigned int pll_osc, // Sel Osc0/PLL0 or Osc1/PLL1
|
||||
unsigned int diven,
|
||||
unsigned int div)
|
||||
{
|
||||
u_avr32_pm_gcctrl_t u_avr32_pm_gcctrl = {0};
|
||||
|
||||
u_avr32_pm_gcctrl.GCCTRL.oscsel = pll_osc;
|
||||
u_avr32_pm_gcctrl.GCCTRL.pllsel = osc_or_pll;
|
||||
u_avr32_pm_gcctrl.GCCTRL.diven = diven;
|
||||
u_avr32_pm_gcctrl.GCCTRL.div = div;
|
||||
|
||||
pm->gcctrl[gc] = u_avr32_pm_gcctrl.gcctrl;
|
||||
}
|
||||
|
||||
|
||||
void pm_gc_enable(volatile avr32_pm_t *pm,
|
||||
unsigned int gc)
|
||||
{
|
||||
pm->gcctrl[gc] |= AVR32_PM_GCCTRL_CEN_MASK;
|
||||
}
|
||||
|
||||
|
||||
void pm_gc_disable(volatile avr32_pm_t *pm,
|
||||
unsigned int gc)
|
||||
{
|
||||
pm->gcctrl[gc] &= ~AVR32_PM_GCCTRL_CEN_MASK;
|
||||
}
|
||||
|
||||
|
||||
void pm_pll_setup(volatile avr32_pm_t *pm,
|
||||
unsigned int pll,
|
||||
unsigned int mul,
|
||||
unsigned int div,
|
||||
unsigned int osc,
|
||||
unsigned int lockcount)
|
||||
{
|
||||
u_avr32_pm_pll_t u_avr32_pm_pll = {0};
|
||||
|
||||
u_avr32_pm_pll.PLL.pllosc = osc;
|
||||
u_avr32_pm_pll.PLL.plldiv = div;
|
||||
u_avr32_pm_pll.PLL.pllmul = mul;
|
||||
u_avr32_pm_pll.PLL.pllcount = lockcount;
|
||||
|
||||
pm->pll[pll] = u_avr32_pm_pll.pll;
|
||||
}
|
||||
|
||||
|
||||
void pm_pll_set_option(volatile avr32_pm_t *pm,
|
||||
unsigned int pll,
|
||||
unsigned int pll_freq,
|
||||
unsigned int pll_div2,
|
||||
unsigned int pll_wbwdisable)
|
||||
{
|
||||
u_avr32_pm_pll_t u_avr32_pm_pll = {pm->pll[pll]};
|
||||
u_avr32_pm_pll.PLL.pllopt = pll_freq | (pll_div2 << 1) | (pll_wbwdisable << 2);
|
||||
pm->pll[pll] = u_avr32_pm_pll.pll;
|
||||
}
|
||||
|
||||
|
||||
unsigned int pm_pll_get_option(volatile avr32_pm_t *pm,
|
||||
unsigned int pll)
|
||||
{
|
||||
return (pm->pll[pll] & AVR32_PM_PLLOPT_MASK) >> AVR32_PM_PLLOPT_OFFSET;
|
||||
}
|
||||
|
||||
|
||||
void pm_pll_enable(volatile avr32_pm_t *pm,
|
||||
unsigned int pll)
|
||||
{
|
||||
pm->pll[pll] |= AVR32_PM_PLLEN_MASK;
|
||||
}
|
||||
|
||||
|
||||
void pm_pll_disable(volatile avr32_pm_t *pm,
|
||||
unsigned int pll)
|
||||
{
|
||||
pm->pll[pll] &= ~AVR32_PM_PLLEN_MASK;
|
||||
}
|
||||
|
||||
|
||||
void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm)
|
||||
{
|
||||
while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK0_MASK));
|
||||
}
|
||||
|
||||
|
||||
void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm)
|
||||
{
|
||||
while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK1_MASK));
|
||||
}
|
||||
|
||||
|
||||
void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock)
|
||||
{
|
||||
// Read
|
||||
u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl};
|
||||
// Modify
|
||||
u_avr32_pm_mcctrl.MCCTRL.mcsel = clock;
|
||||
// Write back
|
||||
pm->mcctrl = u_avr32_pm_mcctrl.mcctrl;
|
||||
}
|
||||
|
||||
|
||||
void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup)
|
||||
{
|
||||
pm_enable_osc0_crystal(pm, fosc0); // Enable the Osc0 in crystal mode
|
||||
pm_enable_clk0(pm, startup); // Crystal startup time - This parameter is critical and depends on the characteristics of the crystal
|
||||
pm_switch_to_clock(pm, AVR32_PM_MCSEL_OSC0); // Then switch main clock to Osc0
|
||||
}
|
||||
|
||||
|
||||
void pm_bod_enable_irq(volatile avr32_pm_t *pm)
|
||||
{
|
||||
pm->ier = AVR32_PM_IER_BODDET_MASK;
|
||||
}
|
||||
|
||||
|
||||
void pm_bod_disable_irq(volatile avr32_pm_t *pm)
|
||||
{
|
||||
Bool global_interrupt_enabled = Is_global_interrupt_enabled();
|
||||
|
||||
if (global_interrupt_enabled) Disable_global_interrupt();
|
||||
pm->idr = AVR32_PM_IDR_BODDET_MASK;
|
||||
pm->isr;
|
||||
if (global_interrupt_enabled) Enable_global_interrupt();
|
||||
}
|
||||
|
||||
|
||||
void pm_bod_clear_irq(volatile avr32_pm_t *pm)
|
||||
{
|
||||
pm->icr = AVR32_PM_ICR_BODDET_MASK;
|
||||
}
|
||||
|
||||
|
||||
unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm)
|
||||
{
|
||||
return ((pm->isr & AVR32_PM_ISR_BODDET_MASK) != 0);
|
||||
}
|
||||
|
||||
|
||||
unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm)
|
||||
{
|
||||
return ((pm->imr & AVR32_PM_IMR_BODDET_MASK) != 0);
|
||||
}
|
||||
|
||||
|
||||
unsigned long pm_bod_get_level(volatile avr32_pm_t *pm)
|
||||
{
|
||||
return (pm->bod & AVR32_PM_BOD_LEVEL_MASK) >> AVR32_PM_BOD_LEVEL_OFFSET;
|
||||
}
|
||||
|
||||
|
||||
unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp)
|
||||
{
|
||||
return pm->gplp[gplp];
|
||||
}
|
||||
|
||||
|
||||
void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value)
|
||||
{
|
||||
pm->gplp[gplp] = value;
|
||||
}
|
||||
|
||||
|
||||
long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module)
|
||||
{
|
||||
unsigned long domain = module>>5;
|
||||
unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain);
|
||||
|
||||
// Implementation-specific shortcut: the ckMASK registers are contiguous and
|
||||
// memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK.
|
||||
|
||||
*regptr |= (1<<(module%32));
|
||||
|
||||
return PASS;
|
||||
}
|
||||
|
||||
long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module)
|
||||
{
|
||||
unsigned long domain = module>>5;
|
||||
unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain);
|
||||
|
||||
// Implementation-specific shortcut: the ckMASK registers are contiguous and
|
||||
// memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK.
|
||||
|
||||
*regptr &= ~(1<<(module%32));
|
||||
|
||||
return PASS;
|
||||
}
|
||||
@ -1,493 +0,0 @@
|
||||
/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file has been prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief Power Manager driver.
|
||||
*
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _PM_H_
|
||||
#define _PM_H_
|
||||
|
||||
#include <avr32/io.h>
|
||||
#include "compiler.h"
|
||||
#include "preprocessor.h"
|
||||
|
||||
|
||||
/*! \brief Sets the MCU in the specified sleep mode.
|
||||
*
|
||||
* \param mode Sleep mode:
|
||||
* \arg \c AVR32_PM_SMODE_IDLE: Idle;
|
||||
* \arg \c AVR32_PM_SMODE_FROZEN: Frozen;
|
||||
* \arg \c AVR32_PM_SMODE_STANDBY: Standby;
|
||||
* \arg \c AVR32_PM_SMODE_STOP: Stop;
|
||||
* \arg \c AVR32_PM_SMODE_DEEP_STOP: DeepStop;
|
||||
* \arg \c AVR32_PM_SMODE_STATIC: Static.
|
||||
*/
|
||||
#define SLEEP(mode) {__asm__ __volatile__ ("sleep "STRINGZ(mode));}
|
||||
|
||||
|
||||
//! Input and output parameters when initializing PM clocks using pm_configure_clocks().
|
||||
typedef struct
|
||||
{
|
||||
//! CPU frequency (input/output argument).
|
||||
unsigned long cpu_f;
|
||||
|
||||
//! PBA frequency (input/output argument).
|
||||
unsigned long pba_f;
|
||||
|
||||
//! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument).
|
||||
unsigned long osc0_f;
|
||||
|
||||
//! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument).
|
||||
unsigned long osc0_startup;
|
||||
} pm_freq_param_t;
|
||||
|
||||
#define PM_FREQ_STATUS_FAIL (-1)
|
||||
#define PM_FREQ_STATUS_OK (0)
|
||||
|
||||
|
||||
/*! \brief Gets the MCU reset cause.
|
||||
*
|
||||
* \param pm Base address of the Power Manager instance (i.e. &AVR32_PM).
|
||||
*
|
||||
* \return The MCU reset cause which can be masked with the
|
||||
* \c AVR32_PM_RCAUSE_x_MASK bit-masks to isolate specific causes.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ unsigned int pm_get_reset_cause(volatile avr32_pm_t *pm)
|
||||
{
|
||||
return pm->rcause;
|
||||
}
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will enable the external clock mode of the oscillator 0.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
*/
|
||||
extern void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will enable the crystal mode of the oscillator 0.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param fosc0 Oscillator 0 crystal frequency (Hz)
|
||||
*/
|
||||
extern void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will enable the oscillator 0 to be used with a startup time.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param startup Clock 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC.
|
||||
*/
|
||||
extern void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will disable the oscillator 0.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
*/
|
||||
extern void pm_disable_clk0(volatile avr32_pm_t *pm);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will enable the oscillator 0 to be used with no startup time.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param startup Clock 0 startup time, for which the function does not wait. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC.
|
||||
*/
|
||||
extern void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will wait until the Osc0 clock is ready.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
*/
|
||||
extern void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will enable the external clock mode of the oscillator 1.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
*/
|
||||
extern void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will enable the crystal mode of the oscillator 1.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param fosc1 Oscillator 1 crystal frequency (Hz)
|
||||
*/
|
||||
extern void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will enable the oscillator 1 to be used with a startup time.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param startup Clock 1 startup time. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC.
|
||||
*/
|
||||
extern void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will disable the oscillator 1.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
*/
|
||||
extern void pm_disable_clk1(volatile avr32_pm_t *pm);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will enable the oscillator 1 to be used with no startup time.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param startup Clock 1 startup time, for which the function does not wait. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC.
|
||||
*/
|
||||
extern void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will wait until the Osc1 clock is ready.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
*/
|
||||
extern void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will enable the external clock mode of the 32-kHz oscillator.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
*/
|
||||
extern void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will enable the crystal mode of the 32-kHz oscillator.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
*/
|
||||
extern void pm_enable_osc32_crystal(volatile avr32_pm_t *pm);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will enable the oscillator 32 to be used with a startup time.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param startup Clock 32 kHz startup time. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC.
|
||||
*/
|
||||
extern void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will disable the oscillator 32.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
*/
|
||||
extern void pm_disable_clk32(volatile avr32_pm_t *pm);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will enable the oscillator 32 to be used with no startup time.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param startup Clock 32 kHz startup time, for which the function does not wait. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC.
|
||||
*/
|
||||
extern void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will wait until the osc32 clock is ready.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
*/
|
||||
extern void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will select all the power manager clocks.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param pbadiv Peripheral Bus A clock divisor enable
|
||||
* \param pbasel Peripheral Bus A select
|
||||
* \param pbbdiv Peripheral Bus B clock divisor enable
|
||||
* \param pbbsel Peripheral Bus B select
|
||||
* \param hsbdiv High Speed Bus clock divisor enable (CPU clock = HSB clock)
|
||||
* \param hsbsel High Speed Bus select (CPU clock = HSB clock )
|
||||
*/
|
||||
extern void pm_cksel(volatile avr32_pm_t *pm, unsigned int pbadiv, unsigned int pbasel, unsigned int pbbdiv, unsigned int pbbsel, unsigned int hsbdiv, unsigned int hsbsel);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will setup a generic clock.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param gc generic clock number (0 for gc0...)
|
||||
* \param osc_or_pll Use OSC (=0) or PLL (=1)
|
||||
* \param pll_osc Select Osc0/PLL0 or Osc1/PLL1
|
||||
* \param diven Generic clock divisor enable
|
||||
* \param div Generic clock divisor
|
||||
*/
|
||||
extern void pm_gc_setup(volatile avr32_pm_t *pm, unsigned int gc, unsigned int osc_or_pll, unsigned int pll_osc, unsigned int diven, unsigned int div);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will enable a generic clock.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param gc generic clock number (0 for gc0...)
|
||||
*/
|
||||
extern void pm_gc_enable(volatile avr32_pm_t *pm, unsigned int gc);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will disable a generic clock.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param gc generic clock number (0 for gc0...)
|
||||
*/
|
||||
extern void pm_gc_disable(volatile avr32_pm_t *pm, unsigned int gc);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will setup a PLL.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param pll PLL number(0 for PLL0, 1 for PLL1)
|
||||
* \param mul PLL MUL in the PLL formula
|
||||
* \param div PLL DIV in the PLL formula
|
||||
* \param osc OSC number (0 for osc0, 1 for osc1)
|
||||
* \param lockcount PLL lockount
|
||||
*/
|
||||
extern void pm_pll_setup(volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will set a PLL option.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param pll PLL number(0 for PLL0, 1 for PLL1)
|
||||
* \param pll_freq Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.
|
||||
* \param pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value)
|
||||
* \param pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.
|
||||
*/
|
||||
extern void pm_pll_set_option(volatile avr32_pm_t *pm, unsigned int pll, unsigned int pll_freq, unsigned int pll_div2, unsigned int pll_wbwdisable);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will get a PLL option.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param pll PLL number(0 for PLL0, 1 for PLL1)
|
||||
* \return Option
|
||||
*/
|
||||
extern unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, unsigned int pll);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will enable a PLL.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param pll PLL number(0 for PLL0, 1 for PLL1)
|
||||
*/
|
||||
extern void pm_pll_enable(volatile avr32_pm_t *pm, unsigned int pll);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will disable a PLL.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param pll PLL number(0 for PLL0, 1 for PLL1)
|
||||
*/
|
||||
extern void pm_pll_disable(volatile avr32_pm_t *pm, unsigned int pll);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will wait for PLL0 locked
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
*/
|
||||
extern void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will wait for PLL1 locked
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
*/
|
||||
extern void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief This function will switch the power manager main clock.
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param clock Clock to be switched on. AVR32_PM_MCSEL_SLOW for RCOsc, AVR32_PM_MCSEL_OSC0 for Osc0, AVR32_PM_MCSEL_PLL0 for PLL0.
|
||||
*/
|
||||
extern void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief Switch main clock to clock Osc0 (crystal mode)
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param fosc0 Oscillator 0 crystal frequency (Hz)
|
||||
* \param startup Crystal 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC.
|
||||
*/
|
||||
extern void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup);
|
||||
|
||||
|
||||
/*! \brief Enables the Brown-Out Detector interrupt.
|
||||
*
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
|
||||
*/
|
||||
extern void pm_bod_enable_irq(volatile avr32_pm_t *pm);
|
||||
|
||||
|
||||
/*! \brief Disables the Brown-Out Detector interrupt.
|
||||
*
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
|
||||
*/
|
||||
extern void pm_bod_disable_irq(volatile avr32_pm_t *pm);
|
||||
|
||||
|
||||
/*! \brief Clears the Brown-Out Detector interrupt flag.
|
||||
*
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
|
||||
*/
|
||||
extern void pm_bod_clear_irq(volatile avr32_pm_t *pm);
|
||||
|
||||
|
||||
/*! \brief Gets the Brown-Out Detector interrupt flag.
|
||||
*
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
|
||||
*
|
||||
* \retval 0 No BOD interrupt.
|
||||
* \retval 1 BOD interrupt pending.
|
||||
*/
|
||||
extern unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm);
|
||||
|
||||
|
||||
/*! \brief Gets the Brown-Out Detector interrupt enable status.
|
||||
*
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
|
||||
*
|
||||
* \retval 0 BOD interrupt disabled.
|
||||
* \retval 1 BOD interrupt enabled.
|
||||
*/
|
||||
extern unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm);
|
||||
|
||||
|
||||
/*! \brief Gets the triggering threshold of the Brown-Out Detector.
|
||||
*
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
|
||||
*
|
||||
* \return Triggering threshold of the BOD. See the electrical characteristics
|
||||
* in the part datasheet for actual voltage levels.
|
||||
*/
|
||||
extern unsigned long pm_bod_get_level(volatile avr32_pm_t *pm);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief Read the content of the PM GPLP registers
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
|
||||
*
|
||||
* \return The content of the chosen GPLP register.
|
||||
*/
|
||||
extern unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief Write into the PM GPLP registers
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
|
||||
* \param value Value to write
|
||||
*/
|
||||
extern void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value);
|
||||
|
||||
|
||||
/*! \brief Enable the clock of a module.
|
||||
*
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param module The module to clock (use one of the defines in the part-specific
|
||||
* header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
|
||||
* clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks")
|
||||
*
|
||||
* \return Status.
|
||||
* \retval 0 Success.
|
||||
* \retval <0 An error occured.
|
||||
*/
|
||||
extern long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module);
|
||||
|
||||
/*! \brief Disable the clock of a module.
|
||||
*
|
||||
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
|
||||
* \param module The module to shut down (use one of the defines in the part-specific
|
||||
* header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
|
||||
* clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks")
|
||||
*
|
||||
* \return Status.
|
||||
* \retval 0 Success.
|
||||
* \retval <0 An error occured.
|
||||
*/
|
||||
extern long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module);
|
||||
|
||||
|
||||
|
||||
/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks
|
||||
* according to the user wishes.
|
||||
*
|
||||
* This function needs some parameters stored in a pm_freq_param_t structure:
|
||||
* - cpu_f and pba_f are the wanted frequencies,
|
||||
* - osc0_f is the oscillator 0 on-board frequency (e.g. FOSC0),
|
||||
* - osc0_startup is the oscillator 0 startup time (e.g. OSC0_STARTUP).
|
||||
*
|
||||
* The function will then configure the clocks using the following rules:
|
||||
* - It first try to find a valid PLL frequency (the highest possible value to avoid jitter) in order
|
||||
* to satisfy the CPU frequency,
|
||||
* - It optimizes the configuration depending the various divide stages,
|
||||
* - Then, the PBA frequency is configured from the CPU freq.
|
||||
* - Note that HSB and PBB are configured with the same frequency as CPU.
|
||||
* - Note also that the number of wait states of the flash read accesses is automatically set-up depending
|
||||
* the CPU frequency. As a consequence, the application needs the FLASHC driver to compile.
|
||||
*
|
||||
* The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f.
|
||||
*
|
||||
* \param param pointer on the configuration structure.
|
||||
*
|
||||
* \retval PM_FREQ_STATUS_OK Mode successfully initialized.
|
||||
* \retval PM_FREQ_STATUS_FAIL The configuration can not be done.
|
||||
*/
|
||||
extern int pm_configure_clocks(pm_freq_param_t *param);
|
||||
|
||||
|
||||
/*! \brief Automatically configure the USB clock.
|
||||
*
|
||||
* USB clock is configured to 48MHz, using the PLL1 from the Oscillator0, assuming
|
||||
* a 12 MHz crystal is connected to it.
|
||||
*/
|
||||
extern void pm_configure_usb_clock(void);
|
||||
|
||||
|
||||
#endif // _PM_H_
|
||||
@ -1,268 +0,0 @@
|
||||
/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file has been prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief Power Manager clocks configuration helper.
|
||||
*
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#include <string.h>
|
||||
#include "compiler.h"
|
||||
#include "pm.h"
|
||||
|
||||
extern void flashc_set_wait_state(unsigned int wait_state);
|
||||
#if (defined AVR32_FLASHC_210_H_INCLUDED)
|
||||
extern void flashc_issue_command(unsigned int command, int page_number);
|
||||
#endif
|
||||
|
||||
|
||||
#define PM_MAX_MUL ((1 << AVR32_PM_PLL0_PLLMUL_SIZE) - 1)
|
||||
|
||||
|
||||
int pm_configure_clocks(pm_freq_param_t *param)
|
||||
{
|
||||
// Supported frequencies:
|
||||
// Fosc0 mul div PLL div2_en cpu_f pba_f Comment
|
||||
// 12 15 1 192 1 12 12
|
||||
// 12 9 3 40 1 20 20 PLL out of spec
|
||||
// 12 15 1 192 1 24 12
|
||||
// 12 9 1 120 1 30 15
|
||||
// 12 9 3 40 0 40 20 PLL out of spec
|
||||
// 12 15 1 192 1 48 12
|
||||
// 12 15 1 192 1 48 24
|
||||
// 12 8 1 108 1 54 27
|
||||
// 12 9 1 120 1 60 15
|
||||
// 12 9 1 120 1 60 30
|
||||
// 12 10 1 132 1 66 16.5
|
||||
//
|
||||
unsigned long in_cpu_f = param->cpu_f;
|
||||
unsigned long in_osc0_f = param->osc0_f;
|
||||
unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0;
|
||||
unsigned long pll_freq, rest;
|
||||
Bool b_div2_pba, b_div2_cpu;
|
||||
|
||||
// Switch to external Oscillator 0
|
||||
pm_switch_to_osc0(&AVR32_PM, in_osc0_f, param->osc0_startup);
|
||||
|
||||
// Start with CPU freq config
|
||||
if (in_cpu_f == in_osc0_f)
|
||||
{
|
||||
param->cpu_f = in_osc0_f;
|
||||
param->pba_f = in_osc0_f;
|
||||
return PM_FREQ_STATUS_OK;
|
||||
}
|
||||
else if (in_cpu_f < in_osc0_f)
|
||||
{
|
||||
// TBD
|
||||
}
|
||||
|
||||
rest = in_cpu_f % in_osc0_f;
|
||||
|
||||
for (div = 1; div < 32; div++)
|
||||
{
|
||||
if ((div * rest) % in_osc0_f == 0)
|
||||
break;
|
||||
}
|
||||
if (div == 32)
|
||||
return PM_FREQ_STATUS_FAIL;
|
||||
|
||||
mul = (in_cpu_f * div) / in_osc0_f;
|
||||
|
||||
if (mul > PM_MAX_MUL)
|
||||
return PM_FREQ_STATUS_FAIL;
|
||||
|
||||
// export 2power from PLL div to div2_cpu
|
||||
while (!(div % 2))
|
||||
{
|
||||
div /= 2;
|
||||
div2_cpu++;
|
||||
}
|
||||
|
||||
// Here we know the mul and div parameter of the PLL config.
|
||||
// . Check out if the PLL has a valid in_cpu_f.
|
||||
// . Try to have for the PLL frequency (VCO output) the highest possible value
|
||||
// to reduce jitter.
|
||||
while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ)
|
||||
{
|
||||
if (2 * mul > PM_MAX_MUL)
|
||||
break;
|
||||
mul *= 2;
|
||||
div2_cpu++;
|
||||
}
|
||||
|
||||
if (div2_cpu != 0)
|
||||
{
|
||||
div2_cpu--;
|
||||
div2_en = 1;
|
||||
}
|
||||
|
||||
pll_freq = in_osc0_f * mul / (div * (1 << div2_en));
|
||||
|
||||
// Update real CPU Frequency
|
||||
param->cpu_f = pll_freq / (1 << div2_cpu);
|
||||
mul--;
|
||||
|
||||
pm_pll_setup(&AVR32_PM
|
||||
, 0 // pll
|
||||
, mul // mul
|
||||
, div // div
|
||||
, 0 // osc
|
||||
, 16 // lockcount
|
||||
);
|
||||
|
||||
pm_pll_set_option(&AVR32_PM
|
||||
, 0 // pll
|
||||
// PLL clock is lower than 160MHz: need to set pllopt.
|
||||
, (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0 // pll_freq
|
||||
, div2_en // pll_div2
|
||||
, 0 // pll_wbwdisable
|
||||
);
|
||||
|
||||
rest = pll_freq;
|
||||
while (rest > AVR32_PM_PBA_MAX_FREQ ||
|
||||
rest != param->pba_f)
|
||||
{
|
||||
div2_pba++;
|
||||
rest = pll_freq / (1 << div2_pba);
|
||||
if (rest < param->pba_f)
|
||||
break;
|
||||
}
|
||||
|
||||
// Update real PBA Frequency
|
||||
param->pba_f = pll_freq / (1 << div2_pba);
|
||||
|
||||
// Enable PLL0
|
||||
pm_pll_enable(&AVR32_PM, 0);
|
||||
|
||||
// Wait for PLL0 locked
|
||||
pm_wait_for_pll0_locked(&AVR32_PM);
|
||||
|
||||
if (div2_cpu)
|
||||
{
|
||||
b_div2_cpu = TRUE;
|
||||
div2_cpu--;
|
||||
}
|
||||
else
|
||||
b_div2_cpu = FALSE;
|
||||
|
||||
if (div2_pba)
|
||||
{
|
||||
b_div2_pba = TRUE;
|
||||
div2_pba--;
|
||||
}
|
||||
else
|
||||
b_div2_pba = FALSE;
|
||||
|
||||
pm_cksel(&AVR32_PM
|
||||
, b_div2_pba, div2_pba // PBA
|
||||
, b_div2_cpu, div2_cpu // PBB
|
||||
, b_div2_cpu, div2_cpu // HSB
|
||||
);
|
||||
|
||||
if (param->cpu_f > AVR32_FLASHC_FWS_0_MAX_FREQ)
|
||||
{
|
||||
flashc_set_wait_state(1);
|
||||
#if (defined AVR32_FLASHC_210_H_INCLUDED)
|
||||
if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ)
|
||||
flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1);
|
||||
else
|
||||
flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1);
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
flashc_set_wait_state(0);
|
||||
#if (defined AVR32_FLASHC_210_H_INCLUDED)
|
||||
if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ)
|
||||
flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1);
|
||||
else
|
||||
flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1);
|
||||
#endif
|
||||
}
|
||||
|
||||
pm_switch_to_clock(&AVR32_PM, AVR32_PM_MCCTRL_MCSEL_PLL0);
|
||||
|
||||
return PM_FREQ_STATUS_OK;
|
||||
}
|
||||
|
||||
|
||||
void pm_configure_usb_clock(void)
|
||||
{
|
||||
#if UC3A3
|
||||
|
||||
// Setup USB GCLK.
|
||||
pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB, // gc
|
||||
0, // osc_or_pll: use Osc (if 0) or PLL (if 1)
|
||||
0, // pll_osc: select Osc0/PLL0 or Osc1/PLL1
|
||||
0, // diven
|
||||
0); // div
|
||||
|
||||
// Enable USB GCLK.
|
||||
pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB);
|
||||
#else
|
||||
// Use 12MHz from OSC0 and generate 96 MHz
|
||||
pm_pll_setup(&AVR32_PM, 1, // pll.
|
||||
7, // mul.
|
||||
1, // div.
|
||||
0, // osc.
|
||||
16); // lockcount.
|
||||
|
||||
pm_pll_set_option(&AVR32_PM, 1, // pll.
|
||||
1, // pll_freq: choose the range 80-180MHz.
|
||||
1, // pll_div2.
|
||||
0); // pll_wbwdisable.
|
||||
|
||||
// start PLL1 and wait forl lock
|
||||
pm_pll_enable(&AVR32_PM, 1);
|
||||
|
||||
// Wait for PLL1 locked.
|
||||
pm_wait_for_pll1_locked(&AVR32_PM);
|
||||
|
||||
pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB, // gc.
|
||||
1, // osc_or_pll: use Osc (if 0) or PLL (if 1).
|
||||
1, // pll_osc: select Osc0/PLL0 or Osc1/PLL1.
|
||||
0, // diven.
|
||||
0); // div.
|
||||
pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB);
|
||||
#endif
|
||||
}
|
||||
@ -1,566 +0,0 @@
|
||||
/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file has been prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief High-level library abstracting features such as oscillators/pll/dfll
|
||||
* configuration, clock configuration, System-sensible parameters
|
||||
* configuration, buses clocks configuration, sleep mode, reset.
|
||||
*
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
#include "power_clocks_lib.h"
|
||||
|
||||
|
||||
//! Device-specific data
|
||||
#if UC3L
|
||||
static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param); // FORWARD declaration
|
||||
#endif
|
||||
|
||||
#if UC3C
|
||||
static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param); // FORWARD declaration
|
||||
#endif
|
||||
|
||||
long int pcl_configure_clocks(pcl_freq_param_t *param)
|
||||
{
|
||||
#ifndef AVR32_PM_VERSION_RESETVALUE
|
||||
// Implementation for UC3A, UC3A3, UC3B parts.
|
||||
return(pm_configure_clocks(param));
|
||||
#else
|
||||
#ifdef AVR32_PM_410_H_INCLUDED
|
||||
// Implementation for UC3C parts.
|
||||
return(pcl_configure_clocks_uc3c(param));
|
||||
#else
|
||||
// Implementation for UC3L parts.
|
||||
return(pcl_configure_clocks_uc3l(param));
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
//! Device-specific implementation
|
||||
#if UC3L
|
||||
// FORWARD declaration
|
||||
static long int pcl_configure_synchronous_clocks( pm_clk_src_t main_clk_src,
|
||||
unsigned long main_clock_freq_hz,
|
||||
pcl_freq_param_t *param);
|
||||
|
||||
long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param)
|
||||
{
|
||||
// Supported main clock sources: PCL_MC_RCSYS
|
||||
|
||||
// Supported synchronous clocks frequencies if RCSYS is the main clock source:
|
||||
// 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz.
|
||||
|
||||
// NOTE: by default, this implementation doesn't perform thorough checks on the
|
||||
// input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
|
||||
|
||||
#ifdef AVR32SFW_INPUT_CHECK
|
||||
// Verify that fCPU >= fPBx
|
||||
if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
|
||||
return(-1);
|
||||
#endif
|
||||
|
||||
#ifdef AVR32SFW_INPUT_CHECK
|
||||
// Verify that the target frequencies are reachable.
|
||||
if((param->cpu_f > SCIF_SLOWCLOCK_FREQ_HZ) || (param->pba_f > SCIF_SLOWCLOCK_FREQ_HZ)
|
||||
|| (param->pbb_f > SCIF_SLOWCLOCK_FREQ_HZ))
|
||||
return(-1);
|
||||
#endif
|
||||
|
||||
return(pcl_configure_synchronous_clocks(PM_CLK_SRC_SLOW, SCIF_SLOWCLOCK_FREQ_HZ, param));
|
||||
}
|
||||
|
||||
|
||||
long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param)
|
||||
{
|
||||
// Supported main clock sources: PCL_MC_RC120M
|
||||
|
||||
// Supported synchronous clocks frequencies if RC120M is the main clock source:
|
||||
// 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz.
|
||||
|
||||
// NOTE: by default, this implementation doesn't perform thorough checks on the
|
||||
// input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
|
||||
|
||||
#ifdef AVR32SFW_INPUT_CHECK
|
||||
// Verify that fCPU >= fPBx
|
||||
if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
|
||||
return(-1);
|
||||
#endif
|
||||
|
||||
#ifdef AVR32SFW_INPUT_CHECK
|
||||
// Verify that the target frequencies are reachable.
|
||||
if((param->cpu_f > SCIF_RC120M_FREQ_HZ) || (param->pba_f > SCIF_RC120M_FREQ_HZ)
|
||||
|| (param->pbb_f > SCIF_RC120M_FREQ_HZ))
|
||||
return(-1);
|
||||
#endif
|
||||
|
||||
// Start the 120MHz internal RCosc (RC120M) clock
|
||||
scif_start_rc120M();
|
||||
|
||||
return(pcl_configure_synchronous_clocks(PM_CLK_SRC_RC120M, SCIF_RC120M_FREQ_HZ, param));
|
||||
}
|
||||
|
||||
|
||||
long int pcl_configure_clocks_osc0(pcl_freq_param_t *param)
|
||||
{
|
||||
// Supported main clock sources: PCL_MC_OSC0
|
||||
|
||||
// Supported synchronous clocks frequencies if OSC0 is the main clock source:
|
||||
// (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example)
|
||||
// 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz.
|
||||
|
||||
// NOTE: by default, this implementation doesn't perform thorough checks on the
|
||||
// input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
|
||||
|
||||
unsigned long main_clock_freq;
|
||||
|
||||
|
||||
#ifdef AVR32SFW_INPUT_CHECK
|
||||
// Verify that fCPU >= fPBx
|
||||
if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
|
||||
return(-1);
|
||||
#endif
|
||||
|
||||
main_clock_freq = param->osc0_f;
|
||||
#ifdef AVR32SFW_INPUT_CHECK
|
||||
// Verify that the target frequencies are reachable.
|
||||
if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq)
|
||||
|| (param->pbb_f > main_clock_freq))
|
||||
return(-1);
|
||||
#endif
|
||||
// Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency.
|
||||
scif_configure_osc_crystalmode(SCIF_OSC0, main_clock_freq);
|
||||
// Enable the OSC0
|
||||
scif_enable_osc(SCIF_OSC0, param->osc0_startup, true);
|
||||
|
||||
return(pcl_configure_synchronous_clocks(PM_CLK_SRC_OSC0, main_clock_freq, param));
|
||||
}
|
||||
|
||||
|
||||
long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param)
|
||||
{
|
||||
// Supported main clock sources: PCL_MC_DFLL
|
||||
|
||||
// Supported synchronous clocks frequencies if DFLL is the main clock source:
|
||||
// (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example)
|
||||
// 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz.
|
||||
|
||||
// NOTE: by default, this implementation doesn't perform thorough checks on the
|
||||
// input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
|
||||
|
||||
unsigned long main_clock_freq;
|
||||
scif_gclk_opt_t *pgc_dfllif_ref_opt;
|
||||
|
||||
|
||||
#ifdef AVR32SFW_INPUT_CHECK
|
||||
// Verify that fCPU >= fPBx
|
||||
if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
|
||||
return(-1);
|
||||
#endif
|
||||
|
||||
main_clock_freq = param->dfll_f;
|
||||
#ifdef AVR32SFW_INPUT_CHECK
|
||||
// Verify that the target DFLL output frequency is in the correct range.
|
||||
if((main_clock_freq > SCIF_DFLL_MAXFREQ_HZ) || (main_clock_freq < SCIF_DFLL_MINFREQ_HZ))
|
||||
return(-1);
|
||||
// Verify that the target frequencies are reachable.
|
||||
if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq)
|
||||
|| (param->pbb_f > main_clock_freq))
|
||||
return(-1);
|
||||
#endif
|
||||
pgc_dfllif_ref_opt = (scif_gclk_opt_t *)param->pextra_params;
|
||||
// Implementation note: this implementation configures the DFLL in closed-loop
|
||||
// mode (because it gives the best accuracy) which enables the generic clock CLK_DFLLIF_REF
|
||||
// as a reference (RCSYS being used as the generic clock source, undivided).
|
||||
scif_dfll0_closedloop_configure_and_start(pgc_dfllif_ref_opt, main_clock_freq, TRUE);
|
||||
|
||||
return(pcl_configure_synchronous_clocks(PM_CLK_SRC_DFLL0, main_clock_freq, param));
|
||||
}
|
||||
|
||||
|
||||
static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param)
|
||||
{
|
||||
// Supported main clock sources: PCL_MC_RCSYS, PCL_MC_OSC0, PCL_MC_DFLL0, PCL_MC_RC120M
|
||||
|
||||
// Supported synchronous clocks frequencies if RCSYS is the main clock source:
|
||||
// 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz.
|
||||
|
||||
// Supported synchronous clocks frequencies if RC120M is the main clock source:
|
||||
// 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz.
|
||||
|
||||
// Supported synchronous clocks frequencies if OSC0 is the main clock source:
|
||||
// (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example)
|
||||
// 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz.
|
||||
|
||||
// Supported synchronous clocks frequencies if DFLL is the main clock source:
|
||||
// (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example)
|
||||
// 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz.
|
||||
|
||||
// NOTE: by default, this implementation doesn't perform thorough checks on the
|
||||
// input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
|
||||
|
||||
|
||||
#ifdef AVR32SFW_INPUT_CHECK
|
||||
// Verify that fCPU >= fPBx
|
||||
if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
|
||||
return(-1);
|
||||
#endif
|
||||
|
||||
if(PCL_MC_RCSYS == param->main_clk_src)
|
||||
{
|
||||
return(pcl_configure_clocks_rcsys(param));
|
||||
}
|
||||
else if(PCL_MC_RC120M == param->main_clk_src)
|
||||
{
|
||||
return(pcl_configure_clocks_rc120m(param));
|
||||
}
|
||||
else if(PCL_MC_OSC0 == param->main_clk_src)
|
||||
{
|
||||
return(pcl_configure_clocks_osc0(param));
|
||||
}
|
||||
else // PCL_MC_DFLL0 == param->main_clk_src
|
||||
{
|
||||
return(pcl_configure_clocks_dfll0(param));
|
||||
}
|
||||
}
|
||||
|
||||
static long int pcl_configure_synchronous_clocks(pm_clk_src_t main_clk_src, unsigned long main_clock_freq_hz, pcl_freq_param_t *param)
|
||||
{
|
||||
//#
|
||||
//# Set the Synchronous clock division ratio for each clock domain
|
||||
//#
|
||||
pm_set_all_cksel(main_clock_freq_hz, param->cpu_f, param->pba_f, param->pbb_f);
|
||||
|
||||
//#
|
||||
//# Set the Flash wait state and the speed read mode (depending on the target CPU frequency).
|
||||
//#
|
||||
#if UC3L
|
||||
flashcdw_set_flash_waitstate_and_readmode(param->cpu_f);
|
||||
#elif UC3C
|
||||
flashc_set_flash_waitstate_and_readmode(param->cpu_f);
|
||||
#endif
|
||||
|
||||
|
||||
//#
|
||||
//# Switch the main clock source to the selected clock.
|
||||
//#
|
||||
pm_set_mclk_source(main_clk_src);
|
||||
|
||||
return PASS;
|
||||
}
|
||||
|
||||
#endif // UC3L device-specific implementation
|
||||
|
||||
//! UC3C Device-specific implementation
|
||||
#if UC3C
|
||||
static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param)
|
||||
{
|
||||
#define PM_MAX_MUL ((1 << AVR32_SCIF_PLLMUL_SIZE) - 1)
|
||||
#define AVR32_PM_PBA_MAX_FREQ 66000000
|
||||
#define AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ 240000000
|
||||
#define AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ 160000000
|
||||
|
||||
// Implementation for UC3C parts.
|
||||
// Supported frequencies:
|
||||
// Fosc0 mul div PLL div2_en cpu_f pba_f Comment
|
||||
// 12 15 1 192 1 12 12
|
||||
// 12 9 3 40 1 20 20 PLL out of spec
|
||||
// 12 15 1 192 1 24 12
|
||||
// 12 9 1 120 1 30 15
|
||||
// 12 9 3 40 0 40 20 PLL out of spec
|
||||
// 12 15 1 192 1 48 12
|
||||
// 12 15 1 192 1 48 24
|
||||
// 12 8 1 108 1 54 27
|
||||
// 12 9 1 120 1 60 15
|
||||
// 12 9 1 120 1 60 30
|
||||
// 12 10 1 132 1 66 16.5
|
||||
//
|
||||
unsigned long in_cpu_f = param->cpu_f;
|
||||
unsigned long in_osc0_f = param->osc0_f;
|
||||
unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0;
|
||||
unsigned long pll_freq, rest;
|
||||
Bool b_div2_pba, b_div2_cpu;
|
||||
|
||||
// Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency.
|
||||
scif_configure_osc_crystalmode(SCIF_OSC0, in_osc0_f);
|
||||
// Enable the OSC0
|
||||
scif_enable_osc(SCIF_OSC0, param->osc0_startup, true);
|
||||
// Set the main clock source as being OSC0.
|
||||
pm_set_mclk_source(PM_CLK_SRC_OSC0);
|
||||
|
||||
// Start with CPU freq config
|
||||
if (in_cpu_f == in_osc0_f)
|
||||
{
|
||||
param->cpu_f = in_osc0_f;
|
||||
param->pba_f = in_osc0_f;
|
||||
return PASS;
|
||||
}
|
||||
else if (in_cpu_f < in_osc0_f)
|
||||
{
|
||||
// TBD
|
||||
}
|
||||
|
||||
rest = in_cpu_f % in_osc0_f;
|
||||
|
||||
for (div = 1; div < 32; div++)
|
||||
{
|
||||
if ((div * rest) % in_osc0_f == 0)
|
||||
break;
|
||||
}
|
||||
if (div == 32)
|
||||
return FAIL;
|
||||
|
||||
mul = (in_cpu_f * div) / in_osc0_f;
|
||||
|
||||
if (mul > PM_MAX_MUL)
|
||||
return FAIL;
|
||||
|
||||
// export 2power from PLL div to div2_cpu
|
||||
while (!(div % 2))
|
||||
{
|
||||
div /= 2;
|
||||
div2_cpu++;
|
||||
}
|
||||
|
||||
// Here we know the mul and div parameter of the PLL config.
|
||||
// . Check out if the PLL has a valid in_cpu_f.
|
||||
// . Try to have for the PLL frequency (VCO output) the highest possible value
|
||||
// to reduce jitter.
|
||||
while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ)
|
||||
{
|
||||
if (2 * mul > PM_MAX_MUL)
|
||||
break;
|
||||
mul *= 2;
|
||||
div2_cpu++;
|
||||
}
|
||||
|
||||
if (div2_cpu != 0)
|
||||
{
|
||||
div2_cpu--;
|
||||
div2_en = 1;
|
||||
}
|
||||
|
||||
pll_freq = in_osc0_f * mul / (div * (1 << div2_en));
|
||||
|
||||
// Update real CPU Frequency
|
||||
param->cpu_f = pll_freq / (1 << div2_cpu);
|
||||
mul--;
|
||||
|
||||
scif_pll_opt_t opt;
|
||||
|
||||
opt.osc = SCIF_OSC0, // Sel Osc0 or Osc1
|
||||
opt.lockcount = 16, // lockcount in main clock for the PLL wait lock
|
||||
opt.div = div, // DIV=1 in the formula
|
||||
opt.mul = mul, // MUL=7 in the formula
|
||||
opt.pll_div2 = div2_en, // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value)
|
||||
opt.pll_wbwdisable = 0, //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.
|
||||
opt.pll_freq = (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0, // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.
|
||||
|
||||
|
||||
scif_pll_setup(SCIF_PLL0, opt); // lockcount in main clock for the PLL wait lock
|
||||
|
||||
/* Enable PLL0 */
|
||||
scif_pll_enable(SCIF_PLL0);
|
||||
|
||||
/* Wait for PLL0 locked */
|
||||
scif_wait_for_pll_locked(SCIF_PLL0) ;
|
||||
|
||||
rest = pll_freq;
|
||||
while (rest > AVR32_PM_PBA_MAX_FREQ ||
|
||||
rest != param->pba_f)
|
||||
{
|
||||
div2_pba++;
|
||||
rest = pll_freq / (1 << div2_pba);
|
||||
if (rest < param->pba_f)
|
||||
break;
|
||||
}
|
||||
|
||||
// Update real PBA Frequency
|
||||
param->pba_f = pll_freq / (1 << div2_pba);
|
||||
|
||||
|
||||
if (div2_cpu)
|
||||
{
|
||||
b_div2_cpu = TRUE;
|
||||
div2_cpu--;
|
||||
}
|
||||
else
|
||||
b_div2_cpu = FALSE;
|
||||
|
||||
if (div2_pba)
|
||||
{
|
||||
b_div2_pba = TRUE;
|
||||
div2_pba--;
|
||||
}
|
||||
else
|
||||
b_div2_pba = FALSE;
|
||||
|
||||
if (b_div2_cpu == TRUE )
|
||||
{
|
||||
pm_set_clk_domain_div(PM_CLK_DOMAIN_0, (pm_divratio_t) div2_cpu); // CPU
|
||||
pm_set_clk_domain_div(PM_CLK_DOMAIN_1, (pm_divratio_t) div2_cpu); // HSB
|
||||
pm_set_clk_domain_div(PM_CLK_DOMAIN_3, (pm_divratio_t) div2_cpu); // PBB
|
||||
}
|
||||
if (b_div2_pba == TRUE )
|
||||
{
|
||||
pm_set_clk_domain_div(PM_CLK_DOMAIN_2, (pm_divratio_t) div2_pba); // PBA
|
||||
pm_set_clk_domain_div(PM_CLK_DOMAIN_4, (pm_divratio_t) div2_pba); // PBC
|
||||
}
|
||||
|
||||
// Set Flashc Wait State
|
||||
flashc_set_flash_waitstate_and_readmode(param->cpu_f);
|
||||
|
||||
// Set the main clock source as being PLL0.
|
||||
pm_set_mclk_source(PM_CLK_SRC_PLL0);
|
||||
|
||||
return PASS;
|
||||
}
|
||||
#endif // UC3C device-specific implementation
|
||||
|
||||
long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup)
|
||||
{
|
||||
#ifndef AVR32_PM_VERSION_RESETVALUE
|
||||
// Implementation for UC3A, UC3A3, UC3B parts.
|
||||
if(PCL_OSC0 == osc)
|
||||
{
|
||||
// Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency,
|
||||
// enable the OSC0, set the main clock source as being OSC0.
|
||||
pm_switch_to_osc0(&AVR32_PM, fcrystal, startup);
|
||||
}
|
||||
else
|
||||
{
|
||||
return PCL_NOT_SUPPORTED;
|
||||
}
|
||||
#else
|
||||
// Implementation for UC3C, UC3L parts.
|
||||
#if AVR32_PM_VERSION_RESETVALUE < 0x400
|
||||
return PCL_NOT_SUPPORTED;
|
||||
#else
|
||||
if(PCL_OSC0 == osc)
|
||||
{
|
||||
// Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency.
|
||||
scif_configure_osc_crystalmode(SCIF_OSC0, fcrystal);
|
||||
// Enable the OSC0
|
||||
scif_enable_osc(SCIF_OSC0, startup, true);
|
||||
// Set the Flash wait state and the speed read mode (depending on the target CPU frequency).
|
||||
#if UC3L
|
||||
flashcdw_set_flash_waitstate_and_readmode(fcrystal);
|
||||
#elif UC3C
|
||||
flashc_set_flash_waitstate_and_readmode(fcrystal);
|
||||
#endif
|
||||
// Set the main clock source as being OSC0.
|
||||
pm_set_mclk_source(PM_CLK_SRC_OSC0);
|
||||
}
|
||||
else
|
||||
{
|
||||
return PCL_NOT_SUPPORTED;
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
return PASS;
|
||||
}
|
||||
|
||||
long int pcl_configure_usb_clock(void)
|
||||
{
|
||||
#ifndef AVR32_PM_VERSION_RESETVALUE
|
||||
// Implementation for UC3A, UC3A3, UC3B parts.
|
||||
pm_configure_usb_clock();
|
||||
return PASS;
|
||||
#else
|
||||
#ifdef AVR32_PM_410_H_INCLUDED
|
||||
const scif_pll_opt_t opt = {
|
||||
.osc = SCIF_OSC0, // Sel Osc0 or Osc1
|
||||
.lockcount = 16, // lockcount in main clock for the PLL wait lock
|
||||
.div = 1, // DIV=1 in the formula
|
||||
.mul = 5, // MUL=7 in the formula
|
||||
.pll_div2 = 1, // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value)
|
||||
.pll_wbwdisable = 0, //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.
|
||||
.pll_freq = 1, // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.
|
||||
};
|
||||
|
||||
/* Setup PLL1 on Osc0, mul=7 ,no divisor, lockcount=16, ie. 16Mhzx6 = 96MHz output */
|
||||
scif_pll_setup(SCIF_PLL1, opt); // lockcount in main clock for the PLL wait lock
|
||||
|
||||
/* Enable PLL1 */
|
||||
scif_pll_enable(SCIF_PLL1);
|
||||
|
||||
/* Wait for PLL1 locked */
|
||||
scif_wait_for_pll_locked(SCIF_PLL1) ;
|
||||
|
||||
// Implementation for UC3C parts.
|
||||
// Setup the generic clock for USB
|
||||
scif_gc_setup(AVR32_SCIF_GCLK_USB,
|
||||
SCIF_GCCTRL_PLL1,
|
||||
AVR32_SCIF_GC_NO_DIV_CLOCK,
|
||||
0);
|
||||
// Now enable the generic clock
|
||||
scif_gc_enable(AVR32_SCIF_GCLK_USB);
|
||||
return PASS;
|
||||
#else
|
||||
return PCL_NOT_SUPPORTED;
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
#if UC3L
|
||||
#else
|
||||
void pcl_write_gplp(unsigned long gplp, unsigned long value)
|
||||
{
|
||||
#ifndef AVR32_PM_VERSION_RESETVALUE
|
||||
// Implementation for UC3A, UC3A3, UC3B parts.
|
||||
pm_write_gplp(&AVR32_PM,gplp,value);
|
||||
#else
|
||||
scif_write_gplp(gplp,value);
|
||||
#endif
|
||||
}
|
||||
|
||||
unsigned long pcl_read_gplp(unsigned long gplp)
|
||||
{
|
||||
#ifndef AVR32_PM_VERSION_RESETVALUE
|
||||
// Implementation for UC3A, UC3A3, UC3B parts.
|
||||
return pm_read_gplp(&AVR32_PM,gplp);
|
||||
#else
|
||||
return scif_read_gplp(gplp);
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
@ -1,379 +0,0 @@
|
||||
/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file has been prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief High-level library abstracting features such as oscillators/pll/dfll
|
||||
* configuration, clock configuration, System-sensible parameters
|
||||
* configuration, buses clocks configuration, sleep mode, reset.
|
||||
*
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _POWER_CLOCKS_LIB_H_
|
||||
#define _POWER_CLOCKS_LIB_H_
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <avr32/io.h>
|
||||
#include "compiler.h"
|
||||
|
||||
#ifndef AVR32_PM_VERSION_RESETVALUE
|
||||
// Support for UC3A, UC3A3, UC3B parts.
|
||||
#include "pm.h"
|
||||
#else
|
||||
//! Device-specific data
|
||||
#if UC3L
|
||||
#include "pm_uc3l.h"
|
||||
#include "scif_uc3l.h"
|
||||
#include "flashcdw.h"
|
||||
#elif UC3C
|
||||
#include "pm_uc3c.h"
|
||||
#include "scif_uc3c.h"
|
||||
#include "flashc.h"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/*! \name Clocks Management
|
||||
*/
|
||||
//! @{
|
||||
|
||||
//! The different oscillators
|
||||
typedef enum
|
||||
{
|
||||
PCL_OSC0 = 0,
|
||||
PCL_OSC1 = 1
|
||||
} pcl_osc_t;
|
||||
|
||||
//! The different DFLLs
|
||||
typedef enum
|
||||
{
|
||||
PCL_DFLL0 = 0,
|
||||
PCL_DFLL1 = 1
|
||||
} pcl_dfll_t;
|
||||
|
||||
//! Possible Main Clock Sources
|
||||
typedef enum
|
||||
{
|
||||
PCL_MC_RCSYS, // Default main clock source, supported by all (aka Slow Clock)
|
||||
PCL_MC_OSC0, // Supported by all
|
||||
PCL_MC_OSC1, // Supported by UC3C only
|
||||
PCL_MC_OSC0_PLL0, // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC0 as reference)
|
||||
PCL_MC_OSC1_PLL0, // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC1 as reference)
|
||||
PCL_MC_OSC0_PLL1, // Supported by UC3C (the main clock source is PLL1 with OSC0 as reference)
|
||||
PCL_MC_OSC1_PLL1, // Supported by UC3C (the main clock source is PLL1 with OSC1 as reference)
|
||||
PCL_MC_DFLL0, // Supported by UC3L
|
||||
PCL_MC_DFLL1, // Not supported yet
|
||||
PCL_MC_RC120M, // Supported by UC3L, UC3C
|
||||
PCL_MC_RC8M, // Supported by UC3C
|
||||
PCL_MC_CRIPOSC // Supported by UC3C
|
||||
} pcl_mainclk_t;
|
||||
|
||||
//! Input and output parameters to configure clocks with pcl_configure_clocks().
|
||||
// NOTE: regarding the frequency settings, always abide by the datasheet rules and min & max supported frequencies.
|
||||
#ifndef AVR32_PM_VERSION_RESETVALUE
|
||||
// Support for UC3A, UC3A3, UC3B parts.
|
||||
#define pcl_freq_param_t pm_freq_param_t // See pm.h
|
||||
#else
|
||||
// Support for UC3C, UC3L parts.
|
||||
typedef struct
|
||||
{
|
||||
//! Main clock source selection (input argument).
|
||||
pcl_mainclk_t main_clk_src;
|
||||
|
||||
//! Target CPU frequency (input/output argument).
|
||||
unsigned long cpu_f;
|
||||
|
||||
//! Target PBA frequency (input/output argument).
|
||||
unsigned long pba_f;
|
||||
|
||||
//! Target PBB frequency (input/output argument).
|
||||
unsigned long pbb_f;
|
||||
|
||||
//! Target PBC frequency (input/output argument).
|
||||
unsigned long pbc_f;
|
||||
|
||||
//! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument).
|
||||
unsigned long osc0_f;
|
||||
|
||||
//! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument).
|
||||
unsigned long osc0_startup;
|
||||
|
||||
//! DFLL target frequency (input/output argument) (NOTE: the bigger, the most stable the frequency)
|
||||
unsigned long dfll_f;
|
||||
|
||||
//! Other parameters that might be necessary depending on the device (implementation-dependent).
|
||||
// For the UC3L DFLL setup, this parameter should be pointing to a structure of
|
||||
// type (scif_gclk_opt_t *).
|
||||
void *pextra_params;
|
||||
} pcl_freq_param_t;
|
||||
#endif
|
||||
|
||||
//! Define "not supported" for the lib.
|
||||
#define PCL_NOT_SUPPORTED (-10000)
|
||||
|
||||
/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks
|
||||
*
|
||||
* This function needs some parameters stored in a pcl_freq_param_t structure:
|
||||
* - main_clk_src is the id of the main clock source to use,
|
||||
* - cpu_f and pba_f and pbb_f are the wanted frequencies,
|
||||
* - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0),
|
||||
* - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP).
|
||||
* - dfll_f is the target DFLL frequency to set-up if main_clk_src is the dfll.
|
||||
*
|
||||
* The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f.
|
||||
*
|
||||
* \note: since it is dynamically computing the appropriate field values of the
|
||||
* configuration registers from the parameters structure, this function is not
|
||||
* optimal in terms of code size. For a code size optimal solution, it is better
|
||||
* to create a new function from pcl_configure_clocks() and modify it to use
|
||||
* preprocessor computation from pre-defined target frequencies.
|
||||
*
|
||||
* \param param pointer on the configuration structure.
|
||||
*
|
||||
* \retval 0 Success.
|
||||
* \retval <0 The configuration cannot be performed.
|
||||
*/
|
||||
extern long int pcl_configure_clocks(pcl_freq_param_t *param);
|
||||
|
||||
/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RCSYS osc as main source clock.
|
||||
*
|
||||
* This function needs some parameters stored in a pcl_freq_param_t structure:
|
||||
* - cpu_f and pba_f and pbb_f are the wanted frequencies
|
||||
*
|
||||
* Supported main clock sources: PCL_MC_RCSYS
|
||||
*
|
||||
* Supported synchronous clocks frequencies:
|
||||
* 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz.
|
||||
*
|
||||
* \note: by default, this implementation doesn't perform thorough checks on the
|
||||
* input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
|
||||
*
|
||||
* \note: since it is dynamically computing the appropriate field values of the
|
||||
* configuration registers from the parameters structure, this function is not
|
||||
* optimal in terms of code size. For a code size optimal solution, it is better
|
||||
* to create a new function from pcl_configure_clocks_rcsys() and modify it to use
|
||||
* preprocessor computation from pre-defined target frequencies.
|
||||
*
|
||||
* \param param pointer on the configuration structure.
|
||||
*
|
||||
* \retval 0 Success.
|
||||
* \retval <0 The configuration cannot be performed.
|
||||
*/
|
||||
extern long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param);
|
||||
|
||||
/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RC120M osc as main source clock.
|
||||
*
|
||||
* This function needs some parameters stored in a pcl_freq_param_t structure:
|
||||
* - cpu_f and pba_f and pbb_f are the wanted frequencies
|
||||
*
|
||||
* Supported main clock sources: PCL_MC_RC120M
|
||||
*
|
||||
* Supported synchronous clocks frequencies:
|
||||
* 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz.
|
||||
*
|
||||
* \note: by default, this implementation doesn't perform thorough checks on the
|
||||
* input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
|
||||
*
|
||||
* \note: since it is dynamically computing the appropriate field values of the
|
||||
* configuration registers from the parameters structure, this function is not
|
||||
* optimal in terms of code size. For a code size optimal solution, it is better
|
||||
* to create a new function from pcl_configure_clocks_rc120m() and modify it to
|
||||
* use preprocessor computation from pre-defined target frequencies.
|
||||
*
|
||||
* \param param pointer on the configuration structure.
|
||||
*
|
||||
* \retval 0 Success.
|
||||
* \retval <0 The configuration cannot be performed.
|
||||
*/
|
||||
extern long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param);
|
||||
|
||||
/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the OSC0 osc as main source clock
|
||||
*
|
||||
* This function needs some parameters stored in a pcl_freq_param_t structure:
|
||||
* - cpu_f and pba_f and pbb_f are the wanted frequencies,
|
||||
* - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0),
|
||||
* - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP).
|
||||
*
|
||||
* Supported main clock sources: PCL_MC_OSC0
|
||||
*
|
||||
* Supported synchronous clocks frequencies:
|
||||
* (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example)
|
||||
* 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz.
|
||||
*
|
||||
* \note: by default, this implementation doesn't perform thorough checks on the
|
||||
* input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
|
||||
*
|
||||
* \note: since it is dynamically computing the appropriate field values of the
|
||||
* configuration registers from the parameters structure, this function is not
|
||||
* optimal in terms of code size. For a code size optimal solution, it is better
|
||||
* to create a new function from pcl_configure_clocks_osc0() and modify it to use
|
||||
* preprocessor computation from pre-defined target frequencies.
|
||||
*
|
||||
* \param param pointer on the configuration structure.
|
||||
*
|
||||
* \retval 0 Success.
|
||||
* \retval <0 The configuration cannot be performed.
|
||||
*/
|
||||
extern long int pcl_configure_clocks_osc0(pcl_freq_param_t *param);
|
||||
|
||||
/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the DFLL0 as main source clock
|
||||
*
|
||||
* This function needs some parameters stored in a pcl_freq_param_t structure:
|
||||
* - cpu_f and pba_f and pbb_f are the wanted frequencies,
|
||||
* - dfll_f is the target DFLL frequency to set-up
|
||||
*
|
||||
* \note: when the DFLL0 is to be used as main source clock for the synchronous clocks,
|
||||
* the target frequency of the DFLL should be chosen to be as high as possible
|
||||
* within the specification range (for stability reasons); the target cpu and pbx
|
||||
* frequencies will then be reached by appropriate division ratio.
|
||||
*
|
||||
* Supported main clock sources: PCL_MC_DFLL0
|
||||
*
|
||||
* Supported synchronous clocks frequencies:
|
||||
* (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example)
|
||||
* 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz.
|
||||
*
|
||||
* \note: by default, this implementation doesn't perform thorough checks on the
|
||||
* input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
|
||||
*
|
||||
* \note: since it is dynamically computing the appropriate field values of the
|
||||
* configuration registers from the parameters structure, this function is not
|
||||
* optimal in terms of code size. For a code size optimal solution, it is better
|
||||
* to create a new function from pcl_configure_clocks_dfll0() and modify it to
|
||||
* use preprocessor computation from pre-defined target frequencies.
|
||||
*
|
||||
* \param param pointer on the configuration structure.
|
||||
*
|
||||
* \retval 0 Success.
|
||||
* \retval <0 The configuration cannot be performed.
|
||||
*/
|
||||
extern long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param);
|
||||
|
||||
/*! \brief Switch the main clock source to Osc0 configured in crystal mode
|
||||
*
|
||||
* \param osc The oscillator to enable and switch to.
|
||||
* \param fcrystal Oscillator external crystal frequency (Hz)
|
||||
* \param startup Oscillator startup time.
|
||||
*
|
||||
* \return Status.
|
||||
* \retval 0 Success.
|
||||
* \retval <0 An error occured.
|
||||
*/
|
||||
extern long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup);
|
||||
|
||||
/*! \brief Enable the clock of a module.
|
||||
*
|
||||
* \param module The module to clock (use one of the defines in the part-specific
|
||||
* header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
|
||||
* clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks"
|
||||
* or look in the module section).
|
||||
*
|
||||
* \return Status.
|
||||
* \retval 0 Success.
|
||||
* \retval <0 An error occured.
|
||||
*/
|
||||
#ifndef AVR32_PM_VERSION_RESETVALUE
|
||||
// Implementation for UC3A, UC3A3, UC3B parts.
|
||||
#define pcl_enable_module(module) pm_enable_module(&AVR32_PM, module)
|
||||
#else
|
||||
// Implementation for UC3C, UC3L parts.
|
||||
#define pcl_enable_module(module) pm_enable_module(module)
|
||||
#endif
|
||||
|
||||
/*! \brief Disable the clock of a module.
|
||||
*
|
||||
* \param module The module to shut down (use one of the defines in the part-specific
|
||||
* header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
|
||||
* clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks"
|
||||
* or look in the module section).
|
||||
*
|
||||
* \return Status.
|
||||
* \retval 0 Success.
|
||||
* \retval <0 An error occured.
|
||||
*/
|
||||
#ifndef AVR32_PM_VERSION_RESETVALUE
|
||||
// Implementation for UC3A, UC3A3, UC3B parts.
|
||||
#define pcl_disable_module(module) pm_disable_module(&AVR32_PM, module)
|
||||
#else
|
||||
// Implementation for UC3C, UC3L parts.
|
||||
#define pcl_disable_module(module) pm_disable_module(module)
|
||||
#endif
|
||||
|
||||
/*! \brief Configure the USB Clock
|
||||
*
|
||||
*
|
||||
* \return Status.
|
||||
* \retval 0 Success.
|
||||
* \retval <0 An error occured.
|
||||
*/
|
||||
extern long int pcl_configure_usb_clock(void);
|
||||
|
||||
//! @}
|
||||
|
||||
/*! \name Power Management
|
||||
*/
|
||||
//! @{
|
||||
/*!
|
||||
* \brief Read the content of the GPLP registers
|
||||
* \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
|
||||
*
|
||||
* \return The content of the chosen GPLP register.
|
||||
*/
|
||||
extern unsigned long pcl_read_gplp(unsigned long gplp);
|
||||
|
||||
|
||||
/*!
|
||||
* \brief Write into the GPLP registers
|
||||
* \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
|
||||
* \param value Value to write
|
||||
*/
|
||||
extern void pcl_write_gplp(unsigned long gplp, unsigned long value);
|
||||
|
||||
//! @}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // _POWER_CLOCKS_LIB_H_
|
||||
@ -1,108 +0,0 @@
|
||||
<!doctype HTML public "-//W3C//DTD HTML 4.0 Frameset//EN">
|
||||
<html>
|
||||
<head>
|
||||
<link rel="stylesheet" type="text/css" href="../../.docsrc/AVR32_ns.css">
|
||||
</head>
|
||||
<body>
|
||||
<div id="wrapper">
|
||||
<p align="left" class="whs2"><a href="../DRIVERS_Readme.html"<font color="red"></font>Back to DRIVERS page</a></p>
|
||||
<h1 align="center" class="whs1">AVR UC3 Series Software Framework: Power Manager Driver<br>
|
||||
</h1>
|
||||
|
||||
<p align="center" class="whs2">Copyright © 2007 Atmel Corporation</p>
|
||||
|
||||
<h2>Introduction</h2>
|
||||
<h3>UC3A0/1, UC3B, UC3A3</h3>
|
||||
<p>The Power Manager (PM) controls the oscillators and PLLs, and generates the clocks and
|
||||
resets in the device. The PM controls two fast crystal oscillators, as well as two PLLs, which can
|
||||
multiply the clock from either oscillator to provide higher frequencies. Additionally, a low-power
|
||||
32 KHz oscillator is used to generate the real-time counter clock for high accuracy real-time
|
||||
measurements. The PM also contains a low-power RC oscillator with fast start-up time, which
|
||||
can be used to clock the digital logic.</p>
|
||||
|
||||
<h3> UC3L, UC3C </h3>
|
||||
<p>The Power Manager (PM) provides synchronous clocks used to clock the main digital logic in the
|
||||
device, namely the CPU, and the modules and peripherals connected to the HSB and PBx buses. The PM also
|
||||
contains advanced power-saving features and a Reset Controller.</p>
|
||||
|
||||
|
||||
<p> </p>
|
||||
|
||||
<h2>Power Manager Driver</h2>
|
||||
<h3>UC3A0/1, UC3B, UC3A3</h3>
|
||||
<p>The driver is composed of <a href="pm.c">pm.c</a> and <a href="pm.h">pm.h</a>.</p>
|
||||
<p> </p>
|
||||
<p>This driver provides interfaces for PM main hardware features:
|
||||
|
||||
<li>oscillator source setup: external or crystal;
|
||||
<li>oscillator startup;
|
||||
<li>PLL setup;
|
||||
<li>main clock source setup.
|
||||
</p>
|
||||
<p> </p>
|
||||
<p>Two examples are available:<p>
|
||||
<a href=" EXAMPLE1/readme.html">EXAMPLE1:</a> how to configure the Power Manager to use Oscillator 0 as source of main clock, generic clock configuration and switch to a sleep mode<p>
|
||||
<a href=" EXAMPLE2/readme.html">EXAMPLE2:</a> how to configure a PLL and switch the main clock to PLL output and do a generic clock configuration.</p>
|
||||
<p> </p>
|
||||
|
||||
<p>
|
||||
The file <a href="pm_conf_clocks.c">pm_conf_clocks.c</a> provides functions to simplify the usage of this driver.
|
||||
It is used to configure all clocks at once by specifying frequencies needed.
|
||||
</p>
|
||||
|
||||
<p>
|
||||
The file <a href="power_clocks_lib.c">power_clocks_lib.c</a> (and <a href="power_clocks_lib.h">power_clocks_lib.h</a>)
|
||||
provides functions to abstract features such as oscillators/pll/dfll configuration, clock configuration, System-sensible
|
||||
parameters configuration, buses clocks configuration, sleep mode, reset.
|
||||
</p>
|
||||
<p></p>
|
||||
|
||||
<h3>UC3L</h3>
|
||||
<p>The driver is composed of <a href="pm_uc3l.c">pm_uc3l.c</a> and <a href="pm_uc3l.h">pm_uc3l.h</a>.</p>
|
||||
<p> </p>
|
||||
<p>This driver provides interfaces for PM main hardware features:
|
||||
<li>main clock source setup,
|
||||
<li>clock domains setup,
|
||||
<li>peripheral modules setup,
|
||||
<li>Sleep modes setup,
|
||||
<li>reset,
|
||||
<li>PM interrupts setup.
|
||||
</p>
|
||||
<p> </p>
|
||||
<p>Three examples are available:<p>
|
||||
<a href=" EXAMPLE1/readme.html">EXAMPLE1:</a> how to configure the Power Manager to use Oscillator 0 as source of main clock, generic clock configuration and switch to a sleep mode. This example is not applicable to the AT32UC3L-EK board because no external crystal/clock is connected to OSC0 on that board.<p>
|
||||
<a href=" EXAMPLE2/readme.html">EXAMPLE2:</a> how to configure a DFLL and switch the main clock to the DFLL output and do a generic clock configuration.</p>
|
||||
<a href=" EXAMPLE3/readme.html">EXAMPLE2:</a> how to use the RC120M internal oscillator as main clock source and do a Generic clock configuration.</p>
|
||||
<p> </p>
|
||||
|
||||
<h3>UC3C</h3>
|
||||
<p>The driver is composed of <a href="pm_uc3c.c">pm_uc3c.c</a> and <a href="pm_uc3c.h">pm_uc3c.h</a>.</p>
|
||||
<p> </p>
|
||||
<p>This driver provides interfaces for PM main hardware features:
|
||||
<li>main clock source setup,
|
||||
<li>clock domains setup,
|
||||
<li>peripheral modules setup,
|
||||
<li>Sleep modes setup,
|
||||
<li>reset,
|
||||
<li>PM interrupts setup.
|
||||
</p>
|
||||
<p> </p>
|
||||
<p>Two examples are available:<p>
|
||||
<a href=" EXAMPLE1/readme.html">EXAMPLE1:</a> how to configure the Power Manager to use Oscillator 0 as source of main clock, generic clock configuration and switch to a sleep mode<p>
|
||||
<a href=" EXAMPLE2/readme.html">EXAMPLE2:</a> how to configure a PLL and switch the main clock to PLL output and do a generic clock configuration.</p>
|
||||
<p> </p>
|
||||
|
||||
<p>
|
||||
The file <a href="power_clocks_lib.c">power_clocks_lib.c</a> (and <a href="power_clocks_lib.h">power_clocks_lib.h</a>)
|
||||
provides functions to abstract features such as oscillators/pll/dfll configuration, clock configuration, System-sensible
|
||||
parameters configuration, buses clocks configuration, sleep mode, reset.
|
||||
</p>
|
||||
|
||||
|
||||
<hr align="center" width="50%" class="whs4">
|
||||
|
||||
<p class=legalfooter>AVR is a registered trademark of
|
||||
Atmel Corporation.</p>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
@ -1,40 +0,0 @@
|
||||
<!-- UC3_START -->
|
||||
<!doctype HTML public "-//W3C//DTD HTML 4.0 Frameset//EN">
|
||||
<html>
|
||||
<head>
|
||||
<link rel="stylesheet" type="text/css" href="../../.docsrc/AVR32_ns.css">
|
||||
</head>
|
||||
<div id="wrapper">
|
||||
<body>
|
||||
<p align="left" class="whs2"><a href="../DRIVERS_Readme.html"<font color="red"></font>Back to DRIVERS page</a></p>
|
||||
<h1 align="center" class="whs1">AVR UC3 Series Software Framework: USART Driver<br>
|
||||
</h1>
|
||||
|
||||
<p align="center" class="whs2">Copyright © 2007 Atmel Corporation</p>
|
||||
|
||||
<h2>Introduction</h2>
|
||||
<p>This driver will let you communicate through serial ports of all AVR®32 AT32UC3 devices.</p>
|
||||
<p> </p>
|
||||
|
||||
The USART driver philosophy of usage is:
|
||||
<li> Configure one (or several) USART in the wanted mode [usart_init_xxxxx]</li>
|
||||
<li> Send or receive data on the configured USART, [usart_putchar, usart_getchar, usart_write_line, ...]</li>
|
||||
|
||||
<h2>USART Driver</h2>
|
||||
<p>The driver is composed of <a href="usart.c">usart.c</a> and <a href="usart.h">usart.h</a>.</p>
|
||||
</p>
|
||||
|
||||
<p> </p>
|
||||
<p>One example is currently available: </p>
|
||||
<p><li><a href="./USART_EXAMPLE/readme.html">Simple access to a serial port</a></li></p>
|
||||
<p> </p>
|
||||
|
||||
|
||||
<hr align="center" width="50%" class="whs4">
|
||||
|
||||
<p class=legalfooter>AVR is a registered trademark of
|
||||
Atmel Corporation.</p>
|
||||
</div>
|
||||
</body>
|
||||
</html>
|
||||
<!-- UC3_END -->
|
||||
@ -1,914 +0,0 @@
|
||||
/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief USART driver for AVR32 UC3.
|
||||
*
|
||||
* This file contains basic functions for the AVR32 USART, with support for all
|
||||
* modes, settings and clock speeds.
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices with a USART module can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#include "compiler.h"
|
||||
#include "usart.h"
|
||||
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/*! \name Private Functions
|
||||
*/
|
||||
//! @{
|
||||
|
||||
|
||||
/*! \brief Checks if the USART is in multidrop mode.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*
|
||||
* \return \c 1 if the USART is in multidrop mode, otherwise \c 0.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
static __inline__ int usart_mode_is_multidrop(volatile avr32_usart_t *usart)
|
||||
{
|
||||
return ((usart->mr >> AVR32_USART_MR_PAR_OFFSET) & AVR32_USART_MR_PAR_MULTI) == AVR32_USART_MR_PAR_MULTI;
|
||||
}
|
||||
|
||||
|
||||
/*! \brief Calculates a clock divider (\e CD) and a fractional part (\e FP) for
|
||||
* the USART asynchronous modes to generate a baud rate as close as
|
||||
* possible to the baud rate set point.
|
||||
*
|
||||
* Baud rate calculation:
|
||||
* \f$ Baudrate = \frac{SelectedClock}{Over \times (CD + \frac{FP}{8})} \f$, \e Over being 16 or 8.
|
||||
* The maximal oversampling is selected if it allows to generate a baud rate close to the set point.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param baudrate Baud rate set point.
|
||||
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
|
||||
*
|
||||
* \retval USART_SUCCESS Baud rate successfully initialized.
|
||||
* \retval USART_INVALID_INPUT Baud rate set point is out of range for the given input clock frequency.
|
||||
*/
|
||||
static int usart_set_async_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz)
|
||||
{
|
||||
unsigned int over = (pba_hz >= 16 * baudrate) ? 16 : 8;
|
||||
unsigned int cd_fp = ((1 << AVR32_USART_BRGR_FP_SIZE) * pba_hz + (over * baudrate) / 2) / (over * baudrate);
|
||||
unsigned int cd = cd_fp >> AVR32_USART_BRGR_FP_SIZE;
|
||||
unsigned int fp = cd_fp & ((1 << AVR32_USART_BRGR_FP_SIZE) - 1);
|
||||
|
||||
if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
usart->mr = (usart->mr & ~(AVR32_USART_MR_USCLKS_MASK |
|
||||
AVR32_USART_MR_SYNC_MASK |
|
||||
AVR32_USART_MR_OVER_MASK)) |
|
||||
AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET |
|
||||
((over == 16) ? AVR32_USART_MR_OVER_X16 : AVR32_USART_MR_OVER_X8) << AVR32_USART_MR_OVER_OFFSET;
|
||||
|
||||
usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET |
|
||||
fp << AVR32_USART_BRGR_FP_OFFSET;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
/*! \brief Calculates a clock divider (\e CD) for the USART synchronous master
|
||||
* modes to generate a baud rate as close as possible to the baud rate
|
||||
* set point.
|
||||
*
|
||||
* Baud rate calculation:
|
||||
* \f$ Baudrate = \frac{SelectedClock}{CD} \f$.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param baudrate Baud rate set point.
|
||||
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
|
||||
*
|
||||
* \retval USART_SUCCESS Baud rate successfully initialized.
|
||||
* \retval USART_INVALID_INPUT Baud rate set point is out of range for the given input clock frequency.
|
||||
*/
|
||||
static int usart_set_sync_master_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz)
|
||||
{
|
||||
unsigned int cd = (pba_hz + baudrate / 2) / baudrate;
|
||||
|
||||
if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
|
||||
AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET |
|
||||
AVR32_USART_MR_SYNC_MASK;
|
||||
|
||||
usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
/*! \brief Selects the SCK pin as the source of baud rate for the USART
|
||||
* synchronous slave modes.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*
|
||||
* \retval USART_SUCCESS Baud rate successfully initialized.
|
||||
*/
|
||||
static int usart_set_sync_slave_baudrate(volatile avr32_usart_t *usart)
|
||||
{
|
||||
usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
|
||||
AVR32_USART_MR_USCLKS_SCK << AVR32_USART_MR_USCLKS_OFFSET |
|
||||
AVR32_USART_MR_SYNC_MASK;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
/*! \brief Calculates a clock divider (\e CD) for the USART ISO7816 mode to
|
||||
* generate an ISO7816 clock as close as possible to the clock set point.
|
||||
*
|
||||
* ISO7816 clock calculation:
|
||||
* \f$ Clock = \frac{SelectedClock}{CD} \f$.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param clock ISO7816 clock set point.
|
||||
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
|
||||
*
|
||||
* \retval USART_SUCCESS ISO7816 clock successfully initialized.
|
||||
* \retval USART_INVALID_INPUT ISO7816 clock set point is out of range for the given input clock frequency.
|
||||
*/
|
||||
static int usart_set_iso7816_clock(volatile avr32_usart_t *usart, unsigned int clock, unsigned long pba_hz)
|
||||
{
|
||||
unsigned int cd = (pba_hz + clock / 2) / clock;
|
||||
|
||||
if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
usart->mr = (usart->mr & ~(AVR32_USART_MR_USCLKS_MASK |
|
||||
AVR32_USART_MR_SYNC_MASK |
|
||||
AVR32_USART_MR_OVER_MASK)) |
|
||||
AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET |
|
||||
AVR32_USART_MR_OVER_X16 << AVR32_USART_MR_OVER_OFFSET;
|
||||
|
||||
usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
#if defined(AVR32_USART_400_H_INCLUDED) || \
|
||||
defined(AVR32_USART_410_H_INCLUDED) || \
|
||||
defined(AVR32_USART_420_H_INCLUDED) || \
|
||||
defined(AVR32_USART_440_H_INCLUDED) || \
|
||||
defined(AVR32_USART_602_H_INCLUDED)
|
||||
|
||||
|
||||
/*! \brief Calculates a clock divider (\e CD) for the USART SPI master mode to
|
||||
* generate a baud rate as close as possible to the baud rate set point.
|
||||
*
|
||||
* Baud rate calculation:
|
||||
* \f$ Baudrate = \frac{SelectedClock}{CD} \f$.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param baudrate Baud rate set point.
|
||||
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
|
||||
*
|
||||
* \retval USART_SUCCESS Baud rate successfully initialized.
|
||||
* \retval USART_INVALID_INPUT Baud rate set point is out of range for the given input clock frequency.
|
||||
*/
|
||||
static int usart_set_spi_master_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz)
|
||||
{
|
||||
unsigned int cd = (pba_hz + baudrate / 2) / baudrate;
|
||||
|
||||
if (cd < 4 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
|
||||
AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET;
|
||||
|
||||
usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
/*! \brief Selects the SCK pin as the source of baud rate for the USART SPI
|
||||
* slave mode.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*
|
||||
* \retval USART_SUCCESS Baud rate successfully initialized.
|
||||
*/
|
||||
static int usart_set_spi_slave_baudrate(volatile avr32_usart_t *usart)
|
||||
{
|
||||
usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
|
||||
AVR32_USART_MR_USCLKS_SCK << AVR32_USART_MR_USCLKS_OFFSET;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
#endif // USART rev. >= 4.0.0
|
||||
|
||||
|
||||
//! @}
|
||||
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/*! \name Initialization Functions
|
||||
*/
|
||||
//! @{
|
||||
|
||||
|
||||
void usart_reset(volatile avr32_usart_t *usart)
|
||||
{
|
||||
Bool global_interrupt_enabled = Is_global_interrupt_enabled();
|
||||
|
||||
// Disable all USART interrupts.
|
||||
// Interrupts needed should be set explicitly on every reset.
|
||||
if (global_interrupt_enabled) Disable_global_interrupt();
|
||||
usart->idr = 0xFFFFFFFF;
|
||||
usart->csr;
|
||||
if (global_interrupt_enabled) Enable_global_interrupt();
|
||||
|
||||
// Reset mode and other registers that could cause unpredictable behavior after reset.
|
||||
usart->mr = 0;
|
||||
usart->rtor = 0;
|
||||
usart->ttgr = 0;
|
||||
|
||||
// Shutdown TX and RX (will be re-enabled when setup has successfully completed),
|
||||
// reset status bits and turn off DTR and RTS.
|
||||
usart->cr = AVR32_USART_CR_RSTRX_MASK |
|
||||
AVR32_USART_CR_RSTTX_MASK |
|
||||
AVR32_USART_CR_RSTSTA_MASK |
|
||||
AVR32_USART_CR_RSTIT_MASK |
|
||||
AVR32_USART_CR_RSTNACK_MASK |
|
||||
#ifndef AVR32_USART_440_H_INCLUDED
|
||||
// Note: Modem Signal Management DTR-DSR-DCD-RI are not included in USART rev.440.
|
||||
AVR32_USART_CR_DTRDIS_MASK |
|
||||
#endif
|
||||
AVR32_USART_CR_RTSDIS_MASK;
|
||||
}
|
||||
|
||||
|
||||
int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
|
||||
{
|
||||
// Reset the USART and shutdown TX and RX.
|
||||
usart_reset(usart);
|
||||
|
||||
// Check input values.
|
||||
if (!opt || // Null pointer.
|
||||
opt->charlength < 5 || opt->charlength > 9 ||
|
||||
opt->paritytype > 7 ||
|
||||
opt->stopbits > 2 + 255 ||
|
||||
opt->channelmode > 3 ||
|
||||
usart_set_async_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
if (opt->charlength == 9)
|
||||
{
|
||||
// Character length set to 9 bits. MODE9 dominates CHRL.
|
||||
usart->mr |= AVR32_USART_MR_MODE9_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
// CHRL gives the character length (- 5) when MODE9 = 0.
|
||||
usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
|
||||
}
|
||||
|
||||
usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
|
||||
opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
|
||||
|
||||
if (opt->stopbits > USART_2_STOPBITS)
|
||||
{
|
||||
// Set two stop bits
|
||||
usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
|
||||
// and a timeguard period gives the rest.
|
||||
usart->ttgr = opt->stopbits - USART_2_STOPBITS;
|
||||
}
|
||||
else
|
||||
// Insert 1, 1.5 or 2 stop bits.
|
||||
usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
|
||||
|
||||
// Set normal mode.
|
||||
usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
|
||||
AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET;
|
||||
|
||||
// Setup complete; enable communication.
|
||||
// Enable input and output.
|
||||
usart->cr = AVR32_USART_CR_RXEN_MASK |
|
||||
AVR32_USART_CR_TXEN_MASK;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
int usart_init_rs232_tx_only(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
|
||||
{
|
||||
// Reset the USART and shutdown TX and RX.
|
||||
usart_reset(usart);
|
||||
|
||||
// Check input values.
|
||||
if (!opt || // Null pointer.
|
||||
opt->charlength < 5 || opt->charlength > 9 ||
|
||||
opt->paritytype > 7 ||
|
||||
opt->stopbits == 1 || opt->stopbits > 2 + 255 ||
|
||||
opt->channelmode > 3 ||
|
||||
usart_set_sync_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
if (opt->charlength == 9)
|
||||
{
|
||||
// Character length set to 9 bits. MODE9 dominates CHRL.
|
||||
usart->mr |= AVR32_USART_MR_MODE9_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
// CHRL gives the character length (- 5) when MODE9 = 0.
|
||||
usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
|
||||
}
|
||||
|
||||
usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
|
||||
opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
|
||||
|
||||
if (opt->stopbits > USART_2_STOPBITS)
|
||||
{
|
||||
// Set two stop bits
|
||||
usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
|
||||
// and a timeguard period gives the rest.
|
||||
usart->ttgr = opt->stopbits - USART_2_STOPBITS;
|
||||
}
|
||||
else
|
||||
// Insert 1 or 2 stop bits.
|
||||
usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
|
||||
|
||||
// Set normal mode.
|
||||
usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
|
||||
AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET;
|
||||
|
||||
// Setup complete; enable communication.
|
||||
// Enable only output as input is not possible in synchronous mode without
|
||||
// transferring clock.
|
||||
usart->cr = AVR32_USART_CR_TXEN_MASK;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
|
||||
{
|
||||
// First: Setup standard RS232.
|
||||
if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
// Set hardware handshaking mode.
|
||||
usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
|
||||
AVR32_USART_MR_MODE_HARDWARE << AVR32_USART_MR_MODE_OFFSET;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
|
||||
{
|
||||
// First: Setup standard RS232.
|
||||
if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
// Set modem mode.
|
||||
usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
|
||||
AVR32_USART_MR_MODE_MODEM << AVR32_USART_MR_MODE_OFFSET;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
int usart_init_sync_master(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
|
||||
{
|
||||
// Reset the USART and shutdown TX and RX.
|
||||
usart_reset(usart);
|
||||
|
||||
// Check input values.
|
||||
if (!opt || // Null pointer.
|
||||
opt->charlength < 5 || opt->charlength > 9 ||
|
||||
opt->paritytype > 7 ||
|
||||
opt->stopbits == 1 || opt->stopbits > 2 + 255 ||
|
||||
opt->channelmode > 3 ||
|
||||
usart_set_sync_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
if (opt->charlength == 9)
|
||||
{
|
||||
// Character length set to 9 bits. MODE9 dominates CHRL.
|
||||
usart->mr |= AVR32_USART_MR_MODE9_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
// CHRL gives the character length (- 5) when MODE9 = 0.
|
||||
usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
|
||||
}
|
||||
|
||||
usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
|
||||
opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
|
||||
|
||||
if (opt->stopbits > USART_2_STOPBITS)
|
||||
{
|
||||
// Set two stop bits
|
||||
usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
|
||||
// and a timeguard period gives the rest.
|
||||
usart->ttgr = opt->stopbits - USART_2_STOPBITS;
|
||||
}
|
||||
else
|
||||
// Insert 1 or 2 stop bits.
|
||||
usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
|
||||
|
||||
// Set normal mode.
|
||||
usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
|
||||
AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET |
|
||||
AVR32_USART_MR_CLKO_MASK;
|
||||
|
||||
// Setup complete; enable communication.
|
||||
// Enable input and output.
|
||||
usart->cr = AVR32_USART_CR_RXEN_MASK |
|
||||
AVR32_USART_CR_TXEN_MASK;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
int usart_init_sync_slave(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
|
||||
{
|
||||
// Reset the USART and shutdown TX and RX.
|
||||
usart_reset(usart);
|
||||
|
||||
// Check input values.
|
||||
if (!opt || // Null pointer.
|
||||
opt->charlength < 5 || opt->charlength > 9 ||
|
||||
opt->paritytype > 7 ||
|
||||
opt->stopbits == 1 || opt->stopbits > 2 + 255 ||
|
||||
opt->channelmode > 3 ||
|
||||
usart_set_sync_slave_baudrate(usart) == USART_INVALID_INPUT)
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
if (opt->charlength == 9)
|
||||
{
|
||||
// Character length set to 9 bits. MODE9 dominates CHRL.
|
||||
usart->mr |= AVR32_USART_MR_MODE9_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
// CHRL gives the character length (- 5) when MODE9 = 0.
|
||||
usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
|
||||
}
|
||||
|
||||
usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
|
||||
opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
|
||||
|
||||
if (opt->stopbits > USART_2_STOPBITS)
|
||||
{
|
||||
// Set two stop bits
|
||||
usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
|
||||
// and a timeguard period gives the rest.
|
||||
usart->ttgr = opt->stopbits - USART_2_STOPBITS;
|
||||
}
|
||||
else
|
||||
// Insert 1 or 2 stop bits.
|
||||
usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
|
||||
|
||||
// Set normal mode.
|
||||
usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
|
||||
AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET;
|
||||
|
||||
// Setup complete; enable communication.
|
||||
// Enable input and output.
|
||||
usart->cr = AVR32_USART_CR_RXEN_MASK |
|
||||
AVR32_USART_CR_TXEN_MASK;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
|
||||
{
|
||||
// First: Setup standard RS232.
|
||||
if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
// Set RS485 mode.
|
||||
usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
|
||||
AVR32_USART_MR_MODE_RS485 << AVR32_USART_MR_MODE_OFFSET;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt,
|
||||
long pba_hz, unsigned char irda_filter)
|
||||
{
|
||||
// First: Setup standard RS232.
|
||||
if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
// Set IrDA filter.
|
||||
usart->ifr = irda_filter;
|
||||
|
||||
// Set IrDA mode and activate filtering of input.
|
||||
usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
|
||||
AVR32_USART_MODE_IRDA << AVR32_USART_MR_MODE_OFFSET |
|
||||
AVR32_USART_MR_FILTER_MASK;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
int usart_init_iso7816(volatile avr32_usart_t *usart, const usart_iso7816_options_t *opt, int t, long pba_hz)
|
||||
{
|
||||
// Reset the USART and shutdown TX and RX.
|
||||
usart_reset(usart);
|
||||
|
||||
// Check input values.
|
||||
if (!opt || // Null pointer.
|
||||
opt->paritytype > 1)
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
if (t == 0)
|
||||
{
|
||||
// Set USART mode to ISO7816, T=0.
|
||||
// The T=0 protocol always uses 2 stop bits.
|
||||
usart->mr = AVR32_USART_MR_MODE_ISO7816_T0 << AVR32_USART_MR_MODE_OFFSET |
|
||||
AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET |
|
||||
opt->bit_order << AVR32_USART_MR_MSBF_OFFSET; // Allow MSBF in T=0.
|
||||
}
|
||||
else if (t == 1)
|
||||
{
|
||||
// Only LSB first in the T=1 protocol.
|
||||
// max_iterations field is only used in T=0 mode.
|
||||
if (opt->bit_order != 0 ||
|
||||
opt->max_iterations != 0)
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
// Set USART mode to ISO7816, T=1.
|
||||
// The T=1 protocol always uses 1 stop bit.
|
||||
usart->mr = AVR32_USART_MR_MODE_ISO7816_T1 << AVR32_USART_MR_MODE_OFFSET |
|
||||
AVR32_USART_MR_NBSTOP_1 << AVR32_USART_MR_NBSTOP_OFFSET;
|
||||
}
|
||||
else
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
if (usart_set_iso7816_clock(usart, opt->iso7816_hz, pba_hz) == USART_INVALID_INPUT)
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
// Set FIDI register: bit rate = selected clock/FI_DI_ratio/16.
|
||||
usart->fidi = opt->fidi_ratio;
|
||||
|
||||
// Set ISO7816 spesific options in the MODE register.
|
||||
usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
|
||||
AVR32_USART_MR_CLKO_MASK | // Enable clock output.
|
||||
opt->inhibit_nack << AVR32_USART_MR_INACK_OFFSET |
|
||||
opt->dis_suc_nack << AVR32_USART_MR_DSNACK_OFFSET |
|
||||
opt->max_iterations << AVR32_USART_MR_MAX_ITERATION_OFFSET;
|
||||
|
||||
// Setup complete; enable the receiver by default.
|
||||
usart_iso7816_enable_receiver(usart);
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
#if defined(AVR32_USART_400_H_INCLUDED) || \
|
||||
defined(AVR32_USART_410_H_INCLUDED) || \
|
||||
defined(AVR32_USART_420_H_INCLUDED) || \
|
||||
defined(AVR32_USART_440_H_INCLUDED) || \
|
||||
defined(AVR32_USART_602_H_INCLUDED)
|
||||
|
||||
|
||||
int usart_init_lin_master(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz)
|
||||
{
|
||||
// Reset the USART and shutdown TX and RX.
|
||||
usart_reset(usart);
|
||||
|
||||
// Check input values.
|
||||
if (usart_set_async_baudrate(usart, baudrate, pba_hz) == USART_INVALID_INPUT)
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
usart->mr |= AVR32_USART_MR_MODE_LIN_MASTER << AVR32_USART_MR_MODE_OFFSET; // LIN master mode.
|
||||
|
||||
// Setup complete; enable communication.
|
||||
// Enable input and output.
|
||||
usart->cr = AVR32_USART_CR_RXEN_MASK |
|
||||
AVR32_USART_CR_TXEN_MASK;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
int usart_init_lin_slave(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz)
|
||||
{
|
||||
// Reset the USART and shutdown TX and RX.
|
||||
usart_reset(usart);
|
||||
|
||||
// Check input values.
|
||||
if (usart_set_async_baudrate(usart, baudrate, pba_hz) == USART_INVALID_INPUT)
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
usart->mr |= AVR32_USART_MR_MODE_LIN_SLAVE << AVR32_USART_MR_MODE_OFFSET; // LIN slave mode.
|
||||
|
||||
// Setup complete; enable communication.
|
||||
// Enable input and output.
|
||||
usart->cr = AVR32_USART_CR_RXEN_MASK |
|
||||
AVR32_USART_CR_TXEN_MASK;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
int usart_init_spi_master(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz)
|
||||
{
|
||||
// Reset the USART and shutdown TX and RX.
|
||||
usart_reset(usart);
|
||||
|
||||
// Check input values.
|
||||
if (!opt || // Null pointer.
|
||||
opt->charlength < 5 || opt->charlength > 9 ||
|
||||
opt->spimode > 3 ||
|
||||
opt->channelmode > 3 ||
|
||||
usart_set_spi_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
if (opt->charlength == 9)
|
||||
{
|
||||
// Character length set to 9 bits. MODE9 dominates CHRL.
|
||||
usart->mr |= AVR32_USART_MR_MODE9_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
// CHRL gives the character length (- 5) when MODE9 = 0.
|
||||
usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
|
||||
}
|
||||
|
||||
usart->mr |= AVR32_USART_MR_MODE_SPI_MASTER << AVR32_USART_MR_MODE_OFFSET | // SPI master mode.
|
||||
((opt->spimode & 0x1) ^ 0x1) << AVR32_USART_MR_SYNC_OFFSET | // SPI clock phase.
|
||||
opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET | // Channel mode.
|
||||
(opt->spimode >> 1) << AVR32_USART_MR_MSBF_OFFSET | // SPI clock polarity.
|
||||
AVR32_USART_MR_CLKO_MASK; // Drive SCK pin.
|
||||
|
||||
// Setup complete; enable communication.
|
||||
// Enable input and output.
|
||||
usart->cr = AVR32_USART_CR_RXEN_MASK |
|
||||
AVR32_USART_CR_TXEN_MASK;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
int usart_init_spi_slave(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz)
|
||||
{
|
||||
// Reset the USART and shutdown TX and RX.
|
||||
usart_reset(usart);
|
||||
|
||||
// Check input values.
|
||||
if (!opt || // Null pointer.
|
||||
opt->charlength < 5 || opt->charlength > 9 ||
|
||||
opt->spimode > 3 ||
|
||||
opt->channelmode > 3 ||
|
||||
usart_set_spi_slave_baudrate(usart) == USART_INVALID_INPUT)
|
||||
return USART_INVALID_INPUT;
|
||||
|
||||
if (opt->charlength == 9)
|
||||
{
|
||||
// Character length set to 9 bits. MODE9 dominates CHRL.
|
||||
usart->mr |= AVR32_USART_MR_MODE9_MASK;
|
||||
}
|
||||
else
|
||||
{
|
||||
// CHRL gives the character length (- 5) when MODE9 = 0.
|
||||
usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
|
||||
}
|
||||
|
||||
usart->mr |= AVR32_USART_MR_MODE_SPI_SLAVE << AVR32_USART_MR_MODE_OFFSET | // SPI slave mode.
|
||||
((opt->spimode & 0x1) ^ 0x1) << AVR32_USART_MR_SYNC_OFFSET | // SPI clock phase.
|
||||
opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET | // Channel mode.
|
||||
(opt->spimode >> 1) << AVR32_USART_MR_MSBF_OFFSET; // SPI clock polarity.
|
||||
|
||||
// Setup complete; enable communication.
|
||||
// Enable input and output.
|
||||
usart->cr = AVR32_USART_CR_RXEN_MASK |
|
||||
AVR32_USART_CR_TXEN_MASK;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
#endif // USART rev. >= 4.0.0
|
||||
|
||||
|
||||
//! @}
|
||||
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#if defined(AVR32_USART_400_H_INCLUDED) || \
|
||||
defined(AVR32_USART_410_H_INCLUDED) || \
|
||||
defined(AVR32_USART_420_H_INCLUDED) || \
|
||||
defined(AVR32_USART_440_H_INCLUDED) || \
|
||||
defined(AVR32_USART_602_H_INCLUDED)
|
||||
|
||||
|
||||
/*! \name SPI Control Functions
|
||||
*/
|
||||
//! @{
|
||||
|
||||
|
||||
int usart_spi_selectChip(volatile avr32_usart_t *usart)
|
||||
{
|
||||
// Force the SPI chip select.
|
||||
usart->cr = AVR32_USART_CR_RTSEN_MASK;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
int usart_spi_unselectChip(volatile avr32_usart_t *usart)
|
||||
{
|
||||
int timeout = USART_DEFAULT_TIMEOUT;
|
||||
|
||||
do
|
||||
{
|
||||
if (!timeout--) return USART_FAILURE;
|
||||
} while (!usart_tx_empty(usart));
|
||||
|
||||
// Release the SPI chip select.
|
||||
usart->cr = AVR32_USART_CR_RTSDIS_MASK;
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
//! @}
|
||||
|
||||
|
||||
#endif // USART rev. >= 4.0.0
|
||||
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/*! \name Transmit/Receive Functions
|
||||
*/
|
||||
//! @{
|
||||
|
||||
|
||||
int usart_send_address(volatile avr32_usart_t *usart, int address)
|
||||
{
|
||||
// Check if USART is in multidrop / RS485 mode.
|
||||
if (!usart_mode_is_multidrop(usart)) return USART_MODE_FAULT;
|
||||
|
||||
// Prepare to send an address.
|
||||
usart->cr = AVR32_USART_CR_SENDA_MASK;
|
||||
|
||||
// Write the address to TX.
|
||||
usart_bw_write_char(usart, address);
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
int usart_write_char(volatile avr32_usart_t *usart, int c)
|
||||
{
|
||||
if (usart_tx_ready(usart))
|
||||
{
|
||||
usart->thr = (c << AVR32_USART_THR_TXCHR_OFFSET) & AVR32_USART_THR_TXCHR_MASK;
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
else
|
||||
return USART_TX_BUSY;
|
||||
}
|
||||
|
||||
|
||||
int usart_putchar(volatile avr32_usart_t *usart, int c)
|
||||
{
|
||||
int timeout = USART_DEFAULT_TIMEOUT;
|
||||
|
||||
if (c == '\n')
|
||||
{
|
||||
do
|
||||
{
|
||||
if (!timeout--) return USART_FAILURE;
|
||||
} while (usart_write_char(usart, '\r') != USART_SUCCESS);
|
||||
|
||||
timeout = USART_DEFAULT_TIMEOUT;
|
||||
}
|
||||
|
||||
do
|
||||
{
|
||||
if (!timeout--) return USART_FAILURE;
|
||||
} while (usart_write_char(usart, c) != USART_SUCCESS);
|
||||
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
|
||||
|
||||
int usart_read_char(volatile avr32_usart_t *usart, int *c)
|
||||
{
|
||||
// Check for errors: frame, parity and overrun. In RS485 mode, a parity error
|
||||
// would mean that an address char has been received.
|
||||
if (usart->csr & (AVR32_USART_CSR_OVRE_MASK |
|
||||
AVR32_USART_CSR_FRAME_MASK |
|
||||
AVR32_USART_CSR_PARE_MASK))
|
||||
return USART_RX_ERROR;
|
||||
|
||||
// No error; if we really did receive a char, read it and return SUCCESS.
|
||||
if (usart_test_hit(usart))
|
||||
{
|
||||
*c = (usart->rhr & AVR32_USART_RHR_RXCHR_MASK) >> AVR32_USART_RHR_RXCHR_OFFSET;
|
||||
return USART_SUCCESS;
|
||||
}
|
||||
else
|
||||
return USART_RX_EMPTY;
|
||||
}
|
||||
|
||||
|
||||
int usart_getchar(volatile avr32_usart_t *usart)
|
||||
{
|
||||
int c, ret;
|
||||
|
||||
while ((ret = usart_read_char(usart, &c)) == USART_RX_EMPTY);
|
||||
|
||||
if (ret == USART_RX_ERROR)
|
||||
return USART_FAILURE;
|
||||
|
||||
return c;
|
||||
}
|
||||
|
||||
|
||||
void usart_write_line(volatile avr32_usart_t *usart, const char *string)
|
||||
{
|
||||
while (*string != '\0')
|
||||
usart_putchar(usart, *string++);
|
||||
}
|
||||
|
||||
|
||||
int usart_get_echo_line(volatile avr32_usart_t *usart)
|
||||
{
|
||||
int rx_char;
|
||||
int retval = USART_SUCCESS;
|
||||
|
||||
while (1)
|
||||
{
|
||||
rx_char = usart_getchar(usart);
|
||||
if (rx_char == USART_FAILURE)
|
||||
{
|
||||
usart_write_line(usart, "Error!!!\n");
|
||||
retval = USART_FAILURE;
|
||||
break;
|
||||
}
|
||||
if (rx_char == '\x03')
|
||||
{
|
||||
retval = USART_FAILURE;
|
||||
break;
|
||||
}
|
||||
usart_putchar(usart, rx_char);
|
||||
if (rx_char == '\r')
|
||||
{
|
||||
usart_putchar(usart, '\n');
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
|
||||
//! @}
|
||||
@ -1,889 +0,0 @@
|
||||
/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief USART driver for AVR32 UC3.
|
||||
*
|
||||
* This file contains basic functions for the AVR32 USART, with support for all
|
||||
* modes, settings and clock speeds.
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices with a USART module can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _USART_H_
|
||||
#define _USART_H_
|
||||
|
||||
#include <avr32/io.h>
|
||||
#include "compiler.h"
|
||||
|
||||
|
||||
/*! \name Return Values
|
||||
*/
|
||||
//! @{
|
||||
#define USART_SUCCESS 0 //!< Successful completion.
|
||||
#define USART_FAILURE -1 //!< Failure because of some unspecified reason.
|
||||
#define USART_INVALID_INPUT 1 //!< Input value out of range.
|
||||
#define USART_INVALID_ARGUMENT -1 //!< Argument value out of range.
|
||||
#define USART_TX_BUSY 2 //!< Transmitter was busy.
|
||||
#define USART_RX_EMPTY 3 //!< Nothing was received.
|
||||
#define USART_RX_ERROR 4 //!< Transmission error occurred.
|
||||
#define USART_MODE_FAULT 5 //!< USART not in the appropriate mode.
|
||||
//! @}
|
||||
|
||||
//! Default time-out value (number of attempts).
|
||||
#define USART_DEFAULT_TIMEOUT 10000
|
||||
|
||||
/*! \name Parity Settings
|
||||
*/
|
||||
//! @{
|
||||
#define USART_EVEN_PARITY AVR32_USART_MR_PAR_EVEN //!< Use even parity on character transmission.
|
||||
#define USART_ODD_PARITY AVR32_USART_MR_PAR_ODD //!< Use odd parity on character transmission.
|
||||
#define USART_SPACE_PARITY AVR32_USART_MR_PAR_SPACE //!< Use a space as parity bit.
|
||||
#define USART_MARK_PARITY AVR32_USART_MR_PAR_MARK //!< Use a mark as parity bit.
|
||||
#define USART_NO_PARITY AVR32_USART_MR_PAR_NONE //!< Don't use a parity bit.
|
||||
#define USART_MULTIDROP_PARITY AVR32_USART_MR_PAR_MULTI //!< Parity bit is used to flag address characters.
|
||||
//! @}
|
||||
|
||||
/*! \name Stop Bits Settings
|
||||
*/
|
||||
//! @{
|
||||
#define USART_1_STOPBIT AVR32_USART_MR_NBSTOP_1 //!< Use 1 stop bit.
|
||||
#define USART_1_5_STOPBITS AVR32_USART_MR_NBSTOP_1_5 //!< Use 1.5 stop bits.
|
||||
#define USART_2_STOPBITS AVR32_USART_MR_NBSTOP_2 //!< Use 2 stop bits (for more, just give the number of bits).
|
||||
//! @}
|
||||
|
||||
/*! \name Channel Modes
|
||||
*/
|
||||
//! @{
|
||||
#define USART_NORMAL_CHMODE AVR32_USART_MR_CHMODE_NORMAL //!< Normal communication.
|
||||
#define USART_AUTO_ECHO AVR32_USART_MR_CHMODE_ECHO //!< Echo data.
|
||||
#define USART_LOCAL_LOOPBACK AVR32_USART_MR_CHMODE_LOCAL_LOOP //!< Local loopback.
|
||||
#define USART_REMOTE_LOOPBACK AVR32_USART_MR_CHMODE_REMOTE_LOOP //!< Remote loopback.
|
||||
//! @}
|
||||
|
||||
#if defined(AVR32_USART_400_H_INCLUDED) || \
|
||||
defined(AVR32_USART_410_H_INCLUDED) || \
|
||||
defined(AVR32_USART_420_H_INCLUDED) || \
|
||||
defined(AVR32_USART_440_H_INCLUDED) || \
|
||||
defined(AVR32_USART_602_H_INCLUDED)
|
||||
|
||||
/*! \name LIN Node Actions
|
||||
*/
|
||||
//! @{
|
||||
#define USART_LIN_PUBLISH_ACTION AVR32_USART_LINMR_NACT_PUBLISH //!< The USART transmits the response.
|
||||
#define USART_LIN_SUBSCRIBE_ACTION AVR32_USART_LINMR_NACT_SUBSCRIBE //!< The USART receives the response.
|
||||
#define USART_LIN_IGNORE_ACTION AVR32_USART_LINMR_NACT_IGNORE //!< The USART does not transmit and does not receive the reponse.
|
||||
//! @}
|
||||
|
||||
/*! \name LIN Checksum Types
|
||||
*/
|
||||
//! @{
|
||||
#define USART_LIN_ENHANCED_CHECKSUM 0 //!< LIN 2.0 "enhanced" checksum.
|
||||
#define USART_LIN_CLASSIC_CHECKSUM 1 //!< LIN 1.3 "classic" checksum.
|
||||
//! @}
|
||||
|
||||
#endif // USART rev. >= 4.0.0
|
||||
|
||||
|
||||
//! Input parameters when initializing RS232 and similar modes.
|
||||
typedef struct
|
||||
{
|
||||
//! Set baud rate of the USART (unused in slave modes).
|
||||
unsigned long baudrate;
|
||||
|
||||
//! Number of bits to transmit as a character (5 to 9).
|
||||
unsigned char charlength;
|
||||
|
||||
//! How to calculate the parity bit: \ref USART_EVEN_PARITY, \ref USART_ODD_PARITY,
|
||||
//! \ref USART_SPACE_PARITY, \ref USART_MARK_PARITY, \ref USART_NO_PARITY or
|
||||
//! \ref USART_MULTIDROP_PARITY.
|
||||
unsigned char paritytype;
|
||||
|
||||
//! Number of stop bits between two characters: \ref USART_1_STOPBIT,
|
||||
//! \ref USART_1_5_STOPBITS, \ref USART_2_STOPBITS or any number from 3 to 257
|
||||
//! which will result in a time guard period of that length between characters.
|
||||
//! \note \ref USART_1_5_STOPBITS is supported in asynchronous modes only.
|
||||
unsigned short stopbits;
|
||||
|
||||
//! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO,
|
||||
//! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK.
|
||||
unsigned char channelmode;
|
||||
} usart_options_t;
|
||||
|
||||
//! Input parameters when initializing ISO7816 mode.
|
||||
typedef struct
|
||||
{
|
||||
//! Set the frequency of the ISO7816 clock.
|
||||
unsigned long iso7816_hz;
|
||||
|
||||
//! The number of ISO7816 clock ticks in every bit period (1 to 2047, 0 = disable clock).
|
||||
//! Bit rate = \ref iso7816_hz / \ref fidi_ratio.
|
||||
unsigned short fidi_ratio;
|
||||
|
||||
//! How to calculate the parity bit: \ref USART_EVEN_PARITY for normal mode or
|
||||
//! \ref USART_ODD_PARITY for inverse mode.
|
||||
unsigned char paritytype;
|
||||
|
||||
//! Inhibit Non Acknowledge:\n
|
||||
//! - 0: the NACK is generated;\n
|
||||
//! - 1: the NACK is not generated.
|
||||
//!
|
||||
//! \note This bit will be used only in ISO7816 mode, protocol T = 0 receiver.
|
||||
int inhibit_nack;
|
||||
|
||||
//! Disable successive NACKs.
|
||||
//! Successive parity errors are counted up to the value in the \ref max_iterations field.
|
||||
//! These parity errors generate a NACK on the ISO line. As soon as this value is reached,
|
||||
//! no addititional NACK is sent on the ISO line. The ITERATION flag is asserted.
|
||||
int dis_suc_nack;
|
||||
|
||||
//! Max number of repetitions (0 to 7).
|
||||
unsigned char max_iterations;
|
||||
|
||||
//! Bit order in transmitted characters:\n
|
||||
//! - 0: LSB first;\n
|
||||
//! - 1: MSB first.
|
||||
int bit_order;
|
||||
} usart_iso7816_options_t;
|
||||
|
||||
#if defined(AVR32_USART_400_H_INCLUDED) || \
|
||||
defined(AVR32_USART_410_H_INCLUDED) || \
|
||||
defined(AVR32_USART_420_H_INCLUDED) || \
|
||||
defined(AVR32_USART_440_H_INCLUDED) || \
|
||||
defined(AVR32_USART_602_H_INCLUDED)
|
||||
|
||||
//! Input parameters when initializing SPI mode.
|
||||
typedef struct
|
||||
{
|
||||
//! Set the frequency of the SPI clock (unused in slave mode).
|
||||
unsigned long baudrate;
|
||||
|
||||
//! Number of bits to transmit as a character (5 to 9).
|
||||
unsigned char charlength;
|
||||
|
||||
//! Which SPI mode to use.
|
||||
unsigned char spimode;
|
||||
|
||||
//! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO,
|
||||
//! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK.
|
||||
unsigned char channelmode;
|
||||
} usart_spi_options_t;
|
||||
|
||||
#endif // USART rev. >= 4.0.0
|
||||
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/*! \name Initialization Functions
|
||||
*/
|
||||
//! @{
|
||||
|
||||
/*! \brief Resets the USART and disables TX and RX.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*/
|
||||
extern void usart_reset(volatile avr32_usart_t *usart);
|
||||
|
||||
/*! \brief Sets up the USART to use the standard RS232 protocol.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
|
||||
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
|
||||
*
|
||||
* \retval USART_SUCCESS Mode successfully initialized.
|
||||
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
|
||||
*/
|
||||
extern int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
|
||||
|
||||
/*! \brief Sets up the USART to use the standard RS232 protocol in TX-only mode.
|
||||
*
|
||||
* Compared to \ref usart_init_rs232, this function allows very high baud rates
|
||||
* (up to \a pba_hz instead of \a pba_hz / \c 8) at the expense of full duplex.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
|
||||
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
|
||||
*
|
||||
* \retval USART_SUCCESS Mode successfully initialized.
|
||||
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
|
||||
*
|
||||
* \note The \c 1.5 stop bit is not supported in this mode.
|
||||
*/
|
||||
extern int usart_init_rs232_tx_only(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
|
||||
|
||||
/*! \brief Sets up the USART to use hardware handshaking.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
|
||||
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
|
||||
*
|
||||
* \retval USART_SUCCESS Mode successfully initialized.
|
||||
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
|
||||
*
|
||||
* \note \ref usart_init_rs232 does not need to be invoked before this function.
|
||||
*/
|
||||
extern int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
|
||||
|
||||
/*! \brief Sets up the USART to use the modem protocol, activating dedicated inputs/outputs.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
|
||||
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
|
||||
*
|
||||
* \retval USART_SUCCESS Mode successfully initialized.
|
||||
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
|
||||
*/
|
||||
extern int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
|
||||
|
||||
/*! \brief Sets up the USART to use a synchronous RS232-like protocol in master mode.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
|
||||
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
|
||||
*
|
||||
* \retval USART_SUCCESS Mode successfully initialized.
|
||||
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
|
||||
*/
|
||||
extern int usart_init_sync_master(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
|
||||
|
||||
/*! \brief Sets up the USART to use a synchronous RS232-like protocol in slave mode.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
|
||||
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
|
||||
*
|
||||
* \retval USART_SUCCESS Mode successfully initialized.
|
||||
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
|
||||
*/
|
||||
extern int usart_init_sync_slave(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
|
||||
|
||||
/*! \brief Sets up the USART to use the RS485 protocol.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
|
||||
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
|
||||
*
|
||||
* \retval USART_SUCCESS Mode successfully initialized.
|
||||
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
|
||||
*/
|
||||
extern int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
|
||||
|
||||
/*! \brief Sets up the USART to use the IrDA protocol.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
|
||||
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
|
||||
* \param irda_filter Counter used to distinguish received ones from zeros.
|
||||
*
|
||||
* \retval USART_SUCCESS Mode successfully initialized.
|
||||
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
|
||||
*/
|
||||
extern int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt,
|
||||
long pba_hz, unsigned char irda_filter);
|
||||
|
||||
/*! \brief Sets up the USART to use the ISO7816 T=0 or T=1 smartcard protocols.
|
||||
*
|
||||
* The receiver is enabled by default. \ref usart_iso7816_enable_receiver and
|
||||
* \ref usart_iso7816_enable_transmitter can be called to change the half-duplex
|
||||
* communication direction.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param opt Options needed to set up ISO7816 communication (see \ref usart_iso7816_options_t).
|
||||
* \param t ISO7816 mode to use (T=0 or T=1).
|
||||
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
|
||||
*
|
||||
* \retval USART_SUCCESS Mode successfully initialized.
|
||||
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
|
||||
*/
|
||||
extern int usart_init_iso7816(volatile avr32_usart_t *usart, const usart_iso7816_options_t *opt, int t, long pba_hz);
|
||||
|
||||
#if defined(AVR32_USART_400_H_INCLUDED) || \
|
||||
defined(AVR32_USART_410_H_INCLUDED) || \
|
||||
defined(AVR32_USART_420_H_INCLUDED) || \
|
||||
defined(AVR32_USART_440_H_INCLUDED) || \
|
||||
defined(AVR32_USART_602_H_INCLUDED)
|
||||
|
||||
/*! \brief Sets up the USART to use the LIN master mode.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param baudrate Baud rate.
|
||||
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
|
||||
*
|
||||
*/
|
||||
extern int usart_init_lin_master(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz);
|
||||
|
||||
/*! \brief Sets up the USART to use the LIN slave mode.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param baudrate Baud rate.
|
||||
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
|
||||
*
|
||||
*/
|
||||
extern int usart_init_lin_slave(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz);
|
||||
|
||||
/*! \brief Sets up the USART to use the SPI master mode.
|
||||
*
|
||||
* \ref usart_spi_selectChip and \ref usart_spi_unselectChip can be called to
|
||||
* select or unselect the SPI slave chip.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param opt Options needed to set up SPI mode (see \ref usart_spi_options_t).
|
||||
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
|
||||
*
|
||||
* \retval USART_SUCCESS Mode successfully initialized.
|
||||
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
|
||||
*/
|
||||
extern int usart_init_spi_master(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz);
|
||||
|
||||
/*! \brief Sets up the USART to use the SPI slave mode.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param opt Options needed to set up SPI mode (see \ref usart_spi_options_t).
|
||||
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
|
||||
*
|
||||
* \retval USART_SUCCESS Mode successfully initialized.
|
||||
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
|
||||
*/
|
||||
extern int usart_init_spi_slave(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz);
|
||||
|
||||
#endif // USART rev. >= 4.0.0
|
||||
|
||||
//! @}
|
||||
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/*! \name Read and Reset Error Status Bits
|
||||
*/
|
||||
//! @{
|
||||
|
||||
/*! \brief Resets the error status.
|
||||
*
|
||||
* This function resets the status bits indicating that a parity error,
|
||||
* framing error or overrun has occurred. The RXBRK bit, indicating
|
||||
* a start/end of break condition on the RX line, is also reset.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void usart_reset_status(volatile avr32_usart_t *usart)
|
||||
{
|
||||
usart->cr = AVR32_USART_CR_RSTSTA_MASK;
|
||||
}
|
||||
|
||||
/*! \brief Checks if a parity error has occurred since last status reset.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*
|
||||
* \return \c 1 if a parity error has been detected, otherwise \c 0.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ int usart_parity_error(volatile avr32_usart_t *usart)
|
||||
{
|
||||
return (usart->csr & AVR32_USART_CSR_PARE_MASK) != 0;
|
||||
}
|
||||
|
||||
/*! \brief Checks if a framing error has occurred since last status reset.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*
|
||||
* \return \c 1 if a framing error has been detected, otherwise \c 0.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ int usart_framing_error(volatile avr32_usart_t *usart)
|
||||
{
|
||||
return (usart->csr & AVR32_USART_CSR_FRAME_MASK) != 0;
|
||||
}
|
||||
|
||||
/*! \brief Checks if an overrun error has occurred since last status reset.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*
|
||||
* \return \c 1 if a overrun error has been detected, otherwise \c 0.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ int usart_overrun_error(volatile avr32_usart_t *usart)
|
||||
{
|
||||
return (usart->csr & AVR32_USART_CSR_OVRE_MASK) != 0;
|
||||
}
|
||||
|
||||
#if defined(AVR32_USART_400_H_INCLUDED) || \
|
||||
defined(AVR32_USART_410_H_INCLUDED) || \
|
||||
defined(AVR32_USART_420_H_INCLUDED) || \
|
||||
defined(AVR32_USART_440_H_INCLUDED) || \
|
||||
defined(AVR32_USART_602_H_INCLUDED)
|
||||
|
||||
/*! \brief Get LIN Error Status
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*
|
||||
* \retval The binary value of the error field.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ int usart_lin_get_error(volatile avr32_usart_t *usart)
|
||||
{
|
||||
return (usart->csr & (AVR32_USART_CSR_LINSNRE_MASK |
|
||||
AVR32_USART_CSR_LINCE_MASK |
|
||||
AVR32_USART_CSR_LINIPE_MASK |
|
||||
AVR32_USART_CSR_LINISFE_MASK |
|
||||
AVR32_USART_CSR_LINBE_MASK)) >> AVR32_USART_CSR_LINBE_OFFSET;
|
||||
}
|
||||
|
||||
#endif // USART rev. >= 4.0.0
|
||||
|
||||
//! @}
|
||||
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/*! \name ISO7816 Control Functions
|
||||
*/
|
||||
//! @{
|
||||
|
||||
/*! \brief Enables the ISO7816 receiver.
|
||||
*
|
||||
* The ISO7816 transmitter is disabled.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void usart_iso7816_enable_receiver(volatile avr32_usart_t *usart)
|
||||
{
|
||||
usart->cr = AVR32_USART_CR_TXDIS_MASK | AVR32_USART_CR_RXEN_MASK;
|
||||
}
|
||||
|
||||
/*! \brief Enables the ISO7816 transmitter.
|
||||
*
|
||||
* The ISO7816 receiver is disabled.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void usart_iso7816_enable_transmitter(volatile avr32_usart_t *usart)
|
||||
{
|
||||
usart->cr = AVR32_USART_CR_RXDIS_MASK | AVR32_USART_CR_TXEN_MASK;
|
||||
}
|
||||
|
||||
//! @}
|
||||
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#if defined(AVR32_USART_400_H_INCLUDED) || \
|
||||
defined(AVR32_USART_410_H_INCLUDED) || \
|
||||
defined(AVR32_USART_420_H_INCLUDED) || \
|
||||
defined(AVR32_USART_440_H_INCLUDED) || \
|
||||
defined(AVR32_USART_602_H_INCLUDED)
|
||||
|
||||
/*! \name LIN Control Functions
|
||||
*/
|
||||
//! @{
|
||||
|
||||
/*! \brief Sets the node action.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param action The node action: \ref USART_LIN_PUBLISH_ACTION,
|
||||
* \ref USART_LIN_SUBSCRIBE_ACTION or
|
||||
* \ref USART_LIN_IGNORE_ACTION.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void usart_lin_set_node_action(volatile avr32_usart_t *usart, unsigned char action)
|
||||
{
|
||||
usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_NACT_MASK) |
|
||||
action << AVR32_USART_LINMR_NACT_OFFSET;
|
||||
}
|
||||
|
||||
/*! \brief Enables or disables the Identifier parity.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param parity Whether to enable the Identifier parity: \c TRUE or \c FALSE.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void usart_lin_enable_parity(volatile avr32_usart_t *usart, unsigned char parity)
|
||||
{
|
||||
usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_PARDIS_MASK) |
|
||||
!parity << AVR32_USART_LINMR_PARDIS_OFFSET;
|
||||
}
|
||||
|
||||
/*! \brief Enables or disables the checksum.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param parity Whether to enable the checksum: \c TRUE or \c FALSE.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void usart_lin_enable_checksum(volatile avr32_usart_t *usart, unsigned char checksum)
|
||||
{
|
||||
usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_CHKDIS_MASK) |
|
||||
!checksum << AVR32_USART_LINMR_CHKDIS_OFFSET;
|
||||
}
|
||||
|
||||
/*! \brief Sets the checksum type.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param chktyp The checksum type: \ref USART_LIN_ENHANCED_CHEKSUM or
|
||||
* \ref USART_LIN_CLASSIC_CHECKSUM.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void usart_lin_set_checksum(volatile avr32_usart_t *usart, unsigned char chktyp)
|
||||
{
|
||||
usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_CHKTYP_MASK) |
|
||||
chktyp << AVR32_USART_LINMR_CHKTYP_OFFSET;
|
||||
}
|
||||
|
||||
/*! \brief Gets the response data length.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*
|
||||
* \return The response data length.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ unsigned char usart_lin_get_data_length(volatile avr32_usart_t *usart)
|
||||
{
|
||||
if (usart->linmr & AVR32_USART_LINMR_DLM_MASK)
|
||||
{
|
||||
unsigned char data_length = 1 << ((usart->linir >> (AVR32_USART_LINIR_IDCHR_OFFSET + 4)) & 0x03);
|
||||
if (data_length == 1)
|
||||
data_length = 2;
|
||||
return data_length;
|
||||
}
|
||||
else
|
||||
return ((usart->linmr & AVR32_USART_LINMR_DLC_MASK) >> AVR32_USART_LINMR_DLC_OFFSET) + 1;
|
||||
}
|
||||
|
||||
/*! \brief Sets the response data length for LIN 1.x.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void usart_lin_set_data_length_lin1x(volatile avr32_usart_t *usart)
|
||||
{
|
||||
usart->linmr |= AVR32_USART_LINMR_DLM_MASK;
|
||||
}
|
||||
|
||||
/*! \brief Sets the response data length for LIN 2.x.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param data_length The response data length.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void usart_lin_set_data_length_lin2x(volatile avr32_usart_t *usart, unsigned char data_length)
|
||||
{
|
||||
usart->linmr = (usart->linmr & ~(AVR32_USART_LINMR_DLC_MASK |
|
||||
AVR32_USART_LINMR_DLM_MASK)) |
|
||||
(data_length - 1) << AVR32_USART_LINMR_DLC_OFFSET;
|
||||
}
|
||||
|
||||
/*! \brief Enables or disables the frame slot mode.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param frameslot Whether to enable the frame slot mode: \c TRUE or
|
||||
* \c FALSE.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void usart_lin_enable_frameslot(volatile avr32_usart_t *usart, unsigned char frameslot)
|
||||
{
|
||||
usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_FSDIS_MASK) |
|
||||
!frameslot << AVR32_USART_LINMR_FSDIS_OFFSET;
|
||||
}
|
||||
|
||||
/*! \brief Gets the Identifier character.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*
|
||||
* \return The Identifier character.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ unsigned char usart_lin_get_id_char(volatile avr32_usart_t *usart)
|
||||
{
|
||||
return (usart->linir & AVR32_USART_LINIR_IDCHR_MASK) >> AVR32_USART_LINIR_IDCHR_OFFSET;
|
||||
}
|
||||
|
||||
/*! \brief Sets the Identifier character.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param id_char The Identifier character.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void usart_lin_set_id_char(volatile avr32_usart_t *usart, unsigned char id_char)
|
||||
{
|
||||
usart->linir = (usart->linir & ~AVR32_USART_LINIR_IDCHR_MASK) |
|
||||
id_char << AVR32_USART_LINIR_IDCHR_OFFSET;
|
||||
}
|
||||
|
||||
//! @}
|
||||
|
||||
#endif // USART rev. >= 4.0.0
|
||||
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
#if defined(AVR32_USART_400_H_INCLUDED) || \
|
||||
defined(AVR32_USART_410_H_INCLUDED) || \
|
||||
defined(AVR32_USART_420_H_INCLUDED) || \
|
||||
defined(AVR32_USART_440_H_INCLUDED) || \
|
||||
defined(AVR32_USART_602_H_INCLUDED)
|
||||
|
||||
/*! \name SPI Control Functions
|
||||
*/
|
||||
//! @{
|
||||
|
||||
/*! \brief Selects SPI slave chip.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*
|
||||
* \retval USART_SUCCESS Success.
|
||||
*/
|
||||
extern int usart_spi_selectChip(volatile avr32_usart_t *usart);
|
||||
|
||||
/*! \brief Unselects SPI slave chip.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*
|
||||
* \retval USART_SUCCESS Success.
|
||||
* \retval USART_FAILURE Time-out.
|
||||
*/
|
||||
extern int usart_spi_unselectChip(volatile avr32_usart_t *usart);
|
||||
|
||||
//! @}
|
||||
|
||||
#endif // USART rev. >= 4.0.0
|
||||
|
||||
|
||||
//------------------------------------------------------------------------------
|
||||
/*! \name Transmit/Receive Functions
|
||||
*/
|
||||
//! @{
|
||||
|
||||
/*! \brief Addresses a receiver.
|
||||
*
|
||||
* While in RS485 mode, receivers only accept data addressed to them.
|
||||
* A packet/char with the address tag set has to precede any data.
|
||||
* This function is used to address a receiver. This receiver should read
|
||||
* all the following data, until an address packet addresses another receiver.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param address Address of the target device.
|
||||
*
|
||||
* \retval USART_SUCCESS Address successfully sent (if current mode is RS485).
|
||||
* \retval USART_MODE_FAULT Wrong operating mode.
|
||||
*/
|
||||
extern int usart_send_address(volatile avr32_usart_t *usart, int address);
|
||||
|
||||
/*! \brief Tests if the USART is ready to transmit a character.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*
|
||||
* \return \c 1 if the USART Transmit Holding Register is free, otherwise \c 0.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ int usart_tx_ready(volatile avr32_usart_t *usart)
|
||||
{
|
||||
return (usart->csr & AVR32_USART_CSR_TXRDY_MASK) != 0;
|
||||
}
|
||||
|
||||
/*! \brief Writes the given character to the TX buffer if the transmitter is ready.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param c The character (up to 9 bits) to transmit.
|
||||
*
|
||||
* \retval USART_SUCCESS The transmitter was ready.
|
||||
* \retval USART_TX_BUSY The transmitter was busy.
|
||||
*/
|
||||
extern int usart_write_char(volatile avr32_usart_t *usart, int c);
|
||||
|
||||
/*! \brief An active wait writing a character to the USART.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param c The character (up to 9 bits) to transmit.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void usart_bw_write_char(volatile avr32_usart_t *usart, int c)
|
||||
{
|
||||
while (usart_write_char(usart, c) != USART_SUCCESS);
|
||||
}
|
||||
|
||||
/*! \brief Sends a character with the USART.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param c Character to write.
|
||||
*
|
||||
* \retval USART_SUCCESS The character was written.
|
||||
* \retval USART_FAILURE The function timed out before the USART transmitter became ready to send.
|
||||
*/
|
||||
extern int usart_putchar(volatile avr32_usart_t *usart, int c);
|
||||
|
||||
/*! \brief Tests if all requested USART transmissions are over.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*
|
||||
* \return \c 1 if the USART Transmit Shift Register and the USART Transmit
|
||||
* Holding Register are free, otherwise \c 0.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ int usart_tx_empty(volatile avr32_usart_t *usart)
|
||||
{
|
||||
return (usart->csr & AVR32_USART_CSR_TXEMPTY_MASK) != 0;
|
||||
}
|
||||
|
||||
/*! \brief Tests if the USART contains a received character.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*
|
||||
* \return \c 1 if the USART Receive Holding Register is full, otherwise \c 0.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ int usart_test_hit(volatile avr32_usart_t *usart)
|
||||
{
|
||||
return (usart->csr & AVR32_USART_CSR_RXRDY_MASK) != 0;
|
||||
}
|
||||
|
||||
/*! \brief Checks the RX buffer for a received character, and stores it at the
|
||||
* given memory location.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param c Pointer to the where the read character should be stored
|
||||
* (must be at least short in order to accept 9-bit characters).
|
||||
*
|
||||
* \retval USART_SUCCESS The character was read successfully.
|
||||
* \retval USART_RX_EMPTY The RX buffer was empty.
|
||||
* \retval USART_RX_ERROR An error was deteceted.
|
||||
*/
|
||||
extern int usart_read_char(volatile avr32_usart_t *usart, int *c);
|
||||
|
||||
/*! \brief Waits until a character is received, and returns it.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*
|
||||
* \return The received character, or \ref USART_FAILURE upon error.
|
||||
*/
|
||||
extern int usart_getchar(volatile avr32_usart_t *usart);
|
||||
|
||||
/*! \brief Writes one character string to the USART.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
* \param string String to be written.
|
||||
*/
|
||||
extern void usart_write_line(volatile avr32_usart_t *usart, const char *string);
|
||||
|
||||
/*! \brief Gets and echoes characters until end of line.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*
|
||||
* \retval USART_SUCCESS Success.
|
||||
* \retval USART_FAILURE Low-level error detected or ETX character received.
|
||||
*/
|
||||
extern int usart_get_echo_line(volatile avr32_usart_t *usart);
|
||||
|
||||
#if defined(AVR32_USART_400_H_INCLUDED) || \
|
||||
defined(AVR32_USART_410_H_INCLUDED) || \
|
||||
defined(AVR32_USART_420_H_INCLUDED) || \
|
||||
defined(AVR32_USART_440_H_INCLUDED) || \
|
||||
defined(AVR32_USART_602_H_INCLUDED)
|
||||
|
||||
/*! \brief Abort LIN transmission.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ void usart_lin_abort(volatile avr32_usart_t *usart)
|
||||
{
|
||||
usart->cr = AVR32_USART_LINABT_MASK;
|
||||
}
|
||||
|
||||
/*! \brief Tests if a LIN transfer has been completed.
|
||||
*
|
||||
* \param usart Base address of the USART instance.
|
||||
*
|
||||
* \return \c 1 if a LIN transfer has been completed, otherwise \c 0.
|
||||
*/
|
||||
#if (defined __GNUC__)
|
||||
__attribute__((__always_inline__))
|
||||
#endif
|
||||
extern __inline__ int usart_lin_transfer_completed(volatile avr32_usart_t *usart)
|
||||
{
|
||||
return (usart->csr & AVR32_USART_CSR_LINTC_MASK) != 0;
|
||||
}
|
||||
|
||||
#endif // USART rev. >= 4.0.0
|
||||
|
||||
//! @}
|
||||
|
||||
|
||||
#endif // _USART_H_
|
||||
@ -1,63 +0,0 @@
|
||||
/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief NEWLIB_ADDONS CPU include file for AVR32.
|
||||
*
|
||||
* - Compiler: GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __AVR32_NEWLIB_ADDONS_CPU_H__
|
||||
#define __AVR32_NEWLIB_ADDONS_CPU_H__
|
||||
|
||||
#include <_ansi.h>
|
||||
|
||||
_BEGIN_STD_C
|
||||
|
||||
#define CPU_HZ get_cpu_hz()
|
||||
|
||||
void udelay(unsigned long usec);
|
||||
void set_cpu_hz(unsigned int clk_hz);
|
||||
unsigned int get_cpu_hz();
|
||||
|
||||
_END_STD_C
|
||||
|
||||
#endif
|
||||
@ -1,120 +0,0 @@
|
||||
/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief NEWLIB_ADDONS exceptions include file for AVR32.
|
||||
*
|
||||
* - Compiler: GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __AVR32_NEWLIB_ADDONS_EXCEPTIONS_H__
|
||||
#define __AVR32_NEWLIB_ADDONS_EXCEPTIONS_H__
|
||||
|
||||
#include <_ansi.h>
|
||||
|
||||
_BEGIN_STD_C
|
||||
|
||||
/*
|
||||
Exception vector offsets
|
||||
*/
|
||||
#define EVBA_UNRECOVERABLE 0x000
|
||||
#define EVBA_TLB_MULTIPLE 0x004
|
||||
#define EVBA_BUS_ERROR_DATA 0x008
|
||||
#define EVBA_BUS_ERROR_INSTR 0x00C
|
||||
#define EVBA_NMI 0x010
|
||||
#define EVBA_INSTR_ADDR 0x014
|
||||
#define EVBA_ITLB_MISS 0x050
|
||||
#define EVBA_ITLB_PROT 0x018
|
||||
#define EVBA_BREAKPOINT 0x01C
|
||||
#define EVBA_ILLEGAL_OPCODE 0x020
|
||||
#define EVBA_UNIMPLEMENTED 0x024
|
||||
#define EVBA_PRIVILEGE_VIOL 0x028
|
||||
#define EVBA_FLOATING_POINT 0x02C
|
||||
#define EVBA_COP_ABSENT 0x030
|
||||
#define EVBA_SCALL 0x100
|
||||
#define EVBA_DATA_ADDR_R 0x034
|
||||
#define EVBA_DATA_ADDR_W 0x038
|
||||
#define EVBA_DTLB_MISS_R 0x060
|
||||
#define EVBA_DTLB_MISS_W 0x070
|
||||
#define EVBA_DTLB_PROT_R 0x03C
|
||||
#define EVBA_DTLB_PROT_W 0x040
|
||||
#define EVBA_DTLB_MODIFIED 0x044
|
||||
|
||||
|
||||
/*
|
||||
Define the form of the function used when registering exceptions.
|
||||
The function should return the address which the exception should
|
||||
return to after the exception processing.
|
||||
*/
|
||||
|
||||
typedef unsigned int (*__exception_handler)(int /*evba_offset*/, int /*return address*/);
|
||||
|
||||
/*
|
||||
Define the form of the function used when registering a scall handler.
|
||||
*/
|
||||
|
||||
typedef void (*__scall_handler)(int /*code*/, int /*p1*/, int /*p2*/
|
||||
, int /*p3*/, int /*p4*/);
|
||||
|
||||
/*
|
||||
Function for registering an exception handler for the exception with
|
||||
offset given by evba_offset.
|
||||
*/
|
||||
void _register_exception_handler(__exception_handler handler, int evba_offset);
|
||||
|
||||
/*
|
||||
Function for registering a scall handler which can be a arbirary
|
||||
function which uses r8-r12 for parameters.
|
||||
*/
|
||||
void _register_scall_handler(__scall_handler handler);
|
||||
|
||||
/*
|
||||
Initialize exceptions. Must be called before registering exception handlers
|
||||
and needed to enable exceptions. 'evba' is the pointer to the exception
|
||||
vector. 'handler_table' is a pointer to an array where the pointers to
|
||||
the exception handlers are stored. This array must be at least 0x104 bytes
|
||||
and word aligned.
|
||||
*/
|
||||
void init_exceptions(void *evba, void *handler_table);
|
||||
|
||||
_END_STD_C
|
||||
|
||||
#endif
|
||||
@ -1,82 +0,0 @@
|
||||
/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief NEWLIB_ADDONS interrupts include file for AVR32.
|
||||
*
|
||||
* - Compiler: GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __AVR32_NEWLIB_ADDONS_INTERRUPTS_H__
|
||||
#define __AVR32_NEWLIB_ADDONS_INTERRUPTS_H__
|
||||
|
||||
#include <_ansi.h>
|
||||
|
||||
_BEGIN_STD_C
|
||||
|
||||
#define INT_GRPS 64
|
||||
#define INT_LINES 32
|
||||
#define INTPR_BASE (__intc_base__ + 0x0000)
|
||||
#define INTREQ_BASE (__intc_base__ + 64*4)
|
||||
#define INTCAUSE_BASE (__intc_base__ + 2*64*4)
|
||||
|
||||
//Register offsets
|
||||
#define INTLEVEL 30
|
||||
#define AUTOVECTOR 0
|
||||
#define AUTOVECTOR_BITS 14
|
||||
|
||||
//Priorities
|
||||
#define INT0 0
|
||||
#define INT1 1
|
||||
#define INT2 2
|
||||
#define INT3 3
|
||||
|
||||
|
||||
typedef void (*__newlib_int_handler)(int /* int_grp*/, void */*user_handle*/);
|
||||
|
||||
__newlib_int_handler register_interrupt(__newlib_int_handler handler, int int_grp, int line, int priority,
|
||||
.../* void *user_handle*/);
|
||||
void init_interrupts();
|
||||
void set_interrupts_base(void *base);
|
||||
|
||||
_END_STD_C
|
||||
|
||||
#endif
|
||||
@ -1,174 +0,0 @@
|
||||
/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief NEWLIB_ADDONS miscellaneous macros include file for AVR32.
|
||||
*
|
||||
* - Compiler: GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __AVR32_NEWLIB_ADDONS_IO_H__
|
||||
#define __AVR32_NEWLIB_ADDONS_IO_H__
|
||||
|
||||
#include <_ansi.h>
|
||||
|
||||
_BEGIN_STD_C
|
||||
|
||||
typedef char u8;
|
||||
typedef unsigned int u32;
|
||||
|
||||
#define __raw_writeb(v,a) (*(volatile unsigned char *)(a) = (v))
|
||||
#define __raw_writew(v,a) (*(volatile unsigned short *)(a) = (v))
|
||||
#define __raw_writel(v,a) (*(volatile unsigned int *)(a) = (v))
|
||||
|
||||
#define __raw_readb(a) (*(volatile unsigned char *)(a))
|
||||
#define __raw_readw(a) (*(volatile unsigned short *)(a))
|
||||
#define __raw_readl(a) (*(volatile unsigned int *)(a))
|
||||
|
||||
/* As long as I/O is only performed in P4 (or possibly P3), we're safe */
|
||||
#define writeb(v,a) __raw_writeb(v,a)
|
||||
#define writew(v,a) __raw_writew(v,a)
|
||||
#define writel(v,a) __raw_writel(v,a)
|
||||
|
||||
#define readb(a) __raw_readb(a)
|
||||
#define readw(a) __raw_readw(a)
|
||||
#define readl(a) __raw_readl(a)
|
||||
|
||||
/* Memory segments when segmentation is enabled */
|
||||
#define P0SEG 0x00000000
|
||||
#define P1SEG 0x80000000
|
||||
#define P2SEG 0xa0000000
|
||||
#define P3SEG 0xc0000000
|
||||
#define P4SEG 0xe0000000
|
||||
|
||||
/* Returns the privileged segment base of a given address */
|
||||
#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000)
|
||||
|
||||
/* Returns the physical address of a PnSEG (n=1,2) address */
|
||||
#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff)
|
||||
|
||||
/*
|
||||
* Map an address to a certain privileged segment
|
||||
*/
|
||||
#define P1SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG))
|
||||
#define P2SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG))
|
||||
#define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
|
||||
#define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
|
||||
|
||||
|
||||
#define cached(addr) P1SEGADDR(addr)
|
||||
#define uncached(addr) P2SEGADDR(addr)
|
||||
#define physaddr(addr) PHYSADDR(addr)
|
||||
|
||||
#define BF(field, value) \
|
||||
({ union { \
|
||||
struct { \
|
||||
unsigned : 32 - field ## _OFFSET - field ## _SIZE ; \
|
||||
unsigned long __val: field ## _SIZE ; \
|
||||
}; \
|
||||
unsigned long __ul; \
|
||||
} __tmp; \
|
||||
__tmp.__ul = 0; \
|
||||
__tmp.__val = value; \
|
||||
__tmp.__ul;})
|
||||
|
||||
#define BF_D(field, value) \
|
||||
({ union { \
|
||||
struct { \
|
||||
unsigned long long : 64 - field ## _OFFSET - field ## _SIZE ; \
|
||||
unsigned long long __val: field ## _SIZE ; \
|
||||
}; \
|
||||
unsigned long long __ul; \
|
||||
} __tmp; \
|
||||
__tmp.__ul = 0; \
|
||||
__tmp.__val = value; \
|
||||
__tmp.__ul;})
|
||||
|
||||
#define BFINS(var, field, value) \
|
||||
{ union {\
|
||||
struct { \
|
||||
unsigned : 32 - field ## _OFFSET - field ## _SIZE ; \
|
||||
unsigned long __val: field ## _SIZE ; \
|
||||
}; \
|
||||
unsigned long __ul; \
|
||||
} __tmp; \
|
||||
__tmp.__ul = var; \
|
||||
__tmp.__val = value; \
|
||||
var = __tmp.__ul;}
|
||||
|
||||
#define BFEXT(var, field) \
|
||||
({ union {\
|
||||
struct { \
|
||||
unsigned : 32 - field ## _OFFSET - field ## _SIZE ; \
|
||||
unsigned long __val: field ## _SIZE ; \
|
||||
}; \
|
||||
unsigned long __ul; \
|
||||
} __tmp; \
|
||||
__tmp.__ul = var; \
|
||||
__tmp.__val; })
|
||||
|
||||
#define BFINS_D(var, field, value) \
|
||||
{ union {\
|
||||
struct { \
|
||||
unsigned long long : 64 - field ## _OFFSET - field ## _SIZE ; \
|
||||
unsigned long long __val: field ## _SIZE ; \
|
||||
}; \
|
||||
unsigned long long __ul; \
|
||||
} __tmp; \
|
||||
__tmp.__ul = var; \
|
||||
__tmp.__val = value; \
|
||||
var = __tmp.__ul;}
|
||||
|
||||
#define BFEXT_D(var, field) \
|
||||
({ union {\
|
||||
struct { \
|
||||
unsigned long long : 64 - field ## _OFFSET - field ## _SIZE ; \
|
||||
unsigned long long __val: field ## _SIZE ; \
|
||||
}; \
|
||||
unsigned long long __ul; \
|
||||
} __tmp; \
|
||||
__tmp.__ul = var; \
|
||||
__tmp.__val; })
|
||||
|
||||
|
||||
_END_STD_C
|
||||
|
||||
#endif
|
||||
@ -1,208 +0,0 @@
|
||||
/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief NEWLIB_ADDONS USART include file for AVR32.
|
||||
*
|
||||
* - Compiler: GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __AVR32_NEWLIB_ADDONS_USART_H__
|
||||
#define __AVR32_NEWLIB_ADDONS_USART_H__
|
||||
|
||||
#include <_ansi.h>
|
||||
|
||||
#include "nlao_io.h"
|
||||
|
||||
_BEGIN_STD_C
|
||||
|
||||
struct usart3 {
|
||||
volatile u32 us_cr;
|
||||
volatile u32 us_mr;
|
||||
volatile u32 us_ier;
|
||||
volatile u32 us_idr;
|
||||
volatile u32 us_imr;
|
||||
volatile u32 us_csr;
|
||||
volatile u32 us_rhr;
|
||||
volatile u32 us_thr;
|
||||
volatile u32 us_brgr;
|
||||
volatile u32 us_rtor;
|
||||
volatile u32 us_ttgr;
|
||||
volatile u32 us_reserved[5];
|
||||
volatile u32 us_fidi;
|
||||
volatile u32 us_ner;
|
||||
volatile u32 us_xxr;
|
||||
volatile u32 us_if;
|
||||
};
|
||||
|
||||
/* Register offsets */
|
||||
#define US_CR 0x0000
|
||||
#define US_MR 0x0004
|
||||
#define US_IER 0x0008
|
||||
#define US_IDR 0x000c
|
||||
#define US_IMR 0x0010
|
||||
#define US_CSR 0x0014
|
||||
#define US_RHR 0x0018
|
||||
#define US_THR 0x001c
|
||||
#define US_BRGR 0x0020
|
||||
#define US_RTOR 0x0024
|
||||
#define US_TTGR 0x0028
|
||||
|
||||
#define US_FIDI 0x0040
|
||||
#define US_NER 0x0044
|
||||
#define US_XXR 0x0048
|
||||
#define US_IF 0x004c
|
||||
|
||||
#define US_RPR 0x0100
|
||||
#define US_RCR 0x0104
|
||||
#define US_TPR 0x0108
|
||||
#define US_TCR 0x010c
|
||||
#define US_RNPR 0x0110
|
||||
#define US_RNCR 0x0114
|
||||
#define US_TNPR 0x0118
|
||||
#define US_TNCR 0x011c
|
||||
#define US_PTCR 0x0120
|
||||
#define US_PTSR 0x0124
|
||||
|
||||
|
||||
|
||||
|
||||
/* USART3 Control Register */
|
||||
#define US_CR_RSTRX (1 << 2)
|
||||
#define US_CR_RSTTX (1 << 3)
|
||||
#define US_CR_RXEN (1 << 4)
|
||||
#define US_CR_RXDIS (1 << 5)
|
||||
#define US_CR_TXEN (1 << 6)
|
||||
#define US_CR_TXDIS (1 << 7)
|
||||
#define US_CR_RSTSTA (1 << 8)
|
||||
#define US_CR_STTBRK (1 << 9)
|
||||
#define US_CR_STPBRK (1 << 10)
|
||||
|
||||
#define US_CR_DTREN (1 << 16)
|
||||
#define US_CR_DTRDIS (1 << 17)
|
||||
#define US_CR_RTSEN (1 << 18)
|
||||
#define US_CR_RTSDIS (1 << 19)
|
||||
|
||||
/* USART3 Mode Register */
|
||||
#define US_MR_MODE (15 << 0)
|
||||
#define US_MR_MODE_NORMAL ( 0 << 0)
|
||||
#define US_MR_MODE_HWFLOW ( 2 << 0)
|
||||
#define US_MR_CLKS ( 3 << 4)
|
||||
#define US_MR_CLKS_CLOCK ( 0 << 4)
|
||||
#define US_MR_CLKS_FDIV1 ( 1 << 4)
|
||||
#define US_MR_CLKS_SLOW ( 2 << 4)
|
||||
#define US_MR_CLKS_EXT ( 3 << 4)
|
||||
#define US_MR_CHRL_5BITS ( 0 << 6)
|
||||
#define US_MR_CHRL_6BITS ( 1 << 6)
|
||||
#define US_MR_CHRL_7BITS ( 2 << 6)
|
||||
#define US_MR_CHRL_8BITS ( 3 << 6)
|
||||
#define US_MR_SYNC ( 1 << 8)
|
||||
#define US_MR_PAR_EVEN ( 0 << 9)
|
||||
#define US_MR_PAR_ODD ( 1 << 9)
|
||||
#define US_MR_PAR_SPACE ( 2 << 9)
|
||||
#define US_MR_PAR_MARK ( 3 << 9)
|
||||
#define US_MR_PAR_NONE ( 4 << 9)
|
||||
#define US_MR_PAR_MDROP ( 6 << 9)
|
||||
#define US_MR_NBSTOP_1BIT ( 0 << 12)
|
||||
#define US_MR_NBSTOP_1_5BIT ( 1 << 12)
|
||||
#define US_MR_NBSTOP_2BITS ( 2 << 12)
|
||||
#define US_MR_OVER ( 1 << 19)
|
||||
#define US_MR_OVER_X16 ( 0 << 19)
|
||||
#define US_MR_OVER_X8 ( 1 << 19)
|
||||
|
||||
/* USART3 Channel Status Register */
|
||||
#define US_CSR_RXRDY (1 << 0)
|
||||
#define US_CSR_TXRDY (1 << 1)
|
||||
#define US_CSR_RXBRK (1 << 2)
|
||||
#define US_CSR_ENDRX (1 << 3)
|
||||
#define US_CSR_ENDTX (1 << 4)
|
||||
|
||||
|
||||
#define US_CSR_OVRE (1 << 5)
|
||||
#define US_CSR_FRAME (1 << 6)
|
||||
#define US_CSR_PARE (1 << 7)
|
||||
|
||||
#define US_CSR_TXEMPTY (1 << 9)
|
||||
|
||||
#define US_CSR_TXBUFE (1 << 11)
|
||||
#define US_CSR_RXBUFF (1 << 12)
|
||||
#define US_CSR_RIIC (1 << 16)
|
||||
#define US_CSR_DSRIC (1 << 17)
|
||||
#define US_CSR_DCDIC (1 << 18)
|
||||
#define US_CSR_CTSIC (1 << 19)
|
||||
#define US_CSR_RI (1 << 20)
|
||||
#define US_CSR_DSR (1 << 21)
|
||||
#define US_CSR_DCD (1 << 22)
|
||||
#define US_CSR_CTS (1 << 23)
|
||||
|
||||
/* USART3 Baud Rate Generator Register */
|
||||
#define US_BRGR_CD_OFFSET 0
|
||||
#define US_BRGR_FP_OFFSET 16
|
||||
|
||||
#define US_BRGR_CD_SIZE 16
|
||||
#define US_BRGR_FP_SIZE 3
|
||||
|
||||
#define US_BRGR_CD (0xFFFF << 0)
|
||||
#define US_BRGR_FP ( 7 << 16)
|
||||
|
||||
/*USART3 PDC Transfer Control Register */
|
||||
#define US_PTCR_RXTEN (1 << 0)
|
||||
#define US_PTCR_RXTDIS (1 << 1)
|
||||
#define US_PTCR_TXTEN (1 << 8)
|
||||
#define US_PTCR_TXTDIS (1 << 9)
|
||||
|
||||
/*USART3 PDC Transfer Status Register */
|
||||
#define US_PTSR_RXTEN (1 << 0)
|
||||
#define US_PTSR_TXTEN (1 << 8)
|
||||
|
||||
|
||||
int usart_init(int baudrate);
|
||||
void usart_putc(char c);
|
||||
void usart_puts(const char *s);
|
||||
int usart_getc(void);
|
||||
int usart_tstc(void);
|
||||
void usart_setbrg(int baudrate, int cpu_clock);
|
||||
void set_usart_base(void *usart_base);
|
||||
|
||||
|
||||
_END_STD_C
|
||||
|
||||
#endif /* MERLIN_USART3_H */
|
||||
@ -1,266 +0,0 @@
|
||||
/******************************************************************************
|
||||
* AVR32 AT32UC3A0128 GNU LD script file.
|
||||
*
|
||||
* - Compiler: GNU GCC for AVR32
|
||||
* - Supported devices: AVR32 AT32UC3A0128
|
||||
*
|
||||
* - author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
|
||||
|
||||
OUTPUT_ARCH(avr32:uc)
|
||||
|
||||
ENTRY(_start)
|
||||
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00020000
|
||||
INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
|
||||
USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
|
||||
}
|
||||
|
||||
PHDRS
|
||||
{
|
||||
FLASH PT_LOAD;
|
||||
INTRAM_ALIGN PT_NULL;
|
||||
INTRAM_AT_FLASH PT_LOAD;
|
||||
INTRAM PT_NULL;
|
||||
USERPAGE PT_LOAD;
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* If this heap size is selected, all the INTRAM space from the end of the
|
||||
data area to the beginning of the stack will be allocated for the heap. */
|
||||
__max_heap_size__ = -1;
|
||||
|
||||
/* Use a default heap size if heap size was not defined. */
|
||||
__heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
|
||||
|
||||
/* Use a default stack size if stack size was not defined. */
|
||||
__stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
|
||||
|
||||
/* Read-only sections, merged into text segment: */
|
||||
PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
|
||||
.interp : { *(.interp) } >FLASH AT>FLASH :FLASH
|
||||
.reset : { *(.reset) } >FLASH AT>FLASH :FLASH
|
||||
.hash : { *(.hash) } >FLASH AT>FLASH :FLASH
|
||||
.dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
|
||||
.dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
|
||||
.gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
|
||||
.gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
|
||||
.gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
|
||||
.rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
|
||||
.rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
|
||||
.rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
|
||||
.rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
|
||||
.rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
|
||||
.rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
|
||||
.rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
|
||||
.rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
|
||||
.rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
|
||||
.rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
|
||||
.rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
|
||||
.rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
|
||||
.rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
|
||||
.rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
|
||||
.rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
|
||||
.rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
|
||||
.rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
|
||||
.rela.ctors : { *(.rela.ctors) } >FLASH AT>FLASH :FLASH
|
||||
.rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
|
||||
.rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
|
||||
.rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
|
||||
.rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
|
||||
.rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
|
||||
.rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
|
||||
.rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
|
||||
.rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
|
||||
.init :
|
||||
{
|
||||
KEEP (*(.init))
|
||||
} >FLASH AT>FLASH :FLASH =0xd703d703
|
||||
.plt : { *(.plt) } >FLASH AT>FLASH :FLASH
|
||||
.text :
|
||||
{
|
||||
*(.text .stub .text.* .gnu.linkonce.t.*)
|
||||
KEEP (*(.text.*personality*))
|
||||
/* .gnu.warning sections are handled specially by elf32.em. */
|
||||
*(.gnu.warning)
|
||||
} >FLASH AT>FLASH :FLASH =0xd703d703
|
||||
.fini :
|
||||
{
|
||||
KEEP (*(.fini))
|
||||
} >FLASH AT>FLASH :FLASH =0xd703d703
|
||||
PROVIDE (__etext = .);
|
||||
PROVIDE (_etext = .);
|
||||
PROVIDE (etext = .);
|
||||
.rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
|
||||
.rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
|
||||
.eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
|
||||
.gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
|
||||
.lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
|
||||
. = ORIGIN(INTRAM);
|
||||
.dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM_ALIGN
|
||||
/* Exception handling */
|
||||
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
/* Thread Local Storage sections */
|
||||
.tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
/* Ensure the __preinit_array_start label is properly aligned. We
|
||||
could instead move the label definition inside the section, but
|
||||
the linker would then create the section even if it turns out to
|
||||
be empty, which isn't pretty. */
|
||||
PROVIDE (__preinit_array_start = ALIGN(32 / 8));
|
||||
.preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
PROVIDE (__preinit_array_end = .);
|
||||
PROVIDE (__init_array_start = .);
|
||||
.init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
PROVIDE (__init_array_end = .);
|
||||
PROVIDE (__fini_array_start = .);
|
||||
.fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
PROVIDE (__fini_array_end = .);
|
||||
.ctors :
|
||||
{
|
||||
/* gcc uses crtbegin.o to find the start of
|
||||
the constructors, so we make sure it is
|
||||
first. Because this is a wildcard, it
|
||||
doesn't matter if the user does not
|
||||
actually link against crtbegin.o; the
|
||||
linker won't look for a file to match a
|
||||
wildcard. The wildcard also means that it
|
||||
doesn't matter which directory crtbegin.o
|
||||
is in. */
|
||||
KEEP (*crtbegin*.o(.ctors))
|
||||
/* We don't want to include the .ctor section from
|
||||
from the crtend.o file until after the sorted ctors.
|
||||
The .ctor section from the crtend file contains the
|
||||
end of ctors marker and it must be last */
|
||||
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
} >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.dtors :
|
||||
{
|
||||
KEEP (*crtbegin*.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
} >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.dynamic : { *(.dynamic) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.ramtext : { *(.ramtext .ramtext.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.ddalign : { . = ALIGN(8); } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.data :
|
||||
{
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
SORT(CONSTRUCTORS)
|
||||
} >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.data1 : { *(.data1) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.balign : { . = ALIGN(8); PROVIDE(_edata = .); } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
PROVIDE (edata = .);
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
*(.dynbss)
|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
/* Align here to ensure that the .bss section occupies space up to
|
||||
_end. Align after .bss to ensure correct alignment even if the
|
||||
.bss section disappears because there are no input sections. */
|
||||
. = ALIGN(8);
|
||||
} >INTRAM AT>INTRAM :INTRAM
|
||||
. = ALIGN(8);
|
||||
_end = .;
|
||||
PROVIDE (end = .);
|
||||
__heap_start__ = ALIGN(8);
|
||||
.heap :
|
||||
{
|
||||
*(.heap)
|
||||
. = (__heap_size__ == __max_heap_size__) ?
|
||||
ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
|
||||
__heap_size__;
|
||||
} >INTRAM AT>INTRAM :INTRAM
|
||||
__heap_end__ = .;
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
|
||||
{
|
||||
_stack = .;
|
||||
*(.stack)
|
||||
. = __stack_size__;
|
||||
_estack = .;
|
||||
} >INTRAM AT>INTRAM :INTRAM
|
||||
.userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
@ -1,153 +0,0 @@
|
||||
/******************************************************************************
|
||||
* AVR32 AT32UC3A0128 XLINK command file for AVR32 IAR C/C++ Compiler.
|
||||
*
|
||||
* The assumed memory layout is the one of the AT32UC3A0128:
|
||||
*
|
||||
* Start Stop Name Type
|
||||
* ---------- ---------- ----- --------------
|
||||
* 0x00000000 0x00007FFF SRAM RAM
|
||||
* 0x80000000 0x8001FFFF FLASH FLASH
|
||||
* 0x80800000 0x808001FF USER FLASH
|
||||
*
|
||||
* Usage: xlink your_file(s) -f xcl-file libraries
|
||||
*
|
||||
* - Compiler: IAR EWAVR32
|
||||
* - Supported devices: AVR32 AT32UC3A0128
|
||||
*
|
||||
* - author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
/************************************************************************/
|
||||
/* The following segments are defined in this link file: */
|
||||
/* */
|
||||
/* Code segments */
|
||||
/* CODE32 -- Program code used by __code32 functions. */
|
||||
/* RESET -- Reset code. */
|
||||
/* EVSEG -- Exception vector handlers. */
|
||||
/* */
|
||||
/* Constant segments */
|
||||
/* INITTAB -- Segment initializer table. */
|
||||
/* DIFUNCT -- Dynamic initialization vector used by C++. */
|
||||
/* SWITCH -- Switch tables. */
|
||||
/* ACTAB -- Table of pointers to acall functions. */
|
||||
/* */
|
||||
/* DATA21_ID -- Initialization data for DATA21_I. */
|
||||
/* DATA32_ID -- Initialization data for DATA32_I. */
|
||||
/* DATA32_C -- Constant __data32 data. */
|
||||
/* */
|
||||
/* CHECKSUM -- Checksum segment. */
|
||||
/* */
|
||||
/* Data segments */
|
||||
/* DATA21_I -- Initialized __data21 data with non-zero */
|
||||
/* initial value. */
|
||||
/* DATA32_I -- Initialized __data32 data with non-zero */
|
||||
/* initial value. */
|
||||
/* DATA21_Z -- Initialized __data21 data with zero initial value. */
|
||||
/* DATA32_Z -- Initialized __data32 data with zero initial value. */
|
||||
/* DATA21_N -- Non-initialized __data21. */
|
||||
/* DATA32_N -- Non-initialized __data32. */
|
||||
/* SSTACK -- The system stack. */
|
||||
/* CSTACK -- The application stack. */
|
||||
/* HEAP -- The heap used by malloc and free. */
|
||||
/* */
|
||||
/************************************************************************/
|
||||
|
||||
/************************************************************************/
|
||||
/* Define CPU */
|
||||
/************************************************************************/
|
||||
|
||||
-cavr32
|
||||
|
||||
// Declare the IPR0 memory location
|
||||
-DIPR0=FFFF0800
|
||||
|
||||
/************************************************************************/
|
||||
/* Reset code is located at address 0x80000000 and up. */
|
||||
/************************************************************************/
|
||||
|
||||
-Z(CODE)RESET=80000000-8001FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* The exception handler code is located at address 0x80000000 */
|
||||
/* and up. Make sure that the exception table gets properly */
|
||||
/* allocated. By using the special -Z@ allocation primitive, the */
|
||||
/* placement is guaranteed to be at _EVBASE and onwards. */
|
||||
/************************************************************************/
|
||||
|
||||
-Z@(CODE)EVTAB=80004000-8001FFFF
|
||||
-Z@(CODE)EV100=80004100-8001FFFF
|
||||
-P(CODE)EVSEG=80004000-8001FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* Allocate code and const segments. */
|
||||
/************************************************************************/
|
||||
|
||||
-P(CODE)CODE32=80000000-8001FFFF
|
||||
-P(CONST)DATA32_C=80000000-8001FFFF
|
||||
-P(CONST)USERDATA32_C=80800000-808001FF
|
||||
|
||||
// Initializers
|
||||
-Z(CONST)INITTAB,DIFUNCT=80000000-8001FFFF
|
||||
-Z(CONST)CHECKSUM,SWITCH=80000000-8001FFFF
|
||||
-Z(CONST)DATA21_ID,DATA32_ID=80000000-8001FFFF
|
||||
-Z(CONST)RAMCODE21_ID,RAMCODE32_ID=80000000-8001FFFF
|
||||
|
||||
-Z(CONST)ACTAB,HTAB=80000000-8001FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* Allocate the read/write segments that are mapped to RAM. */
|
||||
/************************************************************************/
|
||||
|
||||
-Z(CODE)RAMCODE21=00000004-00007FFF
|
||||
-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
|
||||
-Z(CODE)RAMCODE32=00000004-00007FFF
|
||||
-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
|
||||
-Z(DATA)TRACEBUFFER=00000004-00007FFF
|
||||
|
||||
-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
|
||||
-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
|
||||
-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
|
||||
|
||||
/************************************************************************/
|
||||
/* Copy the RAMCODE bytes to the initializer segments. */
|
||||
/************************************************************************/
|
||||
|
||||
-QRAMCODE21=RAMCODE21_ID
|
||||
-QRAMCODE32=RAMCODE32_ID
|
||||
|
||||
/************************************************************************/
|
||||
/* End of File */
|
||||
/************************************************************************/
|
||||
@ -1,266 +0,0 @@
|
||||
/******************************************************************************
|
||||
* AVR32 AT32UC3A0256 GNU LD script file.
|
||||
*
|
||||
* - Compiler: GNU GCC for AVR32
|
||||
* - Supported devices: AVR32 AT32UC3A0256
|
||||
*
|
||||
* - author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
|
||||
|
||||
OUTPUT_ARCH(avr32:uc)
|
||||
|
||||
ENTRY(_start)
|
||||
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00040000
|
||||
INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x0000FFFC
|
||||
USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
|
||||
}
|
||||
|
||||
PHDRS
|
||||
{
|
||||
FLASH PT_LOAD;
|
||||
INTRAM_ALIGN PT_NULL;
|
||||
INTRAM_AT_FLASH PT_LOAD;
|
||||
INTRAM PT_NULL;
|
||||
USERPAGE PT_LOAD;
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* If this heap size is selected, all the INTRAM space from the end of the
|
||||
data area to the beginning of the stack will be allocated for the heap. */
|
||||
__max_heap_size__ = -1;
|
||||
|
||||
/* Use a default heap size if heap size was not defined. */
|
||||
__heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
|
||||
|
||||
/* Use a default stack size if stack size was not defined. */
|
||||
__stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
|
||||
|
||||
/* Read-only sections, merged into text segment: */
|
||||
PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
|
||||
.interp : { *(.interp) } >FLASH AT>FLASH :FLASH
|
||||
.reset : { *(.reset) } >FLASH AT>FLASH :FLASH
|
||||
.hash : { *(.hash) } >FLASH AT>FLASH :FLASH
|
||||
.dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
|
||||
.dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
|
||||
.gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
|
||||
.gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
|
||||
.gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
|
||||
.rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
|
||||
.rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
|
||||
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|
||||
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|
||||
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|
||||
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|
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|
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||||
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|
||||
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|
||||
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|
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|
||||
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|
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||||
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|
||||
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||||
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|
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|
||||
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|
||||
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||||
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|
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|
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|
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|
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Symbols in the DWARF debugging sections are relative to the beginning
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@ -1,153 +0,0 @@
|
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/******************************************************************************
|
||||
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|
||||
*
|
||||
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|
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|
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|
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|
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|
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|
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|
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|
||||
*
|
||||
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|
||||
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|
||||
*
|
||||
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|
||||
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|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
/************************************************************************/
|
||||
/* The following segments are defined in this link file: */
|
||||
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|
||||
/* Code segments */
|
||||
/* CODE32 -- Program code used by __code32 functions. */
|
||||
/* RESET -- Reset code. */
|
||||
/* EVSEG -- Exception vector handlers. */
|
||||
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|
||||
/* Constant segments */
|
||||
/* INITTAB -- Segment initializer table. */
|
||||
/* DIFUNCT -- Dynamic initialization vector used by C++. */
|
||||
/* SWITCH -- Switch tables. */
|
||||
/* ACTAB -- Table of pointers to acall functions. */
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
/* CHECKSUM -- Checksum segment. */
|
||||
/* */
|
||||
/* Data segments */
|
||||
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|
||||
/* initial value. */
|
||||
/* DATA32_I -- Initialized __data32 data with non-zero */
|
||||
/* initial value. */
|
||||
/* DATA21_Z -- Initialized __data21 data with zero initial value. */
|
||||
/* DATA32_Z -- Initialized __data32 data with zero initial value. */
|
||||
/* DATA21_N -- Non-initialized __data21. */
|
||||
/* DATA32_N -- Non-initialized __data32. */
|
||||
/* SSTACK -- The system stack. */
|
||||
/* CSTACK -- The application stack. */
|
||||
/* HEAP -- The heap used by malloc and free. */
|
||||
/* */
|
||||
/************************************************************************/
|
||||
|
||||
/************************************************************************/
|
||||
/* Define CPU */
|
||||
/************************************************************************/
|
||||
|
||||
-cavr32
|
||||
|
||||
// Declare the IPR0 memory location
|
||||
-DIPR0=FFFF0800
|
||||
|
||||
/************************************************************************/
|
||||
/* Reset code is located at address 0x80000000 and up. */
|
||||
/************************************************************************/
|
||||
|
||||
-Z(CODE)RESET=80000000-8003FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* The exception handler code is located at address 0x80000000 */
|
||||
/* and up. Make sure that the exception table gets properly */
|
||||
/* allocated. By using the special -Z@ allocation primitive, the */
|
||||
/* placement is guaranteed to be at _EVBASE and onwards. */
|
||||
/************************************************************************/
|
||||
|
||||
-Z@(CODE)EVTAB=80004000-8003FFFF
|
||||
-Z@(CODE)EV100=80004100-8003FFFF
|
||||
-P(CODE)EVSEG=80004000-8003FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* Allocate code and const segments. */
|
||||
/************************************************************************/
|
||||
|
||||
-P(CODE)CODE32=80000000-8003FFFF
|
||||
-P(CONST)DATA32_C=80000000-8003FFFF
|
||||
-P(CONST)USERDATA32_C=80800000-808001FF
|
||||
|
||||
// Initializers
|
||||
-Z(CONST)INITTAB,DIFUNCT=80000000-8003FFFF
|
||||
-Z(CONST)CHECKSUM,SWITCH=80000000-8003FFFF
|
||||
-Z(CONST)DATA21_ID,DATA32_ID=80000000-8003FFFF
|
||||
-Z(CONST)RAMCODE21_ID,RAMCODE32_ID=80000000-8003FFFF
|
||||
|
||||
-Z(CONST)ACTAB,HTAB=80000000-8003FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* Allocate the read/write segments that are mapped to RAM. */
|
||||
/************************************************************************/
|
||||
|
||||
-Z(CODE)RAMCODE21=00000004-0000FFFF
|
||||
-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-0000FFFF
|
||||
-Z(CODE)RAMCODE32=00000004-0000FFFF
|
||||
-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-0000FFFF
|
||||
-Z(DATA)TRACEBUFFER=00000004-0000FFFF
|
||||
|
||||
-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-0000FFFF
|
||||
-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-0000FFFF
|
||||
-Z(DATA)HEAP+_HEAP_SIZE=00000004-0000FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* Copy the RAMCODE bytes to the initializer segments. */
|
||||
/************************************************************************/
|
||||
|
||||
-QRAMCODE21=RAMCODE21_ID
|
||||
-QRAMCODE32=RAMCODE32_ID
|
||||
|
||||
/************************************************************************/
|
||||
/* End of File */
|
||||
/************************************************************************/
|
||||
@ -1,266 +0,0 @@
|
||||
/******************************************************************************
|
||||
* AVR32 AT32UC3A0512 GNU LD script file.
|
||||
*
|
||||
* - Compiler: GNU GCC for AVR32
|
||||
* - Supported devices: AVR32 AT32UC3A0512
|
||||
*
|
||||
* - author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
|
||||
|
||||
OUTPUT_ARCH(avr32:uc)
|
||||
|
||||
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|
||||
|
||||
MEMORY
|
||||
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|
||||
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|
||||
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|
||||
USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
|
||||
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|
||||
|
||||
PHDRS
|
||||
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|
||||
FLASH PT_LOAD;
|
||||
INTRAM_ALIGN PT_NULL;
|
||||
INTRAM_AT_FLASH PT_LOAD;
|
||||
INTRAM PT_NULL;
|
||||
USERPAGE PT_LOAD;
|
||||
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|
||||
|
||||
SECTIONS
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
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|
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|
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|
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|
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|
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|
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|
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|
||||
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|
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|
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|
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|
||||
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||||
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||||
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|
||||
could instead move the label definition inside the section, but
|
||||
the linker would then create the section even if it turns out to
|
||||
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|
||||
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|
||||
.preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
PROVIDE (__preinit_array_end = .);
|
||||
PROVIDE (__init_array_start = .);
|
||||
.init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
PROVIDE (__init_array_end = .);
|
||||
PROVIDE (__fini_array_start = .);
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
KEEP (*crtbegin*.o(.ctors))
|
||||
/* We don't want to include the .ctor section from
|
||||
from the crtend.o file until after the sorted ctors.
|
||||
The .ctor section from the crtend file contains the
|
||||
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|
||||
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
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|
||||
.dtors :
|
||||
{
|
||||
KEEP (*crtbegin*.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
PROVIDE (edata = .);
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
PROVIDE (end = .);
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
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|
||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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||||
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|
||||
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|
||||
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|
||||
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||||
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|
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|
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|
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|
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|
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|
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|
||||
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|
||||
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|
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@ -1,153 +0,0 @@
|
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
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|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
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|
||||
*
|
||||
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|
||||
|
||||
/************************************************************************/
|
||||
/* The following segments are defined in this link file: */
|
||||
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|
||||
/* Code segments */
|
||||
/* CODE32 -- Program code used by __code32 functions. */
|
||||
/* RESET -- Reset code. */
|
||||
/* EVSEG -- Exception vector handlers. */
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
/* ACTAB -- Table of pointers to acall functions. */
|
||||
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|
||||
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|
||||
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|
||||
/* DATA32_C -- Constant __data32 data. */
|
||||
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|
||||
/* CHECKSUM -- Checksum segment. */
|
||||
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|
||||
/* Data segments */
|
||||
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|
||||
/* initial value. */
|
||||
/* DATA32_I -- Initialized __data32 data with non-zero */
|
||||
/* initial value. */
|
||||
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|
||||
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|
||||
/* DATA21_N -- Non-initialized __data21. */
|
||||
/* DATA32_N -- Non-initialized __data32. */
|
||||
/* SSTACK -- The system stack. */
|
||||
/* CSTACK -- The application stack. */
|
||||
/* HEAP -- The heap used by malloc and free. */
|
||||
/* */
|
||||
/************************************************************************/
|
||||
|
||||
/************************************************************************/
|
||||
/* Define CPU */
|
||||
/************************************************************************/
|
||||
|
||||
-cavr32
|
||||
|
||||
// Declare the IPR0 memory location
|
||||
-DIPR0=FFFF0800
|
||||
|
||||
/************************************************************************/
|
||||
/* Reset code is located at address 0x80000000 and up. */
|
||||
/************************************************************************/
|
||||
|
||||
-Z(CODE)RESET=80000000-8007FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* The exception handler code is located at address 0x80000000 */
|
||||
/* and up. Make sure that the exception table gets properly */
|
||||
/* allocated. By using the special -Z@ allocation primitive, the */
|
||||
/* placement is guaranteed to be at _EVBASE and onwards. */
|
||||
/************************************************************************/
|
||||
|
||||
-Z@(CODE)EVTAB=80004000-8007FFFF
|
||||
-Z@(CODE)EV100=80004100-8007FFFF
|
||||
-P(CODE)EVSEG=80004000-8007FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* Allocate code and const segments. */
|
||||
/************************************************************************/
|
||||
|
||||
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|
||||
-P(CONST)DATA32_C=80000000-8007FFFF
|
||||
-P(CONST)USERDATA32_C=80800000-808001FF
|
||||
|
||||
// Initializers
|
||||
-Z(CONST)INITTAB,DIFUNCT=80000000-8007FFFF
|
||||
-Z(CONST)CHECKSUM,SWITCH=80000000-8007FFFF
|
||||
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|
||||
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|
||||
|
||||
-Z(CONST)ACTAB,HTAB=80000000-8007FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* Allocate the read/write segments that are mapped to RAM. */
|
||||
/************************************************************************/
|
||||
|
||||
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|
||||
-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-0000FFFF
|
||||
-Z(CODE)RAMCODE32=00000004-0000FFFF
|
||||
-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-0000FFFF
|
||||
-Z(DATA)TRACEBUFFER=00000004-0000FFFF
|
||||
|
||||
-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-0000FFFF
|
||||
-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-0000FFFF
|
||||
-Z(DATA)HEAP+_HEAP_SIZE=00000004-0000FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* Copy the RAMCODE bytes to the initializer segments. */
|
||||
/************************************************************************/
|
||||
|
||||
-QRAMCODE21=RAMCODE21_ID
|
||||
-QRAMCODE32=RAMCODE32_ID
|
||||
|
||||
/************************************************************************/
|
||||
/* End of File */
|
||||
/************************************************************************/
|
||||
@ -1,266 +0,0 @@
|
||||
/******************************************************************************
|
||||
* AVR32 AT32UC3A1128 GNU LD script file.
|
||||
*
|
||||
* - Compiler: GNU GCC for AVR32
|
||||
* - Supported devices: AVR32 AT32UC3A1128
|
||||
*
|
||||
* - author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
|
||||
|
||||
OUTPUT_ARCH(avr32:uc)
|
||||
|
||||
ENTRY(_start)
|
||||
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00020000
|
||||
INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x00007FFC
|
||||
USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
|
||||
}
|
||||
|
||||
PHDRS
|
||||
{
|
||||
FLASH PT_LOAD;
|
||||
INTRAM_ALIGN PT_NULL;
|
||||
INTRAM_AT_FLASH PT_LOAD;
|
||||
INTRAM PT_NULL;
|
||||
USERPAGE PT_LOAD;
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* If this heap size is selected, all the INTRAM space from the end of the
|
||||
data area to the beginning of the stack will be allocated for the heap. */
|
||||
__max_heap_size__ = -1;
|
||||
|
||||
/* Use a default heap size if heap size was not defined. */
|
||||
__heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
|
||||
|
||||
/* Use a default stack size if stack size was not defined. */
|
||||
__stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
|
||||
|
||||
/* Read-only sections, merged into text segment: */
|
||||
PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
|
||||
.interp : { *(.interp) } >FLASH AT>FLASH :FLASH
|
||||
.reset : { *(.reset) } >FLASH AT>FLASH :FLASH
|
||||
.hash : { *(.hash) } >FLASH AT>FLASH :FLASH
|
||||
.dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
|
||||
.dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
|
||||
.gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
|
||||
.gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
|
||||
.gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
|
||||
.rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
|
||||
.rela.init : { *(.rela.init) } >FLASH AT>FLASH :FLASH
|
||||
.rel.text : { *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
|
||||
.rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
|
||||
.rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
|
||||
.rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
|
||||
.rel.rodata : { *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
|
||||
.rela.rodata : { *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
|
||||
.rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
|
||||
.rela.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
|
||||
.rel.data : { *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
|
||||
.rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
|
||||
.rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
|
||||
.rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
|
||||
.rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
|
||||
.rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
|
||||
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|
||||
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|
||||
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|
||||
.rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
|
||||
.rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
|
||||
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|
||||
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|
||||
.rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
|
||||
.rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
|
||||
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|
||||
.init :
|
||||
{
|
||||
KEEP (*(.init))
|
||||
} >FLASH AT>FLASH :FLASH =0xd703d703
|
||||
.plt : { *(.plt) } >FLASH AT>FLASH :FLASH
|
||||
.text :
|
||||
{
|
||||
*(.text .stub .text.* .gnu.linkonce.t.*)
|
||||
KEEP (*(.text.*personality*))
|
||||
/* .gnu.warning sections are handled specially by elf32.em. */
|
||||
*(.gnu.warning)
|
||||
} >FLASH AT>FLASH :FLASH =0xd703d703
|
||||
.fini :
|
||||
{
|
||||
KEEP (*(.fini))
|
||||
} >FLASH AT>FLASH :FLASH =0xd703d703
|
||||
PROVIDE (__etext = .);
|
||||
PROVIDE (_etext = .);
|
||||
PROVIDE (etext = .);
|
||||
.rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
|
||||
.rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
|
||||
.eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
|
||||
.gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
|
||||
.lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
|
||||
. = ORIGIN(INTRAM);
|
||||
.dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM_ALIGN
|
||||
/* Exception handling */
|
||||
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
/* Thread Local Storage sections */
|
||||
.tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
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|
||||
/* Ensure the __preinit_array_start label is properly aligned. We
|
||||
could instead move the label definition inside the section, but
|
||||
the linker would then create the section even if it turns out to
|
||||
be empty, which isn't pretty. */
|
||||
PROVIDE (__preinit_array_start = ALIGN(32 / 8));
|
||||
.preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
PROVIDE (__preinit_array_end = .);
|
||||
PROVIDE (__init_array_start = .);
|
||||
.init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
PROVIDE (__init_array_end = .);
|
||||
PROVIDE (__fini_array_start = .);
|
||||
.fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
PROVIDE (__fini_array_end = .);
|
||||
.ctors :
|
||||
{
|
||||
/* gcc uses crtbegin.o to find the start of
|
||||
the constructors, so we make sure it is
|
||||
first. Because this is a wildcard, it
|
||||
doesn't matter if the user does not
|
||||
actually link against crtbegin.o; the
|
||||
linker won't look for a file to match a
|
||||
wildcard. The wildcard also means that it
|
||||
doesn't matter which directory crtbegin.o
|
||||
is in. */
|
||||
KEEP (*crtbegin*.o(.ctors))
|
||||
/* We don't want to include the .ctor section from
|
||||
from the crtend.o file until after the sorted ctors.
|
||||
The .ctor section from the crtend file contains the
|
||||
end of ctors marker and it must be last */
|
||||
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
} >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.dtors :
|
||||
{
|
||||
KEEP (*crtbegin*.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
} >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.dynamic : { *(.dynamic) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.ramtext : { *(.ramtext .ramtext.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.ddalign : { . = ALIGN(8); } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.data :
|
||||
{
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
SORT(CONSTRUCTORS)
|
||||
} >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.data1 : { *(.data1) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.balign : { . = ALIGN(8); PROVIDE(_edata = .); } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
PROVIDE (edata = .);
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
*(.dynbss)
|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
/* Align here to ensure that the .bss section occupies space up to
|
||||
_end. Align after .bss to ensure correct alignment even if the
|
||||
.bss section disappears because there are no input sections. */
|
||||
. = ALIGN(8);
|
||||
} >INTRAM AT>INTRAM :INTRAM
|
||||
. = ALIGN(8);
|
||||
_end = .;
|
||||
PROVIDE (end = .);
|
||||
__heap_start__ = ALIGN(8);
|
||||
.heap :
|
||||
{
|
||||
*(.heap)
|
||||
. = (__heap_size__ == __max_heap_size__) ?
|
||||
ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
|
||||
__heap_size__;
|
||||
} >INTRAM AT>INTRAM :INTRAM
|
||||
__heap_end__ = .;
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
.stab.excl 0 : { *(.stab.excl) }
|
||||
.stab.exclstr 0 : { *(.stab.exclstr) }
|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
.stab.indexstr 0 : { *(.stab.indexstr) }
|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
|
||||
{
|
||||
_stack = .;
|
||||
*(.stack)
|
||||
. = __stack_size__;
|
||||
_estack = .;
|
||||
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|
||||
.userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
@ -1,153 +0,0 @@
|
||||
/******************************************************************************
|
||||
* AVR32 AT32UC3A1128 XLINK command file for AVR32 IAR C/C++ Compiler.
|
||||
*
|
||||
* The assumed memory layout is the one of the AT32UC3A1128:
|
||||
*
|
||||
* Start Stop Name Type
|
||||
* ---------- ---------- ----- --------------
|
||||
* 0x00000000 0x00007FFF SRAM RAM
|
||||
* 0x80000000 0x8001FFFF FLASH FLASH
|
||||
* 0x80800000 0x808001FF USER FLASH
|
||||
*
|
||||
* Usage: xlink your_file(s) -f xcl-file libraries
|
||||
*
|
||||
* - Compiler: IAR EWAVR32
|
||||
* - Supported devices: AVR32 AT32UC3A1128
|
||||
*
|
||||
* - author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
/************************************************************************/
|
||||
/* The following segments are defined in this link file: */
|
||||
/* */
|
||||
/* Code segments */
|
||||
/* CODE32 -- Program code used by __code32 functions. */
|
||||
/* RESET -- Reset code. */
|
||||
/* EVSEG -- Exception vector handlers. */
|
||||
/* */
|
||||
/* Constant segments */
|
||||
/* INITTAB -- Segment initializer table. */
|
||||
/* DIFUNCT -- Dynamic initialization vector used by C++. */
|
||||
/* SWITCH -- Switch tables. */
|
||||
/* ACTAB -- Table of pointers to acall functions. */
|
||||
/* */
|
||||
/* DATA21_ID -- Initialization data for DATA21_I. */
|
||||
/* DATA32_ID -- Initialization data for DATA32_I. */
|
||||
/* DATA32_C -- Constant __data32 data. */
|
||||
/* */
|
||||
/* CHECKSUM -- Checksum segment. */
|
||||
/* */
|
||||
/* Data segments */
|
||||
/* DATA21_I -- Initialized __data21 data with non-zero */
|
||||
/* initial value. */
|
||||
/* DATA32_I -- Initialized __data32 data with non-zero */
|
||||
/* initial value. */
|
||||
/* DATA21_Z -- Initialized __data21 data with zero initial value. */
|
||||
/* DATA32_Z -- Initialized __data32 data with zero initial value. */
|
||||
/* DATA21_N -- Non-initialized __data21. */
|
||||
/* DATA32_N -- Non-initialized __data32. */
|
||||
/* SSTACK -- The system stack. */
|
||||
/* CSTACK -- The application stack. */
|
||||
/* HEAP -- The heap used by malloc and free. */
|
||||
/* */
|
||||
/************************************************************************/
|
||||
|
||||
/************************************************************************/
|
||||
/* Define CPU */
|
||||
/************************************************************************/
|
||||
|
||||
-cavr32
|
||||
|
||||
// Declare the IPR0 memory location
|
||||
-DIPR0=FFFF0800
|
||||
|
||||
/************************************************************************/
|
||||
/* Reset code is located at address 0x80000000 and up. */
|
||||
/************************************************************************/
|
||||
|
||||
-Z(CODE)RESET=80000000-8001FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* The exception handler code is located at address 0x80000000 */
|
||||
/* and up. Make sure that the exception table gets properly */
|
||||
/* allocated. By using the special -Z@ allocation primitive, the */
|
||||
/* placement is guaranteed to be at _EVBASE and onwards. */
|
||||
/************************************************************************/
|
||||
|
||||
-Z@(CODE)EVTAB=80004000-8001FFFF
|
||||
-Z@(CODE)EV100=80004100-8001FFFF
|
||||
-P(CODE)EVSEG=80004000-8001FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* Allocate code and const segments. */
|
||||
/************************************************************************/
|
||||
|
||||
-P(CODE)CODE32=80000000-8001FFFF
|
||||
-P(CONST)DATA32_C=80000000-8001FFFF
|
||||
-P(CONST)USERDATA32_C=80800000-808001FF
|
||||
|
||||
// Initializers
|
||||
-Z(CONST)INITTAB,DIFUNCT=80000000-8001FFFF
|
||||
-Z(CONST)CHECKSUM,SWITCH=80000000-8001FFFF
|
||||
-Z(CONST)DATA21_ID,DATA32_ID=80000000-8001FFFF
|
||||
-Z(CONST)RAMCODE21_ID,RAMCODE32_ID=80000000-8001FFFF
|
||||
|
||||
-Z(CONST)ACTAB,HTAB=80000000-8001FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* Allocate the read/write segments that are mapped to RAM. */
|
||||
/************************************************************************/
|
||||
|
||||
-Z(CODE)RAMCODE21=00000004-00007FFF
|
||||
-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-00007FFF
|
||||
-Z(CODE)RAMCODE32=00000004-00007FFF
|
||||
-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-00007FFF
|
||||
-Z(DATA)TRACEBUFFER=00000004-00007FFF
|
||||
|
||||
-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-00007FFF
|
||||
-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-00007FFF
|
||||
-Z(DATA)HEAP+_HEAP_SIZE=00000004-00007FFF
|
||||
|
||||
/************************************************************************/
|
||||
/* Copy the RAMCODE bytes to the initializer segments. */
|
||||
/************************************************************************/
|
||||
|
||||
-QRAMCODE21=RAMCODE21_ID
|
||||
-QRAMCODE32=RAMCODE32_ID
|
||||
|
||||
/************************************************************************/
|
||||
/* End of File */
|
||||
/************************************************************************/
|
||||
@ -1,266 +0,0 @@
|
||||
/******************************************************************************
|
||||
* AVR32 AT32UC3A1256 GNU LD script file.
|
||||
*
|
||||
* - Compiler: GNU GCC for AVR32
|
||||
* - Supported devices: AVR32 AT32UC3A1256
|
||||
*
|
||||
* - author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
|
||||
|
||||
OUTPUT_ARCH(avr32:uc)
|
||||
|
||||
ENTRY(_start)
|
||||
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00040000
|
||||
INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x0000FFFC
|
||||
USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
|
||||
}
|
||||
|
||||
PHDRS
|
||||
{
|
||||
FLASH PT_LOAD;
|
||||
INTRAM_ALIGN PT_NULL;
|
||||
INTRAM_AT_FLASH PT_LOAD;
|
||||
INTRAM PT_NULL;
|
||||
USERPAGE PT_LOAD;
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
/* If this heap size is selected, all the INTRAM space from the end of the
|
||||
data area to the beginning of the stack will be allocated for the heap. */
|
||||
__max_heap_size__ = -1;
|
||||
|
||||
/* Use a default heap size if heap size was not defined. */
|
||||
__heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
|
||||
|
||||
/* Use a default stack size if stack size was not defined. */
|
||||
__stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
|
||||
|
||||
/* Read-only sections, merged into text segment: */
|
||||
PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
|
||||
.interp : { *(.interp) } >FLASH AT>FLASH :FLASH
|
||||
.reset : { *(.reset) } >FLASH AT>FLASH :FLASH
|
||||
.hash : { *(.hash) } >FLASH AT>FLASH :FLASH
|
||||
.dynsym : { *(.dynsym) } >FLASH AT>FLASH :FLASH
|
||||
.dynstr : { *(.dynstr) } >FLASH AT>FLASH :FLASH
|
||||
.gnu.version : { *(.gnu.version) } >FLASH AT>FLASH :FLASH
|
||||
.gnu.version_d : { *(.gnu.version_d) } >FLASH AT>FLASH :FLASH
|
||||
.gnu.version_r : { *(.gnu.version_r) } >FLASH AT>FLASH :FLASH
|
||||
.rel.init : { *(.rel.init) } >FLASH AT>FLASH :FLASH
|
||||
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|
||||
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|
||||
.rela.text : { *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) } >FLASH AT>FLASH :FLASH
|
||||
.rel.fini : { *(.rel.fini) } >FLASH AT>FLASH :FLASH
|
||||
.rela.fini : { *(.rela.fini) } >FLASH AT>FLASH :FLASH
|
||||
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|
||||
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|
||||
.rel.data.rel.ro : { *(.rel.data.rel.ro*) } >FLASH AT>FLASH :FLASH
|
||||
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|
||||
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|
||||
.rela.data : { *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) } >FLASH AT>FLASH :FLASH
|
||||
.rel.tdata : { *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
|
||||
.rela.tdata : { *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) } >FLASH AT>FLASH :FLASH
|
||||
.rel.tbss : { *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
|
||||
.rela.tbss : { *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) } >FLASH AT>FLASH :FLASH
|
||||
.rel.ctors : { *(.rel.ctors) } >FLASH AT>FLASH :FLASH
|
||||
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|
||||
.rel.dtors : { *(.rel.dtors) } >FLASH AT>FLASH :FLASH
|
||||
.rela.dtors : { *(.rela.dtors) } >FLASH AT>FLASH :FLASH
|
||||
.rel.got : { *(.rel.got) } >FLASH AT>FLASH :FLASH
|
||||
.rela.got : { *(.rela.got) } >FLASH AT>FLASH :FLASH
|
||||
.rel.bss : { *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
|
||||
.rela.bss : { *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) } >FLASH AT>FLASH :FLASH
|
||||
.rel.plt : { *(.rel.plt) } >FLASH AT>FLASH :FLASH
|
||||
.rela.plt : { *(.rela.plt) } >FLASH AT>FLASH :FLASH
|
||||
.init :
|
||||
{
|
||||
KEEP (*(.init))
|
||||
} >FLASH AT>FLASH :FLASH =0xd703d703
|
||||
.plt : { *(.plt) } >FLASH AT>FLASH :FLASH
|
||||
.text :
|
||||
{
|
||||
*(.text .stub .text.* .gnu.linkonce.t.*)
|
||||
KEEP (*(.text.*personality*))
|
||||
/* .gnu.warning sections are handled specially by elf32.em. */
|
||||
*(.gnu.warning)
|
||||
} >FLASH AT>FLASH :FLASH =0xd703d703
|
||||
.fini :
|
||||
{
|
||||
KEEP (*(.fini))
|
||||
} >FLASH AT>FLASH :FLASH =0xd703d703
|
||||
PROVIDE (__etext = .);
|
||||
PROVIDE (_etext = .);
|
||||
PROVIDE (etext = .);
|
||||
.rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } >FLASH AT>FLASH :FLASH
|
||||
.rodata1 : { *(.rodata1) } >FLASH AT>FLASH :FLASH
|
||||
.eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
|
||||
.gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
|
||||
.lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
|
||||
. = ORIGIN(INTRAM);
|
||||
.dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM_ALIGN
|
||||
/* Exception handling */
|
||||
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
/* Thread Local Storage sections */
|
||||
.tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
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|
||||
/* Ensure the __preinit_array_start label is properly aligned. We
|
||||
could instead move the label definition inside the section, but
|
||||
the linker would then create the section even if it turns out to
|
||||
be empty, which isn't pretty. */
|
||||
PROVIDE (__preinit_array_start = ALIGN(32 / 8));
|
||||
.preinit_array : { KEEP (*(.preinit_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
PROVIDE (__preinit_array_end = .);
|
||||
PROVIDE (__init_array_start = .);
|
||||
.init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
PROVIDE (__init_array_end = .);
|
||||
PROVIDE (__fini_array_start = .);
|
||||
.fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
PROVIDE (__fini_array_end = .);
|
||||
.ctors :
|
||||
{
|
||||
/* gcc uses crtbegin.o to find the start of
|
||||
the constructors, so we make sure it is
|
||||
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|
||||
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|
||||
actually link against crtbegin.o; the
|
||||
linker won't look for a file to match a
|
||||
wildcard. The wildcard also means that it
|
||||
doesn't matter which directory crtbegin.o
|
||||
is in. */
|
||||
KEEP (*crtbegin*.o(.ctors))
|
||||
/* We don't want to include the .ctor section from
|
||||
from the crtend.o file until after the sorted ctors.
|
||||
The .ctor section from the crtend file contains the
|
||||
end of ctors marker and it must be last */
|
||||
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
} >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.dtors :
|
||||
{
|
||||
KEEP (*crtbegin*.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
} >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.dynamic : { *(.dynamic) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.ramtext : { *(.ramtext .ramtext.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.ddalign : { . = ALIGN(8); } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.data :
|
||||
{
|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
SORT(CONSTRUCTORS)
|
||||
} >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.data1 : { *(.data1) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.balign : { . = ALIGN(8); PROVIDE(_edata = .); } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
PROVIDE (edata = .);
|
||||
__bss_start = .;
|
||||
.bss :
|
||||
{
|
||||
*(.dynbss)
|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
/* Align here to ensure that the .bss section occupies space up to
|
||||
_end. Align after .bss to ensure correct alignment even if the
|
||||
.bss section disappears because there are no input sections. */
|
||||
. = ALIGN(8);
|
||||
} >INTRAM AT>INTRAM :INTRAM
|
||||
. = ALIGN(8);
|
||||
_end = .;
|
||||
PROVIDE (end = .);
|
||||
__heap_start__ = ALIGN(8);
|
||||
.heap :
|
||||
{
|
||||
*(.heap)
|
||||
. = (__heap_size__ == __max_heap_size__) ?
|
||||
ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
|
||||
__heap_size__;
|
||||
} >INTRAM AT>INTRAM :INTRAM
|
||||
__heap_end__ = .;
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
.stabstr 0 : { *(.stabstr) }
|
||||
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|
||||
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|
||||
.stab.index 0 : { *(.stab.index) }
|
||||
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|
||||
.comment 0 : { *(.comment) }
|
||||
/* DWARF debug sections.
|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
of the section so we begin them at 0. */
|
||||
/* DWARF 1 */
|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
.debug_sfnames 0 : { *(.debug_sfnames) }
|
||||
/* DWARF 1.1 and DWARF 2 */
|
||||
.debug_aranges 0 : { *(.debug_aranges) }
|
||||
.debug_pubnames 0 : { *(.debug_pubnames) }
|
||||
/* DWARF 2 */
|
||||
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
|
||||
.debug_abbrev 0 : { *(.debug_abbrev) }
|
||||
.debug_line 0 : { *(.debug_line) }
|
||||
.debug_frame 0 : { *(.debug_frame) }
|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
/* SGI/MIPS DWARF 2 extensions */
|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
|
||||
{
|
||||
_stack = .;
|
||||
*(.stack)
|
||||
. = __stack_size__;
|
||||
_estack = .;
|
||||
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|
||||
.userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
@ -1,153 +0,0 @@
|
||||
/******************************************************************************
|
||||
* AVR32 AT32UC3A1256 XLINK command file for AVR32 IAR C/C++ Compiler.
|
||||
*
|
||||
* The assumed memory layout is the one of the AT32UC3A1256:
|
||||
*
|
||||
* Start Stop Name Type
|
||||
* ---------- ---------- ----- --------------
|
||||
* 0x00000000 0x0000FFFF SRAM RAM
|
||||
* 0x80000000 0x8003FFFF FLASH FLASH
|
||||
* 0x80800000 0x808001FF USER FLASH
|
||||
*
|
||||
* Usage: xlink your_file(s) -f xcl-file libraries
|
||||
*
|
||||
* - Compiler: IAR EWAVR32
|
||||
* - Supported devices: AVR32 AT32UC3A1256
|
||||
*
|
||||
* - author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
/************************************************************************/
|
||||
/* The following segments are defined in this link file: */
|
||||
/* */
|
||||
/* Code segments */
|
||||
/* CODE32 -- Program code used by __code32 functions. */
|
||||
/* RESET -- Reset code. */
|
||||
/* EVSEG -- Exception vector handlers. */
|
||||
/* */
|
||||
/* Constant segments */
|
||||
/* INITTAB -- Segment initializer table. */
|
||||
/* DIFUNCT -- Dynamic initialization vector used by C++. */
|
||||
/* SWITCH -- Switch tables. */
|
||||
/* ACTAB -- Table of pointers to acall functions. */
|
||||
/* */
|
||||
/* DATA21_ID -- Initialization data for DATA21_I. */
|
||||
/* DATA32_ID -- Initialization data for DATA32_I. */
|
||||
/* DATA32_C -- Constant __data32 data. */
|
||||
/* */
|
||||
/* CHECKSUM -- Checksum segment. */
|
||||
/* */
|
||||
/* Data segments */
|
||||
/* DATA21_I -- Initialized __data21 data with non-zero */
|
||||
/* initial value. */
|
||||
/* DATA32_I -- Initialized __data32 data with non-zero */
|
||||
/* initial value. */
|
||||
/* DATA21_Z -- Initialized __data21 data with zero initial value. */
|
||||
/* DATA32_Z -- Initialized __data32 data with zero initial value. */
|
||||
/* DATA21_N -- Non-initialized __data21. */
|
||||
/* DATA32_N -- Non-initialized __data32. */
|
||||
/* SSTACK -- The system stack. */
|
||||
/* CSTACK -- The application stack. */
|
||||
/* HEAP -- The heap used by malloc and free. */
|
||||
/* */
|
||||
/************************************************************************/
|
||||
|
||||
/************************************************************************/
|
||||
/* Define CPU */
|
||||
/************************************************************************/
|
||||
|
||||
-cavr32
|
||||
|
||||
// Declare the IPR0 memory location
|
||||
-DIPR0=FFFF0800
|
||||
|
||||
/************************************************************************/
|
||||
/* Reset code is located at address 0x80000000 and up. */
|
||||
/************************************************************************/
|
||||
|
||||
-Z(CODE)RESET=80000000-8003FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* The exception handler code is located at address 0x80000000 */
|
||||
/* and up. Make sure that the exception table gets properly */
|
||||
/* allocated. By using the special -Z@ allocation primitive, the */
|
||||
/* placement is guaranteed to be at _EVBASE and onwards. */
|
||||
/************************************************************************/
|
||||
|
||||
-Z@(CODE)EVTAB=80004000-8003FFFF
|
||||
-Z@(CODE)EV100=80004100-8003FFFF
|
||||
-P(CODE)EVSEG=80004000-8003FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* Allocate code and const segments. */
|
||||
/************************************************************************/
|
||||
|
||||
-P(CODE)CODE32=80000000-8003FFFF
|
||||
-P(CONST)DATA32_C=80000000-8003FFFF
|
||||
-P(CONST)USERDATA32_C=80800000-808001FF
|
||||
|
||||
// Initializers
|
||||
-Z(CONST)INITTAB,DIFUNCT=80000000-8003FFFF
|
||||
-Z(CONST)CHECKSUM,SWITCH=80000000-8003FFFF
|
||||
-Z(CONST)DATA21_ID,DATA32_ID=80000000-8003FFFF
|
||||
-Z(CONST)RAMCODE21_ID,RAMCODE32_ID=80000000-8003FFFF
|
||||
|
||||
-Z(CONST)ACTAB,HTAB=80000000-8003FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* Allocate the read/write segments that are mapped to RAM. */
|
||||
/************************************************************************/
|
||||
|
||||
-Z(CODE)RAMCODE21=00000004-0000FFFF
|
||||
-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-0000FFFF
|
||||
-Z(CODE)RAMCODE32=00000004-0000FFFF
|
||||
-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-0000FFFF
|
||||
-Z(DATA)TRACEBUFFER=00000004-0000FFFF
|
||||
|
||||
-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-0000FFFF
|
||||
-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-0000FFFF
|
||||
-Z(DATA)HEAP+_HEAP_SIZE=00000004-0000FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* Copy the RAMCODE bytes to the initializer segments. */
|
||||
/************************************************************************/
|
||||
|
||||
-QRAMCODE21=RAMCODE21_ID
|
||||
-QRAMCODE32=RAMCODE32_ID
|
||||
|
||||
/************************************************************************/
|
||||
/* End of File */
|
||||
/************************************************************************/
|
||||
@ -1,266 +0,0 @@
|
||||
/******************************************************************************
|
||||
* AVR32 AT32UC3A1512 GNU LD script file.
|
||||
*
|
||||
* - Compiler: GNU GCC for AVR32
|
||||
* - Supported devices: AVR32 AT32UC3A1512
|
||||
*
|
||||
* - author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
|
||||
|
||||
OUTPUT_ARCH(avr32:uc)
|
||||
|
||||
ENTRY(_start)
|
||||
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rxai!w) : ORIGIN = 0x80000000, LENGTH = 0x00080000
|
||||
INTRAM (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 0x0000FFFC
|
||||
USERPAGE : ORIGIN = 0x80800000, LENGTH = 0x00000200
|
||||
}
|
||||
|
||||
PHDRS
|
||||
{
|
||||
FLASH PT_LOAD;
|
||||
INTRAM_ALIGN PT_NULL;
|
||||
INTRAM_AT_FLASH PT_LOAD;
|
||||
INTRAM PT_NULL;
|
||||
USERPAGE PT_LOAD;
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
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|
||||
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|
||||
__max_heap_size__ = -1;
|
||||
|
||||
/* Use a default heap size if heap size was not defined. */
|
||||
__heap_size__ = DEFINED(__heap_size__) ? __heap_size__ : __max_heap_size__;
|
||||
|
||||
/* Use a default stack size if stack size was not defined. */
|
||||
__stack_size__ = DEFINED(__stack_size__) ? __stack_size__ : 4K;
|
||||
|
||||
/* Read-only sections, merged into text segment: */
|
||||
PROVIDE (__executable_start = 0x80000000); . = 0x80000000;
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
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|
||||
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|
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|
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|
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|
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|
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|
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|
||||
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|
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|
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|
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|
||||
{
|
||||
KEEP (*(.init))
|
||||
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|
||||
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|
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.text :
|
||||
{
|
||||
*(.text .stub .text.* .gnu.linkonce.t.*)
|
||||
KEEP (*(.text.*personality*))
|
||||
/* .gnu.warning sections are handled specially by elf32.em. */
|
||||
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|
||||
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|
||||
.fini :
|
||||
{
|
||||
KEEP (*(.fini))
|
||||
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|
||||
PROVIDE (__etext = .);
|
||||
PROVIDE (_etext = .);
|
||||
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|
||||
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|
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|
||||
.eh_frame_hdr : { *(.eh_frame_hdr) } >FLASH AT>FLASH :FLASH
|
||||
.eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) } >FLASH AT>FLASH :FLASH
|
||||
.gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >FLASH AT>FLASH :FLASH
|
||||
.lalign : { . = ALIGN(8); PROVIDE(_data_lma = .); } >FLASH AT>FLASH :FLASH
|
||||
. = ORIGIN(INTRAM);
|
||||
.dalign : { . = ALIGN(8); PROVIDE(_data = .); } >INTRAM AT>INTRAM :INTRAM_ALIGN
|
||||
/* Exception handling */
|
||||
.eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
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|
||||
.tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
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|
||||
could instead move the label definition inside the section, but
|
||||
the linker would then create the section even if it turns out to
|
||||
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|
||||
PROVIDE (__preinit_array_start = ALIGN(32 / 8));
|
||||
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|
||||
PROVIDE (__preinit_array_end = .);
|
||||
PROVIDE (__init_array_start = .);
|
||||
.init_array : { KEEP (*(.init_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
PROVIDE (__init_array_end = .);
|
||||
PROVIDE (__fini_array_start = .);
|
||||
.fini_array : { KEEP (*(.fini_array)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
PROVIDE (__fini_array_end = .);
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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||||
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|
||||
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||||
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|
||||
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|
||||
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|
||||
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|
||||
KEEP (*crtbegin*.o(.ctors))
|
||||
/* We don't want to include the .ctor section from
|
||||
from the crtend.o file until after the sorted ctors.
|
||||
The .ctor section from the crtend file contains the
|
||||
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|
||||
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
} >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.dtors :
|
||||
{
|
||||
KEEP (*crtbegin*.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
} >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.jcr : { KEEP (*(.jcr)) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.dynamic : { *(.dynamic) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.got : { *(.got.plt) *(.got) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.ramtext : { *(.ramtext .ramtext.*) } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
.ddalign : { . = ALIGN(8); } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
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|
||||
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|
||||
*(.data .data.* .gnu.linkonce.d.*)
|
||||
KEEP (*(.gnu.linkonce.d.*personality*))
|
||||
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|
||||
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|
||||
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|
||||
.balign : { . = ALIGN(8); PROVIDE(_edata = .); } >INTRAM AT>FLASH :INTRAM_AT_FLASH
|
||||
PROVIDE (edata = .);
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
*(.bss .bss.* .gnu.linkonce.b.*)
|
||||
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|
||||
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|
||||
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|
||||
.bss section disappears because there are no input sections. */
|
||||
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|
||||
} >INTRAM AT>INTRAM :INTRAM
|
||||
. = ALIGN(8);
|
||||
_end = .;
|
||||
PROVIDE (end = .);
|
||||
__heap_start__ = ALIGN(8);
|
||||
.heap :
|
||||
{
|
||||
*(.heap)
|
||||
. = (__heap_size__ == __max_heap_size__) ?
|
||||
ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ - ABSOLUTE(.) :
|
||||
__heap_size__;
|
||||
} >INTRAM AT>INTRAM :INTRAM
|
||||
__heap_end__ = .;
|
||||
/* Stabs debugging sections. */
|
||||
.stab 0 : { *(.stab) }
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
Symbols in the DWARF debugging sections are relative to the beginning
|
||||
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|
||||
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|
||||
.debug 0 : { *(.debug) }
|
||||
.line 0 : { *(.line) }
|
||||
/* GNU DWARF 1 extensions */
|
||||
.debug_srcinfo 0 : { *(.debug_srcinfo) }
|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
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|
||||
.debug_str 0 : { *(.debug_str) }
|
||||
.debug_loc 0 : { *(.debug_loc) }
|
||||
.debug_macinfo 0 : { *(.debug_macinfo) }
|
||||
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|
||||
.debug_weaknames 0 : { *(.debug_weaknames) }
|
||||
.debug_funcnames 0 : { *(.debug_funcnames) }
|
||||
.debug_typenames 0 : { *(.debug_typenames) }
|
||||
.debug_varnames 0 : { *(.debug_varnames) }
|
||||
.stack ORIGIN(INTRAM) + LENGTH(INTRAM) - __stack_size__ :
|
||||
{
|
||||
_stack = .;
|
||||
*(.stack)
|
||||
. = __stack_size__;
|
||||
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|
||||
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|
||||
.userpage : { *(.userpage .userpage.*) } >USERPAGE AT>USERPAGE :USERPAGE
|
||||
/DISCARD/ : { *(.note.GNU-stack) }
|
||||
}
|
||||
@ -1,153 +0,0 @@
|
||||
/******************************************************************************
|
||||
* AVR32 AT32UC3A1512 XLINK command file for AVR32 IAR C/C++ Compiler.
|
||||
*
|
||||
* The assumed memory layout is the one of the AT32UC3A1512:
|
||||
*
|
||||
* Start Stop Name Type
|
||||
* ---------- ---------- ----- --------------
|
||||
* 0x00000000 0x0000FFFF SRAM RAM
|
||||
* 0x80000000 0x8007FFFF FLASH FLASH
|
||||
* 0x80800000 0x808001FF USER FLASH
|
||||
*
|
||||
* Usage: xlink your_file(s) -f xcl-file libraries
|
||||
*
|
||||
* - Compiler: IAR EWAVR32
|
||||
* - Supported devices: AVR32 AT32UC3A1512
|
||||
*
|
||||
* - author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
/************************************************************************/
|
||||
/* The following segments are defined in this link file: */
|
||||
/* */
|
||||
/* Code segments */
|
||||
/* CODE32 -- Program code used by __code32 functions. */
|
||||
/* RESET -- Reset code. */
|
||||
/* EVSEG -- Exception vector handlers. */
|
||||
/* */
|
||||
/* Constant segments */
|
||||
/* INITTAB -- Segment initializer table. */
|
||||
/* DIFUNCT -- Dynamic initialization vector used by C++. */
|
||||
/* SWITCH -- Switch tables. */
|
||||
/* ACTAB -- Table of pointers to acall functions. */
|
||||
/* */
|
||||
/* DATA21_ID -- Initialization data for DATA21_I. */
|
||||
/* DATA32_ID -- Initialization data for DATA32_I. */
|
||||
/* DATA32_C -- Constant __data32 data. */
|
||||
/* */
|
||||
/* CHECKSUM -- Checksum segment. */
|
||||
/* */
|
||||
/* Data segments */
|
||||
/* DATA21_I -- Initialized __data21 data with non-zero */
|
||||
/* initial value. */
|
||||
/* DATA32_I -- Initialized __data32 data with non-zero */
|
||||
/* initial value. */
|
||||
/* DATA21_Z -- Initialized __data21 data with zero initial value. */
|
||||
/* DATA32_Z -- Initialized __data32 data with zero initial value. */
|
||||
/* DATA21_N -- Non-initialized __data21. */
|
||||
/* DATA32_N -- Non-initialized __data32. */
|
||||
/* SSTACK -- The system stack. */
|
||||
/* CSTACK -- The application stack. */
|
||||
/* HEAP -- The heap used by malloc and free. */
|
||||
/* */
|
||||
/************************************************************************/
|
||||
|
||||
/************************************************************************/
|
||||
/* Define CPU */
|
||||
/************************************************************************/
|
||||
|
||||
-cavr32
|
||||
|
||||
// Declare the IPR0 memory location
|
||||
-DIPR0=FFFF0800
|
||||
|
||||
/************************************************************************/
|
||||
/* Reset code is located at address 0x80000000 and up. */
|
||||
/************************************************************************/
|
||||
|
||||
-Z(CODE)RESET=80000000-8007FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* The exception handler code is located at address 0x80000000 */
|
||||
/* and up. Make sure that the exception table gets properly */
|
||||
/* allocated. By using the special -Z@ allocation primitive, the */
|
||||
/* placement is guaranteed to be at _EVBASE and onwards. */
|
||||
/************************************************************************/
|
||||
|
||||
-Z@(CODE)EVTAB=80004000-8007FFFF
|
||||
-Z@(CODE)EV100=80004100-8007FFFF
|
||||
-P(CODE)EVSEG=80004000-8007FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* Allocate code and const segments. */
|
||||
/************************************************************************/
|
||||
|
||||
-P(CODE)CODE32=80000000-8007FFFF
|
||||
-P(CONST)DATA32_C=80000000-8007FFFF
|
||||
-P(CONST)USERDATA32_C=80800000-808001FF
|
||||
|
||||
// Initializers
|
||||
-Z(CONST)INITTAB,DIFUNCT=80000000-8007FFFF
|
||||
-Z(CONST)CHECKSUM,SWITCH=80000000-8007FFFF
|
||||
-Z(CONST)DATA21_ID,DATA32_ID=80000000-8007FFFF
|
||||
-Z(CONST)RAMCODE21_ID,RAMCODE32_ID=80000000-8007FFFF
|
||||
|
||||
-Z(CONST)ACTAB,HTAB=80000000-8007FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* Allocate the read/write segments that are mapped to RAM. */
|
||||
/************************************************************************/
|
||||
|
||||
-Z(CODE)RAMCODE21=00000004-0000FFFF
|
||||
-Z(DATA)DATA21_I,DATA21_Z,DATA21_N=00000004-0000FFFF
|
||||
-Z(CODE)RAMCODE32=00000004-0000FFFF
|
||||
-Z(DATA)DATA32_I,DATA32_Z,DATA32_N=00000004-0000FFFF
|
||||
-Z(DATA)TRACEBUFFER=00000004-0000FFFF
|
||||
|
||||
-Z(DATA)SSTACK+_SSTACK_SIZE#00000004-0000FFFF
|
||||
-Z(DATA)CSTACK+_CSTACK_SIZE#00000004-0000FFFF
|
||||
-Z(DATA)HEAP+_HEAP_SIZE=00000004-0000FFFF
|
||||
|
||||
/************************************************************************/
|
||||
/* Copy the RAMCODE bytes to the initializer segments. */
|
||||
/************************************************************************/
|
||||
|
||||
-QRAMCODE21=RAMCODE21_ID
|
||||
-QRAMCODE32=RAMCODE32_ID
|
||||
|
||||
/************************************************************************/
|
||||
/* End of File */
|
||||
/************************************************************************/
|
||||
@ -1,328 +0,0 @@
|
||||
/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief Preprocessor macro repeating utils.
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices can be used.
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _MREPEAT_H_
|
||||
#define _MREPEAT_H_
|
||||
|
||||
#include "preprocessor.h"
|
||||
|
||||
|
||||
//! Maximal number of repetitions supported by MREPEAT.
|
||||
#define MREPEAT_LIMIT 256
|
||||
|
||||
/*! \brief Macro repeat.
|
||||
*
|
||||
* This macro represents a horizontal repetition construct.
|
||||
*
|
||||
* \param count The number of repetitious calls to macro. Valid values range from 0 to MREPEAT_LIMIT.
|
||||
* \param macro A binary operation of the form macro(n, data). This macro is expanded by MREPEAT with
|
||||
* the current repetition number and the auxiliary data argument.
|
||||
* \param data Auxiliary data passed to macro.
|
||||
*
|
||||
* \return <tt>macro(0, data) macro(1, data) ... macro(count - 1, data)</tt>
|
||||
*/
|
||||
#define MREPEAT(count, macro, data) TPASTE2(MREPEAT, count)(macro, data)
|
||||
|
||||
#define MREPEAT0( macro, data)
|
||||
#define MREPEAT1( macro, data) MREPEAT0( macro, data) macro( 0, data)
|
||||
#define MREPEAT2( macro, data) MREPEAT1( macro, data) macro( 1, data)
|
||||
#define MREPEAT3( macro, data) MREPEAT2( macro, data) macro( 2, data)
|
||||
#define MREPEAT4( macro, data) MREPEAT3( macro, data) macro( 3, data)
|
||||
#define MREPEAT5( macro, data) MREPEAT4( macro, data) macro( 4, data)
|
||||
#define MREPEAT6( macro, data) MREPEAT5( macro, data) macro( 5, data)
|
||||
#define MREPEAT7( macro, data) MREPEAT6( macro, data) macro( 6, data)
|
||||
#define MREPEAT8( macro, data) MREPEAT7( macro, data) macro( 7, data)
|
||||
#define MREPEAT9( macro, data) MREPEAT8( macro, data) macro( 8, data)
|
||||
#define MREPEAT10( macro, data) MREPEAT9( macro, data) macro( 9, data)
|
||||
#define MREPEAT11( macro, data) MREPEAT10( macro, data) macro( 10, data)
|
||||
#define MREPEAT12( macro, data) MREPEAT11( macro, data) macro( 11, data)
|
||||
#define MREPEAT13( macro, data) MREPEAT12( macro, data) macro( 12, data)
|
||||
#define MREPEAT14( macro, data) MREPEAT13( macro, data) macro( 13, data)
|
||||
#define MREPEAT15( macro, data) MREPEAT14( macro, data) macro( 14, data)
|
||||
#define MREPEAT16( macro, data) MREPEAT15( macro, data) macro( 15, data)
|
||||
#define MREPEAT17( macro, data) MREPEAT16( macro, data) macro( 16, data)
|
||||
#define MREPEAT18( macro, data) MREPEAT17( macro, data) macro( 17, data)
|
||||
#define MREPEAT19( macro, data) MREPEAT18( macro, data) macro( 18, data)
|
||||
#define MREPEAT20( macro, data) MREPEAT19( macro, data) macro( 19, data)
|
||||
#define MREPEAT21( macro, data) MREPEAT20( macro, data) macro( 20, data)
|
||||
#define MREPEAT22( macro, data) MREPEAT21( macro, data) macro( 21, data)
|
||||
#define MREPEAT23( macro, data) MREPEAT22( macro, data) macro( 22, data)
|
||||
#define MREPEAT24( macro, data) MREPEAT23( macro, data) macro( 23, data)
|
||||
#define MREPEAT25( macro, data) MREPEAT24( macro, data) macro( 24, data)
|
||||
#define MREPEAT26( macro, data) MREPEAT25( macro, data) macro( 25, data)
|
||||
#define MREPEAT27( macro, data) MREPEAT26( macro, data) macro( 26, data)
|
||||
#define MREPEAT28( macro, data) MREPEAT27( macro, data) macro( 27, data)
|
||||
#define MREPEAT29( macro, data) MREPEAT28( macro, data) macro( 28, data)
|
||||
#define MREPEAT30( macro, data) MREPEAT29( macro, data) macro( 29, data)
|
||||
#define MREPEAT31( macro, data) MREPEAT30( macro, data) macro( 30, data)
|
||||
#define MREPEAT32( macro, data) MREPEAT31( macro, data) macro( 31, data)
|
||||
#define MREPEAT33( macro, data) MREPEAT32( macro, data) macro( 32, data)
|
||||
#define MREPEAT34( macro, data) MREPEAT33( macro, data) macro( 33, data)
|
||||
#define MREPEAT35( macro, data) MREPEAT34( macro, data) macro( 34, data)
|
||||
#define MREPEAT36( macro, data) MREPEAT35( macro, data) macro( 35, data)
|
||||
#define MREPEAT37( macro, data) MREPEAT36( macro, data) macro( 36, data)
|
||||
#define MREPEAT38( macro, data) MREPEAT37( macro, data) macro( 37, data)
|
||||
#define MREPEAT39( macro, data) MREPEAT38( macro, data) macro( 38, data)
|
||||
#define MREPEAT40( macro, data) MREPEAT39( macro, data) macro( 39, data)
|
||||
#define MREPEAT41( macro, data) MREPEAT40( macro, data) macro( 40, data)
|
||||
#define MREPEAT42( macro, data) MREPEAT41( macro, data) macro( 41, data)
|
||||
#define MREPEAT43( macro, data) MREPEAT42( macro, data) macro( 42, data)
|
||||
#define MREPEAT44( macro, data) MREPEAT43( macro, data) macro( 43, data)
|
||||
#define MREPEAT45( macro, data) MREPEAT44( macro, data) macro( 44, data)
|
||||
#define MREPEAT46( macro, data) MREPEAT45( macro, data) macro( 45, data)
|
||||
#define MREPEAT47( macro, data) MREPEAT46( macro, data) macro( 46, data)
|
||||
#define MREPEAT48( macro, data) MREPEAT47( macro, data) macro( 47, data)
|
||||
#define MREPEAT49( macro, data) MREPEAT48( macro, data) macro( 48, data)
|
||||
#define MREPEAT50( macro, data) MREPEAT49( macro, data) macro( 49, data)
|
||||
#define MREPEAT51( macro, data) MREPEAT50( macro, data) macro( 50, data)
|
||||
#define MREPEAT52( macro, data) MREPEAT51( macro, data) macro( 51, data)
|
||||
#define MREPEAT53( macro, data) MREPEAT52( macro, data) macro( 52, data)
|
||||
#define MREPEAT54( macro, data) MREPEAT53( macro, data) macro( 53, data)
|
||||
#define MREPEAT55( macro, data) MREPEAT54( macro, data) macro( 54, data)
|
||||
#define MREPEAT56( macro, data) MREPEAT55( macro, data) macro( 55, data)
|
||||
#define MREPEAT57( macro, data) MREPEAT56( macro, data) macro( 56, data)
|
||||
#define MREPEAT58( macro, data) MREPEAT57( macro, data) macro( 57, data)
|
||||
#define MREPEAT59( macro, data) MREPEAT58( macro, data) macro( 58, data)
|
||||
#define MREPEAT60( macro, data) MREPEAT59( macro, data) macro( 59, data)
|
||||
#define MREPEAT61( macro, data) MREPEAT60( macro, data) macro( 60, data)
|
||||
#define MREPEAT62( macro, data) MREPEAT61( macro, data) macro( 61, data)
|
||||
#define MREPEAT63( macro, data) MREPEAT62( macro, data) macro( 62, data)
|
||||
#define MREPEAT64( macro, data) MREPEAT63( macro, data) macro( 63, data)
|
||||
#define MREPEAT65( macro, data) MREPEAT64( macro, data) macro( 64, data)
|
||||
#define MREPEAT66( macro, data) MREPEAT65( macro, data) macro( 65, data)
|
||||
#define MREPEAT67( macro, data) MREPEAT66( macro, data) macro( 66, data)
|
||||
#define MREPEAT68( macro, data) MREPEAT67( macro, data) macro( 67, data)
|
||||
#define MREPEAT69( macro, data) MREPEAT68( macro, data) macro( 68, data)
|
||||
#define MREPEAT70( macro, data) MREPEAT69( macro, data) macro( 69, data)
|
||||
#define MREPEAT71( macro, data) MREPEAT70( macro, data) macro( 70, data)
|
||||
#define MREPEAT72( macro, data) MREPEAT71( macro, data) macro( 71, data)
|
||||
#define MREPEAT73( macro, data) MREPEAT72( macro, data) macro( 72, data)
|
||||
#define MREPEAT74( macro, data) MREPEAT73( macro, data) macro( 73, data)
|
||||
#define MREPEAT75( macro, data) MREPEAT74( macro, data) macro( 74, data)
|
||||
#define MREPEAT76( macro, data) MREPEAT75( macro, data) macro( 75, data)
|
||||
#define MREPEAT77( macro, data) MREPEAT76( macro, data) macro( 76, data)
|
||||
#define MREPEAT78( macro, data) MREPEAT77( macro, data) macro( 77, data)
|
||||
#define MREPEAT79( macro, data) MREPEAT78( macro, data) macro( 78, data)
|
||||
#define MREPEAT80( macro, data) MREPEAT79( macro, data) macro( 79, data)
|
||||
#define MREPEAT81( macro, data) MREPEAT80( macro, data) macro( 80, data)
|
||||
#define MREPEAT82( macro, data) MREPEAT81( macro, data) macro( 81, data)
|
||||
#define MREPEAT83( macro, data) MREPEAT82( macro, data) macro( 82, data)
|
||||
#define MREPEAT84( macro, data) MREPEAT83( macro, data) macro( 83, data)
|
||||
#define MREPEAT85( macro, data) MREPEAT84( macro, data) macro( 84, data)
|
||||
#define MREPEAT86( macro, data) MREPEAT85( macro, data) macro( 85, data)
|
||||
#define MREPEAT87( macro, data) MREPEAT86( macro, data) macro( 86, data)
|
||||
#define MREPEAT88( macro, data) MREPEAT87( macro, data) macro( 87, data)
|
||||
#define MREPEAT89( macro, data) MREPEAT88( macro, data) macro( 88, data)
|
||||
#define MREPEAT90( macro, data) MREPEAT89( macro, data) macro( 89, data)
|
||||
#define MREPEAT91( macro, data) MREPEAT90( macro, data) macro( 90, data)
|
||||
#define MREPEAT92( macro, data) MREPEAT91( macro, data) macro( 91, data)
|
||||
#define MREPEAT93( macro, data) MREPEAT92( macro, data) macro( 92, data)
|
||||
#define MREPEAT94( macro, data) MREPEAT93( macro, data) macro( 93, data)
|
||||
#define MREPEAT95( macro, data) MREPEAT94( macro, data) macro( 94, data)
|
||||
#define MREPEAT96( macro, data) MREPEAT95( macro, data) macro( 95, data)
|
||||
#define MREPEAT97( macro, data) MREPEAT96( macro, data) macro( 96, data)
|
||||
#define MREPEAT98( macro, data) MREPEAT97( macro, data) macro( 97, data)
|
||||
#define MREPEAT99( macro, data) MREPEAT98( macro, data) macro( 98, data)
|
||||
#define MREPEAT100(macro, data) MREPEAT99( macro, data) macro( 99, data)
|
||||
#define MREPEAT101(macro, data) MREPEAT100(macro, data) macro(100, data)
|
||||
#define MREPEAT102(macro, data) MREPEAT101(macro, data) macro(101, data)
|
||||
#define MREPEAT103(macro, data) MREPEAT102(macro, data) macro(102, data)
|
||||
#define MREPEAT104(macro, data) MREPEAT103(macro, data) macro(103, data)
|
||||
#define MREPEAT105(macro, data) MREPEAT104(macro, data) macro(104, data)
|
||||
#define MREPEAT106(macro, data) MREPEAT105(macro, data) macro(105, data)
|
||||
#define MREPEAT107(macro, data) MREPEAT106(macro, data) macro(106, data)
|
||||
#define MREPEAT108(macro, data) MREPEAT107(macro, data) macro(107, data)
|
||||
#define MREPEAT109(macro, data) MREPEAT108(macro, data) macro(108, data)
|
||||
#define MREPEAT110(macro, data) MREPEAT109(macro, data) macro(109, data)
|
||||
#define MREPEAT111(macro, data) MREPEAT110(macro, data) macro(110, data)
|
||||
#define MREPEAT112(macro, data) MREPEAT111(macro, data) macro(111, data)
|
||||
#define MREPEAT113(macro, data) MREPEAT112(macro, data) macro(112, data)
|
||||
#define MREPEAT114(macro, data) MREPEAT113(macro, data) macro(113, data)
|
||||
#define MREPEAT115(macro, data) MREPEAT114(macro, data) macro(114, data)
|
||||
#define MREPEAT116(macro, data) MREPEAT115(macro, data) macro(115, data)
|
||||
#define MREPEAT117(macro, data) MREPEAT116(macro, data) macro(116, data)
|
||||
#define MREPEAT118(macro, data) MREPEAT117(macro, data) macro(117, data)
|
||||
#define MREPEAT119(macro, data) MREPEAT118(macro, data) macro(118, data)
|
||||
#define MREPEAT120(macro, data) MREPEAT119(macro, data) macro(119, data)
|
||||
#define MREPEAT121(macro, data) MREPEAT120(macro, data) macro(120, data)
|
||||
#define MREPEAT122(macro, data) MREPEAT121(macro, data) macro(121, data)
|
||||
#define MREPEAT123(macro, data) MREPEAT122(macro, data) macro(122, data)
|
||||
#define MREPEAT124(macro, data) MREPEAT123(macro, data) macro(123, data)
|
||||
#define MREPEAT125(macro, data) MREPEAT124(macro, data) macro(124, data)
|
||||
#define MREPEAT126(macro, data) MREPEAT125(macro, data) macro(125, data)
|
||||
#define MREPEAT127(macro, data) MREPEAT126(macro, data) macro(126, data)
|
||||
#define MREPEAT128(macro, data) MREPEAT127(macro, data) macro(127, data)
|
||||
#define MREPEAT129(macro, data) MREPEAT128(macro, data) macro(128, data)
|
||||
#define MREPEAT130(macro, data) MREPEAT129(macro, data) macro(129, data)
|
||||
#define MREPEAT131(macro, data) MREPEAT130(macro, data) macro(130, data)
|
||||
#define MREPEAT132(macro, data) MREPEAT131(macro, data) macro(131, data)
|
||||
#define MREPEAT133(macro, data) MREPEAT132(macro, data) macro(132, data)
|
||||
#define MREPEAT134(macro, data) MREPEAT133(macro, data) macro(133, data)
|
||||
#define MREPEAT135(macro, data) MREPEAT134(macro, data) macro(134, data)
|
||||
#define MREPEAT136(macro, data) MREPEAT135(macro, data) macro(135, data)
|
||||
#define MREPEAT137(macro, data) MREPEAT136(macro, data) macro(136, data)
|
||||
#define MREPEAT138(macro, data) MREPEAT137(macro, data) macro(137, data)
|
||||
#define MREPEAT139(macro, data) MREPEAT138(macro, data) macro(138, data)
|
||||
#define MREPEAT140(macro, data) MREPEAT139(macro, data) macro(139, data)
|
||||
#define MREPEAT141(macro, data) MREPEAT140(macro, data) macro(140, data)
|
||||
#define MREPEAT142(macro, data) MREPEAT141(macro, data) macro(141, data)
|
||||
#define MREPEAT143(macro, data) MREPEAT142(macro, data) macro(142, data)
|
||||
#define MREPEAT144(macro, data) MREPEAT143(macro, data) macro(143, data)
|
||||
#define MREPEAT145(macro, data) MREPEAT144(macro, data) macro(144, data)
|
||||
#define MREPEAT146(macro, data) MREPEAT145(macro, data) macro(145, data)
|
||||
#define MREPEAT147(macro, data) MREPEAT146(macro, data) macro(146, data)
|
||||
#define MREPEAT148(macro, data) MREPEAT147(macro, data) macro(147, data)
|
||||
#define MREPEAT149(macro, data) MREPEAT148(macro, data) macro(148, data)
|
||||
#define MREPEAT150(macro, data) MREPEAT149(macro, data) macro(149, data)
|
||||
#define MREPEAT151(macro, data) MREPEAT150(macro, data) macro(150, data)
|
||||
#define MREPEAT152(macro, data) MREPEAT151(macro, data) macro(151, data)
|
||||
#define MREPEAT153(macro, data) MREPEAT152(macro, data) macro(152, data)
|
||||
#define MREPEAT154(macro, data) MREPEAT153(macro, data) macro(153, data)
|
||||
#define MREPEAT155(macro, data) MREPEAT154(macro, data) macro(154, data)
|
||||
#define MREPEAT156(macro, data) MREPEAT155(macro, data) macro(155, data)
|
||||
#define MREPEAT157(macro, data) MREPEAT156(macro, data) macro(156, data)
|
||||
#define MREPEAT158(macro, data) MREPEAT157(macro, data) macro(157, data)
|
||||
#define MREPEAT159(macro, data) MREPEAT158(macro, data) macro(158, data)
|
||||
#define MREPEAT160(macro, data) MREPEAT159(macro, data) macro(159, data)
|
||||
#define MREPEAT161(macro, data) MREPEAT160(macro, data) macro(160, data)
|
||||
#define MREPEAT162(macro, data) MREPEAT161(macro, data) macro(161, data)
|
||||
#define MREPEAT163(macro, data) MREPEAT162(macro, data) macro(162, data)
|
||||
#define MREPEAT164(macro, data) MREPEAT163(macro, data) macro(163, data)
|
||||
#define MREPEAT165(macro, data) MREPEAT164(macro, data) macro(164, data)
|
||||
#define MREPEAT166(macro, data) MREPEAT165(macro, data) macro(165, data)
|
||||
#define MREPEAT167(macro, data) MREPEAT166(macro, data) macro(166, data)
|
||||
#define MREPEAT168(macro, data) MREPEAT167(macro, data) macro(167, data)
|
||||
#define MREPEAT169(macro, data) MREPEAT168(macro, data) macro(168, data)
|
||||
#define MREPEAT170(macro, data) MREPEAT169(macro, data) macro(169, data)
|
||||
#define MREPEAT171(macro, data) MREPEAT170(macro, data) macro(170, data)
|
||||
#define MREPEAT172(macro, data) MREPEAT171(macro, data) macro(171, data)
|
||||
#define MREPEAT173(macro, data) MREPEAT172(macro, data) macro(172, data)
|
||||
#define MREPEAT174(macro, data) MREPEAT173(macro, data) macro(173, data)
|
||||
#define MREPEAT175(macro, data) MREPEAT174(macro, data) macro(174, data)
|
||||
#define MREPEAT176(macro, data) MREPEAT175(macro, data) macro(175, data)
|
||||
#define MREPEAT177(macro, data) MREPEAT176(macro, data) macro(176, data)
|
||||
#define MREPEAT178(macro, data) MREPEAT177(macro, data) macro(177, data)
|
||||
#define MREPEAT179(macro, data) MREPEAT178(macro, data) macro(178, data)
|
||||
#define MREPEAT180(macro, data) MREPEAT179(macro, data) macro(179, data)
|
||||
#define MREPEAT181(macro, data) MREPEAT180(macro, data) macro(180, data)
|
||||
#define MREPEAT182(macro, data) MREPEAT181(macro, data) macro(181, data)
|
||||
#define MREPEAT183(macro, data) MREPEAT182(macro, data) macro(182, data)
|
||||
#define MREPEAT184(macro, data) MREPEAT183(macro, data) macro(183, data)
|
||||
#define MREPEAT185(macro, data) MREPEAT184(macro, data) macro(184, data)
|
||||
#define MREPEAT186(macro, data) MREPEAT185(macro, data) macro(185, data)
|
||||
#define MREPEAT187(macro, data) MREPEAT186(macro, data) macro(186, data)
|
||||
#define MREPEAT188(macro, data) MREPEAT187(macro, data) macro(187, data)
|
||||
#define MREPEAT189(macro, data) MREPEAT188(macro, data) macro(188, data)
|
||||
#define MREPEAT190(macro, data) MREPEAT189(macro, data) macro(189, data)
|
||||
#define MREPEAT191(macro, data) MREPEAT190(macro, data) macro(190, data)
|
||||
#define MREPEAT192(macro, data) MREPEAT191(macro, data) macro(191, data)
|
||||
#define MREPEAT193(macro, data) MREPEAT192(macro, data) macro(192, data)
|
||||
#define MREPEAT194(macro, data) MREPEAT193(macro, data) macro(193, data)
|
||||
#define MREPEAT195(macro, data) MREPEAT194(macro, data) macro(194, data)
|
||||
#define MREPEAT196(macro, data) MREPEAT195(macro, data) macro(195, data)
|
||||
#define MREPEAT197(macro, data) MREPEAT196(macro, data) macro(196, data)
|
||||
#define MREPEAT198(macro, data) MREPEAT197(macro, data) macro(197, data)
|
||||
#define MREPEAT199(macro, data) MREPEAT198(macro, data) macro(198, data)
|
||||
#define MREPEAT200(macro, data) MREPEAT199(macro, data) macro(199, data)
|
||||
#define MREPEAT201(macro, data) MREPEAT200(macro, data) macro(200, data)
|
||||
#define MREPEAT202(macro, data) MREPEAT201(macro, data) macro(201, data)
|
||||
#define MREPEAT203(macro, data) MREPEAT202(macro, data) macro(202, data)
|
||||
#define MREPEAT204(macro, data) MREPEAT203(macro, data) macro(203, data)
|
||||
#define MREPEAT205(macro, data) MREPEAT204(macro, data) macro(204, data)
|
||||
#define MREPEAT206(macro, data) MREPEAT205(macro, data) macro(205, data)
|
||||
#define MREPEAT207(macro, data) MREPEAT206(macro, data) macro(206, data)
|
||||
#define MREPEAT208(macro, data) MREPEAT207(macro, data) macro(207, data)
|
||||
#define MREPEAT209(macro, data) MREPEAT208(macro, data) macro(208, data)
|
||||
#define MREPEAT210(macro, data) MREPEAT209(macro, data) macro(209, data)
|
||||
#define MREPEAT211(macro, data) MREPEAT210(macro, data) macro(210, data)
|
||||
#define MREPEAT212(macro, data) MREPEAT211(macro, data) macro(211, data)
|
||||
#define MREPEAT213(macro, data) MREPEAT212(macro, data) macro(212, data)
|
||||
#define MREPEAT214(macro, data) MREPEAT213(macro, data) macro(213, data)
|
||||
#define MREPEAT215(macro, data) MREPEAT214(macro, data) macro(214, data)
|
||||
#define MREPEAT216(macro, data) MREPEAT215(macro, data) macro(215, data)
|
||||
#define MREPEAT217(macro, data) MREPEAT216(macro, data) macro(216, data)
|
||||
#define MREPEAT218(macro, data) MREPEAT217(macro, data) macro(217, data)
|
||||
#define MREPEAT219(macro, data) MREPEAT218(macro, data) macro(218, data)
|
||||
#define MREPEAT220(macro, data) MREPEAT219(macro, data) macro(219, data)
|
||||
#define MREPEAT221(macro, data) MREPEAT220(macro, data) macro(220, data)
|
||||
#define MREPEAT222(macro, data) MREPEAT221(macro, data) macro(221, data)
|
||||
#define MREPEAT223(macro, data) MREPEAT222(macro, data) macro(222, data)
|
||||
#define MREPEAT224(macro, data) MREPEAT223(macro, data) macro(223, data)
|
||||
#define MREPEAT225(macro, data) MREPEAT224(macro, data) macro(224, data)
|
||||
#define MREPEAT226(macro, data) MREPEAT225(macro, data) macro(225, data)
|
||||
#define MREPEAT227(macro, data) MREPEAT226(macro, data) macro(226, data)
|
||||
#define MREPEAT228(macro, data) MREPEAT227(macro, data) macro(227, data)
|
||||
#define MREPEAT229(macro, data) MREPEAT228(macro, data) macro(228, data)
|
||||
#define MREPEAT230(macro, data) MREPEAT229(macro, data) macro(229, data)
|
||||
#define MREPEAT231(macro, data) MREPEAT230(macro, data) macro(230, data)
|
||||
#define MREPEAT232(macro, data) MREPEAT231(macro, data) macro(231, data)
|
||||
#define MREPEAT233(macro, data) MREPEAT232(macro, data) macro(232, data)
|
||||
#define MREPEAT234(macro, data) MREPEAT233(macro, data) macro(233, data)
|
||||
#define MREPEAT235(macro, data) MREPEAT234(macro, data) macro(234, data)
|
||||
#define MREPEAT236(macro, data) MREPEAT235(macro, data) macro(235, data)
|
||||
#define MREPEAT237(macro, data) MREPEAT236(macro, data) macro(236, data)
|
||||
#define MREPEAT238(macro, data) MREPEAT237(macro, data) macro(237, data)
|
||||
#define MREPEAT239(macro, data) MREPEAT238(macro, data) macro(238, data)
|
||||
#define MREPEAT240(macro, data) MREPEAT239(macro, data) macro(239, data)
|
||||
#define MREPEAT241(macro, data) MREPEAT240(macro, data) macro(240, data)
|
||||
#define MREPEAT242(macro, data) MREPEAT241(macro, data) macro(241, data)
|
||||
#define MREPEAT243(macro, data) MREPEAT242(macro, data) macro(242, data)
|
||||
#define MREPEAT244(macro, data) MREPEAT243(macro, data) macro(243, data)
|
||||
#define MREPEAT245(macro, data) MREPEAT244(macro, data) macro(244, data)
|
||||
#define MREPEAT246(macro, data) MREPEAT245(macro, data) macro(245, data)
|
||||
#define MREPEAT247(macro, data) MREPEAT246(macro, data) macro(246, data)
|
||||
#define MREPEAT248(macro, data) MREPEAT247(macro, data) macro(247, data)
|
||||
#define MREPEAT249(macro, data) MREPEAT248(macro, data) macro(248, data)
|
||||
#define MREPEAT250(macro, data) MREPEAT249(macro, data) macro(249, data)
|
||||
#define MREPEAT251(macro, data) MREPEAT250(macro, data) macro(250, data)
|
||||
#define MREPEAT252(macro, data) MREPEAT251(macro, data) macro(251, data)
|
||||
#define MREPEAT253(macro, data) MREPEAT252(macro, data) macro(252, data)
|
||||
#define MREPEAT254(macro, data) MREPEAT253(macro, data) macro(253, data)
|
||||
#define MREPEAT255(macro, data) MREPEAT254(macro, data) macro(254, data)
|
||||
#define MREPEAT256(macro, data) MREPEAT255(macro, data) macro(255, data)
|
||||
|
||||
|
||||
#endif // _MREPEAT_H_
|
||||
@ -1,55 +0,0 @@
|
||||
/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief Preprocessor utils.
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices can be used.
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _PREPROCESSOR_H_
|
||||
#define _PREPROCESSOR_H_
|
||||
|
||||
#include "tpaste.h"
|
||||
#include "stringz.h"
|
||||
#include "mrepeat.h"
|
||||
|
||||
|
||||
#endif // _PREPROCESSOR_H_
|
||||
@ -1,75 +0,0 @@
|
||||
/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief Preprocessor stringizing utils.
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices can be used.
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _STRINGZ_H_
|
||||
#define _STRINGZ_H_
|
||||
|
||||
|
||||
/*! \brief Stringize.
|
||||
*
|
||||
* Stringize a preprocessing token, this token being allowed to be \#defined.
|
||||
*
|
||||
* May be used only within macros with the token passed as an argument if the token is \#defined.
|
||||
*
|
||||
* For example, writing STRINGZ(PIN) within a macro \#defined by PIN_NAME(PIN)
|
||||
* and invoked as PIN_NAME(PIN0) with PIN0 \#defined as A0 is equivalent to
|
||||
* writing "A0".
|
||||
*/
|
||||
#define STRINGZ(x) #x
|
||||
|
||||
/*! \brief Absolute stringize.
|
||||
*
|
||||
* Stringize a preprocessing token, this token being allowed to be \#defined.
|
||||
*
|
||||
* No restriction of use if the token is \#defined.
|
||||
*
|
||||
* For example, writing ASTRINGZ(PIN0) anywhere with PIN0 \#defined as A0 is
|
||||
* equivalent to writing "A0".
|
||||
*/
|
||||
#define ASTRINGZ(x) STRINGZ(x)
|
||||
|
||||
|
||||
#endif // _STRINGZ_H_
|
||||
@ -1,95 +0,0 @@
|
||||
/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief Preprocessor token pasting utils.
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices can be used.
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _TPASTE_H_
|
||||
#define _TPASTE_H_
|
||||
|
||||
|
||||
/*! \name Token Paste
|
||||
*
|
||||
* Paste N preprocessing tokens together, these tokens being allowed to be \#defined.
|
||||
*
|
||||
* May be used only within macros with the tokens passed as arguments if the tokens are \#defined.
|
||||
*
|
||||
* For example, writing TPASTE2(U, WIDTH) within a macro \#defined by
|
||||
* UTYPE(WIDTH) and invoked as UTYPE(UL_WIDTH) with UL_WIDTH \#defined as 32 is
|
||||
* equivalent to writing U32.
|
||||
*/
|
||||
//! @{
|
||||
#define TPASTE2( a, b) a##b
|
||||
#define TPASTE3( a, b, c) a##b##c
|
||||
#define TPASTE4( a, b, c, d) a##b##c##d
|
||||
#define TPASTE5( a, b, c, d, e) a##b##c##d##e
|
||||
#define TPASTE6( a, b, c, d, e, f) a##b##c##d##e##f
|
||||
#define TPASTE7( a, b, c, d, e, f, g) a##b##c##d##e##f##g
|
||||
#define TPASTE8( a, b, c, d, e, f, g, h) a##b##c##d##e##f##g##h
|
||||
#define TPASTE9( a, b, c, d, e, f, g, h, i) a##b##c##d##e##f##g##h##i
|
||||
#define TPASTE10(a, b, c, d, e, f, g, h, i, j) a##b##c##d##e##f##g##h##i##j
|
||||
//! @}
|
||||
|
||||
/*! \name Absolute Token Paste
|
||||
*
|
||||
* Paste N preprocessing tokens together, these tokens being allowed to be \#defined.
|
||||
*
|
||||
* No restriction of use if the tokens are \#defined.
|
||||
*
|
||||
* For example, writing ATPASTE2(U, UL_WIDTH) anywhere with UL_WIDTH \#defined
|
||||
* as 32 is equivalent to writing U32.
|
||||
*/
|
||||
//! @{
|
||||
#define ATPASTE2( a, b) TPASTE2( a, b)
|
||||
#define ATPASTE3( a, b, c) TPASTE3( a, b, c)
|
||||
#define ATPASTE4( a, b, c, d) TPASTE4( a, b, c, d)
|
||||
#define ATPASTE5( a, b, c, d, e) TPASTE5( a, b, c, d, e)
|
||||
#define ATPASTE6( a, b, c, d, e, f) TPASTE6( a, b, c, d, e, f)
|
||||
#define ATPASTE7( a, b, c, d, e, f, g) TPASTE7( a, b, c, d, e, f, g)
|
||||
#define ATPASTE8( a, b, c, d, e, f, g, h) TPASTE8( a, b, c, d, e, f, g, h)
|
||||
#define ATPASTE9( a, b, c, d, e, f, g, h, i) TPASTE9( a, b, c, d, e, f, g, h, i)
|
||||
#define ATPASTE10(a, b, c, d, e, f, g, h, i, j) TPASTE10(a, b, c, d, e, f, g, h, i, j)
|
||||
//! @}
|
||||
|
||||
|
||||
#endif // _TPASTE_H_
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,203 +0,0 @@
|
||||
/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
|
||||
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief Arch file for AVR32.
|
||||
*
|
||||
* This file defines common AVR32 UC3 series.
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _ARCH_H_
|
||||
#define _ARCH_H_
|
||||
|
||||
// UC3 A Series
|
||||
#define UC3A0 ( defined (__GNUC__) && \
|
||||
( defined (__AVR32_UC3A0128__) || \
|
||||
defined (__AVR32_UC3A0256__) || \
|
||||
defined (__AVR32_UC3A0512__) || \
|
||||
defined (__AVR32_UC3A0512ES__))) \
|
||||
||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
|
||||
( defined (__AT32UC3A0128__) || \
|
||||
defined (__AT32UC3A0256__) || \
|
||||
defined (__AT32UC3A0512__) || \
|
||||
defined (__AT32UC3A0512ES__)))
|
||||
|
||||
#define UC3A1 ( defined (__GNUC__) && \
|
||||
( defined (__AVR32_UC3A1128__) || \
|
||||
defined (__AVR32_UC3A1256__) || \
|
||||
defined (__AVR32_UC3A1512__) || \
|
||||
defined (__AVR32_UC3A1512ES__))) \
|
||||
||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
|
||||
( defined (__AT32UC3A1128__) || \
|
||||
defined (__AT32UC3A1256__) || \
|
||||
defined (__AT32UC3A1512__) || \
|
||||
defined (__AT32UC3A1512ES__)))
|
||||
|
||||
#define UC3A3 ( defined (__GNUC__) && \
|
||||
( defined (__AVR32_UC3A364__) || \
|
||||
defined (__AVR32_UC3A364S__) || \
|
||||
defined (__AVR32_UC3A3128__) || \
|
||||
defined (__AVR32_UC3A3128S__) || \
|
||||
defined (__AVR32_UC3A3256__) || \
|
||||
defined (__AVR32_UC3A3256S__))) \
|
||||
||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
|
||||
( defined (__AT32UC3A364__) || \
|
||||
defined (__AT32UC3A364S__) || \
|
||||
defined (__AT32UC3A3128__) || \
|
||||
defined (__AT32UC3A3128S__) || \
|
||||
defined (__AT32UC3A3256__) || \
|
||||
defined (__AT32UC3A3256S__)))
|
||||
|
||||
#define UC3A (UC3A0 || UC3A1 || UC3A3)
|
||||
|
||||
// UC3 B Series
|
||||
#define UC3B0 ( defined (__GNUC__) && \
|
||||
( defined (__AVR32_UC3B064__) || \
|
||||
defined (__AVR32_UC3B0128__) || \
|
||||
defined (__AVR32_UC3B0256__) || \
|
||||
defined (__AVR32_UC3B0256ES__) || \
|
||||
defined (__AVR32_UC3B0512__) || \
|
||||
defined (__AVR32_UC3B0512REVC_))) \
|
||||
||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
|
||||
( defined (__AT32UC3B064__) || \
|
||||
defined (__AT32UC3B0128__) || \
|
||||
defined (__AT32UC3B0256__) || \
|
||||
defined (__AT32UC3B0256ES__) || \
|
||||
defined (__AT32UC3B0512__) || \
|
||||
defined (__AT32UC3B0512REVC__)))
|
||||
|
||||
#define UC3B1 ( defined (__GNUC__) && \
|
||||
( defined (__AVR32_UC3B164__) || \
|
||||
defined (__AVR32_UC3B1128__) || \
|
||||
defined (__AVR32_UC3B1256__) || \
|
||||
defined (__AVR32_UC3B1256ES__) || \
|
||||
defined (__AVR32_UC3B1512__) || \
|
||||
defined (__AVR32_UC3B1512ES__))) \
|
||||
||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
|
||||
( defined (__AT32UC3B164__) || \
|
||||
defined (__AT32UC3B1128__) || \
|
||||
defined (__AT32UC3B1256__) || \
|
||||
defined (__AT32UC3B1256ES__) || \
|
||||
defined (__AT32UC3B1512__) || \
|
||||
defined (__AT32UC3B1512REVC__)))
|
||||
|
||||
#define UC3B (UC3B0 || UC3B1 )
|
||||
|
||||
// UC3 C Series
|
||||
#define UC3C0 ( defined (__GNUC__) && \
|
||||
( defined (__AVR32_UC3C064C__) || \
|
||||
defined (__AVR32_UC3C0128C__) || \
|
||||
defined (__AVR32_UC3C0256C__) || \
|
||||
defined (__AVR32_UC3C0512CREVC__))) \
|
||||
||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
|
||||
( defined (__AT32UC3C064C__) || \
|
||||
defined (__AT32UC3C0128C__) || \
|
||||
defined (__AT32UC3C0256C__) || \
|
||||
defined (__AT32UC3C0512C__)))
|
||||
|
||||
#define UC3C1 ( defined (__GNUC__) && \
|
||||
( defined (__AVR32_UC3C164C__) || \
|
||||
defined (__AVR32_UC3C1128C__) || \
|
||||
defined (__AVR32_UC3C1256C__) || \
|
||||
defined (__AVR32_UC3C1512CREVC__))) \
|
||||
||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
|
||||
( defined (__AT32UC3C164C__) || \
|
||||
defined (__AT32UC3C1128C__) || \
|
||||
defined (__AT32UC3C1256C__) || \
|
||||
defined (__AT32UC3C1512C__)))
|
||||
|
||||
#define UC3C2 ( defined (__GNUC__) && \
|
||||
( defined (__AVR32_UC3C264C__) || \
|
||||
defined (__AVR32_UC3C2128C__) || \
|
||||
defined (__AVR32_UC3C2256C__) || \
|
||||
defined (__AVR32_UC3C2512CREVC__))) \
|
||||
||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
|
||||
( defined (__AT32UC3C264C__) || \
|
||||
defined (__AT32UC3C2128C__) || \
|
||||
defined (__AT32UC3C2256C__) || \
|
||||
defined (__AT32UC3C2512C__)))
|
||||
|
||||
#define UC3C (UC3C0 || UC3C1 || UC3C2)
|
||||
|
||||
// UC3 L Device series
|
||||
#define UC3L0 ( defined (__GNUC__) && \
|
||||
( defined (__AVR32_UC3L016__) || \
|
||||
defined (__AVR32_UC3L032__) || \
|
||||
defined (__AVR32_UC3L064__) || \
|
||||
defined (__AVR32_UC3L064REVB__))) \
|
||||
||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
|
||||
( defined (__AT32UC3L016__) || \
|
||||
defined (__AT32UC3L032__) || \
|
||||
defined (__AT32UC3L064__) || \
|
||||
defined (__AT32UC3L064REVB__)))
|
||||
|
||||
#define UC3L1 ( defined (__GNUC__) && \
|
||||
( defined (__AVR32_UC3L116__) || \
|
||||
defined (__AVR32_UC3L132__) || \
|
||||
defined (__AVR32_UC3L164__))) \
|
||||
||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
|
||||
( defined (__AT32UC3L116__) || \
|
||||
defined (__AT32UC3L132__) || \
|
||||
defined (__AT32UC3L164__)))
|
||||
|
||||
#define UC3L2 ( defined (__GNUC__) && \
|
||||
( defined (__AVR32_UC3L216__) || \
|
||||
defined (__AVR32_UC3L232__) || \
|
||||
defined (__AVR32_UC3L264__))) \
|
||||
||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
|
||||
( defined (__AT32UC3L216__) || \
|
||||
defined (__AT32UC3L232__) || \
|
||||
defined (__AT32UC3L264__)))
|
||||
|
||||
#define UC3L3 ( defined (__GNUC__) && \
|
||||
( defined (__AVR32_UC3L316__) || \
|
||||
defined (__AVR32_UC3L332__) || \
|
||||
defined (__AVR32_UC3L364__))) \
|
||||
||((defined(__ICCAVR32__) || defined(__AAVR32__)) && \
|
||||
( defined (__AT32UC3L316__) || \
|
||||
defined (__AT32UC3L332__) || \
|
||||
defined (__AT32UC3L364__)))
|
||||
|
||||
#define UC3L (UC3L0 || UC3L1 || UC3L2 || UC3L3)
|
||||
|
||||
#endif // _ARCH_H_
|
||||
@ -1,48 +0,0 @@
|
||||
REM This file should be executed from the command line prior to the first
|
||||
REM build. It will be necessary to refresh the Eclipse project once the
|
||||
REM .bat file has been executed (normally just press F5 to refresh).
|
||||
|
||||
REM Copies all the required files from their location within the standard
|
||||
REM FreeRTOS directory structure to under the Eclipse project directory.
|
||||
REM This permits the Eclipse project to be used in 'managed' mode and without
|
||||
REM having to setup any linked resources.
|
||||
|
||||
REM Have the files already been copied?
|
||||
IF EXIST FreeRTOS Goto END
|
||||
|
||||
REM Create the required directory structure.
|
||||
MD FreeRTOS
|
||||
MD FreeRTOS\include
|
||||
MD FreeRTOS\portable\GCC\AVR32_UC3
|
||||
MD FreeRTOS\portable\MemMang
|
||||
MD Common_Demo_Tasks
|
||||
MD Common_Demo_Tasks\Minimal
|
||||
MD Common_Demo_Tasks\include
|
||||
|
||||
REM Copy the core kernel files.
|
||||
copy ..\..\Source\*.* FreeRTOS
|
||||
|
||||
REM Copy the common header files
|
||||
copy ..\..\Source\include\*.* FreeRTOS\include
|
||||
|
||||
REM Copy the portable layer files
|
||||
copy ..\..\Source\portable\GCC\AVR32_UC3\*.* FreeRTOS\portable\GCC\AVR32_UC3
|
||||
|
||||
REM Copy the basic memory allocation files
|
||||
copy ..\..\Source\portable\MemMang\heap_3.c FreeRTOS\portable\MemMang
|
||||
|
||||
REM Copy the files that define the common demo tasks.
|
||||
copy ..\common\Minimal\BlockQ.c Common_Demo_Tasks\Minimal
|
||||
copy ..\common\Minimal\comtest.c Common_Demo_Tasks\Minimal
|
||||
copy ..\common\Minimal\death.c Common_Demo_Tasks\Minimal
|
||||
copy ..\common\Minimal\dynamic.c Common_Demo_Tasks\Minimal
|
||||
copy ..\common\Minimal\flash.c Common_Demo_Tasks\Minimal
|
||||
copy ..\common\Minimal\flop.c Common_Demo_Tasks\Minimal
|
||||
copy ..\common\Minimal\integer.c Common_Demo_Tasks\Minimal
|
||||
copy ..\common\Minimal\PollQ.c Common_Demo_Tasks\Minimal
|
||||
copy ..\common\Minimal\semtest.c Common_Demo_Tasks\Minimal
|
||||
|
||||
REM Copy the common demo file headers.
|
||||
copy ..\common\include\*.* Common_Demo_Tasks\include
|
||||
|
||||
: END
|
||||
@ -1,128 +0,0 @@
|
||||
/*
|
||||
FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* If you are: *
|
||||
* *
|
||||
* + New to FreeRTOS, *
|
||||
* + Wanting to learn FreeRTOS or multitasking in general quickly *
|
||||
* + Looking for basic training, *
|
||||
* + Wanting to improve your FreeRTOS skills and productivity *
|
||||
* *
|
||||
* then take a look at the FreeRTOS eBook *
|
||||
* *
|
||||
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
* A pdf reference manual is also available. Both are usually delivered *
|
||||
* to your inbox within 20 minutes to two hours when purchased between 8am *
|
||||
* and 8pm GMT (although please allow up to 24 hours in case of *
|
||||
* exceptional circumstances). Thank you for your support! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
***NOTE*** The exception to the GPL is included to allow you to distribute
|
||||
a combined work that includes FreeRTOS without being obliged to provide the
|
||||
source code for proprietary components outside of the FreeRTOS kernel.
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
|
||||
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
more details. You should have received a copy of the GNU General Public
|
||||
License and the FreeRTOS license exception along with FreeRTOS; if not it
|
||||
can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
||||
by writing to Richard Barry, contact details for whom are available on the
|
||||
FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, latest information, license and
|
||||
contact details.
|
||||
|
||||
http://www.SafeRTOS.com - A version that is certified for use in safety
|
||||
critical systems.
|
||||
|
||||
http://www.OpenRTOS.com - Commercial support, development, porting,
|
||||
licensing and training services.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
#define FREERTOS_CONFIG_H
|
||||
|
||||
#define BOARD 1
|
||||
|
||||
#include "board.h"
|
||||
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Application specific definitions.
|
||||
*
|
||||
* These definitions should be adjusted for your particular hardware and
|
||||
* application requirements.
|
||||
*
|
||||
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
||||
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
|
||||
*
|
||||
* See http://www.freertos.org/a00110.html.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configUSE_IDLE_HOOK 0
|
||||
#define configUSE_TICK_HOOK 0
|
||||
#define configCPU_CLOCK_HZ ( FOSC0 ) /* Hz clk gen */
|
||||
#define configPBA_CLOCK_HZ ( FOSC0 )
|
||||
#define configTICK_RATE_HZ ( ( portTickType ) 1000 )
|
||||
#define configMAX_PRIORITIES ( ( unsigned portBASE_TYPE ) 8 )
|
||||
#define configMINIMAL_STACK_SIZE ( ( unsigned short ) 128 )
|
||||
/* configTOTAL_HEAP_SIZE is not used when heap_3.c is used. */
|
||||
#define configTOTAL_HEAP_SIZE ( ( size_t ) ( 1024*25 ) )
|
||||
#define configMAX_TASK_NAME_LEN ( 16 )
|
||||
#define configUSE_TRACE_FACILITY 0
|
||||
#define configUSE_16_BIT_TICKS 0
|
||||
#define configIDLE_SHOULD_YIELD 1
|
||||
|
||||
/* Co-routine definitions. */
|
||||
#define configUSE_CO_ROUTINES 0
|
||||
#define configMAX_CO_ROUTINE_PRIORITIES ( 0 )
|
||||
|
||||
/* Set the following definitions to 1 to include the API function, or zero
|
||||
to exclude the API function. */
|
||||
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskCleanUpResources 0
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_xTaskGetCurrentTaskHandle 0
|
||||
#define INCLUDE_xTaskGetSchedulerState 1
|
||||
|
||||
/* configHEAP_INIT is a boolean indicating whether to initialize the heap with
|
||||
0xA5 in order to be able to determine the maximal heap consumption. */
|
||||
#define configHEAP_INIT 0
|
||||
|
||||
/* Debug trace configuration.
|
||||
configDBG is a boolean indicating whether to activate the debug trace. */
|
||||
/* EVK1100 Board Definitions. */
|
||||
#define configDBG 1
|
||||
#define configDBG_USART (&AVR32_USART1)
|
||||
#define configDBG_USART_RX_PIN AVR32_USART1_RXD_0_0_PIN
|
||||
#define configDBG_USART_RX_FUNCTION AVR32_USART1_RXD_0_0_FUNCTION
|
||||
#define configDBG_USART_TX_PIN AVR32_USART1_TXD_0_0_PIN
|
||||
#define configDBG_USART_TX_FUNCTION AVR32_USART1_TXD_0_0_FUNCTION
|
||||
#define configDBG_USART_BAUDRATE 57600
|
||||
#define serialPORT_USART (&AVR32_USART1)
|
||||
#define serialPORT_USART_RX_PIN AVR32_USART1_RXD_0_0_PIN
|
||||
#define serialPORT_USART_RX_FUNCTION AVR32_USART1_RXD_0_0_FUNCTION
|
||||
#define serialPORT_USART_TX_PIN AVR32_USART1_TXD_0_0_PIN
|
||||
#define serialPORT_USART_TX_FUNCTION AVR32_USART1_TXD_0_0_FUNCTION
|
||||
#define serialPORT_USART_IRQ AVR32_USART1_IRQ
|
||||
#define serialPORT_USART_BAUDRATE 57600
|
||||
#endif /* FREERTOS_CONFIG_H */
|
||||
@ -1,117 +0,0 @@
|
||||
/*This file has been prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief FreeRTOS LEDs Management for AVR32 UC3.
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of ATMEL may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
|
||||
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#include <avr32/io.h>
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
#include "partest.h"
|
||||
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Simple parallel port IO routines.
|
||||
*-----------------------------------------------------------*/
|
||||
|
||||
#define partstALL_OUTPUTS_OFF ( ( unsigned portCHAR ) 0x00 )
|
||||
#if( BOARD==EVK1100 )
|
||||
# define partstMAX_OUTPUT_LED ( ( unsigned portCHAR ) 8 )
|
||||
|
||||
#elif( BOARD==EVK1101 )
|
||||
# define partstMAX_OUTPUT_LED ( ( unsigned portCHAR ) 4 )
|
||||
#endif
|
||||
|
||||
static volatile unsigned portCHAR ucCurrentOutputValue = partstALL_OUTPUTS_OFF; /*lint !e956 File scope parameters okay here. */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vParTestInitialise( void )
|
||||
{
|
||||
LED_Display( partstALL_OUTPUTS_OFF ); /* Start with all LEDs off. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vParTestSetLED( unsigned portBASE_TYPE uxLED, signed portBASE_TYPE xValue )
|
||||
{
|
||||
unsigned portCHAR ucBit;
|
||||
|
||||
if( uxLED >= partstMAX_OUTPUT_LED )
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
ucBit = ( ( unsigned portCHAR ) 1 ) << uxLED;
|
||||
|
||||
vTaskSuspendAll();
|
||||
{
|
||||
if( xValue == pdTRUE )
|
||||
{
|
||||
ucCurrentOutputValue |= ucBit;
|
||||
}
|
||||
else
|
||||
{
|
||||
ucCurrentOutputValue &= ~ucBit;
|
||||
}
|
||||
|
||||
LED_Display(ucCurrentOutputValue);
|
||||
}
|
||||
xTaskResumeAll();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vParTestToggleLED( unsigned portBASE_TYPE uxLED )
|
||||
{
|
||||
unsigned portCHAR ucBit;
|
||||
|
||||
if( uxLED >= partstMAX_OUTPUT_LED )
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
ucBit = ( ( unsigned portCHAR ) 1 ) << uxLED;
|
||||
|
||||
vTaskSuspendAll();
|
||||
{
|
||||
ucCurrentOutputValue ^= ucBit;
|
||||
LED_Display(ucCurrentOutputValue);
|
||||
}
|
||||
xTaskResumeAll();
|
||||
}
|
||||
@ -1,61 +0,0 @@
|
||||
/*
|
||||
FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* If you are: *
|
||||
* *
|
||||
* + New to FreeRTOS, *
|
||||
* + Wanting to learn FreeRTOS or multitasking in general quickly *
|
||||
* + Looking for basic training, *
|
||||
* + Wanting to improve your FreeRTOS skills and productivity *
|
||||
* *
|
||||
* then take a look at the FreeRTOS eBook *
|
||||
* *
|
||||
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
* A pdf reference manual is also available. Both are usually delivered *
|
||||
* to your inbox within 20 minutes to two hours when purchased between 8am *
|
||||
* and 8pm GMT (although please allow up to 24 hours in case of *
|
||||
* exceptional circumstances). Thank you for your support! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
***NOTE*** The exception to the GPL is included to allow you to distribute
|
||||
a combined work that includes FreeRTOS without being obliged to provide the
|
||||
source code for proprietary components outside of the FreeRTOS kernel.
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
|
||||
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
more details. You should have received a copy of the GNU General Public
|
||||
License and the FreeRTOS license exception along with FreeRTOS; if not it
|
||||
can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
||||
by writing to Richard Barry, contact details for whom are available on the
|
||||
FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, latest information, license and
|
||||
contact details.
|
||||
|
||||
http://www.SafeRTOS.com - A version that is certified for use in safety
|
||||
critical systems.
|
||||
|
||||
http://www.OpenRTOS.com - Commercial support, development, porting,
|
||||
licensing and training services.
|
||||
*/
|
||||
|
||||
#ifndef REG_TEST_H
|
||||
#define REG_TEST_H
|
||||
|
||||
void vStartRegTestTasks( void );
|
||||
portBASE_TYPE xAreRegTestTasksStillRunning( void );
|
||||
|
||||
#endif
|
||||
|
||||
@ -1,119 +0,0 @@
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file ******************************************************************
|
||||
*
|
||||
* \brief ISP configuration file.
|
||||
*
|
||||
* This file contains the possible external configuration of the ISP.
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices with a USB module can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
***************************************************************************/
|
||||
|
||||
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of ATMEL may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
|
||||
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _CONF_ISP_H_
|
||||
#define _CONF_ISP_H_
|
||||
|
||||
#include <avr32/io.h>
|
||||
#include "compiler.h"
|
||||
|
||||
|
||||
//_____ D E F I N I T I O N S ______________________________________________
|
||||
|
||||
#define PRODUCT_MANUFACTURER_ID 0x58
|
||||
#define PRODUCT_FAMILY_ID 0x20
|
||||
|
||||
#define ISP_VERSION 0x00
|
||||
#define ISP_ID0 0x00
|
||||
#define ISP_ID1 0x00
|
||||
|
||||
#define ISP_GPFB_FORCE 31
|
||||
#define ISP_GPFB_FORCE_MASK 0x80000000
|
||||
#define ISP_GPFB_FORCE_OFFSET 31
|
||||
#define ISP_GPFB_FORCE_SIZE 1
|
||||
|
||||
#define ISP_GPFB_IO_COND_EN 30
|
||||
#define ISP_GPFB_IO_COND_EN_MASK 0x40000000
|
||||
#define ISP_GPFB_IO_COND_EN_OFFSET 30
|
||||
#define ISP_GPFB_IO_COND_EN_SIZE 1
|
||||
|
||||
#define ISP_GPFB_BOD_EN 29
|
||||
#define ISP_GPFB_BOD_EN_MASK 0x20000000
|
||||
#define ISP_GPFB_BOD_EN_OFFSET 29
|
||||
#define ISP_GPFB_BOD_EN_SIZE 1
|
||||
|
||||
#define ISP_CFG (*(volatile U32 *)ISP_CFG_ADDRESS)
|
||||
#define ISP_CFG_ADDRESS (AVR32_FLASHC_USER_PAGE_ADDRESS + ISP_CFG_OFFSET)
|
||||
#define ISP_CFG_OFFSET 0x000001FC
|
||||
#define ISP_CFG_SIZE 4
|
||||
|
||||
#define ISP_CFG_BOOT_KEY 17
|
||||
#define ISP_CFG_BOOT_KEY_MASK 0xFFFE0000
|
||||
#define ISP_CFG_BOOT_KEY_OFFSET 17
|
||||
#define ISP_CFG_BOOT_KEY_SIZE 15
|
||||
#define ISP_CFG_BOOT_KEY_VALUE 0x494F
|
||||
|
||||
#define ISP_CFG_IO_COND_LEVEL 16
|
||||
#define ISP_CFG_IO_COND_LEVEL_MASK 0x00010000
|
||||
#define ISP_CFG_IO_COND_LEVEL_OFFSET 16
|
||||
#define ISP_CFG_IO_COND_LEVEL_SIZE 1
|
||||
|
||||
#define ISP_CFG_IO_COND_PIN 8
|
||||
#define ISP_CFG_IO_COND_PIN_MASK 0x0000FF00
|
||||
#define ISP_CFG_IO_COND_PIN_OFFSET 8
|
||||
#define ISP_CFG_IO_COND_PIN_SIZE 8
|
||||
|
||||
#define ISP_CFG_CRC8 0
|
||||
#define ISP_CFG_CRC8_MASK 0x000000FF
|
||||
#define ISP_CFG_CRC8_OFFSET 0
|
||||
#define ISP_CFG_CRC8_SIZE 8
|
||||
#define ISP_CFG_CRC8_POLYNOMIAL 0x107
|
||||
|
||||
#define ISP_KEY (*(volatile U32 *)ISP_KEY_ADDRESS)
|
||||
#define ISP_KEY_ADDRESS (AVR32_SRAM_ADDRESS + ISP_KEY_OFFSET)
|
||||
#define ISP_KEY_OFFSET 0x00000000
|
||||
#define ISP_KEY_SIZE 4
|
||||
#define ISP_KEY_VALUE ('I' << 24 | 'S' << 16 | 'P' << 8 | 'K')
|
||||
|
||||
#ifndef ISP_OSC
|
||||
#define ISP_OSC 0
|
||||
#endif
|
||||
|
||||
#define DFU_FRAME_LENGTH 2048
|
||||
|
||||
#define PROGRAM_START_ADDRESS (AVR32_FLASH_ADDRESS + PROGRAM_START_OFFSET)
|
||||
#define PROGRAM_START_OFFSET 0x00002000
|
||||
|
||||
|
||||
#endif // _CONF_ISP_H_
|
||||
@ -1,239 +0,0 @@
|
||||
/* This file is part of the ATMEL AVR32-SoftwareFramework-AT32UC3-1.5.0 Release */
|
||||
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief Exception and interrupt vectors.
|
||||
*
|
||||
* This file maps all events supported by an AVR32.
|
||||
*
|
||||
* - Compiler: GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices with an INTC module can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice, this
|
||||
* list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an Atmel
|
||||
* AVR product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
|
||||
*
|
||||
*/
|
||||
|
||||
#if !__AVR32_UC__ && !__AVR32_AP__
|
||||
#error Implementation of the AVR32 architecture not supported by the INTC driver.
|
||||
#endif
|
||||
|
||||
|
||||
#include <avr32/io.h>
|
||||
|
||||
|
||||
//! @{
|
||||
//! \verbatim
|
||||
|
||||
|
||||
.section .exception, "ax", @progbits
|
||||
|
||||
|
||||
// Start of Exception Vector Table.
|
||||
|
||||
// EVBA must be aligned with a power of two strictly greater than the EVBA-
|
||||
// relative offset of the last vector.
|
||||
.balign 0x200
|
||||
|
||||
// Export symbol.
|
||||
.global _evba
|
||||
.type _evba, @function
|
||||
_evba:
|
||||
|
||||
.org 0x000
|
||||
// Unrecoverable Exception.
|
||||
_handle_Unrecoverable_Exception:
|
||||
rjmp $
|
||||
|
||||
.org 0x004
|
||||
// TLB Multiple Hit.
|
||||
_handle_TLB_Multiple_Hit:
|
||||
rjmp $
|
||||
|
||||
.org 0x008
|
||||
// Bus Error Data Fetch.
|
||||
_handle_Bus_Error_Data_Fetch:
|
||||
rjmp $
|
||||
|
||||
.org 0x00C
|
||||
// Bus Error Instruction Fetch.
|
||||
_handle_Bus_Error_Instruction_Fetch:
|
||||
rjmp $
|
||||
|
||||
.org 0x010
|
||||
// NMI.
|
||||
_handle_NMI:
|
||||
rjmp $
|
||||
|
||||
.org 0x014
|
||||
// Instruction Address.
|
||||
_handle_Instruction_Address:
|
||||
rjmp $
|
||||
|
||||
.org 0x018
|
||||
// ITLB Protection.
|
||||
_handle_ITLB_Protection:
|
||||
rjmp $
|
||||
|
||||
.org 0x01C
|
||||
// Breakpoint.
|
||||
_handle_Breakpoint:
|
||||
rjmp $
|
||||
|
||||
.org 0x020
|
||||
// Illegal Opcode.
|
||||
_handle_Illegal_Opcode:
|
||||
rjmp $
|
||||
|
||||
.org 0x024
|
||||
// Unimplemented Instruction.
|
||||
_handle_Unimplemented_Instruction:
|
||||
rjmp $
|
||||
|
||||
.org 0x028
|
||||
// Privilege Violation.
|
||||
_handle_Privilege_Violation:
|
||||
rjmp $
|
||||
|
||||
.org 0x02C
|
||||
// Floating-Point: UNUSED IN AVR32UC and AVR32AP.
|
||||
_handle_Floating_Point:
|
||||
rjmp $
|
||||
|
||||
.org 0x030
|
||||
// Coprocessor Absent: UNUSED IN AVR32UC.
|
||||
_handle_Coprocessor_Absent:
|
||||
rjmp $
|
||||
|
||||
.org 0x034
|
||||
// Data Address (Read).
|
||||
_handle_Data_Address_Read:
|
||||
rjmp $
|
||||
|
||||
.org 0x038
|
||||
// Data Address (Write).
|
||||
_handle_Data_Address_Write:
|
||||
rjmp $
|
||||
|
||||
.org 0x03C
|
||||
// DTLB Protection (Read).
|
||||
_handle_DTLB_Protection_Read:
|
||||
rjmp $
|
||||
|
||||
.org 0x040
|
||||
// DTLB Protection (Write).
|
||||
_handle_DTLB_Protection_Write:
|
||||
rjmp $
|
||||
|
||||
.org 0x044
|
||||
// DTLB Modified: UNUSED IN AVR32UC.
|
||||
_handle_DTLB_Modified:
|
||||
rjmp $
|
||||
|
||||
.org 0x050
|
||||
// ITLB Miss.
|
||||
_handle_ITLB_Miss:
|
||||
rjmp $
|
||||
|
||||
.org 0x060
|
||||
// DTLB Miss (Read).
|
||||
_handle_DTLB_Miss_Read:
|
||||
rjmp $
|
||||
|
||||
.org 0x070
|
||||
// DTLB Miss (Write).
|
||||
_handle_DTLB_Miss_Write:
|
||||
rjmp $
|
||||
|
||||
.org 0x100
|
||||
// Supervisor Call.
|
||||
_handle_Supervisor_Call:
|
||||
lda.w pc, SCALLYield
|
||||
|
||||
|
||||
// Interrupt support.
|
||||
// The interrupt controller must provide the offset address relative to EVBA.
|
||||
// Important note:
|
||||
// All interrupts call a C function named _get_interrupt_handler.
|
||||
// This function will read group and interrupt line number to then return in
|
||||
// R12 a pointer to a user-provided interrupt handler.
|
||||
|
||||
.balign 4
|
||||
|
||||
.irp priority, 0, 1, 2, 3
|
||||
_int\priority:
|
||||
#if __AVR32_UC__
|
||||
// R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
|
||||
// CPU upon interrupt entry. No other register is saved by hardware.
|
||||
#elif __AVR32_AP__
|
||||
// PC and SR are automatically saved in respectively RAR_INTx and RSR_INTx by
|
||||
// the CPU upon interrupt entry. No other register is saved by hardware.
|
||||
pushm r8-r12, lr
|
||||
#endif
|
||||
mov r12, \priority // Pass the int_level parameter to the _get_interrupt_handler function.
|
||||
call _get_interrupt_handler
|
||||
cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
|
||||
#if __AVR32_UC__
|
||||
movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
|
||||
#elif __AVR32_AP__
|
||||
breq spint\priority // If this was a spurious interrupt (R12 == NULL), branch.
|
||||
st.w --sp, r12 // Push the pointer to the interrupt handler onto the system stack since no register may be altered.
|
||||
popm r8-r12, lr, pc // Restore registers and jump to the handler.
|
||||
spint\priority:
|
||||
popm r8-r12, lr
|
||||
#endif
|
||||
rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
|
||||
.endr
|
||||
|
||||
|
||||
// Constant data area.
|
||||
|
||||
.balign 4
|
||||
|
||||
// Values to store in the interrupt priority registers for the various interrupt priority levels.
|
||||
// The interrupt priority registers contain the interrupt priority level and
|
||||
// the EVBA-relative interrupt vector offset.
|
||||
.global ipr_val
|
||||
.type ipr_val, @object
|
||||
ipr_val:
|
||||
.word (AVR32_INTC_INT0 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int0 - _evba),\
|
||||
(AVR32_INTC_INT1 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int1 - _evba),\
|
||||
(AVR32_INTC_INT2 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int2 - _evba),\
|
||||
(AVR32_INTC_INT3 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int3 - _evba)
|
||||
|
||||
|
||||
//! \endverbatim
|
||||
//! @}
|
||||
@ -1,278 +0,0 @@
|
||||
/*
|
||||
FreeRTOS V6.0.5 - Copyright (C) 2010 Real Time Engineers Ltd.
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* If you are: *
|
||||
* *
|
||||
* + New to FreeRTOS, *
|
||||
* + Wanting to learn FreeRTOS or multitasking in general quickly *
|
||||
* + Looking for basic training, *
|
||||
* + Wanting to improve your FreeRTOS skills and productivity *
|
||||
* *
|
||||
* then take a look at the FreeRTOS eBook *
|
||||
* *
|
||||
* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
* A pdf reference manual is also available. Both are usually delivered *
|
||||
* to your inbox within 20 minutes to two hours when purchased between 8am *
|
||||
* and 8pm GMT (although please allow up to 24 hours in case of *
|
||||
* exceptional circumstances). Thank you for your support! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
||||
***NOTE*** The exception to the GPL is included to allow you to distribute
|
||||
a combined work that includes FreeRTOS without being obliged to provide the
|
||||
source code for proprietary components outside of the FreeRTOS kernel.
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
|
||||
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
more details. You should have received a copy of the GNU General Public
|
||||
License and the FreeRTOS license exception along with FreeRTOS; if not it
|
||||
can be viewed here: http://www.freertos.org/a00114.html and also obtained
|
||||
by writing to Richard Barry, contact details for whom are available on the
|
||||
FreeRTOS WEB site.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, latest information, license and
|
||||
contact details.
|
||||
|
||||
http://www.SafeRTOS.com - A version that is certified for use in safety
|
||||
critical systems.
|
||||
|
||||
http://www.OpenRTOS.com - Commercial support, development, porting,
|
||||
licensing and training services.
|
||||
*/
|
||||
|
||||
/*
|
||||
* This is a simple demo that creates a number of tasks from a pool of
|
||||
* 'standard demo tasks' which are used by all the FreeRTOS port demos. The
|
||||
* standard demo tasks don't provide any useful functionality other than to
|
||||
* demonstrate the FreeRTOS API being used and show how the scheduler behaves.
|
||||
*
|
||||
* A COM test is included whereby one task transmits characters on the UART
|
||||
* which are then received by another task. A loopback connector is required
|
||||
* on the UART1 connector for this test to pass (pins 2 and 3 need to be
|
||||
* connected together - a paper clip is usually all that is required). LED
|
||||
* 5 red and green are under the control of the COM test tasks. Red will toggle
|
||||
* each time a character is successfully transmitted, and the green LED toggles
|
||||
* for each received character.
|
||||
*
|
||||
* In addition this file creates a 'Check' task. This periodically inspects
|
||||
* the standard demo tasks and makes a few other simple tests to see if the
|
||||
* system is performing as expected. The check task toggles LED 6 green every
|
||||
* 3 seconds provided no errors exist and sets it to red if an error has
|
||||
* occurred. The toggle rate will increase to 500ms if an error is detected
|
||||
* at any time. This mechanism can be tested by removing the loopback
|
||||
* connector from UART1, and in so doing deliberately generating an error in
|
||||
* the COM test task.
|
||||
*
|
||||
* LED 1 through 4 are controlled by simple LED flashing tasks. Each should
|
||||
* toggle at a fixed but different frequency.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
|
||||
/* Environment header files. */
|
||||
#include "pm.h"
|
||||
|
||||
/* Scheduler header files. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
|
||||
/* Demo file headers. */
|
||||
#include "partest.h"
|
||||
#include "serial.h"
|
||||
#include "integer.h"
|
||||
#include "comtest.h"
|
||||
#include "PollQ.h"
|
||||
#include "semtest.h"
|
||||
#include "dynamic.h"
|
||||
#include "BlockQ.h"
|
||||
#include "death.h"
|
||||
#include "flop.h"
|
||||
#include "flash.h"
|
||||
|
||||
/* Task priorities. */
|
||||
#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
|
||||
#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )
|
||||
#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )
|
||||
#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )
|
||||
#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 3 )
|
||||
#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 4 )
|
||||
#define mainCREATOR_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
|
||||
#define mainFLASH_TASK_PRIORITY ( tskIDLE_PRIORITY + 1 )
|
||||
|
||||
/* Baud rate used by the loopback test task. */
|
||||
#define mainCOM_TEST_BAUD_RATE ( ( unsigned long ) 38400 )
|
||||
|
||||
/* LED used by the serial port tasks. This is toggled on each character Tx,
|
||||
and mainCOM_TEST_LED + 1 is toggled on each character Rx. */
|
||||
#define mainCOM_TEST_LED ( 4 )
|
||||
|
||||
/* LED that is toggled by the check task. The check task periodically checks
|
||||
that all the other tasks are operating without error. If an error is found at
|
||||
any time the LED toggle frequency increases. */
|
||||
#define mainCHECK_TASK_LED ( 6 )
|
||||
|
||||
/* The frequency at which the check task executes assuming no errors have been
|
||||
found. portTICK_RATE_MS is used to convert milliseconds to ticks, depending on
|
||||
the tick frequency. */
|
||||
#define mainNO_ERROR_FLASH_RATE ( ( portTickType ) 3000 / portTICK_RATE_MS )
|
||||
|
||||
/* The frequency at which the check task executes if an error has been found
|
||||
in any of the demo tasks. */
|
||||
#define mainERROR_FLASH_RATE ( (portTickType) 500 / portTICK_RATE_MS )
|
||||
|
||||
/* The LED to use by the simple flash task. */
|
||||
#define mainSIMPLE_FLASH_LED ( 0 )
|
||||
|
||||
/* The frequency of the simple flashing LED. */
|
||||
#define mainSIMPLE_FLASH_RATE ( ( portTickType ) 200 / portTICK_RATE_MS )
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* The 'Check' task that executes at the highest priority and calls
|
||||
* prvCheckOtherTasksAreStillRunning(). See the description at the top
|
||||
* of the file.
|
||||
*/
|
||||
static void prvErrorChecks( void *pvParameters );
|
||||
|
||||
/*
|
||||
* Checks that all the demo application tasks are still executing without error
|
||||
* - as described at the top of the file.
|
||||
*/
|
||||
static portBASE_TYPE prvCheckOtherTasksAreStillRunning( void );
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
int main( void )
|
||||
{
|
||||
/* Start the crystal oscillator 0 and switch the main clock to it. */
|
||||
pm_switch_to_osc0(&AVR32_PM, FOSC0, OSC0_STARTUP);
|
||||
|
||||
/* Setup the LED's for output. */
|
||||
vParTestInitialise();
|
||||
|
||||
/* Start the standard demo tasks. */
|
||||
vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainCOM_TEST_BAUD_RATE, mainCOM_TEST_LED );
|
||||
vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
|
||||
vStartIntegerMathTasks( tskIDLE_PRIORITY );
|
||||
vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
|
||||
vStartDynamicPriorityTasks();
|
||||
vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
|
||||
vStartMathTasks( tskIDLE_PRIORITY );
|
||||
vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
|
||||
|
||||
/* Start the demo tasks defined within this file, first the check
|
||||
task as described at the top of this file. */
|
||||
xTaskCreate( prvErrorChecks, /* The function that implements the task. */
|
||||
( const signed char * ) "ErrCheck", /* The name of the task. The kernel does not use this, its just to facilitate debugging. */
|
||||
configMINIMAL_STACK_SIZE, /* The size of the stack (in words) that should be allocated to the task. */
|
||||
NULL, /* No task parameter is being used. */
|
||||
mainCHECK_TASK_PRIORITY, /* The priority to assign to the task, 0 being the lowest priority, configMAX_PRIORITIES - 1 being the highest priority. */
|
||||
NULL ); /* Not interested in receiving a handle to the task being created, so just passing in NULL. */
|
||||
|
||||
/* This task has to be created last as it keeps account of the number of
|
||||
tasks it expects to see running. */
|
||||
vCreateSuicidalTasks( mainCREATOR_TASK_PRIORITY );
|
||||
|
||||
/* Start the scheduler. */
|
||||
vTaskStartScheduler();
|
||||
|
||||
/* Will only get here if there was insufficient memory to create the idle
|
||||
task. */
|
||||
for( ;; );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static void prvErrorChecks( void *pvParameters )
|
||||
{
|
||||
portTickType xDelayPeriod = mainNO_ERROR_FLASH_RATE;
|
||||
|
||||
/* The parameters are not used. Prevent compiler warnings. */
|
||||
( void ) pvParameters;
|
||||
|
||||
/* Cycle for ever, delaying then checking all the other tasks are still
|
||||
operating without error. */
|
||||
vParTestSetLED( mainCHECK_TASK_LED, pdFALSE );
|
||||
|
||||
for( ;; )
|
||||
{
|
||||
/* Delay until it is time to execute again. */
|
||||
vTaskDelay( xDelayPeriod );
|
||||
|
||||
/* Check all other tasks are still operating without error.
|
||||
Check that vMemCheckTask did increment the counter. */
|
||||
if( prvCheckOtherTasksAreStillRunning() != pdPASS )
|
||||
{
|
||||
/* An error has occurred in one of the tasks. Increase the
|
||||
frequency at which this task executes and in so doing increase
|
||||
the rate at which the mainCHECK_TASK_LED toggles. */
|
||||
xDelayPeriod = mainERROR_FLASH_RATE;
|
||||
vParTestSetLED( mainCHECK_TASK_LED, pdTRUE );
|
||||
}
|
||||
|
||||
/* Toggle the LED - the frequency of the LED toggle indicates the
|
||||
health of the system. */
|
||||
vParTestToggleLED( mainCHECK_TASK_LED + 1 );
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
static portBASE_TYPE prvCheckOtherTasksAreStillRunning( void )
|
||||
{
|
||||
portBASE_TYPE xStatus = pdPASS;
|
||||
|
||||
if( xAreComTestTasksStillRunning() != pdPASS )
|
||||
{
|
||||
xStatus = pdFAIL;
|
||||
}
|
||||
|
||||
if( xArePollingQueuesStillRunning() != pdPASS )
|
||||
{
|
||||
xStatus = pdFAIL;
|
||||
}
|
||||
|
||||
if( xAreIntegerMathsTaskStillRunning() != pdPASS )
|
||||
{
|
||||
xStatus = pdFAIL;
|
||||
}
|
||||
|
||||
if( xAreSemaphoreTasksStillRunning() != pdPASS )
|
||||
{
|
||||
xStatus = pdFAIL;
|
||||
}
|
||||
|
||||
if( xAreBlockingQueuesStillRunning() != pdPASS )
|
||||
{
|
||||
xStatus = pdFAIL;
|
||||
}
|
||||
|
||||
if( xAreDynamicPriorityTasksStillRunning() != pdPASS )
|
||||
{
|
||||
xStatus = pdFAIL;
|
||||
}
|
||||
|
||||
if( xAreMathsTaskStillRunning() != pdPASS )
|
||||
{
|
||||
xStatus = pdFAIL;
|
||||
}
|
||||
|
||||
if( xIsCreateTaskStillRunning() != pdPASS )
|
||||
{
|
||||
xStatus = pdFAIL;
|
||||
}
|
||||
|
||||
return xStatus;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
@ -1,373 +0,0 @@
|
||||
/*This file has been prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief FreeRTOS Serial Port management example for AVR32 UC3.
|
||||
*
|
||||
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32 devices can be used.
|
||||
* - AppNote:
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of ATMEL may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
|
||||
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER FOR USART.
|
||||
*/
|
||||
|
||||
/* Scheduler includes. */
|
||||
#include "FreeRTOS.h"
|
||||
#include "queue.h"
|
||||
#include "task.h"
|
||||
|
||||
/* Demo application includes. */
|
||||
#include "serial.h"
|
||||
#include <avr32/io.h>
|
||||
#include "board.h"
|
||||
#include "gpio.h"
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Constants to setup and access the USART. */
|
||||
#define serINVALID_COMPORT_HANDLER ( ( xComPortHandle ) 0 )
|
||||
#define serINVALID_QUEUE ( ( xQueueHandle ) 0 )
|
||||
#define serHANDLE ( ( xComPortHandle ) 1 )
|
||||
#define serNO_BLOCK ( ( portTickType ) 0 )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Queues used to hold received characters, and characters waiting to be
|
||||
transmitted. */
|
||||
static xQueueHandle xRxedChars;
|
||||
static xQueueHandle xCharsForTx;
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Forward declaration. */
|
||||
static void vprvSerialCreateQueues( unsigned portBASE_TYPE uxQueueLength,
|
||||
xQueueHandle *pxRxedChars,
|
||||
xQueueHandle *pxCharsForTx );
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#if __GNUC__
|
||||
__attribute__((__noinline__))
|
||||
#elif __ICCAVR32__
|
||||
#pragma optimize = no_inline
|
||||
#endif
|
||||
|
||||
static portBASE_TYPE prvUSART_ISR_NonNakedBehaviour( void )
|
||||
{
|
||||
/* Now we can declare the local variables. */
|
||||
signed portCHAR cChar;
|
||||
portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
|
||||
unsigned portLONG ulStatus;
|
||||
volatile avr32_usart_t *usart = serialPORT_USART;
|
||||
portBASE_TYPE retstatus;
|
||||
|
||||
/* What caused the interrupt? */
|
||||
ulStatus = usart->csr & usart->imr;
|
||||
|
||||
if (ulStatus & AVR32_USART_CSR_TXRDY_MASK)
|
||||
{
|
||||
/* The interrupt was caused by the THR becoming empty. Are there any
|
||||
more characters to transmit?
|
||||
Because FreeRTOS is not supposed to run with nested interrupts, put all OS
|
||||
calls in a critical section . */
|
||||
portENTER_CRITICAL();
|
||||
retstatus = xQueueReceiveFromISR( xCharsForTx, &cChar, &xHigherPriorityTaskWoken );
|
||||
portEXIT_CRITICAL();
|
||||
|
||||
if (retstatus == pdTRUE)
|
||||
{
|
||||
/* A character was retrieved from the queue so can be sent to the
|
||||
THR now. */
|
||||
usart->thr = cChar;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Queue empty, nothing to send so turn off the Tx interrupt. */
|
||||
usart->idr = AVR32_USART_IDR_TXRDY_MASK;
|
||||
}
|
||||
}
|
||||
|
||||
if (ulStatus & AVR32_USART_CSR_RXRDY_MASK)
|
||||
{
|
||||
/* The interrupt was caused by the receiver getting data. */
|
||||
cChar = usart->rhr; //TODO
|
||||
|
||||
/* Because FreeRTOS is not supposed to run with nested interrupts, put all OS
|
||||
calls in a critical section . */
|
||||
portENTER_CRITICAL();
|
||||
xQueueSendFromISR(xRxedChars, &cChar, &xHigherPriorityTaskWoken);
|
||||
portEXIT_CRITICAL();
|
||||
}
|
||||
|
||||
/* The return value will be used by portEXIT_SWITCHING_ISR() to know if it
|
||||
should perform a vTaskSwitchContext(). */
|
||||
return ( xHigherPriorityTaskWoken );
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* USART interrupt service routine.
|
||||
*/
|
||||
#if __GNUC__
|
||||
__attribute__((__naked__))
|
||||
#elif __ICCAVR32__
|
||||
#pragma shadow_registers = full // Naked.
|
||||
#endif
|
||||
|
||||
static void vUSART_ISR( void )
|
||||
{
|
||||
/* This ISR can cause a context switch, so the first statement must be a
|
||||
call to the portENTER_SWITCHING_ISR() macro. This must be BEFORE any
|
||||
variable declarations. */
|
||||
portENTER_SWITCHING_ISR();
|
||||
|
||||
prvUSART_ISR_NonNakedBehaviour();
|
||||
|
||||
/* Exit the ISR. If a task was woken by either a character being received
|
||||
or transmitted then a context switch will occur. */
|
||||
portEXIT_SWITCHING_ISR();
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
|
||||
/*
|
||||
* Init the serial port for the Minimal implementation.
|
||||
*/
|
||||
xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
|
||||
{
|
||||
static const gpio_map_t USART_GPIO_MAP =
|
||||
{
|
||||
{ serialPORT_USART_RX_PIN, serialPORT_USART_RX_FUNCTION },
|
||||
{ serialPORT_USART_TX_PIN, serialPORT_USART_TX_FUNCTION }
|
||||
};
|
||||
|
||||
xComPortHandle xReturn = serHANDLE;
|
||||
volatile avr32_usart_t *usart = serialPORT_USART;
|
||||
int cd; /* USART Clock Divider. */
|
||||
|
||||
/* Create the rx and tx queues. */
|
||||
vprvSerialCreateQueues( uxQueueLength, &xRxedChars, &xCharsForTx );
|
||||
|
||||
/* Configure USART. */
|
||||
if( ( xRxedChars != serINVALID_QUEUE ) &&
|
||||
( xCharsForTx != serINVALID_QUEUE ) &&
|
||||
( ulWantedBaud != ( unsigned portLONG ) 0 ) )
|
||||
{
|
||||
portENTER_CRITICAL();
|
||||
{
|
||||
/**
|
||||
** Reset USART.
|
||||
**/
|
||||
/* Disable all USART interrupt sources to begin... */
|
||||
usart->idr = 0xFFFFFFFF;
|
||||
|
||||
/* Reset mode and other registers that could cause unpredictable
|
||||
behaviour after reset */
|
||||
usart->mr = 0; /* Reset Mode register. */
|
||||
usart->rtor = 0; /* Reset Receiver Time-out register. */
|
||||
usart->ttgr = 0; /* Reset Transmitter Timeguard register. */
|
||||
|
||||
/* Shutdown RX and TX, reset status bits, reset iterations in CSR, reset NACK
|
||||
and turn off DTR and RTS */
|
||||
usart->cr = AVR32_USART_CR_RSTRX_MASK |
|
||||
AVR32_USART_CR_RSTTX_MASK |
|
||||
AVR32_USART_CR_RXDIS_MASK |
|
||||
AVR32_USART_CR_TXDIS_MASK |
|
||||
AVR32_USART_CR_RSTSTA_MASK |
|
||||
AVR32_USART_CR_RSTIT_MASK |
|
||||
AVR32_USART_CR_RSTNACK_MASK |
|
||||
AVR32_USART_CR_DTRDIS_MASK |
|
||||
AVR32_USART_CR_RTSDIS_MASK;
|
||||
|
||||
/**
|
||||
** Configure USART.
|
||||
**/
|
||||
/* Enable USART RXD & TXD pins. */
|
||||
gpio_enable_module( USART_GPIO_MAP, sizeof( USART_GPIO_MAP ) / sizeof( USART_GPIO_MAP[0] ) );
|
||||
|
||||
/* Set the USART baudrate to be as close as possible to the wanted baudrate. */
|
||||
/*
|
||||
* ** BAUDRATE CALCULATION **
|
||||
*
|
||||
* Selected Clock Selected Clock
|
||||
* baudrate = ---------------- or baudrate = ----------------
|
||||
* 16 x CD 8 x CD
|
||||
*
|
||||
* (with 16x oversampling) (with 8x oversampling)
|
||||
*/
|
||||
|
||||
if( ulWantedBaud < ( configCPU_CLOCK_HZ / 16 ) )
|
||||
{
|
||||
/* Use 8x oversampling */
|
||||
usart->mr |= (1<<AVR32_USART_MR_OVER_OFFSET);
|
||||
cd = configCPU_CLOCK_HZ / (8*ulWantedBaud);
|
||||
|
||||
if( cd < 2 )
|
||||
{
|
||||
return serINVALID_COMPORT_HANDLER;
|
||||
}
|
||||
|
||||
usart->brgr = (cd << AVR32_USART_BRGR_CD_OFFSET);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Use 16x oversampling */
|
||||
usart->mr &= ~(1<<AVR32_USART_MR_OVER_OFFSET);
|
||||
cd = configCPU_CLOCK_HZ / (16*ulWantedBaud);
|
||||
|
||||
if( cd > 65535 )
|
||||
{
|
||||
/* Baudrate is too low */
|
||||
return serINVALID_COMPORT_HANDLER;
|
||||
}
|
||||
}
|
||||
|
||||
usart->brgr = (cd << AVR32_USART_BRGR_CD_OFFSET);
|
||||
|
||||
/* Set the USART Mode register: Mode=Normal(0), Clk selection=MCK(0),
|
||||
CHRL=8, SYNC=0(asynchronous), PAR=None, NBSTOP=1, CHMODE=0, MSBF=0,
|
||||
MODE9=0, CKLO=0, OVER(previously done when setting the baudrate),
|
||||
other fields not used in this mode. */
|
||||
usart->mr |= ((8-5) << AVR32_USART_MR_CHRL_OFFSET ) |
|
||||
( 4 << AVR32_USART_MR_PAR_OFFSET ) |
|
||||
( 1 << AVR32_USART_MR_NBSTOP_OFFSET);
|
||||
|
||||
/* Write the Transmit Timeguard Register */
|
||||
usart->ttgr = 0;
|
||||
|
||||
|
||||
/* Register the USART interrupt handler to the interrupt controller and
|
||||
enable the USART interrupt. */
|
||||
INTC_register_interrupt((__int_handler)&vUSART_ISR, serialPORT_USART_IRQ, AVR32_INTC_INT1);
|
||||
|
||||
/* Enable USART interrupt sources (but not Tx for now)... */
|
||||
usart->ier = AVR32_USART_IER_RXRDY_MASK;
|
||||
|
||||
/* Enable receiver and transmitter... */
|
||||
usart->cr |= AVR32_USART_CR_TXEN_MASK | AVR32_USART_CR_RXEN_MASK;
|
||||
}
|
||||
portEXIT_CRITICAL();
|
||||
}
|
||||
else
|
||||
{
|
||||
xReturn = serINVALID_COMPORT_HANDLER;
|
||||
}
|
||||
|
||||
return xReturn;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
|
||||
{
|
||||
/* The port handle is not required as this driver only supports UART0. */
|
||||
( void ) pxPort;
|
||||
|
||||
/* Get the next character from the buffer. Return false if no characters
|
||||
are available, or arrive before xBlockTime expires. */
|
||||
if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
|
||||
{
|
||||
return pdTRUE;
|
||||
}
|
||||
else
|
||||
{
|
||||
return pdFALSE;
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vSerialPutString( xComPortHandle pxPort, const signed portCHAR * const pcString, unsigned portSHORT usStringLength )
|
||||
{
|
||||
signed portCHAR *pxNext;
|
||||
|
||||
/* NOTE: This implementation does not handle the queue being full as no
|
||||
block time is used! */
|
||||
|
||||
/* The port handle is not required as this driver only supports UART0. */
|
||||
( void ) pxPort;
|
||||
|
||||
/* Send each character in the string, one at a time. */
|
||||
pxNext = ( signed portCHAR * ) pcString;
|
||||
while( *pxNext )
|
||||
{
|
||||
xSerialPutChar( pxPort, *pxNext, serNO_BLOCK );
|
||||
pxNext++;
|
||||
}
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
|
||||
{
|
||||
volatile avr32_usart_t *usart = serialPORT_USART;
|
||||
|
||||
/* Place the character in the queue of characters to be transmitted. */
|
||||
if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
|
||||
{
|
||||
return pdFAIL;
|
||||
}
|
||||
|
||||
/* Turn on the Tx interrupt so the ISR will remove the character from the
|
||||
queue and send it. This does not need to be in a critical section as
|
||||
if the interrupt has already removed the character the next interrupt
|
||||
will simply turn off the Tx interrupt again. */
|
||||
usart->ier = (1 << AVR32_USART_IER_TXRDY_OFFSET);
|
||||
|
||||
return pdPASS;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
void vSerialClose( xComPortHandle xPort )
|
||||
{
|
||||
/* Not supported as not required by the demo application. */
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/*###########################################################*/
|
||||
|
||||
/*
|
||||
* Create the rx and tx queues.
|
||||
*/
|
||||
static void vprvSerialCreateQueues( unsigned portBASE_TYPE uxQueueLength, xQueueHandle *pxRxedChars, xQueueHandle *pxCharsForTx )
|
||||
{
|
||||
/* Create the queues used to hold Rx and Tx characters. */
|
||||
xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
|
||||
xCharsForTx = xQueueCreate( uxQueueLength + 1, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
|
||||
|
||||
/* Pass back a reference to the queues so the serial API file can
|
||||
post/receive characters. */
|
||||
*pxRxedChars = xRxedChars;
|
||||
*pxCharsForTx = xCharsForTx;
|
||||
}
|
||||
/*-----------------------------------------------------------*/
|
||||
@ -1,72 +0,0 @@
|
||||
/*This file is prepared for Doxygen automatic documentation generation.*/
|
||||
/*! \file *********************************************************************
|
||||
*
|
||||
* \brief AVR32 UC3 ISP trampoline.
|
||||
*
|
||||
* In order to be able to program a project with both BatchISP and JTAGICE mkII
|
||||
* without having to take the general-purpose fuses into consideration, add this
|
||||
* file to the project and change the program entry point to _trampoline.
|
||||
*
|
||||
* The pre-programmed ISP will be erased if JTAGICE mkII is used.
|
||||
*
|
||||
* - Compiler: GNU GCC for AVR32
|
||||
* - Supported devices: All AVR32UC devices can be used.
|
||||
*
|
||||
* \author Atmel Corporation: http://www.atmel.com \n
|
||||
* Support and FAQ: http://support.atmel.no/
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* Copyright (c) 2007, Atmel Corporation All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of ATMEL may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
|
||||
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
|
||||
#include "conf_isp.h"
|
||||
|
||||
|
||||
//! @{
|
||||
//! \verbatim
|
||||
|
||||
|
||||
// This must be linked @ 0x80000000 if it is to be run upon reset.
|
||||
.section .reset, "ax", @progbits
|
||||
|
||||
|
||||
.global _trampoline
|
||||
.type _trampoline, @function
|
||||
_trampoline:
|
||||
// Jump to program start.
|
||||
rjmp program_start
|
||||
|
||||
.org 0x00002000
|
||||
program_start:
|
||||
// Jump to the C runtime startup routine.
|
||||
lda.w pc, _stext
|
||||
|
||||
|
||||
//! \endverbatim
|
||||
//! @}
|
||||
Reference in New Issue
Block a user