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/*
FreeRTOS V7 .4 .2 - Copyright ( C ) 2013 Real Time Engineers Ltd .
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME . PLEASE VISIT
http : //www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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* *
* FreeRTOS tutorial books are available in pdf and paperback . *
* Complete , revised , and edited pdf reference manuals are also *
* available . *
* *
* Purchasing FreeRTOS documentation will not only help you , by *
* ensuring you get running as quickly as possible and with an *
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* the FreeRTOS project to continue with its mission of providing *
* professional grade , cross platform , de facto standard solutions *
* for microcontrollers - completely free of charge ! *
* *
* > > > See http : //www.FreeRTOS.org/Documentation for details. <<< *
* *
* Thank you for using FreeRTOS , and thank you for your support ! *
* *
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This file is part of the FreeRTOS distribution .
FreeRTOS is free software ; you can redistribute it and / or modify it under
the terms of the GNU General Public License ( version 2 ) as published by the
Free Software Foundation AND MODIFIED BY the FreeRTOS exception .
> > > > > > NOTE < < < < < < The modification to the GPL is included to allow you to
distribute a combined work that includes FreeRTOS without being obliged to
provide the source code for proprietary components outside of the FreeRTOS
kernel .
FreeRTOS is distributed in the hope that it will be useful , but WITHOUT ANY
WARRANTY ; without even the implied warranty of MERCHANTABILITY or FITNESS
FOR A PARTICULAR PURPOSE . See the GNU General Public License for more
details . You should have received a copy of the GNU General Public License
and the FreeRTOS license exception along with FreeRTOS ; if not it can be
viewed here : http : //www.freertos.org/a00114.html and also obtained by
writing to Real Time Engineers Ltd . , contact details for whom are available
on the FreeRTOS WEB site .
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* Having a problem ? Start by reading the FAQ " My application does *
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http : //www.FreeRTOS.org - Documentation, books, training, latest versions,
license and Real Time Engineers Ltd . contact details .
http : //www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
including FreeRTOS + Trace - an indispensable productivity tool , and our new
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indemnification and middleware , under the OpenRTOS brand .
http : //www.SafeRTOS.com - High Integrity Systems also provide a safety
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mission critical applications that require provable dependability .
*/
# ifndef PORTMACRO_H
# define PORTMACRO_H
/* IAR includes. */
# ifdef __ICCARM__
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# include <intrinsics.h>
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# ifdef __cplusplus
extern " C " {
# endif
/*-----------------------------------------------------------
* Port specific definitions .
*
* The settings in this file configure FreeRTOS correctly for the given hardware
* and compiler .
*
* These settings should not be altered .
* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
*/
/* Type definitions. */
# define portCHAR char
# define portFLOAT float
# define portDOUBLE double
# define portLONG long
# define portSHORT short
# define portSTACK_TYPE unsigned long
# define portBASE_TYPE portLONG
typedef unsigned long portTickType ;
# define portMAX_DELAY ( portTickType ) 0xffffffff
/*-----------------------------------------------------------*/
/* Hardware specifics. */
# define portSTACK_GROWTH ( -1 )
# define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ )
# define portBYTE_ALIGNMENT 8
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/*-----------------------------------------------------------*/
/* Task utilities. */
/* Called at the end of an ISR that can cause a context switch. */
# define portEND_SWITCHING_ISR( xSwitchRequired )\
{ \
extern unsigned long ulPortYieldRequired ; \
\
if ( xSwitchRequired ! = pdFALSE ) \
{ \
ulPortYieldRequired = pdTRUE ; \
} \
}
# define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
# define portYIELD() __asm( "SWI 0" );
/*-----------------------------------------------------------
* Critical section control
* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - */
extern void vPortEnterCritical ( void ) ;
extern void vPortExitCritical ( void ) ;
extern unsigned long ulPortSetInterruptMask ( void ) ;
extern void vPortClearInterruptMask ( unsigned long ulNewMaskValue ) ;
/* These macros do not globally disable/enable interrupts. They do mask off
interrupts that have a priority below configMAX_API_CALL_INTERRUPT_PRIORITY . */
# define portENTER_CRITICAL() vPortEnterCritical();
# define portEXIT_CRITICAL() vPortExitCritical();
# define portDISABLE_INTERRUPTS() ulPortSetInterruptMask()
# define portENABLE_INTERRUPTS() vPortClearInterruptMask( 0 )
# define portSET_INTERRUPT_MASK_FROM_ISR() ulPortSetInterruptMask()
# define portCLEAR_INTERRUPT_MASK_FROM_ISR(x) vPortClearInterruptMask(x)
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/*-----------------------------------------------------------*/
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/* Task function macros as described on the FreeRTOS.org WEB site. These are
not required for this port but included in case common demo code that uses these
macros is used . */
# define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
# define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
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/* Prototype of the FreeRTOS tick handler. This must be installed as the
handler for whichever peripheral is used to generate the RTOS tick . */
void FreeRTOS_Tick_Handler ( void ) ;
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/* Any task that uses the floating point unit MUST call vPortTaskUsesFPU()
before any floating point instructions are executed . */
void vPortTaskUsesFPU ( void ) ;
# define portTASK_USES_FLOATING_POINT() vPortTaskUsesFPU()
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# define portLOWEST_INTERRUPT_PRIORITY ( ( ( unsigned long ) configUNIQUE_INTERRUPT_PRIORITIES ) - 1UL )
# define portLOWEST_USABLE_INTERRUPT_PRIORITY ( portLOWEST_INTERRUPT_PRIORITY - 1UL )
/* Architecture specific optimisations. */
# if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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/* Store/clear the ready priorities in a bit map. */
# define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
# define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
/*-----------------------------------------------------------*/
# define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __CLZ( uxReadyPriorities ) )
# endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
# ifdef configASSERT
void vPortValidateInterruptPriority ( void ) ;
# define portASSERT_IF_INTERRUPT_PRIORITY_INVALID() vPortValidateInterruptPriority()
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# endif
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# define portNOP() __asm volatile( "NOP" )
# ifdef __cplusplus
}
# endif
# endif /* __ICCARM__ */
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/* The number of bits to shift for an interrupt priority is dependent on the
number of bits implemented by the interrupt controller . */
# if configUNIQUE_INTERRUPT_PRIORITIES == 16
# define portPRIORITY_SHIFT 4
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# define portMAX_BINARY_POINT_VALUE 3
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# elif configUNIQUE_INTERRUPT_PRIORITIES == 32
# define portPRIORITY_SHIFT 3
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# define portMAX_BINARY_POINT_VALUE 2
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# elif configUNIQUE_INTERRUPT_PRIORITIES == 64
# define portPRIORITY_SHIFT 2
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# define portMAX_BINARY_POINT_VALUE 1
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# elif configUNIQUE_INTERRUPT_PRIORITIES == 128
# define portPRIORITY_SHIFT 1
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# define portMAX_BINARY_POINT_VALUE 0
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# elif configUNIQUE_INTERRUPT_PRIORITIES == 256
# define portPRIORITY_SHIFT 0
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# define portMAX_BINARY_POINT_VALUE 0
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# else
# error Invalid configUNIQUE_INTERRUPT_PRIORITIES setting. configUNIQUE_INTERRUPT_PRIORITIES must be set to the number of unique priorities implemented by the target hardware
# endif
/* Interrupt controller access addresses. */
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# define portICCPMR_PRIORITY_MASK_OFFSET ( 0x04 )
# define portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET ( 0x0C )
# define portICCEOIR_END_OF_INTERRUPT_OFFSET ( 0x10 )
# define portICCBPR_BINARY_POINT_OFFSET ( 0x08 )
# define portICCRPR_RUNNING_PRIORITY_OFFSET ( 0x14 )
# define portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS ( configINTERRUPT_CONTROLLER_BASE_ADDRESS + configINTERRUPT_CONTROLLER_CPU_INTERFACE_OFFSET )
# define portICCPMR_PRIORITY_MASK_REGISTER ( *( ( volatile unsigned char * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET ) ) )
# define portICCIAR_INTERRUPT_ACKNOWLEDGE_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCIAR_INTERRUPT_ACKNOWLEDGE_OFFSET )
# define portICCEOIR_END_OF_INTERRUPT_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCEOIR_END_OF_INTERRUPT_OFFSET )
# define portICCPMR_PRIORITY_MASK_REGISTER_ADDRESS ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCPMR_PRIORITY_MASK_OFFSET )
# define portICCBPR_BINARY_POINT_REGISTER ( *( ( const volatile unsigned long * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCBPR_BINARY_POINT_OFFSET ) ) )
# define portICCRPR_RUNNING_PRIORITY_REGISTER ( *( ( const volatile unsigned char * ) ( portINTERRUPT_CONTROLLER_CPU_INTERFACE_ADDRESS + portICCRPR_RUNNING_PRIORITY_OFFSET ) ) )
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# endif /* PORTMACRO_H */