196 lines
6.2 KiB
C
196 lines
6.2 KiB
C
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/* This header file is part of the ATMEL FREERTOS-0.9.0 Release */
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/*This file has been prepared for Doxygen automatic documentation generation.*/
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/*! \file *********************************************************************
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*
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* \brief GPIO header for AVR32 UC3.
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*
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* This file contains basic GPIO driver functions.
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*
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* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
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* - Supported devices: All AVR32 devices with a GPIO module can be used.
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* - AppNote:
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*
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* \author Atmel Corporation: http://www.atmel.com \n
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* Support email: avr32@atmel.com
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*
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*****************************************************************************/
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/* Copyright (c) 2007, Atmel Corporation All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of ATMEL may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
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* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _GPIO_H_
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#define _GPIO_H_
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#if __GNUC__
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# include <avr32/io.h>
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#elif __ICCAVR32__
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# include <avr32/iouc3a0512.h>
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#else
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# error Unknown compiler
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#endif
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/*! \name General GPIO API defines
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* These values are returned by the GPIO API:
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*/
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//! @{
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#define GPIO_SUCCESS 0 //!< Function successfully completed
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#define GPIO_FAILURE -1 //!< Function did not successfully complete for some unspecified reason
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#define GPIO_INVALID_ARGUMENT 1 //!< Input paramters are out of range
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//! @}
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/*! \name Interrupt configuration defines
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* Configure the method used to trigger the interrupt:
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*/
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//! @{
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#define GPIO_RISING_EDGE 1 //!< configure IT upon Rising Edge
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#define GPIO_FALLING_EDGE 2 //!< configure IT upon Falling Edge
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#define GPIO_INPUT_CHANGE 3 //!< configure IT upon Pin Change
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//! @}
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/*!
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* A type definitions of pins and module connectivity.
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* First column is the pin number, the second is gpio connectivity.
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*/
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typedef char avr32_gpiomap_t[][2];
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/*!
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* \brief Enable a module pin for a given set of pins and respective modules.
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*
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* \param gpiomap A list of pins and pio connectivity
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* \param size The number of pins in \a gpiomap
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* \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT
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*/
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extern int gpio_enable_module(avr32_gpiomap_t gpiomap, int size);
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/*!
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* \brief Enable a special module (function) for a pin (pin number).
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*
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* \param pin The pin number
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* \param function The pin function
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* \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT
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*/
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extern int gpio_enable_module_pin(int pin, int function);
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/*!
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* \brief Enable pins of a module according gpiomap.
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*
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* \param gpiomap The pin map
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* \param size The number of pins in \a gpiomap
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*/
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extern void gpio_enable_gpio(avr32_gpiomap_t gpiomap, int size);
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/*!
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* \brief Enable the GPIO module to control the pin.
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*
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* \param pin The pin number
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*/
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extern void gpio_enable_gpio_pin(int pin);
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/*!
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* \brief Enable the GPIO glitch filter.
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*
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* When the glitch filter is enabled, a
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* glitch with duration of less than 1 clock cycle is automatically rejected, while a pulse with duration
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* of 2 clock cycles or more is accepted. For pulse durations between 1 clock cycle and 2 clock
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* cycles, the pulse may or may not be taken into account, depending on the precise timing of its
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* occurrence. Thus for a pulse to be guaranteed visible it must exceed 2 clock cycles, whereas for
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* a glitch to be reliably filtered out, its duration must not exceed 1 clock cycle. The filter introduces
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* 2 clock cycles latency.
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*
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* \param pin The pin number
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* \return \ref GPIO_SUCCESS
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*/
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extern void gpio_enable_gpio_glitch_filter(int pin);
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/*!
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* \brief Disable the GPIO glitch filter.
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*
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* \param pin The pin number
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*/
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extern void gpio_disable_gpio_glitch_filter(int pin);
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/*!
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* \brief Return the pin value
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*
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* \param pin The pin number
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* \return pin value
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*/
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extern int gpio_pin_value(int pin);
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/*!
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* \brief Disable the GPIO module to control a set of pins according to gpiomap.
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*
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* \param gpiomap The pin map
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* \param size The number of pins in \a gpiomap
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*/
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extern void gpio_disable_module(avr32_gpiomap_t gpiomap, int size);
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/*!
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* \brief Disable the GPIO module to control the pin.
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*
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* \param pin The pin number
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*/
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extern void gpio_disable_gpio_pin(int pin);
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/*!
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* \brief Configure a pin to generate IT
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*
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* \param pin GPIO pin number to configure.
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* \param level level to configure (\ref GPIO_RISING_EDGE, \ref GPIO_FALLING_EDGE, \ref GPIO_INPUT_CHANGE).
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*/
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extern void gpio_cfg_int_gpio_pin(int pin, int level);
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/*!
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* \brief Drive a gpio pin value to 1.
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*
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* \param pin The pin number
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*/
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extern void gpio_set_gpio_pin(int pin);
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/*!
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* \brief Drive a gpio pin value to 0.
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*
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* \param pin The pin number
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*/
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extern void gpio_clr_gpio_pin(int pin);
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/*!
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* \brief This function toggle a gpio pin value.
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*
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* \param pin The pin number
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*/
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extern void gpio_tgl_gpio_pin(int pin);
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#endif // _GPIO_H_
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